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DefaultBuild
*.mtud
/BCZT/QualityReport(BCZT,DefaultBuild).txt

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{
"configurations": [
{
"name": "Win32",
"includePath": [
"${workspaceFolder}/**"
],
"defines": [
"__near="
]
}
],
"version": 4
}

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{
"files.associations": {
"motorctrl.h": "c"
}
}

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/*******************************************************************************
* Library : Flash Data Library T04 (PicoFDL)
*
* File Name : $Source: pfdl.h $
* Lib. Version : $RL78_FDL_LIB_VERSION_T04_REN: V1.05 $
* Mod. Revision : $Revision: 1.8 $
* Mod. Date : $Date: 2013/06/10 22:04:41JST $
* Device(s) : RL78
* Description : C language API definition of the Flash Data Library
*******************************************************************************
* DISCLAIMER
* This software is supplied by Renesas Electronics Corporation and is only
* intended for use with Renesas products. No other uses are authorized. This
* software is owned by Renesas Electronics Corporation and is protected under
* all applicable laws, including copyright laws.
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* Renesas reserves the right, without notice, to make changes to this software
* and to discontinue the availability of this software. By using this software,
* you agree to the additional terms and conditions found by accessing the
* following link:
* http://www.renesas.com/disclaimer
*
* Copyright (C) 2011-2013 Renesas Electronics Corporation. All rights reserved.
*******************************************************************************/
#ifndef __PFDL_H_INCLUDED
#define __PFDL_H_INCLUDED
/*================================================================================================*/
/* include files list */
/*================================================================================================*/
#include "pfdl_types.h"
#define FLASH_START_ADDRESS (0xF1000) /* Start address of data flash */
#define TARGET_BLOCK (0) /* Block number of target(0 ~ 3) */
#define BLOCK_SIZE (0x400) /* Block size */
//#define WRITE_SIZE (1) /* Size of data to be written at once */
#define MAX_VALUE (0xFF) /* Maximum value of writing */
#define MAX_ADDRESS ((TARGET_BLOCK + 1) * BLOCK_SIZE - 1) /* Maximum address of writing */
#define PFDL_NG (1) /* Failure to Data Flash */
#define FDL_FRQ (32) /* Setting frequency (MHz) */
#define FDL_VOL (0x00) /* Voltage mode */
uint8_t WriteDataflash(uint8_t* buffer,uint32_t Addr,uint16_t lenth);
uint8_t WriteDataflash1(uint8_t* buffer,uint32_t Addr,uint16_t lenth);
void ReadFlashData(uint8_t* buffer,uint32_t Addr,uint16_t lenth);
/* ---------------------------------------------------------------------------------------------------------------*/
/* Block type: standard function */
/* ---------------------------------------------------------------------------------------------------------------*/
/* Purpose: Unconditional activation of the Data Flash Library. */
/* Based on the descriptor data: */
/* - the flash firmware will be initialized for data-flash access only */
/* - the internal timing and low-voltage capability will be configured according to the descriptor */
/* After successful initialization the data flash clock is ON and the PFDL is ready to use. */
/* */
/* CAUTION: */
/* Due to the code size minimization no plausibility checks are done by the PicoFDL. */
/* Neither configuration, frequency range nor data flash size will be checked by the library. */
/* */
/* Input: address of the PFDL descriptor variable (RAM only) */
/* Output: - */
/* Return: PFDL status */
/* ---------------------------------------------------------------------------------------------------------------*/
extern pfdl_status_t __far PFDL_Open(__near pfdl_descriptor_t* descriptor_pstr);
/* ---------------------------------------------------------------------------------------------------------------*/
/* Block type: standard function */
/* ---------------------------------------------------------------------------------------------------------------*/
/* Purpose: Disable data flash access unconditionally. */
/* If any command is just executed, PFDL_Close will stop it immediately. */
/* After return the data flash clock is switched OFF. */
/* Input: - */
/* Output: - */
/* Return: - */
/* ---------------------------------------------------------------------------------------------------------------*/
extern void __far PFDL_Close(void);
/* ---------------------------------------------------------------------------------------------------------------*/
/* Block type: standard function */
/* ---------------------------------------------------------------------------------------------------------------*/
/* Purpose: Initiating execution of the PFDL request related to the data flash. */
/* The corresponding request variable has to be parametrized before. */
/* */
/* request_pstr->index_u16 : byte-index or block-number within PFDL-pool */
/* request_pstr->data_pu08 : start address of the RAM data that should be read/written */
/* request_pstr->bytecount_u16 : number of bytes has to be read/written */
/* request_pstr->command_enu : command code */
/* */
/* CAUTION: */
/* Due to the code size minimization no plausibility checks are done by the PFDL. */
/* */
/* Input: &request_pstr - pointer to PFDL request variable */
/* Output: - */
/* Return: status of the request */
/* ---------------------------------------------------------------------------------------------------------------*/
extern pfdl_status_t __far PFDL_Execute(__near pfdl_request_t* request_pstr);
/* ---------------------------------------------------------------------------------------------------------------*/
/* Block type: standard function */
/* ---------------------------------------------------------------------------------------------------------------*/
/* Purpose: Continuation of command execution and status update of requests being under execution. */
/* Input: - */
/* Output: - */
/* Return: PFDL status = */
/* PFDL_IDLE - no request is processed by PFDL, PFDL is ready to receive new requests */
/* PFDL_OK - processed request/command finished without problems */
/* PFDL_BUSY - request/command is still being processed */
/* other - flash or firmware related errors */
/* ---------------------------------------------------------------------------------------------------------------*/
extern pfdl_status_t __far PFDL_Handler(void);
/* ---------------------------------------------------------------------------------------------------------------*/
/* Block type: standard function */
/* ---------------------------------------------------------------------------------------------------------------*/
/* Purpose: Returns the start address of the library version string */
/* */
/* Input: - */
/* Output: - */
/* Return: starting address of the zero-terminated version string */
/* ---------------------------------------------------------------------------------------------------------------*/
extern __far pfdl_u08* __far PFDL_GetVersionString(void);
#endif

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/*******************************************************************************
* Library : Flash Data Library T04 (PicoFDL)
*
* File Name : $Source: pfdl_types.h $
* Lib. Version : $RL78_FDL_LIB_VERSION_T04_REN: V1.05 $
* Mod. Revision : $Revision: 1.8 $
* Mod. Date : $Date: 2013/06/10 22:28:01JST $
* Device(s) : RL78
* Description : Type definitions used by the library
*******************************************************************************
* DISCLAIMER
* This software is supplied by Renesas Electronics Corporation and is only
* intended for use with Renesas products. No other uses are authorized. This
* software is owned by Renesas Electronics Corporation and is protected under
* all applicable laws, including copyright laws.
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* Renesas reserves the right, without notice, to make changes to this software
* and to discontinue the availability of this software. By using this software,
* you agree to the additional terms and conditions found by accessing the
* following link:
* http://www.renesas.com/disclaimer
*
* Copyright (C) 2011-2013 Renesas Electronics Corporation. All rights reserved.
*******************************************************************************/
#ifndef __PFDL_TYPES_H_INCLUDED
#define __PFDL_TYPES_H_INCLUDED
#ifndef __TYPEDEF__
typedef signed char int8_t;
typedef unsigned char uint8_t;
typedef signed short int16_t;
typedef unsigned short uint16_t;
typedef signed long int32_t;
typedef unsigned long uint32_t;
typedef unsigned short MD_STATUS;
#define __TYPEDEF__
#endif
/*==============================================================================================*/
/* unsigned type definitions */
/*==============================================================================================*/
typedef unsigned char pfdl_u08;
typedef unsigned int pfdl_u16;
typedef unsigned long int pfdl_u32;
/*==============================================================================================*/
/* global constant definitions */
/*==============================================================================================*/
/*==============================================================================================*/
/* global type definitions */
/*==============================================================================================*/
/* PFDL command code set */
typedef enum
{ /* ---------------------------------------------- */
PFDL_CMD_READ_BYTES = (0x00), /* 0x00, reads data from flash memory */
PFDL_CMD_IVERIFY_BYTES = (0x06), /* 0x06, verifies data if flash content is stable */
PFDL_CMD_BLANKCHECK_BYTES = (0x08), /* 0x08, checks if flash content is blank */
PFDL_CMD_WRITE_BYTES = (0x04), /* 0x04, writes data into flash memory */
PFDL_CMD_ERASE_BLOCK = (0x03) /* 0x03, erases one flash block */
} pfdl_command_t; /* ---------------------------------------------- */
/* PFDL error code set */
typedef enum
{
/* operation related status */ /* ---------------------------------------------- */
PFDL_IDLE = (0x30), /* 0x30, PFDL ready to receive requests */
PFDL_OK = (0x00), /* 0x00, command finished without problems */
PFDL_BUSY = (0xFF), /* 0xFF, command is being processed */
/* flash related status */ /* ---------------------------------------------- */
PFDL_ERR_PROTECTION = (0x10), /* 0x10, protection error (access right conflict) */
PFDL_ERR_ERASE = (0x1A), /* 0x1A, erase error */
PFDL_ERR_MARGIN = (0x1B), /* 0x1B, blankcheck or verify margin violated */
PFDL_ERR_WRITE = (0x1C), /* 0x1C, write error */
PFDL_ERR_PARAMETER = (0x05) /* 0x05, parameter error */
} pfdl_status_t; /* ---------------------------------------------- */
/* PFDL request type (base type for any PFDL access) */
typedef struct
{ /* ---------------------------------------------- */
pfdl_u16 index_u16; /* 2, W, virt. byte/block index inside PFDL-pool */
__near pfdl_u08* data_pu08; /* 2, W, pointer to the 1'st byte of data buffer */
pfdl_u16 bytecount_u16; /* 2, W, number of bytes to be transfered */
pfdl_command_t command_enu; /* 1, W, command code */
} pfdl_request_t; /*------------------------------------------------*/
/* 7 bytes in total */
/*------------------------------------------------*/
/* PFDL descriptor type */
typedef struct
{ /* ---------------------------------------------- */
pfdl_u08 fx_MHz_u08; /* 1, system frequency expressed in MHz */
pfdl_u08 wide_voltage_mode_u08; /* 1, programming voltage mode ( full/wide ) */
} pfdl_descriptor_t; /*------------------------------------------------*/
/* 2 bytes in total */
/*==============================================================================================*/
/* type definition plausibility check */
/*==============================================================================================*/
/* The following checks are implemented in order to check the correct size of the FDL type */
/* definitions at compile time. In case of a compilation error in the following lines, please */
/* check your compiler options for enumeration types and structures and contact your local */
/* support, if necessary. */
#define R_PFDLT04_ASSERT_CONCAT_(a, b) a##b
#define R_PFDLT04_ASSERT_CONCAT(a, b) R_PFDLT04_ASSERT_CONCAT_(a, b)
#define R_PFDLT04_STATIC_ASSERT(e) enum { R_PFDLT04_ASSERT_CONCAT(R_PFDLT04_ASSERT_LINE_, __LINE__) = 1/(!!(e)) }
/* assertion if unsigned data type size is not correct, please evaluate compiler settings for integer types */
R_PFDLT04_STATIC_ASSERT(sizeof(pfdl_u08)==1);
R_PFDLT04_STATIC_ASSERT(sizeof(pfdl_u16)==2);
R_PFDLT04_STATIC_ASSERT(sizeof(pfdl_u32)==4);
/* assertion if unsigned data type size is not correct, please evaluate compiler settings for enumeration types */
R_PFDLT04_STATIC_ASSERT(sizeof(pfdl_command_t)==1);
R_PFDLT04_STATIC_ASSERT(sizeof(pfdl_status_t)==1);
/* assertion if structure type size is not correct, please evaluate compiler settings for structure types */
R_PFDLT04_STATIC_ASSERT(sizeof(pfdl_request_t)>=7); /* sizeof(pfdl_request_t) == 7 for packed structures */
R_PFDLT04_STATIC_ASSERT(sizeof(pfdl_request_t)<=8); /* sizeof(pfdl_request_t) == 8 for unpacked structures */
R_PFDLT04_STATIC_ASSERT(sizeof(pfdl_descriptor_t)==2);
#endif

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#include "r_cg_macrodriver.h"
#include "pfdl.h"
#include "pfdl_types.h"
/***********************************************************************************************************************
* Function Name: WriteDataflash
* Description :
* Arguments : buffer: to be writed data; Addr:Target absolute address,must be check for different mcu;lenth:to be writed number,<=1024
* Return Value : PFDL_OK -
Success
PFDL_IDLE -
Idling statement
PFDL_ERR_MARGIN -
Blank check error
other//if(Addr>=FLASH_START_ADDRESS&&Addr<FLASH_END_ADDRESS){
***********************************************************************************************************************/
uint8_t WriteDataflash(uint8_t* buffer,uint32_t Addr,uint16_t lenth)
{
static unsigned char Wr_Status;
pfdl_status_t ret;
pfdl_descriptor_t descriptor;
pfdl_request_t requester;
if(Addr>=0x000F1000 && Addr<0x000F2000)
{
if(Wr_Status == 0)
{
/* ---- Setting for PFDL_Open ---- */
descriptor.fx_MHz_u08 = FDL_FRQ;
descriptor.wide_voltage_mode_u08 = FDL_VOL;
PFDL_Open(&descriptor);
/* ---- Setting for blank check ---- */
requester.command_enu = PFDL_CMD_BLANKCHECK_BYTES;
requester.index_u16 = (unsigned int)(Addr - 0x0F1000);//g_write_address;0x0F1000 according to MCU
requester.bytecount_u16 = lenth;
ret = PFDL_Execute(&requester); /* Blank check */
Wr_Status = 1;
}
if(Wr_Status == 1)
{
/* ---- Waiting for command finish ---- */
while(ret == PFDL_BUSY)
{
ret = PFDL_Handler(); /* Status check process */
}
if(ret != PFDL_BUSY)
{
/* **** When blank check error **** */
if(ret == PFDL_ERR_MARGIN)
{
/* ---- Setting for erase ---- */
requester.command_enu = PFDL_CMD_ERASE_BLOCK;
requester.index_u16 = (unsigned int)(Addr - 0x0F1000)/0x400;//TARGET_BLOCK;
ret = PFDL_Execute(&requester); /* Erase block data */
Wr_Status = 2;
/* Erase data of target block */
}
/* **** When other than blank check error **** */
else
{
/* Do nothing */
}
/******When blank no check error***/
if(ret == PFDL_OK)
{
/* ---- Setting for write ---- */
requester.command_enu = PFDL_CMD_WRITE_BYTES;
requester.index_u16 = (unsigned int)(Addr - 0x0F1000);//g_write_address;;
requester.bytecount_u16 = lenth;
requester.data_pu08 = buffer;//&g_write_value;
ret = PFDL_Execute(&requester); /* Execute write */
Wr_Status = 3;
}
}
}
if(Wr_Status == 2)
{
/* ---- Waiting for command finish ---- */
while(ret == PFDL_BUSY)
{
ret = PFDL_Handler(); /* Status check process */
}
if(ret != PFDL_BUSY)
{
if(ret == PFDL_OK)
{
/* ---- Setting for write ---- */
requester.command_enu = PFDL_CMD_WRITE_BYTES;
requester.index_u16 = (unsigned int)(Addr - 0x0F1000);//g_write_address;;
requester.bytecount_u16 = lenth;
requester.data_pu08 = buffer;//&g_write_value;
ret = PFDL_Execute(&requester); /* Execute write */
Wr_Status = 3;
}
/* **** When blank check or data erase is failure **** */
else
{
ret = PFDL_NG;
//PFDL_Close(); /* Close FDL */
//Wr_Status = 0;
return ret;
}
}
}
if(Wr_Status == 3)
{
/* ---- Waiting for command finish ---- */
while(ret == PFDL_BUSY)
{
ret = PFDL_Handler(); /* Status check process */
}
if(ret != PFDL_BUSY)
{
/* ==== When write data is success ==== */
if(ret == PFDL_OK)
{
/* ---- Setting for verify ---- */
requester.command_enu = PFDL_CMD_IVERIFY_BYTES;
requester.index_u16 = (unsigned int)(Addr- 0x0F1000);//g_write_address;;
requester.bytecount_u16 = lenth;
ret = PFDL_Execute(&requester); /* Execute internal verify */
Wr_Status = 4;
}
/* ==== When writing data is failure ==== */
else
{
ret = PFDL_NG;
//PFDL_Close(); /* Close FDL */
//Wr_Status = 0;
return ret;
}
}
}
if(Wr_Status == 4)
{
/* ---- Waiting for command finish ---- */
while(ret == PFDL_BUSY)
{
ret = PFDL_Handler(); /* Status check process */
}
if(ret != PFDL_BUSY)
{
PFDL_Close(); /* Close FDL */
Wr_Status = 0;
return 0x11;//write data flash finished
}
}
}
else
{
ret = PFDL_NG;
Wr_Status = 0;
return ret;
}
}
uint8_t WriteDataflash1(uint8_t* buffer,uint32_t Addr,uint16_t lenth)
{
pfdl_status_t ret;
pfdl_descriptor_t descriptor;
pfdl_request_t requester;
if(Addr>=0x000F1000&&Addr<0x000F2000){
/* ---- Setting for PFDL_Open ---- */
descriptor.fx_MHz_u08 = FDL_FRQ;
descriptor.wide_voltage_mode_u08 = FDL_VOL;
PFDL_Open(&descriptor);
/* ---- Setting for blank check ---- */
requester.command_enu = PFDL_CMD_BLANKCHECK_BYTES;
requester.index_u16 = (unsigned int)(Addr - 0x0F1000);//g_write_address;0x0F1000 according to MCU
requester.bytecount_u16 = lenth;
ret = PFDL_Execute(&requester); /* Blank check */
/* ---- Waiting for command finish ---- */
while(ret == PFDL_BUSY)
{
ret = PFDL_Handler(); /* Status check process */
}
/* **** When blank check error **** */
if(ret == PFDL_ERR_MARGIN)
{
/* ---- Setting for erase ---- */
requester.command_enu = PFDL_CMD_ERASE_BLOCK;
requester.index_u16 = (unsigned int)(Addr - 0x0F1000)/0x400;//TARGET_BLOCK;
ret = PFDL_Execute(&requester); /* Erase block data */
/* ---- Waiting for command finish ---- */
while(ret == PFDL_BUSY)
{
ret = PFDL_Handler(); /* Status check process */
} /* Erase data of target block */
}
/* **** When other than blank check error **** */
else
{
/* Do nothing */
}
if(ret == PFDL_OK)
{
/* ---- Setting for write ---- */
requester.command_enu = PFDL_CMD_WRITE_BYTES;
requester.index_u16 = (unsigned int)(Addr - 0x0F1000);//g_write_address;;
requester.bytecount_u16 = lenth;
requester.data_pu08 = buffer;//&g_write_value;
ret = PFDL_Execute(&requester); /* Execute write */
/* ---- Waiting for command finish ---- */
while(ret == PFDL_BUSY)
{
ret = PFDL_Handler(); /* Status check process */
} /* Write data process */
/* ==== When write data is success ==== */
if(ret == PFDL_OK)
{
/* ---- Setting for verify ---- */
requester.command_enu = PFDL_CMD_IVERIFY_BYTES;
requester.index_u16 = (unsigned int)(Addr- 0x0F1000);//g_write_address;;
requester.bytecount_u16 = lenth;
ret = PFDL_Execute(&requester); /* Execute internal verify */
/* ---- Waiting for command finish ---- */
while(ret == PFDL_BUSY)
{
ret = PFDL_Handler();/* Status check process */
}
}
/* ==== When writing data is failure ==== */
else
{
ret = PFDL_NG;
}
}
/* **** When blank check or data erase is failure **** */
else
{
ret = PFDL_NG;
}
PFDL_Close(); /* Close FDL */
return ret;
}
else{
ret = PFDL_NG;
return ret;
}
}
/***********************************************************************************************************************
* Function Name: ReadFlashData
* Description :
* Arguments : buffer: to be read data;
Addr:Target absolute address,must be check for different mcu; Both codeflash & dataflash can be used
lenth:to be read number
* Return Value : None
***********************************************************************************************************************/
void ReadFlashData(uint8_t* buffer,uint32_t Addr,uint16_t lenth)
{
uint8_t temp;
volatile uint32_t w_count;
volatile uint8_t * snnumber;
/**** Only dataflash needed start*****/
if(0 == DFLEN)
{
DFLEN = 1U; //允许存取数据闪存
for (w_count = 0U; w_count < 15U; w_count++)//3U
{
NOP(); //延时，给硬件反应的时间
}
}
/**** Only dataflash needed end******/
snnumber = Addr;
for(temp = 0; temp < lenth; temp ++)
{
*buffer = *snnumber;
buffer ++;
snnumber ++;
}
//memcpy(buffer,snnumber,lenth);
}
/* End user code. Do not edit comment generated here */

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内振32MHz
擦除 64Bytes和1024Bytes个00H，时间一样，为5.7mS
写入 1024Bytes个00H 需要46.8mS，写入时间和数据长度成线性关系
T04库的使用注意事项：
1，栈，传参，DMA对应的RAM地址都不要放到高速RAM区，否则程序跑飞
2，由于连续写入多个字节的时间较长，建议不要采用提供函数中的死等的办法，可以在主循环中查PFDL_Handler()
3，读出可以直接用CPU指令，不需要库
4，输入的地址超出范围，库的返回值有可能不报错，镜像区不报错，保留区跑飞

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/*===========================================================================*/
/* Module : RLIN_driver.c */
/* Version: V1.00 */
/*===========================================================================*/
/* COPYRIGHT */
/*===========================================================================*/
/* Copyright (c) 2012 by Renesas Electronics Europe GmbH, */
/* a company of the Renesas Electronics Corporation */
/*===========================================================================*/
/* Purpose: main routine of QB-R5F10PMF-TB startup sample */
/* */
/*===========================================================================*/
/* In case of any question please do not hesitate to contact: */
/* */
/* Technical Product Support */
/* */
/* Renesas Electronics Europe GmbH */
/* Arcadiastrasse 10 */
/* D-40472 Duesseldorf, Germany */
/* */
/* e-mail: device_support.rl78-eu@lm.renesas.com */
/* FAX: +49 - (0)211 / 65 03 - 12 79 */
/* */
/*===========================================================================*/
/* Warranty Disclaimer */
/* */
/* Because the Product(s) is licensed free of charge, there is no warranty */
/* of any kind whatsoever and expressly disclaimed and excluded by Renesas, */
/* either expressed or implied, including but not limited to those for */
/* non-infringement of intellectual property, merchantability and/or */
/* fitness for the particular purpose. */
/* Renesas shall not have any obligation to maintain, service or provide bug */
/* fixes for the supplied Product(s) and/or the Application. */
/* */
/* Each User is solely responsible for determining the appropriateness of */
/* using the Product(s) and assumes all risks associated with its exercise */
/* of rights under this Agreement, including, but not limited to the risks */
/* and costs of program errors, compliance with applicable laws, damage to */
/* or loss of data, programs or equipment, and unavailability or */
/* interruption of operations. */
/* */
/* Limitation of Liability */
/* */
/* In no event shall Renesas be liable to the User for any incidental, */
/* consequential, indirect, or punitive damage (including but not limited */
/* to lost profits) regardless of whether such liability is based on breach */
/* of contract, tort, strict liability, breach of warranties, failure of */
/* essential purpose or otherwise and even if advised of the possibility of */
/* such damages. Renesas shall not be liable for any services or products */
/* provided by third party vendors, developers or consultants identified or */
/* referred to the User by Renesas in connection with the Product(s) and/or */
/* the Application. */
/* */
/*===========================================================================*/
/* Environment: */
/* Device: R5F10PMF */
/* Target Hardware: QB-R5F10PMF-TB */
/* IDE: IAR Systems */
/* Embedded Workbench for RL78 V1.20.x */
/* */
/*===========================================================================*/
/* History: */
/* V1.00: Initial version */
/* */
/*===========================================================================*/
/***********************************************************************************************************************
* File Name : RLIN_driver.c
* Device(s) : R5F10PMF
* Tool-Chain : IAR Systems iccrl78
* Description : This file implements device driver for PORT module.
* Creation Date: 15.07.2013
***********************************************************************************************************************/
/***********************************************************************************************************************
Includes
***********************************************************************************************************************/
#include "r_cg_macrodriver.h"
#include "RLIN_driver.h"
#include "r_cg_userdefine.h"
#define RLIN_DateBuffer LDB01
#ifdef RLIN_Master
uint8_t Master_TxData1[]={0x00,0x00,0x00,0x00, 0x00,0x00,0x00,0x00}; /*Transmission data store array*/
uint8_t Master_TxData2[]={0x49,0x40,0x10}; /*Transmission data store array*/
uint8_t Master_TxData3[]={0xCA,0x0F,0x0F}; /*Transmission data store array*/
uint8_t Master_RxData1[8];
uint8_t Master_RxData2[8];
uint8_t Master_RxData3[8];
#endif
#ifdef RLIN_Slave
/***********************************************************************************************************************
* Function Name: RLIN_Slave_Init(void)
* Description : This function initializes the RLIN Slave node, setting clock supply,baud rate,ect.
* Arguments : None
* Return Value : None
***********************************************************************************************************************/
void RLIN_Slave_Init(void)
{
LCHSEL = 0x00; /* Selects RLIN0 */
PER2 |= 0x04; /* Enable input clock supply RLIN0*/
LINCKSEL=0x00; /* selects the fclk=32MHz clock to RLIN0.*/
LWBR0 = 0x34; /* b3-b1=010: Prescaler Clock Selcet 32/4, bit sampling count select b7-b4=0011 : 4 sampling. */
LBRP00 = 0x67; /* lower 8bit : 0X67=103D, Baud rate= 32M/ (103+1)*16= 19230 bps*/
LBRP01 = 0x00; /* upper 8 bits in the 16bit counter of the baud rate prescaler*/
LIN0RVCIF = 0U; /* Clear interrupt request signal */
LIN0TRMIF = 0U; /* Clear interrupt request signal */
LIN0WUPIF = 0U; /* Clear interrupt request signal */
LIN0RVCMK = 0U; /* interrupt servicing enable */
LIN0TRMMK = 0U; /* interrupt servicing enable */
LIN0WUPMK = 0U; /* interrupt servicing enable */
LIE0 |= 0x0F; /* Enable successful response/wake-up reception interrupt, enable all interrupt*/
LEDE0 |= 0xC9; /* Enable error detection */
/*Header format setting*/
LMD0 = 0x12; /* b1b0=10; LIN Slave mode (Auto baud rate),transmission interrupt,sucessful reception interrupt..., The noise filter is enable.*/
LBFC0 = 0x00; /* Reception break of 9.5/10 or more Tbits*/
LSC0 = 0x24; /* Response space 4bit; inter-byte space 1bit;*/
LWUP0 = 0x03; /* Wake-up Transmission low width 4 bits.*/
LIDB0&= 0x00; /* Clear the ID buffer */
ISC = 0x00; /* LRXD0 pin input signal is set as external interrupt input,*/
LINCKSEL|=0x10; /* Enable RLIN0 engine clock supply,*/
}
/***********************************************************************************************************************
* Function Name: RLIN_Slave_HeaderReceive(void)
* Description : This function is setting in slave mode, enable header reception is started.
* Arguments : None
* Return Value : None
***********************************************************************************************************************/
void RLIN_Slave_HeaderReceive(void)
{
LCUC0 = 0x03; /* 01: RLIN rest mode is canceled; 03:RLIN operation mode */
LTRC0|= 0x01; /* FTS=1; Header reception or wake up transmission/reception is started.*/
}
/***********************************************************************************************************************
* Function Name: RLIN_Slave_Transmit(void)
* Description : This function seting data buffer for response transmission start
* Arguments : uint8_t* databuf : variable array data.
uint8_t Data_length : transmit data length.
* Return Value : None
***********************************************************************************************************************/
void RLIN_Slave_Transmit(uint8_t* databuf,uint8_t Data_length)
{
uint8_t i;
uint16_t Databuf_adr;
LDFC0=0x30; /*b5=1:enhanced checksum mode; b4=1:transmission*/
LDFC0|=Data_length; /* b4-b0=Data_length: response data lengh select byte*/
Databuf_adr=RLIN_DateBuffer; /* get the data buffer address*/
for(i=0;i<Data_length;i++) /* setting tansmission data to date buffer*/
{
*((uint8_t *)(Databuf_adr+i))=databuf[i];
}
LTRC0=0x02; /*setting RTS=1;Response transmission start*/
}
/***********************************************************************************************************************
* Function Name: RLIN_Slave_Receive(void)
* Description : This function clear data buffer for response reception start
* Arguments : uint8_t Data_length : receive data length.
* Return Value : None
***********************************************************************************************************************/
void RLIN_Slave_Receive(uint8_t Data_length)
{
Clear_DataBuffer();
LDFC0=0x20; /*b5=1:enhanced checksum mode; b4=0:Reception*/
LDFC0|=Data_length; /* b4-b0=Data_length: response data lengh select byte*/
LTRC0=0x02; /*setting RTS=1,response reception is started*/
}
void RLIN_Slave_NoResponse(void)
{
LTRC0=0x04; /* setting LNRR=0, No response request*/
}
#endif
#ifdef RLIN_Master
/***********************************************************************************************************************
* Function Name: RLIN_Master_Init(void)
* Description : This function initializes the RLIN Slave node, setting clock supply,baud rate,ect.
* Arguments : None
* Return Value : None
***********************************************************************************************************************/
void RLIN_Master_Init(void)
{
LCHSEL = 0x00; /* Selects RLIN0 */
PER2 |= 0x04; /* Enable input clock supply RLIN0*/
LINCKSEL=0x00; /* selects the fclk=32MHz clock to RLIN0.*/
LWBR0 = 0x01; /* b0=1, LIN2.0 or 2.1; Prescaler Clock Selcet 1/1; bit sampling count select 0000 : 16 sampling. */
LBRP00 = 0x67; /* fa:0X67=103D, Baud rate= 32M/ (103+1)*16= 19230 bps fb:9615bps fc:2403bps */
LBRP01 = 0x5F; /* fd:10416bps*/
LIN0RVCIF = 0U; /* Clear Reception interrupt request signal */
LIN0TRMIF = 0U; /* Clear Transmission interrupt request signal */
LIN0WUPIF = 0U; /* Clear Wake up interrupt request signal */
LIN0IF = 0U; /* Clear LIN or LIN Status interrupt */
LIN0RVCMK = 0U; /* interrupt reception servicing enable */
LIN0TRMMK = 0U; /* interrupt transmission servicing enable */
LIN0WUPMK = 0U; /* interrupt wake up servicing enable */
LIN0MK = 0U; /* interrupt Status servicing enable */
LIE0 |= 0x0F; /* Enable successful response/wake-up reception interrupt, enable all interrupt*/
LEDE0 |= 0x8F; /* Enable error detection */
/* Header format setting*/
LMD0 = 0x10; /* b0b1=00: LIN master mode ; b3b2=00: fa=LIN sysclock; b4=1:transmission interrupt,sucessful reception interrupt...; b5=0: The noise filter is enable.*/
LBFC0 = 0x15; /* b3-b0=0101: transmission break width 18Tbits; b5b4=01: break delimiter 2Tbit*/
LSC0 = 0x11; /* b2-b0=001:inter-byte space 1bit or Response space 4bit; b5b4=01: inter-byte space 1Tbit;*/
LWUP0 = 0x30; /* b7-b4=0100: Wake-up Transmission low width 4 bits.*/
LIDB0 &= 0x00; /* Clear the ID buffer */
ISC = 0x00; /* INTP11 pin input signal is set as external interrupt input*/
LINCKSEL|=0x10; /* Enable RLIN0 engine clock supply,*/
}
/***********************************************************************************************************************
* Function Name: RLIN_Master_HeaderTransmit(uint8_t ID)
* Description : This function is setting in slave mode, enable header reception is started.
* Arguments : None
* Return Value : None
***********************************************************************************************************************/
void RLIN_Master_HeaderTransmit(uint8_t ID)
{
LCUC0 = 0x03; /* 01: RLIN rest mode is canceled; 03:RLIN operation mode */
LIDB0 = 0X00; /* clear ID buffer */
LIDB0 = ID; /* ID load to ID buffer */
Clear_DataBuffer(); /* clear all data buffer */
switch(ID)
{
case 0x00: RLIN_Master_Transmit(Master_TxData1,2); /* ready for response transmit*/
break;
case 0x01: RLIN_Master_Receive(8); /* ready for response transmit*/
break;
case 0x02: RLIN_Master_Receive(4); /* ready for response transmit*/
break;
case 0x8B: RLIN_Master_Receive(2); /* ready for response receive*/
break;
default: break;
}
LTRC0=0x01;
}
/***********************************************************************************************************************
* Function Name: RLIN_Master_Transmit(void)
* Description : This function seting data buffer for response transmission start
* Arguments : uint8_t* databuf : variable array data.
uint8_t Data_length : transmit data length.
* Return Value : None
***********************************************************************************************************************/
void RLIN_Master_Transmit(uint8_t * databuf,uint8_t Data_length)
{
uint8_t i;
uint16_t Databuf_adr;
LDFC0=0x30;
LDFC0|=Data_length; /* MSB=0011, RCDS=1:Transmission, LCS=1: Enhanced checksum mode; LSB=0100: response data lengh select 4 byte*/
Databuf_adr=RLIN_DateBuffer;
for(i=0;i<Data_length;i++)
{
*((uint8_t *)(Databuf_adr+i))=databuf[i];
}
}
/***********************************************************************************************************************
* Function Name: RLIN_Master_Receive(void)
* Description : This function clear data buffer ready for response reception start
* Arguments : uint8_t Data_length : receive data length.
* Return Value : None
***********************************************************************************************************************/
void RLIN_Master_Receive(uint8_t Data_length)
{
Clear_DataBuffer();
LDFC0=0X20;
LDFC0|=Data_length; /* MSB=0011, RCDS=1:Transmission, LCS=1: Enhanced checksum mode; LSB=0100: response data lengh select 4 byte*/
}
/***********************************************************************************************************************
* Function Name: RLIN_Master_GetData(void)
* Description : This function is get data from data buffr according to ID data during the response reception
* Arguments : uint8_t Data_length : receive data length.
* Return Value : None
***********************************************************************************************************************/
uint8_t LIN_RxDataBuf[8] = {0};
extern void LIN_Rx_Handle(uint8_t,uint8_t *);
void RLIN_Master_GetData(void)
{
Get_reponse_RxData(LIN_RxDataBuf);
switch(LIDB0)
{
case 0x8B:
//LED = Get_reponse_RxData(Master_RxData1);
//P6=Master_RxData1[1];
break;
/* case 0x4c: Get_reponse_RxData(Master_RxData2); /*no used*/
/* break;
/* case 0x0D: Get_reponse_RxData(Master_RxData3); /*no used*/
/* break; */
default: break;
}
}
#endif
/***********************************************************************************************************************
* Function Name: Clear_DataBuffer
* Description : This function setting all data buffer to some value
* Arguments : uint8_t x : setting data buff value
* Return Value : None
***********************************************************************************************************************/
void Clear_DataBuffer()
{
uint8_t i;
uint16_t Databuf_adr;
Databuf_adr=RLIN_DateBuffer;
for(i=0;i<8;i++)
{
*((uint8_t *)(Databuf_adr+i))=0U;
}
}
/***********************************************************************************************************************
* Function Name: Get_reponse_RxData
* Description : This function get data buffer value to a variable array
* Arguments : uint8_t * RxData : a avriable array for store Data
* Return Value : None
***********************************************************************************************************************/
uint8_t Get_reponse_RxData(uint8_t * RxData)
{
uint8_t i,k;
uint16_t Databuf_adr;
k=LDFC0&0x0F;
Databuf_adr=RLIN_DateBuffer;
for(i=0;i<k;i++)
{
RxData[i]=(*((uint8_t *)(Databuf_adr+i)));
}
return RxData[1];
}

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/*===========================================================================*/
/* Module : RLIN_driver.h */
/* Version: V1.00 */
/*===========================================================================*/
/* COPYRIGHT */
/*===========================================================================*/
/* Copyright (c) 2012 by Renesas Electronics Europe GmbH, */
/* a company of the Renesas Electronics Corporation */
/*===========================================================================*/
/* Purpose: main routine of QB-R5F10PMF-TB startup sample */
/* */
/*===========================================================================*/
/* In case of any question please do not hesitate to contact: */
/* */
/* Technical Product Support */
/* */
/* Renesas Electronics Europe GmbH */
/* Arcadiastrasse 10 */
/* D-40472 Duesseldorf, Germany */
/* */
/* e-mail: device_support.rl78-eu@lm.renesas.com */
/* FAX: +49 - (0)211 / 65 03 - 12 79 */
/* */
/*===========================================================================*/
/* Warranty Disclaimer */
/* */
/* Because the Product(s) is licensed free of charge, there is no warranty */
/* of any kind whatsoever and expressly disclaimed and excluded by Renesas, */
/* either expressed or implied, including but not limited to those for */
/* non-infringement of intellectual property, merchantability and/or */
/* fitness for the particular purpose. */
/* Renesas shall not have any obligation to maintain, service or provide bug */
/* fixes for the supplied Product(s) and/or the Application. */
/* */
/* Each User is solely responsible for determining the appropriateness of */
/* using the Product(s) and assumes all risks associated with its exercise */
/* of rights under this Agreement, including, but not limited to the risks */
/* and costs of program errors, compliance with applicable laws, damage to */
/* or loss of data, programs or equipment, and unavailability or */
/* interruption of operations. */
/* */
/* Limitation of Liability */
/* */
/* In no event shall Renesas be liable to the User for any incidental, */
/* consequential, indirect, or punitive damage (including but not limited */
/* to lost profits) regardless of whether such liability is based on breach */
/* of contract, tort, strict liability, breach of warranties, failure of */
/* essential purpose or otherwise and even if advised of the possibility of */
/* such damages. Renesas shall not be liable for any services or products */
/* provided by third party vendors, developers or consultants identified or */
/* referred to the User by Renesas in connection with the Product(s) and/or */
/* the Application. */
/* */
/*===========================================================================*/
/* Environment: */
/* Device: R5F10PMF */
/* Target Hardware: QB-R5F10PMF-TB */
/* IDE: IAR Systems */
/* Embedded Workbench for RL78 V1.20.x */
/* */
/*===========================================================================*/
/* History: */
/* V1.00: Initial version */
/* */
/*===========================================================================*/
/***********************************************************************************************************************
* File Name : RLIN_Driver.h
* Device(s) : R5F10PMF
* Tool-Chain : IAR Systems iccrl78
* Description : This file implements device driver for PORT module.
* Creation Date: 15.07.2013
***********************************************************************************************************************/
#include "r_cg_userdefine.h"
#ifdef RLIN_Master
void RLIN_Master_Init(void); /* init Master RLIN0*/
void RLIN_Master_HeaderTransmit(uint8_t ID);
void RLIN_Master_Receive(uint8_t Data_length);
void RLIN_Master_Transmit(uint8_t * databuf,uint8_t Data_length);
void RLIN_Master_GetData(void);
#endif
extern uint8_t Slave_TxData[8];
extern uint8_t Slave_RxData1[8];
void Clear_DataBuffer(void);
uint8_t Get_reponse_RxData(uint8_t * RxData);//can not be declareed in yubianyi
/*
void Delay_ms(uint8_t i);
void Delay_us(uint8_t x);
*/
#ifdef RLIN_Slave
void RLIN_Slave_Init(void); /* init Slave RLIN0*/
void RLIN_Slave_HeaderReceive(void);
void RLIN_Slave_Transmit(uint8_t* databuf,uint8_t Data_length);
void RLIN_Slave_Receive(uint8_t Data_length);
void RLIN_Slave_NoResponse(void);
#endif

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/*===========================================================================*/
/* Module : RLIN_driver_user.c */
/* Version: V1.00 */
/*===========================================================================*/
/* COPYRIGHT */
/*===========================================================================*/
/* Copyright (c) 2012 by Renesas Electronics Europe GmbH, */
/* a company of the Renesas Electronics Corporation */
/*===========================================================================*/
/* Purpose: main routine of QB-R5F10PMF-TB startup sample */
/* */
/*===========================================================================*/
/* In case of any question please do not hesitate to contact: */
/* */
/* Technical Product Support */
/* */
/* Renesas Electronics Europe GmbH */
/* Arcadiastrasse 10 */
/* D-40472 Duesseldorf, Germany */
/* */
/* e-mail: device_support.rl78-eu@lm.renesas.com */
/* FAX: +49 - (0)211 / 65 03 - 12 79 */
/* */
/*===========================================================================*/
/* Warranty Disclaimer */
/* */
/* Because the Product(s) is licensed free of charge, there is no warranty */
/* of any kind whatsoever and expressly disclaimed and excluded by Renesas, */
/* either expressed or implied, including but not limited to those for */
/* non-infringement of intellectual property, merchantability and/or */
/* fitness for the particular purpose. */
/* Renesas shall not have any obligation to maintain, service or provide bug */
/* fixes for the supplied Product(s) and/or the Application. */
/* */
/* Each User is solely responsible for determining the appropriateness of */
/* using the Product(s) and assumes all risks associated with its exercise */
/* of rights under this Agreement, including, but not limited to the risks */
/* and costs of program errors, compliance with applicable laws, damage to */
/* or loss of data, programs or equipment, and unavailability or */
/* interruption of operations. */
/* */
/* Limitation of Liability */
/* */
/* In no event shall Renesas be liable to the User for any incidental, */
/* consequential, indirect, or punitive damage (including but not limited */
/* to lost profits) regardless of whether such liability is based on breach */
/* of contract, tort, strict liability, breach of warranties, failure of */
/* essential purpose or otherwise and even if advised of the possibility of */
/* such damages. Renesas shall not be liable for any services or products */
/* provided by third party vendors, developers or consultants identified or */
/* referred to the User by Renesas in connection with the Product(s) and/or */
/* the Application. */
/* */
/*===========================================================================*/
/* Environment: */
/* Device: R5F10PMF */
/* Target Hardware: QB-R5F10PMF-TB */
/* IDE: IAR Systems */
/* Embedded Workbench for RL78 V1.20.x */
/* */
/*===========================================================================*/
/* History: */
/* V1.00: Initial version */
/* */
/*===========================================================================*/
/***********************************************************************************************************************
* File Name : RLIN_driver_user.c
* Device(s) : R5F10PMF
* Tool-Chain : IAR Systems iccrl78
* Description : This file implements device driver for Interrupt module.
* Creation Date: 02.08.2013
***********************************************************************************************************************/
#include "r_cg_macrodriver.h"
#include "RLIN_driver.h"
#include "r_cg_userdefine.h"
#pragma interrupt RLIN0_Transmission_interrupt(vect=INTLIN0TRM)
#pragma interrupt RLIN0_Reception_interrupt(vect=INTLIN0RVC)
#pragma interrupt RLIN0_Status_interrupt(vect=INTLIN0)
#pragma interrupt RLIN0_Wakeup_interrupt(vect=INTLIN0WUP)
uint8_t GetIDbuffer;
#ifdef RLIN_Slave
uint8_t Slave_RxData1[8]; /*reception data store array*/
uint8_t Slave_RxData2[8]; /*reception data store array*/
uint8_t Slave_RxData3[8]; /*reception data store array*/
uint8_t Slave_TxData[8]={0,0,0,0,0,0,0,0}; /*Transmission data store array*/
#endif
/*
uint8_t TestTxData[]={0x4a,0xF0,0x93,0xe5,0x05,0x05,0x07,0x08};
uint8_t TestTxData1[]={0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08};
*/
/***********************************************************************************************************************
* Function Name: RLIN0_Transmission_interrupt
* Description : This function is RLIN0 Transmission interrupt service routine.
* Arguments : None
* Return Value : None
***********************************************************************************************************************/
static void __near RLIN0_Transmission_interrupt(void)
{
#ifdef RLIN_Master
uint8_t transmit_header_flag;
uint8_t transmit_response_flag;
transmit_header_flag=LST0 & 0x80;
transmit_response_flag=LST0 & 0x01;
if(transmit_header_flag)
{
LIE0&=0xF7; /*Disable error detection interrupt*/
LST0&=0X7F; /*clear successful header reception flag */
LIE0|=0x80; /*enable header reception interrupt*/
}
if(transmit_response_flag)
{
LST0&=0xFE;
}
#endif
#ifdef RLIN_Slave
LST0&=0xFE;
#endif
}
/***********************************************************************************************************************
* Function Name: RLIN0_Reception_interrupt
* Description : This function is RLIN0 Reception interrupt service routine.
* Arguments : None
* Return Value : None
***********************************************************************************************************************/
static void __near RLIN0_Reception_interrupt(void)
{
#ifdef RLIN_Slave
uint8_t receive_header_flag;
uint8_t receive_reponse_flag;
receive_header_flag=LST0 & 0x80; /* get header reception flag */
receive_reponse_flag=LST0 & 0X02; /* get response rception flag*/
LIN_Data_Lost_count=0;
GetIDbuffer=LIDB0;
if(receive_header_flag) /* Header successful receive*/
{
LIE0&=0xF7; /*Disable header interrupt*/
LST0&=0X7F; /*clear successful header reception flag*/
switch(GetIDbuffer)
{
case 0xC1: RLIN_Slave_Receive(8);
break;
case 0x42:
EnrollToLIN();
RLIN_Slave_Transmit(Slave_TxData,8);
flagTxEnd = 1;
break;
default: RLIN_Slave_NoResponse();
break;
}
LIE0 |= 0x80; /*enable header reception interrupt*/
}
if(receive_reponse_flag)
{
LIE0 &= 0xFD; /* disable response reception interrupt*/
LST0 &= 0xFD; /* clear response reception successful flag*/
switch(GetIDbuffer)
{
case 0xC1: Get_reponse_RxData(Slave_RxData1);
break;
default: break;
}
LIE0|=0x02; /*enable reception interrupt*/
}
LTRC0=0x01; /*enabled header reception interrupt*/
#endif
#ifdef RLIN_Master
LST0&=0xFD; /*clear response reception successful flag*/
RLIN_Master_GetData(); /*get the reception data*/
#endif
}
/***********************************************************************************************************************
* Function Name: RLIN0_Status_interrupt
* Description : This function is RLIN0 Status interrupt service routine.
* Arguments : None
* Return Value : None
***********************************************************************************************************************/
static void __near RLIN0_Status_interrupt(void)
{
/*while(1U)
{
;
}*/
}
/***********************************************************************************************************************
* Function Name: RLIN0_Wakeup_interrupt
* Description : This function is RLIN0 Wakeup interrupt service routine.
* Arguments : None
* Return Value : None
***********************************************************************************************************************/
static void __near RLIN0_Wakeup_interrupt(void)
{
LCUC0=0x03;
}

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BCZT/RLIN_driver/RLIN_user.c Normal file
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#include "RLIN_user.h"
LIN_TX_Msg_Type PanelToMain;
LIN_RX_Msg_Type MainToPanel;
void LIN_Data_Update(unsigned char *Array_1,unsigned char *Array_2,unsigned char lenth)
{
unsigned char i;
for(i=0;i<lenth;i++)
{
*Array_2=*Array_1;
Array_1++;
Array_2++;
}
}

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#ifndef _RLIN_USER_H_
#define _RLIN_USER_H_
//#include "DMK-CK-03.h"
typedef union{
unsigned char LIN_Msg_Byte[8];
struct{
unsigned char Btn_AC:1;
unsigned char Btn_MaxDef:1;
unsigned char Btn_Mode:1;
unsigned char NonUseSignal00:2;
unsigned char Btn_BlrUp:1;
unsigned char Btn_BlrDn:1;
unsigned char NonUseSignal01:1; //First byte
unsigned char Btn_Off:1;
unsigned char Btn_Sync:1;
unsigned char Btn_Auto:1;
unsigned char Btn_Climate:1;
unsigned char Btn_REC:1;
unsigned char Btn_FRE:1;
unsigned char Spec:2; //Second byte
unsigned char NonUseSignalb16_L:8;//Third byte
unsigned char NonUseSignalb16_H:8;//Fourth byte
unsigned char En_TempDR:8; //Fivth byte
unsigned char En_TempPS:8; //Sixth byte
unsigned char CheckSum_L:8; //Seventh byte
unsigned char CheckSum_H:8; //Eighth byte
}LIN_TX_Msg_Part;
}LIN_TX_Msg_Type;
extern LIN_TX_Msg_Type PanelToMain;
typedef union{
unsigned char LIN_Msg_Byte[8];
struct{
unsigned char LED_Auto:1;
unsigned char LED_AC:1;
unsigned char :2;
unsigned char LED_FRE:1;
unsigned char LED_REC:1;
unsigned char LED_MaxDef:1;
unsigned char LED_Sync:1;//First Byte
unsigned char Symbol_TempDR:8;//Second Byte
unsigned char Symbol_TempPS:8;//Third Byte
unsigned char :8;//Fourth Byte
unsigned char :8;//Fivth Byte
unsigned char :8;//Sixth Byte
unsigned char :8;//Seventh Byte
unsigned char Panel_Boot_Enable:1;
unsigned char :7;//Eighth Byte
}LIN_RX_Msg_Part;
}LIN_RX_Msg_Type;
extern LIN_RX_Msg_Type MainToPanel;
void LIN_Data_Update(unsigned char *Array_1,unsigned char *Array_2,unsigned char lenth);
#endif

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BCZT/cstart.asm Normal file
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;/**********************************************************************************************************************
; * DISCLAIMER
; * This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No
; * other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
; * applicable laws, including copyright laws.
; * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
; * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY,
; * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM
; * EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES
; * SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO
; * THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
; * Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of
; * this software. By using this software, you agree to the additional terms and conditions found by accessing the
; * following link:
; * http://www.renesas.com/disclaimer
; *
; * Copyright (C) 2020 Renesas Electronics Corporation. All rights reserved.
; *********************************************************************************************************************/
; NOTE : THIS IS A TYPICAL EXAMPLE.
$IFNDEF __RENESAS_VERSION__
__RENESAS_VERSION__ .EQU 0x01000000
$ENDIF
.public _start
.public _exit
;-----------------------------------------------------------------------------
; RAM section
;-----------------------------------------------------------------------------
.SECTION .dataR, DATA
.SECTION .sdataR, DATA
; .SECTION .datafR, DATAF
; .SECTION .textfR, TEXTF
$IF (__RENESAS_VERSION__ < 0x01010000) ; for CC-RL V1.00
;-----------------------------------------------------------------------------
; stack area
;-----------------------------------------------------------------------------
; !!! [CAUTION] !!!
; Set up stack size suitable for a project.
.SECTION .stack_bss, BSS
_stackend:
.DS 0x200
_stacktop:
$ENDIF
;-----------------------------------------------------------------------------
; RESET vector
;-----------------------------------------------------------------------------
_start .VECTOR 0
;-----------------------------------------------------------------------------
; startup
;-----------------------------------------------------------------------------
.SECTION .text, TEXT
_start:
;--------------------------------------------------
; setting register bank
;--------------------------------------------------
; SEL RB0
;--------------------------------------------------
; setting mirror area
;--------------------------------------------------
; ONEB !PMC ; mirror area = 10000-1FFFFH
;--------------------------------------------------
; setting the stack pointer
;--------------------------------------------------
$IF (__RENESAS_VERSION__ >= 0x01010000)
MOVW SP,#LOWW(__STACK_ADDR_START)
$ELSE ; for CC-RL V1.00
MOVW SP,#LOWW(_stacktop)
$ENDIF
;--------------------------------------------------
; initializing stack area
;--------------------------------------------------
$IF (__RENESAS_VERSION__ >= 0x01010000)
MOVW AX,#LOWW(__STACK_ADDR_END)
$ELSE ; for CC-RL V1.00
MOVW AX,#LOWW(_stackend)
$ENDIF
CALL !!_stkinit
;--------------------------------------------------
; hardware initialization
;--------------------------------------------------
CALL !!_hdwinit
;--------------------------------------------------
; initializing BSS
;--------------------------------------------------
; clear external variables which doesn't have initial value (near)
MOVW HL,#LOWW(STARTOF(.bss))
MOVW AX,#LOWW(STARTOF(.bss) + SIZEOF(.bss))
BR $.L2_BSS
.L1_BSS:
MOV [HL+0],#0
INCW HL
.L2_BSS:
CMPW AX,HL
BNZ $.L1_BSS
; clear saddr variables which doesn't have initial value
MOVW HL,#LOWW(STARTOF(.sbss))
MOVW AX,#LOWW(STARTOF(.sbss) + SIZEOF(.sbss))
BR $.L2_SBSS
.L1_SBSS:
MOV [HL+0],#0
INCW HL
.L2_SBSS:
CMPW AX,HL
BNZ $.L1_SBSS
; clear external variables which doesn't have initial value (far)
; MOV ES,#HIGHW(STARTOF(.bssf))
; MOVW HL,#LOWW(STARTOF(.bssf))
; MOVW AX,#LOWW(STARTOF(.bssf) + SIZEOF(.bssf))
; BR $.L2_BSSF
;.L1_BSSF:
; MOV ES:[HL+0],#0
; INCW HL
;.L2_BSSF:
; CMPW AX,HL
; BNZ $.L1_BSSF
;--------------------------------------------------
; ROM data copy
;--------------------------------------------------
; copy external variables having initial value (near)
MOV ES,#HIGHW(STARTOF(.data))
MOVW BC,#LOWW(SIZEOF(.data))
BR $.L2_DATA
.L1_DATA:
DECW BC
MOV A,ES:LOWW(STARTOF(.data))[BC]
MOV LOWW(STARTOF(.dataR))[BC],A
.L2_DATA:
CLRW AX
CMPW AX,BC
BNZ $.L1_DATA
; copy saddr variables having initial value
MOV ES,#HIGHW(STARTOF(.sdata))
MOVW BC,#LOWW(SIZEOF(.sdata))
BR $.L2_SDATA
.L1_SDATA:
DECW BC
MOV A,ES:LOWW(STARTOF(.sdata))[BC]
MOV LOWW(STARTOF(.sdataR))[BC],A
.L2_SDATA:
CLRW AX
CMPW AX,BC
BNZ $.L1_SDATA
; copy external variables having initial value (far)
; MOVW BC,#LOWW(SIZEOF(.dataf))
; BR $.L2_DATAF
;.L1_DATAF:
; DECW BC
; MOV ES,#HIGHW(STARTOF(.dataf))
; MOV A,ES:LOWW(STARTOF(.dataf))[BC]
; MOV ES,#HIGHW(STARTOF(.datafR))
; MOV ES:LOWW(STARTOF(.datafR))[BC],A
;.L2_DATAF:
; CLRW AX
; CMPW AX,BC
; BNZ $.L1_DATAF
; copy .text to RAM
; MOV C,#HIGHW(STARTOF(.textf))
; MOVW HL,#LOWW(STARTOF(.textf))
; MOVW DE,#LOWW(STARTOF(.textfR))
; BR $.L2_TEXT
;.L1_TEXT:
; MOV A,C
; MOV ES,A
; MOV A,ES:[HL]
; MOV [DE],A
; INCW DE
; INCW HL
; CLRW AX
; CMPW AX,HL
; SKNZ
; INC C
;.L2_TEXT:
; MOVW AX,HL
; CMPW AX,#LOWW(STARTOF(.text) + SIZEOF(.text))
; BNZ $.L1_TEXT
;--------------------------------------------------
; call main function
;--------------------------------------------------
CALL !!_main ; main();
;--------------------------------------------------
; call exit function
;--------------------------------------------------
CLRW AX ; exit(0)
_exit:
BR $_exit
;-----------------------------------------------------------------------------
; section
;-----------------------------------------------------------------------------
$IF (__RENESAS_VERSION__ >= 0x01010000)
.SECTION .RLIB, TEXTF
.L_section_RLIB:
.SECTION .SLIB, TEXTF
.L_section_SLIB:
$ENDIF
.SECTION .textf, TEXTF
.L_section_textf:
.SECTION .const, CONST
.L_section_const:
.SECTION .constf, CONSTF
.L_section_constf:
.SECTION .data, DATA
.L_section_data:
;.SECTION .dataf, DATAF
;.L_section_dataf:
.SECTION .sdata, SDATA
.L_section_sdata:
.SECTION .bss, BSS
.L_section_bss:
;.SECTION .bssf, BSSF
;.L_section_bssf:
.SECTION .sbss, SBSS
.L_section_sbss:

35
BCZT/hdwinit.asm Normal file
View File

@ -0,0 +1,35 @@
;/**********************************************************************************************************************
; * DISCLAIMER
; * This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No
; * other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
; * applicable laws, including copyright laws.
; * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
; * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY,
; * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM
; * EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES
; * SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO
; * THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
; * Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of
; * this software. By using this software, you agree to the additional terms and conditions found by accessing the
; * following link:
; * http://www.renesas.com/disclaimer
; *
; * Copyright (C) 2020 Renesas Electronics Corporation. All rights reserved.
; *********************************************************************************************************************/;---------------------------------------------------------------------
; _hdwinit
;
; void _hdwinit(void);
;
; input:
; NONE
; output:
; NONE
;---------------------------------------------------------------------
; NOTE : THIS IS A TYPICAL EXAMPLE.
.PUBLIC _hdwinit
.textf .CSEG TEXTF
_hdwinit:
RET

899
BCZT/iodefine.h Normal file
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@ -0,0 +1,899 @@
/******************************************************************************/
/* DISCLAIMER */
/* This software is supplied by Renesas Electronics Corporation and is only */
/* intended for use with Renesas products. No other uses are authorized.This */
/* software is owned by Renesas Electronics Corporation and is protected */
/* under all applicable laws, including copyright laws. */
/* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES */
/* REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING */
/* BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR */
/* PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY */
/* DISCLAIMED. */
/* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS */
/* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE */
/* LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL */
/* DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS */
/* AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. */
/* Renesas reserves the right, without notice, to make changes to this */
/* software and to discontinue the availability of this software. */
/* By using this software, you agree to the additional terms and conditions */
/* found by accessing the following link: */
/* http://www.renesas.com/disclaimer */
/* */
/* Device : RL78/R5F10AGC */
/* File Name : iodefine.h */
/* Abstract : Definition of Special Function Register (SFR) */
/* History : V1.11 [Device File version] */
/* Options : -df=E:\Program Files (x86)\renesas\CS+\CC\Device\RL78\Devicef */
/* ile\DR5F10AGC.DVF -o=F:\FCB_project\temp\bczt_new\CODE\BCZT\i */
/* odefine.h -f */
/* Date : 2023-10-20 */
/* Version : V1.15.00.01 [df2iodef.exe version] */
/* This is a typical example. */
/* */
/******************************************************************************/
#ifndef __R5F10AGCIODEFINE_HEADER__
#define __R5F10AGCIODEFINE_HEADER__
typedef struct
{
unsigned char no0:1;
unsigned char no1:1;
unsigned char no2:1;
unsigned char no3:1;
unsigned char no4:1;
unsigned char no5:1;
unsigned char no6:1;
unsigned char no7:1;
} __bitf_T;
typedef struct
{
unsigned char no0:1;
unsigned char no1:1;
unsigned char no2:1;
unsigned char no3:1;
unsigned char no4:1;
unsigned char no5:1;
unsigned char no6:1;
unsigned char no7:1;
unsigned char no8:1;
unsigned char no9:1;
unsigned char no10:1;
unsigned char no11:1;
unsigned char no12:1;
unsigned char no13:1;
unsigned char no14:1;
unsigned char no15:1;
} __bitf_T2;
#define ADM2 (*(volatile __near unsigned char *)0x10)
#define ADM2_bit (*(volatile __near __bitf_T *)0x10)
#define ADTYP (((volatile __near __bitf_T *)0x10)->no0)
#define AWC (((volatile __near __bitf_T *)0x10)->no2)
#define ADRCK (((volatile __near __bitf_T *)0x10)->no3)
#define ADUL (*(volatile __near unsigned char *)0x11)
#define ADLL (*(volatile __near unsigned char *)0x12)
#define ADTES (*(volatile __near unsigned char *)0x13)
#define PIOR0 (*(volatile __near unsigned char *)0x16)
#define PIOR1 (*(volatile __near unsigned char *)0x17)
#define PIOR4 (*(volatile __near unsigned char *)0x1A)
#define PIOR5 (*(volatile __near unsigned char *)0x1B)
#define PIOR7 (*(volatile __near unsigned char *)0x1D)
#define PITHL1 (*(volatile __near unsigned char *)0x21)
#define PITHL1_bit (*(volatile __near __bitf_T *)0x21)
#define PITHL3 (*(volatile __near unsigned char *)0x23)
#define PITHL3_bit (*(volatile __near __bitf_T *)0x23)
#define PITHL6 (*(volatile __near unsigned char *)0x26)
#define PITHL6_bit (*(volatile __near __bitf_T *)0x26)
#define PITHL7 (*(volatile __near unsigned char *)0x27)
#define PITHL7_bit (*(volatile __near __bitf_T *)0x27)
#define PITHL12 (*(volatile __near unsigned char *)0x2C)
#define PITHL12_bit (*(volatile __near __bitf_T *)0x2C)
#define PU0 (*(volatile __near unsigned char *)0x30)
#define PU0_bit (*(volatile __near __bitf_T *)0x30)
#define PU1 (*(volatile __near unsigned char *)0x31)
#define PU1_bit (*(volatile __near __bitf_T *)0x31)
#define PU3 (*(volatile __near unsigned char *)0x33)
#define PU3_bit (*(volatile __near __bitf_T *)0x33)
#define PU4 (*(volatile __near unsigned char *)0x34)
#define PU4_bit (*(volatile __near __bitf_T *)0x34)
#define PU6 (*(volatile __near unsigned char *)0x36)
#define PU6_bit (*(volatile __near __bitf_T *)0x36)
#define PU7 (*(volatile __near unsigned char *)0x37)
#define PU7_bit (*(volatile __near __bitf_T *)0x37)
#define PU9 (*(volatile __near unsigned char *)0x39)
#define PU9_bit (*(volatile __near __bitf_T *)0x39)
#define PU12 (*(volatile __near unsigned char *)0x3C)
#define PU12_bit (*(volatile __near __bitf_T *)0x3C)
#define PU14 (*(volatile __near unsigned char *)0x3E)
#define PU14_bit (*(volatile __near __bitf_T *)0x3E)
#define PIM1 (*(volatile __near unsigned char *)0x41)
#define PIM1_bit (*(volatile __near __bitf_T *)0x41)
#define PIM3 (*(volatile __near unsigned char *)0x43)
#define PIM3_bit (*(volatile __near __bitf_T *)0x43)
#define PIM12 (*(volatile __near unsigned char *)0x4C)
#define PIM12_bit (*(volatile __near __bitf_T *)0x4C)
#define POM1 (*(volatile __near unsigned char *)0x51)
#define POM1_bit (*(volatile __near __bitf_T *)0x51)
#define POM6 (*(volatile __near unsigned char *)0x56)
#define POM6_bit (*(volatile __near __bitf_T *)0x56)
#define POM12 (*(volatile __near unsigned char *)0x5C)
#define POM12_bit (*(volatile __near __bitf_T *)0x5C)
#define NFEN0 (*(volatile __near unsigned char *)0x70)
#define NFEN0_bit (*(volatile __near __bitf_T *)0x70)
#define NFEN1 (*(volatile __near unsigned char *)0x71)
#define NFEN1_bit (*(volatile __near __bitf_T *)0x71)
#define ISC (*(volatile __near unsigned char *)0x73)
#define ISC_bit (*(volatile __near __bitf_T *)0x73)
#define TIS0 (*(volatile __near unsigned char *)0x74)
#define TIS1 (*(volatile __near unsigned char *)0x75)
#define ADPC (*(volatile __near unsigned char *)0x76)
#define PMS (*(volatile __near unsigned char *)0x77)
#define PMS_bit (*(volatile __near __bitf_T *)0x77)
#define IAWCTL (*(volatile __near unsigned char *)0x78)
#define INTFLG0 (*(volatile __near unsigned char *)0x79)
#define LCHSEL (*(volatile __near unsigned char *)0x7B)
#define INTMSK (*(volatile __near unsigned char *)0x7C)
#define DFLCTL (*(volatile __near unsigned char *)0x90)
#define DFLCTL_bit (*(volatile __near __bitf_T *)0x90)
#define DFLEN (((volatile __near __bitf_T *)0x90)->no0)
#define HIOTRM (*(volatile __near unsigned char *)0xA0)
#define HOCODIV (*(volatile __near unsigned char *)0xA8)
#define SPMCTRL (*(volatile __near unsigned char *)0xD8)
#define SPOFR (*(volatile __near unsigned short *)0xDA)
#define SPUFR (*(volatile __near unsigned short *)0xDC)
#define PER0 (*(volatile __near unsigned char *)0xF0)
#define PER0_bit (*(volatile __near __bitf_T *)0xF0)
#define TAU0EN (((volatile __near __bitf_T *)0xF0)->no0)
#define SAU0EN (((volatile __near __bitf_T *)0xF0)->no2)
#define ADCEN (((volatile __near __bitf_T *)0xF0)->no5)
#define RTCEN (((volatile __near __bitf_T *)0xF0)->no7)
#define OSMC (*(volatile __near unsigned char *)0xF3)
#define BCDADJ (*(volatile __near unsigned char *)0xFE)
#define SSR00 (*(volatile __near unsigned short *)0x100)
#define SSR00L (*(volatile __near unsigned char *)0x100)
#define SSR01 (*(volatile __near unsigned short *)0x102)
#define SSR01L (*(volatile __near unsigned char *)0x102)
#define SIR00 (*(volatile __near unsigned short *)0x104)
#define SIR00L (*(volatile __near unsigned char *)0x104)
#define SIR01 (*(volatile __near unsigned short *)0x106)
#define SIR01L (*(volatile __near unsigned char *)0x106)
#define SMR00 (*(volatile __near unsigned short *)0x108)
#define SMR01 (*(volatile __near unsigned short *)0x10A)
#define SCR00 (*(volatile __near unsigned short *)0x10C)
#define SCR01 (*(volatile __near unsigned short *)0x10E)
#define SE0 (*(volatile __near unsigned short *)0x110)
#define SE0L (*(volatile __near unsigned char *)0x110)
#define SE0L_bit (*(volatile __near __bitf_T *)0x110)
#define SS0 (*(volatile __near unsigned short *)0x112)
#define SS0L (*(volatile __near unsigned char *)0x112)
#define SS0L_bit (*(volatile __near __bitf_T *)0x112)
#define ST0 (*(volatile __near unsigned short *)0x114)
#define ST0L (*(volatile __near unsigned char *)0x114)
#define ST0L_bit (*(volatile __near __bitf_T *)0x114)
#define SPS0 (*(volatile __near unsigned short *)0x116)
#define SPS0L (*(volatile __near unsigned char *)0x116)
#define SO0 (*(volatile __near unsigned short *)0x118)
#define SOE0 (*(volatile __near unsigned short *)0x11A)
#define SOE0L (*(volatile __near unsigned char *)0x11A)
#define SOE0L_bit (*(volatile __near __bitf_T *)0x11A)
#define SOL0 (*(volatile __near unsigned short *)0x120)
#define SOL0L (*(volatile __near unsigned char *)0x120)
#define SSE0 (*(volatile __near unsigned short *)0x122)
#define SSE0L (*(volatile __near unsigned char *)0x122)
#define TCR00 (*(volatile __near unsigned short *)0x180)
#define TCR01 (*(volatile __near unsigned short *)0x182)
#define TCR02 (*(volatile __near unsigned short *)0x184)
#define TCR03 (*(volatile __near unsigned short *)0x186)
#define TCR04 (*(volatile __near unsigned short *)0x188)
#define TCR05 (*(volatile __near unsigned short *)0x18A)
#define TCR06 (*(volatile __near unsigned short *)0x18C)
#define TCR07 (*(volatile __near unsigned short *)0x18E)
#define TMR00 (*(volatile __near unsigned short *)0x190)
#define TMR01 (*(volatile __near unsigned short *)0x192)
#define TMR02 (*(volatile __near unsigned short *)0x194)
#define TMR03 (*(volatile __near unsigned short *)0x196)
#define TMR04 (*(volatile __near unsigned short *)0x198)
#define TMR05 (*(volatile __near unsigned short *)0x19A)
#define TMR06 (*(volatile __near unsigned short *)0x19C)
#define TMR07 (*(volatile __near unsigned short *)0x19E)
#define TSR00 (*(volatile __near unsigned short *)0x1A0)
#define TSR00L (*(volatile __near unsigned char *)0x1A0)
#define TSR01 (*(volatile __near unsigned short *)0x1A2)
#define TSR01L (*(volatile __near unsigned char *)0x1A2)
#define TSR02 (*(volatile __near unsigned short *)0x1A4)
#define TSR02L (*(volatile __near unsigned char *)0x1A4)
#define TSR03 (*(volatile __near unsigned short *)0x1A6)
#define TSR03L (*(volatile __near unsigned char *)0x1A6)
#define TSR04 (*(volatile __near unsigned short *)0x1A8)
#define TSR04L (*(volatile __near unsigned char *)0x1A8)
#define TSR05 (*(volatile __near unsigned short *)0x1AA)
#define TSR05L (*(volatile __near unsigned char *)0x1AA)
#define TSR06 (*(volatile __near unsigned short *)0x1AC)
#define TSR06L (*(volatile __near unsigned char *)0x1AC)
#define TSR07 (*(volatile __near unsigned short *)0x1AE)
#define TSR07L (*(volatile __near unsigned char *)0x1AE)
#define TE0 (*(volatile __near unsigned short *)0x1B0)
#define TE0L (*(volatile __near unsigned char *)0x1B0)
#define TE0L_bit (*(volatile __near __bitf_T *)0x1B0)
#define TS0 (*(volatile __near unsigned short *)0x1B2)
#define TS0L (*(volatile __near unsigned char *)0x1B2)
#define TS0L_bit (*(volatile __near __bitf_T *)0x1B2)
#define TT0 (*(volatile __near unsigned short *)0x1B4)
#define TT0L (*(volatile __near unsigned char *)0x1B4)
#define TT0L_bit (*(volatile __near __bitf_T *)0x1B4)
#define TPS0 (*(volatile __near unsigned short *)0x1B6)
#define TO0 (*(volatile __near unsigned short *)0x1B8)
#define TO0L (*(volatile __near unsigned char *)0x1B8)
#define TOE0 (*(volatile __near unsigned short *)0x1BA)
#define TOE0L (*(volatile __near unsigned char *)0x1BA)
#define TOE0L_bit (*(volatile __near __bitf_T *)0x1BA)
#define TOL0 (*(volatile __near unsigned short *)0x1BC)
#define TOL0L (*(volatile __near unsigned char *)0x1BC)
#define TOM0 (*(volatile __near unsigned short *)0x1BE)
#define TOM0L (*(volatile __near unsigned char *)0x1BE)
#define ERADR (*(volatile __near unsigned short *)0x200)
#define ECCIER (*(volatile __near unsigned char *)0x202)
#define ECCER (*(volatile __near unsigned char *)0x203)
#define ECCTPR (*(volatile __near unsigned char *)0x204)
#define ECCTMDR (*(volatile __near unsigned char *)0x205)
#define ECCDWRVR (*(volatile __near unsigned short *)0x206)
#define PSRSEL (*(volatile __near unsigned char *)0x220)
#define PSRSEL_bit (*(volatile __near __bitf_T *)0x220)
#define PSNZCNT0 (*(volatile __near unsigned char *)0x222)
#define PSNZCNT0_bit (*(volatile __near __bitf_T *)0x222)
#define PSNZCNT1 (*(volatile __near unsigned char *)0x223)
#define PSNZCNT1_bit (*(volatile __near __bitf_T *)0x223)
#define PSNZCNT2 (*(volatile __near unsigned char *)0x224)
#define PSNZCNT2_bit (*(volatile __near __bitf_T *)0x224)
#define PSNZCNT3 (*(volatile __near unsigned char *)0x225)
#define PSNZCNT3_bit (*(volatile __near __bitf_T *)0x225)
#define PWMDLY0 (*(volatile __near unsigned short *)0x228)
#define PWMDLY1 (*(volatile __near unsigned short *)0x22A)
#define TRJCR0 (*(volatile __near unsigned char *)0x240)
#define TRJIOC0 (*(volatile __near unsigned char *)0x241)
#define TRJIOC0_bit (*(volatile __near __bitf_T *)0x241)
#define TRJMR0 (*(volatile __near unsigned char *)0x242)
#define TRJMR0_bit (*(volatile __near __bitf_T *)0x242)
#define TRJISR0 (*(volatile __near unsigned char *)0x243)
#define TRJISR0_bit (*(volatile __near __bitf_T *)0x243)
#define TRDSTR (*(volatile __near unsigned char *)0x263)
#define TRDMR (*(volatile __near unsigned char *)0x264)
#define TRDMR_bit (*(volatile __near __bitf_T *)0x264)
#define TRDSYNC (((volatile __near __bitf_T *)0x264)->no0)
#define TRDBFC0 (((volatile __near __bitf_T *)0x264)->no4)
#define TRDBFD0 (((volatile __near __bitf_T *)0x264)->no5)
#define TRDBFC1 (((volatile __near __bitf_T *)0x264)->no6)
#define TRDBFD1 (((volatile __near __bitf_T *)0x264)->no7)
#define TRDPMR (*(volatile __near unsigned char *)0x265)
#define TRDPMR_bit (*(volatile __near __bitf_T *)0x265)
#define TRDPWMB0 (((volatile __near __bitf_T *)0x265)->no0)
#define TRDPWMC0 (((volatile __near __bitf_T *)0x265)->no1)
#define TRDPWMD0 (((volatile __near __bitf_T *)0x265)->no2)
#define TRDPWMB1 (((volatile __near __bitf_T *)0x265)->no4)
#define TRDPWMC1 (((volatile __near __bitf_T *)0x265)->no5)
#define TRDPWMD1 (((volatile __near __bitf_T *)0x265)->no6)
#define TRDFCR (*(volatile __near unsigned char *)0x266)
#define TRDFCR_bit (*(volatile __near __bitf_T *)0x266)
#define TRDOER1 (*(volatile __near unsigned char *)0x267)
#define TRDOER1_bit (*(volatile __near __bitf_T *)0x267)
#define TRDOER2 (*(volatile __near unsigned char *)0x268)
#define TRDOER2_bit (*(volatile __near __bitf_T *)0x268)
#define TRDSHUTS (((volatile __near __bitf_T *)0x268)->no0)
#define TRDPTO (((volatile __near __bitf_T *)0x268)->no7)
#define TRDOCR (*(volatile __near unsigned char *)0x269)
#define TRDOCR_bit (*(volatile __near __bitf_T *)0x269)
#define TRDDF0 (*(volatile __near unsigned char *)0x26A)
#define TRDDF0_bit (*(volatile __near __bitf_T *)0x26A)
#define TRDDF1 (*(volatile __near unsigned char *)0x26B)
#define TRDDF1_bit (*(volatile __near __bitf_T *)0x26B)
#define TRDCR0 (*(volatile __near unsigned char *)0x270)
#define TRDCR0_bit (*(volatile __near __bitf_T *)0x270)
#define TRDIORA0 (*(volatile __near unsigned char *)0x271)
#define TRDIORA0_bit (*(volatile __near __bitf_T *)0x271)
#define TRDIORC0 (*(volatile __near unsigned char *)0x272)
#define TRDIORC0_bit (*(volatile __near __bitf_T *)0x272)
#define TRDSR0 (*(volatile __near unsigned char *)0x273)
#define TRDSR0_bit (*(volatile __near __bitf_T *)0x273)
#define TRDIER0 (*(volatile __near unsigned char *)0x274)
#define TRDIER0_bit (*(volatile __near __bitf_T *)0x274)
#define TRDPOCR0 (*(volatile __near unsigned char *)0x275)
#define TRDPOCR0_bit (*(volatile __near __bitf_T *)0x275)
#define TRD0 (*(volatile __near unsigned short *)0x276)
#define TRDGRA0 (*(volatile __near unsigned short *)0x278)
#define TRDGRB0 (*(volatile __near unsigned short *)0x27A)
#define TRDCR1 (*(volatile __near unsigned char *)0x280)
#define TRDCR1_bit (*(volatile __near __bitf_T *)0x280)
#define TRDIORA1 (*(volatile __near unsigned char *)0x281)
#define TRDIORA1_bit (*(volatile __near __bitf_T *)0x281)
#define TRDIORC1 (*(volatile __near unsigned char *)0x282)
#define TRDIORC1_bit (*(volatile __near __bitf_T *)0x282)
#define TRDSR1 (*(volatile __near unsigned char *)0x283)
#define TRDSR1_bit (*(volatile __near __bitf_T *)0x283)
#define TRDIER1 (*(volatile __near unsigned char *)0x284)
#define TRDIER1_bit (*(volatile __near __bitf_T *)0x284)
#define TRDPOCR1 (*(volatile __near unsigned char *)0x285)
#define TRDPOCR1_bit (*(volatile __near __bitf_T *)0x285)
#define TRD1 (*(volatile __near unsigned short *)0x286)
#define TRDGRA1 (*(volatile __near unsigned short *)0x288)
#define TRDGRB1 (*(volatile __near unsigned short *)0x28A)
#define PER1 (*(volatile __near unsigned char *)0x2C0)
#define PER1_bit (*(volatile __near __bitf_T *)0x2C0)
#define TRJ0EN (((volatile __near __bitf_T *)0x2C0)->no0)
#define DTCEN (((volatile __near __bitf_T *)0x2C0)->no3)
#define TRD0EN (((volatile __near __bitf_T *)0x2C0)->no4)
#define PER2 (*(volatile __near unsigned char *)0x2C1)
#define PER2_bit (*(volatile __near __bitf_T *)0x2C1)
#define LIN0EN (((volatile __near __bitf_T *)0x2C1)->no2)
#define LINCKSEL (*(volatile __near unsigned char *)0x2C3)
#define LINCKSEL_bit (*(volatile __near __bitf_T *)0x2C3)
#define LIN0MCK (((volatile __near __bitf_T *)0x2C3)->no0)
#define LIN0MCKE (((volatile __near __bitf_T *)0x2C3)->no4)
#define CKSEL (*(volatile __near unsigned char *)0x2C4)
#define CKSEL_bit (*(volatile __near __bitf_T *)0x2C4)
#define SELLOSC (((volatile __near __bitf_T *)0x2C4)->no0)
#define TRD_CKSEL (((volatile __near __bitf_T *)0x2C4)->no2)
#define PLLCTL (*(volatile __near unsigned char *)0x2C5)
#define PLLCTL_bit (*(volatile __near __bitf_T *)0x2C5)
#define PLLON (((volatile __near __bitf_T *)0x2C5)->no0)
#define PLLMUL (((volatile __near __bitf_T *)0x2C5)->no1)
#define SELPLL (((volatile __near __bitf_T *)0x2C5)->no2)
#define PLLDIV0 (((volatile __near __bitf_T *)0x2C5)->no4)
#define PLLDIV1 (((volatile __near __bitf_T *)0x2C5)->no5)
#define LCKSEL0 (((volatile __near __bitf_T *)0x2C5)->no6)
#define LCKSEL1 (((volatile __near __bitf_T *)0x2C5)->no7)
#define PLLSTS (*(volatile __near unsigned char *)0x2C6)
#define PLLSTS_bit (*(volatile __near __bitf_T *)0x2C6)
#define SELPLLS (((volatile __near __bitf_T *)0x2C6)->no3)
#define LOCK (((volatile __near __bitf_T *)0x2C6)->no7)
#define MDIV (*(volatile __near unsigned char *)0x2C7)
#define RTCCL (*(volatile __near unsigned char *)0x2C8)
#define RTCCL_bit (*(volatile __near __bitf_T *)0x2C8)
#define POCRES (*(volatile __near unsigned char *)0x2C9)
#define POCRES_bit (*(volatile __near __bitf_T *)0x2C9)
#define POCRES0 (((volatile __near __bitf_T *)0x2C9)->no0)
#define CLKRF (((volatile __near __bitf_T *)0x2C9)->no4)
#define STPSTC (*(volatile __near unsigned char *)0x2CA)
#define STPSTC_bit (*(volatile __near __bitf_T *)0x2CA)
#define STPLV (((volatile __near __bitf_T *)0x2CA)->no4)
#define STPOEN (((volatile __near __bitf_T *)0x2CA)->no7)
#define HDTCCR0 (*(volatile __near unsigned char *)0x2D0)
#define HDTCCR0_bit (*(volatile __near __bitf_T *)0x2D0)
#define HMODE0 (((volatile __near __bitf_T *)0x2D0)->no0)
#define HRPTSEL0 (((volatile __near __bitf_T *)0x2D0)->no1)
#define HSAMOD0 (((volatile __near __bitf_T *)0x2D0)->no2)
#define HDAMOD0 (((volatile __near __bitf_T *)0x2D0)->no3)
#define HCHNE0 (((volatile __near __bitf_T *)0x2D0)->no4)
#define HRPTINT0 (((volatile __near __bitf_T *)0x2D0)->no5)
#define HSZ0 (((volatile __near __bitf_T *)0x2D0)->no6)
#define HDTCCT0 (*(volatile __near unsigned char *)0x2D2)
#define HDTCCT0_bit (*(volatile __near __bitf_T *)0x2D2)
#define HDTRLD0 (*(volatile __near unsigned char *)0x2D3)
#define HDTRLD0_bit (*(volatile __near __bitf_T *)0x2D3)
#define HDTSAR0 (*(volatile __near unsigned short *)0x2D4)
#define HDTDAR0 (*(volatile __near unsigned short *)0x2D6)
#define HDTCCR1 (*(volatile __near unsigned char *)0x2D8)
#define HDTCCR1_bit (*(volatile __near __bitf_T *)0x2D8)
#define HMODE1 (((volatile __near __bitf_T *)0x2D8)->no0)
#define HRPTSEL1 (((volatile __near __bitf_T *)0x2D8)->no1)
#define HSAMOD1 (((volatile __near __bitf_T *)0x2D8)->no2)
#define HDAMOD1 (((volatile __near __bitf_T *)0x2D8)->no3)
#define HCHNE1 (((volatile __near __bitf_T *)0x2D8)->no4)
#define HRPTINT1 (((volatile __near __bitf_T *)0x2D8)->no5)
#define HSZ1 (((volatile __near __bitf_T *)0x2D8)->no6)
#define HDTCCT1 (*(volatile __near unsigned char *)0x2DA)
#define HDTCCT1_bit (*(volatile __near __bitf_T *)0x2DA)
#define HDTRLD1 (*(volatile __near unsigned char *)0x2DB)
#define HDTRLD1_bit (*(volatile __near __bitf_T *)0x2DB)
#define HDTSAR1 (*(volatile __near unsigned short *)0x2DC)
#define HDTDAR1 (*(volatile __near unsigned short *)0x2DE)
#define DTCBAR (*(volatile __near unsigned char *)0x2E0)
#define SELHS0 (*(volatile __near unsigned char *)0x2E1)
#define SELHS0_bit (*(volatile __near __bitf_T *)0x2E1)
#define SELHS1 (*(volatile __near unsigned char *)0x2E2)
#define SELHS1_bit (*(volatile __near __bitf_T *)0x2E2)
#define DTCEN0 (*(volatile __near unsigned char *)0x2E8)
#define DTCEN0_bit (*(volatile __near __bitf_T *)0x2E8)
#define DTCEN00 (((volatile __near __bitf_T *)0x2E8)->no0)
#define DTCEN01 (((volatile __near __bitf_T *)0x2E8)->no1)
#define DTCEN02 (((volatile __near __bitf_T *)0x2E8)->no2)
#define DTCEN03 (((volatile __near __bitf_T *)0x2E8)->no3)
#define DTCEN04 (((volatile __near __bitf_T *)0x2E8)->no4)
#define DTCEN05 (((volatile __near __bitf_T *)0x2E8)->no5)
#define DTCEN06 (((volatile __near __bitf_T *)0x2E8)->no6)
#define DTCEN1 (*(volatile __near unsigned char *)0x2E9)
#define DTCEN1_bit (*(volatile __near __bitf_T *)0x2E9)
#define DTCEN10 (((volatile __near __bitf_T *)0x2E9)->no0)
#define DTCEN11 (((volatile __near __bitf_T *)0x2E9)->no1)
#define DTCEN14 (((volatile __near __bitf_T *)0x2E9)->no4)
#define DTCEN15 (((volatile __near __bitf_T *)0x2E9)->no5)
#define DTCEN16 (((volatile __near __bitf_T *)0x2E9)->no6)
#define DTCEN17 (((volatile __near __bitf_T *)0x2E9)->no7)
#define DTCEN2 (*(volatile __near unsigned char *)0x2EA)
#define DTCEN2_bit (*(volatile __near __bitf_T *)0x2EA)
#define DTCEN20 (((volatile __near __bitf_T *)0x2EA)->no0)
#define DTCEN21 (((volatile __near __bitf_T *)0x2EA)->no1)
#define DTCEN22 (((volatile __near __bitf_T *)0x2EA)->no2)
#define DTCEN23 (((volatile __near __bitf_T *)0x2EA)->no3)
#define DTCEN24 (((volatile __near __bitf_T *)0x2EA)->no4)
#define DTCEN25 (((volatile __near __bitf_T *)0x2EA)->no5)
#define DTCEN3 (*(volatile __near unsigned char *)0x2EB)
#define DTCEN3_bit (*(volatile __near __bitf_T *)0x2EB)
#define DTCEN30 (((volatile __near __bitf_T *)0x2EB)->no0)
#define DTCEN31 (((volatile __near __bitf_T *)0x2EB)->no1)
#define DTCEN32 (((volatile __near __bitf_T *)0x2EB)->no2)
#define DTCEN33 (((volatile __near __bitf_T *)0x2EB)->no3)
#define DTCEN34 (((volatile __near __bitf_T *)0x2EB)->no4)
#define DTCEN35 (((volatile __near __bitf_T *)0x2EB)->no5)
#define DTCEN36 (((volatile __near __bitf_T *)0x2EB)->no6)
#define DTCEN37 (((volatile __near __bitf_T *)0x2EB)->no7)
#define DTCEN4 (*(volatile __near unsigned char *)0x2EC)
#define DTCEN4_bit (*(volatile __near __bitf_T *)0x2EC)
#define DTCEN45 (((volatile __near __bitf_T *)0x2EC)->no5)
#define DTCEN46 (((volatile __near __bitf_T *)0x2EC)->no6)
#define DTCEN47 (((volatile __near __bitf_T *)0x2EC)->no7)
#define CRC0CTL (*(volatile __near unsigned char *)0x2F0)
#define CRC0CTL_bit (*(volatile __near __bitf_T *)0x2F0)
#define CRC0EN (((volatile __near __bitf_T *)0x2F0)->no7)
#define PGCRCL (*(volatile __near unsigned short *)0x2F2)
#define CRCMD (*(volatile __near unsigned char *)0x2F9)
#define CRCD (*(volatile __near unsigned short *)0x2FA)
#define LWBR0 (*(volatile __near unsigned char *)0x6C1)
#define LBRP0 (*(volatile __near unsigned short *)0x6C2)
#define LBRP00 (*(volatile __near unsigned char *)0x6C2)
#define LBRP01 (*(volatile __near unsigned char *)0x6C3)
#define LSTC0 (*(volatile __near unsigned char *)0x6C4)
#define LUSC0 (*(volatile __near unsigned char *)0x6C5)
#define LMD0 (*(volatile __near unsigned char *)0x6C8)
#define LBFC0 (*(volatile __near unsigned char *)0x6C9)
#define LSC0 (*(volatile __near unsigned char *)0x6CA)
#define LWUP0 (*(volatile __near unsigned char *)0x6CB)
#define LIE0 (*(volatile __near unsigned char *)0x6CC)
#define LEDE0 (*(volatile __near unsigned char *)0x6CD)
#define LCUC0 (*(volatile __near unsigned char *)0x6CE)
#define LTRC0 (*(volatile __near unsigned char *)0x6D0)
#define LMST0 (*(volatile __near unsigned char *)0x6D1)
#define LST0 (*(volatile __near unsigned char *)0x6D2)
#define LEST0 (*(volatile __near unsigned char *)0x6D3)
#define LDFC0 (*(volatile __near unsigned char *)0x6D4)
#define LIDB0 (*(volatile __near unsigned char *)0x6D5)
#define LCBR0 (*(volatile __near unsigned char *)0x6D6)
#define LUDB00 (*(volatile __near unsigned char *)0x6D7)
#define LDB01 (*(volatile __near unsigned char *)0x6D8)
#define LDB02 (*(volatile __near unsigned char *)0x6D9)
#define LDB03 (*(volatile __near unsigned char *)0x6DA)
#define LDB04 (*(volatile __near unsigned char *)0x6DB)
#define LDB05 (*(volatile __near unsigned char *)0x6DC)
#define LDB06 (*(volatile __near unsigned char *)0x6DD)
#define LDB07 (*(volatile __near unsigned char *)0x6DE)
#define LDB08 (*(volatile __near unsigned char *)0x6DF)
#define LUOER0 (*(volatile __near unsigned char *)0x6E0)
#define LUOR01 (*(volatile __near unsigned char *)0x6E1)
#define LUTDR0 (*(volatile __near unsigned short *)0x6E4)
#define LUTDR0L (*(volatile __near unsigned char *)0x6E4)
#define LUTDR0H (*(volatile __near unsigned char *)0x6E5)
#define LURDR0 (*(volatile __near unsigned short *)0x6E6)
#define LURDR0L (*(volatile __near unsigned char *)0x6E6)
#define LURDR0H (*(volatile __near unsigned char *)0x6E7)
#define LUWTDR0 (*(volatile __near unsigned short *)0x6E8)
#define LUWTDR0L (*(volatile __near unsigned char *)0x6E8)
#define LUWTDR0H (*(volatile __near unsigned char *)0x6E9)
#define TRJ0 (*(volatile __near unsigned short *)0x6F0)
#define ADTRGS0 (*(volatile __near unsigned char *)0x789)
#define ADTRGS0_bit (*(volatile __near __bitf_T *)0x789)
#define ADTRGS1 (*(volatile __near unsigned char *)0x78D)
#define ADTRGS1_bit (*(volatile __near __bitf_T *)0x78D)
#define P0 (*(volatile __near unsigned char *)0xFF00)
#define P0_bit (*(volatile __near __bitf_T *)0xFF00)
#define P1 (*(volatile __near unsigned char *)0xFF01)
#define P1_bit (*(volatile __near __bitf_T *)0xFF01)
#define P3 (*(volatile __near unsigned char *)0xFF03)
#define P3_bit (*(volatile __near __bitf_T *)0xFF03)
#define P4 (*(volatile __near unsigned char *)0xFF04)
#define P4_bit (*(volatile __near __bitf_T *)0xFF04)
#define P6 (*(volatile __near unsigned char *)0xFF06)
#define P6_bit (*(volatile __near __bitf_T *)0xFF06)
#define P7 (*(volatile __near unsigned char *)0xFF07)
#define P7_bit (*(volatile __near __bitf_T *)0xFF07)
#define P8 (*(volatile __near unsigned char *)0xFF08)
#define P8_bit (*(volatile __near __bitf_T *)0xFF08)
#define P9 (*(volatile __near unsigned char *)0xFF09)
#define P9_bit (*(volatile __near __bitf_T *)0xFF09)
#define P12 (*(volatile __near unsigned char *)0xFF0C)
#define P12_bit (*(volatile __near __bitf_T *)0xFF0C)
#define P13 (*(volatile __near unsigned char *)0xFF0D)
#define P13_bit (*(volatile __near __bitf_T *)0xFF0D)
#define P14 (*(volatile __near unsigned char *)0xFF0E)
#define P14_bit (*(volatile __near __bitf_T *)0xFF0E)
#define SDR00 (*(volatile __near unsigned short *)0xFF10)
#define SDR00L (*(volatile __near unsigned char *)0xFF10)
#define SDR01 (*(volatile __near unsigned short *)0xFF12)
#define SDR01L (*(volatile __near unsigned char *)0xFF12)
#define TDR00 (*(volatile __near unsigned short *)0xFF18)
#define TDR01 (*(volatile __near unsigned short *)0xFF1A)
#define TDR01L (*(volatile __near unsigned char *)0xFF1A)
#define TDR01H (*(volatile __near unsigned char *)0xFF1B)
#define ADCR (*(volatile __near unsigned short *)0xFF1E)
#define ADCRH (*(volatile __near unsigned char *)0xFF1F)
#define PM0 (*(volatile __near unsigned char *)0xFF20)
#define PM0_bit (*(volatile __near __bitf_T *)0xFF20)
#define PM1 (*(volatile __near unsigned char *)0xFF21)
#define PM1_bit (*(volatile __near __bitf_T *)0xFF21)
#define PM3 (*(volatile __near unsigned char *)0xFF23)
#define PM3_bit (*(volatile __near __bitf_T *)0xFF23)
#define PM4 (*(volatile __near unsigned char *)0xFF24)
#define PM4_bit (*(volatile __near __bitf_T *)0xFF24)
#define PM6 (*(volatile __near unsigned char *)0xFF26)
#define PM6_bit (*(volatile __near __bitf_T *)0xFF26)
#define PM7 (*(volatile __near unsigned char *)0xFF27)
#define PM7_bit (*(volatile __near __bitf_T *)0xFF27)
#define PM8 (*(volatile __near unsigned char *)0xFF28)
#define PM8_bit (*(volatile __near __bitf_T *)0xFF28)
#define PM9 (*(volatile __near unsigned char *)0xFF29)
#define PM9_bit (*(volatile __near __bitf_T *)0xFF29)
#define PM12 (*(volatile __near unsigned char *)0xFF2C)
#define PM12_bit (*(volatile __near __bitf_T *)0xFF2C)
#define PM14 (*(volatile __near unsigned char *)0xFF2E)
#define PM14_bit (*(volatile __near __bitf_T *)0xFF2E)
#define ADM0 (*(volatile __near unsigned char *)0xFF30)
#define ADM0_bit (*(volatile __near __bitf_T *)0xFF30)
#define ADCE (((volatile __near __bitf_T *)0xFF30)->no0)
#define ADCS (((volatile __near __bitf_T *)0xFF30)->no7)
#define ADS (*(volatile __near unsigned char *)0xFF31)
#define ADS_bit (*(volatile __near __bitf_T *)0xFF31)
#define ADM1 (*(volatile __near unsigned char *)0xFF32)
#define ADM1_bit (*(volatile __near __bitf_T *)0xFF32)
#define KRM (*(volatile __near unsigned char *)0xFF37)
#define KRM_bit (*(volatile __near __bitf_T *)0xFF37)
#define EGP0 (*(volatile __near unsigned char *)0xFF38)
#define EGP0_bit (*(volatile __near __bitf_T *)0xFF38)
#define EGN0 (*(volatile __near unsigned char *)0xFF39)
#define EGN0_bit (*(volatile __near __bitf_T *)0xFF39)
#define EGP1 (*(volatile __near unsigned char *)0xFF3A)
#define EGP1_bit (*(volatile __near __bitf_T *)0xFF3A)
#define EGN1 (*(volatile __near unsigned char *)0xFF3B)
#define EGN1_bit (*(volatile __near __bitf_T *)0xFF3B)
#define SUBCUDW (*(volatile __near unsigned short *)0xFF54)
#define TRDGRC0 (*(volatile __near unsigned short *)0xFF58)
#define TRDGRD0 (*(volatile __near unsigned short *)0xFF5A)
#define TRDGRC1 (*(volatile __near unsigned short *)0xFF5C)
#define TRDGRD1 (*(volatile __near unsigned short *)0xFF5E)
#define TDR02 (*(volatile __near unsigned short *)0xFF64)
#define TDR03 (*(volatile __near unsigned short *)0xFF66)
#define TDR03L (*(volatile __near unsigned char *)0xFF66)
#define TDR03H (*(volatile __near unsigned char *)0xFF67)
#define TDR04 (*(volatile __near unsigned short *)0xFF68)
#define TDR05 (*(volatile __near unsigned short *)0xFF6A)
#define TDR06 (*(volatile __near unsigned short *)0xFF6C)
#define TDR07 (*(volatile __near unsigned short *)0xFF6E)
#define SEC (*(volatile __near unsigned char *)0xFF92)
#define MIN (*(volatile __near unsigned char *)0xFF93)
#define HOUR (*(volatile __near unsigned char *)0xFF94)
#define WEEK (*(volatile __near unsigned char *)0xFF95)
#define DAY (*(volatile __near unsigned char *)0xFF96)
#define MONTH (*(volatile __near unsigned char *)0xFF97)
#define YEAR (*(volatile __near unsigned char *)0xFF98)
#define SUBCUD (*(volatile __near unsigned char *)0xFF99)
#define ALARMWM (*(volatile __near unsigned char *)0xFF9A)
#define ALARMWH (*(volatile __near unsigned char *)0xFF9B)
#define ALARMWW (*(volatile __near unsigned char *)0xFF9C)
#define RTCC0 (*(volatile __near unsigned char *)0xFF9D)
#define RTCC0_bit (*(volatile __near __bitf_T *)0xFF9D)
#define RCLOE1 (((volatile __near __bitf_T *)0xFF9D)->no5)
#define RTCE (((volatile __near __bitf_T *)0xFF9D)->no7)
#define RTCC1 (*(volatile __near unsigned char *)0xFF9E)
#define RTCC1_bit (*(volatile __near __bitf_T *)0xFF9E)
#define RWAIT (((volatile __near __bitf_T *)0xFF9E)->no0)
#define RWST (((volatile __near __bitf_T *)0xFF9E)->no1)
#define RIFG (((volatile __near __bitf_T *)0xFF9E)->no3)
#define WAFG (((volatile __near __bitf_T *)0xFF9E)->no4)
#define WALIE (((volatile __near __bitf_T *)0xFF9E)->no6)
#define WALE (((volatile __near __bitf_T *)0xFF9E)->no7)
#define CMC (*(volatile __near unsigned char *)0xFFA0)
#define CSC (*(volatile __near unsigned char *)0xFFA1)
#define CSC_bit (*(volatile __near __bitf_T *)0xFFA1)
#define HIOSTOP (((volatile __near __bitf_T *)0xFFA1)->no0)
#define XTSTOP (((volatile __near __bitf_T *)0xFFA1)->no6)
#define MSTOP (((volatile __near __bitf_T *)0xFFA1)->no7)
#define OSTC (*(volatile __near unsigned char *)0xFFA2)
#define OSTC_bit (*(volatile __near __bitf_T *)0xFFA2)
#define OSTS (*(volatile __near unsigned char *)0xFFA3)
#define CKC (*(volatile __near unsigned char *)0xFFA4)
#define CKC_bit (*(volatile __near __bitf_T *)0xFFA4)
#define MCM0 (((volatile __near __bitf_T *)0xFFA4)->no4)
#define MCS (((volatile __near __bitf_T *)0xFFA4)->no5)
#define CSS (((volatile __near __bitf_T *)0xFFA4)->no6)
#define CLS (((volatile __near __bitf_T *)0xFFA4)->no7)
#define CKS0 (*(volatile __near unsigned char *)0xFFA5)
#define CKS0_bit (*(volatile __near __bitf_T *)0xFFA5)
#define PCLOE0 (((volatile __near __bitf_T *)0xFFA5)->no7)
#define RESF (*(volatile __near unsigned char *)0xFFA8)
#define LVIM (*(volatile __near unsigned char *)0xFFA9)
#define LVIM_bit (*(volatile __near __bitf_T *)0xFFA9)
#define LVIF (((volatile __near __bitf_T *)0xFFA9)->no0)
#define LVIOMSK (((volatile __near __bitf_T *)0xFFA9)->no1)
#define LVISEN (((volatile __near __bitf_T *)0xFFA9)->no7)
#define LVIS (*(volatile __near unsigned char *)0xFFAA)
#define LVIS_bit (*(volatile __near __bitf_T *)0xFFAA)
#define LVILV (((volatile __near __bitf_T *)0xFFAA)->no0)
#define LVIMD (((volatile __near __bitf_T *)0xFFAA)->no7)
#define WDTE (*(volatile __near unsigned char *)0xFFAB)
#define CRCIN (*(volatile __near unsigned char *)0xFFAC)
#define IF2 (*(volatile __near unsigned short *)0xFFD0)
#define IF2L (*(volatile __near unsigned char *)0xFFD0)
#define IF2L_bit (*(volatile __near __bitf_T *)0xFFD0)
#define IF2H (*(volatile __near unsigned char *)0xFFD1)
#define IF2H_bit (*(volatile __near __bitf_T *)0xFFD1)
#define TMIF05 (((volatile __near __bitf_T *)0xFFD0)->no0)
#define TMIF06 (((volatile __near __bitf_T *)0xFFD0)->no1)
#define TMIF07 (((volatile __near __bitf_T *)0xFFD0)->no2)
#define LIN0WUPIF (((volatile __near __bitf_T *)0xFFD0)->no3)
#define KRIF (((volatile __near __bitf_T *)0xFFD0)->no4)
#define FLIF (((volatile __near __bitf_T *)0xFFD1)->no7)
#define MK2 (*(volatile __near unsigned short *)0xFFD4)
#define MK2L (*(volatile __near unsigned char *)0xFFD4)
#define MK2L_bit (*(volatile __near __bitf_T *)0xFFD4)
#define MK2H (*(volatile __near unsigned char *)0xFFD5)
#define MK2H_bit (*(volatile __near __bitf_T *)0xFFD5)
#define TMMK05 (((volatile __near __bitf_T *)0xFFD4)->no0)
#define TMMK06 (((volatile __near __bitf_T *)0xFFD4)->no1)
#define TMMK07 (((volatile __near __bitf_T *)0xFFD4)->no2)
#define LIN0WUPMK (((volatile __near __bitf_T *)0xFFD4)->no3)
#define KRMK (((volatile __near __bitf_T *)0xFFD4)->no4)
#define FLMK (((volatile __near __bitf_T *)0xFFD5)->no7)
#define PR02 (*(volatile __near unsigned short *)0xFFD8)
#define PR02L (*(volatile __near unsigned char *)0xFFD8)
#define PR02L_bit (*(volatile __near __bitf_T *)0xFFD8)
#define PR02H (*(volatile __near unsigned char *)0xFFD9)
#define PR02H_bit (*(volatile __near __bitf_T *)0xFFD9)
#define TMPR005 (((volatile __near __bitf_T *)0xFFD8)->no0)
#define TMPR006 (((volatile __near __bitf_T *)0xFFD8)->no1)
#define TMPR007 (((volatile __near __bitf_T *)0xFFD8)->no2)
#define LIN0WUPPR0 (((volatile __near __bitf_T *)0xFFD8)->no3)
#define KRPR0 (((volatile __near __bitf_T *)0xFFD8)->no4)
#define FLPR0 (((volatile __near __bitf_T *)0xFFD9)->no7)
#define PR12 (*(volatile __near unsigned short *)0xFFDC)
#define PR12L (*(volatile __near unsigned char *)0xFFDC)
#define PR12L_bit (*(volatile __near __bitf_T *)0xFFDC)
#define PR12H (*(volatile __near unsigned char *)0xFFDD)
#define PR12H_bit (*(volatile __near __bitf_T *)0xFFDD)
#define TMPR105 (((volatile __near __bitf_T *)0xFFDC)->no0)
#define TMPR106 (((volatile __near __bitf_T *)0xFFDC)->no1)
#define TMPR107 (((volatile __near __bitf_T *)0xFFDC)->no2)
#define LIN0WUPPR1 (((volatile __near __bitf_T *)0xFFDC)->no3)
#define KRPR1 (((volatile __near __bitf_T *)0xFFDC)->no4)
#define FLPR1 (((volatile __near __bitf_T *)0xFFDD)->no7)
#define IF0 (*(volatile __near unsigned short *)0xFFE0)
#define IF0L (*(volatile __near unsigned char *)0xFFE0)
#define IF0L_bit (*(volatile __near __bitf_T *)0xFFE0)
#define IF0H (*(volatile __near unsigned char *)0xFFE1)
#define IF0H_bit (*(volatile __near __bitf_T *)0xFFE1)
#define WDTIIF (((volatile __near __bitf_T *)0xFFE0)->no0)
#define LVIIF (((volatile __near __bitf_T *)0xFFE0)->no1)
#define PIF0 (((volatile __near __bitf_T *)0xFFE0)->no2)
#define PIF1 (((volatile __near __bitf_T *)0xFFE0)->no3)
#define PIF2 (((volatile __near __bitf_T *)0xFFE0)->no4)
#define PIF3 (((volatile __near __bitf_T *)0xFFE0)->no5)
#define PIF4 (((volatile __near __bitf_T *)0xFFE0)->no6)
#define SPMIF (((volatile __near __bitf_T *)0xFFE0)->no6)
#define PIF5 (((volatile __near __bitf_T *)0xFFE0)->no7)
#define CLMIF (((volatile __near __bitf_T *)0xFFE1)->no0)
#define CSIIF00 (((volatile __near __bitf_T *)0xFFE1)->no1)
#define IICIF00 (((volatile __near __bitf_T *)0xFFE1)->no1)
#define STIF0 (((volatile __near __bitf_T *)0xFFE1)->no1)
#define CSIIF01 (((volatile __near __bitf_T *)0xFFE1)->no2)
#define IICIF01 (((volatile __near __bitf_T *)0xFFE1)->no2)
#define SRIF0 (((volatile __near __bitf_T *)0xFFE1)->no2)
#define TRDIF0 (((volatile __near __bitf_T *)0xFFE1)->no3)
#define TRDIF1 (((volatile __near __bitf_T *)0xFFE1)->no4)
#define TRJIF0 (((volatile __near __bitf_T *)0xFFE1)->no5)
#define RAMIF (((volatile __near __bitf_T *)0xFFE1)->no6)
#define LIN0TRMIF (((volatile __near __bitf_T *)0xFFE1)->no7)
#define IF1 (*(volatile __near unsigned short *)0xFFE2)
#define IF1L (*(volatile __near unsigned char *)0xFFE2)
#define IF1L_bit (*(volatile __near __bitf_T *)0xFFE2)
#define IF1H (*(volatile __near unsigned char *)0xFFE3)
#define IF1H_bit (*(volatile __near __bitf_T *)0xFFE3)
#define LIN0RVCIF (((volatile __near __bitf_T *)0xFFE2)->no0)
#define LIN0IF (((volatile __near __bitf_T *)0xFFE2)->no1)
#define LIN0STAIF (((volatile __near __bitf_T *)0xFFE2)->no1)
#define RTCIF (((volatile __near __bitf_T *)0xFFE2)->no3)
#define TMIF00 (((volatile __near __bitf_T *)0xFFE2)->no4)
#define TMIF01 (((volatile __near __bitf_T *)0xFFE2)->no5)
#define TMIF02 (((volatile __near __bitf_T *)0xFFE2)->no6)
#define TMIF03 (((volatile __near __bitf_T *)0xFFE2)->no7)
#define ADIF (((volatile __near __bitf_T *)0xFFE3)->no0)
#define PIF6 (((volatile __near __bitf_T *)0xFFE3)->no1)
#define PIF7 (((volatile __near __bitf_T *)0xFFE3)->no2)
#define TMIF01H (((volatile __near __bitf_T *)0xFFE3)->no3)
#define TMIF03H (((volatile __near __bitf_T *)0xFFE3)->no4)
#define TMIF04 (((volatile __near __bitf_T *)0xFFE3)->no7)
#define MK0 (*(volatile __near unsigned short *)0xFFE4)
#define MK0L (*(volatile __near unsigned char *)0xFFE4)
#define MK0L_bit (*(volatile __near __bitf_T *)0xFFE4)
#define MK0H (*(volatile __near unsigned char *)0xFFE5)
#define MK0H_bit (*(volatile __near __bitf_T *)0xFFE5)
#define WDTIMK (((volatile __near __bitf_T *)0xFFE4)->no0)
#define LVIMK (((volatile __near __bitf_T *)0xFFE4)->no1)
#define PMK0 (((volatile __near __bitf_T *)0xFFE4)->no2)
#define PMK1 (((volatile __near __bitf_T *)0xFFE4)->no3)
#define PMK2 (((volatile __near __bitf_T *)0xFFE4)->no4)
#define PMK3 (((volatile __near __bitf_T *)0xFFE4)->no5)
#define PMK4 (((volatile __near __bitf_T *)0xFFE4)->no6)
#define SPMMK (((volatile __near __bitf_T *)0xFFE4)->no6)
#define PMK5 (((volatile __near __bitf_T *)0xFFE4)->no7)
#define CLMMK (((volatile __near __bitf_T *)0xFFE5)->no0)
#define CSIMK00 (((volatile __near __bitf_T *)0xFFE5)->no1)
#define IICMK00 (((volatile __near __bitf_T *)0xFFE5)->no1)
#define STMK0 (((volatile __near __bitf_T *)0xFFE5)->no1)
#define CSIMK01 (((volatile __near __bitf_T *)0xFFE5)->no2)
#define IICMK01 (((volatile __near __bitf_T *)0xFFE5)->no2)
#define SRMK0 (((volatile __near __bitf_T *)0xFFE5)->no2)
#define TRDMK0 (((volatile __near __bitf_T *)0xFFE5)->no3)
#define TRDMK1 (((volatile __near __bitf_T *)0xFFE5)->no4)
#define TRJMK0 (((volatile __near __bitf_T *)0xFFE5)->no5)
#define RAMMK (((volatile __near __bitf_T *)0xFFE5)->no6)
#define LIN0TRMMK (((volatile __near __bitf_T *)0xFFE5)->no7)
#define MK1 (*(volatile __near unsigned short *)0xFFE6)
#define MK1L (*(volatile __near unsigned char *)0xFFE6)
#define MK1L_bit (*(volatile __near __bitf_T *)0xFFE6)
#define MK1H (*(volatile __near unsigned char *)0xFFE7)
#define MK1H_bit (*(volatile __near __bitf_T *)0xFFE7)
#define LIN0RVCMK (((volatile __near __bitf_T *)0xFFE6)->no0)
#define LIN0MK (((volatile __near __bitf_T *)0xFFE6)->no1)
#define LIN0STAMK (((volatile __near __bitf_T *)0xFFE6)->no1)
#define RTCMK (((volatile __near __bitf_T *)0xFFE6)->no3)
#define TMMK00 (((volatile __near __bitf_T *)0xFFE6)->no4)
#define TMMK01 (((volatile __near __bitf_T *)0xFFE6)->no5)
#define TMMK02 (((volatile __near __bitf_T *)0xFFE6)->no6)
#define TMMK03 (((volatile __near __bitf_T *)0xFFE6)->no7)
#define ADMK (((volatile __near __bitf_T *)0xFFE7)->no0)
#define PMK6 (((volatile __near __bitf_T *)0xFFE7)->no1)
#define PMK7 (((volatile __near __bitf_T *)0xFFE7)->no2)
#define TMMK01H (((volatile __near __bitf_T *)0xFFE7)->no3)
#define TMMK03H (((volatile __near __bitf_T *)0xFFE7)->no4)
#define TMMK04 (((volatile __near __bitf_T *)0xFFE7)->no7)
#define PR00 (*(volatile __near unsigned short *)0xFFE8)
#define PR00L (*(volatile __near unsigned char *)0xFFE8)
#define PR00L_bit (*(volatile __near __bitf_T *)0xFFE8)
#define PR00H (*(volatile __near unsigned char *)0xFFE9)
#define PR00H_bit (*(volatile __near __bitf_T *)0xFFE9)
#define WDTIPR0 (((volatile __near __bitf_T *)0xFFE8)->no0)
#define LVIPR0 (((volatile __near __bitf_T *)0xFFE8)->no1)
#define PPR00 (((volatile __near __bitf_T *)0xFFE8)->no2)
#define PPR01 (((volatile __near __bitf_T *)0xFFE8)->no3)
#define PPR02 (((volatile __near __bitf_T *)0xFFE8)->no4)
#define PPR03 (((volatile __near __bitf_T *)0xFFE8)->no5)
#define PPR04 (((volatile __near __bitf_T *)0xFFE8)->no6)
#define SPMPR0 (((volatile __near __bitf_T *)0xFFE8)->no6)
#define PPR05 (((volatile __near __bitf_T *)0xFFE8)->no7)
#define CLMPR0 (((volatile __near __bitf_T *)0xFFE9)->no0)
#define CSIPR000 (((volatile __near __bitf_T *)0xFFE9)->no1)
#define IICPR000 (((volatile __near __bitf_T *)0xFFE9)->no1)
#define STPR00 (((volatile __near __bitf_T *)0xFFE9)->no1)
#define CSIPR001 (((volatile __near __bitf_T *)0xFFE9)->no2)
#define IICPR001 (((volatile __near __bitf_T *)0xFFE9)->no2)
#define SRPR00 (((volatile __near __bitf_T *)0xFFE9)->no2)
#define TRDPR00 (((volatile __near __bitf_T *)0xFFE9)->no3)
#define TRDPR01 (((volatile __near __bitf_T *)0xFFE9)->no4)
#define TRJPR00 (((volatile __near __bitf_T *)0xFFE9)->no5)
#define RAMPR0 (((volatile __near __bitf_T *)0xFFE9)->no6)
#define LIN0TRMPR0 (((volatile __near __bitf_T *)0xFFE9)->no7)
#define PR01 (*(volatile __near unsigned short *)0xFFEA)
#define PR01L (*(volatile __near unsigned char *)0xFFEA)
#define PR01L_bit (*(volatile __near __bitf_T *)0xFFEA)
#define PR01H (*(volatile __near unsigned char *)0xFFEB)
#define PR01H_bit (*(volatile __near __bitf_T *)0xFFEB)
#define LIN0RVCPR0 (((volatile __near __bitf_T *)0xFFEA)->no0)
#define LIN0PR0 (((volatile __near __bitf_T *)0xFFEA)->no1)
#define LIN0STAPR0 (((volatile __near __bitf_T *)0xFFEA)->no1)
#define RTCPR0 (((volatile __near __bitf_T *)0xFFEA)->no3)
#define TMPR000 (((volatile __near __bitf_T *)0xFFEA)->no4)
#define TMPR001 (((volatile __near __bitf_T *)0xFFEA)->no5)
#define TMPR002 (((volatile __near __bitf_T *)0xFFEA)->no6)
#define TMPR003 (((volatile __near __bitf_T *)0xFFEA)->no7)
#define ADPR0 (((volatile __near __bitf_T *)0xFFEB)->no0)
#define PPR06 (((volatile __near __bitf_T *)0xFFEB)->no1)
#define PPR07 (((volatile __near __bitf_T *)0xFFEB)->no2)
#define TMPR001H (((volatile __near __bitf_T *)0xFFEB)->no3)
#define TMPR003H (((volatile __near __bitf_T *)0xFFEB)->no4)
#define TMPR004 (((volatile __near __bitf_T *)0xFFEB)->no7)
#define PR10 (*(volatile __near unsigned short *)0xFFEC)
#define PR10L (*(volatile __near unsigned char *)0xFFEC)
#define PR10L_bit (*(volatile __near __bitf_T *)0xFFEC)
#define PR10H (*(volatile __near unsigned char *)0xFFED)
#define PR10H_bit (*(volatile __near __bitf_T *)0xFFED)
#define WDTIPR1 (((volatile __near __bitf_T *)0xFFEC)->no0)
#define LVIPR1 (((volatile __near __bitf_T *)0xFFEC)->no1)
#define PPR10 (((volatile __near __bitf_T *)0xFFEC)->no2)
#define PPR11 (((volatile __near __bitf_T *)0xFFEC)->no3)
#define PPR12 (((volatile __near __bitf_T *)0xFFEC)->no4)
#define PPR13 (((volatile __near __bitf_T *)0xFFEC)->no5)
#define PPR14 (((volatile __near __bitf_T *)0xFFEC)->no6)
#define SPMPR1 (((volatile __near __bitf_T *)0xFFEC)->no6)
#define PPR15 (((volatile __near __bitf_T *)0xFFEC)->no7)
#define CLMPR1 (((volatile __near __bitf_T *)0xFFED)->no0)
#define CSIPR100 (((volatile __near __bitf_T *)0xFFED)->no1)
#define IICPR100 (((volatile __near __bitf_T *)0xFFED)->no1)
#define STPR10 (((volatile __near __bitf_T *)0xFFED)->no1)
#define CSIPR101 (((volatile __near __bitf_T *)0xFFED)->no2)
#define IICPR101 (((volatile __near __bitf_T *)0xFFED)->no2)
#define SRPR10 (((volatile __near __bitf_T *)0xFFED)->no2)
#define TRDPR10 (((volatile __near __bitf_T *)0xFFED)->no3)
#define TRDPR11 (((volatile __near __bitf_T *)0xFFED)->no4)
#define TRJPR10 (((volatile __near __bitf_T *)0xFFED)->no5)
#define RAMPR1 (((volatile __near __bitf_T *)0xFFED)->no6)
#define LIN0TRMPR1 (((volatile __near __bitf_T *)0xFFED)->no7)
#define PR11 (*(volatile __near unsigned short *)0xFFEE)
#define PR11L (*(volatile __near unsigned char *)0xFFEE)
#define PR11L_bit (*(volatile __near __bitf_T *)0xFFEE)
#define PR11H (*(volatile __near unsigned char *)0xFFEF)
#define PR11H_bit (*(volatile __near __bitf_T *)0xFFEF)
#define LIN0RVCPR1 (((volatile __near __bitf_T *)0xFFEE)->no0)
#define LIN0PR1 (((volatile __near __bitf_T *)0xFFEE)->no1)
#define LIN0STAPR1 (((volatile __near __bitf_T *)0xFFEE)->no1)
#define RTCPR1 (((volatile __near __bitf_T *)0xFFEE)->no3)
#define TMPR100 (((volatile __near __bitf_T *)0xFFEE)->no4)
#define TMPR101 (((volatile __near __bitf_T *)0xFFEE)->no5)
#define TMPR102 (((volatile __near __bitf_T *)0xFFEE)->no6)
#define TMPR103 (((volatile __near __bitf_T *)0xFFEE)->no7)
#define ADPR1 (((volatile __near __bitf_T *)0xFFEF)->no0)
#define PPR16 (((volatile __near __bitf_T *)0xFFEF)->no1)
#define PPR17 (((volatile __near __bitf_T *)0xFFEF)->no2)
#define TMPR101H (((volatile __near __bitf_T *)0xFFEF)->no3)
#define TMPR103H (((volatile __near __bitf_T *)0xFFEF)->no4)
#define TMPR104 (((volatile __near __bitf_T *)0xFFEF)->no7)
#define MACRL (*(volatile __near unsigned short *)0xFFF0)
#define MACRH (*(volatile __near unsigned short *)0xFFF2)
#define PMC (*(volatile __near unsigned char *)0xFFFE)
#define PMC_bit (*(volatile __near __bitf_T *)0xFFFE)
#define MAA (((volatile __near __bitf_T *)0xFFFE)->no0)
#define INTSRO 0x0004
#define INTWDTI 0x0004
#define INTLVI 0x0006
#define INTP0 0x0008
#define INTP1 0x000A
#define INTP2 0x000C
#define INTP3 0x000E
#define INTP4 0x0010
#define INTSPM 0x0010
#define INTP5 0x0012
#define INTCLM 0x0014
#define INTCSI00 0x0016
#define INTIIC00 0x0016
#define INTST0 0x0016
#define INTCSI01 0x0018
#define INTIIC01 0x0018
#define INTSR0 0x0018
#define INTTRD0 0x001A
#define INTTRD1 0x001C
#define INTTRJ0 0x001E
#define INTRAM 0x0020
#define INTLIN0TRM 0x0022
#define INTLIN0RVC 0x0024
#define INTLIN0 0x0026
#define INTLIN0STA 0x0026
#define INTRTC 0x002A
#define INTTM00 0x002C
#define INTTM01 0x002E
#define INTTM02 0x0030
#define INTTM03 0x0032
#define INTAD 0x0034
#define INTP6 0x0036
#define INTP7 0x0038
#define INTTM01H 0x003A
#define INTTM03H 0x003C
#define INTTM04 0x0042
#define INTTM05 0x0044
#define INTTM06 0x0046
#define INTTM07 0x0048
#define INTLIN0WUP 0x004A
#define INTKR 0x004C
#define INTFL 0x0062
#endif

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/**********************************************************************************************************************
* DISCLAIMER
* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No
* other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
* applicable laws, including copyright laws.
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM
* EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES
* SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO
* THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of
* this software. By using this software, you agree to the additional terms and conditions found by accessing the
* following link:
* http://www.renesas.com/disclaimer
*
* Copyright (C) 2020 Renesas Electronics Corporation. All rights reserved.
*********************************************************************************************************************/
/***********************************************************************/
/* */
/* FILE :Main.c */
/* DATE : */
/* DESCRIPTION :Main Program */
/* CPU TYPE : */
/* */
/* NOTE:THIS IS A TYPICAL EXAMPLE. */
/* */
/***********************************************************************/
void main(void);
void main(void)
{
}

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/***********************************************************************************************************************
* DISCLAIMER
* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
* applicable laws, including copyright laws.
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
* of this software. By using this software, you agree to the additional terms and conditions found by accessing the
* following link:
* http://www.renesas.com/disclaimer
*
* Copyright (C) 2012, 2021 Renesas Electronics Corporation. All rights reserved.
***********************************************************************************************************************/
/***********************************************************************************************************************
* File Name : r_cg_adc.c
* Version : CodeGenerator for RL78/F13 V2.03.07.02 [08 Nov 2021]
* Device(s) : R5F10AGC
* Tool-Chain : CCRL
* Description : This file implements device driver for ADC module.
* Creation Date: 2023-11-14
***********************************************************************************************************************/
/***********************************************************************************************************************
Includes
***********************************************************************************************************************/
#include "r_cg_macrodriver.h"
#include "r_cg_adc.h"
/* Start user code for include. Do not edit comment generated here */
/* End user code. Do not edit comment generated here */
#include "r_cg_userdefine.h"
/***********************************************************************************************************************
Pragma directive
***********************************************************************************************************************/
/* Start user code for pragma. Do not edit comment generated here */
/* End user code. Do not edit comment generated here */
/***********************************************************************************************************************
Global variables and functions
***********************************************************************************************************************/
/* Start user code for global. Do not edit comment generated here */
/* End user code. Do not edit comment generated here */
/***********************************************************************************************************************
* Function Name: R_ADC_Create
* Description : This function initializes the AD converter.
* Arguments : None
* Return Value : None
***********************************************************************************************************************/
void R_ADC_Create(void)
{
ADCEN = 1U; /* supply AD clock */
ADM0 = _00_AD_ADM0_INITIALVALUE; /* disable AD conversion and clear ADM0 register */
ADMK = 1U; /* disable INTAD interrupt */
ADIF = 0U; /* clear INTAD interrupt flag */
/* Set INTAD low priority */
ADPR1 = 1U;
ADPR0 = 1U;
/* The reset status of ADPC is analog input, so it's unnecessary to set. */
/* Set ANI0 - ANI3 pin as analog input */
PM8 |= 0x03U;
PM3 |= 0x18U;
ADM0 = _00_AD_CONVERSION_CLOCK_64 | _00_AD_TIME_MODE_NORMAL_1 | _00_AD_OPERMODE_SELECT;
ADM1 = _80_AD_TRIGGER_HARDWARE_NOWAIT | _20_AD_CONVMODE_ONESELECT | _01_AD_TRIGGER_TIMER;
ADM2 = _00_AD_POSITIVE_VDD | _00_AD_NEGATIVE_VSS | _00_AD_AREA_MODE_1 | _00_AD_RESOLUTION_10BIT;
ADTRGS1 = _01_AD_TRIGGER_INTTRJ0;
ADUL = _FF_AD_ADUL_VALUE;
ADLL = _00_AD_ADLL_VALUE;
ADS = _00_AD_INPUT_CHANNEL_0;
ADCE = 1U; /* enable AD comparator */
}
/***********************************************************************************************************************
* Function Name: R_ADC_Start
* Description : This function starts the AD converter.
* Arguments : None
* Return Value : None
***********************************************************************************************************************/
void R_ADC_Start(void)
{
ADIF = 0U; /* clear INTAD interrupt flag */
ADMK = 0U; /* enable INTAD interrupt */
ADCS = 1U; /* enable AD conversion */
}
/***********************************************************************************************************************
* Function Name: R_ADC_Stop
* Description : This function stops the AD converter.
* Arguments : None
* Return Value : None
***********************************************************************************************************************/
void R_ADC_Stop(void)
{
ADCS = 0U; /* disable AD conversion */
ADMK = 1U; /* disable INTAD interrupt */
ADIF = 0U; /* clear INTAD interrupt flag */
}
/***********************************************************************************************************************
* Function Name: R_ADC_Set_OperationOn
* Description : This function enables comparator operation.
* Arguments : None
* Return Value : None
***********************************************************************************************************************/
void R_ADC_Set_OperationOn(void)
{
ADCE = 1U; /* enable AD comparator */
}
/***********************************************************************************************************************
* Function Name: R_ADC_Set_OperationOff
* Description : This function stops comparator operation.
* Arguments : None
* Return Value : None
***********************************************************************************************************************/
void R_ADC_Set_OperationOff(void)
{
ADCE = 0U; /* disable AD comparator */
}
/***********************************************************************************************************************
* Function Name: R_ADC_Get_Result
* Description : This function returns the conversion result in the buffer.
* Arguments : buffer -
* the address where to write the conversion result
* Return Value : None
***********************************************************************************************************************/
void R_ADC_Get_Result(uint16_t * const buffer)
{
*buffer = (uint16_t)(ADCR >> 6U);
}
/* Start user code for adding. Do not edit comment generated here */
/* End user code. Do not edit comment generated here */

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/***********************************************************************************************************************
* DISCLAIMER
* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
* applicable laws, including copyright laws.
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
* of this software. By using this software, you agree to the additional terms and conditions found by accessing the
* following link:
* http://www.renesas.com/disclaimer
*
* Copyright (C) 2012, 2021 Renesas Electronics Corporation. All rights reserved.
***********************************************************************************************************************/
/***********************************************************************************************************************
* File Name : r_cg_adc.h
* Version : CodeGenerator for RL78/F13 V2.03.07.02 [08 Nov 2021]
* Device(s) : R5F10AGC
* Tool-Chain : CCRL
* Description : This file implements device driver for ADC module.
* Creation Date: 2023-11-14
***********************************************************************************************************************/
#ifndef ADC_H
#define ADC_H
/***********************************************************************************************************************
Macro definitions (Register bit)
***********************************************************************************************************************/
/*
Peripheral enable register 0 (PER0)
*/
/* Control of AD converter input clock (ADCEN) */
#define _00_AD_CLOCK_STOP (0x00U) /* stop supply of input clock */
#define _20_AD_CLOCK_SUPPLY (0x20U) /* supply input clock */
/*
AD converter mode register 0 (ADM0)
*/
#define _00_AD_ADM0_INITIALVALUE (0x00U)
/* AD conversion operation control (ADCS) */
#define _80_AD_CONVERSION_ENABLE (0x80U) /* enable AD conversion operation control */
#define _00_AD_CONVERSION_DISABLE (0x00U) /* disable AD conversion operation control */
/* Specification of AD conversion operation mode (ADMD) */
#define _00_AD_OPERMODE_SELECT (0x00U) /* select operation mode */
#define _40_AD_OPERMODE_SCAN (0x40U) /* scan operation mode */
/* AD conversion clock selection (FR2 - FR0) */
#define _00_AD_CONVERSION_CLOCK_64 (0x00U) /* fCLK/64 */
#define _08_AD_CONVERSION_CLOCK_32 (0x08U) /* fCLK/32 */
#define _10_AD_CONVERSION_CLOCK_16 (0x10U) /* fCLK/16 */
#define _18_AD_CONVERSION_CLOCK_8 (0x18U) /* fCLK/8 */
#define _20_AD_CONVERSION_CLOCK_6 (0x20U) /* fCLK/6 */
#define _28_AD_CONVERSION_CLOCK_5 (0x28U) /* fCLK/5 */
#define _30_AD_CONVERSION_CLOCK_4 (0x30U) /* fCLK/4 */
#define _38_AD_CONVERSION_CLOCK_2 (0x38U) /* fCLK/2 */
/* Specification AD conversion time mode (LV1, LV0) */
#define _00_AD_TIME_MODE_NORMAL_1 (0x00U) /* normal 1 mode */
#define _02_AD_TIME_MODE_NORMAL_2 (0x02U) /* normal 2 mode */
/* AD comparator operation control (ADCE) */
#define _01_AD_COMPARATOR_ENABLE (0x01U) /* enable comparator operation control */
#define _00_AD_COMPARATOR_DISABLE (0x00U) /* disable comparator operation control */
/*
Analog input channel specification register (ADS)
*/
/* Specification of analog input channel (ADISS, ADS4 - ADS0) */
/* Select mode */
#define _00_AD_INPUT_CHANNEL_0 (0x00U) /* ANI0 */
#define _01_AD_INPUT_CHANNEL_1 (0x01U) /* ANI1 */
#define _02_AD_INPUT_CHANNEL_2 (0x02U) /* ANI2 */
#define _03_AD_INPUT_CHANNEL_3 (0x03U) /* ANI3 */
#define _04_AD_INPUT_CHANNEL_4 (0x04U) /* ANI4 */
#define _05_AD_INPUT_CHANNEL_5 (0x05U) /* ANI5 */
#define _06_AD_INPUT_CHANNEL_6 (0x06U) /* ANI6 */
#define _07_AD_INPUT_CHANNEL_7 (0x07U) /* ANI7 */
#define _08_AD_INPUT_CHANNEL_8 (0x08U) /* ANI8 */
#define _09_AD_INPUT_CHANNEL_9 (0x09U) /* ANI9 */
#define _0A_AD_INPUT_CHANNEL_10 (0x0AU) /* ANI10 */
#define _0B_AD_INPUT_CHANNEL_11 (0x0BU) /* ANI11 */
#define _80_AD_INPUT_TEMPERSENSOR_0 (0x80U) /* temperature sensor 0 output is used to be the input channel */
#define _81_AD_INPUT_INTERREFVOLT (0x81U) /* internal reference voltage output is used to be the input channel */
/* Scan mode */
#define _00_AD_INPUT_CHANNEL_0_3 (0x00U) /* ANI0 - ANI3 */
#define _01_AD_INPUT_CHANNEL_1_4 (0x01U) /* ANI1 - ANI4 */
#define _02_AD_INPUT_CHANNEL_2_5 (0x02U) /* ANI2 - ANI5 */
#define _03_AD_INPUT_CHANNEL_3_6 (0x03U) /* ANI3 - ANI6 */
#define _04_AD_INPUT_CHANNEL_4_7 (0x04U) /* ANI4 - ANI7 */
#define _05_AD_INPUT_CHANNEL_5_8 (0x05U) /* ANI5 - ANI8 */
#define _06_AD_INPUT_CHANNEL_6_9 (0x06U) /* ANI6 - ANI9 */
#define _07_AD_INPUT_CHANNEL_7_10 (0x07U) /* ANI7 - ANI10 */
#define _08_AD_INPUT_CHANNEL_8_11 (0x08U) /* ANI8 - ANI11 */
/*
AD converter mode register 1 (ADM1)
*/
/* AD trigger mode selection (ADTMD1, ADTMD0) */
#define _00_AD_TRIGGER_SOFTWARE (0x00U) /* software trigger mode */
#define _80_AD_TRIGGER_HARDWARE_NOWAIT (0x80U) /* hardware trigger mode (no wait) */
#define _C0_AD_TRIGGER_HARDWARE_WAIT (0xC0U) /* hardware trigger mode (wait) */
/* AD convertion mode selection (ADSCM) */
#define _00_AD_CONVMODE_CONSELECT (0x00U) /* continuous convertion mode */
#define _20_AD_CONVMODE_ONESELECT (0x20U) /* oneshot convertion mode */
/* Trigger signal selection (ADTRS1, ADTRS0) */
#define _00_AD_TRIGGER_INTTM01 (0x00U) /* INTTM01 */
#define _01_AD_TRIGGER_ELC (0x01U) /* ELC */
#define _01_AD_TRIGGER_TIMER (0x01U) /* INTTRD0,INTTRJ0 */
#define _02_AD_TRIGGER_INTRTC (0x02U) /* INTRTC */
/*
AD converter mode register 2 (ADM2)
*/
/* AD VREF(+) selection (ADREFP1, ADREFP0) */
#define _00_AD_POSITIVE_VDD (0x00U) /* use VDD as VREF(+) */
#define _40_AD_POSITIVE_AVREFP (0x40U) /* use AVREFP as VREF(+) */
#define _80_AD_POSITIVE_INTERVOLT (0x80U) /* use internal voltage as VREF(+) */
/* AD VREF(-) selection (ADREFM) */
#define _00_AD_NEGATIVE_VSS (0x00U) /* use VSS as VREF(-) */
#define _20_AD_NEGATIVE_AVREFM (0x20U) /* use AVREFM as VREF(-) */
/* AD conversion result upper/lower bound value selection (ADRCK) */
#define _00_AD_AREA_MODE_1 (0x00U) /* generates INTAD when ADLL <= ADCRH <= ADUL */
#define _08_AD_AREA_MODE_2_3 (0x08U) /* generates INTAD when ADUL < ADCRH or ADLL > ADCRH */
/* AD wakeup function selection (AWC) */
#define _00_AD_WAKEUP_OFF (0x00U) /* stop wakeup function */
#define _04_AD_WAKEUP_ON (0x04U) /* use wakeup function */
/* AD resolution selection (ADTYP) */
#define _00_AD_RESOLUTION_10BIT (0x00U) /* 10 bits */
#define _01_AD_RESOLUTION_8BIT (0x01U) /* 8 bits */
/*
AD test function register (ADTES)
*/
/* AD test mode signal (ADTES2 - ADTES0) */
#define _00_AD_NORMAL_INPUT (0x00U) /* normal mode */
#define _02_AD_TEST_AVREFM (0x02U) /* use AVREFM as test signal */
#define _03_AD_TEST_AVREFP (0x03U) /* use AVREFP as test signal */
/*
Format of A/D Converter Trigger Select Register 0 (ADTRGS0)(F13 only)
*/
/* Selection of the operation trigger of the A/D converter when the timer RD0 input capture B/compare match B
interrupt request is generated (ADTRGS00) */
#define _01_AD_TRIGGER_INTTRD0 (0x01U) /* A/D conversion is started when the interrupt request is generated */
/*
Format of A/D Converter Trigger Select Register 1 (ADTRGS1)(F13 only)
*/
/* Selection of the operation trigger of the A/D converter when the timer RJ0 interrupt request is generated (ADTRGS10) */
#define _01_AD_TRIGGER_INTTRJ0 (0x01U) /* A/D conversion is started when the interrupt request is generated */
/***********************************************************************************************************************
Macro definitions
***********************************************************************************************************************/
/* Upper bound (ADUL) value */
#define _FF_AD_ADUL_VALUE (0xFFU)
/* Upper bound (ADLL) value */
#define _00_AD_ADLL_VALUE (0x00U)
/***********************************************************************************************************************
Typedef definitions
***********************************************************************************************************************/
typedef enum
{
ADCHANNEL0, ADCHANNEL1, ADCHANNEL2, ADCHANNEL3, ADCHANNEL4, ADCHANNEL5, ADCHANNEL6,
ADCHANNEL7, ADCHANNEL8, ADCHANNEL9, ADCHANNEL10, ADCHANNEL11, ADTEMPERSENSOR0 = 128U,
ADINTERREFVOLT
} ad_channel_t;
typedef enum
{
ADNORMALINPUT,
ADAVREFM = 2U,
ADAVREFP
} test_channel_t;
/***********************************************************************************************************************
Global functions
***********************************************************************************************************************/
void R_ADC_Create(void);
void R_ADC_Start(void);
void R_ADC_Stop(void);
void R_ADC_Set_OperationOn(void);
void R_ADC_Set_OperationOff(void);
void R_ADC_Get_Result(uint16_t * const buffer);
/* Start user code for function. Do not edit comment generated here */
/* End user code. Do not edit comment generated here */
#endif

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/***********************************************************************************************************************
* DISCLAIMER
* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
* applicable laws, including copyright laws.
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
* of this software. By using this software, you agree to the additional terms and conditions found by accessing the
* following link:
* http://www.renesas.com/disclaimer
*
* Copyright (C) 2012, 2021 Renesas Electronics Corporation. All rights reserved.
***********************************************************************************************************************/
/***********************************************************************************************************************
* File Name : r_cg_adc_user.c
* Version : CodeGenerator for RL78/F13 V2.03.07.02 [08 Nov 2021]
* Device(s) : R5F10AGC
* Tool-Chain : CCRL
* Description : This file implements device driver for ADC module.
* Creation Date: 2023-11-14
***********************************************************************************************************************/
/***********************************************************************************************************************
Includes
***********************************************************************************************************************/
#include "r_cg_macrodriver.h"
#include "r_cg_adc.h"
/* Start user code for include. Do not edit comment generated here */
/* End user code. Do not edit comment generated here */
#include "r_cg_userdefine.h"
/***********************************************************************************************************************
Pragma directive
***********************************************************************************************************************/
#pragma interrupt r_adc_interrupt(vect=INTAD)
/* Start user code for pragma. Do not edit comment generated here */
/* End user code. Do not edit comment generated here */
/***********************************************************************************************************************
Global variables and functions
***********************************************************************************************************************/
/* Start user code for global. Do not edit comment generated here */
uint16_t g_adval[4];
/* End user code. Do not edit comment generated here */
/***********************************************************************************************************************
* Function Name: r_adc_interrupt
* Description : This function is INTAD interrupt service routine.
* Arguments : None
* Return Value : None
***********************************************************************************************************************/
static void __near r_adc_interrupt(void)
{
/* Start user code. Do not edit comment generated here */
switch (ADS)
{
case _00_AD_INPUT_CHANNEL_0:
R_ADC_Get_Result(g_adval);
ADS = _01_AD_INPUT_CHANNEL_1;
break;
case _01_AD_INPUT_CHANNEL_1:
R_ADC_Get_Result(g_adval+1);
ADS = _02_AD_INPUT_CHANNEL_2;
break;
case _02_AD_INPUT_CHANNEL_2:
R_ADC_Get_Result(g_adval+2);
ADS = _03_AD_INPUT_CHANNEL_3;
break;
case _03_AD_INPUT_CHANNEL_3:
R_ADC_Get_Result(g_adval+3);
ADS = _00_AD_INPUT_CHANNEL_0;
break;
default:
ADS = _00_AD_INPUT_CHANNEL_0;
break;
}
/* End user code. Do not edit comment generated here */
}
/* Start user code for adding. Do not edit comment generated here */
/* End user code. Do not edit comment generated here */

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/***********************************************************************************************************************
* DISCLAIMER
* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
* applicable laws, including copyright laws.
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
* of this software. By using this software, you agree to the additional terms and conditions found by accessing the
* following link:
* http://www.renesas.com/disclaimer
*
* Copyright (C) 2012, 2021 Renesas Electronics Corporation. All rights reserved.
***********************************************************************************************************************/
/***********************************************************************************************************************
* File Name : r_cg_cgc.c
* Version : CodeGenerator for RL78/F13 V2.03.07.02 [08 Nov 2021]
* Device(s) : R5F10AGC
* Tool-Chain : CCRL
* Description : This file implements device driver for CGC module.
* Creation Date: 2023-11-14
***********************************************************************************************************************/
/***********************************************************************************************************************
Includes
***********************************************************************************************************************/
#include "r_cg_macrodriver.h"
#include "r_cg_cgc.h"
/* Start user code for include. Do not edit comment generated here */
/* End user code. Do not edit comment generated here */
#include "r_cg_userdefine.h"
/***********************************************************************************************************************
Pragma directive
***********************************************************************************************************************/
/* Start user code for pragma. Do not edit comment generated here */
/* End user code. Do not edit comment generated here */
/***********************************************************************************************************************
Global variables and functions
***********************************************************************************************************************/
/* Start user code for global. Do not edit comment generated here */
/* End user code. Do not edit comment generated here */
/***********************************************************************************************************************
* Function Name: R_CGC_Create
* Description : This function initializes the clock generator.
* Arguments : None
* Return Value : None
***********************************************************************************************************************/
void R_CGC_Create(void)
{
/* Set fSL */
SELLOSC = 1U;
/* Set fMX */
CMC = _00_CGC_HISYS_PORT | _00_CGC_SUB_PORT | _00_CGC_SYSOSC_DEFAULT | _00_CGC_SUBMODE_DEFAULT;
MSTOP = 1U;
/* Set fMAIN */
MCM0 = 0U;
MDIV = _01_CGC_FMP_DIV_1;
/* Set fMP to clock through mode */
SELPLL = 0U;
/* Set fSUB */
XTSTOP = 1U;
/* Set fCLK */
CSS = 0U;
/* Set fIH */
HIOSTOP = 0U;
/* Set RTC clock source */
RTCCL = _80_CGC_RTC_FIH;
RTCCL |= _42_CGC_RTC_DIV122;
/* Set Timer RD clock source to fCLK, fMP */
TRD_CKSEL = 0U;
}
/* Start user code for adding. Do not edit comment generated here */
/* End user code. Do not edit comment generated here */

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/***********************************************************************************************************************
* DISCLAIMER
* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
* applicable laws, including copyright laws.
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
* of this software. By using this software, you agree to the additional terms and conditions found by accessing the
* following link:
* http://www.renesas.com/disclaimer
*
* Copyright (C) 2012, 2021 Renesas Electronics Corporation. All rights reserved.
***********************************************************************************************************************/
/***********************************************************************************************************************
* File Name : r_cg_cgc.h
* Version : CodeGenerator for RL78/F13 V2.03.07.02 [08 Nov 2021]
* Device(s) : R5F10AGC
* Tool-Chain : CCRL
* Description : This file implements device driver for CGC module.
* Creation Date: 2023-11-14
***********************************************************************************************************************/
#ifndef CGC_H
#define CGC_H
/***********************************************************************************************************************
Macro definitions (Register bit)
***********************************************************************************************************************/
/*
Clock operation mode control register (CMC)
*/
/* High-speed system clock pin operation mode (EXCLK, OSCSEL) */
#define _C0_CGC_HISYS_PIN (0xC0U)
#define _00_CGC_HISYS_PORT (0x00U) /* X1, X2 as I/O port */
#define _40_CGC_HISYS_OSC (0x40U) /* X1, X2 as crystal/ceramic resonator connection */
#define _80_CGC_HISYS_PORT1 (0x80U) /* X1, X2 as I/O port */
#define _C0_CGC_HISYS_EXT (0xC0U) /* X1 as I/O port, X2 as external clock input */
/* Subsystem clock pin operation mode (EXCLKS, OSCSELS) */
#define _30_CGC_SUB_PIN (0x30U)
#define _00_CGC_SUB_PORT (0x00U) /* XT1, XT2 as I/O port */
#define _10_CGC_SUB_OSC (0x10U) /* XT1, XT2 as crystal connection */
#define _20_CGC_SUB_PORT1 (0x20U) /* XT1, XT2 as I/O port */
#define _30_CGC_SUB_EXT (0x30U) /* XT1 as I/O port, XT2 as external clock input */
/* XT1 oscillator oscillation mode selection (AMPHS1, AMPHS0) */
#define _00_CGC_SUBMODE_DEFAULT (0x00U)
#define _00_CGC_SUBMODE_LOW (0x00U) /* low power consumption oscillation */
#define _02_CGC_SUBMODE_NORMAL (0x02U) /* normal oscillation */
#define _04_CGC_SUBMODE_ULOW (0x04U) /* ultra-low power consumption oscillation */
/* Control of X1 high-speed system clock oscillation frequency (AMPH) */
#define _00_CGC_SYSOSC_DEFAULT (0x00U)
#define _00_CGC_SYSOSC_UNDER10M (0x00U) /* fX <= 10MHz */
#define _01_CGC_SYSOSC_OVER10M (0x01U) /* fX > 10MHz */
/*
Clock operation status control register (CSC)
*/
/* Control of high-speed system clock operation (MSTOP) */
#define _00_CGC_HISYS_OPER (0x00U) /* X1 oscillator/external clock operating */
#define _80_CGC_HISYS_STOP (0x80U) /* X1 oscillator/external clock stopped */
/* Subsystem clock operation (XTSTOP) */
#define _00_CGC_SUB_OPER (0x00U) /* XT1 oscillator operating */
#define _40_CGC_SUB_STOP (0x40U) /* XT1 oscillator stopped */
/* High-speed OCO operation (HIOSTOP) */
#define _00_CGC_HIO_OPER (0x00U) /* high-speed OCO operating */
#define _01_CGC_HIO_STOP (0x01U) /* high-speed OCO stopped */
/*
Oscillation stabilization time counter status register (OSTC)
*/
/* Oscillation stabilization time status (MOST18 - MOST8) */
#define _00_CGC_OSCSTAB_STA0 (0x00U) /* < 2^8/fX */
#define _80_CGC_OSCSTAB_STA8 (0x80U) /* 2^8/fX */
#define _C0_CGC_OSCSTAB_STA9 (0xC0U) /* 2^9/fX */
#define _E0_CGC_OSCSTAB_STA10 (0xE0U) /* 2^10/fX */
#define _F0_CGC_OSCSTAB_STA11 (0xF0U) /* 2^11/fX */
#define _F8_CGC_OSCSTAB_STA13 (0xF8U) /* 2^13/fX */
#define _FC_CGC_OSCSTAB_STA15 (0xFCU) /* 2^15/fX */
#define _FE_CGC_OSCSTAB_STA17 (0xFEU) /* 2^17/fX */
#define _FF_CGC_OSCSTAB_STA18 (0xFFU) /* 2^18/fX */
/*
Oscillation stabilization time select register (OSTS)
*/
/* Oscillation stabilization time selection (OSTS2 - OSTS0) */
#define _00_CGC_OSCSTAB_SEL8 (0x00U) /* 2^8/fX */
#define _01_CGC_OSCSTAB_SEL9 (0x01U) /* 2^9/fX */
#define _02_CGC_OSCSTAB_SEL10 (0x02U) /* 2^10/fX */
#define _03_CGC_OSCSTAB_SEL11 (0x03U) /* 2^11/fX */
#define _04_CGC_OSCSTAB_SEL13 (0x04U) /* 2^13/fX */
#define _05_CGC_OSCSTAB_SEL15 (0x05U) /* 2^15/fX */
#define _06_CGC_OSCSTAB_SEL17 (0x06U) /* 2^17/fX */
#define _07_CGC_OSCSTAB_SEL18 (0x07U) /* 2^18/fX */
/*
PLL control register (PLLCTL)
*/
/* Lockup wait counter setting value */
#define _00_CGC_LOCKUP_WAIT_7 (0x00U) /* 2^7/fMAIN */
#define _40_CGC_LOCKUP_WAIT_8 (0x40U) /* 2^8/fMAIN */
#define _80_CGC_LOCKUP_WAIT_9 (0x80U) /* 2^9/fMAIN */
/* PLL output clock selection (PLLDIV1) */
#define _00_CGC_PLL_BELOW_32MHZ (0x00U) /* when fMAIN <= 32 MHz */
#define _20_CGC_PLL_ABOVE_32MHZ (0x20U) /* when fMAIN > 32 MHz */
/* PLL output clock division selection (PLLDIV0) */
#define _00_CGC_PLL_DIVISION_2 (0x00U) /* divides the clock frequency by 2 */
#define _10_CGC_PLL_DIVISION_4 (0x10U) /* divides the clock frequency by 4 */
/* Clock mode selection (SELPLL) */
#define _00_CGC_NOSEL_PLL (0x00U) /* clock through mode */
#define _04_CGC_SEL_PLL (0x04U) /* PLL clock select mode */
/* PLL output clock (fPLLO) multiplier selection (PLLMUL) */
#define _00_CGC_PLL_MULTIPLY_X12 (0x00U) /* clock through mode */
#define _02_CGC_PLL_MULTIPLY_X16 (0x02U) /* PLL clock select mode */
/* Operating or stopping PLL function (PLLON) */
#define _00_CGC_PLL_STOP (0x00U) /* PLL operating stopped */
#define _01_CGC_PLL_ENABLE (0x01U) /* PLL operating */
/*
PLL status register (PLLSTS)
*/
/* PLL lock state */
#define _00_CGC_PLL_UNLOCKED (0x00U) /* Unlocked state */
#define _80_CGC_PLL_LOCKED (0x80U) /* Locked state */
/*
FMP clock selection division register (MDIV)
*/
/* Division of PLL clock (fMP) */
#define _00_CGC_FMP_DIV_DEFAULT (0x00U) /* fMP (default) */
#define _01_CGC_FMP_DIV_1 (0x01U) /* fMP/2^1 */
#define _02_CGC_FMP_DIV_2 (0x02U) /* fMP/2^2 */
#define _03_CGC_FMP_DIV_3 (0x03U) /* fMP/2^3 */
#define _04_CGC_FMP_DIV_4 (0x04U) /* fMP/2^4 */
#define _05_CGC_FMP_DIV_5 (0x05U) /* fMP/2^5 */
#define _06_CGC_FMP_DIV_6 (0x06U) /* fMP/2^6 */
/*
System clock control register (CKC)
*/
/* Status of CPU/peripheral hardware clock fCLK (CLS) */
#define _00_CGC_CPUCLK_MAIN (0x00U) /* main system clock (fMAIN) */
#define _80_CGC_CPUCLK_SUB (0x80U) /* subsystem clock (fSUB) */
/* Selection of CPU/peripheral hardware clock fCLK (CSS) */
#define _00_CGC_CPUCLK_SELMAIN (0x00U) /* main system clock (fMAIN) */
#define _40_CGC_CPUCLK_SELSUB (0x40U) /* subsystem clock (fSUB) */
/* Status of Main system clock fMAIN (MCS) */
#define _00_CGC_MAINCLK_HIO (0x00U) /* high-speed OCO clock (fIH) */
#define _20_CGC_MAINCLK_HISYS (0x20U) /* high-speed system clock (fMX) */
/* Selection of Main system clock fMAIN (MCM0) */
#define _00_CGC_MAINCLK_SELHIO (0x00U) /* high-speed OCO clock (fIH) */
#define _10_CGC_MAINCLK_SELHISYS (0x10U) /* high-speed system clock (fMX) */
/*
Operation speed mode control register (OSMC)
*/
/* Setting in subsystem clock HALT mode (RTCLPC) */
#define _00_CGC_SUBINHALT_ON (0x00U) /* enables supply of subsystem clock to peripheral functions */
#define _80_CGC_SUBINHALT_OFF (0x80U) /* stops supply to peripheral functions other than RTC and interval timer */
/* RTC macro operation clock (WUTMMCK0) */
#define _00_CGC_RTC_CLK_OTHER (0x00U) /* Other than fIL */
#define _10_CGC_RTC_CLK_FIL (0x10U) /* use fIL clock */
/*
Illegal memory access detection control register (IAWCTL)
*/
/* Illegal memory access detection control (IAWEN) */
#define _00_CGC_ILLEGAL_ACCESS_OFF (0x00U) /* disables illegal memory access detection */
#define _80_CGC_ILLEGAL_ACCESS_ON (0x80U) /* enables illegal memory access detection */
/* RAM guard area (GRAM1, GRAM0) */
#define _00_CGC_RAM_GUARD_OFF (0x00U) /* invalid, it is possible to write RAM */
#define _10_CGC_RAM_GUARD_AREA0 (0x10U) /* 128 bytes from RAM bottom address */
#define _20_CGC_RAM_GUARD_AREA1 (0x20U) /* 256 bytes from RAM bottom address */
#define _30_CGC_RAM_GUARD_AREA2 (0x30U) /* 512 bytes from RAM bottom address */
/* PORT register guard (GPORT) */
#define _00_CGC_PORT_GUARD_OFF (0x00U) /* invalid, it is possible to write PORT register */
#define _04_CGC_PORT_GUARD_ON (0x04U) /* valid, it is impossible to write PORT register, but possible for read */
/* Interrupt register guard (GINT) */
#define _00_CGC_INT_GUARD_OFF (0x00U) /* invalid, it is possible to write interrupt register */
#define _02_CGC_INT_GUARD_ON (0x02U) /* valid, it is impossible to write , but possible for read */
/* CSC register guard (GCSC) */
#define _00_CGC_CSC_GUARD_OFF (0x00U) /* invalid, it is possible to write CSC register */
#define _01_CGC_CSC_GUARD_ON (0x01U) /* valid, it is impossible to write CSC register, but possible for read */
/*
RTC clock selection register (RTCCL)
*/
/* Operation clock source selection for RTC (RTCCL7) */
#define _00_CGC_RTC_FMX (0x00U) /* RTC uses External Main clock (fMX) */
#define _80_CGC_RTC_FIH (0x80U) /* RTC uses Internal high speed clock (fIH) */
/* Operation selection of RTC macro (RTCCL6,RTCCKS1 - RTCCKS0) */
#define _00_CGC_RTC_FSUB (0x00U) /* RTC uses sub clock */
#define _02_CGC_RTC_DIV128 (0x02U) /* RTC uses high-speed clock / 128 */
#define _03_CGC_RTC_DIV256 (0x03U) /* RTC uses high-speed clock / 256 */
#define _42_CGC_RTC_DIV122 (0x42U) /* RTC uses high-speed clock / 122 */
#define _43_CGC_RTC_DIV244 (0x43U) /* RTC uses high-speed clock / 244 */
/***********************************************************************************************************************
Macro definitions
***********************************************************************************************************************/
/***********************************************************************************************************************
Typedef definitions
***********************************************************************************************************************/
typedef enum
{
HIOCLK,
SYSX1CLK,
SYSEXTCLK,
SUBXT1CLK,
SUBEXTCLK
} clock_mode_t;
/***********************************************************************************************************************
Global functions
***********************************************************************************************************************/
void R_CGC_Create(void);
void R_CGC_Get_ResetSource(void);
/* Start user code for function. Do not edit comment generated here */
/* End user code. Do not edit comment generated here */
#endif

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/***********************************************************************************************************************
* DISCLAIMER
* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
* applicable laws, including copyright laws.
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
* of this software. By using this software, you agree to the additional terms and conditions found by accessing the
* following link:
* http://www.renesas.com/disclaimer
*
* Copyright (C) 2012, 2021 Renesas Electronics Corporation. All rights reserved.
***********************************************************************************************************************/
/***********************************************************************************************************************
* File Name : r_cg_cgc_user.c
* Version : CodeGenerator for RL78/F13 V2.03.07.02 [08 Nov 2021]
* Device(s) : R5F10AGC
* Tool-Chain : CCRL
* Description : This file implements device driver for CGC module.
* Creation Date: 2023-11-14
***********************************************************************************************************************/
/***********************************************************************************************************************
Includes
***********************************************************************************************************************/
#include "r_cg_macrodriver.h"
#include "r_cg_cgc.h"
/* Start user code for include. Do not edit comment generated here */
/* End user code. Do not edit comment generated here */
#include "r_cg_userdefine.h"
/***********************************************************************************************************************
Pragma directive
***********************************************************************************************************************/
/* Start user code for pragma. Do not edit comment generated here */
/* End user code. Do not edit comment generated here */
/***********************************************************************************************************************
Global variables and functions
***********************************************************************************************************************/
/* Start user code for global. Do not edit comment generated here */
/* End user code. Do not edit comment generated here */
/***********************************************************************************************************************
* Function Name: R_CGC_Get_ResetSource
* Description : This function process of Reset.
* Arguments : None
* Return Value : None
***********************************************************************************************************************/
void R_CGC_Get_ResetSource(void)
{
uint8_t reset_flag = RESF;
/* Start user code. Do not edit comment generated here */
/* End user code. Do not edit comment generated here */
}
/* Start user code for adding. Do not edit comment generated here */
/* End user code. Do not edit comment generated here */

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/***********************************************************************************************************************
* DISCLAIMER
* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
* applicable laws, including copyright laws.
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
* of this software. By using this software, you agree to the additional terms and conditions found by accessing the
* following link:
* http://www.renesas.com/disclaimer
*
* Copyright (C) 2012, 2021 Renesas Electronics Corporation. All rights reserved.
***********************************************************************************************************************/
/***********************************************************************************************************************
* File Name : r_cg_macrodriver.h
* Version : CodeGenerator for RL78/F13 V2.03.07.02 [08 Nov 2021]
* Device(s) : R5F10AGC
* Tool-Chain : CCRL
* Description : This file implements general head file.
* Creation Date: 2023-11-14
***********************************************************************************************************************/
#ifndef STATUS_H
#define STATUS_H
/***********************************************************************************************************************
Includes
***********************************************************************************************************************/
#include "iodefine.h"
/***********************************************************************************************************************
Macro definitions (Register bit)
***********************************************************************************************************************/
/***********************************************************************************************************************
Macro definitions
***********************************************************************************************************************/
#ifndef __TYPEDEF__
#define DI __DI
#define EI __EI
#define HALT __halt
#define NOP __nop
#define STOP __stop
#define BRK __brk
/* Status list definition */
#define MD_STATUSBASE 0x00U
#define MD_OK (MD_STATUSBASE + 0x00U) /* register setting OK */
#define MD_SPT (MD_STATUSBASE + 0x01U) /* IIC stop */
#define MD_NACK (MD_STATUSBASE + 0x02U) /* IIC no ACK */
#define MD_BUSY1 (MD_STATUSBASE + 0x03U) /* busy 1 */
#define MD_BUSY2 (MD_STATUSBASE + 0x04U) /* busy 2 */
#define MD_OVERRUN (MD_STATUSBASE + 0x05U) /* IIC OVERRUN occur */
/* Error list definition */
#define MD_ERRORBASE 0x80U
#define MD_ERROR (MD_ERRORBASE + 0x00U) /* error */
#define MD_ARGERROR (MD_ERRORBASE + 0x01U) /* error agrument input error */
#define MD_ERROR1 (MD_ERRORBASE + 0x02U) /* error 1 */
#define MD_ERROR2 (MD_ERRORBASE + 0x03U) /* error 2 */
#define MD_ERROR3 (MD_ERRORBASE + 0x04U) /* error 3 */
#define MD_ERROR4 (MD_ERRORBASE + 0x05U) /* error 4 */
#define MD_DATAEXISTS (MD_ERRORBASE + 0x06U) /* data to be transferred next exists in TXBn register */
#endif
/***********************************************************************************************************************
Typedef definitions
***********************************************************************************************************************/
#ifndef __TYPEDEF__
typedef signed char int8_t;
typedef unsigned char uint8_t;
typedef signed short int16_t;
typedef unsigned short uint16_t;
typedef signed long int32_t;
typedef unsigned long uint32_t;
typedef unsigned short MD_STATUS;
#define __TYPEDEF__
#endif
/***********************************************************************************************************************
Global functions
***********************************************************************************************************************/
#endif

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/***********************************************************************************************************************
* DISCLAIMER
* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
* applicable laws, including copyright laws.
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
* of this software. By using this software, you agree to the additional terms and conditions found by accessing the
* following link:
* http://www.renesas.com/disclaimer
*
* Copyright (C) 2012, 2021 Renesas Electronics Corporation. All rights reserved.
***********************************************************************************************************************/
/***********************************************************************************************************************
* File Name : r_cg_port.c
* Version : CodeGenerator for RL78/F13 V2.03.07.02 [08 Nov 2021]
* Device(s) : R5F10AGC
* Tool-Chain : CCRL
* Description : This file implements device driver for PORT module.
* Creation Date: 2023-11-14
***********************************************************************************************************************/
/***********************************************************************************************************************
Includes
***********************************************************************************************************************/
#include "r_cg_macrodriver.h"
#include "r_cg_port.h"
/* Start user code for include. Do not edit comment generated here */
/* End user code. Do not edit comment generated here */
#include "r_cg_userdefine.h"
/***********************************************************************************************************************
Pragma directive
***********************************************************************************************************************/
/* Start user code for pragma. Do not edit comment generated here */
/* End user code. Do not edit comment generated here */
/***********************************************************************************************************************
Global variables and functions
***********************************************************************************************************************/
/* Start user code for global. Do not edit comment generated here */
/* End user code. Do not edit comment generated here */
/***********************************************************************************************************************
* Function Name: R_PORT_Create
* Description : This function initializes the Port I/O.
* Arguments : None
* Return Value : None
***********************************************************************************************************************/
void R_PORT_Create(void)
{
P0 = _00_Pn0_OUTPUT_0;
P1 = _00_Pn0_OUTPUT_0 | _00_Pn1_OUTPUT_0 | _00_Pn2_OUTPUT_0 | _00_Pn5_OUTPUT_0 | _00_Pn6_OUTPUT_0 |
_00_Pn7_OUTPUT_0;
P3 = _00_Pn1_OUTPUT_0 | _00_Pn2_OUTPUT_0;
P7 = _00_Pn0_OUTPUT_0 | _00_Pn1_OUTPUT_0 | _00_Pn2_OUTPUT_0 | _00_Pn3_OUTPUT_0;
P13 = _00_Pn0_OUTPUT_0;
P14 = _00_Pn0_OUTPUT_0;
PSRSEL = _00_PSR140_NORMAL | _00_PSR12_NORMAL | _00_PSR10_NORMAL;
ADPC = _05_ADPC_DI_ON;
PM0 = _00_PMn0_MODE_OUTPUT | _FE_PM0_DEFAULT;
PM1 = _00_PMn0_MODE_OUTPUT | _00_PMn1_MODE_OUTPUT | _00_PMn2_MODE_OUTPUT | _08_PMn3_NOT_USE | _10_PMn4_NOT_USE |
_00_PMn5_MODE_OUTPUT | _00_PMn6_MODE_OUTPUT | _00_PMn7_MODE_OUTPUT;
PM3 = _01_PMn0_NOT_USE | _00_PMn1_MODE_OUTPUT | _00_PMn2_MODE_OUTPUT | _08_PMn3_NOT_USE | _10_PMn4_NOT_USE |
_E0_PM3_DEFAULT;
PM7 = _00_PMn0_MODE_OUTPUT | _00_PMn1_MODE_OUTPUT | _00_PMn2_MODE_OUTPUT | _00_PMn3_MODE_OUTPUT | _F0_PM7_DEFAULT;
PM8 = _01_PMn0_NOT_USE | _02_PMn1_NOT_USE | _04_PMn2_MODE_INPUT | _08_PMn3_MODE_INPUT | _10_PMn4_MODE_INPUT |
_20_PMn5_MODE_INPUT | _40_PMn6_NOT_USE | _80_PMn7_NOT_USE;
PM9 = _01_PMn0_MODE_INPUT | _02_PMn1_MODE_INPUT | _04_PMn2_NOT_USE | _F8_PM9_DEFAULT;
PM14 = _00_PMn0_MODE_OUTPUT | _FE_PM14_DEFAULT;
}
/* Start user code for adding. Do not edit comment generated here */
/* End user code. Do not edit comment generated here */

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/***********************************************************************************************************************
* DISCLAIMER
* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
* applicable laws, including copyright laws.
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
* of this software. By using this software, you agree to the additional terms and conditions found by accessing the
* following link:
* http://www.renesas.com/disclaimer
*
* Copyright (C) 2012, 2021 Renesas Electronics Corporation. All rights reserved.
***********************************************************************************************************************/
/***********************************************************************************************************************
* File Name : r_cg_port.h
* Version : CodeGenerator for RL78/F13 V2.03.07.02 [08 Nov 2021]
* Device(s) : R5F10AGC
* Tool-Chain : CCRL
* Description : This file implements device driver for PORT module.
* Creation Date: 2023-11-14
***********************************************************************************************************************/
#ifndef PORT_H
#define PORT_H
/***********************************************************************************************************************
Macro definitions (Register bit)
***********************************************************************************************************************/
/*
Port Mode Register (PMm)
*/
/* Pmn pin I/O mode selection (PMm7 - PMm0) */
#define _01_PMn0_NOT_USE (0x01U) /* not use Pn0 as digital I/O */
#define _01_PMn0_MODE_INPUT (0x01U) /* use Pn0 as input mode */
#define _00_PMn0_MODE_OUTPUT (0x00U) /* use Pn0 as output mode */
#define _02_PMn1_NOT_USE (0x02U) /* not use Pn1 as digital I/O */
#define _02_PMn1_MODE_INPUT (0x02U) /* use Pn1 as input mode */
#define _00_PMn1_MODE_OUTPUT (0x00U) /* use Pn1 as output mode */
#define _04_PMn2_NOT_USE (0x04U) /* not use Pn2 as digital I/O */
#define _04_PMn2_MODE_INPUT (0x04U) /* use Pn2 as input mode */
#define _00_PMn2_MODE_OUTPUT (0x00U) /* use Pn2 as output mode */
#define _08_PMn3_NOT_USE (0x08U) /* not use Pn3 as digital I/O */
#define _08_PMn3_MODE_INPUT (0x08U) /* use Pn3 as input mode */
#define _00_PMn3_MODE_OUTPUT (0x00U) /* use Pn3 as output mode */
#define _10_PMn4_NOT_USE (0x10U) /* not use Pn4 as digital I/O */
#define _10_PMn4_MODE_INPUT (0x10U) /* use Pn4 as input mode */
#define _00_PMn4_MODE_OUTPUT (0x00U) /* use Pn4 as output mode */
#define _20_PMn5_NOT_USE (0x20U) /* not use Pn5 as digital I/O */
#define _20_PMn5_MODE_INPUT (0x20U) /* use Pn5 as input mode */
#define _00_PMn5_MODE_OUTPUT (0x00U) /* use Pn5 as output mode */
#define _40_PMn6_NOT_USE (0x40U) /* not use Pn6 as digital I/O */
#define _40_PMn6_MODE_INPUT (0x40U) /* use Pn6 as input mode */
#define _00_PMn6_MODE_OUTPUT (0x00U) /* use Pn6 as output mode */
#define _80_PMn7_NOT_USE (0x80U) /* not use Pn7 as digital I/O */
#define _80_PMn7_MODE_INPUT (0x80U) /* use Pn7 as input mode */
#define _00_PMn7_MODE_OUTPUT (0x00U) /* use Pn7 as output mode */
/*
Port Register (Pm)
*/
/* Pmn pin data (Pm0 to Pm7) */
#define _00_Pn0_OUTPUT_0 (0x00U) /* Pn0 output 0 */
#define _01_Pn0_OUTPUT_1 (0x01U) /* Pn0 output 1 */
#define _00_Pn1_OUTPUT_0 (0x00U) /* Pn1 output 0 */
#define _02_Pn1_OUTPUT_1 (0x02U) /* Pn1 output 1 */
#define _00_Pn2_OUTPUT_0 (0x00U) /* Pn2 output 0 */
#define _04_Pn2_OUTPUT_1 (0x04U) /* Pn2 output 1 */
#define _00_Pn3_OUTPUT_0 (0x00U) /* Pn3 output 0 */
#define _08_Pn3_OUTPUT_1 (0x08U) /* Pn3 output 1 */
#define _00_Pn4_OUTPUT_0 (0x00U) /* Pn4 output 0 */
#define _10_Pn4_OUTPUT_1 (0x10U) /* Pn4 output 1 */
#define _00_Pn5_OUTPUT_0 (0x00U) /* Pn5 output 0 */
#define _20_Pn5_OUTPUT_1 (0x20U) /* Pn5 output 1 */
#define _00_Pn6_OUTPUT_0 (0x00U) /* Pn6 output 0 */
#define _40_Pn6_OUTPUT_1 (0x40U) /* Pn6 output 1 */
#define _00_Pn7_OUTPUT_0 (0x00U) /* Pn7 output 0 */
#define _80_Pn7_OUTPUT_1 (0x80U) /* Pn7 output 1 */
/*
Pull-up Resistor Option Register (PUm)
*/
/* Pmn pin on-chip pull-up resistor selection (PUmn) */
#define _00_PUn0_PULLUP_OFF (0x00U) /* Pn0 pull-up resistor not connected */
#define _01_PUn0_PULLUP_ON (0x01U) /* Pn0 pull-up resistor connected */
#define _00_PUn1_PULLUP_OFF (0x00U) /* Pn1 pull-up resistor not connected */
#define _02_PUn1_PULLUP_ON (0x02U) /* Pn1 pull-up resistor connected */
#define _00_PUn2_PULLUP_OFF (0x00U) /* Pn2 Pull-up resistor not connected */
#define _04_PUn2_PULLUP_ON (0x04U) /* Pn2 pull-up resistor connected */
#define _00_PUn3_PULLUP_OFF (0x00U) /* Pn3 pull-up resistor not connected */
#define _08_PUn3_PULLUP_ON (0x08U) /* Pn3 pull-up resistor connected */
#define _00_PUn4_PULLUP_OFF (0x00U) /* Pn4 pull-up resistor not connected */
#define _10_PUn4_PULLUP_ON (0x10U) /* Pn4 pull-up resistor connected */
#define _00_PUn5_PULLUP_OFF (0x00U) /* Pn5 pull-up resistor not connected */
#define _20_PUn5_PULLUP_ON (0x20U) /* Pn5 pull-up resistor connected */
#define _00_PUn6_PULLUP_OFF (0x00U) /* Pn6 pull-up resistor not connected */
#define _40_PUn6_PULLUP_ON (0x40U) /* Pn6 pull-up resistor connected */
#define _00_PUn7_PULLUP_OFF (0x00U) /* Pn7 pull-up resistor not connected */
#define _80_PUn7_PULLUP_ON (0x80U) /* Pn7 pull-up resistor connected */
/*
Port Input Mode Register (PIMm)
*/
/* Pmn pin input buffer selection (PIMmn) */
#define _00_PIMn0_TTL_OFF (0x00U) /* set Pn0 normal input buffer */
#define _01_PIMn0_TTL_ON (0x01U) /* set Pn0 TTL input buffer */
#define _00_PIMn1_TTL_OFF (0x00U) /* set Pn1 normal input buffer */
#define _02_PIMn1_TTL_ON (0x02U) /* set Pn1 TTL input buffer */
#define _00_PIMn2_TTL_OFF (0x00U) /* set Pn2 normal input buffer */
#define _04_PIMn2_TTL_ON (0x04U) /* set Pn2 TTL input buffer */
#define _00_PIMn3_TTL_OFF (0x00U) /* set Pn3 normal input buffer */
#define _08_PIMn3_TTL_ON (0x08U) /* set Pn3 TTL input buffer */
#define _00_PIMn4_TTL_OFF (0x00U) /* set Pn4 normal input buffer */
#define _10_PIMn4_TTL_ON (0x10U) /* set Pn4 TTL input buffer */
#define _00_PIMn5_TTL_OFF (0x00U) /* set Pn5 normal input buffer */
#define _20_PIMn5_TTL_ON (0x20U) /* set Pn5 TTL input buffer */
#define _00_PIMn6_TTL_OFF (0x00U) /* set Pn6 normal input buffer */
#define _40_PIMn6_TTL_ON (0x40U) /* set Pn6 TTL input buffer */
#define _00_PIMn7_TTL_OFF (0x00U) /* set Pn7 normal input buffer */
#define _80_PIMn7_TTL_ON (0x80U) /* set Pn7 TTL input buffer */
/*
Port Input Threshold Control Register (PITHLm)
*/
/* Pmn pin input threshold selection (PITHLmn) */
#define _00_PITHLn0_SCHMITT3_OFF (0x00U) /* set Pn0 schmitt 1 input (default) */
#define _01_PITHLn0_SCHMITT3_ON (0x01U) /* set Pn0 schmitt 3 input */
#define _00_PITHLn1_SCHMITT3_OFF (0x00U) /* set Pn1 schmitt 1 input (default) */
#define _02_PITHLn1_SCHMITT3_ON (0x02U) /* set Pn1 schmitt 3 input */
#define _00_PITHLn2_SCHMITT3_OFF (0x00U) /* set Pn2 schmitt 1 input (default) */
#define _04_PITHLn2_SCHMITT3_ON (0x04U) /* set Pn2 schmitt 3 input */
#define _00_PITHLn3_SCHMITT3_OFF (0x00U) /* set Pn3 schmitt 1 input (default) */
#define _08_PITHLn3_SCHMITT3_ON (0x08U) /* set Pn3 schmitt 3 input */
#define _00_PITHLn4_SCHMITT3_OFF (0x00U) /* set Pn4 schmitt 1 input (default) */
#define _10_PITHLn4_SCHMITT3_ON (0x10U) /* set Pn4 schmitt 3 input */
#define _00_PITHLn5_SCHMITT3_OFF (0x00U) /* set Pn5 schmitt 1 input (default) */
#define _20_PITHLn5_SCHMITT3_ON (0x20U) /* set Pn5 schmitt 3 input */
#define _00_PITHLn6_SCHMITT3_OFF (0x00U) /* set Pn6 schmitt 1 input (default) */
#define _40_PITHLn6_SCHMITT3_ON (0x40U) /* set Pn6 schmitt 3 input */
#define _00_PITHLn7_SCHMITT3_OFF (0x00U) /* set Pn7 schmitt 1 input (default) */
#define _80_PITHLn7_SCHMITT3_ON (0x80U) /* set Pn7 schmitt 3 input */
/*
Port Output Mode Register (POMm)
*/
/* Pmn pin output mode selection (POMmn) */
#define _00_POMn0_NCH_OFF (0x00U) /* set Pn0 output normal mode */
#define _01_POMn0_NCH_ON (0x01U) /* set Pn0 output N-ch open-drain mode */
#define _00_POMn1_NCH_OFF (0x00U) /* set Pn1 output normal mode */
#define _02_POMn1_NCH_ON (0x02U) /* set Pn1 output N-ch open-drain mode */
#define _00_POMn2_NCH_OFF (0x00U) /* set Pn2 output normal mode */
#define _04_POMn2_NCH_ON (0x04U) /* set Pn2 output N-ch open-drain mode */
#define _00_POMn3_NCH_OFF (0x00U) /* set Pn3 output normal mode */
#define _08_POMn3_NCH_ON (0x08U) /* set Pn3 output N-ch open-drain mode */
#define _00_POMn4_NCH_OFF (0x00U) /* set Pn4 output normal mode */
#define _10_POMn4_NCH_ON (0x10U) /* set Pn4 output N-ch open-drain mode */
#define _00_POMn5_NCH_OFF (0x00U) /* set Pn5 output normal mode */
#define _20_POMn5_NCH_ON (0x20U) /* set Pn5 output N-ch open-drain mode */
#define _00_POMn6_NCH_OFF (0x00U) /* set Pn6 output normal mode */
#define _40_POMn6_NCH_ON (0x40U) /* set Pn6 output N-ch open-drain mode */
#define _00_POMn7_NCH_OFF (0x00U) /* set Pn7 output normal mode */
#define _80_POMn7_NCH_ON (0x80U) /* set Pn7 output N-ch open-drain mode */
/*
Port Operation Mode Register (PMCm)
*/
/* Pmn pin digital input buffer selection (PMCmn) */
#define _01_PMCn0_NOT_USE (0x01U) /* not use Pn0 digital input */
#define _00_PMCn0_DI_ON (0x00U) /* enable Pn0 digital input */
#define _02_PMCn1_NOT_USE (0x02U) /* not use Pn1 digital input */
#define _00_PMCn1_DI_ON (0x00U) /* enable Pn1 digital input */
#define _04_PMCn2_NOT_USE (0x04U) /* not use Pn2 digital input */
#define _00_PMCn2_DI_ON (0x00U) /* enable Pn2 digital input */
#define _08_PMCn3_NOT_USE (0x08U) /* not use Pn3 digital input */
#define _00_PMCn3_DI_ON (0x00U) /* enable Pn3 digital input */
#define _10_PMCn4_NOT_USE (0x10U) /* not use Pn4 digital input */
#define _00_PMCn4_DI_ON (0x00U) /* enable Pn4 digital input */
#define _20_PMCn5_NOT_USE (0x20U) /* not use Pn5 digital input */
#define _00_PMCn5_DI_ON (0x00U) /* enable Pn5 digital input */
#define _40_PMCn6_NOT_USE (0x40U) /* not use Pn6 digital input */
#define _00_PMCn6_DI_ON (0x00U) /* enable Pn6 digital input */
#define _80_PMCn7_NOT_USE (0x80U) /* not use Pn7 digital input */
#define _00_PMCn7_DI_ON (0x00U) /* enable Pn7 digital input */
/*
Port output slew rate select register (PSRSEL)
*/
/* P140/PCLBUZ0 pin output mode selection (PSR140) */
#define _00_PSR140_NORMAL (0x00U) /* normal mode (5 V/5 ns) */
#define _20_PSR140_SLOW (0x20U) /* slow mode (25 V/5 ns (target) (TYP.)) */
/* P14/SCK01/SCL01/TO06/TRDIOC0 pin output mode selection (PSR14) */
#define _00_PSR14_NORMAL (0x00U) /* normal mode (5 V/5 ns) */
#define _10_PSR14_SLOW (0x10U) /* slow mode (25 V/5 ns (target) (TYP.)) */
/* P120/SO01/TO07/TRDIOD0 pin output mode selection (PSR120) */
#define _00_PSR120_NORMAL (0x00U) /* normal mode (5 V/5 ns) */
#define _08_PSR120_SLOW (0x08U) /* slow mode (25 V/5 ns (target) (TYP.)) */
/* P30/TO01/TRDIOD1/SNZOUT0 pin output mode selection (PSR30) */
#define _00_PSR30_NORMAL (0x00U) /* normal mode (5 V/5 ns) */
#define _04_PSR30_SLOW (0x04U) /* slow mode (25 V/5 ns (target) (TYP.)) */
/* P12/SO10/TO11/(TRDIOD0)/TXD1/SNZOUT3 pin output mode selection (PSR12) */
#define _00_PSR12_NORMAL (0x00U) /* normal mode (5 V/5 ns) */
#define _02_PSR12_SLOW (0x02U) /* slow mode (25 V/5 ns (target) (TYP.)) */
/* P10/SCK10/TO13/TRJO0/SCL10/LTXD1/CTXD0 pin output mode selection (PSR10) */
#define _00_PSR10_NORMAL (0x00U) /* normal mode (5 V/5 ns) */
#define _01_PSR10_SLOW (0x01U) /* slow mode (25 V/5 ns (target) (TYP.)) */
/*
AD port configuration register (ADPC)
*/
/* Analog input/digital input switching (ADPC4 - ADPC0) */
#define _00_ADPC_DI_OFF (0x00U) /* use P33, P34, P80 - P87, P90 - P92 as analog input */
#define _0D_ADPC_DI_ON (0x0DU) /* use P92 as digital input */
#define _0C_ADPC_DI_ON (0x0CU) /* use P91 - P92 as digital input */
#define _0B_ADPC_DI_ON (0x0BU) /* use P90 - P92 as digital input */
#define _0A_ADPC_DI_ON (0x0AU) /* use P87, P90 - P92 as digital input */
#define _09_ADPC_DI_ON (0x09U) /* use P86 - P87, P90 - P92 as digital input */
#define _08_ADPC_DI_ON (0x08U) /* use P85 - P87, P90 - P92 as digital input */
#define _07_ADPC_DI_ON (0x07U) /* use P84 - P87, P90 - P92 as digital input */
#define _06_ADPC_DI_ON (0x06U) /* use P83 - P87, P90 - P92 as digital input */
#define _05_ADPC_DI_ON (0x05U) /* use P82 - P87, P90 - P92 as digital input */
#define _04_ADPC_DI_ON (0x04U) /* use P81 - P87, P90 - P92 as digital input */
#define _03_ADPC_DI_ON (0x03U) /* use P80 - P87, P90 - P92 as digital input */
#define _02_ADPC_DI_ON (0x02U) /* use P34, P80 - P87, P90 - P92 as digital input */
#define _01_ADPC_DI_ON (0x01U) /* use P33, P34, P80 - P87, P90 - P92 as digital input */
/***********************************************************************************************************************
Macro definitions
***********************************************************************************************************************/
#define _FE_PM0_DEFAULT (0xFEU) /* PM0 default value */
#define _E0_PM3_DEFAULT (0xE0U) /* PM3 default value */
#define _FC_PM4_DEFAULT (0xFCU) /* PM4 default value */
#define _F0_PM6_DEFAULT (0xF0U) /* PM6 default value */
#define _F0_PM7_DEFAULT (0xF0U) /* PM7 default value */
#define _F8_PM9_DEFAULT (0xF8U) /* PM9 default value */
#define _DE_PM12_DEFAULT (0xDEU) /* PM12 default value */
#define _FE_PM14_DEFAULT (0xFEU) /* PM14 default value */
/***********************************************************************************************************************
Typedef definitions
***********************************************************************************************************************/
/***********************************************************************************************************************
Global functions
***********************************************************************************************************************/
void R_PORT_Create(void);
/* Start user code for function. Do not edit comment generated here */
/* End user code. Do not edit comment generated here */
#endif

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/***********************************************************************************************************************
* DISCLAIMER
* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
* applicable laws, including copyright laws.
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
* of this software. By using this software, you agree to the additional terms and conditions found by accessing the
* following link:
* http://www.renesas.com/disclaimer
*
* Copyright (C) 2012, 2021 Renesas Electronics Corporation. All rights reserved.
***********************************************************************************************************************/
/***********************************************************************************************************************
* File Name : r_cg_port_user.c
* Version : CodeGenerator for RL78/F13 V2.03.07.02 [08 Nov 2021]
* Device(s) : R5F10AGC
* Tool-Chain : CCRL
* Description : This file implements device driver for PORT module.
* Creation Date: 2023-11-14
***********************************************************************************************************************/
/***********************************************************************************************************************
Includes
***********************************************************************************************************************/
#include "r_cg_macrodriver.h"
#include "r_cg_port.h"
/* Start user code for include. Do not edit comment generated here */
/* End user code. Do not edit comment generated here */
#include "r_cg_userdefine.h"
/***********************************************************************************************************************
Pragma directive
***********************************************************************************************************************/
/* Start user code for pragma. Do not edit comment generated here */
/* End user code. Do not edit comment generated here */
/***********************************************************************************************************************
Global variables and functions
***********************************************************************************************************************/
/* Start user code for global. Do not edit comment generated here */
/* End user code. Do not edit comment generated here */
/* Start user code for adding. Do not edit comment generated here */
/* End user code. Do not edit comment generated here */

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/***********************************************************************************************************************
* DISCLAIMER
* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
* applicable laws, including copyright laws.
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
* of this software. By using this software, you agree to the additional terms and conditions found by accessing the
* following link:
* http://www.renesas.com/disclaimer
*
* Copyright (C) 2012, 2021 Renesas Electronics Corporation. All rights reserved.
***********************************************************************************************************************/
/***********************************************************************************************************************
* File Name : r_cg_timer.c
* Version : CodeGenerator for RL78/F13 V2.03.07.02 [08 Nov 2021]
* Device(s) : R5F10AGC
* Tool-Chain : CCRL
* Description : This file implements device driver for TAU module.
* Creation Date: 2023-11-14
***********************************************************************************************************************/
/***********************************************************************************************************************
Includes
***********************************************************************************************************************/
#include "r_cg_macrodriver.h"
#include "r_cg_timer.h"
/* Start user code for include. Do not edit comment generated here */
/* End user code. Do not edit comment generated here */
#include "r_cg_userdefine.h"
/***********************************************************************************************************************
Pragma directive
***********************************************************************************************************************/
/* Start user code for pragma. Do not edit comment generated here */
/* End user code. Do not edit comment generated here */
/***********************************************************************************************************************
Global variables and functions
***********************************************************************************************************************/
/* Start user code for global. Do not edit comment generated here */
/* End user code. Do not edit comment generated here */
/***********************************************************************************************************************
* Function Name: R_TAU0_Create
* Description : This function initializes the TAU0 module.
* Arguments : None
* Return Value : None
***********************************************************************************************************************/
void R_TAU0_Create(void)
{
TAU0EN = 1U; /* supplies input clock */
TPS0 = _0000_TAU_CKM0_FCLK_0 | _0000_TAU_CKM1_FCLK_0 | _0000_TAU_CKM2_FCLK_0 | _0000_TAU_CKM3_FCLK_0;
/* Stop all channels */
TT0 = _0001_TAU_CH0_STOP_TRG_ON | _0002_TAU_CH1_STOP_TRG_ON | _0004_TAU_CH2_STOP_TRG_ON |
_0008_TAU_CH3_STOP_TRG_ON | _0010_TAU_CH4_STOP_TRG_ON | _0020_TAU_CH5_STOP_TRG_ON |
_0040_TAU_CH6_STOP_TRG_ON | _0080_TAU_CH7_STOP_TRG_ON | _0200_TAU_CH1_H8_STOP_TRG_ON |
_0800_TAU_CH3_H8_STOP_TRG_ON;
PWMDLY1 = _0000_TAU_PWM_DELAY_CLEAR; /* clear PWM output delay */
/* Mask channel 0 interrupt */
TMMK00 = 1U; /* disable INTTM00 interrupt */
TMIF00 = 0U; /* clear INTTM00 interrupt flag */
/* Mask channel 1 interrupt */
TMMK01 = 1U; /* disable INTTM01 interrupt */
TMIF01 = 0U; /* clear INTTM01 interrupt flag */
/* Mask channel 1 higher 8 bits interrupt */
TMMK01H = 1U; /* disable INTTM01H interrupt */
TMIF01H = 0U; /* clear INTTM01H interrupt flag */
/* Mask channel 2 interrupt */
TMMK02 = 1U; /* disable INTTM02 interrupt */
TMIF02 = 0U; /* clear INTTM02 interrupt flag */
/* Mask channel 3 interrupt */
TMMK03 = 1U; /* disable INTTM03 interrupt */
TMIF03 = 0U; /* clear INTTM03 interrupt flag */
/* Mask channel 3 higher 8 bits interrupt */
TMMK03H = 1U; /* disable INTTM03H interrupt */
TMIF03H = 0U; /* clear INTTM03H interrupt flag */
/* Mask channel 4 interrupt */
TMMK04 = 1U; /* disable INTTM04 interrupt */
TMIF04 = 0U; /* clear INTTM04 interrupt flag */
/* Mask channel 5 interrupt */
TMMK05 = 1U; /* disable INTTM05 interrupt */
TMIF05 = 0U; /* clear INTTM05 interrupt flag */
/* Mask channel 6 interrupt */
TMMK06 = 1U; /* disable INTTM06 interrupt */
TMIF06 = 0U; /* clear INTTM06 interrupt flag */
/* Mask channel 7 interrupt */
TMMK07 = 1U; /* disable INTTM07 interrupt */
TMIF07 = 0U; /* clear INTTM07 interrupt flag */
/* Set INTTM02 low priority */
TMPR102 = 1U;
TMPR002 = 1U;
/* Channel 0 is used as master channel for PWM output function */
TMR00 = _0000_TAU_CLOCK_SELECT_CKM0 | _0000_TAU_CLOCK_MODE_CKS | _0000_TAU_TRIGGER_SOFTWARE |
_0001_TAU_MODE_PWM_MASTER;
TDR00 = _3E7F_TAU_TDR00_VALUE;
TO0 &= ~_0001_TAU_CH0_OUTPUT_VALUE_1;
TOE0 &= ~_0001_TAU_CH0_OUTPUT_ENABLE;
/* Channel 1 is used as slave channel for PWM output function */
TMR01 = _0000_TAU_CLOCK_SELECT_CKM0 | _0000_TAU_CLOCK_MODE_CKS | _0000_TAU_COMBINATION_SLAVE |
_0400_TAU_TRIGGER_MASTER_INT | _0009_TAU_MODE_PWM_SLAVE;
TDR01 = _0000_TAU_TDR01_VALUE;
TOM0 |= _0002_TAU_CH1_OUTPUT_COMBIN;
TOL0 &= ~_0002_TAU_CH1_OUTPUT_LEVEL_L;
TO0 &= ~_0002_TAU_CH1_OUTPUT_VALUE_1;
PWMDLY1 |= _0000_TO01_OUTPUT_DELAY_0;
TOE0 |= _0002_TAU_CH1_OUTPUT_ENABLE;
/* Channel 3 is used as slave channel for PWM output function */
TMR03 = _0000_TAU_CLOCK_SELECT_CKM0 | _0000_TAU_CLOCK_MODE_CKS | _0000_TAU_COMBINATION_SLAVE |
_0400_TAU_TRIGGER_MASTER_INT | _0009_TAU_MODE_PWM_SLAVE;
TDR03 = _0000_TAU_TDR03_VALUE;
TOM0 |= _0008_TAU_CH3_OUTPUT_COMBIN;
TOL0 &= ~_0008_TAU_CH3_OUTPUT_LEVEL_L;
TO0 &= ~_0008_TAU_CH3_OUTPUT_VALUE_1;
PWMDLY1 |= _0000_TO03_OUTPUT_DELAY_0;
TOE0 |= _0008_TAU_CH3_OUTPUT_ENABLE;
/* Channel 7 is used as slave channel for PWM output function */
TMR07 = _0000_TAU_CLOCK_SELECT_CKM0 | _0000_TAU_CLOCK_MODE_CKS | _0000_TAU_COMBINATION_SLAVE |
_0400_TAU_TRIGGER_MASTER_INT | _0009_TAU_MODE_PWM_SLAVE;
TDR07 = _0000_TAU_TDR07_VALUE;
TOM0 |= _0080_TAU_CH7_OUTPUT_COMBIN;
TOL0 &= ~_0080_TAU_CH7_OUTPUT_LEVEL_L;
TO0 &= ~_0080_TAU_CH7_OUTPUT_VALUE_1;
PWMDLY1 |= _0000_TO07_OUTPUT_DELAY_0;
TOE0 |= _0080_TAU_CH7_OUTPUT_ENABLE;
/* Channel 2 used as interval timer */
TMR02 = _0000_TAU_CLOCK_SELECT_CKM0 | _0000_TAU_CLOCK_MODE_CKS | _0000_TAU_COMBINATION_SLAVE |
_0000_TAU_TRIGGER_SOFTWARE | _0000_TAU_MODE_INTERVAL_TIMER | _0000_TAU_START_INT_UNUSED;
TDR02 = _7CFF_TAU_TDR02_VALUE;
TOM0 &= ~_0004_TAU_CH2_OUTPUT_COMBIN;
TOL0 &= ~_0004_TAU_CH2_OUTPUT_LEVEL_L;
TO0 &= ~_0004_TAU_CH2_OUTPUT_VALUE_1;
TOE0 &= ~_0004_TAU_CH2_OUTPUT_ENABLE;
/* Set TO01 pin */
P3 &= 0xFEU;
PM3 &= 0xFEU;
/* Set TO03 pin */
P12 &= 0xDFU;
PM12 &= 0xDFU;
/* Set TO07 pin */
POM12 &= 0xFEU;
P12 &= 0xFEU;
PM12 &= 0xFEU;
}
/***********************************************************************************************************************
* Function Name: R_TAU0_Channel0_Start
* Description : This function starts TAU0 channel 0 counter.
* Arguments : None
* Return Value : None
***********************************************************************************************************************/
void R_TAU0_Channel0_Start(void)
{
TOE0 |= _0002_TAU_CH1_OUTPUT_ENABLE | _0008_TAU_CH3_OUTPUT_ENABLE | _0080_TAU_CH7_OUTPUT_ENABLE;
TS0 |= _0001_TAU_CH0_START_TRG_ON | _0002_TAU_CH1_START_TRG_ON | _0008_TAU_CH3_START_TRG_ON |
_0080_TAU_CH7_START_TRG_ON;
}
/***********************************************************************************************************************
* Function Name: R_TAU0_Channel0_Stop
* Description : This function stops TAU0 channel 0 counter.
* Arguments : None
* Return Value : None
***********************************************************************************************************************/
void R_TAU0_Channel0_Stop(void)
{
TT0 |= _0001_TAU_CH0_STOP_TRG_ON | _0002_TAU_CH1_STOP_TRG_ON | _0008_TAU_CH3_STOP_TRG_ON |
_0080_TAU_CH7_STOP_TRG_ON;
TOE0 &= ~_0002_TAU_CH1_OUTPUT_ENABLE & ~_0008_TAU_CH3_OUTPUT_ENABLE & ~_0080_TAU_CH7_OUTPUT_ENABLE;
}
/***********************************************************************************************************************
* Function Name: R_TAU0_Channel2_Start
* Description : This function starts TAU0 channel 2 counter.
* Arguments : None
* Return Value : None
***********************************************************************************************************************/
void R_TAU0_Channel2_Start(void)
{
TMIF02 = 0U; /* clear INTTM02 interrupt flag */
TMMK02 = 0U; /* enable INTTM02 interrupt */
TS0 |= _0004_TAU_CH2_START_TRG_ON;
}
/***********************************************************************************************************************
* Function Name: R_TAU0_Channel2_Stop
* Description : This function stops TAU0 channel 2 counter.
* Arguments : None
* Return Value : None
***********************************************************************************************************************/
void R_TAU0_Channel2_Stop(void)
{
TT0 |= _0004_TAU_CH2_STOP_TRG_ON;
/* Mask channel 2 interrupt */
TMMK02 = 1U; /* disable INTTM02 interrupt */
TMIF02 = 0U; /* clear INTTM02 interrupt flag */
}
/***********************************************************************************************************************
* Function Name: R_TMR_RJ0_Create
* Description : This function initializes the TMRJ0 module.
* Arguments : None
* Return Value : None
***********************************************************************************************************************/
void R_TMR_RJ0_Create(void)
{
TRJ0EN = 1U; /* enable input clock supply */
TRJCR0 &= (uint8_t)~_01_TMRJ_COUNT_START; /* disable TMRJ0 operation */
TRJMK0 = 1U; /* disable INTTRJ0 interrupt */
TRJIF0 = 0U; /* clear INTTRJ0 interrupt flag */
/* Set INTTRJ0 low priority */
TRJPR10 = 1U;
TRJPR00 = 1U;
TRJMR0 = _00_TMRJ_MODE_TIMER | _00_TMRJ_COUNT_SOURCE_FCLK;
TRJIOC0 = _00_TMRJ_TRJIOC_INITIAL_VALUE;
TRJ0 = _0C7F_TMRJ_TRJ0_VALUE;
}
/***********************************************************************************************************************
* Function Name: R_TMR_RJ0_Start
* Description : This function starts TMRJ0 counter.
* Arguments : None
* Return Value : None
***********************************************************************************************************************/
void R_TMR_RJ0_Start(void)
{
TRJIF0 = 0U; /* clear INTTRJ0 interrupt flag */
TRJMK0 = 0U; /* enable INTTRJ0 interrupt */
TRJCR0 |= _01_TMRJ_COUNT_START; /* enable TMRJ operation */
}
/***********************************************************************************************************************
* Function Name: R_TMR_RJ0_Stop
* Description : This function stops TMRJ0 counter.
* Arguments : None
* Return Value : None
***********************************************************************************************************************/
void R_TMR_RJ0_Stop(void)
{
TRJCR0 &= (uint8_t)~_01_TMRJ_COUNT_START; /* disable TMRJ operation */
TRJMK0 = 1U; /* disable INTTRJ0 interrupt */
TRJIF0 = 0U; /* clear INTTRJ0 interrupt flag */
}
/* Start user code for adding. Do not edit comment generated here */
/* End user code. Do not edit comment generated here */

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/***********************************************************************************************************************
* DISCLAIMER
* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
* applicable laws, including copyright laws.
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
* of this software. By using this software, you agree to the additional terms and conditions found by accessing the
* following link:
* http://www.renesas.com/disclaimer
*
* Copyright (C) 2012, 2021 Renesas Electronics Corporation. All rights reserved.
***********************************************************************************************************************/
/***********************************************************************************************************************
* File Name : r_cg_timer_user.c
* Version : CodeGenerator for RL78/F13 V2.03.07.02 [08 Nov 2021]
* Device(s) : R5F10AGC
* Tool-Chain : CCRL
* Description : This file implements device driver for TAU module.
* Creation Date: 2023-11-14
***********************************************************************************************************************/
/***********************************************************************************************************************
Includes
***********************************************************************************************************************/
#include "r_cg_macrodriver.h"
#include "r_cg_timer.h"
/* Start user code for include. Do not edit comment generated here */
#include "appTask.h"
/* End user code. Do not edit comment generated here */
#include "r_cg_userdefine.h"
/***********************************************************************************************************************
Pragma directive
***********************************************************************************************************************/
#pragma interrupt r_tau0_channel2_interrupt(vect=INTTM02)
#pragma interrupt r_tmr_rj0_interrupt(vect=INTTRJ0)
/* Start user code for pragma. Do not edit comment generated here */
/* End user code. Do not edit comment generated here */
/***********************************************************************************************************************
Global variables and functions
***********************************************************************************************************************/
/* Start user code for global. Do not edit comment generated here */
/* End user code. Do not edit comment generated here */
/***********************************************************************************************************************
* Function Name: r_tau0_channel2_interrupt
* Description : This function is INTTM02 interrupt service routine.
* Arguments : None
* Return Value : None
***********************************************************************************************************************/
static void __near r_tau0_channel2_interrupt(void)
{
/* Start user code. Do not edit comment generated here */
Timer_Pro();
/* End user code. Do not edit comment generated here */
}
/***********************************************************************************************************************
* Function Name: r_tmr_rj0_interrupt
* Description : This function is INTTRJ0 interrupt service routine.
* Arguments : None
* Return Value : None
***********************************************************************************************************************/
static void __near r_tmr_rj0_interrupt(void)
{
/* Start user code. Do not edit comment generated here */
/* End user code. Do not edit comment generated here */
}
/* Start user code for adding. Do not edit comment generated here */
/* End user code. Do not edit comment generated here */

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/***********************************************************************************************************************
* DISCLAIMER
* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
* applicable laws, including copyright laws.
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
* of this software. By using this software, you agree to the additional terms and conditions found by accessing the
* following link:
* http://www.renesas.com/disclaimer
*
* Copyright (C) 2012, 2021 Renesas Electronics Corporation. All rights reserved.
***********************************************************************************************************************/
/***********************************************************************************************************************
* File Name : r_cg_userdefine.h
* Version : CodeGenerator for RL78/F13 V2.03.07.02 [08 Nov 2021]
* Device(s) : R5F10AGC
* Tool-Chain : CCRL
* Description : This file includes user definition.
* Creation Date: 2023-11-14
***********************************************************************************************************************/
#ifndef _USER_DEF_H
#define _USER_DEF_H
/***********************************************************************************************************************
User definitions
***********************************************************************************************************************/
/* Start user code for function. Do not edit comment generated here */
#define RLIN_Master
/* End user code. Do not edit comment generated here */
#endif

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/***********************************************************************************************************************
* DISCLAIMER
* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
* applicable laws, including copyright laws.
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
* of this software. By using this software, you agree to the additional terms and conditions found by accessing the
* following link:
* http://www.renesas.com/disclaimer
*
* Copyright (C) 2012, 2021 Renesas Electronics Corporation. All rights reserved.
***********************************************************************************************************************/
/***********************************************************************************************************************
* File Name : r_cg_wdt.c
* Version : CodeGenerator for RL78/F13 V2.03.07.02 [08 Nov 2021]
* Device(s) : R5F10AGC
* Tool-Chain : CCRL
* Description : This file implements device driver for WDT module.
* Creation Date: 2023-11-14
***********************************************************************************************************************/
/***********************************************************************************************************************
Includes
***********************************************************************************************************************/
#include "r_cg_macrodriver.h"
#include "r_cg_wdt.h"
/* Start user code for include. Do not edit comment generated here */
/* End user code. Do not edit comment generated here */
#include "r_cg_userdefine.h"
/***********************************************************************************************************************
Pragma directive
***********************************************************************************************************************/
/* Start user code for pragma. Do not edit comment generated here */
/* End user code. Do not edit comment generated here */
/***********************************************************************************************************************
Global variables and functions
***********************************************************************************************************************/
/* Start user code for global. Do not edit comment generated here */
/* End user code. Do not edit comment generated here */
/***********************************************************************************************************************
* Function Name: R_WDT_Create
* Description : This function initializes the watchdogtimer.
* Arguments : None
* Return Value : None
***********************************************************************************************************************/
void R_WDT_Create(void)
{
WDTIMK = 1U; /* disable INTWDTI interrupt */
WDTIIF = 0U; /* clear INTWDTI interrupt flag */
/* Set INTWDTI low priority */
WDTIPR1 = 1U;
WDTIPR0 = 1U;
WDTIMK = 0U; /* enable INTWDTI interrupt */
}
/***********************************************************************************************************************
* Function Name: R_WDT_Restart
* Description : This function restarts the watchdog timer.
* Arguments : None
* Return Value : None
***********************************************************************************************************************/
void R_WDT_Restart(void)
{
WDTE = 0xACU; /* restart watchdog timer */
}
/* Start user code for adding. Do not edit comment generated here */
/* End user code. Do not edit comment generated here */

52
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/***********************************************************************************************************************
* DISCLAIMER
* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
* applicable laws, including copyright laws.
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
* of this software. By using this software, you agree to the additional terms and conditions found by accessing the
* following link:
* http://www.renesas.com/disclaimer
*
* Copyright (C) 2012, 2021 Renesas Electronics Corporation. All rights reserved.
***********************************************************************************************************************/
/***********************************************************************************************************************
* File Name : r_cg_wdt.h
* Version : CodeGenerator for RL78/F13 V2.03.07.02 [08 Nov 2021]
* Device(s) : R5F10AGC
* Tool-Chain : CCRL
* Description : This file implements device driver for WDT module.
* Creation Date: 2023-11-14
***********************************************************************************************************************/
#ifndef WDT_H
#define WDT_H
/***********************************************************************************************************************
Macro definitions (Register bit)
***********************************************************************************************************************/
/***********************************************************************************************************************
Macro definitions
***********************************************************************************************************************/
/***********************************************************************************************************************
Typedef definitions
***********************************************************************************************************************/
/***********************************************************************************************************************
Global functions
***********************************************************************************************************************/
void R_WDT_Create(void);
void R_WDT_Restart(void);
/* Start user code for function. Do not edit comment generated here */
/* End user code. Do not edit comment generated here */
#endif

64
BCZT/r_cg_wdt_user.c Normal file
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/***********************************************************************************************************************
* DISCLAIMER
* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
* applicable laws, including copyright laws.
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
* of this software. By using this software, you agree to the additional terms and conditions found by accessing the
* following link:
* http://www.renesas.com/disclaimer
*
* Copyright (C) 2012, 2021 Renesas Electronics Corporation. All rights reserved.
***********************************************************************************************************************/
/***********************************************************************************************************************
* File Name : r_cg_wdt_user.c
* Version : CodeGenerator for RL78/F13 V2.03.07.02 [08 Nov 2021]
* Device(s) : R5F10AGC
* Tool-Chain : CCRL
* Description : This file implements device driver for WDT module.
* Creation Date: 2023-11-14
***********************************************************************************************************************/
/***********************************************************************************************************************
Includes
***********************************************************************************************************************/
#include "r_cg_macrodriver.h"
#include "r_cg_wdt.h"
/* Start user code for include. Do not edit comment generated here */
/* End user code. Do not edit comment generated here */
#include "r_cg_userdefine.h"
/***********************************************************************************************************************
Pragma directive
***********************************************************************************************************************/
#pragma interrupt r_wdt_interrupt(vect=INTWDTI)
/* Start user code for pragma. Do not edit comment generated here */
/* End user code. Do not edit comment generated here */
/***********************************************************************************************************************
Global variables and functions
***********************************************************************************************************************/
/* Start user code for global. Do not edit comment generated here */
/* End user code. Do not edit comment generated here */
/***********************************************************************************************************************
* Function Name: r_wdt_interrupt
* Description : This function is INTWDTI interrupt service routine.
* Arguments : None
* Return Value : None
***********************************************************************************************************************/
static void __near r_wdt_interrupt(void)
{
/* Start user code. Do not edit comment generated here */
/* End user code. Do not edit comment generated here */
}
/* Start user code for adding. Do not edit comment generated here */
/* End user code. Do not edit comment generated here */

89
BCZT/r_main.c Normal file
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/***********************************************************************************************************************
* DISCLAIMER
* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
* applicable laws, including copyright laws.
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
* of this software. By using this software, you agree to the additional terms and conditions found by accessing the
* following link:
* http://www.renesas.com/disclaimer
*
* Copyright (C) 2012, 2021 Renesas Electronics Corporation. All rights reserved.
***********************************************************************************************************************/
/***********************************************************************************************************************
* File Name : r_main.c
* Version : CodeGenerator for RL78/F13 V2.03.07.02 [08 Nov 2021]
* Device(s) : R5F10AGC
* Tool-Chain : CCRL
* Description : This file implements main function.
* Creation Date: 2023-11-14
***********************************************************************************************************************/
/***********************************************************************************************************************
Includes
***********************************************************************************************************************/
#include "r_cg_macrodriver.h"
#include "r_cg_cgc.h"
#include "r_cg_port.h"
#include "r_cg_adc.h"
#include "r_cg_timer.h"
#include "r_cg_wdt.h"
/* Start user code for include. Do not edit comment generated here */
#include "appTask.h"
/* End user code. Do not edit comment generated here */
#include "r_cg_userdefine.h"
/***********************************************************************************************************************
Pragma directive
***********************************************************************************************************************/
/* Start user code for pragma. Do not edit comment generated here */
/* End user code. Do not edit comment generated here */
/***********************************************************************************************************************
Global variables and functions
***********************************************************************************************************************/
/* Start user code for global. Do not edit comment generated here */
/* End user code. Do not edit comment generated here */
void R_MAIN_UserInit(void);
/***********************************************************************************************************************
* Function Name: main
* Description : This function implements main function.
* Arguments : None
* Return Value : None
***********************************************************************************************************************/
void main(void)
{
R_MAIN_UserInit();
/* Start user code. Do not edit comment generated here */
value_init();
while (1U)
{
Apply_task();
}
/* End user code. Do not edit comment generated here */
}
/***********************************************************************************************************************
* Function Name: R_MAIN_UserInit
* Description : This function adds user code before implementing main function.
* Arguments : None
* Return Value : None
***********************************************************************************************************************/
void R_MAIN_UserInit(void)
{
/* Start user code. Do not edit comment generated here */
EI();
/* End user code. Do not edit comment generated here */
}
/* Start user code for adding. Do not edit comment generated here */
/* End user code. Do not edit comment generated here */

94
BCZT/r_systeminit.c Normal file
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/***********************************************************************************************************************
* DISCLAIMER
* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
* applicable laws, including copyright laws.
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
* of this software. By using this software, you agree to the additional terms and conditions found by accessing the
* following link:
* http://www.renesas.com/disclaimer
*
* Copyright (C) 2012, 2021 Renesas Electronics Corporation. All rights reserved.
***********************************************************************************************************************/
/***********************************************************************************************************************
* File Name : r_systeminit.c
* Version : CodeGenerator for RL78/F13 V2.03.07.02 [08 Nov 2021]
* Device(s) : R5F10AGC
* Tool-Chain : CCRL
* Description : This file implements system initializing function.
* Creation Date: 2023-11-14
***********************************************************************************************************************/
/***********************************************************************************************************************
Includes
***********************************************************************************************************************/
#include "r_cg_macrodriver.h"
#include "r_cg_cgc.h"
#include "r_cg_port.h"
#include "r_cg_adc.h"
#include "r_cg_timer.h"
#include "r_cg_wdt.h"
/* Start user code for include. Do not edit comment generated here */
/* End user code. Do not edit comment generated here */
#include "r_cg_userdefine.h"
/***********************************************************************************************************************
Pragma directive
***********************************************************************************************************************/
/* Start user code for pragma. Do not edit comment generated here */
/* End user code. Do not edit comment generated here */
/***********************************************************************************************************************
Global variables and functions
***********************************************************************************************************************/
/* Start user code for global. Do not edit comment generated here */
/* End user code. Do not edit comment generated here */
/***********************************************************************************************************************
* Function Name: R_Systeminit
* Description : This function initializes every macro.
* Arguments : None
* Return Value : None
***********************************************************************************************************************/
void R_Systeminit(void)
{
/* Set periperal I/O redirection */
PIOR0 = 0x00U;
PIOR1 = 0x00U;
PIOR4 = 0x00U;
PIOR5 = 0x00U;
PIOR7 = 0x02U;
R_CGC_Get_ResetSource();
R_CGC_Create();
R_PORT_Create();
R_ADC_Create();
R_TAU0_Create();
R_WDT_Create();
R_TMR_RJ0_Create();
/* Set invalid memory access detection control */
IAWCTL = 0x00U;
}
/***********************************************************************************************************************
* Function Name: hdwinit
* Description : This function initializes hardware setting.
* Arguments : None
* Return Value : None
***********************************************************************************************************************/
void hdwinit(void)
{
DI();
R_Systeminit();
}
/* Start user code for adding. Do not edit comment generated here */
/* End user code. Do not edit comment generated here */

77
BCZT/stkinit.asm Normal file
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;/**********************************************************************************************************************
; * DISCLAIMER
; * This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No
; * other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
; * applicable laws, including copyright laws.
; * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
; * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY,
; * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM
; * EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES
; * SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO
; * THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
; * Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of
; * this software. By using this software, you agree to the additional terms and conditions found by accessing the
; * following link:
; * http://www.renesas.com/disclaimer
; *
; * Copyright (C) 2020 Renesas Electronics Corporation. All rights reserved.
; *********************************************************************************************************************/;---------------------------------------------------------------------
; _stkinit
;
; void _stkinit(void __near * stackbss);
;
; input:
; stackbss = AX (#LOWW(_stackend))
; output:
; NONE
;---------------------------------------------------------------------
; NOTE : THIS IS A TYPICAL EXAMPLE.
.PUBLIC _stkinit
.textf .CSEG TEXTF
_stkinit:
MOVW HL,AX ; stack_end_addr
MOV [SP+3],#0x00 ; [SP+0]-[SP+2] for return address
MOVW AX,SP
SUBW AX,HL ; SUBW AX,#LOWW _@STEND
BNH $LSTINIT3 ; goto end
SHRW AX,5 ; loop count for 32 byte transfer
MOVW BC,AX
CLRW AX
LSTINIT1:
CMPW AX,BC
BZ $LSTINIT2
MOVW [HL],AX
MOVW [HL+2],AX
MOVW [HL+4],AX
MOVW [HL+6],AX
MOVW [HL+8],AX
MOVW [HL+10],AX
MOVW [HL+12],AX
MOVW [HL+14],AX
MOVW [HL+16],AX
MOVW [HL+18],AX
MOVW [HL+20],AX
MOVW [HL+22],AX
MOVW [HL+24],AX
MOVW [HL+26],AX
MOVW [HL+28],AX
MOVW [HL+30],AX
XCHW AX,HL
ADDW AX,#0x20
XCHW AX,HL
DECW BC
BR $LSTINIT1
LSTINIT2:
MOVW AX,SP
CMPW AX,HL
BZ $LSTINIT3 ; goto end
CLRW AX
MOVW [HL],AX
INCW HL
INCW HL
BR $LSTINIT2
LSTINIT3:
RET

900
BCZT/user/MotorCtrl.c Normal file
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#include "MotorCtrl.h"
#include "hwCtrl.h"
#include "PINdef.h"
#include "appTask.h"
#include "pfdl.h"
uint8_t MotorState[6],MotorStateReal[6];
uint16_t MotorHallLoc[6],MotorHardStop1[6],MotorHardStop2[6];
uint8_t MotorLearnState[6];
uint8_t MotorErr[6];
uint16_t current1,current2,current3;
static uint8_t AutoCalState;
uint8_t EEL_SAVE_REQUIRE_FLAG;
uint16_t EEL_SAVE_Counter;
#define OVMOTORKB 1
#define OVMOTORZY 2
uint8_t OC1flag,OC2flag,OC3flag;
typedef struct
{
uint16_t MotorStopLoc1;
uint16_t MotorStopLoc2;
uint16_t MotorNowLoc;
}MOTOR_DATA;
MOTOR_DATA MotorData[6];
uint16_t MemoryLoc[3][6];
typedef struct
{
uint16_t start_flag;
MOTOR_DATA MotorData[6];
uint16_t MemoryLoc[3][6];
uint16_t checksum;
uint16_t stop_flag;
}MEMORY_DATA;
MEMORY_DATA MemoryData;
uint16_t GetCheckSum(uint16_t * addr,uint8_t len)
{
uint16_t sum=0;
while (len --)
{
sum += *addr;
}
sum ^= 0xffff;
return sum;
}
#define START_FLAG 0x55aa
#define STOP_FLAG 0xaa55
void WriteMotorMemory(void)
{
uint8_t i;
if (EEL_SAVE_REQUIRE_FLAG == 0 || EEL_SAVE_Counter > 0)
{
return;
}
MemoryData.start_flag = START_FLAG;
MemoryData.stop_flag = STOP_FLAG;
for (i = 0; i < 6; i++)
{
MemoryData.MotorData[i].MotorNowLoc = MotorHallLoc[i];
MemoryData.MotorData[i].MotorStopLoc1 = MotorHardStop1[i];
MemoryData.MotorData[i].MotorStopLoc2 = MotorHardStop2[i];
MemoryData.MemoryLoc[0][i] = MemoryLoc[0][i];
MemoryData.MemoryLoc[1][i] = MemoryLoc[1][i];
MemoryData.MemoryLoc[2][i] = MemoryLoc[2][i];
}
MemoryData.checksum = GetCheckSum(&MemoryData.MotorData[0].MotorStopLoc1,36);
if(WriteDataflash(&MemoryData,0x000F1000,sizeof(MemoryData)) == 0x11)
{
EEL_SAVE_REQUIRE_FLAG=0;
}
}
void ReadMotorMemory(void)
{
uint16_t checksum;
uint8_t i;
ReadFlashData(&MemoryData,0x000F1000,sizeof(MemoryData));
checksum = GetCheckSum(&MemoryData.MotorData[0].MotorStopLoc1,36);
if (MemoryData.start_flag == START_FLAG && MemoryData.stop_flag == STOP_FLAG && checksum == MemoryData.checksum)//
{
for (i = 0; i < 6; i++)
{
MotorHallLoc[i] = MemoryData.MotorData[i].MotorNowLoc;
MotorHardStop1[i] = MemoryData.MotorData[i].MotorStopLoc1;
MotorHardStop2[i] = MemoryData.MotorData[i].MotorStopLoc2;
MemoryLoc[0][i] = MemoryData.MemoryLoc[0][i];
MemoryLoc[1][i] = MemoryData.MemoryLoc[1][i];
MemoryLoc[2][i] = MemoryData.MemoryLoc[2][i];
}
}
else
{
for (i = 0; i < 6; i++)
{
MotorHallLoc[i] = 0x8000;
MotorHardStop1[i] = 0;
MotorHardStop2[i] = 0;
MemoryLoc[0][i] = 0;
MemoryLoc[1][i] = 0;
MemoryLoc[2][i] = 0;
}
}
}
void MotorValueInit(void)
{
uint8_t i;
for (i = 0; i < 6; i++)
{
MotorHallLoc[i] = 0x8000;
MotorErr[i] = 0;
}
ReadMotorMemory();
}
void setMotorState(uint8_t motorid,uint8_t act)
{
//motorid-=1;
if (act <= ACT_XH && motorid < 6)
{
MotorState[motorid] = act;
}
}
uint16_t MotorTarget[6] = 0;
void setMotorTarget(uint8_t motorid,uint16_t target)
{
MotorTarget[motorid] = target;
}
#define AUTOCAL_STOP 0
#define AUTOCAL_START 1
#define AUTOCAL_ACT1 2
#define AUTOCAL_ACT2 3
#define AUTOCAL_END 4
void StartAutoCal(void)
{
AutoCalState = AUTOCAL_START;
}
void StopAutoCal(void)
{
if (AutoCalState != AUTOCAL_STOP)
{
AutoCalState = AUTOCAL_STOP;
setMotorState(MOTOR1,ACT_NOACT);
setMotorState(MOTOR2,ACT_NOACT);
setMotorState(MOTOR3,ACT_NOACT);
setMotorState(MOTOR4,ACT_NOACT);
setMotorState(MOTOR5,ACT_NOACT);
setMotorState(MOTOR6,ACT_NOACT);
}
}
void AutoCalCtrl(void)
{
static uint16_t autocalcounter[3];
static uint8_t MotorArr1state,MotorArr2state,MotorArr3state;
static uint8_t wait1,wait2,wait3;
uint8_t i;
uint32_t temp;
switch (AutoCalState)
{
case AUTOCAL_STOP:
MotorArr1state = AUTOCAL_STOP;
MotorArr2state = AUTOCAL_STOP;
MotorArr3state = AUTOCAL_STOP;
return;
case AUTOCAL_START:
MotorArr1state = 1;
MotorArr2state = 1;
MotorArr3state = 1;
setMotorState(MOTOR1,ACT_XQ);
setMotorState(MOTOR3,ACT_XQ);
setMotorState(MOTOR5,ACT_XQ);
autocalcounter[0] = 0;
autocalcounter[1] = 0;
autocalcounter[2] = 0;
AutoCalState++;
for (i = 0; i < 6; i++)
{
MotorHardStop1[i] = 0;
MotorHardStop2[i] = 0;
MotorHallLoc[i] = 0x8000;
}
break;
case AUTOCAL_ACT1:
if (MotorArr1state == 0 && MotorArr2state == 0 && MotorArr3state == 0)
{
for (i = 0; i < 6; i++)
{
temp = MotorHardStop1[i];
temp += MotorHardStop2[i];
setMotorTarget(i,temp/2);
}
}
break;
case AUTOCAL_ACT2:
break;
default:
break;
}
//1
switch (MotorArr1state)
{
case 1://motor1 xq
autocalcounter[0]++;
if (MotorHardStop1[MOTOR1] != 0)
{
MotorArr1state++;
wait1 = 0;
setMotorState(MOTOR1,ACT_NOACT);
}
if (autocalcounter[0] > 3000 || MotorErr[MOTOR1] != 0)
{
MotorArr1state = 4;
wait1 = 0;
setMotorState(MOTOR1,ACT_NOACT);
}
break;
case 2://wait
wait1++;
if (wait1 > 50)
{
MotorArr1state++;
setMotorState(MOTOR1,ACT_XH);
autocalcounter[0] = 0;
}
break;
case 3://motor1 xh
autocalcounter[0]++;
if (MotorHardStop2[MOTOR1] != 0)
{
MotorArr1state++;
wait1 = 0;
setMotorState(MOTOR1,ACT_NOACT);
}
if (autocalcounter[0] > 3000 || MotorErr[MOTOR1] != 0)
{
MotorArr1state = 4;
wait1 = 0;
setMotorState(MOTOR1,ACT_NOACT);
}
break;
case 4://wait
wait1++;
if (wait1 > 50)
{
MotorArr1state++;
setMotorState(MOTOR2,ACT_XQ);
autocalcounter[0] = 0;
}
break;
case 5://motor2 xq
autocalcounter[0]++;
if (MotorHardStop1[MOTOR2] != 0)
{
MotorArr1state++;
wait1 = 0;
setMotorState(MOTOR2,ACT_NOACT);
}
if (autocalcounter[0] > 3000 || MotorErr[MOTOR2] != 0)
{
MotorArr1state = 0;
setMotorState(MOTOR2,ACT_NOACT);
}
break;
case 6://wait
wait1++;
if (wait1 > 50)
{
MotorArr1state++;
setMotorState(MOTOR2,ACT_XH);
autocalcounter[0] = 0;
}
break;
case 7:
autocalcounter[0]++;
if (MotorHardStop2[MOTOR2] != 0)
{
MotorArr1state=0;
wait1 = 0;
setMotorState(MOTOR2,ACT_NOACT);
}
if (autocalcounter[0] > 3000 || MotorErr[MOTOR2] != 0)
{
MotorArr1state = 0;
setMotorState(MOTOR2,ACT_NOACT);
}
break;
default:
break;
}
//2
switch (MotorArr2state)
{
case 1://motor3 xq
autocalcounter[1]++;
if (MotorHardStop1[MOTOR3] != 0)
{
MotorArr2state++;
wait2 = 0;
setMotorState(MOTOR3,ACT_NOACT);
}
if (autocalcounter[1] > 3000 || MotorErr[MOTOR3] != 0)
{
MotorArr2state = 4;
wait2 = 0;
setMotorState(MOTOR3,ACT_NOACT);
}
break;
case 2://wait
wait2++;
if (wait2 > 50)
{
MotorArr2state++;
setMotorState(MOTOR3,ACT_XH);
autocalcounter[1] = 0;
}
break;
case 3://motor3 xh
autocalcounter[1]++;
if (MotorHardStop2[MOTOR3] != 0)
{
MotorArr2state++;
wait2 = 0;
setMotorState(MOTOR3,ACT_NOACT);
}
if (autocalcounter[1] > 3000 || MotorErr[MOTOR3] != 0)
{
MotorArr2state = 4;
wait2 = 0;
setMotorState(MOTOR3,ACT_NOACT);
}
break;
case 4://wait
wait2++;
if (wait2 > 50)
{
MotorArr2state++;
setMotorState(MOTOR4,ACT_XQ);
autocalcounter[1] = 0;
}
break;
case 5://motor4 xq
autocalcounter[1]++;
if (MotorHardStop1[MOTOR4] != 0)
{
MotorArr2state++;
wait2 = 0;
setMotorState(MOTOR4,ACT_NOACT);
}
if (autocalcounter[1] > 3000 || MotorErr[MOTOR4] != 0)
{
MotorArr2state = 0;
setMotorState(MOTOR4,ACT_NOACT);
}
break;
case 6://wait
wait2++;
if (wait2 > 50)
{
MotorArr2state++;
setMotorState(MOTOR4,ACT_XH);
autocalcounter[1] = 0;
}
break;
case 7:
autocalcounter[1]++;
if (MotorHardStop2[MOTOR4] != 0)
{
MotorArr2state=0;
wait2 = 0;
setMotorState(MOTOR4,ACT_NOACT);
}
if (autocalcounter[1] > 3000 || MotorErr[MOTOR4] != 0)
{
MotorArr2state = 0;
setMotorState(MOTOR4,ACT_NOACT);
}
break;
default:
break;
}
switch (MotorArr3state)
{
case 1://motor5 xq
autocalcounter[2]++;
if (MotorHardStop1[MOTOR5] != 0)
{
MotorArr3state++;
wait3 = 0;
setMotorState(MOTOR5,ACT_NOACT);
}
if (autocalcounter[2] > 3000 || MotorErr[MOTOR5] != 0)
{
MotorArr3state = 4;
wait3 = 0;
setMotorState(MOTOR5,ACT_NOACT);
}
break;
case 2://wait
wait3++;
if (wait3 > 50)
{
MotorArr3state++;
setMotorState(MOTOR5,ACT_XH);
autocalcounter[2] = 0;
}
break;
case 3://motor5 xh
autocalcounter[2]++;
if (MotorHardStop2[MOTOR5] != 0)
{
MotorArr3state++;
wait3 = 0;
setMotorState(MOTOR5,ACT_NOACT);
}
if (autocalcounter[2] > 3000 || MotorErr[MOTOR5] != 0)
{
MotorArr3state = 4;
wait3 = 0;
setMotorState(MOTOR5,ACT_NOACT);
}
break;
case 4://wait
wait3++;
if (wait3 > 50)
{
MotorArr3state++;
setMotorState(MOTOR6,ACT_XQ);
autocalcounter[2] = 0;
}
break;
case 5://motor6 xq
autocalcounter[2]++;
if (MotorHardStop1[MOTOR6] != 0)
{
MotorArr3state++;
wait3 = 0;
setMotorState(MOTOR6,ACT_NOACT);
}
if (autocalcounter[2] > 3000 || MotorErr[MOTOR6] != 0)
{
MotorArr3state = 0;
setMotorState(MOTOR6,ACT_NOACT);
}
break;
case 6://wait
wait3++;
if (wait3 > 50)
{
MotorArr3state++;
setMotorState(MOTOR6,ACT_XH);
autocalcounter[2] = 0;
}
break;
case 7:
autocalcounter[2]++;
if (MotorHardStop2[MOTOR6] != 0)
{
MotorArr3state=0;
wait3 = 0;
setMotorState(MOTOR6,ACT_NOACT);
}
if (autocalcounter[2] > 3000 || MotorErr[MOTOR6] != 0)
{
MotorArr3state = 0;
setMotorState(MOTOR6,ACT_NOACT);
}
break;
default:
break;
}
}
uint8_t flagMotorMemoryKeyStart,flagMotorMemoryKeyLongPress,flagKEYM1press;
uint16_t countMotorMemoryKeyStart;
uint16_t countMotorMemoryKeyLongPress;
void MotorMemoryKeyMMPress(void)
{
flagMotorMemoryKeyLongPress = 1;
countMotorMemoryKeyLongPress = 0;
}
void MotorMemoryKeyMMRelease(void)
{
if (countMotorMemoryKeyLongPress >= 300)
{
flagMotorMemoryKeyLongPress = 2;
countMotorMemoryKeyLongPress = 500;
flagKEYM1press = 0;
}
else
{
flagMotorMemoryKeyStart = 1;
countMotorMemoryKeyStart = 0;
flagMotorMemoryKeyLongPress = 0;
countMotorMemoryKeyLongPress = 0;
}
}
void MotorMemoryKeyM1Press(void)
{
}
void MotorMemoryKeyM1Release(void)
{
uint8_t i;
if (flagMotorMemoryKeyLongPress == 2)
{
flagKEYM1press++;
if (flagKEYM1press >= 3)
{
StartAutoCal();
}
}
if (flagMotorMemoryKeyStart == 1)
{
flagMotorMemoryKeyStart = 0;
for (i = 0; i < 6; i++)
{
if (MotorHardStop1[i]!=0 && MotorHardStop2[i]!=0)
{
MemoryLoc[0][i] = MotorHallLoc[i];
}
EEL_SAVE_Counter = 1000;
EEL_SAVE_REQUIRE_FLAG = 1;
}
}
else
{
for (i = 0; i < 6; i++)
{
setMotorTarget(i,MemoryLoc[0][i]);
}
}
}
void MotorMemoryKeyM2Press(void)
{
}
void MotorMemoryKeyM2Release(void)
{
uint8_t i;
if (flagMotorMemoryKeyStart == 1)
{
flagMotorMemoryKeyStart = 0;
for (i = 0; i < 6; i++)
{
if (MotorHardStop1[i]!=0 && MotorHardStop2[i]!=0)
{
MemoryLoc[1][i] = MotorHallLoc[i];
}
}
EEL_SAVE_Counter = 1000;
EEL_SAVE_REQUIRE_FLAG = 1;
}
else
{
for (i = 0; i < 6; i++)
{
setMotorTarget(i,MemoryLoc[1][i]);
}
}
}
void MotorMemoryKeyM3Press(void)
{
}
void MotorMemoryKeyM3Release(void)
{
uint8_t i;
if (flagMotorMemoryKeyStart == 1)
{
flagMotorMemoryKeyStart = 0;
for (i = 0; i < 6; i++)
{
if (MotorHardStop1[i]!=0 && MotorHardStop2[i]!=0)
{
MemoryLoc[2][i] = MotorHallLoc[i];
}
}
EEL_SAVE_Counter = 1000;
EEL_SAVE_REQUIRE_FLAG = 1;
}
else
{
for (i = 0; i < 6; i++)
{
setMotorTarget(i,MemoryLoc[2][i]);
}
}
}
void MotorCtrl(void)//10ms
{
uint8_t i;
//WriteMotorMemory(); //TODO
AutoCalCtrl();
if (flagMotorMemoryKeyStart == 1)
{
countMotorMemoryKeyStart++;
if (countMotorMemoryKeyStart > 500)//5S
{
flagMotorMemoryKeyStart = 0;
countMotorMemoryKeyStart = 0;
}
}
if (flagMotorMemoryKeyLongPress == 1 && countMotorMemoryKeyLongPress < 1000)
{
countMotorMemoryKeyLongPress++;
}
if (flagMotorMemoryKeyLongPress == 2 && countMotorMemoryKeyLongPress > 0)
{
countMotorMemoryKeyLongPress--;
if (countMotorMemoryKeyLongPress == 0)
{
flagMotorMemoryKeyLongPress = 0;
}
}
if (OC1flag == 1)
{
OC1flag = 0;
if (MotorState[0] == ACT_XQ)
{
MotorHardStop1[0] = MotorHallLoc[0];
}
else if (MotorState[0] == ACT_XH)
{
MotorHardStop2[0] = MotorHallLoc[0];
}
else if (MotorState[1] == ACT_XQ)
{
MotorHardStop1[1] = MotorHallLoc[1];
}
else if (MotorState[1] == ACT_XH)
{
MotorHardStop2[1] = MotorHallLoc[1];
}
MotorState[MOTOR1] = ACT_NOACT;
MotorState[MOTOR2] = ACT_NOACT;
}
if (OC2flag == 1)
{
OC2flag = 0;
if (MotorState[2] == ACT_XQ)
{
MotorHardStop1[2] = MotorHallLoc[2];
}
else if (MotorState[2] == ACT_XH)
{
MotorHardStop2[2] = MotorHallLoc[2];
}
else if (MotorState[3] == ACT_XQ)
{
MotorHardStop1[3] = MotorHallLoc[3];
}
else if (MotorState[3] == ACT_XH)
{
MotorHardStop2[3] = MotorHallLoc[3];
}
MotorState[MOTOR3] = ACT_NOACT;
MotorState[MOTOR4] = ACT_NOACT;
}
if (OC3flag == 1)
{
OC3flag = 0;
if (MotorState[4] == ACT_XQ)
{
MotorHardStop1[4] = MotorHallLoc[4];
}
else if (MotorState[4] == ACT_XH)
{
MotorHardStop2[4] = MotorHallLoc[4];
}
else if (MotorState[5] == ACT_XQ)
{
MotorHardStop1[5] = MotorHallLoc[5];
}
else if (MotorState[5] == ACT_XH)
{
MotorHardStop2[5] = MotorHallLoc[5];
}
MotorState[MOTOR5] = ACT_NOACT;
MotorState[MOTOR6] = ACT_NOACT;
}
for (i = 0; i < 6; i++)
{
MotorStateReal[i] = MotorState[i];
if (MotorState[i] == ACT_NOACT && MotorHardStop1[i] != 0 && MotorHardStop2[i] != 0 )
{
if (MotorTarget[i]!=0 && MotorHardStop1[i] > MotorTarget[i] && MotorTarget[i] > MotorHardStop2[i])
{
if (MotorTarget[i] > MotorHallLoc[i]+10)
{
MotorStateReal[i] = ACT_XQ;
}
else if (MotorTarget[i] < MotorHallLoc[i]-10)
{
MotorStateReal[i] = ACT_XH;
}
else
{
MotorTarget[i] = 0;
}
}
}
else if (MotorHardStop1[i] != 0 && MotorHardStop2[i] != 0)
{
if (MotorHallLoc[i] > (MotorHardStop1[i]-20) && MotorStateReal[i] == ACT_XQ)
{
MotorStateReal[i] = ACT_NOACT;
}
if (MotorHallLoc[i] < (MotorHardStop2[i] + 20) && MotorStateReal[i] == ACT_XH)
{
MotorStateReal[i] = ACT_NOACT;
}
}
else
{
MotorTarget[i] = 0;
}
}
MOTOR1Ctrl(MotorStateReal[MOTOR1]);
MOTOR2Ctrl(MotorStateReal[MOTOR2]);
MOTOR3Ctrl(MotorStateReal[MOTOR3]);
MOTOR4Ctrl(MotorStateReal[MOTOR4]);
MOTOR5Ctrl(MotorStateReal[MOTOR5]);
MOTOR6Ctrl(MotorStateReal[MOTOR6]);
}
#define OC_10A 100
#define OC_500mS 500
#define OC_50mS 50
void CurrentDetecte(void)
{
static uint16_t OC_Count1=0,OC_Count2=0,OC_Count3 = 0;
current1 = getAdval(ADCH_RLY3);
current2 = getAdval(ADCH_RLY2);
current3 = getAdval(ADCH_RLY1);
if (current1 > 100U && OC1flag == 0)
{
OC_Count1++;
if (OC_Count1 >= 100)
{
OC_Count1 = 0;
OC1flag = 1;
}
}
else
{
OC_Count1 = 0;
}
if (current2 > 100U && OC2flag == 0)
{
OC_Count2++;
if (OC_Count2 >= 100)
{
OC_Count2 = 0;
OC2flag = 1;
}
}
else
{
OC_Count2 = 0;
}
if (current3 > 100U && OC3flag == 0)
{
OC_Count3++;
if (OC_Count3 >= 100)
{
OC_Count3 = 0;
OC3flag = 1;
}
}
else
{
OC_Count3 = 0;
}
}
void OverCurrentPro(uint8_t ovmotor)
{
}
#define HALLDELAYMAX 2
uint16_t HallErrorCount[6];
void HallDetecte(void)
{
static uint8_t HallLastState[6],HallDelay[6];
uint8_t i,hallstate;
for (i = 0; i < 6; i++)
{
hallstate = GetIOState(i+1);
if (hallstate != HallLastState[i])
{
HallDelay[i]++;
if (HallDelay[i] > HALLDELAYMAX)
{
if (MotorStateReal[i] == ACT_XQ)
{
MotorHallLoc[i]++;
}
else if (MotorStateReal[i] == ACT_XH)
{
MotorHallLoc[i]--;
}
HallLastState[i] = hallstate;
}
HallErrorCount[i] = 0;
MotorErr[i] = 0;
EEL_SAVE_Counter = 1000;
EEL_SAVE_REQUIRE_FLAG = 1;
}
else
{
HallDelay[i] = 0;
if (MotorStateReal[i] != ACT_NOACT)
{
HallErrorCount[i]++;
if (HallErrorCount[i] > 500)
{
HallErrorCount[i] = 500;
MotorErr[i] = 1;
}
}
}
}
if (EEL_SAVE_Counter > 0)
{
EEL_SAVE_Counter--;
}
}

37
BCZT/user/MotorCtrl.h Normal file
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#ifndef __MOTORCTRL_H__
#define __MOTORCTRL_H__
#include "r_cg_macrodriver.h"
#define MOTOR1 0
#define MOTOR2 1
#define MOTOR3 2
#define MOTOR4 3
#define MOTOR5 4
#define MOTOR6 5
void OverCurrentPro(uint8_t ovmotor);
void CurrentDetecte(void);
void MotorCtrl(void);
void HallDetecte(void);
void MotorValueInit(void);
void StartAutoCal(void);
void StopAutoCal(void);
void setMotorState(uint8_t motorid,uint8_t act);
void MotorMemoryKeyM1Press(void);
void MotorMemoryKeyM1Release(void);
void MotorMemoryKeyM2Press(void);
void MotorMemoryKeyM2Release(void);
void MotorMemoryKeyM3Press(void);
void MotorMemoryKeyM3Release(void);
void MotorMemoryKeyMMPress(void);
void MotorMemoryKeyMMRelease(void);
#endif

47
BCZT/user/PINdef.h Normal file
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#ifndef __PINDEF_H__
#define __PINDEF_H__
#include "iodefine.h"
#define SIGID_HALL1 1
#define SIGID_HALL2 2
#define SIGID_HALL3 3
#define SIGID_HALL4 4
#define SIGID_HALL5 5
#define SIGID_HALL6 6
#define IN_HALL1 P9_bit.no1
#define IN_HALL2 P9_bit.no0
#define IN_HALL3 P8_bit.no4
#define IN_HALL4 P8_bit.no5
#define IN_HALL5 P8_bit.no5
#define IN_HALL6 P8_bit.no3
#define OUT_RLY1P P14_bit.no0
#define OUT_RLY1N P0_bit.no0
#define OUT_RLY2P P7_bit.no3
#define OUT_RLY2N P13_bit.no0
#define OUT_RLY3P P7_bit.no1
#define OUT_RLY3N P7_bit.no2
#define OUT_RLY4P P3_bit.no2
#define OUT_RLY4N P7_bit.no0
#define OUT_RLY5P P1_bit.no6
#define OUT_RLY5N P1_bit.no7
#define OUT_RLY6P P3_bit.no1
#define OUT_RLY6N P1_bit.no5
#define OUT_LINEN P1_bit.no2
#define LIN_TXD P1_bit.no3
#define ADCH_RLY3 0
#define ADCH_RLY2 1
#define ADCH_RLY1 2
#define ADCH_BAT 3
#endif

393
BCZT/user/appTask.c Normal file
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/**
* @file appTask.c
* @author sunbeam
* @brief
* @version 0.1
* @date 2023-11-14
*
* @copyright Copyright (c) 2023
*
*/
#include "appTask.h"
#include "iodefine.h"
#include "r_cg_adc.h"
#include "PINdef.h"
#include "hwCtrl.h"
#include "MotorCtrl.h"
#include "RLIN_driver.h"
static uint8_t EEL_BUF[50];
unsigned char IGN_Voltage_error_flag, IGN_Voltage_error_count;
unsigned char Timer_1ms_flag;
unsigned char Timer_5ms_flag;
unsigned char Timer_10ms_flag;
unsigned char Timer_20ms_flag;
unsigned char Timer_50ms_flag;
unsigned char Timer_1000ms_flag;
/***************************************************/
static unsigned int EEL_SAVE_CNT_DOWN_TIMER;
static uint8_t EEL_SAVE_ENABLE;
MotorStateEE_Type MotorStateEE;
MotorStateEE_Type *pEE;
void MotorCtrl(void);
void HallDetecte(void);
void LIN_Task(void);
void TfJr_CtrlTask(void);
extern uint8_t OC1flag,OC2flag,OC3flag;
uint8_t TfState,JrState;
void Apply_task(void)
{
static uint8_t temp;
if (Timer_1ms_flag == 1)
{
Timer_1ms_flag = 0;
KeyScan();
HallDetecte();
CurrentDetecte();
if (EEL_SAVE_CNT_DOWN_TIMER > 0)
{
EEL_SAVE_CNT_DOWN_TIMER--;
}
}
if (Timer_5ms_flag == 1)
{
Timer_5ms_flag = 0;
KeyPro();
}
if (Timer_10ms_flag == 1)
{
Timer_10ms_flag = 0;
MotorCtrl();
LIN_Task();
}
if (Timer_20ms_flag == 1)
{
Timer_20ms_flag = 0;
}
if (Timer_50ms_flag == 1)
{
Timer_50ms_flag = 0;
TfJr_CtrlTask();
}
if (Timer_1000ms_flag == 1)
{
Timer_1000ms_flag = 0;
}
}
void LIN_Task(void)
{
static lin_sch_count=0;
switch (lin_sch_count)
{
case 0:
RLIN_Master_HeaderTransmit(0x00);
break;
case 1:
RLIN_Master_HeaderTransmit(0x01);
break;
case 2:
RLIN_Master_HeaderTransmit(0x02);
break;
default:
lin_sch_count = 0;
break;
}
lin_sch_count++;
if (lin_sch_count > 2)
{
lin_sch_count = 0;
}
}
unsigned char keybyte1,keybyte2;
void LIN_Rx_Handle(uint8_t pid,uint8_t *data)
{
uint8_t id = pid & 0x3f;
switch (id)
{
case 0x21:
/* code */
break;
case 0x01:
keybyte1 = data[0];
keybyte2 = data[1];
break;
default:
break;
}
}
void KeyPressLogic(uint8_t keyid)
{
switch (keyid)
{
case KEYID_MOTOR1_XQ:
setMotorState(MOTOR1,ACT_XQ);
break;
case KEYID_MOTOR1_XH:
setMotorState(MOTOR1,ACT_XH);
break;
case KEYID_MOTOR2_XQ:
setMotorState(MOTOR2,ACT_XQ);
break;
case KEYID_MOTOR2_XH:
setMotorState(MOTOR2,ACT_XH);
break;
case KEYID_MOTOR3_XQ:
setMotorState(MOTOR3,ACT_XQ);
break;
case KEYID_MOTOR3_XH:
setMotorState(MOTOR3,ACT_XH);
break;
case KEYID_MOTOR4_XQ:
setMotorState(MOTOR4,ACT_XQ);
break;
case KEYID_MOTOR4_XH:
setMotorState(MOTOR4,ACT_XH);
break;
case KEYID_MOTOR5_XQ:
setMotorState(MOTOR5,ACT_XQ);
break;
case KEYID_MOTOR5_XH:
setMotorState(MOTOR5,ACT_XH);
break;
case KEYID_MOTOR6_XQ:
setMotorState(MOTOR6,ACT_XQ);
break;
case KEYID_MOTOR6_XH:
setMotorState(MOTOR6,ACT_XH);
break;
case KEYID_MM:
MotorMemoryKeyMMPress();
break;
case KEYID_M1:
break;
case KEYID_M2:
break;
case KEYID_M3:
break;
default:
break;
}
}
void KeyReleaseLogic(uint8_t keyid)
{
switch (keyid)
{
case KEYID_MOTOR1_XQ:
setMotorState(MOTOR1,ACT_NOACT);
break;
case KEYID_MOTOR1_XH:
setMotorState(MOTOR1,ACT_NOACT);
break;
case KEYID_MOTOR2_XQ:
setMotorState(MOTOR2,ACT_NOACT);
break;
case KEYID_MOTOR2_XH:
setMotorState(MOTOR2,ACT_NOACT);
break;
case KEYID_MOTOR3_XQ:
setMotorState(MOTOR3,ACT_NOACT);
break;
case KEYID_MOTOR3_XH:
setMotorState(MOTOR3,ACT_NOACT);
break;
case KEYID_MOTOR4_XQ:
setMotorState(MOTOR4,ACT_NOACT);
break;
case KEYID_MOTOR4_XH:
setMotorState(MOTOR4,ACT_NOACT);
break;
case KEYID_MOTOR5_XQ:
setMotorState(MOTOR5,ACT_NOACT);
break;
case KEYID_MOTOR5_XH:
setMotorState(MOTOR5,ACT_NOACT);
break;
case KEYID_MOTOR6_XQ:
setMotorState(MOTOR6,ACT_NOACT);
break;
case KEYID_MOTOR6_XH:
setMotorState(MOTOR6,ACT_NOACT);
break;
case KEYID_MM:
MotorMemoryKeyMMRelease();
break;
case KEYID_M1:
MotorMemoryKeyM1Release();
break;
case KEYID_M2:
MotorMemoryKeyM2Release();
break;
case KEYID_M3:
MotorMemoryKeyM3Release();
break;
default:
break;
}
}
void KeyPro(void)
{
uint8_t keyid;
for (keyid = 0; keyid < 16; keyid++)
{
if (getKeyPressFlag(keyid))
{
KeyPressLogic(keyid+1);
StopAutoCal();
}
if (getKeyReleaseFlag(keyid))
{
KeyReleaseLogic(keyid+1);
}
}
}
void EEL_READ(void)
{
uint16_t checksum;
uint8_t *src,*des,i;
//ReadFlashData(EEL_BUF, 0x000F1000, sizeof(MotorStateEE));
pEE = (MotorStateEE_Type *)EEL_BUF;
checksum = pEE->kbsoft1 + pEE->kbsoft2 + pEE->kbnow + pEE->zysoft1 + pEE->zysoft2 + pEE->zynow;
if (pEE ->start == 0x55AA && pEE->stop == 0xAA55 && checksum == pEE->checksum)
{
des = &MotorStateEE;
src = EEL_BUF;
for (i = 0; i < sizeof(MotorStateEE); i++)
{
des[i] = src[i];
}
}
}
uint16_t SupplyVoltage;
void IGN_Voltage_Detect(void)
{
uint32_t adval;
//adval = getAdval(ADCH_IGN);
SupplyVoltage = (adval*57*5)>>10;
if (adval <= 305 )
{
IGN_Voltage_error_count++;
if (IGN_Voltage_error_count >= 250)
{
IGN_Voltage_error_count = 0;
IGN_Voltage_error_flag = 1;
}
}
else if (adval >= 592 )//16.5
{
IGN_Voltage_error_count++;
if (IGN_Voltage_error_count >= 250)
{
IGN_Voltage_error_count = 0;
IGN_Voltage_error_flag = 2;
}
}
else if (adval >= 323 && adval <= 574)
{
IGN_Voltage_error_count = 0;
IGN_Voltage_error_flag = 0;
}
if (IGN_Voltage_error_flag != 0)
{
// TAU0_Channel1_ChangeDuty(0);
}
}
void value_init(void)
{
R_TAU0_Channel0_Start();
R_TAU0_Channel2_Start();
R_ADC_Start();
R_ADC_Set_OperationOn();
R_TMR_RJ0_Start();
RLIN_Master_Init();
MotorValueInit();
}
void Timer_Pro(void)
{
static unsigned int Timer_1ms_tick_count;
Timer_1ms_tick_count++;
Timer_1ms_flag=1;
if(Timer_1ms_tick_count%5==0)
{
Timer_5ms_flag=1;
}
if(Timer_1ms_tick_count%10==0)
{
Timer_10ms_flag=1;
}
if(Timer_1ms_tick_count%20==0)
{
Timer_20ms_flag=1;
}
if(Timer_1ms_tick_count%50==0)
{
Timer_50ms_flag=1;
}
if(Timer_1ms_tick_count%1000==0)
{
Timer_1000ms_flag = 1;
}
if(Timer_1ms_tick_count>=5000)
{
Timer_1ms_tick_count=0;
}
}
const uint8_t TfDutyTable[4] = {0,100,80,50};
const uint8_t JrDutyTable[4] = {0,100,80,50};
void TfJr_CtrlTask(void)
{
if (JrState < 4)
{
SetJrDuty(TfDutyTable[JrState]);
}
if (TfState < 4)
{
SetTfDuty(TfDutyTable[TfState]);
}
}

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BCZT/user/appTask.h Normal file
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#ifndef _DMK_VF12_03_H
#define _DMK_VF12_03_H
#include "r_cg_macrodriver.h"
#include "r_cg_userdefine.h"
/***********************************************/
typedef struct{
unsigned int start;
unsigned int zysoft1;
unsigned int zysoft2;
unsigned int zynow;
unsigned int kbsoft1;
unsigned int kbsoft2;
unsigned int kbnow;
unsigned int checksum;
unsigned int stop;
}MotorStateEE_Type;
extern MotorStateEE_Type MotorStateEE;
extern unsigned int EEL_SAVE_CNT_DOWN_TIMER;
extern unsigned char Timer_1ms_flag;
extern unsigned char Timer_5ms_flag;
extern unsigned char Timer_10ms_flag;
extern unsigned char Timer_20ms_flag;
extern unsigned char Timer_50ms_flag;
extern unsigned char Timer_1000ms_flag;
void KeyPro(void);
void value_init(void);
void Timer_Pro(void);
void Apply_task(void);
void EEL_READ(void);
void IGN_Voltage_Detect(void);
#endif

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#include "hwCtrl.h"
#include "r_cg_port.h"
#include "iodefine.h"
#include "PINdef.h"
#include "r_cg_adc.h"
static uint8_t keystate[KEY_NUM] = {0,0,0,0,0,0};
static uint8_t keyPressFlag[KEY_NUM] = {0,0,0,0,0,0};
static uint8_t keyReleaseFlag[KEY_NUM] = {0,0,0,0,0,0};
static uint16_t keydelay[KEY_NUM] = {0,0,0,0,0,0};
extern uint16_t g_adval[3];
#define KEY_DELAY_TIMES 20 //20Ms
void ClearKeyState(void)
{
uint8_t i;
for (i = 0; i < KEY_NUM; i++)
{
keystate[i] = 0;
}
}
void setKeyPressFlag(uint8_t id)
{
if (id < KEY_NUM)
{
keyPressFlag[id] = KEY_PRESSED;
}
}
void setKeyReleaseFlag(uint8_t id)
{
if (id < KEY_NUM)
{
keyReleaseFlag[id] = KEY_PRESSED;
}
}
uint8_t getKeyPressFlag(uint8_t id)
{
uint8_t retVal = KEY_NOPRESSED;
if (id < KEY_NUM)
{
retVal = keyPressFlag[id];
keyPressFlag[id] = KEY_NOPRESSED;
}
return retVal;
}
uint8_t getKeyReleaseFlag(uint8_t id)
{
uint8_t retVal = KEY_NOPRESSED;
if (id < KEY_NUM)
{
retVal = keyReleaseFlag[id];
keyReleaseFlag[id] = KEY_NOPRESSED;
}
return retVal;
}
extern unsigned char keybyte1,keybyte2;
void KeyScan(void)
{
uint8_t i,key,key_nopress;
key_nopress = 0;
for (i = 0; i < KEY_NUM; i++)
{
if (i<8)
{
key = (keybyte1 & 0x01<<i)?1:0;
}
else
{
key = (keybyte2 & 0x01<<(i-8))?1:0;
}
//key = GetIOState(i+1);
if (key == KEY_PRESSED && keystate[i] == KEY_NOPRESSED)
{
keydelay[i]++;
if (keydelay[i] >= KEY_DELAY_TIMES)
{
keystate[i] = KEY_PRESSED;
setKeyPressFlag(i);
}
}
else if(key == KEY_NOPRESSED)
{
if (keydelay[i] > 0)
{
keydelay[i]--;
}
else
{
if (keystate[i] == KEY_PRESSED)
{
setKeyReleaseFlag(i);
}
keystate[i] = KEY_NOPRESSED;
key_nopress++;
}
}
}
}
uint8_t GetIOState(uint8_t keyno)
{
switch (keyno)
{
case SIGID_HALL1:
return IN_HALL1;
case SIGID_HALL2:
return IN_HALL2;
case SIGID_HALL3:
return IN_HALL3;
case SIGID_HALL4:
return IN_HALL4;
case SIGID_HALL5:
return IN_HALL5;
case SIGID_HALL6:
return IN_HALL6;
default:
return 0;
}
}
uint8_t GetKeyState(uint8_t keyno)
{
if (keyno > 0 && keyno <= 16)
{
return keystate[keyno-1];
}
return KEY_NOPRESSED;
}
#define OUT_OFF 0
#define OUT_ON 1
void MOTOR1Ctrl(uint8_t act)
{
switch (act)
{
case ACT_NOACT:
OUT_RLY1P = OUT_OFF;
OUT_RLY1N = OUT_OFF;
break;
case ACT_XH:
OUT_RLY1P = OUT_ON;
OUT_RLY1N = OUT_OFF;
break;
case ACT_XQ:
OUT_RLY1P = OUT_OFF;
OUT_RLY1N = OUT_ON;
break;
default:
break;
}
}
void MOTOR2Ctrl(uint8_t act)
{
switch (act)
{
case ACT_NOACT:
OUT_RLY2P = OUT_OFF;
OUT_RLY2N = OUT_OFF;
break;
case ACT_XH:
OUT_RLY2P = OUT_ON;
OUT_RLY2N = OUT_OFF;
break;
case ACT_XQ:
OUT_RLY2P = OUT_OFF;
OUT_RLY2N = OUT_ON;
break;
default:
break;
}
}
void MOTOR3Ctrl(uint8_t act)
{
switch (act)
{
case ACT_NOACT:
OUT_RLY3P = OUT_OFF;
OUT_RLY3N = OUT_OFF;
break;
case ACT_XH:
OUT_RLY3P = OUT_ON;
OUT_RLY3N = OUT_OFF;
break;
case ACT_XQ:
OUT_RLY3P = OUT_OFF;
OUT_RLY3N = OUT_ON;
break;
default:
break;
}
}
void MOTOR4Ctrl(uint8_t act)
{
switch (act)
{
case ACT_NOACT:
OUT_RLY4P = OUT_OFF;
OUT_RLY4N = OUT_OFF;
break;
case ACT_XH:
OUT_RLY4P = OUT_ON;
OUT_RLY4N = OUT_OFF;
break;
case ACT_XQ:
OUT_RLY4P = OUT_OFF;
OUT_RLY4N = OUT_ON;
break;
default:
break;
}
}
void MOTOR5Ctrl(uint8_t act)
{
switch (act)
{
case ACT_NOACT:
OUT_RLY5P = OUT_OFF;
OUT_RLY5N = OUT_OFF;
break;
case ACT_XH:
OUT_RLY5P = OUT_ON;
OUT_RLY5N = OUT_OFF;
break;
case ACT_XQ:
OUT_RLY5P = OUT_OFF;
OUT_RLY5N = OUT_ON;
break;
default:
break;
}
}
void MOTOR6Ctrl(uint8_t act)
{
switch (act)
{
case ACT_NOACT:
OUT_RLY6P = OUT_OFF;
OUT_RLY6N = OUT_OFF;
break;
case ACT_XH:
OUT_RLY6P = OUT_ON;
OUT_RLY6N = OUT_OFF;
break;
case ACT_XQ:
OUT_RLY6P = OUT_OFF;
OUT_RLY6N = OUT_ON;
break;
default:
break;
}
}
uint16_t getAdval(uint8_t ch)
{
if (ch < 3)
{
return g_adval[ch];
}
return 0;
}
void SetTfDuty(uint8_t duty)
{
uint32_t reg = 0U;
if (duty > 100U)
{
duty = 100U;
}
reg = TDR00;
reg = (reg + 1U) * duty / 100U;
TDR01 = (uint16_t)reg;
}
void SetJrDuty(uint8_t duty)
{
uint32_t reg = 0U;
if (duty > 100U)
{
duty = 100U;
}
reg = TDR00;
reg = (reg + 1U) * duty / 100U;
TDR03 = (uint16_t)reg;
TDR07 = (uint16_t)reg;
}

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#ifndef __HWCTRL_H__
#define __HWCTRL_H__
#include "r_cg_macrodriver.h"
#define KEY_PRESSED 1
#define KEY_NOPRESSED 0
#define KEY_NUM 16
#define ACT_NOACT 0
#define ACT_XQ 1
#define ACT_XH 2
#define KEYID_MOTOR1_XQ 13
#define KEYID_MOTOR1_XH 16
#define KEYID_MOTOR2_XQ 14
#define KEYID_MOTOR2_XH 15
#define KEYID_MOTOR3_XQ 9
#define KEYID_MOTOR3_XH 12
#define KEYID_MOTOR4_XQ 10
#define KEYID_MOTOR4_XH 11
#define KEYID_MOTOR5_XQ 1
#define KEYID_MOTOR5_XH 2
#define KEYID_MOTOR6_XQ 3
#define KEYID_MOTOR6_XH 4
#define KEYID_MM 5
#define KEYID_M1 8
#define KEYID_M2 7
#define KEYID_M3 6
void ad_handle(void);
uint16_t getAdval(uint8_t ch);
void KeyScan(void);
void ClearKeyState(void);
uint8_t GetKeyState(uint8_t keyno);
uint8_t getKeyReleaseFlag(uint8_t id);
uint8_t getKeyPressFlag(uint8_t id);
uint8_t GetIOState(uint8_t keyno);
void MOTOR1Ctrl(uint8_t act);
void MOTOR2Ctrl(uint8_t act);
void MOTOR3Ctrl(uint8_t act);
void MOTOR4Ctrl(uint8_t act);
void MOTOR5Ctrl(uint8_t act);
void MOTOR6Ctrl(uint8_t act);
void SetTfDuty(uint8_t duty);
void SetJrDuty(uint8_t duty);
#endif