diff --git a/code_app_out/.vscode/settings.json b/code_app_out/.vscode/settings.json new file mode 100644 index 0000000..2f89a08 --- /dev/null +++ b/code_app_out/.vscode/settings.json @@ -0,0 +1,6 @@ +{ + "files.associations": { + "key_app.h": "c", + "demm.h": "c" + } +} \ No newline at end of file diff --git a/code_app_out/Source/ComStack/AutoSarNm/CanNm/Bsw_Common.zip b/code_app_out/Source/ComStack/AutoSarNm/CanNm/Bsw_Common.zip new file mode 100644 index 0000000..b88ae22 Binary files /dev/null and b/code_app_out/Source/ComStack/AutoSarNm/CanNm/Bsw_Common.zip differ diff --git a/code_app_out/Source/ComStack/AutoSarNm/CanNm/CanNm.h b/code_app_out/Source/ComStack/AutoSarNm/CanNm/CanNm.h new file mode 100644 index 0000000..7273f04 --- /dev/null +++ b/code_app_out/Source/ComStack/AutoSarNm/CanNm/CanNm.h @@ -0,0 +1,244 @@ +/* BEGIN_FILE_HDR +******************************************************************************** +* NOTICE +* This software is the property of HiRain Technologies. Any information +* contained in this doc should not be reproduced, or used, or disclosed +* without the written authorization from HiRain Technologies. +******************************************************************************** +* File Name : CanNm.h +******************************************************************************** +* Project/Product : AUTOSAR 4.0 +* Title : CAN Network Management module head File +* Author : Hirain +******************************************************************************** +* Description : CAN Network Management module head File +* +******************************************************************************** +* Limitations : None +* +******************************************************************************** +* +******************************************************************************** +* Revision History: +* +* Version Date Initials CR# Descriptions +* --------- ---------- ------------ ---------- --------------- +* 01.00.00 02/09/2016 liya.zhu N/A Original +******************************************************************************** +* END_FILE_HDR*/ + +#ifndef _CANNM_H_ +#define _CANNM_H_ + + +/******************************************************************************* +* Includes +*******************************************************************************/ + +#include "CanNm_Lcfg.h" +#include "CanNm_PBcfg.h" +#include "compiler.h" +/********************************************************************************************************************** +* Functions +*********************************************************************************************************************/ + + +/*Development error code*/ +#define CANNM_E_NO_INIT ((uint8)0x01u) +#define CANNM_E_INVALID_CHANNEL ((uint8)0x02u) +#define CANNM_E_INVALID_PDUID ((uint8)0x03u) +#define CANNM_E_NET_START_IND ((uint8)0x04u) +#define CANNM_E_INIT_FAILED ((uint8)0x05u) +#define CANNM_E_NETWORK_TIMEOUT ((uint8)0x11u) +#define CANNM_E_PARAM_POINTER ((uint8)0x12u) + +#define CANNM_INIT_APIID ((uint8)0x00U) +#define CANNM_PASSIVESTARTUP_APIID ((uint8)0x01U) +#define CANNM_NETWORKREQUEST_APIID ((uint8)0x02U) +#define CANNM_NETWORKRELEAE_APIID ((uint8)0x03U) +#define CANNM_SETUSERDATA_APIID ((uint8)0x04U) +#define CANNM_GETUSERDATA_APIID ((uint8)0x05U) +#define CANNM_GETNODEID_APIID ((uint8)0x06U) +#define CANNM_GETLOCALNODEID_APIID ((uint8)0x07U) +#define CANNM_RPTMSGREQ_APIID ((uint8)0x08U) +#define CANNM_GETPDUDATA_APIID ((uint8)0x0AU) +#define CANNM_GETSTATE_APIID ((uint8)0x0BU) +#define CANNM_DISABLECOMM_APIID ((uint8)0x0CU) +#define CANNM_ENABLECOMM_APIID ((uint8)0x0DU) +#define CANNM_MAINFUNC_APIID ((uint8)0x13U) +#define CANNM_TRANSMIT_APIID ((uint8)0x14U) +#define CANNM_TXCFM_APIID ((uint8)0x40U) +#define CANNM_RXIND_APIID ((uint8)0x42U) +#define CANNM_REQBUSSYNCH_APIID ((uint8)0xC0U) +#define CANNM_CHECKRMTSLEEPIND_APIID ((uint8)0xD0U) +#define CANNM_GETVERSIONINFO_APIID ((uint8)0xF1U) + + +#include "MemMap.h" +/*[SWS_CanNm_00208]*/ +extern FUNC(void, CANNM_CODE) CanNm_Init +( P2CONST(CanNm_ConfigType, AUTOMATIC, CANNM_APPL_DATA) cannmConfigPtr ); +/*[SWS_CanNm_00211]*/ +extern FUNC(Std_ReturnType, CANNM_CODE) CanNm_PassiveStartUp +( + NetworkHandleType nmChannelHandle +); +extern FUNC(void, CANNM_CODE) CanNm_RxIndication +( + PduIdType RxPudId, + const uint16 RxId, + CONSTP2CONST(PduInfoType, AUTOMATIC, CANNM_APPL_DATA)PduInfoPtr +); +extern FUNC(void, CANNM_CODE) CanNm_TxConfirmation +( + PduIdType TxPudId +); +/*[SWS_CanNm_00257]*//*[SWS_CanNm_00260]*/ +#if(CANNM_PASSIVE_MODE_ENABLED == STD_OFF) +/*[SWS_CanNm_00213]*/ +extern FUNC(Std_ReturnType, CANNM_CODE) CanNm_NetworkRequest +( + NetworkHandleType nmChannelHandle +); +/*[SWS_CanNm_00214]*/ +extern FUNC(Std_ReturnType, CANNM_CODE) CanNm_NetworkRelease +( + NetworkHandleType nmChannelHandle +); +#endif +/*[SWS_CanNm_00262]*//*[SWS_CanNm_00264]*/ +#if(CANNM_COM_CONTROL_ENABLED == STD_ON) +/*[SWS_CanNm_00215]*/ +extern FUNC(Std_ReturnType, CANNM_CODE) CanNm_DisableCommunication +( + NetworkHandleType nmChannelHandle +); +/*[SWS_CanNm_00216]*/ +extern FUNC(Std_ReturnType, CANNM_CODE) CanNm_EnableCommunication +( + NetworkHandleType nmChannelHandle +); +#endif +/*[SWS_CanNm_00266]*/ +#if(CANNM_PASSIVE_MODE_ENABLED == STD_OFF) +/*[SWS_CanNm_00158]*/ +#if(CANNM_USER_DATA_ENABLED == STD_ON) +/*[SWS_CanNm_00327]*/ +#if(CANNM_COM_USER_DATA_SUPPORT == STD_OFF) +/*[SWS_CanNm_00217]*/ +extern FUNC(Std_ReturnType, CANNM_CODE) CanNm_SetUserData +( + NetworkHandleType nmChannelHandle, + P2CONST(uint8, AUTOMATIC, CANNM_APPL_DATA) nmUserDataPtr +); +#endif +#endif +#endif +/*[SWS_CanNm_00268]*/ +/*[SWS_CanNm_00158]*/ +#if(CANNM_USER_DATA_ENABLED == STD_ON) +/*[SWS_CanNm_00218]*/ +extern FUNC(Std_ReturnType, CANNM_CODE) CanNm_GetUserData +( + NetworkHandleType nmChannelHandle, + P2VAR(uint8, AUTOMATIC, CANNM_APPL_DATA) nmUserDataPtr +); +#endif +/*[SWS_CanNm_00330]*/ +#if(CANNM_COM_USER_DATA_SUPPORT == STD_ON) +/*[SWS_CanNm_00331]*/ +extern FUNC(Std_ReturnType, CANNM_CODE) CanNm_Transmit +( + PduIdType CanNmTxPduId, + P2CONST(PduInfoType, AUTOMATIC, CANNM_APPL_DATA) PduInfoPtr +); +#endif +/*[SWS_CanNm_00270]*//*[SWS_CanNm_00272]*/ +#if(CANNM_NODE_ID_ENABLED == STD_ON) +/*[SWS_CanNm_00219]*/ +extern FUNC(Std_ReturnType, CANNM_CODE) CanNm_GetNodeIdentifier +( + NetworkHandleType nmChannelHandle, + P2VAR(uint8, AUTOMATIC, CANNM_APPL_DATA) nmNodeIdPtr +); +/*[SWS_CanNm_00220]*/ +extern FUNC(Std_ReturnType, CANNM_CODE) CanNm_GetLocalNodeIdentifier +( + NetworkHandleType nmChannelHandle, + P2VAR(uint8, AUTOMATIC, CANNM_APPL_DATA) nmNodeIdPtr +); +#endif +#if(CANNM_PASSIVE_MODE_ENABLED == STD_OFF) +/*[SWS_CanNm_00274]*/ +/*[SWS_CanNm_00135]*/ +#if(CANNM_NODE_DETECTION_ENABLED == STD_ON) +/*[SWS_CanNm_00221]*/ +extern FUNC(Std_ReturnType, CANNM_CODE) CanNm_RepeatMessageRequest +( + NetworkHandleType nmChannelHandle +); +#endif +#endif +/*[SWS_CanNm_00276]*/ +#if((CANNM_NODE_DETECTION_ENABLED == STD_ON)||(CANNM_USER_DATA_ENABLED == STD_ON)||(CANNM_NODE_ID_ENABLED == STD_ON)) +/*[SWS_CanNm_00222]*/ +extern FUNC(Std_ReturnType, CANNM_CODE) CanNm_GetPduData +( + NetworkHandleType nmChannelHandle, + P2VAR(uint8, AUTOMATIC, CANNM_APPL_DATA) nmPduDataPtr +); +#endif +/*[SWS_CanNm_00223]*/ +extern FUNC(Std_ReturnType, CANNM_CODE) CanNm_GetState +( + NetworkHandleType nmChannelHandle, + P2VAR(Nm_StateType, AUTOMATIC, CANNM_APPL_DATA) nmStatePtr, + P2VAR(Nm_ModeType, AUTOMATIC, CANNM_APPL_DATA) nmModePtr +); +#if(CANNM_VERSION_INFO_API == STD_ON) +/*[SWS_CanNm_00224]*/ +extern FUNC(void, CANNM_CODE) CanNm_GetVersionInfo +( + P2VAR(Std_VersionInfoType, AUTOMATIC, CANNM_APPL_DATA) versioninfo +); +#endif +/*[SWS_CanNm_00280]*/ +#if(CANNM_PASSIVE_MODE_ENABLED == STD_OFF) +#if(CANNM_BUS_SYNCHRONIZATION_ENABLED == STD_ON) + +/*[SWS_CanNm_00226]*/ +extern FUNC(Std_ReturnType, CANNM_CODE) CanNm_RequestBusSynchronization +( + NetworkHandleType nmChannelHandle +); +#endif +/*[SWS_CanNm_00282]*/ +#if(CANNM_REMOTE_SLEEP_IND_ENABLED == STD_ON) +/*[SWS_CanNm_00227]*/ +extern FUNC(Std_ReturnType, CANNM_CODE) CanNm_CheckRemoteSleepIndication +( + NetworkHandleType nmChannelHandle, + P2VAR(boolean, AUTOMATIC, CANNM_APPL_DATA) nmRemoteSleepIndPtr +); +#endif +#endif +/*[SWS_CanNm_00340]*/ +#if(CANNM_COORDINATOR_SYNC_SUPPORT == STD_ON) +/*[SWS_CanNm_00338]*/ +extern FUNC(Std_ReturnType, CANNM_CODE) CanNm_SetSleepReadyBit +( + NetworkHandleType nmChannelHandle, + boolean nmSleepReadyBit +); +#endif +/*[SWS_CanNm_00234]*/ +extern FUNC(void, CANNM_CODE) CanNm_MainFunction +( + void +); +extern void CanNm_StartWbsTimer(uint8 nmChannelHandle); +#define CANNM_STOP_SEC_CODE +#include "MemMap.h" + +#endif/*_CANNM_H_*/ + diff --git a/code_app_out/Source/ComStack/AutoSarNm/CanNm/CanNm_Callout.c b/code_app_out/Source/ComStack/AutoSarNm/CanNm/CanNm_Callout.c new file mode 100644 index 0000000..d946e4a --- /dev/null +++ b/code_app_out/Source/ComStack/AutoSarNm/CanNm/CanNm_Callout.c @@ -0,0 +1,66 @@ +/* BEGIN_FILE_HDR +******************************************************************************** +* NOTICE +* This software is the property of HiRain Technologies. Any information +* contained in this doc should not be reproduced, or used, or disclosed +* without the written authorization from HiRain Technologies. +******************************************************************************** +* File Name : CanNm_Callout.c +******************************************************************************** +* Project/Product : AUTOSAR BSW PROJECT +* Title : CanNm module configuration File +* Author : Hirain +******************************************************************************** +* Description : CanNm module configuration File +* +******************************************************************************** +* Limitations : None +* +******************************************************************************** +* +******************************************************************************** +* Revision History: +* +* Version Date Initials CR# Descriptions +* --------- ---------- ------------ ---------- --------------- +* 04.03.02 12/09/2017 Geno N/A N/A +* +******************************************************************************** +* END_FILE_HDR*/ + + +/******************************************************************************* +* Includes +*******************************************************************************/ +#include "CanNm_Callout.h" +#include "Bsw_Common.h" + +#define CANNM_USER_DATA_LENGTH ((uint8)6u) + +#define CANNM_START_SEC_CODE +#include "MemMap.h" + +FUNC(void, CANNM_CODE) CanNm_SetUserDataCall +( + P2VAR(uint8, AUTOMATIC, CANNM_APPL_DATA) dataBuffPtr, + P2CONST(uint8, AUTOMATIC, CANNM_APPL_DATA) nmUserDataPtr +) +{ + Bsw_MemCpy(&dataBuffPtr[(CANNM_PDU_LENGTH - CANNM_USER_DATA_LENGTH)], nmUserDataPtr, + CANNM_USER_DATA_LENGTH); +} + + +FUNC(void, CANNM_CODE) CanNm_GetUserDataCall +( + P2CONST(uint8, AUTOMATIC, CANNM_APPL_DATA) dataBuffPtr, + P2VAR(uint8, AUTOMATIC, CANNM_APPL_DATA) nmUserDataPtr +) +{ + Bsw_MemCpy(nmUserDataPtr, &dataBuffPtr[(CANNM_PDU_LENGTH - CANNM_USER_DATA_LENGTH)], + CANNM_USER_DATA_LENGTH); +} + + +#define CANNM_STOP_SEC_CODE +#include "MemMap.h" diff --git a/code_app_out/Source/ComStack/AutoSarNm/CanNm/CanNm_Callout.h b/code_app_out/Source/ComStack/AutoSarNm/CanNm/CanNm_Callout.h new file mode 100644 index 0000000..2e8274e --- /dev/null +++ b/code_app_out/Source/ComStack/AutoSarNm/CanNm/CanNm_Callout.h @@ -0,0 +1,59 @@ +/* BEGIN_FILE_HDR +******************************************************************************** +* NOTICE +* This software is the property of HiRain Technologies. Any information +* contained in this doc should not be reproduced, or used, or disclosed +* without the written authorization from HiRain Technologies. +******************************************************************************** +* File Name : CanNm_Callout.h +******************************************************************************** +* Project/Product : AUTOSAR BSW PROJECT +* Title : CanNm module configuration File +* Author : Hirain +******************************************************************************** +* Description : CanNm module configuration File +* +******************************************************************************** +* Limitations : None +* +******************************************************************************** +* +******************************************************************************** +* Revision History: +* +* Version Date Initials CR# Descriptions +* --------- ---------- ------------ ---------- --------------- +* 04.03.02 12/09/2017 Geno N/A N/A +* +******************************************************************************** +* END_FILE_HDR*/ +#ifndef _CANNM_CALLOUT_H_ +#define _CANNM_CALLOUT_H_ + +/******************************************************************************* +* Includes +*******************************************************************************/ +#include "CanNm_Lcfg.h" + +#define CANNM_START_SEC_CODE +#include "MemMap.h" + +extern FUNC(void, CANNM_CODE) CanNm_SetUserDataCall +( + P2VAR(uint8, AUTOMATIC, CANNM_APPL_DATA) dataBuffPtr, + P2CONST(uint8, AUTOMATIC, CANNM_APPL_DATA) nmUserDataPtr +); + + +extern FUNC(void, CANNM_CODE) CanNm_GetUserDataCall +( + P2CONST(uint8, AUTOMATIC, CANNM_APPL_DATA) dataBuffPtr, + P2VAR(uint8, AUTOMATIC, CANNM_APPL_DATA) nmUserDataPtr +); + + +#define CANNM_STOP_SEC_CODE +#include "MemMap.h" + +#endif + diff --git a/code_app_out/Source/ComStack/AutoSarNm/CanNm/CanNm_Cbk.h b/code_app_out/Source/ComStack/AutoSarNm/CanNm/CanNm_Cbk.h new file mode 100644 index 0000000..19cc33f --- /dev/null +++ b/code_app_out/Source/ComStack/AutoSarNm/CanNm/CanNm_Cbk.h @@ -0,0 +1,64 @@ +/* BEGIN_FILE_HDR +******************************************************************************** +* NOTICE +* This software is the property of HiRain Technologies. Any information +* contained in this doc should not be reproduced, or used, or disclosed +* without the written authorization from HiRain Technologies. +******************************************************************************** +* File Name : CanNm_Cbk.h +******************************************************************************** +* Project/Product : AUTOSAR 4.0 +* Title : CAN Network Management module call back head File +* Author : Hirain +******************************************************************************** +* Description : CAN Network Management module call back head File +* +******************************************************************************** +* Limitations : None +* +******************************************************************************** +* +******************************************************************************** +* Revision History: +* +* Version Date Initials CR# Descriptions +* --------- ---------- ------------ ---------- --------------- +* 01.00.00 02/09/2016 liya.zhu N/A Original +******************************************************************************** +* END_FILE_HDR*/ + +#ifndef _CANNM_CBK_H_ +#define _CANNM_CBK_H_ + + +/******************************************************************************* +* Includes +*******************************************************************************/ +#include "CanNm_Types.h" +/********************************************************************************************************************** +* Functions +*********************************************************************************************************************/ +#define CANNM_START_SEC_CODE +#include "MemMap.h" + +/*[SWS_CanNm_00284]*/ +#if(CANNM_IMMEDIATE_TXCONF_ENABLED == STD_OFF) +/*[SWS_CanNm_00228]*/ +extern FUNC(void, CANNM_CODE) CanNm_TxConfirmation +( + PduIdType TxPudId +); +#endif + +/*[SWS_CanNm_00231]*/ +extern FUNC(void, CANNM_CODE) CanNm_RxIndication +( + PduIdType RxPudId, + const uint16 RxId, + P2CONST(PduInfoType, AUTOMATIC, CANNM_APPL_DATA)PduInfoPtr +); +#define CANNM_STOP_SEC_CODE +#include "MemMap.h" + +#endif/*_CANNM_CBK_H_*/ + diff --git a/code_app_out/Source/ComStack/AutoSarNm/CanNm/CanNm_Types.h b/code_app_out/Source/ComStack/AutoSarNm/CanNm/CanNm_Types.h new file mode 100644 index 0000000..086d770 --- /dev/null +++ b/code_app_out/Source/ComStack/AutoSarNm/CanNm/CanNm_Types.h @@ -0,0 +1,166 @@ +/* BEGIN_FILE_HDR +******************************************************************************** +* NOTICE +* This software is the property of HiRain Technologies. Any information +* contained in this doc should not be reproduced, or used, or disclosed +* without the written authorization from HiRain Technologies. +******************************************************************************** +* File Name : CanNm_Types.h +******************************************************************************** +* Project/Product : AUTOSAR 4.0 +* Title : CAN Network Management module type definitions head File +* Author : Hirain +******************************************************************************** +* Description : CAN Network Management module type definitions head File +* +******************************************************************************** +* Limitations : None +* +******************************************************************************** +* +******************************************************************************** +* Revision History: +* +* Version Date Initials CR# Descriptions +* --------- ---------- ------------ ---------- --------------- +* 01.00.00 02/09/2016 liya.zhu N/A Original +******************************************************************************** +* END_FILE_HDR*/ + +#ifndef _CAN_NM_TYPES_H_ +#define _CAN_NM_TYPES_H_ + +/******************************************************************************* +* Includes +*******************************************************************************/ +#include "ComStack_Types.h" +#include "NmStack_Types.h" +#include "CanNm_Cfg.h" +#include "CanNm_Version.h" +#include "CanIf.h" + +typedef enum +{ + CANNM_PDU_BYTE_0 =0u, /*Byte 0 is used*/ + CANNM_PDU_BYTE_1 =1u, /*Byte 1 is used*/ + CANNM_PDU_OFF =2u /*No Byte is used*/ +}CanNm_PduBytePosType; + +/*[SWS_CanNm_00202]*/ +typedef struct +{ +#if(CANNM_PASSIVE_MODE_ENABLED == STD_OFF) + /*ECUC_CanNm_00084*/ + boolean CanNmActiveWakeupBitEnabled; +#endif + /*ECUC_CanNm_00068*/ + boolean CanNmAllNmMessagesKeepAwake; +#if(CANNM_BUS_LOAD_REDUCTION_ENABLED == STD_ON) + /*ECUC_CanNm_00042*/ + boolean CanNmBusLoadReductionActive; +#endif + /*ECUC_CanNm_00075*/ + uint8 CanNmCarWakeUpBitPosition; + /*ECUC_CanNm_00076*/ + uint8 CanNmCarWakeUpBytePosition; + /*ECUC_CanNm_00077*/ + boolean CanNmCarWakeUpFilterEnabled; + /*ECUC_CanNm_00078*/ + uint8 CanNmCarWakeUpFilterNodeId; + /*ECUC_CanNm_00074*/ + boolean CanNmCarWakeUpRxEnabled; +#if(CANNM_PASSIVE_MODE_ENABLED == STD_OFF) + /*ECUC_CanNm_00057*/ + uint16 CanNmImmediateNmCycleTime; + /*ECUC_CanNm_00056*/ + uint8 CanNmImmediateNmTransmissions; + /*ECUC_CanNm_00029*/ + uint16 CanNmMsgCycleOffset; + /*ECUC_CanNm_00028*/ + uint16 CanNmMsgCycleTime; +#if(CANNM_BUS_LOAD_REDUCTION_ENABLED == STD_ON) + /*ECUC_CanNm_00043*/ + uint16 CanNmMsgReducedTime; +#endif +#if(CANNM_IMMEDIATE_TXCONF_ENABLED == STD_OFF) + /*ECUC_CanNm_00030*/ + uint16 CanNmMsgTimeoutTime; +#endif +#endif + /*ECUC_CanNm_00026*/ + CanNm_PduBytePosType CanNmPduCbvPosition; + /*ECUC_CanNm_00025*/ + CanNm_PduBytePosType CanNmPduNidPosition; +#if(CANNM_PASSIVE_MODE_ENABLED == STD_OFF) +#if(CANNM_REMOTE_SLEEP_IND_ENABLED == STD_ON) + /*ECUC_CanNm_00023*/ + uint16 CanNmRemoteSleepIndTime; +#endif +#endif + /*ECUC_CanNm_00022*/ + uint16 CanNmRepeatMessageTime; +#if(CANNM_PASSIVE_MODE_ENABLED == STD_OFF) + /*ECUC_CanNm_00085*/ + boolean CanNmRetryFirstMessageRequest; +#endif + /*ECUC_CanNm_00020*/ + uint16 CanNmTimeoutTime; + /*ECUC_CanNm_00021*/ + uint16 CanNmWaitBusSleepTime; + /*ECUC_CanNm_00018*/ + NetworkHandleType CanNmComMNetworkHandleRef; +} CanNm_LConfigType; +typedef struct +{ +#if(CANNM_NODE_ID_ENABLED == STD_ON) + /*ECUC_CanNm_00031*/ + uint8 CanNmNodeId; +#endif + /*ECUC_CanNm_00037*/ + PduIdType CanNmTxPduRef; +}CanNm_ConfigType; +typedef enum +{ + CANNM_NETWORK_RELEASED =0u, /*NetworkReleased State*/ + CANNM_NETWORK_REQUESTED =1u /*NetworkRequested State*/ +} CanNm_NetworkStateType; + +typedef enum +{ + CANNM_NULL_CMD = 0u, + CANNM_NETWORK_REQUEST_CMD = 1u, + CANNM_NETWORK_RELEASE_CMD = 2u, + CANNM_PASSIVE_STARTUP_CMD = 3u +} CanNm_NetworkReqType; +typedef enum +{ + CANNM_REPEAT_NULL = 0u, + CANNM_REPEAT_PENDING = 1u, + CANNM_REPEAT_CFM = 2u, + CANNM_REPEAT_SUCCESS = 3u +} CanNm_MsgTxRptType; +typedef struct +{ + uint16* TimerCnt; +} CanNm_CommTimerType; +typedef struct +{ +#if(CANNM_PASSIVE_MODE_ENABLED == STD_OFF) + CanNm_CommTimerType MsgCycOffsetTimer; + CanNm_CommTimerType MsgCycTimer; +#if(CANNM_IMMEDIATE_TXCONF_ENABLED == STD_OFF) + CanNm_CommTimerType TxTOTimer; +#endif +#endif + CanNm_CommTimerType NmTOTimer; + CanNm_CommTimerType RptMsgTimer; + CanNm_CommTimerType WbsTimer; +#if(CANNM_PASSIVE_MODE_ENABLED == STD_OFF) +#if(CANNM_REMOTE_SLEEP_IND_ENABLED == STD_ON) + CanNm_CommTimerType RmtSlpIndTimer; +#endif +#endif +} CanNm_TimerType; + +#endif /*_CAN_NM_TYPES_H_*/ + diff --git a/code_app_out/Source/ComStack/AutoSarNm/CanNm/CanNm_Version.h b/code_app_out/Source/ComStack/AutoSarNm/CanNm/CanNm_Version.h new file mode 100644 index 0000000..e70abff --- /dev/null +++ b/code_app_out/Source/ComStack/AutoSarNm/CanNm/CanNm_Version.h @@ -0,0 +1,43 @@ +/* BEGIN_FILE_HDR +******************************************************************************** +* NOTICE +* This software is the property of HiRain Technologies. Any information +* contained in this doc should not be reproduced, or used, or disclosed +* without the written authorization from HiRain Technologies. +******************************************************************************** +* File Name : CanNm_Version.h +******************************************************************************** +* Project/Product : AUTOSAR 4.0 +* Title : CAN Network Management module Version head File +* Author : Hirain +******************************************************************************** +* Description : CAN Network Management module Version head File +******************************************************************************** +* Limitations : None +* +******************************************************************************** +* +******************************************************************************** +* Revision History: +* +* Version Date Initials CR# Descriptions +* --------- ---------- ------------ ---------- --------------- +* 01.00.00 02/09/2016 liya.zhu N/A Original +******************************************************************************** +* END_FILE_HDR*/ +#ifndef _CANNM_VERSION_H_ +#define _CANNM_VERSION_H_ + +#define CANNM_VENDOR_ID STD_HIRAIN_VENDOR_ID +#define CANNM_MODULE_ID ((uint16)31) +#define CANNM_INSTANCE_ID (0) +#define CANNM_SW_MAJOR_VERSION (1) +#define CANNM_SW_MINOR_VERSION (0) +#define CANNM_SW_PATCH_VERSION (0) + +#define CANNM_AR_RELEASE_MAJOR_VERSION (4) +#define CANNM_AR_RELEASE_MINOR_VERSION (0) +#define CANNM_AR_RELEASE_REVISION_VERSION (3) + +#endif /*_CANNM_VERSION_H_*/ + diff --git a/code_app_out/Source/ComStack/AutoSarNm/CanNm/NmStack_Types.h b/code_app_out/Source/ComStack/AutoSarNm/CanNm/NmStack_Types.h new file mode 100644 index 0000000..b0b5b07 --- /dev/null +++ b/code_app_out/Source/ComStack/AutoSarNm/CanNm/NmStack_Types.h @@ -0,0 +1,94 @@ +/*BEGIN_FILE_HDR +*********************************************************************************************** +* NOTICE +* This software is the property of HiRain Technologies. Any information contained in this +* doc should not be reproduced, or used, or disclosed without the written authorization from +* HiRain Technologies. +*********************************************************************************************** +* File Name: NmStack_Types.h +*********************************************************************************************** +* Project/Product: AUTOSAR CanNm programe +* Title: NmStack_Types +* Author: Peng.Liu +*********************************************************************************************** +* Description: The type of CanNm Network State +* +* +* (Requirements, pseudo code and etc.) +*********************************************************************************************** +* Limitations: +* +* (limitations) +*********************************************************************************************** +*********************************************************************************************** +* Revision History +* +* Version Date Initials CR# Descriptions +* ------- ---------- ---------- ------ ----------------- +* 1.0 26/08/11 Peng.Liu N/A Original +* +*********************************************************************************************** +END_FILE_HDR*/ + +#ifndef NM_STACK_TYPES_H +#define NM_STACK_TYPES_H + +/********************************************************************************************************************** + * INCLUDES + *********************************************************************************************************************/ +#include "Std_Types.h" /* Include standard types */ +//#include "CanNm_Types.h" +/********************************************************************************************************************** + * GLOBAL CONSTANT MACROS + *********************************************************************************************************************/ + + + +/* Return values for NM functions */ +#define NM_E_OK ((uint8)E_OK) /* Function call has been successfully accomplished and + returned */ +#define NM_E_NOT_OK ((uint8)E_NOT_OK) /* Function call has been unsuccessfully accomplished and + returned because of an internal execution error. */ +#define NM_E_NOT_EXECUTED ((uint8)2u) /* Function call has been successfully accomplished and + returned since execution of a service in the current + state is not allowed. */ + +/********************************************************************************************************************** + * GLOBAL FUNCTION MACROS + *********************************************************************************************************************/ + + +/********************************************************************************************************************** + * GLOBAL DATA TYPES AND STRUCTURES + *********************************************************************************************************************/ + +/* Return type for NM functions */ +typedef uint8 Nm_ReturnType; + +/* State of the CanNm state machine */ +typedef enum +{ + NM_STATE_UNINIT = 0u, /* Uninitialized State */ + NM_STATE_BUS_SLEEP = 1u, /* Bus-Sleep State */ + NM_STATE_PREPARE_BUS_SLEEP = 2u, /* Prepare Bus-Sleep State */ + NM_STATE_READY_SLEEP = 3u, /* Ready Sleep State */ + NM_STATE_NORMAL_OPERATION = 4u, /* Normal Operation State */ + NM_STATE_REPEAT_MESSAGE = 5u, /* Repeat Message State */ + NM_STATE_SYNCHRONIZE = 6u, /* Synchronized State */ + NM_STATE_WAIT_CHECK_ACTIVATION = 7u, /* Wait Check Activation */ + NM_STATE_WAIT_NETWORK_STARTUP = 8u /* Wait Network Startup */ +} Nm_StateType; + +/* Modes of the network management state machine */ +typedef enum +{ + NM_MODE_BUS_SLEEP = 0u, /* Bus-Sleep Mode */ + NM_MODE_PREPARE_BUS_SLEEP = 1u, /* Prepare Bus-Sleep Mode */ + NM_MODE_SYNCHRONIZE = 2u, /* Synchronized Mode */ + NM_MODE_NETWORK = 3u /* Network Mode */ +} Nm_ModeType; + + + + +#endif /* NM_STACK_TYPES_H */ diff --git a/code_app_out/Source/ComStack/AutoSarNm/CanNm/Nm_Cbk.h b/code_app_out/Source/ComStack/AutoSarNm/CanNm/Nm_Cbk.h new file mode 100644 index 0000000..60ef3e0 --- /dev/null +++ b/code_app_out/Source/ComStack/AutoSarNm/CanNm/Nm_Cbk.h @@ -0,0 +1,122 @@ +/*BEGIN_FILE_HDR +*********************************************************************************************** +* NOTICE +* This software is the property of HiRain Technologies. Any information contained in this +* doc should not be reproduced, or used, or disclosed without the written authorization from +* HiRain Technologies. +*********************************************************************************************** +* File Name: Nm_Cbk.h +*********************************************************************************************** +* Project/Product: AUTOSAR CanNm programe +* Title: _CanNm_H_ +* Author: Peng.Liu +*********************************************************************************************** +* Description: Header file of AUTOSAR CanNm programe +* +* +* (Requirements, pseudo code and etc.) +*********************************************************************************************** +* Limitations: +* +* (limitations) +*********************************************************************************************** +*********************************************************************************************** +* Revision History +* +* Version Date Initials CR# Descriptions +* ------- ---------- ---------- ------ ----------------- +* 1.0 26/08/11 Peng.Liu N/A Original +* 2.0 22/07/16 liya.zhu N/A HrAsrOsekNm160722-01 +*********************************************************************************************** +*END_FILE_HDR*/ + +#ifndef _NM_CBK_H_ +#define _NM_CBK_H_ + + +/********************************************************************************************************************** + * INCLUDES + *********************************************************************************************************************/ +#include "NmStack_Types.h" +#include "ComStack_Types.h" +#include "CanNm_Cfg.h" + +extern uint8 sleepFlg; + /********************************************************************************************************************** + * Functions + *********************************************************************************************************************/ +/*[SWS_CanNm_00092]*//*[SWS_CanNm_00093]*/ +extern void Nm_NetworkMode +( + NetworkHandleType nmNetworkHandle +); +/*[SWS_CanNm_00092]*//*[SWS_CanNm_00093]*/ +extern void Nm_PrepareBusSleepMode +( + NetworkHandleType nmNetworkHandle +); +/*[SWS_CanNm_00092]*//*[SWS_CanNm_00093]*/ +extern void Nm_BusSleepMode +( + NetworkHandleType nmNetworkHandle +); +extern void Nm_NetworkStartIndication +( + NetworkHandleType nmNetworkHandle +); +#if(CANNM_PASSIVE_MODE_ENABLED == STD_OFF) +/*[SWS_CanNm_00149]*/ +#if(CANNM_REMOTE_SLEEP_IND_ENABLED == STD_ON) +extern void Nm_RemoteSleepIndication +( + NetworkHandleType nmNetworkHandle +); +extern void Nm_RemoteSleepCancellation +( + NetworkHandleType nmNetworkHandle +); +#endif +#endif +/*[SWS_CanNm_00037]*/ +#if(CANNM_PDU_RX_INDICATION_ENABLED == STD_ON) +extern void Nm_PduRxIndication +( + NetworkHandleType nmNetworkHandle +); +#endif +/*[SWS_CanNm_00166]*/ +#if(CANNM_STATE_CHANGE_IND_ENABLED == STD_ON) +extern void Nm_StateChangeNotification +( + NetworkHandleType nmNetworkHandle, + Nm_StateType nmPreviousState, + Nm_StateType nmCurrentState +); +#endif +/*[SWS_CanNm_00073]*/ +#if(CANNM_PASSIVE_MODE_ENABLED == STD_OFF) +#if(CANNM_IMMEDIATE_TXCONF_ENABLED == STD_OFF) +extern void Nm_TxTimeoutException +( + NetworkHandleType nmNetworkHandle +); +#endif +#endif +/*[SWS_CanNm_00014]*/ +#if(CANNM_REPEAT_MSG_IND_ENABLED == STD_ON) +#if(CANNM_PASSIVE_MODE_ENABLED == STD_OFF) +#if(CANNM_NODE_DETECTION_ENABLED == STD_ON) +extern void Nm_RepeatMessageIndication +( + NetworkHandleType nmNetworkHandle +); +#endif +#endif +#endif + +typedef enum +{ + NM_RECNORMAL = 0u, + NM_RECINVALID = 1u +}CanNm_RecNmMsgType; +#endif/*_NM_CBK_H_*/ diff --git a/code_app_out/Source/ComStack/AutoSarNm/CanNm/SchM_CanNm.h b/code_app_out/Source/ComStack/AutoSarNm/CanNm/SchM_CanNm.h new file mode 100644 index 0000000..23d4750 --- /dev/null +++ b/code_app_out/Source/ComStack/AutoSarNm/CanNm/SchM_CanNm.h @@ -0,0 +1,49 @@ +/* BEGIN_FILE_HDR +******************************************************************************** +* NOTICE +* This software is the property of HiRain Technologies. Any information +* contained in this doc should not be reproduced, or used, or disclosed +* without the written authorization from HiRain Technologies. +******************************************************************************** +* File Name : SchM_CanNm.h +******************************************************************************** +* Project/Product : Common +* Title : SchM_CanNm.h +* Author : ning.chen +******************************************************************************** +* Description : AUTOSAR Standard types file +* +******************************************************************************** +* Limitations : None +* +******************************************************************************** +* +******************************************************************************** +* Revision History: +* +* Version Date Initials CR# Descriptions +* --------- ---------- ------------ ---------- --------------- +* 01.00.00 13/06/2013 ning.chen N/A Original +* 01.00.01 17/07/2013 ning.chen N/A DPN_COMMON_130717_01 +* 01.00.02 15/08/2013 ning.chen N/A D10_COMMON01_130815_01 +* 01.00.03 08/01/2014 ning.chen N/A D10_COMMON01_140108_01 +******************************************************************************** +* END_FILE_HDR*/ + +#ifndef _SCHM_CANNM_H_ +#define _SCHM_CANNM_H_ + +/******************************************************************************* +* Macro +*******************************************************************************/ +#define SchM_Enter_CanNm_CANNM_EXCLUSIVE_AREA_0() +#define SchM_Exit_CanNm_CANNM_EXCLUSIVE_AREA_0() +#define SchM_Enter_CanNm_CANNM_EXCLUSIVE_AREA_1() +#define SchM_Exit_CanNm_CANNM_EXCLUSIVE_AREA_1() +#define SchM_Enter_CanNm_CANNM_EXCLUSIVE_AREA_2() +#define SchM_Exit_CanNm_CANNM_EXCLUSIVE_AREA_2() +#define SchM_Enter_CanNm_CANNM_EXCLUSIVE_AREA_3() +#define SchM_Exit_CanNm_CANNM_EXCLUSIVE_AREA_3() + + +#endif /* _SCHM_CANNM_H_ */ diff --git a/code_app_out/Source/ComStack/AutoSarNm/CanNm_CFG/CanNm_Cfg.h b/code_app_out/Source/ComStack/AutoSarNm/CanNm_CFG/CanNm_Cfg.h new file mode 100644 index 0000000..e8c980d --- /dev/null +++ b/code_app_out/Source/ComStack/AutoSarNm/CanNm_CFG/CanNm_Cfg.h @@ -0,0 +1,111 @@ +/* BEGIN_FILE_HDR +******************************************************************************** +* NOTICE +* This software is the property of HiRain Technologies. Any information +* contained in this doc should not be reproduced, or used, or disclosed +* without the written authorization from HiRain Technologies. +******************************************************************************** +* File Name : CanNm_Cfg.h +******************************************************************************** +* Project/Product : AUTOSAR BSW PROJECT +* Title : CanNm module configuration File +* Author : Hirain +******************************************************************************** +* Description : CanNm module configuration File +* +******************************************************************************** +* Limitations : None +* +******************************************************************************** +* +******************************************************************************** +* Revision History: +* +* Version Date Initials CR# Descriptions +* --------- ---------- ------------ ---------- --------------- +* 04.03.02 18/11/2021 Geno N/A N/A +* +******************************************************************************** +* END_FILE_HDR*/ +#ifndef _CANNM_CFG_H_ +#define _CANNM_CFG_H_ + +/******************************************************************************* +* Includes +*******************************************************************************/ +/********************ECUC_CanNm_00001 CanNmGlobalConfig******************/ +/*ECUC_CanNm_00040 +CanNmBusLoadReductionEnabled*/ +#define CANNM_BUS_LOAD_REDUCTION_ENABLED STD_OFF +/*ECUC_CanNm_00006 +CanNmBusSynchronizationEnabled*/ +#define CANNM_BUS_SYNCHRONIZATION_ENABLED STD_OFF +/*ECUC_CanNm_00013 +CanNmComControlEnabled*/ +#define CANNM_COM_CONTROL_ENABLED STD_ON +/*ECUC_CanNm_00044 +CanNmComUserDataSupport*/ +#define CANNM_COM_USER_DATA_SUPPORT STD_OFF +/*ECUC_CanNm_00080 +CanNmCoordinatorSyncSupport*/ +#define CANNM_COORDINATOR_SYNC_SUPPORT STD_OFF +/*ECUC_CanNm_00002 +CanNmDevErrorDetect*/ +#define CANNM_DEV_ERROR_DETECT STD_OFF +/*ECUC_CanNm_00009 +CanNmImmediateRestartEnabled*/ +#define CANNM_IMMEDIATE_RESTART_ENABLED STD_OFF +/*ECUC_CanNm_00041 +CanNmImmediateTxconfEnabled*/ +#define CANNM_IMMEDIATE_TXCONF_ENABLED STD_OFF +/*ECUC_CanNm_00007 +CanNmNodeDetectionEnabled*/ +#define CANNM_NODE_DETECTION_ENABLED STD_ON +/*ECUC_CanNm_00083 +CanNmNodeIdEnabled*/ +#define CANNM_NODE_ID_ENABLED STD_ON +/*ECUC_CanNm_00010 +CanNmPassiveModeEnabled*/ +#define CANNM_PASSIVE_MODE_ENABLED STD_OFF +/*ECUC_CanNm_00011 +CanNmPduRxIndicationEnabled*/ +#define CANNM_PDU_RX_INDICATION_ENABLED STD_OFF +/*ECUC_CanNm_00055 +CanNmRemoteSleepIndEnabled*/ +#define CANNM_REMOTE_SLEEP_IND_ENABLED STD_OFF +/*ECUC_CanNm_00005 +CanNmRepeatMsgIndEnabled*/ +#define CANNM_REPEAT_MSG_IND_ENABLED STD_OFF +/*ECUC_CanNm_00012 +CanNmStateChangeIndEnabled*/ +#define CANNM_STATE_CHANGE_IND_ENABLED STD_ON +/*ECUC_CanNm_00004 +CanNmUserDataEnabled*/ +#define CANNM_USER_DATA_ENABLED STD_ON +/*ECUC_CanNm_00003 +CanNmVersionInfoApi*/ +#define CANNM_VERSION_INFO_API STD_ON +/*ECUC_CanNm_00032 +CanNmMainFunctionPeriod : ms*/ +#define CANNM_MAIN_FUNCTION_PERIOD ((uint8)5u) +/*ECUC_CanNm_00059 +CanNmPnResetTime*/ +/*ECUC_CanNm_00072 +CanNmPnEiraRxNSduRef*/ + +#define CANNM_CONFIG_VARIANTS STD_CONFIG_VARIANTS_PRECOMPILE + +#define CANNM_PRIVATE_VERSION_CHECK STD_ON + +#define CANNM_NUMBER_OF_CHANNELS ((uint8)1u) + +#define CANNM_SW_MAJOR_VERSION_CFG 1 +#define CANNM_SW_MINOR_VERSION_CFG 0 +#define CANNM_SW_PATCH_VERSION_CFG 0 + +#define CANNM_AR_RELEASE_MAJOR_VERSION_CFG 4 +#define CANNM_AR_RELEASE_MINOR_VERSION_CFG 0 +#define CANNM_AR_RELEASE_REVISION_VERSION_CFG 3 + +#endif + diff --git a/code_app_out/Source/ComStack/AutoSarNm/CanNm_CFG/CanNm_Lcfg.c b/code_app_out/Source/ComStack/AutoSarNm/CanNm_CFG/CanNm_Lcfg.c new file mode 100644 index 0000000..336bb8c --- /dev/null +++ b/code_app_out/Source/ComStack/AutoSarNm/CanNm_CFG/CanNm_Lcfg.c @@ -0,0 +1,130 @@ +/* BEGIN_FILE_HDR +******************************************************************************** +* NOTICE +* This software is the property of HiRain Technologies. Any information +* contained in this doc should not be reproduced, or used, or disclosed +* without the written authorization from HiRain Technologies. +******************************************************************************** +* File Name : CanNm_Lcfg.c +******************************************************************************** +* Project/Product : AUTOSAR BSW PROJECT +* Title : CanNm module configuration File +* Author : Hirain +******************************************************************************** +* Description : CanNm module configuration File +* +******************************************************************************** +* Limitations : None +* +******************************************************************************** +* +******************************************************************************** +* Revision History: +* +* Version Date Initials CR# Descriptions +* --------- ---------- ------------ ---------- --------------- +* 04.03.02 18/11/2021 Geno N/A N/A +* +******************************************************************************** +* END_FILE_HDR*/ + + +/******************************************************************************* +* Includes +*******************************************************************************/ + +#include "CanNm_Lcfg.h" +#define CANNM_START_SEC_VAR_NOINIT_UNSPECIFIED +#include "MemMap.h" +VAR(Nm_StateType, CANNM_VAR_NOINIT) CanNm_State[CANNM_NUMBER_OF_CHANNELS]; +VAR(uint8, CANNM_VAR_NOINIT) CanNm_TxPduBuff[CANNM_NUMBER_OF_CHANNELS][CANNM_PDU_LENGTH]; +VAR(PduInfoType, CANNM_VAR_NOINIT) CanNm_TxPdu[CANNM_NUMBER_OF_CHANNELS]; +VAR(uint8, CANNM_VAR_NOINIT) CanNm_RxPduBuff[CANNM_NUMBER_OF_CHANNELS][CANNM_PDU_LENGTH]; +VAR(PduInfoType, CANNM_VAR_NOINIT) CanNm_RxPdu[CANNM_NUMBER_OF_CHANNELS]; +VAR(Nm_ModeType, CANNM_VAR_NOINIT) CanNm_Mode[CANNM_NUMBER_OF_CHANNELS]; +VAR(CanNm_NetworkStateType, CANNM_VAR_NOINIT) CanNm_NetworkState[CANNM_NUMBER_OF_CHANNELS]; +/*[SWS_CanNm_00257]*//*[SWS_CanNm_00260]*/ +/*[SWS_CanNm_00262]*//*[SWS_CanNm_00264]*/ +VAR(boolean, CANNM_VAR_NOINIT) CanNm_ComTxEnabled[CANNM_NUMBER_OF_CHANNELS]; +VAR(boolean, CANNM_VAR_NOINIT) CanNm_MsgTxEnabled[CANNM_NUMBER_OF_CHANNELS]; +STATIC VAR(uint16, CANNM_VAR_NOINIT) CanNm_MsgCycOffsetTimer[CANNM_NUMBER_OF_CHANNELS]; +STATIC VAR(uint16, CANNM_VAR_NOINIT) CanNm_MsgCycTimer[CANNM_NUMBER_OF_CHANNELS]; +VAR(uint8, CANNM_VAR_NOINIT) CanNm_ImmTrans[CANNM_NUMBER_OF_CHANNELS]; +VAR(boolean, CANNM_VAR_NOINIT) CanNm_TxCfmFlg[CANNM_NUMBER_OF_CHANNELS]; +VAR(boolean, CANNM_VAR_NOINIT) CanNm_TxReqFlg[CANNM_NUMBER_OF_CHANNELS]; +VAR(boolean, CANNM_VAR_NOINIT) CanNm_RxIndFlg[CANNM_NUMBER_OF_CHANNELS]; +VAR(boolean, CANNM_VAR_NOINIT) CanNm_RptMsgReq[CANNM_NUMBER_OF_CHANNELS]; +VAR(boolean, CANNM_VAR_NOINIT) CanNm_RptMsgReqBit[CANNM_NUMBER_OF_CHANNELS]; +VAR(CanNm_NetworkReqType, CANNM_VAR_NOINIT) CanNm_NetworkReqCmd[CANNM_NUMBER_OF_CHANNELS]; +STATIC VAR(uint16, CANNM_VAR_NOINIT) CanNm_NmTOTimer[CANNM_NUMBER_OF_CHANNELS]; +STATIC VAR(uint16, CANNM_VAR_NOINIT) CanNm_RptMsgTimer[CANNM_NUMBER_OF_CHANNELS]; +STATIC VAR(uint16, CANNM_VAR_NOINIT) CanNm_WbsTimer[CANNM_NUMBER_OF_CHANNELS]; +STATIC VAR(uint16, CANNM_VAR_NOINIT) CanNm_TxTOTimer[CANNM_NUMBER_OF_CHANNELS]; +VAR(CanNm_MsgTxRptType, CANNM_VAR_NOINIT) CanNm_MsgTxRptCmd[CANNM_NUMBER_OF_CHANNELS]; +#define CANNM_STOP_SEC_VAR_NOINIT_UNSPECIFIED +#include "MemMap.h" + +#define CANNM_START_SEC_CONFIG_DATA_UNSPECIFIED +#include "MemMap.h" +CONST(CanNm_LConfigType, CANNM_CONST) CanNm_LConfig[CANNM_NUMBER_OF_CHANNELS] = +{ + { + #if(CANNM_PASSIVE_MODE_ENABLED == STD_OFF) + ((boolean)STD_ON), /*CanNmActiveWakeupBitEnabled*/ + #endif + ((boolean)STD_ON), /*CanNmAllNmMessagesKeepAwake*/ + + ((uint8)4), /*CanNmCarWakeUpBitPosition*/ + ((uint8)0), /*CanNmCarWakeUpBytePosition*/ + ((boolean)STD_OFF), /*CanNmCarWakeUpFilterEnabled*/ + ((uint8)0u), /*CanNmCarWakeUpFilterNodeId*/ + ((boolean)STD_OFF), /*CanNmCarWakeUpRxEnabled*/ + #if(CANNM_PASSIVE_MODE_ENABLED == STD_OFF) + ((uint16)4u), /*CanNmImmediateNmCycleTime*/ + ((uint8)25u), /*CanNmImmediateNmTransmissions*/ + ((uint16)0), /*CanNmMsgCycleOffset*/ + ((uint16)100), /*CanNmMsgCycleTime*/ + #if(CANNM_IMMEDIATE_TXCONF_ENABLED == STD_OFF) + ((uint16)300), /*CanNmMsgTimeoutTime*/ + #endif + #endif + CANNM_PDU_BYTE_1, /*CanNmPduCbvPosition*/ + CANNM_PDU_BYTE_0, /*CanNmPduNidPosition*/ + ((uint16)320), /*CanNmRepeatMessageTime*/ + #if(CANNM_PASSIVE_MODE_ENABLED == STD_OFF) + ((boolean)STD_OFF), /*CanNmRetryFirstMessageRequest*/ + #endif + ((uint16)2000), /*CanNmTimeoutTime*/ + ((uint16)200), /*CanNmWaitBusSleepTime*/ + ((NetworkHandleType)0), /*CanNmComMNetworkHandleRef*/ + }, +}; + + +CONST(CanNm_TimerType, CANNM_CONST) CanNm_Timer[CANNM_NUMBER_OF_CHANNELS] = +{ + { + #if(CANNM_PASSIVE_MODE_ENABLED == STD_OFF) + {&CanNm_MsgCycOffsetTimer[0]}, + {&CanNm_MsgCycTimer[0]}, + #if(CANNM_IMMEDIATE_TXCONF_ENABLED == STD_OFF) + {&CanNm_TxTOTimer[0]}, + #endif + #endif + {&CanNm_NmTOTimer[0]}, + {&CanNm_RptMsgTimer[0]}, + {&CanNm_WbsTimer[0]}, + }, +}; + + +CONST(CanNm_ConfigType, CANNM_CONST) CanNm_Config[CANNM_NUMBER_OF_CHANNELS] = +{ + {0x32, 3}, +}; + +#define CANNM_STOP_SEC_CONFIG_DATA_UNSPECIFIED +#include "MemMap.h" + + + diff --git a/code_app_out/Source/ComStack/AutoSarNm/CanNm_CFG/CanNm_Lcfg.h b/code_app_out/Source/ComStack/AutoSarNm/CanNm_CFG/CanNm_Lcfg.h new file mode 100644 index 0000000..a7de32f --- /dev/null +++ b/code_app_out/Source/ComStack/AutoSarNm/CanNm_CFG/CanNm_Lcfg.h @@ -0,0 +1,75 @@ +/* BEGIN_FILE_HDR +******************************************************************************** +* NOTICE +* This software is the property of HiRain Technologies. Any information +* contained in this doc should not be reproduced, or used, or disclosed +* without the written authorization from HiRain Technologies. +******************************************************************************** +* File Name : CanNm_Lcfg.h +******************************************************************************** +* Project/Product : AUTOSAR BSW PROJECT +* Title : CanNm module configuration File +* Author : Hirain +******************************************************************************** +* Description : CanNm module configuration File +* +******************************************************************************** +* Limitations : None +* +******************************************************************************** +* +******************************************************************************** +* Revision History: +* +* Version Date Initials CR# Descriptions +* --------- ---------- ------------ ---------- --------------- +* 04.03.02 18/11/2021 Geno N/A N/A +* +******************************************************************************** +* END_FILE_HDR*/ +#ifndef _CANNM_LCFG_H_ +#define _CANNM_LCFG_H_ + +/******************************************************************************* +* Includes +*******************************************************************************/ +#include "CanNm_Types.h" + +#define CANNM_PDU_LENGTH ((uint8)8u) +#define CANNM_CH0_NODE_ID ((uint8)0x38) +#define CANNM_CH0_TX_PDU_ID ((uint8)0u) + + +#define CANNM_CHANNELNUM CANNM_NUMBER_OF_CHANNELS +#define CANNM_START_SEC_CONFIG_DATA_UNSPECIFIED +#include "MemMap.h" +extern CONST(CanNm_ConfigType, CANNM_CONST) CanNm_Config[CANNM_NUMBER_OF_CHANNELS]; +extern CONST(CanNm_LConfigType, CANNM_CONST) CanNm_LConfig[CANNM_NUMBER_OF_CHANNELS]; +extern CONST(CanNm_TimerType, CANNM_CONST) CanNm_Timer[CANNM_NUMBER_OF_CHANNELS]; +#define CANNM_STOP_SEC_CONFIG_DATA_UNSPECIFIED +#include "MemMap.h" +#define CANNM_START_SEC_VAR_NOINIT_UNSPECIFIED +#include "MemMap.h" +extern VAR(Nm_StateType, CANNM_VAR_NOINIT) CanNm_State[CANNM_NUMBER_OF_CHANNELS]; +extern VAR(uint8, CANNM_VAR_NOINIT) CanNm_TxPduBuff[CANNM_NUMBER_OF_CHANNELS][CANNM_PDU_LENGTH]; +extern VAR(PduInfoType, CANNM_VAR_NOINIT) CanNm_TxPdu[CANNM_NUMBER_OF_CHANNELS]; +extern VAR(uint8, CANNM_VAR_NOINIT) CanNm_RxPduBuff[CANNM_NUMBER_OF_CHANNELS][CANNM_PDU_LENGTH]; +extern VAR(PduInfoType, CANNM_VAR_NOINIT) CanNm_RxPdu[CANNM_NUMBER_OF_CHANNELS]; +extern VAR(Nm_ModeType, CANNM_VAR_NOINIT) CanNm_Mode[CANNM_NUMBER_OF_CHANNELS]; +extern VAR(CanNm_NetworkStateType, CANNM_VAR_NOINIT) CanNm_NetworkState[CANNM_NUMBER_OF_CHANNELS]; +/*[SWS_CanNm_00257]*//*[SWS_CanNm_00260]*/ +extern VAR(boolean, CANNM_VAR_NOINIT) CanNm_ComTxEnabled[CANNM_NUMBER_OF_CHANNELS]; +extern VAR(boolean, CANNM_VAR_NOINIT) CanNm_MsgTxEnabled[CANNM_NUMBER_OF_CHANNELS]; +extern VAR(uint8, CANNM_VAR_NOINIT) CanNm_ImmTrans[CANNM_NUMBER_OF_CHANNELS]; +extern VAR(boolean, CANNM_VAR_NOINIT) CanNm_TxCfmFlg[CANNM_NUMBER_OF_CHANNELS]; +extern VAR(boolean, CANNM_VAR_NOINIT) CanNm_TxReqFlg[CANNM_NUMBER_OF_CHANNELS]; +extern VAR(boolean, CANNM_VAR_NOINIT) CanNm_RxIndFlg[CANNM_NUMBER_OF_CHANNELS]; +extern VAR(boolean, CANNM_VAR_NOINIT) CanNm_RptMsgReq[CANNM_NUMBER_OF_CHANNELS]; +extern VAR(boolean, CANNM_VAR_NOINIT) CanNm_RptMsgReqBit[CANNM_NUMBER_OF_CHANNELS]; +extern VAR(CanNm_NetworkReqType, CANNM_VAR_NOINIT) CanNm_NetworkReqCmd[CANNM_NUMBER_OF_CHANNELS]; +extern VAR(CanNm_MsgTxRptType, CANNM_VAR_NOINIT) CanNm_MsgTxRptCmd[CANNM_NUMBER_OF_CHANNELS]; +#define CANNM_STOP_SEC_VAR_NOINIT_UNSPECIFIED +#include "MemMap.h" +#endif + + diff --git a/code_app_out/Source/ComStack/AutoSarNm/CanNm_CFG/CanNm_PBcfg.c b/code_app_out/Source/ComStack/AutoSarNm/CanNm_CFG/CanNm_PBcfg.c new file mode 100644 index 0000000..2c6bbe8 --- /dev/null +++ b/code_app_out/Source/ComStack/AutoSarNm/CanNm_CFG/CanNm_PBcfg.c @@ -0,0 +1,37 @@ +/* BEGIN_FILE_HDR +******************************************************************************** +* NOTICE +* This software is the property of HiRain Technologies. Any information +* contained in this doc should not be reproduced, or used, or disclosed +* without the written authorization from HiRain Technologies. +******************************************************************************** +* File Name : CanNm_PBcfg.c +******************************************************************************** +* Project/Product : AUTOSAR BSW PROJECT +* Title : CanNm module configuration File +* Author : Hirain +******************************************************************************** +* Description : CanNm module configuration File +* +******************************************************************************** +* Limitations : None +* +******************************************************************************** +* +******************************************************************************** +* Revision History: +* +* Version Date Initials CR# Descriptions +* --------- ---------- ------------ ---------- --------------- +* 04.03.02 18/11/2021 Geno N/A N/A +* +******************************************************************************** +* END_FILE_HDR*/ + + +/******************************************************************************* +* Includes +*******************************************************************************/ +#include "CanNm_PBcfg.h" + + diff --git a/code_app_out/Source/ComStack/AutoSarNm/CanNm_CFG/CanNm_PBcfg.h b/code_app_out/Source/ComStack/AutoSarNm/CanNm_CFG/CanNm_PBcfg.h new file mode 100644 index 0000000..357f9ea --- /dev/null +++ b/code_app_out/Source/ComStack/AutoSarNm/CanNm_CFG/CanNm_PBcfg.h @@ -0,0 +1,39 @@ +/* BEGIN_FILE_HDR +******************************************************************************** +* NOTICE +* This software is the property of HiRain Technologies. Any information +* contained in this doc should not be reproduced, or used, or disclosed +* without the written authorization from HiRain Technologies. +******************************************************************************** +* File Name : CanNm_PBcfg.h +******************************************************************************** +* Project/Product : AUTOSAR BSW PROJECT +* Title : CanNm module configuration File +* Author : Hirain +******************************************************************************** +* Description : CanNm module configuration File +* +******************************************************************************** +* Limitations : None +* +******************************************************************************** +* +******************************************************************************** +* Revision History: +* +* Version Date Initials CR# Descriptions +* --------- ---------- ------------ ---------- --------------- +* 04.03.02 18/11/2021 Geno N/A N/A +* +******************************************************************************** +* END_FILE_HDR*/ +#ifndef _CANNM_PBCFG_H_ +#define _CANNM_PBCFG_H_ + +/******************************************************************************* +* Includes +*******************************************************************************/ +#include "CanNm_Types.h" +#endif + + diff --git a/code_app_out/Source/ComStack/CanDriver/Can.h b/code_app_out/Source/ComStack/CanDriver/Can.h new file mode 100644 index 0000000..9155378 --- /dev/null +++ b/code_app_out/Source/ComStack/CanDriver/Can.h @@ -0,0 +1,211 @@ +/* BEGIN_FILE_HDR +******************************************************************************** +* NOTICE +* This software is the property of HiRain Technologies. Any information +* contained in this doc should not be reproduced, or used, or disclosed +* without the written authorization from HiRain Technologies. +******************************************************************************** +* File Name : Can.h +******************************************************************************** +* Project/Product : AUTOSAR 4.0 +* Title : CAN Driver module head File +* Author : HeYang +******************************************************************************** +* Description : The header file Can.h contains the declaration of the Can +* module API;contains 'extern' declarations of constants, +* global data,type definitions and services that are +* specified in the Can module SWS. +* +******************************************************************************** +* Limitations : only used for MSCAN +* +******************************************************************************** +* +******************************************************************************** +* Revision History: +* +* Version Date Initials CR# Descriptions +* --------- ---------- ------------ ---------- --------------- +* 01.00.00 07/03/2010 HeYang N/A Original +* 01.01.00 09/06/2010 HeYang N/A support multi channel +* 01.02.00 17/07/2010 HeYang N/A modify GlobalInterupts +* 02.00.00 29/07/2013 NingChen N/A DPN_MSCAN_130729_1 +* 02.00.01 15/08/2013 NingChen N/A D10_MSCAN_130815_1 +* 02.00.02 23/09/2013 NingChen N/A D10_MSCAN_130923_1 +* 02.00.03 23/01/2014 SuyunYing N/A D10_MSCAN_140123_1 +******************************************************************************** +* END_FILE_HDR*/ +#ifndef _CAN_H_ +#define _CAN_H_ + +/******************************************************************************* +* Includes +*******************************************************************************/ +#include "ComStack_Types.h" +#include "Can_Cfg.h" +#include "Can_Type.h" +#include "Can_Pl.h" + +/******************************************************************************* +* Macro +*******************************************************************************/ +#define CAN_DATA_DLC ((uint8)0x08U) +/*CAN104: The Can module shall be able to detect the following errors and +exceptions depending on its configuration (development/production)*/ +#if (CAN_DEV_ERROR_DETECT == STD_ON ) + /*API Service called with wrong parameter;Development*/ + #define CAN_E_PARAM_POINTER (0x01u) + /*API Service called with wrong parameter;Development*/ + #define CAN_E_PARAM_HANDLE (0x02u) + /*API Service called with wrong parameter;Development*/ + #define CAN_E_PARAM_DLC (0x03u) + /*API Service called with wrong parameter;Development*/ + #define CAN_E_PARAM_CONTROLLER (0x04u) + /*API Service used without initialization;Development*/ + #define CAN_E_UNINIT (0x05u) + /*Invalid transition for the current mode;Development*/ + #define CAN_E_TRANSITION (0x06u) + /*Received CAN message is lost;Development*/ + #define CAN_E_DATALOST (0x07u) + /*CAN can't enter into initialize mode or leave initialize mode*/ + #define CAN_PL_INIT_ERROR (0x08u) + + #define CAN_INIT_APIID (0x00u) + #define CAN_MAINFUNCTION_WRITE_APIID (0x01u) + #define CAN_INITCONTROLLER_APIID (0x02u) + #define CAN_SETCONTROLLERMODE_APIID (0x03u) + #define CAN_DISABLECONTROLLERINTERRUPTS_APIID (0x04u) + #define CAN_ENABLECONTROLLERINTERRUPTS_APIID (0x05u) + #define CAN_WRITE_APIID (0x06u) + #define CAN_GETVERSIONINFO_APIID (0x07u) + #define CAN_MAINFUNCTION_READ_APIID (0x08u) + #define CAN_MAINFUNCTION_BUSOFF_APIID (0x09u) + #define CAN_MAINFUNCTION_WAKEUP_APIID (0x0au) + #define CAN_MAINFUNCTION_MODE_APIID (0x0cu) +#endif + +/******************************************************************************* +* CanController +*******************************************************************************/ +/*CAN316_Conf :This parameter rovides the controller ID which is unique in a + given CAN Driver. The value for this parameter starts with 0 + and continue without any gaps*/ +#if (CAN_USED_CONTROLLER_NUM >= 1) + #define CAN_DRIVER_CONTROLLER_ID_0 (0u) +#endif +#if (CAN_USED_CONTROLLER_NUM >= 2) + #define CAN_DRIVER_CONTROLLER_ID_1 (1u) +#endif +#if (CAN_USED_CONTROLLER_NUM >= 3) + #define CAN_DRIVER_CONTROLLER_ID_2 (2u) +#endif +#if (CAN_USED_CONTROLLER_NUM >= 4) + #define CAN_DRIVER_CONTROLLER_ID_3 (3u) +#endif +#if (CAN_USED_CONTROLLER_NUM >= 5) + #define CAN_DRIVER_CONTROLLER_ID_4 (4u) +#endif +#if (CAN_USED_CONTROLLER_NUM == 6) + #define CAN_DRIVER_CONTROLLER_ID_5 (5u) +#endif +#if (CAN_USED_CONTROLLER_NUM > 6) + #error "!!!ERROR FOR CAN_USED_CONTROLLER_NUM!!!" +#endif + +/******************************************************************************* +* Global Data Declaration +*******************************************************************************/ +#define CAN_START_SEC_CONFIG_DATA_UNSPECIFIED +#include "MemMap.h" + +extern CONST(uint8, CAN_CONFIG_CONST) CanControllerIDtoPhys[]; +extern CONST(Can_RegInitType, CAN_CONFIG_CONST) CanRegInit[]; +extern CONST(Can_HardwareObjectConfigType, CAN_CONFIG_CONST) + CanHardwareObjectConfig[]; +extern CONST(Can_HwHandleType, CAN_CONFIG_CONST) CanControllerIDtoHRH[]; + +#define CAN_STOP_SEC_CONFIG_DATA_UNSPECIFIED +#include "MemMap.h" + +/******************************************************************************* +* Global Function Declaration +*******************************************************************************/ +#define CAN_START_SEC_PUBLIC_CODE +#include "MemMap.h" + +#if (STD_ON == CAN_VERSION_INFO_API) +extern FUNC(void, CAN_PUBLIC_CODE) Can_GetVersionInfo +( + P2VAR(Std_VersionInfoType, AUTOMATIC, CAN_APPL_DATA) versioninfo +); +#endif + +extern FUNC(void, CAN_PUBLIC_CODE) Can_Init(void); + +extern FUNC(void, CAN_PUBLIC_CODE)Can_InitController +( + uint8 Controller, + P2CONST(Can_ControllerBaudrateConfigType, AUTOMATIC, CAN_CONFIG_CONST) + Config +); + +extern FUNC(Can_ReturnType, CAN_PUBLIC_CODE) Can_SetControllerMode +( + uint8 Controller, + Can_StateTransitionType Transition +); + +extern FUNC(void, CAN_PUBLIC_CODE) Can_DisableControllerInterrupts +( + uint8 Controller +); + +extern FUNC(void, CAN_PUBLIC_CODE)Can_EnableControllerInterrupts +( + uint8 Controller +); + +extern FUNC(void, CAN_PUBLIC_CODE)Can_DisableGlobalInterrupt(void); + +extern FUNC(void, CAN_PUBLIC_CODE) Can_EnableGlobalInterrupt(void); + +extern FUNC(Can_ReturnType, CAN_PUBLIC_CODE) Can_Write +( + Can_HwHandleType Hth, + P2CONST(Can_PduType, AUTOMATIC, CAN_APPL_DATA) PduInfo +); + +/* Scheduled functions */ +extern FUNC(void, CAN_PUBLIC_CODE) Can_MainFunction_Write(void); + +extern FUNC(void, CAN_PUBLIC_CODE) Can_MainFunction_Read(void); + +extern FUNC(void, CAN_PUBLIC_CODE) Can_MainFunction_BusOff(void); + +extern FUNC(void, CAN_PUBLIC_CODE) Can_MainFunction_Wakeup(void); + +extern FUNC(void, CAN_PUBLIC_CODE) Can_MainFunction_Mode(void); + +#define CAN_STOP_SEC_PUBLIC_CODE +#include "MemMap.h" + +/* Application Call back function */ +#define CAN_START_SEC_APPL_CODE +#include "MemMap.h" + +#if (STD_ON == CAN_HARDWARE_TIMEOUT_CHECK) +extern FUNC(void, CAN_APPL_CODE) ApplTimerBegin(uint8 LoopReason); +extern FUNC(Can_ReturnType, CAN_APPL_CODE) ApplTimerOutCheck(uint8 LoopReason); +extern FUNC(void, CAN_APPL_CODE) ApplTimerEnd(uint8 LoopReason); +#endif/* #if (STD_ON == CAN_HARDWARE_TIMEOUT_CHECK) */ + +/*Nm callback function*/ +extern void CanNm_ControllerActive(uint8 Controller); +extern void CanNm_ControllerPassive(uint8 Controller); + +#define CAN_STOP_SEC_APPL_CODE +#include "MemMap.h" + + +#endif /* _CAN_H_ */ + diff --git a/code_app_out/Source/ComStack/CanDriver/Can_Pl.h b/code_app_out/Source/ComStack/CanDriver/Can_Pl.h new file mode 100644 index 0000000..bb10018 --- /dev/null +++ b/code_app_out/Source/ComStack/CanDriver/Can_Pl.h @@ -0,0 +1,403 @@ +/* BEGIN_FILE_HDR +******************************************************************************** +* NOTICE +* This software is the property of HiRain Technologies. Any information +* contained in this doc should not be reproduced, or used, or disclosed +* without the written authorization from HiRain Technologies. +******************************************************************************** +* File Name : Can_Pl.h +******************************************************************************** +* Project/Product : AUTOSAR 4.0 +* Title : CAN Driver platform head File +* Author : HeYang +******************************************************************************** +* Description : The header file Can_Pl.h contains type definitions and +* macros which relate to specific MCU . +* +******************************************************************************** +* Limitations : only used for MSCAN +* +******************************************************************************** +* +******************************************************************************** +* Revision History: +* +* Version Date Initials CR# Descriptions +* --------- ---------- ------------ ---------- --------------- +* 01.00.00 06/05/2012 HeYang N/A Original +* 01.01.00 12/05/2012 NingChen N/A first test feed back ; +* 02.00.00 29/07/2013 NingChen N/A DPN_MSCAN_130729_1 +* 02.00.01 15/08/2013 NingChen N/A D10_MSCAN_130815_1 +* 02.00.02 23/09/2013 NingChen N/A D10_MSCAN_130923_1 +* 02.00.03 23/01/2014 SuyunYing N/A D10_MSCAN_140123_1 +******************************************************************************** +* END_FILE_HDR*/ +#ifndef _CAN_PL_H_ +#define _CAN_PL_H_ + +/******************************************************************************* +* Includes +*******************************************************************************/ +#include "ComStack_Types.h" +#include "Can_Cfg.h" + +/******************************************************************************* +* Macro +*******************************************************************************/ +#define CAN_HARDWARE_TIMEOUT_CHECK STD_OFF +#define CAN_ENTER_CRITICAL_SECTION() Can_DisableGlobalInterrupts() +#define CAN_LEAVE_CRITICAL_SECTION() Can_EnableGlobalInterrupts() +#define CAN_NOT_MATCH (0u) +#define CAN_MATCH (1u) +#define CAN_CONTROLLER_NOT_HOH (0xffu) +#define TOTAL_CAN_MODULE_NUM (0x1u) +#define MSK_EXT_ID_MSB ((uint32)(0x10000000)) +#define HOH_NUM_PER_CONTROLLER (4u) +#define HTH_NUM_PER_CONTROLLER (1u) +#define CAN_MULTIPLEXED_HTH_MBNUM (3u) + +/******************************************************************************* +* ISR enroll related & vetor numbers +*******************************************************************************/ +#define CAN_AUTOENROLL_ISR STD_OFF + +#if(CAN_AUTOENROLL_ISR == STD_OFF) +#define CAN_INTERRUPT_ISR +#else +#define CAN_INTERRUPT_ISR interrupt +#endif + +#if(CAN_AUTOENROLL_ISR == STD_OFF) +#define CAN0WAKEUP_VECTOR_NUMBER +#define CAN0ERR_VECTOR_NUMBER +#define CAN0RX_VECTOR_NUMBER +#define CAN0TX_VECTOR_NUMBER +#else +/* notice: these vector numbers may be different in different MCU , here is the +xep100 demo. When used in other MCU, pls check these vectors */ +#define CAN0WAKEUP_VECTOR_NUMBER (36u) +#define CAN0ERR_VECTOR_NUMBER (37u) +#define CAN0RX_VECTOR_NUMBER (38u) +#define CAN0TX_VECTOR_NUMBER (39u) +#endif + +/******************************************************************************* +* Typedef +*******************************************************************************/ +typedef volatile struct +{ + #if (STD_ON == CAN_ENABLE_EXTERNED_ID) + volatile uint32 Id; + #else + volatile uint16 Id; /* Identifier Register 0,1 */ + volatile uint16 IdExt; /* Identifier Register 2,3 */ + #endif + volatile uint8 DataSeg[8]; /* Data 0 .. 7 */ + volatile uint8 Dlc; /* Data length reg.: X X X X DLC3 DLC2 + DLC1 DLC0 */ + volatile uint8 Priority; /* TxBuf priority reg. */ + volatile uint16 TimeStamp; +}Can_MsgBufType; + +typedef volatile struct +{ + /* CAN Control Register */ + volatile uint32 CAN_CR; + /* CAN mode select register */ + volatile uint32 CAN_MSR; + /* CAN Baud rate Prescaler Register */ + volatile uint32 CAN_BRPR; + /* CAN Bit Timing Register */ + volatile uint32 CAN_BTR; + /* CAN Error Counter Register */ + volatile uint32 CAN_ECR; + /* CAN Error Status Register */ + volatile uint32 CAN_ESR; + /* CAN Status Register */ + volatile uint32 CAN_SR; + /* CAN Interrupt Status Register */ + volatile uint32 CAN_ISR; + /* CAN Interrupt Enable Register */ + volatile uint32 CAN_IER; + /* CAN Interrupt Clear Register */ + volatile uint32 CAN_ICR; + volatile uint32 RESERVED_0; + volatile uint32 RESERVED_1; + /* CAN TX FIFO ID Register */ + volatile uint32 CAN_TXF_IDR; + /* CAN TX FIFO DLC Register */ + volatile uint32 CAN_TXF_DLCR; + /* CAN TX FIFO Data Word1 Register */ + volatile uint32 CAN_TXF_DW1R; + /* CAN TX FIFO Data Word2 Register */ + volatile uint32 CAN_TXF_DW2R; + /* CAN TX HPB ID Register */ + volatile uint32 CAN_HPB_IDR; + /* CAN TX HPB DLC Register */ + volatile uint32 CAN_HPB_DLCR; + /* CAN TX HPB Data Word1 Register */ + volatile uint32 CAN_HPB_DW1R; + /* CAN TX HPB Data Word2 Register */ + volatile uint32 CAN_HPB_DW2R; + /* CAN RX FIFO ID Register */ + volatile uint32 CAN_RXF_IDR; + /* CAN RX FIFO DLC Register */ + volatile uint32 CAN_RXF_DLCR; + /* CAN RX FIFO Data Word1 Register */ + volatile uint32 CAN_RXF_DW1R; + /* CAN RX FIFO Data Word2 Register */ + volatile uint32 CAN_RXF_DW2R; + /* Acceptance Filter Register */ + volatile uint32 CAN_AFR; + /* Acceptance Filter Mask Register1 */ + volatile uint32 CAN_AFMR1; + /* Acceptance Filter ID Register1 */ + volatile uint32 CAN_AFIR1; + /* Acceptance Filter Mask Register2 */ + volatile uint32 CAN_AFMR2; + /* Acceptance Filter ID Register2 */ + volatile uint32 CAN_AFIR2; + /* Acceptance Filter Mask Register3 */ + volatile uint32 CAN_AFMR3; + /* Acceptance Filter ID Register3 */ + volatile uint32 CAN_AFIR3; + /* Acceptance Filter Mask Register4 */ + volatile uint32 CAN_AFMR4; + /* Acceptance Filter ID Register4 */ + volatile uint32 CAN_AFIR4; +} Can_RegType; + + +typedef volatile struct +{ + uint32 CanInitBRPR; + uint32 CanInitBTR; + uint32 CanInitIER; + uint32 CanInitAFR; + uint32 CanInitAFMR1; + uint32 CanInitAFIR1; + uint32 CanInitAFMR2; + uint32 CanInitAFIR2; + uint32 CanInitAFMR3; + uint32 CanInitAFIR3; + uint32 CanInitAFMR4; + uint32 CanInitAFIR4; +} Can_RegInitType; + +typedef struct +{ + uint32 oldCanIER; +}Can_OldIERType; + +/******************************************************************************* +* Register definitions +*******************************************************************************/ + + +#define CAN_CONTROLLER_BASIS_ADR(controllerID) \ + ((Can_RegType *)(CanBasisAddress[controllerID])) +#define CAN_CR(controllerID) (CAN_CONTROLLER_BASIS_ADR(controllerID)->CAN_CR) +#define CAN_MSR(controllerID) (CAN_CONTROLLER_BASIS_ADR(controllerID)->CAN_MSR) +#define CAN_BRPR(controllerID) (CAN_CONTROLLER_BASIS_ADR(controllerID)->CAN_BRPR) +#define CAN_BTR(controllerID) (CAN_CONTROLLER_BASIS_ADR(controllerID)->CAN_BTR) +#define CAN_ECR(controllerID) (CAN_CONTROLLER_BASIS_ADR(controllerID)->CAN_ECR) +#define CAN_ESR(controllerID) (CAN_CONTROLLER_BASIS_ADR(controllerID)->CAN_ESR) +#define CAN_SR(controllerID) (CAN_CONTROLLER_BASIS_ADR(controllerID)->CAN_SR) +#define CAN_ISR(controllerID) (CAN_CONTROLLER_BASIS_ADR(controllerID)->CAN_ISR) +#define CAN_IER(controllerID) (CAN_CONTROLLER_BASIS_ADR(controllerID)->CAN_IER) +#define CAN_ICR(controllerID) (CAN_CONTROLLER_BASIS_ADR(controllerID)->CAN_ICR) +#define CAN_TXF_IDR(controllerID) (CAN_CONTROLLER_BASIS_ADR(controllerID)->CAN_TXF_IDR) +#define CAN_TXF_DLCR(controllerID) (CAN_CONTROLLER_BASIS_ADR(controllerID)->CAN_TXF_DLCR) +#define CAN_TXF_DW1R(controllerID) (CAN_CONTROLLER_BASIS_ADR(controllerID)->CAN_TXF_DW1R) +#define CAN_TXF_DW2R(controllerID) (CAN_CONTROLLER_BASIS_ADR(controllerID)->CAN_TXF_DW2R) +#define CAN_HPB_IDR(controllerID) (CAN_CONTROLLER_BASIS_ADR(controllerID)->CAN_HPB_IDR) +#define CAN_HPB_DLCR(controllerID) (CAN_CONTROLLER_BASIS_ADR(controllerID)->CAN_HPB_DLCR) +#define CAN_HPB_DW1R(controllerID) (CAN_CONTROLLER_BASIS_ADR(controllerID)->CAN_HPB_DW1R) +#define CAN_HPB_DW2R(controllerID) (CAN_CONTROLLER_BASIS_ADR(controllerID)->CAN_HPB_DW2R) +#define CAN_RXF_IDR(controllerID) (CAN_CONTROLLER_BASIS_ADR(controllerID)->CAN_RXF_IDR) +#define CAN_RXF_DLCR(controllerID) (CAN_CONTROLLER_BASIS_ADR(controllerID)->CAN_RXF_DLCR) +#define CAN_RXF_DW1R(controllerID) (CAN_CONTROLLER_BASIS_ADR(controllerID)->CAN_RXF_DW1R) +#define CAN_RXF_DW2R(controllerID) (CAN_CONTROLLER_BASIS_ADR(controllerID)->CAN_RXF_DW2R) +#define CAN_AFR(controllerID) (CAN_CONTROLLER_BASIS_ADR(controllerID)->CAN_AFR) +#define CAN_AFMR1(controllerID) (CAN_CONTROLLER_BASIS_ADR(controllerID)->CAN_AFMR1) +#define CAN_AFIR1(controllerID) (CAN_CONTROLLER_BASIS_ADR(controllerID)->CAN_AFIR1) +#define CAN_AFMR2(controllerID) (CAN_CONTROLLER_BASIS_ADR(controllerID)->CAN_AFMR2) +#define CAN_AFIR2(controllerID) (CAN_CONTROLLER_BASIS_ADR(controllerID)->CAN_AFIR2) +#define CAN_AFMR3(controllerID) (CAN_CONTROLLER_BASIS_ADR(controllerID)->CAN_AFMR3) +#define CAN_AFIR3(controllerID) (CAN_CONTROLLER_BASIS_ADR(controllerID)->CAN_AFIR3) +#define CAN_AFMR4(controllerID) (CAN_CONTROLLER_BASIS_ADR(controllerID)->CAN_AFMR4) +#define CAN_AFIR4(controllerID) (CAN_CONTROLLER_BASIS_ADR(controllerID)->CAN_AFIR4) + + + +/******************************************************************************* +* Register Mask Value define +*******************************************************************************/ + +/* Bitmask of CR: */ +#define CAN_INITRQ ((uint32)0x02) /* initialized mode request */ + +/* Bitmask of SR: */ +#define CAN_INITAK ((uint32)0x01) /* initialized mode ack */ +#define CAN_NORMALAK ((uint32)0x08) /* normal mode ack */ +/* Bitmask of CANCTL1: */ + +#define CAN_SLPAK ((uint8)0x02) /* sleep mode acknowledge */ +#define CAN_WUPM ((uint8)0x04) /* wakeup mode */ +#define CAN_BORM ((uint8)0x08) /* bus-off Recovery upon user request */ +#define CAN_LISTEN ((uint8)0x10) /* listen only */ +#define CAN_LOOPB ((uint8)0x20) /* loopback mode */ +#define CAN_CLKSRC ((uint8)0x40) /* clocksource is bus clock */ +#define CAN_CANE ((uint8)0x80) /* can enabled */ + +/* Bitmasks of CANRFLG: */ +#define CAN_RXF ((uint8)0x01) /* receive buffer full flag */ +#define CAN_OVRIF ((uint8)0x02) /* overrun flag */ +#define CAN_TSTAT0 ((uint8)0x04) /* transmitter status bits TSTAT[0:1] */ +#define CAN_TSTAT1 ((uint8)0x08) /* TSTAT[0:1] =11,bus off */ +#define CAN_RSTAT0 ((uint8)0x10) /* receiver status bits RSTAT[0:1] */ +#define CAN_RSTAT1 ((uint8)0x20) /* */ +#define CAN_CSCIF ((uint8)0x40) /* can status change flag */ +#define CAN_WUPIF ((uint8)0x80) /* wake-up flag */ +#define CAN_BOFFTIF ((uint8)(CAN_TSTAT0|CAN_TSTAT1)) /* BusOff flag */ +#define CAN_BOFFRIF ((uint8)(CAN_RSTAT0|CAN_RSTAT1)) /* BusOff flag */ + +/* Bitmasks of CRIER: */ + +#define CAN_RXFIE ((uint8)0x01) /* receive buffer full enable */ +#define CAN_OVRIE ((uint8)0x02) /* overrun interrupt enable */ +#define CAN_TSTAT0E ((uint8)0x04) /* transmitter status change enable + CAN_TSTAT0E[0:1]*/ +#define CAN_TSTAT1E ((uint8)0x08) /* */ +#define CAN_RSTAT0E ((uint8)0x10) /* receiver statu change enable CAN_RSTAT0E[0:1]*/ +#define CAN_RSTAT1E ((uint8)0x20) /* */ +#define CAN_CSCIE ((uint8)0x40) /* can status change interrupt enable */ +#define CAN_WUPIE ((uint8)0x80) /* wake-up interrupt enable */ +#define CAN_BOFFIE ((uint8)(CAN_TSTAT1E|CAN_RSTAT1E)) /* BusOff flag*/ + + /* Bitmasks of CTARQ: */ +#define CAN_ABTRQ0 ((uint8)0x01) /* abort request */ +#define CAN_ABTRQ1 ((uint8)0x02) +#define CAN_ABTRQ2 ((uint8)0x04) + +/* Bitmasks of CTAAK: */ +#define CAN_ABTAK0 ((uint8)0x01) /* abort acknowledge */ +#define CAN_ABTAK1 ((uint8)0x02) +#define CAN_ABTAK2 ((uint8)0x04) + +/* Bitmasks of CTBSEL: */ +#define CAN_TX0 ((uint8)0x01) +#define CAN_TX1 ((uint8)0x02) +#define CAN_TX1TX2 ((uint8)0x04) +#define CAN_TXIE ((uint8)(CAN_TX0|CAN_TX1|CAN_TX1TX2)) +#define CAN_TXMASKALL ((uint8)(CAN_TX0|CAN_TX1|CAN_TX1TX2)) +#define CAN_TXMASK(hth) ((uint8)(0x02)) + +/* Bitmasks of CMISC: */ +#define CAN_BOHOLD ((uint8)0x01) + +/******************************************************************************* +* Controller related +*******************************************************************************/ +#if (CAN_USED_CONTROLLER_NUM >= 1) + + #if (CAN0_BUSOFF_PROCESSING == CAN_INTERRUPT) + #define CAN0_CSCIE_INT_CFG CAN_CSCIE + #elif (CAN0_BUSOFF_PROCESSING == CAN_POLLING) + #define CAN0_CSCIE_INT_CFG ((uint8)0x00U) + #else + #error "!!!ERROR FOR CAN0_BUSOFF_CFG!!!" + #endif + + #if (CAN0_TX_PROCESSING == CAN_INTERRUPT) + #define CAN0_TX_INT_CFG CAN_TXIE + #elif (CAN0_TX_PROCESSING == CAN_POLLING) + #define CAN0_TX_INT_CFG ((uint8)0x00) + #else + #error "!!!ERROR FOR CAN0_TX_CFG!!!" + #endif + + #if (CAN0_RX_PROCESSING == CAN_INTERRUPT) + #define CAN0_RX_INT_CFG CAN_RXFIE + #elif (CAN0_RX_PROCESSING == CAN_POLLING) + #define CAN0_RX_INT_CFG ((uint8)0x00) + #else + #error "!!!ERROR FOR CAN0_RX_CFG!!!" + #endif + + #if (CAN0_WAKEUP_PROCESSING == CAN_INTERRUPT) + #define CAN0_WAKEUP_INT_CFG CAN_WUPIE + #elif (CAN0_WAKEUP_PROCESSING == CAN_POLLING) + #define CAN0_WAKEUP_INT_CFG ((uint8)0x00) + #else + #error "!!!ERROR FOR CAN0_WAKEUP_CFG!!!" + #endif + + #if (CAN0_CLKSRC_BUSCLK == STD_ON) + #define CAN0_CLKSRC_CFG ((uint8)0x40) + #elif (CAN0_CLKSRC_BUSCLK == STD_OFF) + #define CAN0_CLKSRC_CFG ((uint8)0x00) + #else + #error "!!!ERROR FOR CAN0_WAKEUP_CFG!!!" + #endif + +#endif/* #if (CAN_USED_CONTROLLER_NUM>=1) */ + + +/******************************************************************************* +* Macro Fuctions definitions +*******************************************************************************/ + + +/*Used for transmit*/ +#if (STD_ON == CAN_ENABLE_EXTERNED_ID) + #define GET_REG_STDID(id) (((uint32)(((uint32)(id)) << 21))) +#else + #define GET_REG_STDID(id) ((uint16)(((uint16)(id)) & 0x7ff)) +#endif + + +#define GET_REG_EXTID(id) (uint32)(((uint32)(id) << 13) | ((uint32)1 << 12) | ((uint32)1 << 11) | (((uint32)(id) & 0x1ffc0000) >> 18)) + + +/*Used for receive*/ +#define GET_EXTID(canID) (((uint32)(canID \ + & ((uint32)0x7FFul)) << 18) \ + + ((uint32)((canID >> 13) \ + & ((uint32)0x3FFFF)) )) + +#if (STD_ON == CAN_ENABLE_EXTERNED_ID) + #define GET_STDID(controller) ((uint16)((CAN_RxBuf(controller).Id) >> 21)) +#else + #define GET_STDID(canID) ((uint32)(canID) & 0x7ff) +#endif + +#if (STD_ON == CAN_ENABLE_EXTERNED_ID) + #define GET_IDE(controller) ((uint32)((CAN_RxBuf(controller).Id) \ + &((uint32)0x00080000))) +#else + #define GET_IDE(canID) ((uint32)((canID) \ + &((uint32)1ul << 12))) +#endif + +#define GET_DLC(dlc) ((uint8)((dlc) & ((uint8)0x0f))) + +/******************************************************************************* +* Loop timer define +*******************************************************************************/ +#if (STD_ON == CAN_HARDWARE_TIMEOUT_CHECK) + #define CAN_LOOP_BEGIN(i) ApplTimerBegin(i) + #define CAN_LOOP_TIMEOUT(i) ApplTimerOutCheck(i) + #define CAN_LOOP_END(i) ApplTimerEnd(i) +#else + #define CAN_LOOP_BEGIN(i) + #define CAN_LOOP_TIMEOUT(i) CAN_NOT_OK + #define CAN_LOOP_END(i) +#endif/* #if (STD_ON == CAN_HARDWARE_TIMEOUT_CHECK) */ + +#define INIT_ENTER_TIMEOUT (0x0u) +#define INIT_LEAVE_TIMEOUT (0x1u) +#define SLEEP_ENTER_TIMEOUT (0x2u) +#define SLEEP_LEAVE_TIMEOUT (0x3u) + +#endif/* _CAN_PL_H_*/ diff --git a/code_app_out/Source/ComStack/CanDriver/Can_Type.h b/code_app_out/Source/ComStack/CanDriver/Can_Type.h new file mode 100644 index 0000000..e5f29c3 --- /dev/null +++ b/code_app_out/Source/ComStack/CanDriver/Can_Type.h @@ -0,0 +1,189 @@ +/* BEGIN_FILE_HDR +******************************************************************************** +* NOTICE +* This software is the property of HiRain Technologies. Any information +* contained in this doc should not be reproduced, or used, or disclosed +* without the written authorization from HiRain Technologies. +******************************************************************************** +* File Name : Can_Type.h +******************************************************************************** +* Project/Product : AUTOSAR 4.0 +* Title : CAN Driver module type definitions head File +* Author : HeYang +******************************************************************************** +* Description : The header file Can_Type.h contains the common type +* definitions of Can Driver module +******************************************************************************** +* Limitations : None +* +******************************************************************************** +* +******************************************************************************** +* Revision History: +* +* Version Date Initials CR# Descriptions +* --------- ---------- ------------ ---------- --------------- +* 01.00.00 06/05/2012 HeYang N/A Original +* 01.01.00 12/05/2012 NingChen N/A first test feed back ; +* 02.00.00 29/07/2013 NingChen N/A DPN_MSCAN_130729_1 +* 02.00.01 15/08/2013 NingChen N/A D10_MSCAN_130815_1 +* 02.00.02 23/09/2013 NingChen N/A D10_MSCAN_130923_1 +* 02.00.03 23/01/2014 SuyunYing N/A D10_MSCAN_140123_1 +******************************************************************************** +* END_FILE_HDR*/ +#ifndef _CAN_TYPE_H_ +#define _CAN_TYPE_H_ + +/******************************************************************************* +* Includes +*******************************************************************************/ +#include "Can_Cfg.h" +#include "ComStack_Types.h" + +/******************************************************************************* +* Typedef +*******************************************************************************/ +/*CAN429: +Name: Can_HwHandleType +Type: uint8, uint16 +Range: Standard 0..0x0FF + Extended 0..0xFFFF +Description: +Represents the hardware object handles of a CAN hardware unit. +For CAN hardware units with more than 255 HW objects use extended range. +*/ +#if(CAN_USED_HOH_NUM > 255) + typedef uint16 Can_HwHandleType; +#else + typedef uint8 Can_HwHandleType; +#endif + + /*CAN416: +Name: Can_IdType +Type: uint16, uint32 +Range: Standard 0..0x7FF + Extended 0..0xFFFFFFFF +Description: +Represents the Identifier of an L-PDU. For extended IDs the most significant +bit is set. +*/ +#if (STD_ON == CAN_ENABLE_EXTERNED_ID) + typedef uint32 Can_IdType; +#else + typedef uint32 Can_IdType; +#endif/* #if (STD_ON == CAN_ENABLE_EXTERNED_ID) */ + +/*CAN039: +Name: Can_ReturnType +Type: Enumeration +Range: +CAN_OK success +CAN_NOT_OK error occurred or wakeup event occurred during sleep transition +CAN_BUSY transmit request could not be processed because no transmit object + was available +Description: +Return values of CAN driver API . +*/ +typedef enum +{ + CAN_OK = 0, + CAN_NOT_OK, + CAN_BUSY +}Can_ReturnType; + +#if (CAN_DEV_ERROR_DETECT == STD_ON ) +typedef enum +{ + CAN_UNINT = 0, + CAN_STOPPED, + CAN_STARTED, + CAN_SLEEP +}Can_StateType; +#endif/* #if (CAN_DEV_ERROR_DETECT == STD_ON ) */ + +/* CAN417: +Name: Can_StateTransitionType +Type: Enumeration +Range: +CAN_T_START CAN controller transition value to request state STARTED. +CAN_T_STOP CAN controller transition value to request state STOPPED. +CAN_T_SLEEP CAN controller transition value to request state SLEEP. +CAN_T_WAKEUP CAN controller transition value to request state STOPPED + from state SLEEP. +Description: +State transitions that are used by the function CAN_SetControllerMode +*/ +typedef enum +{ + CAN_T_START = 0, + CAN_T_STOP = 1, + CAN_T_SLEEP = 2, + CAN_T_WAKEUP =3, + CAN_T_NONE = 4 +}Can_StateTransitionType; + + /* CAN413: +Name: Can_ConfigType +Type: Structure +Range: Implementation specific. +Description: +This is the type of the external data structure containing the overall +initialization data for the CAN driver and SFR settings affecting all +controllers. Furthermore it contains pointers to controller configuration +structures. The contents of the initialization data structure are CAN +hardware specific. +*/ +typedef struct +{ + uint8 CanControllerNum; +}Can_ConfigType; + +/*CAN414: +Name: Can_ControllerBaudrateConfigType +Type: Structure +Range: Implementation specific. +Description: +This is the type of the external data structure containing +the bit timing related initialization data for one CAN controller. +The contents of the initialization data structure are CAN hardware specific. +*/ +typedef struct +{ + uint8 CanRegBTR0; + uint8 CanRegBTR1; +}Can_ControllerBaudrateConfigType; + +/*CAN415: +Name: Can_PduType +Type: Structure +Description: +This type is used to provide ID, DLC and SDU from CAN interface +to CAN driver. +*/ +typedef struct +{ + PduIdType swPduHandle; + uint8 length ; + Can_IdType id ; + P2VAR(uint8, TYPEDEF, CAN_APPL_DATA) sdu ; +}Can_PduType; + +/* hoh config type */ +typedef struct +{ + uint8 controllerRef; /*logic controller*/ + uint8 phyHohRef; /*physical Hardware MB*/ + uint8 hohType; /*hohType bit0:0-receive,1-transmit;bit1:0-basic, + 1-full*/ +}Can_HardwareObjectConfigType; + +/* Can Internal buffer length type */ +typedef uint32 Can_LenTyp; + +typedef enum +{ + CAN_UNINITIALIZED = 0, + CAN_INITIALIZED = 1 +}Can_InitType; + +#endif/* _CAN_TYPE_H_*/ diff --git a/code_app_out/Source/ComStack/CanInterface/CanIf.h b/code_app_out/Source/ComStack/CanInterface/CanIf.h new file mode 100644 index 0000000..46ca517 --- /dev/null +++ b/code_app_out/Source/ComStack/CanInterface/CanIf.h @@ -0,0 +1,443 @@ +/* BEGIN_FILE_HDR +******************************************************************************** +* NOTICE +* This software is the property of HiRain Technologies. Any information +* contained in this doc should not be reproduced, or used, or disclosed +* without the written authorization from HiRain Technologies. +******************************************************************************** +* File Name : CanIf.h +******************************************************************************** +* Project/Product : AUTOSAR 4.0 +* Title : CAN Interface module head File +* Author : HeYang +******************************************************************************** +* Description : The header file CanIf.h contains the declaration of the +* Can Interface module API;contains 'extern' declarations of +* constants,global data, type definitions and services that +* are specified in the Can Interface module SWS. +******************************************************************************** +* Limitations : None +* +******************************************************************************** +* +******************************************************************************** +* Revision History: +* +* Version Date Initials CR# Descriptions +* --------- ---------- ------------ ---------- --------------- +* 01.00.00 02/04/2011 HeYang N/A Original +* 01.01.00 20/04/2011 HeYang N/A the parameter of memset +* 01.02.00 18/05/2011 HeYang N/A add the marco + CANIF_CANCONTROLLER_TX�� +* CANIF_CANCONTROLLER_RX�C + CANCONTROLLER_RANGE_RX +* 01.03.00 28/05/2011 HeYang N/A modify CanIf_SetPduMode + +* 01.04.00 15/06/2011 HeYang N/A DPN_CANIF_110615_01 +* +* +* +* 02.00.00 06/06/2012 HeYang N/A DPN_CANIF_120606_01 +* 02.01.00 05/07/2012 HeYang N/A DPN_CANIF_120705_01 +* 02.02.00 08/07/2013 NingChen N/A DPN_CANIF_130708_01 +* 02.02.01 16/07/2013 NingChen N/A DPN_CANIF_130716_01 +* 02.02.02 29/07/2013 NingChen N/A DPN_CANIF_130729_01 +* 02.02.03 05/08/2013 NingChen N/A DPN_CANIF_130805_01 +* 02.02.04 15/08/2013 NingChen N/A D10_CANIF_130815_01 +* 02.02.05 17/09/2013 NingChen N/A D10_CANIF_130917_01 +******************************************************************************** +* END_FILE_HDR*/ + +#ifndef _CANIF_H_ +#define _CANIF_H_ + +/******************************************************************************* +* Includes +*******************************************************************************/ +#include "CanIf_Type.h" +#include "CanIf_Cfg.h" +#include "Can.h" +#if(STD_ON == CANIF_SUPPORT_OSEK_NM) +#include "OsekNm.h" +#endif + +/******************************************************************************* +* Macro +*******************************************************************************/ +#define CANIF_MSK_EXT_ID_MSB ((uint32)(0x10000000)) +#define CANIF_ENTER_CRITICAL_SECTION() Can_DisableGlobalInterrupts() +#define CANIF_LEAVE_CRITICAL_SECTION() Can_EnableGlobalInterrupts() + +#if (STD_ON == CANIF_PUBLIC_READRXPDU_DATA_API) + #define CANIF_RX_BUFFER_SDU_LENGTH_INITIAL (0xffu) +#endif + +#if(CANIF_FILTER_TYPE_INDEX == CANIF_PRIVATE_SOFTWARE_FILTER_TYPE) + #define CANIF_LAST_HRH_RXPDUID ((Can_HwHandleType)(~(0x0))) +#endif + + +/*CANIF525_Conf*/ +/*This parameter defines the name of . This parameter +depends on the parameter CANIF_USERCTRLBUSOFF_UL. +If CANIF_USERCTRLBUSOFF_UL equals CAN_SM the name of is +fixed. +If CANIF_USERCTRLBUSOFF_UL equals CDD, the name of is +selectable.*/ +#if(CANIF_DISPATCH_UL_CAN_SM == CANIF_DISPATCH_USERCTRLBUSOFF_UL) + #define CANIF_DISPATCH_USERCTRLBUSOFF_NAME \ + CanSM_ControllerBusOff(Controller) +#elif(CANIF_DISPATCH_UL_CDD == CANIF_DISPATCH_USERCTRLBUSOFF_UL) + #define CANIF_DISPATCH_USERCTRLBUSOFF_NAME \ + CANIF_DISPATCH_USERCTRLBUSOFF_DEFINED_NAME +#else + #error "!!!ERROR FOR CANIF_DISPATCH_USERCTRLBUSOFF_UL!!!" +#endif + +/*CANIF526_Conf*/ +#if(CANIF_DISPATCH_UL_ECUM == CANIF_DISPATCH_USERSETWAKEUPEVENT_UL) + #define CANIF_DISPATCH_USERSETWAKEUPEVENT_NAME \ + EcuM_ControllerWakeUp(Controller) +#elif(CANIF_DISPATCH_UL_CDD == CANIF_DISPATCH_USERSETWAKEUPEVENT_UL) + #define CANIF_DISPATCH_USERSETWAKEUPEVENT_NAME \ + CANIF_DISPATCH_USERSETWAKEUPEVENT_DEFINED_NAME +#else + #error "!!!ERROR FOR CANIF_DISPATCH_USERSETWAKEUPEVENT_UL!!!" +#endif + +#define CANIF_USERWAKEUP_FUN CANIF_DISPATCH_USERSETWAKEUPEVENT_NAME +#define CANIF_USERCTRLBUSOFF_FUN CANIF_DISPATCH_USERCTRLBUSOFF_NAME + + +/* Development Error */ + +#if (STD_ON == CANIF_PUBLIC_DEV_ERROR_DETECT) + /*API service called with invalid parameter*/ + #define CANIF_E_PARAM_CANID (0x10u) + #define CANIF_E_PARAM_DLC (0x11u) + #define CANIF_E_PARAM_HRH (0x12u) + #define CANIF_E_PARAM_LPDU (0x13u) + #define CANIF_E_PARAM_CONTROLLER (0x14u) + #define CANIF_E_PARAM_CONTROLLERID (0x15u) + #define CANIF_E_PARAM_WAKEUPSOURCE (0x16u) + #define CANIF_E_PARAM_TRCV (0x17u) + #define CANIF_E_PARAM_TRCVMODE (0x18u) + #define CANIF_E_PARAM_TRCVWAKEUPMODE (0x19u) + #define CANIF_E_PARAM_POINTER (0x20u) + + /*API service used without module initialization*/ + #define CANIF_E_UNINIT (0x30u) + /*Requested API operation is not supported*/ + #define CANIF_E_NOK_NOSUPPORT (0x40u) + /*Transmit PDU ID invalid*/ + #define CANIF_E_INVALID_TXPDUID (0x50u) + /*Receive PDU ID invalid*/ + #define CANIF_E_INVALID_RXPDUID (0x60u) + + #define CANIF_SETCONTROLLERMODE_APIID (0x03u) + #define CANIF_GETCONTROLLERMODE_APIID (0x04u) + #define CANIF_TRANSMIT_APIID (0x05u) + #define CANIF_READRXPDUDATA_APIID (0x06u) + #define CANIF_READTXNOTIFSTATUS_APIID (0x07u) + #define CANIF_READRXNOTIFSTATUS_APIID (0x08u) + #define CANIF_SETPDUMODE_APIID (0x09u) + #define CANIF_GETPDUMODE_APIID (0x0au) + #define CANIF_GETVERSIONINFO (0x0bu) + #define CANIF_SETDYNAMICTXID_APIID (0x0cu) + #define CANIF_TXCONFIRMATION_APIID (0x13u) + #define CANIF_RXINDICATION_APIID (0x14u) + #define CANIF_CANCELTXCONFIRMATION_APIID (0x15u) + #define CANIF_CONTROLLERBUSOFF_APIID (0x16u) + #define CANIF_CONTROLLERMODEINDICATION_APIID (0x17u) +#endif + +/* Production Error */ +#if (CANIF_PDU_CHANNEL_MODE_CONTROL == STD_ON) + #define CANIF_RX_INDICATION_ENABLE_MASK ((uint8)0x01) + #define CANIF_TX_REQUEST_ENABLE_MASK ((uint8)0x02) + #define CANIF_TX_NOTIFY_ENABLE_MASK ((uint8)0x04) + + #define CANIF_PDU_GETMODE_MASK ((CanIf_PduGetModeType)0x07) +#endif + +/******************************************************************************* +* Typedef +*******************************************************************************/ +typedef enum +{ + CANIF_UNINITIALIZED = 0, + CANIF_INITIALIZED = 1 +}CanIf_InitType; + +typedef enum +{ + STATIC_TXPDU = 0, + DYNAMIC_TXPDU = 1 +}CanIf_TxPduType; + +typedef enum +{ + STANDARD_CAN = 0, + EXTENDED_CAN = 1 +}CanIf_PduCanIdType; + +/* callback function pointer types */ + +typedef P2FUNC(void, TYPEDEF, User_RxIndication) +( + PduIdType CanUserRxPduId, + P2CONST(PduInfoType, AUTOMATIC, CANIF_APPL_DATA) PduInfoPtr +); + +typedef P2FUNC(void, TYPEDEF, Range_RxIndication) +( + PduIdType RxPudId, + const uint16 RxId, + P2CONST(PduInfoType, AUTOMATIC, CANNM_APPL_DATA)PduInfoPtr +); + +typedef P2FUNC(void, TYPEDEF, User_TxConfirmation) +( + PduIdType CanUserTxPduId +); + +/* config pdu structs types */ +typedef struct +{ + #if (STD_ON == CANIF_UPPER_LAYER_HANDLE) + PduIdType UpperLayerHandle; /*Remap the PduId for UpperLayer*/ + #endif + Can_IdType CanId; /* Can_IdType 16 or 32 bit */ + CanIf_PduCanIdType CanIdType; /* CANIF_TXPDU_CANIDTYPE */ + Can_HwHandleType Hth; /* Hardware transmit handle */ + uint8 Length; /* DLC */ + User_TxConfirmation TxConfirmation; /* Confirmation function */ + #if (STD_ON == CANIF_PUBLIC_SETDYNAMICTXID_API) + CanIf_TxPduType TxPduType; /* CanIfTxPduType DYNAMIC or STATIC*/ + #endif + #if(STD_ON == CANIF_PUBLIC_READTXPDU_NOTIFY_STATUS_API) + /*Enables and disables transmit confirmation for each transmit CAN L-PDU for + reading its notification status. True: Enabled False: Disabled*/ + boolean TxPduReadNotifyStatus; + #endif +} CanIf_TxPduConfigType; + +typedef struct +{ + /* Lower CAN Identifier of a receive CAN L-PDU for identifier range + definition, in which all CAN Ids are mapped to one PduId. */ + Can_IdType RxPduCanIdRangeLowerCanId ; + /* Upper CAN Identifier of a receive CAN L-PDU for identifier range + definition, in which all CAN Ids are mapped to one PduId. */ + Can_IdType RxPduCanIdRangeUpperCanId; + + Range_RxIndication RangeRxIndication; +}CanIf_RxPduCanIdRangeType; + + +typedef struct +{ + #if (STD_ON == CANIF_UPPER_LAYER_HANDLE) + PduIdType UpperLayerHandle; + #endif + Can_IdType CanId; /* Can_IdType 16 or 32 bit */ + CanIf_PduCanIdType CanIdType; /* CANIF_RXPDU_CANIDTYPE */ + Can_HwHandleType Hrh; /* Hardware transmit handle */ + uint8 Length; /* DLC */ + + User_RxIndication RxIndication; /* Indication function */ + + #if(STD_ON == CANIF_PUBLIC_READRXPDU_NOTIFY_STATUS_API) + /*Enables and disables receive indication for each receive CAN L-PDU for + reading its notification status. True: Enabled False: Disabled*/ + boolean RxPduReadNotifyStatus; + #endif + + #if (STD_ON == CANIF_PUBLIC_READRXPDU_DATA_API) + /*Enables and disables the Rx buffering for reading of received L-PDU data. + True: Enabled False: Disabled*/ + boolean RxPduReadData; + #endif + + #if (STD_ON == CANIF_RX_PDU_RANGE_CANID) + P2CONST(CanIf_RxPduCanIdRangeType, TYPEDEF, CANIF_CONFIG_CONST) + RxPduCanIdRangeCfg; + #endif + + #if(CANIF_FILTER_TYPE_INDEX == CANIF_PRIVATE_SOFTWARE_FILTER_TYPE) + PduIdType HrhNextRxPduID; + #endif +} CanIf_RxPduConfigType; + +typedef struct +{ + /*Lower CAN Identifier of a receive CAN L-PDU for identifier range + definition, in which all CAN Ids shall pass the software filtering. */ + Can_IdType HrhRangeRxPduLowerCanId; + /*Upper CAN Identifier of a receive CAN L-PDU for identifier range + definition, in which all CAN Ids shall pass the software filtering.*/ + Can_IdType HrhRangeRxPduUpperCanId; + + CanIf_PduCanIdType HrhRangeRxPduRangeCanIdType; +}CanIf_HrhRangeCfgType; + +/******************************************************************************* +* Global Data Define, No need to be configed +*******************************************************************************/ +#define CANIF_START_SEC_VAR_UNSPECIFIED +#include "MemMap.h" + + +#if (STD_ON == CANIF_PUBLIC_TX_BUFFERING) + extern VAR(boolean, CANIF_PRIVATE_DATA) CanIfTxBufferPDUFillflag[]; + + extern VAR(uint8, CANIF_PRIVATE_DATA) CanIfTxBufferSdu[][8]; + + extern VAR(Can_PduType, CANIF_PRIVATE_DATA) CanIfTxBufferPdu[]; +#endif + +#if (STD_ON == CANIF_PUBLIC_SETDYNAMICTXID_API) + extern VAR(Can_IdType, CANIF_PRIVATE_DATA) CanIfTxPduCanIdForDynamic[]; +#endif + +#if(STD_ON == CANIF_PUBLIC_READTXPDU_NOTIFY_STATUS_API) + extern VAR(CanIf_NotifStatusType, CANIF_PRIVATE_DATA) CanIfTxNotifStatus[]; +#endif + +#if(STD_ON == CANIF_PUBLIC_READRXPDU_NOTIFY_STATUS_API) + extern VAR(CanIf_NotifStatusType, CANIF_PRIVATE_DATA) CanIfRxNotifStatus[]; +#endif + +#if (STD_ON == CANIF_PUBLIC_READRXPDU_DATA_API) + extern VAR(uint8, CANIF_PRIVATE_DATA) CanIfRxBufferSduData[][8]; + extern VAR(PduLengthType, CANIF_PRIVATE_DATA) CanIfRxBufferSduLength[] ; +#endif + +#define CANIF_STOP_SEC_VAR_UNSPECIFIED +#include "MemMap.h" + +#define CANIF_START_SEC_CONFIG_DATA_UNSPECIFIED +#include "MemMap.h" + +extern CONST(PduIdType, CANIF_CONFIG_CONST) CanIfInitNumberOfCanRxPduIds ; +extern CONST(PduIdType, CANIF_CONFIG_CONST) CanIfInitNumberOfCanTxPduIds ; +extern CONST(Can_HwHandleType, CANIF_CONFIG_CONST) CanIfInitNumberofHrh ; + +/******************************************************************************* +* Config Parameters +*******************************************************************************/ +#if(CANIF_FILTER_TYPE_INDEX == CANIF_PRIVATE_SOFTWARE_FILTER_TYPE) +extern CONST(Can_HwHandleType, CANIF_CONFIG_CONST) CanIfHrhFirstRxPduID[]; +#endif + +#if(STD_ON == CANIF_HRH_RANGE_FILTER) +extern CONST(CanIf_HrhRangeCfgType, CANIF_CONFIG_CONST) CanIfHrhRangeCfg[]; +#endif + +extern CONST(CanIf_RxPduConfigType, CANIF_CONFIG_CONST) CanIfRxPduConfig[]; +extern CONST(CanIf_TxPduConfigType, CANIF_CONFIG_CONST) CanIfTxPduConfig[]; + +#define CANIF_STOP_SEC_CONFIG_DATA_UNSPECIFIED +#include "MemMap.h" + +/******************************************************************************* +* Global Function Declaration +*******************************************************************************/ +#define CANIF_START_SEC_PUBLIC_CODE +#include "MemMap.h" + +extern FUNC(void, CANIF_PUBLIC_CODE) CanIf_Init(void); + +extern FUNC(Std_ReturnType, CANIF_PUBLIC_CODE) CanIf_SetControllerMode +( + uint8 ControllerId, + CanIf_ControllerModeType ControllerMode +); +extern FUNC(Std_ReturnType, CANIF_PUBLIC_CODE) CanIf_GetControllerMode +( + uint8 ControllerId, + P2VAR(CanIf_ControllerModeType, AUTOMATIC, CANIF_APPL_DATA) + ControllerModePtr +); + + +extern FUNC(Std_ReturnType, CANIF_PUBLIC_CODE) CanIf_Transmit +( + PduIdType CanTxPduId, + P2CONST(PduInfoType, AUTOMATIC, CANIF_APPL_DATA) PduInfoPtr +); + +#if(CANIF_PUBLIC_CANCEL_TRANSMIT_SUPPORT == STD_ON) +extern FUNC(Std_ReturnType, CANIF_PUBLIC_CODE) CanIf_CancelTransmit +( + PduIdType CanTxPduId +); +#endif + +#if (CANIF_PDU_CHANNEL_MODE_CONTROL == STD_ON) +extern FUNC(Std_ReturnType, CANIF_PUBLIC_CODE) CanIf_SetPduMode +( + uint8 ControllerId, + CanIf_PduSetModeType PduModeRequest +); + +extern FUNC(Std_ReturnType, CANIF_PUBLIC_CODE) CanIf_GetPduMode +( + uint8 ControllerId, + P2VAR(CanIf_PduGetModeType, AUTOMATIC, CANIF_APPL_DATA) PduModePtr +); +#endif + + +#if (STD_ON == CANIF_PUBLIC_SETDYNAMICTXID_API) +extern FUNC(Std_ReturnType, CANIF_PUBLIC_CODE) CanIf_SetDynamicTxId +( + PduIdType CanTxPduId, + Can_IdType CanId +); +#endif + + + + +#if(STD_ON == CANIF_PUBLIC_READTXPDU_NOTIFY_STATUS_API) +extern FUNC(CanIf_NotifStatusType, CANIF_PUBLIC_CODE) CanIf_ReadTxNotifStatus +( + PduIdType CanTxPduId +); +#endif + +#if(STD_ON == CANIF_PUBLIC_READRXPDU_NOTIFY_STATUS_API) +extern FUNC(CanIf_NotifStatusType, CANIF_PUBLIC_CODE) CanIf_ReadRxNotifStatus +( + PduIdType CanRxPduId +); +#endif + +#if (STD_ON == CANIF_PUBLIC_READRXPDU_DATA_API) +extern FUNC(Std_ReturnType, CANIF_PUBLIC_CODE) CanIf_ReadRxPduData +( + PduIdType CanRxPduId, + P2VAR(PduInfoType, AUTOMATIC, CANIF_APPL_DATA) PduInfoPtr +); +#endif + +#if (STD_ON == CANIF_PUBLIC_VERSION_INFO_API) +extern FUNC(void, CANIF_PUBLIC_CODE) CanIf_GetVersionInfo +( + P2VAR(Std_VersionInfoType, AUTOMATIC, CANIF_APPL_DATA) VersionInfo +); +#endif + +#if (STD_ON == CANIF_PUBLIC_TX_BUFFERING) +extern FUNC(void, CANIF_PUBLIC_CODE) CanIf_ClearTransmitBuffer +( + uint8 ControllerId +); +#endif + +#define CANIF_STOP_SEC_PUBLIC_CODE +#include "MemMap.h" + +#endif/* _CANIF_H_ */ + diff --git a/code_app_out/Source/ComStack/CanInterface/CanIf_Cbk.h b/code_app_out/Source/ComStack/CanInterface/CanIf_Cbk.h new file mode 100644 index 0000000..07eecb9 --- /dev/null +++ b/code_app_out/Source/ComStack/CanInterface/CanIf_Cbk.h @@ -0,0 +1,103 @@ +/* BEGIN_FILE_HDR +******************************************************************************** +* NOTICE +* This software is the property of HiRain Technologies. Any information +* contained in this doc should not be reproduced, or used, or disclosed +* without the written authorization from HiRain Technologies. +******************************************************************************** +* File Name : CanIf_Cbk.h +******************************************************************************** +* Project/Product : AUTOSAR 4.0 +* Title : CAN Interface module call back head File +* Author : HeYang +******************************************************************************** +* Description : The header file CanIf_Cbk.h contains the declaration of +* callback functions which is called by the Can module +* +******************************************************************************** +* Limitations : None +* +******************************************************************************** +* +******************************************************************************** +* Revision History: +* +* Version Date Initials CR# Descriptions +* --------- ---------- ------------ ---------- --------------- +* 01.00.00 02/04/2011 HeYang N/A Original +* 01.01.00 20/04/2011 HeYang N/A the parameter of memset +* 01.02.00 18/05/2011 HeYang N/A add the marco + CANIF_CANCONTROLLER_TX +* CANIF_CANCONTROLLER_RX + CANCONTROLLER_RANGE_RX +* 01.03.00 28/05/2011 HeYang N/A modify CanIf_SetPduMode + +* 01.04.00 15/06/2011 HeYang N/A DPN_CANIF_110615_01 +* +* +* +* 02.00.00 06/06/2012 HeYang N/A DPN_CANIF_120606_01 +* 02.01.00 05/07/2012 HeYang N/A DPN_CANIF_120705_01 +* 02.02.00 08/07/2013 NingChen N/A DPN_CANIF_130708_01 +* 02.02.01 16/07/2013 NingChen N/A DPN_CANIF_130716_01 +* 02.02.02 29/07/2013 NingChen N/A DPN_CANIF_130729_01 +* 02.02.03 05/08/2013 NingChen N/A DPN_CANIF_130805_01 +* 02.02.04 15/08/2013 NingChen N/A D10_CANIF_130815_01 +* 02.02.05 17/09/2013 NingChen N/A D10_CANIF_130917_01 +******************************************************************************** +* END_FILE_HDR*/ + +#ifndef _CANIF_CBK_H_ +#define _CANIF_CBK_H_ + +/******************************************************************************* +* Includes +*******************************************************************************/ +#include "CanIf.h" + +/******************************************************************************* +* Callback Function Declaration +*******************************************************************************/ +#define CANIF_START_SEC_PUBLIC_CODE +#include "MemMap.h" + +extern FUNC(void, CANIF_PUBLIC_CODE) CanIf_TxConfirmation +( + PduIdType CanTxPduId +); + +extern FUNC(void, CANIF_PUBLIC_CODE) CanIf_RxIndication +( + Can_HwHandleType Hrh, + Can_IdType CanId, + uint8 CanDlc, + P2CONST(uint8, AUTOMATIC, CANIF_APPL_DATA) CanSduPtr +); +#if(CANIF_PUBLIC_CANCEL_TRANSMIT_SUPPORT == STD_ON) +extern FUNC(void, CANIF_PUBLIC_CODE) CanIf_CancelTxConfirmation +( + P2CONST(Can_PduType, AUTOMATIC, CANIF_APPL_DATA) PduInfoPtr +); +#endif + +extern FUNC(void, CANIF_PUBLIC_CODE) CanIf_ControllerBusOff +( + uint8 Controller +); + +extern FUNC(void, CANIF_PUBLIC_CODE) CanIf_ControllerWakeUp +( + uint8 Controller +); + +extern FUNC(void, CANIF_PUBLIC_CODE) CanIf_ControllerModeIndication +( + uint8 Controller, + CanIf_ControllerModeType ControllerMode +); + +#define CANIF_STOP_SEC_PUBLIC_CODE +#include "MemMap.h" + +#endif/* _CANIF_CBK_H_ */ + diff --git a/code_app_out/Source/ComStack/CanInterface/CanIf_Type.h b/code_app_out/Source/ComStack/CanInterface/CanIf_Type.h new file mode 100644 index 0000000..d835a3c --- /dev/null +++ b/code_app_out/Source/ComStack/CanInterface/CanIf_Type.h @@ -0,0 +1,144 @@ +/* BEGIN_FILE_HDR +******************************************************************************** +* NOTICE +* This software is the property of HiRain Technologies. Any information +* contained in this doc should not be reproduced, or used, or disclosed +* without the written authorization from HiRain Technologies. +******************************************************************************** +* File Name : CanIf_Type.h +******************************************************************************** +* Project/Product : AUTOSAR 4.0 +* Title : CAN Interface module type definitions head File +* Author : HeYang +******************************************************************************** +* Description : The header file CanIf_Type.h contains the common type +* definitions of the module Can Interface +* +******************************************************************************** +* Limitations : None +* +******************************************************************************** +* +******************************************************************************** +* Revision History: +* +* Version Date Initials CR# Descriptions +* --------- ---------- ------------ ---------- --------------- +* 01.00.00 02/04/2011 HeYang N/A Original +* 01.01.00 20/04/2011 HeYang N/A the parameter of memset +* 01.02.00 18/05/2011 HeYang N/A add the marco + CANIF_CANCONTROLLER_TX¡¢ +* CANIF_CANCONTROLLER_RX¡C + CANCONTROLLER_RANGE_RX +* 01.03.00 28/05/2011 HeYang N/A modify CanIf_SetPduMode + +* 01.04.00 15/06/2011 HeYang N/A DPN_CANIF_110615_01 +* +* +* +* 02.00.00 06/06/2012 HeYang N/A DPN_CANIF_120606_01 +* 02.01.00 05/07/2012 HeYang N/A DPN_CANIF_120705_01 +* 02.02.00 08/07/2013 NingChen N/A DPN_CANIF_130708_01 +* 02.02.01 16/07/2013 NingChen N/A DPN_CANIF_130716_01 +* 02.02.02 29/07/2013 NingChen N/A DPN_CANIF_130729_01 +* 02.02.03 05/08/2013 NingChen N/A DPN_CANIF_130805_01 +* 02.02.04 15/08/2013 NingChen N/A D10_CANIF_130815_01 +* 02.02.05 17/09/2013 NingChen N/A D10_CANIF_130917_01 +******************************************************************************** +* END_FILE_HDR*/ +#ifndef _CANIF_TYPE_H_ +#define _CANIF_TYPE_H_ + +/******************************************************************************* +* Includes +*******************************************************************************/ +#include "ComStack_Types.h" +#include "Can_Type.h" + /*Operating modes of the CAN Controller and CAN Driver */ + +/******************************************************************************* +* Typedef +*******************************************************************************/ +/*Operating modes of the CAN Controller and CAN Driver*/ +typedef enum +{ + /*UNINIT mode. Default mode of the CAN Driver and all CAN controllers + connected to one CAN network after power on. */ + CANIF_CS_UNINIT = 0, + /*SLEEP mode. At least one of all CAN controllers connected to one CAN + network are set into the SLEEP mode and can be woken up by request of the + CAN Driver or by a network event (must be supported by CAN hardware) */ + CANIF_CS_SLEEP, + /*STARTED mode. All CAN controllers connected to one CAN network are started + + by the CAN Driver and in full-operational mode. */ + CANIF_CS_STARTED, + /*STOPPED mode. At least one of all CAN controllers connected to one CAN + network is halted and does not operate on the network. */ + CANIF_CS_STOPPED + +}CanIf_ControllerModeType; + + +/*Request for PDU channel group. The request type of the channel defines it's +transmit or receive activity. Communication direction (transmission and/or +reception) of the channel can be controlled separately or together +by upper layers.*/ +typedef enum +{ + /*0000,Channel shall be set to the offline mode => no transmission and + reception */ + CANIF_SET_OFFLINE = 0x00, + /*0111,Channel shall be set to online mode => full operation mode */ + CANIF_SET_ONLINE = 0x07, + /*0110,Receive path of the corresponding channel shall be disabled*/ + CANIF_SET_RX_OFFLINE = 0x06, + /*1001,Receive path of the corresponding channel shall be enabled*/ + CANIF_SET_RX_ONLINE = 0x09, + /*0001,Transmit path of the corresponding channel shall be disabled*/ + CANIF_SET_TX_OFFLINE = 0x01, + /*0100,Transmit path of the corresponding channel shall be set to the + offline active mode => notifications are processed but transmit + requests are blocked.*/ + CANIF_SET_TX_OFFLINE_ACTIVE = 0x04, + /*1110,Transmit path of the corresponding channel shall be enabled*/ + CANIF_SET_TX_ONLINE = 0x0e +}CanIf_PduSetModeType ; + + + /*Status of the PDU channel group. Current mode of the channel defines + its transmit or receive activity. Communication direction (transmission and + /or reception) of the channel can be controlled separately or together + by upper layers*/ +typedef enum +{ + /*000,Channel is in the offline mode => no transmission and reception*/ + CANIF_GET_OFFLINE = 0, + /*100,Transmit path of the corresponding channel is in the offline active + mode => transmit notifications are processed but transmit requests are + blocked.The receive path is disabled.*/ + CANIF_GET_OFFLINE_ACTIVE = 4, + /*101,Transmit path of the corresponding channel is in the offline active + mode => transmit notifications are processed but transmit requests are + blocked.The receive path is enabled.*/ + CANIF_GET_OFFLINE_ACTIVE_RX_ONLINE = 5, + /*111,Channel is in the online mode => full operation mode*/ + CANIF_GET_ONLINE = 7, + /*001,Receive path of the corresponding channel is enabled and transmit path + is disabled.*/ + CANIF_GET_RX_ONLINE = 1, + /*110,Transmit path of the corresponding channel is enabled and receive path + is disabled.*/ + CANIF_GET_TX_ONLINE = 6 +}CanIf_PduGetModeType ; + +/*Return value of CAN L-PDU notification status.*/ +typedef enum +{ + /*No transmit or receive event occurred for the requested L-PDU.*/ + CANIF_NO_NOTIFICATION = 0, + /*The requested Rx/Tx CAN L-PDU was successfully transmitted or received.*/ + CANIF_TX_RX_NOTIFICATION = 1 +}CanIf_NotifStatusType ; + +#endif/* _CANIF_TYPE_H_ */ \ No newline at end of file diff --git a/code_app_out/Source/ComStack/CanInterface/Dem/DEM_Cfg.h b/code_app_out/Source/ComStack/CanInterface/Dem/DEM_Cfg.h new file mode 100644 index 0000000..1be976e --- /dev/null +++ b/code_app_out/Source/ComStack/CanInterface/Dem/DEM_Cfg.h @@ -0,0 +1,207 @@ +/** + ****************************************************************************** + * @file + * @author + * @version + * @date + * @brief + * @function List: + ****************************************************************************** + * @attention + * + * + *

© COPYRIGHT 2021

+ ****************************************************************************** + * @History: + * @Author: + * @Data: + * @Version: +*/ +#ifndef _DEM_CFG_H_ +#define _DEM_CFG_H_ + +#include "Dcm_Cfg.h" +#include "Dem_Types.h" +#include "PduR_Dcm.h" +#include "calibration.h" +#include "nvm.h" +typedef u16 dem_addr_t; //TEMP_MODIFY + +#define TOTAL_DTC_NUM (NUM_OF_DTC) /*配置 NUM_OF_DTC */ +#define DTC_STATUS_USED_MASK (0x49U) /*配置 DTC MASK */ +#define DTC_SNAP_SHOT_DATA_ENABLE (STD_OFF) /*配置是否支持快照 0: 不使用snap shot data */ +#define DTC_EXTENDED_DATA_ENABLE (STD_OFF) /*配置是否支持擴展數據:0: 不使用EXTENDEDt data */ + +#define DEM_DTC_STORAGE_TO_EEPROM_EN (STD_ON) +#define TOTAL_MAX_STORED_DTC_NUM (NUM_OF_DTC) /*配置最大的 存儲 DTC 的個數 */ + +//#define DTC_TASK_TICK_PER_SEC (TASK_TICKS_PER_SEC*0.5) /*配置 CAN TASK PERIOD:100/s CAN 任務 每秒100次 */ +//#define DTC_TIME_s(x) ((u16)((x)*DTC_TASK_TICK_PER_SEC)) + +#define EEPROM_INTIED_FLAG_ADDR (EEPROM_LOGIC_BASE_ADDR_FOR_DTC) //NVM_START_ADDR_DTC -- 注意 +#define DEM_DTC_STORAGE_EEPROM_START_ADDR (dem_addr_t)(EEPROM_INTIED_FLAG_ADDR+2u) /*配置 DTC 存儲首地址 */ + +#if (TOTAL_DTC_NUM <253) +typedef uint8_t dtc_handle_t; +#else +typedef uint16_t dtc_handle_t; +#endif + +#define DTC_NO_EXIST ((dtc_handle_t)(-1)) //其實就是 ff表示 不存在 +#define DTC_IS_IN_GROUP ((dtc_handle_t)(-2)) //其實就是 fe表示在組內 + +#define DTC_INIT_FLAG_STORY_TO_EXT_EEPROM +#define DTC_RECORD_STORY_TO_EXT_EEPROM + +#define DTC_ALL_GROUPS 0xFFFFFFu +#define DTC_NETWORK_COMM_GROUPS 0xC00000u +#define DTC_BODY_GROUPS 0x800000u +#define DTC_CHASSIS_GROUPS 0x400000u +#define DTC_POWERTRAIN_GROUPS 0X100000u +#define DTC_EMISSION_GROUPS 0x000000u + + + +typedef uint16 IntEEPROM1_TAddress; /* Type of address to the EEPROM */ + + +#define EEPROM_UNINITED 0u +#define EEPROM_INITED 1u +#define EEPROM_DTC_CLEAR 2u + +#define DTC_SET_TIME_FOR_OUTPUT (80u) /* 80*10MS = 800mS */ +#define DTC_TEST_FAILED (0u) +#define DTC_TEST_PASSED (1u) + +#define TEST_RESULT_STATE_BIT_LENGTH (2U) +#define TOTAL_TEST_RESULT_NUM ((TOTAL_DTC_NUM)/(8/(TEST_RESULT_STATE_BIT_LENGTH)) + 1) + +#define TOTAL_DTC_FLAG_NUM (TOTAL_DTC_NUM / 8 + 1) +//#define DTC_MONITORING_CYCLE_NUM (TOTAL_STORED_DTC_NUM / 8 + 1) +#define LAST_DTC_INDEX (TOTAL_DTC_NUM-1) +#define NO_DTC_STORED_INDEX (0xffu) + + + +#define TOTAL_DTC_MONITORING_CYCLE 2u +#define DTC_MONITORING_CYCLE2 0u +#define DTC_MONITORING_CYCLE4 1u + +#define TOTAL_DTC_SNAP_SHOT_ID_NUM 4u /* FE-5 4 did */ +#define TOTAL_DTC_EXTENDED_DATA_NUM 1u +#define MAX_DTC_AGING_COUNTER_VALUE 40u + +#define MIN_DTC_FAULT_DT_CNT_VALUE 16u /* -128 + 16 */ +#define MAX_DTC_FAULT_DT_CNT_VALUE 223u /* 127 - 32 */ +#define DTC_FAULT_DT_CNT_UP_STEP 32u +#define DTC_FAULT_DT_CNT_DOWN_STEP 16u + +#define DTC_MONITORING_CYCLE0_MASK 0x01u +#define DTC_MONITORING_CYCLE1_MASK 0x02u +#define DTC_MONITORING_CYCLE2_MASK 0x04u +#define DTC_MONITORING_CYCLE3_MASK 0x08u +#define DTC_MONITORING_CYCLE4_MASK 0x10u + +/* Define DTC index */ + + +#define DTC_POWER_LOW_ID 0u /*0*/ /*低於9v 500ms*/ +#define DTC_POWER_HIGH_ID 1u /*1*/ /*超過16v 500ms*/ + +#define DTC_PREV_BUTTON_STUCK_ID 2u //向上搜台 +#define DTC_PHONE_BUTTON_STUCK_ID 3u //电话 +#define DTC_VOICE_BUTTON_STUCK_ID 4u +#define DTC_VEDIO_BUTTON_STUCK_ID 5u +#define DTC_NEXT_BUTTON_STUCK_ID 6u +#define DTC_MUTE_BUTTON_STUCK_ID 7u +#define DTC_CUSTOM_BUTTON_STUCK_ID 8u +#define DTC_MENU2_CTRL_BUTTON_STUCK_ID 9u +#define DTC_LOST_COM_WITH_GW_ID 10u +#define DTC_SPDP_BUTTON_STUCK_ID 11u +#define DTC_SPDD_BUTTON_STUCK_ID 12u +#define DTC_DSPD_BUTTON_STUCK_ID 13u +#define DTC_DSPP_BUTTON_STUCK_ID 14u +#define DTC_LEFT_MENU_STUCK_ID 15u +#define DTC_LEFT_PICK_STUCK_ID 16u +#define DTC_RIGHT_PICK_STUCK_ID 17u +#define DTC_HEAT_OVERCURRENT_INDEX 18u +#define DTC_SWH_STRIP_SHORT_INDEX 19u +#define DTC_SWH_STRIP_OPEN_INDEX 20u +#define DTC_SWH_NTC_SHORT_INDEX 21u +#define DTC_SWH_NTC_OPEN_INDEX 22u + +#define DTC_GROUP_BODY_INDEX_MIN (0U) +#define DTC_GROUP_BODY_INDEX_MAX (DTC_TAILGATE_PE_SW_STUCK_ID) + +#define DTC_GROUP_NETWORK_INDEX_MIN (DTC_GROUP_BODY_INDEX_MAX+1) +#define DTC_GROUP_NETWORK_INDEX_MAX (DTC_LOST_COMMUNICATION_IMMO_ID) + +#define DTC_VOLTAGE_IS_TOO_LOW (DTC_POWER_LOW_ID) +#define DTC_VOLTAGE_IS_TOO_HIGH (DTC_POWER_HIGH_ID) + + + + + + + +typedef struct{ + dtc_status_t dtc_status; +#if (DTC_SNAP_SHOT_DATA_ENABLE) /* not used for brilliance-auto */ + dtc_snap_shot_data_t DTCSnapShotData; +#endif +#if (DTC_EXTENDED_DATA_ENABLE) + dtc_extended_data_t DTCextended_data; +#endif +} dtc_stored_data_t; + +typedef struct{ + u8 write_pointer; /* DTC_INDEX Stored to RAM */ + u8 stored_dtc_index[TOTAL_MAX_STORED_DTC_NUM]; /* DTC_INDEX Stored to RAM ----是把SupportedDTC中的需要儲存到eeprom的buf id 轉到該數組中 所以<=11*/ + /* Don't save cMonitoringCycle in EEPROM, it just used for the increasing of monitory cycle counter . */ + dtc_stored_data_t dtc_stored_dt[TOTAL_MAX_STORED_DTC_NUM]; +} dtc_info_struct_t; + +#define SYS_PARM_STRGE_START_ADDR (0) + +//#define DTC_SNAPSHOT_RECORD_LENGTH (sizeof(dtc_snap_shot_data_t) + 8) /* snap_shot_data LENGTH + DID 4*2 BYTE LENGTH) */ +#define DTC_SNAPSHOT_RECORD_LENGTH (sizeof(dtc_snap_shot_data_t) + 2 * TOTAL_DTC_SNAP_SHOT_ID_NUM) /* snap_shot_data LENGTH + DID 4*2 BYTE LENGTH) */ +#define DTC_EXTDATA_RECORD_LENGTH (sizeof(dtc_extended_data_t) + 1 * TOTAL_DTC_EXTENDED_DATA_NUM) /* snap_shot_data LENGTH + DID 4*2 BYTE LENGTH) */ + + +#define _SnapShort_size_0 (fld_sizeof(dtc_snap_shot_data_t, main_ecu_supply_voltage)) +#define _SnapShort_size_1 (fld_sizeof(dtc_snap_shot_data_t, vehicle_speed)) +#define _SnapShort_size_2 (fld_sizeof(dtc_snap_shot_data_t, odometer)) +#define _SnapShort_size_3 (fld_sizeof(dtc_snap_shot_data_t, tbox_datatime)) + + +#define _SnapShort_ADDR_0 (offsetof1(dtc_snap_shot_data_t, main_ecu_supply_voltage) + SYS_PARM_STRGE_START_ADDR) +#define _SnapShort_ADDR_1 (offsetof1(dtc_snap_shot_data_t, vehicle_speed) + SYS_PARM_STRGE_START_ADDR) +#define _SnapShort_ADDR_2 (offsetof1(dtc_snap_shot_data_t, odometer) + SYS_PARM_STRGE_START_ADDR) +#define _SnapShort_ADDR_3 (offsetof1(dtc_snap_shot_data_t, tbox_datatime) + SYS_PARM_STRGE_START_ADDR) + +#define _ExtData_ADDR_1 (sizeof(dtc_status_t) +sizeof(dtc_snap_shot_data_t) + SYS_PARM_STRGE_START_ADDR) +#define _ExtData_ADDR_2 (_ExtData_ADDR_1 + 1) + + +//extern const uint32 SupportedDTC[NUM_OF_DTC]; + +#if (DTC_SNAP_SHOT_DATA_ENABLE) +extern const u8 c_dtc_snap_shot_data_id[TOTAL_DTC_SNAP_SHOT_ID_NUM][2]; +extern const u8 c_dtc_snap_shot_data_size[TOTAL_DTC_SNAP_SHOT_ID_NUM]; +#endif + +#if (DTC_EXTENDED_DATA_ENABLE) +extern const u8 c_dtc_extended_data_id[TOTAL_DTC_EXTENDED_DATA_NUM]; +#endif + + +extern const u32 SupportedDTC[TOTAL_DTC_NUM] ; + + +#define DEM_TASK_TIME_UNIT 5 //10Ms跑一次任务 +#define DEM_TASK_WAIT_EEPROM_INIT (3000/DEM_TASK_TIME_UNIT) //等待eeprom初始化的超时 +#define DEM_CFG_ENABLE_MACHINE_STATE_FOR_INIT //使能--初始化，要等到eeprom成功讀取之後 + + +#endif diff --git a/code_app_out/Source/ComStack/CanInterface/Dem/Dem.h b/code_app_out/Source/ComStack/CanInterface/Dem/Dem.h new file mode 100644 index 0000000..468e83c --- /dev/null +++ b/code_app_out/Source/ComStack/CanInterface/Dem/Dem.h @@ -0,0 +1,58 @@ +/* BEGIN_FILE_HDR +******************************************************************************** +* NOTICE +* This software is the property of HiRain Technologies. Any information +* contained in this doc should not be reproduced, or used, or disclosed +* without the written authorization from HiRain Technologies. +******************************************************************************** +* File Name : Dem.h +******************************************************************************** +* Project/Product : AUTOSAR 4.0 +* Title : Diagnostic Event Manager head File +* Author : HeYang +******************************************************************************** +* Description : Includes all user relevant information for the tracing of +* product errors. +* +******************************************************************************** +* Limitations : None +* +******************************************************************************** +* +******************************************************************************** +* Revision History: +* +* Version Date Initials CR# Descriptions +* --------- ---------- ------------ ---------- --------------- +* 01.00.00 06/06/2012 HeYang N/A Original +* 01.01.00 08/07/2013 Ning.Chen N/A +******************************************************************************** +* END_FILE_HDR*/ +#ifndef DEM_H +#define DEM_H + +/******************************************************************************* +* Includes +*******************************************************************************/ +#include "Std_Types.h" +#include "Dem_IntErrId.h" + +typedef uint16 Dem_EventIdType; + +typedef enum +{ + DEM_EVENT_STATUS_PASSED, + DEM_EVENT_STATUS_FAILED, + DEM_EVENT_STATUS_PREPASSED, + DEM_EVENT_STATUS_PREFAILED +}Dem_EventStatusType; +/******************************************************************************* +* Global Function Define +*******************************************************************************/ +extern void Dem_ReportErrorStatus +( + Dem_EventIdType EventId, + uint8 EventStatus +); + +#endif/* DEM_H */ \ No newline at end of file diff --git a/code_app_out/Source/ComStack/CanInterface/Dem/Dem_Cfg.c b/code_app_out/Source/ComStack/CanInterface/Dem/Dem_Cfg.c new file mode 100644 index 0000000..cd90299 --- /dev/null +++ b/code_app_out/Source/ComStack/CanInterface/Dem/Dem_Cfg.c @@ -0,0 +1,111 @@ +/** + ****************************************************************************** + * @file + * @author + * @version + * @date + * @brief + * @function List: + ****************************************************************************** + * @attention + * + * + *

© COPYRIGHT 2021

+ ****************************************************************************** + * @History: + * @Author: + * @Data: + * @Version: +*/ +#include "DEM_Cfg.h" +#include "Dcm_Cfg.h" + + +const u32 SupportedDTC[TOTAL_DTC_NUM] = +{ + + /*0*/ 0x911716u, /*低於9v 500ms*/ //排序見宏 DTC_POWER_LOW_ID + /*1*/ 0x911717u, /*超過16v 500ms*/ + + /*2*/ 0x9E0107u, /*上一频道开关卡住*/ + /*3*/ 0x9E0207u, /*蓝牙电话开卡住故障*/ + /*4*/ {0x9E0507u}, /*语音开关卡住故障*/ + /*5*/ {0x9E0607u}, /*全景影像开关卡住故障*/ + + /*6*/ {0x9E0807u}, /*下一频道开关卡住故障*/ + /*7*/ {0x9E1907u}, /*静音开关卡住故障*/ + /*8*/ {0x9E1A07u}, /*定制开关卡住故障*/ + + /*9*/ {0x9E1C07u}, /*仪表菜单返回开关卡住故障*/ + + /*10*/ {0x9E2D07u}, /*巡航开关卡住故障*/ + /*11*/ {0x9E2F07u}, /*速度+开关卡住故障*/ + + /*12*/ {0x9E3007u}, /*速度-开关卡住故障*/ + + /*13*/ {0x9E3307u}, /*时距减开关卡住故障*/ + /*14*/ {0x9E3407u}, /*时距+开关卡住故障*/ + /*15*/ {0x9E4500u}, /*左菜单卡滞*/ + /*16*/ {0x9E2C02u}, /*左拨片卡滞*/ + /*17*/ {0x9E2C03u}, /*右拨片卡滞*/ + /*18*/ {0x9E3900u}, /*加热丝过流保护*/ + /*19*/ {0x9E4114u}, /*加热丝短路*/ + /*20*/ {0x9E4113u}, /*加热丝断路*/ + /*21*/ {0x9E4214u}, /*NTC短路*/ + /*22*/ {0x9E4213u}, /*NTC断路*/ +}; + +//dtc_drv_cfg_t 第一個參數是消抖時間，第二個參數是在什麼情況下消抖0是failed去抖，第三個參數是否保存在eeprom +const dtc_drv_cfg_t dtc_cfg_tbl[TOTAL_DTC_NUM] = +{ + + {0, DEM_DTC_DEBOUNCE_RST, DTC_STORAGE_TO_EE}, + {0, DEM_DTC_DEBOUNCE_RST, DTC_STORAGE_TO_EE}, + {0, DEM_DTC_DEBOUNCE_RST, DTC_STORAGE_TO_EE}, + {0, DEM_DTC_DEBOUNCE_RST, DTC_STORAGE_TO_EE}, + {0,DEM_DTC_DEBOUNCE_RST, DTC_STORAGE_TO_EE}, + + {0,DEM_DTC_DEBOUNCE_RST, DTC_STORAGE_TO_EE}, + {0,DEM_DTC_DEBOUNCE_RST, DTC_STORAGE_TO_EE}, + {0,DEM_DTC_DEBOUNCE_RST, DTC_STORAGE_TO_EE}, + {0,DEM_DTC_DEBOUNCE_RST, DTC_STORAGE_TO_EE}, + {0,DEM_DTC_DEBOUNCE_RST, DTC_STORAGE_TO_EE}, + + {0,DEM_DTC_DEBOUNCE_RST, DTC_STORAGE_TO_EE}, + {0,DEM_DTC_DEBOUNCE_RST, DTC_STORAGE_TO_EE}, + {0,DEM_DTC_DEBOUNCE_RST, DTC_STORAGE_TO_EE}, + + {0,DEM_DTC_DEBOUNCE_RST, DTC_STORAGE_TO_EE}, + {0,DEM_DTC_DEBOUNCE_RST, DTC_STORAGE_TO_EE}, + + {0,DEM_DTC_DEBOUNCE_RST, DTC_STORAGE_TO_EE}, + {0,DEM_DTC_DEBOUNCE_RST, DTC_STORAGE_TO_EE}, + {0,DEM_DTC_DEBOUNCE_RST, DTC_STORAGE_TO_EE}, + {0,DEM_DTC_DEBOUNCE_RST, DTC_STORAGE_TO_EE}, + {0,DEM_DTC_DEBOUNCE_RST, DTC_STORAGE_TO_EE}, + {0,DEM_DTC_DEBOUNCE_RST, DTC_STORAGE_TO_EE}, + {0,DEM_DTC_DEBOUNCE_RST, DTC_STORAGE_TO_EE}, + {0,DEM_DTC_DEBOUNCE_RST, DTC_STORAGE_TO_EE} +}; + + +#if (DTC_SNAP_SHOT_DATA_ENABLE) //支持快照的宏 +const u8 c_dtc_snap_shot_data_id[TOTAL_DTC_SNAP_SHOT_ID_NUM][2] = { //TOTAL_DTC_SNAP_SHOT_ID_NUM=3 見吉利矩陣文檔 + //DF00是 ECU POWER VOLTAGE //DF03 是The Odometer Of First Malfunction //DF04是 The Odometer Of last Malfunction + {0xA5, 0x00}, {0xA5, 0x01}, {0xA5, 0x03}, {0xA5, 0x04}/*, {0xDD, 0x04}, {0xDD, 0x05},{0xDD, 0x06}, */ +}; + +//各快照的內容長度 +const u8 c_dtc_snap_shot_data_size[TOTAL_DTC_SNAP_SHOT_ID_NUM] = { + _SnapShort_size_0, _SnapShort_size_1, _SnapShort_size_2, _SnapShort_size_3 +}; + +#endif + + +#if (DTC_EXTENDED_DATA_ENABLE) //支持外部數據---吉利矩陣文檔中，有兩個 01是DTC Occurrence Counter 0-255 + //02是 Self-Healing Counter +const u8 c_dtc_extended_data_id[TOTAL_DTC_EXTENDED_DATA_NUM] = { //該數組好像沒有用到 + 0x01 /*, 0x02, 0x03, 0x04, 0x10,*/ +}; +#endif diff --git a/code_app_out/Source/ComStack/CanInterface/Dem/Dem_IntErrId.h b/code_app_out/Source/ComStack/CanInterface/Dem/Dem_IntErrId.h new file mode 100644 index 0000000..2e979b2 --- /dev/null +++ b/code_app_out/Source/ComStack/CanInterface/Dem/Dem_IntErrId.h @@ -0,0 +1,47 @@ +/* BEGIN_FILE_HDR +******************************************************************************** +* NOTICE +* This software is the property of HiRain Technologies. Any information +* contained in this doc should not be reproduced, or used, or disclosed +* without the written authorization from HiRain Technologies. +******************************************************************************** +* File Name : Dem_IntErrId.h +******************************************************************************** +* Project/Product : AUTOSAR 4.0 +* Title : Diagnostic Event Manager IntErr head File +* Author : HeYang +******************************************************************************** +* Description : for BSW event Id symbols . +* +******************************************************************************** +* Limitations : None +* +******************************************************************************** +* +******************************************************************************** +* Revision History: +* +* Version Date Initials CR# Descriptions +* --------- ---------- ------------ ---------- --------------- +* 01.00.00 06/06/2012 HeYang N/A Original +* 01.01.00 08/07/2013 Ning.Chen N/A +******************************************************************************** +* END_FILE_HDR*/ +#ifndef DEM_INTERRID_H +#define DEM_INTERRID_H + +/******************************************************************************* +* Macro +*******************************************************************************/ + +/*Can Interface*/ +/*Production Error,Assigned by DEM,Failed DLC Check */ +#define CANIF_E_INVALID_DLC (0x6001U) +/*Production Error,Assigned by DEM,CAN Interface controller mode + state machine is in mode CANIF_CS_STOPPED */ +#define CANIF_E_STOPPED (0x6002U) +/*Production Error,Assigned by DEM,CAN Interface controller mode + state machine is not in mode CANIF_CS_SLEEP */ +#define CANIF_E_NOT_SLEEP (0x6003U) + +#endif/* DEM_INTERRID_H */ \ No newline at end of file diff --git a/code_app_out/Source/ComStack/CanInterface/Dem/Dem_Types.h b/code_app_out/Source/ComStack/CanInterface/Dem/Dem_Types.h new file mode 100644 index 0000000..9c8b556 --- /dev/null +++ b/code_app_out/Source/ComStack/CanInterface/Dem/Dem_Types.h @@ -0,0 +1,104 @@ +/** + ****************************************************************************** + * @file + * @author + * @version + * @date + * @brief + * @function List: + ****************************************************************************** + * @attention + * + * + *

© COPYRIGHT 2021

+ ****************************************************************************** + * @History: + * @Author: + * @Data: + * @Version: +*/ +#ifndef _DEM_TYPES_H_ +#define _DEM_TYPES_H_ + +#include "common_types.h" + +#define DEM_DTC_DEBOUNCE_RST (0U) /* 0: 仅test failed 去抖; */ +#define DEM_DTC_DEBOUNCE_ACC (1U) /* 累加/减法去抖 test failed&passed 都采样去抖 */ + +#define DTC_NOT_STORAGE (0U) /* 0: DTC 不存储*/ +#define DTC_STORAGE_TO_EE (1U) /* 1: DTC 存储*/ + +typedef union +{ + uint8_t status_byt; + struct{ + unsigned char test_failed :1; //用以確定故障是否存在 + unsigned char test_failed_this_operation_cycle :1; //在這周期中，任何失敗的測試都曾發生 + unsigned char pending_dtc :1; //故障狀態--當test至少通過一次且從未發生故障時， + //在一個操作周期完成後才會清除。 + unsigned char confirmed_dtc :1; //經過確認，--它並不總是表明，請求時麻煩就出現了 + unsigned char test_not_completed_since_last_clr :1; //測試未完成 + unsigned char test_failed_since_last_clr :1; //latch failure of bit1 ,only can be clear by cleardtc + unsigned char test_not_completed_this_operation_cycle :1; //如果相關的DTC測試曾經運行過，在這個操作中完成 + unsigned char warning_indicator_requested :1; //當警告指示是需要的 + } status_bits; +} dtc_status_t; + +typedef enum +{ + DTC_RECORD_STORY_TO_RAM = 0, + DTC_RECORD_STORY_TO_INT_FLASH, + DTC_RECORD_STORY_TO_INT_EEPROM, + DTC_RECORD_STORY_TO_EXT_FLASH, + DTC_RECORD_STORY_TO_EXT_EEPROM +} dtc_story_mode_t; + + +typedef enum +{ + DTC_TEST_STATE_NO_RESULT = 0, + DTC_TEST_STATE_FAILED, + DTC_TEST_STATE_PASSED, + DTC_TEST_STATE_UNKNOW +} test_result_state_e; + + +typedef uint8_t dtc_freq_t; /* DTC frequency(s) */ +typedef uint8_t dtc_stry_start_addr_t; /* DTC addres(s) */ + +typedef void (*dtc_callback)(void); + +typedef struct +{ + dtc_freq_t confirm_debounce_time; /* Confirm Debounce delay Time , >= 1, < 255*/ + bool debounce_mode; /* 0: 仅test failed 去抖; 1: test failed&passed 都采样去抖 見宏 DEM_DTC_DEBOUNCE_RST 和 DEM_DTC_DEBOUNCE_ACC */ + bool story_mode; /* 配置是否存储到EEPROM, 1 存储到EEPROM 見宏 DTC_NOT_STORAGE 和 宏 DTC_STORAGE_TO_EE */ +}dtc_drv_cfg_t; + + +typedef struct{ + uint8_t c_main_ecu_supply_voltage; + uint8_t c_main_ecu_power_mode; +} dtc_snap_shot_data_t; + +typedef struct{ + uint8_t c_monitoring_cycle_counter[4]; + /* signed char cDTCFaultDetectionCounter; */ +} dtc_extended_data_t; + +typedef struct{ + /* const dword *pDTCNumber; */ + dtc_status_t c_status; + /* dtc_snap_shot_data_t SnapShotData[TOTAL_DTC_NUM]; */ + /* dtc_extended_data_t ExtendedData[TOTAL_DTC_NUM]; */ + /*uint8_t dtc_fault_detection_counter;*/ +} dtc_record_t; + + + +#define fld_sizeof(s, m) sizeof(((s *)0)->m) //取s結構體中m的成員的長度 +//#define offsetof(s,m) (( (uint8_tnt8_t) &( ( (s*)0 )->m )) - (size_t)((s*)0)) +#define offsetof1(s,m) ( (uint8_t) &( ( (s*)0 )->m )) //取s結構體中m的地址 + + +#endif diff --git a/code_app_out/Source/ComStack/CanInterface/Dem/Demm.h b/code_app_out/Source/ComStack/CanInterface/Dem/Demm.h new file mode 100644 index 0000000..30b076e --- /dev/null +++ b/code_app_out/Source/ComStack/CanInterface/Dem/Demm.h @@ -0,0 +1,123 @@ +/** + ****************************************************************************** + * @file + * @author + * @version + * @date + * @brief + * @function List: + ****************************************************************************** + * @attention + * + * + *

© COPYRIGHT 2021

+ ****************************************************************************** + * @History: + * @Author: + * @Data: + * @Version: +*/ +#ifndef _DEMM_H_ +#define _DEMM_H_ + +#include "Dem_Types.h" +#include "DEM_Cfg.h" +#include "error.h" +#include "common_types.h" + +#define DEM_ENTER_CRITICAL_METHOD (3u) + +#if 1 //把目前沒有用到的放一起注明 +#define DEM_DEV_ERR_CHECK (0u) //目前好像沒用到 + +#define DESC_TOTAL_ROUTINE_CONTROL_NUM 1u +#define DESC_TOTAL_ROUTINE_CONTROL_TYPE_NUM 3u +#define DEM_EEPROM_RES_PROTECTED 1u /* DEM 用到的存储EPROM 服务是否启用资源保护*/ +#endif + +/* Define ControlDTCSetting sub service */ +#define DESC_CONTROL_DTC_SETTING_ON (TRUE) // 1 +#define DESC_CONTROL_DTC_SETTING_OFF (FALSE) // 2 + +#if 1 //把目前沒有用到的放一起注明 +/* Define Read Memory BY Address Sub Service */ +#define DESC_READ_MEMORY_BY_ADDRESS_SHORT_ADDR 0x14 +#define DESC_READ_MEMORY_BY_ADDRESS_LONG_ADDR 0x24 + +/* Define Read Memory BY Address Sub Service */ +#define DESC_WRITE_MEMORY_BY_ADDRESS_SHORT_ADDR 0x14 +#define DESC_WRITE_MEMORY_BY_ADDRESS_LONG_ADDR 0x24 + + +#define DESC_SERVICE_REQ_LENGTH_NEED_CHECK 0xff + +#define DESC_TIMER_100MS 20 /* unit: can_desc_task Call Cycle Time * Value, here 5 ms * 20 = 100ms */ +#define DESC_TESTER_PRESENT_TIME_OUT_DELAY_TIME 140 /* unit: 100ms, here 50 * 100 ms = 5s */ +#endif + +/* 應用程序接口*/ +//void dem_set_test_result(dtc_handle_t dtc_index, test_result_state_e result); +//void dem_clear_test_result(dtc_handle_t dtc_index); +//void dem_task_init(void); + +void dem_task_init(void); +/** +* @brief dtc_task 任務 +* @retval none +*/ +void dem_task(void); + +/* +用於通過本地條件是否使能DTC 檢測*/ +void dem_enable_dtc_record_update(void); +void dem_disable_dtc_record_update(void); + + +/* DCM 模塊接口*/ + +/* +用於通過來自網絡的UDS 命令, 控制DTC 是否使能DTC檢測 +*/ +void dem_enable_dtc_setting(void); +void dem_disable_dtc_setting(void); + + +void dem_set_test_result(dtc_handle_t dtc_index, test_result_state_e result); + + +void dem_clear_test_result(dtc_handle_t dtc_index); + +/* +void dem_get_status_of_dtc(void); +void dem_dcm_cancel_operation(void); +void dem_clear_all_dtc_record_information(void); +*/ +/* 供DCM調用--根據 DTC三字節的id來清除*/ +err_flag_e dem_clear_dtc(const u8 *dtc); +/* +返回DTC_RECORD.STATE +*/ +/*bool_t dtc_get_state(u8 dtc_index, u8 *state);*/ +u8 _dem_get_state(dtc_handle_t dtc_index); +void dem_test_fun(void); + +/* 19 04 函數調用, dtc index 範圍由調用函數處理, 此函數內部不檢查有效範圍*/ +bool demm_copy_snap_short_data_to_dcm_txbuff(dtc_handle_t dtc_index, u8 *dcm_txbuff); +/* 19 06 函數調用, dtc index 範圍由調用函數處理, 此函數內部不檢查有效範圍*/ +bool demm_copy_extdata_to_dcm_txbuff(dtc_handle_t dtc_index, u8 *dcm_txbuff); + +void demm_operation_cycle_chaned_event_proc(void); + + + +typedef struct +{ + u16 test[TOTAL_DTC_NUM]; /* debug only */ +}demm_test_t; + + +//#define DEMM_DEBUG_EN //用于debug的 + +void dem_test_init(void); + +#endif diff --git a/code_app_out/Source/ComStack/CanInterface/Det/Det.h b/code_app_out/Source/ComStack/CanInterface/Det/Det.h new file mode 100644 index 0000000..43fc139 --- /dev/null +++ b/code_app_out/Source/ComStack/CanInterface/Det/Det.h @@ -0,0 +1,50 @@ +/* BEGIN_FILE_HDR +******************************************************************************** +* NOTICE +* This software is the property of HiRain Technologies. Any information +* contained in this doc should not be reproduced, or used, or disclosed +* without the written authorization from HiRain Technologies. +******************************************************************************** +* File Name : Det.h +******************************************************************************** +* Project/Product : AUTOSAR 4.0 +* Title : Development Error Tracer Header File +* Author : HeYang +******************************************************************************** +* Description : Includes all user relevant information for the tracing of +* development errors. . +* +******************************************************************************** +* Limitations : None +* +******************************************************************************** +* +******************************************************************************** +* Revision History: +* +* Version Date Initials CR# Descriptions +* --------- ---------- ------------ ---------- --------------- +* 01.00.00 06/06/2012 HeYang N/A Original +* 01.01.00 08/07/2013 Ning.Chen N/A +******************************************************************************** +* END_FILE_HDR*/ + +#ifndef DET_H +#define DET_H +/******************************************************************************* +* Includes +*******************************************************************************/ +#include "Std_Types.h" + +/******************************************************************************* +* Global Function Declaration +*******************************************************************************/ +extern void Det_ReportError +( + uint16 ModuleId, + uint8 InstanceId, + uint8 ApiId, + uint8 ErrorId +); + +#endif/* DET_H */ \ No newline at end of file diff --git a/code_app_out/Source/ComStack/CanTp/CanTp.h b/code_app_out/Source/ComStack/CanTp/CanTp.h new file mode 100644 index 0000000..e0c9a32 --- /dev/null +++ b/code_app_out/Source/ComStack/CanTp/CanTp.h @@ -0,0 +1,207 @@ +/* BEGIN_FILE_HDR +******************************************************************************** +* NOTICE +* This software is the property of HiRain Technologies. Any information +* contained in this doc should not be reproduced, or used, or disclosed +* without the written authorization from HiRain Technologies. +******************************************************************************** +* File Name: CanTp.h +******************************************************************************** +* Project/Product : CanTp programme +* Title: : CanTp.h +* Author: : donger.yang +******************************************************************************** +* Description: Defination of Interface for CAN driver and other modes +* +******************************************************************************** +* Limitations: None +* +******************************************************************************** +* +******************************************************************************** +* Revision History: +* +* Version Date Initials CR# Descriptions +* ------- ---------- ---------- ------ ------------------- +* 01.00.00 05/24/2010 qiuying.ma N/A Original +* 01.01.00 01/08/2013 rui.guo N/A HrAsrCanTp130108-01 +* 01.02.00 04/12/2013 donger.yang N/A HrAsrCanTp130412-01 +* 01.02.01 07/17/2013 donger.yang N/A HrAsrCanTp130717-01 +* 02.02.02 08/13/2013 donger.yang N/A HrAsrCanTp130813-01 +* 02.02.03 08/25/2013 donger.yang N/A HrAsrCanTp130825-01 +* 02.02.04 08/27/2013 donger.yang N/A HrAsrCanTp130827-01 +* 02.02.05 09/03/2013 donger.yang N/A HrAsrCanTp130903-01 +******************************************************************************** +*END_FILE_HDR*/ + + +#ifndef CANTP_H +#define CANTP_H + + +/******************************************************************************* +* Includes +*******************************************************************************/ + +#include "ComStack_Types.h" +#include "CanTp_Cfg.h" + + +#define CANTP_VENDOR_ID (uint16)(0xFFFFu) +#define CANTP_MODULE_ID (uint16)(0x0023u) + +/* CanTp Component release Version */ +#define CANTP_SW_MAJOR_VERSION (uint8)(0x01u) +#define CANTP_SW_MINOR_VERSION (uint8)(0x00u) +#define CANTP_SW_PATCH_VERSION (uint8)(0x00u) +/* Autosar release version */ +#define CANTP_AR_MAJOR_VERSION (uint8)(0x04u) +#define CANTP_AR_MINOR_VERSION (uint8)(0x00u) +#define CANTP_AR_PATCH_VERSION (uint8)(0x00u) + +/******************************************************************************* +* Global data types and structures +*******************************************************************************/ +/* AUTOSAR compliant */ + +typedef enum /* CanTpInternalState */ +{ + CANTP_OFF = 0, + CANTP_ON +} CanTpInternalState; + +typedef enum +{ + CANTP_RX_CHANNEL = 0, + CANTP_TX_CHANNEL +} CanTpChannelType; + + +typedef enum +{ + CANTP_STANDARD = 0, + CANTP_EXTENDED, + CANTP_MIXED +} CanTpAddressingFormat; + +typedef enum +{ + CANTP_PHYSICAL = 0, + CANTP_FUNCTIONAL +} CanTpTaType; + +typedef enum +{ + CANTP_BS_PARAMETER = 0, + CANTP_STMIN_PARAMETER +} CanTpParameterType; + +/******************************************************************************* +* Types for static-configuration (ROM/Flash) +*******************************************************************************/ +/*RxNsdu (ROM)*/ +typedef struct +{ + PduIdType CanTpChannelId; + PduIdType CanTpRxNPduId; + PduIdType CanTpTxFcNPduId; + uint16 CanTpRxDl; + uint16 CanTpNar; + uint16 CanTpNbr; + uint16 CanTpNcr; + uint8 CanTpRxPaddingActive; + uint8 CanTpRxTaType; + uint8 CanTpRxAddrFormat; + uint8 CanTpBs; + uint8 CanTpSTmin; + uint8 CanTpRxWftMax; + uint8 CanTpRxNAe; + uint8 CanTpRxNSa; + uint8 CanTpRxNTa; +} CanTp_RxNsduCfgType; + +/*TxNsdu (ROM)*/ +typedef struct +{ + PduIdType CanTpChannelId; + PduIdType CanTpTxNPduId; + PduIdType CanTpRxFcNPduId; + uint16 CanTpTxDl; + uint16 CanTpNas; + uint16 CanTpNbs; + uint16 CanTpNcs; + uint8 CanTpTxPaddingActive; + uint8 CanTpTxTaType; + uint8 CanTpTxAddrFormat; + uint8 CanTpTxNAe; + uint8 CanTpTxNSa; + uint8 CanTpTxNTa; +} CanTp_TxNsduCfgType; + +/*RxPdu mapping table */ +typedef struct +{ + PduIdType RxSduIdx; + PduIdType TxSduIdx; +} CanTp_RxPduMapType; + +typedef struct +{ + boolean ChannelMode; +}CanTpChannelModeType; + +/******************************************************************************* +* CanTp Overall (ROM) +*******************************************************************************/ +/* Struct to hold the complete CanTp-configuration */ +typedef struct +{ + const CanTp_RxNsduCfgType* const CanTp_RxNsduCfg; + const CanTp_TxNsduCfgType* const CanTp_TxNsduCfg; + const CanTpChannelModeType* const ChannelMode; +} CanTp_CfgType; + +/******************************************************************************* +* External administration data (RAM) +*******************************************************************************/ +typedef struct +{ + const CanTp_CfgType* CfgPtr; + CanTpInternalState InternalState; +} CanTp_AdminDataType; + +/******************************************************************************* +* Global defines +*******************************************************************************/ +#define CANTP_MODE_HALF_DUPLEX 0x00 +#define CANTP_MODE_FULL_DUPLEX 0x01 + + +#define CANTP_MAX_FRAME_LENGTH 0x08u +#define CANTP_UNUSED 0xFFu + +/******************************************************************************* +* Gloable Data definitions +*******************************************************************************/ +extern const CanTp_CfgType CanTp_Cfg; + +/******************************************************************************* +* Prototypes of export functions +*******************************************************************************/ +extern void CanTp_Init(const void* const pCfgPtr); + +extern void CanTp_Shutdown(void); +extern void CanTp_MainFunction(void); +extern Std_ReturnType CanTp_Transmit(PduIdType CanTpTxSduId, const PduInfoType* pData); +#if (CANTP_TC == STD_ON) +extern Std_ReturnType CanTp_CancelTransmitRequest(PduIdType CanTpTxSduId); +#endif +extern Std_ReturnType CanTp_CancelReceiveRequest(PduIdType CanTpRxSduId); +extern Std_ReturnType CanTp_ChangeParameterRequest(PduIdType CanTpSduId,CanTpParameterType parameter,uint16 value); + +#if (CANTP_VERSION_INFO_API == STD_ON) +extern void CanTp_GetVersionInfo(Std_VersionInfoType* pVersionInfo); +#endif + + +#endif \ No newline at end of file diff --git a/code_app_out/Source/ComStack/CanTp/CanTp_Cbk.h b/code_app_out/Source/ComStack/CanTp/CanTp_Cbk.h new file mode 100644 index 0000000..fc9f41c --- /dev/null +++ b/code_app_out/Source/ComStack/CanTp/CanTp_Cbk.h @@ -0,0 +1,37 @@ +/** + ****************************************************************************** + * @file + * @author + * @version + * @date + * @brief + * @function List: + ****************************************************************************** + * @attention + * + * + *

© COPYRIGHT 2021

+ ****************************************************************************** + * @History: + * @Author: + * @Data: + * @Version: +*/ + + +#ifndef _CANTP_CBK_H_ +#define _CANTP_CBK_H_ + +/******************************************************************************* +* Includes +*******************************************************************************/ +#include "ComStack_Types.h" + +/******************************************************************************* +* Prototypes of export functions +*******************************************************************************/ +extern void CanTp_RxIndication(PduIdType CanTpRxPduId, const PduInfoType* pCanTpRxPduPtr); +extern void CanTp_TxConfirmation(PduIdType CanTpTxPduId); + + +#endif diff --git a/code_app_out/Source/ComStack/CanTrcv/CanTrcv.h b/code_app_out/Source/ComStack/CanTrcv/CanTrcv.h new file mode 100644 index 0000000..cd8adc0 --- /dev/null +++ b/code_app_out/Source/ComStack/CanTrcv/CanTrcv.h @@ -0,0 +1,31 @@ +/** + ****************************************************************************** + * @file + * @author + * @version + * @date + * @brief + * @function List: + ****************************************************************************** + * @attention + * + * + *

© COPYRIGHT 2021

+ ****************************************************************************** + * @History: + * @Author: + * @Data: + * @Version: +*/ +#ifndef _CANTRCV_H_ +#define _CANTRCV_H_ + +#include "gpio.h" /* derivative-specific definitions */ +#include "Std_Types.h" + +#define CAN_TRSCV_TYPE (1U) /* 0: TLE6250; 1: TLE6251DS /TJA1040 */ + +void CanTrcv_Init(void); +void CanTrcv_Disable(void); + +#endif diff --git a/code_app_out/Source/ComStack/Can_Gen/Can/Can_Cfg.h b/code_app_out/Source/ComStack/Can_Gen/Can/Can_Cfg.h new file mode 100644 index 0000000..c52bc27 --- /dev/null +++ b/code_app_out/Source/ComStack/Can_Gen/Can/Can_Cfg.h @@ -0,0 +1,118 @@ +/* BEGIN_FILE_HDR +******************************************************************************** +* NOTICE +* This software is the property of HiRain Technologies. Any information +* contained in this doc should not be reproduced, or used, or disclosed +* without the written authorization from HiRain Technologies. +******************************************************************************** +* File Name : Can_Cfg.h +* +******************************************************************************** +* Project/Product : AUTOSAR 4.0 +* Title : CAN Driver(MSCAN) module configuration File +* Author : Hirain +******************************************************************************** +* Description : Contain the pre-compile-time configuration parameters. +* +******************************************************************************** +* Limitations : None +* +******************************************************************************** +* +******************************************************************************** +* Revision History: +* +* Version Date Initials CR# Descriptions +* --------- ---------- ------------ ---------- --------------- +* 02.00.01 15/08/2013 NingChen N/A D10_MSCAN_130815_1 +* +******************************************************************************** +* END_FILE_HDR*/ + + + +#ifndef _CAN_CFG_H_ +#define _CAN_CFG_H_ + +#include "fm33lg0xx_fl.h" +#include "mf_config.h" +#include "cpu.h" +/******************************************************************************* +* Common Macro +*******************************************************************************/ +/* event process mode */ +#define CAN_INTERRUPT (1u) +#define CAN_POLLING (0u) +#define CAN_STANDARD_ID_ONLY (1u) +#define CAN_EXTERNED_ID_ONLY (2u) +#define CAN_MIXED_ID (3u) + +#define CAN_HOH_TX_MASK ((uint8)0x01) +#define CAN_HOH_RX_MASK ((uint8)0x00) +#define CAN_HOH_FULL_MASK ((uint8)0x02) +#define CAN_HOH_BASIC_MASK ((uint8)0x00) + +/******************************************************************************* +* CanGeneral +*******************************************************************************/ +#define CAN_DEV_ERROR_DETECT STD_OFF +#define CAN_HW_TRANSMIT_CANCELLATION STD_OFF +#define CAN_IDENTICAL_ID_CANCELLATION STD_OFF +#define CAN_MULTIPLEXED_TRANSMISSION STD_OFF +#define CAN_TIMEOUT_DURATION (100u) +#define CAN_VERSION_INFO_API STD_OFF +#define CAN_MAIN_FUNCTION_BUS_OFF_PERIOD (1u) +#define CAN_MAIN_FUNCTION_MODE_PERIOD (1u) +#define CAN_MAIN_FUNCTION_READ_PERIOD (1u) +#define CAN_MAIN_FUNCTION_WAKEUP_PERIOD (1u) +#define CAN_MAIN_FUNCTION_WRITE_PERIOD (1u) +#define USE_CANIF STD_ON +#define CAN_AUTOSET_INTERRUPT_PRIORITY STD_OFF + + +#define CAN_ID_TYPE_SUPPORT CAN_STANDARD_ID_ONLY + +#if (CAN_ID_TYPE_SUPPORT ==CAN_STANDARD_ID_ONLY) + + #define CAN_ENABLE_EXTERNED_ID STD_OFF + +#else + + #define CAN_ENABLE_EXTERNED_ID STD_ON +#endif + + +#define CAN_USED_HOH_NUM (4u) + +#define CAN_VENDOR_ID_VALUE ((uint16)26) +#define CAN_MODULE_ID_VALUE ((uint16)80) +#define CAN_INSTANCE_ID_VALUE_0 ((uint8)0) + +/******************************************************************************* +* CanController +*******************************************************************************/ +#define CAN_USED_CONTROLLER_NUM (1u) +#define CAN0_CONTROLLER_ACTIVATION STD_ON +#define CAN0_CONTROLLER_BAUD_RATE (500u) +#define CAN0_CLOCK_REFERENCE (8000u) +#define CAN0_CONTROLLER_BASE_ADDRESS (0x140u) +#define CAN0_CLKSRC_BUSCLK STD_OFF +#define CAN0_RX_PROCESSING CAN_INTERRUPT +#define CAN0_TX_PROCESSING CAN_INTERRUPT +#define CAN0_WAKEUP_PROCESSING CAN_INTERRUPT +#define CAN0_WAKEUP_SUPPORT STD_ON +#define CAN0_BUSOFF_PROCESSING CAN_INTERRUPT + +#define CAN_PHY0_ACTIVATION CAN0_CONTROLLER_ACTIVATION +#define CAN_PHY0_RX_PROCESSING CAN0_RX_PROCESSING +#define CAN_PHY0_TX_PROCESSING CAN0_TX_PROCESSING +#define CAN_PHY0_WAKEUP_PROCESSING CAN0_WAKEUP_PROCESSING +#define CAN_PHY0_WAKEUP_SUPPORT CAN0_WAKEUP_SUPPORT +#define CAN_PHY0_BUSOFF_PROCESSING CAN0_BUSOFF_PROCESSING +#define CAN_PHY0_TO_LOGIC (0u) + +#define Can_DisableGlobalInterrupts() System_DisableIrqGlobal() +#define Can_EnableGlobalInterrupts() System_EnableIrqGlobal() + +#endif /* _CAN_CFG_H_ */ + diff --git a/code_app_out/Source/ComStack/Can_Gen/Can/Can_PBcfg.c b/code_app_out/Source/ComStack/Can_Gen/Can/Can_PBcfg.c new file mode 100644 index 0000000..22cffce --- /dev/null +++ b/code_app_out/Source/ComStack/Can_Gen/Can/Can_PBcfg.c @@ -0,0 +1,120 @@ +/* BEGIN_FILE_HDR +******************************************************************************** +* NOTICE +* This software is the property of HiRain Technologies. Any information +* contained in this doc should not be reproduced, or used, or disclosed +* without the written authorization from HiRain Technologies. +******************************************************************************** +* File Name : Can_PBcfg.c +* +******************************************************************************** +* Project/Product : AUTOSAR 4.0 +* Title : CAN Driver(MSCAN) module configuration File +* Author : Hirain +******************************************************************************** +* Description : This file contains the post-build time configurable +* parameters of CAN Driver +* +******************************************************************************** +* Limitations : None +* +******************************************************************************** +* +******************************************************************************** +* Revision History: +* +* Version Date Initials CR# Descriptions +* --------- ---------- ------------ ---------- --------------- +* 02.00.01 15/08/2013 NingChen N/A D10_MSCAN_130815_1 +* +******************************************************************************** +* END_FILE_HDR*/ + + +/******************************************************************************* +* Includes +*******************************************************************************/ +#include "Can.h" +#include "mf_config.h" +#include "fm33lg0xx_fl.h" +/******************************************************************************* +* Config Parameters +*******************************************************************************/ +#define CAN_START_SEC_CONFIG_DATA_UNSPECIFIED +#include "MemMap.h" + +CONST(uint8, CAN_CONFIG_CONST) CanControllerIDtoPhys[CAN_USED_CONTROLLER_NUM]= +{ + #if (CAN_USED_CONTROLLER_NUM >= 1) + 0u, + #endif +}; + + +CONST(Can_RegInitType, CAN_CONFIG_CONST) CanRegInit[CAN_USED_CONTROLLER_NUM] = +{ + #if (CAN_USED_CONTROLLER_NUM >= 1) + { + /* 波特率预分频 */ + 0x00000000ul, + /* 波特率设置= CAN_CLK/(BRP+1)/(TS1_Tq+TS2_Tq+1); 8M/(0+1)/(12+3+1)=500K */ + /* 采样点 = (TS1_Tq+1)/(TS1_Tq+TS2_Tq+1+1); (12+1)/(12+3+1) = 81.75% */ + FL_CAN_SJW_2Tq << 7 | FL_CAN_TS2_3Tq << 4 | FL_CAN_TS1_12Tq, + CAN_ICR_CRXNEMP_Msk | CAN_ICR_CBSOFF_Msk | CAN_IER_TXOKIE_Msk, + 0, + /*CanInitAFMR1*/ + 0x700, + /*CanInitAFIR1*/ + 0x300, + + 0x700, + 0x400, + + 0x700, + 0x500, + + 0x700, + 0x700, + }, + #endif +}; + + +CONST(Can_HardwareObjectConfigType, CAN_CONFIG_CONST) + CanHardwareObjectConfig[CAN_USED_HOH_NUM] = +{ + { + /* CanObjectId0*/ + 0, + 0, + CAN_HOH_RX_MASK|CAN_HOH_BASIC_MASK, + }, + { + /* CanObjectId1*/ + 0, + 0, + CAN_HOH_TX_MASK|CAN_HOH_BASIC_MASK, + }, + { + /* CanObjectId2*/ + 0, + 1, + CAN_HOH_TX_MASK|CAN_HOH_BASIC_MASK, + }, + { + /* CanObjectId2*/ + 0, + 2, + CAN_HOH_TX_MASK|CAN_HOH_BASIC_MASK, + }, +}; + +CONST(Can_HwHandleType, CAN_CONFIG_CONST) + CanControllerIDtoHRH[CAN_USED_CONTROLLER_NUM] = +{ + 0, +}; + +#define CAN_STOP_SEC_CONFIG_DATA_UNSPECIFIED +#include "MemMap.h" + diff --git a/code_app_out/Source/ComStack/Can_Gen/CanIf/CanIf_Cfg.h b/code_app_out/Source/ComStack/Can_Gen/CanIf/CanIf_Cfg.h new file mode 100644 index 0000000..378db24 --- /dev/null +++ b/code_app_out/Source/ComStack/Can_Gen/CanIf/CanIf_Cfg.h @@ -0,0 +1,122 @@ +/** + ****************************************************************************** + * @file + * @author + * @version + * @date + * @brief AUTOSAR 4.0 + * @function List: + ****************************************************************************** + * @attention + * + * + *

© COPYRIGHT 2021

+ ****************************************************************************** + * @History: + * @Author: + * @Data: + * @Version: +*/ + + + +#ifndef _CANIF_CFG_H_ +#define _CANIF_CFG_H_ + + +#include "Com_Cfg.h" + +#define CANIF_FILTER_TYPE_INDEX (0x02u) +#define CANIF_FILTER_TYPE_LINEAR (0x03u) + +#define CANIF_DISPATCH_UL_CDD (0u) +#define CANIF_DISPATCH_UL_CAN_SM (1u) +#define CANIF_DISPATCH_UL_ECUM (2u) + +/******************************************************************************* +* CanIfPrivateCfg +*******************************************************************************/ +/*SWS Item CANIF245_Conf : +Container Name CanIfPrivateCfg{CanInterfacePrivateConfiguration} +Description This container contains the private configuration + (parameters) of the CAN Interface.*/ + +/*CANIF617_Conf Selects whether the DLC check is supported. + True: Enabled False: Disabled */ +#define CANIF_PRIVATE_DLC_CHECK STD_ON + +/*CANIF619_Conf Selects the desired software filter mechanism for reception + only.Each implemented software filtering method is identified + by this enumeration number. + Range: Types implemented software filtering methods*/ +//如果接收的hrh只有一路的話，可以考虙用線性模式； +#define CANIF_PRIVATE_SOFTWARE_FILTER_TYPE CANIF_FILTER_TYPE_INDEX + +/******************************************************************************* +* CanIfPublicCfg +*******************************************************************************/ +/*SWS Item CANIF246_Conf : +Container Name CanIfPublicCfg{CanInterfacePublicConfiguration} +Description This container contains the public configuration (parameters) + of the CAN Interface*/ + +/*CANIF614_Conf Enables and disables the development error detection and + notification mechanism. */ +#define CANIF_PUBLIC_DEV_ERROR_DETECT STD_ON //開啟來會編不過;但是STM32,S32K等可以 +#define CANIF_PUBLIC_TX_BUFFERING STD_ON +#define CANIF_PUBLIC_CANCEL_TRANSMIT_SUPPORT STD_ON +#define CANIF_PUBLIC_SETDYNAMICTXID_API STD_OFF +#define CANIF_PUBLIC_READRXPDU_DATA_API STD_OFF +#define CANIF_PUBLIC_READRXPDU_NOTIFY_STATUS_API STD_OFF +#define CANIF_PUBLIC_READTXPDU_NOTIFY_STATUS_API STD_OFF +#define CANIF_PUBLIC_VERSION_INFO_API STD_OFF +#define CANIF_USED_CONTROLLER_NUM (CAN_USED_CONTROLLER_NUM) //應該直接關聯 DRIVE層的 通道數量,保持一致 +#define CANIF_UPPER_LAYER_HANDLE STD_ON + +#define CANIF_PDU_CHANNEL_MODE_CONTROL STD_ON + +#define CANIF_RX_PDU_RANGE_CANID STD_ON + + +#define CANIF_HRH_RANGE_FILTER STD_OFF + +#define CANIF_VENDOR_ID_VALUE ((uint16)26) +#define CANIF_MODULE_ID_VALUE ((uint16)60) +#define CANIF_INSTANCE_ID_VALUE_0 ((uint8)0) + +/******************************************************************************* +* CanIfDispatchCfg +*******************************************************************************/ + +/*SWS Item CANIF250_Conf : +Container Name CanIfDispatchCfg{CanInterfaceDispatcherConfiguration} +Description Callback functions provided by upper layer modules of the + CanIf. The callback functions defined in this container are + common to all configured CAN Driver / CAN Transceiver + Driver modules. */ + + +/*add for OSEK NM*/ +#define CANIF_SUPPORT_OSEK_NM STD_OFF //TEMP_DELETE + +/*CANIF547_Conf*/ +/*This parameter defines the upper layer (UL) module to which the notifications +of all ControllerBusOff events from the CAN Driver modules have to be routed via +. There is no possibility to configure no upper layer +(UL) module as the provider of .*/ +#define CANIF_DISPATCH_USERCTRLBUSOFF_UL CANIF_DISPATCH_UL_CDD + +/*CANIF548_Conf*/ +#define CANIF_DISPATCH_USERSETWAKEUPEVENT_UL CANIF_DISPATCH_UL_CDD + +#define CANIF_DISPATCH_USERCTRLBUSOFF_DEFINED_NAME /*user define*/ + +#define CANIF_DISPATCH_USERSETWAKEUPEVENT_DEFINED_NAME /*user define*/ + +#define ADPT_UDS_TX_HANDLE 4 // CanIfTxPduConfig 中的 tp发送的那个 buf index +#define NM_TX_HANDLE 3 // 和 CanIfTxPduConfig 上的buf id相一致 + + +//#define CAN_INTERFACE_DEBUG 1 + +#endif /* _CANIF_CFG_H_ */ diff --git a/code_app_out/Source/ComStack/Can_Gen/CanIf/CanIf_Lcfg.c b/code_app_out/Source/ComStack/Can_Gen/CanIf/CanIf_Lcfg.c new file mode 100644 index 0000000..de634f6 --- /dev/null +++ b/code_app_out/Source/ComStack/Can_Gen/CanIf/CanIf_Lcfg.c @@ -0,0 +1,679 @@ +/** + ****************************************************************************** + * @file + * @author + * @version + * @date + * @brief AUTOSAR 4.0 + * @function List: + ****************************************************************************** + * @attention + * + * + *

© COPYRIGHT 2021

+ ****************************************************************************** + * @History: + * @Author: + * @Data: + * @Version: +*/ + + + +/******************************************************************************* +* Includes +*******************************************************************************/ + +#include "CanIf.h" +#include "Com_Cbk.h" +#include "CanTp_Cbk.h" +#include "CanNm_Cbk.h" +/******************************************************************************* +* Macro +*******************************************************************************/ +#define CANIF_CFG_TOTAL_TXPDUID (5u) + +#define CANIF_CFG_TOTAL_RXPDUID (18u) + +#if (STD_ON == CANIF_RX_PDU_RANGE_CANID) + #define CANIF_CFG_RANGE_CANID_RXPDUID (1u) +#endif +//如果多路can，可以考虙增加數量；但是没有在drive層找到相對應的宏； +#define CANIF_CFG_TOTAL_HRH (1u) + +/******************************************************************************* +* Global Data Define, No need to be configed +*******************************************************************************/ +#define CANIF_START_SEC_VAR_UNSPECIFIED +#include "MemMap.h" + +#if (STD_ON == CANIF_PUBLIC_TX_BUFFERING) + VAR(boolean, CANIF_PRIVATE_DATA) + CanIfTxBufferPDUFillflag[CANIF_CFG_TOTAL_TXPDUID]; //每一發送的PDU 有滿的標志 + + VAR(uint8, CANIF_PRIVATE_DATA) CanIfTxBufferSdu[CANIF_CFG_TOTAL_TXPDUID][8]; + + VAR(Can_PduType, CANIF_PRIVATE_DATA) + CanIfTxBufferPdu[CANIF_CFG_TOTAL_TXPDUID]; +#endif + +#if (STD_ON == CANIF_PUBLIC_SETDYNAMICTXID_API) + VAR(Can_IdType, CANIF_PRIVATE_DATA) + CanIfTxPduCanIdForDynamic[CANIF_CFG_TOTAL_TXPDUID]; //動態分配CANID ，即重置CAN ID值 +#endif + +#if(STD_ON == CANIF_PUBLIC_READTXPDU_NOTIFY_STATUS_API) + VAR(CanIf_NotifStatusType, CANIF_PRIVATE_DATA) + CanIfTxNotifStatus[CANIF_CFG_TOTAL_TXPDUID]; //發送的指示 狀態 +#endif + +#if(STD_ON == CANIF_PUBLIC_READRXPDU_NOTIFY_STATUS_API) + VAR(CanIf_NotifStatusType, CANIF_PRIVATE_DATA) + CanIfRxNotifStatus[CANIF_CFG_TOTAL_RXPDUID]; //接收的指示狀態 +#endif + +#if (STD_ON == CANIF_PUBLIC_READRXPDU_DATA_API) + VAR(uint8, CANIF_PRIVATE_DATA) + CanIfRxBufferSduData[CANIF_CFG_TOTAL_RXPDUID][8]; + VAR(PduLengthType, CANIF_PRIVATE_DATA) + CanIfRxBufferSduLength[CANIF_CFG_TOTAL_RXPDUID] ; +#endif + +#define CANIF_STOP_SEC_VAR_UNSPECIFIED +#include "MemMap.h" + +#define CANIF_START_SEC_CONFIG_DATA_UNSPECIFIED +#include "MemMap.h" +CONST(PduIdType, CANIF_CONFIG_CONST) CanIfInitNumberOfCanRxPduIds + = CANIF_CFG_TOTAL_RXPDUID; //發的PDU 最大組數 +CONST(PduIdType, CANIF_CONFIG_CONST) CanIfInitNumberOfCanTxPduIds + = CANIF_CFG_TOTAL_TXPDUID; //收的PDU 最大組數 +CONST(Can_HwHandleType, CANIF_CONFIG_CONST) CanIfInitNumberofHrh + = CANIF_CFG_TOTAL_HRH; + +/******************************************************************************* +* Config Parameters +*******************************************************************************/ +#if (STD_ON == CANIF_RX_PDU_RANGE_CANID) +CONST(CanIf_RxPduCanIdRangeType, CANIF_CONFIG_CONST) + CanIfRxPduCanIdRangeConfig[CANIF_CFG_RANGE_CANID_RXPDUID]= +{ + { + 0x500, /* CanIfRxPduCanIdRangeLowerCanId*/ + 0x57F, /* CanIfRxPduCanIdRangeLowerCanId*/ + CanNm_RxIndication /* CanNm_RxIndication*/ + } +}; +#endif + +CONST(CanIf_RxPduConfigType, CANIF_CONFIG_CONST) + CanIfRxPduConfig[CANIF_CFG_TOTAL_RXPDUID] = +{ + + /* 0*/ /* CanIfRxPduId*/ + { + #if (STD_ON == CANIF_UPPER_LAYER_HANDLE) + 0, /* CanIfRxPduUpperLayerHandle */ + #endif + 0x316, /* Mpc CanId*/ + STANDARD_CAN, /* CanIdType */ + 0, /*CanIfRxPduHrhIdRef*/ //就是 CanHardwareObjectConfig的[0] 只收 + 8u,//COM_RXIPDUEMS_ENGINERPM_BUFFER_SIZE, /* CanIfRxPduDlc */ //CAN_FRAME_COM_DLC + Com_RxIndication, /* CanIfRxPduUserRxIndicationName */ + #if(STD_ON == CANIF_PUBLIC_READRXPDU_NOTIFY_STATUS_API) + FALSE, /* CanIfRxPduReadNotifyStatus */ + #endif + #if(STD_ON == CANIF_PUBLIC_READRXPDU_DATA_API) + FALSE, /* CanIfRxPduReadData */ + #endif + #if(STD_ON == CANIF_RX_PDU_RANGE_CANID) + NULL_PTR, /* CanIfRxPduRangePtr */ + #endif + #if(CANIF_FILTER_TYPE_INDEX == CANIF_PRIVATE_SOFTWARE_FILTER_TYPE) + 1, /*CanIfRxPduNextHrh*/ + #endif + + }, + + /* 1*/ /* CanIfRxPduId*/ + { + #if (STD_ON == CANIF_UPPER_LAYER_HANDLE) + 1, /* CanIfRxPduUpperLayerHandle */ + #endif + 0x055, /* Meter CanId*/ + STANDARD_CAN, /* CanIdType */ + 0, /*CanIfRxPduHrhIdRef*/ + 8u, /* CanIfRxPduDlc */ //CAN_FRAME_COM_DLC + Com_RxIndication, /* CanIfRxPduUserRxIndicationName */ + #if(STD_ON == CANIF_PUBLIC_READRXPDU_NOTIFY_STATUS_API) + FALSE, /* CanIfRxPduReadNotifyStatus */ + #endif + #if(STD_ON == CANIF_PUBLIC_READRXPDU_DATA_API) + FALSE, /* CanIfRxPduReadData */ + #endif + #if(STD_ON == CANIF_RX_PDU_RANGE_CANID) + NULL_PTR, /* CanIfRxPduRangePtr */ + #endif + #if(CANIF_FILTER_TYPE_INDEX == CANIF_PRIVATE_SOFTWARE_FILTER_TYPE) + 2, /*CanIfRxPduNextHrh*/ + #endif + + }, + + /* 2*/ /* CanIfRxPduId*/ + { + #if (STD_ON == CANIF_UPPER_LAYER_HANDLE) + 2, /* CanIfRxPduUpperLayerHandle */ + #endif + 0x12d, /* BCM1 CanId*/ + STANDARD_CAN, /* CanIdType */ + 0, /*CanIfRxPduHrhIdRef*/ + 8u, /* CanIfRxPduDlc */ // CAN_FRAME_COM_DLC + Com_RxIndication, /* CanIfRxPduUserRxIndicationName */ + #if(STD_ON == CANIF_PUBLIC_READRXPDU_NOTIFY_STATUS_API) + FALSE, /* CanIfRxPduReadNotifyStatus */ + #endif + #if(STD_ON == CANIF_PUBLIC_READRXPDU_DATA_API) + FALSE, /* CanIfRxPduReadData */ + #endif + #if(STD_ON == CANIF_RX_PDU_RANGE_CANID) + NULL_PTR, /* CanIfRxPduRangePtr */ + #endif + #if(CANIF_FILTER_TYPE_INDEX == CANIF_PRIVATE_SOFTWARE_FILTER_TYPE) + 3, /*CanIfRxPduNextHrh*/ + #endif + + }, + + /* 3*/ /* CanIfRxPduId*/ + { + #if (STD_ON == CANIF_UPPER_LAYER_HANDLE) + 3, /* CanIfRxPduUpperLayerHandle */ + #endif + 0x633u, // 把50D 临时改成一个非表中的项 CAN_RX_ID_BCM2 /* CanId*/ + STANDARD_CAN, /* CanIdType */ + 0, /*CanIfRxPduHrhIdRef*/ + 8u, /* CanIfRxPduDlc */ + Com_RxIndication, /* CanIfRxPduUserRxIndicationName */ + #if(STD_ON == CANIF_PUBLIC_READRXPDU_NOTIFY_STATUS_API) + FALSE, /* CanIfRxPduReadNotifyStatus */ + #endif + #if(STD_ON == CANIF_PUBLIC_READRXPDU_DATA_API) + FALSE, /* CanIfRxPduReadData */ + #endif + #if(STD_ON == CANIF_RX_PDU_RANGE_CANID) + NULL_PTR, /* CanIfRxPduRangePtr */ + #endif + #if(CANIF_FILTER_TYPE_INDEX == CANIF_PRIVATE_SOFTWARE_FILTER_TYPE) + 4, /*CanIfRxPduNextHrh*/ + #endif + + }, + + /* 4*/ /* CanIfRxPduId*/ + { + #if (STD_ON == CANIF_UPPER_LAYER_HANDLE) + 4, /* CanIfRxPduUpperLayerHandle */ + #endif + 0x49a, /* 4G_MOD CanId*/ + STANDARD_CAN, /* CanIdType */ + 0, /*CanIfRxPduHrhIdRef*/ + 8u, /* CanIfRxPduDlc */ + Com_RxIndication, /* CanIfRxPduUserRxIndicationName */ + #if(STD_ON == CANIF_PUBLIC_READRXPDU_NOTIFY_STATUS_API) + FALSE, /* CanIfRxPduReadNotifyStatus */ + #endif + #if(STD_ON == CANIF_PUBLIC_READRXPDU_DATA_API) + FALSE, /* CanIfRxPduReadData */ + #endif + #if(STD_ON == CANIF_RX_PDU_RANGE_CANID) + NULL_PTR, /* CanIfRxPduRangePtr */ + #endif + #if(CANIF_FILTER_TYPE_INDEX == CANIF_PRIVATE_SOFTWARE_FILTER_TYPE) + 5, /*CanIfRxPduNextHrh*/ + #endif + + }, + + /* 5*/ /* CanIfRxPduId*/ + { + #if (STD_ON == CANIF_UPPER_LAYER_HANDLE) + 5, /* CanIfRxPduUpperLayerHandle */ + #endif + 0x385, /* Multi_media CanId*/ + STANDARD_CAN, /* CanIdType */ + 0, /*CanIfRxPduHrhIdRef*/ + 8u, /* CanIfRxPduDlc */ + Com_RxIndication, /* CanIfRxPduUserRxIndicationName */ + #if(STD_ON == CANIF_PUBLIC_READRXPDU_NOTIFY_STATUS_API) + FALSE, /* CanIfRxPduReadNotifyStatus */ + #endif + #if(STD_ON == CANIF_PUBLIC_READRXPDU_DATA_API) + FALSE, /* CanIfRxPduReadData */ + #endif + #if(STD_ON == CANIF_RX_PDU_RANGE_CANID) + NULL_PTR, /* CanIfRxPduRangePtr */ + #endif + #if(CANIF_FILTER_TYPE_INDEX == CANIF_PRIVATE_SOFTWARE_FILTER_TYPE) + 6, /*CanIfRxPduNextHrh*/ + #endif + + }, + + /* 6*/ /* CanIfRxPduId*/ + { + #if (STD_ON == CANIF_UPPER_LAYER_HANDLE) + 6, /* CanIfRxPduUpperLayerHandle */ + #endif + 0x0a2, //0X26D /* CanId*/ + STANDARD_CAN, /* CanIdType */ + 0, /*CanIfRxPduHrhIdRef*/ + 8, /* CanIfRxPduDlc */ + Com_RxIndication, /* CanIfRxPduUserRxIndicationName */ + #if(STD_ON == CANIF_PUBLIC_READRXPDU_NOTIFY_STATUS_API) + FALSE, /* CanIfRxPduReadNotifyStatus */ + #endif + #if(STD_ON == CANIF_PUBLIC_READRXPDU_DATA_API) + FALSE, /* CanIfRxPduReadData */ + #endif + #if(STD_ON == CANIF_RX_PDU_RANGE_CANID) + NULL_PTR, /* CanIfRxPduRangePtr */ + #endif + #if(CANIF_FILTER_TYPE_INDEX == CANIF_PRIVATE_SOFTWARE_FILTER_TYPE) + 7, /*CanIfRxPduNextHrh*/ + #endif + + }, + + /* 7*/ /* CanIfRxPduId*/ + { + #if (STD_ON == CANIF_UPPER_LAYER_HANDLE) + 7, /* CanIfRxPduUpperLayerHandle */ + #endif + 0x394, /* BCM_EVP2 CanId*/ + STANDARD_CAN, /* CanIdType */ + 0, /*CanIfRxPduHrhIdRef*/ + 8, /* CanIfRxPduDlc */ + Com_RxIndication, /* CanIfRxPduUserRxIndicationName */ + #if(STD_ON == CANIF_PUBLIC_READRXPDU_NOTIFY_STATUS_API) + FALSE, /* CanIfRxPduReadNotifyStatus */ + #endif + #if(STD_ON == CANIF_PUBLIC_READRXPDU_DATA_API) + FALSE, /* CanIfRxPduReadData */ + #endif + #if(STD_ON == CANIF_RX_PDU_RANGE_CANID) + NULL_PTR, /* CanIfRxPduRangePtr */ + #endif + #if(CANIF_FILTER_TYPE_INDEX == CANIF_PRIVATE_SOFTWARE_FILTER_TYPE) + 8, /*CanIfRxPduNextHrh*/ + #endif + + }, + + /* 8*/ /* CanIfRxPduId*/ + { + #if (STD_ON == CANIF_UPPER_LAYER_HANDLE) + 8, /* CanIfRxPduUpperLayerHandle */ + #endif + 0x2db, /*AIR_CD_CTRL CanId*/ + STANDARD_CAN, /* CanIdType */ + 0, /*CanIfRxPduHrhIdRef*/ + 8, /* CanIfRxPduDlc */ + Com_RxIndication, /* CanIfRxPduUserRxIndicationName */ + #if(STD_ON == CANIF_PUBLIC_READRXPDU_NOTIFY_STATUS_API) + FALSE, /* CanIfRxPduReadNotifyStatus */ + #endif + #if(STD_ON == CANIF_PUBLIC_READRXPDU_DATA_API) + FALSE, /* CanIfRxPduReadData */ + #endif + #if(STD_ON == CANIF_RX_PDU_RANGE_CANID) + NULL_PTR, /* CanIfRxPduRangePtr */ + #endif + #if(CANIF_FILTER_TYPE_INDEX == CANIF_PRIVATE_SOFTWARE_FILTER_TYPE) + 9, /*CanIfRxPduNextHrh*/ + #endif + + }, + + /* 9*/ /* CanIfRxPduId*/ + { + #if (STD_ON == CANIF_UPPER_LAYER_HANDLE) + 9, /* CanIfRxPduUpperLayerHandle */ + #endif + 0x40d, /* VCU CanId*/ + STANDARD_CAN, /* CanIdType */ + 0, /*CanIfRxPduHrhIdRef*/ + 8, /* CanIfRxPduDlc */ + Com_RxIndication, /* CanIfRxPduUserRxIndicationName */ + #if(STD_ON == CANIF_PUBLIC_READRXPDU_NOTIFY_STATUS_API) + FALSE, /* CanIfRxPduReadNotifyStatus */ + #endif + #if(STD_ON == CANIF_PUBLIC_READRXPDU_DATA_API) + FALSE, /* CanIfRxPduReadData */ + #endif + #if(STD_ON == CANIF_RX_PDU_RANGE_CANID) + NULL_PTR, /* CanIfRxPduRangePtr */ + #endif + #if(CANIF_FILTER_TYPE_INDEX == CANIF_PRIVATE_SOFTWARE_FILTER_TYPE) + 10, /*CanIfRxPduNextHrh*/ + #endif + + }, + + /* 10*/ /* CanIfRxPduId*/ + { + #if (STD_ON == CANIF_UPPER_LAYER_HANDLE) + 10, /* CanIfRxPduUpperLayerHandle */ + #endif + 0x407, /* BCM_L CanId*/ + STANDARD_CAN, /* CanIdType */ + 0, /*CanIfRxPduHrhIdRef*/ + 8, /* CanIfRxPduDlc */ + Com_RxIndication, /* CanIfRxPduUserRxIndicationName */ + #if(STD_ON == CANIF_PUBLIC_READRXPDU_NOTIFY_STATUS_API) + FALSE, /* CanIfRxPduReadNotifyStatus */ + #endif + #if(STD_ON == CANIF_PUBLIC_READRXPDU_DATA_API) + FALSE, /* CanIfRxPduReadData */ + #endif + #if(STD_ON == CANIF_RX_PDU_RANGE_CANID) + NULL_PTR, /* CanIfRxPduRangePtr */ + #endif + #if(CANIF_FILTER_TYPE_INDEX == CANIF_PRIVATE_SOFTWARE_FILTER_TYPE) + 11, /*CanIfRxPduNextHrh*/ + #endif + + }, + + /* 11*/ /* CanIfRxPduId*/ + { + #if (STD_ON == CANIF_UPPER_LAYER_HANDLE) + 11, /* CanIfRxPduUpperLayerHandle */ + #endif + 0x4bf, /*METER_1_DIR CanId*/ + STANDARD_CAN, /* CanIdType */ + 0, /*CanIfRxPduHrhIdRef*/ + 8, /* CanIfRxPduDlc */ + Com_RxIndication, /* CanIfRxPduUserRxIndicationName */ + #if(STD_ON == CANIF_PUBLIC_READRXPDU_NOTIFY_STATUS_API) + FALSE, /* CanIfRxPduReadNotifyStatus */ + #endif + #if(STD_ON == CANIF_PUBLIC_READRXPDU_DATA_API) + FALSE, /* CanIfRxPduReadData */ + #endif + #if(STD_ON == CANIF_RX_PDU_RANGE_CANID) + NULL_PTR, /* CanIfRxPduRangePtr */ + #endif + #if(CANIF_FILTER_TYPE_INDEX == CANIF_PRIVATE_SOFTWARE_FILTER_TYPE) + 12, /*CanIfRxPduNextHrh*/ + #endif + + }, + + /* 12*/ /* CanIfRxPduId*/ + { + #if (STD_ON == CANIF_UPPER_LAYER_HANDLE) + 12, /* CanIfRxPduUpperLayerHandle */ + #endif + 0x4e6, /*BCM_R CanId*/ + STANDARD_CAN, /* CanIdType */ + 0, /*CanIfRxPduHrhIdRef*/ + 8, /* CanIfRxPduDlc */ + Com_RxIndication, /* CanIfRxPduUserRxIndicationName */ + #if(STD_ON == CANIF_PUBLIC_READRXPDU_NOTIFY_STATUS_API) + FALSE, /* CanIfRxPduReadNotifyStatus */ + #endif + #if(STD_ON == CANIF_PUBLIC_READRXPDU_DATA_API) + FALSE, /* CanIfRxPduReadData */ + #endif + #if(STD_ON == CANIF_RX_PDU_RANGE_CANID) + NULL_PTR, /* CanIfRxPduRangePtr */ + #endif + #if(CANIF_FILTER_TYPE_INDEX == CANIF_PRIVATE_SOFTWARE_FILTER_TYPE) + 13, /*CanIfRxPduNextHrh*/ + #endif + + }, + + /* 13*/ /* CanIfRxPduId*/ + { + #if (STD_ON == CANIF_UPPER_LAYER_HANDLE) + 13, /* CanIfRxPduUpperLayerHandle */ + #endif + 0x4c1, /* HEAT CanId*/ + STANDARD_CAN, /* CanIdType */ + 0, /*CanIfRxPduHrhIdRef*/ + 8, /* CanIfRxPduDlc */ + Com_RxIndication, /* CanIfRxPduUserRxIndicationName */ + #if(STD_ON == CANIF_PUBLIC_READRXPDU_NOTIFY_STATUS_API) + FALSE, /* CanIfRxPduReadNotifyStatus */ + #endif + #if(STD_ON == CANIF_PUBLIC_READRXPDU_DATA_API) + FALSE, /* CanIfRxPduReadData */ + #endif + #if(STD_ON == CANIF_RX_PDU_RANGE_CANID) + NULL_PTR, /* CanIfRxPduRangePtr */ + #endif + #if(CANIF_FILTER_TYPE_INDEX == CANIF_PRIVATE_SOFTWARE_FILTER_TYPE) + 14, /*CanIfRxPduNextHrh*/ + #endif + + }, + + /* 14*/ /* CanIfRxPduId*/ + { + #if (STD_ON == CANIF_UPPER_LAYER_HANDLE) + 14, /* CanIfRxPduUpperLayerHandle */ + #endif + 0x29c, /* ADAS CanId*/ + STANDARD_CAN, /* CanIdType */ + 0, /*CanIfRxPduHrhIdRef*/ + 8, /* CanIfRxPduDlc */ + Com_RxIndication, /* CanIfRxPduUserRxIndicationName */ + #if(STD_ON == CANIF_PUBLIC_READRXPDU_NOTIFY_STATUS_API) + FALSE, /* CanIfRxPduReadNotifyStatus */ + #endif + #if(STD_ON == CANIF_PUBLIC_READRXPDU_DATA_API) + FALSE, /* CanIfRxPduReadData */ + #endif + #if(STD_ON == CANIF_RX_PDU_RANGE_CANID) + NULL_PTR, /* CanIfRxPduRangePtr */ + #endif + #if(CANIF_FILTER_TYPE_INDEX == CANIF_PRIVATE_SOFTWARE_FILTER_TYPE) + 15, /*CanIfRxPduNextHrh*/ + #endif + + }, + + /* 15*/ /* CanIfRxPduId*/ + { + #if (STD_ON == CANIF_UPPER_LAYER_HANDLE) + 0, /* CanIfRxPduUpperLayerHandle */ + #endif + 0x50D, /* CanId*/ + STANDARD_CAN, /* CanIdType */ + 0, /*CanIfRxPduHrhIdRef*/ + 8, /* CanIfRxPduDlc */ + NULL_PTR, /* CanIfRxPduUserRxIndicationName */ + #if(STD_ON == CANIF_PUBLIC_READRXPDU_NOTIFY_STATUS_API) + FALSE, /* CanIfRxPduReadNotifyStatus */ + #endif + #if(STD_ON == CANIF_PUBLIC_READRXPDU_DATA_API) + FALSE, /* CanIfRxPduReadData */ + #endif + #if(STD_ON == CANIF_RX_PDU_RANGE_CANID) + (&(CanIfRxPduCanIdRangeConfig [0])), /* CanIfRxPduRangePtr */ + #endif + #if(CANIF_FILTER_TYPE_INDEX == CANIF_PRIVATE_SOFTWARE_FILTER_TYPE) + 16, /*CanIfRxPduNextHrh*/ + #endif + + }, + + /* 16*/ /* CanIfRxPduId*/ + { + #if (STD_ON == CANIF_UPPER_LAYER_HANDLE) + 0, /* CanIfRxPduUpperLayerHandle */ + #endif + 0x711, //0X18DADFF1 /* CanId*/ + STANDARD_CAN, /* CanIdType */ + 0, /*CanIfRxPduHrhIdRef*/ + 8, /* CanIfRxPduDlc */ + CanTp_RxIndication, /* CanIfRxPduUserRxIndicationName */ + #if(STD_ON == CANIF_PUBLIC_READRXPDU_NOTIFY_STATUS_API) + FALSE, /* CanIfRxPduReadNotifyStatus */ + #endif + #if(STD_ON == CANIF_PUBLIC_READRXPDU_DATA_API) + FALSE, /* CanIfRxPduReadData */ + #endif + #if(STD_ON == CANIF_RX_PDU_RANGE_CANID) + NULL_PTR, /* CanIfRxPduRangePtr */ + #endif + #if(CANIF_FILTER_TYPE_INDEX == CANIF_PRIVATE_SOFTWARE_FILTER_TYPE) + 17, /*CanIfRxPduNextHrh*/ + #endif + + }, + + /* 17*/ /* CanIfRxPduId*/ + { + #if (STD_ON == CANIF_UPPER_LAYER_HANDLE) + 1, /* CanIfRxPduUpperLayerHandle */ + #endif + 0x7df, //0X18DB33F1 /* CanId*/ + STANDARD_CAN, /* CanIdType */ + 0, /*CanIfRxPduHrhIdRef*/ + 8, /* CanIfRxPduDlc */ + CanTp_RxIndication, /* CanIfRxPduUserRxIndicationName */ + #if(STD_ON == CANIF_PUBLIC_READRXPDU_NOTIFY_STATUS_API) + FALSE, /* CanIfRxPduReadNotifyStatus */ + #endif + #if(STD_ON == CANIF_PUBLIC_READRXPDU_DATA_API) + FALSE, /* CanIfRxPduReadData */ + #endif + #if(STD_ON == CANIF_RX_PDU_RANGE_CANID) + NULL_PTR, /* CanIfRxPduRangePtr */ + #endif + #if(CANIF_FILTER_TYPE_INDEX == CANIF_PRIVATE_SOFTWARE_FILTER_TYPE) + CANIF_LAST_HRH_RXPDUID, /*CanIfRxPduNextHrh*/ + #endif + + } +}; + +#if(CANIF_FILTER_TYPE_INDEX == CANIF_PRIVATE_SOFTWARE_FILTER_TYPE) //默認是 這配置宏 +CONST(Can_HwHandleType, CANIF_CONFIG_CONST) + CanIfHrhFirstRxPduID[CANIF_CFG_TOTAL_HRH] = +{ + /* HRH-0 */ + 0, +}; +#endif + +#if(STD_ON == CANIF_HRH_RANGE_FILTER) //默認宏 關閉 +CONST(CanIf_HrhRangeCfgType, CANIF_CONFIG_CONST) + CanIfHrhRangeCfg[CANIF_CFG_TOTAL_HRH] = +{ + /*HRH-0*/ + { + 0x85, /*CanIfHrhRangeRxPduLowerCanId*/ + 0x7df, /*CanIfHrhRangeRxPduUpperCanId */ + STANDARD_CAN /* CanIfHrhRangeRxPduRangeCanIdType */ + }, +}; +#endif + +CONST(CanIf_TxPduConfigType, CANIF_CONFIG_CONST) + CanIfTxPduConfig[CANIF_CFG_TOTAL_TXPDUID] = +{ + /*0*/ /* CanIfTxPduId*/ + { + #if (STD_ON == CANIF_UPPER_LAYER_HANDLE) + 0, /* CanIfTxPduUpperLayerHandle*/ + #endif + 0x4a8, // /* CanId*/ + STANDARD_CAN, /* CanIdType */ + 1, /* CanIfTxPduHthIdRef 指的就是 CanHardwareObjectConfig的 buf id */ + 8u, /* CanIfTxPduDLC */ //CAN_FRAME_COM_DLC + Com_TxConfirmation, /* CanIfRxPduUserRxIndicationName */ + #if (STD_ON == CANIF_PUBLIC_SETDYNAMICTXID_API) + STATIC_TXPDU, /* CanIfTxPduType */ + #endif + #if(STD_ON == CANIF_PUBLIC_READTXPDU_NOTIFY_STATUS_API) + FALSE, /* CanIfTxPduReadNotifyStatus */ + #endif + }, + /*1*/ /* CanIfTxPduId*/ + { + #if (STD_ON == CANIF_UPPER_LAYER_HANDLE) + 1, /* CanIfTxPduUpperLayerHandle*/ + #endif + 0x3b0, // /* CanId*/ + STANDARD_CAN, /* CanIdType */ + 1, /* CanIfTxPduHthIdRef 指的就是 CanHardwareObjectConfig 的 buf id */ + 8u, /* CanIfTxPduDLC */ //COM_TX_MSG_2_MAX_LEN 如果這裡超過，最大長度，會只發當前長度 + Com_TxConfirmation, /* CanIfRxPduUserRxIndicationName */ + #if (STD_ON == CANIF_PUBLIC_SETDYNAMICTXID_API) + STATIC_TXPDU, /* CanIfTxPduType */ + #endif + #if(STD_ON == CANIF_PUBLIC_READTXPDU_NOTIFY_STATUS_API) + FALSE, /* CanIfTxPduReadNotifyStatus */ + #endif + + }, + /*2*/ /* CanIfTxPduId*/ + { + #if (STD_ON == CANIF_UPPER_LAYER_HANDLE) + 2, /* CanIfTxPduUpperLayerHandle*/ + #endif + 0x429, //157 /* CanId*/ + STANDARD_CAN, /* CanIdType */ + 1, /* CanIfTxPduHthIdRef 指的就是 CanHardwareObjectConfig的 buf id */ + 8, /* CanIfTxPduDLC */ + Com_TxConfirmation, /* CanIfRxPduUserRxIndicationName */ + #if (STD_ON == CANIF_PUBLIC_SETDYNAMICTXID_API) + STATIC_TXPDU, /* CanIfTxPduType */ + #endif + #if(STD_ON == CANIF_PUBLIC_READTXPDU_NOTIFY_STATUS_API) + FALSE, /* CanIfTxPduReadNotifyStatus */ + #endif + + }, + /*3*/ /* CanIfTxPduId*/ + { + #if (STD_ON == CANIF_UPPER_LAYER_HANDLE) + 0, /* CanIfTxPduUpperLayerHandle*/ + #endif + 0x532, /* CanId*/ + STANDARD_CAN, /* CanIdType */ + 1, /* CanIfTxPduHthIdRef */ + 8, /* CanIfTxPduDLC */ + CanNm_TxConfirmation, /* CanIfRxPduUserRxIndicationName */ + #if (STD_ON == CANIF_PUBLIC_SETDYNAMICTXID_API) + STATIC_TXPDU, /* CanIfTxPduType */ + #endif + #if(STD_ON == CANIF_PUBLIC_READTXPDU_NOTIFY_STATUS_API) + FALSE, /* CanIfTxPduReadNotifyStatus */ + #endif + }, + /*4*/ /* CanIfTxPduId*/ //注意这个buf Index 就是 ADPT_UDS_TX_HANDLE ，并且要修改 CanTp_TxNsduCfg 中的第二个参数 + { + #if (STD_ON == CANIF_UPPER_LAYER_HANDLE) + 0, /* CanIfTxPduUpperLayerHandle*/ + #endif + 0x719, /* CanId*/ + STANDARD_CAN, /* CanIdType */ + 1, /* CanIfTxPduHthIdRef 指的就是 CanHardwareObjectConfig的 buf id */ + 8, /* CanIfTxPduDLC */ + CanTp_TxConfirmation, /* CanIfRxPduUserRxIndicationName */ + #if (STD_ON == CANIF_PUBLIC_SETDYNAMICTXID_API) + STATIC_TXPDU, /* CanIfTxPduType */ + #endif + #if(STD_ON == CANIF_PUBLIC_READTXPDU_NOTIFY_STATUS_API) + FALSE, /* CanIfTxPduReadNotifyStatus */ + #endif + }, +}; + +#define CANIF_STOP_SEC_CONFIG_DATA_UNSPECIFIED +#include "MemMap.h" \ No newline at end of file diff --git a/code_app_out/Source/ComStack/Can_Gen/CanTp/CanTp_Cfg.h b/code_app_out/Source/ComStack/Can_Gen/CanTp/CanTp_Cfg.h new file mode 100644 index 0000000..582eb7d --- /dev/null +++ b/code_app_out/Source/ComStack/Can_Gen/CanTp/CanTp_Cfg.h @@ -0,0 +1,76 @@ +/** + ****************************************************************************** + * @file + * @author + * @version + * @date + * @brief + * @function List: + ****************************************************************************** + * @attention + * + * + *

© COPYRIGHT 2021

+ ****************************************************************************** + * @History: + * @Author: + * @Data: + * @Version: +*/ + +#if !defined(CANTP_CFG_H) +#define CANTP_CFG_H + +/******************************************************************************* +* Includes +*******************************************************************************/ +#include "CanIf.h" +#include "PduR_CanTp.h" + +#define CANTP_VERSION_INFO_API STD_OFF +#define CANTP_DEV_ERROR_DETECT STD_OFF +#define CANTP_PROD_ERROR_DETECT STD_ON +#define CANTP_TC STD_ON +#define CANTP_MAIN_FUNCTION_PERIOD 5u + +#define CANTP_FILLPATTERN 0xAAu //]õֵ + +#define CANTP_CHANNELS 1u //ʾǣ l һͨmainfunction --ܾͨP߉݋ͨ + + +#define CANTP_NUM_RX_SDUS 2u //Ѓ SDUS քeǹܺ팤ַ +#define CANTP_NUM_TX_SDUS 1u //TX 쑪 + +#define CANTP_NUM_RX_CHANNELS CANTP_CHANNELS //CANTPģK 춽N-SDUͨ ʲN1 ɲ/*CanIfRxPduHrhIdRef*/ // CanHardwareObjectConfig[0] ֻ +#define CANTP_NUM_TX_CHANNELS CANTP_CHANNELS //CANTPģK 춰lN-SDUͨ ʲN1 + +#define CanTp_CanInterruptDisable() Can_DisableGlobalInterrupts() +#define CanTp_CanInterruptRestore() Can_EnableGlobalInterrupts() + +#define CanTp_CanTransmit(txSduIdx,pduInfo) CanIf_Transmit(txSduIdx,pduInfo) +#define CanTp_CanCancelTransmit(txSduIdx) CanIf_CancelTransmit(txSduIdx) + +//Žׂஔ {dcmĽӿ +#define CanTp_NUSDataIndication(rxSduIdx,canTpErrorCode) {PduR_CanTpRxIndication(rxSduIdx,canTpErrorCode);CanTp_ChannelInit(CANTP_RXTPCHANNEL_ID(rxSduIdx));} + +#define CanTp_NUSDataConfirm(txSduIdx,canTpErrorCode) PduR_CanTpTxConfirmation(txSduIdx,canTpErrorCode) +#define CanTp_NUSDataFFIndication(rxSduIdx,length,bufferSizePtr) PduR_CanTpStartOfReception(rxSduIdx,length,bufferSizePtr) + +#define CanTp_NUSDataSFIndication(rxSduIdx,length,bufferSizePtr) PduR_CanTpStartOfReception(rxSduIdx,length,bufferSizePtr) + + +#define CanTp_CopyRxData(rxSduIdx,pduInfo,bufferSizePtr) PduR_CanTpCopyRxData(rxSduIdx,pduInfo,bufferSizePtr) + +#define CanTp_CopyTxData(txSduIdx,pduInfo,NULL_PTR,bufferSizePtr) PduR_CanTpCopyTxData(txSduIdx,pduInfo,NULL_PTR,bufferSizePtr) + + + + + +/***************yԇõ****************************/ +//#define CAN_TP_DEBUG 1 //DEBUG yԇP + + +//#define CAN_TP_IN_TEST 1 //TPӃȲyԇ + +#endif /* CANTP_CFG_H */ diff --git a/code_app_out/Source/ComStack/Can_Gen/CanTp/CanTp_PBcfg.c b/code_app_out/Source/ComStack/Can_Gen/CanTp/CanTp_PBcfg.c new file mode 100644 index 0000000..06fb6ed --- /dev/null +++ b/code_app_out/Source/ComStack/Can_Gen/CanTp/CanTp_PBcfg.c @@ -0,0 +1,114 @@ +/** + ****************************************************************************** + * @file + * @author + * @version + * @date + * @brief + * @function List: + ****************************************************************************** + * @attention + * + * + *

© COPYRIGHT 2021

+ ****************************************************************************** + * @History: + * @Author: + * @Data: + * @Version: +*/ + + +/******************************************************************************* +* Includes +*******************************************************************************/ +#include "CanTp.h" +#include "CanTp_Cfg.h" +#include "boot_app.h" + + +const CanTp_RxNsduCfgType CanTp_RxNsduCfg[]; +const CanTp_TxNsduCfgType CanTp_TxNsduCfg[]; +const CanTpChannelModeType CanTpChannelMode[CANTP_CHANNELS]; +const CanTp_CfgType CanTp_Cfg = +{ + CanTp_RxNsduCfg /* Pointer to RxNsdu-cfg-table */, + CanTp_TxNsduCfg /* Pointer to TxNsdu-cfg-table */, + CanTpChannelMode /* Extended SDU indirection table */, +}; + + +const CanTp_RxNsduCfgType CanTp_RxNsduCfg[CANTP_NUM_RX_SDUS] = +{ +{ + 0 /*Tp Channel Num ͨid*/, //ĿǰTPһchannel --ĿǰtpӶ + 0 /* CANTP_RXNPDU_ID; from CanIf */, // CanIfRxPduConfig е CanIfRxPduUpperLayerHandle /* CanIfRxPduUpperLayerHandle ----TPӵPDU*/ + ADPT_UDS_TX_HANDLE /* CANTP_TXFC_NPDU_ID; to CanIf */, //Ҫl쑪 lfӵ pdu id CanIfTxPduConfig еbufidҿûи + 1u /* CANTP_DL */, //ԓСҪյL + 150 /* CANTP_NAR */, //շ·Ӱl͵ĕrg; λmaintpfunction{ + 10 /* CANTP_NBR */, //շlƎgʱg λmaintpfunction{ + 150 /* CANTP_NCR */, //շBmĵȴrgλmaintpfunction{ + CANTP_ON /* CANTP_PADDING_ACTIVATION */, //ஔ Ƿ񼤻 + CANTP_PHYSICAL /* CANTP_TA_TYPE */, //팤ַ + CANTP_STANDARD /* CANTP_ADDRESSING_FORMAT */, //CAN ַ ؘʵַ + 0 /* CANTP_BS */, //؎SһBml͵CFĔ 0ʾٟoƎoƣ + 10 /* CANTP_STMIN */, //؎Сgrg10ʾ10ms + 1 /* CANTP_WFTMAX */, //շBmlͶقȴFC + CANTP_UNUSED /* CANTP_RX_NAE */, //όַģʽrĔUչַ + CANTP_UNUSED /* CANTP_RX_NSA */, //όַģʽrԴַ + CANTP_UNUSED /* CANTP_RX_NTA */, //όַģʽrĿ˵ַ +}, +{ + 0 /*Tp Channel Num ͨid*/, //ĿǰTPһchannel --ĿǰtpӶ + 1 /* CANTP_RXNPDU_ID; from CanIf */, // CanIfRxPduConfig е CanIfRxPduUpperLayerHandle /* CanIfRxPduUpperLayerHandle ----TPӵPDU*/ + ADPT_UDS_TX_HANDLE /* CANTP_TXFC_NPDU_ID; to CanIf */, //Ҫl쑪 lfӵ pdu id CanIfTxPduConfig еbufidҿûи + 1u /* CANTP_DL */, //ԓСҪĽL + 150 /* CANTP_NAR */, //շ·Ӱl͵ĕrg; λmaintpfunction{ + 10 /* CANTP_NBR */, + 150 /* CANTP_NCR */, + CANTP_ON /* CANTP_PADDING_ACTIVATION */, + CANTP_FUNCTIONAL /* CANTP_TA_TYPE */, //܌ַ + CANTP_STANDARD /* CANTP_ADDRESSING_FORMAT */, //CAN ַ ؘʵַ + 0 /* CANTP_BS */, //؎SһBml͵CFĔ //؎SһBml͵CFĔ 0ʾٟoƎoƣ + 10 /* CANTP_STMIN */, //؎Сgrg10ʾ10ms + 1 /* CANTP_WFTMAX */, //շBmlͶقȴFC + CANTP_UNUSED /* CANTP_RX_NAE */, //όַģʽrĔUչַ + CANTP_UNUSED /* CANTP_RX_NSA */, //όַģʽrԴַ + CANTP_UNUSED /* CANTP_RX_NTA */, //όַģʽrĿ˵ַ +} +}; + + + +const CanTp_TxNsduCfgType CanTp_TxNsduCfg[CANTP_NUM_TX_SDUS] = +{ + { + 0 /*Tp Channel Num ͨid--tpӶ*/, + ADPT_UDS_TX_HANDLE /* CANTP_TXNPDU_ID; to CanIf ԓ CanIfTxPduConfig е buf id*/, //Ҫl lfӵ pdu id CanIfTxPduConfig еbufidҿûиģ CanIf_Transmit һ + 0 /* CANTP_RXFC_NPDU_ID; from CanIf */, //ʲN750 7df + 1 /* CANTP_DL */, //СҪl͵L + 150 /* CANTP_NAS */, ////lͷI·Ӱl͵ĕrg + 150 /* CANTP_NBS */, //lͷƎĵȴrg + 10 /* CANTP_NCS */, //lͷlBmgrg + CANTP_ON /* CANTP_PADDING_ACTIVATION */, + CANTP_PHYSICAL /* CANTP_TA_TYPE ---l ֹܺ */, + CANTP_STANDARD /* CANTP_ADDRESSING_FORMAT --˜ʣUչ*/, + CANTP_UNUSED /* CANTP_RX_NAE */, + CANTP_UNUSED /* CANTP_TX_NSA */, + CANTP_UNUSED /* CANTP_TX_NTA */, + } + + + +}; + + + + +const CanTpChannelModeType CanTpChannelMode[CANTP_CHANNELS]= +{ + { + CANTP_MODE_HALF_DUPLEX + }, +}; + diff --git a/code_app_out/Source/ComStack/Can_Gen/Com/App_Com.c b/code_app_out/Source/ComStack/Can_Gen/Com/App_Com.c new file mode 100644 index 0000000..cd73251 --- /dev/null +++ b/code_app_out/Source/ComStack/Can_Gen/Com/App_Com.c @@ -0,0 +1,269 @@ +/** + ****************************************************************************** + * @file + * @author + * @version + * @date + * @brief + * @function List: + ****************************************************************************** + * @attention + * + * + *

© COPYRIGHT 2021

+ ****************************************************************************** + * @History: + * @Author: + * @Data: + * @Version: +*/ +/******************************************************************************* +* Includes +*******************************************************************************/ +#include "Com.h" +#if(STD_ON == CANIF_SUPPORT_OSEK_NM) +#include "Ls_Nm.h" +#endif +#include "Dem.h" +#include "fault_detect.h" +#include "can_app.h" +/***************************************************************************** +* Include Files +*****************************************************************************/ +#include "common_types.h" +#include "common_memory.h" +#include "Can.h" +#include "CanIf.h" +#include "Com.h" +#include "CanTrcv.h" +#include "Dcm.h" +#include "CanTp.h" + +//#include "common_timer.h" +#include "key_app.h" +#include "gpio_cfg.h" +#include "common_memory.h" + +//#include "OsekNm.h" +#include "Com_Cfg.h" + +#include "crc.h" +#include "cpu.h" + + +/*PRQA S 1503,2987++*/ +//發送前置 可以添加功能安全相關處理 +void Com_TxIpduCallout(PduIdType PduId) +{ +} +//接收前置 可以添加功能安全相關處理 +void Com_RxIpduCallout(PduIdType PduId) +{ +} + +/**********以下是發送相關的*************************/ +// +/*發送確認--SWS R 4A8*/ +void AppIpduSteering_RIGHT_switch_4A8_Conf(void) +{ + app_sig_sws_r_multimedia_tx_conf(); + app_sig_sws_r_left_menu_tx_conf(); + app_sig_sws_r_voicd_expand_2_tx_conf(); + app_sig_sws_r_auto_show_in_tx_conf(); + app_sig_sws_r_auto_show_out_tx_conf(); + app_sig_sws_r_mileage_clear_tx_conf(); + AppCan_EventSig_SWS_R_MediaReset_TxConf(); + AppCan_EventSig_SWS_R_OtherRecover_TxConf(); +} +/*發送超時--SWS R 4A8*/ +void AppIpduSteering_RIGHT_switch_4A8_TxTOIndication(void) +{ + uint8_t i; + + for(i = 0; i < 8; i ++) + { + TxIpduSteering_RIGHT_switch_4A8._c[i] = TxIpduSteering_RIGHT_switch_4A8DefualtValue._c[i]; + } +} + +/*發送確認--SWS L 3B0*/ +void AppIpduSteering_LEFT_switch_3B0_Conf(void) +{ + TxIpduSteering_LEFT_switch_3B0.IpduSteering_LEFT_switch_3B0.SWS_L_rolling_count ++; + TxIpduSteering_LEFT_switch_3B0.IpduSteering_LEFT_switch_3B0.SWS_L_checksum = crc_8_for_sa3f(&(TxIpduSteering_LEFT_switch_3B0._c[0]), 7); +} +/*發送超時--SWS L 3B0*/ +void AppIpduSteering_LEFT_switch_3B0_TxTOIndication(void) +{ + uint8_t i; + + for(i = 0; i < 8; i ++) + { + TxIpduSteering_LEFT_switch_3B0._c[i] = TxIpduSteering_LEFT_switch_3B0DefualtValue._c[i]; + } + +} +/*發送確認--SWS C 429*/ +void AppIpduSteering_customization_switch_429_Conf(void) +{ +} +/*發送超時--SWS C 429*/ +void AppIpduSteering_customization_switch_429_TxTOIndication(void) +{ + uint8_t i; + + for(i = 0; i < 8; i ++) + { + TxIpduSteering_customization_switch_429._c[i] = TxIpduSteering_customization_switch_429DefualtValue._c[i]; + } + +} + + +/**********以下是接收相關的*************************/ + +void AppIpduMPC_316_Ind(void) +{ + app_mpc_316_rx_conf(); +} +void AppIpduMETER_055_Ind(void) +{ + app_meter_055_rx_conf(); +} +void AppIpduBCM_1_12D_Ind(void) +{ + app_bcm_1_12d_rx_conf(); +} +void AppIpduBCM_2_50D_Ind(void) +{ + app_bcm_2_50d_rx_conf(); +} +void AppIpduMOD_4G_49A_Ind(void) +{ + app_mod_4g_49a_rx_conf(); +} +void AppIpduMultimedia_385_Ind(void) +{ + app_multimedia_385_rx_conf(); +} +void AppIpduCloud_services_0A2_Ind(void) +{ + app_cloud_services_0a2_rx_conf(); +} +void AppIpduBCM_EvP2_394_Ind(void) +{ + app_bcm_evp2_394_rx_conf(); +} +void AppIpduAir_condition_ctrl_2DB_Ind(void) +{ + app_air_condition_ctrl_2db_rx_conf(); +} +void AppIpduVCU_40D_Ind(void) +{ + app_vcu_40d_rx_conf(); +} +void AppIpduBCM_L_407_Ind(void) +{ + app_bcm_l_407_rx_conf(); +} +void AppIpduMETER_1_dir_4BF_Ind(void) +{ + app_meter_1_dir_4bf_rx_conf(); +} + +void AppIpduBCM_R_4E6_Ind(void) +{ + app_bcm_r_4e6_rx_conf(); +} + +void AppIpduHEAT_4C1_Ind(void) +{ + app_bcm_heat_4c1_rx_conf(); +} + +void AppIpduAds_29C_Ind(void) +{ + app_ads_29c_rx_conf(); +} + +void AppIpduMPC_316_TimeOutInd(void) +{ + app_mpc_316_to_conf(); +} +void AppIpduMETER_055_TimeOutInd(void) +{ + app_meter_055_to_conf(); +} +void AppIpduBCM_1_12D_TimeOutInd(void) +{ + app_bcm_1_12d_to_conf(); +} +void AppIpduBCM_2_50D_TimeOutInd(void) +{ + app_bcm_2_50d_to_conf(); +} +void AppIpduMOD_4G_49A_TimeOutInd(void) +{ + app_mod_4g_49a_to_conf(); +} +void AppIpduMultimedia_385_TimeOutInd(void) +{ + app_multimedia_385_to_conf(); +} + +void AppIpduCloud_services_0A2_TimeOutInd(void) +{ + app_cloud_services_0a2_to_conf(); +} + +void AppIpduBCM_EvP2_394_TimeOutInd(void) +{ + app_bcm_evp2_394_to_conf(); +} + +void AppIpduAir_condition_ctrl_2DB_TimeOutInd(void) +{ + app_air_condition_ctrl_2db_to_conf(); +} + +void AppIpduVCU_40D_TimeOutInd(void) +{ + app_vcu_40d_to_conf(); +} + +void AppIpduBCM_L_407_TimeOutInd(void) +{ + app_bcm_l_407_to_conf(); +} + +void AppIpduMETER_1_dir_4BF_TimeOutInd(void) +{ + app_meter_1_dir_4bf_to_conf(); +} + +void AppIpduBCM_R_4E6_TimeOutInd(void) +{ + app_bcm_r_4e6_to_conf(); +} + +void AppIpduHEAT_4C1_TimeOutInd(void) +{ + app_bcm_heat_4c1_to_conf(); +} + +void AppIpduADS_29C_TimeOutInd(void) +{ + app_ads_29c_to_conf(); +} + + + + + + + + + + + + diff --git a/code_app_out/Source/ComStack/Can_Gen/Com/Com_Cfg.c b/code_app_out/Source/ComStack/Can_Gen/Com/Com_Cfg.c new file mode 100644 index 0000000..810bfd5 --- /dev/null +++ b/code_app_out/Source/ComStack/Can_Gen/Com/Com_Cfg.c @@ -0,0 +1,680 @@ +/** + ****************************************************************************** + * @file + * @author + * @version + * @date + * @brief + * @function List: + ****************************************************************************** + * @attention + * + * + *

© COPYRIGHT 2021

+ ****************************************************************************** + * @History: + * @Author: + * @Data: + * @Version: +*/ +#include "Com.h" + + +#if(COM_TXIPDUNUM>=1) +IpduSteering_RIGHT_switch_4A8_bufType TxIpduSteering_RIGHT_switch_4A8; +IpduSteering_LEFT_switch_3B0_bufType TxIpduSteering_LEFT_switch_3B0; +IpduSteering_customization_switch_429_bufType TxIpduSteering_customization_switch_429; + +COM_CONST IpduSteering_RIGHT_switch_4A8_bufType TxIpduSteering_RIGHT_switch_4A8DefualtValue= +{ + { + 0x01u,0x00u,0x00u,0x00u,0x00u, 0x00u,0x00u,0x00u,0x00u,0x00u, 0x00u,0x00u, + } +}; + +COM_CONST IpduSteering_LEFT_switch_3B0_bufType TxIpduSteering_LEFT_switch_3B0DefualtValue= +{ + { + 0x04u,0x00u,0x00u,0x00u,0x00u, 0x01u,0x00u,0x00u,0x00u,0x00u, 0x00u, 0x00u,0x00u,0x00u,0x00u,0x00u, + } +}; + +COM_CONST IpduSteering_customization_switch_429_bufType TxIpduSteering_customization_switch_429DefualtValue= +{ + { + 0x00u,0x00u,0x00u,0x01u,0x00u, 0x00u,0x00u,0x03u,0x00u,0x00u,0x00u, 0x00u,0x02u + } +}; + + + +COM_CONST PduInfoType COM_TxDataInitInfo[COM_TXIPDUNUM] = +{ + {TxIpduSteering_RIGHT_switch_4A8._c,8u}, + {TxIpduSteering_LEFT_switch_3B0._c,8u}, + {TxIpduSteering_customization_switch_429._c,8u} +}; + +COM_CONST COM_UINT8 COM_TxIpduSigNum[COM_TXIPDUNUM] = +{ + 14u, + 16u, + 8u, +}; + + + +COM_CONST COM_TxSigStruct COM_TxSigTable[COM_TXSIGNUM] = +{ + { 0,COM_SENDTYPEONEVENT | COM_SENDTYPEREPETITION,(Com_SigInActiveType*)0}, + { 0,COM_SENDTYPEONEVENT | COM_SENDTYPEREPETITION,(Com_SigInActiveType*)0}, + { 0,COM_SENDTYPEONEVENT | COM_SENDTYPEREPETITION,(Com_SigInActiveType*)0}, + { 0,COM_SENDTYPEONEVENT | COM_SENDTYPEREPETITION,(Com_SigInActiveType*)0}, + { 0,COM_SENDTYPEONEVENT | COM_SENDTYPEREPETITION,(Com_SigInActiveType*)0}, + { 0,COM_SENDTYPEONEVENT | COM_SENDTYPEREPETITION,(Com_SigInActiveType*)0}, + { 0,COM_SENDTYPEONEVENT | COM_SENDTYPEREPETITION,(Com_SigInActiveType*)0}, + { 0,COM_SENDTYPEONEVENT | COM_SENDTYPEREPETITION,(Com_SigInActiveType*)0}, + { 0,COM_SENDTYPEONEVENT | COM_SENDTYPEREPETITION,(Com_SigInActiveType*)0}, + { 0,COM_SENDTYPEONEVENT | COM_SENDTYPEREPETITION,(Com_SigInActiveType*)0}, + { 0,COM_SENDTYPEONEVENT | COM_SENDTYPEREPETITION,(Com_SigInActiveType*)0}, + { 0,COM_SENDTYPEONEVENT | COM_SENDTYPEREPETITION,(Com_SigInActiveType*)0}, + { 0,COM_SENDTYPEONEVENT | COM_SENDTYPEREPETITION,(Com_SigInActiveType*)0}, + { 0,COM_SENDTYPEONEVENT | COM_SENDTYPEREPETITION,(Com_SigInActiveType*)0}, + + { 1,COM_SENDTYPECYCLIC,(Com_SigInActiveType*)0}, + { 1,COM_SENDTYPECYCLIC,(Com_SigInActiveType*)0}, + { 1,COM_SENDTYPECYCLIC,(Com_SigInActiveType*)0}, + { 1,COM_SENDTYPECYCLIC,(Com_SigInActiveType*)0}, + { 1,COM_SENDTYPECYCLIC,(Com_SigInActiveType*)0}, + { 1,COM_SENDTYPECYCLIC,(Com_SigInActiveType*)0}, + { 1,COM_SENDTYPECYCLIC,(Com_SigInActiveType*)0}, + { 1,COM_SENDTYPECYCLIC,(Com_SigInActiveType*)0}, + { 1,COM_SENDTYPECYCLIC,(Com_SigInActiveType*)0}, + { 1,COM_SENDTYPECYCLIC,(Com_SigInActiveType*)0}, + { 1,COM_SENDTYPECYCLIC,(Com_SigInActiveType*)0}, + { 1,COM_SENDTYPECYCLIC,(Com_SigInActiveType*)0}, + { 1,COM_SENDTYPECYCLIC,(Com_SigInActiveType*)0}, + { 1,COM_SENDTYPECYCLIC,(Com_SigInActiveType*)0}, + { 1,COM_SENDTYPECYCLIC,(Com_SigInActiveType*)0}, + { 1,COM_SENDTYPECYCLIC,(Com_SigInActiveType*)0}, + + + { 2,COM_SENDTYPECYCLIC,(Com_SigInActiveType*)0}, + { 2,COM_SENDTYPECYCLIC,(Com_SigInActiveType*)0}, + { 2,COM_SENDTYPECYCLIC,(Com_SigInActiveType*)0}, + { 2,COM_SENDTYPECYCLIC,(Com_SigInActiveType*)0}, + { 2,COM_SENDTYPECYCLIC,(Com_SigInActiveType*)0}, + { 2,COM_SENDTYPECYCLIC,(Com_SigInActiveType*)0}, + { 2,COM_SENDTYPECYCLIC,(Com_SigInActiveType*)0}, + { 2,COM_SENDTYPECYCLIC,(Com_SigInActiveType*)0}, +}; +COM_CONST COM_UINT8* COM_TxIpduDefaultValue[COM_TXIPDUNUM] = +{ + TxIpduSteering_RIGHT_switch_4A8DefualtValue._c, + TxIpduSteering_LEFT_switch_3B0DefualtValue._c, + TxIpduSteering_customization_switch_429DefualtValue._c +}; +COM_CONST COM_UINT8 COM_IpduTxTypeTable[COM_TXIPDUNUM] = +{ + (COM_SENDTYPEONEVENT | COM_SENDTYPETIMEOUTMONITOR), + (COM_SENDTYPECYCLIC | COM_SENDTYPETIMEOUTMONITOR) , + (COM_SENDTYPECYCLIC | COM_SENDTYPETIMEOUTMONITOR) +}; + +COM_CONST COM_UINT16 COM_IdpuTxCycCntTable[COM_TXIPDUNUM] = +{ + 100u, + 50u, + 1000u, +}; + +COM_CONST COM_UINT16 COM_IdpuTxFastCycleTable[COM_TXIPDUNUM] = +{ + 0u, + 0u, + 0u +}; + +COM_CONST COM_UINT16 COM_TxIpduOffsetInTxSigTable[COM_TXIPDUNUM] = +{ + 0u, + 14u, + 30u +}; +COM_CONST COM_UINT16 COM_IpduTxDelayCntTable[COM_TXIPDUNUM] = +{ + 0u, + 0u, + 0u +}; +COM_CONST COM_UINT16 COM_IpduRepetitionTxCycCntTable[COM_TXIPDUNUM] = +{ + 100u, + 0u, + 0u +}; +COM_UINT8 COM_IpduRepetitionTxNumTable[COM_TXIPDUNUM] = +{ + 1u, + 1u, + 1u +}; +COM_CONST COM_UINT16 COM_IpduTxTimeOutCntTable[COM_TXIPDUNUM] = +{ + 5000u, + 250u, + 5000u +}; +COM_CONST COM_UINT16 COM_IpduTxOffsetTimerTable[COM_TXIPDUNUM] = +{ + 0u, + 0u, + 0u +}; + +#ifdef COM_ENABLE_TX_TO_INDFUN + +COM_CONST COM_TxTimeOutFun COM_IpduTxTimeOutFunPtr[COM_TXIPDUNUM] = +{ + AppIpduSteering_RIGHT_switch_4A8_TxTOIndication, + AppIpduSteering_LEFT_switch_3B0_TxTOIndication, + AppIpduSteering_customization_switch_429_TxTOIndication +}; +#endif + +#ifdef COM_ENABLE_TX_CONFIRMATIONFUN + +COM_CONST COM_TxConfirmationFun COM_IpduTxConfirmFunPtr[COM_TXIPDUNUM] = +{ + AppIpduSteering_RIGHT_switch_4A8_Conf, + AppIpduSteering_LEFT_switch_3B0_Conf, + AppIpduSteering_customization_switch_429_Conf +}; +#endif + +COM_CONST COM_UINT16 COM_UnderlyHandle[COM_TXIPDUNUM]= +{ + 0u, + 1u, + 2u +}; + +#endif /*#if(COM_TXIPDUNUM>=1)*/ + +#if(COM_RXIPDUNUM>=1) +IpduMPC_316_bufType RxIpduMPC_316; +IpduMETER_055_bufType RxIpduMETER_055; +IpduBCM_1_12D_bufType RxIpduBCM_1_12D; +IpduBCM_2_50D_bufType RxIpduBCM_2_50D; +IpduMOD_4G_49A_bufType RxIpduMOD_4G_49A; +IpduMultimedia_385_bufType RxIpduMultimedia_385; +IpduCloud_services_0A2_bufType RxIpdCloud_services_0A2; +IpduBCM_EvP2_394_bufType RxIpduBCM_EvP2_394; +IpduAir_condition_ctrl_2DB_bufType RxIpduAir_condition_ctrl_2DB; +IpduVCU_40D_bufType RxIpduVCU_40D; +IpduBCM_L_407_bufType RxIpduBCM_L_407; +IpduMETER_1_dir_4BF_bufType RxIpduMETER_1_dir_4BF; +IpduBCM_R_4E6_bufType RxIpduBCM_R_4E6; + + + +IpduHEAT_4C1_bufType RxIpduHEAT_4C1; +IpduADS_29C_bufType RxIpduADS_29C; +COM_CONST IpduMPC_316_bufType RxIpduMPC_316DefualtValue= +{ + { + 0x00u,0x00u,0x00u,0x00u,0x00u,0x00u,0x00u,0x00u,0x00u,0x00u,0x00u,0x00u,0x00u + } +}; +COM_CONST IpduMETER_055_bufType RxIpduMETER_055DefualtValue= +{ + { + 0x00u,0x00u,0x00u,0x00u,0x00u,0x00u,0x00u,0x00u,0x00u, + } +}; +COM_CONST IpduBCM_1_12D_bufType RxIpduBCM_1_12DDefualtValue= +{ + { + 0x00u,0x00u,0x00u,0x00u,0x00u,0x00u,0x01u,0x00u,0x00u,0x00u,0x00u + } +}; +COM_CONST IpduBCM_2_50D_bufType RxIpduBCM_2_50DDefualtValue= +{ + { + 0x00u,0x00u,0x00u,0x00u,0x00u,0x00u,0x00u,0x00u,0x00u + } +}; +COM_CONST IpduMOD_4G_49A_bufType RxIpduMOD_4G_49ADefualtValue= +{ + { + 0x00u,0x00u,0x00u,0x00u,0x00u,0x00u,0x00u,0x00u,0x00u,0x00u,0x00u,0x00u + } +}; +COM_CONST IpduMultimedia_385_bufType RxIpduMultimedia_385DefualtValue= +{ + { + 0x00u,0x00u,0x00u,0x00u,0x00u,0x00u,0x00u,0x00u,0x00u,0x00u, + } +}; +COM_CONST IpduCloud_services_0A2_bufType RxIpdCloud_services_0A2DefualtValue= +{ + { + 0x00u,0x00u,0x00u,0x00u,0x00u,0x00u,0x00u,0x00u,0x00u, + } +}; +COM_CONST IpduBCM_EvP2_394_bufType RxIpduBCM_EvP2_394DefualtValue= +{ + { + 0x00u,0x00u,0x00u,0x00u,0x00u,0x00u,0x00u,0x00u,0x00u, + } +}; +COM_CONST IpduAir_condition_ctrl_2DB_bufType RxIpduAir_condition_ctrl_2DBDefualtValue= +{ + { + 0x00u,0x00u,0x00u,0x00u,0x00u,0x00u,0x00u,0x00u,0x00u,0x00u + } +}; +COM_CONST IpduVCU_40D_bufType RxIpduVCU_40DDefualtValue= +{ + { + 0x00u,0x00u,0x00u,0x00u,0x00u,0x00u,0x00u,0x00u + } +}; +COM_CONST IpduBCM_L_407_bufType RxIpduBCM_L_407DefualtValue= +{ + { + 0x00u,0x00u,0x00u,0x00u,0x00u,0x00u,0x00u,0x00u,0x00u + } +}; +COM_CONST IpduMETER_1_dir_4BF_bufType RxIpduMETER_1_dir_4BFDefualtValue= +{ + { + 0x00u,0x00u,0x00u,0x00u,0x00u,0x00u,0x00u,0x00u,0x00u + } +}; +COM_CONST IpduBCM_R_4E6_bufType RxIpduBCM_R_4E6DefualtValue= +{ + { + 0x00u,0x00u,0x00u,0x00u,0x00u,0x00u,0x00u,0x00u,0x00u + } +}; +COM_CONST IpduHEAT_4C1_bufType RxIpduHEAT_4C1DefualtValue= +{ + { + 0x00u,0x00u,0x00u,0x00u,0x00u,0x00u,0x00u,0x00u,0x00u,0x00u + } +}; +COM_CONST IpduADS_29C_bufType RxIpduADS_29CDefualtValue= +{ + { + 0x00u,0x00u,0x00u,0x00u,0x00u,0x00u,0x00u,0x00u,0x00u,0x00u + } +}; +#ifdef COM_ENABLE_RX_TIMEOUTVAULE +COM_CONST IpduMPC_316_bufType RxIpduMPC_316TimeoutValue= +{ + { + 0x00u,0x00u,0x00u,0x00u,0x00u,0x00u,0x00u,0x00u,0x00u,0x00u,0x00u,0x00u,0x00u + } +}; +COM_CONST IpduMETER_055_bufType RxIpduMETER_055TimeoutValue= +{ + { + 0x00u,0x00u,0x00u,0x00u,0x00u,0x00u,0x00u,0x00u,0x00u, + } +}; +COM_CONST IpduBCM_1_12D_bufType RxIpduBCM_1_12DTimeoutValue= +{ + { + 0x00u,0x00u,0x00u,0x00u,0x00u,0x00u,0x00u,0x00u,0x00u,0x00u + } +}; +COM_CONST IpduBCM_2_50D_bufType RxIpduBCM_2_50DTimeoutValue= +{ + { + 0x00u,0x00u,0x00u,0x00u,0x00u,0x00u,0x00u,0x00u,0x00u + } +}; +COM_CONST IpduMOD_4G_49A_bufType RxIpduMOD_4G_49ATimeoutValue= +{ + { + 0x00u,0x00u,0x00u,0x00u,0x00u,0x00u,0x00u,0x00u,0x00u,0x00u,0x00u,0x00u + } +}; +COM_CONST IpduMultimedia_385_bufType RxIpduMultimedia_385TimeoutValue= +{ + { + 0x00u,0x00u,0x00u,0x00u,0x00u,0x00u,0x00u,0x00u,0x00u,0x00u, + } +}; +COM_CONST IpduCloud_services_0A2_bufType RxIpdCloud_services_0A2TimeoutValue= +{ + { + 0x00u,0x00u,0x00u,0x00u,0x00u,0x00u,0x00u,0x00u,0x00u, + } +}; +COM_CONST IpduBCM_EvP2_394_bufType RxIpduBCM_EvP2_394TimeoutValue= +{ + { + 0x00u,0x00u,0x00u,0x00u,0x00u,0x00u,0x00u,0x00u,0x00u, + } +}; +COM_CONST IpduAir_condition_ctrl_2DB_bufType RxIpduAir_condition_ctrl_2DBTimeoutValue= +{ + { + 0x00u,0x00u,0x00u,0x00u,0x00u,0x00u,0x00u,0x00u,0x00u,0x00u + } +}; +COM_CONST IpduVCU_40D_bufType RxIpduVCU_40DTimeoutValue= +{ + { + 0x00u,0x00u,0x00u,0x00u,0x00u,0x00u,0x00u,0x00u + } +}; +COM_CONST IpduBCM_L_407_bufType RxIpduBCM_L_407TimeoutValue= +{ + { + 0x00u,0x00u,0x00u,0x00u,0x00u,0x00u,0x00u,0x00u + } +}; +COM_CONST IpduMETER_1_dir_4BF_bufType RxIpduMETER_1_dir_4BFTimeoutValue= +{ + { + 0x00u,0x00u,0x00u,0x00u,0x00u,0x00u,0x00u,0x00u + } +}; +COM_CONST IpduBCM_R_4E6_bufType RxIpduBCM_R_4E6TimeoutValue= +{ + { + 0x00u,0x00u,0x00u,0x00u,0x00u,0x00u,0x00u,0x00u + } +}; +COM_CONST IpduHEAT_4C1_bufType RxIpduHEAT_4C1TimeoutValue= +{ + { + 0x00u,0x00u,0x00u,0x00u,0x00u,0x00u,0x00u,0x00u,0x00u,0x00u + } +}; +COM_CONST IpduADS_29C_bufType RxIpduADS_29CTimeoutValue= +{ + { + 0x00u,0x00u,0x00u,0x00u,0x00u,0x00u,0x00u,0x00u,0x00u,0x00u + } +}; +#endif +COM_CONST PduInfoType COM_RxDataInitInfo[COM_RXIPDUNUM] = +{ + {RxIpduMPC_316._c,8u}, + {RxIpduMETER_055._c,8u}, + {RxIpduBCM_1_12D._c,8u}, + {RxIpduBCM_2_50D._c,8u}, + {RxIpduMOD_4G_49A._c,8u}, + {RxIpduMultimedia_385._c,8u}, + {RxIpdCloud_services_0A2._c,8u}, + {RxIpduBCM_EvP2_394._c,8u}, + {RxIpduAir_condition_ctrl_2DB._c,8u}, + {RxIpduVCU_40D._c,8u}, + {RxIpduBCM_L_407._c,8u}, + {RxIpduMETER_1_dir_4BF._c,8u}, + {RxIpduBCM_R_4E6._c,8u}, + {RxIpduHEAT_4C1._c,8u}, + {RxIpduADS_29C._c,8u} +}; + +COM_CONST COM_UINT8* COM_RxIpduDefaultValue[COM_RXIPDUNUM] = +{ + RxIpduMPC_316DefualtValue._c, + RxIpduMETER_055DefualtValue._c, + RxIpduBCM_1_12DDefualtValue._c, + RxIpduBCM_2_50DDefualtValue._c, + RxIpduMOD_4G_49ADefualtValue._c, + RxIpduMultimedia_385DefualtValue._c, + RxIpdCloud_services_0A2DefualtValue._c, + RxIpduBCM_EvP2_394DefualtValue._c, + RxIpduAir_condition_ctrl_2DBDefualtValue._c, + RxIpduVCU_40DDefualtValue._c, + RxIpduBCM_L_407DefualtValue._c, + RxIpduMETER_1_dir_4BFDefualtValue._c, + RxIpduBCM_R_4E6DefualtValue._c, + RxIpduHEAT_4C1DefualtValue._c, + RxIpduADS_29CDefualtValue._c +}; + +#ifdef COM_ENABLE_RX_TIMEOUTVAULE +COM_CONST COM_UINT8* COM_IpduRxTimeoutValue[COM_RXIPDUNUM] = +{ + RxIpduMPC_316TimeoutValue._c, + RxIpduMETER_055TimeoutValue._c, + RxIpduBCM_1_12DTimeoutValue._c, + RxIpduBCM_2_50DTimeoutValue._c, + RxIpduMOD_4G_49ATimeoutValue._c, + RxIpduMultimedia_385TimeoutValue._c, + RxIpdCloud_services_0A2TimeoutValue._c, + RxIpduBCM_EvP2_394TimeoutValue._c, + RxIpduAir_condition_ctrl_2DBTimeoutValue._c, + RxIpduVCU_40DTimeoutValue._c, + RxIpduBCM_L_407TimeoutValue._c, + RxIpduMETER_1_dir_4BFTimeoutValue._c, + RxIpduBCM_R_4E6TimeoutValue._c, + RxIpduHEAT_4C1TimeoutValue._c, + RxIpduADS_29CTimeoutValue._c +}; +#endif + +COM_CONST ComTpBufferSize COM_TpRxIpduBufferSize[COM_RXIPDUNUM]= +{ + COM_RXIPDUMPC_316_BUFFER_SIZE, + COM_RXIPDUMETER_055_BUFFER_SIZE, + COM_RXIPDUBCM_1_12D_BUFFER_SIZE, + COM_RXIPDUBCM_2_50D_BUFFER_SIZE, + COM_RXIPDUMOD_4G_49A_BUFFER_SIZE, + COM_RXIPDUMULTIMEDIA_385_BUFFER_SIZE, + COM_RXIPDUCLOUD_SERVICES_0A2_BUFFER_SIZE, + COM_RXIPDUBCM_EVP2_394_BUFFER_SIZE, + COM_RXIPDUAIR_CONDITION_CTRL_2DB_BUFFER_SIZE, + COM_RXIPDUVCU_40D_BUFFER_SIZE, + COM_RXIPDUBCM_L_407_BUFFER_SIZE, + COM_RXIPDUMETER_1_DIR_4BF_BUFFER_SIZE, + COM_RXIPDUBCM_R_4E6_BUFFER_SIZE, + COM_RXIPDUHEAT_4C1_BUFFER_SIZE, + COM_RXIPDUADS_29C_BUFFER_SIZE +}; + +COM_CONST COM_UINT8 COM_RxIpduSigNum[COM_RXIPDUNUM] = +{ + 3, + 1, + 3, + 1, + 5, + 1, + 2, + 1, + 1, + 1, + 1, + 2, + 1, + 3, + 3, +}; + +COM_CONST COM_RxSigStruct COM_RxSigTable[COM_RXSIGNUM] = +{ + {0,0u}, + {0,0u}, + {0,0u}, + + {1,0u}, + + {2,0u}, + {2,0u}, + {2,0u}, + + {3,0u}, + + {4,0u}, + {4,0u}, + {4,0u}, + {4,0u}, + {4,0u}, + + {5,0u}, + + {6,0u}, + {6,0u}, + + {7,0u}, + + {8,0u}, + + {9,0u}, + + {10,0u}, + + {11,0u}, + {11,0u}, + + {12,0u}, + + {13,0u}, + {13,0u}, + {13,0u}, + + {14,0u}, + {14,0u}, + {14,0u}, + +}; + +COM_CONST COM_UINT16 COM_RxIpduOffsetInRxSigTable[COM_RXIPDUNUM] = +{ + 0, + 3, + 4, + 7, + 8, + 13, + 14, + 16, + 17, + 18, + 19, + 20, + 22, + 23, + 26, +}; + +COM_CONST COM_IpduRxTimeOut_Struct COM_IpduRxTOTimerTable[COM_RXIPDUNUM] = +{ + {0,COM_RXTIMEOUTMONITOR_YES,5000u}, + {1,COM_RXTIMEOUTMONITOR_YES,5000u}, + {2,COM_RXTIMEOUTMONITOR_YES,5000u}, + {3,COM_RXTIMEOUTMONITOR_YES,500u}, + {4,COM_RXTIMEOUTMONITOR_YES,5000u}, + {5,COM_RXTIMEOUTMONITOR_YES,500u}, + {6,COM_RXTIMEOUTMONITOR_YES,500u}, + {7,COM_RXTIMEOUTMONITOR_YES,5000u}, + {8,COM_RXTIMEOUTMONITOR_YES,5000u}, + {9,COM_RXTIMEOUTMONITOR_YES,5000u}, + {10,COM_RXTIMEOUTMONITOR_YES,5000u}, + {11,COM_RXTIMEOUTMONITOR_YES,5000u}, + {12,COM_RXTIMEOUTMONITOR_YES,5000u}, + {13,COM_RXTIMEOUTMONITOR_YES,5000u}, + {14,COM_RXTIMEOUTMONITOR_YES,5000u} +}; + + +#ifdef COM_ENABLE_RX_INDICATIONFUN +COM_CONST COM_RxIndicationFun COM_IpduRxIndicationFunPtr[COM_RXIPDUNUM] = +{ + AppIpduMPC_316_Ind, + AppIpduMETER_055_Ind, + AppIpduBCM_1_12D_Ind, + AppIpduBCM_2_50D_Ind, + AppIpduMOD_4G_49A_Ind, + AppIpduMultimedia_385_Ind, + AppIpduCloud_services_0A2_Ind, + AppIpduBCM_EvP2_394_Ind, + AppIpduAir_condition_ctrl_2DB_Ind, + AppIpduVCU_40D_Ind, + AppIpduBCM_L_407_Ind, + AppIpduMETER_1_dir_4BF_Ind, + AppIpduBCM_R_4E6_Ind, + AppIpduHEAT_4C1_Ind, + AppIpduAds_29C_Ind +}; +#endif + +#ifdef COM_ENABLE_RX_TIMEOUTINDICATIONFUN +COM_CONST COM_TimeoutIndicationFun COM_IpduRxTimeoutFunPtr[COM_RXIPDUNUM] = +{ + AppIpduMPC_316_TimeOutInd, + AppIpduMETER_055_TimeOutInd, + AppIpduBCM_1_12D_TimeOutInd, + AppIpduBCM_2_50D_TimeOutInd, + AppIpduMOD_4G_49A_TimeOutInd, + AppIpduMultimedia_385_TimeOutInd, + AppIpduCloud_services_0A2_TimeOutInd, + AppIpduBCM_EvP2_394_TimeOutInd, + AppIpduAir_condition_ctrl_2DB_TimeOutInd, + AppIpduVCU_40D_TimeOutInd, + AppIpduBCM_L_407_TimeOutInd, + AppIpduMETER_1_dir_4BF_TimeOutInd, + AppIpduBCM_R_4E6_TimeOutInd, + AppIpduHEAT_4C1_TimeOutInd, + AppIpduADS_29C_TimeOutInd +}; +#endif + + +#endif /*#if(COM_RXIPDUNUM>=1)*/ + +#ifdef COM_ENABLE_ROUTESIGNAL +#if((COM_TXIPDUNUM>=1) && (COM_RXIPDUNUM>=1) && (COM_GWIPDUNUM>=1) && (COM_GWSIGNUM>=1)) +COM_CONST COM_SignalGatewayInfoType COM_SignalGatewayInfo[COM_GWSIGNUM]= +{ +}; + +COM_CONST COM_SignalGatewayIpduInfoType COM_SignalGatewayIpduInfo[COM_GWIPDUNUM]= +{ +}; +#endif/*#if((COM_TXIPDUNUM>=1) && (COM_RXIPDUNUM>=1) && (COM_GWIPDUNUM>=1) && (COM_GWSIGNUM>=1))*/ +#endif/*#ifdef COM_ENABLE_ROUTESIGNAL6*/ + +#if(COM_IPDUGROUPNUM>=1) +COM_CONST COM_GroupIpduInfoType COM_GroupIpduInfo[]= +{ + {0,COM_DIRECTION_TX}, + {1,COM_DIRECTION_TX}, + {2,COM_DIRECTION_TX}, + + {0,COM_DIRECTION_RX}, + {1,COM_DIRECTION_RX}, + {2,COM_DIRECTION_RX}, + {3,COM_DIRECTION_RX}, + {4,COM_DIRECTION_RX}, + {5,COM_DIRECTION_RX}, + {6,COM_DIRECTION_RX}, + {7,COM_DIRECTION_RX}, + {8,COM_DIRECTION_RX}, + {9,COM_DIRECTION_RX}, + {10,COM_DIRECTION_RX}, + {11,COM_DIRECTION_RX}, + {12,COM_DIRECTION_RX}, + {13,COM_DIRECTION_RX}, + {14,COM_DIRECTION_RX}, +}; +COM_CONST COM_IpduGroupInfoType COM_IpduGroupInfo[COM_IPDUGROUPNUM]= //��ǰ�� COM_GroupIpduInfo �Ŀ��Y��������ʼ +{ + {0,3}, + {3,15} +}; +#endif + + + + + + diff --git a/code_app_out/Source/ComStack/Can_Gen/Com/Com_Cfg.h b/code_app_out/Source/ComStack/Can_Gen/Com/Com_Cfg.h new file mode 100644 index 0000000..382df35 --- /dev/null +++ b/code_app_out/Source/ComStack/Can_Gen/Com/Com_Cfg.h @@ -0,0 +1,1018 @@ +/** + ****************************************************************************** + * @file + * @author + * @version + * @date + * @brief + * @function List: + ****************************************************************************** + * @attention + * + * + *

© COPYRIGHT 2021

+ ****************************************************************************** + * @History: + * @Author: + * @Data: + * @Version: +*/ + +#ifndef _COM_CFG_H_ +#define _COM_CFG_H_ + +/******************************************************************************* +* Includes +*******************************************************************************/ +#include "Com_Types.h" +/*adding underlying layer's head files here if necessary*/ +#include "CanIf.h" +/******************************************************************************* +* Macro define +*******************************************************************************/ +#define COM_ENABLE_RETRANSMIT //重發機制 +//#define COM_ENABLE_ACTIVEPORPERTY --D50開啟了該宏 +#define COM_ENABLE_TX_CONFIRMATIONFUN //發送成功後的回調函數 +#define COM_ENABLE_TX_CONFIRMATIONFLAG //發送成功後以標志的形式通知應用程序 +#define COM_ENABLE_TX_TO_INDFUN //發送超時的回調 +#define COM_ENABLE_TX_TO_INDFLAG //發送超時後，以標志形式 通知應用程序 +#define COM_ENABLE_RX_INDICATIONFUN //接收數據後，如果需要使用回調函數通知應用程序 +#define COM_ENABLE_RX_INDICATIONFLAG //接收數據後，如果需要使用標志的形式通知應用程序； +#define COM_ENABLE_RX_TIMEOUTINDICATIONFUN //接數超時，回調 +#define COM_ENABLE_RX_TIMEOUTINDICATIONFLAG //接收超時，以標志形式 +#define COM_ENABLE_RX_TIMEOUTVAULE //理解為 超時時 記變量 +#define COM_TXMAIN_FUNCTION_PERIOD 5u //該值表示，can的周期性任務是5ms， 如果改了，也要相應的更改 +#define COM_RXMAIN_FUNCTION_PERIOD 5u //該值表示，can的周期性任務是5ms， 如果改了，也要相應的更改 +#define COM_SIGNALROUTINEMAIN_FUNCTION_PERIOD 5u //該值表示，can的周期性任務是5ms， 如果改了，也要相應的更改 +/******************************************************************************/ +/* Handles of send messages */ +/******************************************************************************/ +#define COM_TXIPDUSTEERING_RIGHT_SWITCH_4A8 0u +#define COM_TXIPDUSTEERING_LEFT_SWITCH_3B0 1u +#define COM_TXIPDUSTEERING_CUSTOMIZATION_SWITCH_429 2u + + +/******************************************************************************/ +/* number of Tx object */ +/******************************************************************************/ +#define COM_TXIPDUNUM 3u + +/******************************************************************************/ +/* Handles of send signals 以下是信號的排序 */ +/******************************************************************************/ +#define COM_TX_SIGSWS_R_SID 0u //ID +#define COM_TX_SIGSWS_R_MULTIMEDIA 1u //多媒体相关按键 +#define COM_TX_SIGSWS_R_METER_MENU 2u //仪表菜单 +#define COM_TX_SIGSWS_R_VOICD_EXPAND 3u //新增的扩展-- +#define COM_TX_SIGSWS_R_VOICD_EXPAND_2 4u //新增的扩展2-- +#define COM_TX_SIGSWS_R_LEFT_MENU 5u //左菜单 +#define COM_TX_SIGSWS_R_PADDLE_SHIFT 6u //换挡拨片 +#define COM_TX_SIGSWS_R_CRUISE 7u //定速巡航 +#define COM_TX_SIGSWS_R_AUTO_SHOW_IN 8u //展车模式 +#define COM_TX_SIGSWS_R_AUTO_SHOW_OUT 9u //展车模式 +#define COM_TX_SIGSWS_R_MILEAGE_CLEAR 10u //里程清0 +#define COM_TX_SIGSWS_R_MEDIA_RESET 11u //多媒体重启 +#define COM_TX_SIGSWS_R_OTHER_RECOVER 12u //多媒体重启 +#define COM_TX_SIGSWS_R_CHECKSUM 13u //校验码 + +#define COM_TX_SIGSWS_L_DIS_SET 14u //距离设置 +#define COM_TX_SIGSWS_L_SPD_SET 15u //速度设置 +#define COM_TX_SIGSWS_L_CANCEL_DIPILOT 16u //取消开关的信号 +#define COM_TX_SIGSWS_L_CRUISE_SPD_LIMIT 17u //巡航或限速 +#define COM_TX_SIGSWS_L_RESET 18u //复位信号 +#define COM_TX_SIGSWS_L_CRUISE_FAULT 19u //巡航开关故障状态标志 +#define COM_TX_SIGSWS_L_SET 20u // +#define COM_TX_SIGSWS_L_DSP_SUB 21u //时距- +#define COM_TX_SIGSWS_L_DSP_PLUS 22u //时距+ +#define COM_TX_SIGSWS_L_LANE_LINE_ASSIST 23u //车道线辅助(车道偏离) +#define COM_TX_SIGSWS_L_CRUISE_SET 24u // +#define COM_TX_SIGSWS_L_ACC 25u // +#define COM_TX_SIGSWS_L_LEFT_PICK 26u //左拨片 +#define COM_TX_SIGSWS_L_RIGHT_PICK 27u //右拨片 +#define COM_TX_SIGSWS_L_ROLLING_COUNT 28u // +#define COM_TX_SIGSWS_L_CHECKSUM 29u // + +#define COM_TX_SIGSWS_C_VIBRATION_CFG 30u +#define COM_TX_SIGSWS_C_VIBRATION_STATE 21u +#define COM_TX_SIGSWS_C_HEAT_CFG 32u +#define COM_TX_SIGSWS_C_SWH_STATE 33u +#define COM_TX_SIGSWS_C_SWS_CFG 34u +#define COM_TX_SIGSWS_C_AUTO_HEAT 35u +#define COM_TX_SIGSWS_C_HEAT_GEAR 36u +#define COM_TX_SIGSWS_C_HEAT_GEAR_CFG 37u +/******************************************************************************/ +/* number of Tx object Signal */ +/******************************************************************************/ +#define COM_TXSIGNUM 38 + + + + +/******************************************************************************/ +/* Send Signal structures */ +/******************************************************************************/ +typedef struct +{ + COM_UINT8 SWS_R_SID : 8; + + COM_UINT8 SWS_R_Multimedia : 8; + + COM_UINT8 SWS_R_Meter_menu : 3; + COM_UINT8 Unused0 : 1; + COM_UINT8 SWS_R_voicd_expand : 2; + COM_UINT8 SWS_R_voicd_expand_2 : 2; + + COM_UINT8 Unused1 : 4; + COM_UINT8 SWS_R_LEFT_Menu : 2; + COM_UINT8 Unused2 : 2; + + COM_UINT8 SWS_R_paddle_shift : 2; + COM_UINT8 Unused3 : 2; + COM_UINT8 SWS_R_cruise : 4; + + COM_UINT8 Unused4 : 2; + COM_UINT8 SWS_R_auto_show_in : 1; + COM_UINT8 SWS_R_auto_show_out : 1; + COM_UINT8 Unused5 : 1; + COM_UINT8 SWS_R_mileage_clear : 1; + COM_UINT8 Unused6 : 2; + + COM_UINT8 SWS_R_Media_Reset : 1; + COM_UINT8 SWS_R_Other_Recover : 3; + COM_UINT8 Unused7 : 4; + COM_UINT8 SWS_R_checksum : 8; + +}IpduSteering_RIGHT_switch_4A8_Type; + +typedef struct +{ + COM_UINT8 SWS_L_Dis_set : 3; + COM_UINT8 SWS_L_Spd_set : 3; + COM_UINT8 SWS_L_Cancel_dipilot : 2; + + COM_UINT8 SWS_L_Cruise_spd_limit : 2; + COM_UINT8 SWS_L_reset : 2; + COM_UINT8 SWS_L_Cruise_fault : 2; + COM_UINT8 SWS_L_set : 1; + COM_UINT8 SWS_L_Dsp_sub : 1; //8 + + COM_UINT8 SWS_L_Dsp_plus : 1; + COM_UINT8 SWS_L_Lane_line_assist : 1; + COM_UINT8 SWS_L_cruise_set : 1; + COM_UINT8 SWS_L_acc : 1; + COM_UINT8 Unused0 : 4; //8 + + COM_UINT8 Unused1 : 8; //8 + + COM_UINT8 Unused2 : 3 ; //8 + COM_UINT8 SWS_L_Left_pick : 2; + COM_UINT8 SWS_L_Right_pick : 2; + COM_UINT8 Unused3 : 1 ; + + COM_UINT8 Unused4 : 8 ; //8 + + COM_UINT8 Unused5 : 4; + COM_UINT8 SWS_L_rolling_count : 4; //8 + + COM_UINT8 SWS_L_checksum : 8; //8 + +}IpduSteering_LEFT_switch_3B0_Type; + + +typedef struct //Steering_customization_switch +{ + + + COM_UINT8 SWS_C_vibration_cfg : 2; + COM_UINT8 SWS_C_vibration_state : 2 ; + COM_UINT8 SWS_C_Heat_cfg : 2; + COM_UINT8 SWS_C_swh_state : 2; //8 + + COM_UINT8 SWS_C_sws_cfg : 6; + COM_UINT8 SWS_C_auto_heat : 2; //8 + + COM_UINT8 Unused0 : 1; //1 + COM_UINT8 SWS_C_heat_gear : 4; //4 + COM_UINT8 Unused1 : 3; //3 + + COM_UINT8 Unused2 : 8; //8 + COM_UINT8 Unused3 : 8; //8 + COM_UINT8 Unused4 : 8; //8 + COM_UINT8 SWS_C_heat_gear_cfg : 3; //8 + COM_UINT8 Unused5 : 5; //8 + COM_UINT8 Unused6 : 8; //8 + + +}IpduSteering_customization_switch_429_Type; +//#pragma pack() + +/********************************************************************************/ +/* Send Message unions */ +/********************************************************************************/ +typedef union { + IpduSteering_RIGHT_switch_4A8_Type IpduSteering_RIGHT_switch_4A8; + COM_UINT8 _c[8]; +}IpduSteering_RIGHT_switch_4A8_bufType; + +typedef union { +IpduSteering_LEFT_switch_3B0_Type IpduSteering_LEFT_switch_3B0; + COM_UINT8 _c[8]; +}IpduSteering_LEFT_switch_3B0_bufType; + +typedef union { +IpduSteering_customization_switch_429_Type IpduSteering_customization_switch_429; + COM_UINT8 _c[8]; +}IpduSteering_customization_switch_429_bufType; + + +/******************************************************************************/ +/* Databuffer for sended objects */ +/******************************************************************************/ +extern IpduSteering_RIGHT_switch_4A8_bufType TxIpduSteering_RIGHT_switch_4A8; //在數組 COM_TxDataInitInfo 裡面 +extern IpduSteering_LEFT_switch_3B0_bufType TxIpduSteering_LEFT_switch_3B0; //在數組 COM_TxDataInitInfo 裡面 +extern IpduSteering_customization_switch_429_bufType TxIpduSteering_customization_switch_429; //在數組 COM_TxDataInitInfo 裡面 + + +/******************************************************************************/ +/* Databuffer for Sended Message default Value */ +/******************************************************************************/ +extern COM_CONST IpduSteering_RIGHT_switch_4A8_bufType TxIpduSteering_RIGHT_switch_4A8DefualtValue; //在數組 COM_TxIpduDefaultValue 裡面 +extern COM_CONST IpduSteering_LEFT_switch_3B0_bufType TxIpduSteering_LEFT_switch_3B0DefualtValue; //在數組 COM_TxIpduDefaultValue 裡面 +extern COM_CONST IpduSteering_customization_switch_429_bufType TxIpduSteering_customization_switch_429DefualtValue; //在數組 COM_TxIpduDefaultValue 裡面 + + +#if (COM_TXIPDUNUM>=1) +/******************************************************************************/ +/*used for application:message tx timeout indication flag */ +/******************************************************************************/ +#ifdef COM_ENABLE_TX_TO_INDFLAG +extern COM_UINT8 Com_TxIpduTimeOutFlag[COM_TXIPDUNUM]; //超时标志 +#define COM_TXIPDUDMS_MODE_TO_FLAG Com_TxIpduTimeOutFlag[0] //为何没见调用 +#endif +/******************************************************************************/ +/* used for application:message tx timeout indication Function */ +/******************************************************************************/ +#ifdef COM_ENABLE_TX_TO_INDFUN +extern void AppIpduSteering_RIGHT_switch_4A8_TxTOIndication(void); +extern void AppIpduSteering_LEFT_switch_3B0_TxTOIndication(void); //超时回调函数 +extern void AppIpduSteering_customization_switch_429_TxTOIndication(void); +#endif + +/******************************************************************************/ +/* tx confirmation flag definition */ +/******************************************************************************/ +#ifdef COM_ENABLE_TX_CONFIRMATIONFLAG +extern COM_UINT8 Com_TxIdpuConfFlag[COM_TXIPDUNUM]; +#define COM_TXIPDUDMS_MODE_CONF_FLAG Com_TxIdpuConfFlag[0] //为何没见调用 +#endif + +/******************************************************************************/ +/* tx confirmation function definition */ +/******************************************************************************/ +#ifdef COM_ENABLE_TX_CONFIRMATIONFUN +extern void AppIpduSteering_RIGHT_switch_4A8_Conf(void); +extern void AppIpduSteering_LEFT_switch_3B0_Conf(void); //放在 COM_IpduTxConfirmFunPtr 數組下;真正的確認發送 +extern void AppIpduSteering_customization_switch_429_Conf(void); +#endif + + +#endif /*#if (COM_TXIPDUNUM>=1)*/ + + +/******************************************************************************/ +/* number of Rx object Ipdu */ +/******************************************************************************/ +#define COM_RXIPDUNUM 15u //除诊断外 要接收6个不同的canid的msg +/******************************************************************************/ +/* Handles of receive messages 接收msg的排序 */ +/******************************************************************************/ +#define COM_RXIPDUMPC_316 0u // +#define COM_RXIPDUMETER_055 1u // +#define COM_RXIPDUBCM_1_12D 2u // +#define COM_RXIPDUBCM_2_50D 3u // +#define COM_RXIPDUMOD_4G_49A 4u // +#define COM_RXIPDUMULTIMEDIA_385 5u // +#define COM_RXIPDUCLOUD_SERVICES_0A2 6u // +#define COM_RXIPDUBCM_EVP2_394 7u // +#define COM_RXIPDUAIR_CONDITION_CTRL_2DB 8u // +#define COM_RXIPDUVCU_40D 9u // +#define COM_RXIPDUBCM_L_407 10u // +#define COM_RXIPDUMETER_1_DIR_4BF 11u// +#define COM_RXIPDUBCM_R_4E6 12u // +#define COM_RXIPDUHEAT_4C1 13u +#define COM_RXIPDUADS_29C 14u +/******************************************************************************/ +/*the buffer size of Message received */ +/******************************************************************************/ +#define COM_RXIPDUMPC_316_BUFFER_SIZE 8u +#define COM_RXIPDUMETER_055_BUFFER_SIZE 8u +#define COM_RXIPDUBCM_1_12D_BUFFER_SIZE 8u +#define COM_RXIPDUBCM_2_50D_BUFFER_SIZE 8u +#define COM_RXIPDUMOD_4G_49A_BUFFER_SIZE 8u +#define COM_RXIPDUMULTIMEDIA_385_BUFFER_SIZE 8u +#define COM_RXIPDUCLOUD_SERVICES_0A2_BUFFER_SIZE 8u +#define COM_RXIPDUBCM_EVP2_394_BUFFER_SIZE 8u +#define COM_RXIPDUAIR_CONDITION_CTRL_2DB_BUFFER_SIZE 8u +#define COM_RXIPDUVCU_40D_BUFFER_SIZE 8u +#define COM_RXIPDUBCM_L_407_BUFFER_SIZE 8u +#define COM_RXIPDUMETER_1_DIR_4BF_BUFFER_SIZE 8u +#define COM_RXIPDUBCM_R_4E6_BUFFER_SIZE 8u +#define COM_RXIPDUHEAT_4C1_BUFFER_SIZE 8u +#define COM_RXIPDUADS_29C_BUFFER_SIZE 8u +/******************************************************************************/ +/* Handles of receive signals */ +/******************************************************************************/ +#define COM_RXSIGMPC_L_LT_STATUS 0u +#define COM_RXSIGMPC_R_LT_STATUS 1u +#define COM_RXSIGMPC_LD_ALARM_MODE_STA 2u + + +#define COM_RXSIGMETER_BACKGROUNDLIGHTLVLCMD 3u + + +#define COM_RXSIGBCM1_POWER_GEAR 4u +#define COM_RXSIGBCM1_VEHICLE_STATE 5u +#define COM_RXSIGBCM1_VEHICLE_STATE1 6u + + +#define COM_RXSIGBCM2_NM_SLEEP_STATE 7u + + +#define COM_RXSIGMOD_4G_ECL_POWER_REQ 8u +#define COM_RXSIGMOD_4G_OTA_LIGHT_REQ 9u +#define COM_RXSIGMOD_4G_ENTER_OTA_MODE_REQ 10u +#define COM_RXSIGMOD_4G_OTA_UPDATE_REQ 11u +#define COM_RXSIGMOD_4G_CHECKSUM 12u + + +#define COM_RXSIGMULTIMEDIA_SW_HEAT 13u // + + + + +#define COM_RXSIGCLOUD_SERVICE_REMOTE_CMD 14u // +#define COM_RXSIGCLOUD_SERVICE_SW_HEAT 15u //15 + + +#define COM_RXSIGBCM_EVP2_VEHICLE_STATE 16u + + +#define COM_RXSIGAIR_CD_CTRL_TEMP_SHOW 17u + +#define COM_RXSIGVCU_ECM_VEHICLE_CODE_S 18u + + +#define COM_RXSIGBCM_L_NM_TYPE 19u + + +#define COM_RXSIGMETER1_BACKGROUNDLIGHTLVLCMD 20u + +#define COM_RXSIGMETER1_The_Limit_Acc 21u + +#define COM_RXSIGBCM_R_AIR_TEMP_SHOW 22u + + +#define COM_RXSIGHEAT_SUBID 23u +#define COM_RXSIGHEAT_AUTO_HEAT 24u +#define COM_RXSIGHEAT_HEAT_GEAR 25u + + +#define COM_RXSIGADS_ACC_MODE_DISPLAYL 26u +#define COM_RXSIGADS_DNP_STATS 27u +#define COM_RXSIGADS_DNP_TAKE_OVER_REQ_S 28u + + +/******************************************************************************/ +/* number of Rx object Signal */ +/******************************************************************************/ +#define COM_RXSIGNUM 29u + + +/******************************************************************************/ +/* Receive Signal structures */ +/******************************************************************************/ +typedef struct { + + COM_UINT8 Unused0 : 4; + COM_UINT8 MPC_L_lt_status : 2; + COM_UINT8 Unused1 : 2; //8 + + COM_UINT8 Unused2:8; //8 + + COM_UINT8 Unused3:8; //8 + COM_UINT8 Unused4:8; //8 + + COM_UINT8 Unused5 : 2; + COM_UINT8 MPC_R_lt_status : 2; + COM_UINT8 Unused6 : 4; //8 + + COM_UINT8 Unused7 : 8; //8 + + COM_UINT8 MPC_Ld_alarm_mode_sta : 2; + COM_UINT8 Unused8 : 6; //8 + + COM_UINT8 Unused9:8; //8 + + +}IpduMPC_316_Type; //MPC + +typedef struct +{ + COM_UINT8 Unused0 : 8; + COM_UINT8 Unused1 : 8; + + COM_UINT8 Unused2 : 8; + COM_UINT8 Unused3 : 8; + + COM_UINT8 Unused4 : 8; + COM_UINT8 Unused5 : 3; + COM_UINT8 METER_BackgroundLightLvlCmd : 5; + + COM_UINT8 Unused6 : 8; + COM_UINT8 Unused7 : 8; +}IpduMETER_055_Type; //meter + + +typedef struct { + + COM_UINT8 Unused0 : 8; //8 + COM_UINT8 Unused1 : 8; //8 + COM_UINT8 Unused2 : 8; //8 + + COM_UINT8 BCM1_vehicle_state : 4; + COM_UINT8 Unused3 : 4; //8 + + COM_UINT8 Unused4 : 2; + COM_UINT8 BCM1_power_gear : 3; + COM_UINT8 BCM1_vehicle_state1 : 3; //8 + COM_UINT8 Unused5 : 8; //8 + + COM_UINT8 Unused6 : 8; + COM_UINT8 Unused7 : 8; + + +}IpduBCM_1_12D_Type; //bcm1 + + +typedef struct { + + + COM_UINT8 Unused0 : 8; + COM_UINT8 Unused1 : 8; + COM_UINT8 Unused2 : 8; + COM_UINT8 Unused3 : 8; + + COM_UINT8 Unused4 : 4; + COM_UINT8 BCM2_nm_sleep_state : 4; + COM_UINT8 Unused5 : 8; //8 + + COM_UINT8 Unused6 : 8; + COM_UINT8 Unused7 : 8; + + +}IpduBCM_2_50D_Type; // bcm2 + + + +typedef struct { + COM_UINT8 MOD_4G_Ecl_power_req : 1; + COM_UINT8 MOD_4G_ota_light_req : 1; + COM_UINT8 Unused0 : 2; + COM_UINT8 MOD_4G_enter_ota_mode_req : 1; + COM_UINT8 MOD_4G_ota_update_req : 3; //8 + COM_UINT8 Unused1 : 8; //8 + + COM_UINT8 Unused2 : 8; + COM_UINT8 Unused3 : 8; + + COM_UINT8 Unused4 : 8; + COM_UINT8 Unused5 : 8; + + COM_UINT8 Unused6 : 8; + COM_UINT8 MOD_4G_checksum : 8; +}IpduMOD_4G_49A_Type; // 4g mod + + +typedef struct { + COM_UINT8 Unused0 : 8; + COM_UINT8 Unused1 : 8; //8 + + COM_UINT8 Unused2 : 8; + COM_UINT8 Unused3 : 8; + + COM_UINT8 Unused4 : 8; + + COM_UINT8 Unused5 : 5; + COM_UINT8 MULTIMEDIA_Sw_heat : 2; + COM_UINT8 Unused6 : 1; + + COM_UINT8 Unused7 : 8; + COM_UINT8 Unused8 : 8; + +}IpduMultimedia_385_Type; //multi + + +typedef struct { + COM_UINT8 Cloud_Service_remote_cmd : 8; + COM_UINT8 Unused0 : 8; + + + COM_UINT8 Unused1 : 8; + COM_UINT8 Unused2 : 8; + + COM_UINT8 Unused3 : 8; + COM_UINT8 Unused4 : 6; + COM_UINT8 Cloud_Service_Sw_heat : 2; + + COM_UINT8 Unused5 : 8; + COM_UINT8 Unused6 : 8; +}IpduCloud_services_0A2_Type; //cloud service + + +typedef struct { + + COM_UINT8 Unused0 : 8; + COM_UINT8 Unused1 : 8; + COM_UINT8 Unused2 : 8; + COM_UINT8 Unused3 : 8; + + COM_UINT8 Unused4 : 4; + COM_UINT8 BCM_EVP2_vehicle_state : 4; + COM_UINT8 Unused5 : 8; + + COM_UINT8 Unused6 : 8; + COM_UINT8 Unused7 : 8; + + +}IpduBCM_EvP2_394_Type; //bcm evp2 + +typedef struct { + + + COM_UINT8 Unused0 : 8; + COM_UINT8 Unused1 : 8; + COM_UINT8 Unused2 : 8; + + COM_UINT8 Unused3 : 3; + COM_UINT8 AIR_CD_ctrl_temp_show : 3; + COM_UINT8 Unused4 : 2; + + COM_UINT8 Unused5 : 8; + COM_UINT8 Unused6 : 8; + + COM_UINT8 Unused7 : 8; + COM_UINT8 Unused8 : 8; + + +}IpduAir_condition_ctrl_2DB_Type; //air condition ctrl + + +typedef struct { + + + COM_UINT8 Unused0 : 8; + COM_UINT8 VCU_ECM_Vehicle_code_s : 8; + COM_UINT8 Unused1 : 8; + COM_UINT8 Unused2 : 8; + + COM_UINT8 Unused3 : 8; + COM_UINT8 Unused4 : 8; + + COM_UINT8 Unused5 : 8; + COM_UINT8 Unused6 : 8; + + +}IpduVCU_40D_Type; //CAN_RX_ID_VCU + + +typedef struct { + + COM_UINT8 Unused0 : 8; + COM_UINT8 Unused1 : 8; + COM_UINT8 Unused2 : 8; + COM_UINT8 Unused3 : 8; + + COM_UINT8 Unused4 : 8; + + COM_UINT8 BCM_L_nm_type : 1; + COM_UINT8 Unused5 : 7; + + COM_UINT8 Unused6 : 8; + COM_UINT8 Unused7 : 8; + +}IpduBCM_L_407_Type; //CAN_RX_ID_BCM_L + + +typedef struct +{ + COM_UINT8 Unused0:8; + COM_UINT8 Unused1:8; + + COM_UINT8 Unused2 :8; + COM_UINT8 Unused3 :8; + + COM_UINT8 Unused4:8; + COM_UINT8 Unused5 : 8; + + COM_UINT8 METER1_BackgroundLightLvlCmd : 5; + COM_UINT8 Unused6:3; + COM_UINT8 Unused7:2; + COM_UINT8 The_Limit_Acc:2; + COM_UINT8 Unused8:4; + +}IpduMETER_1_dir_4BF_Type; //meter_1_dir + + +typedef struct { + + COM_UINT8 Unused0 : 8; + COM_UINT8 Unused1 : 8; + COM_UINT8 Unused2 : 8; + + COM_UINT8 Unused3 : 3; + COM_UINT8 BCM_R_air_temp_show : 3; + COM_UINT8 Unused4 : 2; + + COM_UINT8 Unused5 : 8; + COM_UINT8 Unused6 : 8; + + COM_UINT8 Unused7 : 8; + COM_UINT8 Unused8 : 8; + +}IpduBCM_R_4E6_Type; //bcm r + +typedef struct { + + + COM_UINT8 HEAT_subid : 8; + + COM_UINT8 HEAT_auto_heat : 2; + COM_UINT8 HEAT_heat_gear : 4; + COM_UINT8 Unused0 : 2; + + COM_UINT8 Unused1 : 8; + COM_UINT8 Unused2 : 8; + + COM_UINT8 Unused3 : 8; + COM_UINT8 Unused4 : 8; + + COM_UINT8 Unused5 : 8; + COM_UINT8 Unused6 : 8; + + +}IpduHEAT_4C1_Type; //heat + +typedef struct { + COM_UINT8 Unused0 : 4; + COM_UINT8 ADS_ACC_Mode_Displayl : 4; + + COM_UINT8 Unused1 : 8; + COM_UINT8 Unused2 : 8; + COM_UINT8 ADS_DNP_Stats : 4; + + COM_UINT8 Unused3 : 4; + COM_UINT8 Unused4 : 8; + + COM_UINT8 ADS_DNP_Take_Over_Req_S : 3; + COM_UINT8 Unused5 : 5; + + COM_UINT8 Unused6 : 8; + COM_UINT8 Unused7 : 8; + +}IpduADS_29C_Type; //heat + +/********************************************************************************/ +/* Receive Message unions */ +/********************************************************************************/ +typedef union { +IpduMPC_316_Type IpduMPC_316; + COM_UINT8 _c[8]; +}IpduMPC_316_bufType; +typedef union { +IpduMETER_055_Type IpduMETER_055; + COM_UINT8 _c[8]; +}IpduMETER_055_bufType; +typedef union { +IpduBCM_1_12D_Type IpduBCM_1_12D; + COM_UINT8 _c[8]; +}IpduBCM_1_12D_bufType; +typedef union { +IpduBCM_2_50D_Type IpduBCM_2_50D; + COM_UINT8 _c[8]; +}IpduBCM_2_50D_bufType; +typedef union { +IpduMOD_4G_49A_Type IpduMOD_4G_49A; + COM_UINT8 _c[8]; +}IpduMOD_4G_49A_bufType; +typedef union { +IpduMultimedia_385_Type IpduMultimedia_385; + COM_UINT8 _c[8]; +}IpduMultimedia_385_bufType; +typedef union { +IpduCloud_services_0A2_Type IpduCloud_services_0A2; + COM_UINT8 _c[8]; +}IpduCloud_services_0A2_bufType; +typedef union { +IpduBCM_EvP2_394_Type IpduBCM_EvP2_394; + COM_UINT8 _c[8]; +}IpduBCM_EvP2_394_bufType; +typedef union { +IpduAir_condition_ctrl_2DB_Type IpduAir_condition_ctrl_2DB; + COM_UINT8 _c[8]; +}IpduAir_condition_ctrl_2DB_bufType; +typedef union { +IpduVCU_40D_Type IpduVCU_40D; + COM_UINT8 _c[8]; +}IpduVCU_40D_bufType; +typedef union { +IpduBCM_L_407_Type IpduBCM_L_407; + COM_UINT8 _c[8]; +}IpduBCM_L_407_bufType; +typedef union { +IpduMETER_1_dir_4BF_Type IpduMETER_1_dir_4BF; + COM_UINT8 _c[8]; +}IpduMETER_1_dir_4BF_bufType; +typedef union { +IpduBCM_R_4E6_Type IpduBCM_R_4E6; + COM_UINT8 _c[8]; +}IpduBCM_R_4E6_bufType; +typedef union { +IpduHEAT_4C1_Type IpduHEAT_4C1; + COM_UINT8 _c[8]; +}IpduHEAT_4C1_bufType; +typedef union { +IpduADS_29C_Type IpduADS_29C; + COM_UINT8 _c[8]; +}IpduADS_29C_bufType; +/******************************************************************************/ +/* Databuffer for receive objects */ +/******************************************************************************/ +extern IpduMPC_316_bufType RxIpduMPC_316; +extern IpduMETER_055_bufType RxIpduMETER_055; //在數組 COM_RxDataInitInfo 裡面 +extern IpduBCM_1_12D_bufType RxIpduBCM_1_12D; +extern IpduBCM_2_50D_bufType RxIpduBCM_2_50D; +extern IpduMOD_4G_49A_bufType RxIpduMOD_4G_49A; +extern IpduMultimedia_385_bufType RxIpduMultimedia_385; +extern IpduCloud_services_0A2_bufType RxIpdCloud_services_0A2; +extern IpduBCM_EvP2_394_bufType RxIpduBCM_EvP2_394; +extern IpduAir_condition_ctrl_2DB_bufType RxIpduAir_condition_ctrl_2DB; +extern IpduVCU_40D_bufType RxIpduVCU_40D; +extern IpduBCM_L_407_bufType RxIpduBCM_L_407; +extern IpduMETER_1_dir_4BF_bufType RxIpduMETER_1_dir_4BF; +extern IpduBCM_R_4E6_bufType RxIpduBCM_R_4E6; +extern IpduHEAT_4C1_bufType RxIpduHEAT_4C1; +extern IpduADS_29C_bufType RxIpduADS_29C; +/******************************************************************************/ +/* DefualtValue Databuffer for receive objects */ +/******************************************************************************/ +extern COM_CONST IpduMPC_316_bufType RxIpduMPC_316DefualtValue; +extern COM_CONST IpduMETER_055_bufType RxIpduMETER_055DefualtValue; //在數組 COM_RxIpduDefaultValue 裡面 +extern COM_CONST IpduBCM_1_12D_bufType RxIpduBCM_1_12DDefualtValue; +extern COM_CONST IpduBCM_2_50D_bufType RxIpduBCM_2_50DDefualtValue; +extern COM_CONST IpduMOD_4G_49A_bufType RxIpduMOD_4G_49ADefualtValue; +extern COM_CONST IpduMultimedia_385_bufType RxIpduMultimedia_385DefualtValue; +extern COM_CONST IpduCloud_services_0A2_bufType RxIpdCloud_services_0A2DefualtValue; +extern COM_CONST IpduBCM_EvP2_394_bufType RxIpduBCM_EvP2_394DefualtValue; +extern COM_CONST IpduAir_condition_ctrl_2DB_bufType RxIpduAir_condition_ctrl_2DBDefualtValue; +extern COM_CONST IpduVCU_40D_bufType RxIpduVCU_40DDefualtValue; +extern COM_CONST IpduBCM_L_407_bufType RxIpduBCM_L_407DefualtValue; +extern COM_CONST IpduMETER_1_dir_4BF_bufType RxIpduMETER_1_dir_4BFDefualtValue; +extern COM_CONST IpduBCM_R_4E6_bufType RxIpduBCM_R_4E6DefualtValue; +extern COM_CONST IpduHEAT_4C1_bufType RxIpduHEAT_4C1DefualtValue; +extern COM_CONST IpduADS_29C_bufType RxIpduADS_29CDefualtValue; +/******************************************************************************/ +/* Rx Timeout Value Databuffer for receive objects */ +/******************************************************************************/ +#ifdef COM_ENABLE_RX_TIMEOUTVAULE +extern COM_CONST IpduMPC_316_bufType RxIpduMPC_316TimeoutValue; +extern COM_CONST IpduMETER_055_bufType RxIpduMETER_055TimeoutValue; //在數組 COM_IpduRxTimeoutValue 裡面 +extern COM_CONST IpduBCM_1_12D_bufType RxIpduBCM_1_12DTimeoutValue; +extern COM_CONST IpduBCM_2_50D_bufType RxIpduBCM_2_50DTimeoutValue; +extern COM_CONST IpduMOD_4G_49A_bufType RxIpduMOD_4G_49ATimeoutValue; +extern COM_CONST IpduMultimedia_385_bufType RxIpduMultimedia_385TimeoutValue; +extern COM_CONST IpduCloud_services_0A2_bufType RxIpdCloud_services_0A2TimeoutValue; +extern COM_CONST IpduBCM_EvP2_394_bufType RxIpduBCM_EvP2_394TimeoutValue; +extern COM_CONST IpduAir_condition_ctrl_2DB_bufType RxIpduAir_condition_ctrl_2DBTimeoutValue; +extern COM_CONST IpduVCU_40D_bufType RxIpduVCU_40DTimeoutValue; +extern COM_CONST IpduBCM_L_407_bufType RxIpduBCM_L_407TimeoutValue; +extern COM_CONST IpduMETER_1_dir_4BF_bufType RxIpduMETER_1_dir_4BFTimeoutValue; +extern COM_CONST IpduBCM_R_4E6_bufType RxIpduBCM_R_4E6TimeoutValue; +extern COM_CONST IpduHEAT_4C1_bufType RxIpduHEAT_4C1TimeoutValue; +extern COM_CONST IpduADS_29C_bufType RxIpduADS_29CTimeoutValue; +#endif + +#if (COM_RXIPDUNUM>=1) +/******************************************************************************/ +/*used for application:signal indication flag */ +/******************************************************************************/ +#ifdef COM_ENABLE_RX_INDICATIONFLAG +extern COM_UINT8 Com_RxIpduIndicationFlag[COM_RXIPDUNUM]; //有收到RX一幀的標志 +#define COM_RX_MSG_0_INDICATIONFLAG Com_RxIpduIndicationFlag[0] +#define COM_RX_MSG_1_INDICATIONFLAG Com_RxIpduIndicationFlag[1] +#define COM_RX_MSG_2_INDICATIONFLAG Com_RxIpduIndicationFlag[2] +#define COM_RX_MSG_3_INDICATIONFLAG Com_RxIpduIndicationFlag[3] +#define COM_RX_MSG_4_INDICATIONFLAG Com_RxIpduIndicationFlag[4] +#define COM_RX_MSG_5_INDICATIONFLAG Com_RxIpduIndicationFlag[5] +#define COM_RX_MSG_6_INDICATIONFLAG Com_RxIpduIndicationFlag[6] +#define COM_RX_MSG_7_INDICATIONFLAG Com_RxIpduIndicationFlag[7] +#define COM_RX_MSG_8_INDICATIONFLAG Com_RxIpduIndicationFlag[8] +#define COM_RX_MSG_9_INDICATIONFLAG Com_RxIpduIndicationFlag[9] +#define COM_RX_MSG_10_INDICATIONFLAG Com_RxIpduIndicationFlag[10] +#define COM_RX_MSG_11_INDICATIONFLAG Com_RxIpduIndicationFlag[11] +#define COM_RX_MSG_12_INDICATIONFLAG Com_RxIpduIndicationFlag[12] +#define COM_RX_MSG_13_INDICATIONFLAG Com_RxIpduIndicationFlag[13] +#define COM_RX_MSG_14_INDICATIONFLAG Com_RxIpduIndicationFlag[14] +#endif + +/******************************************************************************/ +/*Rx indication function definition */ +/******************************************************************************/ +#ifdef COM_ENABLE_RX_INDICATIONFUN +extern void AppIpduMPC_316_Ind(void); +extern void AppIpduMETER_055_Ind(void); +extern void AppIpduBCM_1_12D_Ind(void); +extern void AppIpduBCM_2_50D_Ind(void); +extern void AppIpduMOD_4G_49A_Ind(void); +extern void AppIpduMultimedia_385_Ind(void); +extern void AppIpduCloud_services_0A2_Ind(void); +extern void AppIpduBCM_EvP2_394_Ind(void); +extern void AppIpduAir_condition_ctrl_2DB_Ind(void); +extern void AppIpduVCU_40D_Ind(void); +extern void AppIpduBCM_L_407_Ind(void); +extern void AppIpduMETER_1_dir_4BF_Ind(void); +extern void AppIpduBCM_R_4E6_Ind(void); +extern void AppIpduHEAT_4C1_Ind(void); +extern void AppIpduAds_29C_Ind(void); +#endif + +/******************************************************************************/ +/*rx Ipdu timeout indication flag definition */ +/******************************************************************************/ +#ifdef COM_ENABLE_RX_TIMEOUTINDICATIONFLAG +extern COM_UINT8 Com_RxIpduTimeOutFlag[COM_RXIPDUNUM]; //數到幀 超時標志 +#define COM_RXIPDUMPC_316_TIMEOUTFLAG Com_RxIpduTimeOutFlag[0] +#define COM_RXIPDUMETER_055_TIMEOUTFLAG Com_RxIpduTimeOutFlag[1] +#define COM_RXIPDUBCM_1_12D_TIMEOUTFLAG Com_RxIpduTimeOutFlag[2] +#define COM_RXIPDUBCM_2_50D_TIMEOUTFLAG Com_RxIpduTimeOutFlag[3] +#define COM_RXIPDUMOD_4G_49A_TIMEOUTFLAG Com_RxIpduTimeOutFlag[4] +#define COM_RXIPDUMULTIMEDIA_385_TIMEOUTFLAG Com_RxIpduTimeOutFlag[5] +#define COM_RXIPDCLOUD_SERVICES_0A2_TIMEOUTFLAG Com_RxIpduTimeOutFlag[6] +#define COM_RXIPDUBCM_EVP2_394_TIMEOUTFLAG Com_RxIpduTimeOutFlag[7] +#define COM_RXIPDUAIR_CONDITION_CTRL_2DB_TIMEOUTFLAG Com_RxIpduTimeOutFlag[8] +#define COM_RXIPDUVCU_40D_TIMEOUTFLAG Com_RxIpduTimeOutFlag[9] +#define COM_RXIPDUBCM_L_407_TIMEOUTFLAG Com_RxIpduTimeOutFlag[10] +#define COM_RXIPDUMETER_1_DIR_4BF_TIMEOUTFLAG Com_RxIpduTimeOutFlag[11] +#define COM_RXIPDUBCM_R_4E6_TIMEOUTFLAG Com_RxIpduTimeOutFlag[12] +#define COM_RXIPDUHEAT_4C1_TIMEOUTFLAG Com_RxIpduTimeOutFlag[13] +#define COM_RXIPDUADS_29C_TIMEOUTFLAG Com_RxIpduTimeOutFlag[14] +#endif + +/******************************************************************************/ +/*rx Ipdu timeout indication function definition */ +/******************************************************************************/ +#ifdef COM_ENABLE_RX_TIMEOUTINDICATIONFUN +extern void AppIpduMPC_316_TimeOutInd(void); +extern void AppIpduMETER_055_TimeOutInd(void); +extern void AppIpduBCM_1_12D_TimeOutInd(void); +extern void AppIpduBCM_2_50D_TimeOutInd(void); +extern void AppIpduMOD_4G_49A_TimeOutInd(void); +extern void AppIpduMultimedia_385_TimeOutInd(void); +extern void AppIpduCloud_services_0A2_TimeOutInd(void); +extern void AppIpduBCM_EvP2_394_TimeOutInd(void); +extern void AppIpduAir_condition_ctrl_2DB_TimeOutInd(void); +extern void AppIpduVCU_40D_TimeOutInd(void); +extern void AppIpduBCM_L_407_TimeOutInd(void); +extern void AppIpduMETER_1_dir_4BF_TimeOutInd(void); +extern void AppIpduBCM_R_4E6_TimeOutInd(void); +extern void AppIpduHEAT_4C1_TimeOutInd(void); +extern void AppIpduADS_29C_TimeOutInd(void); +#endif + + +#endif /*#if (COM_RXIPDUNUM>=1)*/ + + + +#if((COM_TXIPDUNUM>=1) || (COM_RXIPDUNUM>=1)) +#define COM_IPDUGROUPNUM 2u //為什麼配了兩組， +#define COM_IPDUGROUP1 0x00000001 //必須是mask值 +#define COM_IPDUGROUP2 0x00000002 //必須是mask值 +#endif + +/******************************************************************************* +* data declaration +*******************************************************************************/ +#if(COM_TXIPDUNUM>=1) +extern PduInfoType COM_TxDataPtr[COM_TXIPDUNUM]; //CanIf_Transmit 時 真正傳入的內容和長度； +extern COM_CONST PduInfoType COM_TxDataInitInfo[COM_TXIPDUNUM]; //初始值 +extern COM_CONST COM_UINT8 COM_TxIpduSigNum[COM_TXIPDUNUM]; //每發送幀的 信號數量 +extern COM_CONST COM_TxSigStruct COM_TxSigTable[COM_TXSIGNUM]; //發送每一信號的配置 +extern COM_CONST COM_UINT8* COM_TxIpduDefaultValue[COM_TXIPDUNUM]; //指向 初始化值的指針 +#ifdef COM_ENABLE_TX_CONFIRMATIONFUN +extern COM_CONST COM_TxConfirmationFun COM_IpduTxConfirmFunPtr[COM_TXIPDUNUM]; //成功發送幀的 確認回調 +extern void Com_TxIpduCallout(PduIdType PduId); +#endif + +#ifdef COM_ENABLE_TX_TO_INDFUN +extern COM_CONST COM_TxTimeOutFun COM_IpduTxTimeOutFunPtr[COM_TXIPDUNUM]; //幀超時的回調數 +#endif + +#ifdef COM_ENABLE_LPDUTX_ERRORINDICATIONFUN //報文發送失敗，以回調函數通知 +extern COM_CONST COM_ErrorIndicationFun COM_IpduTxErrorIndicationFunPtr[COM_TXIPDUNUM]; //幀錯誤的回調 +#endif + +extern COM_CONST COM_UINT8 COM_IpduTxTypeTable[COM_TXIPDUNUM]; //幀的性質，周期性，且有時間監控 +extern COM_CONST COM_UINT16 COM_IdpuTxFastCycleTable[COM_TXIPDUNUM]; //快速時間回復 +#ifdef COM_ENABLE_ACTIVEPORPERTY +extern FUNC(void, COM_PUBLIC_CODE) Com_ActiveSig +( + Com_SignalIdType SignalId +); +extern FUNC(void, COM_PUBLIC_CODE) Com_DisactiveSig +( + Com_SignalIdType SignalId +); +#endif +extern COM_CONST COM_UINT16 COM_IdpuTxCycCntTable[COM_TXIPDUNUM]; //發送周期，100ms +extern COM_CONST COM_UINT16 COM_TxIpduOffsetInTxSigTable[COM_TXIPDUNUM]; //什麼意思 好像沒有用到 要開啟 宏 COM_ENABLE_ACTIVEPORPERTY +extern COM_CONST COM_UINT16 COM_IpduTxDelayCntTable[COM_TXIPDUNUM]; //發送 的延時 ？？？ +extern COM_CONST COM_UINT16 COM_IpduRepetitionTxCycCntTable[COM_TXIPDUNUM]; //重發時間 ？？？ +extern COM_UINT8 COM_IpduRepetitionTxNumTable[COM_TXIPDUNUM]; //重復次數？？？ +extern COM_CONST COM_UINT16 COM_IpduTxTimeOutCntTable[COM_TXIPDUNUM]; //超時 為什麼是0呢， 難道一幀都不行-----？？？ +extern COM_CONST COM_UINT16 COM_IpduTxOffsetTimerTable[COM_TXIPDUNUM]; //偏移時間 ？？？ +#endif /*#if(COM_TXIPDUNUM>=1)*/ + +#if(COM_RXIPDUNUM>=1) +extern COM_CONST PduInfoType COM_RxDataInitInfo[COM_RXIPDUNUM]; +extern COM_CONST COM_UINT8 COM_RxIpduSigNum[COM_RXIPDUNUM]; +extern COM_CONST COM_UINT16 COM_RxIpduOffsetInRxSigTable[COM_RXIPDUNUM]; +extern COM_CONST COM_RxSigStruct COM_RxSigTable[COM_RXSIGNUM]; +extern COM_CONST COM_IpduRxTimeOut_Struct COM_IpduRxTOTimerTable[COM_RXIPDUNUM]; +extern COM_CONST COM_UINT8* COM_RxIpduDefaultValue[COM_RXIPDUNUM]; + +#ifdef COM_ENABLE_RX_INDICATIONFUN +extern COM_CONST COM_RxIndicationFun COM_IpduRxIndicationFunPtr[COM_RXIPDUNUM]; +#endif + +#ifdef COM_ENABLE_RX_TIMEOUTINDICATIONFUN +extern COM_CONST COM_TimeoutIndicationFun COM_IpduRxTimeoutFunPtr[COM_RXIPDUNUM]; +#endif + +#ifdef COM_ENABLE_LPDURX_ERRORINDICATIONFUN +extern COM_CONST COM_ErrorIndicationFun COM_IpduRxErrorIndicationFunPtr[COM_RXIPDUNUM]; +#endif + +#ifdef COM_ENABLE_LPDURXSTART_INDICATIONFUN //TP開始接收大報文時，如果需要使用回調函數通知應用程序 +extern COM_CONST COM_LpduRxStartIndicationFun COM_IpduRxStartIndicationFunPtr[COM_RXIPDUNUM]; +#endif + +#ifdef COM_ENABLE_RX_TIMEOUTVAULE +extern COM_CONST COM_UINT8* COM_IpduRxTimeoutValue[COM_RXIPDUNUM]; +#endif + +extern COM_CONST ComTpBufferSize COM_TpRxIpduBufferSize[COM_RXIPDUNUM]; + +extern void Com_RxIpduCallout(PduIdType PduId); +#endif /*#if(COM_RXIPDUNUM>=1)*/ + + +#if(COM_TXIPDUNUM>=1) +extern COM_CONST COM_SendSignalFun COM_SendSignalFunPrt[COM_TXSIGNUM]; //发送信号 对 位写操作 +#endif +#if(COM_RXIPDUNUM>=1) +extern COM_CONST COM_ReceivedSignalFun COM_ReceivedSignalFunPrt[COM_RXSIGNUM]; //接收信号 读取相应的位 +#endif + + + + +#ifdef COM_ENABLE_ROUTESIGNAL +#if((COM_TXIPDUNUM>=1) && (COM_RXIPDUNUM>=1) && (COM_GWIPDUNUM>=1) && (COM_GWSIGNUM>=1)) +extern COM_CONST COM_SignalGatewayIpduInfoType COM_SignalGatewayIpduInfo[COM_GWIPDUNUM]; +extern COM_CONST COM_SignalGatewayInfoType COM_SignalGatewayInfo[COM_GWSIGNUM]; +#endif /*#if((COM_TXIPDUNUM>=1) && (COM_RXIPDUNUM>=1))*/ +#endif /*#ifdef COM_ENABLE_ROUTESIGNAL*/ + + +#if(COM_IPDUGROUPNUM>=1) +extern COM_CONST COM_GroupIpduInfoType COM_GroupIpduInfo[]; +extern COM_CONST COM_IpduGroupInfoType COM_IpduGroupInfo[COM_IPDUGROUPNUM]; //有用到，还没有深入理解 +extern void COM_UserIPDUControl(Com_IpduGroupVector IpduGroupVector); +#endif +#if(COM_TXIPDUNUM>=1) +extern COM_CONST COM_UINT16 COM_UnderlyHandle[COM_TXIPDUNUM]; +//COM用來發送多包數據時，需要調用的底層接口 +#define Com_TransmitLPDU(ComTxPduId,PduInfoPtr) CanIf_Transmit(COM_UnderlyHandle[ComTxPduId],PduInfoPtr) +//com用來發送單包數據時，需要調用的底層接口 +#define Com_Transmit(ComTxPduId,PduInfoPtr) CanIf_Transmit(COM_UnderlyHandle[ComTxPduId],PduInfoPtr) +#endif + + + + + + +#endif + + + diff --git a/code_app_out/Source/ComStack/Can_Gen/Com/Com_Lcfg.c b/code_app_out/Source/ComStack/Can_Gen/Com/Com_Lcfg.c new file mode 100644 index 0000000..6dc66ed --- /dev/null +++ b/code_app_out/Source/ComStack/Can_Gen/Com/Com_Lcfg.c @@ -0,0 +1,495 @@ +/** + ****************************************************************************** + * @file + * @author + * @version + * @date + * @brief + * @function List: + ****************************************************************************** + * @attention + * + * + *

© COPYRIGHT 2021

+ ****************************************************************************** + * @History: + * @Author: + * @Data: + * @Version: +*/ + +/******************************************************************************* +* Includes +*******************************************************************************/ +#include "Com.h" +#include "crc.h" + + +/******************************************************************************* +* for Com_SendSignal +*******************************************************************************/ +void COM_SendSig_SWS_R_SID(COM_CONST void* SigValue) +{ + TxIpduSteering_RIGHT_switch_4A8.IpduSteering_RIGHT_switch_4A8.SWS_R_SID=(*(uint8 *)SigValue); + Com_SetSendRequest(COM_TX_SIGSWS_R_SID); +} +void COM_SendSig_SWS_R_Multimedia(COM_CONST void* SigValue) +{ + TxIpduSteering_RIGHT_switch_4A8.IpduSteering_RIGHT_switch_4A8.SWS_R_Multimedia=(*(uint8 *)SigValue); + Com_SetSendRequest(COM_TX_SIGSWS_R_MULTIMEDIA); +} +void COM_SendSig_SWS_R_Meter_menu(COM_CONST void* SigValue) +{ + TxIpduSteering_RIGHT_switch_4A8.IpduSteering_RIGHT_switch_4A8.SWS_R_Meter_menu=(*(uint8 *)SigValue); + Com_SetSendRequest(COM_TX_SIGSWS_R_METER_MENU); +} +void COM_SendSig_SWS_R_voicd_expand(COM_CONST void* SigValue) +{ + TxIpduSteering_RIGHT_switch_4A8.IpduSteering_RIGHT_switch_4A8.SWS_R_voicd_expand = (*(uint8 *)SigValue); + Com_SetSendRequest(COM_TX_SIGSWS_R_VOICD_EXPAND); +} + +void COM_SendSig_SWS_R_voicd_expand_2(COM_CONST void* SigValue) +{ + TxIpduSteering_RIGHT_switch_4A8.IpduSteering_RIGHT_switch_4A8.SWS_R_voicd_expand_2=(*(uint8 *)SigValue); + Com_SetSendRequest(COM_TX_SIGSWS_R_VOICD_EXPAND_2); +} + +void COM_SendSig_SWS_R_LEFT_Menu(COM_CONST void* SigValue) +{ + TxIpduSteering_RIGHT_switch_4A8.IpduSteering_RIGHT_switch_4A8.SWS_R_LEFT_Menu=(*(uint8 *)SigValue); + Com_SetSendRequest(COM_TX_SIGSWS_R_LEFT_MENU); +} + +void COM_SendSig_SWS_R_paddle_shift(COM_CONST void* SigValue) +{ + TxIpduSteering_RIGHT_switch_4A8.IpduSteering_RIGHT_switch_4A8.SWS_R_paddle_shift=(*(uint8 *)SigValue); + Com_SetSendRequest(COM_TX_SIGSWS_R_PADDLE_SHIFT); +} +void COM_SendSig_SWS_R_cruise(COM_CONST void* SigValue) +{ + TxIpduSteering_RIGHT_switch_4A8.IpduSteering_RIGHT_switch_4A8.SWS_R_cruise=(*(uint8 *)SigValue); + Com_SetSendRequest(COM_TX_SIGSWS_R_CRUISE); +} +void COM_SendSig_SWS_R_auto_show_in(COM_CONST void* SigValue) +{ + TxIpduSteering_RIGHT_switch_4A8.IpduSteering_RIGHT_switch_4A8.SWS_R_auto_show_in=(*(uint8 *)SigValue); + Com_SetSendRequest(COM_TX_SIGSWS_R_AUTO_SHOW_IN); +} +void COM_SendSig_SWS_R_auto_show_out(COM_CONST void* SigValue) +{ + TxIpduSteering_RIGHT_switch_4A8.IpduSteering_RIGHT_switch_4A8.SWS_R_auto_show_out=(*(uint8 *)SigValue); + Com_SetSendRequest(COM_TX_SIGSWS_R_AUTO_SHOW_OUT); +} +void COM_SendSig_SWS_R_mileage_clear(COM_CONST void* SigValue) +{ + TxIpduSteering_RIGHT_switch_4A8.IpduSteering_RIGHT_switch_4A8.SWS_R_mileage_clear=(*(uint8 *)SigValue); + Com_SetSendRequest(COM_TX_SIGSWS_R_MILEAGE_CLEAR); +} +void COM_SendSig_SWS_Media_Reset(COM_CONST void* SigValue) +{ + TxIpduSteering_RIGHT_switch_4A8.IpduSteering_RIGHT_switch_4A8.SWS_R_Media_Reset=(*(COM_CONST uint8 *)SigValue); + Com_SetSendRequest(COM_TX_SIGSWS_R_MEDIA_RESET); +} + +void COM_SendSig_SWS_Other_Recover(COM_CONST void* SigValue) +{ + TxIpduSteering_RIGHT_switch_4A8.IpduSteering_RIGHT_switch_4A8.SWS_R_Other_Recover=(*(COM_CONST uint8 *)SigValue); + Com_SetSendRequest(COM_TX_SIGSWS_R_OTHER_RECOVER); +} +void COM_SendSig_SWS_R_checksum(COM_CONST void* SigValue) +{ + TxIpduSteering_RIGHT_switch_4A8.IpduSteering_RIGHT_switch_4A8.SWS_R_checksum=(*(uint8 *)SigValue); + Com_SetSendRequest(COM_TX_SIGSWS_R_CHECKSUM); +} + + + + +void COM_SendSig_SWS_L_Dis_set(COM_CONST void* SigValue) +{ + TxIpduSteering_LEFT_switch_3B0.IpduSteering_LEFT_switch_3B0.SWS_L_Dis_set=(*(uint8 *)SigValue); + TxIpduSteering_LEFT_switch_3B0.IpduSteering_LEFT_switch_3B0.SWS_L_checksum = crc_8_for_sa3f(&(TxIpduSteering_LEFT_switch_3B0._c[0]), 7); +} +void COM_SendSig_SWS_L_Spd_set(COM_CONST void* SigValue) +{ + TxIpduSteering_LEFT_switch_3B0.IpduSteering_LEFT_switch_3B0.SWS_L_Spd_set=(*(uint8 *)SigValue); + TxIpduSteering_LEFT_switch_3B0.IpduSteering_LEFT_switch_3B0.SWS_L_checksum = crc_8_for_sa3f(&(TxIpduSteering_LEFT_switch_3B0._c[0]), 7); +} +void COM_SendSig_SWS_L_Cancel_dipilot(COM_CONST void* SigValue) +{ + TxIpduSteering_LEFT_switch_3B0.IpduSteering_LEFT_switch_3B0.SWS_L_Cancel_dipilot=(*(uint8 *)SigValue); + TxIpduSteering_LEFT_switch_3B0.IpduSteering_LEFT_switch_3B0.SWS_L_checksum = crc_8_for_sa3f(&(TxIpduSteering_LEFT_switch_3B0._c[0]), 7); +} +void COM_SendSig_SWS_L_Cruise_spd_limit(COM_CONST void* SigValue) +{ + TxIpduSteering_LEFT_switch_3B0.IpduSteering_LEFT_switch_3B0.SWS_L_Cruise_spd_limit=(*(uint8 *)SigValue); + TxIpduSteering_LEFT_switch_3B0.IpduSteering_LEFT_switch_3B0.SWS_L_checksum = crc_8_for_sa3f(&(TxIpduSteering_LEFT_switch_3B0._c[0]), 7); +} + +void COM_SendSig_SWS_L_reset(COM_CONST void* SigValue) +{ + TxIpduSteering_LEFT_switch_3B0.IpduSteering_LEFT_switch_3B0.SWS_L_reset=(*(uint8 *)SigValue); + TxIpduSteering_LEFT_switch_3B0.IpduSteering_LEFT_switch_3B0.SWS_L_checksum = crc_8_for_sa3f(&(TxIpduSteering_LEFT_switch_3B0._c[0]), 7); +} + +void COM_SendSig_SWS_L_Cruise_fault(COM_CONST void* SigValue) +{ + TxIpduSteering_LEFT_switch_3B0.IpduSteering_LEFT_switch_3B0.SWS_L_Cruise_fault=(*(uint8 *)SigValue); + TxIpduSteering_LEFT_switch_3B0.IpduSteering_LEFT_switch_3B0.SWS_L_checksum = crc_8_for_sa3f(&(TxIpduSteering_LEFT_switch_3B0._c[0]), 7); +} + +void COM_SendSig_SWS_L_set(COM_CONST void* SigValue) +{ + TxIpduSteering_LEFT_switch_3B0.IpduSteering_LEFT_switch_3B0.SWS_L_set=(*(uint8 *)SigValue); + TxIpduSteering_LEFT_switch_3B0.IpduSteering_LEFT_switch_3B0.SWS_L_checksum = crc_8_for_sa3f(&(TxIpduSteering_LEFT_switch_3B0._c[0]), 7); +} +void COM_SendSig_SWS_L_Dsp_sub(COM_CONST void* SigValue) +{ + TxIpduSteering_LEFT_switch_3B0.IpduSteering_LEFT_switch_3B0.SWS_L_Dsp_sub=(*(uint8 *)SigValue); + TxIpduSteering_LEFT_switch_3B0.IpduSteering_LEFT_switch_3B0.SWS_L_checksum = crc_8_for_sa3f(&(TxIpduSteering_LEFT_switch_3B0._c[0]), 7); +} + +void COM_SendSig_SWS_L_Dsp_plus(COM_CONST void* SigValue) +{ + TxIpduSteering_LEFT_switch_3B0.IpduSteering_LEFT_switch_3B0.SWS_L_Dsp_plus=(*(uint8 *)SigValue); + TxIpduSteering_LEFT_switch_3B0.IpduSteering_LEFT_switch_3B0.SWS_L_checksum = crc_8_for_sa3f(&(TxIpduSteering_LEFT_switch_3B0._c[0]), 7); +} + +void COM_SendSig_SWS_L_Lane_line_assist(COM_CONST void* SigValue) +{ + TxIpduSteering_LEFT_switch_3B0.IpduSteering_LEFT_switch_3B0.SWS_L_Lane_line_assist=(*(uint8 *)SigValue); + TxIpduSteering_LEFT_switch_3B0.IpduSteering_LEFT_switch_3B0.SWS_L_checksum = crc_8_for_sa3f(&(TxIpduSteering_LEFT_switch_3B0._c[0]), 7); +} + +void COM_SendSig_SWS_L_cruise_set(COM_CONST void* SigValue) +{ + TxIpduSteering_LEFT_switch_3B0.IpduSteering_LEFT_switch_3B0.SWS_L_cruise_set=(*(uint8 *)SigValue); + TxIpduSteering_LEFT_switch_3B0.IpduSteering_LEFT_switch_3B0.SWS_L_checksum = crc_8_for_sa3f(&(TxIpduSteering_LEFT_switch_3B0._c[0]), 7); +} + +void COM_SendSig_SWS_L_acc(COM_CONST void* SigValue) +{ + TxIpduSteering_LEFT_switch_3B0.IpduSteering_LEFT_switch_3B0.SWS_L_acc=(*(uint8 *)SigValue); + TxIpduSteering_LEFT_switch_3B0.IpduSteering_LEFT_switch_3B0.SWS_L_checksum = crc_8_for_sa3f(&(TxIpduSteering_LEFT_switch_3B0._c[0]), 7); +} + +void COM_SendSig_SWS_L_Left_pick(COM_CONST void* SigValue) +{ + TxIpduSteering_LEFT_switch_3B0.IpduSteering_LEFT_switch_3B0.SWS_L_Left_pick=(*(uint8 *)SigValue); + TxIpduSteering_LEFT_switch_3B0.IpduSteering_LEFT_switch_3B0.SWS_L_checksum = crc_8_for_sa3f(&(TxIpduSteering_LEFT_switch_3B0._c[0]), 7); +} + +void COM_SendSig_SWS_L_Right_pick(COM_CONST void* SigValue) +{ + TxIpduSteering_LEFT_switch_3B0.IpduSteering_LEFT_switch_3B0.SWS_L_Right_pick=(*(uint8 *)SigValue); + TxIpduSteering_LEFT_switch_3B0.IpduSteering_LEFT_switch_3B0.SWS_L_checksum = crc_8_for_sa3f(&(TxIpduSteering_LEFT_switch_3B0._c[0]), 7); +} + +void COM_SendSig_SWS_L_rolling_count(COM_CONST void* SigValue) +{ + TxIpduSteering_LEFT_switch_3B0.IpduSteering_LEFT_switch_3B0.SWS_L_rolling_count=(*(uint8 *)SigValue); + TxIpduSteering_LEFT_switch_3B0.IpduSteering_LEFT_switch_3B0.SWS_L_checksum = crc_8_for_sa3f(&(TxIpduSteering_LEFT_switch_3B0._c[0]), 7); +} + +void COM_SendSig_SWS_L_checksum(COM_CONST void* SigValue) +{ + TxIpduSteering_LEFT_switch_3B0.IpduSteering_LEFT_switch_3B0.SWS_L_checksum=(*(uint8 *)SigValue); +} + + + + + + + +void COM_SendSig_SWS_C_vibration_cfg(COM_CONST void* SigValue) +{ + TxIpduSteering_customization_switch_429.IpduSteering_customization_switch_429.SWS_C_vibration_cfg=(*(uint8 *)SigValue); +} + +void COM_SendSig_SWS_C_vibration_state(COM_CONST void* SigValue) +{ + TxIpduSteering_customization_switch_429.IpduSteering_customization_switch_429.SWS_C_vibration_state=(*(uint8 *)SigValue); +} + +void COM_SendSig_SWS_C_Heat_cfg(COM_CONST void* SigValue) +{ + TxIpduSteering_customization_switch_429.IpduSteering_customization_switch_429.SWS_C_Heat_cfg=(*(uint8 *)SigValue); +} + +void COM_SendSig_SWS_C_swh_state(COM_CONST void* SigValue) +{ + TxIpduSteering_customization_switch_429.IpduSteering_customization_switch_429.SWS_C_swh_state=(*(uint8 *)SigValue); +} + + +void COM_SendSig_SWS_C_sws_cfg(COM_CONST void* SigValue) +{ + TxIpduSteering_customization_switch_429.IpduSteering_customization_switch_429.SWS_C_sws_cfg=(*(uint8 *)SigValue); +} +void COM_SendSig_SWS_C_auto_heat(COM_CONST void* SigValue) +{ + TxIpduSteering_customization_switch_429.IpduSteering_customization_switch_429.SWS_C_auto_heat=(*(uint8 *)SigValue); +} +void COM_SendSig_SWS_C_heat_gear(COM_CONST void* SigValue) +{ + TxIpduSteering_customization_switch_429.IpduSteering_customization_switch_429.SWS_C_heat_gear=(*(uint8 *)SigValue); +} +void COM_SendSig_SWS_C_heat_gear_cfg(COM_CONST void* SigValue) +{ + TxIpduSteering_customization_switch_429.IpduSteering_customization_switch_429.SWS_C_heat_gear_cfg=(*(uint8 *)SigValue); +} + + +#if (COM_TXIPDUNUM>=1) //�l����̖���P +COM_CONST COM_SendSignalFun COM_SendSignalFunPrt[COM_TXSIGNUM]= +{ + COM_SendSig_SWS_R_SID, + COM_SendSig_SWS_R_Multimedia, + COM_SendSig_SWS_R_Meter_menu, + COM_SendSig_SWS_R_voicd_expand, + COM_SendSig_SWS_R_voicd_expand_2, + COM_SendSig_SWS_R_LEFT_Menu, + COM_SendSig_SWS_R_paddle_shift, + COM_SendSig_SWS_R_cruise, + COM_SendSig_SWS_R_auto_show_in, + COM_SendSig_SWS_R_auto_show_out, + COM_SendSig_SWS_R_mileage_clear, + COM_SendSig_SWS_Media_Reset, + COM_SendSig_SWS_Other_Recover, + COM_SendSig_SWS_R_checksum, + COM_SendSig_SWS_L_Dis_set, + COM_SendSig_SWS_L_Spd_set, + COM_SendSig_SWS_L_Cancel_dipilot, + COM_SendSig_SWS_L_Cruise_spd_limit, + COM_SendSig_SWS_L_reset, + COM_SendSig_SWS_L_Cruise_fault, + COM_SendSig_SWS_L_set, + COM_SendSig_SWS_L_Dsp_sub, + COM_SendSig_SWS_L_Dsp_plus, + COM_SendSig_SWS_L_Lane_line_assist, + COM_SendSig_SWS_L_cruise_set, + COM_SendSig_SWS_L_acc, + COM_SendSig_SWS_L_Left_pick, + COM_SendSig_SWS_L_Right_pick, + COM_SendSig_SWS_L_rolling_count, + COM_SendSig_SWS_L_checksum, + COM_SendSig_SWS_C_vibration_cfg, + COM_SendSig_SWS_C_vibration_state, + COM_SendSig_SWS_C_Heat_cfg, + COM_SendSig_SWS_C_swh_state, + COM_SendSig_SWS_C_sws_cfg, + COM_SendSig_SWS_C_auto_heat, + COM_SendSig_SWS_C_heat_gear, + COM_SendSig_SWS_C_heat_gear_cfg +}; +#endif + + + +/******************************************************************************* +* for Com_ReceiveSignal +*******************************************************************************/ +//mpc +void COM_ReceiveSigMPC_L_lt_status(void* SigValue) +{ + (*(uint8 *)SigValue) = RxIpduMPC_316.IpduMPC_316.MPC_L_lt_status; +} +void COM_ReceiveSigMPC_R_lt_status(void* SigValue) +{ + (*(uint8 *)SigValue) = RxIpduMPC_316.IpduMPC_316.MPC_R_lt_status; +} +void COM_ReceiveSigMPC_Ld_alarm_mode_sta(void* SigValue) +{ + (*(uint8 *)SigValue) = RxIpduMPC_316.IpduMPC_316.MPC_Ld_alarm_mode_sta; +} + +//meter +void COM_ReceiveSigMETER_BackgroundLightLvlCmd(void* SigValue) +{ + (*(uint8 *)SigValue) = RxIpduMETER_055.IpduMETER_055.METER_BackgroundLightLvlCmd; +} + +//bcm1 +void COM_ReceiveSigBCM1_power_gear(void* SigValue) +{ + (*(uint8 *)SigValue) = RxIpduBCM_1_12D.IpduBCM_1_12D.BCM1_power_gear; +} +void COM_ReceiveSigBCM1_vehicle_state(void* SigValue) +{ + (*(uint8 *)SigValue) = RxIpduBCM_1_12D.IpduBCM_1_12D.BCM1_vehicle_state; +} +void COM_ReceiveSigBCM1_vehicle_state1(void* SigValue) +{ + (*(uint8 *)SigValue) = RxIpduBCM_1_12D.IpduBCM_1_12D.BCM1_vehicle_state1; +} +//bcm2 +void COM_ReceiveSigBCM2_nm_sleep_state(void* SigValue) +{ + (*(uint8 *)SigValue) = RxIpduBCM_2_50D.IpduBCM_2_50D.BCM2_nm_sleep_state; +} + + + +//4g mod +void COM_ReceiveSigMOD_4G_Ecl_power_req(void* SigValue) +{ + (*(uint8 *)SigValue) = RxIpduMOD_4G_49A.IpduMOD_4G_49A.MOD_4G_Ecl_power_req; +} +void COM_ReceiveSigMOD_4G_ota_light_req(void* SigValue) +{ + (*(uint8 *)SigValue) = RxIpduMOD_4G_49A.IpduMOD_4G_49A.MOD_4G_ota_light_req; +} + +void COM_ReceiveSigMOD_4G_enter_ota_mode_req(void* SigValue) +{ + (*(uint8 *)SigValue) = RxIpduMOD_4G_49A.IpduMOD_4G_49A.MOD_4G_enter_ota_mode_req; +} + +void COM_ReceiveSigMOD_4G_ota_update_req(void* SigValue) +{ + (*(uint8 *)SigValue) = RxIpduMOD_4G_49A.IpduMOD_4G_49A.MOD_4G_ota_update_req; +} + +void COM_ReceiveSigMOD_4G_checksum(void* SigValue) +{ + (*(uint8 *)SigValue) = RxIpduMOD_4G_49A.IpduMOD_4G_49A.MOD_4G_checksum; +} + + + +//multi +void COM_ReceiveSigMULTIMEDIA_Sw_heat(void* SigValue) +{ + (*(uint8 *)SigValue) = RxIpduMultimedia_385.IpduMultimedia_385.MULTIMEDIA_Sw_heat; +} + + +//cloud service +void COM_ReceiveSigCloud_Service_remote_cmd(void* SigValue) +{ + (*(uint8 *)SigValue) = RxIpdCloud_services_0A2.IpduCloud_services_0A2.Cloud_Service_remote_cmd; +} + +//cloud service +void COM_ReceiveSigCloud_Service_Sw_heat(void* SigValue) +{ + (*(uint8 *)SigValue) = RxIpdCloud_services_0A2.IpduCloud_services_0A2.Cloud_Service_Sw_heat; +} + +//bcm evp2 +void COM_ReceiveSigBCM_EVP2_vehicle_state(void* SigValue) +{ + (*(uint8 *)SigValue) = RxIpduBCM_EvP2_394.IpduBCM_EvP2_394.BCM_EVP2_vehicle_state; +} + +//air condition ctrl +void COM_ReceiveSigAIR_CD_ctrl_temp_show(void* SigValue) +{ + (*(uint8 *)SigValue) = RxIpduAir_condition_ctrl_2DB.IpduAir_condition_ctrl_2DB.AIR_CD_ctrl_temp_show; +} + + +void COM_ReceiveSigVCU_ECM_Vehicle_code_s(void* SigValue) +{ + (*(uint8 *)SigValue) = RxIpduVCU_40D.IpduVCU_40D.VCU_ECM_Vehicle_code_s; +} + +//vcu +void COM_ReceiveSigBCM_L_nm_type(void* SigValue) +{ + (*(uint8 *)SigValue) = RxIpduBCM_L_407.IpduBCM_L_407.BCM_L_nm_type; +} + + +//BCM L +void COM_ReceiveSigMETER1_BackgroundLightLvlCmd(void* SigValue) +{ + (*(uint8 *)SigValue) = RxIpduMETER_1_dir_4BF.IpduMETER_1_dir_4BF.METER1_BackgroundLightLvlCmd; +} + +void COM_ReceiveSigThe_Limit_Acc(void* SigValue) +{ + (*(uint8 *)SigValue) = RxIpduMETER_1_dir_4BF.IpduMETER_1_dir_4BF.The_Limit_Acc; +} +//METER 1 DIR +void COM_ReceiveSigBCM_R_air_temp_show(void* SigValue) +{ + (*(uint8 *)SigValue) = RxIpduBCM_R_4E6.IpduBCM_R_4E6.BCM_R_air_temp_show; +} + +//BCM R +void COM_ReceiveSigHEAT_subid(void* SigValue) +{ + (*(uint8 *)SigValue) = RxIpduHEAT_4C1.IpduHEAT_4C1.HEAT_subid; +} + +//HEAT_SUB_ID +void COM_ReceiveSigHEAT_auto_heat(void* SigValue) +{ + (*(uint8 *)SigValue) = RxIpduHEAT_4C1.IpduHEAT_4C1.HEAT_auto_heat; +} + +//HEAT_AUTO +void COM_ReceiveSigHEAT_heat_gear(void* SigValue) +{ + (*(uint8 *)SigValue) = RxIpduHEAT_4C1.IpduHEAT_4C1.HEAT_heat_gear; +} + +//HEAT_GEAR +void COM_ReceiveSigADS_ACC_Mode_Displayl(void* SigValue) +{ + (*(uint8 *)SigValue) = RxIpduADS_29C.IpduADS_29C.ADS_ACC_Mode_Displayl; +} +//DNP_STATS + +//DNP_WARNING +void COM_ReceiveSigADS_DNP_Stats(void* SigValue) +{ + (*(uint8 *)SigValue) = RxIpduADS_29C.IpduADS_29C.ADS_DNP_Stats; +} + +void COM_ReceiveSigADS_DNP_Take_Over_Req_S(void* SigValue) +{ + (*(uint8 *)SigValue) = RxIpduADS_29C.IpduADS_29C.ADS_DNP_Take_Over_Req_S; +} + + + + +/*PRQA S 1503--*/ + +#if (COM_RXIPDUNUM>=1) +COM_CONST COM_ReceivedSignalFun COM_ReceivedSignalFunPrt[COM_RXSIGNUM]={ + COM_ReceiveSigMPC_L_lt_status, + COM_ReceiveSigMPC_R_lt_status, + COM_ReceiveSigMPC_Ld_alarm_mode_sta, + COM_ReceiveSigMETER_BackgroundLightLvlCmd, + COM_ReceiveSigBCM1_power_gear, + COM_ReceiveSigBCM1_vehicle_state, + COM_ReceiveSigBCM1_vehicle_state1, + COM_ReceiveSigBCM2_nm_sleep_state, + COM_ReceiveSigMOD_4G_Ecl_power_req, + COM_ReceiveSigMOD_4G_ota_light_req, + COM_ReceiveSigMOD_4G_enter_ota_mode_req, + COM_ReceiveSigMOD_4G_ota_update_req, + COM_ReceiveSigMOD_4G_checksum, + COM_ReceiveSigMULTIMEDIA_Sw_heat, + COM_ReceiveSigCloud_Service_remote_cmd, + COM_ReceiveSigCloud_Service_Sw_heat, + COM_ReceiveSigBCM_EVP2_vehicle_state, + COM_ReceiveSigAIR_CD_ctrl_temp_show, + COM_ReceiveSigVCU_ECM_Vehicle_code_s, + COM_ReceiveSigBCM_L_nm_type, + COM_ReceiveSigMETER1_BackgroundLightLvlCmd, + COM_ReceiveSigThe_Limit_Acc, + COM_ReceiveSigBCM_R_air_temp_show, + COM_ReceiveSigHEAT_subid, + COM_ReceiveSigHEAT_auto_heat, + COM_ReceiveSigHEAT_heat_gear, + COM_ReceiveSigADS_ACC_Mode_Displayl, + COM_ReceiveSigADS_DNP_Stats, + COM_ReceiveSigADS_DNP_Take_Over_Req_S, +}; +#endif diff --git a/code_app_out/Source/ComStack/Can_Gen/Dcm/App_Dcm.c b/code_app_out/Source/ComStack/Can_Gen/Dcm/App_Dcm.c new file mode 100644 index 0000000..ff7f1b1 --- /dev/null +++ b/code_app_out/Source/ComStack/Can_Gen/Dcm/App_Dcm.c @@ -0,0 +1,4959 @@ +/** + ****************************************************************************** + * @file + * @author + * @version + * @date + * @brief + * @function List: + ****************************************************************************** + * @attention + * + * + *

© COPYRIGHT 2021

+ ****************************************************************************** + * @History: + * @Author: + * @Data: + * @Version: +*/ + +/******************************************************************************* +* Include files +********************************************************************************/ +#include "Dcm.h" +#include "nvm.h" +#include "CanNm.h" +#include "CanTp.h" +#include "Demm.h" +#include "Dem.h" +#include "calibration.h" +#include "boot_app.h" +#include "Com.h" +#include "gpio_cfg.h" +#include "boot_app.h" +#include "system_config.h" +#include "common_cfg.h" +#include "service_27.h" +#include "common_memory.h" +#include "fault_detect.h" +#include "system_voltage_manage.h" +#include "key_app.h" +#include "can_app.h" +#include "WheelHeat.h" + +void app_dcm_operate_service_27(u8 level,P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); + + + + + + + + + + + + + + + + + + + + + +void app_dcm_task(void) +{ + #if 0 //己在main实现 + Dcm_MainFunction(); + CanTp_MainFunction(); + #endif + //dtc_on_delay_valid_task(); +} + + +bool check_date_valid(u8 *p_date); +u8 get_ant_dcm_to_peps(u8 ant_id); + +/******************************************************************************* +* Macros and Tyedef +********************************************************************************/ +uint8 gDTCSwitch; +u16 g_dtc_timecount=0u; +#define W8(addr, value) (*((uint8 *) (addr)) = (value)) +#define R8(addr) (*((uint8 *) (addr))) + +//STATIC uint8 testbyte_0x0110=0x01; +/*static void DynamicalDidCommon(Dcm_MsgContextType* pMsgContext,uint8 DidPosition);*/ +/* For 0x19*/ +/* For 0x22 */ + #define ReadHandle_0xF100 0u + #define ReadHandle_0x01A0 1u + #define ReadHandle_0xF1A0 2u + #define ReadHandle_0xb070 3u + #define ReadHandle_0xb071 4u + #define ReadHandle_0xb072 5u + #define ReadHandle_0xb073 6u + #define ReadHandle_0xb074 7u + #define ReadHandle_0xb075 8u + #define ReadHandle_0xA030 9u + #define ReadHandle_0xF1F2 10u + #define ReadHandle_0xF1F1 11u + #define ReadHandle_0xF19E 12u + #define ReadHandle_0xF194 13u + #define ReadHandle_0xF192 14u + #define ReadHandle_0xF191 15u + #define ReadHandle_0xF188 16u + #define ReadHandle_0xF181 17u + #define ReadHandle_0xF182 18u + #define ReadHandle_0xF180 19u + #define ReadHandle_0xF186 20u + #define ReadHandle_0xF187 21u + #define ReadHandle_0xF189 22u + #define ReadHandle_0xF18A 23u + #define ReadHandle_0xF18B 24u + #define ReadHandle_0xF18C 25u + #define ReadHandle_0xF190 26u + #define ReadHandle_0xF193 27u + #define ReadHandle_0xF195 28u + #define ReadHandle_0xF197 29u + #define ReadHandle_0xF198 30u + #define ReadHandle_0xF199 31u + #define ReadHandle_0xF19D 32u + #define ReadHandle_0x0003 33u +/* For 0x27 */ + #define Request_Seed_L1_Hanle 0u + #define Send_Key_L1_Hanle 1u + #define Request_Seed_L2_Hanle 2u + #define Send_Key_L2_Hanle 3u +/* For 0x2E */ + #define WriteHandle_0x01A0 0u + #define WriteHandle_0xF1A0 1u + #define WriteHandle_0xF112 2u + #define WriteHandle_0xF190 3u + #define WriteHandle_0xF197 4u + #define WriteHandle_0xF198 5u + #define WriteHandle_0xF199 6u + #define WriteHandle_0xF19D 7u + #define WriteHandle_0xF18C 8u + +/* For 0x2F */ + #define IOcontrolHandle_0x3901 0u + #define IOcontrolHandle_0x3902 1u + #define IOcontrolHandle_0x3903 2u + #define IOcontrolHandle_0x3904 3u + #define IOcontrolHandle_0x3905 4u +/* For 0x31 */ + #define RoutineHandle_0x0206 0u + #define RoutineHandle_0x0207 1u + #define RoutineHandle_0x0208 2u + #define RoutineHandle_0x5901 3u + #define RoutineHandle_0x5902 4u + #define RoutineHandle_0x5903 5u + #define RoutineHandle_0x5904 6u + #define RoutineHandle_0xDF30 7u + #define RoutineHandle_0xDF31 8u + #define RoutineHandle_0xDF32 9u + #define RoutineHandle_0xDF33 10u + #define RoutineHandle_0xDF34 11u + #define RoutineHandle_0xDF35 12u + #define RoutineHandle_0xDF36 13u + #define RoutineHandle_0xDF37 14u + #define RoutineHandle_0xDF38 15u + #define RoutineHandle_0xDF39 16u + #define RoutineHandle_0xDF3A 17u + #define RoutineHandle_0xFF02 18u + +/******************************************************************************* +* Global variables(Scope:local) +********************************************************************************/ +#if(ISO_15031_5==STD_ON) +/* For 0x02*/ +#if(DCM_SERVICE_02_ENABLED==STD_ON) +uint8 Service02_SID02DTC[2]= +{ + 0x01,0x00 +}; +#endif +#if(DCM_SERVICE_03_ENABLED==STD_ON) +/* For 0x03*/ +STATIC uint8 service03DTCNUM=2; +#endif + +#if(DCM_SERVICE_04_ENABLED==STD_ON) +/* For 0x04*/ +STATIC uint8 IgnitionON=1; +STATIC uint8 EngineRuning=0; +#endif + +#if(DCM_SERVICE_07_ENABLED==STD_ON) +/* For 0x07*/ +STATIC uint16 service07DTCNUM=5; +#endif + +#if(DCM_SERVICE_08_ENABLED==STD_ON) +/* For 0x08*/ +STATIC uint8 TestCondition=1; +STATIC uint8 EvaporativeLeakTest=0; +#endif +#if(DCM_SERVICE_0A_ENABLED==STD_ON) +/* For 0x0A*/ +STATIC uint8 service0ADTCNUM=10; +#endif +#endif + +/* For 0x19 */ +STATIC uint8 DTCStatusAvailabilityMask=0x09; + + +#if 0 +STATIC uint8 SupportedDTCPriority[NUM_OF_DTC]={ + 0 +}; +STATIC uint32 SupportedDTC[NUM_OF_DTC]= +{ + 0xA20071u, + 0xA20171u, + 0xA20271u, + 0xA20371u, + 0xA20471u, + 0xA20516u, + 0xA20616u, + 0xA20716u, + 0xA20816u, + 0xA20916u, + 0xA20A16u, + 0xC07300u, + 0xC10087u, + 0xC15587u, + 0xC21487u, + 0xD11487u, + 0xF00616u, + 0xF00617u +}; +#endif +#if 0 +STATIC uint8 DTCStatus[NUM_OF_DTC]= +{ + 0x08 +}; +#endif +/* For 0x22 */ +STATIC uint8 DATA_0xF1A0[SYSDID_VEHICLE_CONFIG_CK_LEN]; +STATIC uint8 DATA_0x01A0[SYSDID_MANUFAC_LIFECYCLE_COUNT_CK_LEN]; +//STATIC uint8 DATA_0xB070[1]; +STATIC uint8 DATA_0xB071[5]; +STATIC uint8 DATA_0xB072[3]; +STATIC uint8 DATA_0xB073[5]; +STATIC uint8 DATA_0xB074[1]; +STATIC uint8 DATA_0xB075[1]; +STATIC uint8 DATA_0xA030[80]; +STATIC uint8 DATA_0xF1F2[SYSDID_F1F2_CK_LEN]; +STATIC uint8 DATA_0xF1F1[SYSDID_F1F1_CK_LEN]; +STATIC uint8 DATA_0xF19E[SYSDID_F19E_CK_LEN]; +STATIC uint8 DATA_0xF194[SYSDID_F194_CK_LEN]; +STATIC uint8 DATA_0xF192[SYSDID_F192_CK_LEN]; +STATIC uint8 DATA_0xF191[SYSDID_F191_CK_LEN]; +//STATIC uint8 DATA_0x01A0[16]; +STATIC uint8 DATA_0xF188[SYSDID_F188_CK_LEN]; +STATIC uint8 DATA_0xF181[SYSDID_F181_CK_LEN]; +STATIC uint8 DATA_0xF182[SYSDID_F182_CK_LEN]; +STATIC uint8 DATA_0xF180[SYSDID_F180_CK_LEN]; +STATIC uint8 DATA_0xF186[1]; +STATIC uint8 DATA_0xF187[SYSDID_F187_CK_LEN]; +STATIC uint8 DATA_0xF189[16]; +STATIC uint8 DATA_0xF18A[SYSDID_F18A_CK_LEN]; +STATIC uint8 DATA_0xF18B[SYSDID_F18B_CK_LEN]; +STATIC uint8 DATA_0xF18C[SYSDID_F18C_CK_LEN]; +STATIC uint8 DATA_0xF190[SYSDID_F190_VIN_CK_LEN]; +STATIC uint8 DATA_0xF193[SYSDID_F193_CK_LEN]; +STATIC uint8 DATA_0xF195[SYSDID_F195_CK_LEN]; +STATIC uint8 DATA_0xF197[20]; +STATIC uint8 DATA_0xF198[SYSDID_F198_REPAIR_SN_CK_LEN]; +STATIC uint8 DATA_0xF199[SYSDID_F199_DATE_CK_LEN]; +STATIC uint8 DATA_0xF19D[4]; +STATIC uint8 DATA_0xF112[8]; +STATIC uint8 ApplicationSoftwareIdentification[32]= +{ + 0x00, 0x01, 0x02, 0x03, + 0x04, 0x05, 0x06, 0x07, + 0x08, 0x09, 0x0a, 0x0b, + 0x0c, 0x0d, 0x0e, 0x0f, + 0x10, 0x11, 0x12, 0x13, + 0x14, 0x15, 0x16, 0x17, + 0x18, 0x19, 0x1a, 0x1b, + 0x1c, 0x1d, 0x1e, 0x1f +}; +/* For 0x27 */ +STATIC uint8 bUpdateSeed = 0xffU; +#if(DCM_SERVICE_27_ENABLED==STD_ON) + +#endif +/* For 0x2F,0x0107 is related to both IAC and EGR */ +//STATIC uint8 TEST[7]={0x01,0x02,0x03,0x04,0x05,0x06,0x07}; +//STATIC uint8 IAC[7]={0x01,0x02,0x03,0x04,0x05,0x06,0x07}; +//STATIC uint8 EGR[7]={0xA0,0xA1,0xA2,0xA3,0xA4,0xA5,0xA6}; + + +/*************************************************************************** +* Global Function Implementation +****************************************************************************/ +#if(DCM_GENERAL_DIAGNOSTIC_REQUEST_CTL==STD_ON) +/**************************************************************************** +* Name :App_DiagnosticActive +* Called by :Dcm +* Preconditions:N/A +* Parameters :N/A +* Return code :N/A +* Description :Check is it possible to enable Dcm module. +* 統一診斷通信條件檢查 +*調用時機：收到任何一條診斷請求之後，DCM都將先調用函數App_DiagnosticActive檢查當前是否 +*允許診斷通信，常見的條件如車速信號是否為0，點火鑰匙是否為關； +*如果當前條件允許診斷通信，則返回OK，如果不滿足，則調用函數DsdInternal_SetNegResponse設置否定響應碼， +*並返回notok +*注意事項：如果檢測發現當前情況不允許診斷通信，應必須返回NOT OK，否則會影響DCM模塊正常運行。 +*只有當宏DCM_GENERAL_DIAGNOSTIC_REQUEST_CTL=STD_ON時，才存在本回調函數 +******************************************************************************/ +Std_ReturnType App_DiagnosticActive(void) +{ + return E_OK; //允許進行診斷通信 +} +#endif +#if(DCM_SERVICE_10_ENABLED==STD_ON) +/****************************************************************************** +* Name :App_Default +* Called by :Dcm +* Preconditions:N/A +* Parameters :Dcm_MsgContextType* pMsgContext +* Return code :N/A +* Description :Default session callback function +* DCM通知應用程序，DCM將跳轉到默認會話，應用程序判斷當前應用程序條件是否允許DCM執行默認會話狀態 +* 跳轉，如果不允許，則調用函數DsdInternal_SetNegResponse設置否定響應碼。 +* 調用時機，收到 10 01 或者 10 81 +* 注意：本函數的默認代碼不能被刪除。除非有特殊檢查條件或肯定響應格式需求，本函數中的內容無需更改。 +******************************************************************************/ +FUNC(void,DCM_CODE) App_Default(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext) +{ + uint32 tempP2Star; + /* Step 1:Transmit positive response*/ + if(GetSuppressPosResponseBit()==0)/* If positive response is supressed, dont' need make it */ + { + + dem_enable_dtc_setting(); + #if(RESPONSE_WITH_P2TIMER==STD_ON) + pMsgContext->resData[2]=(uint8)(gDcmDspSessionRow[0].DcmDspSessionP2ServerMax>>8); + pMsgContext->resData[3]=(uint8)(gDcmDspSessionRow[0].DcmDspSessionP2ServerMax); + tempP2Star=gDcmDspSessionRow[0].DcmDspSessionP2StarServerMax/10; + pMsgContext->resData[4]=(uint8)(tempP2Star>>8); + pMsgContext->resData[5]=(uint8)(tempP2Star); + pMsgContext->resDataLen=6; + #else + pMsgContext->resDataLen=2; + #endif + DsdInternal_ProcessingDone(pMsgContext); + } + else + { + DsdInternal_ProcessingDoneNoResponse(); + } +} + +/****************************************************************************** +* Name :App_DefaultSessionPost +* Called by :Dcm +* Preconditions:N/A +* Parameters :Dcm_MsgContextType* pMsgContext +* Return code :N/A +* Description :Jump to default session once positive response is transmitted. +* Otherwise, do not change session type. +* 如果此函數被調用，表示當前會話狀態己經跳轉到默認會話，所有安全級別重新設置鎖定狀態。 +* 如果應用程序有某些標志或狀態需要在DCM進行默認會話跳轉之後進行改變，可以在本函數中添加。 +* 如果沒有，則無需更改本函數 +*調用時機： 1.請求正確處理並且肯定響應發送成功後，2.請求正確處理後suppressPosRspMsgIndicationBit = TRUE， 3.應用層S3參數超時 +*注意：不能刪除原代碼，除非有特殊要求。帶有Post后綴的回調函數中不能再調用DsdInternal_processingDone和DsdInternal_SetNegRespnse. +* +******************************************************************************/ +FUNC(void,DCM_CODE) App_DefaultPost(Std_ReturnType Result) +{ + uint8 i=0; + if(Result==E_OK) + { + dem_enable_dtc_setting(); + Set_SesCtrl(DCM_SESSION_DEFAULT); + for(i=0;iresData[2]=(uint8)(gDcmDspSessionRow[0].DcmDspSessionP2ServerMax>>8); + pMsgContext->resData[3]=(uint8)(gDcmDspSessionRow[0].DcmDspSessionP2ServerMax); + tempP2Star=gDcmDspSessionRow[0].DcmDspSessionP2StarServerMax/10; + pMsgContext->resData[4]=(uint8)(tempP2Star>>8); + pMsgContext->resData[5]=(uint8)(tempP2Star); + pMsgContext->resDataLen=6; + #else + pMsgContext->resDataLen=2; + #endif + DsdInternal_ProcessingDone(pMsgContext); + } + else + { + DsdInternal_ProcessingDoneNoResponse(); + } + //恆潤示例 + //DslInternal_RCRResponsePending(1u); + //DsdInternal_ProcessingDoneNoResponse(); +#else + if(GetSuppressPosResponseBit()==0)/* If positive response is supressed, dont' need make it */ + { + g_flag_goto_program = FLAG_REPROGRAM_ID; + //DsdInternal_SetNegResponse(pMsgContext,DCM_E_CONDITIONSNOTCORRECT); + DslInternal_RCRResponsePending(1u); //手動發送 78服務 + Clr_DiagState(DIAG_UDS_PROCESSING); + + } + else + { + g_flag_goto_program = FLAG_REPROGRAM_NORES_ID; + //DsdInternal_SetNegResponse(pMsgContext,DCM_E_CONDITIONSNOTCORRECT); + //DslInternal_RCRResponsePending(1u); //手動發送 78服務 + DsdInternal_ProcessingDoneNoResponse(); + + } +#endif +} + +/****************************************************************************** +* Name :App_ProgrammingSessionPost +* Called by :Dcm +* Preconditions:N/A +* Parameters :Dcm_MsgContextType* pMsgContext +* Return code :N/A +* Description :Jump to default session once positive response is transmitted. +* Otherwise, do not change session type. +* 如果此函數被調用，表示己經準備好跳轉到編程會話，在此函數中執行跳轉語句 +* 調用時機：50 02或強制0x78否定響應發送成功之後， +******************************************************************************/ +FUNC(void,DCM_CODE) App_ProgrammingPost(Std_ReturnType Result) +{ + //uint8 i=0; + if(Result==E_OK) + { + #if 0 + Set_SesCtrl(DCM_SESSION_PROGRAMMING); + for(i=0;iresData[2]=(uint8)(gDcmDspSessionRow[0].DcmDspSessionP2ServerMax>>8); + pMsgContext->resData[3]=(uint8)(gDcmDspSessionRow[0].DcmDspSessionP2ServerMax); + tempP2Star=gDcmDspSessionRow[0].DcmDspSessionP2StarServerMax/10; + pMsgContext->resData[4]=(uint8)(tempP2Star>>8); + pMsgContext->resData[5]=(uint8)(tempP2Star); + pMsgContext->resDataLen=6; + #else + pMsgContext->resDataLen=2; + #endif + DsdInternal_ProcessingDone(pMsgContext); + } + else + { + DsdInternal_ProcessingDoneNoResponse(); + } +} + +/****************************************************************************** +* Name :App_Extended_DiagnosticSessionPost +* Called by :Dcm +* Preconditions:N/A +* Parameters :Dcm_MsgContextType* pMsgContext +* Return code :N/A +* Description :Jump to default session once positive response is transmitted. +* Otherwise, do not change session type. +******************************************************************************/ +FUNC(void,DCM_CODE) App_Extended_DiagnosticPost(Std_ReturnType Result) +{ + uint8 i=0; + if(Result==E_OK) + { + Set_SesCtrl(DCM_SESSION_EXTENDED_DIAGNOSTIC); + for(i=0;iresData[2]=(uint8)(gDcmDspSessionRow[0].DcmDspSessionP2ServerMax>>8); + pMsgContext->resData[3]=(uint8)(gDcmDspSessionRow[0].DcmDspSessionP2ServerMax); + tempP2Star=gDcmDspSessionRow[0].DcmDspSessionP2StarServerMax/10; + pMsgContext->resData[4]=(uint8)(tempP2Star>>8); + pMsgContext->resData[5]=(uint8)(tempP2Star); + pMsgContext->resDataLen=6; + #else + pMsgContext->resDataLen=2; + #endif + DsdInternal_ProcessingDone(pMsgContext); + } + else + { + DsdInternal_ProcessingDoneNoResponse(); + } +} + +/****************************************************************************** +* Name :App_KuweSessionPost +* Called by :Dcm +* Preconditions:N/A +* Parameters :Dcm_MsgContextType* pMsgContext +* Return code :N/A +* Description :Jump to default session once positive response is transmitted. +* Otherwise, do not change session type. +******************************************************************************/ +FUNC(void,DCM_CODE) App_Kuwe_SessionPost(Std_ReturnType Result) +{ + uint8 i=0; + if(Result==E_OK) + { + Set_SesCtrl(DCM_SESSION_USERDEFINED1); + for(i=0;iresDataLen=2; + DsdInternal_ProcessingDone(pMsgContext); + +} + +/****************************************************************************** +* Name :App_HardResetPost +* Called by :Dcm +* Preconditions:N/A +* Parameters :Std_ReturnType Result +* Return code :N/A +* Description : 51 01肯定響應發送成功之後，DCM將會調用本函數。當然ECU先前收到0x11 81診斷請求 +* 且app_hardresetpost的處理結果不是否定響應的話，本函數也會被調用。 +* 注意：帶有Post後綴的回調函數中，不能再調DsdInternal_ProcessingDone() 和 DsdInternal_SetNegResponse() +******************************************************************************/ +FUNC(void,DCM_CODE) App_HardResetPost(Std_ReturnType Result) +{ + uint8 i=0; + + if(Result==E_OK) + { + Set_SesCtrl(DCM_SESSION_DEFAULT); + + for(i=0;iresDataLen=2; + DsdInternal_ProcessingDone(pMsgContext); + +} + +/****************************************************************************** +* Name :App_SoftResetPost +* Called by :Dcm +* Preconditions:N/A +* Parameters :Std_ReturnType Result +* Return code :N/A +* Description : +******************************************************************************/ +FUNC(void,DCM_CODE) App_SoftResetPost(Std_ReturnType Result) +{ + uint8 i=0; + + if(Result==E_OK) + { + Set_SesCtrl(DCM_SESSION_DEFAULT); + + for(i=0;ireqData[1]; + dtc[1] = pMsgContext->reqData[2]; + dtc[2] = pMsgContext->reqData[3]; + + error = dem_clear_dtc(dtc); + + if(error == ERR_FAULT) + { + DsdInternal_SetNegResponse(pMsgContext,DCM_E_REQUESTOUTOFRANGE); + } + else if(error == ERR_OK) + { + + + pMsgContext->resDataLen=1; + DsdInternal_ProcessingDone(pMsgContext); + //clear you DTC information here + //DtcAndDidVarInit(EEPROM_DTC_CLEAR); + + } + else + { + //code + } + #else + + uint32 Dtc; + + Dtc=Make32Bit(pMsgContext->reqData[1],pMsgContext->reqData[2],pMsgContext->reqData[3]); + + for(i=0;iresDataLen=1; + DsdInternal_ProcessingDone(pMsgContext); + //clear you DTC information here + } + else + { + } + + #endif + +} +#endif + + +#if(DCM_SERVICE_22_ENABLED==STD_ON) +//#define EEPROM_DATA_Bs_ADDR (0x400) +//#define EEPROM_START_ADDRESS (0x7e0) +/****************************************************************************** +* Name :App_Read0xF100 +* Called by :Dcm +* Preconditions:N/A +* Parameters :Dcm_MsgContextType* pMsgContext +* Return code :N/A +* Description :activeDiagnosticSessionDataIdentifier,Data lenth=1 Byte +* +******************************************************************************/ +FUNC(void,DCM_CODE) App_Read0xF100(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext) +{ + //uint8 i; + u8 l_buf[SYSDID_ATTEMP_LEN+SYSDID_ATTEMP_MAX_LEN]; + //(void)nvm_read_bytes(NVM_TYPE_EEPROM,SYSDID_ATTEMP_ADDR,(u8*)&l_temp,SYSDID_ATTEMP_LEN); + cal_read_did(0xF100u,(u8*)&l_buf[0],SYSDID_ATTEMP_LEN+SYSDID_ATTEMP_MAX_LEN); + if( (l_buf[0]==0xffu) && (l_buf[1]==0xFFu) ) + { + l_buf[0]=0u; + l_buf[1]=0u; + } + pMsgContext->resData[2] =l_buf[0]; + pMsgContext->resData[3] =l_buf[1]; + pMsgContext->resData[4] =0xff; + pMsgContext->resData[5] =0xff; + + #if(DCM_SERVICE_22_COMBINED_DID==STD_ON) + DsdInternal_DidProcessingDone(); + #else + pMsgContext->resData+=(gDcmDsdSubService_22[ReadHandle_0xF100].DcmDspDataSize+2); + pMsgContext->resDataLen+=((uint32)gDcmDsdSubService_22[ReadHandle_0xF100].DcmDspDataSize+2); + DsdInternal_ProcessingDone(pMsgContext); + #endif +} + +/****************************************************************************** +* Name :App_Read0x01A0 +* Called by :Dcm +* Preconditions:N/A +* Parameters :Dcm_MsgContextType* pMsgContext +* Return code :N/A +* Description :activeDiagnosticSessionDataIdentifier,Data lenth=1 Byte +* +******************************************************************************/ +FUNC(void,DCM_CODE) App_Read0x01A0(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext) +{ + uint8 i; + cal_read_did(0x01A0u,(u8*)&DATA_0x01A0[0],SYSDID_MANUFAC_LIFECYCLE_COUNT_CK_LEN); + //(void)nvm_read_bytes(NVM_TYPE_EEPROM,SYSDID_MANUFAC_LIFECYCLE_COUNT_ADDR,(u8*)&DATA_0x01A0,SYSDID_MANUFAC_LIFECYCLE_COUNT_CK_LEN); + for(i=0;iresData[2+i]= DATA_0x01A0[i]; //*(s_pgm_dt+8); // //*s_pgm_dt; //data[8]; //pgm_count_date[0]; //*pdata; ///DATA_0x01A0[i]; + } + #if(DCM_SERVICE_22_COMBINED_DID==STD_ON) + DsdInternal_DidProcessingDone(); + #else + pMsgContext->resData+=(gDcmDsdSubService_22[ReadHandle_0x01A0].DcmDspDataSize+2); + pMsgContext->resDataLen+=((uint32)gDcmDsdSubService_22[ReadHandle_0x01A0].DcmDspDataSize+2); + DsdInternal_ProcessingDone(pMsgContext); + #endif +} + +/****************************************************************************** +* Name :App_Read0xF1A0 +* Called by :Dcm +* Preconditions:N/A +* Parameters :Dcm_MsgContextType* pMsgContext +* Return code :N/A +* Description :activeDiagnosticSessionDataIdentifier,Data lenth=1 Byte +* +******************************************************************************/ +FUNC(void,DCM_CODE) App_Read0xF1A0(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext) +{ + uint8 i; + cal_read_did(0xF1A0u,(u8*)&DATA_0xF1A0[0],SYSDID_VEHICLE_CONFIG_CK_LEN); + //(void)nvm_read_bytes(NVM_TYPE_EEPROM,SYSDID_MANUFAC_LIFECYCLE_COUNT_ADDR,(u8*)&DATA_0x01A0,SYSDID_MANUFAC_LIFECYCLE_COUNT_CK_LEN); + for(i=0;iresData[2+i]= DATA_0xF1A0[i]; //*(s_pgm_dt+8); // //*s_pgm_dt; //data[8]; //pgm_count_date[0]; //*pdata; ///DATA_0x01A0[i]; + } + #if(DCM_SERVICE_22_COMBINED_DID==STD_ON) + DsdInternal_DidProcessingDone(); + #else + pMsgContext->resData+=(gDcmDsdSubService_22[ReadHandle_0xF1A0].DcmDspDataSize+2); + pMsgContext->resDataLen+=((uint32)gDcmDsdSubService_22[ReadHandle_0xF1A0].DcmDspDataSize+2); + DsdInternal_ProcessingDone(pMsgContext); + #endif +} +/****************************************************************************** +* Name :App_Read0xb070 +* Called by :Dcm +* Preconditions:N/A +* Parameters :Dcm_MsgContextType* pMsgContext +* Return code :N/A +* Description :activeDiagnosticSessionDataIdentifier,Data lenth=1 Byte +* +******************************************************************************/ +FUNC(void,DCM_CODE) App_Read0xb070(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext) +{ + u16 l_sys_power; + u8 l_buf[4]; + l_sys_power = adc_manage_get_sbat_voltage(); + l_buf[0] = l_sys_power/10000; + l_buf[1] = (l_sys_power/1000)%10; + l_buf[2] = (l_sys_power/100)%10; + l_buf[3] = (l_sys_power/10)%10; + + pMsgContext->resData[2]= ((u8)l_buf[0]<<4u) | l_buf[1]; + pMsgContext->resData[3]= ((u8)l_buf[2]<<4u) | l_buf[3]; + + //l_sys_power = adc_manage_get_mdfd_vol(); + l_buf[0] = l_sys_power/10000; + l_buf[1] = (l_sys_power/1000)%10; + l_buf[2] = (l_sys_power/100)%10; + l_buf[3] = (l_sys_power/10)%10; + pMsgContext->resData[4]= ((u8)l_buf[0]<<4u) | l_buf[1]; + pMsgContext->resData[5]= ((u8)l_buf[2]<<4u) | l_buf[3]; + +#if(DCM_SERVICE_22_COMBINED_DID==STD_ON) + DsdInternal_DidProcessingDone(); +#else + pMsgContext->resData+=(gDcmDsdSubService_22[ReadHandle_0xb070].DcmDspDataSize+2); + pMsgContext->resDataLen+=((uint32)gDcmDsdSubService_22[ReadHandle_0xb070].DcmDspDataSize+2); + DsdInternal_ProcessingDone(pMsgContext); +#endif + +} + +/****************************************************************************** +* Name :App_Read0x0005_left_sws +* Called by :Dcm +* Preconditions:N/A +* Parameters :Dcm_MsgContextType* pMsgContext +* Return code :N/A +* Description :activeDiagnosticSessionDataIdentifier,Data lenth=1 Byte +* +******************************************************************************/ +FUNC(void,DCM_CODE) App_Read0x0005_left_sws(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext) +{ + + uint8 i; + u8 l_res; + DATA_0xB071[0] =0x00; + DATA_0xB071[1] =0x00; + DATA_0xB071[2] =0x00; + DATA_0xB071[3] =0x00; + DATA_0xB071[4] =0x00; + //motor_state = motor_driver_get_state(MOTOR_DRIVER_CHANNEL_ID_M); + l_res =0 ; + DATA_0xB071[0] = ((u8)key_app_get_digi_state(KEY_DIGI_ID_MUTE) << 1) | + ((u8)key_app_get_adc_state(KEY_ADC_ID_CUSTOM) << 2)| + //#endif + ((u8)key_app_get_digi_state(KEY_DIGI_ID_RMENU) << 3) | + + ((u8)key_app_get_adc_state(KEY_ADC_ID_RES_SPD_ADD) << 7); + DATA_0xB071[1]= (u8)key_app_get_adc_state(KEY_ADC_ID_SET_SPD_SUB) | ((u8)key_app_get_adc_state(KEY_ADC_ID_DSP_SUB) << 3) | ((u8)key_app_get_adc_state(KEY_ADC_ID_DSP_PLUS) << 4) ; + DATA_0xB071[4]= l_res | ((u8)key_app_get_adc_state(KEY_ADC_ID_LPICK) << 3) ; + + DATA_0xB071[0] = ~DATA_0xB071[0]; + DATA_0xB071[1] = ~DATA_0xB071[1]; + DATA_0xB071[4] = ~DATA_0xB071[4]; + for(i=0;iresData[2+i]=DATA_0xB071[i]; + } + +#if(DCM_SERVICE_22_COMBINED_DID==STD_ON) + DsdInternal_DidProcessingDone(); +#else + pMsgContext->resData+=(gDcmDsdSubService_22[ReadHandle_0xb071].DcmDspDataSize+2); + pMsgContext->resDataLen+=((uint32)gDcmDsdSubService_22[ReadHandle_0xb071].DcmDspDataSize+2); + DsdInternal_ProcessingDone(pMsgContext); +#endif +} + + +/****************************************************************************** +* Name :App_Read0x0005_left_sws +* Called by :Dcm +* Preconditions:N/A +* Parameters :Dcm_MsgContextType* pMsgContext +* Return code :N/A +* Description :activeDiagnosticSessionDataIdentifier,Data lenth=1 Byte +* +******************************************************************************/ +FUNC(void,DCM_CODE) App_Read0x0003_net_type(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext) +{ + + + //for(i=0;iresData[2]=can_app_get_bcml_nm_type_logic(); + // pMsgContext->resData[3]=can_app_get_bcml_nm_type_flag()>>8; + // pMsgContext->resData[4]=can_app_get_bcml_nm_type_flag(); + // pMsgContext->resData[5]=eeprom_ext_get_state(0); + // pMsgContext->resData[6]=eeprom_ext_get_state(1); + #else //测试用 + pMsgContext->resData[2]=rmu_get_value(0); + pMsgContext->resData[3]=rmu_get_value(1); + pMsgContext->resData[4]=rmu_get_value(2); + #endif + } +#if(DCM_SERVICE_22_COMBINED_DID==STD_ON) + DsdInternal_DidProcessingDone(); +#else + pMsgContext->resData+=(gDcmDsdSubService_22[ReadHandle_0x0003].DcmDspDataSize+2); + pMsgContext->resDataLen+=((uint32)gDcmDsdSubService_22[ReadHandle_0x0003].DcmDspDataSize+2); + DsdInternal_ProcessingDone(pMsgContext); +#endif +} + + +/****************************************************************************** +* Name :App_Read0x0004_right_sws +* Called by :Dcm +* Preconditions:N/A +* Parameters :Dcm_MsgContextType* pMsgContext +* Return code :N/A +* Description :activeDiagnosticSessionDataIdentifier,Data lenth=1 Byte +* +******************************************************************************/ +FUNC(void,DCM_CODE) App_Read0x0004_right_sws(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext) +{ + uint8 i; + u8 l_res; + u8 voice=0; + u8 voice_up=0; + u8 voice_down=0; + DATA_0xB072[0] =0x00; + DATA_0xB072[1] =0x00; + + voice= key_encoder_get_event(); + if(voice == KEY_ENCODER_EVENT_UP) + { + voice_up = KEY_APP_INPUT_VALID; + voice_down = KEY_APP_INPUT_NULL; + } + else if(voice == KEY_ENCODER_EVENT_DOWN) + { + voice_up = KEY_APP_INPUT_NULL; + voice_down = KEY_APP_INPUT_VALID; + } + else + { + voice_up = KEY_APP_INPUT_NULL; + voice_down = KEY_APP_INPUT_NULL; + } + l_res = 0; + DATA_0xB072[0]= voice_up | voice_down << 1 | ((u8)key_app_get_digi_state(KEY_DIGI_ID_PREV) << 2) | ((u8)key_app_get_digi_state(KEY_DIGI_ID_NEXT) << 3) + | ((u8)key_app_get_digi_state(KEY_DIGI_ID_PHONE) << 5); + + DATA_0xB072[1]= l_res | ((u8)key_app_get_digi_state(KEY_DIGI_ID_VOICE) << 1) | ((u8)key_app_get_adc_state(KEY_ADC_ID_VEDIO) <<6); + + DATA_0xB072[0] = ~DATA_0xB072[0]; + DATA_0xB072[1] = ~DATA_0xB072[1]; + + for(i=0;iresData[2+i]=DATA_0xB072[i]; + } +#if(DCM_SERVICE_22_COMBINED_DID==STD_ON) + DsdInternal_DidProcessingDone(); +#else + pMsgContext->resData+=(gDcmDsdSubService_22[ReadHandle_0xb072].DcmDspDataSize+2); + pMsgContext->resDataLen+=((uint32)gDcmDsdSubService_22[ReadHandle_0xb072].DcmDspDataSize+2); + DsdInternal_ProcessingDone(pMsgContext); +#endif +} + +/****************************************************************************** +* Name :App_Read0x0008_right_pick +* Called by :Dcm +* Preconditions:N/A +* Parameters :Dcm_MsgContextType* pMsgContext +* Return code :N/A +* Description :activeDiagnosticSessionDataIdentifier,Data lenth=1 Byte +* +******************************************************************************/ +FUNC(void,DCM_CODE) App_Read0x0008_right_pick(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext) +{ + uint8 i; + u8 l_res; + DATA_0xB073[0] =0x00; + DATA_0xB073[1] =0x00; + DATA_0xB073[2] =0x00; + DATA_0xB073[3] =0x00; + DATA_0xB073[4] =0x00; + l_res = 0; + DATA_0xB073[4]= l_res | ((u8)key_app_get_digi_state(KEY_DIGI_ID_RPICK) << 2) ; + + DATA_0xB073[4] = ~DATA_0xB073[4]; + + for(i=0;iresData[2+i]=DATA_0xB073[i]; + } +#if(DCM_SERVICE_22_COMBINED_DID==STD_ON) + DsdInternal_DidProcessingDone(); +#else + pMsgContext->resData+=(gDcmDsdSubService_22[ReadHandle_0xb073].DcmDspDataSize+2); + pMsgContext->resDataLen+=((uint32)gDcmDsdSubService_22[ReadHandle_0xb073].DcmDspDataSize+2); + DsdInternal_ProcessingDone(pMsgContext); +#endif +} + +/****************************************************************************** +* Name :App_Read0xB101_right_pick +* Called by :Dcm +* Preconditions:N/A +* Parameters :Dcm_MsgContextType* pMsgContext +* Return code :N/A +* Description :activeDiagnosticSessionDataIdentifier,Data lenth=1 Byte +* +******************************************************************************/ +FUNC(void,DCM_CODE) App_Read0xB101_left_menu(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext) +{ + uint8 i; + u8 l_res; + DATA_0xB074[0] =0x00; + l_res = 0; + DATA_0xB074[0]=(u8)key_app_get_adc_state(KEY_ADC_ID_LMENU); + + DATA_0xB074[0] = ~DATA_0xB074[0]; + + for(i=0;iresData[2+i]=DATA_0xB074[i]; + } +#if(DCM_SERVICE_22_COMBINED_DID==STD_ON) + DsdInternal_DidProcessingDone(); +#else + pMsgContext->resData+=(gDcmDsdSubService_22[ReadHandle_0xb074].DcmDspDataSize+2); + pMsgContext->resDataLen+=((uint32)gDcmDsdSubService_22[ReadHandle_0xb074].DcmDspDataSize+2); + DsdInternal_ProcessingDone(pMsgContext); +#endif +} + +/****************************************************************************** +* Name :App_Read0xb073 +* Called by :Dcm +* Preconditions:N/A +* Parameters :Dcm_MsgContextType* pMsgContext +* Return code :N/A +* Description :activeDiagnosticSessionDataIdentifier,Data lenth=1 Byte +* +******************************************************************************/ +FUNC(void,DCM_CODE) App_Read0xb073(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext) +{ + + uint8 i; + +// motor_driver_feedback(MOTOR_DRIVER_CHANNEL_ID_M,&DATA_0xB073[0]); + + for(i=0;iresData[2+i]=DATA_0xB073[i]; + } +#if(DCM_SERVICE_22_COMBINED_DID==STD_ON) + DsdInternal_DidProcessingDone(); +#else + pMsgContext->resData+=(gDcmDsdSubService_22[ReadHandle_0xb073].DcmDspDataSize+2); + pMsgContext->resDataLen+=((uint32)gDcmDsdSubService_22[ReadHandle_0xb073].DcmDspDataSize+2); + DsdInternal_ProcessingDone(pMsgContext); +#endif +} + +/****************************************************************************** +* Name :App_Read0xb074 +* Called by :Dcm +* Preconditions:N/A +* Parameters :Dcm_MsgContextType* pMsgContext +* Return code :N/A +* Description :activeDiagnosticSessionDataIdentifier,Data lenth=1 Byte +* +******************************************************************************/ +FUNC(void,DCM_CODE) App_Read0xb074(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext) +{ + + uint8 i; +// DATA_0xB074[0]=led_driver_get_cmd(LED_ID_ILL); + for(i=0;iresData[2+i]=DATA_0xB074[i]; + } + #if(DCM_SERVICE_22_COMBINED_DID==STD_ON) + DsdInternal_DidProcessingDone(); + #else + pMsgContext->resData+=(gDcmDsdSubService_22[ReadHandle_0xb074].DcmDspDataSize+2); + pMsgContext->resDataLen+=((uint32)gDcmDsdSubService_22[ReadHandle_0xb074].DcmDspDataSize+2); + DsdInternal_ProcessingDone(pMsgContext); + #endif +} + +/****************************************************************************** +* Name :App_Read0xb075 +* Called by :Dcm +* Preconditions:N/A +* Parameters :Dcm_MsgContextType* pMsgContext +* Return code :N/A +* Description :activeDiagnosticSessionDataIdentifier,Data lenth=1 Byte +* +******************************************************************************/ +FUNC(void,DCM_CODE) App_Read0xb075(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext) +{ + + uint8 i; +// DATA_0xB075[0]=led_driver_get_level(LED_ID_ILL); + for(i=0;iresData[2+i]=DATA_0xB075[i]; + } + #if(DCM_SERVICE_22_COMBINED_DID==STD_ON) + DsdInternal_DidProcessingDone(); + #else + pMsgContext->resData+=(gDcmDsdSubService_22[ReadHandle_0xb075].DcmDspDataSize+2); + pMsgContext->resDataLen+=((uint32)gDcmDsdSubService_22[ReadHandle_0xb075].DcmDspDataSize+2); + DsdInternal_ProcessingDone(pMsgContext); + #endif +} + +/****************************************************************************** +* Name :App_Read0xA030 +* Called by :Dcm +* Preconditions:N/A +* Parameters :Dcm_MsgContextType* pMsgContext +* Return code :N/A +* Description :activeDiagnosticSessionDataIdentifier,Data lenth=1 Byte +* +******************************************************************************/ +FUNC(void,DCM_CODE) App_Read0xA030(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext) +{ + uint8 i; + u8 len=POWER_SUPPLY_HIS_MAX; + power_supply_history_s l_his[POWER_SUPPLY_HIS_MAX]; + fault_detect_get_power_history(&l_his[0],&len); + for(i=0;iresData[2+i]=DATA_0xA030[i]; + } + #if(DCM_SERVICE_22_COMBINED_DID==STD_ON) + DsdInternal_DidProcessingDone(); + #else + pMsgContext->resData+=(gDcmDsdSubService_22[ReadHandle_0xA030].DcmDspDataSize+2); + pMsgContext->resDataLen+=((uint32)gDcmDsdSubService_22[ReadHandle_0xA030].DcmDspDataSize+2); + DsdInternal_ProcessingDone(pMsgContext); + #endif +} + +/****************************************************************************** +* Name :App_Read0xF1F2 +* Called by :Dcm +* Preconditions:N/A +* Parameters :Dcm_MsgContextType* pMsgContext +* Return code :N/A +* Description :activeDiagnosticSessionDataIdentifier,Data lenth=1 Byte +* +******************************************************************************/ +FUNC(void,DCM_CODE) App_Read0xF1F2(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext) +{ + + uint8 i; + //(void)flash_read_bytes(SYSDID_F1F2_ADDR,DATA_0xF1F2,SYSDID_F1F2_CK_LEN); + cal_read_did(0xF1F2u,(u8*)&DATA_0xF1F2[0],SYSDID_F1F2_CK_LEN); + for(i=0;iresData[2+i]=DATA_0xF1F2[i]; + } + #if(DCM_SERVICE_22_COMBINED_DID==STD_ON) + DsdInternal_DidProcessingDone(); + #else + pMsgContext->resData+=(gDcmDsdSubService_22[ReadHandle_0xF1F2].DcmDspDataSize+2); + pMsgContext->resDataLen+=((uint32)gDcmDsdSubService_22[ReadHandle_0xF1F2].DcmDspDataSize+2); + DsdInternal_ProcessingDone(pMsgContext); + #endif +} + +/****************************************************************************** +* Name :App_Read0xF1F1 +* Called by :Dcm +* Preconditions:N/A +* Parameters :Dcm_MsgContextType* pMsgContext +* Return code :N/A +* Description :activeDiagnosticSessionDataIdentifier,Data lenth=1 Byte +* +******************************************************************************/ +FUNC(void,DCM_CODE) App_Read0xF1F1(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext) +{ + + uint8 i; + cal_read_did(0xF1F1u,(u8*)&DATA_0xF1F1[0],SYSDID_F1F1_CK_LEN); + for(i=0;iresData[2+i]=DATA_0xF1F1[i]; + } + #if(DCM_SERVICE_22_COMBINED_DID==STD_ON) + DsdInternal_DidProcessingDone(); + #else + pMsgContext->resData+=(gDcmDsdSubService_22[ReadHandle_0xF1F1].DcmDspDataSize+2); + pMsgContext->resDataLen+=((uint32)gDcmDsdSubService_22[ReadHandle_0xF1F1].DcmDspDataSize+2); + DsdInternal_ProcessingDone(pMsgContext); + #endif +} + +/****************************************************************************** +* Name :App_Read0xF19E +* Called by :Dcm +* Preconditions:N/A +* Parameters :Dcm_MsgContextType* pMsgContext +* Return code :N/A +* Description :activeDiagnosticSessionDataIdentifier,Data lenth=1 Byte +* +******************************************************************************/ +FUNC(void,DCM_CODE) App_Read0xF19E(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext) +{ + + uint8 i; + cal_read_did(0xF19Eu,(u8*)&DATA_0xF19E[0],SYSDID_F19E_CK_LEN); + for(i=0;iresData[2+i]=DATA_0xF19E[i]; + } + #if(DCM_SERVICE_22_COMBINED_DID==STD_ON) + DsdInternal_DidProcessingDone(); + #else + pMsgContext->resData+=(gDcmDsdSubService_22[ReadHandle_0xF19E].DcmDspDataSize+2); + pMsgContext->resDataLen+=((uint32)gDcmDsdSubService_22[ReadHandle_0xF19E].DcmDspDataSize+2); + DsdInternal_ProcessingDone(pMsgContext); + #endif +} + +/****************************************************************************** +* Name :App_Read0xF194 +* Called by :Dcm +* Preconditions:N/A +* Parameters :Dcm_MsgContextType* pMsgContext +* Return code :N/A +* Description :activeDiagnosticSessionDataIdentifier,Data lenth=1 Byte +* +******************************************************************************/ +FUNC(void,DCM_CODE) App_Read0xF194(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext) +{ + + uint8 i; + cal_read_did(0xF194u,(u8*)&DATA_0xF194[0],SYSDID_F194_CK_LEN); + for(i=0;iresData[2+i]=DATA_0xF194[i]; + } + #if(DCM_SERVICE_22_COMBINED_DID==STD_ON) + DsdInternal_DidProcessingDone(); + #else + pMsgContext->resData+=(gDcmDsdSubService_22[ReadHandle_0xF194].DcmDspDataSize+2); + pMsgContext->resDataLen+=((uint32)gDcmDsdSubService_22[ReadHandle_0xF194].DcmDspDataSize+2); + DsdInternal_ProcessingDone(pMsgContext); + #endif +} + +/****************************************************************************** +* Name :App_Read0xF192 +* Called by :Dcm +* Preconditions:N/A +* Parameters :Dcm_MsgContextType* pMsgContext +* Return code :N/A +* Description :activeDiagnosticSessionDataIdentifier,Data lenth=1 Byte +* +******************************************************************************/ +FUNC(void,DCM_CODE) App_Read0xF192(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext) +{ + + uint8 i; + cal_read_did(0xF192u,(u8*)&DATA_0xF192[0],SYSDID_F192_CK_LEN); + for(i=0;iresData[2+i]=DATA_0xF192[i]; + } + #if(DCM_SERVICE_22_COMBINED_DID==STD_ON) + DsdInternal_DidProcessingDone(); + #else + pMsgContext->resData+=(gDcmDsdSubService_22[ReadHandle_0xF192].DcmDspDataSize+2); + pMsgContext->resDataLen+=((uint32)gDcmDsdSubService_22[ReadHandle_0xF192].DcmDspDataSize+2); + DsdInternal_ProcessingDone(pMsgContext); + #endif +} + +/****************************************************************************** +* Name :App_Read0xF191 +* Called by :Dcm +* Preconditions:N/A +* Parameters :Dcm_MsgContextType* pMsgContext +* Return code :N/A +* Description :activeDiagnosticSessionDataIdentifier,Data lenth=1 Byte +* +******************************************************************************/ +FUNC(void,DCM_CODE) App_Read0xF191(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext) +{ + uint8 i; + cal_read_did(0xF191u,(u8*)&DATA_0xF191[0],SYSDID_F191_CK_LEN); + for(i=0;iresData[2+i]=DATA_0xF191[i]; + } + #if(DCM_SERVICE_22_COMBINED_DID==STD_ON) + DsdInternal_DidProcessingDone(); + #else + pMsgContext->resData+=(gDcmDsdSubService_22[ReadHandle_0xF191].DcmDspDataSize+2); + pMsgContext->resDataLen+=((uint32)gDcmDsdSubService_22[ReadHandle_0xF191].DcmDspDataSize+2); + DsdInternal_ProcessingDone(pMsgContext); + #endif +} + +/****************************************************************************** +* Name :App_Read0xF188 +* Called by :Dcm +* Preconditions:N/A +* Parameters :Dcm_MsgContextType* pMsgContext +* Return code :N/A +* Description :activeDiagnosticSessionDataIdentifier,Data lenth=1 Byte +* +******************************************************************************/ +FUNC(void,DCM_CODE) App_Read0xF188(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext) +{ + + uint8 i; + cal_read_did(0xF188u,(u8*)&DATA_0xF188[0],SYSDID_F188_CK_LEN); + for(i=0;iresData[2+i]=DATA_0xF188[i]; + } + #if(DCM_SERVICE_22_COMBINED_DID==STD_ON) + DsdInternal_DidProcessingDone(); + #else + pMsgContext->resData+=(gDcmDsdSubService_22[ReadHandle_0xF188].DcmDspDataSize+2); + pMsgContext->resDataLen+=((uint32)gDcmDsdSubService_22[ReadHandle_0xF188].DcmDspDataSize+2); + DsdInternal_ProcessingDone(pMsgContext); + #endif +} + +/****************************************************************************** +* Name :App_Read0xF181 +* Called by :Dcm +* Preconditions:N/A +* Parameters :Dcm_MsgContextType* pMsgContext +* Return code :N/A +* Description :activeDiagnosticSessionDataIdentifier,Data lenth=1 Byte +* +******************************************************************************/ +FUNC(void,DCM_CODE) App_Read0xF181(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext) +{ + uint8 i; + //(void)flash_read_bytes(SYSDID_F181_ADDR,DATA_0xF181,SYSDID_F181_CK_LEN); + cal_read_did(0xF181u,(u8*)&DATA_0xF181[0],SYSDID_F181_CK_LEN); + for(i=0;iresData[2+i]=DATA_0xF181[i]; + } +#if(DCM_SERVICE_22_COMBINED_DID==STD_ON) + DsdInternal_DidProcessingDone(); +#else + pMsgContext->resData+=(gDcmDsdSubService_22[ReadHandle_0xF181].DcmDspDataSize+2); + pMsgContext->resDataLen+=((uint32)gDcmDsdSubService_22[ReadHandle_0xF181].DcmDspDataSize+2); + DsdInternal_ProcessingDone(pMsgContext); +#endif +} + +/****************************************************************************** +* Name :App_Read0xF182 +* Called by :Dcm +* Preconditions:N/A +* Parameters :Dcm_MsgContextType* pMsgContext +* Return code :N/A +* Description :activeDiagnosticSessionDataIdentifier,Data lenth=1 Byte +* +******************************************************************************/ +FUNC(void,DCM_CODE) App_Read0xF182(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext) +{ + + uint8 i; + //flash_read_bytes(SYSDID_F182_ADDR,DATA_0xF182,SYSDID_F182_CK_LEN); + //common_memory_copys(DATA_0xF182,(u8*)&g_sysdid_f182,SYSDID_F182_LEN); + cal_read_did(0xF182u,(u8*)&DATA_0xF182[0],SYSDID_F182_CK_LEN); + for(i=0;iresData[2+i]=DATA_0xF182[i]; + } + #if(DCM_SERVICE_22_COMBINED_DID==STD_ON) + DsdInternal_DidProcessingDone(); + #else + pMsgContext->resData+=(gDcmDsdSubService_22[ReadHandle_0xF182].DcmDspDataSize+2); + pMsgContext->resDataLen+=((uint32)gDcmDsdSubService_22[ReadHandle_0xF182].DcmDspDataSize+2); + DsdInternal_ProcessingDone(pMsgContext); + #endif +} + +/****************************************************************************** +* Name :App_Read0xF180 +* Called by :Dcm +* Preconditions:N/A +* Parameters :Dcm_MsgContextType* pMsgContext +* Return code :N/A +* Description :activeDiagnosticSessionDataIdentifier,Data lenth=1 Byte +* +******************************************************************************/ +FUNC(void,DCM_CODE) App_Read0xF180(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext) +{ + + uint8 i; + //(void)flash_read_bytes(SYSDID_F180_ADDR,DATA_0xF180,SYSDID_F180_CK_LEN); + cal_read_did(0xF180u,(u8*)&DATA_0xF180[0],SYSDID_F180_CK_LEN); + for(i=0;iresData[2+i]=DATA_0xF180[i]; + } + #if(DCM_SERVICE_22_COMBINED_DID==STD_ON) + DsdInternal_DidProcessingDone(); + #else + pMsgContext->resData+=(gDcmDsdSubService_22[ReadHandle_0xF180].DcmDspDataSize+2); + pMsgContext->resDataLen+=((uint32)gDcmDsdSubService_22[ReadHandle_0xF180].DcmDspDataSize+2); + DsdInternal_ProcessingDone(pMsgContext); + #endif +} + +/****************************************************************************** +* Name :App_Read0xF186 +* Called by :Dcm +* Preconditions:N/A +* Parameters :Dcm_MsgContextType* pMsgContext +* Return code :N/A +* Description :activeDiagnosticSessionDataIdentifier,Data lenth=1 Byte +* +******************************************************************************/ +FUNC(void,DCM_CODE) App_Read0xF186(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext) +{ + + uint8 i; + + DATA_0xF186[0] = 0xFF; + if (gSesCtrlType == DCM_SESSION_DEFAULT) + { + DATA_0xF186[0] = 0x01; + } + else if (gSesCtrlType == DCM_SESSION_PROGRAMMING) + { + DATA_0xF186[0] = 0x02; + } + else if (gSesCtrlType == DCM_SESSION_EXTENDED_DIAGNOSTIC) + { + DATA_0xF186[0] = 0x03; + } + else if (gSesCtrlType == DCM_SESSION_USERDEFINED1) + { + DATA_0xF186[0] = 0x60; + } + else + { + //code + } + + for(i=0;iresData[2+i]=DATA_0xF186[i]; + } + #if(DCM_SERVICE_22_COMBINED_DID==STD_ON) + DsdInternal_DidProcessingDone(); + #else + pMsgContext->resData+=(gDcmDsdSubService_22[ReadHandle_0xF186].DcmDspDataSize+2); + pMsgContext->resDataLen+=((uint32)gDcmDsdSubService_22[ReadHandle_0xF186].DcmDspDataSize+2); + DsdInternal_ProcessingDone(pMsgContext); + #endif +} + +/****************************************************************************** +* Name :App_Read0xF187 +* Called by :Dcm +* Preconditions:N/A +* Parameters :Dcm_MsgContextType* pMsgContext +* Return code :N/A +* Description :activeDiagnosticSessionDataIdentifier,Data lenth=1 Byte +* +******************************************************************************/ +FUNC(void,DCM_CODE) App_Read0xF187(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext) +{ + + uint8 i; + cal_read_did(0xF187u,(u8*)&DATA_0xF187[0],SYSDID_F187_CK_LEN); + for(i=0;iresData[2+i]=DATA_0xF187[i]; + } + #if(DCM_SERVICE_22_COMBINED_DID==STD_ON) + DsdInternal_DidProcessingDone(); + #else + pMsgContext->resData+=(gDcmDsdSubService_22[ReadHandle_0xF187].DcmDspDataSize+2); + pMsgContext->resDataLen+=((uint32)gDcmDsdSubService_22[ReadHandle_0xF187].DcmDspDataSize+2); + DsdInternal_ProcessingDone(pMsgContext); + #endif +} + +/****************************************************************************** +* Name :App_Read0xF189 +* Called by :Dcm +* Preconditions:N/A +* Parameters :Dcm_MsgContextType* pMsgContext +* Return code :N/A +* Description :activeDiagnosticSessionDataIdentifier,Data lenth=1 Byte +* +******************************************************************************/ +FUNC(void,DCM_CODE) App_Read0xF189(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext) +{ + + uint8 i; + #if 1 + (void)cal_read_did(0xF189,DATA_0xF189,sizeof(DATA_0xF189)); + #else + DATA_0xF189[0]=0x89; + #endif + for(i=0;iresData[2+i]=DATA_0xF189[i]; + } + #if(DCM_SERVICE_22_COMBINED_DID==STD_ON) + DsdInternal_DidProcessingDone(); + #else + pMsgContext->resData+=(gDcmDsdSubService_22[ReadHandle_0xF189].DcmDspDataSize+2); + pMsgContext->resDataLen+=((uint32)gDcmDsdSubService_22[ReadHandle_0xF189].DcmDspDataSize+2); + DsdInternal_ProcessingDone(pMsgContext); + #endif +} + +/****************************************************************************** +* Name :App_Read0xF18A +* Called by :Dcm +* Preconditions:N/A +* Parameters :Dcm_MsgContextType* pMsgContext +* Return code :N/A +* Description :activeDiagnosticSessionDataIdentifier,Data lenth=1 Byte +* +******************************************************************************/ +FUNC(void,DCM_CODE) App_Read0xF18A(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext) +{ + + uint8 i; + cal_read_did(0xF18Au,(u8*)&DATA_0xF18A[0],SYSDID_F18A_CK_LEN); + for(i=0;iresData[2+i]=DATA_0xF18A[i]; + } + #if(DCM_SERVICE_22_COMBINED_DID==STD_ON) + DsdInternal_DidProcessingDone(); + #else + pMsgContext->resData+=(gDcmDsdSubService_22[ReadHandle_0xF18A].DcmDspDataSize+2); + pMsgContext->resDataLen+=((uint32)gDcmDsdSubService_22[ReadHandle_0xF18A].DcmDspDataSize+2); + DsdInternal_ProcessingDone(pMsgContext); + #endif +} + +/****************************************************************************** +* Name :App_Read0xF18B +* Called by :Dcm +* Preconditions:N/A +* Parameters :Dcm_MsgContextType* pMsgContext +* Return code :N/A +* Description :activeDiagnosticSessionDataIdentifier,Data lenth=1 Byte +* +******************************************************************************/ +FUNC(void,DCM_CODE) App_Read0xF18B(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext) +{ + + uint8 i; + cal_read_did(0xF18Bu,(u8*)&DATA_0xF18B[0],SYSDID_F18B_CK_LEN); + for(i=0;iresData[2+i]=DATA_0xF18B[i]; + } + #if(DCM_SERVICE_22_COMBINED_DID==STD_ON) + DsdInternal_DidProcessingDone(); + #else + pMsgContext->resData+=(gDcmDsdSubService_22[ReadHandle_0xF18B].DcmDspDataSize+2); + pMsgContext->resDataLen+=((uint32)gDcmDsdSubService_22[ReadHandle_0xF18B].DcmDspDataSize+2); + DsdInternal_ProcessingDone(pMsgContext); + #endif +} + +/****************************************************************************** +* Name :App_Read0xF18C +* Called by :Dcm +* Preconditions:N/A +* Parameters :Dcm_MsgContextType* pMsgContext +* Return code :N/A +* Description :activeDiagnosticSessionDataIdentifier,Data lenth=1 Byte +* +******************************************************************************/ +FUNC(void,DCM_CODE) App_Read0xF18C(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext) +{ + + uint8 i; + cal_read_did(0xF18Cu,(u8*)&DATA_0xF18C[0],SYSDID_F18C_CK_LEN); + for(i=0;iresData[2+i]=DATA_0xF18C[i]; + } + #if(DCM_SERVICE_22_COMBINED_DID==STD_ON) + DsdInternal_DidProcessingDone(); + #else + pMsgContext->resData+=(gDcmDsdSubService_22[ReadHandle_0xF18C].DcmDspDataSize+2); + pMsgContext->resDataLen+=((uint32)gDcmDsdSubService_22[ReadHandle_0xF18C].DcmDspDataSize+2); + DsdInternal_ProcessingDone(pMsgContext); + #endif +} + +/****************************************************************************** +* Name :App_Read0xF190 +* Called by :Dcm +* Preconditions:N/A +* Parameters :Dcm_MsgContextType* pMsgContext +* Return code :N/A +* Description :activeDiagnosticSessionDataIdentifier,Data lenth=1 Byte +* +******************************************************************************/ +FUNC(void,DCM_CODE) App_Read0xF190(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext) +{ + + uint8 i; + cal_read_did(0xF190u,(u8*)&DATA_0xF190[0],SYSDID_F190_VIN_CK_LEN); + for(i=0;iresData[2+i]=DATA_0xF190[i]; + } + #if(DCM_SERVICE_22_COMBINED_DID==STD_ON) + DsdInternal_DidProcessingDone(); + #else + pMsgContext->resData+=(gDcmDsdSubService_22[ReadHandle_0xF190].DcmDspDataSize+2); + pMsgContext->resDataLen+=((uint32)gDcmDsdSubService_22[ReadHandle_0xF190].DcmDspDataSize+2); + DsdInternal_ProcessingDone(pMsgContext); + #endif +} + +/****************************************************************************** +* Name :App_Read0xF193 +* Called by :Dcm +* Preconditions:N/A +* Parameters :Dcm_MsgContextType* pMsgContext +* Return code :N/A +* Description :activeDiagnosticSessionDataIdentifier,Data lenth=1 Byte +* +******************************************************************************/ +FUNC(void,DCM_CODE) App_Read0xF193(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext) +{ + + uint8 i; + cal_read_did(0xF193u,(u8*)&DATA_0xF193[0],SYSDID_F193_CK_LEN); + for(i=0;iresData[2+i]=DATA_0xF193[i]; + } + #if(DCM_SERVICE_22_COMBINED_DID==STD_ON) + DsdInternal_DidProcessingDone(); + #else + pMsgContext->resData+=(gDcmDsdSubService_22[ReadHandle_0xF193].DcmDspDataSize+2); + pMsgContext->resDataLen+=((uint32)gDcmDsdSubService_22[ReadHandle_0xF193].DcmDspDataSize+2); + DsdInternal_ProcessingDone(pMsgContext); + #endif +} + +/****************************************************************************** +* Name :App_Read0xF195 +* Called by :Dcm +* Preconditions:N/A +* Parameters :Dcm_MsgContextType* pMsgContext +* Return code :N/A +* Description :activeDiagnosticSessionDataIdentifier,Data lenth=1 Byte +* +******************************************************************************/ +FUNC(void,DCM_CODE) App_Read0xF195(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext) +{ + + uint8 i; + cal_read_did(0xF195u,(u8*)&DATA_0xF195[0],SYSDID_F195_CK_LEN); + for(i=0;iresData[2+i]= DATA_0xF195[i]; + } + #if(DCM_SERVICE_22_COMBINED_DID==STD_ON) + DsdInternal_DidProcessingDone(); + #else + pMsgContext->resData+=(gDcmDsdSubService_22[ReadHandle_0xF195].DcmDspDataSize+2); + pMsgContext->resDataLen+=((uint32)gDcmDsdSubService_22[ReadHandle_0xF195].DcmDspDataSize+2); + DsdInternal_ProcessingDone(pMsgContext); + #endif +} + +/****************************************************************************** +* Name :App_Read0xF197 +* Called by :Dcm +* Preconditions:N/A +* Parameters :Dcm_MsgContextType* pMsgContext +* Return code :N/A +* Description :activeDiagnosticSessionDataIdentifier,Data lenth=1 Byte +* +******************************************************************************/ +FUNC(void,DCM_CODE) App_Read0xF197(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext) +{ + + uint8 i; + #if 1 + (void)cal_read_did(0xF197,DATA_0xF197,sizeof(DATA_0xF197)); + #else + DATA_0xF197[0]=0x97; + #endif + for(i=0;iresData[2+i]=DATA_0xF197[i]; + } + #if(DCM_SERVICE_22_COMBINED_DID==STD_ON) + DsdInternal_DidProcessingDone(); + #else + pMsgContext->resData+=(gDcmDsdSubService_22[ReadHandle_0xF197].DcmDspDataSize+2); + pMsgContext->resDataLen+=((uint32)gDcmDsdSubService_22[ReadHandle_0xF197].DcmDspDataSize+2); + DsdInternal_ProcessingDone(pMsgContext); + #endif +} + +/****************************************************************************** +* Name :App_Read0xF198 +* Called by :Dcm +* Preconditions:N/A +* Parameters :Dcm_MsgContextType* pMsgContext +* Return code :N/A +* Description :activeDiagnosticSessionDataIdentifier,Data lenth=1 Byte +* +******************************************************************************/ + +FUNC(void,DCM_CODE) App_Read0xF198(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext) +{ + uint8 i; + cal_read_did(0xF198u,(u8*)&DATA_0xF198[0],SYSDID_F198_REPAIR_SN_CK_LEN); + for(i=0;iresData[2+i]= DATA_0xF198[i]; //DATA_0xF198[i]; + } + #if(DCM_SERVICE_22_COMBINED_DID==STD_ON) + DsdInternal_DidProcessingDone(); + #else + pMsgContext->resData+=(gDcmDsdSubService_22[ReadHandle_0xF198].DcmDspDataSize+2); + pMsgContext->resDataLen+=((uint32)gDcmDsdSubService_22[ReadHandle_0xF198].DcmDspDataSize+2); + DsdInternal_ProcessingDone(pMsgContext); + #endif +} + +/****************************************************************************** +* Name :App_Read0xF199 +* Called by :Dcm +* Preconditions:N/A +* Parameters :Dcm_MsgContextType* pMsgContext +* Return code :N/A +* Description :activeDiagnosticSessionDataIdentifier,Data lenth=1 Byte +* +******************************************************************************/ +FUNC(void,DCM_CODE) App_Read0xF199(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext) +{ + uint8 i; + cal_read_did(0xF199u,(u8*)&DATA_0xF199[0],SYSDID_F199_DATE_CK_LEN); + for(i=0;iresData[2+i] = DATA_0xF199[i]; //data[i+10]; // pgm_count_date[2+i]; //*pdata; //DATA_0xF199[i]; + } + #if(DCM_SERVICE_22_COMBINED_DID==STD_ON) + DsdInternal_DidProcessingDone(); + #else + pMsgContext->resData+=(gDcmDsdSubService_22[ReadHandle_0xF199].DcmDspDataSize+2); + pMsgContext->resDataLen+=((uint32)gDcmDsdSubService_22[ReadHandle_0xF199].DcmDspDataSize+2); + DsdInternal_ProcessingDone(pMsgContext); + #endif +} + +/****************************************************************************** +* Name :App_Read0xF19D +* Called by :Dcm +* Preconditions:N/A +* Parameters :Dcm_MsgContextType* pMsgContext +* Return code :N/A +* Description :activeDiagnosticSessionDataIdentifier,Data lenth=1 Byte +* +******************************************************************************/ +FUNC(void,DCM_CODE) App_Read0xF19D(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext) +{ + + uint8 i; + #if 1 + (void)cal_read_did(0xF19d,DATA_0xF19D,sizeof(DATA_0xF19D)); + #endif + for(i=0;iresData[2+i]=DATA_0xF19D[i]; + } + #if(DCM_SERVICE_22_COMBINED_DID==STD_ON) + DsdInternal_DidProcessingDone(); + #else + pMsgContext->resData+=(gDcmDsdSubService_22[ReadHandle_0xF19D].DcmDspDataSize+2); + pMsgContext->resDataLen+=((uint32)gDcmDsdSubService_22[ReadHandle_0xF19D].DcmDspDataSize+2); + DsdInternal_ProcessingDone(pMsgContext); + #endif +} + +#endif +#if(DCM_SERVICE_2E_ENABLED==STD_ON) +/****************************************************************************** +* Name :App_Write0x01A0 +* Called by :Dcm +* Preconditions:N/A +* Parameters :Dcm_MsgContextType* pMsgContext +* Return code :N/A +* Description : +* +******************************************************************************/ +FUNC(void,DCM_CODE) App_Write0x01A0(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext) +{ + uint8 i; + for(i=0;iresData[2+i]; + } + cal_write_did(0x01A0u,(u8*)&DATA_0x01A0[0],SYSDID_MANUFAC_LIFECYCLE_COUNT_CK_LEN); + //(void)nvm_write_bytes(NVM_TYPE_EEPROM,SYSDID_MANUFAC_LIFECYCLE_COUNT_ADDR,DATA_0x01A0,SYSDID_MANUFAC_LIFECYCLE_COUNT_CK_LEN); + gMsgContextType.resDataLen=3; + DsdInternal_ProcessingDone(pMsgContext); +} + +/****************************************************************************** +* Name :App_Write0xF1A0 +* Called by :Dcm +* Preconditions:N/A +* Parameters :Dcm_MsgContextType* pMsgContext +* Return code :N/A +* Description : +* +******************************************************************************/ +FUNC(void,DCM_CODE) App_Write0xF1A0(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext) +{ + uint8 i; + for(i=0;iresData[2+i]; + } + cal_write_did(0xF1A0u,(u8*)&DATA_0xF1A0[0],SYSDID_VEHICLE_CONFIG_CK_LEN); + gMsgContextType.resDataLen=3; + DsdInternal_ProcessingDone(pMsgContext); +} + +/****************************************************************************** +* Name :App_Write0xF112 +* Called by :Dcm +* Preconditions:N/A +* Parameters :Dcm_MsgContextType* pMsgContext +* Return code :N/A +* Description : +* +******************************************************************************/ +FUNC(void,DCM_CODE) App_Write0xF112(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext) +{ + uint8 i; + for(i=0;iresData[2+i]; + } + #if 1 + (void)cal_write_did(0xF112,DATA_0xF112,sizeof(DATA_0xF112)); + #endif + gMsgContextType.resDataLen=3; + DsdInternal_ProcessingDone(pMsgContext); +} + +/****************************************************************************** +* Name :App_Write0xF190 +* Called by :Dcm +* Preconditions:N/A +* Parameters :Dcm_MsgContextType* pMsgContext +* Return code :N/A +* Description : +* +******************************************************************************/ +FUNC(void,DCM_CODE) App_Write0xF190(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext) +{ + uint8 i; + for(i=0;iresData[2+i]; + } + cal_write_did(0xF190u,(u8*)&DATA_0xF190[0],SYSDID_F190_VIN_CK_LEN); + gMsgContextType.resDataLen=3; + DsdInternal_ProcessingDone(pMsgContext); +} + +/****************************************************************************** +* Name :App_Write0xF197 +* Called by :Dcm +* Preconditions:N/A +* Parameters :Dcm_MsgContextType* pMsgContext +* Return code :N/A +* Description : +* +******************************************************************************/ +FUNC(void,DCM_CODE) App_Write0xF197(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext) +{ + uint8 i; + for(i=0;iresData[2+i]; + } + #if 1 + (void)cal_write_did(0xF197,DATA_0xF197,sizeof(DATA_0xF197)); + #endif + gMsgContextType.resDataLen=3; + DsdInternal_ProcessingDone(pMsgContext); +} + +/****************************************************************************** +* Name :App_Write0xF198 +* Called by :Dcm +* Preconditions:N/A +* Parameters :Dcm_MsgContextType* pMsgContext +* Return code :N/A +* Description : +* +******************************************************************************/ +FUNC(void,DCM_CODE) App_Write0xF198(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext) +{ + uint8 i; + for(i=0;iresData[2+i]; + } + (void)nvm_write_bytes(NVM_TYPE_EEPROM,SYSDID_F198_REPAIR_SN_ADDR,DATA_0xF198,SYSDID_F198_REPAIR_SN_CK_LEN); + //(void)cal_write_did(0xF198,DATA_0xF198,sizeof(DATA_0xF198)); + gMsgContextType.resDataLen=3; + DsdInternal_ProcessingDone(pMsgContext); +} + +/****************************************************************************** +* Name :App_Write0xF199 +* Called by :Dcm +* Preconditions:N/A +* Parameters :Dcm_MsgContextType* pMsgContext +* Return code :N/A +* Description : +* +******************************************************************************/ +FUNC(void,DCM_CODE) App_Write0xF199(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext) +{ + uint8 i; + bool l_result; + + for(i=0;iresData[2+i]; + } + + #if 1 + (void)nvm_write_bytes(NVM_TYPE_EEPROM,SYSDID_F199_DATE_ADDR,DATA_0xF199,SYSDID_F199_DATE_CK_LEN); + /*日期合法的判斷*/ + l_result = check_date_valid(DATA_0xF199); + + if(l_result == FALSE) + { + DsdInternal_SetNegResponse(pMsgContext,DCM_E_REQUESTOUTOFRANGE); + } + else + { + //(void)cal_write_did(0xF199,DATA_0xF199,sizeof(DATA_0xF199)); + + gMsgContextType.resDataLen=3; + DsdInternal_ProcessingDone(pMsgContext); + } + #else + + (void)cal_write_did(0xF199,DATA_0xF199,sizeof(DATA_0xF199)); + gMsgContextType.resDataLen=3; + DsdInternal_ProcessingDone(pMsgContext); + + #endif + +} + +/****************************************************************************** +* Name :App_Write0xF19D +* Called by :Dcm +* Preconditions:N/A +* Parameters :Dcm_MsgContextType* pMsgContext +* Return code :N/A +* Description : +* +******************************************************************************/ +FUNC(void,DCM_CODE) App_Write0xF19D(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext) +{ + uint8 i; + bool l_result; + + for(i=0;iresData[2+i]; + } + + /*日期合法的判斷*/ + l_result = check_date_valid(DATA_0xF19D); + + if(l_result == FALSE) + { + DsdInternal_SetNegResponse(pMsgContext,DCM_E_REQUESTOUTOFRANGE); + } + else + { + #if 1 + (void)cal_write_did(0xF19d,DATA_0xF19D,sizeof(DATA_0xF19D)); + #endif + gMsgContextType.resDataLen=3; + DsdInternal_ProcessingDone(pMsgContext); + } + + + +} + +FUNC(void,DCM_CODE) App_Write0xF18C(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext) +{ + uint8 i; + //bool l_result; + + for(i=0;iresData[2+i]; + } + #if 1 + (void)cal_write_did(0xF18C,DATA_0xF18C,sizeof(DATA_0xF18C)); + #endif + gMsgContextType.resDataLen=3; + DsdInternal_ProcessingDone(pMsgContext); + + +} + +#endif + +#if(DCM_SERVICE_2F_ENABLED==STD_ON) + +#define DCM_NO_USE_NES_RESPONSE_FOR_2F DCM_E_REQUESTOUTOFRANGE + +/****************************************************************************** +* Name :App_ReturnControlToEcu0x201f_motor +* Called by :Dcm +* Preconditions:N/A +* Parameters :Dcm_MsgContextType* pMsgContext +* Return code :N/A +* Description :N/A +* +******************************************************************************/ +FUNC(void,DCM_CODE) App_ReturnControlToEcu0x201f_motor(Dcm_MsgContextType* pMsgContext) +{ +// output_app_ctrl(OUTPUT_TYPE_MOTOR,MOTOR_DRIVER_CHANNEL_ID_M,MOTOR_DRIVER_LEVEL_DEFAULT,MOTOR_DRIVER_CMD_OFF); + pMsgContext->resData[3] = 0x00; //unsigned---命令必须 +// pMsgContext->resData[4] = motor_driver_get_state(MOTOR_DRIVER_CHANNEL_ID_M); //unsigned + pMsgContext->resDataLen=5; + DsdInternal_ProcessingDone(pMsgContext); +} +/****************************************************************************** +* Name :App_ShortTermAdjustment201f_motor +* Called by :Dcm +* Preconditions:N/A +* Parameters :Dcm_MsgContextType* pMsgContext +* Return code :N/A +* Description :N/A +* +******************************************************************************/ +FUNC(void,DCM_CODE) App_ShortTermAdjustment201f_motor(Dcm_MsgContextType* pMsgContext) +{ +// motor_driver_reactive(MOTOR_DRIVER_CHANNEL_ID_M); +// output_app_ctrl(OUTPUT_TYPE_MOTOR,MOTOR_DRIVER_CHANNEL_ID_M,MOTOR_DRIVER_LEVEL_DEFAULT,pMsgContext->reqData[4]); + pMsgContext->resData[3] = 0x03; //unsigned---命令必须 +// pMsgContext->resData[4] = motor_driver_get_state(MOTOR_DRIVER_CHANNEL_ID_M); //unsigned + pMsgContext->resDataLen=5; + DsdInternal_ProcessingDone(pMsgContext); + +} +/****************************************************************************** +* Name :App_ReturnControlToEcu0xff00 +* Called by :Dcm +* Preconditions:N/A +* Parameters :Dcm_MsgContextType* pMsgContext +* Return code :N/A +* Description :N/A +* +******************************************************************************/ +FUNC(void,DCM_CODE) App_ReturnControlToEcu0xff00(Dcm_MsgContextType* pMsgContext) +{ + #if 0 + DsdInternal_SetNegResponse(pMsgContext,DCM_NO_USE_NES_RESPONSE_FOR_2F); + #else + WheelHeat_ReturnControlForEcu(); + pMsgContext->resData[3] = 0x00; //unsigned---命令必须 + pMsgContext->resData[4] = 0x00; //unsigned---命令必须 + pMsgContext->resDataLen=5; + DsdInternal_ProcessingDone(pMsgContext); + #endif +} +/****************************************************************************** +* Name :App_ShortTermAdjustment0xff00 +* Called by :Dcm +* Preconditions:N/A +* Parameters :Dcm_MsgContextType* pMsgContext +* Return code :N/A +* Description :N/A +* reqData[1]=0XB0.reqData[2]=0X80.reqData[3]=0X03.reqData[4]=0X01CMD reqData[5]=0X0A LEVEL +******************************************************************************/ +FUNC(void,DCM_CODE) App_ShortTermAdjustment0xff00(Dcm_MsgContextType* pMsgContext) +{ + #if 0 + u8 l_cmd; + u8 l_level; + #ifdef APP_DCM_DEBUG_EN + u8 i; + g_app_decm_debug.len = pMsgContext->reqDataLen; + for(i=0;i<10;i++) + { + g_app_decm_debug.buf[i]=pMsgContext->reqData[i]; + } + #endif + app_dcm_io_ctrl_led_set_state(APP_DCM_IO_CTRL_STATE_RUN_LED); + if(pMsgContext->reqData[4]==1) + { + l_cmd = LED_DRIVER_CMD_ON; + } + else + { + l_cmd = LED_DRIVER_CMD_OFF; + } + l_level =pMsgContext->reqData[5] ; + output_app_ctrl(OUTPUT_TYPE_LED,LED_ID_ILL,l_level,l_cmd); + { + pMsgContext->resData[3] = 0x03; //unsigned---命令必须 + pMsgContext->resData[4] = led_driver_get_cmd(LED_ID_ILL); //unsigned + pMsgContext->resData[5] = led_driver_get_level(LED_ID_ILL); //unsigned + } + pMsgContext->resDataLen=6; + DsdInternal_ProcessingDone(pMsgContext); + #else + DsdInternal_SetNegResponse(pMsgContext,DCM_NO_USE_NES_RESPONSE_FOR_2F); + #endif +} +/****************************************************************************** +* Name :App_ReturnControlToEcu0x2020 +* Called by :Dcm +* Preconditions:N/A +* Parameters :Dcm_MsgContextType* pMsgContext +* Return code :N/A +* Description :N/A +* +******************************************************************************/ +FUNC(void,DCM_CODE) App_ReturnControlToEcu0x2020(Dcm_MsgContextType* pMsgContext) +{ + #if 0 + WheelHeat_ControlForDcm(); + pMsgContext->resData[3] = 0x00; //unsigned---命令必须 + pMsgContext->resDataLen=4; + DsdInternal_ProcessingDone(pMsgContext); + #else + DsdInternal_SetNegResponse(pMsgContext,DCM_NO_USE_NES_RESPONSE_FOR_2F); + #endif +} +/****************************************************************************** +* Name :App_ShortTermAdjustment0x2020 +* Called by :Dcm +* Preconditions:N/A +* Parameters :Dcm_MsgContextType* pMsgContext +* Return code :N/A +* Description :N/A +* +******************************************************************************/ + +FUNC(void,DCM_CODE) App_ShortTermAdjustment0x2020(Dcm_MsgContextType* pMsgContext) +{ + if(pMsgContext->reqData[4]) + { + WheelHeat_ControlForDcm(WHEEL_HEAT_DCM_CONTROL_OPEN); + } + else + { + WheelHeat_ControlForDcm(WHEEL_HEAT_DCM_CONTROL_CLOSE); + } + + + pMsgContext->resData[3] = 0x03; //unsigned---命令必须 + pMsgContext->resData[4] = pMsgContext->reqData[4]; + pMsgContext->resDataLen=5; + DsdInternal_ProcessingDone(pMsgContext); +} + +/****************************************************************************** +* Name :App_ReturnControlToEcu0x5001 +* Called by :Dcm +* Preconditions:N/A +* Parameters :Dcm_MsgContextType* pMsgContext +* Return code :N/A +* Description :N/A +* +******************************************************************************/ +FUNC(void,DCM_CODE) App_ReturnControlToEcu0x5001(Dcm_MsgContextType* pMsgContext) +{ + #if 0 + WheelHeat_ControlForDcm(); + pMsgContext->resData[3] = 0x00; //unsigned---命令必须 + pMsgContext->resDataLen=4; + DsdInternal_ProcessingDone(pMsgContext); + #else + DsdInternal_SetNegResponse(pMsgContext,DCM_NO_USE_NES_RESPONSE_FOR_2F); + #endif +} +/****************************************************************************** +* Name :App_ShortTermAdjustment0x5001 +* Called by :Dcm +* Preconditions:N/A +* Parameters :Dcm_MsgContextType* pMsgContext +* Return code :N/A +* Description :N/A +* +******************************************************************************/ + +FUNC(void,DCM_CODE) App_ShortTermAdjustment0x5001(Dcm_MsgContextType* pMsgContext) +{ + u8 car_show_state=0; + u8 output=0; + car_show_state = pMsgContext->reqData[4]; + if(car_show_state == KEY_DCM_SHOW_IN) + { + output=1; + app_sig_sws_r_auto_show_in_tx_process(output, 3, 3); + + } + else if(car_show_state == KEY_DCM_SHOW_OUT) + { + output=1; + app_sig_sws_r_auto_show_out_tx_process(output, 3, 3); + } + else if(car_show_state == KEY_DCM_SHOW_UP) + { + output=0; + Com_SendSignal(COM_TX_SIGSWS_R_MULTIMEDIA, &output); + app_sig_sws_r_auto_show_out_tx_process(output, 3, 0); + } + pMsgContext->resData[3] = 0x03; //unsigned---命令必须 + pMsgContext->resData[4] = pMsgContext->reqData[4]; + pMsgContext->resDataLen=5; + DsdInternal_ProcessingDone(pMsgContext); +} + +/****************************************************************************** +* Name :App_ReturnControlToEcu0x3904 +* Called by :Dcm +* Preconditions:N/A +* Parameters :Dcm_MsgContextType* pMsgContext +* Return code :N/A +* Description :N/A +* +******************************************************************************/ +FUNC(void,DCM_CODE) App_ReturnControlToEcu0x3904(Dcm_MsgContextType* pMsgContext) +{ + #if 0 + #if 0 + escl_drive_cmd_req(ESCL_CMD_POWER_OFF); + escl_drive_cmd_req(ESCL_CMD_GND_OFF); + escl_drive_cmd_req(ESCL_CMD_LOCK_ENABLE_OFF); + #endif + pMsgContext->resData[4]=0; + pMsgContext->resDataLen=5; + DsdInternal_ProcessingDone(pMsgContext); + #else + DsdInternal_SetNegResponse(pMsgContext,DCM_NO_USE_NES_RESPONSE_FOR_2F); + #endif +} +/****************************************************************************** +* Name :App_ShortTermAdjustment0x3904 +* Called by :Dcm +* Preconditions:N/A +* Parameters :Dcm_MsgContextType* pMsgContext +* Return code :N/A +* Description :N/A +* +******************************************************************************/ +FUNC(void,DCM_CODE) App_ShortTermAdjustment0x3904(Dcm_MsgContextType* pMsgContext) +{ + #if 0 + uint8_t l_req_data[2]={0}, i; + pMsgContext->resData[4]=l_req_data[0]; + pMsgContext->resDataLen=5; + DsdInternal_ProcessingDone(pMsgContext); + #else + DsdInternal_SetNegResponse(pMsgContext,DCM_NO_USE_NES_RESPONSE_FOR_2F); + #endif +} +/****************************************************************************** +* Name :App_ReturnControlToEcu0x3905 +* Called by :Dcm +* Preconditions:N/A +* Parameters :Dcm_MsgContextType* pMsgContext +* Return code :N/A +* Description :N/A +* +******************************************************************************/ +FUNC(void,DCM_CODE) App_ReturnControlToEcu0x3905(Dcm_MsgContextType* pMsgContext) +{ + #if 0 + /*¼ÌµçÆ÷Í˳öÕï¶Ï¿ØÖÆ*/ + //power_relay_res_cmd(RELAY_CMD_DCM_EXIT, 0); + + pMsgContext->resData[4]= 0; + pMsgContext->resDataLen=5; + DsdInternal_ProcessingDone(pMsgContext); + #else + DsdInternal_SetNegResponse(pMsgContext,DCM_NO_USE_NES_RESPONSE_FOR_2F); + #endif +} +/****************************************************************************** +* Name :App_ShortTermAdjustment0x3905 +* Called by :Dcm +* Preconditions:N/A +* Parameters :Dcm_MsgContextType* pMsgContext +* Return code :N/A +* Description :N/A +* +******************************************************************************/ +#define POWER_RELAY_OPERATE_ACC 0x04 +#define POWER_RELAY_OPERATE_IG1 0x02 +#define POWER_RELAY_OPERATE_IG2 0x01 +#define POWER_RELAY_OPERATE_START 0x08 +FUNC(void,DCM_CODE) App_ShortTermAdjustment0x3905(Dcm_MsgContextType* pMsgContext) +{ + #if 0 + /*¼ÌµçÆ÷¿ØÖÆ*/ + + uint8_t l_req_data[2]={0}, i; + u8 l_output = 0; + + for(i=0;iresData[4+i]; + } + #if 0 + if((l_req_data[0] & 0x0f) == 0x00) + { + power_relay_res_cmd(RELAY_CMD_DCM_ENTER,POWER_RELAY_OFF); + } + else if((l_req_data[0] & 0x0f) == 0x01) + { + power_relay_res_cmd(RELAY_CMD_DCM_ENTER,POWER_RELAY_ACC); + } + else if((l_req_data[0] & 0x0f) == 0x07) + { + power_relay_res_cmd(RELAY_CMD_DCM_ENTER,POWER_RELAY_ON); + } + else if((l_req_data[0] & 0x0f) == 0x0a) + { + power_relay_res_cmd(RELAY_CMD_DCM_ENTER,POWER_RELAY_CRANK); + } + else + { + //code + } + #endif + pMsgContext->resData[4]=l_req_data[0]; + pMsgContext->resDataLen=5; + DsdInternal_ProcessingDone(pMsgContext); + #else + DsdInternal_SetNegResponse(pMsgContext,DCM_NO_USE_NES_RESPONSE_FOR_2F); + #endif +} +#endif +/* 19 */ +/****************************************************************************** +* Name :App_ReportNumberOfDTCByStatusMask +* Called by :Dcm +* Preconditions:N/A +* Parameters :Dcm_MsgContextType* pMsgContext +* Return code :N/A +* Description :Report number of DTC by status mask. +*19-01 讀取當前DTC個數，by status mask +******************************************************************************/ +FUNC(void,DCM_CODE) App_ReportNumberOfDTCByStatusMask(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext) +{ + uint8 i; + //uint8 result=0; + uint16 counter=0; + uint8 DtcStatus; + DtcStatus=pMsgContext->reqData[2]; + for(i=0;iresData[1]=pMsgContext->reqData[1]; + pMsgContext->resData[2]=DTCStatusAvailabilityMask; + pMsgContext->resData[3]=0x00;/* 0x00 ISO15031-6Format,0x01 ISO14229-1Format,0x02 J1939 Format */ + pMsgContext->resData[4]=(uint8)(counter>>8); + pMsgContext->resData[5]=(uint8)(counter); + pMsgContext->resDataLen=6;/* Always equals 6 */ + DsdInternal_ProcessingDone(pMsgContext); +} +/****************************************************************************** +* Name :App_ReportDTCByStatusMask +* Called by :Dcm +* Preconditions:N/A +* Parameters :Dcm_MsgContextType* pMsgContext +* Return code :N/A +* Description :Report DTC by status mask. +*19-02 讀取當前dtc，各狀態 by status mask +******************************************************************************/ +FUNC(void,DCM_CODE) App_ReportDTCByStatusMask(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext) +{ + uint8 i; + uint16 counter=0; + uint8 DtcStatus,tmp; + + DtcStatus=pMsgContext->reqData[2]; + + for(i=0;iresData[3+counter*4]=(uint8)(SupportedDTC[i]>>16); + pMsgContext->resData[4+counter*4]=(uint8)(SupportedDTC[i]>>8); + pMsgContext->resData[5+counter*4]=(uint8)SupportedDTC[i]; + pMsgContext->resData[6+counter*4]=tmp; + + counter++; + } + else + { + } + } + pMsgContext->resData[1]=pMsgContext->reqData[1]; + pMsgContext->resData[2]=DTCStatusAvailabilityMask; + pMsgContext->resDataLen=3+(counter*4); + DsdInternal_ProcessingDone(pMsgContext); +} + +/****************************************************************************** +* Name :App_ReportDTCSnapshortRecordByDTCNumber +* Called by :Dcm +* Preconditions:N/A +* Parameters :Dcm_MsgContextType* pMsgContext +* Return code :N/A +* Description :N/A +* 19-04 +******************************************************************************/ + FUNC(void,DCM_CODE) App_ReportDTCSnapshotRecordByDTCNumber(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext) +{ + uint8 error=0; + uint32 Dtc; + uint8 i,dtc_index=0xffu; + uint8 DTCSnapshotRecordNumber; + uint8 DTCSnapshotRecordLength = 0;/* according to Spec */ + DTCSnapshotRecordNumber = pMsgContext->reqData[5]; + Dtc=Make32Bit(pMsgContext->reqData[2],pMsgContext->reqData[3],pMsgContext->reqData[4]); + /* Check DTC */ + for(i=0;iresData[5] = _dem_get_state(i); /*DTCStatus[i]; */ + + dtc_index = i;//0x13; + i=NUM_OF_DTC; //相當於break跳了出來; + } + else + { + if(i==NUM_OF_DTC-1) + { + error=1; + DsdInternal_SetNegResponse(pMsgContext,DCM_E_REQUESTOUTOFRANGE); + } + else + { + + } + } + } + if(error == 0) + { + switch(DTCSnapshotRecordNumber) + { + case 0xFF: /*return all DTCSnapshotRecordnumber*/ + case 0x01: + pMsgContext->resData[6] = 0x01;/*DTCSnapshotRecordNumber #2*/ + pMsgContext->resData[7] = 0x03;/*DTCSnapshotRecordNumberOfIdentifiers #2*/ + + //pdata = &pMsgContext->resData[8]; + + if(demm_copy_snap_short_data_to_dcm_txbuff(dtc_index, &pMsgContext->resData[8]) != FALSE) + { + DTCSnapshotRecordLength = (8+ DTC_SNAPSHOT_RECORD_LENGTH) ;/* change according to App ,if the current DTCSnapshotRecordNumber is not available the length should 0*/ + //cpu_nop(); + } + else + { + DsdInternal_SetNegResponse(pMsgContext,DCM_E_REQUESTOUTOFRANGE); + error = 1; + } + /*the first Identifier 0x9abc */ + //pMsgContext->resData[8] = 0x9a;/*Dataidentifier#1 byte#1(MSB)*/ + //pMsgContext->resData[9] = 0xbc;/*Dataidentifier#1 byte#1(LSB)*/ + //pMsgContext->resData[10] = 0x13;/*SnapshotData#1 byte#1*/ + //pMsgContext->resData[11] = 0x13;/*SnapshotData#1 byte#2*/ + //pMsgContext->resData[12] = 0x13;/*SnapshotData#1 byte#3*/ + + //DTCSnapshotRecordLength = 7u;/* change according to App ,if the current DTCSnapshotRecordNumber is not available the length should 0*/ + + break; + + default: + DsdInternal_SetNegResponse(pMsgContext,DCM_E_REQUESTOUTOFRANGE); + error = 1; + break; + } + } + else + { + + } + if(error==0) + { + pMsgContext->resDataLen=(DTCSnapshotRecordLength); //8 + DsdInternal_ProcessingDone(pMsgContext); + } + else + { + DsdInternal_ProcessingDone(pMsgContext); + } +} + +/****************************************************************************** +* Name :App_ReportDTCExtendedDataRecordByDTCNumber +* Called by :Dcm +* Preconditions:N/A +* Parameters :Dcm_MsgContextType* pMsgContext +* Return code :N/A +* Description :N/A +* 19-06 +******************************************************************************/ +FUNC(void,DCM_CODE) App_ReportDTCExtendedDataRecordByDTCNumber(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext) +{ + + uint8 error=0; + uint32 Dtc; + uint8 i,dtc_index=0xffu; + uint8 DTCExtendedDataRecordNumber = 0; + uint8 DTCExtendedDataRecordLength = 0;/* according to Spec */ + + if(( (pMsgContext->reqData[5]>=0x00) && (pMsgContext->reqData[5]<=0x8f) )||(pMsgContext->reqData[5]==0xff)) + { + DTCExtendedDataRecordNumber= pMsgContext->reqData[5]; + Dtc=Make32Bit(pMsgContext->reqData[2],pMsgContext->reqData[3],pMsgContext->reqData[4]); + for(i=0;iresData[5] = _dem_get_state(i); /*DTCStatus[i]; */ + + dtc_index = i; + i=NUM_OF_DTC; + + } + else + { + if(i==NUM_OF_DTC-1) + { + if(Dtc!=0xffffff) + { + error=1; + DsdInternal_SetNegResponse(pMsgContext,DCM_E_REQUESTOUTOFRANGE); + } + else + { + } + } + else + { + } + } + } + } + else + { + error=1; + DsdInternal_SetNegResponse(pMsgContext,DCM_E_REQUESTOUTOFRANGE); + } + + if(error==0) + { + + switch(DTCExtendedDataRecordNumber) + { + case 0xFF: /*return all DTCSnapshotRecordnumber*/ + case 0x01: + + pMsgContext->resData[2]=(uint8)(SupportedDTC[dtc_index]>>16); + pMsgContext->resData[3]=(uint8)(SupportedDTC[dtc_index]>>8); + pMsgContext->resData[4]=(uint8)SupportedDTC[dtc_index]; + + ///pMsgContext->resData[5]=tmp; + pMsgContext->resData[6] = 0x01;/*DTCSnapshotRecordNumber #2*/ + //pMsgContext->resData[7] = 0x01;/*DTCSnapshotRecordNumberOfIdentifiers #2*/ + + if(demm_copy_extdata_to_dcm_txbuff(dtc_index, &pMsgContext->resData[7]) != FALSE) + { + DTCExtendedDataRecordLength = (6+ DTC_EXTDATA_RECORD_LENGTH) ;/* change according to App ,if the current DTCSnapshotRecordNumber is not available the length should 0*/ + //cpu_nop(); + } + else + { + DsdInternal_SetNegResponse(pMsgContext,DCM_E_REQUESTOUTOFRANGE); + error = 1; + } + break; + default: + DsdInternal_SetNegResponse(pMsgContext,DCM_E_REQUESTOUTOFRANGE); + error = 1; + break; + } + } + else + { + } + if(error==0) + { + pMsgContext->resDataLen = DTCExtendedDataRecordLength; //8 + DsdInternal_ProcessingDone(pMsgContext); + } + else + { + DsdInternal_ProcessingDone(pMsgContext); + } +} + +/****************************************************************************** +* Name :App_ReportSupportedDTC +* Called by :Dcm +* Preconditions:N/A +* Parameters :Dcm_MsgContextType* pMsgContext +* Return code :N/A +* Description :N/A +* 19-0a +******************************************************************************/ +FUNC(void,DCM_CODE) App_ReportSupportedDTC(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext) +{ + //uint8 result=0; + uint32 i; + pMsgContext->resData[2]=DTCStatusAvailabilityMask; + for(i=0;iresData[3+i*4]=(uint8)(SupportedDTC[i]>>16); + pMsgContext->resData[4+i*4]=(uint8)(SupportedDTC[i]>>8); + pMsgContext->resData[5+i*4]=(uint8)(SupportedDTC[i]); + //pMsgContext->resData[6+i*4]=DTCStatus[i]; //為什麼這個變量沒有用到； _dem_get_state(i) + pMsgContext->resData[6+i*4]=_dem_get_state(i); //應該是這狀態 + + } + pMsgContext->resDataLen=3+NUM_OF_DTC*4; + DsdInternal_ProcessingDone(pMsgContext); +} +/* 23 */ +/****************************************************************************** +* Name :App_ReadAddress +* Called by :Dcm +* Preconditions:N/A +* Parameters :Dcm_MsgContextType* pMsgContext +* Return code :N/A +* Description :N/A +* +******************************************************************************/ +#if(DCM_SERVICE_23_ENABLED==STD_ON) +void App_ReadAddress(Dcm_MsgContextType* pMsgContext) +{ + /* if too many datas to be readed ,and it is impossible read all data one time, + App should remember the address and conter of data for the next Call .*/ + uint32 startAddress; + uint32 memorySize; + uint32 i; + startAddress=0; + memorySize=0; + /* Calculate start address */ + for(i=0;ireqData[2u+i])<<(uint8)(8u*(gMemoryAddressFormat-1u-i)); + } + /* Calculate size */ + for(i=0;ireqData[2u+gMemoryAddressFormat+i])<<(uint8)(8u*(gMemorySizeFormat-1u-i)); + } + + for(i=0;iresData[1u+i]=R8(startAddress+i); + } + + pMsgContext->resDataLen=(1u+memorySize); + DsdInternal_ProcessingDone(pMsgContext); +} +#endif +/* 27 */ +#if(DCM_SERVICE_27_ENABLED==STD_ON) + +/****************************************************************************** +* Name :App_Request_Seed_Lv1 +* Called by :Dcm +* Preconditions:Dcm_MsgContextType* pMsgContext +* Parameters :N/A +* Return code :N/A +* Description :N/A +* 27 01 +******************************************************************************/ +FUNC(void,DCM_CODE) App_Request_Seed_L1(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext) +{ + uint8 i; + if((bUpdateSeed & 0x1U) != 0) + { + service_27_generate_seed(); + bUpdateSeed &= (u8)(~0x01); + } + pMsgContext->resData[1]=pMsgContext->reqData[1]; + for(i=0;iresDataLen=gDcmDspSecurityRow[0].DcmDspSecuritySeedSize+2; + DsdInternal_ProcessingDone(pMsgContext); +} + +/****************************************************************************** +* Name :App_Send_Key_Lv2 +* Called by :Dcm +* Preconditions:Dcm_MsgContextType* pMsgContext +* Parameters :N/A +* Return code :N/A +* Description :N/A +* 27 02 +******************************************************************************/ + + +FUNC(void,DCM_CODE) App_Send_Key_L1(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext) +{ + app_dcm_operate_service_27(1,pMsgContext); +} + + + +/****************************************************************************** +* Name :App_Request_Seed_Lv3 +* Called by :Dcm +* Preconditions:Dcm_MsgContextType* pMsgContext +* Parameters :N/A +* Return code :N/A +* Description :N/A +* 27 03 +******************************************************************************/ +FUNC(void,DCM_CODE) App_Request_Seed_L2(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext) +{ + uint8 i; + if((bUpdateSeed & 0x2U) != 0) + { + service_27_generate_seed(); + bUpdateSeed &= (u8)(~0x02); + } + pMsgContext->resData[1]=pMsgContext->reqData[1]; + for(i=0;iresDataLen=gDcmDspSecurityRow[1].DcmDspSecuritySeedSize+2; + DsdInternal_ProcessingDone(pMsgContext); +} +/****************************************************************************** +* Name :App_Send_Key_Lv4 +* Called by :Dcm +* Preconditions:Dcm_MsgContextType* pMsgContext +* Parameters :N/A +* Return code :N/A +* Description :N/A +* 27 04 +******************************************************************************/ +FUNC(void,DCM_CODE) App_Send_Key_L2(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext) +{ + app_dcm_operate_service_27(2,pMsgContext); +} + +/****************************************************************************** +* Name :App_Request_Seed_Lv5 +* Called by :Dcm +* Preconditions:Dcm_MsgContextType* pMsgContext +* Parameters :N/A +* Return code :N/A +* Description :N/A +* 27 05 +******************************************************************************/ +FUNC(void,DCM_CODE) App_Request_Seed_L3(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext) +{ + uint8 i; + if((bUpdateSeed & 0x04U) != 0) + { + service_27_generate_seed(); + bUpdateSeed &= (u8)(~0x04); + } + pMsgContext->resData[1]=pMsgContext->reqData[1]; + for(i=0;iresDataLen=gDcmDspSecurityRow[0].DcmDspSecuritySeedSize+2; + DsdInternal_ProcessingDone(pMsgContext); +} + +/****************************************************************************** +* Name :App_Send_Key_Lv6 +* Called by :Dcm +* Preconditions:Dcm_MsgContextType* pMsgContext +* Parameters :N/A +* Return code :N/A +* Description :N/A +* 27 06 +******************************************************************************/ +FUNC(void,DCM_CODE) App_Send_Key_L3(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext) +{ + app_dcm_operate_service_27(3,pMsgContext); +} + +/****************************************************************************** +* Name :App_Request_Seed_Lv7 +* Called by :Dcm +* Preconditions:Dcm_MsgContextType* pMsgContext +* Parameters :N/A +* Return code :N/A +* Description :N/A +* 27 07 +******************************************************************************/ +FUNC(void,DCM_CODE) App_Request_Seed_L4(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext) +{ + uint8 i; + if((bUpdateSeed & 0x08U) != 0) + { + service_27_generate_seed(); + bUpdateSeed &= (u8)(~0x08); + } + pMsgContext->resData[1]=pMsgContext->reqData[1]; + for(i=0;iresDataLen=gDcmDspSecurityRow[0].DcmDspSecuritySeedSize+2; + DsdInternal_ProcessingDone(pMsgContext); +} + +/****************************************************************************** +* Name :App_Send_Key_Lv8 +* Called by :Dcm +* Preconditions:Dcm_MsgContextType* pMsgContext +* Parameters :N/A +* Return code :N/A +* Description :N/A +* 27 08 +******************************************************************************/ +FUNC(void,DCM_CODE) App_Send_Key_L4(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext) +{ + app_dcm_operate_service_27(4,pMsgContext); +} + +/****************************************************************************** +* Name :App_Request_Seed_Lv9 +* Called by :Dcm +* Preconditions:Dcm_MsgContextType* pMsgContext +* Parameters :N/A +* Return code :N/A +* Description :N/A +* 27 09 +******************************************************************************/ +FUNC(void,DCM_CODE) App_Request_Seed_L5(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext) +{ + uint8 i; + if((bUpdateSeed & 0x10U) != 0) + { + service_27_generate_seed(); + bUpdateSeed &= (u8)(~0x10); + } + pMsgContext->resData[1]=pMsgContext->reqData[1]; + for(i=0;iresDataLen=gDcmDspSecurityRow[0].DcmDspSecuritySeedSize+2; + DsdInternal_ProcessingDone(pMsgContext); +} + +/****************************************************************************** +* Name :App_Send_Key_LvA +* Called by :Dcm +* Preconditions:Dcm_MsgContextType* pMsgContext +* Parameters :N/A +* Return code :N/A +* Description :N/A +* 27 0A +******************************************************************************/ +FUNC(void,DCM_CODE) App_Send_Key_L5(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext) +{ + app_dcm_operate_service_27(5,pMsgContext); +} + +/****************************************************************************** +* Name :App_Request_Seed_LvB +* Called by :Dcm +* Preconditions:Dcm_MsgContextType* pMsgContext +* Parameters :N/A +* Return code :N/A +* Description :N/A +* 27 0B +******************************************************************************/ +FUNC(void,DCM_CODE) App_Request_Seed_L6(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext) +{ + uint8 i; + if((bUpdateSeed & 0x20U) != 0) + { + service_27_generate_seed(); + bUpdateSeed &= (u8)(~(u8)0x20); + } + pMsgContext->resData[1]=pMsgContext->reqData[1]; + for(i=0;iresDataLen=gDcmDspSecurityRow[0].DcmDspSecuritySeedSize+2; + DsdInternal_ProcessingDone(pMsgContext); +} + +/****************************************************************************** +* Name :App_Send_Key_LvC +* Called by :Dcm +* Preconditions:Dcm_MsgContextType* pMsgContext +* Parameters :N/A +* Return code :N/A +* Description :N/A +* 27 0C +******************************************************************************/ +FUNC(void,DCM_CODE) App_Send_Key_L6(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext) +{ + #if 0 //验证了，先回忙，是可以的。还会再进来， + static u8 ls_flag =0; + if(ls_flag==0) + { + DsdInternal_SetNegResponse(pMsgContext,DCM_E_REQUESTCORRECTLYRECEIVED_RESPONSEPENDING); // DCM_E_CONDITIONSNOTCORRECT // DCM_E_INVALIDKEY + //DsdInternal_SetNegResponse(pMsgContext,DCM_E_INVALIDKEY); // DCM_E_CONDITIONSNOTCORRECT // DCM_E_INVALIDKEY + ls_flag=1; + } + else + { + ls_flag=0; + DsdInternal_SecurityAccessKeyCompared(6,KEY_IS_VALID); + pMsgContext->resDataLen=2; + DsdInternal_ProcessingDone(pMsgContext); + } + #else + app_dcm_operate_service_27(6,pMsgContext); + #endif +} + + +//因为处理AES 比较费时间，所以放在外面主循环处理 +void app_dcm_operate_service_27(u8 level,P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext) +{ + u8 i; + u8 l_input[DCM_KEY_LEN]; + u8 l_seed[SERVICE_SEED_LEN_MAX]; + u8 l_compare=0; + u8 l_buf_level_for_key[8]={0xff,1,3,5,7,9,11,13}; + u8 l_buf_level[8] = {DCM_SEC_LEV_LOCK,DCM_SEC_LEV_L1,DCM_SEC_LEV_L2,DCM_SEC_LEV_L3,DCM_SEC_LEV_L4,DCM_SEC_LEV_L5,DCM_SEC_LEV_L6,DCM_SEC_LEV_L7}; + + if( (level!=0) && (level<8) ) + { + bUpdateSeed |= (u8)0x01 << (level-1); + for(i=0;ireqData[2+i]; + } + //計算出來的key 放在 l_seed + service_27_get_key(l_buf_level_for_key[level],l_seed); + //開始比較 + for(i=0;iresDataLen=2; + DsdInternal_ProcessingDone(pMsgContext); + } + else + { + DsdInternal_SecurityAccessKeyCompared(l_buf_level[level],KEY_IS_NOT_VALID); + #if 1 + DsdInternal_SetNegResponse(pMsgContext,DCM_E_INVALIDKEY); // DCM_E_CONDITIONSNOTCORRECT // DCM_E_INVALIDKEY + #else + pMsgContext->resDataLen=3; + pMsgContext->resData[0] =0x7f; + pMsgContext->resData[1] =0x27; + pMsgContext->resData[2] =DCM_E_INVALIDKEY; + DsdInternal_ProcessingDone(pMsgContext); + #endif + } + } + else + { + DsdInternal_SecurityAccessKeyCompared(l_buf_level[level],KEY_IS_NOT_VALID); + #if 1 + DsdInternal_SetNegResponse(pMsgContext,DCM_E_INVALIDKEY); // DCM_E_CONDITIONSNOTCORRECT // DCM_E_INVALIDKEY + #else + pMsgContext->resDataLen=3; + pMsgContext->resData[0] =0x7f; + pMsgContext->resData[1] =0x27; + pMsgContext->resData[2] =DCM_E_INVALIDKEY; + DsdInternal_ProcessingDone(pMsgContext); + #endif + } +} +#endif + +/* 28 */ +/****************************************************************************** +* Name :EnableRxAndTx +* Called by :Dcm +* Preconditions:Dcm_MsgContextType* pMsgContext +* Parameters :N/A +* Return code :N/A +* Description :N/A +* +******************************************************************************/ +FUNC(void,DCM_CODE) App_EnableRxAndTx(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext) +{ + //DsdInternal_SetNegResponse(pMsgContext,DCM_E_CONDITIONSNOTCORRECT); + (void)CAN_SetControlBy(CAN_CONTROL_BY_28_SERVICE); + if (gMsgContextType.reqData[2]==NORMAL_MSG) + { + (void)Com_TxStart(); + (void)Com_RxStart(); + } + else if (gMsgContextType.reqData[2]==NM_MSG) + { + (void)CanNm_EnableCommunication(0); + } + else if (gMsgContextType.reqData[2]==BOTH_NORMAL_AND_NM_MSG) + { + (void)CanNm_EnableCommunication(0); + (void)Com_TxStart(); + (void)Com_RxStart(); + } + pMsgContext->resDataLen = 2; + DsdInternal_ProcessingDone(pMsgContext); +} +/****************************************************************************** +* Name :EnableRxAndDisableTx +* Called by :Dcm +* Preconditions:Dcm_MsgContextType* pMsgContext +* Parameters :N/A +* Return code :N/A +* Description :N/A +* +******************************************************************************/ +FUNC(void,DCM_CODE) App_EnableRxAndDisableTx(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext) +{ + (void)CAN_SetControlBy(CAN_CONTROL_BY_28_SERVICE); + if (gMsgContextType.reqData[2]==NORMAL_MSG) + { + (void)Com_TxStop(); + (void)Com_RxStart(); + } + else if (gMsgContextType.reqData[2]==NM_MSG) + { + (void)CanNm_DisableCommunication(0); + } + else if (gMsgContextType.reqData[2]==BOTH_NORMAL_AND_NM_MSG) + { + (void)CanNm_DisableCommunication(0); + (void)Com_TxStop(); + (void)Com_RxStart(); + } + pMsgContext->resDataLen = 2; + DsdInternal_ProcessingDone(pMsgContext); +} +/****************************************************************************** +* Name :DisableRxAndTx +* Called by :Dcm +* Preconditions:Dcm_MsgContextType* pMsgContext +* Parameters :N/A +* Return code :N/A +* Description :N/A +* +******************************************************************************/ +FUNC(void,DCM_CODE) App_DisableRxAndTx(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext) +{ + (void)CAN_SetControlBy(CAN_CONTROL_BY_28_SERVICE); + if (gMsgContextType.reqData[2]==NORMAL_MSG) + { + (void)Com_TxStop(); + (void)Com_RxStop(); + } + else if (gMsgContextType.reqData[2]==NM_MSG) + { + (void)CanNm_DisableCommunication(0); + + } + else if (gMsgContextType.reqData[2]==BOTH_NORMAL_AND_NM_MSG) + { + (void)CanNm_DisableCommunication(0); + (void)Com_TxStop(); + (void)Com_RxStop(); + } + pMsgContext->resDataLen = 2; + DsdInternal_ProcessingDone(pMsgContext); +} + +/* 31 */ +#if(DCM_SERVICE_31_ENABLED==STD_ON) +#define DCM_NO_USE_NES_RESPONSE_FOR_31 DCM_E_REQUESTOUTOFRANGE + /****************************************************************************** +* Name :AppStartRoutine0x0206 +* Called by :Dcm +* Preconditions:N/A +* Parameters :Dcm_MsgContextType* pMsgContext +* Return code :N/A +* Description :Start RKE Learning +* +******************************************************************************/ +FUNC(void,DCM_CODE) App_StartRoutine0x0206(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext) +{ + #if 0 + DsdInternal_RoutineStarted(); + //add you code here + pMsgContext->resData[4]=0x00; + //set_fast_sleep_status(); + pMsgContext->resDataLen=4+DcmDspRoutineIdentifierTable_31[RoutineHandle_0x0206].DcmDspRoutineInfoRef.DcmDspStartRoutineOut.DcmDspRoutineSignalLength; + DsdInternal_ProcessingDone(pMsgContext); + #else + DsdInternal_SetNegResponse(pMsgContext,DCM_NO_USE_NES_RESPONSE_FOR_31); + #endif +} + + /****************************************************************************** +* Name :AppStartRoutine0x0207 +* Called by :Dcm +* Preconditions:N/A +* Parameters :Dcm_MsgContextType* pMsgContext +* Return code :N/A +* Description :Start RKE Learning +* +******************************************************************************/ +FUNC(void,DCM_CODE) App_StartRoutine0x01b0(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext) +{ + #if 0 + u8 l_cmd; + u8 l_level; + u8 l_buf[SYSDID_SECURITY_KEY_CK_LEN]; + u8 j; + #ifdef APP_DCM_DEBUG_EN + u8 i; + g_app_decm_debug.len = pMsgContext->reqDataLen; + for(i=0;i<10;i++) + { + g_app_decm_debug.buf[i]=pMsgContext->reqData[i]; + } + #endif + for(j=0;jreqData[4+j]; + } + cal_write_did(0x01A0u,(u8*)&l_buf[0],SYSDID_SECURITY_KEY_CK_LEN); + //(void)nvm_write_bytes(NVM_TYPE_EEPROM,SYSDID_SECURITY_KEY_ADDR,l_buf,SYSDID_SECURITY_KEY_LEN); + pMsgContext->resData[4]=0x00; + #if 0 + DsdInternal_RoutineStarted(); + //add you code here + app_dcm_io_ctrl_led_set_state(APP_DCM_IO_CTRL_STATE_RUN_LED); + if(pMsgContext->reqData[4]==1) + { + l_cmd = LED_DRIVER_CMD_ON; + } + else + { + l_cmd = LED_DRIVER_CMD_OFF; + } + l_level =pMsgContext->reqData[5] ; + output_app_ctrl(OUTPUT_TYPE_LED,LED_ID_ILL,l_level,l_cmd); + pMsgContext->resData[4]=0x00; + //escl_drive_cmd_req(ESCL_CMD_READ_STATUS); + #endif + //储存key + pMsgContext->resDataLen=4+DcmDspRoutineIdentifierTable_31[RoutineHandle_0x0207].DcmDspRoutineInfoRef.DcmDspStartRoutineOut.DcmDspRoutineSignalLength; + DsdInternal_ProcessingDone(pMsgContext); + #else + DsdInternal_SetNegResponse(pMsgContext,DCM_NO_USE_NES_RESPONSE_FOR_31); + #endif +} + + /****************************************************************************** +* Name :AppStopRoutine0x0207 +* Called by :Dcm +* Preconditions:N/A +* Parameters :Dcm_MsgContextType* pMsgContext +* Return code :N/A +* Description :Start RKE Learning +* +******************************************************************************/ +FUNC(void,DCM_CODE) App_StopRoutine0x0207(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext) +{ + #if 0 + DsdInternal_RoutineStopped(); + //add you code here + pMsgContext->resData[4]=0x00; + pMsgContext->resDataLen=4+DcmDspRoutineIdentifierTable_31[RoutineHandle_0x0207].DcmDspRoutineInfoRef.DcmDspRoutineStopOut.DcmDspRoutineSignalLength; + DsdInternal_ProcessingDone(pMsgContext); + #else + DsdInternal_SetNegResponse(pMsgContext,DCM_NO_USE_NES_RESPONSE_FOR_31); + #endif +} + + /****************************************************************************** +* Name :AppRequestRoutineResults0x0207 +* Called by :Dcm +* Preconditions:N/A +* Parameters :Dcm_MsgContextType* pMsgContext +* Return code :N/A +* Description :Start RKE Learning +* +******************************************************************************/ +FUNC(void,DCM_CODE) App_RequestRoutineResults0x01b0(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext) +{ + #if 0 + //add you code here +// DsdInternal_RequestRoutineResults(); + //pMsgContext->resData[4]=0x00; + pMsgContext->resData[4] = led_driver_get_cmd(LED_ID_ILL); //unsigned + pMsgContext->resData[5] = led_driver_get_level(LED_ID_ILL); //unsigned + pMsgContext->resDataLen=4+DcmDspRoutineIdentifierTable_31[RoutineHandle_0x0207].DcmDspRoutineInfoRef.DcmDspRoutineRequestResOut.DcmDspRoutineSignalLength; + DsdInternal_ProcessingDone(pMsgContext); + #else + DsdInternal_SetNegResponse(pMsgContext,DCM_NO_USE_NES_RESPONSE_FOR_31); + #endif +} + + /****************************************************************************** +* Name :AppStartRoutine0x0208 +* Called by :Dcm +* Preconditions:N/A +* Parameters :Dcm_MsgContextType* pMsgContext +* Return code :N/A +* Description :Start RKE Learning +* +******************************************************************************/ +FUNC(void,DCM_CODE) App_StartRoutine0x04FE(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext) +{ + #if 0 + DsdInternal_RoutineStarted(); + //add you code here + app_dcm_io_ctrl_motor_set_state(APP_DCM_IO_CTRL_STATE_RUN_MOTOR); + motor_driver_reactive(MOTOR_DRIVER_CHANNEL_ID_M); + output_app_ctrl(OUTPUT_TYPE_MOTOR,MOTOR_DRIVER_CHANNEL_ID_M,MOTOR_DRIVER_LEVEL_DEFAULT,pMsgContext->reqData[4]); + pMsgContext->resData[4]=0x00; + pMsgContext->resDataLen=4+DcmDspRoutineIdentifierTable_31[RoutineHandle_0x0208].DcmDspRoutineInfoRef.DcmDspStartRoutineOut.DcmDspRoutineSignalLength; + DsdInternal_ProcessingDone(pMsgContext); + #else + DsdInternal_SetNegResponse(pMsgContext,DCM_NO_USE_NES_RESPONSE_FOR_31); + #endif +} + + /****************************************************************************** +* Name :AppRequestRoutineResults0x0208 +* Called by :Dcm +* Preconditions:N/A +* Parameters :Dcm_MsgContextType* pMsgContext +* Return code :N/A +* Description :Start RKE Learning +* +******************************************************************************/ +FUNC(void,DCM_CODE) App_RequestRoutineResults0x04FE(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext) +{ + #if 0 +// DsdInternal_RequestRoutineResults(); + + //add you code here + pMsgContext->resData[4]=0x00; + pMsgContext->resData[4] = motor_driver_get_state(MOTOR_DRIVER_CHANNEL_ID_M); //unsigned + pMsgContext->resDataLen=4+DcmDspRoutineIdentifierTable_31[RoutineHandle_0x0208].DcmDspRoutineInfoRef.DcmDspRoutineRequestResOut.DcmDspRoutineSignalLength; + DsdInternal_ProcessingDone(pMsgContext); + #else + DsdInternal_SetNegResponse(pMsgContext,DCM_NO_USE_NES_RESPONSE_FOR_31); + #endif +} + + + /****************************************************************************** +* Name :AppStartRoutine0x5901 +* Called by :Dcm +* Preconditions:N/A +* Parameters :Dcm_MsgContextType* pMsgContext +* Return code :N/A +* Description :Start RKE Learning +* +******************************************************************************/ +FUNC(void,DCM_CODE) App_StartRoutine0x0203(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext) +{ + #if 1 + DsdInternal_RoutineStarted(); + //add you code here + pMsgContext->resData[4]=0x00; + //SetEvent(EOL_APP_TASK_ID, EVENT_EOL_APP_LEARN_PKE_START); + pMsgContext->resDataLen=4+DcmDspRoutineIdentifierTable_31[RoutineHandle_0x0206].DcmDspRoutineInfoRef.DcmDspStartRoutineOut.DcmDspRoutineSignalLength; + DsdInternal_ProcessingDone(pMsgContext); + #else + DsdInternal_SetNegResponse(pMsgContext,DCM_E_SERVICENOTSUPPORTEDINACTIVESESSION); + #endif +} + + /****************************************************************************** +* Name :AppStopRoutine0x5901 +* Called by :Dcm +* Preconditions:N/A +* Parameters :Dcm_MsgContextType* pMsgContext +* Return code :N/A +* Description :Start RKE Learning +* +******************************************************************************/ +FUNC(void,DCM_CODE) App_StopRoutine0x0203(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext) +{ + #if 1 + DsdInternal_RoutineStopped(); + //add you code here + //pMsgContext->resData[4]=0x00; + //SetEvent(EOL_APP_TASK_ID, EVENT_EOL_APP_LEARN_PKE_STOP); + pMsgContext->resDataLen=4+DcmDspRoutineIdentifierTable_31[RoutineHandle_0x0206].DcmDspRoutineInfoRef.DcmDspRoutineStopOut.DcmDspRoutineSignalLength; + DsdInternal_ProcessingDone(pMsgContext); + #else + DsdInternal_SetNegResponse(pMsgContext,DCM_E_SERVICENOTSUPPORTEDINACTIVESESSION); + #endif +} + + /****************************************************************************** +* Name :AppRequestRoutineResults0x5901 +* Called by :Dcm +* Preconditions:N/A +* Parameters :Dcm_MsgContextType* pMsgContext +* Return code :N/A +* Description :Start RKE Learning +* +******************************************************************************/ +FUNC(void,DCM_CODE) App_RequestRoutineResults0x0203(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext) +{ + #if 1 + //add you code here + //pMsgContext->resData[4]=0x00; + pMsgContext->resData[4] = 0x00;//get_pke_register_status(); + pMsgContext->resDataLen=4+DcmDspRoutineIdentifierTable_31[RoutineHandle_0x0206].DcmDspRoutineInfoRef.DcmDspRoutineRequestResOut.DcmDspRoutineSignalLength; + DsdInternal_ProcessingDone(pMsgContext); + #else + DsdInternal_SetNegResponse(pMsgContext,DCM_NO_USE_NES_RESPONSE_FOR_31); + #endif +} + + /****************************************************************************** +* Name :AppStartRoutine0x5902 +* Called by :Dcm +* Preconditions:N/A +* Parameters :Dcm_MsgContextType* pMsgContext +* Return code :N/A +* Description :Start RKE Learning +* +******************************************************************************/ +FUNC(void,DCM_CODE) App_StartRoutine0x5902(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext) +{ + DsdInternal_RoutineStarted(); + //add you code here + //pMsgContext->resData[4]=0x00; + //SetEvent(EOL_TASK, EVENT_EOL_APP_ESCL_LEARN_START); + pMsgContext->resDataLen=4+DcmDspRoutineIdentifierTable_31[RoutineHandle_0x5902].DcmDspRoutineInfoRef.DcmDspStartRoutineOut.DcmDspRoutineSignalLength; + DsdInternal_ProcessingDone(pMsgContext); +} + + /****************************************************************************** +* Name :AppStopRoutine0x5902 +* Called by :Dcm +* Preconditions:N/A +* Parameters :Dcm_MsgContextType* pMsgContext +* Return code :N/A +* Description :Start RKE Learning +* +******************************************************************************/ +FUNC(void,DCM_CODE) App_StopRoutine0x5902(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext) +{ + #if 0 + DsdInternal_RoutineStopped(); + //add you code here + //pMsgContext->resData[4]=0x00; + pMsgContext->resDataLen=4+DcmDspRoutineIdentifierTable_31[RoutineHandle_0x5902].DcmDspRoutineInfoRef.DcmDspRoutineStopOut.DcmDspRoutineSignalLength; + DsdInternal_ProcessingDone(pMsgContext); + #else + DsdInternal_SetNegResponse(pMsgContext,DCM_NO_USE_NES_RESPONSE_FOR_31); + #endif +} + + /****************************************************************************** +* Name :AppRequestRoutineResults0x5902 +* Called by :Dcm +* Preconditions:N/A +* Parameters :Dcm_MsgContextType* pMsgContext +* Return code :N/A +* Description :Start RKE Learning +* +******************************************************************************/ +FUNC(void,DCM_CODE) App_RequestRoutineResults0x5902(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext) +{ + #if 0 + //add you code here + //pMsgContext->resData[4]=0x00; + pMsgContext->resData[4] = 0x15;//get_escl_drive_learning_result(); + pMsgContext->resDataLen=4+DcmDspRoutineIdentifierTable_31[RoutineHandle_0x5902].DcmDspRoutineInfoRef.DcmDspRoutineRequestResOut.DcmDspRoutineSignalLength; + DsdInternal_ProcessingDone(pMsgContext); + #else + DsdInternal_SetNegResponse(pMsgContext,DCM_NO_USE_NES_RESPONSE_FOR_31); + #endif +} + + /****************************************************************************** +* Name :AppStartRoutine0x5903 +* Called by :Dcm +* Preconditions:N/A +* Parameters :Dcm_MsgContextType* pMsgContext +* Return code :N/A +* Description :Start RKE Learning +* +******************************************************************************/ +FUNC(void,DCM_CODE) App_StartRoutine0x5903(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext) +{ + #if 0 + DsdInternal_RoutineStarted(); + //add you code here + //pMsgContext->resData[4]=0x00; + pMsgContext->resDataLen=4+DcmDspRoutineIdentifierTable_31[RoutineHandle_0x5903].DcmDspRoutineInfoRef.DcmDspStartRoutineOut.DcmDspRoutineSignalLength; + DsdInternal_ProcessingDone(pMsgContext); + #else + DsdInternal_SetNegResponse(pMsgContext,DCM_NO_USE_NES_RESPONSE_FOR_31); + #endif +} + + /****************************************************************************** +* Name :AppStopRoutine0x5903 +* Called by :Dcm +* Preconditions:N/A +* Parameters :Dcm_MsgContextType* pMsgContext +* Return code :N/A +* Description :Start RKE Learning +* +******************************************************************************/ +FUNC(void,DCM_CODE) App_StopRoutine0x5903(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext) +{ + #if 0 + DsdInternal_RoutineStopped(); + //add you code here + //pMsgContext->resData[4]=0x00; + pMsgContext->resDataLen=4+DcmDspRoutineIdentifierTable_31[RoutineHandle_0x5903].DcmDspRoutineInfoRef.DcmDspRoutineStopOut.DcmDspRoutineSignalLength; + DsdInternal_ProcessingDone(pMsgContext); + #else + DsdInternal_SetNegResponse(pMsgContext,DCM_NO_USE_NES_RESPONSE_FOR_31); + #endif +} + + /****************************************************************************** +* Name :AppRequestRoutineResults0x5903 +* Called by :Dcm +* Preconditions:N/A +* Parameters :Dcm_MsgContextType* pMsgContext +* Return code :N/A +* Description :Start RKE Learning +* +******************************************************************************/ +FUNC(void,DCM_CODE) App_RequestRoutineResults0x5903(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext) +{ + #if 0 + //add you code here + //pMsgContext->resData[4]=0x00; + pMsgContext->resDataLen=4+DcmDspRoutineIdentifierTable_31[RoutineHandle_0x5903].DcmDspRoutineInfoRef.DcmDspRoutineRequestResOut.DcmDspRoutineSignalLength; + DsdInternal_ProcessingDone(pMsgContext); + #else + DsdInternal_SetNegResponse(pMsgContext,DCM_NO_USE_NES_RESPONSE_FOR_31); + #endif +} + + /****************************************************************************** +* Name :AppStartRoutine0x5904 +* Called by :Dcm +* Preconditions:N/A +* Parameters :Dcm_MsgContextType* pMsgContext +* Return code :N/A +* Description :Start RKE Learning +* +******************************************************************************/ +FUNC(void,DCM_CODE) App_StartRoutine0x5904(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext) +{ + #if 0 + DsdInternal_RoutineStarted(); + //add you code here + //pMsgContext->resData[4]=0x00; + pMsgContext->resDataLen=4+DcmDspRoutineIdentifierTable_31[RoutineHandle_0x5904].DcmDspRoutineInfoRef.DcmDspStartRoutineOut.DcmDspRoutineSignalLength; + DsdInternal_ProcessingDone(pMsgContext); + #else + DsdInternal_SetNegResponse(pMsgContext,DCM_NO_USE_NES_RESPONSE_FOR_31); + #endif +} + + /****************************************************************************** +* Name :AppStopRoutine0x5904 +* Called by :Dcm +* Preconditions:N/A +* Parameters :Dcm_MsgContextType* pMsgContext +* Return code :N/A +* Description :Start RKE Learning +* +******************************************************************************/ +FUNC(void,DCM_CODE) App_StopRoutine0x5904(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext) +{ + #if 0 + DsdInternal_RoutineStopped(); + //add you code here + //pMsgContext->resData[4]=0x00; + pMsgContext->resDataLen=4+DcmDspRoutineIdentifierTable_31[RoutineHandle_0x5904].DcmDspRoutineInfoRef.DcmDspRoutineStopOut.DcmDspRoutineSignalLength; + DsdInternal_ProcessingDone(pMsgContext); + #else + DsdInternal_SetNegResponse(pMsgContext,DCM_NO_USE_NES_RESPONSE_FOR_31); + #endif +} + + /****************************************************************************** +* Name :AppRequestRoutineResults0x5904 +* Called by :Dcm +* Preconditions:N/A +* Parameters :Dcm_MsgContextType* pMsgContext +* Return code :N/A +* Description :Start RKE Learning +* +******************************************************************************/ +FUNC(void,DCM_CODE) App_RequestRoutineResults0x5904(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext) +{ + #if 0 + //add you code here + //pMsgContext->resData[4]=0x00; + pMsgContext->resDataLen=4+DcmDspRoutineIdentifierTable_31[RoutineHandle_0x5904].DcmDspRoutineInfoRef.DcmDspRoutineRequestResOut.DcmDspRoutineSignalLength; + DsdInternal_ProcessingDone(pMsgContext); + #else + DsdInternal_SetNegResponse(pMsgContext,DCM_NO_USE_NES_RESPONSE_FOR_31); + #endif +} +#if 0 + u8 ant_id_test = 0; +u8 get_ant_dcm_to_peps(u8 ant_id) +{ + u8 ret_ant_id=0u; + //ant_id = ant_id >> 5; + ant_id_test = ant_id; + + #ifdef LF_APP_CFG_EN + + #else + + switch(ant_id_test) + { + case 6: + ret_ant_id = 0x01; + break; + case 1: + ret_ant_id = 0x02; + break; + case 3: + ret_ant_id = 0x03; + break; + case 4: + ret_ant_id = 0x04; + break; + case 2: + ret_ant_id = 0x5; + break; + default : + /*code*/ + break; + + } + ant_id =(((u8)0x01<<5) |1); + #endif + return ret_ant_id; +} +#endif +/****************************************************************************** +* Name :AppStartRoutine0xDF30 +* Called by :Dcm +* Preconditions:N/A +* Parameters :Dcm_MsgContextType* pMsgContext +* Return code :N/A +* Description :Start RKE Learning +* +******************************************************************************/ +FUNC(void,DCM_CODE) App_StartRoutine0xDF30(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext) +{ + #if 0 + DsdInternal_RoutineStarted(); + //add you code here + //pMsgContext->resData[4]=0x00; + pMsgContext->reqData[4] = get_ant_dcm_to_peps(pMsgContext->reqData[4]); + if(1)//(rf_dcm_app_routine_start(RF_CMD_ANT_CAL, &pMsgContext->reqData[4], pMsgContext->reqDataLen - 4) == TRUE) + { + pMsgContext->resData[4]=0x00; + } + else + { + pMsgContext->resData[4]=0x01; + } + pMsgContext->resDataLen=4+DcmDspRoutineIdentifierTable_31[RoutineHandle_0xDF30].DcmDspRoutineInfoRef.DcmDspStartRoutineOut.DcmDspRoutineSignalLength; + DsdInternal_ProcessingDone(pMsgContext); + #else + DsdInternal_SetNegResponse(pMsgContext,DCM_NO_USE_NES_RESPONSE_FOR_31); + #endif +} + + /****************************************************************************** +* Name :AppStopRoutine0xDF30 +* Called by :Dcm +* Preconditions:N/A +* Parameters :Dcm_MsgContextType* pMsgContext +* Return code :N/A +* Description :Start RKE Learning +* +******************************************************************************/ +FUNC(void,DCM_CODE) App_StopRoutine0xDF30(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext) +{ + #if 0 + DsdInternal_RoutineStopped(); + //add you code here + //pMsgContext->resData[4]=0x00; + pMsgContext->resDataLen=4+DcmDspRoutineIdentifierTable_31[RoutineHandle_0xDF30].DcmDspRoutineInfoRef.DcmDspRoutineStopOut.DcmDspRoutineSignalLength; + DsdInternal_ProcessingDone(pMsgContext); + #else + DsdInternal_SetNegResponse(pMsgContext,DCM_NO_USE_NES_RESPONSE_FOR_31); + #endif +} + + /****************************************************************************** +* Name :AppRequestRoutineResults0xDF30 +* Called by :Dcm +* Preconditions:N/A +* Parameters :Dcm_MsgContextType* pMsgContext +* Return code :N/A +* Description :Start RKE Learning +* +******************************************************************************/ +FUNC(void,DCM_CODE) App_RequestRoutineResults0xDF30(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext) +{ + #if 0 + //add you code here + //pMsgContext->resData[4]=0x00; + //LfReadAntCalType l_data; + uint8_t l_lenght; + u8 l_data; + + if(0)//(sizeof(l_data) >= DcmDspRoutineIdentifierTable_31[RoutineHandle_0xDF30].DcmDspRoutineInfoRef.DcmDspRoutineRequestResOut.DcmDspRoutineSignalLength) + { + l_lenght = DcmDspRoutineIdentifierTable_31[RoutineHandle_0xDF30].DcmDspRoutineInfoRef.DcmDspRoutineRequestResOut.DcmDspRoutineSignalLength; + } + else + { + l_lenght = sizeof(l_data); + } + + if(1)//(TRUE == rf_dcm_app_read_routine_data(RF_CMD_ANT_CAL, (uint8_t *)&l_data, sizeof(l_data))) + { + /*succussed */ + pMsgContext->resData[4]=0x02; + //memory_copys(&(pMsgContext->resData[5]), (uint8_t *)&l_data, l_lenght); + } + else + { + /*ÕýÔÚ´¦Àí*/ + pMsgContext->resData[4]=0x01; + //memory_clear(&pMsgContext->resData[5], l_lenght); + } + pMsgContext->resDataLen=4+DcmDspRoutineIdentifierTable_31[RoutineHandle_0xDF30].DcmDspRoutineInfoRef.DcmDspRoutineRequestResOut.DcmDspRoutineSignalLength; + DsdInternal_ProcessingDone(pMsgContext); + #else + DsdInternal_SetNegResponse(pMsgContext,DCM_NO_USE_NES_RESPONSE_FOR_31); + #endif +} + + /****************************************************************************** +* Name :AppStartRoutine0xDF31 +* Called by :Dcm +* Preconditions:N/A +* Parameters :Dcm_MsgContextType* pMsgContext +* Return code :N/A +* Description :Start RKE Learning +* +******************************************************************************/ +FUNC(void,DCM_CODE) App_StartRoutine0xDF31(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext) +{ + #if 0 + DsdInternal_RoutineStarted(); + //add you code here + //pMsgContext->resData[4]=0x00; + pMsgContext->reqData[4] = get_ant_dcm_to_peps(pMsgContext->reqData[4]); + if(0)//(rf_dcm_app_routine_start(RF_CMD_RSSI, &pMsgContext->reqData[4], pMsgContext->reqDataLen - 4) == TRUE) + { + pMsgContext->resData[4]=0x00; + } + else + { + pMsgContext->resData[4]=0x01; + } + pMsgContext->resDataLen=4+DcmDspRoutineIdentifierTable_31[RoutineHandle_0xDF31].DcmDspRoutineInfoRef.DcmDspStartRoutineOut.DcmDspRoutineSignalLength; + DsdInternal_ProcessingDone(pMsgContext); + #else + DsdInternal_SetNegResponse(pMsgContext,DCM_NO_USE_NES_RESPONSE_FOR_31); + #endif +} + + /****************************************************************************** +* Name :AppStopRoutine0xDF31 +* Called by :Dcm +* Preconditions:N/A +* Parameters :Dcm_MsgContextType* pMsgContext +* Return code :N/A +* Description :Start RKE Learning +* +******************************************************************************/ +FUNC(void,DCM_CODE) App_StopRoutine0xDF31(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext) +{ + #if 0 + DsdInternal_RoutineStopped(); + //add you code here + //pMsgContext->resData[4]=0x00; + pMsgContext->resDataLen=4+DcmDspRoutineIdentifierTable_31[RoutineHandle_0xDF31].DcmDspRoutineInfoRef.DcmDspRoutineStopOut.DcmDspRoutineSignalLength; + DsdInternal_ProcessingDone(pMsgContext); + #else + DsdInternal_SetNegResponse(pMsgContext,DCM_NO_USE_NES_RESPONSE_FOR_31); + #endif +} + + /****************************************************************************** +* Name :AppRequestRoutineResults0xDF31 +* Called by :Dcm +* Preconditions:N/A +* Parameters :Dcm_MsgContextType* pMsgContext +* Return code :N/A +* Description :Start RKE Learning +* +******************************************************************************/ +FUNC(void,DCM_CODE) App_RequestRoutineResults0xDF31(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext) +{ + #if 0 + //add you code here + //pMsgContext->resData[4]=0x00; + //LfReadRssiType l_data; + uint8_t l_lenght; + u8 l_data; + if(0)//(sizeof(l_data) >= DcmDspRoutineIdentifierTable_31[RoutineHandle_0xDF31].DcmDspRoutineInfoRef.DcmDspRoutineRequestResOut.DcmDspRoutineSignalLength) + { + l_lenght = DcmDspRoutineIdentifierTable_31[RoutineHandle_0xDF31].DcmDspRoutineInfoRef.DcmDspRoutineRequestResOut.DcmDspRoutineSignalLength; + } + else + { + l_lenght = sizeof(l_data); + } + + if(0)//(TRUE == rf_dcm_app_read_routine_data(RF_CMD_RSSI, (uint8_t *)&l_data, sizeof(l_data))) + { + /*succussed */ + pMsgContext->resData[4]=0x02; + //memory_copys(&(pMsgContext->resData[5]), (uint8_t *)&l_data, l_lenght); + } + else + { + /*ÕýÔÚ´¦Àí*/ + pMsgContext->resData[4]=0x01; + //memory_clear(&pMsgContext->resData[5], l_lenght); + } + pMsgContext->resDataLen=4+DcmDspRoutineIdentifierTable_31[RoutineHandle_0xDF31].DcmDspRoutineInfoRef.DcmDspRoutineRequestResOut.DcmDspRoutineSignalLength; + DsdInternal_ProcessingDone(pMsgContext); + #else + DsdInternal_SetNegResponse(pMsgContext,DCM_NO_USE_NES_RESPONSE_FOR_31); + #endif +} + + /****************************************************************************** +* Name :AppStartRoutine0xDF32 +* Called by :Dcm +* Preconditions:N/A +* Parameters :Dcm_MsgContextType* pMsgContext +* Return code :N/A +* Description :Start RKE Learning +* +******************************************************************************/ +FUNC(void,DCM_CODE) App_StartRoutine0xDF32(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext) +{ + #if 0 + DsdInternal_RoutineStarted(); + //add you code here + //pMsgContext->resData[4]=0x00; + pMsgContext->reqData[4] = get_ant_dcm_to_peps(pMsgContext->reqData[4]); + if(0)//(rf_dcm_app_routine_start(RF_CMD_RSSI_SINGLE, &pMsgContext->reqData[4], pMsgContext->reqDataLen - 4) == TRUE) + { + pMsgContext->resData[4]=0x00; + } + else + { + pMsgContext->resData[4]=0x01; + } + pMsgContext->resDataLen=4+DcmDspRoutineIdentifierTable_31[RoutineHandle_0xDF32].DcmDspRoutineInfoRef.DcmDspStartRoutineOut.DcmDspRoutineSignalLength; + DsdInternal_ProcessingDone(pMsgContext); + #else + DsdInternal_SetNegResponse(pMsgContext,DCM_NO_USE_NES_RESPONSE_FOR_31); + #endif +} + + /****************************************************************************** +* Name :AppStopRoutine0xDF32 +* Called by :Dcm +* Preconditions:N/A +* Parameters :Dcm_MsgContextType* pMsgContext +* Return code :N/A +* Description :Start RKE Learning +* +******************************************************************************/ +FUNC(void,DCM_CODE) App_StopRoutine0xDF32(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext) +{ + #if 0 + DsdInternal_RoutineStopped(); + //add you code here + //pMsgContext->resData[4]=0x00; + pMsgContext->resDataLen=4+DcmDspRoutineIdentifierTable_31[RoutineHandle_0xDF32].DcmDspRoutineInfoRef.DcmDspRoutineStopOut.DcmDspRoutineSignalLength; + DsdInternal_ProcessingDone(pMsgContext); + #else + DsdInternal_SetNegResponse(pMsgContext,DCM_NO_USE_NES_RESPONSE_FOR_31); + #endif +} + + /****************************************************************************** +* Name :AppRequestRoutineResults0xDF32 +* Called by :Dcm +* Preconditions:N/A +* Parameters :Dcm_MsgContextType* pMsgContext +* Return code :N/A +* Description :Start RKE Learning +* +******************************************************************************/ +FUNC(void,DCM_CODE) App_RequestRoutineResults0xDF32(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext) +{ + #if 0 + //add you code here + //pMsgContext->resData[4]=0x00; + //LfReadRssiSingleType l_data; + uint8_t l_lenght; + u8 l_data; + if(sizeof(l_data) >= DcmDspRoutineIdentifierTable_31[RoutineHandle_0xDF32].DcmDspRoutineInfoRef.DcmDspRoutineRequestResOut.DcmDspRoutineSignalLength) + { + l_lenght = DcmDspRoutineIdentifierTable_31[RoutineHandle_0xDF32].DcmDspRoutineInfoRef.DcmDspRoutineRequestResOut.DcmDspRoutineSignalLength; + } + else + { + l_lenght = sizeof(l_data); + } + + if(0)//(TRUE == rf_dcm_app_read_routine_data(RF_CMD_RSSI_SINGLE, (uint8_t *)&l_data, sizeof(l_data))) + { + /*succussed */ + pMsgContext->resData[4]=0x02; + //memory_copys(&(pMsgContext->resData[5]), (uint8_t *)&l_data, l_lenght); + } + else + { + /*ÕýÔÚ´¦Àí*/ + pMsgContext->resData[4]=0x01; + //memory_clear(&pMsgContext->resData[5], l_lenght); + } + pMsgContext->resDataLen=4+DcmDspRoutineIdentifierTable_31[RoutineHandle_0xDF32].DcmDspRoutineInfoRef.DcmDspRoutineRequestResOut.DcmDspRoutineSignalLength; + DsdInternal_ProcessingDone(pMsgContext); + #else + DsdInternal_SetNegResponse(pMsgContext,DCM_NO_USE_NES_RESPONSE_FOR_31); + #endif +} + + /****************************************************************************** +* Name :AppStartRoutine0xDF33 +* Called by :Dcm +* Preconditions:N/A +* Parameters :Dcm_MsgContextType* pMsgContext +* Return code :N/A +* Description :Start RKE Learning +* +******************************************************************************/ +FUNC(void,DCM_CODE) App_StartRoutine0xDF33(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext) +{ + #if 0 + DsdInternal_RoutineStarted(); + //add you code here + //pMsgContext->resData[4]=0x00; + //rf_dcm_app_clr_sn_read_result(); + + if(0)//(lf_tin_app_cmd(LF_TIN_TYPE_TIN,TIN_APP_CMD_READ_SN,(void*)0,0) == TRUE) + { + pMsgContext->resData[4]=0x00; + } + else + { + pMsgContext->resData[4]=0x01; + } + pMsgContext->resDataLen=4+DcmDspRoutineIdentifierTable_31[RoutineHandle_0xDF33].DcmDspRoutineInfoRef.DcmDspStartRoutineOut.DcmDspRoutineSignalLength; + DsdInternal_ProcessingDone(pMsgContext); + #else + DsdInternal_SetNegResponse(pMsgContext,DCM_NO_USE_NES_RESPONSE_FOR_31); + #endif +} + + /****************************************************************************** +* Name :AppRequestRoutineResults0xDF33 +* Called by :Dcm +* Preconditions:N/A +* Parameters :Dcm_MsgContextType* pMsgContext +* Return code :N/A +* Description :Start RKE Learning +* +******************************************************************************/ +FUNC(void,DCM_CODE) App_RequestRoutineResults0xDF33(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext) +{ + #if 0 + //add you code here + //pMsgContext->resData[4]=0x00; + //eol_fob_sn_t l_eol_fob_sn; + uint16_t l_lenght; + u8 l_eol_fob_sn; + u8 l_sn_read_result; + + //ReceiveMessage(MSG_FOB_SN, l_eol_fob_sn); + + if(0)//(sizeof(l_eol_fob_sn) >= DcmDspRoutineIdentifierTable_31[RoutineHandle_0xDF30].DcmDspRoutineInfoRef.DcmDspRoutineRequestResOut.DcmDspRoutineSignalLength) + { + l_lenght = DcmDspRoutineIdentifierTable_31[RoutineHandle_0xDF30].DcmDspRoutineInfoRef.DcmDspRoutineRequestResOut.DcmDspRoutineSignalLength; + } + else + { + l_lenght = sizeof(l_eol_fob_sn); + } + + l_sn_read_result = 0x03;//rf_dcm_app_get_sn_read_result(); + + if(0)//(l_sn_read_result == SN_READ_RESULT_FAILED) + { + pMsgContext->resData[4] = 0x03; + + } + /* + else if(l_sn_read_result == SN_READ_RESULT_SUCCESSED) + { + pMsgContext->resData[4] = 0x02; + + memory_copys((uint8_t *)&(pMsgContext->resData[5]), l_eol_fob_sn, l_lenght); + } + */ + else + { + pMsgContext->resData[4] = 0x01; + } + pMsgContext->resDataLen=4+DcmDspRoutineIdentifierTable_31[RoutineHandle_0xDF33].DcmDspRoutineInfoRef.DcmDspRoutineRequestResOut.DcmDspRoutineSignalLength; + DsdInternal_ProcessingDone(pMsgContext); + #else + DsdInternal_SetNegResponse(pMsgContext,DCM_NO_USE_NES_RESPONSE_FOR_31); + #endif +} + + /****************************************************************************** +* Name :AppStartRoutine0xDF34 +* Called by :Dcm +* Preconditions:N/A +* Parameters :Dcm_MsgContextType* pMsgContext +* Return code :N/A +* Description :Start RKE Learning +* +******************************************************************************/ +FUNC(void,DCM_CODE) App_StartRoutine0xDF34(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext) +{ + #if 0 + DsdInternal_RoutineStarted(); + //add you code here + //pMsgContext->resData[4]=0x00; + pMsgContext->reqData[4] = get_ant_dcm_to_peps(pMsgContext->reqData[4]); + if(0)//(rf_dcm_app_routine_start(RF_CMD_READ_VBAT, &pMsgContext->reqData[4], pMsgContext->reqDataLen - 4) == TRUE) + { + pMsgContext->resData[4]=0x00; + } + else + { + pMsgContext->resData[4]=0x01; + } + pMsgContext->resDataLen=4+DcmDspRoutineIdentifierTable_31[RoutineHandle_0xDF34].DcmDspRoutineInfoRef.DcmDspStartRoutineOut.DcmDspRoutineSignalLength; + DsdInternal_ProcessingDone(pMsgContext); + #else + DsdInternal_SetNegResponse(pMsgContext,DCM_NO_USE_NES_RESPONSE_FOR_31); + #endif +} + + /****************************************************************************** +* Name :AppStopRoutine0xDF34 +* Called by :Dcm +* Preconditions:N/A +* Parameters :Dcm_MsgContextType* pMsgContext +* Return code :N/A +* Description :Start RKE Learning +* +******************************************************************************/ +FUNC(void,DCM_CODE) App_StopRoutine0xDF34(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext) +{ + #if 0 + DsdInternal_RoutineStopped(); + //add you code here + //pMsgContext->resData[4]=0x00; + pMsgContext->resDataLen=4+DcmDspRoutineIdentifierTable_31[RoutineHandle_0xDF34].DcmDspRoutineInfoRef.DcmDspRoutineStopOut.DcmDspRoutineSignalLength; + DsdInternal_ProcessingDone(pMsgContext); + #else + DsdInternal_SetNegResponse(pMsgContext,DCM_NO_USE_NES_RESPONSE_FOR_31); + #endif +} + + /****************************************************************************** +* Name :AppRequestRoutineResults0xDF34 +* Called by :Dcm +* Preconditions:N/A +* Parameters :Dcm_MsgContextType* pMsgContext +* Return code :N/A +* Description :Start RKE Learning +* +******************************************************************************/ +FUNC(void,DCM_CODE) App_RequestRoutineResults0xDF34(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext) +{ + #if 0 + //add you code here + //pMsgContext->resData[4]=0x00; + //LfReadVbatType l_data; + uint8_t l_lenght; + u8 l_data; + if(sizeof(l_data) >= DcmDspRoutineIdentifierTable_31[RoutineHandle_0xDF34].DcmDspRoutineInfoRef.DcmDspRoutineRequestResOut.DcmDspRoutineSignalLength) + { + l_lenght = DcmDspRoutineIdentifierTable_31[RoutineHandle_0xDF34].DcmDspRoutineInfoRef.DcmDspRoutineRequestResOut.DcmDspRoutineSignalLength; + } + else + { + l_lenght = sizeof(l_data); + } + + if(0)//(TRUE == rf_dcm_app_read_routine_data(RF_CMD_READ_VBAT, (uint8_t *)&l_data, sizeof(l_data))) + { + /*succussed */ + pMsgContext->resData[4]=0x02; + //memory_copys(&(pMsgContext->resData[5]), (uint8_t *)&l_data, l_lenght); + } + else + { + /*ÕýÔÚ´¦Àí*/ + pMsgContext->resData[4]=0x01; + //memory_clear(&pMsgContext->resData[5], l_lenght); + } + pMsgContext->resDataLen=4+DcmDspRoutineIdentifierTable_31[RoutineHandle_0xDF34].DcmDspRoutineInfoRef.DcmDspRoutineRequestResOut.DcmDspRoutineSignalLength; + DsdInternal_ProcessingDone(pMsgContext); + #else + DsdInternal_SetNegResponse(pMsgContext,DCM_NO_USE_NES_RESPONSE_FOR_31); + #endif +} + + /****************************************************************************** +* Name :AppStartRoutine0xDF35 +* Called by :Dcm +* Preconditions:N/A +* Parameters :Dcm_MsgContextType* pMsgContext +* Return code :N/A +* Description :Start RKE Learning +* +******************************************************************************/ +FUNC(void,DCM_CODE) App_StartRoutine0xDF35(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext) +{ + #if 0 + DsdInternal_RoutineStarted(); + //add you code here + //pMsgContext->resData[4]=0x00; + pMsgContext->reqData[4] = get_ant_dcm_to_peps(pMsgContext->reqData[4]); + if(0)//(rf_dcm_app_routine_start(RF_CMD_UHF_POW, &pMsgContext->reqData[4], pMsgContext->reqDataLen - 4) == TRUE) + { + pMsgContext->resData[4]=0x00; + } + else + { + pMsgContext->resData[4]=0x01; + } + pMsgContext->resDataLen=4+DcmDspRoutineIdentifierTable_31[RoutineHandle_0xDF35].DcmDspRoutineInfoRef.DcmDspStartRoutineOut.DcmDspRoutineSignalLength; + DsdInternal_ProcessingDone(pMsgContext); + #else + DsdInternal_SetNegResponse(pMsgContext,DCM_NO_USE_NES_RESPONSE_FOR_31); + #endif +} + + /****************************************************************************** +* Name :AppRequestRoutineResults0xDF35 +* Called by :Dcm +* Preconditions:N/A +* Parameters :Dcm_MsgContextType* pMsgContext +* Return code :N/A +* Description :Start RKE Learning +* +******************************************************************************/ +FUNC(void,DCM_CODE) App_RequestRoutineResults0xDF35(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext) +{ + #if 0 + //add you code here + //pMsgContext->resData[4]=0x00; + //LfReadUhfPowType l_data; + uint8_t l_lenght; + u8 l_data; + if(sizeof(l_data) >= DcmDspRoutineIdentifierTable_31[RoutineHandle_0xDF35].DcmDspRoutineInfoRef.DcmDspRoutineRequestResOut.DcmDspRoutineSignalLength) + { + l_lenght = DcmDspRoutineIdentifierTable_31[RoutineHandle_0xDF35].DcmDspRoutineInfoRef.DcmDspRoutineRequestResOut.DcmDspRoutineSignalLength; + } + else + { + l_lenght = sizeof(l_data); + } + + if(0)//(TRUE == rf_dcm_app_read_routine_data(RF_CMD_UHF_POW, (uint8_t *)&l_data, sizeof(l_data))) + { + /*succussed */ + pMsgContext->resData[4]=0x02; + //memory_copys(&(pMsgContext->resData[5]), (uint8_t *)&l_data, l_lenght); + } + else + { + /*ÕýÔÚ´¦Àí*/ + pMsgContext->resData[4]=0x01; + //memory_clear(&pMsgContext->resData[5], l_lenght); + } + pMsgContext->resDataLen=4+DcmDspRoutineIdentifierTable_31[RoutineHandle_0xDF35].DcmDspRoutineInfoRef.DcmDspRoutineRequestResOut.DcmDspRoutineSignalLength; + DsdInternal_ProcessingDone(pMsgContext); + #else + DsdInternal_SetNegResponse(pMsgContext,DCM_NO_USE_NES_RESPONSE_FOR_31); + #endif +} + + /****************************************************************************** +* Name :AppStartRoutine0xDF36 +* Called by :Dcm +* Preconditions:N/A +* Parameters :Dcm_MsgContextType* pMsgContext +* Return code :N/A +* Description :Start RKE Learning +* +******************************************************************************/ +FUNC(void,DCM_CODE) App_StartRoutine0xDF36(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext) +{ + #if 0 + DsdInternal_RoutineStarted(); + //add you code here + //pMsgContext->resData[4]=0x00; + pMsgContext->reqData[4] = get_ant_dcm_to_peps(pMsgContext->reqData[4]); + if(0)//(rf_dcm_app_routine_start(RF_CMD_EE_READ, &pMsgContext->reqData[4], pMsgContext->reqDataLen - 4) == TRUE) + { + pMsgContext->resData[4]=0x00; + } + else + { + pMsgContext->resData[4]=0x01; + } + pMsgContext->resDataLen=4+DcmDspRoutineIdentifierTable_31[RoutineHandle_0xDF36].DcmDspRoutineInfoRef.DcmDspStartRoutineOut.DcmDspRoutineSignalLength; + DsdInternal_ProcessingDone(pMsgContext); + #else + DsdInternal_SetNegResponse(pMsgContext,DCM_NO_USE_NES_RESPONSE_FOR_31); + #endif +} + + /****************************************************************************** +* Name :AppRequestRoutineResults0xDF36 +* Called by :Dcm +* Preconditions:N/A +* Parameters :Dcm_MsgContextType* pMsgContext +* Return code :N/A +* Description :Start RKE Learning +* +******************************************************************************/ +FUNC(void,DCM_CODE) App_RequestRoutineResults0xDF36(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext) +{ + #if 0 + //add you code here + //pMsgContext->resData[4]=0x00; + //LfReadEeReadType l_data; + uint8_t l_lenght; + u8 l_data; + if(sizeof(l_data) >= DcmDspRoutineIdentifierTable_31[RoutineHandle_0xDF36].DcmDspRoutineInfoRef.DcmDspRoutineRequestResOut.DcmDspRoutineSignalLength) + { + l_lenght = DcmDspRoutineIdentifierTable_31[RoutineHandle_0xDF36].DcmDspRoutineInfoRef.DcmDspRoutineRequestResOut.DcmDspRoutineSignalLength; + } + else + { + l_lenght = sizeof(l_data); + } + + if(0)//(TRUE == rf_dcm_app_read_routine_data(RF_CMD_EE_READ, (uint8_t *)&l_data, sizeof(l_data))) + { + /*succussed */ + pMsgContext->resData[4]=0x02; + //memory_copys(&(pMsgContext->resData[5]), (uint8_t *)&l_data, l_lenght); + } + else + { + /*ÕýÔÚ´¦Àí*/ + pMsgContext->resData[4]=0x01; + //memory_clear(&pMsgContext->resData[5], l_lenght); + } + pMsgContext->resDataLen=4+DcmDspRoutineIdentifierTable_31[RoutineHandle_0xDF36].DcmDspRoutineInfoRef.DcmDspRoutineRequestResOut.DcmDspRoutineSignalLength; + DsdInternal_ProcessingDone(pMsgContext); + #else + DsdInternal_SetNegResponse(pMsgContext,DCM_NO_USE_NES_RESPONSE_FOR_31); + #endif +} + + /****************************************************************************** +* Name :AppStartRoutine0xDF37 +* Called by :Dcm +* Preconditions:N/A +* Parameters :Dcm_MsgContextType* pMsgContext +* Return code :N/A +* Description :Start RKE Learning +* +******************************************************************************/ +FUNC(void,DCM_CODE) App_StartRoutine0xDF37(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext) +{ + #if 0 + DsdInternal_RoutineStarted(); + //add you code here + //pMsgContext->resData[4]=0x00; + pMsgContext->reqData[4] = get_ant_dcm_to_peps(pMsgContext->reqData[4]); + if(0)//(rf_dcm_app_routine_start(RF_CMD_EE_WRITE, &pMsgContext->reqData[4], pMsgContext->reqDataLen - 4) == TRUE) + { + pMsgContext->resData[4]=0x00; + } + else + { + pMsgContext->resData[4]=0x01; + } + pMsgContext->resDataLen=4+DcmDspRoutineIdentifierTable_31[RoutineHandle_0xDF37].DcmDspRoutineInfoRef.DcmDspStartRoutineOut.DcmDspRoutineSignalLength; + DsdInternal_ProcessingDone(pMsgContext); + #else + DsdInternal_SetNegResponse(pMsgContext,DCM_NO_USE_NES_RESPONSE_FOR_31); + #endif +} + + /****************************************************************************** +* Name :AppRequestRoutineResults0xDF37 +* Called by :Dcm +* Preconditions:N/A +* Parameters :Dcm_MsgContextType* pMsgContext +* Return code :N/A +* Description :Start RKE Learning +* +******************************************************************************/ +FUNC(void,DCM_CODE) App_RequestRoutineResults0xDF37(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext) +{ + #if 0 + //add you code here + //pMsgContext->resData[4]=0x00; + //LfReadEeWriteType l_data; + uint8_t l_lenght; + u8 l_data; + //add you code here + //pMsgContext->resData[4]=0x00; + if(0)//(TRUE == rf_dcm_app_read_routine_data(RF_CMD_EE_WRITE, (uint8_t *)&l_data, sizeof(l_data))) + { + /*succussed */ + pMsgContext->resData[4]=0x02; + //memory_copys(&(pMsgContext->resData[5]), (uint8_t *)&l_data, l_lenght); + } + else + { + /*ÕýÔÚ´¦Àí*/ + pMsgContext->resData[4]=0x01; + //memory_clear(&pMsgContext->resData[5], l_lenght); + } + pMsgContext->resDataLen=4+DcmDspRoutineIdentifierTable_31[RoutineHandle_0xDF37].DcmDspRoutineInfoRef.DcmDspRoutineRequestResOut.DcmDspRoutineSignalLength; + DsdInternal_ProcessingDone(pMsgContext); + #else + DsdInternal_SetNegResponse(pMsgContext,DCM_NO_USE_NES_RESPONSE_FOR_31); + #endif +} + + /****************************************************************************** +* Name :AppStartRoutine0xDF38 +* Called by :Dcm +* Preconditions:N/A +* Parameters :Dcm_MsgContextType* pMsgContext +* Return code :N/A +* Description :Start RKE Learning +* +******************************************************************************/ +FUNC(void,DCM_CODE) App_StartRoutine0xDF38(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext) +{ + #if 0 + DsdInternal_RoutineStarted(); + //add you code here + //pMsgContext->resData[4]=0x00; + pMsgContext->resDataLen=4+DcmDspRoutineIdentifierTable_31[RoutineHandle_0xDF38].DcmDspRoutineInfoRef.DcmDspStartRoutineOut.DcmDspRoutineSignalLength; + DsdInternal_ProcessingDone(pMsgContext); + #else + DsdInternal_SetNegResponse(pMsgContext,DCM_NO_USE_NES_RESPONSE_FOR_31); + #endif +} + + /****************************************************************************** +* Name :AppRequestRoutineResults0xDF38 +* Called by :Dcm +* Preconditions:N/A +* Parameters :Dcm_MsgContextType* pMsgContext +* Return code :N/A +* Description :Start RKE Learning +* +******************************************************************************/ +FUNC(void,DCM_CODE) App_RequestRoutineResults0xDF38(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext) +{ + #if 0 + //add you code here + //pMsgContext->resData[4]=0x00; + pMsgContext->resDataLen=4+DcmDspRoutineIdentifierTable_31[RoutineHandle_0xDF38].DcmDspRoutineInfoRef.DcmDspRoutineRequestResOut.DcmDspRoutineSignalLength; + DsdInternal_ProcessingDone(pMsgContext); + #else + DsdInternal_SetNegResponse(pMsgContext,DCM_NO_USE_NES_RESPONSE_FOR_31); + #endif +} + + /****************************************************************************** +* Name :AppStartRoutine0xDF39 +* Called by :Dcm +* Preconditions:N/A +* Parameters :Dcm_MsgContextType* pMsgContext +* Return code :N/A +* Description :Start RKE Learning +* +******************************************************************************/ +FUNC(void,DCM_CODE) App_StartRoutine0xDF39(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext) +{ + #if 0 + DsdInternal_RoutineStarted(); + //add you code here + //pMsgContext->resData[4]=0x00; + pMsgContext->reqData[4] = get_ant_dcm_to_peps(pMsgContext->reqData[4]); + if(0)//(rf_dcm_app_routine_start(RF_CMD_DURABILITY_TEST, &pMsgContext->reqData[4], pMsgContext->reqDataLen - 4) == TRUE) + { + pMsgContext->resData[4]=0x00; + } + else + { + pMsgContext->resData[4]=0x01; + } + pMsgContext->resDataLen=4+DcmDspRoutineIdentifierTable_31[RoutineHandle_0xDF39].DcmDspRoutineInfoRef.DcmDspStartRoutineOut.DcmDspRoutineSignalLength; + DsdInternal_ProcessingDone(pMsgContext); + #else + DsdInternal_SetNegResponse(pMsgContext,DCM_NO_USE_NES_RESPONSE_FOR_31); + #endif +} + + /****************************************************************************** +* Name :AppStopRoutine0xDF39 +* Called by :Dcm +* Preconditions:N/A +* Parameters :Dcm_MsgContextType* pMsgContext +* Return code :N/A +* Description :Start RKE Learning +* +******************************************************************************/ +FUNC(void,DCM_CODE) App_StopRoutine0xDF39(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext) +{ + #if 0 + DsdInternal_RoutineStopped(); + //add you code here + //pMsgContext->resData[4]=0x00; + pMsgContext->resDataLen=4+DcmDspRoutineIdentifierTable_31[RoutineHandle_0xDF39].DcmDspRoutineInfoRef.DcmDspRoutineStopOut.DcmDspRoutineSignalLength; + DsdInternal_ProcessingDone(pMsgContext); + #else + DsdInternal_SetNegResponse(pMsgContext,DCM_NO_USE_NES_RESPONSE_FOR_31); + #endif +} + + /****************************************************************************** +* Name :AppRequestRoutineResults0xDF39 +* Called by :Dcm +* Preconditions:N/A +* Parameters :Dcm_MsgContextType* pMsgContext +* Return code :N/A +* Description :Start RKE Learning +* +******************************************************************************/ +FUNC(void,DCM_CODE) App_RequestRoutineResults0xDF39(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext) +{ + #if 0 + //add you code here + //pMsgContext->resData[4]=0x00; + //LfReadDurabilityType l_data; + uint8_t l_lenght; + u8 l_data; + if(sizeof(l_data) >= DcmDspRoutineIdentifierTable_31[RoutineHandle_0xDF39].DcmDspRoutineInfoRef.DcmDspRoutineRequestResOut.DcmDspRoutineSignalLength) + { + l_lenght = DcmDspRoutineIdentifierTable_31[RoutineHandle_0xDF39].DcmDspRoutineInfoRef.DcmDspRoutineRequestResOut.DcmDspRoutineSignalLength; + } + else + { + l_lenght = sizeof(l_data); + } + + if(0)//(TRUE == rf_dcm_app_read_routine_data(RF_CMD_DURABILITY_TEST, (uint8_t *)&l_data, sizeof(l_data))) + { + /*succussed */ + pMsgContext->resData[4]=0x02; + //memory_copys(&(pMsgContext->resData[5]), (uint8_t *)&l_data, l_lenght); + } + else + { + /*ÕýÔÚ´¦Àí*/ + pMsgContext->resData[4]=0x01; + //memory_clear(&pMsgContext->resData[5], l_lenght); + } + pMsgContext->resDataLen=4+DcmDspRoutineIdentifierTable_31[RoutineHandle_0xDF39].DcmDspRoutineInfoRef.DcmDspRoutineRequestResOut.DcmDspRoutineSignalLength; + DsdInternal_ProcessingDone(pMsgContext); + #else + DsdInternal_SetNegResponse(pMsgContext,DCM_NO_USE_NES_RESPONSE_FOR_31); + #endif +} + /****************************************************************************** +* Name :AppStartRoutine0xDF3A +* Called by :Dcm +* Preconditions:N/A +* Parameters :Dcm_MsgContextType* pMsgContext +* Return code :N/A +* Description :Start RKE Learning +* +******************************************************************************/ +FUNC(void,DCM_CODE) App_StartRoutine0xDF3A(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext) +{ + #if 0 + DsdInternal_RoutineStarted(); + //add you code here + //pMsgContext->resData[4]=0x00; + pMsgContext->resDataLen=4+DcmDspRoutineIdentifierTable_31[RoutineHandle_0xDF3A].DcmDspRoutineInfoRef.DcmDspStartRoutineOut.DcmDspRoutineSignalLength; + DsdInternal_ProcessingDone(pMsgContext); + #else + DsdInternal_SetNegResponse(pMsgContext,DCM_NO_USE_NES_RESPONSE_FOR_31); + #endif +} + + /****************************************************************************** +* Name :AppStopRoutine0xDF3A +* Called by :Dcm +* Preconditions:N/A +* Parameters :Dcm_MsgContextType* pMsgContext +* Return code :N/A +* Description :Start RKE Learning +* +******************************************************************************/ +FUNC(void,DCM_CODE) App_StopRoutine0xDF3A(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext) +{ + #if 0 + DsdInternal_RoutineStopped(); + //add you code here + //pMsgContext->resData[4]=0x00; + pMsgContext->resDataLen=4+DcmDspRoutineIdentifierTable_31[RoutineHandle_0xDF3A].DcmDspRoutineInfoRef.DcmDspRoutineStopOut.DcmDspRoutineSignalLength; + DsdInternal_ProcessingDone(pMsgContext); + #else + DsdInternal_SetNegResponse(pMsgContext,DCM_NO_USE_NES_RESPONSE_FOR_31); + #endif +} + + /****************************************************************************** +* Name :AppRequestRoutineResults0xDF3A +* Called by :Dcm +* Preconditions:N/A +* Parameters :Dcm_MsgContextType* pMsgContext +* Return code :N/A +* Description :Start RKE Learning +* +******************************************************************************/ +FUNC(void,DCM_CODE) App_RequestRoutineResults0xDF3A(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext) +{ + #if 0 + //add you code here + //pMsgContext->resData[4]=0x00; + pMsgContext->resDataLen=4+DcmDspRoutineIdentifierTable_31[RoutineHandle_0xDF3A].DcmDspRoutineInfoRef.DcmDspRoutineRequestResOut.DcmDspRoutineSignalLength; + DsdInternal_ProcessingDone(pMsgContext); + #else + DsdInternal_SetNegResponse(pMsgContext,DCM_E_SERVICENOTSUPPORTEDINACTIVESESSION); + #endif +} + + /****************************************************************************** +* Name :AppStartRoutine0xFF02 +* Called by :Dcm +* Preconditions:N/A +* Parameters :Dcm_MsgContextType* pMsgContext +* Return code :N/A +* Description :Start RKE Learning +* +******************************************************************************/ +FUNC(void,DCM_CODE) App_StartRoutine0xFF02(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext) +{ + #if 0 + DsdInternal_RoutineStarted(); + //add you code here + pMsgContext->resData[4]=0x00; + pMsgContext->resDataLen=4+DcmDspRoutineIdentifierTable_31[RoutineHandle_0xFF02].DcmDspRoutineInfoRef.DcmDspStartRoutineOut.DcmDspRoutineSignalLength; + DsdInternal_ProcessingDone(pMsgContext); + #else + DsdInternal_SetNegResponse(pMsgContext,DCM_NO_USE_NES_RESPONSE_FOR_31); + #endif +} +#endif +/* 3D */ +/******************************************************************************* +* Name :App_WriteAddress +* Called by :Dcm +* Preconditions:N/A +* Parameters :Dcm_MsgContextType* pMsgContext +* Return code :N/A +* Description :N/A +* +******************************************************************************/ +#if(DCM_SERVICE_3D_ENABLED==STD_ON) +uint8 App_WriteAddressCounter=0; +uint32 startAddress=0; +uint16 memorySize=0; + +void App_WriteAddress(Dcm_MsgContextType* pMsgContext) +{ + uint32 i; + + (void)pMsgContext; + + if(App_WriteAddressCounter==0) + { + /* Calculate start address */ + for(i=0;ireqData[2+i])<<(uint8)(8*(gMemoryAddressFormat-1-i)); + } + /* Calculate size */ + for(i=0;ireqData[2+gMemoryAddressFormat+i])<<(uint8)(8*(gMemorySizeFormat-1-i)); + } + } + else + { + } + if(App_WriteAddressCounterresData[2+gMemoryAddressFormat+gMemorySizeFormat+App_WriteAddressCounter]); + #endif + /* If the address to be written is in Flash or EEPROM, call related Driver */ + App_WriteAddressCounter++; + } + else + { + App_WriteAddressCounter=0; + startAddress=0; + memorySize=0; + pMsgContext->resDataLen=2+gMemoryAddressFormat+gMemorySizeFormat; + DsdInternal_ProcessingDone(pMsgContext); + } +} +#endif +/* 85 */ +/****************************************************************************** +* Name :App_DTCRecordOn +* Called by :Dcm +* Preconditions:N/A +* Parameters :Dcm_MsgContextType* pMsgContext +* Return code :N/A +* Description :N/A +* +******************************************************************************/ +FUNC(void,DCM_CODE) App_DTCRecordOn(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext) +{ + + //(void)pMsgContext; + g_dtc_timecount=0u; + gDTCSwitch=1; + dem_enable_dtc_setting(); + pMsgContext->resDataLen=2; + DsdInternal_ProcessingDone(pMsgContext); + +} +/****************************************************************************** +* Name :App_DTCRecordOff +* Called by :Dcm +* Preconditions:N/A +* Parameters :Dcm_MsgContextType* pMsgContext +* Return code :N/A +* Description :N/A +* +******************************************************************************/ +FUNC(void,DCM_CODE) App_DTCRecordOff(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext) +{ + + (void)pMsgContext; + g_dtc_timecount=0u; + gDTCSwitch=0; + + //error = dem_clear_dtc(dtc); + + dem_disable_dtc_setting(); + + pMsgContext->resDataLen=2; + DsdInternal_ProcessingDone(pMsgContext); + +} + +//预留 +void dtc_on_delay_valid_task(void) +{ + if(gDTCSwitch!=0u) + { + g_dtc_timecount++; + if(g_dtc_timecount>=3000/5u) + { + g_dtc_timecount=0u; + gDTCSwitch=0u; + dem_enable_dtc_setting(); + + } + } +} + +#if 0 +//將DATA——F110的數組緩存 返回 +u8 *app_dtc_f110_read(void) +{ + u8 *p_data; + //(void)cal_read_did(0xf110,DATA_0xF188,sizeof(DATA_0xF188)); + p_data = DATA_0xF188; + return p_data; + +} +#endif + +bool check_date_valid(u8 *p_date) +{ + u16 l_year; + bool l_result = TRUE; + u8 l_data[4]; + u16 l_temp; + + #if 1 + + l_data[0] = p_date[0]; + l_data[1] = p_date[1]; + l_data[2] = p_date[2]; + l_data[3] = p_date[3]; + + /*日期合法的判斷*/ + if( (l_data[0]>0x99) || (l_data[1]>0x99) || (l_data[0]==0x00) || (l_data[2]==0x00) || (l_data[3]==0x00) || (l_data[2]>0x12) || (l_data[3]>0x31) ) + { + l_result = FALSE; + } + else if( ( (l_data[2]==0x04) || (l_data[2]==0x06) || (l_data[2]==0x09) || (l_data[2]==0x11 ) ) && (l_data[3]>0x30) ) + { + l_result = FALSE; + } + else if( ( (l_data[2]==0x01) || (l_data[2]==0x03) || (l_data[2]==0x05) || (l_data[2]==0x07 ) || (l_data[2]==0x08 )|| (l_data[2]==0x10 ) || (l_data[2]==0x12 )) && (l_data[3]>0x31) ) + { + l_result = FALSE; + } + else if( l_data[2]==0x02) + { + + l_temp = (u16)(l_data[0] >> 4) ; + l_temp *= 1000; + l_year = l_temp; + l_temp =(u16)(l_data[0] & 0x0f); + l_temp *= 100; + l_year += l_temp; + l_temp =(u16)(l_data[1] >> 4); + l_temp *= 10; + l_year += l_temp; + l_temp =(u16)(l_data[1] & 0x0f) ; + l_year += l_temp; + + //l_year = (u16)(l_data[0] >> 4) * 1000 + (u16)(l_data[0] & 0x0f) * 100 + (u16)(l_data[1] >> 4) * 10 + (u16)(l_data[1] & 0x0f) ; + if( ( (l_year%4) ==0) && ( (l_year%100) != 0) || ( (l_year%400) ==0) ) + { + l_temp = 0x29; + } + else + { + l_temp = 0x28; + } + + if(l_data[3]>l_temp) + { + l_result = FALSE; + } + else + { + l_result = TRUE; + } + + + } + else + { + //code + } + #endif + + return l_result; +} + + + + + + + + + +/*PRQA S 2980,2981,2983,2995,2996--*/ diff --git a/code_app_out/Source/ComStack/Can_Gen/Dcm/Dcm_Cfg.c b/code_app_out/Source/ComStack/Can_Gen/Dcm/Dcm_Cfg.c new file mode 100644 index 0000000..bcc4f80 --- /dev/null +++ b/code_app_out/Source/ComStack/Can_Gen/Dcm/Dcm_Cfg.c @@ -0,0 +1,291 @@ +/** + ****************************************************************************** + * @file + * @author + * @version + * @date + * @brief + * @function List: + ****************************************************************************** + * @attention + * + * + *

© COPYRIGHT 2021

+ ****************************************************************************** + * @History: + * @Author: + * @Data: + * @Version: +*/ + +/******************************************************************************* +* Include files +********************************************************************************/ +#include "Dcm_Cfg.h" +#include "Dcm.h" + +CONST(uint8, DCM_VARIABLE) gSidMap_1[72]= +{ + 0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF, + 0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF, + + 0x00,0x01,0xFF,0xFF,0x02,0xFF,0xFF,0xFF, + 0xFF,0x03,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF, + 0xFF,0xFF,0x04,0xFF,0xFF,0xFF,0xFF,0x05, + 0x06,0xFF,0xFF,0xFF,0xFF,0xFF,0x07,0x08, + 0xFF,0x09,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF, + 0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0x0a,0xFF, + 0xFF,0xFF,0xFF,0xFF,0xFF,0x0b,0xFF,0xFF +}; +static CONST(DcmDsdServiceTable, DCM_VARIABLE) gServiceTable_1[DCM_NUM_OF_SERVICE]= +{ + #if(DCM_SERVICE_10_ENABLED==STD_ON) + { DCM_DSDSIDTABID,{&DspInternal_Uds_DiagnosticSessionControl, UDS_SERVICE_WITH_SUB_FUNCTION, (DCM_SEC_LEV_SL_ALL),(DCM_SESSION_DEFAULT|DCM_SESSION_EXTENDED_DIAGNOSTIC|DCM_SESSION_PROGRAMMING|DCM_SESSION_USERDEFINED1)}, + DCM_SUBSERVICESTART, (NUM_OF_10_SUB_FUNCTION-1u),PHYSICAL_AND_FUNCTIONAL_REQ_SUPPORTED},/* 0x10 */ + #endif + + #if(DCM_SERVICE_11_ENABLED==STD_ON) + { DCM_DSDSIDTABID,{&DspInternal_Uds_EcuReset, UDS_SERVICE_WITH_SUB_FUNCTION, (DCM_SEC_LEV_SL_1),(DCM_SESSION_EXTENDED_DIAGNOSTIC|DCM_SESSION_PROGRAMMING|DCM_SESSION_USERDEFINED1)}, + NUM_OF_10_SUB_FUNCTION, (NUM_OF_10_SUB_FUNCTION+ + NUM_OF_11_SUB_FUNCTION-1u),PHYSICAL_REQ_SUPPORTED},/* 0x11 */ + #endif + + #if(DCM_SERVICE_14_ENABLED==STD_ON) + { DCM_DSDSIDTABID,{&DspInternal_Uds_ClearDiagnosticInformation, UDS_SERVICE_WITHOUT_SUB_FUNCTION,(DCM_SEC_LEV_SL_ALL),(DCM_SESSION_DEFAULT|DCM_SESSION_EXTENDED_DIAGNOSTIC|DCM_SESSION_USERDEFINED1) }, + (DCM_NUM_OF_SUB_SERVICE-1u),(DCM_NUM_OF_SUB_SERVICE-1u),PHYSICAL_AND_FUNCTIONAL_REQ_SUPPORTED},/* 0x14 */ + #endif + + #if(DCM_SERVICE_19_ENABLED==STD_ON) + { DCM_DSDSIDTABID,{&DspInternal_Uds_ReadDTCInformation, UDS_SERVICE_WITH_SUB_FUNCTION, (DCM_SEC_LEV_SL_ALL),(DCM_SESSION_DEFAULT|DCM_SESSION_EXTENDED_DIAGNOSTIC|DCM_SESSION_USERDEFINED1) }, + (NUM_OF_10_SUB_FUNCTION+NUM_OF_11_SUB_FUNCTION),(NUM_OF_10_SUB_FUNCTION+NUM_OF_11_SUB_FUNCTION+NUM_OF_19_SUB_FUNCTION-1u),PHYSICAL_AND_FUNCTIONAL_REQ_SUPPORTED},/* 0x19 */ + #endif + + #if(DCM_SERVICE_22_ENABLED==STD_ON) + { DCM_DSDSIDTABID,{&DspInternal_Uds_ReadDataByIdentifier, UDS_SERVICE_WITHOUT_SUB_FUNCTION,(DCM_SEC_LEV_SL_ALL),(DCM_SESSION_DEFAULT|DCM_SESSION_EXTENDED_DIAGNOSTIC|DCM_SESSION_PROGRAMMING|DCM_SESSION_USERDEFINED1)}, + (DCM_NUM_OF_SUB_SERVICE-1u),(DCM_NUM_OF_SUB_SERVICE-1u),PHYSICAL_AND_FUNCTIONAL_REQ_SUPPORTED},/* 0x22 */ + #endif + + #if(DCM_SERVICE_27_ENABLED==STD_ON) + { DCM_DSDSIDTABID,{&DspInternal_Uds_SecurityAccess, UDS_SERVICE_WITH_SUB_FUNCTION, (DCM_SEC_LEV_SL_ALL),(DCM_SESSION_EXTENDED_DIAGNOSTIC|DCM_SESSION_PROGRAMMING|DCM_SESSION_USERDEFINED1) }, + (NUM_OF_10_SUB_FUNCTION+NUM_OF_11_SUB_FUNCTION+NUM_OF_19_SUB_FUNCTION),(NUM_OF_10_SUB_FUNCTION+NUM_OF_11_SUB_FUNCTION+NUM_OF_19_SUB_FUNCTION+NUM_OF_27_SUB_FUNCTION-1u), + PHYSICAL_AND_FUNCTIONAL_REQ_SUPPORTED},/* 0x27 */ + #endif + + #if(DCM_SERVICE_28_ENABLED==STD_ON) + { DCM_DSDSIDTABID,{&DspInternal_Uds_CommunicationControl, UDS_SERVICE_WITH_SUB_FUNCTION, (DCM_SEC_LEV_SL_ALL),DCM_SESSION_EXTENDED_DIAGNOSTIC|DCM_SESSION_USERDEFINED1 }, + (NUM_OF_10_SUB_FUNCTION+ NUM_OF_11_SUB_FUNCTION+NUM_OF_19_SUB_FUNCTION+NUM_OF_27_SUB_FUNCTION),(NUM_OF_10_SUB_FUNCTION+NUM_OF_11_SUB_FUNCTION+NUM_OF_19_SUB_FUNCTION+NUM_OF_27_SUB_FUNCTION+NUM_OF_28_SUB_FUNCTION-1u),PHYSICAL_AND_FUNCTIONAL_REQ_SUPPORTED},/* 0x28 */ + #endif + + #if(DCM_SERVICE_2E_ENABLED==STD_ON) + { DCM_DSDSIDTABID,{&DspInternal_Uds_WriteDataByIdentifier, UDS_SERVICE_WITHOUT_SUB_FUNCTION,(DCM_SEC_LEV_SL_39B),(DCM_SESSION_EXTENDED_DIAGNOSTIC|DCM_SESSION_PROGRAMMING|DCM_SESSION_USERDEFINED1)}, + (DCM_NUM_OF_SUB_SERVICE-1u),(DCM_NUM_OF_SUB_SERVICE-1u),PHYSICAL_AND_FUNCTIONAL_REQ_SUPPORTED},/* 0x2E */ + #endif + + #if(DCM_SERVICE_2F_ENABLED==STD_ON) + { DCM_DSDSIDTABID,{&DspInternal_Uds_InputOutputControlByIdentifier, UDS_SERVICE_WITHOUT_SUB_FUNCTION,DCM_SEC_LEV_SL_ALL,DCM_SESSION_EXTENDED_DIAGNOSTIC|DCM_SESSION_USERDEFINED1}, + (DCM_NUM_OF_SUB_SERVICE-1),(DCM_NUM_OF_SUB_SERVICE-1u),PHYSICAL_REQ_SUPPORTED}, /* 0x2F */ + #endif + + #if(DCM_SERVICE_31_ENABLED==STD_ON) + { DCM_DSDSIDTABID,{&DspInternal_Uds_RoutineControl, UDS_SERVICE_WITH_SUB_FUNCTION, (DCM_SEC_LEV_SL_ALL),(DCM_SESSION_EXTENDED_DIAGNOSTIC|DCM_SESSION_USERDEFINED1|DCM_SESSION_PROGRAMMING)}, + (NUM_OF_10_SUB_FUNCTION+NUM_OF_11_SUB_FUNCTION+NUM_OF_19_SUB_FUNCTION+NUM_OF_27_SUB_FUNCTION+NUM_OF_28_SUB_FUNCTION+NUM_OF_2C_SUB_FUNCTION), + (NUM_OF_10_SUB_FUNCTION+NUM_OF_11_SUB_FUNCTION+NUM_OF_19_SUB_FUNCTION+NUM_OF_27_SUB_FUNCTION+NUM_OF_28_SUB_FUNCTION+NUM_OF_2C_SUB_FUNCTION+NUM_OF_31_SUB_FUNCTION-1u),PHYSICAL_AND_FUNCTIONAL_REQ_SUPPORTED}, /* 0x31 */ + #endif + #if(DCM_SERVICE_3E_ENABLED==STD_ON) + { DCM_DSDSIDTABID,{&DspInternal_Uds_TesterPresent, UDS_SERVICE_WITH_SUB_FUNCTION, (DCM_SEC_LEV_SL_ALL),(DCM_SESSION_DEFAULT|DCM_SESSION_EXTENDED_DIAGNOSTIC|DCM_SESSION_PROGRAMMING|DCM_SESSION_USERDEFINED1)}, + (NUM_OF_10_SUB_FUNCTION+NUM_OF_11_SUB_FUNCTION+NUM_OF_19_SUB_FUNCTION+NUM_OF_27_SUB_FUNCTION+NUM_OF_28_SUB_FUNCTION+NUM_OF_2C_SUB_FUNCTION+NUM_OF_31_SUB_FUNCTION), + (NUM_OF_10_SUB_FUNCTION+NUM_OF_11_SUB_FUNCTION+NUM_OF_19_SUB_FUNCTION+NUM_OF_27_SUB_FUNCTION+NUM_OF_28_SUB_FUNCTION+NUM_OF_2C_SUB_FUNCTION+NUM_OF_31_SUB_FUNCTION+NUM_OF_3E_SUB_FUNCTION-1u),PHYSICAL_AND_FUNCTIONAL_REQ_SUPPORTED},/* 0x3E */ + #endif + + #if(DCM_SERVICE_85_ENABLED==STD_ON) + { DCM_DSDSIDTABID,{&DspInternal_Uds_ControlDTCSetting, UDS_SERVICE_WITH_SUB_FUNCTION, (DCM_SEC_LEV_SL_ALL),DCM_SESSION_EXTENDED_DIAGNOSTIC|DCM_SESSION_USERDEFINED1}, + (NUM_OF_10_SUB_FUNCTION+NUM_OF_11_SUB_FUNCTION+NUM_OF_19_SUB_FUNCTION+NUM_OF_27_SUB_FUNCTION+NUM_OF_28_SUB_FUNCTION+NUM_OF_2C_SUB_FUNCTION+NUM_OF_31_SUB_FUNCTION+NUM_OF_3E_SUB_FUNCTION), + (NUM_OF_10_SUB_FUNCTION+NUM_OF_11_SUB_FUNCTION+NUM_OF_19_SUB_FUNCTION+NUM_OF_27_SUB_FUNCTION+NUM_OF_28_SUB_FUNCTION+NUM_OF_2C_SUB_FUNCTION+NUM_OF_31_SUB_FUNCTION+NUM_OF_3E_SUB_FUNCTION+NUM_OF_85_SUB_FUNCTION-1u),PHYSICAL_AND_FUNCTIONAL_REQ_SUPPORTED},/* 0x85 */ + #endif + + + { 1,{DCM_NULL, UDS_SERVICE_WITHOUT_SUB_FUNCTION,DCM_SEC_LEV_LOCK,DEFAULT_AND_EXTENDED_SEESION_HANDLE},(DCM_NUM_OF_SUB_SERVICE-1u),(DCM_NUM_OF_SUB_SERVICE-1u),PHYSICAL_AND_FUNCTIONAL_REQ_SUPPORTED} /* 0xFF */ +}; + +P2CONST(CurrentSidMapType, DCM_VARIABLE, DCM_VARIABLE) gCurrentSidMap=gSidMap_1; +P2CONST(DcmDsdServiceTable, DCM_VARIABLE, DCM_VARIABLE) gCurrentDcmDsdServiceTable=gServiceTable_1; +CONST(Dcm_CurentDcmDsdServiceTableSizeType, DCM_VARIABLE) gCurentDcmDsdServiceTableSize=DCM_NUM_OF_SERVICE; +CONST(DcmDsdSubService, DCM_VARIABLE) gDcmDsdSubService[DCM_NUM_OF_SUB_SERVICE]= +{ + #if(DCM_SERVICE_10_ENABLED==STD_ON) + #if(DCM_SERVICE_10_Default==STD_ON) + {&App_Default, &App_DefaultPost, DCM_DEFAULT_SESSION, SUB_FUNCTION_SUPPORTED, (DCM_SEC_LEV_SL_ALL), + (DCM_SESSION_DEFAULT|DCM_SESSION_EXTENDED_DIAGNOSTIC|DCM_SESSION_PROGRAMMING|DCM_SESSION_USERDEFINED1), PHYSICAL_AND_FUNCTIONAL_REQ_SUPPORTED}, + #endif + + #if(DCM_SERVICE_10_Programming==STD_ON) + {&App_Programming, &App_ProgrammingPost, DCM_PROGRAMMING_SESSION, SUB_FUNCTION_SUPPORTED, (DCM_SEC_LEV_SL_ALL), + (DCM_SESSION_EXTENDED_DIAGNOSTIC|DCM_SESSION_PROGRAMMING|DCM_SESSION_USERDEFINED1), PHYSICAL_AND_FUNCTIONAL_REQ_SUPPORTED}, + #endif + + #if(DCM_SERVICE_10_Extended_Diagnostic==STD_ON) + {&App_Extended_Diagnostic, &App_Extended_DiagnosticPost, DCM_EXTENDED_DIAGNOSTIC_SESSION, SUB_FUNCTION_SUPPORTED, (DCM_SEC_LEV_SL_ALL), + (DCM_SESSION_DEFAULT|DCM_SESSION_EXTENDED_DIAGNOSTIC|DCM_SESSION_USERDEFINED1), PHYSICAL_AND_FUNCTIONAL_REQ_SUPPORTED}, + #endif + #if(DCM_SERVICE_10_UserDefined1==STD_ON) + {&App_Kuwe_Session, &App_Kuwe_SessionPost, DCM_Kuwe_Session_SESSION, SUB_FUNCTION_SUPPORTED, (DCM_SEC_LEV_SL_ALL), + (DCM_SESSION_DEFAULT|DCM_SESSION_EXTENDED_DIAGNOSTIC|DCM_SESSION_USERDEFINED1), PHYSICAL_AND_FUNCTIONAL_REQ_SUPPORTED}, + #endif + + #endif + #if(DCM_SERVICE_11_ENABLED==STD_ON) + #if(DCM_SERVICE_11_HardReset==STD_ON) + {&App_HardReset, &App_HardResetPost, DCM_HARD_RESET, SUB_FUNCTION_SUPPORTED, (DCM_SEC_LEV_SL_1), + (DCM_SESSION_EXTENDED_DIAGNOSTIC|DCM_SESSION_PROGRAMMING|DCM_SESSION_USERDEFINED1), PHYSICAL_REQ_SUPPORTED}, + #endif + + #if(DCM_SERVICE_11_SoftReset==STD_ON) + {&App_SoftReset, &App_SoftResetPost, DCM_SOFT_RESET, SUB_FUNCTION_SUPPORTED, (DCM_SEC_LEV_SL_1), + (DCM_SESSION_EXTENDED_DIAGNOSTIC|DCM_SESSION_PROGRAMMING|DCM_SESSION_USERDEFINED1), PHYSICAL_REQ_SUPPORTED}, + #endif + + #endif + #if(DCM_SERVICE_19_ENABLED==STD_ON) + #if(reportNumberOfDTCByStatusMask==STD_ON) + {&App_ReportNumberOfDTCByStatusMask, DCM_NULL, DCM_REPORTNUMBEROFDTCBYSTATUSMASK, SUB_FUNCTION_SUPPORTED, (DCM_SEC_LEV_SL_ALL), + (DCM_SESSION_DEFAULT|DCM_SESSION_EXTENDED_DIAGNOSTIC|DCM_SESSION_USERDEFINED1), PHYSICAL_AND_FUNCTIONAL_REQ_SUPPORTED}, + #endif + + #if(reportDTCByStatusMask==STD_ON) + {&App_ReportDTCByStatusMask, DCM_NULL, DCM_REPORTDTCBYSTATUSMASK, SUB_FUNCTION_SUPPORTED, (DCM_SEC_LEV_SL_ALL), + (DCM_SESSION_DEFAULT|DCM_SESSION_EXTENDED_DIAGNOSTIC|DCM_SESSION_USERDEFINED1), PHYSICAL_AND_FUNCTIONAL_REQ_SUPPORTED}, + #endif + + #if(reportDTCSnapshotRecordByDTCNumber==STD_ON) + {&App_ReportDTCSnapshotRecordByDTCNumber, DCM_NULL, DCM_REPORTDTCSNAPSHOTRECORDBYDTCNUMBER, SUB_FUNCTION_SUPPORTED, (DCM_SEC_LEV_SL_ALL), + (DCM_SESSION_DEFAULT|DCM_SESSION_EXTENDED_DIAGNOSTIC|DCM_SESSION_USERDEFINED1), PHYSICAL_AND_FUNCTIONAL_REQ_SUPPORTED}, + #endif + + #if(reportDTCExtendedDataRecordByDTCNumber==STD_ON) + {&App_ReportDTCExtendedDataRecordByDTCNumber, DCM_NULL, DCM_REPORTDTCEXTENDEDDATARECORDBYDTCNUMBER, SUB_FUNCTION_SUPPORTED, (DCM_SEC_LEV_SL_ALL), + (DCM_SESSION_DEFAULT|DCM_SESSION_EXTENDED_DIAGNOSTIC|DCM_SESSION_USERDEFINED1), PHYSICAL_AND_FUNCTIONAL_REQ_SUPPORTED}, + #endif + + #if(reportSupportedDTC==STD_ON) + {&App_ReportSupportedDTC, DCM_NULL, DCM_REPORTSUPPORTEDDTC, SUB_FUNCTION_SUPPORTED, (DCM_SEC_LEV_SL_ALL), + (DCM_SESSION_DEFAULT|DCM_SESSION_EXTENDED_DIAGNOSTIC|DCM_SESSION_USERDEFINED1), PHYSICAL_AND_FUNCTIONAL_REQ_SUPPORTED}, + #endif + + #endif + #if(DCM_SERVICE_27_ENABLED==STD_ON) + #if(DCM_SERVICE_27_Request_Seed_L1==STD_ON) + {&App_Request_Seed_L1, DCM_NULL, REQUEST_SEED_L1, SUB_FUNCTION_SUPPORTED, (DCM_SEC_LEV_SL_ALL), + DCM_SESSION_EXTENDED_DIAGNOSTIC|DCM_SESSION_USERDEFINED1, PHYSICAL_REQ_SUPPORTED}, + #endif + + #if(DCM_SERVICE_27_Send_Key_L1==STD_ON) + {&App_Send_Key_L1, DCM_NULL, SEND_KEY_L1, SUB_FUNCTION_SUPPORTED, (DCM_SEC_LEV_SL_ALL), + DCM_SESSION_EXTENDED_DIAGNOSTIC|DCM_SESSION_USERDEFINED1, PHYSICAL_REQ_SUPPORTED}, + #endif + + #if(DCM_SERVICE_27_Request_Seed_L2==STD_ON) + {&App_Request_Seed_L2, DCM_NULL, REQUEST_SEED_L2, SUB_FUNCTION_SUPPORTED, (DCM_SEC_LEV_SL_ALL), + DCM_SESSION_EXTENDED_DIAGNOSTIC | DCM_SESSION_PROGRAMMING|DCM_SESSION_USERDEFINED1, PHYSICAL_REQ_SUPPORTED}, + #endif + + #if(DCM_SERVICE_27_Send_Key_L2==STD_ON) + {&App_Send_Key_L2, DCM_NULL, SEND_KEY_L2, SUB_FUNCTION_SUPPORTED, (DCM_SEC_LEV_SL_ALL), + DCM_SESSION_EXTENDED_DIAGNOSTIC | DCM_SESSION_PROGRAMMING|DCM_SESSION_USERDEFINED1, PHYSICAL_REQ_SUPPORTED}, + #endif + + #if(DCM_SERVICE_27_Request_Seed_L3==STD_ON) + {&App_Request_Seed_L3, DCM_NULL, REQUEST_SEED_L3, SUB_FUNCTION_SUPPORTED, (DCM_SEC_LEV_SL_ALL), + DCM_SESSION_EXTENDED_DIAGNOSTIC|DCM_SESSION_USERDEFINED1, PHYSICAL_REQ_SUPPORTED}, + #endif + + #if(DCM_SERVICE_27_Send_Key_L3==STD_ON) + {&App_Send_Key_L3, DCM_NULL, SEND_KEY_L3, SUB_FUNCTION_SUPPORTED, (DCM_SEC_LEV_SL_ALL), + DCM_SESSION_EXTENDED_DIAGNOSTIC|DCM_SESSION_USERDEFINED1, PHYSICAL_REQ_SUPPORTED}, + #endif + + #if(DCM_SERVICE_27_Request_Seed_L4==STD_ON) + {&App_Request_Seed_L4, DCM_NULL, REQUEST_SEED_L4, SUB_FUNCTION_SUPPORTED, (DCM_SEC_LEV_SL_ALL), + DCM_SESSION_EXTENDED_DIAGNOSTIC|DCM_SESSION_PROGRAMMING|DCM_SESSION_USERDEFINED1, PHYSICAL_REQ_SUPPORTED}, + #endif + + #if(DCM_SERVICE_27_Send_Key_L4==STD_ON) + {&App_Send_Key_L4, DCM_NULL, SEND_KEY_L4, SUB_FUNCTION_SUPPORTED, (DCM_SEC_LEV_SL_ALL), + DCM_SESSION_EXTENDED_DIAGNOSTIC|DCM_SESSION_PROGRAMMING|DCM_SESSION_USERDEFINED1, PHYSICAL_REQ_SUPPORTED}, + #endif + + #if(DCM_SERVICE_27_Request_Seed_L5==STD_ON) + {&App_Request_Seed_L5, DCM_NULL, REQUEST_SEED_L5, SUB_FUNCTION_SUPPORTED, (DCM_SEC_LEV_SL_ALL), + DCM_SESSION_EXTENDED_DIAGNOSTIC|DCM_SESSION_PROGRAMMING|DCM_SESSION_USERDEFINED1, PHYSICAL_REQ_SUPPORTED}, + #endif + + #if(DCM_SERVICE_27_Send_Key_L5==STD_ON) + {&App_Send_Key_L5, DCM_NULL, SEND_KEY_L5, SUB_FUNCTION_SUPPORTED, (DCM_SEC_LEV_SL_ALL), + DCM_SESSION_EXTENDED_DIAGNOSTIC|DCM_SESSION_PROGRAMMING|DCM_SESSION_USERDEFINED1, PHYSICAL_REQ_SUPPORTED}, + #endif + + #if(DCM_SERVICE_27_Request_Seed_L6==STD_ON) + {&App_Request_Seed_L6, DCM_NULL, REQUEST_SEED_L6, SUB_FUNCTION_SUPPORTED, (DCM_SEC_LEV_SL_ALL), + DCM_SESSION_EXTENDED_DIAGNOSTIC|DCM_SESSION_PROGRAMMING|DCM_SESSION_USERDEFINED1, PHYSICAL_REQ_SUPPORTED}, + #endif + + #if(DCM_SERVICE_27_Send_Key_L6==STD_ON) + {&App_Send_Key_L6, DCM_NULL, SEND_KEY_L6, SUB_FUNCTION_SUPPORTED, (DCM_SEC_LEV_SL_ALL), + DCM_SESSION_EXTENDED_DIAGNOSTIC|DCM_SESSION_PROGRAMMING|DCM_SESSION_USERDEFINED1, PHYSICAL_REQ_SUPPORTED}, + #endif + + #endif + #if(DCM_SERVICE_28_ENABLED==STD_ON) + #if(DCM_SERVICE_28_EnableRxAndTx==STD_ON) + {&App_EnableRxAndTx, DCM_NULL, ENABLE_RX_AND_TX, SUB_FUNCTION_SUPPORTED, (DCM_SEC_LEV_SL_ALL), + DCM_SESSION_EXTENDED_DIAGNOSTIC|DCM_SESSION_USERDEFINED1, PHYSICAL_AND_FUNCTIONAL_REQ_SUPPORTED}, + #endif + + #if(DCM_SERVICE_28_EnableRxAndDisableTx==STD_ON) + {&App_EnableRxAndDisableTx, DCM_NULL, ENBALE_RX_AND_DISABLE_TX, SUB_FUNCTION_SUPPORTED, (DCM_SEC_LEV_SL_ALL), + DCM_SESSION_EXTENDED_DIAGNOSTIC|DCM_SESSION_USERDEFINED1, PHYSICAL_AND_FUNCTIONAL_REQ_SUPPORTED}, + #endif + + #if(DCM_SERVICE_28_DisableRxAndTx==STD_ON) + {&App_DisableRxAndTx, DCM_NULL, DISABLE_RX_AND_TX, SUB_FUNCTION_SUPPORTED, (DCM_SEC_LEV_SL_ALL), + DCM_SESSION_EXTENDED_DIAGNOSTIC|DCM_SESSION_USERDEFINED1, PHYSICAL_AND_FUNCTIONAL_REQ_SUPPORTED}, + #endif + + #endif + #if(DCM_SERVICE_2C_ENABLED==STD_ON) + #endif +#if(DCM_SERVICE_31_ENABLED==STD_ON) + #if(DCM_SERVICE_31_startRoutine==STD_ON) + {DCM_NULL, DCM_NULL, START_ROUTINE, SUB_FUNCTION_SUPPORTED,DCM_SEC_LEV_ALL,DCM_SESSION_DEFAULT|DCM_SESSION_EXTENDED_DIAGNOSTIC|DCM_SESSION_USERDEFINED1, PHYSICAL_REQ_SUPPORTED}, /* 40,0x31 01 */ + #endif + + #if(DCM_SERVICE_31_stopRoutine==STD_ON) + {DCM_NULL, DCM_NULL, STOP_ROUTINE, SUB_FUNCTION_SUPPORTED,DCM_SEC_LEV_LOCK,DEFAULT_AND_EXTENDED_SEESION_HANDLE, PHYSICAL_AND_FUNCTIONAL_REQ_SUPPORTED}, /* 41,0x31 02 */ + #endif + + #if(DCM_SERVICE_31_requestRoutineResults==STD_ON) + {DCM_NULL, DCM_NULL, REQUEST_ROUTINE_RESULT, SUB_FUNCTION_SUPPORTED,DCM_SEC_LEV_SL_39B,DEFAULT_AND_EXTENDED_SEESION_HANDLE, PHYSICAL_AND_FUNCTIONAL_REQ_SUPPORTED}, /* 42,0x31 03 */ + #endif + #endif + #if(DCM_SERVICE_3E_ENABLED==STD_ON) + {DCM_NULL, DCM_NULL, ZERO_SUB_FUNCTION, SUB_FUNCTION_SUPPORTED, (DCM_SEC_LEV_SL_ALL), + (DCM_SESSION_DEFAULT|DCM_SESSION_EXTENDED_DIAGNOSTIC|DCM_SESSION_PROGRAMMING|DCM_SESSION_USERDEFINED1), PHYSICAL_AND_FUNCTIONAL_REQ_SUPPORTED}, + #endif + + #if(DCM_SERVICE_85_ENABLED==STD_ON) + #if(DCM_SERVICE_85_DTCRecordOn==STD_ON) + {&App_DTCRecordOn, DCM_NULL, DTC_RECORD_ON, SUB_FUNCTION_SUPPORTED, (DCM_SEC_LEV_SL_ALL), + DCM_SESSION_EXTENDED_DIAGNOSTIC|DCM_SESSION_USERDEFINED1, PHYSICAL_AND_FUNCTIONAL_REQ_SUPPORTED}, + #endif + + #if(DCM_SERVICE_85_DTCRecordOff==STD_ON) + {&App_DTCRecordOff, DCM_NULL, DTC_RECORD_OFF, SUB_FUNCTION_SUPPORTED, (DCM_SEC_LEV_SL_ALL), + DCM_SESSION_EXTENDED_DIAGNOSTIC|DCM_SESSION_USERDEFINED1, PHYSICAL_AND_FUNCTIONAL_REQ_SUPPORTED}, + #endif + + #endif + #if(DCM_SERVICE_86_ENABLED==STD_ON) + #endif + + {DCM_NULL, DCM_NULL, 0, SUB_FUNCTION_SUPPORTED,DCM_SEC_LEV_LOCK,DEFAULT_AND_EXTENDED_SEESION_HANDLE,PHYSICAL_AND_FUNCTIONAL_REQ_SUPPORTED} /* 54,0xFF */ +}; + diff --git a/code_app_out/Source/ComStack/Can_Gen/Dcm/Dcm_Cfg.h b/code_app_out/Source/ComStack/Can_Gen/Dcm/Dcm_Cfg.h new file mode 100644 index 0000000..10d7a8e --- /dev/null +++ b/code_app_out/Source/ComStack/Can_Gen/Dcm/Dcm_Cfg.h @@ -0,0 +1,816 @@ +/** + ****************************************************************************** + * @file + * @author + * @version + * @date + * @brief + * @function List: + ****************************************************************************** + * @attention + * + * + *

© COPYRIGHT 2021

+ ****************************************************************************** + * @History: + * @Author: + * @Data: + * @Version: +*/ +#ifndef _DCM_CFG_H_ +#define _DCM_CFG_H_ + +/******************************************************************************* +* Include files +********************************************************************************/ +#include "can_cfg.h" +#include "Dcm_Types.h" +#include "PduR_Dcm.h" +/******************************************************************************* +* Macros and Tyedef +********************************************************************************/ +#define DCM_SEC_LEV_SL_1 DCM_SEC_LEV_L1 +#define DCM_SEC_LEV_SL_3 DCM_SEC_LEV_L2 +#define DCM_SEC_LEV_SL_5 DCM_SEC_LEV_L3 +#define DCM_SEC_LEV_SL_7 DCM_SEC_LEV_L4 +#define DCM_SEC_LEV_SL_9 DCM_SEC_LEV_L5 +#define DCM_SEC_LEV_SL_B DCM_SEC_LEV_L6 +#define DCM_SEC_LEV_SL_C DCM_SEC_LEV_L7 +#define DCM_SEC_LEV_SL_ALL DCM_SEC_LEV_ALL +//#define DCM_SEC_LEV_SL_15 (DCM_SEC_LEV_SL_1|DCM_SEC_LEV_SL_5) +#define DCM_SEC_LEV_SL_39B (DCM_SEC_LEV_SL_1) +#define DCM_SEC_LEV_SL_UNLOCK (DCM_SEC_LEV_SL_1) + + + /******************************************************************************\ +| The following macros are non-configurable | + \*****************************************************************************/ +#define UseBlockId 0x01u +#define UseDataClientServer 0x02u +#define UseDataSenderReceiver 0x03u +#define UseEcuSignal 0x04u +#define UseFnc 0x05u +#define DCM_NULL ((void*)0) +#define SUB_FUNCTION_NOT_SUPPORTED 0x00u +#define SUB_FUNCTION_SUPPORTED 0x01u +#define PHYSICAL_REQ_SUPPORTED 0x01u +#define FUNCTIONAL_REQ_SUPPORTED 0x02u +#define PHYSICAL_AND_FUNCTIONAL_REQ_SUPPORTED 0x03u +/* For 0x19 */ +#define DCM_REPORTNUMBEROFDTCBYSTATUSMASK 0x01u +#define DCM_REPORTDTCBYSTATUSMASK 0x02u +#define DCM_REPORTDTCSNAPSHOTIDENTIFICATION 0x03u +#define DCM_REPORTDTCSNAPSHOTRECORDBYDTCNUMBER 0x04u +#define DCM_REPORTDTCSNAPSHOTRECORDBYRECORDNUMBER 0x05u +#define DCM_REPORTDTCEXTENDEDDATARECORDBYDTCNUMBER 0x06u +#define DCM_REPORTNUMBEROFDTCBYSEVERITYMASKRECORD 0x07u +#define DCM_REPORTDTCBYSEVERITYMASKRECORD 0x08u +#define DCM_REPORTSEVERITYINFORMATIONOFDTC 0x09u +#define DCM_REPORTSUPPORTEDDTC 0x0Au +#define DCM_REPORTFIRSTTESTFAILEDDTC 0x0Bu +#define DCM_REPORTFIRSTCONFIRMEDDTC 0x0Cu +#define DCM_REPORTMOSTRECENTTESTFAILEDDTC 0x0Du +#define DCM_REPORTMOSTRECENTCONFIRMEDDTC 0x0Eu +#define DCM_REPORTMIRRORMEMORYDTCBYSTATUSMASK 0x0Fu +#define DCM_REPORTMIRRORMEMORYDTCEXTENDEDDATARECORDBYDTCNUMBER 0x10u +#define DCM_REPORTNUMBEROFMIRRORMEMORYDTCBYSTATUSMASK 0x11u +#define DCM_REPORTNUMBEROFEMISSIONSRELATEDOBDDTCBYSTATUSMASK 0x12u +#define DCM_REPORTEMISSIONSRELATEDOBDDTCBYSTATUSMASK 0x13u + +/* For 0x27 */ +#define REQUEST_SEED_L1 0x01u +#define SEND_KEY_L1 0x02u +#define REQUEST_SEED_L2 0x03u +#define SEND_KEY_L2 0x04u +#define REQUEST_SEED_L3 0x05u +#define SEND_KEY_L3 0x06u +#define REQUEST_SEED_L4 0x07u +#define SEND_KEY_L4 0x08u +#define REQUEST_SEED_L5 0x09u +#define SEND_KEY_L5 0x0Au +#define REQUEST_SEED_L6 0x0Bu +#define SEND_KEY_L6 0x0Cu +#define REQUEST_SEED_L7 0x0Du +#define SEND_KEY_L7 0x0Eu +#define REQUEST_SEED_L8 0x0Fu +#define SEND_KEY_L8 0x10u +/* For 0x28 */ +#define ENABLE_RX_AND_TX 0x00u +#define ENBALE_RX_AND_DISABLE_TX 0x01u +#define DISABLE_RX_AND_ENBALE_TX 0x02u +#define DISABLE_RX_AND_TX 0x03u +#define NORMAL_MSG 0x01u +#define NM_MSG 0x02u +#define BOTH_NORMAL_AND_NM_MSG 0x03u +/* For 0x2C */ +#define DEFINEBYIDENTIFIER 0x01u +#define DEFINEBYMEMORYADDRESS 0x02u +#define CLEARDYNAMICALLYDEFINEDDATAIDENTIFIER 0x03u +/* For 0x2F */ +#define RETURN_CONTROL_TO_ECU 0x00u +#define RESET_TO_DEFAULT 0x01u +#define FREEZE_CURRENT_STATE 0x02u +#define SHORT_TERM_ADJUSTMENT 0x03u +/* For 0x31 */ +#define START_ROUTINE 0x01u +#define STOP_ROUTINE 0x02u +#define REQUEST_ROUTINE_RESULT 0x03u +/* For 0x3E */ +#define ZERO_SUB_FUNCTION 0x00u +/* For 0x85 */ +#define DTC_RECORD_ON 0x01u +#define DTC_RECORD_OFF 0x02u +#define DcmTransmit(DcmTxPduId,PduInfoPtr) PduR_DcmTransmit(DcmTxPduId,PduInfoPtr) +#define Dcm_DefaultSessionPost(result) App_DefaultPost(result) + +#define DCM_VENDOR_ID (uint16)(0xFFFFu) /* Supplier ID */ +#define DCM_MODULE_ID (uint16)(0x0023u) /* Dcm Moudle ID */ +/* CanTp Component release Version */ +#define DCM_SW_MAJOR_VERSION (uint8)(0x01u) +#define DCM_SW_MINOR_VERSION (uint8)(0x01u) +#define DCM_SW_PATCH_VERSION (uint8)(0x00u) +/* Autosar release version */ +#define DCM_AR_MAJOR_VERSION (uint8)(0x01u) +#define DCM_AR_MINOR_VERSION (uint8)(0x00u) +#define DCM_AR_PATCH_VERSION (uint8)(0x00u) + + /***********************************************************************************\ +| The following macros are configurable | + \***********************************************************************************/ +#define DCM_DSP_DATA_USE_PORT UseFnc +#define DCM_DEV_ERROR_DETECT STD_OFF +#define DCM_OEM_INDICATION STD_OFF +#define DCM_SUPPLIER_INDICATION STD_OFF +#define DCM_RESPONSE_ALL_REQ STD_OFF +#define DCM_VERSION_INFO_API STD_ON +/* For 15031-5 */ +#define ISO_15031_5 STD_OFF +#define ISO_15031_5_MultiChannel STD_OFF +/* Related to Dcm calling cycle */ +#define DCM_TASK_TIME (uint32)5u +/* Related to 0x78 negative response */ +#define DCM_DSL_DIAG_RESP_FORCE_RESP_PEND_EN STD_ON +#define DCM_NUM_MAX_RESPPEND 4294967295u +/* Related to customized service */ +#define DCM_COSTOMIZED_SERVCIE_SUPPORTED STD_OFF +/* Related to Obd service */ +/* Related to Uds service */ +#define DCM_NUM_OF_SERVICE 13u +#define DCM_NUM_OF_SUB_SERVICE (NUM_OF_10_SUB_FUNCTION+NUM_OF_11_SUB_FUNCTION+\ + NUM_OF_19_SUB_FUNCTION+NUM_OF_27_SUB_FUNCTION+\ + NUM_OF_28_SUB_FUNCTION+NUM_OF_2C_SUB_FUNCTION+\ + NUM_OF_31_SUB_FUNCTION+NUM_OF_3E_SUB_FUNCTION+\ + NUM_OF_85_SUB_FUNCTION+NUM_OF_86_SUB_FUNCTION+1u) +#define UDS_SERVICE_WITHOUT_SUB_FUNCTION 0u +#define UDS_SERVICE_WITH_SUB_FUNCTION 1u +#define DCM_DSDSIDTABID 1u +#define DCM_SUBSERVICESTART 0u +#define DCM_SERVICE_10_ENABLED STD_ON +#if(DCM_SERVICE_10_ENABLED==STD_ON) +/*For user defined session control subfunction*/ +/*start*/ +#define DCM_Kuwe_Session_SESSION 0x60 +#define DCM_SESSION_Kuwe_Session DCM_SESSION_USERDEFINED1 +#define DCM_SERVICE_10_Default STD_ON +#define DCM_SERVICE_10_Programming STD_ON +#define DCM_SERVICE_10_Extended_Diagnostic STD_ON +#define DCM_SERVICE_10_UserDefined1 STD_ON +#define DCM_SERVICE_10_UserDefined2 STD_OFF +#define DCM_SERVICE_10_UserDefined3 STD_OFF +#define DCM_SERVICE_10_UserDefined4 STD_OFF +#define DCM_SERVICE_10_UserDefined5 STD_OFF +#define KIND_OF_SESSION 4u +#define NUM_OF_10_SUB_FUNCTION 4u +#define DEFAULT_AND_EXTENDED_SEESION_HANDLE (DCM_SESSION_DEFAULT | DCM_SESSION_EXTENDED_DIAGNOSTIC) +#define EXTENDED_SEESION_HANDLE DCM_SESSION_EXTENDED_DIAGNOSTIC +#define RESPONSE_WITH_P2TIMER STD_ON +#else +#define NUM_OF_10_SUB_FUNCTION 0u +#endif +#define DCM_SERVICE_11_ENABLED STD_ON +#if(DCM_SERVICE_11_ENABLED==STD_ON) +#define DCM_SERVICE_11_HardReset STD_ON +#define DCM_SERVICE_11_SoftReset STD_ON +#define DCM_SERVICE_11_EnableRapidPowerShutDown STD_OFF +#define DCM_SERVICE_11_DisableRapidPowerShutDown STD_OFF +#define DCM_SERVICE_11_UserDefined1 STD_OFF +#define DCM_SERVICE_11_UserDefined2 STD_OFF +#define DCM_SERVICE_11_KeyOffOnReset STD_OFF +#define NUM_OF_11_SUB_FUNCTION 2u +#else +#define NUM_OF_11_SUB_FUNCTION 0u +#endif +#define DCM_SERVICE_14_ENABLED STD_ON +#define DCM_SERVICE_19_ENABLED STD_ON +#if(DCM_SERVICE_19_ENABLED==STD_ON) +#define reportNumberOfDTCByStatusMask STD_ON +#define reportDTCByStatusMask STD_ON +#define reportDTCSnapshotRecordByDTCNumber STD_OFF +#define reportDTCExtendedDataRecordByDTCNumber STD_OFF +#define reportSupportedDTC STD_ON +#define reportDTCBySeverityMaskRecord STD_OFF +#define reportSeverityInformationOfDTC STD_OFF +#define reportDTCSnapshotRecordByRecordNumber STD_OFF +#define reportNumberOfDTCBySeverityMaskRecord STD_OFF +#define reportEmissionsRelatedOBDDTCByStatusMask STD_OFF +#define reportNumberOfMirrorMemoryDTCByStatusMask STD_OFF +#define reportNumberOfEmissionsRelatedOBDDTCByStatusMask STD_OFF +#define reportDTCSnapshotIdentification STD_OFF +#define reportMirrorMemoryDTCExtendedDataRecordByDTCNumber STD_OFF +#define reportMostRecentConfirmedDTC STD_OFF +#define reportMostRecentTestFailedDTC STD_OFF +#define reportMirrorMemoryDTCByStatusMask STD_OFF +#define reportFirstConfirmedDTC STD_OFF +#define reportFirstTestFailedDTC STD_OFF +#define NUM_OF_19_SUB_FUNCTION 3u +#else +#define NUM_OF_19_SUB_FUNCTION 0u +#endif + #define DCM_SERVICE_22_ENABLED STD_ON +#define DCM_SERVICE_22_COMBINED_DID STD_OFF +#if(DCM_SERVICE_22_COMBINED_DID == STD_ON) + #define MAX_NUM_OF_DID_TO_READ 1u +#else + #define MAX_NUM_OF_DID_TO_READ 1u +#endif +#if(DCM_SERVICE_22_ENABLED==STD_ON) +#define NUMBER_OF_READ_DID 34u +#endif +#define DCM_SERVICE_23_ENABLED STD_OFF +#define DCM_SERVICE_24_ENABLED STD_OFF +#define DCM_SERVICE_27_ENABLED STD_ON +#if(DCM_SERVICE_27_ENABLED==STD_ON) +#define DCM_SERVICE_27_Request_Seed_L1 STD_ON +#define DCM_SERVICE_27_Send_Key_L1 STD_ON +#define DCM_SERVICE_27_Request_Seed_L2 STD_ON +#define DCM_SERVICE_27_Send_Key_L2 STD_ON + +#define DCM_SERVICE_27_Request_Seed_L3 STD_ON +#define DCM_SERVICE_27_Send_Key_L3 STD_ON +#define DCM_SERVICE_27_Request_Seed_L4 STD_ON +#define DCM_SERVICE_27_Send_Key_L4 STD_ON + +#define DCM_SERVICE_27_Request_Seed_L5 STD_ON +#define DCM_SERVICE_27_Send_Key_L5 STD_ON +#define DCM_SERVICE_27_Request_Seed_L6 STD_ON +#define DCM_SERVICE_27_Send_Key_L6 STD_ON +#define KIND_OF_SECURITY_LEVEL 7u //分別是哪七個呢，宏呢 DCM_SERVICE_27_SECURITY_MAP_LOCK +#define NUM_OF_27_SUB_FUNCTION 12u +#define DISABLE_SECURITY_ACCESS_ATTEMPT_NUMBER_RESET STD_OFF +#else +#define NUM_OF_27_SUB_FUNCTION 0u +#endif + +#define DCM_SERVICE_28_ENABLED STD_ON +#if(DCM_SERVICE_28_ENABLED==STD_ON) +#define DCM_SERVICE_28_EnableRxAndTx STD_ON +#define DCM_SERVICE_28_EnableRxAndDisableTx STD_ON +#define DCM_SERVICE_28_DisableRxAndTx STD_ON +#define DCM_SERVICE_28_DisableRxAndEnableTx STD_OFF +#define NUM_OF_28_SUB_FUNCTION 3u +#else +#define NUM_OF_28_SUB_FUNCTION 0u +#endif + +#define DCM_SERVICE_2A_ENABLED STD_OFF +#define NUMBER_OF_PERIODIC_DID 1u +#define DCM_SERVICE_2C_ENABLED STD_OFF +#define NUM_OF_2C_SUB_FUNCTION 0u +#define DCM_SERVICE_2E_ENABLED STD_ON +#if(DCM_SERVICE_2E_ENABLED==STD_ON) +#define NUMBER_OF_WRITE_DID 9u +#endif + +#define DCM_SERVICE_2F_ENABLED STD_ON +#if(DCM_SERVICE_2F_ENABLED==STD_ON) +#define NUMBER_OF_CONTROL_DID 3u +#endif + +#define DCM_SERVICE_31_ENABLED STD_ON +#if(DCM_SERVICE_31_ENABLED==STD_ON) +#define DCM_SERVICE_31_startRoutine STD_ON +#define DCM_SERVICE_31_stopRoutine STD_ON +#define DCM_SERVICE_31_requestRoutineResults STD_ON +#define NUMBER_OF_RID 1u +#define NUM_OF_31_SUB_FUNCTION 3u +#else +#define NUM_OF_31_SUB_FUNCTION 0u +#endif + +#define DCM_SERVICE_3D_ENABLED STD_OFF +#define DCM_SERVICE_3E_ENABLED STD_ON +#if(DCM_SERVICE_3E_ENABLED==STD_ON) +#define NUM_OF_3E_SUB_FUNCTION 1u +#else +#define NUM_OF_3E_SUB_FUNCTION 0u +#endif +#define DCM_SERVICE_85_ENABLED STD_ON +#if(DCM_SERVICE_85_ENABLED==STD_ON) +#define DCM_SERVICE_85_DTCRecordOn STD_ON +#define DCM_SERVICE_85_DTCRecordOff STD_ON +#define NUM_OF_85_SUB_FUNCTION 2u +#else +#define NUM_OF_85_SUB_FUNCTION 0u +#endif +#define DCM_SERVICE_86_ENABLED STD_OFF +#define NUM_OF_86_SUB_FUNCTION 0u +/* Related to diagnostic buffer */ +#define DCM_PAGEDBUFFER_ENABLED STD_OFF +#define UDS_FUNC_BUFFER_SIZE 8u //因為每幀都被復制到物理中了 +#define UDS_PHYS_BUFFER_SIZE 440u +#define NEG_RESP_BUFFER_SIZE 3u +#if(DCM_SERVICE_2A_ENABLED==STD_ON) +#define PERODIC_RESP_BUFFER_SIZE 8 +#endif +/* Additional applicaiton callback */ +#define DCM_GENERAL_DIAGNOSTIC_REQUEST_CTL STD_OFF +typedef uint32 DcmDslBufferSize; +typedef void (*EcucFunctionNameDef)(void); +typedef uint8 (*EcucSubFunctionNameDef)(Dcm_MsgContextType* Function); +typedef void (*VoidEcucSubFunctionNameDef)(Dcm_MsgContextType* Function); +typedef void (*EcucPostSubFunctionNameDef)(Std_ReturnType Result); + +/* For Uds service table */ +typedef struct +{ + EcucFunctionNameDef DcmDsdSidTabFnc; + uint8 DcmDsdSidTabSubfuncAvail; + uint8 DcmDsdSidTabSecurityLevelRef; + uint8 DcmDsdSidTabSessionLevelRef; +}DcmDsdService; +typedef struct +{ + uint8 DcmDsdSidTabId; + DcmDsdService ServiceTable; + uint8 FirstSubService; /* self-defined */ + uint8 LastSubService; /* self-defined */ + uint8 AddressingMode; +}DcmDsdServiceTable; + +/* For Uds sub-service table */ +typedef struct +{ + VoidEcucSubFunctionNameDef DcmDsdSubFunction;/* self-defined */ + EcucPostSubFunctionNameDef DcmDsdSubFunctionPost;/* self-defined */ + uint8 DcmDsdSubServiceId; + uint8 DcmDsdSubServiceIdSupported;/* self-defined */ + uint8 DcmDsdSubServiceSecurityLevelRef; + uint8 DcmDsdSubServiceSessionLevelRef; + uint8 AddressingMode;/* self-defined */ +}DcmDsdSubService; + +/* For security access */ +typedef struct +{ + /* uint32 DcmDspSecurityADRSize;*/ + uint32 DcmDspSecurityDelayTime; + uint32 DcmDspSecurityDelayTimeOnBoot; + uint32 DcmDspSecurityKeySize; + uint8 DcmDspSecurityLevel; + uint8 DcmDspSecurityNumAttDelay; + uint32 DcmDspSecuritySeedSize; +}DcmDspSecurityRow; +typedef enum +{ + KEY_IS_NOT_VALID=0x00u, + KEY_IS_VALID=0x01u +}DcmDspSecurityAccessKey; +/* For session control */ +typedef enum +{ + DCM_NO_BOOT, + DCM_OEM_BOOT, + DCM_SYS_BOOT +}DcmDspSessionForBoot; +typedef struct +{ + DcmDspSessionForBoot DcmDspSession; + uint8 DcmDspSessionLevel; + uint32 DcmDspSessionP2ServerMax; + uint32 DcmDspSessionP2StarServerMax; +}DcmDspSessionRow; + +/* For 0x22 */ +typedef struct +{ + uint32 DcmDspDidIdentifier; + boolean DcmDspDidUsed; + uint16 DcmDspDataSize; + #if(DCM_DSP_DATA_USE_PORT==UseFnc) + VoidEcucSubFunctionNameDef DcmDspDataReadFnc; + #endif + #if(DCM_DSP_DATA_USE_PORT==UseEcuSignal) + VoidEcucSubFunctionNameDef DcmDspDataEcuSignal; + VoidEcucSubFunctionNameDef DcmDspDataReadEcuSignal; + #endif + uint8 DcmDspDidReadSecurityLevelRef; + uint8 DcmDspDidReadSessionRef; + uint8 AddressingMode; +}Dcm_22_ServiceInfoType; + +/* For 0x23 */ +typedef struct +{ + uint32 DcmDspReadMemoryRangeHigh; + uint32 DcmDspReadMemoryRangeLow; + uint8 DcmDspReadMemoryRangeSecurityLevelRef; + uint8 DcmDspReadMemoryRangeSessionRef; + uint8 AddressingMode; +}DcmDspReadMemoryRangeInfo; + +typedef uint8 Dcm_MemoryAddressFormatType; +typedef uint8 Dcm_MemorySizeFormatType; + +/* For 0x24 */ +typedef struct +{ + uint32 DcmDspDidIdentifier; + boolean DcmDspDidUsed; + uint16 DcmDspDataSize; + #if(DCM_DSP_DATA_USE_PORT==UseFnc) + VoidEcucSubFunctionNameDef DcmDspDataGetScalingInfoFnc; + #endif + #if(DCM_DSP_DATA_USE_PORT==UseEcuSignal) + VoidEcucSubFunctionNameDef DcmDspDataEcuSignal; + VoidEcucSubFunctionNameDef DcmDspDataReadEcuSignal; + #endif + uint8 DcmDspDidReadSecurityLevelRef; + uint8 DcmDspDidReadSessionRef; + uint8 AddressingMode; +}Dcm_24_ServiceInfoType; + +/* For 0x2A */ +typedef struct +{ + uint8 DcmDspDidIdentifier; + boolean DcmDspDidUsed; + uint16 DcmDspDataSize; + #if(DCM_DSP_DATA_USE_PORT==UseFnc) + VoidEcucSubFunctionNameDef DcmDspDataReadFnc; + #endif + uint8 DcmDspDidReadSecurityLevelRef; + uint8 DcmDspDidReadSessionRef; + uint8 AddressingMode; +}Dcm_2A_ServiceInfoType; + +/* For 0x2C */ +typedef struct +{ + uint32 DcmDspDidIdentifier; + uint16 DcmDspDataSize; + uint8 DcmDspDidReadSecurityLevelRef;/* security level must be the same as in 0x22 */ + uint8 DcmDspDidReadSessionRef;/* session type must be the same as in 0x22 */ + uint8 AddressingMode; +}Dcm_2C_ServiceInfoType; +/* For 0x2E */ +typedef struct +{ + uint32 DcmDspDidIdentifier; + boolean DcmDspDidUsed; + uint16 DcmDspDataSize; + #if(DCM_DSP_DATA_USE_PORT==UseFnc) + VoidEcucSubFunctionNameDef DcmDspDataWriteFnc; + #endif + #if(DCM_DSP_DATA_USE_PORT==UseEcuSignal) + VoidEcucSubFunctionNameDef DcmDspDataEcuSignal; + #endif + uint8 DcmDspDidWriteSecurityLevelRef; + uint8 DcmDspDidWriteSessionRef; + uint8 AddressingMode; +}Dcm_2E_ServiceInfoType; + +/* For 0x2F */ +typedef struct +{ + uint32 DcmDspDidControlOptionRecordSize; /* This define the size of controlOptionRecord without the InputOutputControlParameter */ + uint32 DcmDspDidControlEnableMaskRecordSize;/* This is only useful when use InputOutputControlParameter */ + uint32 DcmDspDidControlStatusRecordSize; +}DcmDspDidControlRecordSizes; +typedef struct +{ + uint32 DcmDspDidIdentifier; + uint8 DcmDspDidControlSecurityLevelRef; + uint8 DcmDspDidControlSessionRef; + uint8 AddressingMode; + DcmDspDidControlRecordSizes RecordSizes; + #if(DCM_DSP_DATA_USE_PORT==UseFnc) + VoidEcucSubFunctionNameDef DcmDspDataReturnControlToEcuFnc; + VoidEcucSubFunctionNameDef DcmDspDataResetToDefaultFnc; + VoidEcucSubFunctionNameDef DcmDspDataFreezeCurrentStateFnc; + VoidEcucSubFunctionNameDef DcmDspDataShortTermAdjustmentFnc; + #endif + VoidEcucSubFunctionNameDef OtherFnc;/* self-defined */ +}Dcm_2F_ServiceInfoType; + +/* For 0x31 */ +typedef struct +{ + uint8 DcmDspRoutineSecurityLevelRef; + uint8 DcmDspRoutineSessionRef; + uint8 AddressingMode; +}DcmDspRoutineAuthorization; +typedef struct +{ + uint32 DcmDspRoutineSignalLength; + /* uint32 DcmDspRoutineSignalPos; */ /* Reserved */ +}DcmDspRoutineSignal; +typedef struct +{ + DcmDspRoutineAuthorization RoutineAuthorization; + DcmDspRoutineSignal DcmDspRoutineRequestResOut;/*not used */ + DcmDspRoutineSignal DcmDspRoutineStopIn; + DcmDspRoutineSignal DcmDspRoutineStopOut; /*not used */ + DcmDspRoutineSignal DcmDspStartRoutineIn; + DcmDspRoutineSignal DcmDspStartRoutineOut; /*not used */ +}DcmDspRoutineInfo; +typedef struct +{ + uint16 DcmDspRoutineIdentifier; + boolean DcmDspRoutineUsed; /*not used */ + boolean DcmDspRoutineUsePort;/*not used */ + boolean DcmDspRoutineFixedLength; + VoidEcucSubFunctionNameDef DcmDspStartRoutineFnc; + VoidEcucSubFunctionNameDef DcmDspStopRoutineFnc; + VoidEcucSubFunctionNameDef DcmDspRequestResultsRoutineFnc; + DcmDspRoutineInfo DcmDspRoutineInfoRef; +}DcmDspRoutine; + +/* For 0x3D */ +typedef struct +{ + uint32 DcmDspWriteMemoryRangeHigh; + uint32 DcmDspWriteMemoryRangeLow; + uint8 DcmDspWriteMemoryRangeSecurityLevelRef; + uint8 DcmDspWriteMemoryRangeSessionRef; + uint8 AddressingMode; +}DcmDspWriteMemoryRangeInfo; + +/* For 0x86 */ +typedef struct +{ + void(*DcmDspDidRoeActivateFnc)(); + uint32 DcmDspDidRoeEventId; + boolean DcmDspRoeInitOnDSC; + uint32 DcmDspRoeInterMessageTime; + uint16 DcmDspRoeMaxEventLength; + uint8 DcmDspRoeMaxNumberOfRetry; + uint16 DcmDspRoeMaxQueueLength; + boolean DcmDspRoeQueueEnabled; +}DcmDspRoe; + +#if 0 +#define NUM_OF_DTC 11u +#else +/************************************************************************************************** +* Pre-compile parameter +**************************************************************************************************/ +extern CONST(uint8, DCM_VARIABLE) gSidMap_1[72]; +extern P2CONST(CurrentSidMapType, DCM_VARIABLE, DCM_VARIABLE) gCurrentSidMap; +extern P2CONST(DcmDsdServiceTable, DCM_VARIABLE, DCM_VARIABLE) gCurrentDcmDsdServiceTable; +extern CONST(uint32, DCM_VARIABLE) gCurentDcmDsdServiceTableSize; +/* For 0x10,0x11,0x19,0x27,0x28,0x2C,0x31,0x3E,0x85 0x86 */ +extern CONST(DcmDsdSubService, DCM_VARIABLE) gDcmDsdSubService[DCM_NUM_OF_SUB_SERVICE]; + +/************************************************************************************************** +* Link-compile parameter +**************************************************************************************************/ +extern CONST(uint32, DCM_VARIABLE) gDcmDspNonDefaultSessionS3Server; +extern CONST(DcmDspSessionRow, DCM_VARIABLE) gDcmDspSessionRow[KIND_OF_SESSION]; + +#if(DCM_SERVICE_27_ENABLED==STD_ON) +extern CONST(DcmDspSecurityRow, DCM_VARIABLE) gDcmDspSecurityRow[KIND_OF_SECURITY_LEVEL]; +#endif + +#if(DCM_SERVICE_22_ENABLED==STD_ON) +extern CONST(Dcm_22_ServiceInfoType, DCM_VARIABLE) gDcmDsdSubService_22[NUMBER_OF_READ_DID]; /* For 0x22 */ +extern CONST(Dcm_DspMaxDidToReadType, DCM_VARIABLE) DcmDspMaxDidToRead; +#endif + +#if((DCM_SERVICE_23_ENABLED==STD_ON)|| (DCM_SERVICE_2C_ENABLED==STD_ON)||(DCM_SERVICE_3D_ENABLED==STD_ON)) +extern CONST(Dcm_MemoryAddressFormatType, DCM_VARIABLE) gMemoryAddressFormat; +extern CONST(Dcm_MemorySizeFormatType, DCM_VARIABLE) gMemorySizeFormat; +#endif + +#if(DCM_SERVICE_23_ENABLED==STD_ON) +extern CONST(DcmDspReadMemoryRangeInfo, DCM_VARIABLE) gDcmDspReadMemoryRangeInfo_23[NUMBER_OF_READ_ADDRESS_SEG]; +#endif + +#if(DCM_SERVICE_24_ENABLED==STD_ON) +extern CONST(Dcm_24_ServiceInfoType, DCM_VARIABLE) gDcmDsdSubService_24[NUMBER_OF_READ_DID_24]; /* For 0x24 */ +#endif + +#if(DCM_SERVICE_2A_ENABLED==STD_ON) +extern CONST(Dcm_2A_ServiceInfoType, DCM_VARIABLE) gDcmDsdSubService_2A[NUMBER_OF_PERIODIC_DID];/* For 0x2A */ +#endif + +#if(DCM_SERVICE_2C_ENABLED==STD_ON) +extern CONST(Dcm_2C_ServiceInfoType, DCM_VARIABLE) gDcmDsdSubService_2C[NUMBER_OF_DYN_DID]; /* For 0x2C */ +#endif + +#if(DCM_SERVICE_2E_ENABLED==STD_ON) +extern CONST(Dcm_2E_ServiceInfoType, DCM_VARIABLE) gDcmDsdSubService_2E[NUMBER_OF_WRITE_DID]; /* For 0x2E */ +#endif + +#if(DCM_SERVICE_2F_ENABLED==STD_ON) +extern CONST(Dcm_2F_ServiceInfoType, DCM_VARIABLE) gDcmDsdSubService_2F[NUMBER_OF_CONTROL_DID]; /* For 0x2F */ +#endif + +#if(DCM_SERVICE_31_ENABLED==STD_ON) +extern CONST(DcmDspRoutine, DCM_VARIABLE) DcmDspRoutineIdentifierTable_31[NUMBER_OF_RID]; /* For 0x31 */ +#endif + +#if(DCM_SERVICE_3D_ENABLED==STD_ON) +extern CONST(DcmDspWriteMemoryRangeInfo, DCM_VARIABLE) gDcmDspWriteMemoryRangeInfo_3D[NUMBER_OF_WRITE_ADDRESS_SEG]; +#endif + +/************************************************************************************************** +* Application Callback Function Prototye +**************************************************************************************************/ +#if(DCM_GENERAL_DIAGNOSTIC_REQUEST_CTL==STD_ON) +extern FUNC(Std_ReturnType,DCM_CODE) App_DiagnosticActive(void); +#endif +#if(DCM_COSTOMIZED_SERVCIE_SUPPORTED==STD_ON) +extern FUNC(void,DCM_CODE) App_CustomizedServcie(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +#endif +#define NUM_OF_DTC 23u +/* 10 */ +extern FUNC(void,DCM_CODE) App_DefaultPre(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +extern FUNC(void,DCM_CODE) App_Default(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +extern FUNC(void,DCM_CODE) App_Programming(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +extern FUNC(void,DCM_CODE) App_Extended_Diagnostic(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +extern FUNC(void,DCM_CODE) App_Kuwe_Session(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +extern FUNC(void,DCM_CODE) App_DefaultPost(Std_ReturnType Result); +extern FUNC(void,DCM_CODE) App_ProgrammingPost(Std_ReturnType Result); +extern FUNC(void,DCM_CODE) App_Extended_DiagnosticPost(Std_ReturnType Result); +extern FUNC(void,DCM_CODE) App_Kuwe_SessionPost(Std_ReturnType Result); +/* 11 */ +extern FUNC(void,DCM_CODE) App_HardReset(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +extern FUNC(void,DCM_CODE) App_SoftReset(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +extern FUNC(void,DCM_CODE) App_HardResetPost(Std_ReturnType Result); +extern FUNC(void,DCM_CODE) App_SoftResetPost(Std_ReturnType Result); +/* 14 */ +extern FUNC(void,DCM_CODE) App_ClearDiagnosticInformation(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +/* 19 */ +extern FUNC(void,DCM_CODE) App_ReportNumberOfDTCByStatusMask(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +extern FUNC(void,DCM_CODE) App_ReportDTCByStatusMask(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +extern FUNC(void,DCM_CODE) App_ReportDTCSnapshotRecordByDTCNumber(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +extern FUNC(void,DCM_CODE) App_ReportDTCExtendedDataRecordByDTCNumber(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +extern FUNC(void,DCM_CODE) App_ReportSupportedDTC(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +/* 22 */ +extern FUNC(void,DCM_CODE) App_Read0xF100(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +extern FUNC(void,DCM_CODE) App_Read0x01A0(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +extern FUNC(void,DCM_CODE) App_Read0xF1A0(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +extern FUNC(void,DCM_CODE) App_Read0xb070(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +extern FUNC(void,DCM_CODE) App_Read0x0003_net_type(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +extern FUNC(void,DCM_CODE) App_Read0x0005_left_sws(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +extern FUNC(void,DCM_CODE) App_Read0x0004_right_sws(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +extern FUNC(void,DCM_CODE) App_Read0x0008_right_pick(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +extern FUNC(void,DCM_CODE) App_Read0xB101_left_menu(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +extern FUNC(void,DCM_CODE) App_Read0xb073(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +extern FUNC(void,DCM_CODE) App_Read0xb074(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +extern FUNC(void,DCM_CODE) App_Read0xb075(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +extern FUNC(void,DCM_CODE) App_Read0xA030(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +extern FUNC(void,DCM_CODE) App_Read0xF1F2(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +extern FUNC(void,DCM_CODE) App_Read0xF1F1(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +extern FUNC(void,DCM_CODE) App_Read0xF19E(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +extern FUNC(void,DCM_CODE) App_Read0xF194(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +extern FUNC(void,DCM_CODE) App_Read0xF192(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +extern FUNC(void,DCM_CODE) App_Read0xF191(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +extern FUNC(void,DCM_CODE) App_Read0xF188(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +extern FUNC(void,DCM_CODE) App_Read0xF181(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +extern FUNC(void,DCM_CODE) App_Read0xF182(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +extern FUNC(void,DCM_CODE) App_Read0xF180(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +extern FUNC(void,DCM_CODE) App_Read0xF186(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +extern FUNC(void,DCM_CODE) App_Read0xF187(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +extern FUNC(void,DCM_CODE) App_Read0xF189(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +extern FUNC(void,DCM_CODE) App_Read0xF18A(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +extern FUNC(void,DCM_CODE) App_Read0xF18B(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +extern FUNC(void,DCM_CODE) App_Read0xF18C(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +extern FUNC(void,DCM_CODE) App_Read0xF190(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +extern FUNC(void,DCM_CODE) App_Read0xF193(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +extern FUNC(void,DCM_CODE) App_Read0xF195(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +extern FUNC(void,DCM_CODE) App_Read0xF197(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +extern FUNC(void,DCM_CODE) App_Read0xF198(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +extern FUNC(void,DCM_CODE) App_Read0xF199(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +extern FUNC(void,DCM_CODE) App_Read0xF19D(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +/* 23 */ +#if(DCM_SERVICE_23_ENABLED==STD_ON) +extern FUNC(void,DCM_CODE) App_ReadAddress(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +#endif +/* 24 */ +/* 27 */ +extern VAR(uint8, DCM_VARIABLE) gSecurityAcessSequence[KIND_OF_SECURITY_LEVEL]; +extern FUNC(void,DCM_CODE) App_Request_Seed_L1(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +extern FUNC(void,DCM_CODE) App_Send_Key_L1(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +extern FUNC(void,DCM_CODE) App_Request_Seed_L2(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +extern FUNC(void,DCM_CODE) App_Send_Key_L2(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +extern FUNC(void,DCM_CODE) App_Request_Seed_L3(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +extern FUNC(void,DCM_CODE) App_Send_Key_L3(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +extern FUNC(void,DCM_CODE) App_Request_Seed_L4(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +extern FUNC(void,DCM_CODE) App_Send_Key_L4(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +extern FUNC(void,DCM_CODE) App_Request_Seed_L5(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +extern FUNC(void,DCM_CODE) App_Send_Key_L5(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +extern FUNC(void,DCM_CODE) App_Request_Seed_L6(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +extern FUNC(void,DCM_CODE) App_Send_Key_L6(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +/* 28 */ +extern FUNC(void,DCM_CODE) App_EnableRxAndTx(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +extern FUNC(void,DCM_CODE) App_EnableRxAndDisableTx(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +extern FUNC(void,DCM_CODE) App_DisableRxAndTx(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +/* 2A */ +/* 2E */ +extern FUNC(void,DCM_CODE) App_Write0x01A0(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +extern FUNC(void,DCM_CODE) App_Write0xF1A0(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +extern FUNC(void,DCM_CODE) App_Write0xF112(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +extern FUNC(void,DCM_CODE) App_Write0xF190(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +extern FUNC(void,DCM_CODE) App_Write0xF197(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +extern FUNC(void,DCM_CODE) App_Write0xF198(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +extern FUNC(void,DCM_CODE) App_Write0xF199(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +extern FUNC(void,DCM_CODE) App_Write0xF19D(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +extern FUNC(void,DCM_CODE) App_Write0xF18C(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); + +/* 2F */ +#if(DCM_SERVICE_2F_ENABLED==STD_ON) +extern FUNC(void,DCM_CODE) App_ReturnControlToEcu0x201f_motor(Dcm_MsgContextType* pMsgContext); +extern FUNC(void,DCM_CODE) App_ShortTermAdjustment201f_motor(Dcm_MsgContextType* pMsgContext); +extern FUNC(void,DCM_CODE) App_ReturnControlToEcu0xff00(Dcm_MsgContextType* pMsgContext); +extern FUNC(void,DCM_CODE) App_ShortTermAdjustment0xff00(Dcm_MsgContextType* pMsgContext); +extern FUNC(void,DCM_CODE) App_ReturnControlToEcu0x2020(Dcm_MsgContextType* pMsgContext); +extern FUNC(void,DCM_CODE) App_ShortTermAdjustment0x2020(Dcm_MsgContextType* pMsgContext); +extern FUNC(void,DCM_CODE) App_ReturnControlToEcu0x5001(Dcm_MsgContextType* pMsgContext); +extern FUNC(void,DCM_CODE) App_ShortTermAdjustment0x5001(Dcm_MsgContextType* pMsgContext); +extern FUNC(void,DCM_CODE) App_ReturnControlToEcu0x3904(Dcm_MsgContextType* pMsgContext); +extern FUNC(void,DCM_CODE) App_ShortTermAdjustment0x3904(Dcm_MsgContextType* pMsgContext); +extern FUNC(void,DCM_CODE) App_ReturnControlToEcu0x3905(Dcm_MsgContextType* pMsgContext); +extern FUNC(void,DCM_CODE) App_ShortTermAdjustment0x3905(Dcm_MsgContextType* pMsgContext); +#endif +/* 31 */ +#if(DCM_SERVICE_31_ENABLED==STD_ON) +extern VAR(uint8, DCM_VARIABLE) gRountineControlSequence[NUMBER_OF_RID]; +extern VAR(uint8, DCM_VARIABLE) gRountineControlDidHandle; +#endif +extern FUNC(void,DCM_CODE) App_StartRoutine0x0206(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +extern FUNC(void,DCM_CODE) App_StartRoutine0x01b0(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +extern FUNC(void,DCM_CODE) App_RequestRoutineResults0x01b0(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +extern FUNC(void,DCM_CODE) App_StartRoutine0x04FE(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +extern FUNC(void,DCM_CODE) App_RequestRoutineResults0x04FE(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +extern FUNC(void,DCM_CODE) App_StartRoutine0x0203(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +extern FUNC(void,DCM_CODE) App_StopRoutine0x0203(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +extern FUNC(void,DCM_CODE) App_RequestRoutineResults0x0203(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +extern FUNC(void,DCM_CODE) App_StartRoutine0x5902(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +extern FUNC(void,DCM_CODE) App_StopRoutine0x5902(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +extern FUNC(void,DCM_CODE) App_RequestRoutineResults0x5902(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +extern FUNC(void,DCM_CODE) App_StartRoutine0x5903(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +extern FUNC(void,DCM_CODE) App_StopRoutine0x5903(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +extern FUNC(void,DCM_CODE) App_RequestRoutineResults0x5903(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +extern FUNC(void,DCM_CODE) App_StartRoutine0x5904(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +extern FUNC(void,DCM_CODE) App_StopRoutine0x5904(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +extern FUNC(void,DCM_CODE) App_RequestRoutineResults0x5904(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +extern FUNC(void,DCM_CODE) App_StartRoutine0xDF30(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +extern FUNC(void,DCM_CODE) App_StopRoutine0xDF30(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +extern FUNC(void,DCM_CODE) App_RequestRoutineResults0xDF30(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +extern FUNC(void,DCM_CODE) App_StartRoutine0xDF31(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +extern FUNC(void,DCM_CODE) App_StopRoutine0xDF31(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +extern FUNC(void,DCM_CODE) App_RequestRoutineResults0xDF31(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +extern FUNC(void,DCM_CODE) App_StartRoutine0xDF32(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +extern FUNC(void,DCM_CODE) App_StopRoutine0xDF32(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +extern FUNC(void,DCM_CODE) App_RequestRoutineResults0xDF32(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +extern FUNC(void,DCM_CODE) App_StartRoutine0xDF33(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +extern FUNC(void,DCM_CODE) App_RequestRoutineResults0xDF33(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +extern FUNC(void,DCM_CODE) App_StartRoutine0xDF34(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +extern FUNC(void,DCM_CODE) App_StopRoutine0xDF34(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +extern FUNC(void,DCM_CODE) App_RequestRoutineResults0xDF34(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +extern FUNC(void,DCM_CODE) App_StartRoutine0xDF35(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +extern FUNC(void,DCM_CODE) App_RequestRoutineResults0xDF35(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +extern FUNC(void,DCM_CODE) App_StartRoutine0xDF36(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +extern FUNC(void,DCM_CODE) App_RequestRoutineResults0xDF36(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +extern FUNC(void,DCM_CODE) App_StartRoutine0xDF37(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +extern FUNC(void,DCM_CODE) App_RequestRoutineResults0xDF37(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +extern FUNC(void,DCM_CODE) App_StartRoutine0xDF38(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +extern FUNC(void,DCM_CODE) App_RequestRoutineResults0xDF38(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +extern FUNC(void,DCM_CODE) App_StartRoutine0xDF39(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +extern FUNC(void,DCM_CODE) App_StopRoutine0xDF39(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +extern FUNC(void,DCM_CODE) App_RequestRoutineResults0xDF39(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +extern FUNC(void,DCM_CODE) App_StartRoutine0xDF3A(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +extern FUNC(void,DCM_CODE) App_StopRoutine0xDF3A(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +extern FUNC(void,DCM_CODE) App_RequestRoutineResults0xDF3A(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +extern FUNC(void,DCM_CODE) App_StartRoutine0xFF02(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); + +extern FUNC(void,DCM_CODE) App_WriteAddress(Dcm_MsgContextType* pMsgContext); +/* 3D */ +#if(DCM_SERVICE_3D_ENABLED==STD_ON) +extern FUNC(void,DCM_CODE) App_WriteAddress(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +#endif +/* 85 */ +extern VAR(uint8, DCM_VARIABLE) gDTCSwitch; +extern VAR(uint8, DCM_VARIABLE) DTCStatus[NUM_OF_DTC]; +extern FUNC(void,DCM_CODE) App_DTCRecordOn(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +extern FUNC(void,DCM_CODE) App_DTCRecordOff(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +extern FUNC(void,DCM_CODE) App_DTCRecordOn(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +extern FUNC(void,DCM_CODE) App_DTCRecordOff(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +#endif + + +///////修改了源码的宏--适合比亚迪 +#define DCM_USE_FOR_BYD + +#endif diff --git a/code_app_out/Source/ComStack/Can_Gen/Dcm/Dcm_Lcfg.c b/code_app_out/Source/ComStack/Can_Gen/Dcm/Dcm_Lcfg.c new file mode 100644 index 0000000..fc731b9 --- /dev/null +++ b/code_app_out/Source/ComStack/Can_Gen/Dcm/Dcm_Lcfg.c @@ -0,0 +1,156 @@ +/** + ****************************************************************************** + * @file + * @author + * @version + * @date + * @brief + * @function List: + ****************************************************************************** + * @attention + * + * + *

© COPYRIGHT 2021

+ ****************************************************************************** + * @History: + * @Author: + * @Data: + * @Version: +*/ + +/******************************************************************************* +* Include files +********************************************************************************/ +#include "Dcm_Types.h" +#include "Dcm_Cfg.h" +#include "common_cfg.h" +#include "system_config.h" +#include "service_27.h" + +CONST(Dcm_DspNonDefaultSessionS3ServerType, DCM_VARIABLE) gDcmDspNonDefaultSessionS3Server=5000;/*Unit:ms*/ +CONST(DcmDspSessionRow, DCM_VARIABLE) gDcmDspSessionRow[KIND_OF_SESSION]= +{ + {DCM_NO_BOOT, DCM_SESSION_DEFAULT ,50u,5000u}, + {DCM_NO_BOOT, DCM_SESSION_PROGRAMMING ,50u,5000u}, + {DCM_NO_BOOT, DCM_SESSION_EXTENDED_DIAGNOSTIC ,50u,5000u}, + {DCM_NO_BOOT, DCM_SESSION_USERDEFINED1 ,50u,5000u} +}; +#if(DCM_SERVICE_27_ENABLED==STD_ON) +//#define DCM_KEY_LEN 4u +CONST(DcmDspSecurityRow, DCM_VARIABLE) gDcmDspSecurityRow[KIND_OF_SECURITY_LEVEL]= +{ + {10000u,1u,DCM_KEY_LEN,DCM_SEC_LEV_L1, 0x3u,4u}, + {10000u,1u,DCM_KEY_LEN,DCM_SEC_LEV_L2, 0x3u,4u}, + {10000u,10000u,DCM_KEY_LEN,DCM_SEC_LEV_L3, 0x3u,4u}, + {10000u,10000u,DCM_KEY_LEN,DCM_SEC_LEV_L4, 0x3u,4u}, + {10000u,1u,DCM_KEY_LEN,DCM_SEC_LEV_L5, 0x3u,4u}, + {10000u,1u,DCM_KEY_LEN,DCM_SEC_LEV_L6, 0x3u,4u}, + {10000u,1u,DCM_KEY_LEN,DCM_SEC_LEV_L7, 0x3u,4u} +}; +#endif + +/* For 0x22 */ +#if(DCM_SERVICE_22_ENABLED==STD_ON) +#if(DCM_SERVICE_22_COMBINED_DID==STD_ON) +CONST(Dcm_DspMaxDidToReadType, DCM_VARIABLE) DcmDspMaxDidToRead=1u; +#else +CONST(Dcm_DspMaxDidToReadType, DCM_VARIABLE) DcmDspMaxDidToRead=1u; +#endif +#endif + +/* 0x22 */ +#if(DCM_SERVICE_22_ENABLED==STD_ON) +CONST(Dcm_22_ServiceInfoType, DCM_VARIABLE) gDcmDsdSubService_22[NUMBER_OF_READ_DID]= +{ + + {0xF100u,1u,4u, &App_Read0xF100,(DCM_SEC_LEV_ALL), (DCM_SESSION_DEFAULT|DCM_SESSION_EXTENDED_DIAGNOSTIC|DCM_SESSION_PROGRAMMING|DCM_SESSION_USERDEFINED1),PHYSICAL_AND_FUNCTIONAL_REQ_SUPPORTED}, + {0x01a0u,1u,1u, &App_Read0x01A0,(DCM_SEC_LEV_ALL), (DCM_SESSION_DEFAULT|DCM_SESSION_EXTENDED_DIAGNOSTIC|DCM_SESSION_PROGRAMMING|DCM_SESSION_USERDEFINED1),PHYSICAL_AND_FUNCTIONAL_REQ_SUPPORTED}, + {0xF1a0u,1u,1u, &App_Read0xF1A0,(DCM_SEC_LEV_ALL), (DCM_SESSION_DEFAULT|DCM_SESSION_EXTENDED_DIAGNOSTIC|DCM_SESSION_PROGRAMMING|DCM_SESSION_USERDEFINED1),PHYSICAL_AND_FUNCTIONAL_REQ_SUPPORTED}, + {0xb070u,1u,4u, &App_Read0xb070,(DCM_SEC_LEV_ALL), (DCM_SESSION_DEFAULT|DCM_SESSION_EXTENDED_DIAGNOSTIC|DCM_SESSION_PROGRAMMING|DCM_SESSION_USERDEFINED1),PHYSICAL_AND_FUNCTIONAL_REQ_SUPPORTED}, + {0x0005u,1u,5u, &App_Read0x0005_left_sws,(DCM_SEC_LEV_ALL), (DCM_SESSION_DEFAULT|DCM_SESSION_EXTENDED_DIAGNOSTIC|DCM_SESSION_PROGRAMMING|DCM_SESSION_USERDEFINED1),PHYSICAL_AND_FUNCTIONAL_REQ_SUPPORTED}, + {0x0004u,1u,2u, &App_Read0x0004_right_sws,(DCM_SEC_LEV_ALL), (DCM_SESSION_DEFAULT|DCM_SESSION_EXTENDED_DIAGNOSTIC|DCM_SESSION_PROGRAMMING|DCM_SESSION_USERDEFINED1),PHYSICAL_AND_FUNCTIONAL_REQ_SUPPORTED}, + {0x0008u,1u,5u, &App_Read0x0008_right_pick,(DCM_SEC_LEV_ALL), (DCM_SESSION_DEFAULT|DCM_SESSION_EXTENDED_DIAGNOSTIC|DCM_SESSION_PROGRAMMING|DCM_SESSION_USERDEFINED1),PHYSICAL_AND_FUNCTIONAL_REQ_SUPPORTED}, + {0xb101u,1u,5u, &App_Read0xB101_left_menu,(DCM_SEC_LEV_ALL), (DCM_SESSION_DEFAULT|DCM_SESSION_EXTENDED_DIAGNOSTIC|DCM_SESSION_PROGRAMMING|DCM_SESSION_USERDEFINED1),PHYSICAL_AND_FUNCTIONAL_REQ_SUPPORTED}, + {0xb075u,1u,1u, &App_Read0xb075,(DCM_SEC_LEV_ALL), (DCM_SESSION_DEFAULT|DCM_SESSION_EXTENDED_DIAGNOSTIC|DCM_SESSION_PROGRAMMING|DCM_SESSION_USERDEFINED1),PHYSICAL_AND_FUNCTIONAL_REQ_SUPPORTED}, + {0xa030u,1u,80u, &App_Read0xA030,(DCM_SEC_LEV_ALL), (DCM_SESSION_DEFAULT|DCM_SESSION_EXTENDED_DIAGNOSTIC|DCM_SESSION_PROGRAMMING|DCM_SESSION_USERDEFINED1),PHYSICAL_AND_FUNCTIONAL_REQ_SUPPORTED}, + {0xF1F2u,1u,14u, &App_Read0xF1F2,(DCM_SEC_LEV_ALL), (DCM_SESSION_DEFAULT|DCM_SESSION_EXTENDED_DIAGNOSTIC|DCM_SESSION_PROGRAMMING|DCM_SESSION_USERDEFINED1),PHYSICAL_AND_FUNCTIONAL_REQ_SUPPORTED}, + {0xF1F1u,1u,14u, &App_Read0xF1F1,(DCM_SEC_LEV_ALL), (DCM_SESSION_DEFAULT|DCM_SESSION_EXTENDED_DIAGNOSTIC|DCM_SESSION_PROGRAMMING|DCM_SESSION_USERDEFINED1),PHYSICAL_AND_FUNCTIONAL_REQ_SUPPORTED}, + {0xF19Eu,1u,14u, &App_Read0xF19E,(DCM_SEC_LEV_ALL), (DCM_SESSION_DEFAULT|DCM_SESSION_EXTENDED_DIAGNOSTIC|DCM_SESSION_PROGRAMMING|DCM_SESSION_USERDEFINED1),PHYSICAL_AND_FUNCTIONAL_REQ_SUPPORTED}, + {0xF194u,1u,9u, &App_Read0xF194,(DCM_SEC_LEV_ALL), (DCM_SESSION_DEFAULT|DCM_SESSION_EXTENDED_DIAGNOSTIC|DCM_SESSION_PROGRAMMING|DCM_SESSION_USERDEFINED1),PHYSICAL_AND_FUNCTIONAL_REQ_SUPPORTED}, + {0xF192u,1u,24u, &App_Read0xF192,(DCM_SEC_LEV_ALL), (DCM_SESSION_DEFAULT|DCM_SESSION_EXTENDED_DIAGNOSTIC|DCM_SESSION_PROGRAMMING|DCM_SESSION_USERDEFINED1),PHYSICAL_AND_FUNCTIONAL_REQ_SUPPORTED}, + {0xF191u,1u,14u, &App_Read0xF191,(DCM_SEC_LEV_ALL), (DCM_SESSION_DEFAULT|DCM_SESSION_EXTENDED_DIAGNOSTIC|DCM_SESSION_PROGRAMMING|DCM_SESSION_USERDEFINED1),PHYSICAL_AND_FUNCTIONAL_REQ_SUPPORTED}, + {0xF188u,1u,14u, &App_Read0xF188,(DCM_SEC_LEV_ALL), (DCM_SESSION_DEFAULT|DCM_SESSION_EXTENDED_DIAGNOSTIC|DCM_SESSION_PROGRAMMING|DCM_SESSION_USERDEFINED1),PHYSICAL_AND_FUNCTIONAL_REQ_SUPPORTED}, + {0xF181u,1u,15u, &App_Read0xF181,(DCM_SEC_LEV_ALL), (DCM_SESSION_DEFAULT|DCM_SESSION_EXTENDED_DIAGNOSTIC|DCM_SESSION_PROGRAMMING|DCM_SESSION_USERDEFINED1),PHYSICAL_AND_FUNCTIONAL_REQ_SUPPORTED}, + {0xF182u,1u,14u, &App_Read0xF182,(DCM_SEC_LEV_ALL), (DCM_SESSION_DEFAULT|DCM_SESSION_EXTENDED_DIAGNOSTIC|DCM_SESSION_PROGRAMMING|DCM_SESSION_USERDEFINED1),PHYSICAL_AND_FUNCTIONAL_REQ_SUPPORTED}, + {0xF180u,1u,9u, &App_Read0xF180,(DCM_SEC_LEV_ALL), (DCM_SESSION_DEFAULT|DCM_SESSION_EXTENDED_DIAGNOSTIC|DCM_SESSION_PROGRAMMING|DCM_SESSION_USERDEFINED1),PHYSICAL_AND_FUNCTIONAL_REQ_SUPPORTED}, + {0xF186u,1u,1u, &App_Read0xF186,(DCM_SEC_LEV_ALL), (DCM_SESSION_DEFAULT|DCM_SESSION_EXTENDED_DIAGNOSTIC|DCM_SESSION_PROGRAMMING|DCM_SESSION_USERDEFINED1),PHYSICAL_AND_FUNCTIONAL_REQ_SUPPORTED}, + {0xF187u,1u,14u, &App_Read0xF187,(DCM_SEC_LEV_ALL), (DCM_SESSION_DEFAULT|DCM_SESSION_EXTENDED_DIAGNOSTIC|DCM_SESSION_PROGRAMMING|DCM_SESSION_USERDEFINED1),PHYSICAL_AND_FUNCTIONAL_REQ_SUPPORTED}, + {0xF189u,1u,16u, &App_Read0xF189,(DCM_SEC_LEV_ALL), (DCM_SESSION_DEFAULT|DCM_SESSION_EXTENDED_DIAGNOSTIC|DCM_SESSION_PROGRAMMING|DCM_SESSION_USERDEFINED1),PHYSICAL_AND_FUNCTIONAL_REQ_SUPPORTED}, + {0xF18Au,1u,6u, &App_Read0xF18A,(DCM_SEC_LEV_ALL), (DCM_SESSION_DEFAULT|DCM_SESSION_EXTENDED_DIAGNOSTIC|DCM_SESSION_PROGRAMMING|DCM_SESSION_USERDEFINED1),PHYSICAL_AND_FUNCTIONAL_REQ_SUPPORTED}, + {0xF18Bu,1u,4u, &App_Read0xF18B,(DCM_SEC_LEV_ALL), (DCM_SESSION_DEFAULT|DCM_SESSION_EXTENDED_DIAGNOSTIC|DCM_SESSION_PROGRAMMING|DCM_SESSION_USERDEFINED1),PHYSICAL_AND_FUNCTIONAL_REQ_SUPPORTED}, + {0xF18Cu,1u,15u, &App_Read0xF18C,(DCM_SEC_LEV_ALL), (DCM_SESSION_DEFAULT|DCM_SESSION_EXTENDED_DIAGNOSTIC|DCM_SESSION_PROGRAMMING|DCM_SESSION_USERDEFINED1),PHYSICAL_AND_FUNCTIONAL_REQ_SUPPORTED}, + {0xF190u,1u,17u, &App_Read0xF190,(DCM_SEC_LEV_ALL), (DCM_SESSION_DEFAULT|DCM_SESSION_EXTENDED_DIAGNOSTIC|DCM_SESSION_PROGRAMMING|DCM_SESSION_USERDEFINED1),PHYSICAL_AND_FUNCTIONAL_REQ_SUPPORTED}, + {0xF193u,1u,5u, &App_Read0xF193,(DCM_SEC_LEV_ALL), (DCM_SESSION_DEFAULT|DCM_SESSION_EXTENDED_DIAGNOSTIC|DCM_SESSION_PROGRAMMING|DCM_SESSION_USERDEFINED1),PHYSICAL_AND_FUNCTIONAL_REQ_SUPPORTED}, + {0xF195u,1u,6u, &App_Read0xF195,(DCM_SEC_LEV_ALL), (DCM_SESSION_DEFAULT|DCM_SESSION_EXTENDED_DIAGNOSTIC|DCM_SESSION_PROGRAMMING|DCM_SESSION_USERDEFINED1),PHYSICAL_AND_FUNCTIONAL_REQ_SUPPORTED}, + {0xF197u,1u,8u, &App_Read0xF197,(DCM_SEC_LEV_ALL), (DCM_SESSION_DEFAULT|DCM_SESSION_EXTENDED_DIAGNOSTIC|DCM_SESSION_PROGRAMMING|DCM_SESSION_USERDEFINED1),PHYSICAL_AND_FUNCTIONAL_REQ_SUPPORTED}, + {0xF198u,1u,20u, &App_Read0xF198,(DCM_SEC_LEV_ALL), (DCM_SESSION_DEFAULT|DCM_SESSION_EXTENDED_DIAGNOSTIC|DCM_SESSION_PROGRAMMING|DCM_SESSION_USERDEFINED1),PHYSICAL_AND_FUNCTIONAL_REQ_SUPPORTED}, + {0xF199u,1u,4u, &App_Read0xF199,(DCM_SEC_LEV_ALL), (DCM_SESSION_DEFAULT|DCM_SESSION_EXTENDED_DIAGNOSTIC|DCM_SESSION_PROGRAMMING|DCM_SESSION_USERDEFINED1),PHYSICAL_AND_FUNCTIONAL_REQ_SUPPORTED}, + {0xF19Du,1u,4u, &App_Read0xF19D,(DCM_SEC_LEV_ALL), (DCM_SESSION_DEFAULT|DCM_SESSION_EXTENDED_DIAGNOSTIC|DCM_SESSION_PROGRAMMING|DCM_SESSION_USERDEFINED1),PHYSICAL_AND_FUNCTIONAL_REQ_SUPPORTED}, + {0x0003u,1u,5u, &App_Read0x0003_net_type,(DCM_SEC_LEV_ALL), (DCM_SESSION_DEFAULT|DCM_SESSION_EXTENDED_DIAGNOSTIC|DCM_SESSION_PROGRAMMING|DCM_SESSION_USERDEFINED1),PHYSICAL_AND_FUNCTIONAL_REQ_SUPPORTED}, +}; +#endif +/* 0x2E */ +#if(DCM_SERVICE_2E_ENABLED==STD_ON) +CONST(Dcm_2E_ServiceInfoType, DCM_VARIABLE) gDcmDsdSubService_2E[NUMBER_OF_WRITE_DID]= +{ + {0x01A0u,1u,1u, &App_Write0x01A0,DCM_SEC_LEV_SL_39B, (DCM_SESSION_EXTENDED_DIAGNOSTIC|DCM_SESSION_PROGRAMMING|DCM_SESSION_USERDEFINED1),PHYSICAL_REQ_SUPPORTED}, + {0xF1A0u,1u,1u, &App_Write0xF1A0,DCM_SEC_LEV_SL_39B, (DCM_SESSION_EXTENDED_DIAGNOSTIC|DCM_SESSION_PROGRAMMING|DCM_SESSION_USERDEFINED1),PHYSICAL_REQ_SUPPORTED}, + {0xF112u,1u,8u, &App_Write0xF112,DCM_SEC_LEV_SL_39B, (DCM_SESSION_EXTENDED_DIAGNOSTIC|DCM_SESSION_PROGRAMMING|DCM_SESSION_USERDEFINED1),PHYSICAL_REQ_SUPPORTED}, + {0xF190u,1u,17u, &App_Write0xF190,DCM_SEC_LEV_SL_39B, (DCM_SESSION_EXTENDED_DIAGNOSTIC|DCM_SESSION_PROGRAMMING|DCM_SESSION_USERDEFINED1),PHYSICAL_REQ_SUPPORTED}, + {0xF197u,1u,8u, &App_Write0xF197,DCM_SEC_LEV_SL_39B, (DCM_SESSION_EXTENDED_DIAGNOSTIC|DCM_SESSION_PROGRAMMING|DCM_SESSION_USERDEFINED1),PHYSICAL_REQ_SUPPORTED}, + {0xF198u,1u,20u, &App_Write0xF198,DCM_SEC_LEV_SL_39B, (DCM_SESSION_EXTENDED_DIAGNOSTIC|DCM_SESSION_PROGRAMMING|DCM_SESSION_USERDEFINED1),PHYSICAL_REQ_SUPPORTED}, + {0xF199u,1u,4u, &App_Write0xF199,DCM_SEC_LEV_SL_39B, (DCM_SESSION_EXTENDED_DIAGNOSTIC|DCM_SESSION_PROGRAMMING|DCM_SESSION_USERDEFINED1),PHYSICAL_REQ_SUPPORTED}, + {0xF19Du,1u,4u, &App_Write0xF19D,DCM_SEC_LEV_SL_39B, (DCM_SESSION_EXTENDED_DIAGNOSTIC|DCM_SESSION_PROGRAMMING|DCM_SESSION_USERDEFINED1),PHYSICAL_REQ_SUPPORTED} , + {0xF18Cu,1u,15u, &App_Write0xF18C,DCM_SEC_LEV_SL_39B, (DCM_SESSION_EXTENDED_DIAGNOSTIC),PHYSICAL_REQ_SUPPORTED} +}; +#endif + +/* 0x2F */ +#if(DCM_SERVICE_2F_ENABLED==STD_ON) +CONST(Dcm_2F_ServiceInfoType, DCM_VARIABLE) gDcmDsdSubService_2F[NUMBER_OF_CONTROL_DID]= +{ + {0xff00u,DCM_SEC_LEV_SL_ALL,(DCM_SESSION_EXTENDED_DIAGNOSTIC|DCM_SESSION_USERDEFINED1),PHYSICAL_REQ_SUPPORTED,{0u,2u,0u},&App_ReturnControlToEcu0xff00,DCM_NULL,DCM_NULL,&App_ShortTermAdjustment0xff00,DCM_NULL}, + {0x2020u,DCM_SEC_LEV_SL_39B,(DCM_SESSION_EXTENDED_DIAGNOSTIC|DCM_SESSION_USERDEFINED1),PHYSICAL_REQ_SUPPORTED,{0u,1u,0u},&App_ReturnControlToEcu0x2020,DCM_NULL,DCM_NULL,&App_ShortTermAdjustment0x2020,DCM_NULL}, + {0x5001u,DCM_SEC_LEV_SL_39B,(DCM_SESSION_EXTENDED_DIAGNOSTIC|DCM_SESSION_USERDEFINED1),PHYSICAL_REQ_SUPPORTED,{0u,1u,0u},&App_ReturnControlToEcu0x5001,DCM_NULL,DCM_NULL,&App_ShortTermAdjustment0x5001,DCM_NULL}, +}; +#endif + +/* 0x31 */ +#if(DCM_SERVICE_31_ENABLED==STD_ON) + +CONST(DcmDspRoutine, DCM_VARIABLE) DcmDspRoutineIdentifierTable_31[NUMBER_OF_RID]= +{ + {0x0203u,1u,0u,1u,&App_StartRoutine0x0203,&App_StopRoutine0x0203,&App_RequestRoutineResults0x0203,{{DCM_SEC_LEV_ALL,(DCM_SESSION_EXTENDED_DIAGNOSTIC|DCM_SESSION_USERDEFINED1),PHYSICAL_REQ_SUPPORTED},{1u},{0u},{1u},{0u},{1u}}}, + #if 0 + {0x0206u,1u,0u,1u,&App_StartRoutine0x0206,DCM_NULL,DCM_NULL,{{DCM_SEC_LEV_SL_39B,(DCM_SESSION_EXTENDED_DIAGNOSTIC|DCM_SESSION_USERDEFINED1),PHYSICAL_REQ_SUPPORTED},{0u},{0u},{0u},{0u},{1u}}}, + {0x01b0u,1u,0u,1u,&App_StartRoutine0x01b0,DCM_NULL,&App_RequestRoutineResults0x01b0,{{DCM_SEC_LEV_SL_39B,(DCM_SESSION_EXTENDED_DIAGNOSTIC),PHYSICAL_REQ_SUPPORTED},{16u},{1u},{1u},{16u},{1u}}}, + {0x04FEu,1u,0u,1u,&App_StartRoutine0x04FE,DCM_NULL,&App_RequestRoutineResults0x04FE,{{DCM_SEC_LEV_SL_39B,(DCM_SESSION_EXTENDED_DIAGNOSTIC|DCM_SESSION_USERDEFINED1),PHYSICAL_REQ_SUPPORTED},{1u},{1u},{1u},{1u},{1u}}}, + {0x5902u,1u,0u,1u,&App_StartRoutine0x5902,&App_StopRoutine0x5902,&App_RequestRoutineResults0x5902,{{DCM_SEC_LEV_SL_39B,(DCM_SESSION_EXTENDED_DIAGNOSTIC|DCM_SESSION_USERDEFINED1),PHYSICAL_REQ_SUPPORTED},{1u},{0u},{1u},{0u},{1u}}}, + {0x5903u,1u,0u,1u,&App_StartRoutine0x5903,&App_StopRoutine0x5903,&App_RequestRoutineResults0x5903,{{DCM_SEC_LEV_SL_39B,(DCM_SESSION_EXTENDED_DIAGNOSTIC|DCM_SESSION_USERDEFINED1),PHYSICAL_REQ_SUPPORTED},{1u},{0u},{1u},{0u},{1u}}}, + {0x5904u,1u,0u,1u,&App_StartRoutine0x5904,&App_StopRoutine0x5904,&App_RequestRoutineResults0x5904,{{DCM_SEC_LEV_SL_39B,(DCM_SESSION_EXTENDED_DIAGNOSTIC|DCM_SESSION_USERDEFINED1),PHYSICAL_REQ_SUPPORTED},{1u},{0u},{1u},{0u},{1u}}}, + {0xDF30u,1u,0u,1u,&App_StartRoutine0xDF30,&App_StopRoutine0xDF30,&App_RequestRoutineResults0xDF30,{{DCM_SEC_LEV_SL_39B,DCM_SESSION_USERDEFINED1,PHYSICAL_REQ_SUPPORTED},{7u},{0u},{1u},{2u},{1u}}}, + {0xDF31u,1u,0u,1u,&App_StartRoutine0xDF31,&App_StopRoutine0xDF31,&App_RequestRoutineResults0xDF31,{{DCM_SEC_LEV_SL_39B,DCM_SESSION_USERDEFINED1,PHYSICAL_REQ_SUPPORTED},{5u},{0u},{1u},{2u},{1u}}}, + {0xDF32u,1u,0u,1u,&App_StartRoutine0xDF32,&App_StopRoutine0xDF32,&App_RequestRoutineResults0xDF32,{{DCM_SEC_LEV_SL_39B,DCM_SESSION_USERDEFINED1,PHYSICAL_REQ_SUPPORTED},{9u},{0u},{1u},{2u},{1u}}}, + {0xDF33u,1u,0u,1u,&App_StartRoutine0xDF33,DCM_NULL,&App_RequestRoutineResults0xDF33,{{DCM_SEC_LEV_SL_39B,DCM_SESSION_USERDEFINED1,PHYSICAL_REQ_SUPPORTED},{12u},{0u},{0u},{0u},{1u}}}, + {0xDF34u,1u,0u,1u,&App_StartRoutine0xDF34,&App_StopRoutine0xDF34,&App_RequestRoutineResults0xDF34,{{DCM_SEC_LEV_SL_39B,(DCM_SESSION_EXTENDED_DIAGNOSTIC|DCM_SESSION_USERDEFINED1),PHYSICAL_REQ_SUPPORTED},{2u},{0u},{1u},{2u},{1u}}}, + {0xDF35u,1u,0u,1u,&App_StartRoutine0xDF35,DCM_NULL,&App_RequestRoutineResults0xDF35,{{DCM_SEC_LEV_SL_39B,DCM_SESSION_USERDEFINED1,PHYSICAL_REQ_SUPPORTED},{19u},{0u},{0u},{2u},{1u}}}, + {0xDF36u,1u,0u,1u,&App_StartRoutine0xDF36,DCM_NULL,&App_RequestRoutineResults0xDF36,{{DCM_SEC_LEV_SL_39B,DCM_SESSION_USERDEFINED1,PHYSICAL_REQ_SUPPORTED},{5u},{0u},{0u},{4u},{1u}}}, + {0xDF37u,1u,0u,1u,&App_StartRoutine0xDF37,DCM_NULL,&App_RequestRoutineResults0xDF37,{{DCM_SEC_LEV_SL_39B,DCM_SESSION_USERDEFINED1,PHYSICAL_REQ_SUPPORTED},{1u},{0u},{0u},{8u},{1u}}}, + {0xDF38u,1u,0u,1u,&App_StartRoutine0xDF38,DCM_NULL,&App_RequestRoutineResults0xDF38,{{DCM_SEC_LEV_SL_39B,DCM_SESSION_USERDEFINED1,PHYSICAL_REQ_SUPPORTED},{1u},{0u},{0u},{6u},{1u}}}, + {0xDF39u,1u,0u,1u,&App_StartRoutine0xDF39,&App_StopRoutine0xDF39,&App_RequestRoutineResults0xDF39,{{DCM_SEC_LEV_SL_39B,DCM_SESSION_USERDEFINED1,PHYSICAL_REQ_SUPPORTED},{19u},{0u},{1u},{2u},{1u}}}, + {0xDF3Au,1u,0u,1u,&App_StartRoutine0xDF3A,&App_StopRoutine0xDF3A,&App_RequestRoutineResults0xDF3A,{{DCM_SEC_LEV_SL_39B,DCM_SESSION_USERDEFINED1,PHYSICAL_REQ_SUPPORTED},{19u},{0u},{1u},{1u},{1u}}}, + {0xFF02u,1u,0u,1u,&App_StartRoutine0xFF02,DCM_NULL,DCM_NULL,{{(DCM_SEC_LEV_SL_39B),(DCM_SESSION_EXTENDED_DIAGNOSTIC|DCM_SESSION_USERDEFINED1|DCM_SESSION_PROGRAMMING),PHYSICAL_REQ_SUPPORTED},{0u},{0u},{0u},{0u},{1u}}}, + #endif +}; +#endif + diff --git a/code_app_out/Source/ComStack/Ccp/Ccp.h b/code_app_out/Source/ComStack/Ccp/Ccp.h new file mode 100644 index 0000000..932211d --- /dev/null +++ b/code_app_out/Source/ComStack/Ccp/Ccp.h @@ -0,0 +1,340 @@ +/** + ****************************************************************************** + * @file + * @author + * @version + * @date + * @brief + * @function List: + ****************************************************************************** + * @attention + * + * + *

© COPYRIGHT 2021

+ ****************************************************************************** + * @History: + * @Author: + * @Data: + * @Version: +*/ + +#ifndef _CCP_H_ +#define _CCP_H_ + +/******************************************************************************* +* Includes +*******************************************************************************/ +#include "Ccp_Cfg.h" +#include "CanIf.h" + +/******************************************************************************* +* Macro definition +*******************************************************************************/ +/* Declare CCP-protocol version */ +#define CCP_VERSION_MAJOR ((uint8)(0x02u)) +#define CCP_VERSION_MINOR ((uint8)(0x01u)) + +/* Resource Mask */ +#define CCP_RM_ALL_LOCKED ((uint8)(0x00u)) +#define CCP_RM_CAL ((uint8)(0x01u)) +#define CCP_RM_DAQ ((uint8)(0x02u)) +#define CCP_RM_PGM ((uint8)(0x40u)) + +/* CCP Status */ +#define CCP_DISCONNECTED ((uint8)(0x00u)) +#define CCP_CONNECTED ((uint8)(0x20u)) +#define CCP_TMP_DISCONNECTED ((uint8)(0x10u)) + +#define CCP_RESUME ((uint8)(0x04u)) +#define CCP_STORE ((uint8)(0x40u)) +#define CCP_RUN ((uint8)(0x80u)) + +/* Basic Commands */ +#define CCP_CONNECT ((uint8)(0x01u)) +#define CCP_SET_MTA ((uint8)(0x02u)) +#define CCP_DNLOAD ((uint8)(0x03u)) +#define CCP_UPLOAD ((uint8)(0x04u)) +#define CCP_TEST ((uint8)(0x05u)) +#define CCP_START_STOP ((uint8)(0x06u)) +#define CCP_DISCONNECT ((uint8)(0x07u)) +#define CCP_START_STOP_ALL ((uint8)(0x08u)) +#define CCP_SHORT_UPLOAD ((uint8)(0x0Fu)) +#define CCP_GET_DAQ_SIZE ((uint8)(0x14u)) +#define CCP_SET_DAQ_PTR ((uint8)(0x15u)) +#define CCP_WRITE_DAQ ((uint8)(0x16u)) +#define CCP_EXCHANGE_ID ((uint8)(0x17u)) +#define CCP_GET_CCP_VERSION ((uint8)(0x1Bu)) +#define CCP_DNLOAD6 ((uint8)(0x23u)) + +/* Optional Commands */ +#define CCP_GET_CAL_PAGE ((uint8)(0x09u)) +#define CCP_SET_S_STATUS ((uint8)(0x0Cu)) +#define CCP_GET_S_STATUS ((uint8)(0x0Du)) +#define CCP_BUILD_CHKSUM ((uint8)(0x0Eu)) +#define CCP_CLEAR_MEMORY ((uint8)(0x10u)) +#define CCP_SET_CAL_PAGE ((uint8)(0x11u)) +#define CCP_GET_SEED ((uint8)(0x12u)) +#define CCP_UNLOCK ((uint8)(0x13u)) +#define CCP_PROGRAM ((uint8)(0x18u)) +#define CCP_MOVE ((uint8)(0x19u)) +#define CCP_DIAG_SERVICE ((uint8)(0x20u)) +#define CCP_ACTION_SERVICE ((uint8)(0x21u)) +#define CCP_PROGRAM6 ((uint8)(0x22u)) + +/* Response ID */ +#define CCP_RESPONSE_CODE ((uint8)(0xFFu)) + +/* Error codes */ +#define CCP_NO_ERROR ((uint8)(0x00u)) +#define CCP_DAQ_OVERLOAD ((uint8)(0x01u)) +#define CCP_COMMAND_BUSY ((uint8)(0x10u)) +#define CCP_DAQ_BUSY ((uint8)(0x11u)) +#define CCP_INTERNAL_TIMEOUT ((uint8)(0x12u)) +#define CCP_KEY_REQUEST ((uint8)(0x18u)) +#define CCP_SESSION_REQUEST ((uint8)(0x19u)) +#define CCP_COLD_START_REQ ((uint8)(0x20u)) +#define CCP_CAL_INIT_REQ ((uint8)(0x21u)) +#define CCP_DAQ_INIT_REQ ((uint8)(0x22u)) +#define CCP_CODE_UPDATE_REQ ((uint8)(0x23u)) +#define CCP_UNKNOWN_COMMAND ((uint8)(0x30u)) +#define CCP_COM_SYNTAX_ERROR ((uint8)(0x31u)) +#define CCP_OUT_OF_RANGE ((uint8)(0x32u)) +#define CCP_ACCESS_DENIED ((uint8)(0x33u)) +#define CCP_OVERLOAD ((uint8)(0x34u)) +#define CCP_ACCESS_LOCKED ((uint8)(0x35u)) +#define CCP_RESOURCE_USELESS ((uint8)(0x36u)) + +/* Session Status */ +#define CCP_DEFAULT_SESSION ((uint8)(0x00u)) +#define CCP_SESSION_CAL ((uint8)(0x01u)) +#define CCP_SESSION_DAQ ((uint8)(0x02u)) +#define CCP_SESSION_RESUME ((uint8)(0x04u)) +#define CCP_SESSION_STORE ((uint8)(0x40u)) +#define CCP_SESSION_RUN ((uint8)(0x80u)) + +/* For Disconnect */ +#define CCP_END_SESSION ((uint8)(0x01u)) +#define CCP_TEM_END_SESSION ((uint8)(0x00u)) + + +/* For Exchange ID */ +#define CCP_ASCII_TYPE ((uint8)(0x00u)) + +/* For Upload */ +#define CCP_UPLOAD_MAX ((uint8)(0x05u)) + +/* For Get DAQ Size */ +#define CCP_UNDEFINED_DAQ ((uint8)(0x00u)) +#define CCP_NO_FIRST_PID ((uint8)(0x00u)) + +/* For Get_S_Status */ +#define CCP_NO_ADDITIONAL_INFO ((uint8)(0x00u)) + +/* For Start_Stop */ +#define CCP_STOP_DAQ ((uint8)(0x00u)) +#define CCP_START_DAQ ((uint8)(0x01u)) +#define CCP_PREPARE_DAQ ((uint8)(0x02u)) + +/* For Start_Stop_All */ +#define CCP_STOP_DAQ_ALL ((uint8)(0x00u)) +#define CCP_START_DAQ_ALL ((uint8)(0x01u)) + +/* For Program */ +#define CCP_PROGRAM_MAX_LENGTH ((uint8)(0x05u)) +#define CCP_PROGRAM6_LENGTH ((uint8)(0x06u)) + +/* For Seed&Key */ +#define CCP_NEED_UNLOCK ((uint8)(0x01u)) +#define CCP_NO_UNLOCK ((uint8)(0x00u)) +#define CCP_RIGHT_KEY ((uint8)(0x00u)) +#define CCP_WRONG_KEY ((uint8)(0x01u)) + +/* For Checksum */ +#define CCP_CHECKSUM_RESULT_BYTES ((uint8)(0x02u)) +#define CCP_CRC_TABLE_LENGTH (256u) + +/* Other Definition */ +#define CCP_COMMAND_CODE (CCP_RX_Data[CCP_Index_0]) +#define CCP_CTR (CCP_RX_Data[CCP_Index_1]) + +#define CCP_CAN_LENGTH ((uint8)(8u)) +#define CCP_MAX_ELEMENT ((uint8)(7u)) +#define CCP_READ_BUF_LENGTH ((uint8)(5u)) + +#define CCP_DEFAULT_ZERO ((uint8)(0x00u)) +#define CCP_DEFAULT_ZERO_16 ((uint16)(0x00u)) +#define CCP_DEFAULT_ZERO_32 (0uL) +#define CCP_ALL_BITS_SET_8 ((uint8)0xFFu) +#define CCP_ALL_BITS_SET_16 ((uint16)0xFFFFu) + +#define CCP_NO_PRESCALER ((uint16)(1u)) +#define CCP_DAQ_CHANNEL_DEFAULT ((uint8)(0xFFu)) + +/* Index Order Definition */ +#define CCP_Index_0 (0u) +#define CCP_Index_1 (1u) +#define CCP_Index_2 (2u) +#define CCP_Index_3 (3u) +#define CCP_Index_4 (4u) +#define CCP_Index_5 (5u) +#define CCP_Index_6 (6u) +#define CCP_Index_7 (7u) + +/* Offset Definition */ +#define CCP_OffSet_0 ((uint8)(0u)) +#define CCP_OffSet_1 ((uint8)(1u)) +#define CCP_OffSet_2 ((uint8)(2u)) +#define CCP_OffSet_3 ((uint8)(3u)) +#define CCP_OffSet_4 ((uint8)(4u)) +#define CCP_OffSet_5 ((uint8)(5u)) +#define CCP_OffSet_6 ((uint8)(6u)) +#define CCP_OffSet_7 ((uint8)(7u)) + +/* Normal Value Definition */ +#define CCP_UINT8_0 ((uint8)(0u)) +#define CCP_UINT8_1 ((uint8)(1u)) +#define CCP_UINT8_2 ((uint8)(2u)) +#define CCP_UINT8_3 ((uint8)(3u)) +#define CCP_UINT8_4 ((uint8)(4u)) +#define CCP_UINT8_5 ((uint8)(5u)) +#define CCP_UINT8_6 ((uint8)(6u)) +#define CCP_UINT8_7 ((uint8)(7u)) + +/* Definition for bit moving */ +#define CCP_MOVE_BITS_1 (1u) +#define CCP_MOVE_BITS_8 (8u) +#define CCP_MOVE_BITS_16 (16u) +#define CCP_MOVE_BITS_24 (24u) + +/* Pointer to Null Definitions */ +#define CCP_NULL (0u) + + +/******************************************************************************* +* Macro Function +*******************************************************************************/ +#ifdef CCP_MOTOROLA +#define CCP_Get_First_Byte(x) ((uint8)((x)>> 8u)) +#define CCP_Get_Second_Byte(x) ((uint8)((x)&((uint16)0x00FFu))) +#define CCP_Make_16Bits(x,y) ((uint16)((((uint16)(x))<<((uint16)8u))|((uint16)(y)))) +#define CCP_Get_1Byte(x) ((uint8)(((x)>>24u) & ((0x00FFuL)))) +#define CCP_Get_2Byte(x) ((uint8)(((x)>>16u) & (0x00FFuL))) +#define CCP_Get_3Byte(x) ((uint8)(((x)>> 8u) & (0x00FFuL))) +#define CCP_Get_4Byte(x) ((uint8)((x) & (0x00FFuL))) +#else +#define CCP_Get_First_Byte(x) ((uint8)((x)&(0x00FFu))) +#define CCP_Get_Second_Byte(x) ((uint8)((x)>>((uint16)8u))) +#define CCP_Make_16Bits(x,y) ((uint16)((((uint16)(y))<<((uint16)8u))|((uint16)(x)))) +#define CCP_Get_1Byte(x) ((uint8)((x)& (0x00FFu))) +#define CCP_Get_2Byte(x) ((uint8)(((x)>>8u)& (0x00FFu))) +#define CCP_Get_3Byte(x) ((uint8)(((x)>>16u)& (0x00FFu))) +#define CCP_Get_4Byte(x) ((uint8)((x)>>24u)) +#endif + +#ifdef CCP_DAQ_REQUEST +/******************************************************************************* +* Typedef +*******************************************************************************/ +typedef struct +{ + uint8 flag; /* DAQ Request flag */ + uint8 channel; /* event channel of DAQ */ + uint8 prepare; /* Prepare Flag */ +}CCP_DAQ_strcut; +#endif + +/******************************************************************************* +* Global Variable Declaration +*******************************************************************************/ +#define CCP_START_SEC_VAR_UNSPECIFIED +#include "MemMap.h" + +#ifdef CCP_16BITS_ADDRESS_MODE +extern VAR(uint8,CCP_PUBLIC_CODE) CCP_PGM5_Flag; +#endif + +#define CCP_STOP_SEC_VAR_UNSPECIFIED +#include "MemMap.h" + +/******************************************************************************* +* Global Function Declaration +*******************************************************************************/ +#define CCP_START_SEC_PUBLIC_CODE +#include "MemMap.h" + +extern FUNC(void, CCP_PUBLIC_CODE) Ccp_RxIndication +( + PduIdType RxPudId, + P2CONST(PduInfoType,AUTOMATIC,CAN_APPL_DATA) PduInfoPtr +); + +extern FUNC(void, CCP_PUBLIC_CODE) Ccp_Init +( + void +); + +extern FUNC(void, CCP_PUBLIC_CODE) Ccp_Event_DAQ_Transmit +( + const uint8 event_channel +); + +extern FUNC(void, CCP_PUBLIC_CODE) Ccp_TxConfirmation +( + PduIdType PduId +); + +extern FUNC(void, CCP_PUBLIC_CODE) Ccp_Checksum_Background +( + void +); + +extern Std_ReturnType App_Ccp_FlashErase +( + uint32 Flash_Erase_Ptr, + uint32 size +); + +extern Std_ReturnType App_Ccp_FlashWrite +( + uint8* data, + uint32 Flash_Write_Ptr, + uint32 size +); + +extern Std_ReturnType App_Ccp_FlashRead +( + uint8* data, + uint32 Flash_Read_Ptr, + uint32 size +); + +#ifdef CCP_CAL_PAGE +extern Std_ReturnType App_Ccp_Select_Page_Indication +( + uint8 page_index +); +#endif + +#ifdef CCP_STORE_CAL_DATA +extern void App_Ccp_Store_Cal_Data +( + void +); +#endif + +extern uint32 App_Ccp_GetSeed +( + uint8 Resource_Mask +); + +extern uint8 App_Ccp_Unlock +( + uint32 key +); + +#define CCP_STOP_SEC_PUBLIC_CODE +#include "MemMap.h" + +#endif + + diff --git a/code_app_out/Source/ComStack/Ccp/Ccp_Cfg.h b/code_app_out/Source/ComStack/Ccp/Ccp_Cfg.h new file mode 100644 index 0000000..80f3336 --- /dev/null +++ b/code_app_out/Source/ComStack/Ccp/Ccp_Cfg.h @@ -0,0 +1,152 @@ +/** + ****************************************************************************** + * @file + * @author + * @version + * @date + * @brief + * @function List: + ****************************************************************************** + * @attention + * + * + *

© COPYRIGHT 2021

+ ****************************************************************************** + * @History: + * @Author: + * @Data: + * @Version: +*/ +#ifndef _CCP_CFG_H_ +#define _CCP_CFG_H_ + +/******************************************************************************* +* Includes +*******************************************************************************/ +#include "can_cfg.h" +#include "CanIf.h" + +#include "ComStack_Types.h" + +/******************************************************************************* +* Configuration Macro +*******************************************************************************/ + +/******************************************************************************* +* Node ID Config +*******************************************************************************/ +#define CCP_NODE_ID ((uint16)(0xa0a0u)) +#define CCP_BROADCAST_ID ((uint16)(0xffffu)) + +/******************************************************************************* +* Seed&Key Config +*******************************************************************************/ +/* Seed&Key Enable */ +#define CCP_SEED_KEY + +/******************************************************************************* +* DAQ Config +*******************************************************************************/ +/* DAQ Enable */ +#define CCP_DAQ_REQUEST + +/* Max Number of DAQ */ +#define CCP_MAX_DAQ ((uint8)(1u)) +/* Max Number of ODT */ +#define CCP_MAX_ODT ((uint8)(3u)) +/* Max Number of ODT buffer for DAQ function */ +#define CCP_ODT_BUF_NUM ((uint8)(3u)) + +/******************************************************************************* +* Handle Config +*******************************************************************************/ +/* Handle Index between CanIf and CCP */ +#define CCP_DTO_INDEX ((uint16)(7u)) +#define CCP_RX_UL_HANDLE ((uint16)(0u)) +#define CCP_TX_UL_HANDLE ((uint16)(0u)) + +/******************************************************************************* +* Flash Config +*******************************************************************************/ +/* Flash Enable */ +#define CCP_FLASH + +/* Flash range for Upload & Short Upload Command */ +#define CCP_FLASH_MIN_ADDR (0x004000uL) +#define CCP_FLASH_MAX_ADDR (0x004fffuL) + +/******************************************************************************* +* Checksum Config +*******************************************************************************/ +/* Checksum Enable */ +#define CCP_CHECKSUM + +/* Checksum Block */ +#define CCP_CHECKSUM_BLOCKSIZE (256uL) +/* Checksum calculation algorithm */ + +/******************************************************************************* +* Byte Order Config +*******************************************************************************/ +#define CCP_MOTOROLA + +/******************************************************************************* +* ECU Name Config +*******************************************************************************/ +#define CCP_ECU_NAME_LENGTH (5u) +#define CCP_ECU_NAME "PEPS" + +/******************************************************************************* +* CCP_MTA Config +*******************************************************************************/ +/* Max number of CCP_MTA */ +#define CCP_MTA_NUM ((uint8)(2u)) +/******************************************************************************* +* Special Config +*******************************************************************************/ +/* Calculation Global_Address */ +#define CCP_Global_Address(a) (a) +/* FAR Pointer */ +#define CCP_FAR * +/* Config for special chips which there are 16bits data in an address unit */ +/* Such as some chips of TI */ + +/******************************************************************************* +* Interrupt Config +*******************************************************************************/ +#ifndef __OSEKOS_SEL_ON__ +#define Ccp_ccr_alloc() Can_ccr_alloc() +#endif +#define Ccp_DisableInterrupt() CANIF_ENTER_CRITICAL_SECTION() +#define Ccp_EnableInterrupt() CANIF_LEAVE_CRITICAL_SECTION() + +/******************************************************************************* +* Special Config for INCA +*******************************************************************************/ +/* Page Enable */ +#define CCP_CAL_PAGE + +/* for CAL PAGE */ +#define CCP_REF_PAGE_ADDR (0x4000uL) +#define CCP_WORK_PAGE_ADDR (0x40004000uL) + +#define CCP_REF_PAGE_INDEX ((uint8)0x01u) +#define CCP_WORK_PAGE_INDEX ((uint8)0x02u) +#define CCP_INIT_PAGE_INDEX CCP_WORK_PAGE_INDEX +/* Store CAL Enable */ +#define CCP_STORE_CAL_DATA + +/******************************************************************************* +* Configuration Variable Declaration +*******************************************************************************/ +#define CCP_START_SEC_CONFIG_DATA_UNSPECIFIED +#include "MemMap.h" + +extern CONST(uint8,CCP_CONFIG_CONST) Ccp_Station_ID[CCP_ECU_NAME_LENGTH]; + +#define CCP_STOP_SEC_CONFIG_DATA_UNSPECIFIED + #include "MemMap.h" + + +#endif + diff --git a/code_app_out/Source/ComStack/Com/Com.h b/code_app_out/Source/ComStack/Com/Com.h new file mode 100644 index 0000000..60b71fe --- /dev/null +++ b/code_app_out/Source/ComStack/Com/Com.h @@ -0,0 +1,221 @@ +/* BEGIN_FILE_HDR +******************************************************************************** +* NOTICE +* This software is the property of HiRain Technologies. Any information +* contained in this doc should not be reproduced, or used, or disclosed +* without the written authorization from HiRain Technologies. +******************************************************************************** +* File Name: Com.h +******************************************************************************** +* Project/Product: COM programme +* Title: com.h +* Author: bo.liu 2010-2011 +* donger.yang 2012- +******************************************************************************** +* Description: Defination of Interface for Application Layer +* +******************************************************************************** +* Limitations: None +* +******************************************************************************** +* +******************************************************************************** +* Revision History: +* +* Version Date Initials CR# Descriptions +* ------- ---------- ---------- ------ ------------------- +* 01.00.00 10/08/2010 bo.liu N/A Original +* 01.00.01 04/07/2011 bo.liu N/A HrAsrCom110407-01 +* 01.00.02 05/08/2011 bo.liu N/A HrAsrCom110508-01 +* 01.00.03 05/20/2011 bo.liu N/A HrAsrCom110520-01 +* 01.01.00 03/05/2012 donger.yang N/A HrAsrCom120305-01 +* 02.00.00 05/03/2012 donger.yang N/A HrAsrCom120503-01 +* 02.01.00 07/01/2012 donger.yang N/A HrAsrCom120701-01 +* 02.01.01 07/12/2012 donger.yang N/A HrAsrCom120712-01 +* 02.01.02 07/22/2012 donger.yang N/A HrAsrCom120722-01 +* 02.01.03 08/01/2012 donger.yang N/A HrAsrCom120801-01 +* 02.01.04 08/10/2012 donger.yang N/A HrAsrCom120810-01 +* 02.01.05 08/14/2012 donger.yang N/A HrAsrCom120814-01 +* 02.01.06 08/17/2012 donger.yang N/A HrAsrCom120817-01 +* 02.01.07 08/22/2012 donger.yang N/A HrAsrCom120822-01 +* 02.01.08 08/25/2012 donger.yang N/A HrAsrCom120825-01 +* 02.01.09 09/04/2012 donger.yang N/A HrAsrCom120904-01 +* 02.02.00 09/11/2012 donger.yang N/A HrAsrCom120911-01 +* 02.02.01 10/10/2012 donger.yang N/A HrAsrCom121010-01 +* 02.02.02 10/17/2012 donger.yang N/A HrAsrCom121017-01 +* 02.02.03 10/19/2012 donger.yang N/A HrAsrCom121019-01 +* 02.02.04 10/22/2012 donger.yang N/A HrAsrCom121022-01 +* 03.00.00 11/08/2012 donger.yang N/A HrAsrCom121108-01 +* 03.00.01 01/06/2013 donger.yang N/A HrAsrCom130106-01 +* 03.00.02 03/25/2013 donger.yang N/A HrAsrCom130325-01 +* 03.00.03 05/03/2013 donger.yang N/A HrAsrCom130503-01 +* 03.00.04 06/08/2013 donger.yang N/A HrAsrCom130608-01 +* 03.00.05 07/30/2013 donger.yang N/A HrAsrCom130730-01 +* 03.00.06 08/26/2013 donger.yang N/A HrAsrCom130826-01 +******************************************************************************** +*END_FILE_HDR*/ + +#ifndef _COM_H_ +#define _COM_H_ +/******************************************************************************* +* Includes +*******************************************************************************/ + #include "ComStack_Types.h" + #include "Com_Types.h" + #include "Com_Cfg.h" + +/******************************************************************************* +* Function Declaration +*******************************************************************************/ +#define COM_START_SEC_PUBLIC_CODE +#include "MemMap.h" + +extern FUNC(void, COM_PUBLIC_CODE) Com_Init +( + void +); + +extern FUNC(void, COM_PUBLIC_CODE) Com_IpduGroupControl +( + Com_IpduGroupVector IpduGroupVector, + boolean Initialize +); + + +#if (COM_TXIPDUNUM >= 1u) + +extern FUNC(void, COM_PUBLIC_CODE) Com_MainFunctionTx +( + void +); + +extern FUNC(void, COM_PUBLIC_CODE) Com_TxStart +( + void +); + +extern FUNC(void, COM_PUBLIC_CODE) Com_TxStop +( + void +); + +extern FUNC(void, COM_PUBLIC_CODE) Com_TriggerIPDUSend +( + PduIdType PduId +); + +extern FUNC(void, COM_PUBLIC_CODE) Com_SetSendRequest +( + Com_SignalIdType ComTxSignalId +); + +extern FUNC(void, COM_PUBLIC_CODE) Com_StartTxIpdu +( + PduIdType ComTxPduId +); + +extern FUNC(void, COM_PUBLIC_CODE) Com_StopTxIpdu +( + PduIdType ComTxPduId +); + +extern FUNC(uint8, COM_PUBLIC_CODE) Com_GetTxIpduStatus +( + PduIdType ComTxPduId +); + +/*Ôö¼ÓEXTº¯Êý*/ +extern FUNC(uint8, COM_PUBLIC_CODE) Com_SendSignalExt +( + Com_SignalIdType ComTxSignalId, + P2CONST(void, COM_APPL_DATA, COM_AUTOMOTIVE) SignalDataPtr +); + + +extern FUNC(uint8, COM_PUBLIC_CODE) Com_SendSignal +( + Com_SignalIdType ComTxSignalId, + P2CONST(void, COM_APPL_DATA, COM_AUTOMOTIVE) SignalDataPtr +); + +/*#if (COM_TXIPDUNUM >= 1u)*/ +#endif + +#if (COM_RXIPDUNUM >= 1u) + +extern FUNC(void, COM_PUBLIC_CODE) Com_MainFunctionRx +( + void +); + +extern FUNC(void, COM_PUBLIC_CODE) Com_RxStart +( + void +); + +extern FUNC(void, COM_PUBLIC_CODE) Com_RxStop +( + void +); + +extern FUNC(void, COM_PUBLIC_CODE) Com_StartRxIpdu +( + PduIdType ComRxPduId +); + +extern FUNC(void, COM_PUBLIC_CODE) Com_StopRxIpdu +( + PduIdType ComRxPduId +); + +extern FUNC(uint8, COM_PUBLIC_CODE) Com_GetRxIpduStatus +( + PduIdType ComRxPduId +); + +extern FUNC(uint16, COM_PUBLIC_CODE) Com_GetRxIpduLength +( + PduIdType ComRxPduId +); + +extern FUNC(uint8, COM_PUBLIC_CODE) Com_ReceiveSignal +( + Com_SignalIdType ComRxSignalId, + P2VAR(void, COM_APPL_DATA, COM_AUTOMOTIVE) SignalDataPtr +); + +/*#if (COM_RXIPDUNUM >= 1u)*/ +#endif + + +#ifdef COM_ENABLE_ROUTESIGNAL + +#if( (COM_TXIPDUNUM >= 1u) && (COM_RXIPDUNUM >= 1u) && \ + (COM_GWIPDUNUM >=1u) && (COM_GWSIGNUM >= 1u) ) + +extern FUNC(void, COM_PUBLIC_CODE) Com_MainFunctionRouteSignals +( + void +); +/* +#if( (COM_TXIPDUNUM >= 1u) && (COM_RXIPDUNUM >= 1u) && \ + (COM_GWIPDUNUM >=1u) && (COM_GWSIGNUM >= 1u) ) +*/ +#endif +/*#ifdef COM_ENABLE_ROUTESIGNAL*/ +#endif + + +void Com_RxTimeOutMonitoringDisable(void); + +void Com_RxTimeOutMonitoringEnable(void); + + +#define COM_STOP_SEC_PUBLIC_CODE +#include "MemMap.h" + +#endif + + + + diff --git a/code_app_out/Source/ComStack/Com/Com_Cbk.h b/code_app_out/Source/ComStack/Com/Com_Cbk.h new file mode 100644 index 0000000..f00078b --- /dev/null +++ b/code_app_out/Source/ComStack/Com/Com_Cbk.h @@ -0,0 +1,133 @@ +/* BEGIN_FILE_HDR +******************************************************************************** +* NOTICE +* This software is the property of HiRain Technologies. Any information +* contained in this doc should not be reproduced, or used, or disclosed +* without the written authorization from HiRain Technologies. +******************************************************************************** +* File Name: Com_Cbk.h +******************************************************************************** +* Project/Product: COM programme +* Title: Com_Cbk.h +* Author: bo.liu 2010-2011 +* donger.yang 2012- +******************************************************************************** +* Description: Defination of Interface for Application Layer +* +******************************************************************************** +* Limitations: None +* +******************************************************************************** +* +******************************************************************************** +* Revision History: +* +* Version Date Initials CR# Descriptions +* ------- ---------- ---------- ------ ------------------- +* 01.00.00 10/08/2010 bo.liu N/A Original +* 01.00.01 04/07/2011 bo.liu N/A HrAsrCom110407-01 +* 01.00.02 05/08/2011 bo.liu N/A HrAsrCom110508-01 +* 01.00.03 05/20/2011 bo.liu N/A HrAsrCom110520-01 +* 01.01.00 03/05/2012 donger.yang N/A HrAsrCom120305-01 +* 02.00.00 05/03/2012 donger.yang N/A HrAsrCom120503-01 +* 02.01.00 07/01/2012 donger.yang N/A HrAsrCom120701-01 +* 02.01.01 07/12/2012 donger.yang N/A HrAsrCom120712-01 +* 02.01.02 07/22/2012 donger.yang N/A HrAsrCom120722-01 +* 02.01.03 08/01/2012 donger.yang N/A HrAsrCom120801-01 +* 02.01.04 08/10/2012 donger.yang N/A HrAsrCom120810-01 +* 02.01.05 08/14/2012 donger.yang N/A HrAsrCom120814-01 +* 02.01.06 08/17/2012 donger.yang N/A HrAsrCom120817-01 +* 02.01.07 08/22/2012 donger.yang N/A HrAsrCom120822-01 +* 02.01.08 08/25/2012 donger.yang N/A HrAsrCom120825-01 +* 02.01.09 09/04/2012 donger.yang N/A HrAsrCom120904-01 +* 02.02.00 09/11/2012 donger.yang N/A HrAsrCom120911-01 +* 02.02.01 10/10/2012 donger.yang N/A HrAsrCom121010-01 +* 02.02.02 10/17/2012 donger.yang N/A HrAsrCom121017-01 +* 02.02.03 10/19/2012 donger.yang N/A HrAsrCom121019-01 +* 02.02.04 10/22/2012 donger.yang N/A HrAsrCom121022-01 +* 03.00.00 11/08/2012 donger.yang N/A HrAsrCom121108-01 +* 03.00.01 01/06/2013 donger.yang N/A HrAsrCom130106-01 +* 03.00.02 03/25/2013 donger.yang N/A HrAsrCom130325-01 +* 03.00.03 05/03/2013 donger.yang N/A HrAsrCom130503-01 +* 03.00.04 06/08/2013 donger.yang N/A HrAsrCom130608-01 +* 03.00.05 07/30/2013 donger.yang N/A HrAsrCom130730-01 +* 03.00.06 08/26/2013 donger.yang N/A HrAsrCom130826-01 +******************************************************************************** +*END_FILE_HDR*/ + +#ifndef _COM_CBK_H_ +#define _COM_CBK_H_ +/******************************************************************************* +* Includes +*******************************************************************************/ + #include "Com.h" + + +/******************************************************************************* +* Function Declaration +*******************************************************************************/ +#define COM_START_SEC_PUBLIC_CODE +#include "MemMap.h" + +#if (COM_TXIPDUNUM >= 1u) + +extern FUNC(void, COM_PUBLIC_CODE) Com_TxConfirmation +( + PduIdType TxPduId +); + +extern FUNC(BufReq_ReturnType, COM_PUBLIC_CODE) Com_CopyTxData +( + PduIdType PduId, + P2VAR(PduInfoType, COM_APPL_DATA, COM_AUTOMOTIVE) PduInfoPtr, + P2VAR(RetryInfoType, COM_APPL_DATA, COM_AUTOMOTIVE) RetryInfoPtr, + P2VAR(PduLengthType, COM_APPL_DATA, COM_AUTOMOTIVE) TxDataCntPtr +); + +extern FUNC(void, COM_PUBLIC_CODE) Com_TpTxConfirmation +( + PduIdType PduId, + NotifResultType Result +); + +/*#if (COM_TXIPDUNUM >= 1u)*/ +#endif + +#if (COM_RXIPDUNUM >= 1u) + +extern FUNC(void, COM_PUBLIC_CODE) Com_RxIndication +( + PduIdType RxPduId, + P2CONST(PduInfoType, COM_APPL_DATA, COM_AUTOMOTIVE) PduInfoPtr +); + +extern FUNC(BufReq_ReturnType, COM_PUBLIC_CODE) Com_StartOfReception +( + PduIdType ComRxPduId, + PduLengthType TpSduLength, + P2VAR(PduLengthType, COM_APPL_DATA, COM_AUTOMOTIVE) RxBufferSizePtr +); + +extern FUNC(BufReq_ReturnType, COM_PUBLIC_CODE) Com_CopyRxData +( + PduIdType PduId, + P2CONST(PduInfoType, COM_APPL_DATA, COM_AUTOMOTIVE) PduInfoPointer, + P2VAR(PduLengthType, COM_APPL_DATA, COM_AUTOMOTIVE) RxBufferSizePtr +); + +extern FUNC(void, COM_PUBLIC_CODE) Com_TpRxIndication +( + PduIdType PduId, + NotifResultType Result +); + +/*#if (COM_RXIPDUNUM >= 1u)*/ +#endif + +#define COM_STOP_SEC_PUBLIC_CODE +#include "MemMap.h" + +#endif + + + diff --git a/code_app_out/Source/ComStack/Com/Com_Types.h b/code_app_out/Source/ComStack/Com/Com_Types.h new file mode 100644 index 0000000..a44de95 --- /dev/null +++ b/code_app_out/Source/ComStack/Com/Com_Types.h @@ -0,0 +1,201 @@ +/* BEGIN_FILE_HDR +******************************************************************************** +* NOTICE +* This software is the property of HiRain Technologies. Any information +* contained in this doc should not be reproduced, or used, or disclosed +* without the written authorization from HiRain Technologies. +******************************************************************************** +* File Name: Com_Type.h +******************************************************************************** +* Project/Product: COM programme +* Title: Com_Type.h +* Author: bo.liu 2010-2011 +* donger.yang 2012- +******************************************************************************** +* Description: Defination of Interface for Application Layer +* +******************************************************************************** +* Limitations: None +* +******************************************************************************** +* +******************************************************************************** +* Revision History: +* +* Version Date Initials CR# Descriptions +* ------- ---------- ---------- ------ ------------------- +* 01.00.00 10/08/2010 bo.liu N/A Original +* 01.00.01 04/07/2011 bo.liu N/A HrAsrCom110407-01 +* 01.00.02 05/08/2011 bo.liu N/A HrAsrCom110508-01 +* 01.00.03 05/20/2011 bo.liu N/A HrAsrCom110520-01 +* 01.01.00 03/05/2012 donger.yang N/A HrAsrCom120305-01 +* 02.00.00 05/03/2012 donger.yang N/A HrAsrCom120503-01 +* 02.01.00 07/01/2012 donger.yang N/A HrAsrCom120701-01 +* 02.01.01 07/12/2012 donger.yang N/A HrAsrCom120712-01 +* 02.01.02 07/22/2012 donger.yang N/A HrAsrCom120722-01 +* 02.01.03 08/01/2012 donger.yang N/A HrAsrCom120801-01 +* 02.01.04 08/10/2012 donger.yang N/A HrAsrCom120810-01 +* 02.01.05 08/14/2012 donger.yang N/A HrAsrCom120814-01 +* 02.01.06 08/17/2012 donger.yang N/A HrAsrCom120817-01 +* 02.01.07 08/22/2012 donger.yang N/A HrAsrCom120822-01 +* 02.01.08 08/25/2012 donger.yang N/A HrAsrCom120825-01 +* 02.01.09 09/04/2012 donger.yang N/A HrAsrCom120904-01 +* 02.02.00 09/11/2012 donger.yang N/A HrAsrCom120911-01 +* 02.02.01 10/10/2012 donger.yang N/A HrAsrCom121010-01 +* 02.02.02 10/17/2012 donger.yang N/A HrAsrCom121017-01 +* 02.02.03 10/19/2012 donger.yang N/A HrAsrCom121019-01 +* 02.02.04 10/22/2012 donger.yang N/A HrAsrCom121022-01 +* 03.00.00 11/08/2012 donger.yang N/A HrAsrCom121108-01 +* 03.00.01 01/06/2013 donger.yang N/A HrAsrCom130106-01 +* 03.00.02 03/25/2013 donger.yang N/A HrAsrCom130325-01 +* 03.00.03 05/03/2013 donger.yang N/A HrAsrCom130503-01 +* 03.00.04 06/08/2013 donger.yang N/A HrAsrCom130608-01 +* 03.00.05 07/30/2013 donger.yang N/A HrAsrCom130730-01 +* 03.00.06 08/26/2013 donger.yang N/A HrAsrCom130826-01 +******************************************************************************** +*END_FILE_HDR*/ + +#ifndef _COM_TYPES_H_ +#define _COM_TYPES_H_ + + +#ifdef _CODEWARRIOR_C_MC9S12XE_ +//#pragma MESSAGE DISABLE C1106 +#endif + +/******************************************************************************* +* Includes +*******************************************************************************/ +#include"ComStack_Types.h" + +/******************************************************************************* +* define the data type for COM +*******************************************************************************/ +#define Com_IpduGroupVector uint32 +#define COM_UINT8 uint8 +#define COM_UINT16 uint16 +#define COM_UINT32 uint32 +#define COM_CONST const + +/******************************************************************************* +* Macro define +*******************************************************************************/ + + +#define COM_NULL ((void*)0) +#define COM_YES 1u +#define COM_NO 0u +#define COM_RUNNING COM_YES +#define COM_STOP COM_NO + +#define COM_SERVICE_NOT_AVAILABLE 1u +#define COM_BUSY 2u +#define COM_NONE_FUNCTION 3u +#define COM_OUT_OF_RANGE 4u +#define COM_ERROR 5u + +#define COM_DIRECTION_TX 0x01u +#define COM_DIRECTION_RX 0x02u +#define COM_IPDUCONTROLCOMMAND_START 0x01u +#define COM_IPDUCONTROLCOMMAND_STOP 0x02u + +#define COM_RXTIMEOUTMONITOR_YES 1u +#define COM_RXTIMEOUTMONITOR_NO 0u + +/* Message and Signal Send type */ +#define COM_NOSENDTYPE ((uint8)0x00) /*Ipdu and Signal*/ +#define COM_SENDTYPECYCLIC ((uint8)0x01) /*Ipdu*/ +#define COM_SENDTYPEONWRITE ((uint8)0x02) /*Signal*/ +#define COM_SENDTYPEONCHANGE ((uint8)0x04) /*Signal*/ +#define COM_SENDTYPEIFACTIVE ((uint8)0x08) /*Signal*/ +#define COM_SENDTYPEREPETITION ((uint8)0x10) /*Signal*/ +#define COM_SENDTYPETIMEOUTMONITOR ((uint8)0x20) /*Ipdu*/ +#define COM_SENDTYPERESERVED ((uint8)0x40) +#define COM_SENDTYPEONEVENT (COM_SENDTYPEONWRITE | COM_SENDTYPEONCHANGE) +#define COM_TXREQUEST ((uint8)0x80) +#define COM_TXNOREQUEST (~COM_TXREQUEST) + +/******************************************************************************* +* data type definitions +*******************************************************************************/ +typedef P2FUNC(void, TYPEDEF, COM_TimeoutIndicationFun) (void); +typedef P2FUNC(void, TYPEDEF, COM_RxIndicationFun) (void); +typedef P2FUNC(void, TYPEDEF, COM_TxConfirmationFun) (void); +typedef P2FUNC(void, TYPEDEF, COM_TxTimeOutFun) (void); +typedef P2FUNC(void, TYPEDEF, COM_ErrorIndicationFun) (NotifResultType Result); +typedef P2FUNC(void, TYPEDEF, COM_LpduRxStartIndicationFun) + (BufReq_ReturnType Result); + +typedef P2FUNC(void, TYPEDEF, COM_SendSignalFun) + (P2CONST(void, COM_APPL_DATA, COM_AUTOMOTIVE) SigValue); + +typedef P2FUNC(void, TYPEDEF, COM_ReceivedSignalFun) + (P2VAR(void, COM_APPL_DATA, COM_AUTOMOTIVE)SignalValue); + +typedef PduLengthType ComTpBufferSize; +typedef uint8 Com_IpduGroupIdType; +typedef uint16 Com_SignalIdType; +typedef uint16 Com_TimerType; +typedef uint8 Com_SignalTxPropertyType; +typedef struct +{ + PduLengthType Length; + P2VAR(uint8, TYPEDEF, COM_APPL_DATA) Data_p; +}Com_LpduInfoType; + +/******************************************************************************* +* Type define +*******************************************************************************/ +typedef void Com_SigInActiveType ; + +typedef struct{ + PduIdType TxPduId; + Com_SignalTxPropertyType SigTxProperty; + P2CONST(Com_SigInActiveType, TYPEDEF, COM_CONFIG_DATA) aubSigInActiveValue; +}COM_TxSigStruct; + +typedef struct{ + PduIdType RxPduId; + Com_SignalTxPropertyType SigTxProperty; +}COM_RxSigStruct; + +/******************************************************************************* +* receive timeout messages struct +*******************************************************************************/ +typedef struct +{ + PduIdType RxPduId; + boolean TOMonitored; + Com_TimerType RxTOTimer; +}COM_IpduRxTimeOut_Struct; + +/* for signal gateway */ +typedef struct +{ + PduIdType RxPduId; + Com_SignalIdType OffsetInSignalGatewayInfo; + Com_SignalIdType SigGWNum; +}COM_SignalGatewayIpduInfoType; + +typedef struct +{ + Com_SignalIdType RxSignalId; + Com_SignalIdType TxSignalId; +}COM_SignalGatewayInfoType; + +typedef struct +{ + PduIdType IpduId; + boolean IpduDirecttion; +}COM_GroupIpduInfoType; +typedef struct +{ + PduIdType IpduGroupPosition; + PduIdType IpduNumInGroup; +}COM_IpduGroupInfoType; + + +#endif + + + diff --git a/code_app_out/Source/ComStack/Common/Bsw_Common.c b/code_app_out/Source/ComStack/Common/Bsw_Common.c new file mode 100644 index 0000000..0a27fbe --- /dev/null +++ b/code_app_out/Source/ComStack/Common/Bsw_Common.c @@ -0,0 +1,107 @@ +/* BEGIN_FILE_HDR +******************************************************************************** +* NOTICE +* This software is the property of HiRain Technologies. Any information +* contained in this doc should not be reproduced, or used, or disclosed +* without the written authorization from HiRain Technologies. +******************************************************************************** +* File Name : Bsw_Common.c +******************************************************************************** +* Project/Product : AUTOSAR 4.0 +* Title : BSW COMMON File +* Author : Hirain +******************************************************************************** +* Description : for some functions may be used by all modules +* +******************************************************************************** +* Limitations : None +* +******************************************************************************** +* +******************************************************************************** +* Revision History: +* +* Version Date Initials CR# Descriptions +* --------- ---------- ------------ ---------- --------------- +* 01.00.00 24/08/2016 ning.chen N/A Original +* +******************************************************************************** +* END_FILE_HDR*/ + +/******************************************************************************* +* Includes +*******************************************************************************/ +#include "Bsw_Common.h" + +#define BSW_START_SEC_CODE +#include "MemMap.h" + +/******************************************************************************* +* Functions +*******************************************************************************/ + +/* BEGIN_FUNCTION_HDR +******************************************************************************** +* Function Name: Bsw_MemCpy +* +* Description: This service copy data from src to dest +* +* Inputs: dest, src, size +* +* Outputs: None +* +* Limitations: None +******************************************************************************** +END_FUNCTION_HDR*/ +FUNC(void, BSW_CODE) Bsw_MemCpy +( + CONSTP2VAR(uint8, AUTOMATIC,BSW_APPL_DATA) dest, + CONSTP2CONST(uint8, AUTOMATIC,BSW_APPL_DATA) src, + const uint32 size +) +{ + uint32 i; + + for(i = 0; i < size; i++) + { + dest[i] = src[i]; + } +} + + +/* BEGIN_FUNCTION_HDR +******************************************************************************** +* Function Name: Bsw_MemSet +* +* Description: This service set fix data to dest +* +* Inputs: dest, src, size +* +* Outputs: None +* +* Limitations: None +******************************************************************************** +END_FUNCTION_HDR*/ +FUNC(void, BSW_CODE) Bsw_MemSet +( + CONSTP2VAR(uint8, AUTOMATIC,BSW_APPL_DATA) dest, + const uint8 src, + const uint32 size +) +{ + uint32 i; + + for(i = 0; i < size; i++) + { + dest[i] = src; + } +} + +#define BSW_STOP_SEC_CODE +#include "MemMap.h" + + + + + + diff --git a/code_app_out/Source/ComStack/Common/Bsw_Common.h b/code_app_out/Source/ComStack/Common/Bsw_Common.h new file mode 100644 index 0000000..a9bbf9b --- /dev/null +++ b/code_app_out/Source/ComStack/Common/Bsw_Common.h @@ -0,0 +1,52 @@ +/* BEGIN_FILE_HDR + ******************************************************************************** + * NOTICE + * This software is the property of HiRain Technologies. Any information + * contained in this doc should not be reproduced, or used, or disclosed + * without the written authorization from HiRain Technologies. + ******************************************************************************** + * File Name : Bsw_Common.h + ******************************************************************************** + * Project/Product : AUTOSAR 4.0 + * Title : Bsw Common File + * Author : Hirain + ******************************************************************************** + * Description : Bsw_Common header file. + * + ******************************************************************************** + * Limitations : None + * + ******************************************************************************** + * + ******************************************************************************** + * Revision History: + * + ******************************************************************************** + * END_FILE_HDR*/ + +#ifndef _BSW_COMMON_H_ +#define _BSW_COMMON_H_ +/******************************************************************************* + * Includes + *******************************************************************************/ +#include "Std_Types.h" + +#define BSW_START_SEC_CODE +#include "MemMap.h" +/******************************************************************************* + * Declare + *******************************************************************************/ +extern FUNC(void, BSW_CODE) Bsw_MemCpy( +CONSTP2VAR(uint8, AUTOMATIC,BSW_APPL_DATA) dest, +CONSTP2CONST(uint8, AUTOMATIC,BSW_APPL_DATA) src, +const uint32 size +); +extern FUNC(void, BSW_CODE) Bsw_MemSet( +CONSTP2VAR(uint8, AUTOMATIC,BSW_APPL_DATA) dest, +const uint8 src, +const uint32 size +); +#define BSW_STOP_SEC_CODE +#include "MemMap.h" + +#endif diff --git a/code_app_out/Source/ComStack/Common/ComStack_Types.h b/code_app_out/Source/ComStack/Common/ComStack_Types.h new file mode 100644 index 0000000..651aa81 --- /dev/null +++ b/code_app_out/Source/ComStack/Common/ComStack_Types.h @@ -0,0 +1,170 @@ +/** + ****************************************************************************** + * @file + * @author + * @version + * @date + * @brief + * @function List: + ****************************************************************************** + * @attention + * + * + *

© COPYRIGHT 2021

+ ****************************************************************************** + * @History: + * @Author: + * @Data: + * @Version: +*/ + +#ifndef _COMSTACK_TYPES_H_ +#define _COMSTACK_TYPES_H_ + +/******************************************************************************* +* Includes +*******************************************************************************/ +#include "Std_Types.h" + +/******************************************************************************* +* Macro +*******************************************************************************/ +/*General return codes for NotifResultType*/ + +/*Action has been successfully finished: +- message sent out (in case of confirmation), +- message received (in case of indication) */ +#define NTFRSLT_OK (0x00U) + /*Error notification: +- message not successfully sent out (in case of confirmation), +- message not successfully received (in case of indication) */ +#define NTFRSLT_E_NOT_OK (0x01U) +/*Error notification: +- timer N_Ar/N_As (according to ISO specification [ISONM]) has passed its +time-out value N_Asmax/N_Armax.This value can be issued to service user on +both the sender and receiver side. */ +#define NTFRSLT_E_TIMEOUT_A (0x02U) +/*Error notification: +- timer N_Bs has passed its time-out value N_Bsmax (according to ISO +specification [ISONM]).This value can be issued to the service user on the +sender side only. */ +#define NTFRSLT_E_TIMEOUT_BS (0x03U) +/*Error notification: +- timer N_Cr has passed its time-out value N_Crmax. +This value can be issued to the service user on the receiver side only. */ +#define NTFRSLT_E_TIMEOUT_CR (0x04U) +/*Error notification: +- unexpected sequence number (PCI.SN) value received. +This value can be issued to the service user on the receiver side only. */ +#define NTFRSLT_E_WRONG_SN (0x05U) +/*Error notification: +- invalid or unknown FlowStatus value has been received in a flow control +(FC) N_PDU. +This value can be issued to the service user on the sender side only. */ +#define NTFRSLT_E_INVALID_FS (0x06U) +/*Error notification: +- unexpected protocol data unit received. +This value can be issued to the service user on both the sender and +receiver side. */ +#define NTFRSLT_E_UNEXP_PDU (0x07U) +/*Error notification: +- flow control WAIT frame that exceeds the maximum counter N_WFTmax received. +This value can be issued to the service user on the receiver side. */ +#define NTFRSLT_E_WFT_OVRN (0x08U) +/*Error notification: +Flow control (FC) N_PDU with FlowStatus = ABORT received. It indicates an abort +of a transmission. A possible reason for this is that the receiver is currently +busy and can not take the request at that point in time.*/ +#define NTFRSLT_E_ABORT (0x09U) +/*Error notification: +- flow control (FC) N_PDU with FlowStatus = OVFLW received. + It indicates that the buffer on the receiver side of a segmented message + transmission cannot store the number of bytes specified by the FirstFrame + DataLength (FF_DL) parameter in the FirstFrame and therefore the transmission + of the 19 of 23 AUTOSAR_SWS_ComStackTypes segmented message was aborted. +- no buffer within the TP available to transmit the segmented I-PDU. +This value can be issued to the service user on both the sender and receiver +side. */ +#define NTFRSLT_E_NO_BUFFER (0x0AU) +/*Action has been successfully finished: +- Requested cancellation has been executed.*/ +#define NTFRSLT_E_CANCELATION_OK (0x0BU) +/*Error notification: +- Due to an internal error the requested cancelation has not been executed. +This will happen e.g., if the to be canceled transmission has been executed +already.*/ +#define NTFRSLT_E_CANCELATION_NOT_OK (0x0CU) +/*The parameter change request has been successfully executed */ +#define NTFRSLT_PARAMETER_OK (0x0DU) +/*The request for the change of the parameter did not complete successfully*/ +#define NTFRSLT_E_PARAMETER_NOT_OK (0x0EU) +/*The parameter change request not executed successfully due to an ongoing +reception*/ +#define NTFRSLT_E_RX_ON (0x0FU) +/*The parameter change request not executed successfully due to a wrong value*/ +#define NTFRSLT_E_VALUE_NOT_OK (0x10U) + +#define NTFRSLT_E_CAN_WRONG_CFDL (0x11U) + +#define NTFRSLT_E_TMIEOUT_T1 (0x12U) +/* 0x12-0x1E Reserved values for future usage. */ + +/*General return codes for BusTrcvErrorType*/ +#define BUSTRCV_OK (0x00U) +#define BUSTRCV_E_OK (0x01U) + +/******************************************************************************* +* Typedef +*******************************************************************************/ +/*The size of this global type depends on the maximum number of PDUs used +within one software module.*/ +typedef uint16 PduIdType; +/*The size of this global type depends on the maximum length of PDUs to be +sent by an ECU.*/ +typedef uint16 PduLengthType; + +typedef P2VAR(uint8, TYPEDEF, TYPEDEF) SduDataPtrType; +typedef struct +{ + SduDataPtrType SduDataPtr; + PduLengthType SduLength; +}PduInfoType; + + +typedef enum +{ + BUFREQ_OK, /*Buffer request accomplished successful.*/ + BUFREQ_E_NOT_OK, /*Buffer request not successful. Buffer cannot be + accessed.*/ + BUFREQ_E_BUSY, /*Temporarily no buffer available. It's up the + requestor to retry request for a certain time.*/ + BUFREQ_E_OVFL /*No Buffer of the required length can be provided.*/ +}BufReq_ReturnType; + + +typedef enum +{ + TP_DATACONF, /*indicates that all data, that have been copied so far, + are confirmed and can be removed from the TP buffer. + Data copied by this API call are excluded and will be + confirmed later.*/ + TP_DATARETRY, /*indicates that this API call shall copy already copied + data in order to recover from an error. In this case + TxTpDataCnt specifies the offset of the first byte to be + copied by the API call.*/ + TP_CONFPENDING /*indicates that the previously copied data must remain + in the TP*/ +}TpDataStateType; + +typedef struct +{ + TpDataStateType TpDataState; + PduLengthType TxTpDataCnt; +}RetryInfoType; + +typedef uint8 NotifResultType; +typedef uint8 BusTrcvErrorType; +typedef uint8 NetworkHandleType; + +#endif /* _COMSTACK_TYPES_H_ */ + diff --git a/code_app_out/Source/ComStack/Common/Compiler.h b/code_app_out/Source/ComStack/Common/Compiler.h new file mode 100644 index 0000000..bcdfa32 --- /dev/null +++ b/code_app_out/Source/ComStack/Common/Compiler.h @@ -0,0 +1,131 @@ +/** + ****************************************************************************** + * @file + * @author + * @version + * @date + * @brief + * @function List: + ****************************************************************************** + * @attention + * + * + *

© COPYRIGHT 2021

+ ****************************************************************************** + * @History: + * @Author: + * @Data: + * @Version: +*/ + +#ifndef _COMPILER_H_ +#define _COMPILER_H_ + +/******************************************************************************* +* Includes +*******************************************************************************/ +#include "common_cfg.h" +#include "Compiler_Cfg.h" + +/******************************************************************************* +* Macro +*******************************************************************************/ +#define COMPILER_VENDOR_ID (0xFFFFU) + +#if 0 +#define _CODEWARRIOR_C_S12X_ +/* used for ignoring bits define warnning*/ +#ifdef _CODEWARRIOR_C_S12X_ +#pragma MESSAGE DISABLE C1106 +#endif +#endif + +/* AUTOMATIC used for the declaration of local pointers */ +#define AUTOMATIC + +#define TYPEDEF + +/*_STATIC_ define for abstraction of compiler keyword static*/ +#define STATIC static + +/*NULL_PTR define with a void pointer to zero definition*/ +#ifndef NULL_PTR + #define NULL_PTR ((void*)0) +#endif + +/*_INLINE_ define for abstraction of the keyword inline */ +/* These macro are empty because we dont suggest to use inline */ +#define INLINE +#define LOCAL_INLINE + +/******************************************************************************* +* PRQA S 3409 +* PRQA S 3410 MISRA-C:2004 Rule 19.10 +* PRQA S 3453 MISRA-C:2004 Rule 19.7 +* These function-like macros are AUTOSAR standard API, they will be used as +* prefixion when define functions, variable and so on. So the parameters or the +* body of the macros cannot be enclosed in (). +* This part of code is verified manually and has no impact. +*******************************************************************************/ +/* FUNC macro for the declaration and definition of functions, that ensures + correct syntax of function declarations + rettype return type of the function + memclass classification of the function itself*/ +#define FUNC(rettype, memclass) rettype memclass + +/* P2VAR macro for the declaration and definition of pointers in RAM, + pointing to variables + ptrtype type of the referenced variable memclass + memclass classification of the pointer's variable itself + ptrclass defines the classification of the pointer's distance + */ + /* in CW, can not use any key words to locate the memclass + we can only use #pragma to locate the memclass which is in MemMap.h + */ +#define P2VAR(ptrtype, memclass, ptrclass) ptrtype * ptrclass + +/* P2CONST macro for the declaration and definition of pointers in RAM + pointing to constants + ptrtype type of the referenced data + memclass classification of the pointer's variable itself + ptrclass defines the classification of the pointer's distance + */ +#define P2CONST(ptrtype, memclass, ptrclass) const ptrtype * ptrclass + +/* CONSTP2VAR macro for the declaration and definition of constant + pointers accessing variables + ptrtype type of the referenced data + memclass classification of the pointer's variable itself + ptrclass defines the classification of the pointer's distance + */ +#define CONSTP2VAR(ptrtype, memclass, ptrclass) ptrtype* const ptrclass + +/* CONSTP2CONST macro for the declaration and definition of constant pointers + accessing constants + ptrtype type of the referenced data + memclass classification of the pointer's variable itself + ptrclass defines the classification of the pointer's distance + */ +#define CONSTP2CONST(ptrtype, memclass, ptrclass) const ptrtype* const ptrclass + +/* P2FUNC macro for the type definition of pointers to functions + rettype return type of the function + ptrclass defines the classification of the pointer's distance + fctname function name respectivly name of the defined type + */ +#define P2FUNC(rettype, ptrclass, fctname) rettype (* ptrclass fctname) + +/* CONST macro for the declaration and definition of constants + type type of the constant + memclass classification of the constant itself + */ +#define CONST(type, memclass) const type + +/* VAR macro for the declaration and definition of variables + vartype type of the variable + memclass classification of the variable itself + */ +#define VAR(vartype, memclass) vartype + +#endif /* _COMPILER_H_ */ + diff --git a/code_app_out/Source/ComStack/Common/Compiler_Cfg.h b/code_app_out/Source/ComStack/Common/Compiler_Cfg.h new file mode 100644 index 0000000..ab9e0af --- /dev/null +++ b/code_app_out/Source/ComStack/Common/Compiler_Cfg.h @@ -0,0 +1,397 @@ +/** + ****************************************************************************** + * @file + * @author + * @version + * @date + * @brief + * @function List: + ****************************************************************************** + * @attention + * + * + *

© COPYRIGHT 2021

+ ****************************************************************************** + * @History: + * @Author: + * @Data: + * @Version: +*/ + +#ifndef _COMPILER_CFG_H_ +#define _COMPILER_CFG_H_ + +/******************************************************************************* + * BSW START + *******************************************************************************/ +#define BSW_CODE +#define BSW_VAR_NOINIT +#define BSW_VAR_POWER_ON_INIT +#define BSW_VAR_FAST +#define BSW_VAR +#define BSW_CONST +#define BSW_APPL_CODE +#define BSW_APPL_CONST +#define BSW_APPL_DATA +#define BSW_CALLOUT_CODE +/******************************************************************************* + * BSW END + *******************************************************************************/ + +/******************************************************************************* + * CAN Communication Stack START + *******************************************************************************/ + +/******************************************************************************* +* CAN Driver START +*******************************************************************************/ +#define CAN_PUBLIC_CODE /* API functions */ +#define CAN_PUBLIC_CONST /* API constants */ + +#define CAN_PRIVATE_CODE /* Internal functions */ + +#define CAN_PRIVATE_DATA /* Module internal data */ +#define CAN_PRIVATE_CONST /* Internal ROM Data */ + +#define CAN_APPL_CODE /* callbacks of the Application */ +#define CAN_APPL_CONST /* Applications' ROM Data */ +#define CAN_APPL_DATA /* Applications' RAM Data */ +#define CAN_FAST_DATA /* 'Near' RAM Data */ + + +#define CAN_CONFIG_CONST /* Desc. Tables -> Config-dependent */ +#define CAN_CONFIG_DATA /* Config. dependent (reg. size) data */ + +#define CAN_INIT_DATA /* Data which is initialized during + Startup */ +#define CAN_NOINIT_DATA /* Data which is not initialized during + Startup */ +#define CAN_CONST /* Data Constants */ +/******************************************************************************* +* CAN Driver END +*******************************************************************************/ + +/******************************************************************************* +* CAN Interface START +*******************************************************************************/ +#define CANIF_PUBLIC_CODE /* API functions */ +#define CANIF_PUBLIC_CONST /* API constants */ + +#define CANIF_PRIVATE_CODE /* Internal functions */ + +#define CANIF_PRIVATE_DATA /* Module internal data */ +#define CANIF_PRIVATE_CONST /* Internal ROM Data */ + +#define CANIF_APPL_CODE /* callbacks of the Application */ +#define CANIF_APPL_CONST /* Applications' ROM Data */ +#define CANIF_APPL_DATA /* Applications' RAM Data */ +#define CANIF_FAST_DATA /* 'Near' RAM Data */ + + +#define CANIF_CONFIG_CONST /* Desc. Tables -> Config-dependent */ +#define CANIF_CONFIG_DATA /* Config. dependent (reg. size) data*/ + +#define CANIF_INIT_DATA /* Data which is initialized during + Startup */ +#define CANIF_NOINIT_DATA /* Data which is not initialized during + Startup */ +#define CANIF_CONST /* Data Constants */ +/******************************************************************************* +* CAN Interface END +*******************************************************************************/ + +/******************************************************************************* +* CCP START +*******************************************************************************/ +#define CCP_PUBLIC_CODE /* API functions */ +#define CCP_PUBLIC_CONST /* API constants */ + +#define CCP_PRIVATE_CODE /* Internal functions */ + +#define CCP_PRIVATE_DATA /* Module internal data */ +#define CCP_PRIVATE_CONST /* Internal ROM Data */ + +#define CCP_APPL_CODE /* callbacks of the Application */ +#define CCP_APPL_CONST /* Applications' ROM Data */ +#define CCP_APPL_DATA /* Applications' RAM Data */ +#define CCP_FAST_DATA /* 'Near' RAM Data */ + + +#define CCP_CONFIG_CONST /* Desc. Tables -> Config-dependent */ +#define CCP_CONFIG_DATA /* Config. dependent (reg. size) data */ + +#define CCP_INIT_DATA /* Data which is initialized during + Startup */ +#define CCP_NOINIT_DATA /* Data which is not initialized during + Startup */ +#define CCP_CONST /* Data Constants */ +/******************************************************************************* +* CCP END +*******************************************************************************/ + +/******************************************************************************* +* CANTP START +*******************************************************************************/ +#define CANTP_PUBLIC_CODE /* API functions */ +#define CANTP_PUBLIC_CONST /* API constants */ + +#define CANTP_PRIVATE_CODE /* Internal functions */ + +#define CANTP_PRIVATE_DATA /* Module internal data */ +#define CANTP_PRIVATE_CONST /* Internal ROM Data */ + +#define CANTP_APPL_CODE /* callbacks of the Application */ +#define CANTP_APPL_CONST /* Applications' ROM Data */ +#define CANTP_APPL_DATA /* Applications' RAM Data */ +#define CANTP_FAST_DATA /* 'Near' RAM Data */ + + +#define CANTP_CONFIG_CONST /* Desc. Tables -> Config-dependent */ +#define CANTP_CONFIG_DATA /* Config. dependent (reg. size) data */ + +#define CANTP_INIT_DATA /* Data which is initialized during + Startup */ +#define CANTP_NOINIT_DATA /* Data which is not initialized during + Startup */ +#define CANTP_CONST /* Data Constants */ +/******************************************************************************* +* CANTP END +*******************************************************************************/ + +/******************************************************************************* +* DCM START +*******************************************************************************/ +#define DCM_CODE /* FOR CONFIG DOCUMENT */ +#define DCM_VARIABLE /* FOR CONFIG DOCUMENT */ +#define DCM_PUBLIC_CODE /* API functions */ +#define DCM_PUBLIC_CONST /* API constants */ + +#define DCM_PRIVATE_CODE /* Internal functions */ + +#define DCM_PRIVATE_DATA /* Module internal data */ +#define DCM_PRIVATE_CONST /* Internal ROM Data */ + +#define DCM_APPL_CODE /* callbacks of the Application */ +#define DCM_APPL_CONST /* Applications' ROM Data */ +#define DCM_APPL_DATA /* Applications' RAM Data */ + +#define DCM_CONFIG_CONST /* Desc. Tables -> Config-dependent */ +#define DCM_CONFIG_DATA /* Config. dependent (reg. size) data */ + +#define DCM_INIT_DATA /* Data which is initialized during + Startup */ +#define DCM_NOINIT_DATA /* Data which is not initialized during + Startup */ +#define DCM_CONST /* Data Constants */ +/******************************************************************************* +* DCM END +*******************************************************************************/ + + +/******************************************************************************* +* DCM START +*******************************************************************************/ +#define PDUR_CODE /* FOR CONFIG DOCUMENT */ +#define PDUR_VARIABLE /* FOR CONFIG DOCUMENT */ +#define PDUR_PUBLIC_CODE /* API functions */ +#define PDUR_PUBLIC_CONST /* API constants */ + +#define PDUR_PRIVATE_CODE /* Internal functions */ + +#define PDUR_PRIVATE_DATA /* Module internal data */ +#define PDUR_PRIVATE_CONST /* Internal ROM Data */ + +#define PDUR_APPL_CODE /* callbacks of the Application */ +#define PDUR_APPL_CONST /* Applications' ROM Data */ +#define PDUR_APPL_DATA /* Applications' RAM Data */ + +#define PDUR_CONFIG_CONST /* Desc. Tables -> Config-dependent */ +#define PDUR_CONFIG_DATA /* Config. dependent (reg. size) data */ + +#define PDUR_INIT_DATA /* Data which is initialized during + Startup */ +#define PDUR_NOINIT_DATA /* Data which is not initialized during + Startup */ +#define PDUR_CONST /* Data Constants */ +/******************************************************************************* +* DCM END +*******************************************************************************/ + +/******************************************************************************* +* COM START +*******************************************************************************/ +#define COM_PUBLIC_CODE /* API functions */ +#define COM_PUBLIC_CONST /* API constants */ + +#define COM_PRIVATE_CODE /* Internal functions */ + +#define COM_PRIVATE_DATA /* Module internal data */ +#define COM_PRIVATE_CONST /* Internal ROM Data */ + +#define COM_APPL_CODE /* callbacks of the Application */ +#define COM_APPL_CONST /* Applications' ROM Data */ +#define COM_APPL_DATA /* Applications' RAM Data */ +#define COM_FAST_DATA /* 'Near' RAM Data */ + + +#define COM_CONFIG_CONST /* Desc. Tables -> Config-dependent */ +#define COM_CONFIG_DATA /* Config. dependent (reg. size) data */ + +#define COM_INIT_DATA /* Data which is initialized during + Startup */ +#define COM_NOINIT_DATA /* Data which is not initialized during + Startup */ +//#define COM_CONST /* Data Constants 在 Com_Types.h己存在 */ +#define COM_AUTOMOTIVE /* Automotive */ +/******************************************************************************* +* COM END +*******************************************************************************/ + +/******************************************************************************* +* OSEKNM START +*******************************************************************************/ +#define CANNM_VAR_NOINIT_FAST +#define CANNM_CODE +#define NM_APPL_VAR +#define NM_CODE +#define CANNM_APPL_VAR +#define CANNM_CONST +#define CANNM_PBCFG +#define CANNM_VAR_NOINIT +#define NM_CONST +/******************************************************************************* +* OSEKNM END +*******************************************************************************/ + + +/******************************************************************************* + * CAN Communication Stack END + *******************************************************************************/ + +/******************************************************************************* +* LIN Communication Stack START +*******************************************************************************/ + +/******************************************************************************* +* LIN Driver START +*******************************************************************************/ +#define LIN_PUBLIC_CODE /* API functions */ +#define LIN_PUBLIC_CONST /* API constants */ + +#define LIN_PRIVATE_CODE /* Internal functions */ + +#define LIN_PRIVATE_DATA /* Module internal data */ +#define LIN_PRIVATE_CONST /* Internal ROM Data */ + +#define LIN_APPL_CODE /* callbacks of the Application */ +#define LIN_APPL_CONST /* Applications' ROM Data */ +#define LIN_APPL_DATA /* Applications' RAM Data */ +#define LIN_FAST_DATA /* 'Near' RAM Data */ + + +#define LIN_CONFIG_CONST /* Desc. Tables -> Config-dependent */ +#define LIN_CONFIG_DATA /* Config. dependent (reg. size) data */ + +#define LIN_INIT_DATA /* Data which is initialized during + Startup */ +#define LIN_NOINIT_DATA /* Data which is not initialized during + Startup */ +#define LIN_CONST /* Data Constants */ +/******************************************************************************* +* LIN Driver END +*******************************************************************************/ + +/******************************************************************************* +* LIN Interface START +*******************************************************************************/ +#define LINIF_PUBLIC_CODE /* API functions */ +#define LINIF_PUBLIC_CONST /* API constants */ + +#define LINIF_PRIVATE_CODE /* Internal functions */ + +#define LINIF_PRIVATE_DATA /* Module internal data */ +#define LINIF_PRIVATE_CONST /* Internal ROM Data */ + +#define LINIF_APPL_CODE /* callbacks of the Application */ +#define LINIF_APPL_CONST /* Applications' ROM Data */ +#define LINIF_APPL_DATA /* Applications' RAM Data */ +#define LINIF_FAST_DATA /* 'Near' RAM Data */ + +#define LINIF_CONFIG_CONST /* Desc. Tables -> Config-dependent */ +#define LINIF_CONFIG_DATA /* Config. dependent (reg. size) data*/ + +#define LINIF_INIT_DATA /* Data which is initialized during + Startup */ +#define LINIF_NOINIT_DATA /* Data which is not initialized during + Startup */ +#define LINIF_CONST /* Data Constants */ +/******************************************************************************* + * LIN Interface END + *******************************************************************************/ + +/******************************************************************************* + * LIN Communication Stack END + *******************************************************************************/ + +/******************************************************************************* +* CAN Network Management START +*******************************************************************************/ +#define CANNM_CODE +#define CANNM_VAR_NOINIT +#define CANNM_VAR_POWER_ON_INIT + +#define CANNM_VAR_FAST +#define CANNM_VAR +#define CANNM_CONST + +#define CANNM_APPL_CODE +#define CANNM_APPL_CONST +#define CANNM_APPL_DATA + +#define CANNM_CALLOUT_CODE +/******************************************************************************* + * NVM START + *******************************************************************************/ +#define NVM_CODE +#define NVM_VAR_NOINIT +#define NVM_VAR_POWER_ON_INIT +#define NVM_VAR_FAST +#define NVM_VAR +#define NVM_CONST +#define NVM_APPL_CODE +#define NVM_APPL_CONST +#define NVM_APPL_DATA +#define NVM_CALLOUT_CODE +/******************************************************************************* + * NVM END + *******************************************************************************/ +/******************************************************************************* + * DEM START + *******************************************************************************/ +#define DEM_CODE /* FOR CONFIG DOCUMENT */ +#define DEM_VARIABLE /* FOR CONFIG DOCUMENT */ +#define DEM_PUBLIC_CODE /* API functions */ +#define DEM_PUBLIC_CONST /* API constants */ + +#define DEM_PRIVATE_CODE /* Internal functions */ + +#define DEM_PRIVATE_DATA /* Module internal data */ +#define DEM_PRIVATE_CONST /* Internal ROM Data */ + +#define DEM_APPL_CODE /* callbacks of the Application */ +#define DEM_APPL_CONST /* Applications' ROM Data */ +#define DEM_APPL_DATA /* Applications' RAM Data */ + +#define DEM_CONFIG_CONST /* Desc. Tables -> Config-dependent */ +#define DEM_CONFIG_DATA /* Config. dependent (reg. size) data */ + +#define DEM_INIT_DATA /* Data which is initialized during + Startup */ +#define DEM_NOINIT_DATA /* Data which is not initialized during + Startup */ +#define DEM_CONST /* Data Constants */ +/******************************************************************************* + * DEM END + *******************************************************************************/ + +#endif/* _COMPILER_CFG_H_ */ diff --git a/code_app_out/Source/ComStack/Common/MemMap.h b/code_app_out/Source/ComStack/Common/MemMap.h new file mode 100644 index 0000000..ffd7c9e --- /dev/null +++ b/code_app_out/Source/ComStack/Common/MemMap.h @@ -0,0 +1,1053 @@ +/** + ****************************************************************************** + * @file + * @author + * @version + * @date + * @brief + * @function List: + ****************************************************************************** + * @attention + * + * + *

© COPYRIGHT 2021

+ ****************************************************************************** + * @History: + * @Author: + * @Data: + * @Version: +*/ + +#if defined (START_WITH_IF) +/******************************************************************************* +* CAN Communication Stack START +*******************************************************************************/ +#elif defined (BSW_START_SEC_BSW_CODE) +#ifdef SECTION_STARTED +#error "Section is not stopped" +#else +#define SECTION_STARTED +#undef BSW_START_SEC_BSW_CODE +/* Add #pragma code here */ +#endif +#elif defined (BSW_STOP_SEC_BSW_CODE) +#ifndef SECTION_STARTED +#error "Section is not started" +#else +#undef SECTION_STARTED +#undef BSW_STOP_SEC_BSW_CODE +/* Add #pragma code here */ +#endif + +/******************************************************************************* +* CAN Driver START +*******************************************************************************/ +#elif defined (CAN_START_SEC_VAR_UNSPECIFIED) + #ifdef SECTION_STARTED + #error "Section is not stopped" + #else + #define SECTION_STARTED + #undef CAN_START_SEC_VAR_UNSPECIFIED + /* Add #pragma code here */ + #endif +#elif defined (CAN_STOP_SEC_VAR_UNSPECIFIED) + #ifndef SECTION_STARTED + #error "Section is not started" + #else + #undef SECTION_STARTED + #undef CAN_STOP_SEC_VAR_UNSPECIFIED + /* Add #pragma code here */ + #endif +#elif defined (CAN_START_SEC_CONFIG_DATA_UNSPECIFIED) + #ifdef SECTION_STARTED + #error "Section is not stopped" + #else + #define SECTION_STARTED + #undef CAN_START_SEC_CONFIG_DATA_UNSPECIFIED + /* Add #pragma code here */ + #endif +#elif defined (CAN_STOP_SEC_CONFIG_DATA_UNSPECIFIED) + #ifndef SECTION_STARTED + #error "Section is not started" + #else + #undef SECTION_STARTED + #undef CAN_STOP_SEC_CONFIG_DATA_UNSPECIFIED + /* Add #pragma code here */ + #endif +#elif defined (CAN_START_SEC_CONST_UNSPECIFIED) + #ifdef SECTION_STARTED + #error "Section is not stopped" + #else + #define SECTION_STARTED + #undef CAN_START_SEC_CONST_UNSPECIFIED + /* Add #pragma code here */ + #endif +#elif defined (CAN_STOP_SEC_CONST_UNSPECIFIED) + #ifndef SECTION_STARTED + #error "Section is not started" + #else + #undef SECTION_STARTED + #undef CAN_STOP_SEC_CONST_UNSPECIFIED + /* Add #pragma code here */ + #endif +#elif defined (CAN_START_SEC_PUBLIC_CODE) + #ifdef SECTION_STARTED + #error "Section is not stopped" + #else + #define SECTION_STARTED + #undef CAN_START_SEC_PUBLIC_CODE + /* Add #pragma code here */ + #endif +#elif defined (CAN_STOP_SEC_PUBLIC_CODE) + #ifndef SECTION_STARTED + #error "Section is not started" + #else + #undef SECTION_STARTED + #undef CAN_STOP_SEC_PUBLIC_CODE + /* Add #pragma code here */ + #endif +#elif defined (CAN_START_SEC_PRIVATE_CODE) + #ifdef SECTION_STARTED + #error "Section is not stopped" + #else + #define SECTION_STARTED + #undef CAN_START_SEC_PRIVATE_CODE + /* Add #pragma code here */ + #endif +#elif defined (CAN_STOP_SEC_PRIVATE_CODE) + #ifndef SECTION_STARTED + #error "Section is not started" + #else + #undef SECTION_STARTED + #undef CAN_STOP_SEC_PRIVATE_CODE + /* Add #pragma code here */ + #endif +#elif defined (CAN_START_SEC_ISR_CODE) + #ifdef SECTION_STARTED + #error "Section is not stopped" + #else + #define SECTION_STARTED + #undef CAN_START_SEC_ISR_CODE + /* Add #pragma code here */ + #endif +#elif defined (CAN_STOP_SEC_ISR_CODE) + #ifndef SECTION_STARTED + #error "Section is not started" + #else + #undef SECTION_STARTED + #undef CAN_STOP_SEC_ISR_CODE + /* Add #pragma code here */ + #endif +#elif defined (CAN_START_SEC_APPL_CODE) + #ifdef SECTION_STARTED + #error "Section is not stopped" + #else + #define SECTION_STARTED + #undef CAN_START_SEC_APPL_CODE + /* Add #pragma code here */ + #endif +#elif defined (CAN_STOP_SEC_APPL_CODE) + #ifndef SECTION_STARTED + #error "Section is not started" + #else + #undef SECTION_STARTED + #undef CAN_STOP_SEC_APPL_CODE + /* Add #pragma code here */ + #endif +/******************************************************************************* +* CAN Driver END +*******************************************************************************/ + +/******************************************************************************* +* CAN Interface START +*******************************************************************************/ +#elif defined (CANIF_START_SEC_VAR_UNSPECIFIED) + #ifdef SECTION_STARTED + #error "Section is not stopped" + #else + #define SECTION_STARTED + #undef CANIF_START_SEC_VAR_UNSPECIFIED + /* Add #pragma code here */ + #endif +#elif defined (CANIF_STOP_SEC_VAR_UNSPECIFIED) + #ifndef SECTION_STARTED + #error "Section is not started" + #else + #undef SECTION_STARTED + #undef CANIF_STOP_SEC_VAR_UNSPECIFIED + /* Add #pragma code here */ + #endif +#elif defined (CANIF_START_SEC_CONFIG_DATA_UNSPECIFIED) + #ifdef SECTION_STARTED + #error "Section is not stopped" + #else + #define SECTION_STARTED + #undef CANIF_START_SEC_CONFIG_DATA_UNSPECIFIED + /* Add #pragma code here */ + #endif +#elif defined (CANIF_STOP_SEC_CONFIG_DATA_UNSPECIFIED) + #ifndef SECTION_STARTED + #error "Section is not started" + #else + #undef SECTION_STARTED + #undef CANIF_STOP_SEC_CONFIG_DATA_UNSPECIFIED + /* Add #pragma code here */ + #endif +#elif defined (CANIF_START_SEC_CONST_UNSPECIFIED) + #ifdef SECTION_STARTED + #error "Section is not stopped" + #else + #define SECTION_STARTED + #undef CANIF_START_SEC_CONST_UNSPECIFIED + /* Add #pragma code here */ + #endif +#elif defined (CANIF_STOP_SEC_CONST_UNSPECIFIED) + #ifndef SECTION_STARTED + #error "Section is not started" + #else + #undef SECTION_STARTED + #undef CANIF_STOP_SEC_CONST_UNSPECIFIED + /* Add #pragma code here */ + #endif +#elif defined (CANIF_START_SEC_PUBLIC_CODE) + #ifdef SECTION_STARTED + #error "Section is not stopped" + #else + #define SECTION_STARTED + #undef CANIF_START_SEC_PUBLIC_CODE + /* Add #pragma code here */ + #endif +#elif defined (CANIF_STOP_SEC_PUBLIC_CODE) + #ifndef SECTION_STARTED + #error "Section is not started" + #else + #undef SECTION_STARTED + #undef CANIF_STOP_SEC_PUBLIC_CODE + /* Add #pragma code here */ + #endif +#elif defined (CANIF_START_SEC_PRIVATE_CODE) + #ifdef SECTION_STARTED + #error "Section is not stopped" + #else + #define SECTION_STARTED + #undef CANIF_START_SEC_PRIVATE_CODE + /* Add #pragma code here */ + #endif +#elif defined (CANIF_STOP_SEC_PRIVATE_CODE) + #ifndef SECTION_STARTED + #error "Section is not started" + #else + #undef SECTION_STARTED + #undef CANIF_STOP_SEC_PRIVATE_CODE + /* Add #pragma code here */ + #endif +#elif defined (CANIF_START_SEC_APPL_CODE) + #ifdef SECTION_STARTED + #error "Section is not stopped" + #else + #define SECTION_STARTED + #undef CANIF_START_SEC_APPL_CODE + /* Add #pragma code here */ + #endif +#elif defined (CANIF_STOP_SEC_APPL_CODE) + #ifndef SECTION_STARTED + #error "Section is not started" + #else + #undef SECTION_STARTED + #undef CANIF_STOP_SEC_APPL_CODE + /* Add #pragma code here */ + #endif +/******************************************************************************* +* CAN Interface END +*******************************************************************************/ + +/******************************************************************************* +* DCM START +*******************************************************************************/ +#elif defined (DCM_START_SEC_VAR_UNSPECIFIED) + #ifdef SECTION_STARTED + #error "Section is not stopped" + #else + #define SECTION_STARTED + #undef DCM_START_SEC_VAR_UNSPECIFIED + /* Add #pragma code here */ + #endif +#elif defined (DCM_STOP_SEC_VAR_UNSPECIFIED) + #ifndef SECTION_STARTED + #error "Section is not started" + #else + #undef SECTION_STARTED + #undef DCM_STOP_SEC_VAR_UNSPECIFIED + /* Add #pragma code here */ + #endif +#elif defined (DCM_START_SEC_CONFIG_DATA_UNSPECIFIED) + #ifdef SECTION_STARTED + #error "Section is not stopped" + #else + #define SECTION_STARTED + #undef DCM_START_SEC_CONFIG_DATA_UNSPECIFIED + /* Add #pragma code here */ + #endif +#elif defined (DCM_STOP_SEC_CONFIG_DATA_UNSPECIFIED) + #ifndef SECTION_STARTED + #error "Section is not started" + #else + #undef SECTION_STARTED + #undef DCM_STOP_SEC_CONFIG_DATA_UNSPECIFIED + /* Add #pragma code here */ + #endif +#elif defined (DCM_START_SEC_CONST_UNSPECIFIED) + #ifdef SECTION_STARTED + #error "Section is not stopped" + #else + #define SECTION_STARTED + #undef DCM_START_SEC_CONST_UNSPECIFIED + /* Add #pragma code here */ + #endif +#elif defined (DCM_STOP_SEC_CONST_UNSPECIFIED) + #ifndef SECTION_STARTED + #error "Section is not started" + #else + #undef SECTION_STARTED + #undef DCM_STOP_SEC_CONST_UNSPECIFIED + /* Add #pragma code here */ + #endif +#elif defined (DCM_START_SEC_PUBLIC_CODE) + #ifdef SECTION_STARTED + #error "Section is not stopped" + #else + #define SECTION_STARTED + #undef DCM_START_SEC_PUBLIC_CODE + /* Add #pragma code here */ + #endif +#elif defined (DCM_STOP_SEC_PUBLIC_CODE) + #ifndef SECTION_STARTED + #error "Section is not started" + #else + #undef SECTION_STARTED + #undef DCM_STOP_SEC_PUBLIC_CODE + /* Add #pragma code here */ + #endif +#elif defined (DCM_START_SEC_PRIVATE_CODE) + #ifdef SECTION_STARTED + #error "Section is not stopped" + #else + #define SECTION_STARTED + #undef DCM_START_SEC_PRIVATE_CODE + /* Add #pragma code here */ + #endif +#elif defined (DCM_STOP_SEC_PRIVATE_CODE) + #ifndef SECTION_STARTED + #error "Section is not started" + #else + #undef SECTION_STARTED + #undef DCM_STOP_SEC_PRIVATE_CODE + /* Add #pragma code here */ + #endif +#elif defined (DCM_START_SEC_APPL_CODE) + #ifdef SECTION_STARTED + #error "Section is not stopped" + #else + #define SECTION_STARTED + #undef DCM_START_SEC_APPL_CODE + /* Add #pragma code here */ + #endif +#elif defined (DCM_STOP_SEC_APPL_CODE) + #ifndef SECTION_STARTED + #error "Section is not started" + #else + #undef SECTION_STARTED + #undef DCM_STOP_SEC_APPL_CODE + /* Add #pragma code here */ + #endif +/******************************************************************************* +* DCM END +*******************************************************************************/ + + + +/******************************************************************************* +* CANTP START +*******************************************************************************/ +#elif defined (CANTP_START_SEC_VAR_UNSPECIFIED) + #ifdef SECTION_STARTED + #error "Section is not stopped" + #else + #define SECTION_STARTED + #undef CANTP_START_SEC_VAR_UNSPECIFIED + /* Add #pragma code here */ + #endif +#elif defined (CANTP_STOP_SEC_VAR_UNSPECIFIED) + #ifndef SECTION_STARTED + #error "Section is not started" + #else + #undef SECTION_STARTED + #undef CANTP_STOP_SEC_VAR_UNSPECIFIED + /* Add #pragma code here */ + #endif +#elif defined (CANTP_START_SEC_CONFIG_DATA_UNSPECIFIED) + #ifdef SECTION_STARTED + #error "Section is not stopped" + #else + #define SECTION_STARTED + #undef CANTP_START_SEC_CONFIG_DATA_UNSPECIFIED + /* Add #pragma code here */ + #endif +#elif defined (CANTP_STOP_SEC_CONFIG_DATA_UNSPECIFIED) + #ifndef SECTION_STARTED + #error "Section is not started" + #else + #undef SECTION_STARTED + #undef CANTP_STOP_SEC_CONFIG_DATA_UNSPECIFIED + /* Add #pragma code here */ + #endif +#elif defined (CANTP_START_SEC_CONST_UNSPECIFIED) + #ifdef SECTION_STARTED + #error "Section is not stopped" + #else + #define SECTION_STARTED + #undef CANTP_START_SEC_CONST_UNSPECIFIED + /* Add #pragma code here */ + #endif +#elif defined (CANTP_STOP_SEC_CONST_UNSPECIFIED) + #ifndef SECTION_STARTED + #error "Section is not started" + #else + #undef SECTION_STARTED + #undef CANTP_STOP_SEC_CONST_UNSPECIFIED + /* Add #pragma code here */ + #endif +#elif defined (CANTP_START_SEC_PUBLIC_CODE) + #ifdef SECTION_STARTED + #error "Section is not stopped" + #else + #define SECTION_STARTED + #undef CANTP_START_SEC_PUBLIC_CODE + /* Add #pragma code here */ + #endif +#elif defined (CANTP_STOP_SEC_PUBLIC_CODE) + #ifndef SECTION_STARTED + #error "Section is not started" + #else + #undef SECTION_STARTED + #undef CANTP_STOP_SEC_PUBLIC_CODE + /* Add #pragma code here */ + #endif +#elif defined (CANTP_START_SEC_PRIVATE_CODE) + #ifdef SECTION_STARTED + #error "Section is not stopped" + #else + #define SECTION_STARTED + #undef CANTP_START_SEC_PRIVATE_CODE + /* Add #pragma code here */ + #endif +#elif defined (CANTP_STOP_SEC_PRIVATE_CODE) + #ifndef SECTION_STARTED + #error "Section is not started" + #else + #undef SECTION_STARTED + #undef CANTP_STOP_SEC_PRIVATE_CODE + /* Add #pragma code here */ + #endif +#elif defined (CANTP_START_SEC_APPL_CODE) + #ifdef SECTION_STARTED + #error "Section is not stopped" + #else + #define SECTION_STARTED + #undef CANTP_START_SEC_APPL_CODE + /* Add #pragma code here */ + #endif +#elif defined (CANTP_STOP_SEC_APPL_CODE) + #ifndef SECTION_STARTED + #error "Section is not started" + #else + #undef SECTION_STARTED + #undef CANTP_STOP_SEC_APPL_CODE + /* Add #pragma code here */ + #endif +/******************************************************************************* +* CANTP END +*******************************************************************************/ + +/******************************************************************************* +* CCP START +*******************************************************************************/ +#elif defined (CCP_START_SEC_VAR_UNSPECIFIED) + #ifdef SECTION_STARTED + #error "Section is not stopped" + #else + #define SECTION_STARTED + #undef CCP_START_SEC_VAR_UNSPECIFIED + /* Add #pragma code here */ + #endif +#elif defined (CCP_STOP_SEC_VAR_UNSPECIFIED) + #ifndef SECTION_STARTED + #error "Section is not started" + #else + #undef SECTION_STARTED + #undef CCP_STOP_SEC_VAR_UNSPECIFIED + /* Add #pragma code here */ + #endif +#elif defined (CCP_START_SEC_CONFIG_DATA_UNSPECIFIED) + #ifdef SECTION_STARTED + #error "Section is not stopped" + #else + #define SECTION_STARTED + #undef CCP_START_SEC_CONFIG_DATA_UNSPECIFIED + /* Add #pragma code here */ + #endif +#elif defined (CCP_STOP_SEC_CONFIG_DATA_UNSPECIFIED) + #ifndef SECTION_STARTED + #error "Section is not started" + #else + #undef SECTION_STARTED + #undef CCP_STOP_SEC_CONFIG_DATA_UNSPECIFIED + /* Add #pragma code here */ + #endif +#elif defined (CCP_START_SEC_CONST_UNSPECIFIED) + #ifdef SECTION_STARTED + #error "Section is not stopped" + #else + #define SECTION_STARTED + #undef CCP_START_SEC_CONST_UNSPECIFIED + /* Add #pragma code here */ + #endif +#elif defined (CCP_STOP_SEC_CONST_UNSPECIFIED) + #ifndef SECTION_STARTED + #error "Section is not started" + #else + #undef SECTION_STARTED + #undef CCP_STOP_SEC_CONST_UNSPECIFIED + /* Add #pragma code here */ + #endif +#elif defined (CCP_START_SEC_PUBLIC_CODE) + #ifdef SECTION_STARTED + #error "Section is not stopped" + #else + #define SECTION_STARTED + #undef CCP_START_SEC_PUBLIC_CODE + /* Add #pragma code here */ + #endif +#elif defined (CCP_STOP_SEC_PUBLIC_CODE) + #ifndef SECTION_STARTED + #error "Section is not started" + #else + #undef SECTION_STARTED + #undef CCP_STOP_SEC_PUBLIC_CODE + /* Add #pragma code here */ + #endif +#elif defined (CCP_START_SEC_PRIVATE_CODE) + #ifdef SECTION_STARTED + #error "Section is not stopped" + #else + #define SECTION_STARTED + #undef CCP_START_SEC_PRIVATE_CODE + /* Add #pragma code here */ + #endif +#elif defined (CCP_STOP_SEC_PRIVATE_CODE) + #ifndef SECTION_STARTED + #error "Section is not started" + #else + #undef SECTION_STARTED + #undef CCP_STOP_SEC_PRIVATE_CODE + /* Add #pragma code here */ + #endif +#elif defined (CCP_START_SEC_ISR_CODE) + #ifdef SECTION_STARTED + #error "Section is not stopped" + #else + #define SECTION_STARTED + #undef CCP_START_SEC_ISR_CODE + /* Add #pragma code here */ + #endif +#elif defined (CCP_STOP_SEC_ISR_CODE) + #ifndef SECTION_STARTED + #error "Section is not started" + #else + #undef SECTION_STARTED + #undef CCP_STOP_SEC_ISR_CODE + /* Add #pragma code here */ + #endif +#elif defined (CCP_START_SEC_APPL_CODE) + #ifdef SECTION_STARTED + #error "Section is not stopped" + #else + #define SECTION_STARTED + #undef CCP_START_SEC_APPL_CODE + /* Add #pragma code here */ + #endif +#elif defined (CCP_STOP_SEC_APPL_CODE) + #ifndef SECTION_STARTED + #error "Section is not started" + #else + #undef SECTION_STARTED + #undef CCP_STOP_SEC_APPL_CODE + /* Add #pragma code here */ + #endif +/******************************************************************************* +* CCP END +*******************************************************************************/ + + +/******************************************************************************* +* COM START +*******************************************************************************/ +#elif defined (COM_START_SEC_VAR_UNSPECIFIED) + #ifdef SECTION_STARTED + #error "Section is not stopped" + #else + #define SECTION_STARTED + #undef COM_START_SEC_VAR_UNSPECIFIED + /* Add #pragma code here */ + #endif +#elif defined (COM_STOP_SEC_VAR_UNSPECIFIED) + #ifndef SECTION_STARTED + #error "Section is not started" + #else + #undef SECTION_STARTED + #undef COM_STOP_SEC_VAR_UNSPECIFIED + /* Add #pragma code here */ + #endif +#elif defined (COM_START_SEC_CONFIG_DATA_UNSPECIFIED) + #ifdef SECTION_STARTED + #error "Section is not stopped" + #else + #define SECTION_STARTED + #undef COM_START_SEC_CONFIG_DATA_UNSPECIFIED + /* Add #pragma code here */ + #endif +#elif defined (COM_STOP_SEC_CONFIG_DATA_UNSPECIFIED) + #ifndef SECTION_STARTED + #error "Section is not started" + #else + #undef SECTION_STARTED + #undef COM_STOP_SEC_CONFIG_DATA_UNSPECIFIED + /* Add #pragma code here */ + #endif +#elif defined (COM_START_SEC_CONST_UNSPECIFIED) + #ifdef SECTION_STARTED + #error "Section is not stopped" + #else + #define SECTION_STARTED + #undef COM_START_SEC_CONST_UNSPECIFIED + /* Add #pragma code here */ + #endif +#elif defined (COM_STOP_SEC_CONST_UNSPECIFIED) + #ifndef SECTION_STARTED + #error "Section is not started" + #else + #undef SECTION_STARTED + #undef COM_STOP_SEC_CONST_UNSPECIFIED + /* Add #pragma code here */ + #endif +#elif defined (COM_START_SEC_PUBLIC_CODE) + #ifdef SECTION_STARTED + #error "Section is not stopped" + #else + #define SECTION_STARTED + #undef COM_START_SEC_PUBLIC_CODE + /* Add #pragma code here */ + #endif +#elif defined (COM_STOP_SEC_PUBLIC_CODE) + #ifndef SECTION_STARTED + #error "Section is not started" + #else + #undef SECTION_STARTED + #undef COM_STOP_SEC_PUBLIC_CODE + /* Add #pragma code here */ + #endif +#elif defined (COM_START_SEC_PRIVATE_CODE) + #ifdef SECTION_STARTED + #error "Section is not stopped" + #else + #define SECTION_STARTED + #undef COM_START_SEC_PRIVATE_CODE + /* Add #pragma code here */ + #endif +#elif defined (COM_STOP_SEC_PRIVATE_CODE) + #ifndef SECTION_STARTED + #error "Section is not started" + #else + #undef SECTION_STARTED + #undef COM_STOP_SEC_PRIVATE_CODE + /* Add #pragma code here */ + #endif +#elif defined (COM_START_SEC_APPL_CODE) + #ifdef SECTION_STARTED + #error "Section is not stopped" + #else + #define SECTION_STARTED + #undef COM_START_SEC_APPL_CODE + /* Add #pragma code here */ + #endif +#elif defined (COM_STOP_SEC_APPL_CODE) + #ifndef SECTION_STARTED + #error "Section is not started" + #else + #undef SECTION_STARTED + #undef COM_STOP_SEC_APPL_CODE + /* Add #pragma code here */ + #endif +/******************************************************************************* +* COM END +*******************************************************************************/ + +/******************************************************************************* +* OSEKNM START +*******************************************************************************/ +#elif defined (OSEKNM_START_SEC_VAR_UNSPECIFIED) + #ifdef SECTION_STARTED + #error "Section is not stopped" + #else + #define SECTION_STARTED + #undef OSEKNM_START_SEC_VAR_UNSPECIFIED + /* Add #pragma code here */ + #endif +#elif defined (OSEKNM_STOP_SEC_VAR_UNSPECIFIED) + #ifndef SECTION_STARTED + #error "Section is not started" + #else + #undef SECTION_STARTED + #undef OSEKNM_STOP_SEC_VAR_UNSPECIFIED + /* Add #pragma code here */ + #endif +#elif defined (OSEKNM_START_SEC_CONFIG_DATA_UNSPECIFIED) + #ifdef SECTION_STARTED + #error "Section is not stopped" + #else + #define SECTION_STARTED + #undef OSEKNM_START_SEC_CONFIG_DATA_UNSPECIFIED + /* Add #pragma code here */ + #endif +#elif defined (OSEKNM_STOP_SEC_CONFIG_DATA_UNSPECIFIED) + #ifndef SECTION_STARTED + #error "Section is not started" + #else + #undef SECTION_STARTED + #undef OSEKNM_STOP_SEC_CONFIG_DATA_UNSPECIFIED + /* Add #pragma code here */ + #endif +#elif defined (OSEKNM_START_SEC_CONST_UNSPECIFIED) + #ifdef SECTION_STARTED + #error "Section is not stopped" + #else + #define SECTION_STARTED + #undef COSEKNM_START_SEC_CONST_UNSPECIFIED + /* Add #pragma code here */ + #endif +#elif defined (OSEKNM_STOP_SEC_CONST_UNSPECIFIED) + #ifndef SECTION_STARTED + #error "Section is not started" + #else + #undef SECTION_STARTED + #undef COSEKNM_STOP_SEC_CONST_UNSPECIFIED + /* Add #pragma code here */ + #endif +#elif defined (OSEKNM_START_SEC_PUBLIC_CODE) + #ifdef SECTION_STARTED + #error "Section is not stopped" + #else + #define SECTION_STARTED + #undef OSEKNM_START_SEC_PUBLIC_CODE + /* Add #pragma code here */ + #endif +#elif defined (OSEKNM_STOP_SEC_PUBLIC_CODE) + #ifndef SECTION_STARTED + #error "Section is not started" + #else + #undef SECTION_STARTED + #undef OSEKNM_STOP_SEC_PUBLIC_CODE + /* Add #pragma code here */ + #endif +#elif defined (OSEKNM_START_SEC_PRIVATE_CODE) + #ifdef SECTION_STARTED + #error "Section is not stopped" + #else + #define SECTION_STARTED + #undef OSEKNM_START_SEC_PRIVATE_CODE + /* Add #pragma code here */ + #endif +#elif defined (OSEKNM_STOP_SEC_PRIVATE_CODE) + #ifndef SECTION_STARTED + #error "Section is not started" + #else + #undef SECTION_STARTED + #undef OSEKNM_STOP_SEC_PRIVATE_CODE + /* Add #pragma code here */ + #endif +#elif defined (OSEKNM_START_SEC_ISR_CODE) + #ifdef SECTION_STARTED + #error "Section is not stopped" + #else + #define SECTION_STARTED + #undef OSEKNM_START_SEC_ISR_CODE + /* Add #pragma code here */ + #endif +#elif defined (OSEKNM_STOP_SEC_ISR_CODE) + #ifndef SECTION_STARTED + #error "Section is not started" + #else + #undef SECTION_STARTED + #undef OSEKNM_STOP_SEC_ISR_CODE + /* Add #pragma code here */ + #endif +#elif defined (OSEKNM_START_SEC_APPL_CODE) + #ifdef SECTION_STARTED + #error "Section is not stopped" + #else + #define SECTION_STARTED + #undef OSEKNM_START_SEC_APPL_CODE + /* Add #pragma code here */ + #endif +#elif defined (OSEKNM_STOP_SEC_APPL_CODE) + #ifndef SECTION_STARTED + #error "Section is not started" + #else + #undef SECTION_STARTED + #undef OSEKNM_STOP_SEC_APPL_CODE + /* Add #pragma code here */ + #endif +/******************************************************************************* +* OSEKNM END +*******************************************************************************/ + +/******************************************************************************* +* CAN Communication Stack END +*******************************************************************************/ + +/******************************************************************************* +* LIN Communication Stack START +*******************************************************************************/ + +/******************************************************************************* +* Lin Driver START +*******************************************************************************/ + +#elif defined (LIN_START_SEC_VAR_UNSPECIFIED) + #ifdef SECTION_STARTED + #error "Section is not stopped" + #else + #define SECTION_STARTED + #undef LIN_START_SEC_VAR_UNSPECIFIED + /* Add #pragma code here */ + #endif +#elif defined (LIN_STOP_SEC_VAR_UNSPECIFIED) + #ifndef SECTION_STARTED + #error "Section is not started" + #else + #undef SECTION_STARTED + #undef LIN_STOP_SEC_VAR_UNSPECIFIED + /* Add #pragma code here */ + #endif +#elif defined (LIN_START_SEC_CONFIG_DATA_UNSPECIFIED) + #ifdef SECTION_STARTED + #error "Section is not stopped" + #else + #define SECTION_STARTED + #undef LIN_START_SEC_CONFIG_DATA_UNSPECIFIED + /* Add #pragma code here */ + #endif +#elif defined (LIN_STOP_SEC_CONFIG_DATA_UNSPECIFIED) + #ifndef SECTION_STARTED + #error "Section is not started" + #else + #undef SECTION_STARTED + #undef LIN_STOP_SEC_CONFIG_DATA_UNSPECIFIED + /* Add #pragma code here */ + #endif +#elif defined (LIN_START_SEC_CONST_UNSPECIFIED) + #ifdef SECTION_STARTED + #error "Section is not stopped" + #else + #define SECTION_STARTED + #undef LIN_START_SEC_CONST_UNSPECIFIED + /* Add #pragma code here */ + #endif +#elif defined (LIN_STOP_SEC_CONST_UNSPECIFIED) + #ifndef SECTION_STARTED + #error "Section is not started" + #else + #undef SECTION_STARTED + #undef LIN_STOP_SEC_CONST_UNSPECIFIED + /* Add #pragma code here */ + #endif +#elif defined (LIN_START_SEC_PUBLIC_CODE) + #ifdef SECTION_STARTED + #error "Section is not stopped" + #else + #define SECTION_STARTED + #undef LIN_START_SEC_PUBLIC_CODE + /* Add #pragma code here */ + #endif +#elif defined (LIN_STOP_SEC_PUBLIC_CODE) + #ifndef SECTION_STARTED + #error "Section is not started" + #else + #undef SECTION_STARTED + #undef LIN_STOP_SEC_PUBLIC_CODE + /* Add #pragma code here */ + #endif +#elif defined (LIN_START_SEC_PRIVATE_CODE) + #ifdef SECTION_STARTED + #error "Section is not stopped" + #else + #define SECTION_STARTED + #undef LIN_START_SEC_PRIVATE_CODE + /* Add #pragma code here */ + #endif +#elif defined (LIN_STOP_SEC_PRIVATE_CODE) + #ifndef SECTION_STARTED + #error "Section is not started" + #else + #undef SECTION_STARTED + #undef LIN_STOP_SEC_PRIVATE_CODE + /* Add #pragma code here */ + #endif +#elif defined (LIN_START_SEC_ISR_CODE) + #ifdef SECTION_STARTED + #error "Section is not stopped" + #else + #define SECTION_STARTED + #undef LIN_START_SEC_ISR_CODE + /* Add #pragma code here */ + #endif +#elif defined (LIN_STOP_SEC_ISR_CODE) + #ifndef SECTION_STARTED + #error "Section is not started" + #else + #undef SECTION_STARTED + #undef LIN_STOP_SEC_ISR_CODE + /* Add #pragma code here */ + #endif +#elif defined (LIN_START_SEC_APPL_CODE) + #ifdef SECTION_STARTED + #error "Section is not stopped" + #else + #define SECTION_STARTED + #undef LIN_START_SEC_APPL_CODE + /* Add #pragma code here */ + #endif +#elif defined (LIN_STOP_SEC_APPL_CODE) + #ifndef SECTION_STARTED + #error "Section is not started" + #else + #undef SECTION_STARTED + #undef LIN_STOP_SEC_APPL_CODE + /* Add #pragma code here */ + #endif +/******************************************************************************* +* Lin Driver END +*******************************************************************************/ + +/******************************************************************************* +* Lin Interface START +*******************************************************************************/ + +#elif defined (LINIF_START_SEC_VAR_UNSPECIFIED) + #ifdef SECTION_STARTED + #error "Section is not stopped" + #else + #define SECTION_STARTED + #undef LINIF_START_SEC_VAR_UNSPECIFIED + /* Add #pragma code here */ + #endif +#elif defined (LINIF_STOP_SEC_VAR_UNSPECIFIED) + #ifndef SECTION_STARTED + #error "Section is not started" + #else + #undef SECTION_STARTED + #undef LINIF_STOP_SEC_VAR_UNSPECIFIED + /* Add #pragma code here */ + #endif +#elif defined (LINIF_START_SEC_CONFIG_DATA_UNSPECIFIED) + #ifdef SECTION_STARTED + #error "Section is not stopped" + #else + #define SECTION_STARTED + #undef LINIF_START_SEC_CONFIG_DATA_UNSPECIFIED + /* Add #pragma code here */ + #endif +#elif defined (LINIF_STOP_SEC_CONFIG_DATA_UNSPECIFIED) + #ifndef SECTION_STARTED + #error "Section is not started" + #else + #undef SECTION_STARTED + #undef LINIF_STOP_SEC_CONFIG_DATA_UNSPECIFIED + /* Add #pragma code here */ + #endif +#elif defined (LINIF_START_SEC_CONST_UNSPECIFIED) + #ifdef SECTION_STARTED + #error "Section is not stopped" + #else + #define SECTION_STARTED + #undef LINIF_START_SEC_CONST_UNSPECIFIED + /* Add #pragma code here */ + #endif +#elif defined (LINIF_STOP_SEC_CONST_UNSPECIFIED) + #ifndef SECTION_STARTED + #error "Section is not started" + #else + #undef SECTION_STARTED + #undef LINIF_STOP_SEC_CONST_UNSPECIFIED + /* Add #pragma code here */ + #endif +#elif defined (LINIF_START_SEC_PUBLIC_CODE) + #ifdef SECTION_STARTED + #error "Section is not stopped" + #else + #define SECTION_STARTED + #undef LINIF_START_SEC_PUBLIC_CODE + /* Add #pragma code here */ + #endif +#elif defined (LINIF_STOP_SEC_PUBLIC_CODE) + #ifndef SECTION_STARTED + #error "Section is not started" + #else + #undef SECTION_STARTED + #undef LINIF_STOP_SEC_PUBLIC_CODE + /* Add #pragma code here */ + #endif +#elif defined (LINIF_START_SEC_PRIVATE_CODE) + #ifdef SECTION_STARTED + #error "Section is not stopped" + #else + #define SECTION_STARTED + #undef LINIF_START_SEC_PRIVATE_CODE + /* Add #pragma code here */ + #endif +#elif defined (LINIF_STOP_SEC_PRIVATE_CODE) + #ifndef SECTION_STARTED + #error "Section is not started" + #else + #undef SECTION_STARTED + #undef LINIF_STOP_SEC_PRIVATE_CODE + /* Add #pragma code here */ + #endif +#elif defined (LINIF_START_SEC_APPL_CODE) + #ifdef SECTION_STARTED + #error "Section is not stopped" + #else + #define SECTION_STARTED + #undef LINIF_START_SEC_APPL_CODE + /* Add #pragma code here */ + #endif +#elif defined (LINIF_STOP_SEC_APPL_CODE) + #ifndef SECTION_STARTED + #error "Section is not started" + #else + #undef SECTION_STARTED + #undef LINIF_STOP_SEC_APPL_CODE + /* Add #pragma code here */ + #endif +/******************************************************************************* +* Lin Interface END +*******************************************************************************/ + + +/******************************************************************************* +* LIN Communication Stack END +*******************************************************************************/ + + + +#endif/* START_WITH_IF */ diff --git a/code_app_out/Source/ComStack/Common/Platform_Types.h b/code_app_out/Source/ComStack/Common/Platform_Types.h new file mode 100644 index 0000000..3a2514b --- /dev/null +++ b/code_app_out/Source/ComStack/Common/Platform_Types.h @@ -0,0 +1,80 @@ +/** + ****************************************************************************** + * @file + * @author + * @version + * @date + * @brief + * @function List: + ****************************************************************************** + * @attention + * + * + *

© COPYRIGHT 2021

+ ****************************************************************************** + * @History: + * @Author: + * @Data: + * @Version: +*/ + +#ifndef _PLATFORM_TYPES_H_ +#define _PLATFORM_TYPES_H_ + +#include "common_types.h" + +/******************************************************************************* +* Includes +*******************************************************************************/ + +/******************************************************************************* +* Macro +*******************************************************************************/ +#define CPU_TYPE_8 (8) +#define CPU_TYPE_16 (16) +#define CPU_TYPE_32 (32) + +#define MSB_FIRST (0) /* big endian bit ordering */ +#define LSB_FIRST (1) /* little endian bit ordering */ + +#define HIGH_BYTE_FIRST (0) /* big endian byte ordering */ +#define LOW_BYTE_FIRST (1) /* little endian byte ordering */ + +#if 0 +#ifndef TRUE + #define TRUE (1) +#endif + +#ifndef FALSE + #define FALSE (0) +#endif +#endif + +#define CPU_TYPE CPU_TYPE_32 +#define CPU_BIT_ORDER LSB_FIRST +#define CPU_BYTE_ORDER LOW_BYTE_FIRST + +/******************************************************************************* +* Typedef +*******************************************************************************/ +typedef unsigned char boolean; + +typedef signed char sint8; +typedef unsigned char uint8; +typedef signed short sint16; +typedef unsigned short uint16; +typedef signed long sint32; +typedef unsigned long uint32; + +typedef signed char sint8_least; +typedef unsigned char uint8_least; +typedef signed short sint16_least; +typedef unsigned short uint16_least; +typedef signed long sint32_least; +typedef unsigned long uint32_least; + +typedef float float32; +typedef double float64; + +#endif /* _PLATFORM_TYPES_H_ */ + diff --git a/code_app_out/Source/ComStack/Common/SchM_CanNm.h b/code_app_out/Source/ComStack/Common/SchM_CanNm.h new file mode 100644 index 0000000..23d4750 --- /dev/null +++ b/code_app_out/Source/ComStack/Common/SchM_CanNm.h @@ -0,0 +1,49 @@ +/* BEGIN_FILE_HDR +******************************************************************************** +* NOTICE +* This software is the property of HiRain Technologies. Any information +* contained in this doc should not be reproduced, or used, or disclosed +* without the written authorization from HiRain Technologies. +******************************************************************************** +* File Name : SchM_CanNm.h +******************************************************************************** +* Project/Product : Common +* Title : SchM_CanNm.h +* Author : ning.chen +******************************************************************************** +* Description : AUTOSAR Standard types file +* +******************************************************************************** +* Limitations : None +* +******************************************************************************** +* +******************************************************************************** +* Revision History: +* +* Version Date Initials CR# Descriptions +* --------- ---------- ------------ ---------- --------------- +* 01.00.00 13/06/2013 ning.chen N/A Original +* 01.00.01 17/07/2013 ning.chen N/A DPN_COMMON_130717_01 +* 01.00.02 15/08/2013 ning.chen N/A D10_COMMON01_130815_01 +* 01.00.03 08/01/2014 ning.chen N/A D10_COMMON01_140108_01 +******************************************************************************** +* END_FILE_HDR*/ + +#ifndef _SCHM_CANNM_H_ +#define _SCHM_CANNM_H_ + +/******************************************************************************* +* Macro +*******************************************************************************/ +#define SchM_Enter_CanNm_CANNM_EXCLUSIVE_AREA_0() +#define SchM_Exit_CanNm_CANNM_EXCLUSIVE_AREA_0() +#define SchM_Enter_CanNm_CANNM_EXCLUSIVE_AREA_1() +#define SchM_Exit_CanNm_CANNM_EXCLUSIVE_AREA_1() +#define SchM_Enter_CanNm_CANNM_EXCLUSIVE_AREA_2() +#define SchM_Exit_CanNm_CANNM_EXCLUSIVE_AREA_2() +#define SchM_Enter_CanNm_CANNM_EXCLUSIVE_AREA_3() +#define SchM_Exit_CanNm_CANNM_EXCLUSIVE_AREA_3() + + +#endif /* _SCHM_CANNM_H_ */ diff --git a/code_app_out/Source/ComStack/Common/Std_Types.h b/code_app_out/Source/ComStack/Common/Std_Types.h new file mode 100644 index 0000000..8b43acc --- /dev/null +++ b/code_app_out/Source/ComStack/Common/Std_Types.h @@ -0,0 +1,87 @@ +/** + ****************************************************************************** + * @file + * @author + * @version + * @date + * @brief + * @function List: + ****************************************************************************** + * @attention + * + * + *

© COPYRIGHT 2021

+ ****************************************************************************** + * @History: + * @Author: + * @Data: + * @Version: +*/ + +#ifndef _STD_TYPES_H_ +#define _STD_TYPES_H_ + +/******************************************************************************* +* Includes +*******************************************************************************/ +#include "Platform_Types.h" +#include "Compiler.h" + +/******************************************************************************* +* Macro +*******************************************************************************/ +#define STD_HIGH (1) +#define STD_LOW (0) + +#define STD_ACTIVE (1) +#define STD_IDLE (0) + +#define STD_ON (1) +#define STD_OFF (0) + +/* This typedef has been addedf or OSEK compliance */ +#ifndef STATUSTYPEDEFINED + #define STATUSTYPEDEFINED + #define E_OK (0) + /* OSEK compliance */ + typedef unsigned char StatusType; +#endif + +#define E_NOT_OK (1) + +/******************************************************************************* +* Typedef +*******************************************************************************/ +typedef uint8 Std_ReturnType; + +typedef struct +{ + uint16 vendorID; + uint16 moduleID; + uint8 instanceID; + uint8 sw_major_version; + uint8 sw_minor_version; + uint8 sw_patch_version; +}Std_VersionInfoType; + +/******************************************************************************* +* Specification +*******************************************************************************/ + +#define STD_CONFIG_VARIANTS_PRECOMPILE (1) +#define STD_CONFIG_VARIANTS_LINKTIME (2) +#define STD_CONFIG_VARIANTS_POSTBUILD (3) + +/* Vender ID */ +#define STD_HIRAIN_VENDOR_ID ((uint16)0x0056U) + +/* Module ID */ + + +/* Init State */ +typedef enum +{ + STD_UNINITIALIZED = 0, + STD_INITIALIZED = 1 +}Std_InitStateType; +#endif /* _STD_TYPES_H_ */ diff --git a/code_app_out/Source/ComStack/Dcm/Dcm.h b/code_app_out/Source/ComStack/Dcm/Dcm.h new file mode 100644 index 0000000..f96ac71 --- /dev/null +++ b/code_app_out/Source/ComStack/Dcm/Dcm.h @@ -0,0 +1,342 @@ +/** + ****************************************************************************** + * @file + * @author + * @version + * @date + * @brief + * @function List: + ****************************************************************************** + * @attention + * + * + *

© COPYRIGHT 2021

+ ****************************************************************************** + * @History: + * @Author: + * @Data: + * @Version: +*/ + +#ifndef _DCM_H_ +#define _DCM_H_ + +/******************************************************************************* +* Include files +*******************************************************************************/ +#include "Dcm_Types.h" +#include "Dcm_Cfg.h" + +#if(ISO_15031_5 == STD_ON) +#include "OBD_Cfg.h" +#include "OBD.h" +#endif + +/******************************************************************************* +* Local Macro and Tyedef +*******************************************************************************/ +/* PduIdType ---這幾個和TP層的定義一樣 見 PduRCanTpDcmTxID */ +#define UDS_PHYSICAL_ON_CAN_RX (0u) +#define UDS_FUNCTIONAL_ON_CAN_RX (1u) +#define UDS_ON_CAN_TX (0u) + +/* Diagnostic State Machine */ +#define DIAG_IDLE ((uint8)0x01) +#define DIAG_UDS_INDICATION ((uint8)0x02) //接收到的指示 +#define DIAG_UDS_PROCESSING ((uint8)0x04) +#define DIAG_UDS_RCRP ((uint8)0x08) //78負響應 +#define DIAG_UDS_RCRP_DONE ((uint8)0x10) //DsdInternal_ProcessingDone 用到 +#define DIAG_UDS_PERIODIC_TX ((uint8)0x20) //周期性發送 + +/* For 0x22 --- 客戶端請求讀取由數據標識符識別的某個記錄的當前值 即did的讀取*/ +typedef struct +{ + uint16 Did; + uint16 DidPosition; +}DidlistType; + +/* For 0x2A ---請求周期性傳輸服務器中的數據----本項目不開*/ +#if(DCM_SERVICE_2A_ENABLED == STD_ON) +typedef struct +{ + uint8 Did; + uint16 DidPosition; +}PeriodicDidlistType; +#endif + +/* For 0x2C 動態定義由22服務讀取的數據標識符---本項目不開*/ +#if(DCM_SERVICE_2C_ENABLED == STD_ON) +/* 0x00: byDid, 0x01:ByAddress */ +typedef struct +{ + uint8 ByDidOrAddress; + uint8 DidOrAddressCounter; +}DynamicalDidDefinedSequence; + +typedef struct +{ + uint16 SourceDid; + uint16 SourceDidPosition; + uint16 PositionInSourceDataRecord; + uint16 MemorySize; +}DefinedByDid; + +typedef struct +{ + uint32 MemoryAddress; + uint8 AddressSegment; + uint32 MemorySize; + +}DefinedByAddress; + +typedef struct +{ + uint16 DynamicalDid; + /* Posicon in gDcmDsdSubService_2C */ + uint8 DynamicalDidPosion; + uint8 DefinedTime; + DynamicalDidDefinedSequence Sequence[16]; + /* size should be configurable */ + DefinedByDid ByDid[16]; + uint8 SourceDidCounter; + /* size should be configurable */ + DefinedByAddress ByAddress[16]; + uint8 AddessCounter; + uint32 TotalDataSize; +}DynamicalDidRelatedInfo; +#endif + +/******************************************************************************* +* Global variables(Scope:global) +*******************************************************************************/ +#define DCM_START_SEC_VAR_UNSPECIFIED +#include "MemMap.h" + +extern VAR(Dcm_MsgItemType, DCM_NOINIT_DATA) + gUDS_Physical_DiagBuffer[UDS_PHYS_BUFFER_SIZE]; //物理尋址 有128字節 +extern VAR(Dcm_MsgItemType, DCM_NOINIT_DATA) + gUDS_Functional_DiagBuffer[UDS_FUNC_BUFFER_SIZE]; //而功能尋址，就8字節 + +#if(ISO_15031_5_MultiChannel == STD_ON) +extern VAR(Dcm_MsgItemType, DCM_NOINIT_DATA) + gOBD_Physical_DiagBuffer[OBD_PHYS_BUFFER_SIZE]; +extern VAR(Dcm_MsgItemType, DCM_NOINIT_DATA) + gOBD_Functional_DiagBuffer[OBD_FUNC_BUFFER_SIZE]; +extern VAR(DcmDslBufferSize, DCM_NOINIT_DATA) gDcmDslAvailableBufferSize[4]; +#else +extern VAR(DcmDslBufferSize, DCM_NOINIT_DATA) gDcmDslAvailableBufferSize[2]; +#endif + +extern VAR(Dcm_MsgItemType, DCM_NOINIT_DATA) + gNegativeResponseBuffer[NEG_RESP_BUFFER_SIZE]; //負响應，主要3字節; +extern VAR(Dcm_MsgItemType, DCM_NOINIT_DATA) + gNegativeResponseBufferForRRCP[NEG_RESP_BUFFER_SIZE]; + +#if(DCM_SERVICE_2A_ENABLED == STD_ON) +extern VAR(Dcm_MsgItemType, DCM_NOINIT_DATA) + gPeriodicResponseBuffer[PERODIC_RESP_BUFFER_SIZE]; +#endif + +#if(DCM_SERVICE_86_ENABLED == STD_ON) +extern VAR(Dcm_MsgItemType, DCM_NOINIT_DATA) + gResponseOnEventBuffer[EVENT_RESP_BUFFER_SIZE]; +#endif + +extern VAR(uint16, DCM_NOINIT_DATA) gResponseLength; + +#if(DCM_SERVICE_27_ENABLED == STD_ON) +extern Dcm_SecLevelType gSecLevelType; +#endif + +extern VAR(Dcm_SecLevelType, DCM_NOINIT_DATA) gSesCtrlType; +extern VAR(Dcm_ProtocolType, DCM_NOINIT_DATA) gActiveProtocol; +extern VAR(Dcm_MsgContextType, DCM_NOINIT_DATA) gMsgContextType; +extern VAR(VoidEcucSubFunctionNameDef, DCM_NOINIT_DATA) + gSubFunctionHandler; +extern VAR(EcucFunctionNameDef, DCM_NOINIT_DATA) gFunctionHandler; +extern VAR(Dcm_NegativeResponseCodeType, DCM_NOINIT_DATA) + gNegativeResponseCode; +extern VAR(uint8, DCM_NOINIT_DATA) gDiagState; +extern VAR(uint32, DCM_NOINIT_DATA) gP2ServerTimer; +extern VAR(uint32, DCM_NOINIT_DATA) gS3ServerTimer; +extern VAR(uint8, DCM_NOINIT_DATA) gP2ServerTimerStartFlag; +extern VAR(uint8, DCM_NOINIT_DATA) gS3ServerTimerStartFlag; +extern VAR(uint8, DCM_NOINIT_DATA) gCurrentSecurityAccessRequestLevel; +extern VAR(uint8, DCM_NOINIT_DATA) gSecurityDelayTimeOnBootFlag; + +#if(DCM_SERVICE_27_ENABLED == STD_ON) +extern VAR(uint32, DCM_NOINIT_DATA) + gSecurityAcessDelayTimeOnBoot[KIND_OF_SECURITY_LEVEL]; +extern VAR(uint8, DCM_NOINIT_DATA) + gSecurityAcessAttempNumber[KIND_OF_SECURITY_LEVEL]; +extern VAR(uint8, DCM_NOINIT_DATA) + gSecurityAcessAttempNumberExceeded[KIND_OF_SECURITY_LEVEL]; +extern VAR(uint32, DCM_NOINIT_DATA) + gSecurityAcessDelayTime[KIND_OF_SECURITY_LEVEL]; +extern VAR(uint8, DCM_NOINIT_DATA) + gSecurityAcessSequence[KIND_OF_SECURITY_LEVEL]; +#endif + +#if(DCM_SERVICE_2A_ENABLED == STD_ON) +extern VAR(uint32, DCM_NOINIT_DATA) + gPeriodicResponseRate[NUMBER_OF_PERIODIC_DID]; //DCM_SERVICE_27_SECURITY_MAP_LOCK +extern VAR(uint32, DCM_NOINIT_DATA) + gPeriodicResponseTimer[NUMBER_OF_PERIODIC_DID]; +extern VAR(uint8, DCM_NOINIT_DATA) PeriodicDidCounter; +#endif + +#if(DCM_SERVICE_2C_ENABLED == STD_ON) +extern VAR(DynamicalDidRelatedInfo, DCM_NOINIT_DATA) + gDynamicalDidRelatedInfo[NUMBER_OF_DYN_DID]; +extern VAR(uint8, DCM_NOINIT_DATA) gDynamicalDidCounter; +#endif + +#define DCM_STOP_SEC_VAR_UNSPECIFIED +#include "MemMap.h" + +/******************************************************************************* +* Macro function +*******************************************************************************/ +#define Set_SecLevel(x) (gSecLevelType = (x)) +#define Set_SesCtrl(x) (gSesCtrlType = (x)) +#define Get_SesCtrl(x) (gSesCtrlType) +#define Set_ActiveProtocol(x) (gActiveProtocol = (x)) +#define Clr_ActiveProtocol() (gActiveProtocol = (0)) +#define Set_PduId(x) (gMsgContextType.dcmRxPduId = (x)) +#define Reset_PduId() (gMsgContextType.dcmRxPduId = DCM_INVALID_HANDLE_OR_ID) +#define Set_P2_Server_Timer(x) (gP2ServerTimer = (uint32)((x)/DCM_TASK_TIME)) +#define Dec_P2_Server_Timer() (gP2ServerTimer--) +#define Clr_P2_Server_Timer() (gP2ServerTimer = 0) +#define Set_S3_Server_Timer(x) (gS3ServerTimer = (uint32)((x)/DCM_TASK_TIME)) +#define Dec_S3_Server_Timer() (gS3ServerTimer--) +#define Clr_S3_Server_Timer() (gS3ServerTimer = 0) +#define Set_DiagState(x) (gDiagState |= (x)) +#define Clr_DiagState(x) (gDiagState &= (~(x))) +#define Reset_DiagState() (gDiagState = DIAG_IDLE) +#define GetSuppressPosResponseBit() (gMsgContextType.msgAddInfo.suppressPosResponse) +#define ClrSuppressPosResponseBit() (gMsgContextType.msgAddInfo.suppressPosResponse = 0) +#define SetNegativeResponseCode(x) (gNegativeResponseCode = (x)) +#define ClrNegativeResponseCode() (gNegativeResponseCode = 0) +#define Dec_Max_Number_Of_RCRRP() (gMaxNumberOfRCRRP--) +#define Reset_Max_Number_Of_RCRRP() (gMaxNumberOfRCRRP = DCM_NUM_MAX_RESPPEND) +#define Make16Bit(HiByte,LoByte) ((uint16)((((uint16)(HiByte)) << 8)|((uint16)(LoByte)))) +#define Make32Bit(HiByte,MiByte,LoByte) ((uint32)((((uint32)(HiByte)) << 16)|((uint32)(MiByte) << 8)|((uint32)(LoByte)))) + +/******************************************************************************* +* extern Function +*******************************************************************************/ +/* Defined in AUTOSAR */ +#define DCM_START_SEC_PUBLIC_CODE +#include "MemMap.h" + +extern FUNC(void,DCM_PUBLIC_CODE) Dcm_Init(P2VAR(Dcm_ConfigType,AUTOMATIC,DCM_APPL_DATA) ConfigPtr); +extern FUNC(void,DCM_PUBLIC_CODE) Dsd_InteralInit(void); +extern FUNC(void,DCM_PUBLIC_CODE) Dcm_GetVersionInfo(P2VAR(Std_VersionInfoType,AUTOMATIC,DCM_APPL_DATA) versionInfo); +extern FUNC(Std_ReturnType,DCM_PUBLIC_CODE) Dcm_GetSecurityLevel(P2VAR(Dcm_SecLevelType,AUTOMATIC,DCM_APPL_DATA) SecLevel); +extern FUNC(Std_ReturnType,DCM_PUBLIC_CODE) Dcm_GetSesCtrlType(P2VAR(Dcm_SesCtrlType,AUTOMATIC,DCM_APPL_DATA) SesCtrlType); +extern FUNC(Std_ReturnType,DCM_PUBLIC_CODE) Dcm_GetActiveProtocol(P2VAR(Dcm_ProtocolType,AUTOMATIC,DCM_APPL_DATA) ActiveProtocol); +extern FUNC(void,DCM_PUBLIC_CODE) Dcm_MainFunction(void); + +#if(DCM_DSL_DIAG_RESP_FORCE_RESP_PEND_EN == STD_ON) +extern FUNC(void,DCM_PUBLIC_CODE) DslInternal_RCRResponsePending(uint8 ForceRCR_RP); +#else +STATIC FUNC(void,DCM_PRIVATE_CODE) DslInternal_RCRResponsePending(uint8 ForceRCR_RP); +#endif + +extern FUNC(void,DCM_PUBLIC_CODE) DsdInternal_ProcessingDone(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +extern FUNC(void,DCM_PUBLIC_CODE) DsdInternal_ProcessingDoneNoResponse(void); + +#if(DCM_SERVICE_22_COMBINED_DID == STD_ON) +extern FUNC(void,DCM_PUBLIC_CODE) DsdInternal_DidProcessingDone(void); +#endif + +extern void DsdInternal_SetNegResponse(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext,uint8 ErrorCode); +/* UDS diagnostic service */ +#if(DCM_SERVICE_10_ENABLED == STD_ON) +extern FUNC(void,DCM_PUBLIC_CODE) DspInternal_Uds_DiagnosticSessionControl(void); +extern FUNC(void,DCM_PUBLIC_CODE) App_DefaultPost(Std_ReturnType Result); +#endif + +extern uint8 Dsd_GetSessionMapId(Dcm_SesCtrlType DcmSessionType) ; + +#if(DCM_SERVICE_11_ENABLED == STD_ON) +extern FUNC(void,DCM_PUBLIC_CODE) DspInternal_Uds_EcuReset(void); +#endif + +#if(DCM_SERVICE_14_ENABLED == STD_ON) +extern FUNC(void,DCM_PUBLIC_CODE) DspInternal_Uds_ClearDiagnosticInformation(void); +extern FUNC(void,DCM_PUBLIC_CODE) App_ClearDiagnosticInformation(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +#endif + +#if(DCM_SERVICE_19_ENABLED == STD_ON) +extern FUNC(void,DCM_PUBLIC_CODE) DspInternal_Uds_ReadDTCInformation(void); +#endif + +#if(DCM_SERVICE_22_ENABLED == STD_ON) +extern FUNC(void,DCM_PUBLIC_CODE) DspInternal_Uds_ReadDataByIdentifier(void); +#endif + +#if(DCM_SERVICE_23_ENABLED == STD_ON) +extern FUNC(void,DCM_PUBLIC_CODE) DspInternal_Uds_ReadMemoryByAddress(void); +#endif + +#if(DCM_SERVICE_24_ENABLED == STD_ON) +extern FUNC(void,DCM_PUBLIC_CODE) DspInternal_Uds_ReadScalingDataByIdentifier(void); +#endif + +#if(DCM_SERVICE_27_ENABLED == STD_ON) +extern FUNC(void,DCM_PUBLIC_CODE) DspInternal_Uds_SecurityAccess(void); +extern void DsdInternal_SecurityAccessKeyCompared(uint8 level, DcmDspSecurityAccessKey keyIsValid); +#endif + +#if(DCM_SERVICE_28_ENABLED == STD_ON) +extern FUNC(void,DCM_PUBLIC_CODE) DspInternal_Uds_CommunicationControl(void); +#endif + +#if(DCM_SERVICE_2A_ENABLED == STD_ON) +extern FUNC(void,DCM_PUBLIC_CODE) DspInternal_Uds_ReadDataByPeriodicIdentifier(void); +#endif + +#if(DCM_SERVICE_2C_ENABLED == STD_ON) +extern FUNC(void,DCM_PUBLIC_CODE) DspInternal_Uds_DynamicallyDefinedDataIdentifier(void); +#endif + +#if(DCM_SERVICE_2E_ENABLED == STD_ON) +extern FUNC(void,DCM_PUBLIC_CODE) DspInternal_Uds_WriteDataByIdentifier(void); +#endif + +#if(DCM_SERVICE_2F_ENABLED == STD_ON) +extern FUNC(void,DCM_PUBLIC_CODE) DspInternal_Uds_InputOutputControlByIdentifier(void); +#endif + +#if(DCM_SERVICE_31_ENABLED == STD_ON) +extern FUNC(void,DCM_PUBLIC_CODE) DspInternal_Uds_RoutineControl(void); +extern FUNC(void,DCM_PUBLIC_CODE) DsdInternal_RoutineStarted(void); +extern FUNC(void,DCM_PUBLIC_CODE) DsdInternal_RoutineStopped(void); +extern FUNC(void,DCM_PUBLIC_CODE) DsdInternal_RequestRoutineResults(void); +#endif + +#if(DCM_SERVICE_3D_ENABLED == STD_ON) +extern FUNC(void,DCM_PUBLIC_CODE) DspInternal_Uds_WriteMemoryByAddress(void); +#endif + +#if(DCM_SERVICE_3E_ENABLED == STD_ON) +extern FUNC(void,DCM_PUBLIC_CODE) DspInternal_Uds_TesterPresent(void); +#endif + +#if(DCM_SERVICE_85_ENABLED == STD_ON) +extern FUNC(void,DCM_PUBLIC_CODE) DspInternal_Uds_ControlDTCSetting(void); +#endif + +#if(DCM_SERVICE_86_ENABLED == STD_ON) +extern FUNC(void,DCM_PUBLIC_CODE) DspInternal_Uds_ResponseOnEvent(void); +#endif + +#if(DCM_COSTOMIZED_SERVCIE_SUPPORTED == STD_ON) +extern FUNC(void,DCM_PUBLIC_CODE) App_CustomizedServcie(P2VAR(Dcm_MsgContextType,AUTOMATIC,DCM_APPL_DATA) pMsgContext); +#endif + +#define DCM_STOP_SEC_PUBLIC_CODE +#include "MemMap.h" + +#endif diff --git a/code_app_out/Source/ComStack/Dcm/Dcm_Cbk.h b/code_app_out/Source/ComStack/Dcm/Dcm_Cbk.h new file mode 100644 index 0000000..9c9e762 --- /dev/null +++ b/code_app_out/Source/ComStack/Dcm/Dcm_Cbk.h @@ -0,0 +1,72 @@ +/** + ****************************************************************************** + * @file + * @author + * @version + * @date + * @brief + * @function List: + ****************************************************************************** + * @attention + * + * + *

© COPYRIGHT 2021

+ ****************************************************************************** + * @History: + * @Author: + * @Data: + * @Version: +*/ + +#ifndef _DCM_CBK_H_ +#define _DCM_CBK_H_ + +/******************************************************************************* +* Include files +********************************************************************************/ +#include "Dcm.h" + +/******************************************************************************* +* Global Function Prototype +********************************************************************************/ +#define DCM_START_SEC_PUBLIC_CODE +#include "MemMap.h" + +extern FUNC(BufReq_ReturnType,DCM_PUBLIC_CODE) Dcm_StartOfReception +( + PduIdType DcmRxPduId, + PduLengthType TpSduLength, + P2VAR(PduLengthType,AUTOMATIC,DCM_APPL_DATA) Length +); + +extern FUNC(BufReq_ReturnType,DCM_PUBLIC_CODE) Dcm_CopyRxData +( + PduIdType DcmRxPduId, + P2VAR(PduInfoType,AUTOMATIC,DCM_APPL_DATA) PduInfoPointer, + P2VAR(PduLengthType,AUTOMATIC,DCM_APPL_DATA) RxBufferSizePtr +); + +extern FUNC(void,DCM_PUBLIC_CODE) Dcm_RxIndication +( + PduIdType DcmRxPduId, + NotifResultType Result +); + +extern FUNC(BufReq_ReturnType,DCM_PUBLIC_CODE) Dcm_CopyTxData +( + PduIdType DcmTxPduId, + P2VAR(PduInfoType,AUTOMATIC,DCM_APPL_DATA) PduInfoPtr, + P2VAR(RetryInfoType,AUTOMATIC,DCM_APPL_DATA) RetryInfoPtr, + P2VAR(PduLengthType,AUTOMATIC,DCM_APPL_DATA) TxDataCntPtr +); + +extern FUNC(void,DCM_PUBLIC_CODE) Dcm_TxConfirmation +( + PduIdType DcmTxPduId, + NotifResultType Result +); + +#define DCM_STOP_SEC_PUBLIC_CODE +#include "MemMap.h" + +#endif diff --git a/code_app_out/Source/ComStack/Dcm/Dcm_Types.h b/code_app_out/Source/ComStack/Dcm/Dcm_Types.h new file mode 100644 index 0000000..3e0b1a8 --- /dev/null +++ b/code_app_out/Source/ComStack/Dcm/Dcm_Types.h @@ -0,0 +1,238 @@ +/** + ****************************************************************************** + * @file + * @author + * @version + * @date + * @brief + * @function List: + ****************************************************************************** + * @attention + * + * + *

© COPYRIGHT 2021

+ ****************************************************************************** + * @History: + * @Author: + * @Data: + * @Version: +*/ + +#ifndef _DCM_TYPES_H_ +#define _DCM_TYPES_H_ + +/************************************************************************************************** +* Include files +**************************************************************************************************/ +#include "Platform_Types.h" +#include "ComStack_Types.h" + +/************************************************************************************************** +* Macros and Tyedef +**************************************************************************************************/ +typedef uint8 Dcm_StatusType; +typedef uint8 Dcm_SecLevelType; +typedef uint8 Dcm_SesCtrlType; +typedef uint8 Dcm_ProtocolType; +typedef uint8 Dcm_NegativeResponseCodeType; +typedef uint8 Dcm_CommunicationModeType; +typedef struct +{ + Dcm_ProtocolType protocolType; +}Dcm_ConfigType; /* Need change */ +typedef uint8 Dcm_ConfirmationStatusType; +typedef uint8 Dcm_OpStatusType; +typedef uint8 Dcm_ReturnReadMemoryType; +typedef uint8 Dcm_ReturnWriteMemoryType; +typedef uint8 Dcm_RoeStateType; +typedef uint8 Dcm_EcuStartModeType; +typedef struct +{ + uint8 ProtocolId; + uint8 TesterSourceAddr; + uint8 Sid; + uint8 SubFncId; + Dcm_EcuStartModeType EcuStartMode; +}Dcm_ProgConditionsType; +typedef uint8 Dcm_MsgItemType; +typedef uint8 CurrentSidMapType; +typedef uint8 CurrentOBDSidMapType; +typedef Dcm_MsgItemType *Dcm_MsgType; +typedef uint16 Dcm_DspMaxDidToReadType; +typedef uint32 Dcm_MsgLenType; +typedef uint32 Dcm_CurentDcmDsdServiceTableSizeType; +typedef uint32 Dcm_CurentDcmOBDServiceTableSizeType; +typedef uint32 Dcm_DspNonDefaultSessionS3ServerType; +typedef uint8 Dcm_IdContextType; /* Need change */ +typedef struct +{ + uint8 reqType; /* 0=physical request; 1=functional request */ + uint8 suppressPosResponse;/* 0=no; 1=yes;*/ + uint8 cancelOperation;/* 0=no;1=cancel pending operation */ +}Dcm_MsgAddInfoType; + +typedef struct +{ + Dcm_MsgType reqData; + Dcm_MsgLenType reqDataLen; + Dcm_MsgType resData; + Dcm_MsgLenType resDataLen; + Dcm_MsgAddInfoType msgAddInfo; + Dcm_MsgLenType resMaxDataLen; + Dcm_IdContextType idContext; + PduIdType dcmRxPduId; +}Dcm_MsgContextType; +typedef uint8 Dcm_ResetModeType; + +typedef enum +{ + DCM_UNINITIALIZED = 0, + DCM_INITIALIZED = 1 +}DCM_InitType; + +/* Dcm_StatusType */ +#define DCM_E_OK (0x00u) +#define DCM_E_COMPARE_KEY_FAILED (0x01u) +#define DCM_E_TI_PREPARE_LIMITS (0x02u) +#define DCM_E_TI_PREPARE_INCONSTENT (0x03u) +#define DCM_E_SESSION_NOT_ALLOWED (0x04u) +#define DCM_E_PROTOCOL_NOT_ALLOWED (0x05u) +#define DCM_E_ROE_NOT_ACCEPTED (0x06u) +#define DCM_E_PERIODICID_NOT_ACCEPTED (0x07u) +#define DCM_E_REQUEST_NOT_ACCEPTED (0x08u) +#define DCM_E_REQUEST_ENV_NOK (0x09u) +/* Dcm_ProtocolType */ +#define DCM_OBD_ON_CAN (0x00u) +#define DCM_OBD_ON_FLEXRAY (0x01u) +#define DCM_OBD_ON_IP (0x02u) +#define DCM_UDS_ON_CAN (0x03u) +#define DCM_UDS_ON_FLEXRAY (0x04u) +#define DCM_UDS_ON_IP (0x05u) +#define DCM_ROE_ON_CAN (0x06u) +#define DCM_ROE_ON_FLEXRAY (0x07u) +#define DCM_ROE_ON_IP (0x08u) +#define DCM_PERIODICTRANS_ON_CAN (0x09u) +#define DCM_PERIODICTRANS_ON_FLEXRAY (0x0Au) +#define DCM_PERIODICTRANS_ON_IP (0x0Bu) +/* Dcm_SesCtrlType */ +#define DCM_DEFAULT_SESSION (0x01u) +#define DCM_PROGRAMMING_SESSION (0x02u) +#define DCM_EXTENDED_DIAGNOSTIC_SESSION (0x03u) +#define DCM_SAFETY_SYSTEM_DIAGNOSTIC_SESSION (0x04u) +/* Dcm_SessionType*/ +#define DCM_SESSION_DEFAULT (0x01u) +#define DCM_SESSION_PROGRAMMING (0x02u) +#define DCM_SESSION_EXTENDED_DIAGNOSTIC (0x04u) +#define DCM_SESSION_USERDEFINED1 (0x08u) +#define DCM_SESSION_USERDEFINED2 (0x10u) +#define DCM_SESSION_USERDEFINED3 (0x20u) +#define DCM_SESSION_USERDEFINED4 (0x40u) +#define DCM_SESSION_USERDEFINED5 (0x80u) +/* Dcm Flag status */ +#define DCM_FLAG_ACTIVE (0x01u) +#define DCM_FLAG_DISACTIVE (0x00u) + +/* Dcm_SecLevelType */ +#define DCM_SEC_LEV_LOCK (0x01u) +#define DCM_SEC_LEV_L1 (0x02u) +#define DCM_SEC_LEV_L2 (0x04u) +#define DCM_SEC_LEV_L3 (0x08u) +#define DCM_SEC_LEV_L4 (0x10u) +#define DCM_SEC_LEV_L5 (0x20u) +#define DCM_SEC_LEV_L6 (0x40u) +#define DCM_SEC_LEV_L7 (0x80u) +#define DCM_SEC_LEV_ALL (0xffu) +/* invalid handle or received id*/ +#define DCM_INVALID_HANDLE_OR_ID ((uint8)0xFF) +/* Negative Response Service Id */ +#define DCM_NEGATIVE_RES_SERVICE_ID (0x7Fu) +/* Dcm_NegativeResponseCodeType */ +#define DCM_E_POSITIVERESPONSE (0x00u) +#define DCM_E_GENERALREJECT (0x10u) +#define DCM_E_SERVICENOTSUPPORTED (0x11u) +#define DCM_E_SUBFUNCTIONNOTSUPPORTED (0x12u) +#define DCM_E_INCORRECTMESSAGELENGTHORINVALIDFORMAT (0x13u) +#define DCM_E_BUSYREPEATREQUEST (0x21u) +#define DCM_E_CONDITIONSNOTCORRECT (0x22u) +#define DCM_E_REQUESTSEQUENCEERROR (0x24u) +#define DCM_E_REQUESTOUTOFRANGE (0x31u) +#define DCM_E_SECURITYACCESSDENIED (0x33u) +#define DCM_E_INVALIDKEY (0x35u) +#define DCM_E_EXCEEDNUMBEROFATTEMPTS (0x36u) +#define DCM_E_REQUIREDTIMEDELAYNOTEXPIRED (0x37u) +#define DCM_E_UPLOADDOWNLOADNOTACCEPTED (0x70u) +#define DCM_E_TRANSFERDATASUSPENDED (0x71u) +#define DCM_E_GENERALPROGRAMMINGFAILURE (0x72u) +#define DCM_E_WRONGBLOCKSEQUENCECOUNTER (0x73u) +#define DCM_E_REQUESTCORRECTLYRECEIVED_RESPONSEPENDING (0x78u) +#define DCM_E_SUBFUNCTIONNOTSUPPORTEDINACTIVESESSION (0x7Eu) +#define DCM_E_SERVICENOTSUPPORTEDINACTIVESESSION (0x7Fu) +#define DCM_E_RPMTOOHIGH (0x81u) +#define DCM_E_RPMTOOLOW (0x82u) +#define DCM_E_ENGINEISRUNNING (0x83u) +#define DCM_E_ENGINEISNOTRUNNING (0x84u) +#define DCM_E_ENGINERUNTIMETOOLOW (0x85u) +#define DCM_E_TEMPERATURETOOHIGH (0x86u) +#define DCM_E_TEMPERATURETOOLOW (0x87u) +#define DCM_E_VEHICLESPEEDTOOHIGH (0x88u) +#define DCM_E_VEHICLESPEEDTOOLOW (0x89u) +#define DCM_E_THROTTLE_PEDALTOOHIGH (0x8Au) +#define DCM_E_THROTTLE_PEDALTOOLOW (0x8Bu) +#define DCM_E_TRANSMISSIONRANGENOTINNEUTRAL (0x8Cu) +#define DCM_E_TRANSMISSIONRANGENOTINGEAR (0x8Du) +#define DCM_E_BRAKESWITCH_NOTCLOSED (0x8Fu) +#define DCM_E_SHIFTERLEVERNOTINPARK (0x90u) +#define DCM_E_TORQUECONVERTERCLUTCHLOCKED (0x91u) +#define DCM_E_VOLTAGETOOHIGH (0x92u) +#define DCM_E_VOLTAGETOOLOW (0x93u) +/* Dcm_CommunicationModeType */ +#define DCM_ENABLE_RX_TX_NORM (0x00u) +#define DCM_ENABLE_RX_DISABLE_TX_NORM (0x01u) +#define DCM_DISABLE_RX_ENABLE_TX_NORM (0x02u) +#define DCM_DISABLE_RX_TX_NORMAL (0x03u) +#define DCM_ENABLE_RX_TX_NM (0x04u) +#define DCM_ENABLE_RX_DISABLE_TX_NM (0x05u) +#define DCM_DISABLE_RX_ENABLE_TX_NM (0x06u) +#define DCM_DISABLE_RX_TX_NM (0x07u) +#define DCM_ENABLE_RX_TX_NORM_NM (0x08u) +#define DCM_ENABLE_RX_DISABLE_TX_NORM_NM (0x09u) +#define DCM_DISABLE_RX_ENABLE_TX_NORM_NM (0x0Au) +#define DCM_DISABLE_RX_TX_NORM_NM (0x0Bu) +/* Dcm_ConfirmationStatusType */ +#define DCM_RES_POS_OK (0x00u) +#define DCM_RES_POS_NOT_OK (0x01u) +#define DCM_RES_NEG_OK (0x02u) +#define DCM_RES_NEG_NOT_OK (0x03u) +/* Dcm_OpStatusType */ +#define DCM_INITIAL (0x00u) +#define DCM_PENDING (0x01u) +#define DCM_CANCEL (0x02u) +#define DCM_FORCE_RCRRP_OK (0x03u) +/* Dcm_ReturnReadMemoryType */ +#define DCM_READ_OK (0x00u) +#define DCM_READ_PENDIN (0x01u) +#define DCM_READ_FAILED (0x02u) +/* Dcm_ReturnWriteMemoryType */ +#define DCM_WRITE_OK (0x00u) +#define DCM_WRITE_PENDIN (0x01u) +#define DCM_WRITE_FAILED (0x02u) +/* Dcm_RoeStateType */ +#define DCM_ROE_ACTIVE (0x00u) +#define DCM_ROE_UNACTIV (0x01u) +/* Dcm_EcuStartModeType */ +#define DCM_COLD_START (0x00u) +#define DCM_WARM_START (0x01u) +/* Dcm_ResetModeType */ +#define DCM_NO_RESET (0x00u) +#define DCM_HARD_RESET (0x01u) +#define DCM_KEY_ON_OFF_RESET (0x02u) +#define DCM_SOFT_RESET (0x03u) +#define DCM_ENABLE_RAPID_POWER_SHUTDOWN_RESET (0x04u) +#define DCM_DISABLE_RAPID_POWER_SHUTDOWN_RESET (0x05u) +#define DCM_BOOTLOADER_RESET (0x06u) +#define DCM_SS_BOOTLOADER_RESET (0x07u) +#define DCM_RESET_EXECUTION (0x08u) + + + +#endif diff --git a/code_app_out/Source/ComStack/PDUR/PduR.h b/code_app_out/Source/ComStack/PDUR/PduR.h new file mode 100644 index 0000000..1b8ab9d --- /dev/null +++ b/code_app_out/Source/ComStack/PDUR/PduR.h @@ -0,0 +1,56 @@ +/** + ****************************************************************************** + * @file + * @author + * @version + * @date + * @brief + * @function List: + ****************************************************************************** + * @attention + * + * + *

© COPYRIGHT 2021

+ ****************************************************************************** + * @History: + * @Author: + * @Data: + * @Version: +*/ +#ifndef _PduR_h_ +#define _PduR_h_ + + +/*#include "Mem_Map.h"*/ +#include "PduR_Types.h" +/*********************************************************************************************************************/ +/* Module Identificatiion */ +/*********************************************************************************************************************/ +#define PduR_NumOfCOMTxObj COM_TXIPDUNUM //com層定義的非診斷 發送報文的id +#define PduR_NumOfCanIfRxObj 26u //没有用到，好奇怪； +#define PduR_NumOfCanTpRxSDU CANTP_NUM_RX_SDUS //診斷的rx，CANID個數，本工程分別是 750 7df + +#define PDUR_NULL ((void*)0) +typedef uint16 PduR_PathIndex; +//extern const PduRRoutingTable* gPduRRoutTableComPtr; +//extern void PduR_Init(const PduR_PBConfigType* ConfigPtr); + +/* 按照COM Tx(CANIf CanTP ， LINIf LINTP ，FrIf FrTP)順序*/ +extern const PduRRoutingTableIndexType PduRComRoutingTableIndex[]; + +/* 按照DCM Tx 順序*/ /*最小路由*/ +extern const PduRRoutingTableIndexType PduRDcmRoutingTableIndex[2]; + +/* 按照CanIf Rx 順序*/ +extern const PduRRoutingTableIndexType PduRCanIfRoutingTableIndex[PduR_NumOfCanIfRxObj]; + +/* 按照CanTp Rx 順序*/ +//extern const PduRRoutingTableIndexType PduRCanTpRoutingTableIndex[18];///hhhhh +//extern const PduRRoutingTableIndexType PduRCanTpRoutingTableIndex[PduR_NumOfCanTpRxSDU];///hhhhh + +extern const PduRDestPdu_Type PduRDestPduHandles[]; +extern const PduRSrcPdu_Type PduRSrcPduHandles[]; + +//extern const PduRRoutingTableIndexType PduRComRoutingTableIndex[PduR_NumOfCOMTxObj]; + +#endif /*_PduR_h_ */ diff --git a/code_app_out/Source/ComStack/PDUR/PduR_CanTp.h b/code_app_out/Source/ComStack/PDUR/PduR_CanTp.h new file mode 100644 index 0000000..580c162 --- /dev/null +++ b/code_app_out/Source/ComStack/PDUR/PduR_CanTp.h @@ -0,0 +1,106 @@ +/** + ****************************************************************************** + * @file + * @author + * @version + * @date + * @brief + * @function List: + ****************************************************************************** + * @attention + * + * + *

© COPYRIGHT 2021

+ ****************************************************************************** + * @History: + * @Author: + * @Data: + * @Version: +*/ + +#ifndef _PDUR_CANTP_H_ +# define _PDUR_CANTP_H_ + +/*********************************************************************************************************************/ +/* Include Files */ +/*********************************************************************************************************************/ +# include "PduR_Types.h" +/*********************************************************************************************************************/ +/* Version (abcd: Main version ab Sub Version cd ) */ +/*********************************************************************************************************************/ + +/*********************************************************************************************************************/ +/* API declaration */ +/*********************************************************************************************************************/ + +/*===========================================PDUR_START_SEC_CODE=====================================================*/ +/* BEGIN_FUNCTION_HDR +******************************************************************** +* Function Name: +* Description: + * + * +* Inputs: + * + * + * Outputs: + * + * + * Limitations: + +******************************************************************** + END_FUNCTION_HDR*/ + extern void CanTp_ChannelInit(PduIdType tpChannel); + +extern FUNC(BufReq_ReturnType, PDUR_CODE) PduR_CanTpStartOfReception + ( + PduIdType id, + PduLengthType TpSduLength, + PduLengthType* bufferSizePtr + ); +/********************************************************************************************************************** +| NAME: PduR_CanTpCopyRxData +| CALLED BY: CAN Transport Protocol +| DESCRIPTION: See PDUR350 for a complete API description +**********************************************************************************************************************/ + + +extern FUNC(BufReq_ReturnType, PDUR_CODE) PduR_CanTpCopyRxData + ( + PduIdType id, + PduInfoType* info, + PduLengthType* bufferSizePtr + ); +/********************************************************************************************************************** +| NAME: PduR_CanTpRxIndication +| CALLED BY: CAN Transport Protocol +| DESCRIPTION: See PDUR353 for a complete API description +**********************************************************************************************************************/ +extern FUNC(void, PDUR_CODE) PduR_CanTpRxIndication(PduIdType CanTpRxPduId, NotifResultType Result); + + + +/********************************************************************************************************************** +| NAME: PduR_CanTpCopyTxData +| CALLED BY: CAN Transport Protocol +| DESCRIPTION: See PDUR356 for a complete API description +**********************************************************************************************************************/ + + +extern FUNC(BufReq_ReturnType, PDUR_CODE) PduR_CanTpCopyTxData + ( + PduIdType id, + PduInfoType* info, + RetryInfoType* retry, + PduLengthType* availableDataPtr + ); +/********************************************************************************************************************** +| NAME: PduR_CanTpTxConfirmation +| CALLED BY: CAN Transport Protocol +| DESCRIPTION: See PDUR359 for a complete API description +**********************************************************************************************************************/ +extern FUNC(void, PDUR_CODE) PduR_CanTpTxConfirmation (PduIdType CanTpTxPduId, NotifResultType Result); + + +#endif /* !defined(PDUR_CANTP_H) */ + diff --git a/code_app_out/Source/ComStack/PDUR/PduR_Cfg.h b/code_app_out/Source/ComStack/PDUR/PduR_Cfg.h new file mode 100644 index 0000000..60f9e66 --- /dev/null +++ b/code_app_out/Source/ComStack/PDUR/PduR_Cfg.h @@ -0,0 +1,69 @@ +/** + ****************************************************************************** + * @file + * @author + * @version + * @date + * @brief + * @function List: + ****************************************************************************** + * @attention + * + * + *

© COPYRIGHT 2021

+ ****************************************************************************** + * @History: + * @Author: + * @Data: + * @Version: +*/ + +#ifndef _PduR_Cfg_h_ +#define _PduR_Cfg_h_ + + +#include "CanTp.h" +#include "Dcm_Cbk.h" + + +/* +#define gHanldPDUIdCom2CAN0_0x100 0 +#define gHanldPDUIdCom2CAN1_0x200 1 +#define gHanldPDUIdCom2CAN0 0 +#define gHanldPDUIdCom2CAN0 0 +*/ + +/* Container Name:PduRBswModules Com */ + +#define PduRComCancelReceive STD_ON +#define PduRComCancelTransmit STD_ON +#define PduRComChangeParameterRequestApi STD_ON +#define PduRComCommunicationInterface STD_ON +#define PduRComLowerModule STD_ON +#define PduRRetransmission +#define PduRTransportProtocol +#define PduRTriggertransmit +#define PduRComTxConfirmation STD_ON +#define PduRUpperModule STD_OFF +#define PduRUseTag +//#define PduRBswModuleRef + + +/* Container Name:PduRGeneral Com */ + +#define PDUR_DEV_ERROR_DETECT +#define PDUR_VERSION_INFO_API +#define PDUR_ZERO_COST_OPERATION + + +#define PDUR_NUM_OF_CANIF_TX_HANLDE 6 //好像沒有用到 +#define PDUR_NUM_OF_COM_TX_HANLDE 3 //好像沒有用到 + +//#define PDUR_NUM_OF_CANIF_TX_HANLDE PDUR_NUM_OF_CANIF_TX_HANLDE +//#define PUDR_COM_MAX_ID PDUR_NUM_OF_COM_TX_HANLDE + +#define PduRCanTpDcmRxFun 1 +#define PduRCanTpDcmRxPhy 0 +#define PduRCanTpDcmTxID 0 +extern const CanTp_CfgType CanTp_Cfg; +#endif diff --git a/code_app_out/Source/ComStack/PDUR/PduR_Dcm.h b/code_app_out/Source/ComStack/PDUR/PduR_Dcm.h new file mode 100644 index 0000000..8e8bdc3 --- /dev/null +++ b/code_app_out/Source/ComStack/PDUR/PduR_Dcm.h @@ -0,0 +1,54 @@ +/** + ****************************************************************************** + * @file + * @author + * @version + * @date + * @brief + * @function List: + ****************************************************************************** + * @attention + * + * + *

© COPYRIGHT 2021

+ ****************************************************************************** + * @History: + * @Author: + * @Data: + * @Version: +*/ + +#if !defined(PDUR_DCM_H) +# define PDUR_DCM_H + +/*********************************************************************************************************************/ +/* Include Files */ +/*********************************************************************************************************************/ +# include "PduR_Types.h" +/*********************************************************************************************************************/ +/* Version */ +/*********************************************************************************************************************/ + +/*********************************************************************************************************************/ +/* API declaration */ +/*********************************************************************************************************************/ +//# if(PDUR_DCM_SUPPORT == STD_ON) + +/********************************************************************************************************************** +| NAME: PduR_DcmTransmit +| CALLED BY: DCM +| DESCRIPTION: See PDUR408 for a complete API description +**********************************************************************************************************************/ +extern FUNC(Std_ReturnType, PDUR_CODE) PduR_DcmTransmit + ( + PduIdType DcmTxPduId, + PduInfoType* PduInfoPtr + ); +extern FUNC(Std_ReturnType, PDUR_CODE) PduR_DcmCancelTransmitRequest +( + PduIdType id +); + +#endif /* !defined(PDUR_DCM_H) */ + + diff --git a/code_app_out/Source/ComStack/PDUR/PduR_Types.h b/code_app_out/Source/ComStack/PDUR/PduR_Types.h new file mode 100644 index 0000000..ea5ff6d --- /dev/null +++ b/code_app_out/Source/ComStack/PDUR/PduR_Types.h @@ -0,0 +1,244 @@ +/** + ****************************************************************************** + * @file + * @author + * @version + * @date + * @brief + * @function List: + ****************************************************************************** + * @attention + * + * + *

© COPYRIGHT 2021

+ ****************************************************************************** + * @History: + * @Author: + * @Data: + * @Version: +*/ +#ifndef _PduR_Types_h_ +#define _PduR_Types_h_ + +#include "ComStack_Types.h" + +typedef uint8 PduR_PBConfigIdType; +typedef int PduR_RoutingTableIdType; + + +typedef enum +{ + PDUR_UNINIT = 0, + PDUR_ONLINE = 1, + PDUR_REDUCED = 2 +} PduR_StateType; + +typedef Std_ReturnType PduR_ReturnType; + + +/* +# define PDUR_MODULE_ID (0x33u) +# define NumOfCANTxHanlds 0x08 +# define NumOfLINTxHanlds 0 +# define NumOfFrTxHanlds 0 +# define NumOfTxHanlds NumOfCANTxHanlds+NumOfLINTxHanlds+NumOfFrTxHanlds + + + +# define NumOfCANRxHanlds 0x06 +# define NumOfLINRxHanlds 0 +# define NumOfFrRxHanlds 0 +# define NumOfRxHanlds NumOfCANRxHanlds+NumOfLINRxHanlds+NumOfFrRxHanlds +*/ +/* container:PduRDestPdu */ +typedef uint16 PduRTpThreshold_Tpye; +typedef uint8* PduRDestTxBufferPtr; + + +typedef uint8 PeuRRouting_Type; +#define SingleCast 0x01 +#define MultipCast 0x02 +#define UnDefined 0xff + +#define PDUR_TRANSMISSION_CONFIRMATION STD_ON +#define PDUR_TRANSMISSION_CONFIRMATION STD_ON + +typedef enum{ + PDUR_DIRECT = 1, + PDUR_TRIGGERTRANSMIT = 2 +}Routing_Tpye; + + +typedef uint8 gPduRHandleType; +typedef uint8 PduIdDirType; + +#define ToCanIfRef 1u +#define ToCanTpRef 2u +#define ToLinIfRef 3u +#define ToLinTpRef 4u +#define ToFrIfRef 5u +#define ToFrTpRef 6u +#define ToComRef 7u +#define ToDcmRef 8u + +#define FromCanIfRef 1u +#define FromCanTpRef 2u +#define FromLinIfRef 3u +#define FromLinTpRef 4u +#define FromFrIfRef 5u +#define FromFrTpRef 6u +#define FromComRef 7u +#define FromDcmRef 8u + + +typedef struct{ + + gPduRHandleType PduRHandle; + +}PduRBswModulesType; + + + + + +typedef struct +{ + uint8 PduRDefaultValueElementElement; + uint8 PduRDefaultValueElementBytePosition; + +}PduRDefaultValueElementType; + + +typedef struct +{ + PduIdDirType PduRDestPduRef; + uint8 PduRDestPduDataProvision; +/* + uint16 PduRTpThreshold; + PduRDestTxBufferPtr PduRDestTxBufferRef; + PduRDefaultValueElementType PduRDefaultValueElement; +*/ + PduIdType PduRDestPduHandleId; + boolean PduRTransmissionConfirmation; + +}PduRDestPdu_Type; + + +typedef struct +{ + uint16 PduRMaxTpBufferNumber; + uint16 PduRTpBufferLength; +}PduRTpBufferTable_Type; + + + +typedef enum{ + DEFFERED, + IMMEDIATE +}PduRBufferFIFOType; + +/* for If GW */ +typedef struct +{ + uint16 PduRMaxTxBufferNumber; + uint8 PduRBufferLength; + uint8 PduRBufferDepth; + PduRBufferFIFOType PduRBufferFIFO; + +}PduRTxBufferTable_Type; + +typedef struct +{ + PduIdType PduRSrcPduHandleId; + PduIdDirType PduRSrcPduRef; +}PduRSrcPdu_Type; + + + + + +typedef struct{ + //uint8 PduDir; + uint16 const PduRDestPduIndex; + + uint16 const PduRSrcPduIndex; + + //PduRSrcPdu_Type PduRSrcPduHanlde; + //PduIdType PduRSrcPduHanlde; +}PduRRoutingPath_Type; + +typedef struct{ + + uint8 ConfCnt; + //PduIdType CurrentComHandle; +}ComTxConfCnt_Type; + +typedef struct{ + uint8 PduRIsEnabledAtInit; + uint16 PduRRoutingPathGroupId; + PduRDestPdu_Type const* PduRDestPduRef; + +}PduRRoutingPathGroup_Type; + + +typedef struct{ +uint8 NumOfRelatedHanldId; + +}relatedComHanldId; + +typedef struct{ + PduIdType gPduHandle; + PduIdDirType UpperLayer; + +}CanIfConfMapping; + + + +typedef struct{ + PduIdType UpperHandle; + PduIdDirType UpperLayer; + +}CanTpConfMapping; + +typedef struct{ + PduIdType RxMappingIndex; + PduIdDirType UpperLayer; + +}CanTpIndMapping; + + + + + + + +typedef struct{ + PduRRoutingPath_Type PduRRoutingPath; +}PduRRoutingTable; + + + + +typedef struct{ + uint8 NumOfDest; + const PduRRoutingTable* PduRTablePtr; + +}PduRRoutingTableIndexType; + + + + +typedef struct{ + const PduRRoutingTableIndexType* PduRComRoutingTableIndexPtr; + const PduRRoutingTableIndexType* PduRDcmRoutingTableIndexPtr; + const PduRRoutingTableIndexType* PduRCanIfRoutingTableIndexPtr; + const PduRRoutingTableIndexType* PduRCanTpRoutingTableIndexPtr; + uint8* PduRComRoutPathDestCntPtr; + uint8* PduRDcmRoutPathDestCntPtr; + uint8* PduRCanIfRoutPathDestCntPtr; + uint8* PduRCanTpRoutPathDestCntPtr; +}PduR_PBConfigType; + + + +#endif \ No newline at end of file diff --git a/code_app_out/Source/ComStack/error.h b/code_app_out/Source/ComStack/error.h new file mode 100644 index 0000000..1633daf --- /dev/null +++ b/code_app_out/Source/ComStack/error.h @@ -0,0 +1,109 @@ +/** + ****************************************************************************** + * @file + * @author + * @version + * @date + * @brief + * @function List: + ****************************************************************************** + * @attention + * + * + *

© COPYRIGHT 2021

+ ****************************************************************************** + * @History: + * @Author: + * @Data: + * @Version: +*/ +#ifndef __ERROR_H__ +#define __ERROR_H__ + + +#include "common_types.h" + +//#define ERROR_NEGATIVE + +#ifdef ERROR_NEGATIVE +typedef s16 err_flag_e; + +#define ERR_OK 0 /* OK */ +#define ERR_SPEED (-1) /* This device does not work in the active speed mode. */ +#define ERR_RANGE (-2) /* Parameter out of range. */ +#define ERR_VALUE (-3) /* Parameter of incorrect value. */ +#define ERR_OVERFLOW (-4) /* Timer overflow. */ +#define ERR_MATH (-5) /* Overflow during evaluation. */ +#define ERR_ENABLED (-6) /* Device is enabled. */ +#define ERR_DISABLED (-7) /* Device is disabled. */ +#define ERR_BUSY (-8) /* Device is busy. */ +#define ERR_ID_NOEXIST (-9) /* ID not exist . */ +#define ERR_ID_INVALID (-10) /* ID is invalid . */ +#define ERR_NOTAVAIL (-11) /* Requested value or method not available. */ +#define ERR_RXEMPTY (-12) /* No data in receiver. */ +#define ERR_TXFULL (-13) /* Transmitter is full. */ +#define ERR_BUSOFF (-14) /* Bus not available. */ +#define ERR_OVERRUN (-15) /* Overrun error is detected. */ +#define ERR_FRAMING (-16) /* Framing error is detected. */ +#define ERR_PARITY (-17) /* Parity error is detected. */ +#define ERR_NOISE (-18) /* Noise error is detected. */ +#define ERR_IDLE (-19) /* Idle error is detected. */ +#define ERR_FAULT (-20) /* Fault error is detected. */ +#define ERR_BREAK (-21) /* Break char is received during communication. */ +#define ERR_CRC (-22) /* CRC error is detected. */ +#define ERR_ARBITR (-23) /* A node losts arbitration. This error occurs if two nodes start transmission at the same time. */ +#define ERR_PROTECT (-24) /* Protection error is detected. */ +#define ERR_UNDERFLOW (-25) /* Underflow error is detected. */ +#define ERR_UNDERRUN (-26) /* Underrun error is detected. */ +#define ERR_COMMON (-27) /* Common error of a device. */ +#define ERR_LINSYNC (-28) /* LIN synchronization error is detected. */ +#define ERR_FAILED (-29) /* Requested functionality or process failed. */ + +#else +/*總的錯誤提示 */ +typedef enum +{ + ERR_OK= 0, /* OK */ + ERR_SPEED, /* This device does not work in the active speed mode. */ + ERR_RANGE, /* Parameter out of range. */ + ERR_VALUE, /* Parameter of incorrect value. */ + ERR_OVERFLOW , /* Timer overflow. */ + ERR_MATH , /* Overflow during evaluation. */ + ERR_ENABLED , /* Device is enabled. */ + ERR_DISABLED , /* Device is disabled. */ + ERR_BUSY , /* Device is busy. */ + ERR_ID_NOEXIST, /* ID not exist . */ + ERR_ID_INVALID, /* ID is invalid . */ + ERR_NOTAVAIL, /* Requested value or method not available. */ + ERR_RXEMPTY , /* No data in receiver. */ + ERR_TXFULL , /* Transmitter is full. */ + ERR_BUSOFF , /* Bus not available. */ + ERR_OVERRUN , /* Overrun error is detected. */ + ERR_FRAMING , /* Framing error is detected. */ + ERR_PARITY , /* Parity error is detected. */ + ERR_NOISE , /* Noise error is detected. */ + ERR_IDLE , /* Idle error is detected. */ + ERR_FAULT , /* Fault error is detected. */ + ERR_BREAK , /* Break char is received during communication. */ + ERR_CRC , /* CRC error is detected. */ + ERR_ARBITR , /* A node losts arbitration. This error occurs if two nodes start transmission at the same time. */ + ERR_PROTECT, /* Protection error is detected. */ + ERR_UNDERFLOW ,/* Underflow error is detected. */ + ERR_UNDERRUN ,/* Underrun error is detected. */ + ERR_COMMON ,/* Common error of a device. */ + ERR_LINSYNC ,/* LIN synchronization error is detected. */ + ERR_FAILED ,/* Requested functionality or process failed. */ + ERR_QFULL ,/* Queue is full. */ +}err_flag_e; + +#endif + + + + + +#endif /* __TYPES_H__ */ + + + + diff --git a/code_app_out/Source/ComStack/lib/iar/fm33_app_uds_core.a b/code_app_out/Source/ComStack/lib/iar/fm33_app_uds_core.a new file mode 100644 index 0000000..7fcb37b Binary files /dev/null and b/code_app_out/Source/ComStack/lib/iar/fm33_app_uds_core.a differ diff --git a/code_app_out/Source/ComStack/os_types.h b/code_app_out/Source/ComStack/os_types.h new file mode 100644 index 0000000..cc17879 --- /dev/null +++ b/code_app_out/Source/ComStack/os_types.h @@ -0,0 +1,120 @@ +/** + ****************************************************************************** + * @file + * @author + * @version + * @date + * @brief + * @function List: + ****************************************************************************** + * @attention + * + * + *

© COPYRIGHT 2021

+ ****************************************************************************** + * @History: + * @Author: + * @Data: + * @Version: +*/ + +#ifndef __OS_TYPES_H__ +#define __OS_TYPES_H__ + +#include "common_types.h" + +#if 0 +#ifndef TRUE + #define TRUE 1 +#endif /* TRUE */ + +#ifndef FALSE + #define FALSE 0 +#endif /* FALSE */ +#endif + +#ifndef NULL + #define NULL 0 +#endif /* NULL */ +typedef const unsigned char C8; +typedef const unsigned int C16; +typedef unsigned char BOOL; /* 布爾變量 */ +typedef unsigned char U8; /* 無符號8位整型變量 */ +typedef signed char S8; /* 有符號8位整型變量 */ +typedef unsigned int U16; /* 無符號16位整型變量 */ +typedef signed int S16; /* 有符號16位整型變量 */ +typedef unsigned long U32; /* 無符號32位整型變量 */ +typedef signed long S32; /* 有符號32位整型變量 */ +typedef float F32; /* 單精度浮點數（32位長度） */ +typedef double F64; /* 雙精度浮點數（64位長度） */ + +typedef void OS_VOID; +typedef char OS_CHAR; /* 8-bit character */ +typedef unsigned char OS_BOOL; /* 8-bit boolean or logical */ +typedef unsigned char OS_U8; /* 8-bit unsigned integer */ +typedef signed char OS_S8; /* 8-bit signed integer */ +typedef unsigned short OS_U16; /* 16-bit unsigned integer */ +typedef signed short OS_S16; /* 16-bit signed integer */ +typedef unsigned int OS_U32; /* 32-bit unsigned integer */ +typedef signed int OS_S32; /* 32-bit signed integer */ +typedef unsigned long long OS_U64; /* 64-bit unsigned integer */ +typedef signed long long OS_S64; /* 64-bit signed integer */ +typedef float OS_F32; /* 32-bit floating point */ +typedef double OS_F64; /* 64-bit floating point */ +typedef volatile OS_U8 OS_V08; /* 8-bit register */ +typedef volatile OS_U16 OS_V16; /* 16-bit register */ +typedef volatile OS_U32 OS_V32; /* 32-bit register */ +typedef volatile OS_U64 OS_V64; /* 64-bit register */ +typedef void (*CPU_FNCT_VOID)(void); /* See Note #2a. */ +typedef void (*CPU_FNCT_PTR )(void *p_obj); /* See Note #2b. */ + +typedef OS_U16 OS_CPU_USAGE; /* CPU Usage 0..10000 <16>/32 */ +typedef OS_U32 OS_CTR; /* Counter, 32 */ +typedef OS_U32 OS_CTX_SW_CTR; /* Counter of context switches, 32 */ +typedef OS_U32 OS_CYCLES; /* CPU clock cycles, <32>/64 */ +typedef OS_U32 OS_FLAGS; /* Event flags, 8/16/<32> */ +typedef OS_U32 OS_IDLE_CTR; /* Holds the number of times the idle task runs, <32>/64 */ +typedef OS_U16 OS_MEM_QTY; /* Number of memory blocks, <16>/32 */ +typedef OS_U16 OS_MEM_SIZE; /* Size in bytes of a memory block, <16>/32 */ +typedef OS_U16 OS_MSG_QTY; /* Number of OS_MSGs in the msg pool, <16>/32 */ +typedef OS_U16 OS_MSG_SIZE; /* Size of messages in number of bytes, <16>/32 */ +typedef OS_U8 OS_NESTING_CTR; /* Interrupt and scheduler nesting, <8>/16/32 */ +typedef OS_U16 OS_OBJ_QTY; /* Number of kernel objects counter, <16>/32 */ +typedef OS_U32 OS_OBJ_TYPE; /* Special flag to determine object type, 32 */ +typedef OS_U16 OS_OPT; /* Holds function options <16>/32 */ +typedef OS_U8 OS_PRIO; /* Priority of a task, <8>/16/32 */ +typedef OS_U16 OS_QTY; /* Quantity <16>/32 */ +typedef OS_U32 OS_RATE_HZ; /* Rate in Hertz 32 */ +typedef OS_U32 OS_REG; /* Task register 8/16/<32> */ +typedef OS_U8 OS_REG_ID; /* Index to task register <8>/16/32 */ +typedef OS_U32 OS_SEM_CTR; /* Semaphore value 16/<32> */ +typedef OS_U8 OS_STATE; /* State variable <8>/16/32 */ +typedef OS_U8 OS_STATUS; /* Status <8>/16/32 */ +//typedef OS_U16 OS_TICK; /* Clock tick counter <32>/64 */ +typedef OS_U16 OS_TICK_SPOKE_IX; /* Tick wheel spoke position 8/<16>/32 */ +typedef OS_U16 OS_TMR_SPOKE_IX; /* Timer wheel spoke position 8/<16>/32 */ +typedef OS_U32 OS_TS32; +typedef OS_U64 OS_TS64; +typedef OS_TS32 OS_TS; /* Req'd for backwards-compatibility. */ + +typedef OS_U8 OS_TIME_ID; +#define OS_TRUE 1u +#define OS_FALSE 0u +#define OS_NULL 0u + +/* 符號類型的值範圍 */ +#define U8_MAX (255) +#define S8_MAX (127) +#define S8_MIN (-128) +#define U16_MAX (65535u) +#define S16_MAX (32767) +#define S16_MIN (-32768) +#define U32_MAX (4294967295uL) +#define S32_MAX (2147483647) +#define S32_MIN (-2147483648uL) + + +//#define TEST_WHILE_ENABLE //測試的 while(1);開啟 + + +#endif /* __TYPE_H__ */ diff --git a/code_app_out/Source/SimpleOs/SimpleOs.c b/code_app_out/Source/SimpleOs/SimpleOs.c new file mode 100644 index 0000000..fdcf6af --- /dev/null +++ b/code_app_out/Source/SimpleOs/SimpleOs.c @@ -0,0 +1,208 @@ +/** ########################################################################## +** Filename : SimpleOs.c +** Project : +** Module : +** Processor : +** Version : 1.0 +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20231103- V01-- --Linboyi--- --初版-- +** #########################################################################*/ + + + + +/***************************************************************************** +* I N C L U D E F I L E S +*****************************************************************************/ +#include "Cpu.h" +#include "SimpleOs_Cfg.h" +#include "common_memory.h" +#include "SimpleOs_CallOut.h" +#include "SimpleOs_Time.h" +/***************************************************************************** +* D E F I N E S / M A C R O S +*****************************************************************************/ +#define OS_TASK_PRE_READY (uint8_t)0 +#define OS_TASK_RUNNING (uint8_t)1 +#define OS_TASK_WAITING (uint8_t)2 +#define OS_TASK_READY (uint8_t)3 +#define OS_TASK_SUSPENDED (uint8_t)4 + + + +/***************************************************************************** +* T Y P E D E F I N I T I O N S +*****************************************************************************/ +typedef struct +{ + uint8_t ucTaskState[OS_TASK_MAX_NUM]; + uint8_t ucEventState[OS_EVENT_TASK_MAX_NUM]; + uint8_t ucTaskRunNum; + uint8_t ucMoreTaskCnt; +} SimpleOs_Struct_Type; +/***************************************************************************** +* G L O B A L V A R I A B L E S +* only configuration table allowed here,variables are not allowed! +*****************************************************************************/ +static SimpleOs_Struct_Type SimpleOs_Struct; +/***************************************************************************** +* C O N S T A N T S +*****************************************************************************/ + +/***************************************************************************** +* F U N C T I O N P R O T O T Y P E +*****************************************************************************/ +static void SimpleOs_MainFunction(void); + + + + +/***************************************************************************** +|Prototype : SimpleOs_Init +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +*****************************************************************************/ +static void SimpleOs_Init(void) +{ + common_memory_fill( (uint8_t *)&SimpleOs_Struct, 0u, sizeof(SimpleOs_Struct) / sizeof(uint8_t)); +} + + +/***************************************************************************** +|Prototype : SimpleOs_Start +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +*****************************************************************************/ +void SimpleOs_Start(void) +{ + (void)SimpleOs_Init(); + (void)SimpleOsTime_Init(); + (void)OS_StartUpHook(); + (void)SimpleOs_MainFunction(); +} + + + +/***************************************************************************** +|Prototype : SimpleOs_ActiveTask +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +*****************************************************************************/ +void SimpleOs_ActiveTask(uint8_t TaskId) +{ + if(TaskId < (uint8_t)OS_TASK_MAX_NUM) + { + if((uint8_t)OS_TASK_PRE_READY == SimpleOs_Struct.ucTaskState[TaskId]) + { + OS_EnterCriticalArea_0();/*PRQA S 3138*/ + SimpleOs_Struct.ucTaskState[TaskId] = OS_TASK_READY; + OS_LeaveCriticalArea_0();/*PRQA S 3138*/ + } + } +} + +/***************************************************************************** +|Prototype : SimpleOs_MainFunction +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +*****************************************************************************/ +static void SimpleOs_MainFunction(void) +{ + for(;;) + { + if((uint8_t)OS_TASK_READY == SimpleOs_Struct.ucTaskState[OS_Task1ms]) + { + SimpleOs_Struct.ucTaskState[OS_Task1ms] = OS_TASK_RUNNING; + OS_Task1msFun(); + SimpleOs_Struct.ucTaskState[OS_Task1ms] = OS_TASK_PRE_READY; + } + if((uint8_t)OS_TASK_READY == SimpleOs_Struct.ucTaskState[OS_Task2ms]) + { + SimpleOs_Struct.ucTaskState[OS_Task2ms] = OS_TASK_RUNNING; + OS_Task2msFun(); + SimpleOs_Struct.ucTaskState[OS_Task2ms] = OS_TASK_PRE_READY; + } + if((uint8_t)OS_TASK_READY == SimpleOs_Struct.ucTaskState[OS_Task5msA]) + { + SimpleOs_Struct.ucTaskState[OS_Task5msA] = OS_TASK_RUNNING; + OS_Task5msAFun(); + SimpleOs_Struct.ucTaskState[OS_Task5msA] = OS_TASK_PRE_READY; + } + + if((uint8_t)OS_TASK_READY == SimpleOs_Struct.ucTaskState[OS_Task5msB]) + { + SimpleOs_Struct.ucTaskState[OS_Task5msB] = OS_TASK_RUNNING; + OS_Task5msBFun(); + SimpleOs_Struct.ucTaskState[OS_Task5msB] = OS_TASK_PRE_READY; + } + + if((uint8_t)OS_TASK_READY == SimpleOs_Struct.ucTaskState[OS_Task5msC]) + { + SimpleOs_Struct.ucTaskState[OS_Task5msC] = OS_TASK_RUNNING; + OS_Task5msCFun(); + SimpleOs_Struct.ucTaskState[OS_Task5msC] = OS_TASK_PRE_READY; + } + + if((uint8_t)OS_TASK_READY == SimpleOs_Struct.ucTaskState[OS_Task10msA]) + { + SimpleOs_Struct.ucTaskState[OS_Task10msA] = OS_TASK_RUNNING; + OS_Task10msAFun(); + SimpleOs_Struct.ucTaskState[OS_Task10msA] = OS_TASK_PRE_READY; + } + + if((uint8_t)OS_TASK_READY == SimpleOs_Struct.ucTaskState[OS_Task10msB]) + { + SimpleOs_Struct.ucTaskState[OS_Task10msB] = OS_TASK_RUNNING; + OS_Task10msBFun(); + SimpleOs_Struct.ucTaskState[OS_Task10msB] = OS_TASK_PRE_READY; + } + + if((uint8_t)OS_TASK_READY == SimpleOs_Struct.ucTaskState[OS_Task10msC]) + { + SimpleOs_Struct.ucTaskState[OS_Task10msC] = OS_TASK_RUNNING; + OS_Task10msCFun(); + SimpleOs_Struct.ucTaskState[OS_Task10msC] = OS_TASK_PRE_READY; + } + + if((uint8_t)OS_TASK_READY == SimpleOs_Struct.ucTaskState[OS_Task10msD]) + { + SimpleOs_Struct.ucTaskState[OS_Task10msD] = OS_TASK_RUNNING; + OS_Task10msDFun(); + SimpleOs_Struct.ucTaskState[OS_Task10msD] = OS_TASK_PRE_READY; + } + + if((uint8_t)OS_TASK_READY == SimpleOs_Struct.ucTaskState[OS_Task10msE]) + { + SimpleOs_Struct.ucTaskState[OS_Task10msE] = OS_TASK_RUNNING; + OS_Task10msEFun(); + SimpleOs_Struct.ucTaskState[OS_Task10msE] = OS_TASK_PRE_READY; + } + (void)OS_ErrorHook(); + } +} \ No newline at end of file diff --git a/code_app_out/Source/SimpleOs/SimpleOs.h b/code_app_out/Source/SimpleOs/SimpleOs.h new file mode 100644 index 0000000..18342e7 --- /dev/null +++ b/code_app_out/Source/SimpleOs/SimpleOs.h @@ -0,0 +1,56 @@ +/** ########################################################################## +** Filename : SimpleOs.h +** Project : +** Module : +** Processor : +** Version : 1.0 +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20231103- V01-- --Linboyi--- --初版-- +** #########################################################################*/ +#ifndef SAMPLE_OS_H +#define SAMPLE_OS_H + + + + +/***************************************************************************** +* I N C L U D E F I L E S +*****************************************************************************/ +#include "common_types.h" + +/***************************************************************************** +* D E F I N E S / M A C R O S +*****************************************************************************/ + + + +/***************************************************************************** +* T Y P E D E F I N I T I O N S +*****************************************************************************/ + + +/***************************************************************************** +* G L O B A L V A R I A B L E S +* only configuration table allowed here,variables are not allowed! +*****************************************************************************/ + +/***************************************************************************** +* C O N S T A N T S +*****************************************************************************/ + +/***************************************************************************** +* F U N C T I O N P R O T O T Y P E +*****************************************************************************/ +extern void SimpleOs_ActiveTask(uint8_t TaskId); +extern void SimpleOs_Start(void); +#endif \ No newline at end of file diff --git a/code_app_out/Source/SimpleOs/SimpleOs_CallOut.c b/code_app_out/Source/SimpleOs/SimpleOs_CallOut.c new file mode 100644 index 0000000..e735d48 --- /dev/null +++ b/code_app_out/Source/SimpleOs/SimpleOs_CallOut.c @@ -0,0 +1,89 @@ +/** ########################################################################## +** Filename : SimpleOs_CallOut.c +** Project : +** Module : +** Processor : +** Version : 1.0 +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20231103- V01-- --Linboyi--- --初版-- +** #########################################################################*/ + + + + +/***************************************************************************** +* I N C L U D E F I L E S +*****************************************************************************/ +#include "SimpleOs_CallOut.h" +/***************************************************************************** +* D E F I N E S / M A C R O S +*****************************************************************************/ + + +/***************************************************************************** +* T Y P E D E F I N I T I O N S +*****************************************************************************/ + +/***************************************************************************** +* G L O B A L V A R I A B L E S +* only configuration table allowed here,variables are not allowed! +*****************************************************************************/ + +/***************************************************************************** +* C O N S T A N T S +*****************************************************************************/ + +/***************************************************************************** +* F U N C T I O N P R O T O T Y P E +*****************************************************************************/ + + + + +/***************************************************************************** +|Prototype : OS_StartUpHook +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +*****************************************************************************/ +void OS_StartUpHook(void) +{ + +} + + +/***************************************************************************** +|Prototype : OS_ErrorHook +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +*****************************************************************************/ + +void OS_ErrorHook(void) +{ + +} + + + + + + + + diff --git a/code_app_out/Source/SimpleOs/SimpleOs_CallOut.h b/code_app_out/Source/SimpleOs/SimpleOs_CallOut.h new file mode 100644 index 0000000..1f2bdea --- /dev/null +++ b/code_app_out/Source/SimpleOs/SimpleOs_CallOut.h @@ -0,0 +1,53 @@ +/** ########################################################################## +** Filename : SimpleOs_CallOut.h +** Project : +** Module : +** Processor : +** Version : 1.0 +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20231103- V01-- --Linboyi--- --初版-- +** #########################################################################*/ +#ifndef SAMPLE_OS_CALLOUT_H +#define SAMPLE_OS_CALLOUT_H + + + + +/***************************************************************************** +* I N C L U D E F I L E S +*****************************************************************************/ + +/***************************************************************************** +* D E F I N E S / M A C R O S +*****************************************************************************/ + + +/***************************************************************************** +* T Y P E D E F I N I T I O N S +*****************************************************************************/ + +/***************************************************************************** +* G L O B A L V A R I A B L E S +* only configuration table allowed here,variables are not allowed! +*****************************************************************************/ + +/***************************************************************************** +* C O N S T A N T S +*****************************************************************************/ + +/***************************************************************************** +* F U N C T I O N P R O T O T Y P E +*****************************************************************************/ +extern void OS_StartUpHook(void); +extern void OS_ErrorHook(void); +#endif \ No newline at end of file diff --git a/code_app_out/Source/SimpleOs/SimpleOs_Cfg.h b/code_app_out/Source/SimpleOs/SimpleOs_Cfg.h new file mode 100644 index 0000000..a6e1f56 --- /dev/null +++ b/code_app_out/Source/SimpleOs/SimpleOs_Cfg.h @@ -0,0 +1,132 @@ +/** ########################################################################## +** Filename : SimpleOs_Cfg.h +** Project : +** Module : +** Processor : +** Version : 1.0 +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20231103- V01-- --Linboyi--- --初版-- +** #########################################################################*/ +#ifndef SAMPLE_OS_CFG_H +#define SAMPLE_OS_CFG_H + + + + +/***************************************************************************** +* I N C L U D E F I L E S +*****************************************************************************/ +#include "SimpleOs_TimeCfg.h" +/***************************************************************************** +* D E F I N E S / M A C R O S +*****************************************************************************/ + +#define OS_DISABLE (0u) +#define OS_ENABLE (1u) + + +#define OS_Task1ms (0u) +#define OS_Task1msDeltaTicks OSTIME_TICKS(1000u) +#define OS_Task1msCycle OSTIME_TICKS(1000u) + +#define OS_Task2ms (1u) +#define OS_Task2msDeltaTicks OSTIME_TICKS(2000u) +#define OS_Task2msCycle OSTIME_TICKS(2000u) + + +#define OS_Task5msA (2u) +#define OS_Task5msADeltaTicks OSTIME_TICKS(1000u) +#define OS_Task5msACycle OSTIME_TICKS(5000u) + +#define OS_Task5msB (3u) +#define OS_Task5msBDeltaTicks OSTIME_TICKS(3000u) +#define OS_Task5msBCycle OSTIME_TICKS(5000u) + + +#define OS_Task5msC (4u) +#define OS_Task5msCDeltaTicks OSTIME_TICKS(5000u) +#define OS_Task5msCCycle OSTIME_TICKS(5000u) + +#define OS_Task10msA (5u) +#define OS_Task10msADeltaTicks OSTIME_TICKS(2000u) +#define OS_Task10msACycle OSTIME_TICKS(10000u) + +#define OS_Task10msB (6u) +#define OS_Task10msBDeltaTicks OSTIME_TICKS(4000u) +#define OS_Task10msBCycle OSTIME_TICKS(10000u) + +#define OS_Task10msC (7u) +#define OS_Task10msCDeltaTicks OSTIME_TICKS(6000u) +#define OS_Task10msCCycle OSTIME_TICKS(10000u) + + +#define OS_Task10msD (8u) +#define OS_Task10msDDeltaTicks OSTIME_TICKS(8000u) +#define OS_Task10msDCycle OSTIME_TICKS(10000u) + + +#define OS_Task10msE (9u) +#define OS_Task10msEDeltaTicks OSTIME_TICKS(10000u) +#define OS_Task10msECycle OSTIME_TICKS(10000u) + + +#define OS_TASK_MAX_NUM (10u) + + + +#define OS_EventOne (0u) +#define OS_EventOneDeltaTicks (1u) +#define OS_EventOneCycle OSTIME_TICKS(2000u) +#define OS_EventTwo (1u) +#define OS_EventTwoDeltaTicks (2u) +#define OS_EventTwoCycle OSTIME_TICKS(500u) +#define OS_EVENT_TASK_MAX_NUM (2u) + +#define OS_STACK_ACCESS_BOTTOM (uint32*)(0x2000EC00) +#define OS_STACK_ACCESS_TOP (uint32*)(0x2000EC00+0x00000300) +#define OS_STACK_CHECK_PATTERN (0xE5AAAAAAul) + +#define TASK(x) void x##Fun(void) + + +/***************************************************************************** +* T Y P E D E F I N I T I O N S +*****************************************************************************/ + +#define OS_EnterCriticalArea_0() System_DisableIrqGlobal() +#define OS_LeaveCriticalArea_0() System_EnableIrqGlobal() +/***************************************************************************** +* G L O B A L V A R I A B L E S +* only configuration table allowed here,variables are not allowed! +*****************************************************************************/ + +/***************************************************************************** +* C O N S T A N T S +*****************************************************************************/ + +/***************************************************************************** +* F U N C T I O N P R O T O T Y P E +*****************************************************************************/ + +extern void OS_Task1msFun(void); +extern void OS_Task2msFun(void); +extern void OS_Task5msAFun(void); +extern void OS_Task5msBFun(void); +extern void OS_Task5msCFun(void); + +extern void OS_Task10msAFun(void); +extern void OS_Task10msBFun(void); +extern void OS_Task10msCFun(void); +extern void OS_Task10msDFun(void); +extern void OS_Task10msEFun(void); +#endif \ No newline at end of file diff --git a/code_app_out/Source/SimpleOs/SimpleOs_Time.c b/code_app_out/Source/SimpleOs/SimpleOs_Time.c new file mode 100644 index 0000000..8c87818 --- /dev/null +++ b/code_app_out/Source/SimpleOs/SimpleOs_Time.c @@ -0,0 +1,129 @@ +/** ########################################################################## +** Filename : SimpleOs_Time.c +** Project : +** Module : +** Processor : +** Version : 1.0 +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20231103- V01-- --Linboyi--- --初版-- +** #########################################################################*/ + + + + +/***************************************************************************** +* I N C L U D E F I L E S +*****************************************************************************/ +#include "common_types.h" +#include "SimpleOs_Cfg.h" +#include "SimpleOs.h" +/***************************************************************************** +* D E F I N E S / M A C R O S +*****************************************************************************/ + + + + +/***************************************************************************** +* T Y P E D E F I N I T I O N S +*****************************************************************************/ +typedef struct +{ + uint16_t usAlarmTime; + uint16_t usAlarmCycleTime; + +} SimpleOsTime_Struct_Type; +/***************************************************************************** +* G L O B A L V A R I A B L E S +* only configuration table allowed here,variables are not allowed! +*****************************************************************************/ +static SimpleOsTime_Struct_Type SimpleOsTime_Struct[OS_TASK_MAX_NUM]; + +/***************************************************************************** +* C O N S T A N T S +*****************************************************************************/ + +/***************************************************************************** +* F U N C T I O N P R O T O T Y P E +*****************************************************************************/ + +static void SimpleOsTime_SetTaskAlarm(uint8_t TaskId,uint16_t deltaTicks,uint16_t cycle); + +/***************************************************************************** +|Prototype : SimpleOsTime_Init +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +*****************************************************************************/ +void SimpleOsTime_Init(void) +{ + (void)SimpleOsTime_SetTaskAlarm(OS_Task1ms, OS_Task1msDeltaTicks, OS_Task1msCycle); + (void)SimpleOsTime_SetTaskAlarm(OS_Task2ms, OS_Task2msDeltaTicks, OS_Task2msCycle); + (void)SimpleOsTime_SetTaskAlarm(OS_Task5msA, OS_Task5msADeltaTicks, OS_Task5msACycle); + (void)SimpleOsTime_SetTaskAlarm(OS_Task5msB, OS_Task5msBDeltaTicks, OS_Task5msBCycle); + (void)SimpleOsTime_SetTaskAlarm(OS_Task5msC, OS_Task5msCDeltaTicks, OS_Task5msCCycle); + (void)SimpleOsTime_SetTaskAlarm(OS_Task10msA, OS_Task10msADeltaTicks, OS_Task10msACycle); + (void)SimpleOsTime_SetTaskAlarm(OS_Task10msB, OS_Task10msBDeltaTicks, OS_Task10msBCycle); + (void)SimpleOsTime_SetTaskAlarm(OS_Task10msC, OS_Task10msCDeltaTicks, OS_Task10msCCycle); + (void)SimpleOsTime_SetTaskAlarm(OS_Task10msD, OS_Task10msDDeltaTicks, OS_Task10msDCycle); + (void)SimpleOsTime_SetTaskAlarm(OS_Task10msE, OS_Task10msEDeltaTicks, OS_Task10msECycle); +} + +/***************************************************************************** +|Prototype : SimpleOsTime_SetTaskAlarm +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +*****************************************************************************/ +static void SimpleOsTime_SetTaskAlarm(uint8_t TaskId,uint16_t deltaTicks,uint16_t cycle) +{ + if(TaskId < (uint8_t)OS_TASK_MAX_NUM) + { + SimpleOsTime_Struct[TaskId].usAlarmCycleTime = cycle; + SimpleOsTime_Struct[TaskId].usAlarmTime = deltaTicks; + } +} + + +/***************************************************************************** +|Prototype : SimpleOsTime_Callback +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +*****************************************************************************/ +void SimpleOsTime_Callback(void) +{ + uint8_t TaskId; + + for(TaskId = 0; TaskId < OS_TASK_MAX_NUM; TaskId ++) + { + if((uint16_t)0u!= SimpleOsTime_Struct[TaskId].usAlarmTime) + { + SimpleOsTime_Struct[TaskId].usAlarmTime --; + } + if((uint16_t)0u== SimpleOsTime_Struct[TaskId].usAlarmTime) + { + (void)SimpleOs_ActiveTask(TaskId); + SimpleOsTime_Struct[TaskId].usAlarmTime = SimpleOsTime_Struct[TaskId].usAlarmCycleTime; + } + } +} \ No newline at end of file diff --git a/code_app_out/Source/SimpleOs/SimpleOs_Time.h b/code_app_out/Source/SimpleOs/SimpleOs_Time.h new file mode 100644 index 0000000..1ffddd3 --- /dev/null +++ b/code_app_out/Source/SimpleOs/SimpleOs_Time.h @@ -0,0 +1,56 @@ +/** ########################################################################## +** Filename : SimpleOs_Time.h +** Project : +** Module : +** Processor : +** Version : 1.0 +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20231103- V01-- --Linboyi--- --初版-- +** #########################################################################*/ +#ifndef SAMPLE_OS_TIME_H +#define SAMPLE_OS_TIME_H + + + + +/***************************************************************************** +* I N C L U D E F I L E S +*****************************************************************************/ + + +/***************************************************************************** +* D E F I N E S / M A C R O S +*****************************************************************************/ + + + +/***************************************************************************** +* T Y P E D E F I N I T I O N S +*****************************************************************************/ + + +/***************************************************************************** +* G L O B A L V A R I A B L E S +* only configuration table allowed here,variables are not allowed! +*****************************************************************************/ + +/***************************************************************************** +* C O N S T A N T S +*****************************************************************************/ + +/***************************************************************************** +* F U N C T I O N P R O T O T Y P E +*****************************************************************************/ +extern void SimpleOsTime_Init(void); +extern void SimpleOsTime_Callback(void); +#endif \ No newline at end of file diff --git a/code_app_out/Source/SimpleOs/SimpleOs_TimeCfg.h b/code_app_out/Source/SimpleOs/SimpleOs_TimeCfg.h new file mode 100644 index 0000000..add0fbb --- /dev/null +++ b/code_app_out/Source/SimpleOs/SimpleOs_TimeCfg.h @@ -0,0 +1,55 @@ +/** ########################################################################## +** Filename : SimpleOs_TimeCfg.h +** Project : +** Module : +** Processor : +** Version : 1.0 +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20231103- V01-- --Linboyi--- --初版-- +** #########################################################################*/ +#ifndef SAMPLE_OS_TIME_CFG_H +#define SAMPLE_OS_TIME_CFG_H + + + + +/***************************************************************************** +* I N C L U D E F I L E S +*****************************************************************************/ +#include "common_types.h" +/***************************************************************************** +* D E F I N E S / M A C R O S +*****************************************************************************/ + + + +/***************************************************************************** +* T Y P E D E F I N I T I O N S +*****************************************************************************/ +#define OSTIME_TICKS(x) ((uint16_t)(((uint32_t)(x) /(uint32_t)1000))) + +#define OSTIME_STOPTICKS (0xFFFFu) + +/***************************************************************************** +* G L O B A L V A R I A B L E S +* only configuration table allowed here,variables are not allowed! +*****************************************************************************/ + +/***************************************************************************** +* C O N S T A N T S +*****************************************************************************/ + +/***************************************************************************** +* F U N C T I O N P R O T O T Y P E +*****************************************************************************/ +#endif \ No newline at end of file diff --git a/code_app_out/Source/app/WheelHeat.c b/code_app_out/Source/app/WheelHeat.c new file mode 100644 index 0000000..10c0840 --- /dev/null +++ b/code_app_out/Source/app/WheelHeat.c @@ -0,0 +1,990 @@ +/** ########################################################################## +** Filename : WheelHeat.c +** Project : +** Module : +** Processor : +** Version : 1.0 +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20231107- V01-- --Linboyi--- --初版-- +** #########################################################################*/ + + + + +/***************************************************************************** +* I N C L U D E F I L E S +*****************************************************************************/ +#include "Cpu.h" +#include "common_types.h" +#include "common_memory.h" +#include "WheelHeat.h" +#include "Com_Cfg.h" +#include "adc.h" +#include "pwm_manage.h" +#include "Com.h" +#include "Com_Cfg.h" +#include "can_app.h" +#include "system_voltage_manage.h" +#include "system_voltage_manage_cfg.h" +#include "DEM_Cfg.h" +#include "Demm.h" +/***************************************************************************** +* D E F I N E S / M A C R O S11 +*****************************************************************************/ + +#define WHEEL_HEAT_STATE_ON 1u +#define WHEEL_HEAT_STATE_OFF 0u +#define WHEEL_HEAT_STATE_HOLD 2u +#define WHEEL_HEAT_STATE_HARD_FALUT 3u +#define WHEEL_HEAT_STATE_SLOW_DOWN 4u + + +#define WHEEL_HEAT_TIME_30MIN (1800000ul / 10ul) +#define WHEEL_HEAT_GEAR_OFF_CLOSE_DELAY_5S (5000ul / 10ul) +#define WHEEL_HEAT_OPEN_SHORT_DETECT_2S (2000ul / 10ul) +#define WHEEL_HEAT_OPEN_SHORT_DETECT_10S (10000ul / 10ul) + +#define TEMP_SENSOR_OPEN_ADC_RESULT 4900 +#define TEMP_SENSOR_SHORT_ADC_RESULT 100 + +#define WHEEL_HEAT_WIRE_ERROR_3S (3000ul / 10ul) +#define WHEEL_HEAT_WIRE_ERROR_2S (2950ul / 10ul) + +#define WHEEL_HEAT_SHORT_ADC_RESULT 640 +#define WHEEL_HEAT_OPEN_ADC_RESULT (uint8_t)50 +const uint16_t HEAT_LEVEL_NTC_TAB[WHEEL_HEAT_NTCLV_NUM] = +{ + WHEEL_HEAT_NTC_LV3,WHEEL_HEAT_NTC_LV1,WHEEL_HEAT_NTC_LV2,WHEEL_HEAT_NTC_LV3 +}; +/***************************************************************************** +* T Y P E D E F I N I T I O N S +*****************************************************************************/ +typedef struct +{ + uint8_t ucEvent; + //uint32_t ulRunTimer; + uint8_t ucEcuControlState; + uint8_t ucDcmControlState; + uint8_t ucIsControlByDcm; + //uint8_t ucErrorTimer; + uint16_t usOffGearDelay; + uint8_t ucGearEvent; + uint16_t ucTempSensorFalutTimer; + uint16_t u16OverCurrentFalutTimer; + uint8_t u16OverCurrentFlag; + uint32_t ulForceOutput; + uint16_t usSlowDownTimer; + uint16_t usSlowDownDuty; + uint16_t usSlowDownTimerStep; + uint8_t usDigNtcState; + uint8_t usDigOverCurrent; + uint8_t ucHeatGear; + uint8_t ucLimitAcc; + uint16_t ucHeatDigaTimeOpen; + //uint16_t ucHeatWireOpenTimeOpen; + uint16_t ucHeatDigaTime; + uint16_t ucHeatWireOpenTime; + uint16_t ucHeatWireShortTime; + uint8_t ucHeatWireOpenFlag; + uint8_t ucHeatWireShortFlag; + uint8_t ucHeatPowerOnFlag; + uint8_t ucHeatOnFlag; +}WheelHeat_Struct_Type; + + +/**************************************1*************************************** +* G L O B A L V A R I A B L E S +* only configuration table allowed here,variables are not allowed! +*****************************************************************************/ +static WheelHeat_Struct_Type WheelHeat_Struct; +/***************************************************************************** +* C O N S T A N T S +*****************************************************************************/ + +/***************************************************************************** +* F U N C T I O N P R O T O T Y P E +*****************************************************************************/ +static uint8_t WheelHeat_GetEvent(void); +static void WheelHeat_Handle(void); +static void WheelHeat_RunTime(void); +static uint8_t WheelHeat_GetGearEvevt(void); +static void WheelHeat_OffGearDelay(void); +static void WheelHeat_EventProcess(void); +static void WheelHeat_CanTxProcess(void); +static void WheelHeat_Diag(void); +/***************************************************************************** +|Prototype : WheelHeat_Init +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +*****************************************************************************/ +void WheelHeat_Init(void) +{ + common_memory_fill((uint8_t *)(&WheelHeat_Struct.ucEvent), 0u, sizeof(WheelHeat_Struct)); + WheelHeat_SetHeating_Gear(HEAT_LV3); + WheelHeat_Struct.ucHeatPowerOnFlag =HEAT_DIAG_ENABLE; +} + + + + +/***************************************************************************** +|Prototype : WheelHeat_SetEvent +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +*****************************************************************************/ +void WheelHeat_SetEvent(uint8_t Event) +{ + (void)System_DisableIrqGlobal(); + WheelHeat_Struct.ucEvent = Event; + (void)System_EnableIrqGlobal(); +} + +/***************************************************************************** +|Prototype : WheelHeat_Set_Heat_Limit_ACC +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +*****************************************************************************/ +void WheelHeat_Set_Heat_Limit_ACC(uint8_t Evevt) +{ + WheelHeat_Struct.ucLimitAcc = Evevt; +} +/***************************************************************************** +|Prototype : WheelHeat_GetEvent +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +*****************************************************************************/ +static uint8_t WheelHeat_GetEvent(void) +{ + uint8_t Event; + (void)System_DisableIrqGlobal(); + Event = WheelHeat_Struct.ucEvent; + if(COM_RXIPDUMETER_1_DIR_4BF_TIMEOUTFLAG ==HEAT_DIAG_ENABLE) + { + WheelHeat_Set_Heat_Limit_ACC(Heat_Limit_ACC_DISABLE); + } + if((WheelHeat_Struct.ucLimitAcc == Heat_Limit_ACC_Enbale) &&(WheelHeat_Struct.ucEcuControlState == WHEEL_HEAT_STATE_OFF)) + { + Event = WHEEL_HEAT_EVENT_IDLE; + } + WheelHeat_Struct.ucEvent = WHEEL_HEAT_EVENT_IDLE; + (void)System_EnableIrqGlobal(); + + return (Event); + + +} + +/***************************************************************************** +|Prototype : WheelHeat_Handle +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +*****************************************************************************/ +static void WheelHeat_Handle(void) +{ + uint16_t NTC_AdcResult; + uint8_t SystemVoltageMod; + uint8_t State; + + NTC_AdcResult = adc_get_voltage_value(1); + SystemVoltageMod = system_voltage_manage_mode_get(FUNC_SYSTEM_VOLTAGE_MANAGE_ID); + + if(WheelHeat_Struct.ucIsControlByDcm > 0u) + { + State = WheelHeat_Struct.ucDcmControlState; + } + else + { + if((SystemVoltageMod == SYSTEM_VOLTAGE_MODE_LOW) || (SystemVoltageMod == SYSTEM_VOLTAGE_MODE_HIGH)) + { + State = WHEEL_HEAT_STATE_OFF; + } + else + { + State = WheelHeat_Struct.ucEcuControlState; + } + + } + + switch(State) + { + case WHEEL_HEAT_STATE_OFF: + if(WheelHeat_Struct.ucHeatPowerOnFlag ==HEAT_DIAG_ENABLE) + { + WheelHeat_Wire_Short_Check_PowerOn(); + } + else + { + pwm_set_duty(PWM_BASE_ID_GPTM0, (uint8_t)1, (uint16_t)0); + } + break; + case WHEEL_HEAT_STATE_ON: + if(WheelHeat_Struct.ulForceOutput > 0) + { + pwm_set_duty(PWM_BASE_ID_GPTM0, (uint8_t)1, (uint16_t)1000); + WheelHeat_Struct.ulForceOutput --; + if(NTC_AdcResult <= 3081) + { + WheelHeat_Struct.ulForceOutput = 0; + WheelHeat_Struct.ucDcmControlState = WHEEL_HEAT_STATE_HOLD; + WheelHeat_Struct.ucEcuControlState = WHEEL_HEAT_STATE_HOLD; + } + if(WheelHeat_Struct.ulForceOutput == 0) + { + WheelHeat_Struct.ucDcmControlState = WHEEL_HEAT_STATE_SLOW_DOWN; + WheelHeat_Struct.ucEcuControlState = WHEEL_HEAT_STATE_SLOW_DOWN; + } + } + else + { + WheelHeat_HeatingGear_STATE_ON();//档位加热功能调用 + } + break; + case WHEEL_HEAT_STATE_HOLD: + WheelHeat_HeatingGear_STATE_HOLD();//档位加热功能调用 + break; + case WHEEL_HEAT_STATE_SLOW_DOWN: + WheelHeat_Struct.usSlowDownTimer ++; + if(WheelHeat_Struct.usSlowDownTimer >= WheelHeat_Struct.usSlowDownTimerStep) + { + WheelHeat_Struct.usSlowDownTimer = 0; + if(WheelHeat_Struct.usSlowDownDuty > (uint16_t)600) + { + WheelHeat_Struct.usSlowDownDuty -= (uint16_t)1; + pwm_set_duty(PWM_BASE_ID_GPTM0, (uint8_t)1, WheelHeat_Struct.usSlowDownDuty); + } + else + { + WheelHeat_Struct.ucDcmControlState = WHEEL_HEAT_STATE_HOLD; + WheelHeat_Struct.ucEcuControlState = WHEEL_HEAT_STATE_HOLD; + } + } + if(NTC_AdcResult <= 3081u) + { + WheelHeat_Struct.ucDcmControlState = WHEEL_HEAT_STATE_HOLD; + WheelHeat_Struct.ucEcuControlState = WHEEL_HEAT_STATE_HOLD; + } + break; + case WHEEL_HEAT_STATE_HARD_FALUT: + if(WheelHeat_Struct.ucHeatPowerOnFlag ==HEAT_DIAG_ENABLE) + { + WheelHeat_Wire_Short_Check_PowerOn(); + } + else + { + pwm_set_duty(PWM_BASE_ID_GPTM0, 1, 0); + } + break; + default: + while(1); + + } +} + + +/***************************************************************************** +|Prototype : WheelHeat_RunTime +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +*****************************************************************************/ +static void WheelHeat_RunTime(void) +{ + #if 0 //取消30分钟加热超时 + + if(WheelHeat_Struct.ucEcuControlState > WHEEL_HEAT_STATE_OFF) + { + if(WheelHeat_Struct.ulRunTimer < 0xfffffffful) + { + WheelHeat_Struct.ulRunTimer ++; + } + if(WheelHeat_Struct.ulRunTimer >= WHEEL_HEAT_TIME_30MIN) + { + WheelHeat_Struct.ucEcuControlState = WHEEL_HEAT_STATE_OFF; + } + } + else + { + WheelHeat_Struct.ulRunTimer = 0; + } + #endif +} + + +/***************************************************************************** +|Prototype : WheelHeat_SetGearEvevt +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +*****************************************************************************/ +void WheelHeat_SetGearEvevt(uint8_t Evevt) +{ + WheelHeat_Struct.ucGearEvent = Evevt; +} + +/***************************************************************************** +|Prototype : WheelHeat_SetHeating_Gear +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +*****************************************************************************/ +void WheelHeat_SetHeating_Gear(uint8_t Evevt) +{ + WheelHeat_Struct.ucHeatGear = Evevt; +} + +/***************************************************************************** +|Prototype : WheelHeat_SetHeating_Gear +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +*****************************************************************************/ +void WheelHeat_HeatingGear_STATE_ON(void) //维持在客户需求温度的加热功率 +{ + u8 heat_gear; + uint16_t NTC_AdcResult; + NTC_AdcResult = adc_get_voltage_value(1); + if(WheelHeat_Struct.ucHeatGear == 0u) + { + WheelHeat_Struct.ucHeatGear= HEAT_LV3; + } + heat_gear = WheelHeat_Struct.ucHeatGear; + switch(heat_gear) + { + case HEAT_LV1: + if(NTC_AdcResult <= 3690u) + { + pwm_set_duty(PWM_BASE_ID_GPTM0, 1, 400u); + WheelHeat_Struct.ucDcmControlState = WHEEL_HEAT_STATE_HOLD; + WheelHeat_Struct.ucEcuControlState = WHEEL_HEAT_STATE_HOLD; + } + else + { + pwm_set_duty(PWM_BASE_ID_GPTM0, 1, 1000); + } + break; + case HEAT_LV2: + if(NTC_AdcResult <= 3400u) + { + pwm_set_duty(PWM_BASE_ID_GPTM0, 1, 400); + WheelHeat_Struct.ucDcmControlState = WHEEL_HEAT_STATE_HOLD; + WheelHeat_Struct.ucEcuControlState = WHEEL_HEAT_STATE_HOLD; + } + else + { + pwm_set_duty(PWM_BASE_ID_GPTM0, 1, 1000); + } + break; + case HEAT_LV3: + if(NTC_AdcResult <= 3350u) + { + pwm_set_duty(PWM_BASE_ID_GPTM0, 1, 500); + WheelHeat_Struct.ucDcmControlState = WHEEL_HEAT_STATE_HOLD; + WheelHeat_Struct.ucEcuControlState = WHEEL_HEAT_STATE_HOLD; + } + else + { + pwm_set_duty(PWM_BASE_ID_GPTM0, 1, 1000); + } + break; + default: + break; + } +} + +/***************************************************************************** +|Prototype : WheelHeat_SetHeating_Gear +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +*****************************************************************************/ +void WheelHeat_HeatingGear_STATE_HOLD(void) +{ + u8 heat_gear; + uint16_t NTC_AdcResult; + NTC_AdcResult = adc_get_voltage_value(1); + if(WheelHeat_Struct.ucHeatGear == 0u) + { + WheelHeat_Struct.ucHeatGear= HEAT_LV3; + } + heat_gear = WheelHeat_Struct.ucHeatGear; + switch(heat_gear) + { + case HEAT_LV1: + if(NTC_AdcResult >= 3600u) + { + pwm_set_duty(PWM_BASE_ID_GPTM0, 1, 1000); + WheelHeat_Struct.ucDcmControlState = WHEEL_HEAT_STATE_ON; + WheelHeat_Struct.ucEcuControlState = WHEEL_HEAT_STATE_ON; + } + else if(NTC_AdcResult < 3510u) + { + pwm_set_duty(PWM_BASE_ID_GPTM0, 1, 0); + } + else + { + pwm_set_duty(PWM_BASE_ID_GPTM0, 1, 400); + } + break; + case HEAT_LV2: + if(NTC_AdcResult >= 3450u) + { + pwm_set_duty(PWM_BASE_ID_GPTM0, 1, 1000); + WheelHeat_Struct.ucDcmControlState = WHEEL_HEAT_STATE_ON; + WheelHeat_Struct.ucEcuControlState = WHEEL_HEAT_STATE_ON; + } + if(NTC_AdcResult < 3300u) + { + pwm_set_duty(PWM_BASE_ID_GPTM0, 1, 0); + } + else + { + pwm_set_duty(PWM_BASE_ID_GPTM0, 1, 400); + } + break; + case HEAT_LV3: + if(NTC_AdcResult >= 3280u) + { + pwm_set_duty(PWM_BASE_ID_GPTM0, 1, 1000); + WheelHeat_Struct.ucDcmControlState = WHEEL_HEAT_STATE_ON; + WheelHeat_Struct.ucEcuControlState = WHEEL_HEAT_STATE_ON; + } + if(NTC_AdcResult < 3200u) + { + pwm_set_duty(PWM_BASE_ID_GPTM0, 1, 0); + } + else + { + pwm_set_duty(PWM_BASE_ID_GPTM0, 1, 500); + } + break; + default: + break; + } +} + +/***************************************************************************** +|Prototype : WheelHeat_GetGearEvevt +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +*****************************************************************************/ +static uint8_t WheelHeat_GetGearEvevt(void) +{ + uint8_t Event; + + Event = WheelHeat_Struct.ucGearEvent; + WheelHeat_Struct.ucGearEvent = POWER_GEAR_EVENT_NULL; + + return (Event); +} + + +/***************************************************************************** +|Prototype : WheelHeat_OffGearDelay +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +*****************************************************************************/ +static void WheelHeat_OffGearDelay(void) +{ + uint8_t Event; + + Event = WheelHeat_GetGearEvevt(); + if(WheelHeat_Struct.usOffGearDelay) + { + WheelHeat_Struct.usOffGearDelay --; + if(WheelHeat_Struct.usOffGearDelay == 0u) + { + WheelHeat_Struct.ucEcuControlState = WHEEL_HEAT_STATE_OFF; + } + } + else + { + WheelHeat_Struct.usOffGearDelay = 0; + if(WheelHeat_Struct.ucEcuControlState > WHEEL_HEAT_STATE_OFF) + { + if(Event == POWER_GEAR_EVENT_OFF) + { + WheelHeat_Struct.usOffGearDelay = WHEEL_HEAT_GEAR_OFF_CLOSE_DELAY_5S; + } + } + } +} + +/***************************************************************************** +|Prototype : WheelHeat_ControlForDcm +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +*****************************************************************************/ +void WheelHeat_ControlForDcm(uint8_t Open) +{ + WheelHeat_Struct.ucIsControlByDcm = 1u; + if(Open) + { + if(WheelHeat_Struct.ucDcmControlState == WHEEL_HEAT_STATE_OFF) + { + WheelHeat_Struct.ucDcmControlState = WHEEL_HEAT_STATE_ON; + } + WheelHeat_Struct.ucTempSensorFalutTimer = 0; + WheelHeat_Struct.u16OverCurrentFalutTimer = 0; + } + else + { + WheelHeat_Struct.ucDcmControlState = WHEEL_HEAT_STATE_OFF; + } +} + + +/***************************************************************************** +|Prototype : WheelHeat_ReturnControlForEcu +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +*****************************************************************************/ +void WheelHeat_ReturnControlForEcu(void) +{ + WheelHeat_Struct.ucIsControlByDcm = 0u; +} + + +/***************************************************************************** +|Prototype : WheelHeat_EventProcess +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +*****************************************************************************/ +static void WheelHeat_EventProcess(void) +{ + uint8_t Event; + uint8_t PowerGear; + uint16_t NTC_AdcResult; + + Event = WheelHeat_GetEvent(); + NTC_AdcResult = adc_get_voltage_value(1); + can_app_receive_signal(COM_RXSIGBCM1_POWER_GEAR,&PowerGear); + + if(WHEEL_HEAT_EVENT_OPEN == Event) + { + if(PowerGear == POWER_GEAR_ON || PowerGear == POWER_GEAR_ACC) + { + if(WheelHeat_Struct.ucEcuControlState == WHEEL_HEAT_STATE_OFF) + { + WheelHeat_Struct.ucEcuControlState = WHEEL_HEAT_STATE_ON; + WheelHeat_Struct.ucHeatPowerOnFlag = HEAT_DIAG_DISABLE; + if(NTC_AdcResult >= TEMP_POSITIVE_0C && NTC_AdcResult < TEMP_NEGATIVE_5C) + { + WheelHeat_Struct.ulForceOutput = WHEEL_HEAT_FORCE_OUTPUT_4MIN; + WheelHeat_Struct.usSlowDownTimerStep = 600 / 10; + WheelHeat_Struct.usSlowDownTimer = 0; + WheelHeat_Struct.usSlowDownDuty = 1000; + } + else if(NTC_AdcResult >= TEMP_NEGATIVE_5C && NTC_AdcResult < TEMP_NEGATIVE_10C) + { + WheelHeat_Struct.ulForceOutput = WHEEL_HEAT_FORCE_OUTPUT_5MIN; + WheelHeat_Struct.usSlowDownTimerStep = 600 / 10; + WheelHeat_Struct.usSlowDownTimer = 0; + WheelHeat_Struct.usSlowDownDuty = 1000; + } + else if(NTC_AdcResult > TEMP_NEGATIVE_10C && NTC_AdcResult < TEMP_NEGATIVE_15C) + { + WheelHeat_Struct.ulForceOutput = WHEEL_HEAT_FORCE_OUTPUT_6MIN; + WheelHeat_Struct.usSlowDownTimerStep = 800 / 10; + WheelHeat_Struct.usSlowDownTimer = 0; + WheelHeat_Struct.usSlowDownDuty = 1000; + } + else if(NTC_AdcResult >= TEMP_NEGATIVE_15C && NTC_AdcResult < TEMP_NEGATIVE_25C) + { + WheelHeat_Struct.ulForceOutput = WHEEL_HEAT_FORCE_OUTPUT_10MIN; + WheelHeat_Struct.usSlowDownTimerStep = 1000 / 10; + WheelHeat_Struct.usSlowDownTimer = 0; + WheelHeat_Struct.usSlowDownDuty = 1000; + } + else if(NTC_AdcResult >= TEMP_NEGATIVE_25C) + { + WheelHeat_Struct.ulForceOutput = WHEEL_HEAT_FORCE_OUTPUT_8MIN; + WheelHeat_Struct.usSlowDownTimerStep = 1200 / 10; + WheelHeat_Struct.usSlowDownTimer = 0; + WheelHeat_Struct.usSlowDownDuty = 1000; + } + else + { + WheelHeat_Struct.ulForceOutput = 0; + } + } + //WheelHeat_Struct.ulRunTimer = 0; + WheelHeat_Struct.ucTempSensorFalutTimer = 0; + WheelHeat_Struct.u16OverCurrentFalutTimer = 0; + } + } + else if(WHEEL_HEAT_EVENT_CLOSE == Event) + { + if (WheelHeat_Struct.ucEcuControlState > WHEEL_HEAT_STATE_OFF) + { + WheelHeat_Struct.ucEcuControlState = WHEEL_HEAT_STATE_OFF; + } + } + else + { + + } +} + +/***************************************************************************** +|Prototype : WheelHeat_CanTxProcess +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +*****************************************************************************/ +static void WheelHeat_CanTxProcess(void) +{ + uint8_t Output; + uint8_t State; + + if(WheelHeat_Struct.ucIsControlByDcm > 0u) + { + State = WheelHeat_Struct.ucDcmControlState; + } + else + { + State = WheelHeat_Struct.ucEcuControlState; + } + if(State > WHEEL_HEAT_STATE_OFF) + { + Output = 0x02; + } + else + { + Output = 0x01; + } + if(State == WHEEL_HEAT_STATE_HARD_FALUT) + { + Output = 0x01; + } + Com_SendSignal(COM_TX_SIGSWS_C_SWH_STATE, &Output); + Output = WheelHeat_Struct.ucHeatGear; + Com_SendSignal(COM_TX_SIGSWS_C_HEAT_GEAR, &Output); +} + + +/***************************************************************************** +|Prototype : WheelHeat_Diag +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +*****************************************************************************/ +static void WheelHeat_Diag(void) +{ + uint16_t NTC_AdcResult; + uint16_t WheelHeatFeedbackAdcResult; + uint8_t State; + + if(WheelHeat_Struct.ucIsControlByDcm > 0u) + { + State = WheelHeat_Struct.ucDcmControlState; + } + else + { + State = WheelHeat_Struct.ucEcuControlState; + } + + WheelHeatFeedbackAdcResult = adc_get_voltage_value(ADC_LOGIC_CHANNEL_SNS); + NTC_AdcResult = adc_get_voltage_value(1); + + if(NTC_AdcResult >= TEMP_SENSOR_OPEN_ADC_RESULT) + { + WheelHeat_Struct.ucTempSensorFalutTimer ++; + if(WheelHeat_Struct.ucTempSensorFalutTimer >= WHEEL_HEAT_OPEN_SHORT_DETECT_2S) + { + WheelHeat_Struct.ucDcmControlState = WHEEL_HEAT_STATE_OFF; + WheelHeat_Struct.ucEcuControlState = WHEEL_HEAT_STATE_OFF; + dem_set_test_result(DTC_SWH_NTC_OPEN_INDEX,DTC_TEST_STATE_FAILED); + } + } + else if(NTC_AdcResult <= TEMP_SENSOR_SHORT_ADC_RESULT) + { + WheelHeat_Struct.ucTempSensorFalutTimer ++; + if(WheelHeat_Struct.ucTempSensorFalutTimer >= WHEEL_HEAT_OPEN_SHORT_DETECT_2S) + { + WheelHeat_Struct.ucDcmControlState = WHEEL_HEAT_STATE_OFF; + WheelHeat_Struct.ucEcuControlState = WHEEL_HEAT_STATE_OFF; + dem_set_test_result(DTC_SWH_NTC_SHORT_INDEX,DTC_TEST_STATE_FAILED); + + } + } + else + { + WheelHeat_Struct.ucTempSensorFalutTimer = 0; + dem_set_test_result(DTC_SWH_NTC_OPEN_INDEX,DTC_TEST_STATE_PASSED); + dem_set_test_result(DTC_SWH_NTC_SHORT_INDEX,DTC_TEST_STATE_PASSED); + } + + + + + if (State > WHEEL_HEAT_STATE_OFF) + { + if(WheelHeatFeedbackAdcResult >= WHEEL_HEAT_SHORT_ADC_RESULT) + { + WheelHeat_Struct.u16OverCurrentFalutTimer ++; + if(WheelHeat_Struct.u16OverCurrentFalutTimer >= WHEEL_HEAT_OPEN_SHORT_DETECT_10S) + { + WheelHeat_Struct.ucDcmControlState = WHEEL_HEAT_STATE_OFF; + WheelHeat_Struct.ucEcuControlState = WHEEL_HEAT_STATE_OFF; + WheelHeat_Struct.u16OverCurrentFlag = HEAT_DIAG_ENABLE; + dem_set_test_result(DTC_HEAT_OVERCURRENT_INDEX,DTC_TEST_STATE_FAILED); + WheelHeat_Struct.u16OverCurrentFalutTimer=0; + + } + } + else + { + if(WheelHeat_Struct.u16OverCurrentFlag == HEAT_DIAG_ENABLE) + { + dem_set_test_result(DTC_HEAT_OVERCURRENT_INDEX,DTC_TEST_STATE_PASSED); + } + WheelHeat_Struct.u16OverCurrentFlag = HEAT_DIAG_DISABLE; + WheelHeat_Struct.u16OverCurrentFalutTimer = 0; + } + } + else + { + if(WheelHeat_Struct.u16OverCurrentFlag == HEAT_DIAG_ENABLE) + { + dem_set_test_result(DTC_HEAT_OVERCURRENT_INDEX,DTC_TEST_STATE_PASSED); + } + WheelHeat_Struct.u16OverCurrentFalutTimer = 0; + WheelHeat_Struct.u16OverCurrentFlag = HEAT_DIAG_DISABLE; + } + + if((State == WHEEL_HEAT_STATE_OFF ) && (WheelHeat_Struct.ucHeatPowerOnFlag ==HEAT_DIAG_DISABLE)) + { + if(WheelHeatFeedbackAdcResult >= HEAT_CURRENT) + { + WheelHeat_Struct.ucHeatWireShortTime++; + if(WheelHeat_Struct.ucHeatWireShortTime>=WHEEL_HEAT_WIRE_ERROR_3S) + { + WheelHeat_Struct.ucHeatWireShortFlag = HEAT_DIAG_ENABLE; + dem_set_test_result(DTC_SWH_STRIP_SHORT_INDEX,DTC_TEST_STATE_FAILED); + WheelHeat_Struct.ucHeatWireShortTime=0; + WheelHeat_Struct.ucDcmControlState = WHEEL_HEAT_STATE_OFF; + WheelHeat_Struct.ucEcuControlState = WHEEL_HEAT_STATE_OFF; + } + } + if(WheelHeatFeedbackAdcResult<= HEAT_CURRENT) + { + if(WheelHeat_Struct.ucHeatWireShortFlag == HEAT_DIAG_ENABLE) + { + dem_set_test_result(DTC_SWH_STRIP_SHORT_INDEX,DTC_TEST_STATE_PASSED); + WheelHeat_Struct.ucHeatWireShortFlag = HEAT_DIAG_DISABLE; + } + WheelHeat_Struct.ucHeatWireShortTime = 0; + } + } + if(State > WHEEL_HEAT_STATE_OFF) + { + if(WheelHeat_Struct.ucHeatWireOpenFlag == HEAT_DIAG_ENABLE) + { + if(WheelHeatFeedbackAdcResult>= HEAT_CURRENT) + { + dem_set_test_result(DTC_SWH_STRIP_OPEN_INDEX,DTC_TEST_STATE_PASSED); + WheelHeat_Struct.ucHeatWireOpenFlag = HEAT_DIAG_DISABLE; + } + } + } + +} + +void WheelHeat_Wire_Short_Check_PowerOn(void) //开机自检 +{ + uint8_t PowerGear; + uint16_t WheelHeatFeedbackAdcResult; + can_app_receive_signal(COM_RXSIGBCM1_POWER_GEAR,&PowerGear); + WheelHeatFeedbackAdcResult = adc_get_voltage_value(ADC_LOGIC_CHANNEL_SNS); + if(PowerGear != POWER_GEAR_ON ) + { + pwm_set_duty(PWM_BASE_ID_GPTM0, 1, 0); + WheelHeat_Struct.ucHeatDigaTime=0; + } + else + { + pwm_set_duty(PWM_BASE_ID_GPTM0, 1, 300); + WheelHeat_Struct.ucHeatWireOpenTime++; + if(WheelHeatFeedbackAdcResult<= HEAT_CURRENT) + { + WheelHeat_Struct.ucHeatDigaTime++; + if(WheelHeat_Struct.ucHeatDigaTime>WHEEL_HEAT_WIRE_ERROR_2S) + { + dem_set_test_result(DTC_SWH_STRIP_OPEN_INDEX,DTC_TEST_STATE_FAILED); + WheelHeat_Struct.ucHeatWireOpenFlag = HEAT_DIAG_ENABLE; + WheelHeat_Struct.ucDcmControlState = WHEEL_HEAT_STATE_OFF; + WheelHeat_Struct.ucEcuControlState = WHEEL_HEAT_STATE_OFF; + WheelHeat_Struct.ucHeatDigaTime=0; + } + } + if(WheelHeat_Struct.ucHeatWireOpenTime >= WHEEL_HEAT_WIRE_ERROR_3S) + { + pwm_set_duty(PWM_BASE_ID_GPTM0, 1, 0); + WheelHeat_Struct.ucHeatPowerOnFlag = HEAT_DIAG_DISABLE; + WheelHeat_Struct.ucHeatWireOpenTime = 0; + WheelHeat_Struct.ucHeatDigaTime=0; + } + } +} + +void WheelHeat_Wire_Short_Check_Open(void) //打开加热检测 +{ + uint16_t NTC_AdcResult; + uint8_t heat_gear; + uint16_t WheelHeatFeedbackAdcResult; + WheelHeatFeedbackAdcResult = adc_get_voltage_value(ADC_LOGIC_CHANNEL_SNS); + NTC_AdcResult = adc_get_voltage_value(1); + heat_gear = WheelHeat_Struct.ucHeatGear; + if((WheelHeat_Struct.ucEcuControlState > WHEEL_HEAT_STATE_OFF) && (NTC_AdcResult>HEAT_LEVEL_NTC_TAB[heat_gear])) + { + if(WheelHeatFeedbackAdcResult<= HEAT_CURRENT) + { + WheelHeat_Struct.ucHeatDigaTimeOpen++; + if(WheelHeat_Struct.ucHeatDigaTimeOpen>WHEEL_HEAT_WIRE_ERROR_2S) + { + dem_set_test_result(DTC_SWH_STRIP_OPEN_INDEX,DTC_TEST_STATE_FAILED); + WheelHeat_Struct.ucHeatWireOpenFlag = HEAT_DIAG_ENABLE; + WheelHeat_Struct.ucDcmControlState = WHEEL_HEAT_STATE_OFF; + WheelHeat_Struct.ucEcuControlState = WHEEL_HEAT_STATE_OFF; + WheelHeat_Struct.ucHeatDigaTimeOpen=0; + } + } + else + { + WheelHeat_Struct.ucHeatDigaTimeOpen=0; + } + } + else + { + WheelHeat_Struct.ucHeatDigaTimeOpen=0; + } +} +/***************************************************************************** +|Prototype : WheelHeat_GetNtcState +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +*****************************************************************************/ +uint8_t WheelHeat_GetNtcState(void) +{ + return WheelHeat_Struct.usDigNtcState; +} + +/***************************************************************************** +|Prototype : WheelHeat_GetHeatOverCurrent +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +*****************************************************************************/ +uint8_t WheelHeat_GetHeatOverCurrent(void) +{ + return WheelHeat_Struct.usDigOverCurrent; +} + + +/***************************************************************************** +|Prototype : WheelHeat_MainFunction +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +*****************************************************************************/ +void WheelHeat_MainFunction(void) +{ + WheelHeat_EventProcess(); + WheelHeat_Handle(); + // WheelHeat_RunTime(); + WheelHeat_OffGearDelay(); + WheelHeat_Diag(); + WheelHeat_CanTxProcess(); + WheelHeat_Wire_Short_Check_Open(); +} + + + + + + + + + + diff --git a/code_app_out/Source/app/WheelHeat.h b/code_app_out/Source/app/WheelHeat.h new file mode 100644 index 0000000..c7f64a3 --- /dev/null +++ b/code_app_out/Source/app/WheelHeat.h @@ -0,0 +1,117 @@ +/** ########################################################################## +** Filename : WheelHeat.h +** Project : +** Module : +** Processor : +** Version : 1.0 +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20231107- V01-- --Linboyi--- --初版-- +** #########################################################################*/ +#ifndef WHEEL_HEAT_H +#define WHEEL_HEAT_H + + + + +/***************************************************************************** +* I N C L U D E F I L E S +*****************************************************************************/ +#include "common_types.h" +/***************************************************************************** +* D E F I N E S / M A C R O S +*****************************************************************************/ +#define WHEEL_HEAT_TASK_CYCLE_TIME 10u + + + +#define WHEEL_HEAT_EVENT_IDLE 0u +#define WHEEL_HEAT_EVENT_OPEN 1u +#define WHEEL_HEAT_EVENT_CLOSE 2u +#define WHEEL_HEAT_EVENT_LV1 3u +#define WHEEL_HEAT_EVENT_LV2 4u +#define WHEEL_HEAT_EVENT_LV3 5u + +#define WHEEL_HEAT_NTC_LV1 3600u +#define WHEEL_HEAT_NTC_LV2 3450u +#define WHEEL_HEAT_NTC_LV3 3280u + + +#define WHEEL_HEAT_NTCLV_NUM 4u + +/* NTC 温度 不代表加热盘温度 */ +#define TEMP_NEGATIVE_25C (uint16_t)4762 //-25℃ +#define TEMP_NEGATIVE_5C (uint16_t)4461 +#define TEMP_NEGATIVE_20C (uint16_t)4701 //-20℃ 加热功能强数据 +#define TEMP_NEGATIVE_15C (uint16_t)4610 //-15℃ +#define TEMP_NEGATIVE_10C (uint16_t)4551 //-10℃ +#define TEMP_POSITIVE_0C (uint16_t)4363 //0℃ +#define TEMP_POSITIVE_20C (uint16_t)4025 //15 +#define TEMP_POSITIVE_30C (uint16_t)3907 //20 +#define TEMP_POSITIVE_35C (uint16_t)3788 //25 +#define TEMP_POSITIVE_40C (uint16_t)3610 +#define TEMP_POSITIVE_45C (uint16_t)3552 // 35 +#define TEMP_POSITIVE_48C (uint16_t)3452 // 38 +#define TEMP_POSITIVE_50C (uint16_t)3420 //41 +#define TEMP_POSITIVE_55C (uint16_t)3350 //45 +#define TEMP_POSITIVE_56C (uint16_t)3335 + + +#define WHEEL_HEAT_FORCE_OUTPUT_4MIN ((4u*60u*1000u) / WHEEL_HEAT_TASK_CYCLE_TIME) +#define WHEEL_HEAT_FORCE_OUTPUT_5MIN ((5u*60u*1000u) / WHEEL_HEAT_TASK_CYCLE_TIME) +#define WHEEL_HEAT_FORCE_OUTPUT_6MIN ((6u*60u*1000u) / WHEEL_HEAT_TASK_CYCLE_TIME) +#define WHEEL_HEAT_FORCE_OUTPUT_7MIN ((7u*60u*1000u) / WHEEL_HEAT_TASK_CYCLE_TIME) +#define WHEEL_HEAT_FORCE_OUTPUT_8MIN ((8u*60u*1000u) / WHEEL_HEAT_TASK_CYCLE_TIME) +#define WHEEL_HEAT_FORCE_OUTPUT_10MIN ((10u*60u*1000u) / WHEEL_HEAT_TASK_CYCLE_TIME) + +#define WHEEL_HEAT_NTC_NORMAL 0u +#define WHEEL_HEAT_NTC_SHORT 1u +#define WHEEL_HEAT_NTC_OPEN 2u +#define WHEEL_HEAT_OVERCURRENT 1u + +#define HEAT_DIAG_DISABLE 0u +#define HEAT_DIAG_ENABLE 1u + +#define HEAT_CURRENT 50u + +/***************************************************************************** +* T Y P E D E F I N I T I O N S +*****************************************************************************/ +#define WHEEL_HEAT_DCM_CONTROL_OPEN 1u +#define WHEEL_HEAT_DCM_CONTROL_CLOSE 0u +/***************************************************************************** +* G L O B A L V A R I A B L E S +* only configuration table allowed here,variables are not allowed! +*****************************************************************************/ + +/***************************************************************************** +* C O N S T A N T S +*****************************************************************************/ + +/***************************************************************************** +* F U N C T I O N P R O T O T Y P E +*****************************************************************************/ +extern void WheelHeat_SetEvent(uint8_t Event); +extern void WheelHeat_MainFunction(void); +extern void WheelHeat_Init(void); +extern void WheelHeat_SetGearEvevt(uint8_t Evevt); +extern void WheelHeat_ControlForDcm(uint8_t Open); +void WheelHeat_Set_Heat_Limit_ACC(uint8_t Evevt); +void WheelHeat_ReturnControlForEcu(void); +void WheelHeat_SetHeating_Gear(uint8_t Evevt); +uint8_t WheelHeat_GetHeatOverCurrent(void); +uint8_t WheelHeat_GetNtcState(void); +void WheelHeat_HeatingGear_STATE_ON(void); +void WheelHeat_HeatingGear_STATE_HOLD(void); +void WheelHeat_Wire_Short_Check_PowerOn(void); + +#endif \ No newline at end of file diff --git a/code_app_out/Source/app/app_encoder.c b/code_app_out/Source/app/app_encoder.c new file mode 100644 index 0000000..c22cce4 --- /dev/null +++ b/code_app_out/Source/app/app_encoder.c @@ -0,0 +1,130 @@ +#include "app_encoder.h" +#include "key_encoder_driver.h" +#include "key_app.h" +#include "Com_Cfg.h" +#include "can_app.h" +#define APP_ENCODER_TASK_PERIOD_TIME 10u + +#define APP_ENCODER_DELAY_TIME_300MS (300u / APP_ENCODER_TASK_PERIOD_TIME) + + +struct tag_app_encoder +{ + uint8_t delay; +}; + +static struct tag_app_encoder app_encoder; + + +void app_encoder_init(void) +{ + app_encoder.delay = 0; +} + + + +void app_encoder_delay_set(void) +{ + app_encoder.delay = APP_ENCODER_DELAY_TIME_300MS; +} + +void app_encoder_task(void) +{ + uint8_t encoder_event; + uint8_t key_state[NUM_OF_MULTI_MEDIA_KEY]; + uint8_t i; + uint8_t any_other_key_valid; + uint8_t output; + + encoder_event = key_encoder_get_event(); + + if(encoder_event == KEY_ENCODER_EVENT_UP) + { + key_state[KEY_APP_MULTI_MEDIA_VOL_PLUS_ID] = 1u; + key_state[KEY_APP_MULTI_MEDIA_VOL_SUB_ID] = 0u; + } + else if(encoder_event == KEY_ENCODER_EVENT_DOWN) + { + key_state[KEY_APP_MULTI_MEDIA_VOL_PLUS_ID] = 0u; + key_state[KEY_APP_MULTI_MEDIA_VOL_SUB_ID] = 1u; + } + else + { + key_state[KEY_APP_MULTI_MEDIA_VOL_PLUS_ID] = 0u; + key_state[KEY_APP_MULTI_MEDIA_VOL_SUB_ID] = 0u; + } + + key_state[KEY_MAPP_MULTI_MEDIA_VOL_VEDIO_ID] = key_adc_mid_get_result(KEY_ADC_ID_VEDIO); + key_state[KEY_APP_MULTI_MEDIA_VOL_LMENU_ID] = key_adc_mid_get_result(KEY_ADC_ID_LMENU); + key_state[KEY_APP_MULTI_MEDIA_CUSTOM_ID] = key_adc_mid_get_result(KEY_ADC_ID_CUSTOM); + + for(i = KEY_MAPP_MULTI_MEDIA_VOL_VEDIO_ID; i <= KEY_APP_MULTI_MEDIA_CUSTOM_ID; i ++) + { + if((key_state[i] == KEY_ADC_RESULT_UNKNOW) || (key_state[i] == KEY_ADC_RESULT_IDLE) || (key_state[i] == KEY_ADC_RESULT_FAULT)) + { + key_state[i] = 0u; + } + else + { + key_state[i] = 1u; + } + } + + key_state[KEY_APP_MULTI_MEDIA_PREV_ID] = key_digital_driver_get_state(KEY_DIGI_ID_PREV); + key_state[KEY_APP_MULTI_MEDIA_NEXT_ID] = key_digital_driver_get_state(KEY_DIGI_ID_NEXT); + key_state[KEY_APP_MULTI_MEDIA_VOL_VOICE_ID] = key_digital_driver_get_state(KEY_DIGI_ID_VOICE); + key_state[KEY_APP_MULTI_MEDIA_VOL_CALL_ID] = key_digital_driver_get_state(KEY_DIGI_ID_PHONE); + key_state[KEY_APP_MULTI_MEDIA_VOL_RMENU_ID] = key_digital_driver_get_state(KEY_DIGI_ID_RMENU); + key_state[KEY_APP_MULTI_MEDIA_VOL_MUTE_ID] = key_digital_driver_get_state(KEY_DIGI_ID_MUTE); + + for(i = KEY_APP_MULTI_MEDIA_PREV_ID; i <=KEY_APP_MULTI_MEDIA_VOL_MUTE_ID; i ++) + { + if(key_state[i] == KEY_DIGITAL_DRIVER_STATE_UP) + { + key_state[i] = 0u; + } + else + { + key_state[i] = 1u; + } + } + + any_other_key_valid = 0; + for(i = KEY_MAPP_MULTI_MEDIA_VOL_VEDIO_ID; i <= KEY_APP_MULTI_MEDIA_VOL_MUTE_ID; i ++) + { + if(key_state[i]) + { + any_other_key_valid = 1u; + break; + } + } + + if(app_encoder.delay) + { + app_encoder.delay --; + } + else + { + if(any_other_key_valid == 0u) + { + if(key_state[KEY_APP_MULTI_MEDIA_VOL_PLUS_ID]) + { + /* 音量 + */ + output = 0x01u; + app_sig_sws_r_multimedia_tx_process(output, 1, 1); + + } + else if(key_state[KEY_APP_MULTI_MEDIA_VOL_SUB_ID]) + { + /* 音量 - */ + output = 0x04u; + app_sig_sws_r_multimedia_tx_process(output, 1, 1); + } + else + { + + } + } + } + +} \ No newline at end of file diff --git a/code_app_out/Source/app/app_encoder.h b/code_app_out/Source/app/app_encoder.h new file mode 100644 index 0000000..c104269 --- /dev/null +++ b/code_app_out/Source/app/app_encoder.h @@ -0,0 +1,9 @@ +#ifndef APP_ENCODER_H +#define APP_ENCODER_H + + + +void app_encoder_task(void); +void app_encoder_init(void); +void app_encoder_delay_set(void); +#endif \ No newline at end of file diff --git a/code_app_out/Source/app/boot_app.c b/code_app_out/Source/app/boot_app.c new file mode 100644 index 0000000..6b1f684 --- /dev/null +++ b/code_app_out/Source/app/boot_app.c @@ -0,0 +1,381 @@ +/** + ****************************************************************************** + * @file + * @author + * @version + * @date + * @brief + * @function List: + ****************************************************************************** + * @attention + * + * + *

© COPYRIGHT 2021

+ ****************************************************************************** + * @History: + * @Author: + * @Data: + * @Version: +*/ + + +//#include "includes.h" +//#include "error.h" +#include "boot_app.h" +#ifdef LIN_ENABLE +#include "lin_app.h" +#endif +#include "nvm.h" +//#include "lin_commontl_api.h" +//#include "lin_slave_diag.h" +#include "common_cfg.h" +#include "can_cfg.h" +#include "ComStack_Types.h" +#include "Dcm_Cfg.h" +#include "CanIf_Cfg.h" + + +#if 0 //最后的 app valid flag,应该在boot区成功时，要写入，記得debug時，要開啟 + #pragma CONST_SEG MEMORY_MAP_ROM_APP_FLAG_END + const u8 AppValid[16] = {0xaa,0xaa,0x04,0xe5,0xaa,0xaa,0x04,0xe5,0xaa,0xaa,0x04,0xe5,0xaa,0xaa,0x04,0xe5}; //APP_VALID_FLAG_ADDR + #pragma CONST_SEG DEFAULT +#else +MEMORY_MAP_FLAG_NO_OPTIME const u8 AppValid[16] = {0xaa,0xaa,0x04,0xe5,0xaa,0xaa,0x04,0xe5,0xaa,0xaa,0x04,0xe5,0xaa,0xaa,0x04,0xe5}; +#endif + + +//片区开头的标志 +MEMORY_MAP_FLAG_NO_OPTIME volatile const MEMORY_MAP_ROM_APP_VALID u8 AppValid1[16] = {0xaa,0xaa,0x04,0xe5,0xaa,0xaa,0x04,0xe5,0xaa,0xaa,0x04,0xe5,0xaa,0xaa,0x04,0xe5}; // APP_VALID_FLAG1_ADDR + +MEMORY_MAP_FLAG_NO_OPTIME volatile const MEMORY_MAP_ROM_APP_RES u8 AppValid_in[4] = {0x12,0x34,0x56,0x78}; //注意，為了校驗地址，範圍，必須開啟，該標志。 // APP_VALID_FLAG_IN_ADDR + + +u8 boot_app_check_flag_default(void); +void boot_app_response_default_success(void); + +//static void Boot_SendEcuResetRespones(void); + +//static u8 Boot_IsValidFlag(u8 flagId); +static void Boot_SetFlag(u8 flagId); + +//static u8 Boot_MemCpy(u8 * des, const u8 *src, u32 size); + +#ifndef RAM_OPTIMIZE_EN +__IO static u32 g_read_valid; +#endif + +/* BEGIN_FUNCTION_HDR +************************************************************************************************ +* Function Name : Boot_ReprogramCallBack +* +* Description : Set the reprogramming flag and reset the ECU. +* +* Inputs : none +* +* Outputs : none +* +* Limitations : Only for Bootloader +* +************************************************************************************************ +END_FUNCTION_HDR */ +void Boot_ReprogramCallBack(u8 flag_res) +{ + /*set reprogram flag*/ + Boot_SetFlag(flag_res); //FLAG_REPROGRAM_ID + /*reset ECU*/ + ResetMCUHandle(); +} +//专门给lin用的 +void Boot_Reprogram_only_writeram(void) +{ + /*set reprogram flag*/ + Boot_SetFlag(FLAG_REPROGRAM_ID); + /*reset ECU*/ + //ResetMCUHandle(); +} +/* BEGIN_FUNCTION_HDR +************************************************************************************************ +* Function Name : Boot_ResetMCUCallBack +* +* Description : Reset the ECU. +* +* Inputs : none +* +* Outputs : none +* +* Limitations : Only for Bootloader +* +************************************************************************************************ +END_FUNCTION_HDR */ +void Boot_ResetMCUCallBack(void) +{ + /*set reprogram flag*/ + Boot_SetFlag(FLAG_RESET_ID); + /*reset ECU*/ + ResetMCUHandle(); +} + +/* BEGIN_FUNCTION_HDR +************************************************************************************************ +* Function Name : Boot_SetFlag +* +* Description : Set the reprogramming flag. +* +* Inputs : none +* +* Outputs : none +* +* Limitations : Only for Bootloader +* +************************************************************************************************ +END_FUNCTION_HDR */ +static void Boot_SetFlag(u8 flagId) +{ + u32 addr = 0xFFFFFFFFUL; + //u32 data = 0xFFFFFFFFUL; + const u8 l_data[FLAG_REPROGRAM_LEN] ={FLAG_REPROGRAM_u8_DATA0,FLAG_REPROGRAM_u8_DATA1,FLAG_REPROGRAM_u8_DATA2,FLAG_REPROGRAM_u8_DATA3}; + const u8 l_data1[FLAG_REPROGRAM_LEN] ={FLAG_REPROGRAM_u8_DATA0+1u,FLAG_REPROGRAM_u8_DATA1+1u,FLAG_REPROGRAM_u8_DATA2+1u,FLAG_REPROGRAM_u8_DATA3+1u}; + u8 l_buf[FLAG_REPROGRAM_LEN]; + switch (flagId) + { + case FLAG_REPROGRAM_ID: + addr = FLAG_REPROGRAM_ADDR; + //data = FLAG_REPROGRAM_DATA; + l_buf[0]=l_data[0]; + l_buf[1]=l_data[1]; + l_buf[2]=l_data[2]; + l_buf[3]=l_data[3]; + break; + case FLAG_RESET_ID: + addr = FLAG_REPROGRAM_ADDR; + l_buf[0]=0; + l_buf[1]=0; + l_buf[2]=0; + l_buf[3]=0; + break; + case FLAG_REPROGRAM_NORES_ID: //用于 1001跳到 1002 不用应答 + addr = FLAG_REPROGRAM_ADDR; + l_buf[0]=l_data1[0]; + l_buf[1]=l_data1[1]; + l_buf[2]=l_data1[2]; + l_buf[3]=l_data1[3]; + break; + default : + /*code*/ + break; + } + + if (addr != 0xFFFFFFFFUL) + { + #if 0 + (void)FlagWriteHandle(addr,4,(uc8*)&l_buf); + #else + (void)ram_write_bytes(addr,(u8*)&l_buf[0],FLAG_REPROGRAM_LEN); + #endif + } +} + +#if 0 +static u8 Boot_MemCpy(u8 * des, const u8 *src, u32 size) /*PRQA S 3219*/ +{ + u32 i; + + for (i = 0; i < size; i++) + { + des[i] = src[i]; + } + + return 0; + +} +#endif + +/** +* @brief 初始化 +* @param input: +* @param output: +* @return none: +* @calls +* @calls by +* @others +*/ +void boot_app_init(void) +{ + #ifdef LIN_ENABLE + u8 i; /*PRQA S 3205*/ + u8 l_buf[8]; + u32 tempP2Star; + #endif + u32 l_temp; + + #if 0 + boot_app_clear_flag(); + (void)in_flash_read_words(&g_boot_flag_info,in_flash_get_boot_log_s_addr() ,IN_FLASH_LOG_LEN_BOOT_WORKS); + if(g_boot_flag_info == BOOT_APP_FLAG_IS_BOOT_SUCCESS) + { + boot_app_jump_to_app(); + } + #endif + #ifndef RAM_OPTIMIZE_EN + g_read_valid = AppValid[0] ; + #else + l_temp = AppValid[0] ; + #endif + ram_read_bytes(FLAG_JUMP_TO_BOOT_RESPONSE_ADDR,(u8*)&l_temp,FLAG_JUMP_TO_BOOT_RESPONSE_LEN); + #ifdef LIN_ENABLE + switch(l_temp) + { + case FLAG_JUMP_TO_APP_RESPONSE_11_01: /*PRQA S 0597*/ + //l_buf[0] = LIN_SALVE_DIAG_NAD; + l_buf[0] = 0x02; + l_buf[1] = 0x51; + l_buf[2] = 0x01; + //l_buf[4] = 0xff; + //l_buf[5] = 0xff; + //l_buf[6] = 0xff; + //l_buf[7] = 0xff; + //ld_put_raw(&l_buf[0]); + ld_send_message((u16)l_buf[0],&l_buf[1]); //TEMP_CLOSE + break; + case FLAG_JUMP_TO_APP_RESPONSE_11_03: /*PRQA S 0597*/ + //l_buf[0] = LIN_SALVE_DIAG_NAD; + l_buf[0] = 0x02; + l_buf[1] = 0x51; + l_buf[2] = 0x03; + //l_buf[4] = 0xff; + //l_buf[5] = 0xff; + //l_buf[6] = 0xff; + //l_buf[7] = 0xff; + //ld_put_raw(&l_buf[0]); + ld_send_message((u16)l_buf[0],&l_buf[1]); //TEMP_CLOSE + break; + case FLAG_JUMP_TO_APP_RESPONSE_10_02: /*PRQA S 0597*/ + #if 0 + l_buf[0] = LIN_SALVE_DIAG_NAD; + for(i=0;i<7;i++) + { + l_buf[i+1] = gs_ReprogrammingResponse[i]; + } + ld_put_raw(LI0,&l_buf[0]); + #endif + break; + case FLAG_JUMP_TO_APP_RESPONSE_10_01: /*PRQA S 0597*/ + //l_buf[0] = LIN_SALVE_DIAG_NAD; + l_buf[0] = 0x06; + l_buf[1] = 0x50; + l_buf[2] = 0x01; + l_buf[3] = (u8)(50>>8); + l_buf[4] = (u8)(50); + tempP2Star=5000/10; + l_buf[5] = (u8)(tempP2Star>>8); /*PRQA S 2984*/ + l_buf[6] = (u8)(tempP2Star); + //ld_put_raw(&l_buf[0]); + ld_send_message((u16)l_buf[0],&l_buf[1]); //TEMP_CLOSE + break; + default: + break; + } + #endif + if(boot_app_check_flag_default()==TRUE) + { + //要发送信号，表示成功进入默认会话 + boot_app_response_default_success(); + //boot_app_check_flag_clear_default(); + } + //flash_drv_ram_read(); + l_temp = FLAG_JUMP_TO_BOOT_RESPONSE_INIT; + ram_write_bytes(FLAG_JUMP_TO_BOOT_RESPONSE_ADDR,(u8*)&l_temp,FLAG_JUMP_TO_BOOT_RESPONSE_LEN); +} + + +/** +* @brief +* @param input: +* @param output: +* @return none: +* @calls +* @calls by +* @others +*/ +void boot_app_task(void) +{ + #ifndef RAM_OPTIMIZE_EN + g_read_valid += 1u; + #endif +} + + + + + /** + * @brief 初始化 + * @param input: + * @param output: + * @return none: + * @calls + * @calls by + * @others + */ +void boot_app_jump_to_app(void) +{ + +} + + + + + +u8 boot_app_check_flag_default(void) +{ + u8 i=0; /*PRQA S 2981*/ + u8 l_buf[FLAG_JUMP_TO_BOOT_RESPONSE_LEN]; + const u8 l_buf_init[FLAG_JUMP_TO_BOOT_RESPONSE_LEN]={FLAG_REPROGRAM_u8_DATA0,FLAG_REPROGRAM_u8_DATA1,FLAG_REPROGRAM_u8_DATA2,FLAG_REPROGRAM_u8_DATA3}; + u8 l_result=TRUE; + + (void)ram_read_bytes(FLAG_JUMP_TO_BOOT_RESPONSE_ADDR,(u8*)&l_buf[0],FLAG_JUMP_TO_BOOT_RESPONSE_LEN); + + for(i=0u;i>8); + l_buf[4]=(uint8)(gDcmDspSessionRow[0].DcmDspSessionP2ServerMax); + l_temp=(u16)(gDcmDspSessionRow[0].DcmDspSessionP2StarServerMax/10u); + l_buf[5]=(uint8)(l_temp>>8); + l_buf[6]=(uint8)(l_temp); + l_buf[7]=0xaa; + l_tx_pdu.SduLength =8; + l_tx_pdu.SduDataPtr =l_buf; + (void)CanIf_Transmit(ADPT_UDS_TX_HANDLE,&l_tx_pdu); //注意，1是pduid fot diag +} + + +#if 0 +void boot_app_check_flag_clear_default(void) +{ + const u8 l_buf[FLAG_JUMP_TO_BOOT_RESPONSE_LEN]={0}; + + (void)ram_write_bytes(FLAG_JUMP_TO_BOOT_RESPONSE_ADDR,(u8*)&l_buf[0],FLAG_JUMP_TO_BOOT_RESPONSE_LEN); + +} +#endif \ No newline at end of file diff --git a/code_app_out/Source/app/boot_app.h b/code_app_out/Source/app/boot_app.h new file mode 100644 index 0000000..888eabf --- /dev/null +++ b/code_app_out/Source/app/boot_app.h @@ -0,0 +1,72 @@ +/** + ****************************************************************************** + * @file + * @author + * @version + * @date + * @brief + * @function List: + ****************************************************************************** + * @attention + * + * + *

© COPYRIGHT 2021

+ ****************************************************************************** + * @History: + * @Author: + * @Data: + * @Version: +*/ + + + + +#ifndef __BOOT_APP_H__ +#define __BOOT_APP_H__ + + + + +#include "common_types.h" +#include "boot_app_cfg.h" + + +/*lint -e749 */ /* 枚舉 not referenced*/ +/*lint -e750 */ /* 宏 not referenced*/ +/*lint -e751 */ /* 變量 not referenced*/ +/*lint -e752 */ /* 函數 not referenced*/ +/*lint -e754 */ /* 結構體成員 not referenced*/ + + +void boot_app_init(void); +void boot_app_task(void); + +void boot_app_jump_to_app(void); + +extern void Boot_ResetProcess(void); + +extern void Boot_ReprogramCallBack(u8 flag_res); + +extern void Boot_ResetMCUCallBack(void); + +extern u8 Boot_FingerprintCallBack(u8 * readBuf,u32 readSize); +void Boot_Reprogram_only_writeram(void); + +void boot_app_test(void); + + + +//片区开头的标志 +extern volatile const u8 AppValid1[16] ; // APP_VALID_FLAG1_ADDR + +extern volatile const u8 AppValid_in[4] ; //注意，為了校驗地址，範圍，必須開啟，該標志。 // APP_VALID_FLAG_IN_ADDR + + + +#endif /* __BOOT_APP_H__ */ + + + + + + diff --git a/code_app_out/Source/app/boot_app_cfg.c b/code_app_out/Source/app/boot_app_cfg.c new file mode 100644 index 0000000..485e2a6 --- /dev/null +++ b/code_app_out/Source/app/boot_app_cfg.c @@ -0,0 +1,36 @@ +/** + ****************************************************************************** + * @file + * @author + * @version + * @date + * @brief + * @function List: + ****************************************************************************** + * @attention + * + * + *

© COPYRIGHT 2021

+ ****************************************************************************** + * @History: + * @Author: + * @Data: + * @Version: +*/ + +#include "boot_app.h" + + +/** + * @brief + * @param input: + * @param output: + * @return none: + * @calls + * @calls by + * @others + */ + + + + diff --git a/code_app_out/Source/app/boot_app_cfg.h b/code_app_out/Source/app/boot_app_cfg.h new file mode 100644 index 0000000..fdb2b0b --- /dev/null +++ b/code_app_out/Source/app/boot_app_cfg.h @@ -0,0 +1,157 @@ +/** ########################################################################## +** Filename : +** Project : +** Module : +** Processor : +** Version : +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20230602- --V1.0-- --mingyea--- --修改-- + +** #########################################################################*/ + + +#ifndef BOOT_APP_CFG_H__ +#define BOOT_APP_CFG_H__ + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ +#include "common_types.h" +#include "common_cfg.h" +#include "gpio.h" + +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ +//暫時放這裡 手冊上可能不是這地址 +#define FLASH_APP_BASE ((uint32_t)0x00008000) /*!< FLASH(up to 1 MB) base address in the alias region */ +#define FLASH_ASW_MAX_ADDR 0x0001C000u //0x0003A000 //0X7D000-0X7FFFF 預留為其他用途 +// app 的偏移地址 +// app 的偏移地址 +#define BOOT_APP_START FLASH_APP_BASE +#define BOOT_APP_VECTOR_OFFSET 0x00000100u +//app的起始地址 +//app的起始地址 +#define APP_ADRRESS_START BOOT_APP_START //(FLASH_APP_BASE + BOOT_APP_START) +#define APP_ADRRESS_VECTOR BOOT_APP_VECTOR_OFFSET //(FLASH_APP_BASE + BOOT_APP_VECTOR_OFFSET) + + +#define APP_VALID_ADDR_OFFSET 0x10u //0X100 //倒推回來的偏移地址 +//app 的 有效標志所在的地址 +#define APP_VALID_FLAG1_ADDR (APP_ADRRESS_START) //144 开头的地址， +#define APP_VALID_FLAG_ADDR (FLASH_ASW_MAX_ADDR-APP_VALID_ADDR_OFFSET) //0xFF9FF0 +#define APP_VALID_FLAG_IN_ADDR 0x0001BFCCu // //(FLASH_P_BLOCK_SIZES-APP_VALID_ADDR_OFFSET) //144最大12k = 0x0008 0000 +#define BOOT_CALIBRATION_START_ADDR 0x00007800u +#define APP_CALIBRATION_START_ADDR 0x0001BBCCu + +#define P_APP_VALID_FLAG_ADDR_U32 ((u32 *)APP_VALID_FLAG_ADDR) +#define P_APP_VALID_FLAG_ADDR_U8 ((u8 *)APP_VALID_FLAG_ADDR) +#define FLAG_APP_VALID_FLAG_DATA 0xAAAA04E5ul //app valid flag +#define FLAG_APP_VALID_FLAG_DATA0 0xaau //app valid flag +#define FLAG_APP_VALID_FLAG_DATA1 0xaau //app valid flag +#define FLAG_APP_VALID_FLAG_DATA2 0x04u //app valid flag +#define FLAG_APP_VALID_FLAG_DATA3 0xe5u //app valid flag + +//以下從 fe-5ha移植 +#define FLAG_REPROGRAM_ID 0x01U +#define FLAG_REPROGRAM_NORES_ID 0x02U +#define FLAG_RESET_ID 0x03U +#define FLAG_FINGERPRINT_ID 0x04U + + +//這是RAM 相關的，重擦除標志 +#define FLAG_BASE_SIZE 0x04U + + +//#define APP_USER_CONST_ADDR_OFFSET 0X800 //倒推回來的偏移地址--用戶一些用戶數據 +//#define APP_USER_CONST_ADDR (FLASH_ASW_MAX_ADDR-APP_USER_CONST_ADDR_OFFSET) //144 最大512k = 0x0008 0000 + +#define FLAG_BASE_ADDR 0x20007FC0u //0x1200U //0x3FF8U + + +#define FLAG_REPROGRAM_ADDR (FLAG_BASE_ADDR + 0u) //重編程請求的地址 + +#define FLAG_REPROGRAM_LEN 4u +#define FLAG_REPROGRAM_DATA 0xA5A5E534U //重編程請求的值 + +#define FLAG_REPROGRAM_u8_DATA0 0xA5U //重編程請求的值 +#define FLAG_REPROGRAM_u8_DATA1 0xA5U //重編程請求的值 +#define FLAG_REPROGRAM_u8_DATA2 0xE5U //重編程請求的值 +#define FLAG_REPROGRAM_u8_DATA3 0x34U //重編程請求的值 + + +#define FLAG_JUMP_TO_BOOT_RESPONSE_ADDR (u32)(FLAG_BASE_ADDR + 0x04u) //標志，用於跳轉到boot時，要應答的數據； +#define FLAG_JUMP_TO_BOOT_RESPONSE_LEN (4u) //標志，用於跳轉到boot時，要應答的數據； +#define FLAG_JUMP_TO_BOOT_RESPONSE_INIT ((u32)0xaa769021) //無效值 +#define FLAG_JUMP_TO_BOOT_RESPONSE_11_01 ((u32)0x554b1101) //復位的應答 +#define FLAG_JUMP_TO_BOOT_RESPONSE_11_03 ((u32)0x554b1103) //復位的應答 +#define FLAG_JUMP_TO_BOOT_RESPONSE_10_02 ((u32)0x554b1002) //編程的應答 +#define FLAG_JUMP_TO_BOOT_RESPONSE_10_01 ((u32)0x554b1001) //默認的應答 +#define FLAG_JUMP_TO_APP_RESPONSE_11_01_PRE ((u32)0x55491101) //復位的應答----因为跳转前，先又进入boot，所以加以区分 +#define FLAG_JUMP_TO_APP_RESPONSE_11_03_PRE ((u32)0x55491103) //復位的應答 +#define FLAG_JUMP_TO_APP_RESPONSE_10_02_PRE ((u32)0x55491002) //編程的應答 +#define FLAG_JUMP_TO_APP_RESPONSE_10_01_PRE ((u32)0x55491001) //默認的應答 +#define FLAG_JUMP_TO_APP_RESPONSE_11_01 ((u32)0x554a1101) //復位的應答----因为跳转前，先又进入boot，所以加以区分 +#define FLAG_JUMP_TO_APP_RESPONSE_11_03 ((u32)0x554a1103) //復位的應答 +#define FLAG_JUMP_TO_APP_RESPONSE_10_02 ((u32)0x554a1002) //編程的應答 +#define FLAG_JUMP_TO_APP_RESPONSE_10_01 ((u32)0x554a1001) //默認的應答 + +#if 1 +#define FLAG_RAM_WDOG_ADDR 0x20007800 //看門狗在ram中運行 +#define FLAG_RAM_DRIVER_ADDR 0x20007000 //驅動在driver中運行 +#define FLAG_RAM_RE_START_ADDR FLAG_RAM_DRIVER_ADDR +#endif + +#define RAM_WDOG_ADDR FLAG_RAM_WDOG_ADDR //看門狗在ram中運行--和icf上一致 ，目前用来别的用途 +#define RAM_NO_INIT_ADDR 0x20007C00u //看門狗在ram中運行--和icf上一致 ，目前用来别的用途 +//#define FlagReadHandle(addr,size,buf) Boot_MemCpy((u8 *)buf,(const u8 *)addr,size) +//#define FlagWriteHandle(addr,size,buf) Boot_MemCpy((u8 *)addr,(const u8 *)buf,size) +#define ResetMCUHandle() SystemSoftwareReset() +//#define Boot_ComControlHandle() 0 +//#define Boot_CheckProgramming() 0 + + +//#define BOOT_APP_VALID_DEBUG_EN 1 //VALID FLAG 標志，后一個，開啟調試 + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ + + + +/*--------------------------------------------------------------------------- +- G L O B A L V A R I A B L E S +- only configuration table allowed here,variables are not allowed! +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ + + + + +#endif /* __BOOT_APP_CFG_H__ */ + + + + + + + diff --git a/code_app_out/Source/app/can_app.c b/code_app_out/Source/app/can_app.c new file mode 100644 index 0000000..b68bcca --- /dev/null +++ b/code_app_out/Source/app/can_app.c @@ -0,0 +1,720 @@ +#include "can_app.h" +#include "Com_Cfg.h" +#include "Com.h" +#include "led_app.h" +#include "common_memory.h" +#include "WheelHeat.h" +typedef struct +{ + uint8_t sws_r_multimedia; + uint8_t sws_r_left_menu; + uint8_t sws_r_voicd_expand_2; + uint8_t sws_r_auto_show_in; + uint8_t sws_r_auto_show_out; + uint8_t sws_r_mileage_clear; + uint8_t SWS_R_MediaReset; + uint8_t SWS_R_OtherRecover; +}event_sig_tx_valid_count_type; + + + +event_sig_tx_valid_count_type event_sig_tx_valid_count; + +IpduMPC_316_bufType app_can_mpc_316; +IpduMETER_055_bufType app_can_meter_055; +IpduBCM_1_12D_bufType app_can_bcm_1_12d; +IpduBCM_2_50D_bufType app_can_bcm_2_50d; +IpduMOD_4G_49A_bufType app_can_mod_4g_49a; +IpduMultimedia_385_bufType app_can_multimedia_385; +IpduCloud_services_0A2_bufType app_can_cloud_services_0a2; +IpduBCM_EvP2_394_bufType app_can_bcm_evp2_394; +IpduAir_condition_ctrl_2DB_bufType app_can_air_condition_ctrl_2db; +IpduVCU_40D_bufType app_can_vcu_40d; +IpduBCM_L_407_bufType app_can_bcm_l_407; +IpduMETER_1_dir_4BF_bufType app_can_meter_1_dir_4bf; +IpduBCM_R_4E6_bufType app_can_bcm_r_4e6; +IpduHEAT_4C1_bufType app_can_heat_4c1; +IpduADS_29C_bufType app_can_ads_29c; + + +uint8_t ucCAN_ControlBy; + + + +uint8_t CAN_GetControlBy(void) +{ + return (ucCAN_ControlBy); +} + +void CAN_SetControlBy(uint8_t ControlBy) +{ + ucCAN_ControlBy = ControlBy; +} + + +void can_app_init(void) +{ + common_memory_clear((uint8_t *)&event_sig_tx_valid_count, sizeof(event_sig_tx_valid_count)); + + common_memory_copys((uint8_t *)&app_can_mpc_316, (uint8_t *)&RxIpduMPC_316DefualtValue,sizeof(app_can_mpc_316)); + common_memory_copys((uint8_t *)&app_can_meter_055,(uint8_t *)&RxIpduMETER_055DefualtValue, sizeof(app_can_meter_055)); + common_memory_copys((uint8_t *)&app_can_bcm_1_12d, (uint8_t *)&RxIpduBCM_1_12DDefualtValue,sizeof(app_can_bcm_1_12d)); + common_memory_copys((uint8_t *)&app_can_bcm_2_50d, (uint8_t *)&RxIpduBCM_2_50DDefualtValue,sizeof(app_can_bcm_2_50d)); + common_memory_copys((uint8_t *)&app_can_mod_4g_49a, (uint8_t *)&RxIpduMOD_4G_49ADefualtValue,sizeof(app_can_mod_4g_49a)); + common_memory_copys((uint8_t *)&app_can_multimedia_385, (uint8_t *)&RxIpduMultimedia_385DefualtValue,sizeof(app_can_multimedia_385)); + common_memory_copys((uint8_t *)&app_can_cloud_services_0a2, (uint8_t *)&RxIpdCloud_services_0A2DefualtValue,sizeof(app_can_cloud_services_0a2)); + common_memory_copys((uint8_t *)&app_can_bcm_evp2_394, (uint8_t *)&RxIpduBCM_EvP2_394DefualtValue,sizeof(app_can_bcm_evp2_394)); + common_memory_copys((uint8_t *)&app_can_air_condition_ctrl_2db, (uint8_t *)&RxIpduAir_condition_ctrl_2DBDefualtValue,sizeof(app_can_air_condition_ctrl_2db)); + common_memory_copys((uint8_t *)&app_can_vcu_40d, (uint8_t *)&RxIpduVCU_40DDefualtValue,sizeof(app_can_vcu_40d)); + common_memory_copys((uint8_t *)&app_can_bcm_l_407, (uint8_t *)&RxIpduBCM_L_407DefualtValue,sizeof(app_can_bcm_l_407)); + common_memory_copys((uint8_t *)&app_can_meter_1_dir_4bf, (uint8_t *)&RxIpduMETER_1_dir_4BFDefualtValue,sizeof(app_can_meter_1_dir_4bf)); + common_memory_copys((uint8_t *)&app_can_bcm_r_4e6, (uint8_t *)&RxIpduBCM_R_4E6DefualtValue,sizeof(app_can_bcm_r_4e6)); + common_memory_copys((uint8_t *)&app_can_heat_4c1, (uint8_t *)&RxIpduHEAT_4C1DefualtValue,sizeof(app_can_heat_4c1)); + common_memory_copys((uint8_t *)&app_can_ads_29c, (uint8_t *)&RxIpduADS_29CDefualtValue,sizeof(app_can_ads_29c)); +} + +void CanApp_WakeupProcess(void) +{ + common_memory_clear((uint8_t *)&event_sig_tx_valid_count, sizeof(event_sig_tx_valid_count)); + + common_memory_copys((uint8_t *)&app_can_mpc_316, (uint8_t *)&RxIpduMPC_316DefualtValue,sizeof(app_can_mpc_316)); + common_memory_copys((uint8_t *)&app_can_meter_055,(uint8_t *)&RxIpduMETER_055DefualtValue, sizeof(app_can_meter_055)); + common_memory_copys((uint8_t *)&app_can_bcm_2_50d, (uint8_t *)&RxIpduBCM_2_50DDefualtValue,sizeof(app_can_bcm_2_50d)); + common_memory_copys((uint8_t *)&app_can_mod_4g_49a, (uint8_t *)&RxIpduMOD_4G_49ADefualtValue,sizeof(app_can_mod_4g_49a)); + common_memory_copys((uint8_t *)&app_can_multimedia_385, (uint8_t *)&RxIpduMultimedia_385DefualtValue,sizeof(app_can_multimedia_385)); + common_memory_copys((uint8_t *)&app_can_cloud_services_0a2, (uint8_t *)&RxIpdCloud_services_0A2DefualtValue,sizeof(app_can_cloud_services_0a2)); + common_memory_copys((uint8_t *)&app_can_bcm_evp2_394, (uint8_t *)&RxIpduBCM_EvP2_394DefualtValue,sizeof(app_can_bcm_evp2_394)); + common_memory_copys((uint8_t *)&app_can_air_condition_ctrl_2db, (uint8_t *)&RxIpduAir_condition_ctrl_2DBDefualtValue,sizeof(app_can_air_condition_ctrl_2db)); + common_memory_copys((uint8_t *)&app_can_vcu_40d, (uint8_t *)&RxIpduVCU_40DDefualtValue,sizeof(app_can_vcu_40d)); + common_memory_copys((uint8_t *)&app_can_bcm_l_407, (uint8_t *)&RxIpduBCM_L_407DefualtValue,sizeof(app_can_bcm_l_407)); + common_memory_copys((uint8_t *)&app_can_meter_1_dir_4bf, (uint8_t *)&RxIpduMETER_1_dir_4BFDefualtValue,sizeof(app_can_meter_1_dir_4bf)); + common_memory_copys((uint8_t *)&app_can_bcm_r_4e6, (uint8_t *)&RxIpduBCM_R_4E6DefualtValue,sizeof(app_can_bcm_r_4e6)); + common_memory_copys((uint8_t *)&app_can_heat_4c1, (uint8_t *)&RxIpduHEAT_4C1DefualtValue,sizeof(app_can_heat_4c1)); + common_memory_copys((uint8_t *)&app_can_ads_29c, (uint8_t *)&RxIpduADS_29CDefualtValue,sizeof(app_can_ads_29c)); +} + + + + +void app_mpc_316_rx_conf(void) +{ +} + + +void app_meter_055_rx_conf(void) +{ + uint8_t i; + for(i = 0; i < 8; i ++) + { + app_can_meter_055._c[i] = RxIpduMETER_055._c[i]; + } +} + +void app_bcm_1_12d_rx_conf(void) +{ + if(RxIpduBCM_1_12D.IpduBCM_1_12D.BCM1_power_gear != POWER_GEAR_INVALID) + { + if(app_can_bcm_1_12d.IpduBCM_1_12D.BCM1_power_gear != RxIpduBCM_1_12D.IpduBCM_1_12D.BCM1_power_gear) + { + if(RxIpduBCM_1_12D.IpduBCM_1_12D.BCM1_power_gear == POWER_GEAR_OFF) + { + WheelHeat_SetGearEvevt(POWER_GEAR_EVENT_OFF); + } + else if(RxIpduBCM_1_12D.IpduBCM_1_12D.BCM1_power_gear == POWER_GEAR_ACC) + { + WheelHeat_SetGearEvevt(POWER_GEAR_EVENT_ACC); + } + else if(RxIpduBCM_1_12D.IpduBCM_1_12D.BCM1_power_gear == POWER_GEAR_ON) + { + WheelHeat_SetGearEvevt(POWER_GEAR_EVENT_ON); + } + else + { + + } + } + app_can_bcm_1_12d.IpduBCM_1_12D.BCM1_power_gear = RxIpduBCM_1_12D.IpduBCM_1_12D.BCM1_power_gear; + } +} + +void app_bcm_2_50d_rx_conf(void) +{ +} + +void app_mod_4g_49a_rx_conf(void) +{ + uint8_t i; + uint8_t checksum; + checksum = (RxIpduMOD_4G_49A._c[0] + RxIpduMOD_4G_49A._c[1] \ + + RxIpduMOD_4G_49A._c[2] + RxIpduMOD_4G_49A._c[3] \ + + RxIpduMOD_4G_49A._c[4] + RxIpduMOD_4G_49A._c[5] \ + + RxIpduMOD_4G_49A._c[6]) ^ 0xffu; + if(checksum == RxIpduMOD_4G_49A._c[7]) + { + for(i = 0; i < 8; i ++) + { + app_can_mod_4g_49a._c[i] = RxIpduMOD_4G_49A._c[i]; + } + } +} + +void app_multimedia_385_rx_conf(void) +{ + + app_can_multimedia_385.IpduMultimedia_385.MULTIMEDIA_Sw_heat = RxIpduMultimedia_385.IpduMultimedia_385.MULTIMEDIA_Sw_heat; + if(app_can_multimedia_385.IpduMultimedia_385.MULTIMEDIA_Sw_heat == 0x01u) + { + (void)WheelHeat_SetEvent(WHEEL_HEAT_EVENT_CLOSE); + } + else if (app_can_multimedia_385.IpduMultimedia_385.MULTIMEDIA_Sw_heat == 0x02u) + { + (void)WheelHeat_SetEvent(WHEEL_HEAT_EVENT_OPEN); + WheelHeat_SetHeating_Gear(HEAT_LV3); + } + else + { + + } + + + +} + +void app_cloud_services_0a2_rx_conf(void) +{ + + app_can_cloud_services_0a2.IpduCloud_services_0A2.Cloud_Service_remote_cmd = RxIpdCloud_services_0A2.IpduCloud_services_0A2.Cloud_Service_remote_cmd; + app_can_cloud_services_0a2.IpduCloud_services_0A2.Cloud_Service_Sw_heat = RxIpdCloud_services_0A2.IpduCloud_services_0A2.Cloud_Service_Sw_heat; + if(app_can_cloud_services_0a2.IpduCloud_services_0A2.Cloud_Service_remote_cmd == 0x33) + { + if(app_can_cloud_services_0a2.IpduCloud_services_0A2.Cloud_Service_Sw_heat == 0x01u) + { + (void)WheelHeat_SetEvent(WHEEL_HEAT_EVENT_CLOSE); + } + else if(app_can_cloud_services_0a2.IpduCloud_services_0A2.Cloud_Service_Sw_heat == 0x02u) + { + (void)WheelHeat_SetEvent(WHEEL_HEAT_EVENT_OPEN); + WheelHeat_SetHeating_Gear(HEAT_LV3); + } + else + { + } + } + + +} + +void app_bcm_evp2_394_rx_conf(void) +{ +} + +void app_air_condition_ctrl_2db_rx_conf(void) +{ +} + +void app_vcu_40d_rx_conf(void) +{ +} + +void app_bcm_l_407_rx_conf(void) +{ +} + + +void app_meter_1_dir_4bf_rx_conf(void) +{ + LowPower4BFMsgWakeUpFlag_Set(); + app_can_meter_1_dir_4bf.IpduMETER_1_dir_4BF.METER1_BackgroundLightLvlCmd = RxIpduMETER_1_dir_4BF.IpduMETER_1_dir_4BF.METER1_BackgroundLightLvlCmd; + app_can_meter_1_dir_4bf.IpduMETER_1_dir_4BF.The_Limit_Acc = RxIpduMETER_1_dir_4BF.IpduMETER_1_dir_4BF.The_Limit_Acc; + + if((app_can_meter_1_dir_4bf.IpduMETER_1_dir_4BF.The_Limit_Acc == 0x01u)\ + ||(app_can_meter_1_dir_4bf.IpduMETER_1_dir_4BF.The_Limit_Acc == 0x02u)) + { + WheelHeat_Set_Heat_Limit_ACC(Heat_Limit_ACC_Enbale); + (void)WheelHeat_SetEvent(WHEEL_HEAT_EVENT_CLOSE); + } + else + { + WheelHeat_Set_Heat_Limit_ACC(Heat_Limit_ACC_DISABLE); + } +} + + +void app_bcm_r_4e6_rx_conf(void) +{ +} + +void app_bcm_heat_4c1_rx_conf(void) +{ + // app_can_lost_communication.heat_4c1 = 0u; + app_can_heat_4c1.IpduHEAT_4C1.HEAT_heat_gear= RxIpduHEAT_4C1.IpduHEAT_4C1.HEAT_heat_gear; + app_can_heat_4c1.IpduHEAT_4C1.HEAT_subid= RxIpduHEAT_4C1.IpduHEAT_4C1.HEAT_subid; + if(app_can_heat_4c1.IpduHEAT_4C1.HEAT_subid == 0x22) + { + if(app_can_heat_4c1.IpduHEAT_4C1.HEAT_heat_gear== HEAT_LV1) + { + (void)WheelHeat_SetHeating_Gear(HEAT_LV1); + } + else if(app_can_heat_4c1.IpduHEAT_4C1.HEAT_heat_gear== HEAT_LV2 ) + { + (void)WheelHeat_SetHeating_Gear(HEAT_LV2); + } + else if(app_can_heat_4c1.IpduHEAT_4C1.HEAT_heat_gear== HEAT_LV3 ) + { + (void)WheelHeat_SetHeating_Gear(HEAT_LV3); + } + else + { + + } + } +} + +void app_ads_29c_rx_conf(void) +{ + uint8_t i; + for(i = 0; i < 8; i ++) + { + app_can_ads_29c._c[i] = RxIpduADS_29C._c[i]; + } +} + + + + + + + + +void app_mpc_316_to_conf(void) +{ +} + + +void app_meter_055_to_conf(void) +{ +} + +void app_bcm_1_12d_to_conf(void) +{ +} + +void app_bcm_2_50d_to_conf(void) +{ +} + +void app_mod_4g_49a_to_conf(void) +{ +} + +void app_multimedia_385_to_conf(void) +{ +} + +void app_cloud_services_0a2_to_conf(void) +{ +} + +void app_bcm_evp2_394_to_conf(void) +{ +} + +void app_air_condition_ctrl_2db_to_conf(void) +{ +} + +void app_vcu_40d_to_conf(void) +{ +} + +void app_bcm_l_407_to_conf(void) +{ +} + + +void app_meter_1_dir_4bf_to_conf(void) +{ + LowPower4BFMsgWakeUpFlag_Clear(); +} + + +void app_bcm_r_4e6_to_conf(void) +{ +} + +void app_bcm_heat_4c1_to_conf(void) +{ +} + +void app_ads_29c_to_conf(void) +{ +} + +void app_sig_sws_r_multimedia_tx_process(uint8_t value, uint8_t tx_count, uint8_t valid_count) +{ + COM_IpduRepetitionTxNumTable[COM_TXIPDUSTEERING_RIGHT_SWITCH_4A8] = tx_count; + Com_SendSignal(COM_TX_SIGSWS_R_MULTIMEDIA, &value); + event_sig_tx_valid_count.sws_r_multimedia = valid_count; +} + + +void app_sig_sws_r_left_menu_tx_process(uint8_t value, uint8_t tx_count, uint8_t valid_count) +{ + COM_IpduRepetitionTxNumTable[COM_TXIPDUSTEERING_RIGHT_SWITCH_4A8] = tx_count; + Com_SendSignal(COM_TX_SIGSWS_R_LEFT_MENU, &value); + event_sig_tx_valid_count.sws_r_left_menu = valid_count; +} + + +void app_sig_sws_r_voicd_expand_2_tx_process(uint8_t value, uint8_t tx_count, uint8_t valid_count) +{ + COM_IpduRepetitionTxNumTable[COM_TXIPDUSTEERING_RIGHT_SWITCH_4A8] = tx_count; + Com_SendSignal(COM_TX_SIGSWS_R_VOICD_EXPAND_2, &value); + event_sig_tx_valid_count.sws_r_voicd_expand_2 = valid_count; +} + +void app_sig_sws_r_auto_show_in_tx_process(uint8_t value, uint8_t tx_count, uint8_t valid_count) +{ + COM_IpduRepetitionTxNumTable[COM_TXIPDUSTEERING_RIGHT_SWITCH_4A8] = tx_count; + Com_SendSignal(COM_TX_SIGSWS_R_AUTO_SHOW_IN, &value); + event_sig_tx_valid_count.sws_r_auto_show_in = valid_count; +} + +void app_sig_sws_r_auto_show_out_tx_process(uint8_t value, uint8_t tx_count, uint8_t valid_count) +{ + COM_IpduRepetitionTxNumTable[COM_TXIPDUSTEERING_RIGHT_SWITCH_4A8] = tx_count; + Com_SendSignal(COM_TX_SIGSWS_R_AUTO_SHOW_OUT, &value); + event_sig_tx_valid_count.sws_r_auto_show_out = valid_count; +} + +void app_sig_sws_r_mileage_clear_tx_process(uint8_t value, uint8_t tx_count, uint8_t valid_count) +{ + COM_IpduRepetitionTxNumTable[COM_TXIPDUSTEERING_RIGHT_SWITCH_4A8] = tx_count; + Com_SendSignal(COM_TX_SIGSWS_R_MILEAGE_CLEAR, &value); + event_sig_tx_valid_count.sws_r_mileage_clear = valid_count; +} + +void AppCan_EventSig_SWS_R_MediaReset_TxProcess(uint8_t Value, uint8_t TxNum, uint8_t EventSigTxNum) +{ + COM_IpduRepetitionTxNumTable[COM_TXIPDUSTEERING_RIGHT_SWITCH_4A8] = TxNum; + Com_SendSignal(COM_TX_SIGSWS_R_MEDIA_RESET, &Value); + event_sig_tx_valid_count.SWS_R_MediaReset = EventSigTxNum; +} + +void AppCan_EventSig_SWS_R_OtherRecover_TxProcess(uint8_t Value, uint8_t TxNum, uint8_t EventSigTxNum) +{ + COM_IpduRepetitionTxNumTable[COM_TXIPDUSTEERING_RIGHT_SWITCH_4A8] = TxNum; + Com_SendSignal(COM_TX_SIGSWS_R_OTHER_RECOVER, &Value); + event_sig_tx_valid_count.SWS_R_OtherRecover = EventSigTxNum; +} + +void app_sig_sws_r_multimedia_tx_conf(void) +{ + if(event_sig_tx_valid_count.sws_r_multimedia) + { + event_sig_tx_valid_count.sws_r_multimedia --; + } + if(event_sig_tx_valid_count.sws_r_multimedia == 0) + { + TxIpduSteering_RIGHT_switch_4A8.IpduSteering_RIGHT_switch_4A8.SWS_R_Multimedia = 0x0u; + } +} + + +void app_sig_sws_r_left_menu_tx_conf(void) +{ + if(event_sig_tx_valid_count.sws_r_left_menu) + { + event_sig_tx_valid_count.sws_r_left_menu --; + } + if(event_sig_tx_valid_count.sws_r_left_menu == 0) + { + TxIpduSteering_RIGHT_switch_4A8.IpduSteering_RIGHT_switch_4A8.SWS_R_LEFT_Menu = 0x0u; + } +} + + +void app_sig_sws_r_voicd_expand_2_tx_conf(void) +{ + if(event_sig_tx_valid_count.sws_r_voicd_expand_2) + { + event_sig_tx_valid_count.sws_r_voicd_expand_2 --; + } + if(event_sig_tx_valid_count.sws_r_voicd_expand_2 == 0) + { + TxIpduSteering_RIGHT_switch_4A8.IpduSteering_RIGHT_switch_4A8.SWS_R_voicd_expand_2 = 0x2u; + } +} + + +void app_sig_sws_r_auto_show_in_tx_conf(void) +{ + if(event_sig_tx_valid_count.sws_r_auto_show_in) + { + event_sig_tx_valid_count.sws_r_auto_show_in --; + } + if(event_sig_tx_valid_count.sws_r_auto_show_in == 0) + { + TxIpduSteering_RIGHT_switch_4A8.IpduSteering_RIGHT_switch_4A8.SWS_R_auto_show_in = 0x0u; + } +} + + +void app_sig_sws_r_auto_show_out_tx_conf(void) +{ + if(event_sig_tx_valid_count.sws_r_auto_show_out) + { + event_sig_tx_valid_count.sws_r_auto_show_out --; + } + if(event_sig_tx_valid_count.sws_r_auto_show_out == 0) + { + TxIpduSteering_RIGHT_switch_4A8.IpduSteering_RIGHT_switch_4A8.SWS_R_auto_show_out = 0x0u; + } +} + +void app_sig_sws_r_mileage_clear_tx_conf(void) +{ + if(event_sig_tx_valid_count.sws_r_mileage_clear) + { + event_sig_tx_valid_count.sws_r_mileage_clear --; + } + if(event_sig_tx_valid_count.sws_r_mileage_clear == 0) + { + TxIpduSteering_RIGHT_switch_4A8.IpduSteering_RIGHT_switch_4A8.SWS_R_mileage_clear = 0x0u; + } +} + +void AppCan_EventSig_SWS_R_MediaReset_TxConf(void) +{ + if(event_sig_tx_valid_count.SWS_R_MediaReset) + { + event_sig_tx_valid_count.SWS_R_MediaReset --; + if(event_sig_tx_valid_count.SWS_R_MediaReset == 0u) + { + TxIpduSteering_RIGHT_switch_4A8.IpduSteering_RIGHT_switch_4A8.SWS_R_Media_Reset = 0x0u; + } + } + +} + +void AppCan_EventSig_SWS_R_OtherRecover_TxConf(void) +{ + if(event_sig_tx_valid_count.SWS_R_OtherRecover) + { + event_sig_tx_valid_count.SWS_R_OtherRecover --; + if(event_sig_tx_valid_count.SWS_R_OtherRecover == 0u) + { + TxIpduSteering_RIGHT_switch_4A8.IpduSteering_RIGHT_switch_4A8.SWS_R_Other_Recover = 0x0u; + } + } + +} + +void App_ReceiveSigMPC_L_lt_status(void* SigValue) +{ + (*(uint8 *)SigValue) = app_can_mpc_316.IpduMPC_316.MPC_L_lt_status; +} +void App_ReceiveSigMPC_R_lt_status(void* SigValue) +{ + (*(uint8 *)SigValue) = app_can_mpc_316.IpduMPC_316.MPC_R_lt_status; +} +void App_ReceiveSigMPC_Ld_alarm_mode_sta(void* SigValue) +{ + (*(uint8 *)SigValue) = app_can_mpc_316.IpduMPC_316.MPC_Ld_alarm_mode_sta; +} + +//meter +void App_ReceiveSigMETER_BackgroundLightLvlCmd(void* SigValue) +{ + (*(uint8 *)SigValue) = app_can_meter_055.IpduMETER_055.METER_BackgroundLightLvlCmd; +} + +//bcm1 +void App_ReceiveSigBCM1_power_gear(void* SigValue) +{ + (*(uint8 *)SigValue) = app_can_bcm_1_12d.IpduBCM_1_12D.BCM1_power_gear; +} +void App_ReceiveSigBCM1_vehicle_state(void* SigValue) +{ + (*(uint8 *)SigValue) = app_can_bcm_1_12d.IpduBCM_1_12D.BCM1_vehicle_state; +} +void App_ReceiveSigBCM1_vehicle_state1(void* SigValue) +{ + (*(uint8 *)SigValue) = app_can_bcm_1_12d.IpduBCM_1_12D.BCM1_vehicle_state1; +} +//bcm2 +void App_ReceiveSigBCM2_nm_sleep_state(void* SigValue) +{ + (*(uint8 *)SigValue) = app_can_bcm_2_50d.IpduBCM_2_50D.BCM2_nm_sleep_state; +} + + + +//4g mod +void App_ReceiveSigMOD_4G_Ecl_power_req(void* SigValue) +{ + (*(uint8 *)SigValue) = app_can_mod_4g_49a.IpduMOD_4G_49A.MOD_4G_Ecl_power_req; +} +void App_ReceiveSigMOD_4G_ota_light_req(void* SigValue) +{ + (*(uint8 *)SigValue) = app_can_mod_4g_49a.IpduMOD_4G_49A.MOD_4G_ota_light_req; +} + +void App_ReceiveSigMOD_4G_enter_ota_mode_req(void* SigValue) +{ + (*(uint8 *)SigValue) = app_can_mod_4g_49a.IpduMOD_4G_49A.MOD_4G_enter_ota_mode_req; +} + +void App_ReceiveSigMOD_4G_ota_update_req(void* SigValue) +{ + (*(uint8 *)SigValue) = app_can_mod_4g_49a.IpduMOD_4G_49A.MOD_4G_ota_update_req; +} + +void App_ReceiveSigMOD_4G_checksum(void* SigValue) +{ + (*(uint8 *)SigValue) = app_can_mod_4g_49a.IpduMOD_4G_49A.MOD_4G_checksum; +} + + + +//multi +void App_ReceiveSigMULTIMEDIA_Sw_heat(void* SigValue) +{ + (*(uint8 *)SigValue) = app_can_multimedia_385.IpduMultimedia_385.MULTIMEDIA_Sw_heat; +} + + +//cloud service +void App_ReceiveSigCloud_Service_remote_cmd(void* SigValue) +{ + (*(uint8 *)SigValue) = app_can_cloud_services_0a2.IpduCloud_services_0A2.Cloud_Service_remote_cmd; +} + +//cloud service +void App_ReceiveSigCloud_Service_Sw_heat(void* SigValue) +{ + (*(uint8 *)SigValue) = app_can_cloud_services_0a2.IpduCloud_services_0A2.Cloud_Service_Sw_heat; +} + +//bcm evp2 +void App_ReceiveSigBCM_EVP2_vehicle_state(void* SigValue) +{ + (*(uint8 *)SigValue) = app_can_bcm_evp2_394.IpduBCM_EvP2_394.BCM_EVP2_vehicle_state; +} + +//air condition ctrl +void App_ReceiveSigAIR_CD_ctrl_temp_show(void* SigValue) +{ + (*(uint8 *)SigValue) = app_can_air_condition_ctrl_2db.IpduAir_condition_ctrl_2DB.AIR_CD_ctrl_temp_show; +} + + +void App_ReceiveSigVCU_ECM_Vehicle_code_s(void* SigValue) +{ + (*(uint8 *)SigValue) = app_can_vcu_40d.IpduVCU_40D.VCU_ECM_Vehicle_code_s; +} + +//vcu +void App_ReceiveSigBCM_L_nm_type(void* SigValue) +{ + (*(uint8 *)SigValue) = app_can_bcm_l_407.IpduBCM_L_407.BCM_L_nm_type; +} + + +//BCM L +void App_ReceiveSigMETER1_BackgroundLightLvlCmd(void* SigValue) +{ + (*(uint8 *)SigValue) = app_can_meter_1_dir_4bf.IpduMETER_1_dir_4BF.METER1_BackgroundLightLvlCmd; +} + +void App_ReceiveSigThe_Limit_Acc(void* SigValue) +{ + (*(uint8 *)SigValue) = app_can_meter_1_dir_4bf.IpduMETER_1_dir_4BF.The_Limit_Acc; +} +//METER 1 DIR +void App_ReceiveSigBCM_R_air_temp_show(void* SigValue) +{ + (*(uint8 *)SigValue) = app_can_bcm_r_4e6.IpduBCM_R_4E6.BCM_R_air_temp_show; +} + +//BCM R +void App_ReceiveSigHEAT_subid(void* SigValue) +{ + (*(uint8 *)SigValue) = app_can_heat_4c1.IpduHEAT_4C1.HEAT_subid; +} + +//HEAT_SUB_ID +void App_ReceiveSigHEAT_auto_heat(void* SigValue) +{ + (*(uint8 *)SigValue) = app_can_heat_4c1.IpduHEAT_4C1.HEAT_auto_heat; +} + +//HEAT_AUTO +void App_ReceiveSigHEAT_heat_gear(void* SigValue) +{ + (*(uint8 *)SigValue) = app_can_heat_4c1.IpduHEAT_4C1.HEAT_heat_gear; +} + +//HEAT_GEAR +void App_ReceiveSigADS_ACC_Mode_Displayl(void* SigValue) +{ + (*(uint8 *)SigValue) = app_can_ads_29c.IpduADS_29C.ADS_ACC_Mode_Displayl; +} +//DNP_STATS + +//DNP_WARNING +void App_ReceiveSigADS_DNP_Stats(void* SigValue) +{ + (*(uint8 *)SigValue) = app_can_ads_29c.IpduADS_29C.ADS_DNP_Stats; +} + +void App_ReceiveSigADS_DNP_Take_Over_Req_S(void* SigValue) +{ + (*(uint8 *)SigValue) = app_can_ads_29c.IpduADS_29C.ADS_DNP_Take_Over_Req_S; +} + + + + +/*PRQA S 1503--*/ + +COM_CONST COM_ReceivedSignalFun App_ReceivedSignalFunPrt[COM_RXSIGNUM]={ + App_ReceiveSigMPC_L_lt_status, + App_ReceiveSigMPC_R_lt_status, + App_ReceiveSigMPC_Ld_alarm_mode_sta, + App_ReceiveSigMETER_BackgroundLightLvlCmd, + App_ReceiveSigBCM1_power_gear, + App_ReceiveSigBCM1_vehicle_state, + App_ReceiveSigBCM1_vehicle_state1, + App_ReceiveSigBCM2_nm_sleep_state, + App_ReceiveSigMOD_4G_Ecl_power_req, + App_ReceiveSigMOD_4G_ota_light_req, + App_ReceiveSigMOD_4G_enter_ota_mode_req, + App_ReceiveSigMOD_4G_ota_update_req, + App_ReceiveSigMOD_4G_checksum, + App_ReceiveSigMULTIMEDIA_Sw_heat, + App_ReceiveSigCloud_Service_remote_cmd, + App_ReceiveSigCloud_Service_Sw_heat, + App_ReceiveSigBCM_EVP2_vehicle_state, + App_ReceiveSigAIR_CD_ctrl_temp_show, + App_ReceiveSigVCU_ECM_Vehicle_code_s, + App_ReceiveSigBCM_L_nm_type, + App_ReceiveSigMETER1_BackgroundLightLvlCmd, + App_ReceiveSigThe_Limit_Acc, + App_ReceiveSigBCM_R_air_temp_show, + App_ReceiveSigHEAT_subid, + App_ReceiveSigHEAT_auto_heat, + App_ReceiveSigHEAT_heat_gear, + App_ReceiveSigADS_ACC_Mode_Displayl, + App_ReceiveSigADS_DNP_Stats, + App_ReceiveSigADS_DNP_Take_Over_Req_S, +}; + + +void can_app_receive_signal(uint8_t rx_sig_id, void *signal_data_ptr) +{ + if(rx_sig_id < COM_RXSIGNUM) + { + App_ReceivedSignalFunPrt[rx_sig_id](signal_data_ptr); + } +} \ No newline at end of file diff --git a/code_app_out/Source/app/can_app.h b/code_app_out/Source/app/can_app.h new file mode 100644 index 0000000..9d4bd4e --- /dev/null +++ b/code_app_out/Source/app/can_app.h @@ -0,0 +1,135 @@ +#ifndef CAN_APP_H +#define CAN_APP_H + +#include "common_types.h" + + +#define HEAT_LV1 0x01u +#define HEAT_LV2 0x02u +#define HEAT_LV3 0x03u + +#define CAN_CONTROL_BY_APP 0u +#define CAN_CONTROL_BY_28_SERVICE 1u + +#define CAN_APP_LOST_COMMUNICATION_MPC_316_ID 0u +#define CAN_APP_LOST_COMMUNICATION_METER_055_ID 1u +#define CAN_APP_LOST_COMMUNICATION_BCM_1_12D_ID 2u +#define CAN_APP_LOST_COMMUNICATION_BCM_2_50D_ID 3u +#define CAN_APP_LOST_COMMUNICATION_MOD_4G_49A_ID 4u +#define CAN_APP_LOST_COMMUNICATION_MULTIMEDIA_385_ID 5u +#define CAN_APP_LOST_COMMUNICATION_CLOUD_SERVICES_0A2_ID 6u +#define CAN_APP_LOST_COMMUNICATION_BCM_EVP2_394_ID 7u +#define CAN_APP_LOST_COMMUNICATION_AIR_CONDITION_CTRL_2DB_ID 8u +#define CAN_APP_LOST_COMMUNICATION_VCU_40D_ID 9u +#define CAN_APP_LOST_COMMUNICATION_BCM_L_407_ID 10u +#define CAN_APP_LOST_COMMUNICATION_METER_1_DIR_4BF_ID 11u +#define CAN_APP_LOST_COMMUNICATION_BCM_R_4E6_ID 12u +#define CAN_APP_LOST_COMMUNICATION_HEAT_4C1_ID 13u +#define CAN_APP_LOST_COMMUNICATION_ADS_29C_ID 14u + +#define ADS_ACC_MODE_DISPLAYL_OFF_MODE 0u +#define ADS_ACC_MODE_DISPLAYL_PASSIVE_MODE 1u +#define ADS_ACC_MODE_DISPLAYL_STAND_BY_MODE 2u +#define ADS_ACC_MODE_DISPLAYL_ACTIVE_CONTROL_MODE 3u +#define ADS_ACC_MODE_DISPLAYL_BRAKE_ONLY_MODE 4u +#define ADS_ACC_MODE_DISPLAYL_OVENIDE 5u +#define ADS_ACC_MODE_DISPLAYL_STAND_STILL_ACTIVE_MODE 6u +#define ADS_ACC_MODE_DISPLAYL_STAND_STILL_WAIT_MODE 7u +#define ADS_ACC_MODE_DISPLAYL_TEMPORARY_FAILURE_MODE 8u +#define ADS_ACC_MODE_DISPLAYL_PERMANENT_FAILURE 9u + +#define ADS_DNP_STATS_OFF 0u +#define ADS_DNP_STATS_PASSIVE 1u +#define ADS_DNP_STATS_LCC_READY 2u +#define ADS_DNP_STATS_DNP_READY 3u +#define ADS_DNP_STATS_LCC_ACTIVE2 4u +#define ADS_DNP_STATS_ILCA_ACTIVE 5u +#define ADS_DNP_STATS_DNP_ACTIVE 6u +#define ADS_DNP_STATS_FAULT 7u +#define ADS_DNP_STATS_MRC 8u +#define ADS_DNP_STATS_FORBIDDEN 9u +#define ADS_DNP_STATS_LCC_ACTIVE1 10u + +#define ADS_DNP_TAKE_OVER_REQ_S_INACTIVE 0u +#define ADS_DNP_TAKE_OVER_REQ_S_WARNING_LEVEL1 1u +#define ADS_DNP_TAKE_OVER_REQ_S_WARNING_LEVEL2 2u +#define ADS_DNP_TAKE_OVER_REQ_S_WARNING_LEVEL3 3u +#define ADS_DNP_TAKE_OVER_REQ_S_SAFE_STOP 4u +#define ADS_DNP_TAKE_OVER_REQ_S_EXIT 5u + +#define POWER_GEAR_INVALID 0u +#define POWER_GEAR_OFF 1u +#define POWER_GEAR_ACC 2u +#define POWER_GEAR_ON 3u + + + +#define POWER_GEAR_EVENT_NULL 0u +#define POWER_GEAR_EVENT_OFF 1u +#define POWER_GEAR_EVENT_ACC 2u +#define POWER_GEAR_EVENT_ON 3u + +#define Heat_Limit_ACC_Enbale 1u +#define Heat_Limit_ACC_DISABLE 0u + + + +void app_sig_sws_r_multimedia_tx_process(uint8_t value, uint8_t tx_count, uint8_t valid_count); +void app_sig_sws_r_left_menu_tx_process(uint8_t value, uint8_t tx_count, uint8_t valid_count); +void app_sig_sws_r_voicd_expand_2_tx_process(uint8_t value, uint8_t tx_count, uint8_t valid_count); +void app_sig_sws_r_auto_show_in_tx_process(uint8_t value, uint8_t tx_count, uint8_t valid_count); +void app_sig_sws_r_auto_show_out_tx_process(uint8_t value, uint8_t tx_count, uint8_t valid_count); +void app_sig_sws_r_mileage_clear_tx_process(uint8_t value, uint8_t tx_count, uint8_t valid_count); +void AppCan_EventSig_SWS_R_MediaReset_TxProcess(uint8_t Value, uint8_t TxNum, uint8_t EventSigTxNum); +void AppCan_EventSig_SWS_R_OtherRecover_TxProcess(uint8_t Value, uint8_t TxNum, uint8_t EventSigTxNum); +void app_sig_sws_r_multimedia_tx_conf(void); +void app_sig_sws_r_left_menu_tx_conf(void); +void app_sig_sws_r_voicd_expand_2_tx_conf(void); +void app_sig_sws_r_auto_show_in_tx_conf(void); +void app_sig_sws_r_auto_show_out_tx_conf(void); +void app_sig_sws_r_mileage_clear_tx_conf(void); +void AppCan_EventSig_SWS_R_MediaReset_TxConf(void); +void AppCan_EventSig_SWS_R_OtherRecover_TxConf(void); + + +void app_mpc_316_rx_conf(void); +void app_meter_055_rx_conf(void); +void app_bcm_1_12d_rx_conf(void); +void app_bcm_2_50d_rx_conf(void); +void app_mod_4g_49a_rx_conf(void); +void app_multimedia_385_rx_conf(void); +void app_cloud_services_0a2_rx_conf(void); +void app_bcm_evp2_394_rx_conf(void); +void app_air_condition_ctrl_2db_rx_conf(void); +void app_vcu_40d_rx_conf(void); +void app_bcm_l_407_rx_conf(void); +void app_meter_1_dir_4bf_rx_conf(void); +void app_bcm_r_4e6_rx_conf(void); +void app_bcm_heat_4c1_rx_conf(void); +void app_ads_29c_rx_conf(void); + + +void app_mpc_316_to_conf(void); +void app_meter_055_to_conf(void); +void app_bcm_1_12d_to_conf(void); +void app_bcm_2_50d_to_conf(void); +void app_mod_4g_49a_to_conf(void); +void app_multimedia_385_to_conf(void); +void app_cloud_services_0a2_to_conf(void); +void app_bcm_evp2_394_to_conf(void); +void app_air_condition_ctrl_2db_to_conf(void); +void app_vcu_40d_to_conf(void); +void app_bcm_l_407_to_conf(void); +void app_meter_1_dir_4bf_to_conf(void); +void app_bcm_r_4e6_to_conf(void); +void app_bcm_heat_4c1_to_conf(void); +void app_ads_29c_to_conf(void); + + +void can_app_receive_signal(uint8_t rx_sig_id, void *signal_data_ptr); + +void can_app_init(void); +void CanApp_WakeupProcess(void); +uint8_t CAN_GetControlBy(void); +void CAN_SetControlBy(uint8_t ControlBy); +#endif \ No newline at end of file diff --git a/code_app_out/Source/app/demm_app.c b/code_app_out/Source/app/demm_app.c new file mode 100644 index 0000000..eb357a7 --- /dev/null +++ b/code_app_out/Source/app/demm_app.c @@ -0,0 +1,125 @@ +#include "demm_app.h" +#include "system_voltage_manage.h" +#include "Dem_Types.h" +#include "DEM_Cfg.h" +#include "key_adc_mid.h" +#include "key_digital_driver_cfg.h" +#include "key_digital_driver.h" +#include "Demm.h" +#include "WheelHeat.h" +#define NUM_OF_DTC_KEY 15 + + +const uint8_t dtc_key_id_tab[NUM_OF_DTC_KEY] = { + DTC_PREV_BUTTON_STUCK_ID, + DTC_PHONE_BUTTON_STUCK_ID, + DTC_VOICE_BUTTON_STUCK_ID, + DTC_VEDIO_BUTTON_STUCK_ID, + DTC_NEXT_BUTTON_STUCK_ID, + DTC_MUTE_BUTTON_STUCK_ID, + DTC_CUSTOM_BUTTON_STUCK_ID, + DTC_MENU2_CTRL_BUTTON_STUCK_ID, + DTC_SPDP_BUTTON_STUCK_ID, + DTC_SPDD_BUTTON_STUCK_ID, + DTC_DSPD_BUTTON_STUCK_ID, + DTC_DSPP_BUTTON_STUCK_ID, + DTC_LEFT_MENU_STUCK_ID, + DTC_LEFT_PICK_STUCK_ID, + DTC_RIGHT_PICK_STUCK_ID +}; + + +void demm_app_task(void) +{ + uint8_t system_voltage_mode; + uint8_t key_state[NUM_OF_DTC_KEY]; + uint8_t i; + uint8_t ntc_state; + uint8_t heat_overcurrent; + ntc_state = WheelHeat_GetNtcState(); + heat_overcurrent = WheelHeat_GetHeatOverCurrent(); + system_voltage_mode = system_voltage_manage_mode_get(FUNC_SYSTEM_VOLTAGE_MANAGE_ID); + + if(system_voltage_mode == SYSTEM_VOLTAGE_MODE_LOW) + { + dem_set_test_result(DTC_POWER_LOW_ID, DTC_TEST_STATE_FAILED); + dem_set_test_result(DTC_POWER_HIGH_ID, DTC_TEST_STATE_PASSED); + } + else if(system_voltage_mode == SYSTEM_VOLTAGE_MODE_HIGH) + { + dem_set_test_result(DTC_POWER_HIGH_ID, DTC_TEST_STATE_FAILED); + dem_set_test_result(DTC_POWER_LOW_ID, DTC_TEST_STATE_PASSED); + } + else + { + dem_set_test_result(DTC_POWER_LOW_ID, DTC_TEST_STATE_PASSED); + dem_set_test_result(DTC_POWER_HIGH_ID, DTC_TEST_STATE_PASSED); + } + #if 0 + if(ntc_state == WHEEL_HEAT_NTC_SHORT ) + { + dem_set_test_result(DTC_HEAT_NTC_SHORT_ID, DTC_TEST_STATE_FAILED); + } + else if(ntc_state == WHEEL_HEAT_NTC_OPEN ) + { + dem_set_test_result(DTC_HEAT_NTC_OPEN_ID, DTC_TEST_STATE_FAILED); + } + else + { + dem_set_test_result(DTC_HEAT_NTC_SHORT_ID, DTC_TEST_STATE_PASSED); + dem_set_test_result(DTC_HEAT_NTC_OPEN_ID, DTC_TEST_STATE_PASSED); + } + + + if(heat_overcurrent == WHEEL_HEAT_OVERCURRENT ) + { + dem_set_test_result(DTC_HEAT_OVERCURRENT_ID, DTC_TEST_STATE_FAILED); + } + else + { + dem_set_test_result(DTC_HEAT_OVERCURRENT_ID, DTC_TEST_STATE_PASSED); + + } + #endif + key_state[0] = key_digital_driver_get_state(KEY_DIGI_ID_PREV); + key_state[1] = key_digital_driver_get_state(KEY_DIGI_ID_PHONE); + key_state[2] = key_digital_driver_get_state(KEY_DIGI_ID_VOICE); + key_state[3] = key_adc_mid_get_result(KEY_ADC_ID_VEDIO); + key_state[4] = key_digital_driver_get_state(KEY_DIGI_ID_NEXT); + key_state[5] = key_digital_driver_get_state(KEY_DIGI_ID_MUTE); + key_state[6] = key_adc_mid_get_result(KEY_ADC_ID_CUSTOM); + key_state[7] = key_digital_driver_get_state(KEY_DIGI_ID_RMENU); + key_state[8] = key_adc_mid_get_result(KEY_ADC_ID_RES_SPD_ADD); + key_state[9] = key_adc_mid_get_result(KEY_ADC_ID_SET_SPD_SUB); + key_state[10] = key_adc_mid_get_result(KEY_ADC_ID_DSP_SUB); + key_state[11] = key_adc_mid_get_result(KEY_ADC_ID_DSP_PLUS); + key_state[12] = key_adc_mid_get_result(KEY_ADC_ID_LMENU); + key_state[13] = key_adc_mid_get_result(KEY_ADC_ID_LPICK); + key_state[14] = key_digital_driver_get_state(KEY_DIGI_ID_RPICK);; + + for(i = 0; i < NUM_OF_DTC_KEY; i ++) + { + if(i == 0 || i == 1 || i == 2 || i == 4 || i == 5 || i == 7 || i == 14) + { + if(key_state[i] == KEY_DIGITAL_DRIVER_STATE_STICK) + { + dem_set_test_result(dtc_key_id_tab[i], DTC_TEST_STATE_FAILED); + } + else + { + dem_set_test_result(dtc_key_id_tab[i], DTC_TEST_STATE_PASSED); + } + } + else + { + if(key_state[i] == KEY_ADC_RESULT_STICK) + { + dem_set_test_result(dtc_key_id_tab[i], DTC_TEST_STATE_FAILED); + } + else + { + dem_set_test_result(dtc_key_id_tab[i], DTC_TEST_STATE_PASSED); + } + } + } +} \ No newline at end of file diff --git a/code_app_out/Source/app/demm_app.h b/code_app_out/Source/app/demm_app.h new file mode 100644 index 0000000..00e1df8 --- /dev/null +++ b/code_app_out/Source/app/demm_app.h @@ -0,0 +1,9 @@ +#ifndef DEMM_APP_H +#define DEMM_APP_H + + + + +void demm_app_task(void); + +#endif \ No newline at end of file diff --git a/code_app_out/Source/app/fault_detect.c b/code_app_out/Source/app/fault_detect.c new file mode 100644 index 0000000..aa03148 --- /dev/null +++ b/code_app_out/Source/app/fault_detect.c @@ -0,0 +1,546 @@ +/********************************************************************************** +Copyright: Science&Technology Co., Ltd. 2012-2016. All rights reserved. +File name: power_manage.c +Author: +ID： +Version: V1.0.0 +Date: 2019.09.05 +Description: + +Others: +History: +**********************************************************************************/ +//#include "derivative.h" +#include "system_config.h" +#include "fault_detect.h" +#include "common_memory.h" +//#include "power_drive.h" +#include "crc.h" +#include "key_adc_mid_cfg.h" +#include "Demm.h" +#include "key_digital_driver_cfg.h" +#include "system_voltage_manage.h" + +static void fault_detect_vin(void); +static void fault_detect_vehicle_cfginfo(void); +static u8 fault_detect_get_event(u8 event); +static void fault_detect_power_task(void); +static void fault_detect_ign_task(void); +static void fault_detect_his_task(void); + +typedef struct +{ + u8 ign_state; + u8 power_state; + u16 ign_timecount; + u16 power_timecount; + u8 his_power_count; +}fault_detect_s; + +static power_supply_history_detect_s g_power_supply_history_detect; +static fault_detect_s g_fault_detect; +static vehicle_cfg_s g_vehicle_cfg; + + + +/** + * @brief + * @param input: + * @param output: + * @return none: + * @calls + * @calls by + * @others + */ +void fault_detect_init(void) +{ + #if 0 + common_memory_clear((u8*)&g_power_supply_history_detect,(u16)sizeof(power_supply_history_detect_s)); + common_memory_clear((u8*)&g_fault_detect,(u16)sizeof(fault_detect_s)); + common_memory_clear((u8*)&g_vehicle_cfg,(u16)sizeof(vehicle_cfg_s)); + g_power_supply_history_detect.count = 0; + g_vehicle_cfg.cds = VEHICLE_CFG_CDS_VALUE_NONE; + g_fault_detect.power_state=FAULT_DETECT_STATE_IDLE; + g_fault_detect.ign_state=FAULT_DETECT_STATE_IDLE; + #endif +} + +//寫入一次記錄 +void fault_detect_input_power_history(const power_supply_history_s *input_power) +{ + #if 0 + u8 i; + g_power_supply_history_detect.count++; + if(g_power_supply_history_detect.count>=POWER_SUPPLY_HIS_MAX) + { + g_power_supply_history_detect.count=0; + } + i=g_power_supply_history_detect.count; + common_memory_copys((u8*)&g_power_supply_history_detect.his[i],(u8*)input_power,sizeof(power_supply_history_s)); + #endif +} + +//將十次記錄都讀取 +void fault_detect_get_power_history(power_supply_history_s *out_power,u8 *p_len) +{ + #if 0 + u8 i,j; + power_supply_history_s *lp_his; + //u8 l_buf[POWER_SUPPLY_HIS_MAX]; + *p_len = POWER_SUPPLY_HIS_MAX; + lp_his = out_power; + for(i=0;i=i) + { + j=g_power_supply_history_detect.count-i; + } + else + { + j=POWER_SUPPLY_HIS_MAX+g_power_supply_history_detect.count-i; + } + //l_buf[i] = j; + common_memory_copys((u8*)lp_his,(const u8 *)&g_power_supply_history_detect.his[j],(u16)sizeof(power_supply_history_s)); + lp_his++; + } + #endif +} + +static void fault_detect_vin(void) +{ + #if 0 + u8 l_crc; + u8 l_buf[SYSDID_F190_VIN_CK_LEN]; + //读取vin + (void)nvm_read_bytes(NVM_TYPE_EEPROM,SYSDID_F190_VIN_ADDR,(u8*)&l_buf[0],SYSDID_F190_VIN_CK_LEN); + l_crc = crc8_make_by_table(CRC8_ID_FOR_E2E_L2,&l_buf[0],SYSDID_F190_VIN_LEN); + if(l_crc == l_buf[SYSDID_F190_VIN_LEN]) //校验通过 + { + dem_set_test_result(DTC_VIN_NOT_WRITE_ID, DTC_TEST_STATE_PASSED); + } + else + { + //不通过，表示未写入 + dem_set_test_result(DTC_VIN_NOT_WRITE_ID, DTC_TEST_STATE_FAILED); + } + #endif +} + +static void fault_detect_vehicle_cfginfo(void) +{ + #if 0 + u8 l_crc; + u8 l_buf[SYSDID_VEHICLE_CONFIG_CK_LEN]; + //读取车辆配置信息 + (void)nvm_read_bytes(NVM_TYPE_EEPROM,SYSDID_VEHICLE_CONFIG_ADDR,(u8*)&l_buf[0],SYSDID_VEHICLE_CONFIG_CK_LEN); + //cal_read_did(0xF100u,(u8*)&l_buf[0],SYSDID_ATTEMP_LEN+SYSDID_ATTEMP_MAX_LEN); + l_crc = crc8_make_by_table(CRC8_ID_FOR_E2E_L2,&l_buf[0],SYSDID_VEHICLE_CONFIG_LEN); + if(l_crc == l_buf[SYSDID_VEHICLE_CONFIG_LEN]) //校验通过 + { + if( (l_buf[0]==VEHICLE_CFG_CDS_VALUE_DEFAULT) || (l_buf[0]==VEHICLE_CFG_CDS_VALUE_NONE) ) + { + dem_set_test_result(DTC_VCS_INVALID_ID, DTC_TEST_STATE_FAILED); + } + #if 1 + else if( (l_buf[0]==VEHICLE_CFG_CDS_VALUE_ADAS) || (l_buf[0]==VEHICLE_CFG_CDS_VALUE_CF) ) + { + dem_set_test_result(DTC_VCS_INVALID_ID, DTC_TEST_STATE_PASSED); + } + #endif + else + { + + } + } + else + { + //不通过，表示未写入 + dem_set_test_result(DTC_VCS_INVALID_ID, DTC_TEST_STATE_FAILED); + } + #endif +} + + + +static void fault_detect_power_task(void) +{ + #if 0 + switch(g_fault_detect.power_state) + { + case FAULT_DETECT_STATE_IDLE: + g_fault_detect.power_timecount++; + if(g_fault_detect.power_timecount>=FAULT_DETECT_POWER_TIME) + { + g_fault_detect.power_timecount=0; + g_fault_detect.power_state = FAULT_DETECT_STATE_POWER; + } + break; + case FAULT_DETECT_STATE_POWER: + break; + default: + //为了 default而加，未验证 + break; + } + #endif +} + +static void fault_detect_ign_task(void) +{ + #if 0 + switch(g_fault_detect.ign_state) + { + case FAULT_DETECT_STATE_IDLE: + if(can_app_get_bcm_t15d()!=0u) + { + g_fault_detect.ign_timecount++; + if(g_fault_detect.ign_timecount>=FAULT_DETECT_IGN_ON_TIME) + { + g_fault_detect.ign_timecount=0; + fault_detect_vin(); + fault_detect_vehicle_cfginfo(); + g_fault_detect.ign_state = FAULT_DETECT_STATE_IGN_ON; + } + } + else + { + g_fault_detect.ign_timecount=0u; + } + break; + case FAULT_DETECT_STATE_IGN_ON: + if(can_app_get_bcm_t15d()!=0u) + { + + } + else + { + g_fault_detect.ign_timecount=0; + g_fault_detect.ign_state = FAULT_DETECT_STATE_IGN_OFF; + } + break; + case FAULT_DETECT_STATE_IGN_OFF: + if(can_app_get_bcm_t15d()!=0u) + { + g_fault_detect.ign_timecount++; + if(g_fault_detect.ign_timecount>=FAULT_DETECT_IGN_ON_TIME) + { + g_fault_detect.ign_timecount=0; + g_fault_detect.ign_state = FAULT_DETECT_STATE_IGN_ON; + } + } + else + { + g_fault_detect.ign_timecount=0; + g_fault_detect.ign_state = FAULT_DETECT_STATE_IGN_OFF; + } + break; + default: + //为了 default而加，未验证 + break; + } +} + + +static void fault_detect_his_task(void) +{ + app_com_rx_tbox_time_s l_tbox_time; + power_supply_history_s l_power_his; + //对历史电源状态的记录---以最小的周期帧为基准 + g_fault_detect.his_power_count++; + if(g_fault_detect.his_power_count>=FAULT_DETECT_HISTORY_POWER_TIME) + { + g_fault_detect.his_power_count=0u; + (void)can_app_get_sig_tbox_time(&l_tbox_time); + //power his + l_power_his.poweroff = 0u; + l_power_his.out30s = 0u; + l_power_his.out30r = 0u; + l_power_his.out15d = 0u; + l_power_his.sigt30s = can_app_get_bcm_t30s(); + l_power_his.sigt30r = can_app_get_bcm_t30r(); + l_power_his.sigt15d = can_app_get_bcm_t15d(); + l_power_his.year = l_tbox_time.year; + l_power_his.month = l_tbox_time.month; + l_power_his.day = l_tbox_time.day; + l_power_his.hour = l_tbox_time.hour; + l_power_his.min = l_tbox_time.min; + l_power_his.sec = l_tbox_time.sec; + fault_detect_input_power_history(&l_power_his); + } + else + { + //code + } + #endif +} + +/** + * @brief 放在10ms定時器 + * @param input: + * @param output: + * @return none: + * @calls + * @calls by + * @others + */ +void fault_detect_task(void) +{ + #if 0 + fault_detect_ign_task(); + fault_detect_power_task(); + fault_detect_his_task(); + #endif +} + + + +/** + * @brief + * @param input: + * @param output: + * @return none: + * @calls + * @calls by + * @others + */ +void vehicle_cfg_set_cds(u8 cds) +{ + g_vehicle_cfg.cds = cds; +} + +/** + * @brief + * @param input: + * @param output: + * @return none: + * @calls + * @calls by + * @others + */ +u8 vehicle_cfg_get_cds(void) +{ + return g_vehicle_cfg.cds; +} + +/** + * @brief + * @param input: + * @param output: + * @return none: + * @calls + * @calls by + * @others + */ +u8 fault_detect_get_power_state(void) +{ + return g_fault_detect.power_state; +} + +/** + * @brief + * @param input: + * @param output: + * @return none: + * @calls + * @calls by + * @others + */ +u8 fault_detect_get_ign_state(void) +{ + return g_fault_detect.ign_state; +} + + + +u8 fault_detect_judge_node_bcmstate_loss(void) +{ + #if 0 + u8 l_result=FAULT_DETECT_JUDGE_NODE_LOSS_OK; + u8 l_busoff_state ; + l_busoff_state = net_app_get_busoff(); /*PRQA S 3426*/ + if((system_voltage_manage_mode_get(POWER_GRADE_ID_DIAG)==POWER_GRADE_FUNC_NORMAL)&&(l_busoff_state==0u)) + { + l_result=FAULT_DETECT_JUDGE_NODE_LOSS_OK; + } + else + { + l_result=FAULT_DETECT_JUDGE_NODE_LOSS_NOTOK; + } + return l_result; + #else + return 0u; + #endif +} + + + + + +u8 fault_detect_judge_key_stuck(void) +{ + #if 0 + u8 l_result=FAULT_DETECT_JUDGE_NODE_LOSS_OK; + + if((system_voltage_manage_mode_get(DIG_SYSTEM_VOLTAGE_MANAGE_ID)==POWER_GRADE_FUNC_NORMAL) \ + && (fault_detect_get_ign_state()==FAULT_DETECT_STATE_IGN_ON) \ + ) + { + l_result=FAULT_DETECT_JUDGE_NODE_LOSS_OK; + } + else + { + l_result=FAULT_DETECT_JUDGE_NODE_LOSS_NOTOK; + } + return l_result; + #else + return 0u; + #endif +} + +static u8 fault_detect_get_event(u8 event) +{ + #if 0 + u8 l_event; + if(event==DTC_TEST_STATE_FAILED) + { + l_event=DTC_TEST_STATE_FAILED; + } + else if(event==DTC_TEST_STATE_PASSED) + { + l_event=DTC_TEST_STATE_PASSED; + } + else + { + l_event=DTC_TEST_STATE_PASSED; + } + return l_event; + #else + return 0u; + #endif +} + + +void fault_detect_iokey_dtc(u8 key_id,u8 event) +{ + #if 0 + u8 l_event; + u8 l_result; + l_result = fault_detect_judge_key_stuck(); + if(l_result ==FAULT_DETECT_JUDGE_NODE_LOSS_OK) + { + l_event=fault_detect_get_event(event); + switch(key_id) + { + case KEY_ID_GAP1: + dem_set_test_result(DTC_DSPA_BUTTON_STUCK_ID, l_event); + break; + case KEY_ID_GAP2: + dem_set_test_result(DTC_DSPD_BUTTON_STUCK_ID, l_event); + break; + case KEY_ID_ACC: + dem_set_test_result(DTC_ACC_BUTTON_STUCK_ID, l_event); + break; + case KEY_ID_CANCEL: + dem_set_test_result(DTC_CANCEL_BUTTON_STUCK_ID, l_event); + break; + case KEY_ID_RES1: + dem_set_test_result(DTC_SPDA_BUTTON_STUCK_ID, l_event); + break; + case KEY_ID_SET2: + dem_set_test_result(DTC_SPDD_BUTTON_STUCK_ID, l_event); + break; + case KEY_ID_UP: + dem_set_test_result(DTC_UP_BUTTON_STUCK_ID, l_event); + break; + case KEY_ID_DOWN: + dem_set_test_result(DTC_DOWN_BUTTON_STUCK_ID, l_event); + break; + default: + //为了 default而加，未验证 + break; + } + } + else + { + // + } + #endif +} + + +void fault_detect_adckey_dtc(u8 key_id,u8 event) +{ + #if 0 + u8 l_event; + u8 l_result; + l_result = fault_detect_judge_key_stuck(); + if(l_result ==FAULT_DETECT_JUDGE_NODE_LOSS_OK) + { + l_event=fault_detect_get_event(event); + switch(key_id) + { + case KEY_ADC_ID_PHONE: + dem_set_test_result(DTC_BT_BUTTON_STUCK_ID, l_event); + break; + case KEY_ADC_ID_SOUNDCTRL: + dem_set_test_result(DTC_SOUND_CTRL_BUTTON_STUCK_ID, l_event); + break; + case KEY_ADC_ID_VOL_INC: + dem_set_test_result(DTC_VOLA_BUTTON_STUCK_ID, l_event); + break; + case KEY_ADC_ID_VOL_DEC: + dem_set_test_result(DTC_VOLD_BUTTON_STUCK_ID, l_event); + break; + case KEY_ADC_ID_PREVIOUS: + dem_set_test_result(DTC_PREV_BUTTON_STUCK_ID, l_event); + break; + case KEY_ADC_ID_NEXT: + dem_set_test_result(DTC_NEXT_BUTTON_STUCK_ID, l_event); + break; + case KEY_ADC_ID_MODE: + dem_set_test_result(DTC_MODE_BUTTON_STUCK_ID, l_event); + break; + case KEY_ADC_ID_CUSTOM: + dem_set_test_result(DTC_CUSTOM_BUTTON_STUCK_ID, l_event); + break; + default: + //为了 default而加，未验证 + break; + } + } + else + { + // + } + #endif +} + + +/** + * @brief + * @param input: + * @param output: + * @return none: + * @calls + * @calls by + * @others + */ +void fault_detect_goto_sleep(void) +{ + +} + + +/** + * @brief + * @param input: + * @param output: + * @return none: + * @calls + * @calls by + * @others + */ +void fault_detect_goto_wakeup(void) +{ + +} + diff --git a/code_app_out/Source/app/fault_detect.h b/code_app_out/Source/app/fault_detect.h new file mode 100644 index 0000000..6f79f36 --- /dev/null +++ b/code_app_out/Source/app/fault_detect.h @@ -0,0 +1,94 @@ +/********************************************************************************** +Copyright Science&Technology Co., Ltd. 2012-2016. All rights reserved. +File name: power_manage.h +Author: +ID: +Version: V1.0.0 +Date: 2019.09.05 +Description: +Others: +History: +1. Date: +Author: +Modification: +**********************************************************************************/ + +#ifndef __FAULT_DETECT_H +#define __FAULT_DETECT_H + +#include "common_types.h" + +#define FAULT_DETECT_TIME_UNIT APP_TASK_10MS +#define FAULT_DETECT_HISTORY_POWER_TIME (20u/FAULT_DETECT_TIME_UNIT) + +#define FAULT_DETECT_IGN_ON_TIME (2000u/FAULT_DETECT_TIME_UNIT) +#define FAULT_DETECT_POWER_TIME (5500u/FAULT_DETECT_TIME_UNIT) + +#define FAULT_DETECT_STATE_IDLE 0u +#define FAULT_DETECT_STATE_IGN_ON 1u +#define FAULT_DETECT_STATE_IGN_OFF 2u +#define FAULT_DETECT_STATE_POWER 3u + + +#define VEHICLE_CFG_CDS_VALUE_DEFAULT 0XFFU +#define VEHICLE_CFG_CDS_VALUE_CF 0X01U +#define VEHICLE_CFG_CDS_VALUE_ADAS 0X03U +#define VEHICLE_CFG_CDS_VALUE_NONE 0XFEU + +#define FAULT_DETECT_JUDGE_NODE_LOSS_NOTOK 0u +#define FAULT_DETECT_JUDGE_NODE_LOSS_OK 1u + +//0xAA表示busoff了，0x55表示正常 +#define FAULT_DETECT_COM_BUSOFF_STATE 0XAAu +#define FAULT_DETECT_COM_NORMAL_STATE 0X55u + +typedef struct +{ + u8 cds; +}vehicle_cfg_s; + + +#define POWER_SUPPLY_HIS_DATA_SIZE 8u +#define POWER_SUPPLY_HIS_MAX 10u +typedef struct +{ + u8 poweroff; + u8 out30s; + u8 out30r; + u8 out15d; + u8 sigt30s; + u8 sigt30r; + u8 sigt15d; + u8 year; + u8 month; + u8 day; + u8 hour; + u8 min; + u8 sec; +}power_supply_history_s; + + +typedef struct +{ + power_supply_history_s his[POWER_SUPPLY_HIS_MAX]; + u8 count; //計數 + u8 p_cur; //當前的指針 +}power_supply_history_detect_s; + + +void fault_detect_input_power_history(const power_supply_history_s *input_power); +void fault_detect_get_power_history(power_supply_history_s *out_power,u8 *p_len); +void fault_detect_init(void); +void fault_detect_task(void); + +void vehicle_cfg_set_cds(u8 cds); +u8 vehicle_cfg_get_cds(void); +u8 fault_detect_get_power_state(void); +u8 fault_detect_get_ign_state(void); +u8 fault_detect_judge_node_bcmstate_loss(void); +u8 fault_detect_judge_key_stuck(void); +void fault_detect_iokey_dtc(u8 key_id,u8 event); +void fault_detect_adckey_dtc(u8 key_id,u8 event); + + +#endif diff --git a/code_app_out/Source/app/key_app.c b/code_app_out/Source/app/key_app.c new file mode 100644 index 0000000..5f58cdc --- /dev/null +++ b/code_app_out/Source/app/key_app.c @@ -0,0 +1,1114 @@ +/***************************************************************************** +** Filename : keyboard_drive.c +** Project : +** Module : +** Processor : Freescale S12Z +** Date/Time : 2019-09-04, 9:00 +** Abstract : +** Contents : +** Author : Lyj +** http : +** mail : +** -------------------------------------------------------------------------- +** +** -------------------------------------------------------------------------- +******************************************************************************/ +#include "common_types.h" +#include "common_memory.h" +#include "key_app.h" +//#include "power_drive.h" +#include "system_voltage_manage.h" +#include "Com_Cfg.h" +#include "app_encoder.h" +#include "can_app.h" +#include "Com.h" +/***************************************************************************** +* Include Files +*****************************************************************************/ + +/***************************************************************************** +* Defines +*****************************************************************************/ +#define SHOW_MOD_TIME_10S (10000u / 10u) +#define MILEAGE_CLEAR_TIME_15S (15000u / 10u) +#define APP_KEY_MEDIA_RESET_3S (3000U/10u) +#define APP_KEY_MIDSCREEN_RESET_10S (10000U/10u) +/***************************************************************************** +* Macros +*****************************************************************************/ + +/***************************************************************************** +* Type Defines +*****************************************************************************/ +typedef struct +{ + uint16_t AppKey_MediaReset_Timer; + uint16_t AppKey_MidScreenReset_Timer; + uint16_t AppKey_CoDriverScreenReset_Timer; + uint16_t AppKey_HandrailScreenReset_Timer; + uint16_t AppKey_BackRowReset_Timer; +}AppKeyboard_Type; +/***************************************************************************** +*Static Variable +*****************************************************************************/ +static AppKeyboard_Type AppKeyboard; +/***************************************************************************** +*Global Variable +*****************************************************************************/ +static key_app_s g_key_app; + +/***************************************************************************** +*Constant +*****************************************************************************/ + +/***************************************************************************** +*Function Prototype +*****************************************************************************/ + +void app_key_event_clear(void); +#ifdef KEY_APP_ENABLE_SLEEP_FUNCTION +static void key_app_sleep_state_task(void); +#endif + +/***************************************************************************** +|Prototype : +|Called by : +|Preconditions : - +|Input parameters : None +|Output parameters : None +|Return value : None +|Description : +*****************************************************************************/ +void key_app_init(void) +{ + #ifdef KEY_DIGITAL_EN + key_digital_driver_init(); + #endif + #ifdef KEY_ADC_EN + key_adc_mid_init(); + //key_app_cfg_init(); + #endif + + common_memory_clear((u8*)&g_key_app,sizeof(g_key_app)); +} + + + + + + + +/***************************************************************************** +|Prototype : +|Called by : +|Preconditions : - +|Input parameters : None +|Output parameters : None +|Return value : None +|Description : +*****************************************************************************/ +void key_app_goto_sleep(void) +{ + #ifdef KEY_DIGITAL_EN + key_digital_driver_goto_sleep(); + #endif + #ifdef KEY_ADC_EN + key_adc_mid_goto_sleep(); + key_adc_mid_init(); + #endif + + //还有别的按键模块，如ADC， + g_key_app.timecount=0u; + g_key_app.sub_state=KEY_APP_SUBSTATE_SLEEP; + g_key_app.state=KEY_APP_STATE_SLEEP; +} + + +/** + * @brief 唤醒 + * @param input: + * @param output: + * @return none: + * @calls + * @calls by + * @adc_asils + */ +void key_app_goto_wake(void) +{ + u8 i; + #ifdef KEY_DIGITAL_EN + key_digital_driver_goto_wakeup(); + #endif + #ifdef KEY_ADC_EN + key_adc_mid_goto_wakeup(); + #endif + for(i=0;i= SHOW_MOD_TIME_10S) + { + output = 1; + app_sig_sws_r_auto_show_in_tx_process(output, 3, 3); + } + } + } + else + { + if(timer >= SHOW_MOD_TIME_10S) + { + output = 0; + Com_SendSignal(COM_TX_SIGSWS_R_MULTIMEDIA, &output); + app_sig_sws_r_auto_show_in_tx_process(output, 3, 0); + + } + timer = 0; + } +} + + +void auto_show_out_mode_process(uint8_t *key_state) +{ + static uint16_t timer = 0; + uint8_t output; + + if(key_state[KEY_MAPP_MULTI_MEDIA_VOL_VEDIO_ID] == 0u && key_state[KEY_APP_MULTI_MEDIA_VOL_LMENU_ID] == 0u \ + && key_state[KEY_APP_MULTI_MEDIA_CUSTOM_ID] == 0u && key_state[KEY_APP_MULTI_MEDIA_PREV_ID] == 1u \ + && key_state[KEY_APP_MULTI_MEDIA_NEXT_ID] == 0u && key_state[KEY_APP_MULTI_MEDIA_VOL_VOICE_ID] == 0u \ + && key_state[KEY_APP_MULTI_MEDIA_VOL_CALL_ID] == 0u && key_state[KEY_APP_MULTI_MEDIA_VOL_RMENU_ID] == 1u\ + && key_state[KEY_APP_MULTI_MEDIA_VOL_MUTE_ID] == 0u) + { + if(timer < SHOW_MOD_TIME_10S) + { + timer ++; + if(timer >= SHOW_MOD_TIME_10S) + { + output = 1; + app_sig_sws_r_auto_show_out_tx_process(output, 3, 3); + } + } + } + else + { + if(timer >= SHOW_MOD_TIME_10S) + { + output = 0; + Com_SendSignal(COM_TX_SIGSWS_R_MULTIMEDIA, &output); + app_sig_sws_r_auto_show_out_tx_process(output, 3, 0); + } + timer = 0; + } +} + +void multi_media_mileage_clear_process(uint8_t *key_state) +{ + static uint16_t timer_mileage = 0; + uint8_t output = 0; + + if(key_state[KEY_MAPP_MULTI_MEDIA_VOL_VEDIO_ID] == 0u && key_state[KEY_APP_MULTI_MEDIA_VOL_LMENU_ID] == 0u \ + && key_state[KEY_APP_MULTI_MEDIA_CUSTOM_ID] == 0u && key_state[KEY_APP_MULTI_MEDIA_PREV_ID] == 0u \ + && key_state[KEY_APP_MULTI_MEDIA_NEXT_ID] == 0u && key_state[KEY_APP_MULTI_MEDIA_VOL_VOICE_ID] == 0u \ + && key_state[KEY_APP_MULTI_MEDIA_VOL_CALL_ID] == 0u && key_state[KEY_APP_MULTI_MEDIA_VOL_RMENU_ID] == 1u\ + && key_state[KEY_APP_MULTI_MEDIA_VOL_MUTE_ID] == 1u) + { + if(timer_mileage < MILEAGE_CLEAR_TIME_15S) + { + timer_mileage ++; + if(timer_mileage >= MILEAGE_CLEAR_TIME_15S) + { + output = 1; + app_sig_sws_r_mileage_clear_tx_process(output, 3, 3); + } + } + } + else + { + if(timer_mileage >= MILEAGE_CLEAR_TIME_15S) + { + output = 0; + Com_SendSignal(COM_TX_SIGSWS_R_MULTIMEDIA, &output); + app_sig_sws_r_mileage_clear_tx_process(output, 3, 0); + + } + timer_mileage = 0; + } +} + +void AppKeyboard_MediaResetProcess(uint8_t *key_state) +{ + uint8_t output = 0u; + + if(key_state[KEY_MAPP_MULTI_MEDIA_VOL_VEDIO_ID] == 0u && key_state[KEY_APP_MULTI_MEDIA_VOL_LMENU_ID] == 0u \ + && key_state[KEY_APP_MULTI_MEDIA_CUSTOM_ID] == 0u && key_state[KEY_APP_MULTI_MEDIA_PREV_ID] == 0u \ + && key_state[KEY_APP_MULTI_MEDIA_NEXT_ID] == 1u && key_state[KEY_APP_MULTI_MEDIA_VOL_VOICE_ID] == 0u \ + && key_state[KEY_APP_MULTI_MEDIA_VOL_CALL_ID] == 0u && key_state[KEY_APP_MULTI_MEDIA_VOL_RMENU_ID] == 0u\ + && key_state[KEY_APP_MULTI_MEDIA_VOL_MUTE_ID] == 1u) + { + if(AppKeyboard.AppKey_MediaReset_Timer < APP_KEY_MEDIA_RESET_3S) + { + AppKeyboard.AppKey_MediaReset_Timer ++; + if(AppKeyboard.AppKey_MediaReset_Timer >= APP_KEY_MEDIA_RESET_3S) + { + output = 1u; + AppCan_EventSig_SWS_R_MediaReset_TxProcess(output, 3, 3); + } + } + } + else + { + if(AppKeyboard.AppKey_MediaReset_Timer >= APP_KEY_MEDIA_RESET_3S) + { + output = 0u; + Com_SendSignal(COM_TX_SIGSWS_R_MULTIMEDIA, &output); + AppCan_EventSig_SWS_R_MediaReset_TxProcess(output, 3, 0); + + } + AppKeyboard.AppKey_MediaReset_Timer = 0u; + } +} + +void AppKeyboard_MidScreenRecoverProcess(uint8_t *key_state) +{ + uint8_t output = 0u; + + if(key_state[KEY_MAPP_MULTI_MEDIA_VOL_VEDIO_ID] == 0u && key_state[KEY_APP_MULTI_MEDIA_VOL_LMENU_ID] == 0u \ + && key_state[KEY_APP_MULTI_MEDIA_CUSTOM_ID] == 0u && key_state[KEY_APP_MULTI_MEDIA_PREV_ID] == 0u \ + && key_state[KEY_APP_MULTI_MEDIA_NEXT_ID] == 0u && key_state[KEY_APP_MULTI_MEDIA_VOL_VOICE_ID] == 1u \ + && key_state[KEY_APP_MULTI_MEDIA_VOL_CALL_ID] == 0u && key_state[KEY_APP_MULTI_MEDIA_VOL_RMENU_ID] == 0u\ + && key_state[KEY_APP_MULTI_MEDIA_VOL_MUTE_ID] == 1u) + { + if(AppKeyboard.AppKey_MidScreenReset_Timer < APP_KEY_MIDSCREEN_RESET_10S) + { + AppKeyboard.AppKey_MidScreenReset_Timer ++; + if(AppKeyboard.AppKey_MidScreenReset_Timer >= APP_KEY_MIDSCREEN_RESET_10S) + { + output = 1u; + AppCan_EventSig_SWS_R_OtherRecover_TxProcess(output, 3, 3); + } + } + } + else + { + if(AppKeyboard.AppKey_MidScreenReset_Timer >= APP_KEY_MIDSCREEN_RESET_10S) + { + output = 0u; + Com_SendSignal(COM_TX_SIGSWS_R_MULTIMEDIA, &output); + AppCan_EventSig_SWS_R_OtherRecover_TxProcess(output, 3, 0); + + } + AppKeyboard.AppKey_MidScreenReset_Timer = 0u; + } +} + +void AppKeyboard_CoDriverRecoverProcess(uint8_t *key_state) +{ + uint8_t output = 0u; + + if(key_state[KEY_MAPP_MULTI_MEDIA_VOL_VEDIO_ID] == 0u && key_state[KEY_APP_MULTI_MEDIA_VOL_LMENU_ID] == 0u \ + && key_state[KEY_APP_MULTI_MEDIA_CUSTOM_ID] == 0u && key_state[KEY_APP_MULTI_MEDIA_PREV_ID] == 1u \ + && key_state[KEY_APP_MULTI_MEDIA_NEXT_ID] == 0u && key_state[KEY_APP_MULTI_MEDIA_VOL_VOICE_ID] == 0u \ + && key_state[KEY_APP_MULTI_MEDIA_VOL_CALL_ID] == 0u && key_state[KEY_APP_MULTI_MEDIA_VOL_RMENU_ID] == 0u\ + && key_state[KEY_APP_MULTI_MEDIA_VOL_MUTE_ID] == 1u) + { + if(AppKeyboard.AppKey_CoDriverScreenReset_Timer < APP_KEY_MIDSCREEN_RESET_10S) + { + AppKeyboard.AppKey_CoDriverScreenReset_Timer ++; + if(AppKeyboard.AppKey_CoDriverScreenReset_Timer >= APP_KEY_MIDSCREEN_RESET_10S) + { + output = 2u; + AppCan_EventSig_SWS_R_OtherRecover_TxProcess(output, 3, 3); + } + } + } + else + { + if(AppKeyboard.AppKey_CoDriverScreenReset_Timer >= APP_KEY_MIDSCREEN_RESET_10S) + { + output = 0u; + Com_SendSignal(COM_TX_SIGSWS_R_MULTIMEDIA, &output); + AppCan_EventSig_SWS_R_OtherRecover_TxProcess(output, 3, 0); + + } + AppKeyboard.AppKey_CoDriverScreenReset_Timer = 0u; + } +} + +void AppKeyboard_HandrailRecoverProcess(uint8_t *key_state) +{ + uint8_t output = 0u; + + if(key_state[KEY_MAPP_MULTI_MEDIA_VOL_VEDIO_ID] == 0u && key_state[KEY_APP_MULTI_MEDIA_VOL_LMENU_ID] == 0u \ + && key_state[KEY_APP_MULTI_MEDIA_CUSTOM_ID] == 0u && key_state[KEY_APP_MULTI_MEDIA_PREV_ID] == 1u \ + && key_state[KEY_APP_MULTI_MEDIA_NEXT_ID] == 0u && key_state[KEY_APP_MULTI_MEDIA_VOL_VOICE_ID] == 1u \ + && key_state[KEY_APP_MULTI_MEDIA_VOL_CALL_ID] == 0u && key_state[KEY_APP_MULTI_MEDIA_VOL_RMENU_ID] == 0u\ + && key_state[KEY_APP_MULTI_MEDIA_VOL_MUTE_ID] == 0u) + { + if(AppKeyboard.AppKey_HandrailScreenReset_Timer < APP_KEY_MIDSCREEN_RESET_10S) + { + AppKeyboard.AppKey_HandrailScreenReset_Timer ++; + if(AppKeyboard.AppKey_HandrailScreenReset_Timer >= APP_KEY_MIDSCREEN_RESET_10S) + { + output = 3u; + AppCan_EventSig_SWS_R_OtherRecover_TxProcess(output, 3, 3); + } + } + } + else + { + if(AppKeyboard.AppKey_HandrailScreenReset_Timer >= APP_KEY_MIDSCREEN_RESET_10S) + { + output = 0u; + Com_SendSignal(COM_TX_SIGSWS_R_MULTIMEDIA, &output); + AppCan_EventSig_SWS_R_OtherRecover_TxProcess(output, 3, 0); + + } + AppKeyboard.AppKey_HandrailScreenReset_Timer = 0u; + } +} + +void AppKeyboard_BackRowRecoverProcess(uint8_t *key_state) +{ + uint8_t output = 0u; + + if(key_state[KEY_MAPP_MULTI_MEDIA_VOL_VEDIO_ID] == 0u && key_state[KEY_APP_MULTI_MEDIA_VOL_LMENU_ID] == 0u \ + && key_state[KEY_APP_MULTI_MEDIA_CUSTOM_ID] == 0u && key_state[KEY_APP_MULTI_MEDIA_PREV_ID] == 0u \ + && key_state[KEY_APP_MULTI_MEDIA_NEXT_ID] == 1u && key_state[KEY_APP_MULTI_MEDIA_VOL_VOICE_ID] == 1u \ + && key_state[KEY_APP_MULTI_MEDIA_VOL_CALL_ID] == 0u && key_state[KEY_APP_MULTI_MEDIA_VOL_RMENU_ID] == 0u\ + && key_state[KEY_APP_MULTI_MEDIA_VOL_MUTE_ID] == 0u) + { + if(AppKeyboard.AppKey_BackRowReset_Timer < APP_KEY_MIDSCREEN_RESET_10S) + { + AppKeyboard.AppKey_BackRowReset_Timer ++; + if(AppKeyboard.AppKey_BackRowReset_Timer >= APP_KEY_MIDSCREEN_RESET_10S) + { + output = 4u; + AppCan_EventSig_SWS_R_OtherRecover_TxProcess(output, 3, 3); + } + } + } + else + { + if(AppKeyboard.AppKey_BackRowReset_Timer >= APP_KEY_MIDSCREEN_RESET_10S) + { + output = 0u; + Com_SendSignal(COM_TX_SIGSWS_R_MULTIMEDIA, &output); + AppCan_EventSig_SWS_R_OtherRecover_TxProcess(output, 3, 0); + + } + AppKeyboard.AppKey_BackRowReset_Timer = 0u; + } +} + +void multi_media_switch_process(void) +{ + uint8_t i; + uint8_t key_state[NUM_OF_MULTI_MEDIA_KEY]; + uint8_t PowerGear; + can_app_receive_signal(COM_RXSIGBCM1_POWER_GEAR,&PowerGear); + key_state[KEY_MAPP_MULTI_MEDIA_VOL_VEDIO_ID] = key_adc_mid_get_result(KEY_ADC_ID_VEDIO); + key_state[KEY_APP_MULTI_MEDIA_VOL_LMENU_ID] = key_adc_mid_get_result(KEY_ADC_ID_LMENU); + key_state[KEY_APP_MULTI_MEDIA_CUSTOM_ID] = key_adc_mid_get_result(KEY_ADC_ID_CUSTOM); + for(i = KEY_MAPP_MULTI_MEDIA_VOL_VEDIO_ID; i <= KEY_APP_MULTI_MEDIA_CUSTOM_ID; i ++) + { + if((key_state[i] == KEY_ADC_RESULT_UNKNOW) || (key_state[i] == KEY_ADC_RESULT_IDLE) || (key_state[i] == KEY_ADC_RESULT_FAULT)) + { + key_state[i] = 0u; + } + else + { + key_state[i] = 1u; + } + } + + key_state[KEY_APP_MULTI_MEDIA_PREV_ID] = key_digital_driver_get_state(KEY_DIGI_ID_PREV); + key_state[KEY_APP_MULTI_MEDIA_NEXT_ID] = key_digital_driver_get_state(KEY_DIGI_ID_NEXT); + key_state[KEY_APP_MULTI_MEDIA_VOL_VOICE_ID] = key_digital_driver_get_state(KEY_DIGI_ID_VOICE); + key_state[KEY_APP_MULTI_MEDIA_VOL_CALL_ID] = key_digital_driver_get_state(KEY_DIGI_ID_PHONE); + key_state[KEY_APP_MULTI_MEDIA_VOL_RMENU_ID] = key_digital_driver_get_state(KEY_DIGI_ID_RMENU); + key_state[KEY_APP_MULTI_MEDIA_VOL_MUTE_ID] = key_digital_driver_get_state(KEY_DIGI_ID_MUTE); + + for(i = KEY_APP_MULTI_MEDIA_PREV_ID; i <=KEY_APP_MULTI_MEDIA_VOL_MUTE_ID; i ++) + { + if(key_state[i] == KEY_DIGITAL_DRIVER_STATE_UP) + { + key_state[i] = 0u; + } + else + { + key_state[i] = 1u; + } + } + if( PowerGear == POWER_GEAR_ON) + { + multi_media_vedio_key_process(&key_state[0]); + multi_media_lmenu_key_process(&key_state[0]); + multi_media_custom_key_process(&key_state[0]); + multi_media_prev_key_process(&key_state[0]); + multi_media_next_key_process(&key_state[0]); + multi_media_voice_key_process(&key_state[0]); + multi_media_mute_key_process(&key_state[0]); + multi_media_call_key_process(&key_state[0]); + multi_media_rmenu_key_process(&key_state[0]); + AppKeyboard_MediaResetProcess(&key_state[0]); + AppKeyboard_MidScreenRecoverProcess(&key_state[0]); + AppKeyboard_CoDriverRecoverProcess(&key_state[0]); + AppKeyboard_HandrailRecoverProcess(&key_state[0]); + AppKeyboard_BackRowRecoverProcess(&key_state[0]); + } + multi_media_mileage_clear_process(&key_state[0]); + auto_show_in_mode_process(&key_state[0]); + auto_show_out_mode_process(&key_state[0]); +} + + + +void cruise_set_spd_sub_res_spd_add_key_process(void) +{ + uint8_t set_spd_sub_key; + uint8_t res_spd_add_key; + uint8_t output; + + set_spd_sub_key = key_adc_mid_get_result(KEY_ADC_ID_SET_SPD_SUB); + res_spd_add_key = key_adc_mid_get_result(KEY_ADC_ID_RES_SPD_ADD); + + + if(set_spd_sub_key == KEY_ADC_RESULT_PRESSS || set_spd_sub_key == KEY_ADC_RESULT_LONG) + { + output = 0x01u; + Com_SendSignal(COM_TX_SIGSWS_L_SPD_SET, &output); + } + else if(res_spd_add_key == KEY_ADC_RESULT_PRESSS || res_spd_add_key == KEY_ADC_RESULT_LONG ) + { + output = 0x03u; + Com_SendSignal(COM_TX_SIGSWS_L_SPD_SET, &output); + } + else + { + output = 0x00u; + Com_SendSignal(COM_TX_SIGSWS_L_SPD_SET, &output); + } + + + +} + + + + +void cruise_dsp_plus_key_process(void) +{ + uint8_t state; + uint8_t output; + + state = key_adc_mid_get_result(KEY_ADC_ID_DSP_PLUS); + + if(state == KEY_ADC_RESULT_PRESSS || state == KEY_ADC_RESULT_LONG) + { + output = 0x01u; + Com_SendSignal(COM_TX_SIGSWS_L_DSP_PLUS, &output); + } + else + { + output = 0x0u; + Com_SendSignal(COM_TX_SIGSWS_L_DSP_PLUS, &output); + } +} +void cruise_dsp_sub_key_process(void) +{ + uint8_t state; + uint8_t output; + + state = key_adc_mid_get_result(KEY_ADC_ID_DSP_SUB); + + if(state == KEY_ADC_RESULT_PRESSS || state == KEY_ADC_RESULT_LONG) + { + output = 0x01u; + Com_SendSignal(COM_TX_SIGSWS_L_DSP_SUB, &output); + } + else + { + output = 0x0u; + Com_SendSignal(COM_TX_SIGSWS_L_DSP_SUB, &output); + } +} + + +void cruise_fault_process(void) +{ + uint8_t state[4]; + uint8_t cruise_fault; + uint8_t i; + uint8_t output; + + state[0] = key_adc_mid_get_result(KEY_ADC_ID_SET_SPD_SUB); + state[1] = key_adc_mid_get_result(KEY_ADC_ID_RES_SPD_ADD); + state[2] = key_adc_mid_get_result(KEY_ADC_ID_DSP_PLUS); + state[3] = key_adc_mid_get_result(KEY_ADC_ID_DSP_SUB); + + cruise_fault = 0; + for(i = 0; i < 4; i ++) + { + if(state[i] >= KEY_ADC_RESULT_STICK) + { + cruise_fault = 1u; + break; + } + } + if(cruise_fault) + { + output = 0u; + Com_SendSignal(COM_TX_SIGSWS_L_CRUISE_FAULT, &output); + } + else + { + output = 1u; + Com_SendSignal(COM_TX_SIGSWS_L_CRUISE_FAULT, &output); + } + +} + + +void cruise_pick_process(void) +{ + uint8_t l_pick; + uint8_t r_pick; + uint8_t output; + + r_pick = key_digital_driver_get_state(KEY_DIGI_ID_RPICK); + l_pick = key_adc_mid_get_result(KEY_ADC_ID_LPICK); + + if(r_pick == KEY_DIGITAL_DRIVER_STATE_SHORT_DOWN) + { + output = 0x1u; + Com_SendSignal(COM_TX_SIGSWS_L_RIGHT_PICK, &output); + } + else if (r_pick == KEY_DIGITAL_DRIVER_STATE_LONG_DOWN) + { + output = 0x2u; + Com_SendSignal(COM_TX_SIGSWS_L_RIGHT_PICK, &output); + } + else + { + output = 0x0u; + Com_SendSignal(COM_TX_SIGSWS_L_RIGHT_PICK, &output); + } + + + if(l_pick == KEY_ADC_RESULT_PRESSS) + { + output = 0x1u; + Com_SendSignal(COM_TX_SIGSWS_L_LEFT_PICK, &output); + } + else if (l_pick == KEY_ADC_RESULT_LONG) + { + output = 0x2u; + Com_SendSignal(COM_TX_SIGSWS_L_LEFT_PICK, &output); + } + else + { + output = 0x0u; + Com_SendSignal(COM_TX_SIGSWS_L_LEFT_PICK, &output); + } + +} + +void cruise_switch_process(void) +{ + uint8_t PowerGear; + can_app_receive_signal(COM_RXSIGBCM1_POWER_GEAR,&PowerGear); + if( PowerGear == POWER_GEAR_ON) + { + cruise_set_spd_sub_res_spd_add_key_process(); + cruise_dsp_plus_key_process(); + cruise_dsp_sub_key_process(); + cruise_fault_process(); + cruise_pick_process(); + } +} + +/***************************************************************************** +|Prototype : +|Called by : +|Preconditions : - +|Input parameters : None +|Output parameters : None +|Return value : None +|Description : +*****************************************************************************/ +void key_app_task(void) +{ + multi_media_switch_process(); + cruise_switch_process(); +} + + + + + + +key_app_sw_state_e key_app_get_digi_state(u8 id) +{ + key_digital_driver_state_e l_key_state; + key_app_sw_state_e l_state_check = KEY_APP_SW_STATE_INACTIVE; + if(id= BACKGROUND_LIGHT_LEVEL_1 && background_light_level <= BACKGROUND_LIGHT_LEVEL_11) + { + app_pick_light.day_night_mod = APP_PICK_LIGHT_NIGHT_MOD; + } + else if(background_light_level > BACKGROUND_LIGHT_LEVEL_11 && background_light_level < BACKGROUND_LIGHT_LEVEL_RESERVED) + { + app_pick_light.day_night_mod = APP_PICK_LIGHT_DAY_MOD; + } + else + { + app_pick_light.day_night_mod = APP_PICK_LIGHT_DAY_MOD; + } + + app_pick_light.state = APP_PICK_LIGHT_STATE_IDLE; + + #if 0 + switch(app_pick_light.state) + { + case APP_PICK_LIGHT_STATE_IDLE: + pwm_set_duty(L_PICK_HIGH_LIGHT_PWM_ID, L_PICK_HIGH_LIGHT_PWM_CH, 0); + pwm_set_duty(L_PICK_LOW_LIGHT_PWM_ID, L_PICK_LOW_LIGHT_PWM_CH, 0); + pwm_set_duty(R_PICK_HIGH_LIGHT_PWM_ID, R_PICK_HIGH_LIGHT_PWM_CH, 0); + pwm_set_duty(R_PICK_LOW_LIGHT_PWM_ID, R_PICK_LOW_LIGHT_PWM_CH, 0); + app_pick_light.state = pick_light_state_process(); + if(app_pick_light.state != APP_PICK_LIGHT_STATE_IDLE) + { + app_pick_light.timer = 0u; + app_pick_light.output = 1u; + } + break; + case APP_PICK_LIGHT_STATE_ON: + if(app_pick_light.day_night_mod == APP_PICK_LIGHT_DAY_MOD) + { + pwm_set_duty(L_PICK_HIGH_LIGHT_PWM_ID, L_PICK_HIGH_LIGHT_PWM_CH, 1000); + pwm_set_duty(R_PICK_HIGH_LIGHT_PWM_ID, R_PICK_HIGH_LIGHT_PWM_CH, 1000); + } + else + { + pwm_set_duty(L_PICK_HIGH_LIGHT_PWM_ID, L_PICK_HIGH_LIGHT_PWM_CH, 0); + pwm_set_duty(R_PICK_HIGH_LIGHT_PWM_ID, R_PICK_HIGH_LIGHT_PWM_CH, 0); + } + pwm_set_duty(L_PICK_LOW_LIGHT_PWM_ID, L_PICK_LOW_LIGHT_PWM_CH, 1000); + pwm_set_duty(R_PICK_LOW_LIGHT_PWM_ID, R_PICK_LOW_LIGHT_PWM_CH, 1000); + app_pick_light.state = pick_light_state_process(); + app_pick_light.timer = 0u; + app_pick_light.output = 1u; + break; + case APP_PICK_LIGHT_STATE_FAST_FLASH: + app_pick_light.timer ++; + if(app_pick_light.output) + { + if(app_pick_light.day_night_mod == APP_PICK_LIGHT_DAY_MOD) + { + pwm_set_duty(L_PICK_HIGH_LIGHT_PWM_ID, L_PICK_HIGH_LIGHT_PWM_CH, 1000); + pwm_set_duty(R_PICK_HIGH_LIGHT_PWM_ID, R_PICK_HIGH_LIGHT_PWM_CH, 1000); + } + else + { + pwm_set_duty(L_PICK_HIGH_LIGHT_PWM_ID, L_PICK_HIGH_LIGHT_PWM_CH, 0); + pwm_set_duty(R_PICK_HIGH_LIGHT_PWM_ID, R_PICK_HIGH_LIGHT_PWM_CH, 0); + } + pwm_set_duty(L_PICK_LOW_LIGHT_PWM_ID, L_PICK_LOW_LIGHT_PWM_CH, 1000); + pwm_set_duty(R_PICK_LOW_LIGHT_PWM_ID, R_PICK_LOW_LIGHT_PWM_CH, 1000); + if(app_pick_light.timer >= PICK_LIGHT_FAST_FLASH_DUTY) + { + app_pick_light.output = 0; + } + } + else + { + pwm_set_duty(L_PICK_HIGH_LIGHT_PWM_ID, L_PICK_HIGH_LIGHT_PWM_CH, 0); + pwm_set_duty(R_PICK_HIGH_LIGHT_PWM_ID, R_PICK_HIGH_LIGHT_PWM_CH, 0); + pwm_set_duty(L_PICK_LOW_LIGHT_PWM_ID, L_PICK_LOW_LIGHT_PWM_CH, 0); + pwm_set_duty(R_PICK_LOW_LIGHT_PWM_ID, R_PICK_LOW_LIGHT_PWM_CH, 0); + if(app_pick_light.timer >= PICK_LIGHT_FAST_FLASH_PERIOD) + { + app_pick_light.timer = 0; + app_pick_light.output = 1; + app_pick_light.state = pick_light_state_process(); + } + } + break; + case APP_PICK_LIGHT_STATE_SLOW_FLASH: + app_pick_light.timer ++; + if(app_pick_light.output) + { + if(app_pick_light.day_night_mod == APP_PICK_LIGHT_DAY_MOD) + { + pwm_set_duty(L_PICK_HIGH_LIGHT_PWM_ID, L_PICK_HIGH_LIGHT_PWM_CH, 1000); + pwm_set_duty(R_PICK_HIGH_LIGHT_PWM_ID, R_PICK_HIGH_LIGHT_PWM_CH, 1000); + } + else + { + pwm_set_duty(L_PICK_HIGH_LIGHT_PWM_ID, L_PICK_HIGH_LIGHT_PWM_CH, 0); + pwm_set_duty(R_PICK_HIGH_LIGHT_PWM_ID, R_PICK_HIGH_LIGHT_PWM_CH, 0); + } + pwm_set_duty(L_PICK_LOW_LIGHT_PWM_ID, L_PICK_LOW_LIGHT_PWM_CH, 1000); + pwm_set_duty(R_PICK_LOW_LIGHT_PWM_ID, R_PICK_LOW_LIGHT_PWM_CH, 1000); + if(app_pick_light.timer >= PICK_LIGHT_SLOW_FLASH_DUTY) + { + app_pick_light.output = 0; + } + } + else + { + pwm_set_duty(L_PICK_HIGH_LIGHT_PWM_ID, L_PICK_HIGH_LIGHT_PWM_CH, 0); + pwm_set_duty(R_PICK_HIGH_LIGHT_PWM_ID, R_PICK_HIGH_LIGHT_PWM_CH, 0); + pwm_set_duty(L_PICK_LOW_LIGHT_PWM_ID, L_PICK_LOW_LIGHT_PWM_CH, 0); + pwm_set_duty(R_PICK_LOW_LIGHT_PWM_ID, R_PICK_LOW_LIGHT_PWM_CH, 0); + if(app_pick_light.timer >= PICK_LIGHT_SLOW_FLASH_PERIOD) + { + app_pick_light.timer = 0; + app_pick_light.output = 1; + app_pick_light.state = pick_light_state_process(); + } + } + + break; + default: + while(1); + } + #endif +} + +void background_light_task(void) +{ + uint8_t enter_ota_mode_req; + + uint8_t power_gear; + uint8_t background_light_level; + uint8_t pick_light_state; + + Nm_StateType can_nm_state; + Nm_ModeType can_nm_mode; + + can_app_receive_signal(COM_RXSIGMETER1_BACKGROUNDLIGHTLVLCMD, &background_light_level); + can_app_receive_signal(COM_RXSIGBCM1_POWER_GEAR, &power_gear); + can_app_receive_signal(COM_RXSIGMOD_4G_ENTER_OTA_MODE_REQ, &enter_ota_mode_req); + + CanNm_GetState(0 ,(Nm_StateType * )(&can_nm_state),(Nm_ModeType * )(&can_nm_mode)); + + + + if(power_gear == POWER_GEAR_OFF) + { + if((COM_RXIPDUMETER_1_DIR_4BF_TIMEOUTFLAG == 1u) || (background_light_level == BACKGROUND_LIGHT_LEVEL_INVALID) \ + || (background_light_level >= BACKGROUND_LIGHT_LEVEL_RESERVED)) + { + if(app_background_light.meter_1_dir_4bf_lost_comm_or_lvl_sig_invalid_timer < 0xffffu) + { + app_background_light.meter_1_dir_4bf_lost_comm_or_lvl_sig_invalid_timer ++; + } + if(app_background_light.meter_1_dir_4bf_lost_comm_or_lvl_sig_invalid_timer >= BACKGROUND_LIGHT_METER_1_DIR_4BF_LOST_COMMUNICATION_2S) + { + app_background_light.cur_level = 0u; + } + + } + else + { + if(background_light_level > BACKGROUND_LIGHT_LEVEL_11) + { + background_light_level = 0u; + } + app_background_light.cur_level = background_light_level; + app_background_light.meter_1_dir_4bf_lost_comm_or_lvl_sig_invalid_timer = 0u; + } + } + else + { + if((background_light_level != BACKGROUND_LIGHT_LEVEL_INVALID) && (background_light_level < BACKGROUND_LIGHT_LEVEL_RESERVED)) + { + if(background_light_level > BACKGROUND_LIGHT_LEVEL_11) + { + background_light_level = 0u; + } + app_background_light.cur_level = background_light_level; + } + app_background_light.meter_1_dir_4bf_lost_comm_or_lvl_sig_invalid_timer = 0u; + } + + if(COM_RXIPDUMOD_4G_49A_TIMEOUTFLAG) + { + if(app_background_light.mod_4g_49a_lost_communication_timer < 0xffffffffu) + { + app_background_light.mod_4g_49a_lost_communication_timer ++; + } + } + else + { + app_background_light.mod_4g_49a_lost_communication_timer = 0u; + } + + if(app_background_light.ota_mod) + { + app_background_light.cur_level = 0u; + + if(app_background_light.mod_4g_49a_lost_communication_timer >= BACKGROUND_LIGHT_MOD_4G_49A_LOST_COMMUNICATION_3MIN) + { + app_background_light.mod_4g_49a_lost_communication_timer = 0u; + app_background_light.ota_mod = 0u; + } + if(COM_RXIPDUMOD_4G_49A_TIMEOUTFLAG == 0u) + { + if(enter_ota_mode_req == 0u) + { + app_background_light.ota_exit_delay ++; + if(app_background_light.ota_exit_delay >= OTA_EXIT_DELAY_3S) + { + app_background_light.ota_exit_delay = 0u; + app_background_light.ota_mod = 0u; + } + } + else + { + app_background_light.ota_exit_delay = 0u; + app_background_light.ota_mod = 1u; + } + } + + } + else + { + if(COM_RXIPDUMOD_4G_49A_TIMEOUTFLAG == 0u) + { + if(enter_ota_mode_req == 1u) + { + app_background_light.ota_mod = 1u; + } + } + } + if((can_nm_state == NM_STATE_BUS_SLEEP)) + { + app_background_light.cur_level = 0; + } + app_background_light.step_timer ++; + if(app_background_light.step_timer >= BACKGROUND_LIGHT_STEP_TIME_35MS) + { + app_background_light.step_timer = 0u; + if(app_background_light.duty > background_light_level_tab[app_background_light.cur_level]) + { + app_background_light.duty --; + } + else if(app_background_light.duty < background_light_level_tab[app_background_light.cur_level]) + { + app_background_light.duty ++; + } + else + { + + } + + pwm_set_duty(BACKGROUND_LIGHT_PWM_ID, BACKGROUND_LIGHT_PWM_CH, (uint16_t)(app_background_light.duty * 10u)); + + pwm_set_duty(PICK_BACKGROUND_LIGHT_PWM_ID, L_PICK_BACKGROUND_LIGHT_PWM_CH, (uint16_t)(app_background_light.duty * 10u)); + pwm_set_duty(PICK_BACKGROUND_LIGHT_PWM_ID, R_PICK_BACKGROUND_LIGHT_PWM_CH, (uint16_t)(app_background_light.duty * 10u)); + + + } +} + + +void Led_EnterSleepMode(void) +{ + pwm_set_duty(PICK_BACKGROUND_LIGHT_PWM_ID, L_PICK_BACKGROUND_LIGHT_PWM_CH, 0); + pwm_set_duty(PICK_BACKGROUND_LIGHT_PWM_ID, R_PICK_BACKGROUND_LIGHT_PWM_CH, 0); + pwm_set_duty(BACKGROUND_LIGHT_PWM_ID, BACKGROUND_LIGHT_PWM_CH, 0); + pwm_set_duty(L_PICK_HIGH_LIGHT_PWM_ID, L_PICK_HIGH_LIGHT_PWM_CH, 0); + pwm_set_duty(L_PICK_LOW_LIGHT_PWM_ID, L_PICK_LOW_LIGHT_PWM_CH, 0); + pwm_set_duty(R_PICK_HIGH_LIGHT_PWM_ID, R_PICK_HIGH_LIGHT_PWM_CH, 0); + pwm_set_duty(R_PICK_LOW_LIGHT_PWM_ID, R_PICK_LOW_LIGHT_PWM_CH, 0); + + app_background_light.cur_level = 0; + app_background_light.duty = 0; + app_pick_light.state = APP_PICK_LIGHT_STATE_IDLE; +} + +void led_app_task(void) +{ + uint8_t system_voltage_mode; + + system_voltage_mode = system_voltage_manage_mode_get(FUNC_SYSTEM_VOLTAGE_MANAGE_ID); + + if(system_voltage_mode == SYSTEM_VOLTAGE_MODE_NORMAL) + { + background_light_task(); + //pick_light_task(); + } + else + { + pwm_set_duty(PICK_BACKGROUND_LIGHT_PWM_ID, L_PICK_BACKGROUND_LIGHT_PWM_CH, 0); + pwm_set_duty(PICK_BACKGROUND_LIGHT_PWM_ID, R_PICK_BACKGROUND_LIGHT_PWM_CH, 0); + pwm_set_duty(BACKGROUND_LIGHT_PWM_ID, BACKGROUND_LIGHT_PWM_CH, 0); + pwm_set_duty(L_PICK_HIGH_LIGHT_PWM_ID, L_PICK_HIGH_LIGHT_PWM_CH, 0); + pwm_set_duty(L_PICK_LOW_LIGHT_PWM_ID, L_PICK_LOW_LIGHT_PWM_CH, 0); + pwm_set_duty(R_PICK_HIGH_LIGHT_PWM_ID, R_PICK_HIGH_LIGHT_PWM_CH, 0); + pwm_set_duty(R_PICK_LOW_LIGHT_PWM_ID, R_PICK_LOW_LIGHT_PWM_CH, 0); + + app_background_light.cur_level = 0; + app_background_light.duty = 0; + app_pick_light.state = APP_PICK_LIGHT_STATE_IDLE; + } + +} \ No newline at end of file diff --git a/code_app_out/Source/app/led_app.h b/code_app_out/Source/app/led_app.h new file mode 100644 index 0000000..5872ef4 --- /dev/null +++ b/code_app_out/Source/app/led_app.h @@ -0,0 +1,31 @@ +#ifndef LED_APP_H +#define LED_APP_H +#include "common_types.h" + + + +#define BACKGROUND_LIGHT_PWM_ID PWM_BASE_ID_GPTM1 +#define BACKGROUND_LIGHT_PWM_CH 3 + +#define PICK_BACKGROUND_LIGHT_PWM_ID PWM_BASE_ID_GPTM1 +#define L_PICK_BACKGROUND_LIGHT_PWM_CH 2 +#define R_PICK_BACKGROUND_LIGHT_PWM_CH 1 + + +#define L_PICK_HIGH_LIGHT_PWM_ID PWM_BASE_ID_ATM +#define L_PICK_LOW_LIGHT_PWM_ID PWM_BASE_ID_ATM +#define R_PICK_HIGH_LIGHT_PWM_ID PWM_BASE_ID_ATM +#define R_PICK_LOW_LIGHT_PWM_ID PWM_BASE_ID_ATM + + +#define L_PICK_HIGH_LIGHT_PWM_CH 2 +#define L_PICK_LOW_LIGHT_PWM_CH 1 + +#define R_PICK_HIGH_LIGHT_PWM_CH 3 +#define R_PICK_LOW_LIGHT_PWM_CH 4 + +void led_app_task(void); +uint8_t is_led_app_allow_sleep(void); +void led_app_init(void); +void Led_EnterSleepMode(void); +#endif \ No newline at end of file diff --git a/code_app_out/Source/app/low_power_app.c b/code_app_out/Source/app/low_power_app.c new file mode 100644 index 0000000..4beccc7 --- /dev/null +++ b/code_app_out/Source/app/low_power_app.c @@ -0,0 +1,336 @@ +#include "low_power_app.h" +#include "Cpu.h" +#include "Can_BusOff.h" +#include "app_encoder.h" +#include "CanNm.h" +#include "can_app.h" +#include "Com_Cfg.h" +#include "led_app.h" +#include "main.h" +#include "Can_Pl.h" +#include "CanIf.h" +#include "pwm_manage.h" +#include "can_app.h" +#include "WheelHeat.h" +#include "SimpleOs_Time.h" +#define LOW_POWER_TASK_PERIOD_TIME 10u + +#define GOTO_SLEEP_TIMEOUT (5000u / LOW_POWER_TASK_PERIOD_TIME) +#define LOW_POWER_PRE_WAKEUP_DELAY_2S (2000u / LOW_POWER_TASK_PERIOD_TIME) + +#define LOW_POWER_APP_ENTER_CRITICAL() System_DisableIrqGlobal() +#define LOW_POWER_APP_EXIT_CRITICAL() System_EnableIrqGlobal() + + +uint8_t lp_tim16_wakeup_flag = 0; +uint8_t gpio_wakeup_flag = 0; +uint16_t goto_sleep_timer = 0; + +uint8_t u8LowPowerPreWakeUpDelay = 0u; +uint8_t u8LowPower4BFMsgWakeUpFlag = 0u; +void lp_tim16_wakeup_flag_set(void) +{ + lp_tim16_wakeup_flag = 1; +} + +void lp_tim16_wakeup_flag_clear(void) +{ + lp_tim16_wakeup_flag = 0; +} + +uint8_t lp_tim16_wakeup_flag_get(void) +{ + return (lp_tim16_wakeup_flag); +} + +void LowPower4BFMsgWakeUpFlag_Set(void) +{ + u8LowPower4BFMsgWakeUpFlag = 1u; +} +void LowPower4BFMsgWakeUpFlag_Clear(void) +{ + u8LowPower4BFMsgWakeUpFlag = 0u; +} + +void gpio_wakeup_flag_set(void) +{ + gpio_wakeup_flag = 1; +} + +void gpio_wakeup_flag_clear(void) +{ + gpio_wakeup_flag = 0; +} + +uint8_t gpio_wakeup_flag_get(void) +{ + return gpio_wakeup_flag; +} + +/** + * @brief Sleep + * @param void + * @retval void + */ +void Sleep(void) +{ + + FL_PMU_SleepInitTypeDef LPM_InitStruct; + + // FL_CMU_RCLF_Enable(); /* 暂开启RCLF */ + FL_RMU_PDR_Enable(RMU); /* 打开PDR */ + FL_RMU_BOR_Disable(RMU); /* 关闭BOR 2uA */ + + FL_VREF_Disable(VREF); /* 关闭VREF1p2 */ + + LPM_InitStruct.deepSleep = FL_PMU_SLEEP_MODE_NORMAL; + LPM_InitStruct.powerMode = FL_PMU_POWER_MODE_SLEEP_OR_DEEPSLEEP; + LPM_InitStruct.wakeupFrequency = FL_PMU_RCHF_WAKEUP_FREQ_8MHZ; + LPM_InitStruct.wakeupDelay = FL_PMU_WAKEUP_DELAY_2US; + LPM_InitStruct.LDOLowPowerMode = FL_PMU_LDO_LPM_DISABLE; + LPM_InitStruct.coreVoltageScaling = FL_DISABLE; + FL_PMU_Sleep_Init(PMU, &LPM_InitStruct); + /* 使能BOR */ + FL_RMU_BOR_Enable(RMU); + /* 睡眠电源模式*/ + FL_PMU_SetLowPowerMode(PMU, FL_PMU_POWER_MODE_SLEEP_OR_DEEPSLEEP); + /* 休眠 */ + __WFI(); + /* 使能VREF1p2 */ + FL_VREF_Enable(VREF); +} + + + +void low_power_goto_sleep(void) +{ + LOW_POWER_APP_ENTER_CRITICAL(); + (void)Led_EnterSleepMode(); + (void)tim_de_init(); + (void)adc_de_init(); + (void)CanTrcv_Disable(); + (void)gpio_goto_sleep(); + (void)pwm_manage_deinit(); + (void)lptim16_init(); + + SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk; + LOW_POWER_APP_EXIT_CRITICAL(); +} + + +uint8_t low_power_pre_wakeup_Process(void) +{ + logic_timer_s logic_delay_100ms; + uint8_t time_out; + uint8_t power_gear; + uint8_t ret; + uint8_t time_100ms_cnt; + + (void)clk_init(); + (void)tim_init(); + (void)gpio_goto_wakeup(); + (void)Can_Init(); + (void)CanIf_SetControllerMode(0,CANIF_CS_STARTED); + (void)Com_RxStart(); + (void)logic_timer_start((logic_timer_s*)&logic_delay_100ms, (void*)NULL_POINT , 100); + time_100ms_cnt = 0; + for(;;) + { + + can_app_receive_signal(COM_RXSIGBCM1_POWER_GEAR, &power_gear); + if(power_gear == POWER_GEAR_ON) + { + ret = true; + break; + } + if( CanNm_RxIndFlg[0] == TRUE ) + { + CanNm_RxIndFlg[0] = FALSE; + ret = true; + break; + } + time_out = logic_timer_out((logic_timer_s*)&logic_delay_100ms); + if(time_out) + { + (void)logic_timer_start((logic_timer_s*)&logic_delay_100ms, (void*)NULL_POINT , 100); + wdog_task(); + time_100ms_cnt ++; + if(time_100ms_cnt >= 20u) + { + ret = false; + break; + } + + } + } + + return ret; +} + + + +void low_power_goto_wakeup(void) +{ + LOW_POWER_APP_ENTER_CRITICAL(); + + clk_init(); + gpio_init(); + adc_init(); + tim_init(); + system_voltage_manage_init(); + (void)app_encoder_init(); + stack_check_init(); + CanTrcv_Init(); + (void)Can_Init(); + CanIf_Init(); + (void)CanIf_SetControllerMode(0,CANIF_CS_STARTED); + Com_Init(); + //Com_TxStart(); + Com_RxStart(); + CanTp_Init(((void *) 0)); + CAN_BusOff_Init(); + Dcm_Init(((void *) 0)); + key_app_init(); + (void)key_encoder_driver_init(); + cal_did_init(); + boot_app_init(); + random_init(); + service_27_init(); + dem_task_init(); + WheelHeat_Init(); + (void)CanApp_WakeupProcess(); + // CanNm_PassiveStartUp(0); + FL_LPTIM16_DeInit(LPTIM16); + SimpleOsTime_Init(); + goto_sleep_timer = 0; + u8LowPowerPreWakeUpDelay = LOW_POWER_PRE_WAKEUP_DELAY_2S; + u8LowPower4BFMsgWakeUpFlag = 0; + LOW_POWER_APP_EXIT_CRITICAL(); +} +void low_power_process(void) +{ + for(;;) + { + wdog_task(); + + (void)lp_tim16_wakeup_flag_clear(); + (void)gpio_wakeup_flag_clear(); + (void)low_power_goto_sleep(); + (void)CanTrcv_Disable(); + Sleep(); + if(gpio_wakeup_flag_get() != 0u) + { + low_power_goto_wakeup(); + break; + } + } +} + +void LowPowerPreWakeUpDelay_Start(void) +{ + u8LowPowerPreWakeUpDelay = LOW_POWER_PRE_WAKEUP_DELAY_2S; +} + +uint8_t Is_LowPowerPreWakeUpDelay_Empty(void) +{ + uint8_t Ret; + + if(u8LowPowerPreWakeUpDelay != 0U) + { + Ret = FALSE; + } + else + { + Ret = TRUE; + } + return Ret; +} + + +void low_power_app_task(void) +{ + Nm_StateType can_nm_state; + Nm_ModeType can_nm_mode; + uint8_t power_gear; + uint8_t led_app_allow_sleep; + + CanNm_GetState(0 ,(Nm_StateType *)(&can_nm_state),(Nm_ModeType *)(&can_nm_mode)); + can_app_receive_signal(COM_RXSIGBCM1_POWER_GEAR, &power_gear); + + switch(can_nm_state) + { + case NM_STATE_UNINIT: + while(1); + break; + case NM_STATE_BUS_SLEEP: + if(u8LowPowerPreWakeUpDelay) + { + u8LowPowerPreWakeUpDelay --; + if((power_gear != POWER_GEAR_OFF) || (u8LowPower4BFMsgWakeUpFlag != 0u)) + { + u8LowPowerPreWakeUpDelay = 0; + CanNm_PassiveStartUp(0); + break; + } + } + else + { + led_app_allow_sleep = is_led_app_allow_sleep(); + goto_sleep_timer ++; + if((led_app_allow_sleep == true) || (goto_sleep_timer >= GOTO_SLEEP_TIMEOUT)) + { + low_power_process(); + } + } + + break; + case NM_STATE_PREPARE_BUS_SLEEP: + goto_sleep_timer = 0; + if((power_gear != POWER_GEAR_OFF)) + { + CanNm_PassiveStartUp(0); + } + break; + case NM_STATE_READY_SLEEP: + goto_sleep_timer = 0; + if((power_gear != POWER_GEAR_OFF)) + { + CanNm_NetworkRequest(0); + } + break; + case NM_STATE_REPEAT_MESSAGE: + goto_sleep_timer = 0; + if((power_gear != POWER_GEAR_OFF)) + { + CanNm_NetworkRequest(0); + } + else + { + CanNm_NetworkRelease(0); + } + break; + case NM_STATE_NORMAL_OPERATION: + case NM_STATE_SYNCHRONIZE: + case NM_STATE_WAIT_CHECK_ACTIVATION: + case NM_STATE_WAIT_NETWORK_STARTUP: + goto_sleep_timer = 0; + if((power_gear == POWER_GEAR_OFF)) + { + CanNm_NetworkRelease(0); + } + break; + default: + while(1); + break; + + } + +} + + + + + + + + diff --git a/code_app_out/Source/app/low_power_app.h b/code_app_out/Source/app/low_power_app.h new file mode 100644 index 0000000..af1f6b2 --- /dev/null +++ b/code_app_out/Source/app/low_power_app.h @@ -0,0 +1,17 @@ +#ifndef LOW_POWER_APP_H +#define LOW_POWER_APP_H +#include "common_types.h" + + +void low_power_app_task(void); +uint8_t lp_tim16_wakeup_flag_get(void); +void lp_tim16_wakeup_flag_clear(void); +void lp_tim16_wakeup_flag_set(void); + + +void gpio_wakeup_flag_set(void); +void gpio_wakeup_flag_clear(void); +uint8_t gpio_wakeup_flag_get(void); +void LowPower4BFMsgWakeUpFlag_Clear(void); +void LowPower4BFMsgWakeUpFlag_Set(void); +#endif \ No newline at end of file diff --git a/code_app_out/Source/app/main.h b/code_app_out/Source/app/main.h new file mode 100644 index 0000000..d7adf25 --- /dev/null +++ b/code_app_out/Source/app/main.h @@ -0,0 +1,132 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file : main.h + * @brief : Header for main.c file. + * This file contains the common defines of the application. + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2019 FMSH. + * All rights reserved.

+ * + * This software component is licensed by FM under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ +/* USER CODE END Header */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __MAIN_H +#define __MAIN_H + +#ifdef __cplusplus +extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include +#include +#include +#include +#include "common_types.h" +#include "common_cfg.h" +#include "mf_config.h" +#include "fm33lg0xx_fl.h" +#if defined(USE_FULL_ASSERT) +#include "fm33_assert.h" +#endif /* USE_FULL_ASSERT */ +#include "system_config.h" + +#include "nvic.h" + +#include "clk.h" +#include "svd.h" +#include "gpio.h" +#include "tim.h" +#include "adc.h" +#include "i2c.h" +#include "Cpu.h" +#include "rmu.h" + +//#include "pwm.h" +#include "wdog.h" +//#include "spm.h" +#include "Can.h" +//#include "nvm.h" +#include "eeprom.h" +#include "eeprom_seq.h" +#include "eeprom_state_machine.h" + +//#include "common_timer.h" +#include "random_pseudo.h" +#include "service_27.h" + +#include "logic_timer.h" +#include "CanTrcv.h" +#include "CanIf.h" +#include "CanIf_Cfg.h" +#include "Com.h" +#include "CanTp.h" +#include "Dcm.h" +#include "Demm.h" +#include "stack_check.h" +//#include "power_drive.h" +#include "system_voltage_manage.h" +#include "calibration.h" + +#include "key_app.h" + + +#ifdef CAN_AUTOSAR_NM_EN +#include "CanNm.h" +//#include "NM.h" +#endif +#include "boot_app.h" +#include "fault_detect.h" + + + +/* Private includes ----------------------------------------------------------*/ +/* USER CODE BEGIN Includes */ + +/* USER CODE END Includes */ + +/* Exported types ------------------------------------------------------------*/ +/* USER CODE BEGIN ET */ + +/* USER CODE END ET */ + +/* Exported constants --------------------------------------------------------*/ +/* USER CODE BEGIN EC */ + +/* USER CODE END EC */ + +/* Exported macro ------------------------------------------------------------*/ +/* USER CODE BEGIN EM */ + +/* USER CODE END EM */ + +/* Exported functions prototypes ---------------------------------------------*/ +void Error_Handler(void); + +/* USER CODE BEGIN EFP */ + +/* USER CODE END EFP */ + +/* Private defines -----------------------------------------------------------*/ + +/* USER CODE BEGIN Private defines */ + +/* USER CODE END Private defines */ + +#ifdef __cplusplus +} +#endif + +#endif /* __MAIN_H */ + +/************************ (C) COPYRIGHT FMSH *****END OF FILE****/ diff --git a/code_app_out/Source/app/system_config.h b/code_app_out/Source/app/system_config.h new file mode 100644 index 0000000..4b32ba5 --- /dev/null +++ b/code_app_out/Source/app/system_config.h @@ -0,0 +1,66 @@ +/** + * @copyright: KUWE technologies Co.,Ltd. 2013-2015.all rights reserved. + * @file: system_config.h + * @brief: 用于系统的配置， + * @author: + * @version: V1.0.0 + * @date: 2014-03-15 + * @history: + * 1. + * author: + * version:V1.0.0 + * date:2014-03-15 + * modification:初版 + */ + +#ifndef _SYSTEM_CONFIG_H_ +#define _SYSTEM_CONFIG_H_ + +#include "tim.h" +//#include "common_timer.h" + + +#if 0 +//主任务的时间 +#define APP_TASK_1MS 1u +#define APP_TASK_2MS 2u +#define APP_TASK_5MS 5u +#define APP_TASK_10MS 10u +#define APP_TASK_100MS 100u +#endif + + + + +//#define ADC_PL1_EN + +//功能相关的宏--车辆状态 +#define CAN_APP_USE_VEHICLE_STATE_SIGNAL 1 + +//测试pwm +//#define CAN_APP_USE_PWM 1 + +//#define TEST_SLEEP 1 + +//#define HAEDWARE_VERSION_DEMO 0 +#define HAEDWARE_VERSION_SA2FC 1 +#define HAEDWARE_VERSION_B_0 2 //B样第一次； + + +#define HAEDWARE_VERSION_TYPE HAEDWARE_VERSION_B_0 + + + +#define DEFAULT_GOTO_APP_DEFAULT_SEESION_78 //当跳转到APP前，先只发送78,要在app做逻辑 + + +#define OUTPUT_MD_SET() //{DDRP_DDRP0=1;} +#define OUTPUT_MD_ON() //{PTP_PTP0=1;} +#define OUTPUT_MD_OFF() //{PTP_PTP0=0;} + +#define HAEDWARE_VERSION_V0_1 1u +#define HAEDWARE_VERSION_V0_2 2u +#define HAEDWARE_VERSION_NUMBER HAEDWARE_VERSION_V0_2 + + +#endif //_SYSTEM_CONFIG_H_ \ No newline at end of file diff --git a/code_app_out/Source/app/system_voltage_app.c b/code_app_out/Source/app/system_voltage_app.c new file mode 100644 index 0000000..3bcdc5b --- /dev/null +++ b/code_app_out/Source/app/system_voltage_app.c @@ -0,0 +1,86 @@ +#include "system_voltage_app.h" +#include "system_voltage_manage.h" +#include "app_encoder.h" +#include "key_encoder_driver.h" +#include "key_app.h" +#include "led_app.h" +#include "pwm_manage.h" +#include "Com.h" +#include "Demm.h" +#include "Dcm.h" +#include "Dcm_Types.h" +#include "CanNm.h" +#include "can_app.h" +void system_voltage_app_task(void) +{ + Nm_StateType can_nm_state; + Nm_ModeType can_nm_mode; + uint8_t system_voltage_mode; + uint8_t CAN_ControlBy; + + system_voltage_mode = system_voltage_manage_mode_get(FUNC_SYSTEM_VOLTAGE_MANAGE_ID); + + if(system_voltage_mode != SYSTEM_VOLTAGE_MODE_NORMAL) + { + (void)app_encoder_init(); + (void)key_encoder_driver_init(); + (void)key_app_init(); + (void)led_app_init(); + (void)pwm_set_duty(BACKGROUND_LIGHT_PWM_ID, BACKGROUND_LIGHT_PWM_CH, 0); + (void)pwm_set_duty(PICK_BACKGROUND_LIGHT_PWM_ID, L_PICK_BACKGROUND_LIGHT_PWM_CH, 0); + (void)pwm_set_duty(PICK_BACKGROUND_LIGHT_PWM_ID, R_PICK_BACKGROUND_LIGHT_PWM_CH, 0); + (void)pwm_set_duty(L_PICK_HIGH_LIGHT_PWM_ID, L_PICK_HIGH_LIGHT_PWM_CH, 0); + (void)pwm_set_duty(L_PICK_LOW_LIGHT_PWM_ID, L_PICK_LOW_LIGHT_PWM_CH, 0); + (void)pwm_set_duty(R_PICK_HIGH_LIGHT_PWM_ID, R_PICK_HIGH_LIGHT_PWM_CH, 0); + (void)pwm_set_duty(R_PICK_LOW_LIGHT_PWM_ID, R_PICK_LOW_LIGHT_PWM_CH, 0); + } + else + { + + } + + system_voltage_mode = system_voltage_manage_mode_get(COMM_SYSTEM_VOLTAGE_MANAGE_ID); + CanNm_GetState(0 ,(Nm_StateType *)(&can_nm_state),(Nm_ModeType *)(&can_nm_mode)); + CAN_ControlBy = CAN_GetControlBy(); + if(CAN_ControlBy == CAN_CONTROL_BY_APP) + { + if((system_voltage_mode != SYSTEM_VOLTAGE_MODE_NORMAL) && (system_voltage_mode != SYSTEM_VOLTAGE_MODE_UNKNOWN)) + { + if(can_nm_state > NM_STATE_READY_SLEEP) + { + (void)CanNm_DisableCommunication(0); + + } + if(can_nm_state > NM_STATE_PREPARE_BUS_SLEEP) + { + (void)Com_TxStop(); + } + + + } + else + { + if(can_nm_state > NM_STATE_READY_SLEEP) + { + (void)CanNm_EnableCommunication(0); + } + if(can_nm_state > NM_STATE_PREPARE_BUS_SLEEP) + { + (void)Com_TxStart(); + } + + } + + } + + + system_voltage_mode = system_voltage_manage_mode_get(DTC_SYSTEM_VOLTAGE_MANAGE_ID); + if((system_voltage_mode != SYSTEM_VOLTAGE_MODE_NORMAL) && (system_voltage_mode != SYSTEM_VOLTAGE_MODE_UNKNOWN)) + { + (void)dem_disable_dtc_record_update(); + } + else + { + (void)dem_enable_dtc_record_update(); + } +} \ No newline at end of file diff --git a/code_app_out/Source/app/system_voltage_app.h b/code_app_out/Source/app/system_voltage_app.h new file mode 100644 index 0000000..d51cdce --- /dev/null +++ b/code_app_out/Source/app/system_voltage_app.h @@ -0,0 +1,6 @@ +#ifndef SYSTEM_VOLTAGE_APP_H +#define SYSTEM_VOLTAGE_APP_H + + +void system_voltage_app_task(void); +#endif \ No newline at end of file diff --git a/code_app_out/Source/app/user_init.c b/code_app_out/Source/app/user_init.c new file mode 100644 index 0000000..a20c993 --- /dev/null +++ b/code_app_out/Source/app/user_init.c @@ -0,0 +1,138 @@ +#include "user_init.h" + +void ClockInit(uint32_t clock) +{ + FL_FLASH_SetReadWait(FLASH, FL_FLASH_READ_WAIT_2CYCLE); + switch (clock) + { + case FL_CMU_RCHF_FREQUENCY_8MHZ: + FL_CMU_RCHF_WriteTrimValue(RCHF8M_TRIM); + FL_FLASH_SetReadWait(FLASH, FL_FLASH_READ_WAIT_0CYCLE); + FL_CDIF_SetPrescaler(CDIF, FL_CDIF_PSC_DIV1); + break; + + case FL_CMU_RCHF_FREQUENCY_16MHZ: + FL_CMU_RCHF_WriteTrimValue(RCHF16M_TRIM); + FL_FLASH_SetReadWait(FLASH, FL_FLASH_READ_WAIT_0CYCLE); + FL_CDIF_SetPrescaler(CDIF, FL_CDIF_PSC_DIV2); + break; + + case FL_CMU_RCHF_FREQUENCY_24MHZ: + FL_CMU_RCHF_WriteTrimValue(RCHF24M_TRIM); + FL_FLASH_SetReadWait(FLASH, FL_FLASH_READ_WAIT_0CYCLE); + FL_CDIF_SetPrescaler(CDIF, FL_CDIF_PSC_DIV4); + break; + + case FL_CMU_RCHF_FREQUENCY_32MHZ: + FL_CMU_RCHF_WriteTrimValue(RCHF32M_TRIM); + FL_FLASH_SetReadWait(FLASH, FL_FLASH_READ_WAIT_1CYCLE); + FL_CDIF_SetPrescaler(CDIF, FL_CDIF_PSC_DIV4); + break; + + default: + FL_CMU_RCHF_WriteTrimValue(RCHF8M_TRIM); + FL_FLASH_SetReadWait(FLASH, FL_FLASH_READ_WAIT_0CYCLE); + FL_CDIF_SetPrescaler(CDIF, FL_CDIF_PSC_DIV1); + break; + } + + FL_CMU_RCHF_SetFrequency(clock); + FL_CMU_SetSystemClockSource(FL_CMU_SYSTEM_CLK_SOURCE_RCHF); +} + +void FoutInit(void) +{ + FL_GPIO_InitTypeDef init = {0}; + + init.pin = FL_GPIO_PIN_11; + init.mode = FL_GPIO_MODE_DIGITAL; + init.outputType = FL_GPIO_OUTPUT_PUSHPULL; + init.pull = (uint32_t)FL_DISABLE; + FL_GPIO_Init(GPIOD, &init); + + FL_GPIO_SetFOUT0(GPIO, FL_GPIO_FOUT0_SELECT_AHBCLK_DIV64); +} + +#ifndef MFANG + +#ifdef __CC_ARM +#pragma import(__use_no_semihosting) +//标准库需要的支持函数 +struct __FILE +{ + int handle; +}; +FILE __stdout; +#endif + +//定义_sys_exit()以避免使用半主机模式 +void _sys_exit(int x) +{ + x = x; +} + +#if 0 +//重定义fputc函数 +int fputc(int ch, FILE *f) +{ + FL_UART_WriteTXBuff(UART0, (uint8_t)ch); + while(FL_UART_IsActiveFlag_TXBuffEmpty(UART0) != FL_SET); + return ch; +} +#endif + +void DebugUartInit(void) +{ + FL_GPIO_InitTypeDef GPIO_InitStruct = {0}; + FL_UART_InitTypeDef UART_InitStruct = {0}; + + //PA13:UART0-RX PA14:UART0-TX + GPIO_InitStruct.pin = FL_GPIO_PIN_13|FL_GPIO_PIN_14; + GPIO_InitStruct.mode = FL_GPIO_MODE_DIGITAL; + GPIO_InitStruct.outputType = FL_GPIO_OUTPUT_PUSHPULL; + GPIO_InitStruct.pull = (uint32_t)FL_ENABLE; + GPIO_InitStruct.remapPin = (uint32_t)FL_DISABLE; + FL_GPIO_Init(GPIOA, &GPIO_InitStruct); + + UART_InitStruct.clockSrc = FL_CMU_UART0_CLK_SOURCE_APBCLK; + + UART_InitStruct.baudRate = 115200; //波特率 + UART_InitStruct.dataWidth = FL_UART_DATA_WIDTH_8B; //数据位数 + UART_InitStruct.stopBits = FL_UART_STOP_BIT_WIDTH_1B; //停止位 + UART_InitStruct.parity = FL_UART_PARITY_EVEN; //奇偶校验 + UART_InitStruct.transferDirection = FL_UART_DIRECTION_TX_RX; //接收-发送使能 + FL_UART_Init(UART0, &UART_InitStruct); +} + +void LedInit(void) +{ + uint8_t count = 5; + + FL_GPIO_InitTypeDef GPIO_InitStruct = {0}; + + FL_GPIO_ResetOutputPin(LED0_GPIO, LED0_PIN); + + GPIO_InitStruct.pin = LED0_PIN; + GPIO_InitStruct.mode = FL_GPIO_MODE_OUTPUT; + GPIO_InitStruct.outputType = FL_GPIO_OUTPUT_PUSHPULL; + GPIO_InitStruct.pull = (uint8_t)FL_DISABLE; + FL_GPIO_Init(LED0_GPIO, &GPIO_InitStruct); + + while (count--) + { + LED0_ON(); + FL_DelayMs(100); + LED0_OFF(); + FL_DelayMs(100); + } +} + +#endif + +void UserInit(void) +{ +#ifndef MFANG + LedInit(); + DebugUartInit(); +#endif +} diff --git a/code_app_out/Source/app/user_init.h b/code_app_out/Source/app/user_init.h new file mode 100644 index 0000000..1c9d892 --- /dev/null +++ b/code_app_out/Source/app/user_init.h @@ -0,0 +1,24 @@ +#ifndef __USER_INIT_H__ +#define __USER_INIT_H__ + +#include "main.h" +#ifndef MFANG +#include +#endif + + +#ifndef MFANG + +#define LED0_GPIO GPIOB +#define LED0_PIN FL_GPIO_PIN_4 + +#define LED0_ON() FL_GPIO_ResetOutputPin(LED0_GPIO, LED0_PIN) +#define LED0_OFF() FL_GPIO_SetOutputPin(LED0_GPIO, LED0_PIN) +#define LED0_TOG() FL_GPIO_ToggleOutputPin(LED0_GPIO, LED0_PIN) + +#endif + +void UserInit(void); +void FoutInit(void); + +#endif diff --git a/code_app_out/Source/bsp/Cpu.c b/code_app_out/Source/bsp/Cpu.c new file mode 100644 index 0000000..2b3d5c0 --- /dev/null +++ b/code_app_out/Source/bsp/Cpu.c @@ -0,0 +1,151 @@ +/** ########################################################################## +** Filename : +** Project : +** Module : +** Processor : +** Version : +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20191106- --V01-- --LYJ--- --����-- +** -20230602- --V1.0-- --mingyea--- --�޸�-- + +** #########################################################################*/ + + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ +#include "cpu.h" +#include "common_types.h" +#include "common_cfg.h" + + +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ +typedef struct +{ + u32 low; + u32 high; + u8 iwdtslp; + u8 iwdtslp_f; +}cpu_opt_bytes_t; +cpu_opt_bytes_t g_cpu_opt_bytes; + + +/*--------------------------------------------------------------------------- +- S T A T I C V A R I A B L E S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +* G L O B A L V A R I A B L E S +----------------------------------------------------------------------------*/ + +static uint32_t ulInterruptDisableCount = 0; +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ + + + + +/*--------------------------------------------------------------------------- +|Prototype : HardFault_Handler +|Called by : None +|Preconditions : None +|Input parameters : None +|Output parameters : None +|Return value : None +|Description : TBD Cpu configuration will be generated here +----------------------------------------------------------------------------*/ +void HardFault_Handler(void) +{ + SystemSoftwareReset(); +} + +/*--------------------------------------------------------------------------- +|Prototype : cpu_get_opt_bytes +|Called by : None +|Preconditions : None +|Input parameters : None +|Output parameters : None +|Return value : None +|Description : +----------------------------------------------------------------------------*/ +void cpu_get_opt_bytes(void) +{ + g_cpu_opt_bytes.low = *(u32*)0x1ffffc00; + g_cpu_opt_bytes.high = *(u32*)0x1ffffc04; + + g_cpu_opt_bytes.iwdtslp = (g_cpu_opt_bytes.high >> 4) & 0x0f; + g_cpu_opt_bytes.iwdtslp_f = (g_cpu_opt_bytes.high >> 20) & 0x0f; + +} + + + +/*--------------------------------------------------------------------------- +|Prototype : System_EnableIrqGlobal +|Called by : None +|Preconditions : None +|Input parameters : None +|Output parameters : None +|Return value : None +|Description : +----------------------------------------------------------------------------*/ +void System_EnableIrqGlobal(void) +{ + if(ulInterruptDisableCount > 0ul) + { + ulInterruptDisableCount --; + if(ulInterruptDisableCount == 0ul) + { + __enable_irq(); + } + } +} + + +/*--------------------------------------------------------------------------- +|Prototype : System_DisableIrqGlobal +|Called by : None +|Preconditions : None +|Input parameters : None +|Output parameters : None +|Return value : None +|Description : +----------------------------------------------------------------------------*/ +void System_DisableIrqGlobal(void) +{ + if(ulInterruptDisableCount < 0xfffffffful) + { + __disable_irq(); + ulInterruptDisableCount ++; + } + else + { + SystemSoftwareReset(); + } +} + +/* END Cpu. */ diff --git a/code_app_out/Source/bsp/Cpu.h b/code_app_out/Source/bsp/Cpu.h new file mode 100644 index 0000000..dba1ea2 --- /dev/null +++ b/code_app_out/Source/bsp/Cpu.h @@ -0,0 +1,91 @@ +/** ########################################################################## +** Filename : +** Project : +** Module : +** Processor : +** Version : 1.0 +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20230602- --V1.0-- --mingyea--- --修改-- + +** #########################################################################*/ + +#ifndef Cpu_H__ +#define Cpu_H__ + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ +#include "common_types.h" +#include "fm33lg0xx.h" + +#include "fm33lg0xx_fl.h" +#if defined(USE_FULL_ASSERT) +#include "fm33_assert.h" +#endif /* USE_FULL_ASSERT */ +#include "assert.h" + +/*Include shared modules, which are used for whole project*/ +#if 0 +#include "device_registers.h" + +#include "interrupt_manager.h" +#include "clock.h" +#include "osif.h" +#include "lin_driver.h" +#include "lin_common_api.h" +#include "edma_driver.h" +#include "lptmr_driver.h" +/* Including needed modules to compile this module/procedure */ +#include "lin_cfg.h" +#include "lin1.h" +#include "lin2.h" +//#include "clockMan1.h" +//6#include "pin_mux.h" +//#include "dmaController1.h" +#include "lpTmr1.h" +#endif +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ + + + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ + + + +/*--------------------------------------------------------------------------- +- G L O B A L V A R I A B L E S +- only configuration table allowed here,variables are not allowed! +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ +void cpu_get_opt_bytes(void); +void System_EnableIrqGlobal(void); +void System_DisableIrqGlobal(void); + +/* END Cpu. */ + +#endif +/* Cpu_H */ + diff --git a/code_app_out/Source/bsp/adc.c b/code_app_out/Source/bsp/adc.c new file mode 100644 index 0000000..dee1cd4 --- /dev/null +++ b/code_app_out/Source/bsp/adc.c @@ -0,0 +1,392 @@ +/** ########################################################################## +** Filename : +** Project : +** Module : +** Processor : +** Version : +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20191106- --V01-- --LYJ--- --初版-- +** -20230602- --V1.0-- --mingyea--- --修改-- + +** #########################################################################*/ + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ +#include "queue_entity.h" +#include "logic_timer.h" +#include "adc.h" +#include "gpio.h" +#include "common_memory.h" +#include "dma.h" + + +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- S T A T I C V A R I A B L E S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +* G L O B A L V A R I A B L E S +----------------------------------------------------------------------------*/ +adc_s g_adc; + + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ +static void adc_data_operate(void); + + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description :ADC中断服务函数 +----------------------------------------------------------------------------*/ +void ADC_IRQHandler(void) +{ + u8 i; + u32 l_adc_org; + #ifdef ADC_DEBUG_EN + g_adc.test[0]++; + #endif + if((FL_ENABLE == FL_ADC_IsEnabledIT_EndOfConversion(ADC)) + && (FL_SET == FL_ADC_IsActiveFlag_EndOfConversion(ADC))) + { + #ifdef ADC_DEBUG_EN + g_adc.test[1]++; + #endif + i=g_adc.channel_id; + + if(i=ADC_LOGIC_CHANNEL_MAX) + { + g_adc.channel_id=0u; + #ifdef ADC_DEBUG_EN + g_adc.test[2]++; + #endif + } + + #if 0 + if(ADCChannelCount == 0) + { + /* 获取外部通道采样值 */ + GetVSample = FL_ADC_ReadConversionData(ADC); + ADCChannelCount++; + } + else + { + /* 获取VREF1P2采样值 */ + Get122VSample = FL_ADC_ReadConversionData(ADC); + ADCChannelCount = 0; + ADCComplete = 1U; + } + #endif + } + FL_ADC_ClearFlag_EndOfConversion(ADC); +} + + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description :ADC初始化 +----------------------------------------------------------------------------*/ +void AdcInit(void) +{ + /* ADC 时钟设置 */ + FL_ADC_CommonInit((FL_ADC_CommonInitTypeDef*)&g_ADC_CommonInitStruct); + FL_ADC_Init(ADC, (FL_ADC_InitTypeDef*)&g_ADC_InitStruct); + + #ifdef ADC_ENABLE_DMA_MODE + FL_ADC_EnableDMAReq(ADC); + #else + /* 使能通道转换完成中断 */ + FL_ADC_EnableIT_EndOfConversion(ADC); + /* NVIC中断配置 */ + NVIC_ClearPendingIRQ(ADC_IRQn); + NVIC_DisableIRQ(ADC_IRQn); + NVIC_SetPriority(ADC_IRQn, NVIC_PRIORITY_ADC); + NVIC_EnableIRQ(ADC_IRQn); + #endif +} + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : channel_id 见宏 ADC_LOGIC_CHN_BAT 等 +|Output parameters : +|Return value : +|Description : +----------------------------------------------------------------------------*/ +void adc_init() +{ + u8 i; + + AdcInit(); + dma_init(); + + common_memory_clear((u8*)&g_adc,sizeof(g_adc)); + #if 0 + /* 使能通道ADC_IN1 */ + FL_ADC_EnableSequencerChannel(ADC, ADC_CHANNEL_1_PHY_ID); + FL_ADC_EnableSequencerChannel(ADC, ADC_CHANNEL_0_PHY_ID); + /* 使能通道ADC_VREF1P2 */ + FL_ADC_EnableSequencerChannel(ADC, FL_ADC_INTERNAL_VREF1P2); + #else + //倒序 + for(i = 0u; i < ADC_LOGIC_CHANNEL_MAX; i++) + { + FL_ADC_EnableSequencerChannel(ADC, g_adc_drv_channel[i]); + } + #endif + /* 使能VREF BUFFER */ + /* 为了考虑功耗BUFFER可关闭，从使能到ADC可以正常采样需要100us的建立时间，本例程配置慢速通道较长的采样时间，来保证建立时间满足。 */ + FL_VREF_EnableVREFBuffer(VREF); + FL_ADC_ClearFlag_EndOfConversion(ADC); /* 清标志 */ + /* 启动ADC */ + FL_ADC_Enable(ADC); + /* 开始转换 */ + FL_ADC_EnableSWConversion(ADC); +} + + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +----------------------------------------------------------------------------*/ +void adc_de_init(void) +{ + FL_ADC_DeInit(ADC); + //FL_ADC_Disable(ADC); + FL_DMA_DeInit(DMA); +} + + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : 任務 +----------------------------------------------------------------------------*/ +void adc_task(void) +{ + adc_data_operate(); + adc_manage_task(); +} + + + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +----------------------------------------------------------------------------*/ +static void adc_data_operate(void) +{ + u8 i; + #ifdef ADC0_CHANNEL_FILETER_EN + u8 k; + u16 l_refh; + u8 l_count=0u; + u8 l_total=0u; + u16 l_sum=0u; + #endif + + #ifdef ADC_ENABLE_DMA_MODE + if(FL_DMA_IsActiveFlag_TransferComplete(DMA, FL_DMA_CHANNEL_ADC)) + { + #ifdef ADC_DEBUG_EN + g_adc.test[3]++; + #endif + FL_DMA_ClearFlag_TransferComplete(DMA, FL_DMA_CHANNEL_ADC); + + #if ADC_ENABLE_DMA_MODE == 0u + FL_ADC_ClearFlag_EndOfConversion(ADC); /* 清标志 */ + FL_ADC_Disable(ADC); /* 关闭ADC */ + for(i = 0u; i < ADC_LOGIC_CHANNEL_MAX; i++) + { + FL_ADC_DisableSequencerChannel(ADC, g_adc_drv_channel[i]); + } + #endif + + i=ADC_LOGIC_CHANNEL_VREF1P2; + g_adc.channel[i].result_value = ( (u32)( (u32)(g_adc.init_value[i] *1000u) / ADC_RESOLUTION_MASK) * (u32)ADC_VREFH)/1000u; + for(i = ADC_LOGIC_CHANNEL_USE_START; i <= ADC_LOGIC_CHANNEL_END; i++) + { + #if 0 + g_adc.channel[i].result_value = ( (u32)( (u32)(g_adc.init_value[i] *1000u) / ADC_RESOLUTION_MASK) * (u32)ADC_VREFH)/1000u; + #else //ADC_VREF1P2 + g_adc.channel[i].result_value = ((uint64_t)g_adc.init_value[i] * 3000ul * (ADC_VREF)) / ((uint32_t)g_adc.init_value[ADC_LOGIC_CHANNEL_VREF1P2] * 4095); + #endif + } + + //如果是单次模式 + #if ADC_ENABLE_DMA_MODE == 0u + + g_adc.timecount =0u; + g_adc.state =0u; + + dma_init(); + + for(i = 0u; i < ADC_LOGIC_CHANNEL_MAX; i++) + { + FL_ADC_EnableSequencerChannel(ADC, g_adc_drv_channel[i]); + } + + /* 使能VREF BUFFER */ + /* 为了考虑功耗BUFFER可关闭，从使能到ADC可以正常采样需要100us的建立时间，本例程配置慢速通道较长的采样时间，来保证建立时间满足。 */ + FL_VREF_EnableVREFBuffer(VREF); + FL_ADC_ClearFlag_EndOfConversion(ADC); /* 清标志 */ + /* 启动ADC */ + FL_ADC_Enable(ADC); + /* 开始转换 */ + FL_ADC_EnableSWConversion(ADC); + + #endif + } + #else + + i=ADC_LOGIC_CHANNEL_VREF1P2; + g_adc.channel[i].result_value = ( (u32)( (u32)(g_adc.channel[i].init_value *1000u) / ADC_RESOLUTION_MASK) * (u32)ADC_VREFH)/1000u; + for(i = ADC_LOGIC_CHANNEL_USE_START; i <= ADC_LOGIC_CHANNEL_END; i++) + { + #if 0 + g_adc.channel[i].result_value = ( (u32)( (u32)(g_adc.channel[i].init_value *1000u) / ADC_RESOLUTION_MASK) * (u32)ADC_VREFH)/1000u; + #else //ADC_VREF1P2 + g_adc.channel[i].result_value = ( (u32)( (u32)(g_adc.channel[i].init_value *ADC_VREF1P2) / g_adc.channel[ADC_LOGIC_CHANNEL_VREF1P2].init_value) ); + #endif + } + + #endif + + //濾波計算 + #ifdef ADC0_CHANNEL_FILETER_EN + for(i = 0u; i < ADC_LOGIC_CHANNEL_MAX; i++) + { + l_count = g_adc.channel[i].filter_count; + if(g_adc.channel[i].filter_over == 0u) + { + l_total = l_count+1u; + } + else + { + l_total = ADC0_CHANNEL_FILTER_TIME; + } + g_adc.channel[i].filter_buf[l_count] = g_adc.channel[i].result_value; + l_sum=0u; + for(k=0u;k=ADC0_CHANNEL_FILTER_TIME) + { + g_adc.channel[i].filter_count=0u; + g_adc.channel[i].filter_over=1u; + } + } + #endif + + + #if ADC_ENABLE_DMA_MODE == 0u + + g_adc.timecount++; + if(g_adc.timecount>=ADC_TASK_TIMEOUT) + { + #ifdef ADC_DEBUG_EN + g_adc.test[4]++; + #endif + g_adc.timecount=0u; + adc_init(); + } + g_adc.state =0u; + + #endif +} + + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : channel_id 见宏 ADC_LOGIC_CHN_BAT 等 +|Output parameters : +|Return value : +|Description : 读取最终的值 +----------------------------------------------------------------------------*/ +adc_voltage_t adc_get_voltage_value(u8 channel_id) +{ + adc_voltage_t l_result =0; + if(channel_idPLLCR, CMU_PLLCR_DB_Msk | CMU_PLLCR_REFPRSC_Msk | CMU_PLLCR_OSEL_Msk | CMU_PLLCR_INSEL_Msk, + (PLL_DB << CMU_PLLCR_DB_Pos) | PLL_REFPSC | PLL_OSEL | Source); +} + + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : RCHF振荡频率值 +|Output parameters : +|Return value : +|Description : RCHF初始化配置 +----------------------------------------------------------------------------*/ +void RCHFInit(uint32_t clock) +{ + switch(clock) + { + case FL_CMU_RCHF_FREQUENCY_8MHZ: + FL_CMU_RCHF_WriteTrimValue(RCHF8M_TRIM); + break; + + case FL_CMU_RCHF_FREQUENCY_16MHZ: + FL_CMU_RCHF_WriteTrimValue(RCHF16M_TRIM); + break; + + case FL_CMU_RCHF_FREQUENCY_24MHZ: + FL_CMU_RCHF_WriteTrimValue(RCHF24M_TRIM); + break; + + case FL_CMU_RCHF_FREQUENCY_32MHZ: + FL_CMU_RCHF_WriteTrimValue(RCHF32M_TRIM); + break; + + default: + FL_CMU_RCHF_WriteTrimValue(RCHF8M_TRIM); + break; + } + + FL_CMU_RCHF_SetFrequency(clock); +} + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : rchf FL_CMU_RCHF_FREQUENCY_8MHZ + clock PLL倍频输出频率 +|Output parameters : +|Return value : +|Description : RCHF初始化配置 +----------------------------------------------------------------------------*/ +void SelRCHFToPLL(uint32_t rchf, uint32_t clock) +{ + FL_NVIC_ConfigTypeDef InterruptConfigStruct; + + uint32_t counter = 0; + uint32_t readystatus = 0; + uint32_t div = FL_CMU_PLL_PSC_DIV8; + + if(clock > 63) { return; } + + RCHFInit(rchf); + + FL_CMU_ClearFlag_SYSCLKSELError(); //清除时钟选择错误标志 + FL_CMU_EnableIT_SYSCLKSELError(); //使能时钟选择错误中断 + + InterruptConfigStruct.preemptPriority = NVIC_PRIORITY_CLK; + FL_NVIC_Init(&InterruptConfigStruct, FDET_IRQn); //系统时钟选择错误中断 + + switch(rchf) + { + case FL_CMU_RCHF_FREQUENCY_16MHZ: + div = FL_CMU_PLL_PSC_DIV16; + break; + + case FL_CMU_RCHF_FREQUENCY_24MHZ: + div = FL_CMU_PLL_PSC_DIV24; + break; + + case FL_CMU_RCHF_FREQUENCY_32MHZ: + div = FL_CMU_PLL_PSC_DIV32; + break; + + default: + break; + } + + if(clock <= 23) + { + FL_FLASH_SetReadWait(FLASH, FL_FLASH_READ_WAIT_0CYCLE); + } + + else + if((clock > 23) && (clock <= 47)) + { + FL_FLASH_SetReadWait(FLASH, FL_FLASH_READ_WAIT_1CYCLE); + } + + else + { + FL_FLASH_SetReadWait(FLASH, FL_FLASH_READ_WAIT_2CYCLE); + } + + CMU_PLL_ConfigDomain_SYSTEM(FL_CMU_PLL_CLK_SOURCE_RCHF, div, clock, FL_CMU_PLL_OUTPUT_X1); + + FL_CMU_PLL_Enable(); + do + { + readystatus = FL_CMU_IsActiveFlag_PLLReady(); + counter++; + } while((readystatus != 0x1U) && (counter != PLL_TIMEOUT)); + + FL_CDIF_SetPrescaler(CDIF, FL_CDIF_PSC_DIV8); //CDIF接口访问的最高频率建议不超过8M + + FL_CMU_SetSystemClockSource(FL_CMU_SYSTEM_CLK_SOURCE_PLL); //系统时钟源选择PLL + FL_CMU_SetAHBPrescaler(FL_CMU_AHBCLK_PSC_DIV1); + FL_CMU_SetAPBPrescaler(FL_CMU_APBCLK_PSC_DIV1); + SystemCoreClockUpdate(); +} + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : XTHF初始化配置 +----------------------------------------------------------------------------*/ +void XTHFInit(void) +{ + FL_GPIO_InitTypeDef GPIO_InitStruct = {0}; + FL_NVIC_ConfigTypeDef InterruptConfigStruct; + //PC2.3配置成模拟功能，外接XTHF + + GPIO_InitStruct.pin = FL_GPIO_PIN_2 | FL_GPIO_PIN_3; + GPIO_InitStruct.mode = FL_GPIO_MODE_ANALOG; + GPIO_InitStruct.outputType = FL_GPIO_OUTPUT_PUSHPULL; + GPIO_InitStruct.pull = FL_DISABLE; + GPIO_InitStruct.remapPin = FL_DISABLE; + GPIO_InitStruct.analogSwitch = FL_DISABLE; + (void)FL_GPIO_Init(GPIOC, &GPIO_InitStruct); + + + + //使能XTHF + FL_CMU_XTHF_Enable(); + FL_CMU_XTHF_WriteDriverStrength(0x02); //振荡强度---05 可能合适 10PF， + FL_DelayMs(2); + + #if 1 //晶振停振检测，要开启 + FL_CMU_ClearFlag_XTHFFail(); + FL_CMU_EnableIT_XTHFFail(); //开启XTHF停振检测中断 + InterruptConfigStruct.preemptPriority = NVIC_PRIORITY_CLK; + FL_NVIC_Init(&InterruptConfigStruct, FDET_IRQn); + #endif + + SystemCoreClockUpdate(); + +} + + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : div 对XTHF参考时钟的分频，目标分频到1M; clock PLL倍频输出频率 +|Output parameters : +|Return value : +|Description : 选择外部XTHF作为锁相环的参考时钟 +----------------------------------------------------------------------------*/ +void SelXTHFToPLL(uint32_t div, uint32_t clock) +{ + FL_NVIC_ConfigTypeDef InterruptConfigStruct; + uint32_t counter = 0; + uint32_t readystatus = 0; + + if(clock > 63) { return; } + + XTHFInit(); + + FL_CMU_ClearFlag_SYSCLKSELError(); //清除时钟选择错误标志 + FL_CMU_EnableIT_SYSCLKSELError(); //使能时钟选择错误中断 + + InterruptConfigStruct.preemptPriority = 0x00; + FL_NVIC_Init(&InterruptConfigStruct, FDET_IRQn); //系统时钟选择错误中断 + + if(clock <= 23) + { + FL_FLASH_SetReadWait(FLASH, FL_FLASH_READ_WAIT_0CYCLE); + } + + else + if((clock > 23) && (clock <= 47)) + { + FL_FLASH_SetReadWait(FLASH, FL_FLASH_READ_WAIT_1CYCLE); + } + + else + { + FL_FLASH_SetReadWait(FLASH, FL_FLASH_READ_WAIT_2CYCLE); + } + + CMU_PLL_ConfigDomain_SYSTEM(FL_CMU_PLL_CLK_SOURCE_XTHF, div, clock, FL_CMU_PLL_OUTPUT_X1); + + FL_CMU_PLL_Enable(); + do + { + readystatus = FL_CMU_IsActiveFlag_PLLReady(); + counter++; + } while((readystatus != 0x1U) && (counter != PLL_TIMEOUT)); + FL_CDIF_SetPrescaler(CDIF, FL_CDIF_PSC_DIV8); //CDIF接口访问的最高频率建议不超过8M + + FL_CMU_SetSystemClockSource(FL_CMU_SYSTEM_CLK_SOURCE_PLL); + FL_CMU_SetAHBPrescaler(FL_CMU_AHBCLK_PSC_DIV1); + FL_CMU_SetAPBPrescaler(FL_CMU_APBCLK_PSC_DIV1); + SystemCoreClockUpdate(); +} + diff --git a/code_app_out/Source/bsp/clk.h b/code_app_out/Source/bsp/clk.h new file mode 100644 index 0000000..edea1be --- /dev/null +++ b/code_app_out/Source/bsp/clk.h @@ -0,0 +1,110 @@ +/** ########################################################################## +** Filename : +** Project : +** Module : +** Processor : +** Version : 1.0 +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20230602- --V1.0-- --mingyea--- --修改-- + +** #########################################################################*/ + +#ifndef CLK_H___ +#define CLK_H___ + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ + +/* Include inherited beans */ +#include "common_types.h" +#include "clk_cfg.h" + +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ +//自己手動加的 +typedef enum +{ + CLK_SYS_SRC_NULL=0, + CLK_SYS_SRC_OSC=1, + CLK_SYS_SRC_SIRC=2, + CLK_SYS_SRC_FIRC=3, + CLK_SYS_SRC_SPLL=6 +}clk_sys_source_e; + +typedef struct +{ + u8 error; + //clk_work_mode_e mode; + //clk_sys_source_e sys_src; + u32 osc_freq; + u32 firc_freq; + u32 sirc_freq; + u32 vco_freq; /*!< returns SYSCLK clock frequency expressed in Hz */ + u32 spll_freq; /*!< returns SYSCLK clock frequency expressed in Hz */ + u32 core_freq; /*!< returns SYSCLK clock frequency expressed in Hz */ + u32 sysclk_freq; /*!< returns SYSCLK clock frequency expressed in Hz */ + u32 bus_freq; /*!< returns HCLK clock frequency expressed in Hz */ + u32 flash_freq; /*!< returns PCLK1 clock frequency expressed in Hz */ + u32 spll1_freq; /*!< returns PCLK2 clock frequency expressed in Hz */ + u32 spll2_freq; /*!< returns PCLK2 clock frequency expressed in Hz */ + u32 firc1_freq; /*!< returns ADCCLK clock frequency expressed in Hz */ + u32 firc2_freq; /*!< returns ADCCLK clock frequency expressed in Hz */ + u32 sirc1_freq; /*!< returns ADCCLK clock frequency expressed in Hz */ + u32 sirc2_freq; /*!< returns ADCCLK clock frequency expressed in Hz */ + u32 sosc1_freq; /*!< returns ADCCLK clock frequency expressed in Hz */ + u32 sosc2_freq; /*!< returns ADCCLK clock frequency expressed in Hz */ + u32 rtc_freq; /*!< returns ADCCLK clock frequency expressed in Hz */ + u32 lpo_freq; /*!< returns ADCCLK clock frequency expressed in Hz */ + u32 rtc_out_freq; /*!< returns ADCCLK clock frequency expressed in Hz */ +}clk_clocks_freq_s; + +/*--------------------------------------------------------------------------- +- G L O B A L V A R I A B L E S +- only configuration table allowed here,variables are not allowed! +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ + +void clk_init(void); +void clk_get_clock_frequence(clk_clocks_freq_s* clk_freq); +void clk_update_clock_frequence(void); +void SystemDeInit (void); + +void FDET_IRQHandler(void); +void CMU_PLL_ConfigDomain_SYSTEM(uint32_t Source, uint32_t PLL_REFPSC, uint32_t PLL_DB, uint32_t PLL_OSEL); + +void SelRCHFToPLL(uint32_t rchf, uint32_t clock); +void SelXTHFToPLL(uint32_t div, uint32_t clock); + +void RCHFInit(uint32_t clock); +void XTHFInit(void); + + +#endif + +/* ifndef CLK_H___ */ + diff --git a/code_app_out/Source/bsp/clk_cfg.c b/code_app_out/Source/bsp/clk_cfg.c new file mode 100644 index 0000000..3233567 --- /dev/null +++ b/code_app_out/Source/bsp/clk_cfg.c @@ -0,0 +1,99 @@ +/** ########################################################################## +** Filename : +** Project : +** Module : +** Processor : +** Version : 1.0 +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : 此文档用于规范代码书写； +* 注意， +* 1.所有文件用UTF-8格式 +* 2.tab键空格4个 +* 3.各模块，都要有 初始化函数 init, 反初始化函数 deinit, +* 周期任务task,进入休眠goto sleep, +* 唤醒后 goto wake ,判断是否可休眠judge_pre_sleep 等主要函数接口 +* 4. +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20191106- --V01-- --LYJ--- --初版-- +** -20230602- --V1.0-- --mingyea--- --修改-- + +** #########################################################################*/ + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ +#include "clk.h" + +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- S T A T I C V A R I A B L E S +----------------------------------------------------------------------------*/ +static uint32_t SYSCLKSELErrorState[4] = {0}; + + +/*--------------------------------------------------------------------------- +* G L O B A L V A R I A B L E S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : CMU时钟中断 +----------------------------------------------------------------------------*/ +void FDET_IRQHandler(void) +{ + SYSCLKSELErrorState[2]++; + /* 时钟选择中断处理 */ + if((FL_CMU_IsEnabledIT_SYSCLKSELError() == 0x01UL) + && (FL_CMU_IsActiveFlag_SYSCLKSELError() == 0x01UL)) + { + /* 清除时钟选择错误标志 */ + FL_CMU_ClearFlag_SYSCLKSELError(); + + SYSCLKSELErrorState[0]++; + } + if((FL_CMU_IsEnabledIT_XTHFFail() == 0x01UL) + && (FL_CMU_IsActiveFlag_XTHFFail() == 0x01UL)) + { + /* 清除高频晶体停振标志 */ + FL_CMU_ClearFlag_XTHFFail(); + SYSCLKSELErrorState[1]++; + /*应用处理逻辑*/ + clk_init(); //重新配置 + } +} + + diff --git a/code_app_out/Source/bsp/clk_cfg.h b/code_app_out/Source/bsp/clk_cfg.h new file mode 100644 index 0000000..52e3f71 --- /dev/null +++ b/code_app_out/Source/bsp/clk_cfg.h @@ -0,0 +1,63 @@ +/** ########################################################################## +** Filename : +** Project : +** Module : +** Processor : +** Version : 1.0 +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20230602- --V1.0-- --mingyea--- --修改-- + +** #########################################################################*/ + +#ifndef CLK_CFG_H___ +#define CLK_CFG_H___ + + +#include "cpu.h" +#include "common_cfg.h" + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ +#define PLL_TIMEOUT 0xFFFFFFFFU + +#define CLK_HSE_EN 1 //外部晶振使能 + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- G L O B A L V A R I A B L E S +- only configuration table allowed here,variables are not allowed! +----------------------------------------------------------------------------*/ +//extern uint32_t SYSCLKSELErrorState ; + + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ + + + +#endif \ No newline at end of file diff --git a/code_app_out/Source/bsp/dma.c b/code_app_out/Source/bsp/dma.c new file mode 100644 index 0000000..94e3f14 --- /dev/null +++ b/code_app_out/Source/bsp/dma.c @@ -0,0 +1,92 @@ +/** ########################################################################## +** Filename : +** Project : +** Module : +** Processor : +** Version : 1.0 +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20230602- --V1.0-- --mingyea--- --修改-- + +** #########################################################################*/ + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ +#include "dma.h" +#include "adc.h" + +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ + + + +/*--------------------------------------------------------------------------- +- S T A T I C V A R I A B L E S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +* G L O B A L V A R I A B L E S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : 初始化 +----------------------------------------------------------------------------*/ +void dma_init(void) +{ + #ifdef ADC_ENABLE_DMA_MODE + FL_DMA_Init(DMA, (FL_DMA_InitTypeDef*)&g_dma_for_adc_init_tab, FL_DMA_CHANNEL_ADC); + FL_DMA_Enable(DMA); + FL_DMA_StartTransmission(DMA, (FL_DMA_ConfigTypeDef*)&g_dma_for_adc_cfg_tab, FL_DMA_CHANNEL_ADC); + #endif +} + + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : 初始化 +----------------------------------------------------------------------------*/ +void dma_task(void) +{ + +} + + diff --git a/code_app_out/Source/bsp/dma.h b/code_app_out/Source/bsp/dma.h new file mode 100644 index 0000000..bbbf932 --- /dev/null +++ b/code_app_out/Source/bsp/dma.h @@ -0,0 +1,58 @@ +/** ########################################################################## +** Filename : +** Project : +** Module : +** Processor : +** Version : 1.0 +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20230602- --V1.0-- --mingyea--- --޸-- + +** #########################################################################*/ +#ifndef DMA_H__ +#define DMA_H__ + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ +#include "common_types.h" +#include "fm33lg0xx_fl.h" +#include "dma_cfg.h" + +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ + + + +/*--------------------------------------------------------------------------- +- G L O B A L V A R I A B L E S +- only configuration table allowed here,variables are not allowed! +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ +void dma_init(void); +void dma_task(void); + +#endif diff --git a/code_app_out/Source/bsp/dma_cfg.c b/code_app_out/Source/bsp/dma_cfg.c new file mode 100644 index 0000000..4b9efa1 --- /dev/null +++ b/code_app_out/Source/bsp/dma_cfg.c @@ -0,0 +1,80 @@ +/** ########################################################################## +** Filename : +** Project : +** Module : +** Processor : +** Version : +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20230602- --V1.0-- --mingyea--- --修改-- + +** #########################################################################*/ + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ +#include "common_types.h" +#include "common_cfg.h" +#include "dma.h" +#include "adc.h" + +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ + + + +/*--------------------------------------------------------------------------- +- S T A T I C V A R I A B L E S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +* G L O B A L V A R I A B L E S +----------------------------------------------------------------------------*/ +extern adc_s g_adc; + + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ +const FL_DMA_InitTypeDef g_dma_for_adc_init_tab = +{ + FL_DMA_PERIPHERAL_FUNCTION1, /*! DMA外设映射地址 periphAddress*/ + FL_DMA_DIR_PERIPHERAL_TO_RAM, /*! DMA传输方向 direction*/ + FL_DMA_MEMORY_INC_MODE_INCREASE, /*! RAM地址增长方向 memoryAddressIncMode*/ + 0u, /*! RAM地址增长方向 flashAddressIncMode*/ + FL_DMA_BANDWIDTH_16B, /*! DAM传输通道数据位宽 dataSize*/ + FL_DMA_PRIORITY_HIGH, /*! DMA通道优先级 */ + FL_ENABLE, /*! 循环模式使能 */ +}; + +#ifdef ADC_ENABLE_DMA_MODE +const FL_DMA_ConfigTypeDef g_dma_for_adc_cfg_tab = +{ + (uint32_t)&g_adc.init_value[0], /*! RAM地址 memoryAddress*/ + sizeof(g_adc.init_value) / sizeof(adc_org_value_t) - 1u /*! DMA传输数据字节个数 transmissionCount*/ +}; +#endif + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ + + + diff --git a/code_app_out/Source/bsp/dma_cfg.h b/code_app_out/Source/bsp/dma_cfg.h new file mode 100644 index 0000000..de97e06 --- /dev/null +++ b/code_app_out/Source/bsp/dma_cfg.h @@ -0,0 +1,60 @@ +/** ########################################################################## +** Filename : +** Project : +** Module : +** Processor : +** Version : 1.0 +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20230602- --V1.0-- --mingyea--- --޸-- + +** #########################################################################*/ +#ifndef DMA_CFG_H__ +#define DMA_CFG_H__ + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ +#include "fm33lg0xx_fl.h" +#include "adc.h" + +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ +#define FL_DMA_CHANNEL_ADC FL_DMA_CHANNEL_4 + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- G L O B A L V A R I A B L E S +- only configuration table allowed here,variables are not allowed! +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ +extern const FL_DMA_InitTypeDef g_dma_for_adc_init_tab ; +#ifdef ADC_ENABLE_DMA_MODE +extern const FL_DMA_ConfigTypeDef g_dma_for_adc_cfg_tab; +#endif + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ + + +#endif diff --git a/code_app_out/Source/bsp/eeprom.c b/code_app_out/Source/bsp/eeprom.c new file mode 100644 index 0000000..0ff41c3 --- /dev/null +++ b/code_app_out/Source/bsp/eeprom.c @@ -0,0 +1,1347 @@ +/** ########################################################################## +** Filename : +** Project : +** Module : +** Processor : +** Version : 1.0 +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20230602- --V1.0-- --mingyea--- --修改-- + +** #########################################################################*/ + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ + +#include "error.h" +#include "eeprom.h" +#include "eeprom_seq.h" +#include "eeprom_state_machine.h" +#include "system_voltage_manage.h" +#include "wdog.h" + +#ifdef NVM_EEPROM_EXT_EN +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ + + + +/*--------------------------------------------------------------------------- +- S T A T I C V A R I A B L E S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +* G L O B A L V A R I A B L E S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : 擦除数据 +----------------------------------------------------------------------------*/ +eeprom_statys_t eeprom_erase_page(u32 page_addr) +{ + eeprom_statys_t l_flash_status ; + + #ifdef EEPROM_EXT_JUDGE_PAGE_ADDR + assert_param(page_addr>=EEPROM_FLASH_ADDR_START); + assert_param(page_addr=EEPROM_FLASH_ADDR_START); + assert_param(addr<=EEPROM_AERA_END_ADDR); + assert_param((addr&FLASH_ADDRS_ALIGN_RES_MASK)==0u); + #endif + wdog_task(); + if (FL_FAIL == FL_FLASH_Program_Word(FLASH, addr, data)) + { + l_flash_status = EFLASH_STATUS_BUSY; + } + else + { + l_flash_status = EFLASH_STATUS_SUCCESS; + } + return l_flash_status; +} + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description :初始化 +----------------------------------------------------------------------------*/ +u16 eeprom_drv_init(u8 area_id) +{ + u16 i; + u16 l_page0_status, l_page1_status; + #ifdef EEPROM_FLASH_CAN_REWRITE_TO_BIT_ZERO + #else + u16 l_page0_auxi, l_page1_auxi; + #endif + //u16 l_addr_index = 0u; + //u16 l_eeprom_status = 0u, l_read_status = EFLASH_READ_FAILED; + u16 l_flash_status = EFLASH_STATUS_SUCCESS; + u8 l_flag_out=0u; + + assert_param(area_id=EEPROM_AREA_TOTAL) + { + l_flash_status = EFLASH_STATUS_PPADRER_ERROR; + //return l_flash_status; + } + else + { + /* Get Page0 status */ + l_page0_status = (*(__IO eflash_operate_t*)EFLASH_AREAx_PAGE0_BASE_ADDRESS(area_id)); + /* Get Page1 status */ + l_page1_status = (*(__IO eflash_operate_t*)EFLASH_AREAx_PAGE1_BASE_ADDRESS(area_id)); + #ifdef EEPROM_FLASH_CAN_REWRITE_TO_BIT_ZERO + #else + /* Get Page0 status */ + l_page0_auxi = (*(__IO eflash_operate_t*)(EFLASH_AREAx_PAGE0_BASE_ADDRESS(area_id)+EFLASH_OPERATION_LEN)); + /* Get Page1 status */ + l_page1_auxi = (*(__IO eflash_operate_t*)(EFLASH_AREAx_PAGE1_BASE_ADDRESS(area_id)+EFLASH_OPERATION_LEN)); + #endif + /* Check for invalid header states and repair if necessary */ + switch (l_page0_status) + { + case EFLASH_ERASED: + if (l_page1_status == EFLASH_VALID_PAGE) /* Page0 erased, Page1 valid */ + { + //其实不需要每次都擦除， + #if 1 //其实没必要，每次都删除 + if(g_eeprom_ext[area_id].first_reset_flag != EEPROM_FLAG_NOT_FIRST_RESET) + { + for(i = 0; i < EEPROM_AREAx_EFLASH_PAGE_NUM(area_id); i ++) + { + l_flash_status = eeprom_erase_page(EFLASH_AREAx_PAGE0_BASE_ADDRESS(area_id) + i * EFLASH_PAGE_SIEZ); + if(l_flash_status != EFLASH_STATUS_SUCCESS) + { + break; + } + } + /* If erase operation was failed, a Flash error code is returned */ + if (l_flash_status != EFLASH_STATUS_SUCCESS) + { + //return l_flash_status; + l_flag_out=1u; + break; + } + } + #endif + } + #ifdef EEPROM_FLASH_CAN_REWRITE_TO_BIT_ZERO + else if (l_page1_status == EFLASH_RECEIVE_DATA) /* Page0 erased, Page1 receive */ + { + //g_eeprom_ext[area_id].first_reset_flag = EEPROM_FLAG_FIRST_RESET_CLEAR; + /* Erase Page0 */ + for(i = 0; i < EEPROM_AREAx_EFLASH_PAGE_NUM(area_id); i ++) + { + l_flash_status = eeprom_erase_page(EFLASH_AREAx_PAGE0_BASE_ADDRESS(area_id) + i * EFLASH_PAGE_SIEZ); + if(l_flash_status != EFLASH_STATUS_SUCCESS) + { + break; + } + } + /* If erase operation was failed, a Flash error code is returned */ + if (l_flash_status != EFLASH_STATUS_SUCCESS) + { + l_flag_out=1u; + break; + } + /* Mark Page1 as valid */ + l_flash_status = eeprom_program_u32(EFLASH_AREAx_PAGE1_BASE_ADDRESS(area_id), EFLASH_VALID_PAGE); + /* If program operation was failed, a Flash error code is returned */ + if (l_flash_status != EFLASH_STATUS_SUCCESS) + { + l_flag_out=1u; + break; + } + g_eeprom_ext[area_id].state = EFLASH_STATE_IDLE; + break; + } + #endif + else /* First EEPROM access (Page0&1 are erased) or invalid state -> format EEPROM */ + { + #ifdef EEPROM_FLASH_CAN_REWRITE_TO_BIT_ZERO + + #else + if( l_page0_auxi == EFLASH_RECEIVE_DATA ) + { + //正在转移，不用格式化--并且把FFFFF清成0， + l_flash_status = eeprom_program_u32(EFLASH_AREAx_PAGE0_BASE_ADDRESS(area_id), EFLASH_VALID_PAGE); + if (l_flash_status != EFLASH_STATUS_SUCCESS) + { + //return l_flash_status; + l_flag_out=1u; + break; + } + g_eeprom_ext[area_id].state = EFLASH_STATE_IDLE; + } + else if(l_page1_auxi == EFLASH_RECEIVE_DATA ) + { + //正在转移，不用格式化--并且把FFFFF清成0， + l_flash_status = eeprom_program_u32(EFLASH_AREAx_PAGE1_BASE_ADDRESS(area_id), EFLASH_VALID_PAGE); + if (l_flash_status != EFLASH_STATUS_SUCCESS) + { + //return l_flash_status; + l_flag_out=1u; + break; + } + g_eeprom_ext[area_id].state = EFLASH_STATE_IDLE; + } + else + #endif + { + /* Erase both Page0 and Page1 and set Page0 as valid page */ + l_flash_status = eeprom_format(area_id); + /* If erase/program operation was failed, a Flash error code is returned */ + if (l_flash_status != EFLASH_STATUS_SUCCESS) + { + //return l_flash_status; + l_flag_out=1u; + break; + } + g_eeprom_ext[area_id].first_reset_flag = EEPROM_FLAG_FIRST_RESET_CLEAR; + } + } + break; + #ifdef EEPROM_FLASH_CAN_REWRITE_TO_BIT_ZERO + case EFLASH_RECEIVE_DATA: + if (l_page1_status == EFLASH_VALID_PAGE) /* Page0 receive, Page1 valid */ + { + #ifdef EEPROM_EXT_STATE_MACHILE_ENABLE + //--其实可以考虙删除PAGE0，重新在状态机中搬 + /* Erase Page1 */ + for(i = 0; i < EEPROM_AREAx_EFLASH_PAGE_NUM(area_id); i ++) + { + //wdog_task(); + //wdt_disable(); + l_flash_status = eeprom_erase_page(EFLASH_AREAx_PAGE0_BASE_ADDRESS(area_id) + i * EFLASH_PAGE_SIEZ); + //wdog_init(); + //wdog_task(); + if(l_flash_status != EFLASH_STATUS_SUCCESS) + { + break; + } + } + /* If erase operation was failed, a Flash error code is returned */ + if (l_flash_status != EFLASH_STATUS_SUCCESS) + { + l_flag_out=1u; + break; + } + //g_eeprom_ext[area_id].first_reset_flag = EEPROM_FLAG_FIRST_RESET_CLEAR; + g_eeprom_ext[area_id].trans_page_count =0u; + g_eeprom_ext[area_id].transfer_state = EFLASH_PAGE_TRANSFER_STATE_WRITE_NEW_DATA; + #else + /* Transfer data from Page1 to Page0 */ //--其实可以考虙删除PAGE0，重新在状态机中搬 + eeprom_reset_page_transfer_continus(area_id,g_eeprom_ext[area_id].page_cur_id, g_logic_page_write_data[area_id]); + #endif + } + else if(l_page1_status == EFLASH_ERASED) /* Page0 receive, Page1 erased */ + { + /* Erase Page1 */ + //g_eeprom_ext[area_id].first_reset_flag = EEPROM_FLAG_FIRST_RESET_CLEAR; + for(i = 0; i < EEPROM_AREAx_EFLASH_PAGE_NUM(area_id); i ++) + { + l_flash_status = eeprom_erase_page(EFLASH_AREAx_PAGE1_BASE_ADDRESS(area_id) + i * EFLASH_PAGE_SIEZ); + if(l_flash_status != EFLASH_STATUS_SUCCESS) + { + break; + } + } + /* If erase operation was failed, a Flash error code is returned */ + if (l_flash_status != EFLASH_STATUS_SUCCESS) + { + l_flag_out=1u; + break; + } + /* Mark Page0 as valid */ + l_flash_status = eeprom_program_u32(EFLASH_AREAx_PAGE0_BASE_ADDRESS(area_id), EFLASH_VALID_PAGE); + /* If program operation was failed, a Flash error code is returned */ + if (l_flash_status != EFLASH_STATUS_SUCCESS) + { + l_flag_out=1u; + break; + } + g_eeprom_ext[area_id].state = EFLASH_STATE_IDLE; + } + else /* Invalid state -> format eeprom */ + { + /* Erase both Page0 and Page1 and set Page0 as valid page */ + l_flash_status = eeprom_format(area_id); + /* If erase/program operation was failed, a Flash error code is returned */ + if (l_flash_status != EFLASH_STATUS_SUCCESS) + { + //return l_flash_status; + l_flag_out=1u; + break; + } + g_eeprom_ext[area_id].first_reset_flag = EEPROM_FLAG_FIRST_RESET_CLEAR; + } + break; + #endif + case EFLASH_VALID_PAGE: + if (l_page1_status == EFLASH_VALID_PAGE) /* Invalid state -> format eeprom */ + { + /* Erase both Page0 and Page1 and set Page0 as valid page */ + l_flash_status = eeprom_format(area_id); + /* If erase/program operation was failed, a Flash error code is returned */ + if (l_flash_status != EFLASH_STATUS_SUCCESS) + { + //return l_flash_status; + l_flag_out=1u; + break; + } + g_eeprom_ext[area_id].first_reset_flag = EEPROM_FLAG_FIRST_RESET_CLEAR; + } + else if (l_page1_status == EFLASH_ERASED) /* Page0 valid, Page1 erased */ + { + /* Erase Page1 */ + #if 1 //其实没必要，每次都删除 + if(g_eeprom_ext[area_id].first_reset_flag != EEPROM_FLAG_NOT_FIRST_RESET) + { + for(i = 0; i < EEPROM_AREAx_EFLASH_PAGE_NUM(area_id); i ++) + { + l_flash_status = eeprom_erase_page(EFLASH_AREAx_PAGE1_BASE_ADDRESS(area_id) + i * EFLASH_PAGE_SIEZ); + if(l_flash_status != EFLASH_STATUS_SUCCESS) + { + break; + } + } + /* If erase operation was failed, a Flash error code is returned */ + if (l_flash_status != EFLASH_STATUS_SUCCESS) + { + //return l_flash_status; + l_flag_out=1u; + break; + } + } + #endif + } + else /* Page0 valid, Page1 receive */ + { + #ifdef EEPROM_EXT_STATE_MACHILE_ENABLE + for(i = 0; i < EEPROM_AREAx_EFLASH_PAGE_NUM(area_id); i ++) + { + //wdog_task(); + //wdt_disable(); + l_flash_status = eeprom_erase_page(EFLASH_AREAx_PAGE1_BASE_ADDRESS(area_id) + i * EFLASH_PAGE_SIEZ); + //wdog_init(); + //wdog_task(); + if(l_flash_status != EFLASH_STATUS_SUCCESS) + { + break; + } + } + /* If erase operation was failed, a Flash error code is returned */ + if (l_flash_status != EFLASH_STATUS_SUCCESS) + { + l_flag_out=1u; + break; + } + g_eeprom_ext[area_id].trans_page_count =0u; + g_eeprom_ext[area_id].transfer_state = EFLASH_PAGE_TRANSFER_STATE_WRITE_NEW_DATA; + #else + /* Transfer data from Page0 to Page1 */ //--其实可以考虙删除PAGE1，重新在状态机中搬 + eeprom_reset_page_transfer_continus(area_id,g_eeprom_ext[area_id].page_cur_id, g_logic_page_write_data[area_id]); + #endif + } + + break; + + default: /* Any other state -> format eeprom */ + /* Erase both Page0 and Page1 and set Page0 as valid page */ + l_flash_status = eeprom_format(area_id); + /* If erase/program operation was failed, a Flash error code is returned */ + if (l_flash_status != EFLASH_STATUS_SUCCESS) + { + //return l_flash_status; + l_flag_out=1u; + break; + } + g_eeprom_ext[area_id].first_reset_flag = EEPROM_FLAG_FIRST_RESET_CLEAR; + break; + } + } + if(l_flag_out==0u) + { + l_flash_status = EFLASH_STATUS_SUCCESS; + } + return l_flash_status; +} + + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : area_id: Var片区；virt_addr: Variable virtual address；data: Global variable contains the read variable value +|Output parameters : +|Return value : Success or error status: + * - 0: if variable was found + * - 1: if the variable was not found + * - EFLASH_NO_VALID_PAGE: if no valid page was found. +|Description :读取一个U32 +----------------------------------------------------------------------------*/ +u16 eeprom_read_one_element(u8 area_id,u16 virt_addr, u32* data) +{ + u16 l_valid_page = EFLASH_PAGE0; + u16 l_addr_value = 0x5555, l_read_status = EFLASH_READ_FAILED; + u32 l_addr, l_page_start_addr; + + assert_param(area_id (l_page_start_addr + EFLASH_OPERATION_LEN)) + { + /* Get the current location content to be compared with virtual address */ + l_addr_value = (*(__IO eflash_operate_t*)l_addr); + + /* Compare the read address with the virtual address */ + if (l_addr_value == (virt_addr + EEPROM_VIRT_ADDRESS_OFFSET)) + { + /* Get content of l_addr-EFLASH_OPERATION_LEN which is variable value */ + *data = (*(__IO eflash_operate_t*)(l_addr - EFLASH_OPERATION_LEN)); + + /* In case variable value is read, reset l_read_status flag */ + l_read_status = EFLASH_READ_OK; + + break; + } + else + { + /* Next address location */ + l_addr = l_addr - EFLASH_ELEMENT_LEN; + } + } + + //如果讀取，沒有該數據，返回一個默認值 + if(l_read_status!=EFLASH_READ_OK) + { + *data= EEPROM_EXT_UN_WRITE_INIT; + } + + /* Return l_read_status value: (0: variable exist, 1: variable doesn't exist) */ + return l_read_status; + +} + + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : area_id: Var片区；virt_addr: 16 bit virtual address of the variable + data: 16 bit data to be written as variable value +|Output parameters : +|Return value : Success or error status: + * - EFLASH_STATUS_SUCCESS: on success + * - EFLASH_PAGE_FULL: if valid page is full + * - EFLASH_NO_VALID_PAGE: if no valid page was found + * - Flash error code: on write Flash error +|Description :快速定位地址； +----------------------------------------------------------------------------*/ +void eeprom_get_current_page_addr(u8 area_id,u16 *p_valid_page,u32 *p_addr) +{ + u16 l_valid_page = EFLASH_PAGE0; + //eeprom_statys_t l_status_res = EFLASH_STATUS_SUCCESS; + u32 l_current_addr = 0u; + u32 l_addr, l_page_end_addr; + + /* Get active Page for read operation */ + l_valid_page = eeprom_find_valid_page(area_id,EFLASH_READ_FROM_VALID_PAGE); + + /* Check if there is no valid page */ + if (l_valid_page == EFLASH_NO_VALID_PAGE) + { + *p_valid_page = EFLASH_NO_VALID_PAGE; + *p_addr = EFLASH_READ_NOT_VALID_ADDR_CUR; //表示没有 有效的页 + return ; + } + *p_valid_page = l_valid_page; + /* Get the valid Page start l_addr */ + l_addr = (u32)(EFLASH_AREAx_PAGE0_BASE_ADDRESS(area_id) + (u32)(l_valid_page * EFLASH_AREAx_MASS_PAGE_SIZE(area_id)) + EFLASH_PAGE_FIRST_VARIABLE_ADDRESS); + + /* Get the valid Page end l_addr */ + l_page_end_addr = (u32)((EFLASH_AREAx_PAGE0_BASE_ADDRESS(area_id) - EFLASH_OPERATION_LEN) + (u32)((1 + l_valid_page) * EFLASH_AREAx_MASS_PAGE_SIZE(area_id))); + /* Check each active page address starting from begining */ + while (l_addr <= l_page_end_addr) + { + /* Verify if l_addr and l_addr+EFLASH_OPERATION_LEN contents are all 0xF */ + #if (EFLASH_OPERATION_LEN == 2) + if ((*(__IO eflash_operate_t*)l_addr) == 0xFFFFFFFF) + #elif (EFLASH_OPERATION_LEN == 4) + if (((*(__IO eflash_operate_t*)l_addr) == 0xFFFFFFFF) && + ((*(__IO eflash_operate_t*)(l_addr - EFLASH_OPERATION_LEN)) == 0xFFFFFFFF)) //我认为目前-4是合理的 因为数据在地址前面 + #endif + { + /* Set variable data */ + //向前找，如果先找到FFFF，则认为是空的，当前可以填的。 + l_current_addr = l_addr; + *p_addr = l_current_addr; + /* Return program operation status */ + return ;//l_current_addr; + } + else + { + /* Next address location */ + l_addr = l_addr + EFLASH_ELEMENT_LEN; + } + } + + l_current_addr = l_page_end_addr; + *p_addr = l_current_addr; //对齐到实际地址 + /* Return EFLASH_PAGE_FULL in case the valid page is full */ + return ;//l_current_addr; + +} + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : Erases EFLASH_PAGE0 and EFLASH_PAGE1 and writes EFLASH_VALID_PAGE header to EFLASH_PAGE0 +|Output parameters : +|Return value : Status of the last operation (Flash write or erase) done during + * EEPROM formating +|Description : +----------------------------------------------------------------------------*/ +eeprom_statys_t eeprom_format(u8 area_id) +{ + eeprom_statys_t l_status_res = EFLASH_STATUS_SUCCESS; + u8 i; + + assert_param(area_id= EEPROM_AREAx_ADDR_TOTAL_U32(area_id)) + { + g_eeprom_ext[area_id].trans_page_count = 0; + l_status_res = EFLASH_STATUS_BUSY; + g_eeprom_ext[area_id].eflash_page_index = 0; + g_eeprom_ext[area_id].transfer_state = EFLASH_PAGE_TRANSFER_STATE_ERASE; + g_eeprom_ext[area_id].erase_state = EFLASH_PAGE_ERASE_STATE_WAIT_LAST_OPERATION; + #ifdef EEPROM_EXT_DEBUG_EN + g_eeprom_ext_test[area_id].test_count[8]++; + #endif + break; + } + } + l_status_res = EFLASH_STATUS_BUSY; + break; + case EFLASH_PAGE_TRANSFER_STATE_ERASE: + + l_status_res = eeprom_erase_page(g_eeprom_ext[area_id].page_addr_old + g_eeprom_ext[area_id].eflash_page_index * EFLASH_PAGE_SIEZ); + if (l_status_res != EFLASH_STATUS_SUCCESS) + { + return l_status_res; + } + #ifdef EEPROM_EXT_DEBUG_EN + g_eeprom_ext_test[area_id].test_count[9]++; + #endif + g_eeprom_ext[area_id].eflash_page_index ++; + if(g_eeprom_ext[area_id].eflash_page_index >= EEPROM_AREAx_EFLASH_PAGE_NUM(area_id)) + { + #ifdef EEPROM_EXT_DEBUG_IO_EN + EEPROM_EXT_TEST_ON(area_id); + #endif + l_status_res = eeprom_program_u32(g_eeprom_ext[area_id].page_addr_new, EFLASH_VALID_PAGE); + #ifdef EEPROM_EXT_DEBUG_IO_EN + EEPROM_EXT_TEST_OFF(area_id); + #endif + #ifdef EEPROM_EXT_DEBUG_EN + g_eeprom_ext_test[area_id].test_count[10]++; + #endif + } + else + { + l_status_res = EFLASH_STATUS_BUSY; + #ifdef EEPROM_EXT_DEBUG_EN + g_eeprom_ext_test[area_id].test_count[11]++; + #endif + } + break; + default: + l_status_res = EFLASH_STATUS_CMD_INVALID; + break; + } + return (l_status_res); +} + + + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : None +|Preconditions : None +|Input parameters : +|Output parameters : None +|Return value : None +|Description : +----------------------------------------------------------------------------*/ +err_flag_e ram_read_bytes_for_eeprom(u32 addr,u8 *p_data,u16 len) +{ + err_flag_e l_result; + u8 *p_src; + u16 i; + + if( (addrEEPROM_RAM_ADDR_END) || ((addr+len)>(EEPROM_RAM_ADDR_END+1u)) ) + { + l_result = ERR_FAILED; + } + else + { + p_src = (u8 *)(addr); + + for (i = 0; i < len; i++) + { + p_data[i] = p_src[i]; /*lint !e511*/ + } + + l_result = ERR_OK; + } + + return l_result; +} + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : None +|Preconditions : None +|Input parameters : +|Output parameters : None +|Return value : None +|Description +----------------------------------------------------------------------------*/ +err_flag_e ram_write_bytes_for_eeprom(u32 addr,u8 *p_data,u16 len) +{ + err_flag_e l_result; + u8 *p_addr; + u16 i; + + if( (addrEEPROM_RAM_ADDR_END) || ((addr+len)>(EEPROM_RAM_ADDR_END+1u)) ) + { + l_result = ERR_FAILED; + } + else + { + p_addr = (u8 *)(addr); + + for (i = 0; i < len; i++) + { + p_addr[i] = p_data[i] ; /*lint !e511*/ + } + + l_result = ERR_OK; + } + + return l_result; +} + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : None +|Preconditions : None +|Input parameters : +|Output parameters : None +|Return value : None +|Description +----------------------------------------------------------------------------*/ +u8 eeprom_read_u8_ext(u32 w_addr, u8 *p_data, u16 b_number) +{ + u8 l_result ; + l_result = ram_read_bytes_for_eeprom(w_addr+EEPROM_RAM_ADDR_START,p_data,b_number); + return l_result; +} + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : None +|Preconditions : None +|Input parameters : +|Output parameters : None +|Return value : None +|Description +----------------------------------------------------------------------------*/ +u8 eeprom_write_u8_ext(u32 w_addr, u8 *p_data, u16 b_number) +{ + u8 l_result ; + #ifdef EEPROM_EXT_STATE_MACHILE_ENABLE + #else + u16 l_start_addr; + u16 l_offset; + u16 l_len; + u16 i; + u32 *p_u32; + u32 l_data; + #endif + l_result = ram_write_bytes_for_eeprom(w_addr+EEPROM_RAM_ADDR_START,p_data,b_number); + #ifdef EEPROM_EXT_STATE_MACHILE_ENABLE + #else + l_offset = w_addr&(u32)0x03u; + l_start_addr = (w_addr-l_offset)/4u; + l_len = ((b_number+l_offset)/0x04u+1u); + for(i = 0; i < l_len; i++) + { + if( ((w_addr+EEPROM_RAM_ADDR_START)>=EEPROM_AREAx_RAM_ADDR_START(EEPROM_AREA_ID_0) ) + && ((w_addr+EEPROM_RAM_ADDR_START+b_number)<=EEPROM_AREAx_RAM_ADDR_END(EEPROM_AREA_ID_0) ) ) + { + p_u32 = (u32*)(l_start_addr*4u+EEPROM_RAM_ADDR_START); + l_data = *p_u32; + eeprom_write_one_element_seq(EEPROM_AREA_ID_0,l_start_addr,l_data); + } + else if( ((w_addr+EEPROM_RAM_ADDR_START)>=EEPROM_AREAx_RAM_ADDR_START(EEPROM_AREA_ID_1) ) + && ((w_addr+EEPROM_RAM_ADDR_START+b_number)<=EEPROM_AREAx_RAM_ADDR_END(EEPROM_AREA_ID_1) ) ) + { + p_u32 = (u32*)(l_start_addr*4u+EEPROM_RAM_ADDR_START); + l_data = *p_u32; + l_offset = (EEPROM_AREAx_RAM_ADDR_START(EEPROM_AREA_ID_1)-EEPROM_AREAx_RAM_ADDR_START(EEPROM_AREA_ID_0))/4; + eeprom_write_one_element_seq(EEPROM_AREA_ID_1,l_start_addr-l_offset,l_data); + } + else + { + + } + p_u32++; + } + #endif + return l_result; +} + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : None +|Preconditions : None +|Input parameters : +|Output parameters : None +|Return value : None +|Description +----------------------------------------------------------------------------*/ +u8 eeprom_ext_get_state(u8 area_id) +{ + assert_param(area_id1u + eeprom_area_init(EEPROM_AREA_ID_1); + #endif +} + + + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : None +|Preconditions : None +|Input parameters : +|Output parameters : None +|Return value : None +|Description 任务 +----------------------------------------------------------------------------*/ +void eeprom_task(void) +{ + eeprom_test_task(); + #if 0 + //if(g_eeprom_input_test.flag==0x1) + { + //g_eeprom_input_test.flag=2u; + //g_eeprom_input_test.count++; + //eeprom_ext_input_test(); + //eeprom_ext_restart(); + if(SVD_ISR_SVDR_Msk != FL_SVD_GetLatchedPowerStatus(SVD)) + { + return ; //l_result; + } + #ifdef EEPROM_EXT_STATE_MACHILE_ENABLE + { + eeprom_state_machine_task(EEPROM_AREA_ID_0); + #if EEPROM_AREA_TOTAL >1u + eeprom_state_machine_task(EEPROM_AREA_ID_1); + #endif + } + #endif + } + #else + #ifdef EEPROM_EXT_STATE_MACHILE_ENABLE + u8 l_power_grade; + l_power_grade = system_voltage_manage_mode_get(FUNC_SYSTEM_VOLTAGE_MANAGE_ID); + if( ( (l_power_grade == SYSTEM_VOLTAGE_MODE_NORMAL) || (l_power_grade == SYSTEM_VOLTAGE_MODE_HIGH) ) //电压不能低于9v + && (SVD_ISR_SVDR_Msk == FL_SVD_GetLatchedPowerStatus(SVD)) ) + { + #ifdef EEPROM_EXT_DEBUG_EN + //g_eeprom_ext_test.test_count[37]++; + #endif + #ifdef EEPROM_EXT_STATE_MACHILE_ENABLE + eeprom_state_machine_task(EEPROM_AREA_ID_0); + #if EEPROM_AREA_TOTAL >1u + eeprom_state_machine_task(EEPROM_AREA_ID_1); + #endif + #endif + } + else + { + #ifdef EEPROM_EXT_DEBUG_EN + //g_eeprom_ext_test.test_count[38]++; + #endif + } + #endif + #endif +} + + +#if 0 +// +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : None +|Preconditions : None +|Input parameters : +|Output parameters : None +|Return value : None +|Description 测试用 +----------------------------------------------------------------------------*/ +u8 eeprom_write_u8_ext1(u32 w_addr, u8 *p_data, u16 b_number) +{ + u8 l_result ; + u16 l_start_addr; + u16 l_offset; + u16 l_len; + u16 i; + u32 *p_u32; + u32 l_data; + l_result = ram_write_bytes_for_eeprom(w_addr+EEPROM_RAM_ADDR_START,p_data,b_number); + #if 0 //def EEPROM_EXT_STATE_MACHILE_ENABLE + #else + l_offset = w_addr&(u32)0x03u; + l_start_addr = (w_addr-l_offset)/4u; + l_len = ((b_number+l_offset)/0x04u+1u); + for(i = 0; i < l_len; i++) + { + if( ((w_addr+EEPROM_RAM_ADDR_START)>=EEPROM_AREAx_RAM_ADDR_START(EEPROM_AREA_ID_0) ) + && ((w_addr+EEPROM_RAM_ADDR_START+b_number)<=EEPROM_AREAx_RAM_ADDR_END(EEPROM_AREA_ID_0) ) ) + { + p_u32 = (u32*)(l_start_addr*4u+EEPROM_RAM_ADDR_START); + l_data = *p_u32; + eeprom_write_one_element_seq(EEPROM_AREA_ID_0,l_start_addr,l_data); + } + else if( ((w_addr+EEPROM_RAM_ADDR_START)>=EEPROM_AREAx_RAM_ADDR_START(EEPROM_AREA_ID_1) ) + && ((w_addr+EEPROM_RAM_ADDR_START+b_number)<=EEPROM_AREAx_RAM_ADDR_END(EEPROM_AREA_ID_1) ) ) + { + p_u32 = (u32*)(l_start_addr*4u+EEPROM_RAM_ADDR_START); + l_data = *p_u32; + l_offset = (EEPROM_AREAx_RAM_ADDR_START(EEPROM_AREA_ID_1)-EEPROM_AREAx_RAM_ADDR_START(EEPROM_AREA_ID_0))/4; + eeprom_write_one_element_seq(EEPROM_AREA_ID_1,l_start_addr-l_offset,l_data); + } + else + { + + } + p_u32++; + } + #endif + return l_result; +} +#endif + + +#endif + diff --git a/code_app_out/Source/bsp/eeprom.h b/code_app_out/Source/bsp/eeprom.h new file mode 100644 index 0000000..46d5656 --- /dev/null +++ b/code_app_out/Source/bsp/eeprom.h @@ -0,0 +1,224 @@ +/** ########################################################################## +** Filename : +** Project : +** Module : +** Processor : +** Version : +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20230602- --V1.0-- --mingyea--- --修改-- + +** #########################################################################*/ +#ifndef EEPROM_H__ +#define EEPROM_H__ + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ + +#include "common_types.h" +#include "common_cfg.h" +#include "fm33lg0xx_fl.h" +#include "mf_config.h" +#include "eeprom_cfg.h" + +#ifdef NVM_EEPROM_EXT_EN + +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ +#define EFLASH_STATE_READ 0u +#define EFLASH_STATE_IDLE 1u +#define EFLASH_STATE_UPDATE 2u +#define EFLASH_STATE_PAGE_TRANSFER 3u + +#define EFLASH_PAGE_ERASE_STATE_WAIT_LAST_OPERATION 0u +#define EFLASH_PAGE_ERASE_STATE_TRIGGER_TO_START 1u +#define EFLASH_PAGE_ERASE_STATE_WAIT_ERASE_FINISH 2u +#define EFLASH_PAGE_ERASE_STATE_WAIT_EOP 3u + +#define EFLASH_PAGE_TRANSFER_STATE_WRITE_NEW_DATA 0u +#define EFLASH_PAGE_TRANSFER_STATE_COPY 1U +#define EFLASH_PAGE_TRANSFER_STATE_ERASE 2U + +#define EFLASH_RESULT_INIT 0U +#define EFLASH_RESULT_ONCE_OK 1U //循环一次 + +/* Used Flash pages for EEPROM emulation */ +#define EFLASH_PAGE0 ((u16)0x0000) +#define EFLASH_PAGE1 ((u16)0x0001) + +/* No valid page define */ +#define EFLASH_NO_VALID_PAGE ((u16)0x00AB) + +/* Page status definitions */ +#define EFLASH_ERASED ((u16)0xFFFF) /* PAGE is empty */ +#define EFLASH_RECEIVE_DATA ((u16)0xEEEE) /* PAGE is marked to receive data */ +#define EFLASH_VALID_PAGE ((u16)0x0000) /* PAGE containing valid data */ + +/* Valid pages in read and write defines */ +#define EFLASH_READ_FROM_VALID_PAGE ((u8)0x00) +#define EFLASH_WRITE_IN_VALID_PAGE ((u8)0x01) + +/* Page full define */ +#define EFLASH_PAGE_FULL ((u8)0x80) + + +#define EFLASH_OPERATION_LEN 4u //flash operation lenth, 4 bytes +#define EFLASH_PAGE_START_INFO_LEN 8u //page start information, 4 bytes for page status, 4 bytes reserved +#define EFLASH_PAGE_FIRST_VARIABLE_ADDRESS (EFLASH_PAGE_START_INFO_LEN + EFLASH_OPERATION_LEN) //(EFLASH_PAGE_START_INFO_LEN + EFLASH_OPERATION_LEN) +#define EFLASH_ELEMENT_LEN 8u //page element lenth, 8 bytes{4 for data + 4 for virtual address} + +#define EFLASH_ADDRS_ALIGN 4u + +#define EFLASH_STATUS_SUCCESS FLASH_COMPLETE +#define EFLASH_STATUS_BUSY FLASH_BUSY +#define EFLASH_STATUS_CMD_INVALID FLASH_ERROR_WRP +#define EFLASH_STATUS_PPADRER_ERROR FLASH_ERROR_PG + +#define eeprom_statys_t FLASH_Status + +#define EFLASH_READ_OK 0u +#define EFLASH_READ_FAILED 1u + + +#define FLASH_Lock() +#define FLASH_Unlock() + +//#define EEPROM_FLAG_CHANGE 0x000000u + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ +typedef u32 eflash_operate_t; //flash operation occupy + +typedef enum +{ + FLASH_BUSY = 1u, + FLASH_ERROR_PG, + FLASH_ERROR_WRP, + FLASH_COMPLETE, + FLASH_TIMEOUT +}FLASH_Status; + +typedef struct +{ + u32 first_reset_flag; //是否第一次操作 + + //转移相关 + u32 page_addr_new; + u32 page_addr_old; + u16 valid_page_new; + u16 eflash_page_index; + u16 trans_page_count; + + //总状态相关 + u8 state; //状态 -- + u8 erase_state; //状态 --擦除数据 + u8 transfer_state; //状态 --转移数据 + u8 result; // + u16 cmd_eeprom_result; //每一條指令，的返回 + //u16 cmd_ram_result; //每一條指令，的返回 + u16 page_count; + u16 page_cur_id; + u16 page_addr_cur_total; + + #ifdef EEPROM_OPTIMIZE_SEARCH_FAST //快速定位相关 + u16 current_page; + u32 current_end_addr; //存了多少个数据，指的是，flash扇区上，包括重复 + #endif + //u32 data; // + //u8 data_u8[4]; + +}eeprom_ext_s; + +typedef struct +{ + u8 test; + #ifdef EEPROM_EXT_DEBUG_EN + //做為接口的eeprom 邏輯地址 + u16 test_count[70]; + #endif +}eeprom_ext_test_s; + +typedef struct +{ + u8 sector_num; //有几个扇区，不包含备份域， + u16 mass_page_size_byte; //总容量，不包含备份域 + u16 mass_page_addr_total_u32; + u16 mass_page_addr_total_u8; + u32 ram_start_addr; + u32 ram_end_addr; + u32 eflash_page0_start_addr; + u32 eflash_page0_end_addr; + u32 eflash_page1_start_addr; + u32 eflash_page1_end_addr; +}eeprom_user_info_s; + +typedef struct +{ + u8 flag; + u8 count; +}eeprom_input_test_s; +/*--------------------------------------------------------------------------- +- G L O B A L V A R I A B L E S +- only configuration table allowed here,variables are not allowed! +----------------------------------------------------------------------------*/ +#ifdef EEPROM_EXT_DEBUG_EN +extern eeprom_input_test_s g_eeprom_input_test[EEPROM_AREA_TOTAL_FOR_RAM]; +#endif +extern MEMORY_MAP_RAM_FLAG_NOINIT eeprom_ext_s g_eeprom_ext[EEPROM_AREA_TOTAL_FOR_RAM]; +extern eeprom_ext_test_s g_eeprom_ext_test[EEPROM_AREA_TOTAL_FOR_RAM] ; +extern u8 *g_ram_for_eeprom[EEPROM_AREA_TOTAL_FOR_RAM] ; +extern u32 g_logic_page_read_data[EEPROM_AREA_TOTAL_FOR_RAM] MEMORY_MAP_RAM_WDOG ; +extern u32 g_logic_page_write_data[EEPROM_AREA_TOTAL_FOR_RAM] MEMORY_MAP_RAM_WDOG ; +extern u8 g_logic_page_read_u8data[EEPROM_AREA_TOTAL_FOR_RAM][4] MEMORY_MAP_RAM_WDOG ; + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ +extern const eeprom_user_info_s g_eeprom_user_info[EEPROM_AREA_TOTAL_FOR_RAM] ; + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ + + +//////以下是内部接口，给eeprom_ext +u16 eeprom_read_one_element(u8 area_id,u16 virt_addr, u32* data); +eeprom_statys_t eeprom_verify_page_ful_write_one_ele(u8 area_id,u16 valid_page, u16 virt_addr, u32 data); +eeprom_statys_t eeprom_program_u32(u32 addr, u32 data); +u16 eeprom_find_valid_page(u8 area_id,u8 operation); +eeprom_statys_t eeprom_erase_page(u32 page_addr); +eeprom_statys_t eeprom_format(u8 area_id); +void eeprom_get_current_page_addr(u8 area_id,u16 *p_valid_page,u32 *p_addr); +u16 eeprom_drv_init(u8 area_id); +eeprom_statys_t eeprom_page_transfer(u8 area_id,u16 virt_addr, u32 data); +u16 eeprom_get_cur_page_id(u8 area_id); +u32 eeprom_get_cur_end_addr(u8 area_id); + +///以下是外部接口 +void eeprom_init(void); +void eeprom_task(void); +u8 eeprom_ext_get_state(u8 area_id); +void eeprom_ext_clear_flag(void); + +u8 eeprom_read_u8_ext(u32 w_addr, u8 *p_data, u16 b_number); +u8 eeprom_write_u8_ext(u32 w_addr, u8 *p_data, u16 b_number); + + +u8 eeprom_write_u8_ext1(u32 w_addr, u8 *p_data, u16 b_number); + +#endif + +#endif /* __EEPROM_H */ + diff --git a/code_app_out/Source/bsp/eeprom_cfg.c b/code_app_out/Source/bsp/eeprom_cfg.c new file mode 100644 index 0000000..91ce889 --- /dev/null +++ b/code_app_out/Source/bsp/eeprom_cfg.c @@ -0,0 +1,461 @@ +/** ########################################################################## +** Filename : +** Project : +** Module : +** Processor : +** Version : +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20230602- --V1.0-- --mingyea--- --修改-- + +** #########################################################################*/ + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ +#include "eeprom.h" +#include "common_cfg.h" +#include "common_memory.h" +#include "error.h" +#include "gpio.h" +#include "wdog.h" +#include "nvm.h" +#include "eeprom_state_machine.h" + +#ifdef NVM_EEPROM_EXT_EN + +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ + + + +/*--------------------------------------------------------------------------- +- S T A T I C V A R I A B L E S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +* G L O B A L V A R I A B L E S +----------------------------------------------------------------------------*/ +#ifdef EEPROM_EXT_DEBUG_EN +eeprom_input_test_s g_eeprom_input_test[EEPROM_AREA_TOTAL_FOR_RAM] = {0u}; //MEMORY_MAP_RAM_FLAG_NOINIT +#endif + +MEMORY_MAP_RAM_FLAG_NOINIT eeprom_ext_s g_eeprom_ext[EEPROM_AREA_TOTAL_FOR_RAM] @RAM_EEPROM_OP_RAM_ADDR; +eeprom_ext_test_s g_eeprom_ext_test[EEPROM_AREA_TOTAL_FOR_RAM] ; + +//MEMORY_MAP_FLAG_NO_OPTIME MEMORY_MAP_RAM_EEPROM u8 g_ram_for_eeprom_data[EEPROM_RAM_MAX_U8] = {0u}; + +#if 0 //debug的時候，開啟該宏 +#else +u8 *g_ram_for_eeprom[EEPROM_AREA_TOTAL_FOR_RAM] = +{ + (u8*)(u32)EEPROM_AREA0_RAM_ADDR_START, + #if EEPROM_AREA_TOTAL>1u + (u8*)(u32)EEPROM_AREA1_RAM_ADDR_START + #endif +}; +#endif + +u32 g_logic_page_read_data[EEPROM_AREA_TOTAL_FOR_RAM] MEMORY_MAP_RAM_WDOG @RAM_EEPROM_DATA_RAM_ADDR ; //逻辑页的数据--注意，该地址也是未初始化的，见ICF +u32 g_logic_page_write_data[EEPROM_AREA_TOTAL_FOR_RAM] MEMORY_MAP_RAM_WDOG @(RAM_EEPROM_DATA_RAM_ADDR+(4u*EEPROM_AREA_TOTAL_FOR_RAM)) ; //逻辑页的数据 +u8 g_logic_page_read_u8data[EEPROM_AREA_TOTAL_FOR_RAM][4] MEMORY_MAP_RAM_WDOG @(RAM_EEPROM_DATA_RAM_ADDR+(8u*EEPROM_AREA_TOTAL_FOR_RAM)); + + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ +const eeprom_user_info_s g_eeprom_user_info[EEPROM_AREA_TOTAL_FOR_RAM] = +{ + { + EEPROM_AREA0_EFLASH_PAGE_NUM, + EFLASH_AREA0_MASS_PAGE_SIZE, + EEPROM_AREA0_ADDR_TOTAL_U32, + EEPROM_AREA0_ADDR_TOTAL_U8, + EEPROM_AREA0_RAM_ADDR_START, + EEPROM_AREA0_RAM_ADDR_END, + EFLASH_AREA0_PAGE0_BASE_ADDRESS, + EFLASH_AREA0_PAGE0_END_ADDRESS, + EFLASH_AREA0_PAGE1_BASE_ADDRESS, + EFLASH_AREA0_PAGE1_END_ADDRESS, + }, + #if EEPROM_AREA_TOTAL >1u + { + EEPROM_AREA1_EFLASH_PAGE_NUM, + EFLASH_AREA1_MASS_PAGE_SIZE, + EEPROM_AREA1_ADDR_TOTAL_U32, + EEPROM_AREA1_ADDR_TOTAL_U8, + EEPROM_AREA1_RAM_ADDR_START, + EEPROM_AREA1_RAM_ADDR_END, + EFLASH_AREA1_PAGE0_BASE_ADDRESS, + EFLASH_AREA1_PAGE0_END_ADDRESS, + EFLASH_AREA1_PAGE1_BASE_ADDRESS, + EFLASH_AREA1_PAGE1_END_ADDRESS, + }, + #endif +}; + + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : area_id: Var片区 +|Output parameters : +|Return value : +|Description : 返回当前有效页 +----------------------------------------------------------------------------*/ +u16 eeprom_get_cur_page_id(u8 area_id) +{ + assert_param(area_id 1u +#define EEPROM_AERA_END_ADDR (EFLASH_AREA1_PAGE1_END_ADDRESS+1u-4u) +#else +#define EEPROM_AERA_END_ADDR (EFLASH_AREA0_PAGE1_END_ADDRESS+1u-4u) +#endif + +//总的 +#define EEPROM_FLASH_ADDR_START EFLASH_AREA0_START_ADDRESS //总的eeprom的flash的起始地址 +#define EEPROM_FLASH_ADDR_END 0x1FFFFu //总的eeprom的flash的结束地址--暂时没用到，先用 EEPROM_AERA_END_ADDR + + +////RAM总区间范围 +#define EEPROM_RAM_ADDR_START 0x20006000u //相映射的 RAM地址，要和icf上定义的相一致 +#define EEPROM_RAM_ADDR_END (0x20006FFF-4u)//(0x20006FFF-4u*EEPROM_AREA_TOTAL_FOR_RAM) //见icf---注意，这里减多少，和EEPROM_AREA1_RAM_ADDR_START有关 + +#define EEPROM_RAM_MAX_U8 ((EFLASH_AREA0_MASS_PAGE_SIZE+EFLASH_AREA1_MASS_PAGE_SIZE)/4u) + + +#define EEPROM_AREAx_EFLASH_PAGE_NUM(x) g_eeprom_user_info[x].sector_num +#define EFLASH_AREAx_MASS_PAGE_SIZE(x) g_eeprom_user_info[x].mass_page_size_byte +#define EEPROM_AREAx_ADDR_TOTAL_U32(x) g_eeprom_user_info[x].mass_page_addr_total_u32 +#define EEPROM_AREAx_ADDR_TOTAL_U8(x) g_eeprom_user_info[x].mass_page_addr_total_u8 +#define EEPROM_AREAx_RAM_ADDR_START(x) g_eeprom_user_info[x].ram_start_addr +#define EEPROM_AREAx_RAM_ADDR_END(x) g_eeprom_user_info[x].ram_end_addr +#define EFLASH_AREAx_PAGE0_BASE_ADDRESS(x) g_eeprom_user_info[x].eflash_page0_start_addr +#define EFLASH_AREAx_PAGE0_END_ADDRESS(x) g_eeprom_user_info[x].eflash_page0_end_addr +#define EFLASH_AREAx_PAGE1_BASE_ADDRESS(x) g_eeprom_user_info[x].eflash_page1_start_addr +#define EFLASH_AREAx_PAGE1_END_ADDRESS(x) g_eeprom_user_info[x].eflash_page1_end_addr + + + + +#ifdef NVM_EEPROM_EXT_EN +#define EEPROM_EXT_STATE_MACHILE_ENABLE //用状态机方式，实现 +#define EEPROM_EXT_NOT_TRANS_MORE_WHEN_FULL //写满时，不要重复的擦写 +#endif +#define EEPROM_EXT_JUDGE_PAGE_ADDR //为了安全，在最底层，再加一次判断地址范围 + +//extern MEMORY_MAP_FLAG_NO_OPTIME MEMORY_MAP_RAM_EEPROM u8 g_ram_for_eeprom_data[EEPROM_RAM_MAX_U8]; + + +#ifdef NVM_EEPROM_EXT_EN +//#define EEPROM_EXT_DEBUG_EN //变量跟踪 +//#define EEPROM_EXT_DEBUG_IO_EN //io测试时间 +//#define EEPROM_INPUT_TEST //修改RAM值，用来测试 +#endif + + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ + + + +/*--------------------------------------------------------------------------- +- G L O B A L V A R I A B L E S +- only configuration table allowed here,variables are not allowed! +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ + +#ifdef EEPROM_INPUT_TEST + +//给外部接口--任务 +void eeprom_ext_input_test(void); + +#endif + +#if 0 +#define EEPROM_EXT_TEST_ON() TEST1_ON() +#define EEPROM_EXT_TEST_OFF() TEST1_OFF() + +#define EEPROM_EXT_TEST1_ON() TEST1_ON() +#define EEPROM_EXT_TEST1_OFF() TEST1_OFF() + +#define EEPROM_EXT_ERASE_TEST_ON() //TEST1_ON() +#define EEPROM_EXT_ERASE_TEST_OFF() //TEST1_OFF() +#else + +#ifdef EEPROM_EXT_DEBUG_IO_EN + +void EEPROM_EXT_TEST_ON(u8 id); +void EEPROM_EXT_TEST_OFF(u8 id); + +#define EEPROM_EXT_TEST1_ON EEPROM_EXT_TEST_ON +#define EEPROM_EXT_TEST1_OFF EEPROM_EXT_TEST_OFF + +#define EEPROM_EXT_ERASE_TEST_ON EEPROM_EXT_TEST_ON +#define EEPROM_EXT_ERASE_TEST_OFF EEPROM_EXT_TEST_OFF + +#endif + +void eeprom_test_task(void); + +#endif + + +#endif /* __EEPROM_H */ + +/*******************************END OF FILE************************************/ diff --git a/code_app_out/Source/bsp/eeprom_seq.c b/code_app_out/Source/bsp/eeprom_seq.c new file mode 100644 index 0000000..5ccd434 --- /dev/null +++ b/code_app_out/Source/bsp/eeprom_seq.c @@ -0,0 +1,461 @@ +/** ########################################################################## +** Filename : +** Project : +** Module : +** Processor : +** Version : +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20230602- --V1.0-- --mingyea--- --修改-- + +** #########################################################################*/ + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ +#include "common_types.h" +#include "common_memory.h" +#include "eeprom.h" +#include "eeprom_seq.h" +#include "wdog.h" + +#ifdef NVM_EEPROM_EXT_EN + +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- S T A T I C V A R I A B L E S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +* G L O B A L V A R I A B L E S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : 读取所有到ram,顺序执行 +----------------------------------------------------------------------------*/ +void eeprom_read_all_data_to_ram_seq(u8 area_id) +{ + u16 i; + + for(i=0u;i EEPROM_AREAx_ADDR_TOTAL_U32(area_id)) + { + g_eeprom_ext[area_id].trans_page_count = 0; + l_status_res = EFLASH_STATUS_BUSY; + g_eeprom_ext[area_id].eflash_page_index = 0; + g_eeprom_ext[area_id].transfer_state = EFLASH_PAGE_TRANSFER_STATE_ERASE; + g_eeprom_ext[area_id].erase_state = EFLASH_PAGE_ERASE_STATE_WAIT_LAST_OPERATION; + #ifdef EEPROM_EXT_DEBUG_EN + g_eeprom_ext_test[area_id].test_count[22]++; + #endif + break; + } + } + }while(g_eeprom_ext[area_id].transfer_state==EFLASH_PAGE_TRANSFER_STATE_COPY); + } + + if(g_eeprom_ext[area_id].transfer_state == EFLASH_PAGE_TRANSFER_STATE_ERASE) + { + do + { + l_status_res = eeprom_erase_page(g_eeprom_ext[area_id].page_addr_old + g_eeprom_ext[area_id].eflash_page_index * EFLASH_PAGE_SIEZ); + if (l_status_res != EFLASH_STATUS_SUCCESS) + { + #ifdef EEPROM_EXT_DEBUG_EN + g_eeprom_ext_test[area_id].test_count[23]++; + #endif + return l_status_res; + } + #ifdef EEPROM_EXT_DEBUG_EN + g_eeprom_ext_test[area_id].test_count[24]++; + #endif + g_eeprom_ext[area_id].eflash_page_index ++; + if(g_eeprom_ext[area_id].eflash_page_index >= EEPROM_AREAx_EFLASH_PAGE_NUM(area_id)) + { + #ifdef EEPROM_EXT_DEBUG_IO_EN + EEPROM_EXT_TEST_ON(area_id); + #endif + l_status_res = eeprom_program_u32(g_eeprom_ext[area_id].page_addr_new, EFLASH_VALID_PAGE); + #ifdef EEPROM_EXT_DEBUG_IO_EN + EEPROM_EXT_TEST_OFF(area_id); + #endif + #ifdef EEPROM_EXT_DEBUG_EN + g_eeprom_ext_test[area_id].test_count[25]++; + #endif + break; + } + else + { + l_status_res = EFLASH_STATUS_BUSY; + #ifdef EEPROM_EXT_DEBUG_EN + g_eeprom_ext_test[area_id].test_count[26]++; + #endif + } + }while(1); + + } + return (l_status_res); +} + +#if 0 +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : virt_addr: Variable virtual address + data: 16 bit data to be written +|Output parameters : +|Return value : +|Description : 顺序执行 +----------------------------------------------------------------------------*/ +u16 eeprom_write_one_element_seq(u8 area_id,u16 virt_addr, u32 data) +{ + u16 l_status = 0; + u16 l_valid_page = EFLASH_PAGE0; + + l_valid_page = eeprom_find_valid_page(area_id,EFLASH_WRITE_IN_VALID_PAGE); + + if (l_valid_page == EFLASH_NO_VALID_PAGE) + { + #ifdef EEPROM_EXT_DEBUG_IO_EN + EEPROM_EXT_TEST1_ON(area_id); + #endif + eeprom_format(area_id); + #ifdef EEPROM_EXT_DEBUG_IO_EN + EEPROM_EXT_TEST1_OFF(area_id); + #endif + g_eeprom_ext[area_id].state = EFLASH_STATE_IDLE; + #ifdef EEPROM_OPTIMIZE_SEARCH_FAST + eeprom_get_current_page_addr(area_id,&g_eeprom_ext[area_id].current_page,&g_eeprom_ext[area_id].current_end_addr); + #endif + #ifdef EEPROM_EXT_DEBUG_EN + g_eeprom_ext_test[area_id].test_count[27]++; + #endif + } + #ifdef EEPROM_EXT_DEBUG_IO_EN + EEPROM_EXT_TEST1_ON(area_id); + #endif + l_status = eeprom_verify_page_ful_write_one_ele(area_id,l_valid_page, virt_addr, data); + #ifdef EEPROM_EXT_DEBUG_IO_EN + EEPROM_EXT_TEST1_OFF(area_id); + #endif + if(l_status == EFLASH_STATUS_PPADRER_ERROR) + { + #ifdef EEPROM_EXT_DEBUG_IO_EN + EEPROM_EXT_TEST1_ON(area_id); + #endif + eeprom_format(area_id); + #ifdef EEPROM_EXT_DEBUG_IO_EN + EEPROM_EXT_TEST1_OFF(area_id); + #endif + //EFLASH_SetCtrlReg1(0x0); + //EFLASH_LockCtrl(); //TEMP_CLOSE 这些不知道怎么修改 + g_eeprom_ext[area_id].state = EFLASH_STATE_IDLE; + #ifdef EEPROM_OPTIMIZE_SEARCH_FAST + eeprom_get_current_page_addr(area_id,&g_eeprom_ext[area_id].current_page,&g_eeprom_ext[area_id].current_end_addr); + #endif + #ifdef EEPROM_EXT_DEBUG_EN + g_eeprom_ext_test[area_id].test_count[28]++; + #endif + //break; + } + if(l_status == EFLASH_PAGE_FULL) + { + //l_timeout = 0; + #ifdef EEPROM_EXT_NOT_TRANS_MORE_WHEN_FULL + if( g_eeprom_ext[area_id].page_addr_cur_total >= (g_eeprom_user_info[area_id].mass_page_addr_total_u32) ) + { + #ifdef EEPROM_EXT_DEBUG_EN + g_eeprom_ext_test[area_id].test_count[29]++; + #endif + g_eeprom_ext[area_id].state = EFLASH_STATE_IDLE; + #ifdef EEPROM_OPTIMIZE_SEARCH_FAST + eeprom_get_current_page_addr(area_id,&g_eeprom_ext[area_id].current_page,&g_eeprom_ext[area_id].current_end_addr); + #endif + } + else + #endif + { + g_eeprom_ext[area_id].state = EFLASH_STATE_PAGE_TRANSFER; + g_eeprom_ext[area_id].transfer_state = EFLASH_PAGE_TRANSFER_STATE_WRITE_NEW_DATA; + } + #ifdef EEPROM_EXT_DEBUG_EN + g_eeprom_ext_test[area_id].test_count[30]++; + #endif + } + else + { + #ifdef EEPROM_OPTIMIZE_SEARCH_FAST + eeprom_get_current_page_addr(area_id,&g_eeprom_ext[area_id].current_page,&g_eeprom_ext[area_id].current_end_addr); + #endif + g_eeprom_ext[area_id].state = EFLASH_STATE_IDLE; + #ifdef EEPROM_EXT_DEBUG_EN + g_eeprom_ext_test[area_id].test_count[31]++; + #endif + } + if(g_eeprom_ext[area_id].state == EFLASH_STATE_PAGE_TRANSFER) + { + //virt_addr =virt_addr;// g_eeprom_ext[area_id].page_cur_id; + //data = g_logic_page_write_data[area_id]; + l_status = eeprom_page_transfer_seq(area_id,virt_addr, data); + if(l_status == EFLASH_STATUS_SUCCESS) + { + g_eeprom_ext[area_id].state = EFLASH_STATE_IDLE; + #ifdef EEPROM_EXT_DEBUG_EN + g_eeprom_ext_test[area_id].test_count[32]++; + #endif + } + if(l_status == EFLASH_STATUS_PPADRER_ERROR) + { + #ifdef EEPROM_EXT_DEBUG_IO_EN + EEPROM_EXT_TEST1_ON(area_id); + #endif + eeprom_format(area_id); + #ifdef EEPROM_EXT_DEBUG_IO_EN + EEPROM_EXT_TEST1_OFF(area_id); + #endif + //EFLASH_SetCtrlReg1(0x0); + //EFLASH_LockCtrl(); //TEMP_CLOSE 这些不知道怎么修改 + g_eeprom_ext[area_id].state = EFLASH_STATE_IDLE; + #ifdef EEPROM_EXT_DEBUG_EN + g_eeprom_ext_test[area_id].test_count[33]++; + #endif + } + //l_timeout ++; + if( (l_status != EFLASH_STATUS_BUSY && l_status != EFLASH_STATUS_SUCCESS)) + { + //EFLASH_SetCtrlReg1(0x0); + //EFLASH_LockCtrl(); //TEMP_CLOSE 这些不知道怎么修改 + g_eeprom_ext[area_id].state = EFLASH_STATE_IDLE; + #ifdef EEPROM_EXT_DEBUG_EN + g_eeprom_ext_test[area_id].test_count[34]++; + #endif + } + #ifdef EEPROM_EXT_DEBUG_EN + g_eeprom_ext_test[area_id].test_count[35]++; + #endif + #ifdef EEPROM_OPTIMIZE_SEARCH_FAST + if(g_eeprom_ext[area_id].state==EFLASH_STATE_IDLE) + { + eeprom_get_current_page_addr(area_id,&g_eeprom_ext[area_id].current_page,&g_eeprom_ext[area_id].current_end_addr); + } + #endif + } + // + /* Return last operation status */ + return l_status; +} +#endif + +#if 1 +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : 转移--上电继续 +----------------------------------------------------------------------------*/ +eeprom_statys_t eeprom_reset_page_transfer_continus(u8 area_id,u16 virt_addr, u32 data) +{ + eeprom_statys_t l_status_res = eeprom_page_transfer_seq(area_id,virt_addr,data); + if (l_status_res != EFLASH_STATUS_SUCCESS) + { + //全部擦除 + } + g_eeprom_ext[area_id].state = EFLASH_STATE_IDLE; + return l_status_res; +} +#endif +//#endif + + +#endif \ No newline at end of file diff --git a/code_app_out/Source/bsp/eeprom_seq.h b/code_app_out/Source/bsp/eeprom_seq.h new file mode 100644 index 0000000..e7f0818 --- /dev/null +++ b/code_app_out/Source/bsp/eeprom_seq.h @@ -0,0 +1,70 @@ +/** ########################################################################## +** Filename : +** Project : +** Module : +** Processor : +** Version : 1.0 +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20230602- --V1.0-- --mingyea--- --修改-- + +** #########################################################################*/ +#ifndef EEPROM_SEQ_H__ +#define EEPROM_SEQ_H__ + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ +#include "common_types.h" +#include "common_cfg.h" +#include "fm33lg0xx_fl.h" +#include "mf_config.h" +#include "eeprom.h" +#include "eeprom_state_machine.h" + +#ifdef NVM_EEPROM_EXT_EN + +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- G L O B A L V A R I A B L E S +- only configuration table allowed here,variables are not allowed! +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ + +//对外接口 +void eeprom_read_all_data_to_ram_seq(u8 area_id); +u16 eeprom_write_one_element_seq(u8 area_id,u16 virt_addr, u32 data); +eeprom_statys_t eeprom_reset_page_transfer_continus(u8 area_id,u16 virt_addr, u32 data); +extern eeprom_statys_t eeprom_page_transfer_seq(u8 area_id,u16 virt_addr, u32 data); + +#endif + +#endif /* __EEPROM_H */ + +/*******************************END OF FILE************************************/ diff --git a/code_app_out/Source/bsp/eeprom_state_machine.c b/code_app_out/Source/bsp/eeprom_state_machine.c new file mode 100644 index 0000000..8737c82 --- /dev/null +++ b/code_app_out/Source/bsp/eeprom_state_machine.c @@ -0,0 +1,602 @@ +/** ########################################################################## +** Filename : +** Project : +** Module : +** Processor : +** Version : 1.0 +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20230602- --V1.0-- --mingyea--- --修改-- + +** #########################################################################*/ + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ +#include "eeprom_state_machine.h" +#include "common_cfg.h" +#include "common_memory.h" +#include "error.h" +#include "gpio.h" +//#include "key_app_cfg.h" +#include "system_voltage_manage.h" +#include "eeprom.h" +#include "wdog.h" + +#ifdef NVM_EEPROM_EXT_EN + +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ + + + +/*--------------------------------------------------------------------------- +- S T A T I C V A R I A B L E S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +* G L O B A L V A R I A B L E S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : area_id: Var片区 +|Output parameters : +|Return value : +|Description : 片区0初始化 +----------------------------------------------------------------------------*/ +void eeprom_area_init(u8 area_id) +{ + u8 l_flag_read_all = 0u; + assert_param(area_id>24)&0xffu; + g_ram_for_eeprom[4u*i+1u] = (g_logic_page_read_data>>16)&0xffu; + g_ram_for_eeprom[4u*i+2u] = (g_logic_page_read_data>>8)&0xffu; + g_ram_for_eeprom[4u*i+3u] = (g_logic_page_read_data)&0xffu; + #else + common_memory_copys((u8*)&g_ram_for_eeprom[area_id][4u*i],(u8*)&g_logic_page_read_data[area_id],EEPROM_READ_U32_NUM); + #endif + l_count++; + #ifdef EEPROM_EXT_DEBUG_EN + g_eeprom_ext_test[area_id].test_count[39]++; + #endif + g_eeprom_ext[area_id].page_count++; + if(g_eeprom_ext[area_id].page_count>=EEPROM_AREAx_ADDR_TOTAL_U32(area_id)) //所有都读取完全 + { + //EEPROM_EXT_TEST_OFF(); + g_eeprom_ext[area_id].page_count=0u; + g_eeprom_ext[area_id].state = EFLASH_STATE_IDLE; + #ifdef EEPROM_OPTIMIZE_SEARCH_FAST + eeprom_get_current_page_addr(area_id,&g_eeprom_ext[area_id].current_page,&g_eeprom_ext[area_id].current_end_addr); + #endif + #ifdef EEPROM_EXT_DEBUG_EN + g_eeprom_ext_test[area_id].test_count[40]++; + #endif + break; + } + }while(l_count=EEPROM_AREAx_ADDR_TOTAL_U32(area_id)) + { + g_eeprom_ext[area_id].page_count=0u; + // + g_eeprom_ext[area_id].result = EFLASH_RESULT_ONCE_OK; + + #ifdef EEPROM_EXT_DEBUG_EN + g_eeprom_ext_test[area_id].test_count[41]++; + #endif + #ifdef EEPROM_OPTIMIZE_SEARCH_FAST + eeprom_get_current_page_addr(area_id,&g_eeprom_ext[area_id].current_page,&g_eeprom_ext[area_id].current_end_addr); + #endif + } + + i=g_eeprom_ext[area_id].page_count; + g_eeprom_ext[area_id].cmd_eeprom_result =eeprom_read_one_element(area_id,g_eeprom_ext[area_id].page_count,&g_logic_page_read_data[area_id]); + if(g_eeprom_ext[area_id].cmd_eeprom_result == EFLASH_READ_OK) + { + #ifdef EEPROM_EXT_DEBUG_EN + g_eeprom_ext_test[area_id].test_count[42]++; + #endif + } + else + { + #ifdef EEPROM_EXT_DEBUG_EN + g_eeprom_ext_test[area_id].test_count[43]++; + #endif + } + //EEPROM_EXT_TEST_OFF(); + #if 1 + //if(0 == l_status) //己存在 + { + #if 0 + g_logic_page_read_u8data[0] = (g_logic_page_read_data>>24)&0xffu; + g_logic_page_read_u8data[1] = (g_logic_page_read_data>>16)&0xffu; + g_logic_page_read_u8data[2] = (g_logic_page_read_data>>8)&0xffu; + g_logic_page_read_u8data[3] = (g_logic_page_read_data>>0)&0xffu; + #else + common_memory_copys((u8*)&g_logic_page_read_u8data[area_id][0],(u8*)&g_logic_page_read_data[area_id],EEPROM_READ_U32_NUM); + #endif + if( (g_ram_for_eeprom[area_id][4*i] == g_logic_page_read_u8data[area_id][0] ) + && (g_ram_for_eeprom[area_id][4*i+1] == g_logic_page_read_u8data[area_id][1] ) + && (g_ram_for_eeprom[area_id][4*i+2] == g_logic_page_read_u8data[area_id][2] ) + && (g_ram_for_eeprom[area_id][4*i+3] == g_logic_page_read_u8data[area_id][3] ) + ) + { + //全部相同 + #ifdef EEPROM_EXT_DEBUG_EN + g_eeprom_ext_test[area_id].test_count[44]++; + #endif + } + else + { + //有不同--还得判断 + #if 0 + g_logic_page_write_data= ((u32)g_ram_for_eeprom[4*i]<<24) + | ((u32)g_ram_for_eeprom[4*i+1]<<16) + | ((u32)g_ram_for_eeprom[4*i+2]<<8) + | ((u32)g_ram_for_eeprom[4*i+3]); + #else + common_memory_copys((u8*)&g_logic_page_write_data[area_id],(u8*)&g_ram_for_eeprom[area_id][4u*i],EEPROM_READ_U32_NUM); + #endif + g_eeprom_ext[area_id].page_cur_id = i; + #ifdef EEPROM_EXT_DEBUG_IO_EN + EEPROM_EXT_TEST_ON(area_id); + #endif + g_eeprom_ext[area_id].state = EFLASH_STATE_UPDATE; + #ifdef EEPROM_EXT_DEBUG_IO_EN + EEPROM_EXT_TEST_OFF(area_id); + #endif + #ifdef EEPROM_EXT_DEBUG_EN + g_eeprom_ext_test[area_id].test_count[45]++; + #endif + } + + } + #if 0 + else //不存在 + { + g_logic_page_data= ((u32)g_ram_for_eeprom[4*i]<<24) + | ((u32)g_ram_for_eeprom[4*i+1]<<16) + | ((u32)g_ram_for_eeprom[4*i+2]<<8) + | ((u32)g_ram_for_eeprom[4*i+3]); + g_eeprom_ext.page_cur_id = i; + EEPROM_EXT_TEST_ON(); + g_eeprom_ext.state = EFLASH_STATE_UPDATE; + EEPROM_EXT_TEST_OFF(); + } + #endif + #ifdef EEPROM_EXT_DEBUG_EN + g_eeprom_ext_test[area_id].test_count[46]++; + #endif + g_eeprom_ext[area_id].page_count++; + //break; + //}while(1); + #endif + break; + case EFLASH_STATE_UPDATE: + virt_addr = g_eeprom_ext[area_id].page_cur_id; + data = g_logic_page_write_data[area_id]; + /* Get valid Page for write operation */ + l_valid_page = eeprom_find_valid_page(area_id,EFLASH_WRITE_IN_VALID_PAGE); + + /* Check if there is no valid page */ + /* 扇区损坏，要格式化E2 需要很长时间，请关闭开门狗 */ + if (l_valid_page == EFLASH_NO_VALID_PAGE) + { + #ifdef EEPROM_EXT_DEBUG_IO_EN + EEPROM_EXT_TEST1_ON(area_id); + #endif + eeprom_format(area_id); + #ifdef EEPROM_EXT_DEBUG_IO_EN + EEPROM_EXT_TEST1_OFF(area_id); + #endif + g_eeprom_ext[area_id].state = EFLASH_STATE_IDLE; + #ifdef EEPROM_OPTIMIZE_SEARCH_FAST + eeprom_get_current_page_addr(area_id,&g_eeprom_ext[area_id].current_page,&g_eeprom_ext[area_id].current_end_addr); + #endif + #ifdef EEPROM_EXT_DEBUG_EN + g_eeprom_ext_test[area_id].test_count[47]++; + #endif + break; + } + #ifdef EEPROM_EXT_DEBUG_IO_EN + //EEPROM_EXT_TEST1_ON(area_id); + #endif + l_status = eeprom_verify_page_ful_write_one_ele(area_id,l_valid_page, virt_addr, data); + #ifdef EEPROM_EXT_DEBUG_IO_EN + //EEPROM_EXT_TEST1_OFF(area_id); + #endif + if(l_status == EFLASH_STATUS_PPADRER_ERROR) + { + #ifdef EEPROM_EXT_DEBUG_IO_EN + EEPROM_EXT_TEST1_ON(area_id); + #endif + eeprom_format(area_id); + #ifdef EEPROM_EXT_DEBUG_IO_EN + EEPROM_EXT_TEST1_OFF(area_id); + #endif + g_eeprom_ext[area_id].state = EFLASH_STATE_IDLE; + #ifdef EEPROM_OPTIMIZE_SEARCH_FAST + eeprom_get_current_page_addr(area_id,&g_eeprom_ext[area_id].current_page,&g_eeprom_ext[area_id].current_end_addr); + #endif + #ifdef EEPROM_EXT_DEBUG_EN + g_eeprom_ext_test[area_id].test_count[48]++; + #endif + break; + } + if(l_status == EFLASH_PAGE_FULL) + { + l_timeout = 0; + #ifdef EEPROM_EXT_NOT_TRANS_MORE_WHEN_FULL + if( g_eeprom_ext[area_id].page_addr_cur_total >= (g_eeprom_user_info[area_id].mass_page_addr_total_u32) ) + { + #ifdef EEPROM_EXT_DEBUG_EN + g_eeprom_ext_test[area_id].test_count[49]++; + #endif + g_eeprom_ext[area_id].state = EFLASH_STATE_IDLE; + g_eeprom_ext[area_id].result = EFLASH_RESULT_ONCE_OK; + #ifdef EEPROM_OPTIMIZE_SEARCH_FAST + eeprom_get_current_page_addr(area_id,&g_eeprom_ext[area_id].current_page,&g_eeprom_ext[area_id].current_end_addr); + #endif + } + else + #endif + { + g_eeprom_ext[area_id].state = EFLASH_STATE_PAGE_TRANSFER; + g_eeprom_ext[area_id].transfer_state = EFLASH_PAGE_TRANSFER_STATE_WRITE_NEW_DATA; + } + #ifdef EEPROM_EXT_DEBUG_EN + g_eeprom_ext_test[area_id].test_count[50]++; + #endif + } + else + { + #ifdef EEPROM_OPTIMIZE_SEARCH_FAST + eeprom_get_current_page_addr(area_id,&g_eeprom_ext[area_id].current_page,&g_eeprom_ext[area_id].current_end_addr); + #endif + g_eeprom_ext[area_id].state = EFLASH_STATE_IDLE; + #ifdef EEPROM_EXT_DEBUG_EN + g_eeprom_ext_test[area_id].test_count[51]++; + #endif + } + #ifdef EEPROM_EXT_DEBUG_EN + g_eeprom_ext_test[area_id].test_count[52]++; + #endif + break; + case EFLASH_STATE_PAGE_TRANSFER: + virt_addr = g_eeprom_ext[area_id].page_cur_id; + data = g_logic_page_write_data[area_id]; + l_status = eeprom_page_transfer(area_id,virt_addr, data); + if(l_status == EFLASH_STATUS_SUCCESS) + { + g_eeprom_ext[area_id].state = EFLASH_STATE_IDLE; + #ifdef EEPROM_EXT_DEBUG_EN + g_eeprom_ext_test[area_id].test_count[53]++; + #endif + } + if(l_status == EFLASH_STATUS_PPADRER_ERROR) + { + #ifdef EEPROM_EXT_DEBUG_IO_EN + EEPROM_EXT_TEST1_ON(area_id); + #endif + eeprom_format(area_id); + #ifdef EEPROM_EXT_DEBUG_IO_EN + EEPROM_EXT_TEST1_OFF(area_id); + #endif + g_eeprom_ext[area_id].state = EFLASH_STATE_IDLE; + #ifdef EEPROM_EXT_DEBUG_EN + g_eeprom_ext_test[area_id].test_count[54]++; + #endif + } + l_timeout ++; + if( (l_timeout >= EEPROM_EXT_TIMEOUT) || (l_status != EFLASH_STATUS_BUSY && l_status != EFLASH_STATUS_SUCCESS)) + { + //EFLASH_SetCtrlReg1(0x0); + //EFLASH_LockCtrl(); //TEMP_CLOSE 这些不知道怎么修改 + g_eeprom_ext[area_id].state = EFLASH_STATE_IDLE; + g_eeprom_ext[area_id].result = EFLASH_RESULT_ONCE_OK; + #ifdef EEPROM_EXT_DEBUG_EN + g_eeprom_ext_test[area_id].test_count[55]++; + #endif + } + #ifdef EEPROM_EXT_DEBUG_EN + g_eeprom_ext_test[area_id].test_count[56]++; + #endif + #ifdef EEPROM_OPTIMIZE_SEARCH_FAST + if(g_eeprom_ext[area_id].state==EFLASH_STATE_IDLE) + { + eeprom_get_current_page_addr(area_id,&g_eeprom_ext[area_id].current_page,&g_eeprom_ext[area_id].current_end_addr); + } + #endif + break; + default: + g_eeprom_ext[area_id].state = EFLASH_STATE_IDLE; + #ifdef EEPROM_EXT_DEBUG_EN + g_eeprom_ext_test[area_id].test_count[57]++; + #endif + break; + } +} + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : area_id: Var片区 +|Output parameters : +|Return value : +|Description : 重新启动--一个循环 +----------------------------------------------------------------------------*/ +void eeprom_state_machine_area_resatrt(u8 area_id) +{ + assert_param(area_id1u + g_eeprom_ext[EEPROM_AREA_ID_1].page_count=0u; + g_eeprom_ext[EEPROM_AREA_ID_1].result = EFLASH_RESULT_INIT; + #endif + } +} + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : 重新启动--一个循环 +----------------------------------------------------------------------------*/ +void eeprom_state_machine_resatrt(void) +{ + u8 i; + for(i=0u;i1u + l_result = g_eeprom_ext[area_id].result; + #endif + } + return l_result; +} + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : 读取一个循环是否结束 +----------------------------------------------------------------------------*/ +u8 eeprom_state_machine_area_get_all_result_ok(void) +{ + u8 l_result = EFLASH_RESULT_ONCE_OK; + //u8 l_total = EEPROM_AREA_TOTAL; + u8 i; + u8 l_power_grade = system_voltage_manage_mode_get(FUNC_SYSTEM_VOLTAGE_MANAGE_ID); + + if(l_power_grade == SYSTEM_VOLTAGE_MODE_LOW) + { + return l_result; + } + + for(i=0u;i
© COPYRIGHT 2021
+ ****************************************************************************** + * @History: + * @Author: + * @Data: + * @Version: +*/ + +#include "gpio.h" +#include "nvic.h" +#include "wdog.h" +#include "can_cfg.h" +#include "CanNm_Cfg.h" +#include "low_power_app.h" + +static void gpio_ext_interrupt_init(void); +static void gpio_ext_interrupt_de_init(void); +static void gpio_pwm_init(void); +static void gpio_key_init(void); +static void gpio_adc_init(void); +static void gpio_can_init(void); +static void gpio_test_init(void); +static void gpio_idle_init(void); + +typedef struct +{ + u8 state; + u8 test[8]; +}gpio_cfg_s; +static gpio_cfg_s g_gpio_cfg; + +//void gpio_isr_callback(void *device, uint32_t wpara, uint32_t lpara); + +/** + * @brief GPIO中断函数 + * @param void + * @retval void + */ +void GPIO_IRQHandler(void) +{ + g_gpio_cfg.test[0]++; + //can RX 中断 + if(FL_GPIO_IsActiveFlag_EXTI(GPIO, FL_GPIO_EXTI_LINE_1)) + { + (void)gpio_wakeup_flag_set(); + g_gpio_cfg.test[1]++; + #ifdef CAN_AUTOSAR_NM_EN + //cannm_app_set_event(CANNM_EVENT_EXT_KEY); + #endif + FL_GPIO_ClearFlag_EXTI(GPIO, FL_GPIO_EXTI_LINE_1); + } + +} + + +//普通输出io的配置 +static void gpio_output_init(void) +{ + FL_GPIO_InitTypeDef GPIO_InitStruct = {0}; + + GPIO_InitStruct.pin = O_12V_CTR_PIN_MASK; + GPIO_InitStruct.mode = FL_GPIO_MODE_OUTPUT; + GPIO_InitStruct.outputType = FL_GPIO_OUTPUT_PUSHPULL; + GPIO_InitStruct.pull = FL_DISABLE; + GPIO_InitStruct.remapPin = FL_DISABLE; + GPIO_InitStruct.analogSwitch = FL_DISABLE; + //FL_GPIO_Init(O_MDT_CTR_GPIO, &GPIO_InitStruct); + //GPIO_InitStruct.pin = O_12V_CTR_PIN_MASK ; + FL_GPIO_Init(O_12V_CTR_GPIO, &GPIO_InitStruct); + GPIO_InitStruct.pin = O_5V_CTR_PIN_MASK ; + FL_GPIO_Init(O_5V_CTR_GPIO, &GPIO_InitStruct); + GPIO_InitStruct.pin = O_KIT_CTR_PIN_MASK ; + FL_GPIO_Init(O_KIT_CTR_GPIO, &GPIO_InitStruct); + GPIO_InitStruct.pin = O_DEN_CTR_PIN_MASK; + FL_GPIO_Init(O_DEN_CTR_GPIO, &GPIO_InitStruct); + + //O_MDT_CTR_ENABLE(); + O_12V_CTR_ENABLE(); + O_5V_CTR_ENABLE(); + O_KIT_CTR_ENABLE(); + O_MDT_PWM_DISABLE(); + O_DEN_CTR_ENABLE(); +} + + +/** +* gpio_lin_init +* +* @param[in] none +* @return none +* +* @brief init led control gpio +* +*/ +static void gpio_pwm_init(void) +{ + FL_GPIO_InitTypeDef GPIO_InitStruct = {0}; + /* PA4 背景灯 PWM*/ + GPIO_InitStruct.pin = GPIO_PIN4_MASK; + GPIO_InitStruct.mode = FL_GPIO_MODE_DIGITAL; + GPIO_InitStruct.outputType = FL_GPIO_OUTPUT_PUSHPULL; + GPIO_InitStruct.pull = FL_DISABLE; + GPIO_InitStruct.analogSwitch = FL_DISABLE; + + GPIO_InitStruct.remapPin = 0; + FL_GPIO_Init(GPIOA, &GPIO_InitStruct); + + + /* PB5 左拨片 低亮指示灯 */ + GPIO_InitStruct.remapPin = 1; + GPIO_InitStruct.pin = GPIO_PIN5_MASK ; + FL_GPIO_Init(GPIOB, &GPIO_InitStruct); + + /* PB6 右拨片 低亮指示灯 */ + GPIO_InitStruct.remapPin = 1; + GPIO_InitStruct.pin = GPIO_PIN6_MASK ; + FL_GPIO_Init(GPIOB, &GPIO_InitStruct); + + /* PC0 右拨片 背景灯 */ + GPIO_InitStruct.remapPin = 0; + GPIO_InitStruct.pin = GPIO_PIN0_MASK ; + FL_GPIO_Init(GPIOC, &GPIO_InitStruct); + + /* PC1 左拨片 背景灯 */ + GPIO_InitStruct.remapPin = 0; + GPIO_InitStruct.pin = GPIO_PIN1_MASK ; + FL_GPIO_Init(GPIOC, &GPIO_InitStruct); + + /* PB4 左拨片 高亮指示灯 */ + GPIO_InitStruct.remapPin = 1; + GPIO_InitStruct.pin = GPIO_PIN4_MASK ; + FL_GPIO_Init(GPIOB, &GPIO_InitStruct); + + /* PB7 右拨片 高亮指示灯 */ + GPIO_InitStruct.remapPin = 1; + GPIO_InitStruct.pin = GPIO_PIN7_MASK ; + FL_GPIO_Init(GPIOB, &GPIO_InitStruct); + + /* PB10 电加热输出 */ + GPIO_InitStruct.remapPin = 1; + GPIO_InitStruct.pin = GPIO_PIN10_MASK ; + FL_GPIO_Init(GPIOB, &GPIO_InitStruct); +} + +/** +* GPIO_ADC_Init +* +* @param[in] none +* @return none +* +* @brief init key control gpio +* +*/ +static void gpio_key_init(void) +{ + + FL_GPIO_InitTypeDef GPIO_InitStruct = {0}; + + GPIO_InitStruct.pin = KEY_1_PIN_MASK; + GPIO_InitStruct.mode = FL_GPIO_MODE_INPUT; + GPIO_InitStruct.outputType = FL_GPIO_OUTPUT_PUSHPULL; + GPIO_InitStruct.pull = FL_DISABLE; + GPIO_InitStruct.remapPin = FL_DISABLE; + GPIO_InitStruct.analogSwitch = FL_DISABLE; + FL_GPIO_Init(KEY_1_GPIO, &GPIO_InitStruct); + GPIO_InitStruct.pin = KEY_2_PIN_MASK; + FL_GPIO_Init(KEY_2_GPIO, &GPIO_InitStruct); + GPIO_InitStruct.pin = KEY_3_PIN_MASK; + FL_GPIO_Init(KEY_3_GPIO, &GPIO_InitStruct); + GPIO_InitStruct.pin = KEY_4_PIN_MASK; + FL_GPIO_Init(KEY_4_GPIO, &GPIO_InitStruct); + GPIO_InitStruct.pin = KEY_5_PIN_MASK; + FL_GPIO_Init(KEY_5_GPIO, &GPIO_InitStruct); + GPIO_InitStruct.pin = KEY_6_PIN_MASK; + FL_GPIO_Init(KEY_6_GPIO, &GPIO_InitStruct); + GPIO_InitStruct.pin = KEY_7_PIN_MASK; + FL_GPIO_Init(KEY_7_GPIO, &GPIO_InitStruct); + GPIO_InitStruct.pin = KEY_1_ENCODE_PIN_MASK; + FL_GPIO_Init(KEY_1_ENCODE_GPIO, &GPIO_InitStruct); + + GPIO_InitStruct.pin = KEY_2_ENCODE_PIN_MASK; + FL_GPIO_Init(KEY_2_ENCODE_GPIO, &GPIO_InitStruct); + + +} + + +/** +* GPIO_ADC_Init +* +* @param[in] none +* @return none +* +* @brief init led control gpio +* +*/ +static void gpio_adc_init(void) +{ + + FL_GPIO_InitTypeDef GPIO_InitStruct = {0}; + /* 配置引脚为模拟功能 */ + /* ADC ADC_1 引脚 PD1 */ + GPIO_InitStruct.pin = ADC_CHANNEL_0_PIN_MASK; + GPIO_InitStruct.mode = FL_GPIO_MODE_ANALOG; + GPIO_InitStruct.outputType = FL_GPIO_OUTPUT_PUSHPULL; + GPIO_InitStruct.pull = FL_DISABLE; + GPIO_InitStruct.remapPin = FL_DISABLE; + GPIO_InitStruct.analogSwitch = FL_DISABLE; + FL_GPIO_Init(ADC_CHANNEL_0_GPIO, &GPIO_InitStruct); + + GPIO_InitStruct.pin = ADC_CHANNEL_1_PIN_MASK; + FL_GPIO_Init(ADC_CHANNEL_1_GPIO, &GPIO_InitStruct); + + GPIO_InitStruct.pin = ADC_CHANNEL_2_PIN_MASK; + FL_GPIO_Init(ADC_CHANNEL_2_GPIO, &GPIO_InitStruct); + + #if 0 + GPIO_InitStruct.pin = ADC_CHANNEL_3_PIN_MASK; + FL_GPIO_Init(ADC_CHANNEL_3_GPIO, &GPIO_InitStruct); + + GPIO_InitStruct.pin = ADC_CHANNEL_4_PIN_MASK; + FL_GPIO_Init(ADC_CHANNEL_4_GPIO, &GPIO_InitStruct); + #endif + + GPIO_InitStruct.pin = ADC_CHANNEL_5_PIN_MASK; + FL_GPIO_Init(ADC_CHANNEL_5_GPIO, &GPIO_InitStruct); + + GPIO_InitStruct.pin = ADC_CHANNEL_6_PIN_MASK; + FL_GPIO_Init(ADC_CHANNEL_6_GPIO, &GPIO_InitStruct); + #if 0 + GPIO_InitStruct.pin = ADC_CHANNEL_7_PIN_MASK; + FL_GPIO_Init(ADC_CHANNEL_7_GPIO, &GPIO_InitStruct); + #endif + + GPIO_InitStruct.pin = ADC_CHANNEL_8_PIN_MASK; + FL_GPIO_Init(ADC_CHANNEL_8_GPIO, &GPIO_InitStruct); + +} + + +/** +* GPIO_ADC_Init +* +* @param[in] none +* @return none +* +* @brief init led control gpio +* +*/ +static void gpio_can_init(void) +{ + FL_GPIO_InitTypeDef GPIO_InitStruct = {0}; + /* PC2.3配置成模拟功能，外接XTHF */ + /*-----------------------------------GPIO初始化---------------------------------------*/ + GPIO_InitStruct.pin = CAN0_TX_PIN_MASK; /* 48PIN开发板引脚定义 */ + GPIO_InitStruct.mode = FL_GPIO_MODE_DIGITAL; + GPIO_InitStruct.pull = FL_ENABLE; + GPIO_InitStruct.outputType = FL_GPIO_OUTPUT_PUSHPULL; + GPIO_InitStruct.remapPin = FL_DISABLE; + GPIO_InitStruct.analogSwitch = FL_DISABLE; + FL_GPIO_Init(CAN0_TX_GPIO, &GPIO_InitStruct); /* 48PIN开发板引脚定义 */ + + GPIO_InitStruct.pin = CAN0_RX_PIN_MASK; /* 48PIN开发板引脚定义 */ + GPIO_InitStruct.mode = FL_GPIO_MODE_DIGITAL; + GPIO_InitStruct.pull = FL_ENABLE; + GPIO_InitStruct.outputType = FL_GPIO_OUTPUT_PUSHPULL; + GPIO_InitStruct.remapPin = FL_DISABLE; + GPIO_InitStruct.analogSwitch = FL_DISABLE; + FL_GPIO_Init(CAN0_RX_GPIO, &GPIO_InitStruct); /* 48PIN开发板引脚定义 */ + + /* STB引脚初始化 */ + GPIO_InitStruct.pin = CAN0_STB_PIN_MASK; /* 48PIN开发板引脚定义 */ + GPIO_InitStruct.mode = FL_GPIO_MODE_OUTPUT; + GPIO_InitStruct.pull = FL_ENABLE; + GPIO_InitStruct.outputType = FL_GPIO_OUTPUT_PUSHPULL; + GPIO_InitStruct.remapPin = FL_DISABLE; + GPIO_InitStruct.analogSwitch = FL_DISABLE; + FL_GPIO_Init(CAN0_STB_GPIO, &GPIO_InitStruct); + + CAN0_STB_ON(); +} + + +/** +* gpio_led_init +* +* @param[in] none +* @return none +* +* @brief init led control gpio +* +*/ +static void gpio_test_init(void) +{ + FL_GPIO_InitTypeDef GPIO_InitStruct = {0}; + + GPIO_InitStruct.pin = TEST1_PIN_MASK; + GPIO_InitStruct.mode = FL_GPIO_MODE_OUTPUT; + GPIO_InitStruct.outputType = FL_GPIO_OUTPUT_PUSHPULL; + GPIO_InitStruct.pull = FL_DISABLE; + GPIO_InitStruct.remapPin = FL_DISABLE; + GPIO_InitStruct.analogSwitch = FL_DISABLE; + FL_GPIO_Init(TEST1_GPIO, &GPIO_InitStruct); + GPIO_InitStruct.pin = TEST2_PIN_MASK; + FL_GPIO_Init(TEST2_GPIO, &GPIO_InitStruct); + + //FL_GPIO_SetFOUT0(GPIO, FL_GPIO_FOUT0_SELECT_AHBCLK_DIV64); + //FL_GPIO_SetFOUT0(GPIO, FL_GPIO_FOUT0_SELECT_AHBCLK_DIV64); + /* init gpio as output mode */ +// TEST1_OFF(); +// TEST2_OFF(); +} + + + +//空闲io的配置 +static void gpio_idle_init(void) +{ + + +} + + +/** + * @brief + * @param input: + * @param output: +* @return none: + * @calls + * @calls by + * @others + */ +void gpio_cfg_init(void) +{ + gpio_output_init(); + gpio_pwm_init(); + gpio_key_init(); + gpio_adc_init(); + gpio_can_init(); + gpio_idle_init(); + + //gpio_lin_init(); + //gpio_i2c_init(); + + //gpio_ext_interrupt_init(); +} + + +// +static void gpio_ext_interrupt_init(void) +{ + FL_GPIO_InitTypeDef GPIO_InitStruct = {0}; + FL_EXTI_InitTypeDef extiInitStruct = {0}; + FL_EXTI_CommonInitTypeDef extiCommonInitStruct = {0}; + + FL_CMU_EnableEXTIOnSleep(); /* 休眠使能外部中断采样 */ + + /* EXTI中断采样时钟选择 */ + extiCommonInitStruct.clockSource = FL_CMU_EXTI_CLK_SOURCE_LSCLK; + FL_EXTI_CommonInit(&extiCommonInitStruct); + + /***********************CAN RX**************************/ + GPIO_InitStruct.pin = CAN0_RX_PIN_MASK; /* 48PIN开发板引脚定义 */ + GPIO_InitStruct.mode = FL_GPIO_MODE_INPUT; + GPIO_InitStruct.pull = FL_ENABLE; + GPIO_InitStruct.outputType = FL_GPIO_OUTPUT_PUSHPULL; + GPIO_InitStruct.remapPin = FL_DISABLE; + GPIO_InitStruct.analogSwitch = FL_DISABLE; + FL_GPIO_Init(CAN0_RX_GPIO, &GPIO_InitStruct); /* 48PIN开发板引脚定义 */ + + extiInitStruct.input = FL_GPIO_EXTI_INPUT_GROUP2; /* 中断线上对应的IO */ + extiInitStruct.filter = FL_ENABLE; /* 使能数字滤波 */ + extiInitStruct.triggerEdge = FL_GPIO_EXTI_TRIGGER_EDGE_FALLING; /* 设置触发边沿 */ + FL_EXTI_Init(FL_GPIO_EXTI_LINE_1,&extiInitStruct); + + // /***********************KEY B12**************************/ + + + /* NVIC中断配置 */ + NVIC_DisableIRQ(GPIO_IRQn); + NVIC_SetPriority(GPIO_IRQn, NVIC_PRIORITY_GPIO); /* 中断优先级配置 */ + NVIC_EnableIRQ(GPIO_IRQn); +} + +static void gpio_ext_interrupt_de_init(void) +{ + FL_GPIO_InitTypeDef GPIO_InitStruct = {0}; + + FL_CMU_DisableEXTIOnSleep(); /* 休眠使能外部中断采样 */ + + /* EXTI中断采样时钟选择 */ + FL_EXTI_CommonDeinit(); + + /***********************FM33LG0X5A 48PIN**************************/ + /* can rx GPIO外设 */ + GPIO_InitStruct.pin = CAN0_RX_PIN_MASK; /* 48PIN开发板引脚定义 */ + GPIO_InitStruct.mode = FL_GPIO_MODE_DIGITAL; + GPIO_InitStruct.pull = FL_ENABLE; + GPIO_InitStruct.outputType = FL_GPIO_OUTPUT_PUSHPULL; + GPIO_InitStruct.remapPin = FL_DISABLE; + GPIO_InitStruct.analogSwitch = FL_DISABLE; + FL_GPIO_Init(CAN0_RX_GPIO, &GPIO_InitStruct); /* 48PIN开发板引脚定义 */ + + FL_EXTI_DeInit(FL_GPIO_EXTI_LINE_1); + + /* NVIC中断配置 */ + NVIC_DisableIRQ(GPIO_IRQn); + //NVIC_SetPriority(GPIO_IRQn, NVIC_PRIORITY_EXTI0); /* 中断优先级配置 */ + //NVIC_EnableIRQ(GPIO_IRQn); +} + +// +void gpio_goto_sleep(void) +{ + CAN0_STB_OFF(); + +// O_MDT_CTR_DISABLE(); + O_12V_CTR_DISABLE(); + O_5V_CTR_DISABLE(); + O_KIT_CTR_DISABLE(); + O_MDT_PWM_DISABLE(); + O_DEN_CTR_DISABLE(); + //FL_CAN_SetSoftwareReset(CAN,FL_CAN_SOFTWARE_RESET); + gpio_ext_interrupt_init(); +} + +void gpio_goto_wakeup(void) +{ + gpio_ext_interrupt_de_init(); + //TEST1_ON(); + //TEST2_ON(); + CAN0_STB_ON(); + //LIN_SLP_ENABLE(); + + //O_MDT_CTR_ENABLE(); + O_12V_CTR_ENABLE(); + O_5V_CTR_ENABLE(); + O_KIT_CTR_ENABLE(); + O_DEN_CTR_ENABLE(); +} + + +void gpio_cfg_re_init(void) +{ + gpio_cfg_init(); +} + + + /*end line*/ + diff --git a/code_app_out/Source/bsp/gpio_cfg.h b/code_app_out/Source/bsp/gpio_cfg.h new file mode 100644 index 0000000..6e0c7d7 --- /dev/null +++ b/code_app_out/Source/bsp/gpio_cfg.h @@ -0,0 +1,293 @@ +/** + ****************************************************************************** + * @file + * @author + * @version + * @date + * @brief + * @function List: + ****************************************************************************** + * @attention + * + * + *

© COPYRIGHT 2021

+ ****************************************************************************** + * @History: + * @Author: + * @Data: + * @Version: +*/ + +#ifndef GPIO_CFG_H__ +#define GPIO_CFG_H__ + +#include "common_types.h" +#include "common_cfg.h" +#include "Cpu.h" + + +/*lint -e749 */ /* 枚舉 not referenced*/ +/*lint -e750 */ /* 宏 not referenced*/ +/*lint -e751 */ /* 變量 not referenced*/ +/*lint -e752 */ /* 函數 not referenced*/ +/*lint -e753 */ /* 枚舉 not referenced*/ +/*lint -e754 */ /* 結構體成員 not referenced*/ + +#define gpio_read_pin_input FL_GPIO_GetInputPin // + + +//NTC AD +#define ADC_CHANNEL_0_PIN_ID GPIO_PIN8 +#define ADC_CHANNEL_0_PIN_MASK GPIO_PIN8_MASK +#define ADC_CHANNEL_0_GPIO GPIOC +#define ADC_CHANNEL_0_PHY_ID FL_ADC_EXTERNAL_CH13 +#define ADC_CHANNEL_0_FUNC_SEL GPIO_FUN2 + +//ad1 +#define ADC_CHANNEL_1_PIN_ID GPIO_PIN1 +#define ADC_CHANNEL_1_PIN_MASK GPIO_PIN1_MASK +#define ADC_CHANNEL_1_GPIO GPIOA +#define ADC_CHANNEL_1_PHY_ID FL_ADC_EXTERNAL_CH12 +#define ADC_CHANNEL_1_FUNC_SEL GPIO_FUN2 + +//ad3 +#define ADC_CHANNEL_2_PIN_ID GPIO_PIN0 +#define ADC_CHANNEL_2_PIN_MASK GPIO_PIN0_MASK +#define ADC_CHANNEL_2_GPIO GPIOA +#define ADC_CHANNEL_2_PHY_ID FL_ADC_EXTERNAL_CH5 +#define ADC_CHANNEL_2_FUNC_SEL GPIO_FUN2 + + + +//ad2 +#define ADC_CHANNEL_5_PIN_ID GPIO_PIN0 +#define ADC_CHANNEL_5_PIN_MASK GPIO_PIN0_MASK +#define ADC_CHANNEL_5_GPIO GPIOD +#define ADC_CHANNEL_5_PHY_ID FL_ADC_EXTERNAL_CH7 +#define ADC_CHANNEL_5_FUNC_SEL GPIO_FUN2 + +//ad 12v +#define ADC_CHANNEL_6_PIN_ID GPIO_PIN1 +#define ADC_CHANNEL_6_PIN_MASK GPIO_PIN1_MASK +#define ADC_CHANNEL_6_GPIO GPIOD +#define ADC_CHANNEL_6_PHY_ID FL_ADC_EXTERNAL_CH1 +#define ADC_CHANNEL_6_FUNC_SEL GPIO_FUN2 + + +//ad rh +#define ADC_CHANNEL_7_PIN_ID GPIO_PIN11 +#define ADC_CHANNEL_7_PIN_MASK GPIO_PIN11_MASK +#define ADC_CHANNEL_7_GPIO GPIOD +#define ADC_CHANNEL_7_PHY_ID FL_ADC_EXTERNAL_CH0 +#define ADC_CHANNEL_7_FUNC_SEL GPIO_FUN2 + + +//sns ad +#define ADC_CHANNEL_8_PIN_ID GPIO_PIN7 +#define ADC_CHANNEL_8_PIN_MASK GPIO_PIN7_MASK +#define ADC_CHANNEL_8_GPIO GPIOC +#define ADC_CHANNEL_8_PHY_ID FL_ADC_EXTERNAL_CH6 +#define ADC_CHANNEL_8_FUNC_SEL GPIO_FUN2 + + +#define CAN0_TX_PIN_ID GPIO_PIN7 +#define CAN0_TX_PIN_MASK GPIO_PIN7_MASK +#define CAN0_TX_GPIO GPIOA +#define CAN0_TX_FUNC_SEL GPIO_FUN1 + + +#define CAN0_RX_PIN_ID GPIO_PIN6 +#define CAN0_RX_PIN_MASK GPIO_PIN6_MASK +#define CAN0_RX_GPIO GPIOA +#define CAN0_RX_FUNC_SEL GPIO_FUN1 + + + + +#define CAN0_STB_PIN_ID GPIO_PIN2 +#define CAN0_STB_PIN_MASK GPIO_PIN2_MASK +#define CAN0_STB_GPIO GPIOA +#define CAN0_STB_FUNC_SEL GPIO_FUN0 + + +#define KEY_1_ENCODE_PIN_ID GPIO_PIN11 +#define KEY_1_ENCODE_PIN_MASK GPIO_PIN11_MASK +#define KEY_1_ENCODE_GPIO GPIOA + +#define KEY_2_ENCODE_PIN_ID GPIO_PIN12 +#define KEY_2_ENCODE_PIN_MASK GPIO_PIN12_MASK +#define KEY_2_ENCODE_GPIO GPIOA + +#define KEY_1_PIN_ID GPIO_PIN3 +#define KEY_1_PIN_MASK GPIO_PIN3_MASK +#define KEY_1_GPIO GPIOB + +#define KEY_2_PIN_ID GPIO_PIN9 +#define KEY_2_PIN_MASK GPIO_PIN9_MASK +#define KEY_2_GPIO GPIOC + +#define KEY_3_PIN_ID GPIO_PIN11 +#define KEY_3_PIN_MASK GPIO_PIN11_MASK +#define KEY_3_GPIO GPIOB + +#define KEY_4_PIN_ID GPIO_PIN2 +#define KEY_4_PIN_MASK GPIO_PIN2_MASK +#define KEY_4_GPIO GPIOB + +#define KEY_5_PIN_ID GPIO_PIN10 +#define KEY_5_PIN_MASK GPIO_PIN10_MASK +#define KEY_5_GPIO GPIOC + +#define KEY_6_PIN_ID GPIO_PIN6 +#define KEY_6_PIN_MASK GPIO_PIN6_MASK +#define KEY_6_GPIO GPIOC + +#define KEY_6_PIN_ID GPIO_PIN6 +#define KEY_6_PIN_MASK GPIO_PIN6_MASK +#define KEY_6_GPIO GPIOC + +#define KEY_7_PIN_ID GPIO_PIN11 +#define KEY_7_PIN_MASK GPIO_PIN11_MASK +#define KEY_7_GPIO GPIOD + +#if 0 +#define O_MDT_CTR_PIN_ID GPIO_PIN10 +#define O_MDT_CTR_PIN_MASK GPIO_PIN10_MASK +#define O_MDT_CTR_GPIO GPIOB +#endif + +#define O_12V_CTR_PIN_ID GPIO_PIN15 +#define O_12V_CTR_PIN_MASK GPIO_PIN15_MASK +#define O_12V_CTR_GPIO GPIOA + +#define O_5V_CTR_PIN_ID GPIO_PIN8 +#define O_5V_CTR_PIN_MASK GPIO_PIN8_MASK +#define O_5V_CTR_GPIO GPIOB + +#define O_DEN_CTR_PIN_ID GPIO_PIN3 +#define O_DEN_CTR_PIN_MASK GPIO_PIN3_MASK +#define O_DEN_CTR_GPIO GPIOA + +#define O_KIT_CTR_PIN_ID GPIO_PIN9 +#define O_KIT_CTR_PIN_MASK GPIO_PIN9_MASK +#define O_KIT_CTR_GPIO GPIOA + +//这个不确定 +#if 0 +#define O_MD_PWM_PIN_ID GPIO_PIN10 +#define O_MD_PWM_PIN_MASK GPIO_PIN10_MASK +#define O_MD_PWM_GPIO GPIOB +//#define O_MD_PWM_CHANNEL FL_GPTIM_CHANNEL_2 +#endif + +//gptim1_ch3 +#define PWM_LED_PIN_ID GPIO_PIN4 +#define PWM_LED_PIN_MASK GPIO_PIN4_MASK +#define PWM_LED_GPIO GPIOA +#define PWM_LED_REPIN FL_DISABLE + +//gptim0_ch1 +#define PWM_HS_PIN_ID GPIO_PIN10 +#define PWM_HS_PIN_MASK GPIO_PIN10_MASK +#define PWM_HS_GPIO GPIOB +#define PWM_HS_REPIN FL_ENABLE + + +//ATIM_ch1 +#define PWM_L1_PIN_ID GPIO_PIN4 +#define PWM_L1_PIN_MASK GPIO_PIN4_MASK +#define PWM_L1_GPIO GPIOB +#define PWM_L1_REPIN FL_ENABLE + +//ATIM_ch2 +#define PWM_L2_PIN_ID GPIO_PIN5 +#define PWM_L2_PIN_MASK GPIO_PIN5_MASK +#define PWM_L2_GPIO GPIOB +#define PWM_L2_REPIN FL_ENABLE + +//ATIM_ch3 +#define PWM_R2_PIN_ID GPIO_PIN6 +#define PWM_R2_PIN_MASK GPIO_PIN6_MASK +#define PWM_R2_GPIO GPIOB +#define PWM_R2_REPIN FL_ENABLE + +//ATIM_ch4 +#define PWM_R1_PIN_ID GPIO_PIN7 +#define PWM_R1_PIN_MASK GPIO_PIN7_MASK +#define PWM_R1_GPIO GPIOB +#define PWM_R1_REPIN FL_ENABLE + + +//gptim1_ch1 +#define PWM_LH_PIN_ID GPIO_PIN0 +#define PWM_LH_PIN_MASK GPIO_PIN0_MASK +#define PWM_LH_GPIO GPIOC +#define PWM_LH_REPIN FL_DISABLE + +//gptim1_ch2 +#define PWM_RH_PIN_ID GPIO_PIN1 +#define PWM_RH_PIN_MASK GPIO_PIN1_MASK +#define PWM_RH_GPIO GPIOC +#define PWM_RH_REPIN FL_DISABLE + + + +#define TEST1_PIN_ID GPIO_PIN8 +#define TEST1_PIN_MASK GPIO_PIN8_MASK +#define TEST1_GPIO GPIOB + +#define TEST2_PIN_ID GPIO_PIN6_MASK +#define TEST2_PIN_MASK GPIO_PIN6_MASK +#define TEST2_GPIO GPIOB + + + + + +#define CAN0_STB_ON() FL_GPIO_ResetOutputPin(CAN0_STB_GPIO,CAN0_STB_PIN_MASK) +#define CAN0_STB_OFF() FL_GPIO_SetOutputPin(CAN0_STB_GPIO,CAN0_STB_PIN_MASK) + +//#define CAN0_STB_INIT_VALUE GPIO_LEVEL_HIGH +//#define CAN0_STB_EN_VALUE GPIO_LEVEL_LOW + +//#define O_MDT_CTR_ENABLE() FL_GPIO_SetOutputPin(O_MDT_CTR_GPIO, O_MDT_CTR_PIN_MASK) +#define O_MDT_CTR_DISABLE() FL_GPIO_ResetOutputPin(O_MDT_CTR_GPIO, O_MDT_CTR_PIN_MASK) + +#define O_12V_CTR_ENABLE() FL_GPIO_SetOutputPin(O_12V_CTR_GPIO, O_12V_CTR_PIN_MASK) +#define O_12V_CTR_DISABLE() FL_GPIO_ResetOutputPin(O_12V_CTR_GPIO, O_12V_CTR_PIN_MASK) + +#define O_5V_CTR_ENABLE() FL_GPIO_SetOutputPin(O_5V_CTR_GPIO, O_5V_CTR_PIN_MASK) +#define O_5V_CTR_DISABLE() FL_GPIO_ResetOutputPin(O_5V_CTR_GPIO, O_5V_CTR_PIN_MASK) + +#define O_KIT_CTR_ENABLE() FL_GPIO_SetOutputPin(O_KIT_CTR_GPIO, O_KIT_CTR_PIN_MASK) +#define O_KIT_CTR_DISABLE() FL_GPIO_ResetOutputPin(O_KIT_CTR_GPIO, O_KIT_CTR_PIN_MASK) + +#define O_DEN_CTR_ENABLE() FL_GPIO_SetOutputPin(O_DEN_CTR_GPIO, O_DEN_CTR_PIN_MASK) +#define O_DEN_CTR_DISABLE() FL_GPIO_ResetOutputPin(O_DEN_CTR_GPIO, O_DEN_CTR_PIN_MASK) + +#define O_MDT_PWM_ENABLE() //FL_GPIO_SetOutputPin(O_MD_PWM_GPIO, O_MD_PWM_PIN_MASK) +#define O_MDT_PWM_DISABLE() //FL_GPIO_ResetOutputPin(O_MD_PWM_GPIO, O_MD_PWM_PIN_MASK) + +#define GPIO_HEAT_IN_EN_INVALID 0u +#define GPIO_HEAT_IN_EN_VALID 1u + +#if 0 +//TJA1027 +#define LIN_SLP_ENABLE() FL_GPIO_SetOutputPin(LIN_SLP_GPIO, LIN_SLP_PIN_MASK) +#define LIN_SLP_DISABLE() FL_GPIO_ResetOutputPin(LIN_SLP_GPIO, LIN_SLP_PIN_MASK) + +#define LIN_SLP_INIT_VALUE GPIO_LEVEL_LOW +#define LIN_SLP_EN_VALUE GPIO_LEVEL_HIGH +#endif + +void gpio_cfg_init(void); +void gpio_goto_sleep(void); +void gpio_goto_wakeup(void); +void gpio_cfg_re_init(void); + + + + + + +#endif /* __CLK_CFG_H__ */ diff --git a/code_app_out/Source/bsp/i2c.c b/code_app_out/Source/bsp/i2c.c new file mode 100644 index 0000000..aedab02 --- /dev/null +++ b/code_app_out/Source/bsp/i2c.c @@ -0,0 +1,1142 @@ +/** ########################################################################## +** Filename : +** Project : +** Module : +** Processor : +** Version : +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20230602- --V1.0-- --mingyea--- --修改-- + +** #########################################################################*/ + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ +#include "common_cfg.h" +#include "common_memory.h" +#include "i2c.h" +#include "nvic.h" +#include "gpio_cfg.h" +#include "i2c_simu.h" + +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ +#define I2C_ADDR_TEST_MAX 4 + + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ +typedef struct +{ + u8 cmd; //写还是读； + u8 state; + u8 sub_state; + u16 slave_addr; + u8 slave_addr_len; + u8 tx_count; + u8 rx_count; + u8 tx_len; + u8 rx_len; + u8 cmd_result; + u8 result_temp; + u8 result; + u8 flag_nack; + u16 timecount; + u16 time_total; + u8 *p_len; + u8 *p_recv_data; + u8 slave_addr_index; + u8 slave_addr_tx[2]; //将地址，0表示高8位，1表示低8位 + u8 tx_data[I2C_FRAME_MAX_SIZE]; + u8 rx_data[I2C_FRAME_MAX_SIZE]; + + #ifdef I2C_DEBUG_EN + u8 test_state; + u8 test_len; + volatile u8 test_addr; + volatile u8 test_count; + volatile u8 test_data[I2C_FRAME_MAX_SIZE]; + volatile u8 test[80]; + #else + volatile u8 test_count; + #endif +}i2c_s; + + +/*--------------------------------------------------------------------------- +- S T A T I C V A R I A B L E S +----------------------------------------------------------------------------*/ +static i2c_s g_i2c; + + +/*--------------------------------------------------------------------------- +* G L O B A L V A R I A B L E S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ +const u8 g_addr_test[I2C_ADDR_TEST_MAX] = +{ + #if 1 + 0x08, + 0x08, + 0x08, + 0x08, + #else + 0x44, + 0x45, + 0x46, + 0x47, + #endif +}; + + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ +static void i2c_goto_stop_bit_state(void); +static void i2c_calulate_addr(u8 cmd); +static void i2c_rx_data_task(void); +static void i2c_rx_data_start(void); +static void i2c_tx_data_task(void); +static void i2c_operate_result(u8 cmd); + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +----------------------------------------------------------------------------*/ +void i2c_init(void) +{ + common_memory_clear((u8*)&g_i2c,sizeof(g_i2c)); + #ifdef I2C_DEBUG_EN + g_i2c.test_addr=0u; + #endif + + #ifdef I2C_MADE_BY_SIMU + i2c_simu_init(); + #else + g_i2c.slave_addr = 0x00u; + FL_I2C_MasterMode_Init(I2C, (FL_I2C_MasterMode_InitTypeDef*)&g_IICInitStructer); + #ifdef I2C_INTERRUPT_EN + /* NVIC中断配置 */ + NVIC_ClearPendingIRQ(I2C_IRQn); + NVIC_DisableIRQ(I2C_IRQn); + NVIC_SetPriority(I2C_IRQn, NVIC_PRIORITY_I2C); + NVIC_EnableIRQ(I2C_IRQn); + #endif + #endif +} + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +----------------------------------------------------------------------------*/ +void i2c_re_init_para(void) +{ + //gpio_i2c_recovery_init(); + //gpio_i2c_init(); + + g_i2c.timecount = 0u; + g_i2c.cmd = I2C_CMD_NULL; + g_i2c.rx_count = 0u; + g_i2c.tx_count = 0u; + g_i2c.rx_len = 0u; + g_i2c.tx_len = 0u; + g_i2c.cmd_result = I2C_CMD_RESULT_INIT; + g_i2c.result_temp = I2C_RESULT_INIT; + g_i2c.result = I2C_RESULT_INIT; + FL_I2C_Master_ClearFlag_TXComplete(I2C); + FL_I2C_Master_ClearFlag_RXComplete(I2C); + FL_I2C_Master_ClearFlag_NACK(I2C); + FL_I2C_Master_ClearFlag_Timeout(I2C); + FL_I2C_Master_DisableIT_NACK(I2C); + FL_I2C_Master_DisableIT_TXComplete(I2C); + FL_I2C_Master_DisableIT_RXComplete(I2C); + FL_I2C_Master_DisableIT_Stop(I2C); + FL_I2C_Master_DisableIT_Start(I2C); + //FL_I2C_Master_EnableI2CRestart(I2C); + #ifdef I2C_DEBUG_EN + g_i2c.test[0]++; + #endif +} + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +----------------------------------------------------------------------------*/ +void i2c_task(void) +{ + #ifdef I2C_MADE_BY_SIMU + #else + switch(g_i2c.state) + { + case I2C_STATE_IDLE: + break; + case I2C_STATE_START_BIT: + #ifdef I2C_DEBUG_EN + g_i2c.test[1]++; + #endif + g_i2c.timecount++; + if(g_i2c.timecount>=g_i2c_time_total[I2C_TIME_TOTAL_ID_START_BIT]) + { + g_i2c.timecount=0u; + i2c_re_init_para(); + g_i2c.result = I2C_RESULT_FAILED_TIMEOUT; + g_i2c.state = I2C_STATE_IDLE; + #ifdef I2C_DEBUG_EN + g_i2c.test[2]++; + #endif + } + break; + case I2C_STATE_SEND_ADDR: + #ifdef I2C_DEBUG_EN + g_i2c.test[3]++; + #endif + g_i2c.timecount++; + if(g_i2c.timecount>=g_i2c_time_total[I2C_TIME_TOTAL_ID_ADDR]) + { + g_i2c.timecount=0u; + i2c_re_init_para(); + g_i2c.result = I2C_RESULT_FAILED_TIMEOUT; + g_i2c.state = I2C_STATE_IDLE; + #ifdef I2C_DEBUG_EN + g_i2c.test[4]++; + #endif + } + break; + case I2C_STATE_WRITE: + #ifdef I2C_DEBUG_EN + g_i2c.test[5]++; + #endif + g_i2c.timecount++; + if(g_i2c.timecount>=g_i2c_time_total[I2C_TIME_TOTAL_ID_WRITE]) + { + g_i2c.timecount=0u; + i2c_re_init_para(); + g_i2c.result = I2C_RESULT_FAILED_TIMEOUT; + g_i2c.state = I2C_STATE_IDLE; + #ifdef I2C_DEBUG_EN + g_i2c.test[6]++; + #endif + } + break; + case I2C_STATE_READ: + #ifdef I2C_DEBUG_EN + g_i2c.test[7]++; + #endif + g_i2c.timecount++; + if(g_i2c.timecount>=g_i2c_time_total[I2C_TIME_TOTAL_ID_READ]) + { + g_i2c.timecount=0u; + i2c_re_init_para(); + g_i2c.result = I2C_RESULT_FAILED_TIMEOUT; + g_i2c.state = I2C_STATE_IDLE; + #ifdef I2C_DEBUG_EN + g_i2c.test[8]++; + #endif + } + break; + case I2C_STATE_STOP_BIT: + #ifdef I2C_DEBUG_EN + g_i2c.test[9]++; + #endif + g_i2c.timecount++; + if(g_i2c.timecount>=g_i2c_time_total[I2C_TIME_TOTAL_ID_STOP_BIT]) + { + g_i2c.timecount=0u; + i2c_re_init_para(); + g_i2c.result = I2C_RESULT_FAILED_TIMEOUT; + g_i2c.state = I2C_STATE_IDLE; + #ifdef I2C_DEBUG_EN + g_i2c.test[10]++; + #endif + } + break; + default: + break; + } + #endif +} + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +----------------------------------------------------------------------------*/ +static void i2c_calulate_addr(u8 cmd) +{ + if(g_i2c.slave_addr_len==I2C_ADDR_10BIT) + { + #ifdef I2C_DEBUG_EN + g_i2c.test[11]++; + #endif + g_i2c.slave_addr_tx[0] = ((g_i2c.slave_addr & 0x300) >> 7) | 0XF0; + if(cmd == I2C_CMD_READ) + { + g_i2c.slave_addr_tx[0] = g_i2c.slave_addr_tx[0] | 1u; + #ifdef I2C_DEBUG_EN + g_i2c.test[12]++; + #endif + } + g_i2c.slave_addr_tx[1] = (g_i2c.slave_addr & 0xFF); + g_i2c.slave_addr_index=0u; + g_i2c.sub_state=0u; + } + else + { + #ifdef I2C_DEBUG_EN + g_i2c.test[13]++; + #endif + g_i2c.slave_addr_tx[1] = (g_i2c.slave_addr << 1u); + if(cmd == I2C_CMD_READ) + { + g_i2c.slave_addr_tx[1] = g_i2c.slave_addr_tx[1] | 1u; + #ifdef I2C_DEBUG_EN + g_i2c.test[14]++; + #endif + } + g_i2c.slave_addr_index=1u; + g_i2c.sub_state=1u; + } +} + + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +----------------------------------------------------------------------------*/ +static void i2c_operate_result(u8 cmd) +{ + i2c_len_type i; + i2c_len_type l_len; + if(cmd==I2C_CMD_READ) + { + *g_i2c.p_len = g_i2c.rx_count; + if(g_i2c.rx_count>I2C_FRAME_MAX_SIZE) + { + l_len = I2C_FRAME_MAX_SIZE; + } + else + { + l_len=g_i2c.rx_count; + } + for(i = 0; i < l_len; i++) + { + g_i2c.p_recv_data[i] =g_i2c.rx_data[i]; + } + i2c_recv_block_successful_callback(); + #ifdef I2C_DEBUG_EN + g_i2c.test[15]++; + #endif + } + else + { + *g_i2c.p_len = g_i2c.tx_count; + i2c_send_block_successful_callback(); + #ifdef I2C_DEBUG_EN + g_i2c.test[16]++; + #endif + } +} + + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +----------------------------------------------------------------------------*/ +uint8_t i2c_send_block(u8 *p_buf, i2c_len_type len,i2c_len_type *p_real_len) +{ + u8 i; + u8 l_len; + u8 status = I2C_CMD_RESULT_OK; + + #ifdef I2C_MADE_BY_SIMU + + *p_real_len=0u; + i2c_simu_start(); + i2c_simu_send_byte((g_i2c.slave_addr << 1)); + if(i2c_simu_wait_ack()) + { + status = I2C_CMD_RESULT_FAILED; + #ifdef I2C_DEBUG_EN + g_i2c.test[18]++; + #endif + return status; + } + *p_real_len++; + for(i = 0u; i < len; i++) + { + i2c_simu_send_byte(p_buf[i]); + if(i2c_simu_wait_ack()) + { + status = I2C_CMD_RESULT_FAILED; + #ifdef I2C_DEBUG_EN + g_i2c.test[19]++; + #endif + return status; + } + *p_real_len++; + } + i2c_simu_stop(); + + i2c_recv_block_successful_callback(); + + #ifdef I2C_DEBUG_EN + g_i2c.test[17]++; + #endif + //return status; + + #else + + #ifdef I2C_DEBUG_EN + g_i2c.test[17]++; + #endif + //只有空闲时，才能 + if(g_i2c.state == I2C_STATE_IDLE) + { + #ifdef I2C_DEBUG_EN + g_i2c.test[18]++; + #endif + if(len0x7f) + { + g_i2c.slave_addr_len =I2C_ADDR_10BIT; + } + else + { + g_i2c.slave_addr_len =I2C_ADDR_7BIT; + } +} + + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +----------------------------------------------------------------------------*/ +static void i2c_goto_stop_bit_state(void) +{ + //跳到 stop + FL_I2C_Master_DisableIT_NACK(I2C); + FL_I2C_Master_DisableIT_TXComplete(I2C); + FL_I2C_Master_DisableIT_RXComplete(I2C); + //发完--数据，接下来，发stop bit； + g_i2c.timecount = 0u; + g_i2c.sub_state = 0u; + g_i2c.state = I2C_STATE_STOP_BIT; + FL_I2C_Master_EnableI2CStop(I2C); + FL_I2C_Master_EnableIT_Stop(I2C); + #ifdef I2C_DEBUG_EN + g_i2c.test[23]++; + #endif +} + + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : I2C中断 +----------------------------------------------------------------------------*/ +void I2C_IRQHandler(void) +{ + u8 l_addr_id=0u; + + //start bit 成功 + if( (FL_I2C_Master_IsEnabledIT_Start(I2C) == FL_ENABLE) + && (FL_I2C_Master_IsActiveFlag_Start(I2C)==FL_SET) + ) + { + #ifdef I2C_DEBUG_EN + g_i2c.test[24]++; + #endif + /* -------------- disable read ---------- */ + FL_I2C_Master_DisableRX(I2C); + FL_I2C_Master_DisableIT_Start(I2C); + FL_I2C_Master_DisableIT_Stop(I2C); + g_i2c.timecount = 0u; + if(g_i2c.state==I2C_STATE_START_BIT) + { + g_i2c.state = I2C_STATE_SEND_ADDR; + #ifdef I2C_DEBUG_EN + g_i2c.test[25]++; + #endif + } + //开始传输地址-- + FL_I2C_Master_WriteTXBuff(I2C, g_i2c.slave_addr_tx[g_i2c.slave_addr_index]); + FL_I2C_Master_EnableIT_TXComplete(I2C); + } + if( (FL_I2C_Master_IsEnabledIT_TXComplete(I2C) == FL_ENABLE) + && (FL_I2C_Master_IsActiveFlag_TXComplete(I2C) == FL_SET) + ) + { + #ifdef I2C_DEBUG_EN + g_i2c.test[26]++; + #endif + FL_I2C_Master_ClearFlag_TXComplete(I2C); + g_i2c.timecount = 0u; + //判斷，有沒有ack + if(FL_I2C_Master_IsActiveFlag_NACK(I2C)==FL_SET) + { + g_i2c.result_temp=I2C_RESULT_FAILED_NACK; + i2c_goto_stop_bit_state(); + #ifdef I2C_DEBUG_EN + g_i2c.test[27]++; + #endif + } + else + { + #ifdef I2C_DEBUG_EN + g_i2c.test[28]++; + #endif + } + #if 1 + if(g_i2c.state == I2C_STATE_SEND_ADDR) + { + #ifdef I2C_DEBUG_EN + g_i2c.test[29]++; + #endif + if(g_i2c.sub_state==0u) //繼續發送低地址 + { + g_i2c.slave_addr_index=1; + FL_I2C_Master_WriteTXBuff(I2C, g_i2c.slave_addr_tx[g_i2c.slave_addr_index]); + FL_I2C_Master_EnableIT_TXComplete(I2C); + g_i2c.sub_state=1u; + #ifdef I2C_DEBUG_EN + g_i2c.test[30]++; + #endif + } + else //可以發送數據DATA + { + #ifdef I2C_DEBUG_EN + g_i2c.test[31]++; + #endif + if(g_i2c.cmd == I2C_CMD_WRITE) + { + i2c_tx_data_task(); + #ifdef I2C_DEBUG_EN + g_i2c.test[32]++; + #endif + } + else if(g_i2c.cmd == I2C_CMD_READ) + { + i2c_rx_data_start(); + #ifdef I2C_DEBUG_EN + g_i2c.test[33]++; + #endif + } + } + } + else if (g_i2c.state == I2C_STATE_WRITE) + { + //开始发送数据内容 + #ifdef I2C_DEBUG_EN + g_i2c.test[34]++; + #endif + i2c_tx_data_task(); + //FL_I2C_Master_EnableIT_TXComplete(I2C); + } + else + { + // + } + #endif + } + if( (FL_I2C_Master_IsEnabledIT_RXComplete(I2C) == FL_ENABLE) + && (FL_I2C_Master_IsActiveFlag_RXComplete(I2C)==FL_SET) + ) + { + #ifdef I2C_DEBUG_EN + g_i2c.test[35]++; + #endif + g_i2c.timecount = 0u; + //if (g_i2c.state == I2C_STATE_READ) + FL_I2C_Master_ClearFlag_RXComplete(I2C); + i2c_rx_data_task(); + //if(l_nack==0u) + { + i2c_rx_data_start(); + } + } + if( (FL_I2C_Master_IsEnabledIT_Stop(I2C) == FL_ENABLE) + && (FL_I2C_Master_IsActiveFlag_Stop(I2C)==FL_SET) + ) + { + g_i2c.timecount = 0u; + FL_I2C_Master_DisableIT_NACK(I2C); + FL_I2C_Master_DisableIT_TXComplete(I2C); + #ifdef I2C_DEBUG_EN + g_i2c.test[36]++; + #endif + + if(g_i2c.result_temp == I2C_RESULT_FAILED_NACK) + { + g_i2c.result = I2C_RESULT_FAILED_NACK; + g_i2c.state = I2C_STATE_IDLE; + #ifdef I2C_DEBUG_EN + g_i2c.test[37]++; + #endif + } + else if(g_i2c.result_temp == I2C_RESULT_OK) + { + g_i2c.result = I2C_RESULT_OK; + i2c_operate_result(g_i2c.cmd); + g_i2c.state = I2C_STATE_IDLE; + #ifdef I2C_DEBUG_EN + g_i2c.test[38]++; + #endif + } + else + { + // + } + #ifdef I2C_DEBUG_EN + g_i2c.test[39]++; + #endif + // + } + if( (FL_I2C_Master_IsEnabledIT_Timeout(I2C) == FL_ENABLE) + && (FL_I2C_Master_IsActiveFlag_Timeout(I2C)==FL_SET) + ) + { + #ifdef I2C_DEBUG_EN + g_i2c.test[40]++; + #endif + FL_I2C_Master_ClearFlag_Timeout(I2C); + FL_I2C_Master_ClearFlag_TXComplete(I2C); + } + if( (FL_I2C_Master_IsEnabledIT_WriteConflict(I2C) == FL_ENABLE) + && (FL_I2C_Master_IsActiveFlag_WriteConflict(I2C)==FL_SET) + ) + { + #ifdef I2C_DEBUG_EN + g_i2c.test[41]++; + #endif + } + #ifdef I2C_DEBUG_EN + g_i2c.test[42]++; + #endif +} + + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description :發送數據 +----------------------------------------------------------------------------*/ +static void i2c_tx_data_task(void) +{ + u8 l_nack; + u16 l_count =0u; + g_i2c.state = I2C_STATE_WRITE; + //if(g_i2c.mode == I2C_CMD_WRITE) + { + #ifdef I2C_DEBUG_EN + g_i2c.test[43]++; + #endif + if(g_i2c.tx_count=I2C_ADDR_TEST_MAX) + { + g_i2c.test_addr=0u; + g_i2c.test_state=2u; + } + else + { + g_i2c.test_state=0u; + } + } + else + { + #ifdef I2C_DEBUG_EN + g_i2c.test[69]++; + #endif + } + #ifdef I2C_DEBUG_EN + g_i2c.test[60]++; + #endif + break; + + + case 2: + g_i2c.cmd = I2C_CMD_NULL; + i2c_re_init_para(); + g_i2c.test_len=0u; + g_i2c.test_data[0] =0x21; + g_i2c.test_data[1] =0x21; + for(i = 0; i < I2C_FRAME_MAX_SIZE; i++) + { + g_i2c.test_data[i] =0xcc; + } + g_i2c.result = I2C_RESULT_INIT; + //i2c_sel_slave_addr(DEVICE_ADD); + i2c_sel_slave_addr(g_addr_test[g_i2c.test_addr]); + //uint8_t i2c_recv_block(uint16_t Device, uint8_t AddrLen, uint8_t *Buf, uint8_t Len) + g_i2c.cmd_result = i2c_recv_block((u8*)&g_i2c.test_data[0], 6u ,&g_i2c.test_len); + g_i2c.test_state=3u; + #ifdef I2C_DEBUG_EN + g_i2c.test[61]++; + #endif + break; + + case 3: + //判断有没有发成功 + if(g_i2c.result == I2C_RESULT_OK) + { + #ifdef I2C_DEBUG_EN + g_i2c.test[62]++; + #endif + g_i2c.test_addr=0u; + g_i2c.test_state=0u; + } + else if(g_i2c.result == I2C_RESULT_FAILED_TIMEOUT) + { + #ifdef I2C_DEBUG_EN + g_i2c.test[63]++; + #endif + } + else if(g_i2c.result == I2C_RESULT_FAILE_TOHER) + { + #ifdef I2C_DEBUG_EN + g_i2c.test[64]++; + #endif + } + else if(g_i2c.result == I2C_RESULT_FAILED_NACK) + { + #ifdef I2C_DEBUG_EN + g_i2c.test[65]++; + #endif + g_i2c.test_addr++; + if(g_i2c.test_addr>=I2C_ADDR_TEST_MAX) + { + g_i2c.test_addr=0u; + g_i2c.test_state=2u; + } + else + { + g_i2c.test_state=2u; + } + } + else + { + #ifdef I2C_DEBUG_EN + g_i2c.test[66]++; + #endif + } + #ifdef I2C_DEBUG_EN + g_i2c.test[67]++; + #endif + break; + + default: + break; + } + #endif + #if 0 + if(g_i2c.test_state==0) + { + + } + else + { + g_i2c.test_state=0u; + g_i2c.rx_len=7u; + common_memory_clear(&g_i2c.rx_data[0],20); + l_result = i2c_recv_block(Device, AddrLen, &g_i2c.rx_data[0], g_i2c.rx_len); + #ifdef I2C_DEBUG_EN + g_i2c.test[1]++; + #endif + } + #endif + //return l_result; +} + +/* END i2c.h. */ + + diff --git a/code_app_out/Source/bsp/i2c.h b/code_app_out/Source/bsp/i2c.h new file mode 100644 index 0000000..4fe6c18 --- /dev/null +++ b/code_app_out/Source/bsp/i2c.h @@ -0,0 +1,105 @@ +/** ########################################################################## +** Filename : +** Project : +** Module : +** Processor : +** Version : 1.0 +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20230602- --V1.0-- --mingyea--- --修改-- + +** #########################################################################*/ +#ifndef I2C_ +#define I2C_ + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ +#include "common_types.h" +#include "error.h" +#include "i2c_cfg.h" +#include "cpu.h" + +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ +#define I2C_CMD_NULL 0u /* 空闲 */ +#define I2C_CMD_READ 1u /* I2C读操作 */ +#define I2C_CMD_WRITE 2u /* I2C写操作 */ + +#define I2C_STATE_IDLE 0u +#define I2C_STATE_START_BIT 1u +#define I2C_STATE_SEND_ADDR 2u +#define I2C_STATE_WRITE 3u +#define I2C_STATE_READ 4u +#define I2C_STATE_STOP_BIT 5u + +#define I2C_SUB_STATE_ADDR_HIGH 0u +#define I2C_SUB_STATE_ADDR_LOW 1u + +#define I2C_CMD_RESULT_INIT 0u +#define I2C_CMD_RESULT_FAILED 1u +#define I2C_CMD_RESULT_OK 2u + +#define I2C_RESULT_INIT 0u +#define I2C_RESULT_OK 1u +#define I2C_RESULT_FAILED_TIMEOUT 2u +#define I2C_RESULT_FAILED_NACK 3u +#define I2C_RESULT_FAILE_TOHER 4u + +#define I2C_JUDGE_ACK 0u +#define I2C_JUDGE_NACK 1u + +#define I2C_ADDR_7BIT 0u +#define I2C_ADDR_10BIT 1u + +#define I2C_RE_INIT_WHEN_FAULT //当I2C出现故障时，强制重新初始 + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- G L O B A L V A R I A B L E S +- only configuration table allowed here,variables are not allowed! +----------------------------------------------------------------------------*/ +extern u16 i2c_snd_recv_temp; + + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ +void i2c_init(void); +void i2c_task(void); + + +void i2c_re_init_para(void); + +uint8_t i2c_send_block(u8 *p_buf, i2c_len_type len,i2c_len_type *p_real_len); +uint8_t i2c_recv_block(u8 *p_buf, i2c_len_type len,i2c_len_type *p_real_len); + +void i2c_sel_slave_addr(u16 addr); + +void i2c_send_block_successful_callback(void); +void i2c_recv_block_successful_callback(void); + + +void i2c_test(void); + + +#endif /* */ diff --git a/code_app_out/Source/bsp/i2c_cfg.c b/code_app_out/Source/bsp/i2c_cfg.c new file mode 100644 index 0000000..0e5763b --- /dev/null +++ b/code_app_out/Source/bsp/i2c_cfg.c @@ -0,0 +1,179 @@ +/** ########################################################################## +** Filename : +** Project : +** Module : +** Processor : +** Version : +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20230602- --V1.0-- --mingyea--- --修改-- + +** #########################################################################*/ + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ +#include "i2c.h" +#include "common_memory.h" + +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- S T A T I C V A R I A B L E S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +* G L O B A L V A R I A B L E S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ +const FL_I2C_MasterMode_InitTypeDef g_IICInitStructer= +{ + FL_CMU_I2C_CLK_SOURCE_APBCLK, /** 主机时使用的时钟源*/ + 100000, /** I2C通讯速率*/ +}; + + +const u16 g_i2c_time_total[I2C_TIME_TOTAL_ID_MAX] = +{ + 1u/I2C_TASK_TIME_UNIT, + 2u/I2C_TASK_TIME_UNIT, + 2u/I2C_TASK_TIME_UNIT, + 2u/I2C_TASK_TIME_UNIT, + 1u/I2C_TASK_TIME_UNIT, + //1u/I2C_TASK_TIME_UNIT, +}; + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +|Prototype : static return_type example_fun1(parameter list) +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : 在结束时，把结果处理一下，比如长度，或者数据回读 +----------------------------------------------------------------------------*/ +void i2c_send_block_successful_callback(void) +{ + //touch_force_drv_com_tx_success_callback(); +} + + +/*--------------------------------------------------------------------------- +|Prototype : static return_type example_fun1(parameter list) +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : 在结束时，把结果处理一下，比如长度，或者数据回读 +----------------------------------------------------------------------------*/ +void i2c_recv_block_successful_callback(void) +{ + //touch_force_drv_com_rx_success_callback(); +} + + +#ifdef I2C_API_RECALL + +#else + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +----------------------------------------------------------------------------*/ +void CI2C1_Init(void) +{ + +} + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +----------------------------------------------------------------------------*/ +void CI2C_re_init_para(void) +{ + +} + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +----------------------------------------------------------------------------*/ +u8 CI2C1_SelectSlave(u8 Slv) +{ + return 0u; +} + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +----------------------------------------------------------------------------*/ +u8 CI2C1_SendBlock(void* Ptr,i2c_len_type Siz,i2c_len_type *Snt) +{ + return 0u; +} + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +----------------------------------------------------------------------------*/ +u8 CI2C1_RecvBlock(void* Ptr,i2c_len_type Siz,i2c_len_type *Rcv) +{ + return 0u; +} + + +#endif \ No newline at end of file diff --git a/code_app_out/Source/bsp/i2c_cfg.h b/code_app_out/Source/bsp/i2c_cfg.h new file mode 100644 index 0000000..b51e66e --- /dev/null +++ b/code_app_out/Source/bsp/i2c_cfg.h @@ -0,0 +1,116 @@ +/** ########################################################################## +** Filename : +** Project : +** Module : +** Processor : +** Version : 1.0 +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : 此文档用于规范代码书写； +* 注意， +* 1.所有文件用UTF-8格式 +* 2.tab键空格4个 +* 3.各模块，都要有 初始化函数 init, 反初始化函数 deinit, +* 周期任务task,进入休眠goto sleep, +* 唤醒后 goto wake ,判断是否可休眠judge_pre_sleep 等主要函数接口 +* 4. +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20191106- --V01-- --LYJ--- --初版-- +** -20230602- --V1.0-- --mingyea--- --修改-- + +** #########################################################################*/ +#ifndef I2C_CFG_ +#define I2C_CFG_ + + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ +#include "common_types.h" +#include "error.h" +//#include "IO_Map.h" +/* Include inherited components */ +#include "cpu.h" + +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ +#define I2C_MADE_BY_SIMU //模拟I2C + +#define I2C_INTERRUPT_EN //开启中断方式 + + +#define I2C_TASK_TIME_UNIT 1u //放在1ms定时器里 + +#define I2C_FRAME_MAX_SIZE 20u //字节 + + +#define I2C_TIME_TOTAL_ID_START_BIT 0 +#define I2C_TIME_TOTAL_ID_ADDR 1 +#define I2C_TIME_TOTAL_ID_WRITE 2 +#define I2C_TIME_TOTAL_ID_READ 3 +#define I2C_TIME_TOTAL_ID_STOP_BIT 4 +#define I2C_TIME_TOTAL_ID_MAX 5 + +//#define I2C_API_RECALL +#define I2C_DEBUG_EN +//#define I2C_TEST_EN + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ + +//typedef u16 word; + +typedef u8 i2c_len_type; + + +/*--------------------------------------------------------------------------- +- S T A T I C V A R I A B L E S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +* G L O B A L V A R I A B L E S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ +extern const FL_I2C_MasterMode_InitTypeDef g_IICInitStructer; +extern const u16 g_i2c_time_total[I2C_TIME_TOTAL_ID_MAX] ; + + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ + +#ifdef I2C_API_RECALL + +#define CI2C1_Init i2c_init +#define CI2C_re_init_para i2c_re_init_para +#define CI2C1_SelectSlave i2c_sel_slave_addr +#define CI2C1_SendBlock i2c_send_block +#define CI2C1_RecvBlock i2c_recv_block + +#else + +void CI2C1_Init(void); +void CI2C_re_init_para(void); +u8 CI2C1_SelectSlave(u8 Slv); +u8 CI2C1_SendBlock(void* Ptr,i2c_len_type Siz,i2c_len_type *Snt); +u8 CI2C1_RecvBlock(void* Ptr,i2c_len_type Siz,i2c_len_type *Rcv); + +#endif + + +#endif \ No newline at end of file diff --git a/code_app_out/Source/bsp/nvic.c b/code_app_out/Source/bsp/nvic.c new file mode 100644 index 0000000..d79583c --- /dev/null +++ b/code_app_out/Source/bsp/nvic.c @@ -0,0 +1,98 @@ +/** ########################################################################## +** Filename : +** Project : +** Module : +** Processor : +** Version : +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20230602- --V1.0-- --mingyea--- --修改-- + +** #########################################################################*/ + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ +#include "nvic.h" +#include "cpu.h" +#include "boot_app.h" + +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ + + + +/*--------------------------------------------------------------------------- +- S T A T I C V A R I A B L E S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +* G L O B A L V A R I A B L E S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ + + + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +----------------------------------------------------------------------------*/ +void nvic_set_vector_table(uint32_t NVIC_VectTab, uint32_t Offset) +{ + SCB->VTOR = NVIC_VectTab | (Offset & (uint32_t)0x1FFFFF80); +} + + + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description :初始化 +----------------------------------------------------------------------------*/ +void nvic_init(void) +{ + //NVIC_SetVectorTable(FLASH_BASE,BOOT_APP_VECTOR_OFFSET); + nvic_set_vector_table(FLASH_APP_BASE,BOOT_APP_VECTOR_OFFSET); // + /* Configure one bit for preemption priority */ + //NVIC_PriorityGroupConfig(NVIC_PriorityGroup_2); + +} + + + + diff --git a/code_app_out/Source/bsp/nvic.h b/code_app_out/Source/bsp/nvic.h new file mode 100644 index 0000000..e1956cb --- /dev/null +++ b/code_app_out/Source/bsp/nvic.h @@ -0,0 +1,70 @@ +/** ########################################################################## +** Filename : +** Project : +** Module : +** Processor : +** Version : +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20230602- --V1.0-- --mingyea--- --修改-- + +** #########################################################################*/ +#ifndef NVIC_H__ +#define NVIC_H__ + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ +#include "common_types.h" +#include "nvic_cfg.h" + +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- G L O B A L V A R I A B L E S +- only configuration table allowed here,variables are not allowed! +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ + + + +void nvic_init(void); + +#if 0 +void nvic_disable_primask(void); +void nvic_enable_primask(void); +void nvic_disable_faultmask(void); +void nvic_enable_faultmask(void); +#endif + + +#endif /* __NVIC_H__ */ + + + + diff --git a/code_app_out/Source/bsp/nvic_cfg.c b/code_app_out/Source/bsp/nvic_cfg.c new file mode 100644 index 0000000..211b4b8 --- /dev/null +++ b/code_app_out/Source/bsp/nvic_cfg.c @@ -0,0 +1,56 @@ +/** ########################################################################## +** Filename : +** Project : +** Module : +** Processor : +** Version : 1.0 +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20230602- --V1.0-- --mingyea--- --޸-- + +** #########################################################################*/ + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ +#include "nvic.h" + +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ + + + +/*--------------------------------------------------------------------------- +- S T A T I C V A R I A B L E S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +* G L O B A L V A R I A B L E S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ diff --git a/code_app_out/Source/bsp/nvic_cfg.h b/code_app_out/Source/bsp/nvic_cfg.h new file mode 100644 index 0000000..aa7c5da --- /dev/null +++ b/code_app_out/Source/bsp/nvic_cfg.h @@ -0,0 +1,118 @@ +/** ########################################################################## +** Filename : +** Project : +** Module : +** Processor : +** Version : +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20230602- --V1.0-- --mingyea--- --޸-- + +** #########################################################################*/ +#ifndef NVIC_CFG_H__ +#define NVIC_CFG_H__ + + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ +#define CPU_CFG_KA_IPL_BOUNDARY_11x 0 + + +/*Дȼ*/ + +#define NVIC_PRIORITY_CLK (CPU_CFG_KA_IPL_BOUNDARY_11x) +#define NVIC_PRIORITY_PVD (CPU_CFG_KA_IPL_BOUNDARY_11x) +#define NVIC_PRIORITY_SVD (CPU_CFG_KA_IPL_BOUNDARY_11x) + +#define NVIC_PRIORITY_CAN (CPU_CFG_KA_IPL_BOUNDARY_11x+1) + +#define NVIC_PRIORITY_LIN (CPU_CFG_KA_IPL_BOUNDARY_11x+2) +#define NVIC_PRIORITY_USART (CPU_CFG_KA_IPL_BOUNDARY_11x+2) + +#define NVIC_PRIORITY_TIM (CPU_CFG_KA_IPL_BOUNDARY_11x+3) +#define NVIC_PRIORITY_ADC (CPU_CFG_KA_IPL_BOUNDARY_11x+3) + +#define NVIC_PRIORITY_GPIO (CPU_CFG_KA_IPL_BOUNDARY_11x+3) +#define NVIC_PRIORITY_RTC (CPU_CFG_KA_IPL_BOUNDARY_11x+3) +#define NVIC_PRIORITY_WDOG (CPU_CFG_KA_IPL_BOUNDARY_11x+3) + +#define NVIC_PRIORITY_PWM (CPU_CFG_KA_IPL_BOUNDARY_11x+3) +#define NVIC_PRIORITY_I2C (CPU_CFG_KA_IPL_BOUNDARY_11x+3) + +#define NVIC_PRIORITY_USART0 NVIC_PRIORITY_USART +#define NVIC_PRIORITY_USART1 NVIC_PRIORITY_USART +#define NVIC_PRIORITY_USART2 NVIC_PRIORITY_USART +#define NVIC_PRIORITY_USART3 NVIC_PRIORITY_USART +#define NVIC_PRIORITY_USART4 NVIC_PRIORITY_USART +#define NVIC_PRIORITY_USART5 NVIC_PRIORITY_USART + + +#if 0 +#define NVIC_PRIORITY_TIM0 NVIC_PRIORITY_TIM +#define NVIC_PRIORITY_TIM1 NVIC_PRIORITY_TIM + +#define NVIC_PRIORITY_ADC0 NVIC_PRIORITY_ADC +#define NVIC_PRIORITY_ADC1 NVIC_PRIORITY_ADC +#define NVIC_PRIORITY_ADC2 NVIC_PRIORITY_ADC +#define NVIC_PRIORITY_ADC3 NVIC_PRIORITY_ADC + +#define NVIC_PRIORITY_EXTI0 NVIC_PRIORITY_GPIO + +#define NVIC_PRIORITY_CAN0_TX NVIC_PRIORITY_CAN +#define NVIC_PRIORITY_CAN0_RX0 NVIC_PRIORITY_CAN +#endif + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- G L O B A L V A R I A B L E S +- only configuration table allowed here,variables are not allowed! +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ + + + + + + + + + + + + + + + + + + + +#endif \ No newline at end of file diff --git a/code_app_out/Source/bsp/rmu.c b/code_app_out/Source/bsp/rmu.c new file mode 100644 index 0000000..a05b75e --- /dev/null +++ b/code_app_out/Source/bsp/rmu.c @@ -0,0 +1,159 @@ +/** ########################################################################## +** Filename : +** Project : +** Module : +** Processor : +** Version : +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20230602- --V1.0-- --mingyea--- --修改-- + +** #########################################################################*/ + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ +#include "rmu.h" +#include "common_cfg.h" +#include "nvm.h" + + +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- S T A T I C V A R I A B L E S +----------------------------------------------------------------------------*/ +MEMORY_MAP_RAM_FLAG_NOINIT u8 g_rmu_flag[4] ={0u}; + + +/*--------------------------------------------------------------------------- +* G L O B A L V A R I A B L E S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ + + + + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : 初始化 +----------------------------------------------------------------------------*/ +void rmu_init(void) +{ + u8 l_result =0u; + #if 0 + if(FL_RMU_IsActiveFlag_PRCN(RMU) == 1u) + { + FL_RMU_ClearFlag_PRCN(RMU); + g_rmu_flag[0]++; + } + if(FL_RMU_IsActiveFlag_PORN(RMU) == 1u) + { + FL_RMU_ClearFlag_PORN(RMU); + g_rmu_flag[1]++; + } + if(FL_RMU_IsActiveFlag_PDRN(RMU) == 1u) + { + FL_RMU_ClearFlag_PDRN(RMU); + g_rmu_flag[2]++; + } + #else + if(FL_RMU_IsActiveFlag_PRCN(RMU) == 1u) + { + FL_RMU_ClearFlag_PRCN(RMU); + l_result=1u; + g_rmu_flag[0]++; + } + if(FL_RMU_IsActiveFlag_PORN(RMU) == 1u) + { + FL_RMU_ClearFlag_PORN(RMU); + l_result=2u; + g_rmu_flag[1]++; + } + if(FL_RMU_IsActiveFlag_PDRN(RMU) == 1u) + { + FL_RMU_ClearFlag_PDRN(RMU); + l_result=3u; + g_rmu_flag[2]++; + } + if( l_result != 0u ) + { + #ifdef NVM_EEPROM_EXT_EN + eeprom_ext_clear_flag(); + #endif + //#ifdef NVM_EXTERN_EEPROM_EN + //extern_eeprom_ext_clear_flag(); + //#endif + //fault_detect_init(); + } + #endif + + //FL_RMU_PDR_SetThreshold(RMU,FL_RMU_PDR_THRESHOLD_1P55V); + FL_RMU_PDR_Enable(RMU); + //FL_RMU_PDR_Disable(RMU); + + FL_RMU_BOR_SetThreshold(RMU,FL_RMU_BOR_THRESHOLD_2P00V); + FL_RMU_BOR_Enable(RMU); +} + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +----------------------------------------------------------------------------*/ +u8 rmu_get_value(u8 id) +{ + return g_rmu_flag[id]; +} + + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +----------------------------------------------------------------------------*/ +void rmu_task(void) +{ + +} + + diff --git a/code_app_out/Source/bsp/rmu.h b/code_app_out/Source/bsp/rmu.h new file mode 100644 index 0000000..ef19b7f --- /dev/null +++ b/code_app_out/Source/bsp/rmu.h @@ -0,0 +1,59 @@ +/** ########################################################################## +** Filename : +** Project : +** Module : +** Processor : +** Version : +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20230602- --V1.0-- --mingyea--- --޸-- + +** #########################################################################*/ +#ifndef RMU_H__ +#define RMU_H__ + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ +#include "common_types.h" +#include "fm33lg0xx_fl.h" + +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- G L O B A L V A R I A B L E S +- only configuration table allowed here,variables are not allowed! +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ + +void rmu_init(void); +void rmu_task(void); +u8 rmu_get_value(u8 id); + + +#endif diff --git a/code_app_out/Source/bsp/rmu_cfg.c b/code_app_out/Source/bsp/rmu_cfg.c new file mode 100644 index 0000000..4b5894a --- /dev/null +++ b/code_app_out/Source/bsp/rmu_cfg.c @@ -0,0 +1,61 @@ +/** ########################################################################## +** Filename : +** Project : +** Module : +** Processor : +** Version : +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20230602- --V1.0-- --mingyea--- --޸-- + +** #########################################################################*/ + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ +#include "common_types.h" +#include "common_cfg.h" +#include "rmu.h" + +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ + + + +/*--------------------------------------------------------------------------- +- S T A T I C V A R I A B L E S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +* G L O B A L V A R I A B L E S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ + + + diff --git a/code_app_out/Source/bsp/rmu_cfg.h b/code_app_out/Source/bsp/rmu_cfg.h new file mode 100644 index 0000000..e94a67b --- /dev/null +++ b/code_app_out/Source/bsp/rmu_cfg.h @@ -0,0 +1,59 @@ +/** ########################################################################## +** Filename : +** Project : +** Module : +** Processor : +** Version : +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20230602- --V1.0-- --mingyea--- --޸-- + +** #########################################################################*/ +#ifndef RMU_CFG_H__ +#define RMU_CFG_H__ + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ +#include "fm33lg0xx_fl.h" + +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- G L O B A L V A R I A B L E S +- only configuration table allowed here,variables are not allowed! +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ + + + + + + +#endif diff --git a/code_app_out/Source/bsp/stack_check.c b/code_app_out/Source/bsp/stack_check.c new file mode 100644 index 0000000..a9088b7 --- /dev/null +++ b/code_app_out/Source/bsp/stack_check.c @@ -0,0 +1,215 @@ +/** ########################################################################## +** Filename : +** Project : +** Module : +** Processor : +** Version : +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20230602- --V1.0-- --mingyea--- --修改-- + +** #########################################################################*/ + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ +#include "stack_check.h" +#include "common_memory.h" +//#include "rcm_check.h" + +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ +typedef struct +{ + u8 time_count; + #ifdef STACK_CHECK_DEBUG_EN + u8 test[3]; + #endif +}stack_check_s; + + +/*--------------------------------------------------------------------------- +- S T A T I C V A R I A B L E S +----------------------------------------------------------------------------*/ +MEMORY_MAP_RAM_FLAG_NOINIT stack_check_s g_stack_check ={0u}; + + +/*--------------------------------------------------------------------------- +* G L O B A L V A R I A B L E S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ +volatile u8 g_stack_check_addr[RAM_STACK_CHECK_MAX_LEN] __attribute__((section(".STACK_CHECK_ADDR"))) = +{ + RAM_STACK_CHECK_VALUE_BUF0, + RAM_STACK_CHECK_VALUE_BUF1, + RAM_STACK_CHECK_VALUE_BUF2, + RAM_STACK_CHECK_VALUE_BUF3, + RAM_STACK_CHECK_VALUE_BUF0, + RAM_STACK_CHECK_VALUE_BUF1, + RAM_STACK_CHECK_VALUE_BUF2, + RAM_STACK_CHECK_VALUE_BUF3, + RAM_STACK_CHECK_VALUE_BUF0, + RAM_STACK_CHECK_VALUE_BUF1, + RAM_STACK_CHECK_VALUE_BUF2, + RAM_STACK_CHECK_VALUE_BUF3, + RAM_STACK_CHECK_VALUE_BUF0, + RAM_STACK_CHECK_VALUE_BUF1, + RAM_STACK_CHECK_VALUE_BUF2, + RAM_STACK_CHECK_VALUE_BUF3, +}; + + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ + + + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +----------------------------------------------------------------------------*/ +MEMORY_MAP_ROM_FOR_ASIL void stack_check_init(void) +{ + #if 0 + u8 i; + for(i=0;i=STACK_CHECK_TASK_TIME) + { + g_stack_check.time_count=0u; + if( (g_stack_check_addr[0] == RAM_STACK_CHECK_VALUE_BUF0) + && (g_stack_check_addr[1] == RAM_STACK_CHECK_VALUE_BUF1) + && (g_stack_check_addr[2] == RAM_STACK_CHECK_VALUE_BUF2) + && (g_stack_check_addr[3] == RAM_STACK_CHECK_VALUE_BUF3) + && (g_stack_check_addr[4] == RAM_STACK_CHECK_VALUE_BUF0) + && (g_stack_check_addr[5] == RAM_STACK_CHECK_VALUE_BUF1) + && (g_stack_check_addr[6] == RAM_STACK_CHECK_VALUE_BUF2) + && (g_stack_check_addr[7] == RAM_STACK_CHECK_VALUE_BUF3) + && (g_stack_check_addr[8] == RAM_STACK_CHECK_VALUE_BUF0) + && (g_stack_check_addr[9] == RAM_STACK_CHECK_VALUE_BUF1) + && (g_stack_check_addr[10] == RAM_STACK_CHECK_VALUE_BUF2) + && (g_stack_check_addr[11] == RAM_STACK_CHECK_VALUE_BUF3) + && (g_stack_check_addr[12] == RAM_STACK_CHECK_VALUE_BUF0) + && (g_stack_check_addr[13] == RAM_STACK_CHECK_VALUE_BUF1) + && (g_stack_check_addr[14] == RAM_STACK_CHECK_VALUE_BUF2) + && (g_stack_check_addr[15] == RAM_STACK_CHECK_VALUE_BUF3) + ) + { + #ifdef STACK_CHECK_DEBUG_EN + g_stack_check.test[0]++; + #endif + } + else + { + //执行复位 + #ifdef STACK_CHECK_DEBUG_EN + g_stack_check.test[1]++; + #endif + //rcm_check_set_reset_flag(RCM_LOGIC_FLAG_STACK_CHECK); + SystemSoftwareReset(); + } + } + #endif +} + + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +----------------------------------------------------------------------------*/ +MEMORY_MAP_ROM_FOR_ASIL u8 stack_check_get_test_value(u8 id) +{ + u8 l_temp; + if(id < 3u) + { + #ifdef STACK_CHECK_DEBUG_EN + l_temp = g_stack_check.test[id]; + #else + l_temp = 0; + #endif + } + else + { + l_temp = 0; + } + return l_temp; +} + + diff --git a/code_app_out/Source/bsp/stack_check.h b/code_app_out/Source/bsp/stack_check.h new file mode 100644 index 0000000..c695c34 --- /dev/null +++ b/code_app_out/Source/bsp/stack_check.h @@ -0,0 +1,66 @@ +/** ########################################################################## +** Filename : +** Project : +** Module : +** Processor : +** Version : 1.0 +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20230602- --V1.0-- --mingyea--- --修改-- + +** #########################################################################*/ +#ifndef STACK_CHECK_H__ +#define STACK_CHECK_H__ + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ +#include "common_types.h" +#include "stack_check_cfg.h" + +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- G L O B A L V A R I A B L E S +- only configuration table allowed here,variables are not allowed! +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ + +MEMORY_MAP_ROM_FOR_ASIL void stack_check_init(void); +MEMORY_MAP_ROM_FOR_ASIL void stack_check_task(void); +MEMORY_MAP_ROM_FOR_ASIL u8 stack_check_get_test_value(u8 id); + + + +#endif /* __BOOT_APP_H__ */ + + + + + + diff --git a/code_app_out/Source/bsp/stack_check_cfg.c b/code_app_out/Source/bsp/stack_check_cfg.c new file mode 100644 index 0000000..aa75fda --- /dev/null +++ b/code_app_out/Source/bsp/stack_check_cfg.c @@ -0,0 +1,77 @@ +/** ########################################################################## +** Filename : +** Project : +** Module : +** Processor : +** Version : +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20230602- --V1.0-- --mingyea--- --޸-- + +** #########################################################################*/ + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ +#include "stack_check.h" + +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- S T A T I C V A R I A B L E S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +* G L O B A L V A R I A B L E S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ +#if 0 +const MEMORY_MAP_ROM_DATA_FOR_ASIL u8 g_stack_check_fix_value[RAM_STACK_CHECK_MAX_LEN] = +{ + RAM_STACK_CHECK_VALUE_BUF0, + RAM_STACK_CHECK_VALUE_BUF1, + RAM_STACK_CHECK_VALUE_BUF2, + RAM_STACK_CHECK_VALUE_BUF3, + RAM_STACK_CHECK_VALUE_BUF0, + RAM_STACK_CHECK_VALUE_BUF1, + RAM_STACK_CHECK_VALUE_BUF2, + RAM_STACK_CHECK_VALUE_BUF3, + RAM_STACK_CHECK_VALUE_BUF0, + RAM_STACK_CHECK_VALUE_BUF1, + RAM_STACK_CHECK_VALUE_BUF2, + RAM_STACK_CHECK_VALUE_BUF3, + RAM_STACK_CHECK_VALUE_BUF0, + RAM_STACK_CHECK_VALUE_BUF1, + RAM_STACK_CHECK_VALUE_BUF2, + RAM_STACK_CHECK_VALUE_BUF3, +}; + +#endif + + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ diff --git a/code_app_out/Source/bsp/stack_check_cfg.h b/code_app_out/Source/bsp/stack_check_cfg.h new file mode 100644 index 0000000..971db80 --- /dev/null +++ b/code_app_out/Source/bsp/stack_check_cfg.h @@ -0,0 +1,96 @@ +/** ########################################################################## +** Filename : +** Project : +** Module : +** Processor : +** Version : 1.0 +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : 此文档用于规范代码书写； +* 注意， +* 1.所有文件用UTF-8格式 +* 2.tab键空格4个 +* 3.各模块，都要有 初始化函数 init, 反初始化函数 deinit, +* 周期任务task,进入休眠goto sleep, +* 唤醒后 goto wake ,判断是否可休眠judge_pre_sleep 等主要函数接口 +* 4. +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20191106- --V01-- --LYJ--- --初版-- +** -20230602- --V1.0-- --mingyea--- --修改-- + +** #########################################################################*/ +#ifndef STACK_CHECK_CFG_H__ +#define STACK_CHECK_CFG_H__ + + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ +#include "common_types.h" +#include "cpu.h" +#include "common_cfg.h" + +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ +#define STACK_CHECK_DEBUG_EN 1 + +#define STACK_CHECK_TIME_UNIT 100 //放在100ms 周期裡面 +#define STACK_CHECK_TASK_TIME (200/STACK_CHECK_TIME_UNIT) + +//预留16字节，检测堆栈是否溢出 +//#define RAM_STACK_CHECK_ADDR (0x20001ec0 -16u) //(m_data_end-__size_cstack__+1u - 16u) + +#define RAM_STACK_CHECK_MAX_LEN 16u +#define RAM_STACK_CHECK_VALUE_BUF0 0x55u +#define RAM_STACK_CHECK_VALUE_BUF1 0x5eu +#define RAM_STACK_CHECK_VALUE_BUF2 0x5cu +#define RAM_STACK_CHECK_VALUE_BUF3 0x4eu + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- G L O B A L V A R I A B L E S +- only configuration table allowed here,variables are not allowed! +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ +//extern const MEMORY_MAP_ROM_DATA_FOR_ASIL u8 g_stack_check_fix_value[RAM_STACK_CHECK_MAX_LEN] ; + + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ + + + + + + + + + + + +#endif /* __BOOT_APP_CFG_H__ */ + + + + + + + diff --git a/code_app_out/Source/bsp/svd.c b/code_app_out/Source/bsp/svd.c new file mode 100644 index 0000000..2eea228 --- /dev/null +++ b/code_app_out/Source/bsp/svd.c @@ -0,0 +1,197 @@ +/** ########################################################################## +** Filename : +** Project : +** Module : +** Processor : +** Version : +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20230602- --V1.0-- --mingyea--- --修改-- + +** #########################################################################*/ + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ +#include "svd.h" +#include "nvic.h" + + +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- S T A T I C V A R I A B L E S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +* G L O B A L V A R I A B L E S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ + + + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : SVD初始化 +----------------------------------------------------------------------------*/ +void svd_init(void) +{ + //FL_GPIO_InitTypeDef GPIO_InitStruct; + FL_NVIC_ConfigTypeDef InterruptConfigStruct; + FL_SVD_InitTypeDef SVD_InitStruct; + + #if 0 + GPIO_InitStruct.pin = FL_GPIO_PIN_15; + GPIO_InitStruct.mode = FL_GPIO_MODE_ANALOG; + GPIO_InitStruct.outputType = FL_GPIO_OUTPUT_PUSHPULL; + GPIO_InitStruct.pull = FL_DISABLE; + GPIO_InitStruct.remapPin = FL_DISABLE; + GPIO_InitStruct.analogSwitch = FL_DISABLE; + FL_GPIO_Init(GPIOA, &GPIO_InitStruct); + #endif + + SVD_InitStruct.SVSChannel = FL_DISABLE; + SVD_InitStruct.digitalFilter = FL_ENABLE; + SVD_InitStruct.referenceVoltage = FL_SVD_REFERENCE_1P0V; + SVD_InitStruct.workMode = FL_SVD_WORK_MODE_CONTINUOUS; + SVD_InitStruct.enablePeriod = FL_SVD_ENABLE_PERIOD_62P5MS; + SVD_InitStruct.warningThreshold = FL_SVD_WARNING_THRESHOLD_GROUP11; //必须4.2以上 + FL_SVD_Init(SVD, &SVD_InitStruct); + + /* 清除欠压标志 */ + FL_SVD_ClearFlag_PowerFall(SVD); + /* 使能欠压中断 */ + FL_SVD_EnableIT_PowerFall(SVD); + + /* 清除过压标志 */ + FL_SVD_ClearFlag_PowerRise(SVD); + /* 使能过压中断 */ + FL_SVD_EnableIT_PowerRise(SVD); + + InterruptConfigStruct.preemptPriority = NVIC_PRIORITY_SVD; //优先级改为最高 + FL_NVIC_Init(&InterruptConfigStruct, SVD_IRQn); + + FL_SVD_Enable(SVD); +} + + + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +----------------------------------------------------------------------------*/ +void svd_task(void) +{ + //SVD锁存判断 + if(FL_RESET == FL_SVD_GetLatchedPowerStatus(SVD)) // SVD内部滤波后的电压检测标志，仅在使能数字滤波时有意义；软件避免写此寄存器。 + { + // SVD检测到欠压 + // ... + } + #if 0 + if(SVDState == SPOWEROFF) + { + // SVD检测到欠压 + } + else + { + // SVD检测到欠压恢复 + } + #endif +} + + + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : SVD中断配置 +----------------------------------------------------------------------------*/ +void SVD_Interrupt_Init(void) +{ + FL_NVIC_ConfigTypeDef InterruptConfigStruct; + + /* 使能过压和欠压中断 */ + FL_SVD_ClearFlag_PowerRise(SVD); + FL_SVD_ClearFlag_PowerFall(SVD); + FL_SVD_EnableIT_PowerRise(SVD); + FL_SVD_EnableIT_PowerFall(SVD); + + /* 配置NVIC中断 */ + InterruptConfigStruct.preemptPriority = NVIC_PRIORITY_SVD; + FL_NVIC_Init(&InterruptConfigStruct, SVD_IRQn); + + /* 基于SVD监测结果初始赋值 */ + /* 注意：如果有使能数字滤波，应使用SVDR查询；如未使能数字滤波，应使用SVDO查询 */ + //eSVDResult = SVD_SVDO_POLL(); +} + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : SVD中断反初始化 +----------------------------------------------------------------------------*/ + +void SVD_Interrupt_DeInit(void) +{ + /* 禁能过压和欠压中断 */ + FL_SVD_ClearFlag_PowerRise(SVD); + FL_SVD_ClearFlag_PowerFall(SVD); + FL_SVD_DisableIT_PowerRise(SVD); + FL_SVD_DisableIT_PowerFall(SVD); + + /* 清除NVIC Pending位 */ + NVIC_ClearPendingIRQ(SVD_IRQn); + /* 禁能NVIC中断 */ + NVIC_DisableIRQ(SVD_IRQn); +} + + + + diff --git a/code_app_out/Source/bsp/svd.h b/code_app_out/Source/bsp/svd.h new file mode 100644 index 0000000..23500f7 --- /dev/null +++ b/code_app_out/Source/bsp/svd.h @@ -0,0 +1,62 @@ +/** ########################################################################## +** Filename : +** Project : +** Module : +** Processor : +** Version : +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20230602- --V1.0-- --mingyea--- --޸-- + +** #########################################################################*/ +#ifndef SVD_H__ +#define SVD_H__ + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ +#include "fm33lg0xx_fl.h" + + +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ +#define SPOWERON 0u +#define SPOWEROFF 1u + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- G L O B A L V A R I A B L E S +- only configuration table allowed here,variables are not allowed! +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ + +void svd_init(void); +void svd_task(void); +void SVD_Interrupt_Init(void); +void SVD_Interrupt_DeInit(void); + + +#endif diff --git a/code_app_out/Source/bsp/svd_cfg.c b/code_app_out/Source/bsp/svd_cfg.c new file mode 100644 index 0000000..b3088c2 --- /dev/null +++ b/code_app_out/Source/bsp/svd_cfg.c @@ -0,0 +1,92 @@ +/** ########################################################################## +** Filename : +** Project : +** Module : +** Processor : +** Version : 1.0 +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20230602- --V1.0-- --mingyea--- --修改-- + +** #########################################################################*/ + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ + +#include "common_types.h" +#include "common_cfg.h" +#include "svd.h" + +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- S T A T I C V A R I A B L E S +----------------------------------------------------------------------------*/ +u8 SVDState = SPOWERON; //svd检测状态 + + +/*--------------------------------------------------------------------------- +* G L O B A L V A R I A B L E S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : SVD中断 +----------------------------------------------------------------------------*/ +void SVD_IRQHandler(void) +{ + if(FL_SET == FL_SVD_IsActiveFlag_PowerFall(SVD)) //欠压中断 + { + FL_SVD_ClearFlag_PowerFall(SVD); + SVDState = SPOWEROFF; + SystemSoftwareReset(); + } + else if(FL_SET == FL_SVD_IsActiveFlag_PowerRise(SVD)) //欠压恢复中断 + { + FL_SVD_ClearFlag_PowerRise(SVD); + SVDState = SPOWERON; + SystemSoftwareReset(); + } + else + { + // + } +} + + + + diff --git a/code_app_out/Source/bsp/svd_cfg.h b/code_app_out/Source/bsp/svd_cfg.h new file mode 100644 index 0000000..050c05d --- /dev/null +++ b/code_app_out/Source/bsp/svd_cfg.h @@ -0,0 +1,58 @@ +/** ########################################################################## +** Filename : +** Project : +** Module : +** Processor : +** Version : 1.0 +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20230602- --V1.0-- --mingyea--- --޸-- + +** #########################################################################*/ +#ifndef SVD_CFG_H__ +#define SVD_CFG_H__ + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ +#include "fm33lg0xx_fl.h" + +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- G L O B A L V A R I A B L E S +- only configuration table allowed here,variables are not allowed! +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ + + + + + + +#endif diff --git a/code_app_out/Source/bsp/tim.c b/code_app_out/Source/bsp/tim.c new file mode 100644 index 0000000..4e1ff6d --- /dev/null +++ b/code_app_out/Source/bsp/tim.c @@ -0,0 +1,370 @@ +/** ########################################################################## +** Filename : +** Project : +** Module : +** Processor : +** Version : +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20230602- --V1.0-- --mingyea--- --修改-- + +** #########################################################################*/ + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ +#include "tim.h" +#include "cpu.h" +#include "nvic.h" +#include "pwm_manage.h" + +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ +typedef struct +{ + u8 state; + u16 pwm_duty; +}tim_s; + +/*--------------------------------------------------------------------------- +- S T A T I C V A R I A B L E S +----------------------------------------------------------------------------*/ +static tim_s g_tim; + + +/*--------------------------------------------------------------------------- +* G L O B A L V A R I A B L E S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ + + + +#ifdef FL_ATIM_ENABLE +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +----------------------------------------------------------------------------*/ +static void atim_init(void) +{ + FL_ATIM_Init(ATIM, (FL_ATIM_InitTypeDef*)&g_atimer0_Config0); + + FL_ATIM_ClearFlag_Update(ATIM); /* 清除计数器中断标志位 */ + //FL_ATIM_EnableIT_Update(ATIM); /* 开启计数器中断 */ + + pwm_manage_atm_init(); + + FL_ATIM_Enable(ATIM); /* 使能定时器 */ + //FL_ATIM_EnableALLOutput(ATIM);/* 主控输出使能 */ + //FL_ATIM_OC_EnableChannel(ATIM,FL_ATIM_CHANNEL_2); + //FL_ATIM_OC_DisableChannel(ATIM,FL_ATIM_CHANNEL_2); + +} +#endif + + + +#ifdef FL_BSTIM16_ENABLE +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +----------------------------------------------------------------------------*/ +static void bstim16_init(void) +{ + FL_BSTIM16_Init(BSTIM16, (FL_BSTIM16_InitTypeDef*)&g_TimerBase_InitStruct); + + FL_BSTIM16_ClearFlag_Update(BSTIM16); /* 清除计数器中断标志位 */ + FL_BSTIM16_EnableIT_Update(BSTIM16); /* 开启计数器中断 */ + + NVIC_ClearPendingIRQ(BSTIM_IRQn); + NVIC_DisableIRQ(BSTIM_IRQn); + NVIC_SetPriority(BSTIM_IRQn, NVIC_PRIORITY_TIM); //中断优先级配置 + NVIC_EnableIRQ(BSTIM_IRQn); + + FL_BSTIM16_Enable(BSTIM16); /* 使能定时器 */ +} +#endif + +#ifdef FL_GPTIM_ENABLE +/*--------------------------------------------------------------------------- +|Prototype :初始化 +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +----------------------------------------------------------------------------*/ +void gptim_init(void) +{ + FL_GPTIM_Init(GPTIM0, (FL_GPTIM_InitTypeDef*)&g_gptim_init_cfg); + + pwm_manage_gptm0_init(); + + FL_GPTIM_Enable(GPTIM0); /* 使能定时器 */ + +} +#endif + +#ifdef FL_GPTIM1_ENABLE +/*--------------------------------------------------------------------------- +|Prototype :初始化 +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +----------------------------------------------------------------------------*/ +void gptim1_init(void) +{ + FL_GPTIM_Init(GPTIM1, (FL_GPTIM_InitTypeDef*)&g_gptim1_init_cfg); + pwm_manage_gptm1_init(); + FL_GPTIM_Enable(GPTIM1); /* 使能定时器 */ + +} +#endif + + +#ifdef FL_GPTIM2_ENABLE +/*--------------------------------------------------------------------------- +|Prototype :初始化 +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +----------------------------------------------------------------------------*/ +void gptim2_init(void) +{ + FL_GPTIM_Init(GPTIM2, (FL_GPTIM_InitTypeDef*)&g_gptim2_init_cfg); + pwm_manage_gptm2_init(); + FL_GPTIM_Enable(GPTIM2); /* 使能定时器 */ + +} +#endif + +#ifdef FL_LPTIM16_ENABLE +/*--------------------------------------------------------------------------- +|Prototype : 初始化 +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +----------------------------------------------------------------------------*/ +void lptim16_init(void) +{ + FL_LPTIM16_StructInit((FL_LPTIM16_InitTypeDef*)&g_lptim16_cfg_tab); + FL_LPTIM16_Init(LPTIM16, (FL_LPTIM16_InitTypeDef*)&g_lptim16_cfg_tab); + /*---------------- 中断配置 ----------------*/ + /* 清除标志 */ + FL_LPTIM16_ClearFlag_Update(LPTIM16); + + /* 中断使能 */ + FL_LPTIM16_EnableIT_Update(LPTIM16); + + /* 使能并配置NVIC */ + NVIC_ClearPendingIRQ(LPTIMx_IRQn); + NVIC_DisableIRQ(LPTIMx_IRQn); + NVIC_SetPriority(LPTIMx_IRQn, NVIC_PRIORITY_RTC); //中断优先级配置 + NVIC_EnableIRQ(LPTIMx_IRQn); + /*---------------------------------------------*/ + + /* 使能LPTIM16 */ + FL_LPTIM16_Enable(LPTIM16); +} + + +#endif + + +#ifdef FL_LPTIM32_ENABLE +/*--------------------------------------------------------------------------- +|Prototype : 初始化 +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +----------------------------------------------------------------------------*/ +void lptim32_init(void) +{ + /*---------------- 定时器时间基准配置 ----------------*/ + FL_LPTIM32_StructInit((FL_LPTIM32_InitTypeDef*)&g_lptim32_cfg_tab); + + FL_LPTIM32_Init(LPTIM32, (FL_LPTIM32_InitTypeDef*)&g_lptim32_cfg_tab); + + /*---------------------------------------------*/ + + /*---------------- 中断配置 ----------------*/ + /* 清除标志 */ + FL_LPTIM32_ClearFlag_Update(LPTIM32); + + + + pwm_manage_lpt32_init(); + /*---------------------------------------------*/ + + /* 使能LPTIM32 */ + FL_LPTIM32_Enable(LPTIM32); + +} + + +#endif + + +/*--------------------------------------------------------------------------- +|Prototype : 初始化 +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +----------------------------------------------------------------------------*/ +void tim_init(void) +{ + g_tim.state =0u; + g_tim.pwm_duty =500u; + + #ifdef FL_BSTIM16_ENABLE + bstim16_init(); + #endif + + #ifdef FL_LPTIM16_ENABLE + //lptim16_init(); + #endif + + #ifdef FL_LPTIM32_ENABLE + lptim32_init(); + #endif + + #ifdef FL_ATIM_ENABLE + atim_init(); + #endif + + #ifdef FL_GPTIM_ENABLE + gptim_init(); + #endif + + #ifdef FL_GPTIM1_ENABLE + gptim1_init(); + #endif + + #ifdef FL_GPTIM2_ENABLE + gptim2_init(); + #endif +} + + +/*--------------------------------------------------------------------------- +|Prototype : 反初始化 +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +----------------------------------------------------------------------------*/ +void tim_de_init(void) +{ + #ifdef FL_ATIM_ENABLE + FL_ATIM_DeInit(ATIM); + #endif + + #ifdef FL_BSTIM16_ENABLE + FL_BSTIM16_DeInit(BSTIM16); + #endif + + #ifdef FL_GPTIM0_ENABLE + FL_GPTIM_DeInit(GPTIM0); + #endif + + #ifdef FL_GPTIM1_ENABLE + FL_GPTIM_DeInit(GPTIM1); + #endif + + #ifdef FL_GPTIM2_ENABLE + FL_GPTIM_DeInit(GPTIM2); + #endif + + #ifdef FL_LPTIM32_ENABLE + FL_LPTIM32_DeInit(LPTIM32); + #endif + + //留着LPTIM16不反初始，是给间歇唤醒用的； + +} + + + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : 任务， 测试用 +----------------------------------------------------------------------------*/ +void tim_task(void) +{ + if(g_tim.state==1u) + { + //#ifdef FL_ATIM_PWM_EN + //FL_ATIM_WriteCompareCH2(ATIM,g_tim.pwm_duty); //B6 + //#endif + #ifdef FL_GPTIM_ENABLE + FL_GPTIM_WriteCompareCH2(GPTIM0,g_tim.pwm_duty); //B6 + #endif + } +} + + + + + + + + + + diff --git a/code_app_out/Source/bsp/tim.h b/code_app_out/Source/bsp/tim.h new file mode 100644 index 0000000..02e4dac --- /dev/null +++ b/code_app_out/Source/bsp/tim.h @@ -0,0 +1,80 @@ +/** ########################################################################## +** Filename : +** Project : +** Module : +** Processor : +** Version : 1.0 +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20230602- --V1.0-- --mingyea--- --修改-- + +** #########################################################################*/ + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ +#ifndef TIM_H__ +#define TIM_H__ + + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ +#include "common_types.h" +#include "tim_cfg.h" + +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- S T A T I C V A R I A B L E S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +* G L O B A L V A R I A B L E S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ + +void tim_init(void); +void tim_task(void); +void tim_de_init(void); + +#ifdef FL_LPTIM16_ENABLE +void lptim16_init(void); +#endif + + +#endif /* __APP_TIM_H__ */ + + + + + + diff --git a/code_app_out/Source/bsp/tim_cfg.c b/code_app_out/Source/bsp/tim_cfg.c new file mode 100644 index 0000000..dae9c48 --- /dev/null +++ b/code_app_out/Source/bsp/tim_cfg.c @@ -0,0 +1,504 @@ +/** ########################################################################## +** Filename : +** Project : +** Module : +** Processor : +** Version : 1.0 +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20230602- --V1.0-- --mingyea--- --修改-- + +** #########################################################################*/ + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ +#include "common_cfg.h" +#include "cpu.h" +#include "tim.h" +#include "gpio.h" +#include "low_power_app.h" +#include "logic_timer.h" +#include "random_pseudo.h" +#include "key_app.h" +#include "pwm_manage.h" +#include "SimpleOs_Time.h" +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ + +typedef struct +{ + u8 state; + #ifdef TIM_CFG_DEBUG_DISP_EN + u16 count[8]; + #endif +}tim_cfg_s; + + +/*--------------------------------------------------------------------------- +- S T A T I C V A R I A B L E S +----------------------------------------------------------------------------*/ +tim_cfg_s g_tim_cfg = {0u}; + + +/*--------------------------------------------------------------------------- +* G L O B A L V A R I A B L E S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ +#ifdef FL_ATIM_ENABLE +const FL_ATIM_InitTypeDef g_atimer0_Config0 = +{ + FL_CMU_ATIM_CLK_SOURCE_APBCLK, /* 时钟源选择APB2 */ + 48u-1u, /* 分频系数8000 */ // 479 48MHZ/480= + FL_ATIM_COUNTER_DIR_UP, /* 向上计数 */ + FL_ATIM_PWM_FREQ-1u, /* 自动重装载值1000 */ // 1 / (48MHZ/480) * 100 = 0.001 s + FL_ENABLE, /* 自动重装载禁止preload */ + FL_ATIM_CLK_DIVISION_DIV1, /* 死区和滤波设置 */ /*! 定时器分频系数与数字滤波器所使用的采样时钟分频比 */ + 0u, /* 重复计数 */ +}; + +const FL_ATIM_OC_InitTypeDef g_atmer0_ch1_InitStructer = +{ + FL_ATIM_OC_MODE_PWM1, /*! OCMode 比较输出模式 */ + FL_ENABLE, /*! OCState 正向比较通道输出使能 */ + FL_DISABLE, /*! OCNState 比较互补通道输出使能 */ + FL_ATIM_OC_POLARITY_NORMAL, /*! OCPolarity 比较输出极性 */ + FL_ATIM_OC_POLARITY_NORMAL, /*! OCNPolarity 比较互补输出极性 */ + FL_DISABLE, /*! OCFastMode 比较输出通道快速模式使能 */ + FL_DISABLE, /*! OCPreload 输出比较预装载 */ + FL_ATIM_PWM_DUTY_INIT, /*! compareValue 通道比较值 */ + FL_ATIM_OC_IDLE_STATE_HIGH, /*! OCIdleState 输出空闲状态电平 */ + FL_DISABLE, /*! OCETRFStatus ETR清0使能 */ + FL_ATIM_OCN_IDLE_STATE_HIGH, /*! OCNIdleState 互补输出空闲状态电平 */ +}; + +const FL_ATIM_OC_InitTypeDef g_atmer0_ch2_InitStructer = +{ + FL_ATIM_OC_MODE_PWM1, /*! OCMode 比较输出模式 */ + FL_ENABLE, /*! OCState 正向比较通道输出使能 */ + FL_DISABLE, /*! OCNState 比较互补通道输出使能 */ + FL_ATIM_OC_POLARITY_NORMAL, /*! OCPolarity 比较输出极性 */ + FL_ATIM_OC_POLARITY_NORMAL, /*! OCNPolarity 比较互补输出极性 */ + FL_DISABLE, /*! OCFastMode 比较输出通道快速模式使能 */ + FL_DISABLE, /*! OCPreload 输出比较预装载 */ + FL_ATIM_PWM_DUTY_INIT, /*! compareValue 通道比较值 */ + FL_ATIM_OC_IDLE_STATE_HIGH, /*! OCIdleState 输出空闲状态电平 */ + FL_DISABLE, /*! OCETRFStatus ETR清0使能 */ + FL_ATIM_OCN_IDLE_STATE_HIGH, /*! OCNIdleState 互补输出空闲状态电平 */ +}; + +const FL_ATIM_OC_InitTypeDef g_atmer0_ch3_InitStructer = +{ + FL_ATIM_OC_MODE_PWM1, /*! OCMode 比较输出模式 */ + FL_ENABLE, /*! OCState 正向比较通道输出使能 */ + FL_DISABLE, /*! OCNState 比较互补通道输出使能 */ + FL_ATIM_OC_POLARITY_NORMAL, /*! OCPolarity 比较输出极性 */ + FL_ATIM_OC_POLARITY_NORMAL, /*! OCNPolarity 比较互补输出极性 */ + FL_DISABLE, /*! OCFastMode 比较输出通道快速模式使能 */ + FL_DISABLE, /*! OCPreload 输出比较预装载 */ + FL_ATIM_PWM_DUTY_INIT, /*! compareValue 通道比较值 */ + FL_ATIM_OC_IDLE_STATE_HIGH, /*! OCIdleState 输出空闲状态电平 */ + FL_DISABLE, /*! OCETRFStatus ETR清0使能 */ + FL_ATIM_OCN_IDLE_STATE_HIGH, /*! OCNIdleState 互补输出空闲状态电平 */ +}; + +const FL_ATIM_OC_InitTypeDef g_atmer0_ch4_InitStructer = +{ + FL_ATIM_OC_MODE_PWM1, /*! OCMode 比较输出模式 */ + FL_ENABLE, /*! OCState 正向比较通道输出使能 */ + FL_DISABLE, /*! OCNState 比较互补通道输出使能 */ + FL_ATIM_OC_POLARITY_NORMAL, /*! OCPolarity 比较输出极性 */ + FL_ATIM_OC_POLARITY_NORMAL, /*! OCNPolarity 比较互补输出极性 */ + FL_DISABLE, /*! OCFastMode 比较输出通道快速模式使能 */ + FL_DISABLE, /*! OCPreload 输出比较预装载 */ + FL_ATIM_PWM_DUTY_INIT, /*! compareValue 通道比较值 */ + FL_ATIM_OC_IDLE_STATE_HIGH, /*! OCIdleState 输出空闲状态电平 */ + FL_DISABLE, /*! OCETRFStatus ETR清0使能 */ + FL_ATIM_OCN_IDLE_STATE_HIGH, /*! OCNIdleState 互补输出空闲状态电平 */ +}; + + +const FL_ATIM_BDTR_InitTypeDef g_atimer0_bdtr_config= +{ + FL_ATIM_OSSR_DISABLE, /*! OSSRState 运行状态下的输出关闭状态 */ + FL_ATIM_OSSI_DISABLE, /*! OSSIState 空闲状态下的输出关闭状态 */ + FL_ATIM_LOCK_LEVEL_OFF, /*! lockLevel 寄存器写保护等级 */ + 100u, /*! deadTime 死区时间 */ + FL_DISABLE, /*! breakState 刹车使能 */ + FL_ATIM_BREAK_FILTER_DIV1, /*! breakFilter 刹车信号滤波 */ + FL_ATIM_BREAK_POLARITY_HIGH, /*! breakPolarity 刹车信号极性 */ + FL_DISABLE, /*! automaticOutput 刹车后计数器重装后自动输出使能*/ + FL_ATIM_BREAK1_GATE_AUTO, /*! gatedBrakeSignal_1 刹车信号1门控 */ + FL_ATIM_BREAK2_GATE_AUTO, /*! gatedBrakeSignal_2 刹车信号2门控 */ + FL_ATIM_BREAK_COMBINATION_OR, /*! brakeSignalCombined 两路刹车信号控制逻辑 */ +}; +#endif + + +#ifdef FL_BSTIM16_ENABLE +const FL_BSTIM16_InitTypeDef g_TimerBase_InitStruct = +{ + 479u, + 99u, // 1 / (48MHZ/480M) * 100 = 0.001 s + FL_ENABLE, + FL_CMU_BSTIM16_CLK_SOURCE_APBCLK, +}; +#endif + +#ifdef FL_GPTIM_ENABLE +/** + * + */ +const FL_GPTIM_InitTypeDef g_gptim_init_cfg = +{ + 4800u - 1u, /* 分频系数48000 */ + FL_GPTIM_COUNTER_DIR_UP, /* 向上计数 */ + FL_GPTIM_PWM_FREQ - 1u, /* 自动重装载值1000 */ + FL_ENABLE, /* 预装载preload使能 */ + FL_GPTIM_CLK_DIVISION_DIV1, /* 死区和滤波分频 */ +}; + +const FL_GPTIM_OC_InitTypeDef g_gptim_ch1_cfg = +{ + FL_GPTIM_OC_MODE_PWM1, /* 输出比较模式PWM1 */ + FL_DISABLE, /* 关闭快速使能 */ + FL_DISABLE, /* OC preload 无效 */ + FL_GPTIM_PWM_DUTY_VALID, /* 比较值500 */ + FL_GPTIM_OC_POLARITY_NORMAL, /* OC正常输出 */ + FL_DISABLE, /* OC1REF不受ETR影响 */ +}; + +const FL_GPTIM_OC_InitTypeDef g_gptim_ch2_cfg = +{ + FL_GPTIM_OC_MODE_PWM1, /* 输出比较模式PWM1 */ + FL_DISABLE, /* 关闭快速使能 */ + FL_DISABLE, /* OC preload 无效 */ + FL_GPTIM_PWM_DUTY_VALID, /* 比较值500 */ + FL_GPTIM_OC_POLARITY_NORMAL, /* OC正常输出 */ + FL_DISABLE, /* OC1REF不受ETR影响 */ +}; + +const FL_GPTIM_OC_InitTypeDef g_gptim_ch3_cfg = +{ + FL_GPTIM_OC_MODE_PWM1, /* 输出比较模式PWM1 */ + FL_DISABLE, /* 关闭快速使能 */ + FL_DISABLE, /* OC preload 无效 */ + FL_GPTIM_PWM_DUTY_VALID, /* 比较值500 */ + FL_GPTIM_OC_POLARITY_NORMAL, /* OC正常输出 */ + FL_DISABLE, /* OC1REF不受ETR影响 */ +}; + +const FL_GPTIM_OC_InitTypeDef g_gptim_ch4_cfg = +{ + FL_GPTIM_OC_MODE_PWM1, /* 输出比较模式PWM1 */ + FL_DISABLE, /* 关闭快速使能 */ + FL_DISABLE, /* OC preload 无效 */ + FL_GPTIM_PWM_DUTY_VALID, /* 比较值500 */ + FL_GPTIM_OC_POLARITY_NORMAL, /* OC正常输出 */ + FL_DISABLE, /* OC1REF不受ETR影响 */ +}; + +#endif + +#ifdef FL_GPTIM1_ENABLE + +const FL_GPTIM_InitTypeDef g_gptim1_init_cfg = +{ + 48u - 1u, /* 分频系数48000 */ + FL_GPTIM_COUNTER_DIR_UP, /* 向上计数 */ + FL_GPTIM1_PWM_FREQ - 1u, /* 自动重装载值1000 */ + FL_ENABLE, /* 预装载preload使能 */ + FL_GPTIM_CLK_DIVISION_DIV1, /* 死区和滤波分频 */ +}; + +const FL_GPTIM_OC_InitTypeDef g_gptim1_ch1_cfg = +{ + FL_GPTIM_OC_MODE_PWM1, /* 输出比较模式PWM1 */ + FL_DISABLE, /* 关闭快速使能 */ + FL_DISABLE, /* OC preload 无效 */ + FL_GPTIM1_PWM_DUTY_VALID, /* 比较值500 */ + FL_GPTIM_OC_POLARITY_NORMAL, /* OC正常输出 */ + FL_DISABLE, /* OC1REF不受ETR影响 */ +}; + +const FL_GPTIM_OC_InitTypeDef g_gptim1_ch2_cfg = +{ + FL_GPTIM_OC_MODE_PWM1, /* 输出比较模式PWM1 */ + FL_DISABLE, /* 关闭快速使能 */ + FL_DISABLE, /* OC preload 无效 */ + FL_GPTIM1_PWM_DUTY_VALID, /* 比较值500 */ + FL_GPTIM_OC_POLARITY_NORMAL, /* OC正常输出 */ + FL_DISABLE, /* OC1REF不受ETR影响 */ +}; + +const FL_GPTIM_OC_InitTypeDef g_gptim1_ch3_cfg = +{ + FL_GPTIM_OC_MODE_PWM1, /* 输出比较模式PWM1 */ + FL_DISABLE, /* 关闭快速使能 */ + FL_DISABLE, /* OC preload 无效 */ + FL_GPTIM1_PWM_DUTY_VALID, /* 比较值500 */ + FL_GPTIM_OC_POLARITY_NORMAL, /* OC正常输出 */ + FL_DISABLE, /* OC1REF不受ETR影响 */ +}; + +const FL_GPTIM_OC_InitTypeDef g_gptim1_ch4_cfg = +{ + FL_GPTIM_OC_MODE_PWM1, /* 输出比较模式PWM1 */ + FL_DISABLE, /* 关闭快速使能 */ + FL_DISABLE, /* OC preload 无效 */ + FL_GPTIM1_PWM_DUTY_VALID, /* 比较值500 */ + FL_GPTIM_OC_POLARITY_NORMAL, /* OC正常输出 */ + FL_DISABLE, /* OC1REF不受ETR影响 */ +}; + +#endif + + +#ifdef FL_GPTIM2_ENABLE + +const FL_GPTIM_InitTypeDef g_gptim2_init_cfg = +{ + 48u - 1u, /* 分频系数48000 */ + FL_GPTIM_COUNTER_DIR_UP, /* 向上计数 */ + FL_GPTIM2_PWM_FREQ - 1u, /* 自动重装载值1000 */ + FL_ENABLE, /* 预装载preload使能 */ + FL_GPTIM_CLK_DIVISION_DIV1, /* 死区和滤波分频 */ +}; + +const FL_GPTIM_OC_InitTypeDef g_gptim2_ch1_cfg = +{ + FL_GPTIM_OC_MODE_PWM1, /* 输出比较模式PWM1 */ + FL_DISABLE, /* 关闭快速使能 */ + FL_DISABLE, /* OC preload 无效 */ + FL_GPTIM2_PWM_DUTY_VALID, /* 比较值500 */ + FL_GPTIM_OC_POLARITY_NORMAL, /* OC正常输出 */ + FL_DISABLE, /* OC1REF不受ETR影响 */ +}; + +const FL_GPTIM_OC_InitTypeDef g_gptim2_ch2_cfg = +{ + FL_GPTIM_OC_MODE_PWM1, /* 输出比较模式PWM1 */ + FL_DISABLE, /* 关闭快速使能 */ + FL_DISABLE, /* OC preload 无效 */ + FL_GPTIM2_PWM_DUTY_VALID, /* 比较值500 */ + FL_GPTIM_OC_POLARITY_NORMAL, /* OC正常输出 */ + FL_DISABLE, /* OC1REF不受ETR影响 */ +}; + +const FL_GPTIM_OC_InitTypeDef g_gptim2_ch3_cfg = +{ + FL_GPTIM_OC_MODE_PWM1, /* 输出比较模式PWM1 */ + FL_DISABLE, /* 关闭快速使能 */ + FL_DISABLE, /* OC preload 无效 */ + FL_GPTIM2_PWM_DUTY_VALID, /* 比较值500 */ + FL_GPTIM_OC_POLARITY_NORMAL, /* OC正常输出 */ + FL_DISABLE, /* OC1REF不受ETR影响 */ +}; + +const FL_GPTIM_OC_InitTypeDef g_gptim2_ch4_cfg = +{ + FL_GPTIM_OC_MODE_PWM1, /* 输出比较模式PWM1 */ + FL_DISABLE, /* 关闭快速使能 */ + FL_DISABLE, /* OC preload 无效 */ + FL_GPTIM2_PWM_DUTY_VALID, /* 比较值500 */ + FL_GPTIM_OC_POLARITY_NORMAL, /* OC正常输出 */ + FL_DISABLE, /* OC1REF不受ETR影响 */ +}; + +#endif + + +#ifdef FL_LPTIM16_ENABLE +const FL_LPTIM16_InitTypeDef g_lptim16_cfg_tab = +{ + FL_CMU_LPTIM16_CLK_SOURCE_RCLP, /* 内部时钟源 */ + FL_LPTIM16_CLK_SOURCE_INTERNAL, /* 预分频器的时钟源 可选择内部时钟, 也可选择外部时钟 */ + FL_LPTIM16_PSC_DIV32, /* 预分频系数 */ + 200 - 1, /* 重装值 */ //200ms 做为间隙唤醒 + FL_LPTIM16_OPERATION_MODE_NORMAL, /* 定时器工作模式选择 */ + FL_LPTIM16_ENCODER_MODE_DISABLE, /* 定时器编码器模式 */ + FL_LPTIM16_ONE_PULSE_MODE_CONTINUOUS, /* 单次计数使能 */ + FL_LPTIM16_ETR_COUNT_EDGE_RISING, /* ETR异步计数边沿 */ + FL_LPTIM16_ETR_TRIGGER_EDGE_RISING, /* ETR触发计数边沿 */ +}; +#endif + +#ifdef FL_LPTIM32_ENABLE +const FL_LPTIM32_InitTypeDef g_lptim32_cfg_tab = +{ + FL_CMU_LPTIM32_CLK_SOURCE_APBCLK, /* 内部时钟源 */ + FL_LPTIM32_CLK_SOURCE_INTERNAL, /* 预分频器的时钟源 可选择内部时钟, 也可选择外部时钟 */ + FL_LPTIM32_PSC_DIV16, /* 预分频系数 */ + FL_LPT32_PWM_FREQ - 1, /* 重装值 */ //3000*200 - 1 是 200ms + FL_LPTIM32_OPERATION_MODE_NORMAL, /* 定时器工作模式选择 */ + FL_LPTIM32_ONE_PULSE_MODE_CONTINUOUS, /* 单次计数使能 */ + FL_LPTIM32_ETR_COUNT_EDGE_RISING, /* ETR异步计数边沿 */ + FL_LPTIM32_ETR_TRIGGER_EDGE_RISING, /* ETR触发计数边沿 */ +}; + +// +const FL_LPTIM32_OC_InitTypeDef g_lpt32_ch1_cfg = +{ + 0u, /* 比较值 */ + FL_LPTIM32_OC_POLARITY_INVERT, //输出极性 +}; + +// +const FL_LPTIM32_OC_InitTypeDef g_lpt32_ch2_cfg = +{ + 0u, /* 比较值 */ + FL_LPTIM32_OC_POLARITY_INVERT, //输出极性 +}; + +// +const FL_LPTIM32_OC_InitTypeDef g_lpt32_ch3_cfg = +{ + 0u, /* 比较值 */ + FL_LPTIM32_OC_POLARITY_INVERT, //输出极性 +}; + +// +const FL_LPTIM32_OC_InitTypeDef g_lpt32_ch4_cfg = +{ + 0u, /* 比较值 */ + FL_LPTIM32_OC_POLARITY_INVERT, //输出极性 +}; + + +#endif + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ + + + +#ifdef FL_ATIM_ENABLE +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : ATIM中断函数 +----------------------------------------------------------------------------*/ +void ATIM_IRQHandler() +{ + if(FL_ATIM_IsEnabledIT_Update(ATIM) && FL_ATIM_IsActiveFlag_Update(ATIM)) + { + FL_ATIM_ClearFlag_Update(ATIM); + + /* 处理更新事件 */ + //logic_time_tick_count(); + #ifdef TIM_CFG_DEBUG_DISP_EN + g_tim_cfg.count[0]++; + if(g_tim_cfg.count[0]>=1000u) + { + g_tim_cfg.count[0]=0u; + g_tim_cfg.count[1]++; + } + #endif + //random_input_count(); + //TEST1_TOGGLE(); + } +} +#endif + +#ifdef FL_BSTIM16_ENABLE + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : BSTIM中断服务函数 +----------------------------------------------------------------------------*/ +void BSTIM_IRQHandler(void) +{ + if(FL_BSTIM16_IsEnabledIT_Update(BSTIM16) && FL_BSTIM16_IsActiveFlag_Update(BSTIM16)) + { + FL_BSTIM16_ClearFlag_Update(BSTIM16); + logic_timer_tick_count(); + SimpleOsTime_Callback(); + /* 用户代码，处理更新事件 */ + random_input_count(); + //TEST1_TOGGLE(); + } +} + +#endif + + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : LPTIM中断函数 +----------------------------------------------------------------------------*/ +void LPTIM_IRQHandler(void) +{ + #ifdef FL_LPTIM16_ENABLE + + /* 定时器溢出时翻转LED0 */ + if(FL_LPTIM16_IsActiveFlag_Update(LPTIM16)) + { + FL_LPTIM16_ClearFlag_Update(LPTIM16); + + (void)lp_tim16_wakeup_flag_set(); + /* LED0_TOG(); */ + #ifdef TIM_CFG_DEBUG_DISP_EN + g_tim_cfg.count[4]++; + if(g_tim_cfg.count[4]>=5u) + { + g_tim_cfg.count[4]=0u; + g_tim_cfg.count[5]++; + } + #endif + } + #endif + #ifdef FL_LPTIM32_ENABLE + /* 定时器溢出时翻转LED */ + if(FL_LPTIM32_IsEnabledIT_Update(LPTIM32) && FL_LPTIM32_IsActiveFlag_Update(LPTIM32)) + { + /* LED0_TOG(); */ + FL_LPTIM32_ClearFlag_Update(LPTIM32); + #ifdef TIM_CFG_DEBUG_DISP_EN + g_tim_cfg.count[6]++; + if(g_tim_cfg.count[6]>=1000u) + { + g_tim_cfg.count[6]=0u; + g_tim_cfg.count[7]++; + } + #endif + } + #endif +} + + + diff --git a/code_app_out/Source/bsp/tim_cfg.h b/code_app_out/Source/bsp/tim_cfg.h new file mode 100644 index 0000000..d25d63b --- /dev/null +++ b/code_app_out/Source/bsp/tim_cfg.h @@ -0,0 +1,155 @@ +/** ########################################################################## +** Filename : +** Project : +** Module : +** Processor : +** Version : 1.0 +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20230602- --V1.0-- --mingyea--- --修改-- + +** #########################################################################*/ +#ifndef TIM_CFG_H__ +#define TIM_CFG_H__ + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ +#include "common_types.h" +#include "cpu.h" + +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ +#define TIME_CRITICAL_ENTER() System_DisableIrqGlobal() +#define TIME_CRITICAL_EXIT() System_EnableIrqGlobal() + +/*****************普通定時器*******************/ + +#define FL_ATIM_ENABLE // ATIM定时器 +#define FL_BSTIM16_ENABLE //BSTIM16定时器 +#define FL_GPTIM_ENABLE //GPTIM定时器 +#define FL_GPTIM1_ENABLE //GPTIM定时器 +//#define FL_GPTIM2_ENABLE //GPTIM定时器 +#define FL_LPTIM16_ENABLE //LPTIM16定时器---主要用做间隙唤醒 +//#define FL_LPTIM32_ENABLE //LPTIM16定时器 + +#define FL_ATIM_PWM_FREQ 1000u //频率 +#define FL_ATIM_PWM_DUTY_VALID 250u //有效占空比 +#define FL_ATIM_PWM_DUTY_INIT 0u //有效占空比--初始值 + +#define FL_GPTIM_PWM_FREQ 10000u //频率 +#define FL_GPTIM_PWM_DUTY_VALID 250u //有效占空比 + +#define FL_GPTIM1_PWM_FREQ 1000u //频率 +#define FL_GPTIM1_PWM_DUTY_VALID 250u //有效占空比 + +#define FL_GPTIM2_PWM_FREQ 1000u //频率 +#define FL_GPTIM2_PWM_DUTY_VALID 250u //有效占空比 + +#define FL_LPT32_PWM_FREQ 3000u //频率 是1k +#define FL_LPT32_PWM_DUTY_VALID 250u //有效占空比 + + +#define TIM_CFG_DEBUG_DISP_EN //辅助调试 + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- G L O B A L V A R I A B L E S +- only configuration table allowed here,variables are not allowed! +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ +#ifdef FL_ATIM_ENABLE +extern const FL_ATIM_InitTypeDef g_atimer0_Config0 ; +extern const FL_ATIM_OC_InitTypeDef g_atmer0_ch1_InitStructer ; +extern const FL_ATIM_OC_InitTypeDef g_atmer0_ch2_InitStructer ; +extern const FL_ATIM_OC_InitTypeDef g_atmer0_ch3_InitStructer ; +extern const FL_ATIM_OC_InitTypeDef g_atmer0_ch4_InitStructer ; +extern const FL_ATIM_BDTR_InitTypeDef g_atimer0_bdtr_config; +#endif + + + +#ifdef FL_BSTIM16_ENABLE +extern const FL_BSTIM16_InitTypeDef g_TimerBase_InitStruct ; +#endif + + +#ifdef FL_GPTIM_ENABLE +/** + * + */ +extern const FL_GPTIM_InitTypeDef g_gptim_init_cfg ; +extern const FL_GPTIM_OC_InitTypeDef g_gptim_ch1_cfg ; +extern const FL_GPTIM_OC_InitTypeDef g_gptim_ch2_cfg ; +extern const FL_GPTIM_OC_InitTypeDef g_gptim_ch3_cfg ; +extern const FL_GPTIM_OC_InitTypeDef g_gptim_ch4_cfg ; + +#endif + +#ifdef FL_GPTIM1_ENABLE + + +extern const FL_GPTIM_InitTypeDef g_gptim1_init_cfg ; +extern const FL_GPTIM_OC_InitTypeDef g_gptim1_ch1_cfg ; +extern const FL_GPTIM_OC_InitTypeDef g_gptim1_ch2_cfg ; +extern const FL_GPTIM_OC_InitTypeDef g_gptim1_ch3_cfg ; +extern const FL_GPTIM_OC_InitTypeDef g_gptim1_ch4_cfg ; + +#endif + +#ifdef FL_GPTIM2_ENABLE + + +extern const FL_GPTIM_InitTypeDef g_gptim2_init_cfg ; +extern const FL_GPTIM_OC_InitTypeDef g_gptim2_ch1_cfg ; +extern const FL_GPTIM_OC_InitTypeDef g_gptim2_ch2_cfg ; +extern const FL_GPTIM_OC_InitTypeDef g_gptim2_ch3_cfg ; +extern const FL_GPTIM_OC_InitTypeDef g_gptim2_ch4_cfg ; + +#endif + +#ifdef FL_LPTIM16_ENABLE +extern const FL_LPTIM16_InitTypeDef g_lptim16_cfg_tab ; + +#endif + +#ifdef FL_LPTIM32_ENABLE + +extern const FL_LPTIM32_InitTypeDef g_lptim32_cfg_tab ; +extern const FL_LPTIM32_OC_InitTypeDef g_lpt32_ch1_cfg ; +extern const FL_LPTIM32_OC_InitTypeDef g_lpt32_ch2_cfg ; +extern const FL_LPTIM32_OC_InitTypeDef g_lpt32_ch3_cfg ; +extern const FL_LPTIM32_OC_InitTypeDef g_lpt32_ch4_cfg ; + +#endif + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ + + + + + + + +#endif /* __TIM_CFG_H__ */ diff --git a/code_app_out/Source/bsp/uart.c b/code_app_out/Source/bsp/uart.c new file mode 100644 index 0000000..9cd278b --- /dev/null +++ b/code_app_out/Source/bsp/uart.c @@ -0,0 +1,515 @@ +/** ########################################################################## +** Filename : uart.c +** Project : +** Module : +** Processor : +** Version : 1.0 +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : uart底层 +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20230602- --V1.0-- --mingyea--- --修改-- + +** #########################################################################*/ + +/*--------------------------------------------------------------------------- +* I N C L U D E F I L E S +----------------------------------------------------------------------------*/ +#include "uart.h" +#include "nvic.h" + +/*--------------------------------------------------------------------------- +* D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +* T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ + + + +/*--------------------------------------------------------------------------- +* S T A T I C V A R I A B L E S +----------------------------------------------------------------------------*/ +static uart_s g_uart = +{ + 0u +}; +/*--------------------------------------------------------------------------- +* G L O B A L V A R I A B L E S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +* C O N S T A N T S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +* F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ + + + + +/*--------------------------------------------------------------------------- +|Prototype : uart_init +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : 初始化 +----------------------------------------------------------------------------*/ +void uart_init(void) +{ + #ifdef USART_0_EN + usart_0_gpio_init(); + FL_UART_Init(UART0, &g_UART0_InitStruct); + /* NVIC中断配置 */ + NVIC_ClearPendingIRQ(UART0_IRQn); + NVIC_DisableIRQ(UART0_IRQn); + NVIC_SetPriority(UART0_IRQn, NVIC_PRIORITY_USART0); //中断优先级配置 + NVIC_EnableIRQ(UART0_IRQn); + #endif + + #ifdef USART_1_EN + usart_1_gpio_init(); + FL_UART_Init(UART1, &g_UART1_InitStruct); + /* NVIC中断配置 */ + NVIC_ClearPendingIRQ(UART1_IRQn); + NVIC_DisableIRQ(UART1_IRQn); + NVIC_SetPriority(UART1_IRQn, NVIC_PRIORITY_USART1); //中断优先级配置 + NVIC_EnableIRQ(UART1_IRQn); + #endif + + #ifdef USART_3_EN + usart_3_gpio_init(); + FL_UART_Init(UART3, &g_UART3_InitStruct); + /* NVIC中断配置 */ + NVIC_ClearPendingIRQ(UART3_IRQn); + NVIC_DisableIRQ(UART3_IRQn); + NVIC_SetPriority(UART3_IRQn, NVIC_PRIORITY_USART3); //中断优先级配置 + NVIC_EnableIRQ(UART3_IRQn); + #endif + + #ifdef USART_4_EN + usart_4_gpio_init(); + FL_UART_Init(UART4, &g_UART4_InitStruct); + /* NVIC中断配置 */ + NVIC_ClearPendingIRQ(UART4_IRQn); + NVIC_DisableIRQ(UART4_IRQn); + NVIC_SetPriority(UART4_IRQn, NVIC_PRIORITY_USART4); //中断优先级配置 + NVIC_EnableIRQ(UART4_IRQn); + #endif + + #ifdef USART_5_EN + usart_5_gpio_init(); + FL_UART_Init(UART5, &g_UART5_InitStruct); + /* NVIC中断配置 */ + NVIC_ClearPendingIRQ(UART5_IRQn); + NVIC_DisableIRQ(UART5_IRQn); + NVIC_SetPriority(UART5_IRQn, NVIC_PRIORITY_USART5); //中断优先级配置 + NVIC_EnableIRQ(UART5_IRQn); + #endif + +} + + +/*--------------------------------------------------------------------------- +|Prototype : uart_tx_start +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : 初始化 +----------------------------------------------------------------------------*/ +u8 uart_tx_start(UART_Type *device, u8 *pdata, u8 length) +{ + u8 l_result = UART_OP_RESULT_OK; + u8 i ; + UART_Type *l_usart_dev = (UART_Type *)device; + //做了长度的判断 + if( (length == 0u) || (length>UART_TX_BUFF_LENGTH) ) + { + l_result = UART_OP_RESULT_FAILED; + } + else + { + if(g_uart.state == UART_STATE_IDLE) + { + for(i = 0; i < length; i++) + { + g_uart.tx_data[i] = pdata[i] ; + } + #ifdef UART_INSERT_PROTOCAL + g_uart.cmd = g_uart.tx_data[3]; + #endif + g_uart.timecount=0u; + g_uart.byte_count=0u; + g_uart.tx_byte_total=length; + g_uart.result=UART_RESULT_INIT; + g_uart.state=UART_STATE_TX; + #if 0 + l_usart_dev->RBR = g_uart.tx_data[g_uart.byte_count]; + UART_SetTXEInterrupt(l_usart_dev, ENABLE); + #else + FL_UART_ClearFlag_TXShiftBuffEmpty(device); + FL_UART_EnableIT_TXShiftBuffEmpty(device); + FL_UART_WriteTXBuff(device,g_uart.tx_data[g_uart.byte_count]); + #endif + } + else + { + l_result = UART_OP_RESULT_BUSY; + } + } + return l_result; +} + +/*--------------------------------------------------------------------------- +|Prototype : uart_tx_isr_task +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : 初始化 +----------------------------------------------------------------------------*/ +void uart_tx_isr_task(UART_Type *device) +{ + UART_Type *l_usart_dev = (UART_Type *)device; + u8 l_result = UART_OP_RESULT_OK; + g_uart.timecount=0u; + g_uart.byte_count++; + if(g_uart.byte_count>=g_uart.tx_byte_total) + { + g_uart.byte_count=0u; + g_uart.result=UART_RESULT_TX_OK; + #ifdef UART_INSERT_PROTOCAL + if( (g_uart.cmd & 0x20) || (g_uart.cmd==USART_CMD_READ_VERSION) ) + { + #ifdef UART_INSERT_PROTOCAL + if( (g_uart.cmd & 0x20) ) + { + g_uart.rx_byte_total=(g_uart.cmd &0x1fu) + 4u;; + } + else + { + g_uart.rx_byte_total= USART_LEN_READ_VERSION + 1u; + } + #else + // + #endif + g_uart.state=UART_STATE_RX; + } + else + { + g_uart.state=UART_STATE_IDLE; + } + #else + g_uart.rx_byte_total=0u; + g_uart.state=UART_STATE_IDLE; + #endif + #if 0 + UART_SetTXEInterrupt(l_usart_dev, DISABLE); + #else + FL_UART_DisableIT_TXShiftBuffEmpty(device); + FL_UART_EnableIT_RXBuffFull(device); + #endif + #ifdef UART_DEBUG_EN + g_uart.tx_count++; + #endif + } + else + { + #if 0 + l_usart_dev->RBR = g_uart.tx_data[g_uart.byte_count]; + #else + //FL_UART_ClearFlag_TXShiftBuffEmpty(device); + //FL_UART_EnableIT_TXShiftBuffEmpty(device); + FL_UART_WriteTXBuff(device,g_uart.tx_data[g_uart.byte_count]); + #endif + } +} + + +/*--------------------------------------------------------------------------- +|Prototype : uart_rx_isr_task +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : 初始化 +----------------------------------------------------------------------------*/ +void uart_rx_isr_task(UART_Type *device,u8 data) +{ + UART_Type *l_usart_dev = (UART_Type *)device; + u8 l_len = UART_RX_BUFF_LENGTH; + g_uart.timecount=0u; + if(g_uart.state == UART_STATE_IDLE) + { + g_uart.byte_count=0u; + g_uart.rx_data[g_uart.byte_count] = data; + #ifdef UART_INSERT_PROTOCAL + if( (g_uart.cmd & 0x20) ) + { + g_uart.rx_byte_total=(g_uart.cmd &0x1fu) + 4u;; + } + else + { + g_uart.rx_byte_total= USART_LEN_READ_VERSION + 1u; + } + #else + // + #endif + g_uart.byte_count++; + g_uart.state = UART_STATE_RX; + } + else if(g_uart.state == UART_STATE_RX) + { + g_uart.rx_data[g_uart.byte_count] = data; + g_uart.byte_count++; + #ifdef UART_INSERT_PROTOCAL + if(g_uart.byte_count>=g_uart.rx_byte_total) + { + //g_uart.byte_total=g_uart.byte_count; + g_uart.byte_count=0u; + g_uart.result=UART_RESULT_RX_OK; + g_uart.state=UART_STATE_IDLE; + #ifdef UART_DEBUG_EN + g_uart.rx_count++; + #endif + } + #endif + if(g_uart.byte_count>=UART_RX_BUFF_LENGTH) + { + //g_uart.byte_total=g_uart.byte_count; + g_uart.byte_count=0u; + FL_UART_DisableIT_TXShiftBuffEmpty(device); + FL_UART_DisableIT_RXBuffFull(device); + g_uart.result=UART_RESULT_OVER_LEN; + g_uart.state=UART_STATE_IDLE; + } + } + else + { + // + } +} + + +/*--------------------------------------------------------------------------- +|Prototype : uart_timeout_task +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : 初始化 +----------------------------------------------------------------------------*/ +void uart_timeout_task(UART_Type *device) +{ + UART_Type *l_usart_dev = (UART_Type *)device; + u8 l_state; + UART_SR_ALLOC(); + UART_CRITICAL_ENTER(); + l_state = g_uart.state; + UART_CRITICAL_EXIT(); + if(l_state != UART_STATE_IDLE) + { + UART_CRITICAL_ENTER(); + g_uart.timecount++; + if(g_uart.timecount>=UART_RECOVERY_TIMEOUT) + { + g_uart.timecount =0u; + if(g_uart.state == UART_STATE_TX) + { + g_uart.result=UART_RESULT_TIMEOUT; + #ifdef UART_DEBUG_EN + g_uart.tx_count_timeout++; + #endif + } + else + { + g_uart.rx_byte_total = g_uart.byte_count; //收完后的把总字长，保存 + #ifdef UART_INSERT_PROTOCAL + g_uart.result=UART_RESULT_TIMEOUT; + #else + g_uart.result=UART_RESULT_RX_OK; + #endif + #ifdef UART_DEBUG_EN + g_uart.rx_count_timeout++; + #endif + } + g_uart.byte_count=0u; + FL_UART_DisableIT_RXBuffFull(device); + g_uart.state=UART_STATE_IDLE; + } + UART_CRITICAL_EXIT(); + } +} + + +/*--------------------------------------------------------------------------- +|Prototype : uart_task +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +----------------------------------------------------------------------------*/ +void uart_task(void) +{ + uart_timeout_task(UART5); +} + + +/*--------------------------------------------------------------------------- +|Prototype : uart_get_result +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +----------------------------------------------------------------------------*/ +u8 uart_get_result(void) +{ + return g_uart.result; +} + + +/*--------------------------------------------------------------------------- +|Prototype : uart_get_rx_data +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +----------------------------------------------------------------------------*/ +u8 uart_get_rx_data(u8 *pdata,u8 len) +{ + u8 i; + u8 l_result=0u; + u8 l_len = len; + if(l_len > UART_RX_BUFF_LENGTH) // + { + l_len = UART_RX_BUFF_LENGTH; + } + for(i = 0; i < l_len; i++) + { + pdata[i] = g_uart.rx_data[i]; + } + return l_result; +} + + +/** + * @brief UART初始化 + * @param UARTx: 串口号 + * rate: 波特率 + * @retval void + */ +void Uartx_Init(UART_Type *device, uint32_t baud_rate) +{ + //FL_UART_InitTypeDef UART_InitStruct = {0}; + + switch ((uint32_t)device) + { + case UART0_BASE: + + #ifdef USART_0_EN + //usart_0_gpio_init(); //在GPIO表格中配置 + FL_UART_Init(UART0, &g_UART0_InitStruct); + /* NVIC中断配置 */ + NVIC_ClearPendingIRQ(UART0_IRQn); + NVIC_DisableIRQ(UART0_IRQn); + NVIC_SetPriority(UART0_IRQn, NVIC_PRIORITY_USART0); //中断优先级配置 + NVIC_EnableIRQ(UART0_IRQn); + #endif + + break; + + case UART1_BASE: + + #ifdef USART_1_EN + //usart_1_gpio_init(); //在GPIO表格中配置 + FL_UART_Init(UART1, &g_UART1_InitStruct); + /* NVIC中断配置 */ + NVIC_ClearPendingIRQ(UART1_IRQn); + NVIC_DisableIRQ(UART1_IRQn); + NVIC_SetPriority(UART1_IRQn, NVIC_PRIORITY_USART1); //中断优先级配置 + NVIC_EnableIRQ(UART1_IRQn); + #endif + + break; + + case UART3_BASE: + + #ifdef USART_3_EN + //usart_3_gpio_init(); //在GPIO表格中配置 + FL_UART_Init(UART3, &g_UART3_InitStruct); + /* NVIC中断配置 */ + NVIC_ClearPendingIRQ(UART3_IRQn); + NVIC_DisableIRQ(UART3_IRQn); + NVIC_SetPriority(UART3_IRQn, NVIC_PRIORITY_USART3); //中断优先级配置 + NVIC_EnableIRQ(UART3_IRQn); + #endif + + break; + + + case UART4_BASE: + + #ifdef USART_4_EN + //usart_4_gpio_init(); //在GPIO表格中配置 + FL_UART_Init(UART4, &g_UART4_InitStruct); + /* NVIC中断配置 */ + NVIC_ClearPendingIRQ(UART4_IRQn); + NVIC_DisableIRQ(UART4_IRQn); + NVIC_SetPriority(UART4_IRQn, NVIC_PRIORITY_USART4); //中断优先级配置 + NVIC_EnableIRQ(UART4_IRQn); + #endif + + break; + + case UART5_BASE: + + #ifdef USART_5_EN + //usart_5_gpio_init(); //在GPIO表格中配置 + FL_UART_Init(UART5, &g_UART5_InitStruct); + /* NVIC中断配置 */ + NVIC_ClearPendingIRQ(UART5_IRQn); + NVIC_DisableIRQ(UART5_IRQn); + NVIC_SetPriority(UART5_IRQn, NVIC_PRIORITY_USART5); //中断优先级配置 + NVIC_EnableIRQ(UART5_IRQn); + #endif + + break; + + default: + break; + } + +} + + + + + + + + + + diff --git a/code_app_out/Source/bsp/uart.h b/code_app_out/Source/bsp/uart.h new file mode 100644 index 0000000..c20d6a1 --- /dev/null +++ b/code_app_out/Source/bsp/uart.h @@ -0,0 +1,118 @@ +/** ########################################################################## +** Filename : uart.h +** Project : +** Module : +** Processor : +** Version : 1.0 +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : uart底层 +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20230602- --V1.0-- --mingyea--- --修改-- + +** #########################################################################*/ + +#ifndef UART_H__ +#define UART_H__ + + +/*--------------------------------------------------------------------------- +* I N C L U D E F I L E S +----------------------------------------------------------------------------*/ +#include "common_types.h" +#include "uart_cfg.h" + +/*--------------------------------------------------------------------------- +* D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ +#define UART_STATE_IDLE 0u +#define UART_STATE_TX 1u +#define UART_STATE_RX 2u + +#define UART_RESULT_INIT 0u +//#define UART_RESULT_OK 1u +#define UART_RESULT_CHECK_ERROR 2u +#define UART_RESULT_TIMEOUT 3u +#define UART_RESULT_OVER_LEN 4u +#define UART_RESULT_TX_OK 5u +#define UART_RESULT_RX_OK 6u + +#define UART_OP_RESULT_OK 0u +#define UART_OP_RESULT_BUSY 1u +#define UART_OP_RESULT_FAILED 2u + +/****************和协议相关的内容********************/ +#define USART_HEAD0_VALUE 0x55u +#define USART_HEAD1_VALUE 0xaau + +#define USART_PID 0xa1 + +#define USART_CMD_READ_DIFF 0x01 +#define USART_CMD_READ_VERSION 0x02 + +#define USART_LEN_READ_VERSION 0x05 + +#define USART_SLEEP_STATE_WAKE 0x00 +#define USART_SLEEP_STATE_SLEEP 0x01 + +#define UART_DRV_GOTO_IDLE_TIME_OUT_CNT 5 //2000 +/*--------------------------------------------------------------------------- +* T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ +typedef struct +{ + u8 state; //见 UART_STATE_IDLE + u8 sub_state; //见 UART_STATE_IDLE + u8 cmd; //指令 + u8 byte_count; //字节计数 + u8 tx_byte_total; //要发送的总字节数 + u8 rx_byte_total; //要接收的总字节数 + u8 result; + u8 timecount; + u8 tx_data[UART_TX_BUFF_LENGTH]; + u8 rx_data[UART_RX_BUFF_LENGTH]; + + #ifdef UART_DEBUG_EN + u16 rx_count; + u16 rx_count_timeout; + u16 tx_count; + u16 tx_count_timeout; + #endif +}uart_s; +/*--------------------------------------------------------------------------- +* G L O B A L V A R I A B L E S +* only configuration table allowed here,variables are not allowed! +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +* C O N S T A N T S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +* F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ + + +void uart_init(void); +void uart_task(void); + +u8 uart_tx_start(UART_Type *device, u8 *pdata, u8 length); +void uart_tx_isr_task(UART_Type *device); +void uart_rx_isr_task(UART_Type *device,u8 data); +void uart_timeout_task(UART_Type *device); + +u8 uart_get_result(void); +u8 uart_get_rx_data(u8 *pdata,u8 len); + +void Uartx_Init(UART_Type *device, uint32_t baud_rate); + +#endif diff --git a/code_app_out/Source/bsp/uart_cfg.c b/code_app_out/Source/bsp/uart_cfg.c new file mode 100644 index 0000000..bb69f8f --- /dev/null +++ b/code_app_out/Source/bsp/uart_cfg.c @@ -0,0 +1,384 @@ +/** ########################################################################## +** Filename : uart_cfg.c +** Project : +** Module : +** Processor : +** Version : 1.0 +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : uart底层 +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20230602- --V1.0-- --mingyea--- --修改-- + +** #########################################################################*/ + +#include "uart.h" + +#ifdef USART_0_EN +FL_UART_InitTypeDef g_UART0_InitStruct = +{ + FL_CMU_UART0_CLK_SOURCE_APBCLK, + 19200u, /* 波特率 */ + FL_UART_DATA_WIDTH_8B, /* 数据位数 */ + FL_UART_STOP_BIT_WIDTH_1B, /* 停止位 */ + FL_UART_PARITY_NONE, /* 奇偶校验 */ + FL_UART_DIRECTION_RX, /* 接收-发送使能 */ +}; +#endif + + +#ifdef USART_1_EN +FL_UART_InitTypeDef g_UART1_InitStruct = +{ + FL_CMU_UART1_CLK_SOURCE_APBCLK, + 9600u, /* 波特率 */ + FL_UART_DATA_WIDTH_8B, /* 数据位数 */ + FL_UART_STOP_BIT_WIDTH_1B, /* 停止位 */ + FL_UART_PARITY_NONE, /* 奇偶校验 */ + FL_UART_DIRECTION_RX, /* 接收-发送使能 */ +}; +#endif + + +#ifdef USART_3_EN +FL_UART_InitTypeDef g_UART3_InitStruct = +{ + 0u, //默认 apbclk + 9600u, /* 波特率 */ + FL_UART_DATA_WIDTH_8B, /* 数据位数 */ + FL_UART_STOP_BIT_WIDTH_1B, /* 停止位 */ + FL_UART_PARITY_NONE, /* 奇偶校验 */ + FL_UART_DIRECTION_RX, /* 接收-发送使能 */ +}; +#endif + +#ifdef USART_4_EN +FL_UART_InitTypeDef g_UART4_InitStruct = +{ + 0u, //默认 apbclk, + 9600u, /* 波特率 */ + FL_UART_DATA_WIDTH_8B, /* 数据位数 */ + FL_UART_STOP_BIT_WIDTH_1B, /* 停止位 */ + FL_UART_PARITY_NONE, /* 奇偶校验 */ + FL_UART_DIRECTION_RX, /* 接收-发送使能 */ +}; +#endif + +#ifdef USART_5_EN +FL_UART_InitTypeDef g_UART5_InitStruct = +{ + 0u, //默认 apbclk, + 19200u, /* 波特率 */ + FL_UART_DATA_WIDTH_8B, /* 数据位数 */ + FL_UART_STOP_BIT_WIDTH_1B, /* 停止位 */ + FL_UART_PARITY_NONE, /* 奇偶校验 */ + FL_UART_DIRECTION_TX_RX, /* 接收-发送使能 */ +}; +#endif + +#ifdef USART_0_EN +void usart_0_gpio_init(void) +{ + FL_GPIO_InitTypeDef GPIO_InitStruct = {0}; + /* PA13:UART0-RX PA14:UART0-TX */ + GPIO_InitStruct.pin = FL_GPIO_PIN_13 | FL_GPIO_PIN_14; + GPIO_InitStruct.mode = FL_GPIO_MODE_DIGITAL; + GPIO_InitStruct.outputType = FL_GPIO_OUTPUT_PUSHPULL; + GPIO_InitStruct.pull = FL_ENABLE; + GPIO_InitStruct.remapPin = FL_DISABLE; + FL_GPIO_Init(GPIOA, &GPIO_InitStruct); +} +#endif + +#ifdef USART_1_EN +void usart_1_gpio_init(void) +{ + FL_GPIO_InitTypeDef GPIO_InitStruct = {0}; + /* PC2:UART1-RX PC3:UART1-TX */ + GPIO_InitStruct.pin = FL_GPIO_PIN_2 | FL_GPIO_PIN_3; + GPIO_InitStruct.mode = FL_GPIO_MODE_DIGITAL; + GPIO_InitStruct.outputType = FL_GPIO_OUTPUT_OPENDRAIN; + GPIO_InitStruct.pull = FL_ENABLE; + GPIO_InitStruct.remapPin = FL_DISABLE; + FL_GPIO_Init(GPIOC, &GPIO_InitStruct); +} +#endif + +#ifdef USART_3_EN +void usart_3_gpio_init(void) +{ + FL_GPIO_InitTypeDef GPIO_InitStruct = {0}; + /* PB0:UART3-RX PB1:UART3-TX */ + GPIO_InitStruct.pin = FL_GPIO_PIN_0 | FL_GPIO_PIN_1; + GPIO_InitStruct.mode = FL_GPIO_MODE_DIGITAL; + GPIO_InitStruct.outputType = FL_GPIO_OUTPUT_PUSHPULL; + GPIO_InitStruct.pull = FL_DISABLE; + GPIO_InitStruct.remapPin = FL_ENABLE; + FL_GPIO_Init(GPIOB, &GPIO_InitStruct); +} +#endif + +#ifdef USART_4_EN +void usart_4_gpio_init(void) +{ + FL_GPIO_InitTypeDef GPIO_InitStruct = {0}; + /* PB2:UART4-RX PB3:UART4-TX */ + GPIO_InitStruct.pin = FL_GPIO_PIN_2 | FL_GPIO_PIN_3; + GPIO_InitStruct.mode = FL_GPIO_MODE_DIGITAL; + GPIO_InitStruct.outputType = FL_GPIO_OUTPUT_PUSHPULL; + GPIO_InitStruct.pull = FL_ENABLE; + GPIO_InitStruct.remapPin = FL_DISABLE; + FL_GPIO_Init(GPIOB, &GPIO_InitStruct); +} +#endif + +#ifdef USART_5_EN +void usart_5_gpio_init(void) +{ + FL_GPIO_InitTypeDef GPIO_InitStruct = {0}; + /* PD0:UART5-RX PD1:UART5-TX */ + GPIO_InitStruct.pin = FL_GPIO_PIN_0 | FL_GPIO_PIN_1; + GPIO_InitStruct.mode = FL_GPIO_MODE_DIGITAL; + GPIO_InitStruct.outputType = FL_GPIO_OUTPUT_OPENDRAIN; + GPIO_InitStruct.pull = FL_ENABLE; + GPIO_InitStruct.remapPin = FL_DISABLE; + FL_GPIO_Init(GPIOD, &GPIO_InitStruct); +} +#endif + +#ifdef USART_0_EN + +/** + * @brief UART0中断函数 + * @param void + * @retval void + */ +void UART0_IRQHandler(void) +{ + uint8_t tmp08; + + /* 接收中断处理 */ + if((FL_ENABLE == FL_UART_IsEnabledIT_RXBuffFull(UART0)) + && (FL_SET == FL_UART_IsActiveFlag_RXBuffFull(UART0))) + { + /* 中断转发接收到的数据 */ + tmp08 = FL_UART_ReadRXBuff(UART0); /* 接收中断标志可通过读取rxreg寄存器清除 */ + FL_UART_WriteTXBuff(UART0, tmp08); + } + + /* 发送中断处理 */ + if((FL_ENABLE == FL_UART_IsEnabledIT_TXShiftBuffEmpty(UART0)) + && (FL_SET == FL_UART_IsActiveFlag_TXShiftBuffEmpty(UART0))) + { + /* 发送中断标志可通过写txreg寄存器清除或txif写1清除 */ + /* 发送指定长度的数据 */ + if(UARTxOp.TxOpc < UARTxOp.TxLen) + { + FL_UART_WriteTXBuff(UART0, UARTxOp.TxBuf[UARTxOp.TxOpc]); /* 发送一个数据 */ + UARTxOp.TxOpc++; + } + + FL_UART_ClearFlag_TXShiftBuffEmpty(UART0); /* 清除发送中断标志 */ + } +} + +#endif + +#ifdef USART_1_EN + +/** + * @brief UART1中断函数 + * @param void + * @retval void + */ +void UART1_IRQHandler(void) +{ + uint8_t tmp08; + + /* 接收中断处理 */ + if((FL_ENABLE == FL_UART_IsEnabledIT_RXBuffFull(UART1)) + && (FL_SET == FL_UART_IsActiveFlag_RXBuffFull(UART1))) + { + /* 中断转发接收到的数据 */ + tmp08 = FL_UART_ReadRXBuff(UART1); /* 接收中断标志可通过读取rxreg寄存器清除 */ + FL_UART_WriteTXBuff(UART1, tmp08); + } + + /* 发送中断处理 */ + if((FL_ENABLE == FL_UART_IsEnabledIT_TXShiftBuffEmpty(UART1)) + && (FL_SET == FL_UART_IsActiveFlag_TXShiftBuffEmpty(UART1))) + { + /* 发送中断标志可通过写txreg寄存器清除或txif写1清除 */ + /* 发送指定长度的数据 */ + if(UARTxOp.TxOpc < UARTxOp.TxLen) + { + FL_UART_WriteTXBuff(UART1, UARTxOp.TxBuf[UARTxOp.TxOpc]); /* 发送一个数据 */ + UARTxOp.TxOpc++; + } + + FL_UART_ClearFlag_TXShiftBuffEmpty(UART1); /* 清除发送中断标志 */ + } +} + +#endif + +#ifdef USART_3_EN +/** + * @brief UART3中断函数 + * @param void + * @retval void + */ +void UART3_IRQHandler(void) +{ + uint8_t tmp08; + + /* 接收中断处理 */ + if((FL_ENABLE == FL_UART_IsEnabledIT_RXBuffFull(UART3)) + && (FL_SET == FL_UART_IsActiveFlag_RXBuffFull(UART3))) + { + /* 中断转发接收到的数据 */ + tmp08 = FL_UART_ReadRXBuff(UART3); /* 接收中断标志可通过读取rxreg寄存器清除 */ + FL_UART_WriteTXBuff(UART3, tmp08); + } + + /* 发送中断处理 */ + if((FL_ENABLE == FL_UART_IsEnabledIT_TXShiftBuffEmpty(UART3)) + && (FL_SET == FL_UART_IsActiveFlag_TXShiftBuffEmpty(UART3))) + { + /* 发送中断标志可通过写txreg寄存器清除或txif写1清除 */ + /* 发送指定长度的数据 */ + if(UARTxOp.TxOpc < UARTxOp.TxLen) + { + FL_UART_WriteTXBuff(UART3, UARTxOp.TxBuf[UARTxOp.TxOpc]); /* 发送一个数据 */ + UARTxOp.TxOpc++; + } + + FL_UART_ClearFlag_TXShiftBuffEmpty(UART3); /* 清除发送中断标志 */ + } +} +#endif + +#ifdef USART_4_EN + +/** + * @brief UART4中断函数 + * @param void + * @retval void + */ +void UART4_IRQHandler(void) +{ + uint8_t tmp08; + + /* 接收中断处理 */ + if((FL_ENABLE == FL_UART_IsEnabledIT_RXBuffFull(UART4)) + && (FL_SET == FL_UART_IsActiveFlag_RXBuffFull(UART4))) + { + /* 中断转发接收到的数据 */ + tmp08 = FL_UART_ReadRXBuff(UART4); /* 接收中断标志可通过读取rxreg寄存器清除 */ + FL_UART_WriteTXBuff(UART4, tmp08); + } + + /* 发送中断处理 */ + if((FL_ENABLE == FL_UART_IsEnabledIT_TXShiftBuffEmpty(UART4)) + && (FL_SET == FL_UART_IsActiveFlag_TXShiftBuffEmpty(UART4))) + { + /* 发送中断标志可通过写txreg寄存器清除或txif写1清除 */ + /* 发送指定长度的数据 */ + if(UARTxOp.TxOpc < UARTxOp.TxLen) + { + FL_UART_WriteTXBuff(UART4, UARTxOp.TxBuf[UARTxOp.TxOpc]); /* 发送一个数据 */ + UARTxOp.TxOpc++; + } + + FL_UART_ClearFlag_TXShiftBuffEmpty(UART4); /* 清除发送中断标志 */ + } +} +#endif + +#ifdef USART_5_EN + +#if 0 //在lin底层中有 +/** + * @brief UART5中断函数 + * @param void + * @retval void + */ +void UART5_IRQHandler(void) +{ + uint8_t tmp08; + + /* 接收中断处理 */ + if((FL_ENABLE == FL_UART_IsEnabledIT_RXBuffFull(UART5)) + && (FL_SET == FL_UART_IsActiveFlag_RXBuffFull(UART5))) + { + #if 0 + /* 中断转发接收到的数据 */ + tmp08 = FL_UART_ReadRXBuff(UART5); /* 接收中断标志可通过读取rxreg寄存器清除 */ + FL_UART_WriteTXBuff(UART5, tmp08); + #else + tmp08 = FL_UART_ReadRXBuff(UART5); /* 接收中断标志可通过读取rxreg寄存器清除 */ + //FL_UART_ClearFlag_RXBuffFull(UART5); + uart_rx_isr_task(UART5,tmp08); + #endif + } + + /* 发送中断处理 */ + if((FL_ENABLE == FL_UART_IsEnabledIT_TXShiftBuffEmpty(UART5)) + && (FL_SET == FL_UART_IsActiveFlag_TXShiftBuffEmpty(UART5))) + { + FL_UART_ClearFlag_TXShiftBuffEmpty(UART5); /* 清除发送中断标志 */ + #if 0 + /* 发送中断标志可通过写txreg寄存器清除或txif写1清除 */ + /* 发送指定长度的数据 */ + if(UARTxOp.TxOpc < UARTxOp.TxLen) + { + FL_UART_WriteTXBuff(UART5, UARTxOp.TxBuf[UARTxOp.TxOpc]); /* 发送一个数据 */ + UARTxOp.TxOpc++; + } + #endif + uart_tx_isr_task(UART5); + } +} +#endif + +#endif + + + + + +/*--------------------------------------------------------------------------- +|Prototype : uart_app_test_task +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : 周期任务 +----------------------------------------------------------------------------*/ +void uart_app_test_task(void) +{ + u8 i; + u8 l_tx_data[5]; + + #if 0 + for(i = 0; i < 5; i++) + { + /* code */ + } + #endif + l_tx_data[0] =0x55u; + l_tx_data[1] =0xaau; + l_tx_data[2] =0xa1u; + l_tx_data[3] =0x29u; + uart_tx_start(UART5,&l_tx_data[0],4u); +} + diff --git a/code_app_out/Source/bsp/uart_cfg.h b/code_app_out/Source/bsp/uart_cfg.h new file mode 100644 index 0000000..0a4f899 --- /dev/null +++ b/code_app_out/Source/bsp/uart_cfg.h @@ -0,0 +1,120 @@ +/** ########################################################################## +** Filename : uart_cfg.h +** Project : +** Module : +** Processor : +** Version : 1.0 +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : uart +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20230602- --V1.0-- --mingyea--- -- + +** #########################################################################*/ + + +#ifndef UART_CFG_H__ +#define UART_CFG_H__ + + +/*--------------------------------------------------------------------------- +* I N C L U D E F I L E S +----------------------------------------------------------------------------*/ +#include "common_types.h" +#include "cpu.h" + + +/*--------------------------------------------------------------------------- +* D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ +//#define USART_0_EN +//#define USART_1_EN +//#define USART_3_EN +//#define USART_4_EN +#define USART_5_EN + +//#define UART_TEST_EN 1u //test +#define UART_DEBUG_EN 1u //debug + +//#define UART_INSERT_PROTOCAL 1u // + +#define UART_TIME_UNIT 1u // +#define UART_RECOVERY_TIMEOUT (5u/UART_TIME_UNIT) // + +#define UARTx UART5 +//#define UARTx_IRQn UART2_IRQn +#define UART_TX_BUFF_LENGTH 10u +#define UART_RX_BUFF_LENGTH 24u + + +#define UART_CRITICAL_ENTER() System_DisableIrqGlobal() +#define UART_CRITICAL_EXIT() System_EnableIrqGlobal() + + +/***********************************/ + +/*--------------------------------------------------------------------------- +* T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +* G L O B A L V A R I A B L E S +* only configuration table allowed here,variables are not allowed! +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +* C O N S T A N T S +----------------------------------------------------------------------------*/ +#ifdef USART_0_EN +extern FL_UART_InitTypeDef g_UART0_InitStruct ; +#endif +#ifdef USART_1_EN +extern FL_UART_InitTypeDef g_UART1_InitStruct ; +#endif +#ifdef USART_3_EN +extern FL_UART_InitTypeDef g_UART3_InitStruct ; +#endif +#ifdef USART_4_EN +extern FL_UART_InitTypeDef g_UART4_InitStruct ; +#endif +#ifdef USART_5_EN +extern FL_UART_InitTypeDef g_UART5_InitStruct ; +#endif + +/*--------------------------------------------------------------------------- +* F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ + +#ifdef USART_0_EN +void usart_0_gpio_init(void); +#endif +#ifdef USART_1_EN +void usart_1_gpio_init(void); +#endif +#ifdef USART_3_EN +void usart_3_gpio_init(void); +#endif +#ifdef USART_4_EN +void usart_4_gpio_init(void); +#endif +#ifdef USART_5_EN +void usart_5_gpio_init(void); +#endif + + +void uart_app_test_task(void); + + + + +#endif diff --git a/code_app_out/Source/bsp/wdog.c b/code_app_out/Source/bsp/wdog.c new file mode 100644 index 0000000..be021e1 --- /dev/null +++ b/code_app_out/Source/bsp/wdog.c @@ -0,0 +1,287 @@ +/** ########################################################################## +** Filename : +** Project : +** Module : +** Processor : +** Version : 1.0 +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20230602- --V1.0-- --mingyea--- --修改-- + +** #########################################################################*/ + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ +#include "clk.h" +#include "gpio.h" +#include "queue_entity.h" +#include "logic_timer.h" +#include "wdog.h" +//#include "rcm_check.h" + +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ +typedef struct +{ + u8 state; + u16 count; + #ifdef WDOG_DEBUG_EN + u8 test[3]; + #endif +}wdt_s; + +typedef struct +{ + u16 count; + u32 flag_self_check; +}wdt_check_s; +/*--------------------------------------------------------------------------- +- S T A T I C V A R I A B L E S +----------------------------------------------------------------------------*/ +static wdt_s g_wdt; +static wdt_check_s g_wdt_check; + +/*--------------------------------------------------------------------------- +* G L O B A L V A R I A B L E S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ + + + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +----------------------------------------------------------------------------*/ +void WDT_IRQHandler(void) +{ + if(FL_WWDT_IsActiveFlag_NearOverflow(WWDT)) + { + FL_WWDT_ClearFlag_NearOverflow(WWDT); + FL_WWDT_ReloadCounter(WWDT); + /* LED0_TOG(); */ + return; + } + /* 若程序进入此分支，则表示IWDT中断，请自行处理 */ +} + + +#if WDT_OPERATION_MODE == WDT_OPERATION_NORMAL +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +----------------------------------------------------------------------------*/ +static void iwdt_in_init(void) +{ + FL_IWDT_Init(IWDT, (FL_IWDT_InitTypeDef*)&g_IWDT_InitStruct); + //FL_IWDT_EnableFreezeWhileSleep(IWDT); //在休眠时，冻结 + FL_IWDT_DisableFreezeWhileSleep(IWDT); //在休眠时，不冻结 +} +#endif + +#if WDT_OPERATION_MODE == WDT_OPERATION_WINDOWS +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +----------------------------------------------------------------------------*/ +static void wwdt_in_init(void) +{ + FL_WWDT_Init(WWDT, (FL_WWDT_InitTypeDef*)&g_WWDT_InitStruct); + + NVIC_ClearPendingIRQ(WWDT_IRQn); + NVIC_DisableIRQ(WWDT_IRQn); + NVIC_SetPriority(WWDT_IRQn, NVIC_PRIORITY_WDOG); + NVIC_EnableIRQ(WWDT_IRQn); + + FL_WWDT_ClearFlag_NearOverflow(WWDT); + + /* 开中断 */ + FL_WWDT_EnableIT_NearOverflow(WWDT); +} +#endif + +/*--------------------------------------------------------------------------- +|Prototype : 初始化 +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +----------------------------------------------------------------------------*/ +void wdog_init(void) +{ + //TEST1_ON(); + #if WDT_OPERATION_MODE == WDT_OPERATION_NORMAL + iwdt_in_init(); + #endif + + #if WDT_OPERATION_MODE == WDT_OPERATION_WINDOWS + wwdt_in_init(); + #endif + //TEST1_OFF(); +} + + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +----------------------------------------------------------------------------*/ +void wdog_task(void) +{ + #if 1 + + #if WDT_OPERATION_MODE == WDT_OPERATION_NORMAL + + #if 0//def WDOG_DEBUG_EN + TEST1_TOGGLE(); + g_wdt.test[0]++; + TEST1_TOGGLE(); + g_wdt.test[0]++; + TEST1_TOGGLE(); + g_wdt.test[0]++; + TEST1_TOGGLE(); + #endif + + //if(g_wdt.state == 0u) + { + FL_IWDT_ReloadCounter(IWDT); + } + + #endif + + #endif + +} + + + + +/*--------------------------------------------------------------------------- +|Prototype : 当使用窗口看门狗时的喂狗 +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +----------------------------------------------------------------------------*/ +void wdt_feed_windows(void) +{ + #if 1 + #if WDT_OPERATION_MODE == WDT_OPERATION_WINDOWS + + #if 0//def WDOG_DEBUG_EN + TEST1_TOGGLE(); + g_wdt.test[0]++; + TEST1_TOGGLE(); + g_wdt.test[0]++; + TEST1_TOGGLE(); + g_wdt.test[0]++; + TEST1_TOGGLE(); + #endif + g_wdt_check.count++; + g_wdt.count++; + if(g_wdt.count>=WDT_WINDOWS_TIMEOUT) + { + g_wdt.count=0u; + FL_WWDT_ReloadCounter(WWDT); + } + #ifdef WDT_ENABLE_SELF_CHECK + else if(g_wdt.count >= (WDT_WINDOWS_TIMEOUT/2u)) + { + if(g_wdt_check.flag_self_check != WDT_SELF_CHECK_DATA) + { + g_wdt_check.flag_self_check = WDT_SELF_CHECK_DATA; + FL_WWDT_ReloadCounter(WWDT); + } + } + #endif + + #endif + #endif +} + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +----------------------------------------------------------------------------*/ +void wdt_enable(void) +{ + // +}/* End of function wdt_enable*/ + + +/*--------------------------------------------------------------------------- +|Prototype : 禁 +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +----------------------------------------------------------------------------*/ +void wdt_disable(void) +{ + #if WDT_OPERATION_MODE == WDT_OPERATION_NORMAL + FL_IWDT_DeInit(IWDT); + #endif + + #if WDT_OPERATION_MODE == WDT_OPERATION_WINDOWS + FL_WWDT_DeInit(WWDT); + #endif +} + + + + +/*end line*/ diff --git a/code_app_out/Source/bsp/wdog.h b/code_app_out/Source/bsp/wdog.h new file mode 100644 index 0000000..7573ea3 --- /dev/null +++ b/code_app_out/Source/bsp/wdog.h @@ -0,0 +1,69 @@ +/** ########################################################################## +** Filename : +** Project : +** Module : +** Processor : +** Version : 1.0 +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20230602- --V1.0-- --mingyea--- --修改-- + +** #########################################################################*/ +#ifndef WDOG_H__ +#define WDOG_H__ + + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ +#include "common_types.h" +#include "wdog_cfg.h" + +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- G L O B A L V A R I A B L E S +- only configuration table allowed here,variables are not allowed! +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ + +void wdog_init(void); +void wdog_task(void); + +void wdt_feed_windows(void); + +void wdt_enable(void); +void wdt_disable(void); + + +#endif /* __WDOG_APP_H__ */ + + + + + + diff --git a/code_app_out/Source/bsp/wdog_cfg.c b/code_app_out/Source/bsp/wdog_cfg.c new file mode 100644 index 0000000..953bb9e --- /dev/null +++ b/code_app_out/Source/bsp/wdog_cfg.c @@ -0,0 +1,103 @@ +/** ########################################################################## +** Filename : +** Project : +** Module : +** Processor : +** Version : 1.0 +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20230602- --V1.0-- --mingyea--- --修改-- + +** #########################################################################*/ + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ +#include "wdog.h" +#include "logic_timer.h" +#include "gpio.h" + +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ +typedef struct +{ + u16 count[6]; +}wdog_cfg_s; + + +/*--------------------------------------------------------------------------- +- S T A T I C V A R I A B L E S +----------------------------------------------------------------------------*/ +static wdog_cfg_s g_wdog_cfg ={0}; + + +/*--------------------------------------------------------------------------- +* G L O B A L V A R I A B L E S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ +#if WDT_OPERATION_MODE == WDT_OPERATION_NORMAL + +/*! watchdog1 configuration structures */ +const FL_IWDT_InitTypeDef g_IWDT_InitStruct = +{ + FL_IWDT_PERIOD_250MS, /* 最长溢出时间 */ + 0u, /* 默认不使用窗口 */ +}; + +#elif WDT_OPERATION_MODE == WDT_OPERATION_WINDOWS + +/*! watchdog1 configuration structures */ +const FL_WWDT_InitTypeDef g_WWDT_InitStruct = +{ + FL_WWDT_PERIOD_1024CNT, /* 最长溢出时间 */ +}; + + +#endif + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ + + + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +----------------------------------------------------------------------------*/ +void wdog_irq_callback(void *device, uint32_t wpara, uint32_t lpara) +{ + g_wdog_cfg.count[0]++; +} + + + + + + +/*end line*/ diff --git a/code_app_out/Source/bsp/wdog_cfg.h b/code_app_out/Source/bsp/wdog_cfg.h new file mode 100644 index 0000000..363e648 --- /dev/null +++ b/code_app_out/Source/bsp/wdog_cfg.h @@ -0,0 +1,123 @@ +/** ########################################################################## +** Filename : +** Project : +** Module : +** Processor : +** Version : 1.0 +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20230602- --V1.0-- --mingyea--- --修改-- + +** #########################################################################*/ +#ifndef WDOG_CFG_H__ +#define WDOG_CFG_H__ + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ +#include "cpu.h" + +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ +//#define WDT_ENABLE_SELF_CHECK 1 /*开启自检*/ +#define WDT_SELF_CHECK_DATA 0x5e715896 + + +#define WDT_TIME_UNIT 1 // 1MS任务里跑 + + +#define WDT_OPERATION_NORMAL 0u +#define WDT_OPERATION_WINDOWS 1u +#define WDT_OPERATION_DISABLE 2u +#define WDT_OPERATION_MODE WDT_OPERATION_NORMAL + +#if 0 +#define WDT_PRE_256_EN 1 // 1开启，256分频 0不开启 --切記不能用枚舉 + +#if 0 //在中断时，0.5ms +#define WDT_CR_VALUE 2u +#define WDT_WINDOWS_TIMEOUT 27u //104 +#else +#define WDT_CR_VALUE (1u/WDT_TIME_UNIT) +#define WDT_WINDOWS_TIMEOUT (14u/WDT_TIME_UNIT) +#endif + +#if WDT_PRE_256_EN == 1 +#define WDT_PRE_256_VALUE ENABLE +#define WDG_CLK_S(n) (APB_BUS_FREQ/256u * n -1u) +#define WDG_CLK_MS(n) ( ((APB_BUS_FREQ/1000u) * n)/256u -1u) +#else +#define WDT_PRE_256_VALUE DISABLE +#define WDG_CLK_S(n) (APB_BUS_FREQ * n -1u) +#define WDG_CLK_MS(n) ( (APB_BUS_FREQ/1000u) * n -1u) +#endif + +#endif + +//#define WDOGx_IRQn WDOG_EWM_IRQn + + +/*! @brief Device instance number */ +#define INST_WATCHDOG1 0U + +#if WDT_OPERATION_MODE == WDT_OPERATION_NORMAL + +/*! watchdog1 configuration structures */ +extern const FL_IWDT_InitTypeDef g_IWDT_InitStruct ; + +#elif WDT_OPERATION_MODE == WDT_OPERATION_WINDOWS + +/*! watchdog1 configuration structures */ +extern const FL_WWDT_InitTypeDef g_WWDT_InitStruct ; + +#endif + +/*#define WWDG_INTERRUPT_ENABLE 1 */ /*使能中斷*/ + +#define WDOG_DEBUG_EN //测试宏 + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ + + + +/*--------------------------------------------------------------------------- +- G L O B A L V A R I A B L E S +- only configuration table allowed here,variables are not allowed! +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ + + +void wdog_irq_task(void); + + + + + +#endif /* __WDOG_APP_CFG_H__ */ + + + + + + diff --git a/code_app_out/Source/common/common_cfg.h b/code_app_out/Source/common/common_cfg.h new file mode 100644 index 0000000..a37c56d --- /dev/null +++ b/code_app_out/Source/common/common_cfg.h @@ -0,0 +1,123 @@ +/** ########################################################################## +** Filename : common_memory.h +** Project : general +** Module : BSP +** Processor : general +** Compiler : general +** Date/Time : 2020/9/14 +** Abstract : +** +** Note : +** +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** --------- ---- ----------------- -------------------------------------- +** #########################################################################*/ +#ifndef __COMMON_CFG_H__ +#define __COMMON_CFG_H__ + +/***************************************************************************** +* I N C L U D E F I L E S +*****************************************************************************/ +#include "common_types.h" + + +#define FUNCTION_OPEN 1U +#define FUNCTION_CLOSE 0U + + + +#ifdef __ICCARM__ + +#if 0 +#define MEMORY_MAP_ROM_FOR_ASIL #pragma location = ".ROM_ASIL" // #pragma location = ".RAM_ASIL" +#define MEMORY_MAP_RAM_FOR_ASIL #pragma location = ".RAM_ASIL" +#else + + +#define MEMORY_MAP_ROM_FOR_ASIL //__attribute__((section(".ROM_ASIL"))) // #pragma location = ".RAM_ASIL" +#define MEMORY_MAP_ROM_DATA_FOR_ASIL //__attribute__((section(".ROM_DATA_ASIL"))) // #pragma location = ".ROM_DATA_ASIL" +#define MEMORY_MAP_RAM_FOR_ASIL __attribute__((section(".RAM_ASIL"))) // #pragma location = ".RAM_ASIL" +#define MEMORY_MAP_ROM_DATA_FOR_UDS __attribute__((section(".ROM_DATA_UDS"))) // #pragma location = ".ROM_DATA_UDS" +#define MEMORY_MAP_ROM_APP_RES __attribute__((section(".ROM_APP_RES"))) // #pragma location = ".ROM_APP_VALID" +#define MEMORY_MAP_ROM_APP_VALID __attribute__((section(".ROM_APP_VALID"))) // #pragma location = ".ROM_APP_VALID1" +#define MEMORY_MAP_ROM_APP_VALID_END __attribute__((section(".ROM_APP_VALID_END"))) // #pragma location = ".ROM_APP_VALID1" + +#define ENABLE_STATIC_FOR_ASIL static +#define MEMORY_MAP_RAM_FLAG_NOINIT __attribute__((section(".RAM_FLAG_NOLINT"))) // #pragma location = ".RAM_ASIL" +#define MEMORY_MAP_RAM_FLAG_PROG __attribute__((section(".RAM_FLAG_PROG"))) // #pragma location = ".RAM_FLAG_PROG" +#define MEMORY_MAP_RAM_EEPROM __attribute__((section(".RAM_EEPROM"))) // #pragma location = ".RAM_EEPROM" +#define MEMORY_MAP_RAM_WDOG __attribute__((section(".RAM_WDOG"))) // #pragma location = ".RAM_WDOG" + +#define MEMORY_MAP_FLAG_NO_OPTIME __root //不被優化 + +#endif + +//#define MEMORY_MAP_CONTINUS 1 /**/ +#define LIN_MEMORY_MAP_ENABLE 1 /**/ + +#else + + +#define MEMORY_MAP_ROM_FOR_ASIL //__attribute__((section(".ROM_ASIL"))) +#define MEMORY_MAP_ROM_DATA_FOR_ASIL //__attribute__((section(".ROM_DATA_ASIL"))) // #pragma location = ".RAM_ASIL" +#define MEMORY_MAP_RAM_FOR_ASIL __attribute__((section(".RAM_ASIL"))) +#define MEMORY_MAP_ROM_DATA_FOR_UDS __attribute__((section(".ROM_DATA_UDS"))) // #pragma location = ".ROM_DATA_UDS" +#define MEMORY_MAP_ROM_APP_RES __attribute__((section(".ROM_APP_RES"))) // #pragma location = ".ROM_APP_VALID" +#define MEMORY_MAP_ROM_APP_VALID __attribute__((section(".ROM_APP_VALID"))) // #pragma location = ".ROM_APP_VALID1" +#define MEMORY_MAP_ROM_APP_VALID_END __attribute__((section(".ROM_APP_VALID_END"))) // #pragma location = ".ROM_APP_VALID1" + +#define ENABLE_STATIC_FOR_ASIL //注意GCC不能有 static +#define MEMORY_MAP_RAM_FLAG_NOINIT __attribute__((section(".RAM_FLAG_NOLINT"))) // #pragma location = ".RAM_ASIL" +#define MEMORY_MAP_RAM_FLAG_PROG __attribute__((section(".RAM_FLAG_PROG"))) // #pragma location = ".RAM_FLAG_PROG" +#define MEMORY_MAP_RAM_EEPROM __attribute__((section(".RAM_EEPROM"))) // #pragma location = ".RAM_EEPROM" +#define MEMORY_MAP_RAM_WDOG __attribute__((section(".RAM_WDOG"))) // #pragma location = ".RAM_WDOG" + +#define MEMORY_MAP_FLAG_NO_OPTIME __attribute__((used)) //不被優化 + +#endif + + +#define SystemSoftwareReset NVIC_SystemReset + + + +//主任务的时间 +#define APP_TASK_1MS 1 +#define APP_TASK_2MS 2 +#define APP_TASK_5MS 5 +#define APP_TASK_10MS 10 +#define APP_TASK_100MS 100 + +#define APP_TASK_TIME_SLICE //时间片 + +//#define KEY_DIGITAL_INIT_INVALID 1 //数字按键，上电无效 + +//项目相关的宏 +#define PROJECT_NAME_DEMO 0 +#define PROJECT_NAME_HXHA 1 + + + + + + + + +#define BOOTLOADER_EN 1 //是否开启了 bootloader +#ifdef ASIL_EN +//#define ASIL_MOTE //更多的功能安全 +#endif + +//TO MODIFY 要最後修改 +// +// +// +#endif/*__COMMON_CFG_H__*/ + +/* [] END OF FILE */ \ No newline at end of file diff --git a/code_app_out/Source/common/common_memory.c b/code_app_out/Source/common/common_memory.c new file mode 100644 index 0000000..52b33fd --- /dev/null +++ b/code_app_out/Source/common/common_memory.c @@ -0,0 +1,237 @@ +/** + ****************************************************************************** + * @file + * @author + * @version + * @date + * @brief 主要用於批量處理數據，如初始化，復制，清除等等 + * @function List: + ****************************************************************************** + * @attention + * + * + *

© COPYRIGHT 2021

+ ****************************************************************************** + * @History: + * @Author: + * @Data: + * @Version: +*/ + +/***************************************************************************** +* I N C L U D E F I L E S +*****************************************************************************/ +#include "common_memory.h" +#include "Cpu.h" + +/***************************************************************************** +* D E F I N E S / M A C R O S +*****************************************************************************/ + +/***************************************************************************** +* T Y P E D E F I N I T I O N S +*****************************************************************************/ + +/***************************************************************************** +* S T A T I C V A R I A B L E S +*****************************************************************************/ + +/***************************************************************************** +* G L O B A L V A R I A B L E S +*****************************************************************************/ + +/***************************************************************************** +* C O N S T A N T S +*****************************************************************************/ + +/***************************************************************************** +* F U N C T I O N P R O T O T Y P E +*****************************************************************************/ + +/***************************************************************************** +|Prototype : void common_memory_copys(u8* dst,const u8* src,u16 length) +|Called by : None +|Preconditions : None +|Input parameters : None +|Output parameters : None +|Return value : None +|Description : u8类型的数据拷贝 +*****************************************************************************/ +void common_memory_copys(u8* dst,const u8* src,u16 length) +{ + u16 i = 0; + while(length--) + { + dst[i] = src[i]; + i++; + } +} /* End of function common_memory_copys*/ + +/***************************************************************************** +|Prototype : void common_memory_copys_u16(u16* dst,const u16* src,u16 length) +|Called by : None +|Preconditions : None +|Input parameters : None +|Output parameters : None +|Return value : None +|Description : u16类型的数据拷贝 +*****************************************************************************/ +void common_memory_copys_u16(u16* dst,const u16* src,u16 length) +{ + u16 i = 0; + while(length--) + { + dst[i] = src[i]; + i++; + } +} /* End of function common_memory_copys_u16*/ + +/***************************************************************************** +|Prototype : void common_memory_clear(u8 *dst , u16 length) +|Called by : None +|Preconditions : None +|Input parameters : None +|Output parameters : None +|Return value : None +|Description : u8类型的数据清零 +*****************************************************************************/ +void common_memory_clear(u8 *dst , u16 length) +{ + u16 i = 0; + while(length--) + { + dst[i] = 0u; + i++; + }; +} /* End of function common_memory_clear*/ + +/***************************************************************************** +|Prototype : u8 common_get_str_length(const char *chr) +|Called by : None +|Preconditions : None +|Input parameters : None +|Output parameters : None +|Return value : None +|Description : 获取str的长度 +*****************************************************************************/ +u8 common_get_str_length(const char *chr) +{ + u8 len = 0; + /*求字符串s1的长度 */ + /*PCLINT_ERROS_960*/ /*lint --e(960)*/ /*過虙10.1 類型的強制隱制轉換 */ + for (len = 0u ; *(chr+len)!='\0' ; len++) /*lint !e960 */ + { + ; + } + return len; +} /* End of function common_get_str_length*/ + +/***************************************************************************** +|Prototype : bool_t common_string_compare(const char *ps1, const char *ps2) +|Called by : None +|Preconditions : None +|Input parameters : None +|Output parameters : None +|Return value : 相同返回1；不同返回0 +|Description : 比较字符串的內容是否相同； +*****************************************************************************/ +/*lint -efunc(818,common_string_compare) */ /*（建議）16.7 函數的指針參數 如果不是用來修改的話，建議聲明指向 const 類型*/ +bool_t common_string_compare(const char *ps1, const char *ps2) +{ + u8 i; + u8 n1 = common_get_str_length(ps1), n2 = common_get_str_length(ps2); + /*PCLINT_ERROS_960*/ /*lint --e(960)*/ /*過虙10.1 類型的強制隱制轉換 */ + bool_t l_result = TRUE ; /*PRQA S 4420*/ + + /*字符长度不同，一定內容不同*/ + if(n1 != n2) + { + /*PCLINT_ERROS_960*/ /*lint --e(960)*/ /*過虙10.1 類型的強制隱制轉換 */ + l_result = FALSE; /*PRQA S 4420*/ + /* return FALSE; */ + } + else + { + for(i=0u;i
© COPYRIGHT 2021
+ ****************************************************************************** + * @History: + * @Author: + * @Data: + * @Version: +*/ +#ifndef __COMMON_MEMORY_H__ +#define __COMMON_MEMORY_H__ + +/***************************************************************************** +* I N C L U D E F I L E S +*****************************************************************************/ +#include "common_types.h" + +/***************************************************************************** +* D E F I N E S / M A C R O S +*****************************************************************************/ + +/***************************************************************************** +* T Y P E D E F I N I T I O N S +*****************************************************************************/ +typedef enum +{ + MEMORY_RESULT_DIFFERENT = 0U, + MEMORY_RESULT_SAME = 1U +}memory_result_t; + +/***************************************************************************** +* G L O B A L V A R I A B L E S +* only configuration table allowed here,variables are not allowed! +*****************************************************************************/ + +/***************************************************************************** +* F U N C T I O N P R O T O T Y P E +*****************************************************************************/ +void common_memory_copys(u8* dst,const u8* src,u16 length); +void common_memory_copys_u16(u16* dst,const u16* src,u16 length); +memory_result_t common_memory_compare_u16(u16 *dst , u16 *src, u16 length); +memory_result_t common_memory_compare(u8 *dst , u8 *src, u16 length); + +void common_memory_clear(u8 *dst , u16 length); +void common_memory_fill(u8 *dst , u8 value, u16 length); + +u8 common_get_str_length(const char *chr); +bool_t common_string_compare(const char *ps1, const char *ps2); + +#endif/*__MEMORY_STRING_H__*/ + +/* [] END OF FILE */ \ No newline at end of file diff --git a/code_app_out/Source/common/common_types.h b/code_app_out/Source/common/common_types.h new file mode 100644 index 0000000..4786993 --- /dev/null +++ b/code_app_out/Source/common/common_types.h @@ -0,0 +1,566 @@ +/** + ****************************************************************************** + * @file + * @author + * @version + * @date + * @brief + * @function List: + ****************************************************************************** + * @attention + * + * + *

© COPYRIGHT 2021

+ ****************************************************************************** + * @History: + * @Author: + * @Data: + * @Version: +*/ + + +#ifndef __TYPES_H__ +#define __TYPES_H__ + +/*lint -e36 */ /* 不認識的字符*/ +/*lint -e19 */ /* 不認識的字符*/ +/*lint -e808 */ /* 不認識的字符*/ +/*lint -e10 */ /* 不認識的字符*/ +/*lint -e761 */ /* 不認識的字符*/ +/*lint -e830 */ /* 不認識的字符*/ +/*lint -e751 */ /* not referenced*/ +/*lint -e750 */ /*not referenced*/ +/*lint -e749 */ /*not referenced*/ +/************************************各變量類型***********************************/ + +#include +#if 1 /*如果變量的定義使用IAR自帶的h文件中定義*/ + +/*#include */ /*!< standard types definitions */ +#include +#else + +/*#include "stdint_copy.h" */ /*!< standard types definitions */ + +/*!< Signed integer types */ +typedef signed char int8_t; +typedef signed short int16_t; +typedef signed long int32_t; +typedef signed long long int64_t; + +/*!< Unsigned integer types */ +typedef unsigned char uint8_t; +/*STM32芯片和 STM8芯片 調試發現 SHORT 都是16位 */ +typedef unsigned short uint16_t; +/*STM32芯片調試發現 INT 和 LONG 都是32位 ; + 而在STM8時 INT 是16位 */ +typedef unsigned long uint32_t; +typedef unsigned long long uint64_t; + +typedef float float32_t; +typedef double float64_t; +typedef long double float128_t; + + +#define __VC volatile const /*!< defines 'read only' permissions */ +#define __I volatile const /*!< defines 'read only' permissions */ +#define __O volatile /*!< defines 'write only' permissions */ +#define __IO volatile /*!< defines 'read / write' permissions */ + +#endif + +#define __VC volatile const /*!< defines 'read only' permissions */ +#define __I volatile const /*!< defines 'read only' permissions */ +#define __O volatile /*!< defines 'write only' permissions */ +#define __IO volatile /*!< defines 'read / write' permissions */ + +/*!< STM32F10x Standard Peripheral Library old types (maintained for legacy purpose) */ +typedef int64_t s64; +typedef int32_t s32; +typedef int16_t s16; +typedef int8_t s8; + +typedef const int64_t sc64; /*!< Read Only */ +typedef const int32_t sc32; /*!< Read Only */ +typedef const int16_t sc16; /*!< Read Only */ +typedef const int8_t sc8; /*!< Read Only */ + +typedef __IO int32_t vs32; +typedef __IO int16_t vs16; +typedef __IO int8_t vs8; + +typedef __I int32_t vsc32; /*!< Read Only */ +typedef __I int16_t vsc16; /*!< Read Only */ +typedef __I int8_t vsc8; /*!< Read Only */ + +typedef uint64_t u64; +typedef uint32_t u32; +typedef uint16_t u16; +typedef uint8_t u8; + +typedef const uint32_t uc32; /*!< Read Only */ +typedef const uint16_t uc16; /*!< Read Only */ +typedef const uint8_t uc8; /*!< Read Only */ + +typedef __IO uint32_t vu32; +typedef __IO uint16_t vu16; +typedef __IO uint8_t vu8; + +typedef __I uint32_t vuc32; /*!< Read Only */ +typedef __I uint16_t vuc16; /*!< Read Only */ +typedef __I uint8_t vuc8; /*!< Read Only */ + +typedef uint16_t size_n_t; + +#if 0 +typedef float32_t f32; +typedef float64_t f64; +typedef float128_t f128; + +typedef const float32_t fc32; +typedef const float64_t fc64; +typedef const float128_t fc128; + +typedef __IO float32_t vf32; +typedef __IO float64_t vf64; +typedef __IO float128_t vf128; + + +typedef __I float32_t vfc32; +typedef __I float64_t vfc64; +typedef __I float128_t vfc128; +#endif + + +typedef enum +{ + RESET = 0, + SET = !RESET +/*} FlagStatus, ITStatus,BitStatus, BitAction;*/ +} FlagStatus, ITStatus,BitStatus; +#if 1 +typedef enum +{ + DISABLE = 0, + ENABLE = !DISABLE +} FunctionalState; +#endif + +/*lint --e(961) */ /*函數的使用優先選擇函數宏 Function-like macro defined */ +//#define IS_FUNCTIONAL_STATE(STATE) (((STATE) == DISABLE) || ((STATE) == ENABLE)) +//#define IS_FUNCTIONALSTATE_OK(STATE) (((STATE) == DISABLE) || ((STATE) == ENABLE)) +#if 0 +typedef enum +{ + ERROR = 0, + SUCCESS = !ERROR +} ErrorStatus; +#endif +#if 0 +typedef enum +{ + FALSE = 0u, /* 假 */ + TRUE = !FALSE /* 真 */ +}bool; /* 布爾運算 */ +#else +//#define FALSE false +//#define TRUE true +typedef enum +{ + FALSE_M = 0u, /* 假 */ + TRUE_M = !FALSE_M /* 真 */ +}bool_m_t; /* 布爾運算 */ + +#endif + +//typedef FunctionalState functional_status_e; +typedef ITStatus it_status_e; + + +/*操作的結果*/ +typedef enum +{ + FAILED = 0u, /* 失敗 */ + RIGHT = !FAILED /* 成功 */ +}operate_status_e; + + + +typedef bool bool_t; /* */ + + +//#define NULL 0 +#define NULL_POINT 0 +#ifndef NULL_PTR +#define NULL_PTR (void*)0 +#endif + + +/*********符號類型的值範圍************/ + +#define U8_MAX (255) +#define S8_MAX (127) +#define S8_MIN (-128) +#define U16_MAX (65535u) +#define S16_MAX (32767) +#define S16_MIN (-32768) +#define U32_MAX (4294967295uL) +#define S32_MAX (2147483647) +#define S32_MIN (-2147483648uL) + +#if 0 +/*適合STM32F4 DSP IB*/ +#define INT32_MIN S32_MIN +#define INT32_MAX S32_MAX +#define UINT32_MAX U32_MAX +#define INT16_MIN S16_MIN +#define INT16_MAX S16_MAX +#define UINT16_MAX U16_MAX +#define INT8_MIN S8_MIN +#define INT8_MAX S8_MAX +#define UINT8_MAX U8_MAX +#endif + + +typedef union +{ + uint16_t w; + struct{ + uint8_t b0; /*0 for CW 为HIGH_BYTE, FOR PICC 为LOW_BYTE */ + uint8_t b1; /* 0 for CW 为LIGH_BYTE, FOR PICC 为HIGH_BYTE */ + }b; + uint8_t byt[2]; +}u16_swap_t; + + + + + +typedef union +{ + uint32_t dw; + struct{ + uint8_t b0;/*0 for CW 为HIGH_BYTE, FOR PICC 为LOW_BYTE */ + uint8_t b1; + uint8_t b2; + uint8_t b3; + }b; + uint16_t wd[2]; + uint8_t byt[4]; +}u32_swap_t; + +typedef union +{ + uint32_t dw; + uint16_t a[2];/* 0 for CW 为HIGH_WORD, FOR PICC 为LOW_WORD */ + uint8_t b[4];/* 0 for CW 为HIGH_BYTE, FOR PICC 为LOW_BYTE */ +}u32_swap1_t; + + +typedef union +{ + uint32_t dw[2]; + struct{ + u32_swap_t dw_l; + u32_swap_t dw_h; + }lb; +}u64_swap_t; + + + +#ifndef TRUE /* conditional check */ + #define TRUE 1 +#endif + +#ifndef FALSE /* conditional check */ + #define FALSE 0 +#endif + + +#if 0 + + + +/*************各變量類型的簡寫**********************/ + +/*********有符號類型************/ +typedef int8_t s8; +typedef int16_t s16; +typedef int32_t s32; +typedef int64_t s64; + +typedef const int8_t sc8; /*!< Read Only */ +typedef const int16_t sc16; /*!< Read Only */ +typedef const int32_t sc32; /*!< Read Only */ + +typedef __IO int32_t vs32; +typedef __IO int16_t vs16; +typedef __IO int8_t vs8; + +typedef __I int32_t vsc32; /*!< Read Only */ +typedef __I int16_t vsc16; /*!< Read Only */ +typedef __I int8_t vsc8; /*!< Read Only */ + + +/*********無符號類型************/ +typedef uint8_t u8 ; /* USARTdiv 的小數部分 */ +typedef uint16_t u16 ; /* ENABLE or DISABLE 接收緩衝區DMA使能 */ +typedef uint32_t u32; +typedef uint64_t u64; + + +typedef const uint8_t uc8; /*!< Read Only */ +typedef const uint16_t uc16; /*!< Read Only */ +typedef const uint32_t uc32; /*!< Read Only */ + +typedef __IO uint8_t vu8; +typedef __IO uint16_t vu16; +typedef __IO uint32_t vu32; + +typedef __I u32 vuc32; /*!< Read Only */ +typedef __I uint16_t vuc16; /*!< Read Only */ +typedef __I uint8_t vuc8; /*!< Read Only */ + + +typedef void (*tIntFunc)(void); + + +/*每一類型的長度(單位是位數)*/ +#define INT_08_NBR_BITS 8u +#define INT_16_NBR_BITS 16u +#define INT_32_NBR_BITS 32u +#define INT_64_NBR_BITS 64u + +/*每一類型的長度(單位是字節)*/ +#define INT_08_NBR_BYTES 1u +#define CPU_INT_16_NBR_BYTES 2u +#define CPU_INT_32_NBR_BYTES 4u +#define INT_64_NBR_BYTES 8u + +/************************************以上是各變量類型***********************************/ + + + + +/************************************各枚舉標誌定義***********************************/ + +typedef enum +{ + FALSE = 0u, /* 假 */ + TRUE = !FALSE /* 真 */ +}bool; /* 布爾運算 */ + + +typedef enum +{ + RESET = 0u, /* 復位 */ + SET = !RESET /* 設置 */ +}set_status_e,it_status_e,bit_status_e,bit_action_e; + + + + + +/*判斷的結果*/ +typedef enum +{ + ERROR = 0u, /* 錯誤 */ + RIGHT = !ERROR /* 正確 */ +}judge_status_e,erro_status_e; + + + + + + +typedef enum +{ + UNBUSY = 0u, /* 不在忙 */ + BUSY = !UNBUSY /* 忙 */ +} busy_status_e; + + +typedef enum +{ + UNDONE = 0u, /* 未完成 */ + DONE = !UNDONE /* 完成 */ +} done_status_e; + +#if 0 + +/*電平值 */ +typedef enum +{ + GPIOP_LOW = 0u, /* 低電平 */ + GPIOP_HIGH = !GPIOP_LOW /* 高電平 */ +}gpio_pin_value_e; + +#endif + +#if 0 + +/*總的錯誤提示 */ +typedef enum +{ + ERR_OK = (u8)0, /* OK */ + ERR_SPEED = (u8)1, /* This device does not work in the active speed mode. */ + ERR_RANGE = (u8)2, /* Parameter out of range. */ + ERR_VALUE = (u8)3, /* Parameter of incorrect value. */ + ERR_OVERFLOW = (u8)4, /* Timer overflow. */ + ERR_MATH = (u8)5 , /* Overflow during evaluation. */ + ERR_ENABLED = (u8)6, /* Device is enabled. */ + ERR_DISABLED = (u8)7, /* Device is disabled. */ + ERR_BUSY = (u8)8 , /* Device is busy. */ + ERR_NOTAVAIL = (u8)9, /* Requested value or method not available. */ + ERR_RXEMPTY = (u8)10, /* No data in receiver. */ + ERR_TXFULL = (u8)11, /* Transmitter is full. */ + ERR_BUSOFF = (u8)12, /* Bus not available. */ + ERR_OVERRUN = (u8)13, /* Overrun error is detected. */ + ERR_FRAMING = (u8)14, /* Framing error is detected. */ + ERR_PARITY = (u8)15, /* Parity error is detected. */ + ERR_NOISE = (u8)16, /* Noise error is detected. */ + ERR_IDLE = (u8)17, /* Idle error is detected. */ + ERR_FAULT = (u8)18, /* Fault error is detected. */ + ERR_BREAK = (u8)19, /* Break char is received during communication. */ + ERR_CRC = (u8)20, /* CRC error is detected. */ + ERR_ARBITR = (u8)21 , /* A node losts arbitration. This error occurs if two nodes start transmission at the same time. */ + ERR_PROTECT = (u8)22 , /* Protection error is detected. */ + ERR_UNDERFLOW = (u8)23 , /* Underflow error is detected. */ + ERR_UNDERRUN = (u8)24 , /* Underrun error is detected. */ + ERR_COMMON = (u8)25 , /* Common error of a device. */ + ERR_LINSYNC = (u8)26 , /* LIN synchronization error is detected. */ + ERR_FAILED = (u8)27 , /* Requested functionality or process failed. */ + ERR_QFULL = (u8)28 , /* Queue is full. */ + ERR_MAX = (u8)29 , + ERR_NULL = (u8)0xff /* 無 */ +}erro_flag_e; + +#else + +#define ERR_OK (u8)0 /* OK */ +#define ERR_SPEED (u8)1 /* This device does not work in the active speed mode. */ +#define ERR_RANGE (u8)2 /* Parameter out of range. */ +#define ERR_VALUE (u8)3 /* Parameter of incorrect value. */ +#define ERR_OVERFLOW (u8)4 /* Timer overflow. */ +#define ERR_MATH (u8)5 /* Overflow during evaluation. */ +#define ERR_ENABLED (u8)6 /* Device is enabled. */ +#define ERR_DISABLED (u8)7 /* Device is disabled. */ +#define ERR_BUSY (u8)8 /* Device is busy. */ +#define ERR_NOTAVAIL (u8)9 /* Requested value or method not available. */ +#define ERR_RXEMPTY (u8)10 /* No data in receiver. */ +#define ERR_TXFULL (u8)11 /* Transmitter is full. */ +#define ERR_BUSOFF (u8)12 /* Bus not available. */ +#define ERR_OVERRUN (u8)13 /* Overrun error is detected. */ +#define ERR_FRAMING (u8)14 /* Framing error is detected. */ +#define ERR_PARITY (u8)15 /* Parity error is detected. */ +#define ERR_NOISE (u8)16 /* Noise error is detected. */ +#define ERR_IDLE (u8)17 /* Idle error is detected. */ +#define ERR_FAULT (u8)18 /* Fault error is detected. */ +#define ERR_BREAK (u8)19 /* Break char is received during communication. */ +#define ERR_CRC (u8)20 /* CRC error is detected. */ +#define ERR_ARBITR (u8)21 /* A node losts arbitration. This error occurs if two nodes start transmission at the same time. */ +#define ERR_PROTECT (u8)22 /* Protection error is detected. */ +#define ERR_UNDERFLOW (u8)23 /* Underflow error is detected. */ +#define ERR_UNDERRUN (u8)24 /* Underrun error is detected. */ +#define ERR_COMMON (u8)25 /* Common error of a device. */ +#define ERR_LINSYNC (u8)26 /* LIN synchronization error is detected. */ +#define ERR_FAILED (u8)27 /* Requested functionality or process failed. */ +#define ERR_QFULL (u8)28 /* Queue is full. */ +#define ERR_MAX (u8)29 +#define ERR_NULL (u8)0xff /* 無 */ + + +#endif + + + +/************************************以上是枚舉標誌定義***********************************/ + + + +/************************************基本運算的公用函數宏***********************************/ + + +/*************基本運算和參數命名無關*******************/ + +#define clear_reg(reg) ((reg) = (0x0)) /* 清零 */ +#define write_reg(reg, val) ((reg) = (val)) /* 寫入 */ +#define read_reg(reg) ((reg)) /* 讀取 */ + +#define set_8bits_mask(reg, mask) ((reg) |= (u8)(mask)) /* 將mask中的值為1的那幾位置1 */ +#define clear_8bits_mask(reg, mask) ((reg) &= (u8)~(mask)) /* 將mask中的值為0的那幾位清0 */ +#define get_8bits_mask(reg, mask) ((reg) & (u8)(mask)) /* 讀取mask中的值為1的那幾位的情況 */ +#define change_8Bits_mask(reg, mask) ((reg) ^= (u8)(mask)) /* 將mask中值為1的那幾位最反 */ +#define modify_8bits_reg(reg, clearmask, setmask) write_reg((reg), (((read_reg(reg)) & (~(u8)(clearmask))) | (u8)(setmask))) +/*#define set_8bits_mask_val(reg, mask, val) ( ((val) == 0) ? clear_8bits_mask(reg, mask) : (set_8bits_mask(reg, mask)))*/ +#define set_8bits_bit(reg, bit) ((reg) |= (u8)((u8)0x01)<<(bit)) /*reg 第bit位置一*/ +#define clear_8bits_bit(reg, bit) ((reg) &= ~(u8)((u8)0x01)<<(bit)) /*reg 第bit位清0*/ + +#define set_16bits_mask(reg, mask) ((reg) |= (u16)(mask)) /* 將mask中的值為1的那幾位置1 */ +#define clear_16bits_mask(reg, mask) ((reg) &= (u16)~(mask)) /* 將mask中的值為0的那幾位清0 */ +#define get_16bits_mask(reg, mask) ((reg) & (u16)(mask)) /* 讀取mask中的值為1的那幾位的情況 */ +#define change_16Bits_mask(reg, mask) ((reg) ^= (u16)(mask)) /* 將mask中值為1的那幾位最反 */ +#define modify_16bits_reg(reg, clearmask, setmask) write_reg((reg), (((read_reg(reg)) & (~(u16)(clearmask))) | (u16)(setmask))) +/*#define set_16bits_mask_val(reg, mask, val) ( ((val) == 0) ? clear_16bits_mask(reg, mask) : (set_16bits_mask(reg, mask)))*/ +#define set_16bits_bit(reg, bit) ((reg) |= (u16)((u16)0x01)<<(bit)) /*reg 第bit位置一*/ +#define clear_16bits_bit(reg, bit) ((reg) &= ~(u16)((u16)0x01)<<(bit)) /*reg 第bit位清0*/ + +#define set_32bits_mask(reg, mask) ((reg) |= (u32)(mask)) /* 將mask中的值為1的那幾位置1 */ +#define clear_32bits_mask(reg, mask) ((reg) &= (u32)~(mask)) /* 將mask中的值為0的那幾位清0 */ +#define get_32bits_mask(reg, mask) ((reg) & (u32)(mask)) /* 讀取mask中的值為1的那幾位的情況 */ +#define change_32Bits_mask(reg, mask) ((reg) ^= (u32)(mask)) /* 將mask中值為1的那幾位最反 */ +#define modify_32bits_reg(reg, clearmask, setmask) write_reg((reg), (((read_reg(reg)) & (~(u32)(clearmask))) | (u32)(setmask))) +/*#define set_32bits_mask_val(reg, mask, val) ( ((val) == 0) ? clear_32bits_mask(reg, mask) : (set_32bits_mask(reg, mask)))*/ +#define set_32bits_bit(reg, bit) ((reg) |= (u32)((u32)0x01)<<(bit)) /*reg 第bit位置一*/ +#define clear_32bits_bit(reg, bit) ((reg) &= ~(u32)((u32)0x01)<<(bit)) /*reg 第bit位清0*/ + + +#define bits8_to_bits16(var,l,h) ((var) = ((u16)(l)) | (((u16)(h)) << 8)) /*兩個8位轉成16位*/ +#define bits16_to_bits8(l,h,val) ((l)= (u8)(val), (h) = (u8)((val) >> 8)) /*16位轉成兩個高低8位;h為高 l為低*/ +#define bits16_to_bits32(var,l,h) ((var) = ((u32)(l)) | (((u32)(h)) << 16)) /*兩個16位轉成32位*/ +#define bits32_to_bits16(l,h,val) ((l) = (u16)(val), (h) = (u16)((val) >> 8)) /*16位轉成兩個高低8位;h為高 l為低*/ + + +#define output(P, V) ((P) = (V)) /*v的值賦給p*/ +#define input(P) (P) + + + + + +#if 0 + + + +/** @addtogroup Exported_macro + * @{ + */ + +#define SET_BIT(REG, BIT) ((REG) |= (BIT)) + +#define CLEAR_BIT(REG, BIT) ((REG) &= ~(BIT)) + +#define READ_BIT(REG, BIT) ((REG) & (BIT)) + +#define CLEAR_REG(REG) ((REG) = (0x0)) + +#define WRITE_REG(REG, VAL) ((REG) = (VAL)) + +#define READ_REG(REG) ((REG)) + +#define MODIFY_REG(REG, CLEARMASK, SETMASK) WRITE_REG((REG), (((READ_REG(REG)) & (~(CLEARMASK))) | (SETMASK))) + + + +#endif + + + +#endif + + +#endif /* __CPU_TYPES_H__ */ + + + + diff --git a/code_app_out/Source/common/error.h b/code_app_out/Source/common/error.h new file mode 100644 index 0000000..be32f0b --- /dev/null +++ b/code_app_out/Source/common/error.h @@ -0,0 +1,99 @@ +/** + * @file: err.h + * @brief: Ƶʾ + * @author: Mingyea + * @version: V1.0.0 + * @date: 2013-04-21 + * @history: + * 1.err_flag_e + * author:linyanhai + * version:V1.0.1 + * date:2014-03-13 + */ +#ifndef __ERROR_H__ +#define __ERROR_H__ + +//#define ERROR_NEGATIVE + +#ifdef ERROR_NEGATIVE +typedef signed short err_flag_e; + +#define ERR_OK 0 /* OK */ +#define ERR_SPEED (-1) /* This device does not work in the active speed mode. */ +#define ERR_RANGE (-2) /* Parameter out of range. */ +#define ERR_VALUE (-3) /* Parameter of incorrect value. */ +#define ERR_OVERFLOW (-4) /* Timer overflow. */ +#define ERR_MATH (-5) /* Overflow during evaluation. */ +#define ERR_ENABLED (-6) /* Device is enabled. */ +#define ERR_DISABLED (-7) /* Device is disabled. */ +#define ERR_BUSY (-8) /* Device is busy. */ +#define ERR_ID_NOEXIST (-9) /* ID not exist . */ +#define ERR_ID_INVALID (-10) /* ID is invalid . */ +#define ERR_NOTAVAIL (-11) /* Requested value or method not available. */ +#define ERR_RXEMPTY (-12) /* No data in receiver. */ +#define ERR_TXFULL (-13) /* Transmitter is full. */ +#define ERR_BUSOFF (-14) /* Bus not available. */ +#define ERR_OVERRUN (-15) /* Overrun error is detected. */ +#define ERR_FRAMING (-16) /* Framing error is detected. */ +#define ERR_PARITY (-17) /* Parity error is detected. */ +#define ERR_NOISE (-18) /* Noise error is detected. */ +#define ERR_IDLE (-19) /* Idle error is detected. */ +#define ERR_FAULT (-20) /* Fault error is detected. */ +#define ERR_BREAK (-21) /* Break char is received during communication. */ +#define ERR_CRC (-22) /* CRC error is detected. */ +#define ERR_ARBITR (-23) /* A node losts arbitration. This error occurs if two nodes start transmission at the same time. */ +#define ERR_PROTECT (-24) /* Protection error is detected. */ +#define ERR_UNDERFLOW (-25) /* Underflow error is detected. */ +#define ERR_UNDERRUN (-26) /* Underrun error is detected. */ +#define ERR_COMMON (-27) /* Common error of a device. */ +#define ERR_LINSYNC (-28) /* LIN synchronization error is detected. */ +#define ERR_FAILED (-29) /* Requested functionality or process failed. */ + +#else +/*ܵĴʾ */ +typedef enum +{ + ERR_OK= 0, /* OK */ + ERR_SPEED, /* This device does not work in the active speed mode. */ + ERR_RANGE, /* Parameter out of range. */ + ERR_VALUE, /* Parameter of incorrect value. */ + ERR_OVERFLOW , /* Timer overflow. */ + ERR_MATH , /* Overflow during evaluation. */ + ERR_ENABLED , /* Device is enabled. */ + ERR_DISABLED , /* Device is disabled. */ + ERR_BUSY , /* Device is busy. */ + ERR_ID_NOEXIST, /* ID not exist . */ + ERR_ID_INVALID, /* ID is invalid . */ + ERR_NOTAVAIL, /* Requested value or method not available. */ + ERR_RXEMPTY , /* No data in receiver. */ + ERR_TXFULL , /* Transmitter is full. */ + ERR_BUSOFF , /* Bus not available. */ + ERR_OVERRUN , /* Overrun error is detected. */ + ERR_FRAMING , /* Framing error is detected. */ + ERR_PARITY , /* Parity error is detected. */ + ERR_NOISE , /* Noise error is detected. */ + ERR_IDLE , /* Idle error is detected. */ + ERR_FAULT , /* Fault error is detected. */ + ERR_BREAK , /* Break char is received during communication. */ + ERR_CRC , /* CRC error is detected. */ + ERR_ARBITR , /* A node losts arbitration. This error occurs if two nodes start transmission at the same time. */ + ERR_PROTECT, /* Protection error is detected. */ + ERR_UNDERFLOW ,/* Underflow error is detected. */ + ERR_UNDERRUN ,/* Underrun error is detected. */ + ERR_COMMON ,/* Common error of a device. */ + ERR_LINSYNC ,/* LIN synchronization error is detected. */ + ERR_FAILED ,/* Requested functionality or process failed. */ + ERR_QFULL /* Queue is full. */ +}err_flag_e; + +#endif + + + + + +#endif /* __TYPES_H__ */ + + + + diff --git a/code_app_out/Source/common/logic_timer.c b/code_app_out/Source/common/logic_timer.c new file mode 100644 index 0000000..c4e457e --- /dev/null +++ b/code_app_out/Source/common/logic_timer.c @@ -0,0 +1,254 @@ +/** ########################################################################## +** Filename : logic_time.c +** Project : +** Module : +** Processor : +** Version : 1.0 +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20191106- --V01-- --LYJ--- --初版-- +** -20230602- --V1.0-- --mingyea--- --修改-- + +** #########################################################################*/ + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ +#include "common_types.h" +#include "logic_timer.h" +#include "cpu.h" + +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ +#define LOGICTIME_CONTEXT_ENABLE 1u /*隊列操作時開啟上下文切換*/ + +//注意，上下文切换，要在单片机的cpu.h中定义 + +#define LOGICTIME_CRITICAL_ENTER() System_DisableIrqGlobal() +#define LOGICTIME_CRITICAL_EXIT() System_EnableIrqGlobal() + + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- S T A T I C V A R I A B L E S +----------------------------------------------------------------------------*/ +static logic_timer_t g_logic_time_tick; + +/*--------------------------------------------------------------------------- +- G L O B A L V A R I A B L E S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +|Prototype : void logic_timer_tick_init(void) +|Called by : None +|Preconditions : None +|Input parameters : None +|Output parameters : None +|Return value : None +|Description : 初始化定時器 +----------------------------------------------------------------------------*/ +void logic_timer_tick_init (void) +{ + LOGICTIME_CRITICAL_ENTER(); /*PCLINT_ERROS*/ /*lint !e717 */ /*do while*/ + g_logic_time_tick = 0u; + LOGICTIME_CRITICAL_EXIT(); /*PCLINT_ERROS*/ /*lint !e717 */ /*do while*/ +} /* End of function logic_timer_tick_init*/ + + +/*--------------------------------------------------------------------------- +|Prototype : void logic_timer_tick_count(void) +|Called by : None +|Preconditions : None +|Input parameters : None +|Output parameters : None +|Return value : None +|Description : 定時器中斷處理; 計數; +----------------------------------------------------------------------------*/ +void logic_timer_tick_count(void) +{ + LOGICTIME_CRITICAL_ENTER(); /*PCLINT_ERROS*/ /*lint !e717 */ /*do while*/ + g_logic_time_tick ++; /* Increment the current time */ + LOGICTIME_CRITICAL_EXIT(); /*PCLINT_ERROS*/ /*lint !e717 */ /*do while*/ +} /* End of function logic_timer_tick_count*/ + + +/*--------------------------------------------------------------------------- +|Prototype : void logic_timer_get_tick(void) +|Called by : None +|Preconditions : None +|Input parameters : None +|Output parameters : None +|Return value : None +|Description : 读取tick +----------------------------------------------------------------------------*/ +logic_timer_t logic_timer_get_tick(void) +{ + logic_timer_t tmp; + LOGICTIME_CRITICAL_ENTER(); /*PCLINT_ERROS*/ /*lint !e717 */ /*do while*/ + tmp = g_logic_time_tick; /* Increment the current time */ + LOGICTIME_CRITICAL_EXIT(); /*PCLINT_ERROS*/ /*lint !e717 */ /*do while*/ + return tmp ; /* Increment the current time */ +} /* End of function logic_timer_get_tick*/ + + + +/*--------------------------------------------------------------------------- +|Prototype : void logic_timer_start(logic_timer_s* delay_cb, void (*p_fun)(void),logic_timer_t delay_tick) +|Called by : None +|Preconditions : None +|Input parameters : None +|Output parameters : None +|Return value : None +|Description : 启动逻辑定时器/延时 +----------------------------------------------------------------------------*/ +void logic_timer_start(logic_timer_s* delay_cb, void (*p_fun)(void),logic_timer_t delay_tick) +{ + delay_cb->current_time = logic_timer_get_tick(); + delay_cb->delay_time = delay_tick; + delay_cb->p_func = p_fun; + delay_cb->state = (u8)LOGIC_TIMER_FALSE; + /*delay_cb->abort_en = LOGIC_TIMER_FALSE;*/ +} /* End of function logic_timer_start*/ + + +/*--------------------------------------------------------------------------- +|Prototype : u8 logic_timer_out(logic_timer_s* delay_cb) +|Called by : None +|Preconditions : None +|Input parameters : None +|Output parameters : None +|Return value : None +|Description : 判断超时 +----------------------------------------------------------------------------*/ +u8 logic_timer_out(logic_timer_s* delay_cb) +{ + u8 l_result=LOGIC_TIMER_FALSE; + /* + if(delay_cb->abort_en) + return TIME_ABORT; + */ + if(delay_cb->state == (u8)LOGIC_TIMER_FALSE) + { + delay_cb->get_offset_time = logic_timer_get_tick() - delay_cb->current_time; + if ((delay_cb->get_offset_time) >= delay_cb->delay_time) + { + if(delay_cb->p_func != (void*)NULL_POINT) + { + delay_cb->p_func(); + } + logic_timer_abort(delay_cb); + l_result = LOGIC_TIMER_TRUE; + /*return LOGIC_TIMER_TRUE;*/ + } + else + { + + } + } + else + { + } + //return delay_cb->state; /*return TIME_RUNNING;*/ + return l_result; /*return TIME_RUNNING;*/ +} /* End of function logic_timer_out*/ + +/*--------------------------------------------------------------------------- +|Prototype : void logic_timer_abort(logic_timer_s *delay_cb) +|Called by : None +|Preconditions : None +|Input parameters : None +|Output parameters : None +|Return value : None +|Description : 忽略 +----------------------------------------------------------------------------*/ +void logic_timer_abort(logic_timer_s *delay_cb) +{ + /*delay_cb->abort_en = LOGIC_TIMER_TRUE;*/ + delay_cb->p_func = (void*)NULL_POINT; + delay_cb->state = (u8)LOGIC_TIMER_TRUE; +} /* End of function logic_timer_abort*/ + +#if 0 +/*--------------------------------------------------------------------------- +|Prototype : void logic_timer_tick_start(logic_timer_t *tick_counter, logic_timer_t tick_counts) +|Called by : None +|Preconditions : None +|Input parameters : None +|Output parameters : None +|Return value : None +|Description : 没什么用 +----------------------------------------------------------------------------*/ +void logic_timer_tick_start(logic_timer_t *tick_counter, logic_timer_t tick_counts) +{ + *tick_counter = tick_counts; +} /* End of function logic_timer_tick_start*/ + + +/*--------------------------------------------------------------------------- +|Prototype : u8 logic_timer_tick_time_out(logic_timer_t *tick_counter) +|Called by : None +|Preconditions : None +|Input parameters : None +|Output parameters : None +|Return value : None +|Description : 没什么用 +----------------------------------------------------------------------------*/ +u8 logic_timer_tick_time_out(logic_timer_t *tick_counter) +{ + u8 l_result; + + if(*tick_counter !=0u) + { + (*tick_counter)--; + l_result = LOGIC_TIMER_FALSE; /*PRQA S 4420*/ + } + else + { + l_result = LOGIC_TIMER_FALSE; /*PRQA S 4420*/ + } + + return l_result; +} /* End of function logic_timer_tick_time_out*/ + + + +/*--------------------------------------------------------------------------- +|Prototype : void logic_timer_tick_abort(logic_timer_t* tick_counter) +|Called by : None +|Preconditions : None +|Input parameters : None +|Output parameters : None +|Return value : None +|Description : 没什么用 +----------------------------------------------------------------------------*/ +void logic_timer_tick_abort(logic_timer_t* tick_counter) +{ + *tick_counter = 0u; +} /* End of function logic_timer_tick_abort*/ + +#endif + + +/* [] END OF FILE */ diff --git a/code_app_out/Source/common/logic_timer.h b/code_app_out/Source/common/logic_timer.h new file mode 100644 index 0000000..1a5a95c --- /dev/null +++ b/code_app_out/Source/common/logic_timer.h @@ -0,0 +1,99 @@ +/** ########################################################################## +** Filename : logic_timer.h +** Project : +** Module : +** Processor : +** Version : 1.0 +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20191106- --V01-- --LYJ--- --初版-- +** -20230602- --V1.0-- --mingyea--- --修改-- + +** #########################################################################*/ +#ifndef LOGIC_TIME___H +#define LOGIC_TIME___H + +/*lint -e749 */ /* 枚舉 not referenced*/ +/*lint -e750 */ /* 宏 not referenced*/ +/*lint -e751 */ /* 變量 not referenced*/ +/*lint -e752 */ /* 函數 not referenced*/ +/*lint -e753 */ /* 枚舉 not referenced*/ +/*lint -e754 */ /* 結構體成員 not referenced*/ + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ +#include "common_types.h" +#include "common_cfg.h" + +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ +#define LOGIC_TIMER_STATUS_STOP 0u +#define LOGIC_TIMER_STATUS_RUNNING 1u +#define LOGIC_TIMER_STATUS_DELETE 2u + +#define LOGIC_TIMER_FALSE 0u +#define LOGIC_TIMER_TRUE 1u + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ +typedef u16 logic_timer_t; + +typedef struct +{ + logic_timer_t get_offset_time; + logic_timer_t current_time; + logic_timer_t delay_time; + u8 state; + /* bool_t abort_en;*/ + void (*p_func)(void) ; +}logic_timer_s; + +/*--------------------------------------------------------------------------- +- G L O B A L V A R I A B L E S +- only configuration table allowed here,variables are not allowed! +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ + +/* 時間以邏輯定時器週期為基準*/ +void logic_timer_start(logic_timer_s* delay_cb, void (*p_fun)(void),logic_timer_t delay_tick); + +/* 超時返回 TRUE, 否則返回FALSE;*/ +u8 logic_timer_out(logic_timer_s* delay_cb); + +void logic_timer_abort(logic_timer_s* delay_cb); + +/* 時間以被調的任務週期為基準, tick_counts 倍 , 不適用於任務週期不確定的任務調用*/ +void logic_timer_tick_start(logic_timer_t *tick_counter, logic_timer_t tick_counts); +u8 logic_timer_tick_time_out(logic_timer_t *tick_counter); +void logic_timer_tick_abort(logic_timer_t *tick_counter); + + +void logic_timer_tick_init (void); +void logic_timer_tick_count(void); +logic_timer_t logic_timer_get_tick(void); + + + +#endif /* LOGIC_TIME___H */ + +/* [] END OF FILE */ diff --git a/code_app_out/Source/common/queue_entity.c b/code_app_out/Source/common/queue_entity.c new file mode 100644 index 0000000..774c2a5 --- /dev/null +++ b/code_app_out/Source/common/queue_entity.c @@ -0,0 +1,789 @@ +/** + ****************************************************************************** + * @file + * @author + * @version + * @date + * @brief 消息隊列 + 順序循環消息隊列 ---- 溢出丟棄 + 約定:1.隊列尾指針為實際末尾無素的下一位置. 2.浪費一個元素空間,以"隊列頭指 + 針在隊列尾指針的下一位置(指環狀的下一位置)上作為隊列呈"滿"狀態的標誌. + seq為空循環隊列的判定條件為:頭尾重合 seq.front==seq.rear + seq為滿循環隊列的判定條件為:隊尾趕上隊頭 (seq.rear+1)%MAXSIZE==seq.front + 注: 申請的隊列空間,buf至少2個. +注: 定義隊列緩存時;可以多加一個地址緩存;但是記住在調用queue_init函數時;參數length的值就是隊列緩存大小值; + * @function List: + ****************************************************************************** + * @attention + * + * + *

© COPYRIGHT 2021

+ ****************************************************************************** + * @History: + * @Author: + * @Data: + * @Version: +*/ + + +#include "common_types.h" + +#include "queue_entity.h" + + + + + /** + * @brief 初始化一個空順序隊列 + * @param input: seq : 順序隊列；pdata 隊列元素的數據; length隊列長度,unit_sizes 元素的字節長度; + * @param output: + * @return none: + * @calls + * @calls by + * @others + */ +void queue_init(sequential_queue_s *seq, sequential_queue_elem *pdata, u8 length , u8 unit_sizes) +{ + seq->front = 0u; + seq->rear=0u; + seq->base = pdata; + seq->length = length; + seq->unit_sizes = unit_sizes; +} + + /** + * @brief 清空隊列 + * @param input: seq : 順序隊列； + * @param output: + * @return none: + * @calls + * @calls by + * @others + */ +void queue_clear(sequential_queue_s *seq) +{ + + QUEUE_CPU_CRITICAL_ENTER(); + + seq->front = 0u; + seq->rear=0u; + + QUEUE_CPU_CRITICAL_EXIT(); +} + + + +/** + * @brief 判斷隊列是否為空; + * @param input: seq : 順序隊列； + * @param output: + * @return QUEUE_RIGHT_FLAG_E: 若隊列seq為空隊列，則返回ture 否則返回false + * @calls + * @calls by + * @others + */ +QUEUE_RIGHT_FLAG_E queue_get_empty(sequential_queue_s seq) +{ + + QUEUE_RIGHT_FLAG_E l_resutl; + + + QUEUE_CPU_CRITICAL_ENTER(); + + /*隊列空的標誌*/ + if(seq.front==seq.rear) + { + l_resutl = QUEUE_TRUE; + } + else + { + l_resutl = QUEUE_FALSE; + } + + QUEUE_CPU_CRITICAL_EXIT(); + + return l_resutl; +} + + +/** + * @brief 求出隊列不為空元素的數目; + * @param input: seq : 順序隊列； + * @param output: + * @return 長度數目 + * @calls + * @calls by + * @others + */ + u16 queue_get_length(sequential_queue_s seq) +{ + + #ifdef QUEUE_MOD_ENABLE + u16 length = (seq.length + seq.rear) - seq.front ; + QUEUE_CPU_CRITICAL_ENTER(); + length %= seq.length; + #else + u16 length ; + QUEUE_CPU_CRITICAL_ENTER(); + + if( seq.rear >= seq.front) + { + length = seq.rear - seq.front; + } + else + { + #if 0 + length = seq.length + seq.rear - seq.front; + #else + length = seq.length + seq.rear; + length -= seq.front; + #endif + } + #endif + + QUEUE_CPU_CRITICAL_EXIT(); + + return length; +} + + + /** + * @brief 若隊列不為空，則用e返回seq的隊頭元素 + * @param input: seq : 順序隊列列 + * @param output: element: 將頭元素數據傳給外部的變量; + * @return 是否操作成功 + * @calls + * @calls by + * @others + */ +QUEUE_OPERATE_FLAG_E queue_get_head(sequential_queue_s *seq,sequential_queue_elem *element) +{ + + sequential_queue_elem *pdata; + u8 j; + QUEUE_OPERATE_FLAG_E l_resutl = QUEUE_OK; + + QUEUE_CPU_CRITICAL_ENTER(); + + if(seq->front == seq->rear) + { + l_resutl = QUEUE_ERRO; + } + + if( l_resutl == QUEUE_OK) + { + + /* 將隊頭元素賦值給e */ + #ifdef QUEUE_MOD_ENABLE + pdata = seq->base + ( (seq->front%seq->length) * seq->unit_sizes) ; + #else + pdata = seq->base + ((seq->front) * seq->unit_sizes) ; + #endif + + for(j=0u;junit_sizes;j++) + { + element[j] = *pdata; + /* 該語句刪除隊列元素; */ + /* *pdata = 0;*/ + pdata += sizeof(sequential_queue_elem); + } + + } + QUEUE_CPU_CRITICAL_EXIT(); + + return l_resutl; + +} + + + +/** + * @brief 若隊列不為空，則用e返回seq的隊頭元素 + * @param input: seq : 順序隊列； + * @param output: element: 將頭元素數據傳給外部的變量; + * @return 是否操作成功 + * @calls + * @calls by + * @others + */ +QUEUE_OPERATE_FLAG_E queue_get_element(sequential_queue_s seq,u8 i ,sequential_queue_elem *element) +{ + sequential_queue_elem *pdata; + u8 j; + QUEUE_OPERATE_FLAG_E l_resutl= QUEUE_OK; + + #ifdef QUEUE_MOD_ENABLE + #else + u16 tmp_i ; + #endif + + QUEUE_CPU_CRITICAL_ENTER(); + + if(seq.front == seq.rear) + { + l_resutl = QUEUE_ERRO; + } + + if( l_resutl == QUEUE_OK) + { + + #ifdef QUEUE_MOD_ENABLE + + /* 將隊頭元素賦值給e */ + pdata = seq.base + ( (i%seq.length) * seq.unit_sizes) ; + #else + if( i < seq.length) + { + tmp_i = i; + } + else + { + tmp_i = i - seq.length ; + } + + pdata = seq.base + (tmp_i * seq.unit_sizes) ; + + #endif + + for(j=0u;jrear+1u)%seq->length) == seq->front) + #else + tmp_rear = seq->rear + 1u; + if( tmp_rear >= seq->length) + { + tmp_rear = 0u; + } + if(tmp_rear == seq->front) + #endif + { + l_resutl = QUEUE_ERRO; + + } + + if( l_resutl == QUEUE_OK) + { + + /*將元素e賦值給隊尾*/ + #ifdef QUEUE_MOD_ENABLE + pdata = seq->base + ( (seq->rear%seq->length) * seq->unit_sizes) ; + #else + pdata = seq->base + ((seq->rear) * seq->unit_sizes) ; + #endif + + for(i=0u;iunit_sizes;i++) + { + *pdata = element[i]; + pdata += sizeof(sequential_queue_elem); + } + + /*seq->base[seq->rear%seq->length]=element;*/ + + /* rear指針向後移一位，若到最後就轉到 數組頭部*/ + + #ifdef QUEUE_MOD_ENABLE + + seq->rear=(seq->rear+1u)%seq->length; + + #else + + seq->rear++; + if( seq->rear >= seq->length) + { + seq->rear = 0u; + } + + #endif + + + + } + + QUEUE_CPU_CRITICAL_EXIT(); + + return l_resutl; + +} + + + + /** + * @brief 若隊列未滿，則刪除元素e為seq新的隊尾元素 + * @param input: seq : 順序隊列； + * @param output: element: 將頭元素數據傳給外部的變量; + * @return 是否操作成功 + * @calls + * @calls by + * @others + */ +QUEUE_OPERATE_FLAG_E queue_del_element(sequential_queue_s *seq,sequential_queue_elem *element) +{ + QUEUE_OPERATE_FLAG_E l_resutl= QUEUE_OK; + sequential_queue_elem *pdata; + u8 i; + + QUEUE_CPU_CRITICAL_ENTER(); + + + /* 隊列空的判斷 */ + if( seq->rear == seq->front) + { + l_resutl = QUEUE_ERRO; + } + + if( l_resutl == QUEUE_OK) + { + + /* 將隊頭元素賦值給e */ + #ifdef QUEUE_MOD_ENABLE + pdata = seq->base + ( (seq->front%seq->length) * seq->unit_sizes) ; + #else + pdata = seq->base + ((seq->front) * seq->unit_sizes ); + #endif + + for(i=0u;iunit_sizes;i++) + { + element[i] = *pdata; + /* 該語句刪除隊列元素; */ + *pdata = 0u; + pdata += sizeof(sequential_queue_elem); + } + /* *element = seq->base[seq->front]; */ + + /* 該語句刪除隊列元素; */ + /*seq->base[seq->front] = 0; */ + + #ifdef QUEUE_MOD_ENABLE + + /* front 指針向後移一位置 */ + seq->front=(seq->front+1u)%seq->length; + + #else + + seq->front++; + if( seq->front >= seq->length) + { + seq->front = 0u; + } + + #endif + + + } + + QUEUE_CPU_CRITICAL_EXIT(); + + return l_resutl; + +} + + +#if 1 + + /** + * @brief 若隊列不空，則刪除Q中的某一個元素 + * @param input: seq : 順序隊列；i表示元素地址; + * @param output: element: 將頭元素數據傳給外部的變量; + * @return 是否操作成功 + * @calls + * @calls by + * @others + */ +QUEUE_OPERATE_FLAG_E queue_del_one_element(sequential_queue_s *seq,u16 i,sequential_queue_elem *element) +{ + QUEUE_OPERATE_FLAG_E l_resutl= QUEUE_OK; + sequential_queue_elem *pdata; + u8 j; + #ifdef QUEUE_MOD_ENABLE + + #else + u16 tmp_i; + #endif + + QUEUE_CPU_CRITICAL_ENTER(); + + + /* 隊列空的判斷 */ + if( seq->rear == seq->front) + { + l_resutl = QUEUE_ERRO; + } + + + if( l_resutl == QUEUE_OK) + { + + l_resutl = QUEUE_ERRO; + + #if 0 + /* 將隊頭元素賦值給e */ + *element = seq->base[i%seq->length]; + /* 該語句刪除隊列元素; */ + seq->base[i%seq->length] = 0; + #else + + /* 將隊頭元素賦值給e */ + #ifdef QUEUE_MOD_ENABLE + + pdata = seq->base + ( (i%seq->length) * seq->unit_sizes ) ; + + #else + + if( i < seq->length) + { + tmp_i = i; + } + else + { + tmp_i = i - seq->length ; + + } + + pdata = seq->base + (tmp_i * seq->unit_sizes ); + + #endif + + + for(j=0u;junit_sizes;j++) + { + element[j] = *pdata; + /* 該語句刪除隊列元素; */ + *pdata = 0u; + pdata += sizeof(sequential_queue_elem); + } + + #endif + + + + + #ifdef QUEUE_MOD_ENABLE + + if( (seq->front%seq->length) == (i%seq->length) ) + + #else + + /* 如果要刪除的是隊頭 */ + if( seq->front == tmp_i ) + + #endif + + { + + #ifdef QUEUE_MOD_ENABLE + + seq->front = ( seq->front + 1u)%seq->length; + + #else + + /* front 指針向後移一位置 */ + seq->front++; + if( seq->front >= seq->length) + { + seq->front = 0u; + } + + #endif + + l_resutl = QUEUE_OK; + + + } + + if( l_resutl == QUEUE_ERRO) + { + + /* 如果要刪除的是隊尾 */ + #ifdef QUEUE_MOD_ENABLE + if( ( ( (seq->rear + seq->length) -1u) %seq->length) == (i%seq->length) ) + #else + tmp_i++; + if( tmp_i >= seq->length) + { + tmp_i = 0u; + } + if( seq->rear == tmp_i ) + #endif + { + + #ifdef QUEUE_MOD_ENABLE + + /* rear 指針向前移一位置 */ + seq->rear = ( (seq->rear + seq->length) -1u) %seq->length; + + #else + + if( seq->rear >0u ) + { + seq->rear--; + } + else + { + seq->rear = seq->length -1u; + } + + #endif + + l_resutl = QUEUE_OK; + + } + } + + /*lint -e(838) */ /*局部變量只作臨界交換用;所以提示沒作用*/ + /* l_resutl = QUEUE_OK; */ + + + } + + + QUEUE_CPU_CRITICAL_EXIT(); + + return l_resutl; + + +} + + + + /** + * @brief 若隊列不空，則刪除Q中的某一個元素 + * @param input: seq : 順序隊列；i表示元素地址; fdo 刪除的方法 + * @param output: element: 將頭元素數據傳給外部的變量; + * @return 是否操作成功 + * @calls + * @calls by + * @others + */ +QUEUE_OPERATE_FLAG_E queue_del_one_element_by_flag(sequential_queue_s *seq,u16 i,sequential_queue_elem *element,QUEUE_DEL_FLAG_E fdo) +{ + QUEUE_OPERATE_FLAG_E l_resutl= QUEUE_OK; + sequential_queue_elem *pdata; + u8 j; + u8 flag_del = 0u; + + #ifdef QUEUE_MOD_ENABLE + + #else + u16 tmp_i; + #endif + + QUEUE_CPU_CRITICAL_ENTER(); + + + + /* 隊列空的判斷 */ + if( seq->rear == seq->front) + { + *element = 0u; + + /* 開啟總中斷 */ + l_resutl = QUEUE_ERRO; + + } + + if( l_resutl ==QUEUE_OK) + { + + /* 複製元素*/ + #ifdef QUEUE_MOD_ENABLE + + pdata = seq->base + ( (i%seq->length) * seq->unit_sizes ); + + #else + + if( i < seq->length) + { + tmp_i = i; + } + else + { + tmp_i = i - seq->length ; + } + + pdata = seq->base + (tmp_i * seq->unit_sizes) ; + + #endif + + for(j=0u;junit_sizes;j++) + { + element[j] = *pdata; + + /* 該語句刪除隊列元素; */ + if(fdo == QUEUE_DEL) + { + *pdata = 0u; + } + else if((fdo == QUEUE_MINUS)&& (j==0u)) + { + if(*pdata != 0u) + { + *pdata = *pdata - 1u; + /*重新運行的次數被清為0時；將隊列元素刪除*/ + if( *pdata == 0u) + { + flag_del = 1u; + } + } + } + else /*PRQA S 2013*/ + { + + } + + pdata += sizeof(sequential_queue_elem); + + } + + l_resutl = QUEUE_ERRO; + /*滿足刪除隊列的標誌*/ + if( (fdo == QUEUE_DEL) || (flag_del ==1u) ) + { + + #ifdef QUEUE_MOD_ENABLE + /* 如果要刪除的是隊頭 */ + if( (seq->front%seq->length) == (i%seq->length) ) + #else + if( seq->front == tmp_i ) + #endif + { + /* front 指針向後移一位置 */ + + #ifdef QUEUE_MOD_ENABLE + + seq->front = ( seq->front + 1u)%seq->length; + + #else + + /* front 指針向後移一位置 */ + seq->front++; + if( seq->front >= seq->length) + { + seq->front = 0u; + } + + #endif + + l_resutl = QUEUE_OK; + + } + + if ( l_resutl == QUEUE_ERRO) + { + + /* 如果要刪除的是隊尾 */ + #ifdef QUEUE_MOD_ENABLE + if( ( ( (seq->rear + seq->length) -1u) %seq->length) == (i%seq->length) ) + #else + tmp_i++; + if( tmp_i >= seq->length) + { + tmp_i = 0u; + } + if( seq->rear == tmp_i ) + #endif + { + + #ifdef QUEUE_MOD_ENABLE + + /* rear 指針向前移一位置 */ + seq->rear = ( (seq->rear + seq->length) -1u) %seq->length; + + #else + + if( seq->rear >0u ) + { + seq->rear--; + } + else + { + seq->rear = seq->length -1u; + } + + #endif + + l_resutl = QUEUE_OK; + + } + + } + } + + + } + + QUEUE_CPU_CRITICAL_EXIT(); + + return l_resutl; + +} + + +#endif + + + + + + + + + + + + + + + + + + + + + + diff --git a/code_app_out/Source/common/queue_entity.h b/code_app_out/Source/common/queue_entity.h new file mode 100644 index 0000000..8cb24c3 --- /dev/null +++ b/code_app_out/Source/common/queue_entity.h @@ -0,0 +1,213 @@ +/** + ****************************************************************************** + * @file + * @author + * @version + * @date + * @brief 消息隊列 + 順序循環消息隊列 + 約定:1.隊列尾指針為實際末尾無素的下一位置. 2.浪費一個元素空間,以"隊列頭指 + 針在隊列尾指針的下一位置(指環狀的下一位置)上作為隊列呈"滿"狀態的標誌. + seq為空循環隊列的判定條件為:頭尾重合 seq.front==seq.rear + seq為滿循環隊列的判定條件為:隊尾趕上隊頭 (seq.rear+1)%MAXSIZE==seq.front + 注: 申請的隊列空間,buf至少2個. + * @function List: + ****************************************************************************** + * @attention + * + * + *

© COPYRIGHT 2021

+ ****************************************************************************** + * @History: + * @Author: + * @Data: + * @Version: +*/ + + +#ifndef _QUEUE_ENTITY_H_ +#define _QUEUE_ENTITY_H_ + + +/*lint -e749 */ /* 枚舉 not referenced*/ +/*lint -e750 */ /* 宏 not referenced*/ +/*lint -e751 */ /* 變量 not referenced*/ +/*lint -e752 */ /* 函數 not referenced*/ +/*lint -e753 */ /* 枚舉 not referenced*/ +/*lint -e754 */ /* 結構體成員 not referenced*/ + +#include "common_types.h" +#include "queue_entity_cfg.h" + + +typedef enum +{ + QUEUE_ERRO = 0u, + QUEUE_OK = !QUEUE_ERRO +}QUEUE_OPERATE_FLAG_E; + +typedef enum +{ + QUEUE_FALSE = 0u, + QUEUE_TRUE = !QUEUE_FALSE +}QUEUE_RIGHT_FLAG_E; + + +typedef enum +{ + QUEUE_MINUS = 0u, /* 元素減少發送次數 */ + QUEUE_DEL = !QUEUE_MINUS /* 元素直接刪除 */ +}QUEUE_DEL_FLAG_E; + + + +typedef u8 sequential_queue_elem; + + +typedef struct +{ + u16 length; /*隊列長度*/ + sequential_queue_elem *base; /*數據*/ + u8 unit_sizes; /*元素的字節長度*/ + u16 front; /*頭指針*/ + u16 rear; /*尾指針*/ +}sequential_queue_s; + + + + + + /** + * @brief 初始化一個空順序隊列 + * @param input: seq : 順序隊列；pdata 隊列元素的數據; length隊列長度,unit_sizes 元素的字節長度; + * @param output: + * @return none: + * @calls + * @calls by + * @others + */ +void queue_init(sequential_queue_s *seq, sequential_queue_elem *pdata, u8 length , u8 unit_sizes); + + + + + /** + * @brief 清空隊列 + * @param input: seq : 順序隊列； + * @param output: + * @return none: + * @calls + * @calls by + * @others + */ +void queue_clear(sequential_queue_s *seq); + + + + +/** + * @brief 判斷隊列是否為空; + * @param input: seq : 順序隊列； + * @param output: + * @return QUEUE_RIGHT_FLAG_E: 若隊列seq為空隊列，則返回ture 否則返回false + * @calls + * @calls by + * @others + */ +QUEUE_RIGHT_FLAG_E queue_get_empty(sequential_queue_s seq); + + +QUEUE_OPERATE_FLAG_E queue_get_element(sequential_queue_s seq,u8 i ,sequential_queue_elem *element); + +/** + * @brief 求出隊列不為空元素的數目; + * @param input: seq : 順序隊列； + * @param output: + * @return 長度數目 + * @calls + * @calls by + * @others + */ +u16 queue_get_length(sequential_queue_s seq); + + + + /** + * @brief 若隊列不為空，則用e返回seq的隊頭元素 + * @param input: seq : 順序隊列列 + * @param output: element: 將頭元素數據傳給外部的變量; + * @return 是否操作成功 + * @calls + * @calls by + * @others + */ + +QUEUE_OPERATE_FLAG_E queue_get_head(sequential_queue_s *seq,sequential_queue_elem *element); + + + +/** + * @brief 若隊列未滿，則插入元素e為seq新的隊尾元素 + * @param input: seq : 順序隊列； + * @param output: element: 將頭元素數據傳給外部的變量; + * @return 是否操作成功 + * @calls + * @calls by + * @others + */ +QUEUE_OPERATE_FLAG_E queue_add_element(sequential_queue_s *seq,const sequential_queue_elem *element); + + + + + + + + /** + * @brief 若隊列未滿，則刪除元素e為seq新的隊尾元素 + * @param input: seq : 順序隊列； + * @param output: element: 將頭元素數據傳給外部的變量; + * @return 是否操作成功 + * @calls + * @calls by + * @others + */ +QUEUE_OPERATE_FLAG_E queue_del_element(sequential_queue_s *seq,sequential_queue_elem *element); + + + +#if 1 + + /** + * @brief 若隊列不空，則刪除Q中的某一個元素 + * @param input: seq : 順序隊列；i表示元素地址; fdo 刪除的方法 + * @param output: element: 將頭元素數據傳給外部的變量; + * @return 是否操作成功 + * @calls + * @calls by + * @others + */ +QUEUE_OPERATE_FLAG_E queue_del_one_element_by_flag(sequential_queue_s *seq,u16 i,sequential_queue_elem *element,QUEUE_DEL_FLAG_E fdo); + + + + + +QUEUE_OPERATE_FLAG_E queue_del_one_element(sequential_queue_s *seq,u16 i,sequential_queue_elem *element); + + +#endif + + + + + + + +#endif + + + + + + diff --git a/code_app_out/Source/common/queue_entity_cfg.c b/code_app_out/Source/common/queue_entity_cfg.c new file mode 100644 index 0000000..099d90a --- /dev/null +++ b/code_app_out/Source/common/queue_entity_cfg.c @@ -0,0 +1,330 @@ +/** + ****************************************************************************** + * @file + * @author + * @version + * @date + * @brief + * @function List: + ****************************************************************************** + * @attention + * + * + *

© COPYRIGHT 2021

+ ****************************************************************************** + * @History: + * @Author: + * @Data: + * @Version: +*/ + +#include "queue_entity.h" + + +/** + * @brief + * @param input: + * @param output: + * @return none: + * @calls + * @calls by + * @others + */ +#ifdef TEST_MODEL_QUEUE + + +#define MAX_QUEUE_QSIZE 8u + +typedef u32 queue_data_elem; + +static sequential_queue_s Q1 ; +static queue_data_elem Q1buf[MAX_QUEUE_QSIZE]; /* 隊列 */ + +typedef struct +{ + QUEUE_RIGHT_FLAG_E empty; + u16 length; + queue_data_elem value; +}queue_test_s; + +static queue_test_s queue_test = {QUEUE_FALSE,0u,0u } ; + + + + +/*考虙到測試代碼中都包含11.4 條 批量過虙*/ +/*PCLINT_ERROS_928*/ /*lint -e928 */ /* 928 11.4（建議）： 不應在某類型對像指針和其他不同類型對像指針之間進行強制轉換。*/ +/*考虙到測試代碼中都包含 該無返回值的過虙 批量過虙*/ +/*PCLINT_ERROS*/ /*lint -e534 */ /*忽略該函數的返回結果*/ + + /** + * @brief 若隊列不空，則刪除Q中的某一個元素 + * @param input: seq : 順序隊列；i表示元素地址; fdo 刪除的方法 + * @param output: element: 將頭元素數據傳給外部的變量; + * @return 是否操作成功 + * @calls + * @calls by + * @others + */ +void queue_test_task(void) +{ + + u16 i,j; + u16 start,end ; + queue_data_elem l_value; + + /*PCLINT_ERROS_928*/ /*lint --e(928) */ /* 928 11.4（建議）： 不應在某類型對像指針和其他不同類型對像指針之間進行強制轉換。*/ + /*PCLINT_ERROS_960*/ /*lint --e(960) */ /*表達式是函數參數 不能強制隱制轉換*/ + queue_init(&Q1,(sequential_queue_elem*)&Q1buf[0],MAX_QUEUE_QSIZE,sizeof(queue_data_elem)); + + queue_test.empty = queue_get_empty(Q1); /* 初始化隊列 */ + + if(queue_test.empty == QUEUE_TRUE) + { + +#if 0 + + queue_add_element(&Q1,0xa1); + queue_add_element(&Q1,0xa2); + queue_add_element(&Q1,0xa3); + queue_add_element(&Q1,0xa4); + queue_add_element(&Q1,0xa5); + + length = queue_get_length(Q1); + + queue_del_element(&Q1,&queue_test.value); + length = queue_get_length(Q1); + queue_del_element(&Q1,&queue_test.value); + length = queue_get_length(Q1); + queue_del_element(&Q1,&queue_test.value); + length = queue_get_length(Q1); + queue_del_element(&Q1,&queue_test.value); + length = queue_get_length(Q1); + + queue_add_element(&Q1,0xb1); + queue_add_element(&Q1,0xb2); + queue_add_element(&Q1,0xb3); + queue_add_element(&Q1,0xb4); + queue_add_element(&Q1,0xb5); + + length = queue_get_length(Q1); + + queue_del_element(&Q1,&queue_test.value); + length = queue_get_length(Q1); + queue_del_element(&Q1,&queue_test.value); + length = queue_get_length(Q1); + queue_del_element(&Q1,&queue_test.value); + length = queue_get_length(Q1); + + queue_add_element(&Q1,0xc1); + queue_add_element(&Q1,0xc2); + queue_add_element(&Q1,0xc3); + queue_add_element(&Q1,0xc4); + queue_add_element(&Q1,0xc5); + + queue_del_element(&Q1,&queue_test.value); + length = queue_get_length(Q1); + + + for(i=0;i<(MAX_QUEUE_QSIZE+5);i++) + { + queue_add_element(&Q1,0xa1 + i); + } + + + for(i=Q1.front;i
© COPYRIGHT 2021
+ ****************************************************************************** + * @History: + * @Author: + * @Data: + * @Version: +*/ + +/* +********************************************************************************************************* +* MODULE +********************************************************************************************************* +*/ + +#ifndef __QUEUE_ENTITY_CFG__ +#define __QUEUE_ENTITY_CFG__ + +#include "common_types.h" +#include "Cpu.h" + + +/*lint -e749 */ /* 枚舉 not referenced*/ +/*lint -e750 */ /* 宏 not referenced*/ +/*lint -e751 */ /* 變量 not referenced*/ +/*lint -e752 */ /* 函數 not referenced*/ +/*lint -e754 */ /* 結構體成員 not referenced*/ + + + + +/*#define QUEUE_MOD_ENABLE 1 */ /*開啟求余運算*/ +//#define QUEUE_MOD_ENABLE 1 /*開啟求余運算*/ + + +#define QUEUE_SWITCH_CONTEXT_ENABLE 1u /*隊列操作時開啟上下文切換*/ + + + + +#define QUEUE_CPU_CRITICAL_ENTER() System_DisableIrqGlobal() +#define QUEUE_CPU_CRITICAL_EXIT() System_EnableIrqGlobal() + + + + +/* #define TEST_MODEL_QUEUE 1 */ /*測試消息隊列*/ +/*#define TEST_MODEL_QUEUE 1*/ /*測試消息隊列*/ +#ifdef TEST_MODEL_QUEUE + +void queue_test_task(void); + +#endif + + + + +#endif /* __QUEUE_EXT_CFG__ */ + diff --git a/code_app_out/Source/common/status.h b/code_app_out/Source/common/status.h new file mode 100644 index 0000000..3d08a98 --- /dev/null +++ b/code_app_out/Source/common/status.h @@ -0,0 +1,173 @@ +/* + * Copyright (c) 2016, Freescale Semiconductor, Inc. + * Copyright 2016-2017 NXP + * All rights reserved. + * + * THIS SOFTWARE IS PROVIDED BY NXP "AS IS" AND ANY EXPRESSED OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL NXP OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF + * THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef STATUS_H +#define STATUS_H + +/** + * @page misra_violations MISRA-C:2012 violations + * + * @section [global] + * Violates MISRA 2012 Advisory Rule 2.3, Global typedef not referenced. + * status_t is referenced from all drivers. + * + * @section [global] + * Violates MISRA 2012 Advisory Rule 2.5, Local macro not referenced. + * The defined macro is used as include guard. + * + */ + +/******************************************************************************* + * Definitions + ******************************************************************************/ + +/*! @brief Status return codes. + * Common error codes will be a unified enumeration (C enum) that will contain all error codes + * (common and specific). There will be separate "error values spaces" (or slots), each of 256 + * positions, allocated per functionality. + */ +typedef enum +{ + /* Generic error codes */ + STATUS_SUCCESS = 0x000U, /*!< Generic operation success status */ + STATUS_ERROR = 0x001U, /*!< Generic operation failure status */ + STATUS_BUSY = 0x002U, /*!< Generic operation busy status */ + STATUS_TIMEOUT = 0x003U, /*!< Generic operation timeout status */ + STATUS_UNSUPPORTED = 0x004U, /*!< Generic operation unsupported status */ + /* MCU specific error codes */ + STATUS_MCU_GATED_OFF = 0x100U, /*!< Module is gated off */ + STATUS_MCU_TRANSITION_FAILED = 0x101U, /*!< Error occurs during transition. */ + STATUS_MCU_INVALID_STATE = 0x102U, /*!< Unsupported in current state. */ + STATUS_MCU_NOTIFY_BEFORE_ERROR = 0x103U, /*!< Error occurs during send "BEFORE" notification. */ + STATUS_MCU_NOTIFY_AFTER_ERROR = 0x104U, /*!< Error occurs during send "AFTER" notification. */ + /* I2C specific error codes */ + STATUS_I2C_RECEIVED_NACK = 0x200U, /*!< NACK signal received */ + STATUS_I2C_TX_UNDERRUN = 0x201U, /*!< TX underrun error */ + STATUS_I2C_RX_OVERRUN = 0x202U, /*!< RX overrun error */ + STATUS_I2C_ARBITRATION_LOST = 0x203U, /*!< Arbitration lost */ + STATUS_I2C_ABORTED = 0x204U, /*!< A transfer was aborted */ + STATUS_I2C_BUS_BUSY = 0x205U, /*!< I2C bus is busy, cannot start transfer */ + /* CAN specific error codes */ + STATUS_CAN_BUFF_OUT_OF_RANGE = 0x300U, /*!< The specified MB index is out of the configurable range */ + STATUS_CAN_NO_TRANSFER_IN_PROGRESS = 0x301U, /*!< There is no transmission or reception in progress */ + /* Security specific error codes */ + STATUS_SEC_SEQUENCE_ERROR = 0x402U, /*!< The sequence of commands or subcommands is out of + sequence */ + STATUS_SEC_KEY_NOT_AVAILABLE = 0x403U, /*!< A key is locked due to failed boot measurement or + an active debugger */ + STATUS_SEC_KEY_INVALID = 0x404U, /*!< A function is called to perform an operation with + a key that is not allowed for the given operation */ + STATUS_SEC_KEY_EMPTY = 0x405U, /*!< Attempt to use a key that has not been initialized yet */ + STATUS_SEC_NO_SECURE_BOOT = 0x406U, /*!< The conditions for a secure boot process are not met */ + STATUS_SEC_KEY_WRITE_PROTECTED = 0x407U, /*!< Request for updating a write protected key slot, + or activating debugger with write protected key(s) */ + STATUS_SEC_KEY_UPDATE_ERROR = 0x408U, /*!< Key update did not succeed due to errors in + verification of the messages */ + STATUS_SEC_RNG_SEED = 0x409U, /*!< Returned by CMD_RND and CMD_DEBUG if the seed has not + been initialized before */ + STATUS_SEC_NO_DEBUGGING = 0x40AU, /*!< DEBUG command authentication failed */ + STATUS_SEC_MEMORY_FAILURE = 0x40CU, /*!< General memory technology failure + (multibit ECC error, common fault detected) */ + STATUS_SEC_HSM_INTERNAL_MEMORY_ERROR = 0x410U, /*!< An internal memory error encountered while + executing the command */ + STATUS_SEC_INVALID_COMMAND = 0x411U, /*!< Command value out of range */ + STATUS_SEC_TRNG_ERROR = 0x412U, /*!< One or more statistical tests run on the TRNG output failed */ + STATUS_SEC_HSM_FLASH_BLOCK_ERROR = 0x413U, /*!< Error reading, programming or erasing one of the HSM flash blocks */ + STATUS_SEC_INTERNAL_CMD_ERROR = 0x414U, /*!< An internal command processor error while executing a command */ + STATUS_SEC_MAC_LENGTH_ERROR = 0x415U, /*!< MAC/Message length out of range */ + STATUS_SEC_INVALID_ARG = 0x421U, /*!< Invalid command argument */ + STATUS_SEC_TRNG_CLOCK_ERROR = 0x423U, /*!< TRNG not provided with a stable clock */ + /* SPI specific error codes */ + STATUS_SPI_TX_UNDERRUN = 0x500U, /*!< TX underrun error */ + STATUS_SPI_RX_OVERRUN = 0x501U, /*!< RX overrun error */ + STATUS_SPI_ABORTED = 0x502U, /*!< A transfer was aborted */ + /* UART specific error codes */ + STATUS_UART_TX_UNDERRUN = 0x600U, /*!< TX underrun error */ + STATUS_UART_RX_OVERRUN = 0x601U, /*!< RX overrun error */ + STATUS_UART_ABORTED = 0x602U, /*!< A transfer was aborted */ + STATUS_UART_FRAMING_ERROR = 0x603U, /*!< Framing error */ + STATUS_UART_PARITY_ERROR = 0x604U, /*!< Parity error */ + STATUS_UART_NOISE_ERROR = 0x605U, /*!< Noise error */ + /* I2S specific error codes */ + STATUS_I2S_TX_UNDERRUN = 0x700U, /*!< TX underrun error */ + STATUS_I2S_RX_OVERRUN = 0x701U, /*!< RX overrun error */ + STATUS_I2S_ABORTED = 0x702U, /*!< A transfer was aborted */ + /* SBC specific error codes */ + SBC_NVN_ERROR = 0x801U, /*!< Unsuccessful attempt writing to non volatile memory + (0x73 and 0x74). Set device to factory settings. */ + SBC_COMM_ERROR = 0x802U, /*!< Data transfer was aborted */ + SBC_CMD_ERROR = 0x804U, /*!< Wrong command. */ + SBC_ERR_NA = 0x808U, /*!< Feature/device not available */ + SBC_MTPNV_LOCKED = 0x810U, /*!< Unable to write MTPNV cells, NVMPS = 0 */ + + /* FLASH specific error codes */ + STATUS_FLASH_ERROR_ENABLE = 0x901U, /*!< It's impossible to enable an operation */ + STATUS_FLASH_ERROR_NO_BLOCK = 0x902U, /*!< No blocks have been enabled for Array Integrity check */ + STATUS_FLASH_INPROGRESS = 0x903U, /*!< InProgress status */ + + /* SAI specific error codes */ + STATUS_SAI_ABORTED = 0xA00U, /*!< SAI aborted status */ + + /* ENET specific error codes */ + STATUS_ENET_RX_QUEUE_EMPTY = 0xA01U, /*!< There is no available frame in the receive queue */ + STATUS_ENET_TX_QUEUE_FULL = 0xA02U, /*!< There is no available space for the frame in the transmit queue */ + STATUS_ENET_BUFF_NOT_FOUND = 0xA03U, /*!< The specified buffer was not found in the queue */ + + /* FCCU specific error codes */ + STATUS_FCCU_ERROR_CONFIG_TIMEOUT = 0xB01U, /*!< FCCU triggers TimeOut when try to enter in Config State */ + STATUS_FCCU_ERROR_INIT_FCCU = 0xB02U, /*!< FCCU Initializing FCCU Module */ + STATUS_FCCU_ERROR_SET_CONFIG = 0xB03U, /*!< FCCU Fail to Enter in Config Mode */ + STATUS_FCCU_ERROR_SET_NORMAL = 0xB04U, /*!< FCCU Fail to Enter in Normal Mode */ + STATUS_FCCU_ERROR_APPLY_NCF_CONFIG = 0xB05U, /*!< FCCU Fail to set NoCritical Faults */ + STATUS_FCCU_ERROR_UPDATE_FREEZE = 0xB06U, /*!< FCCU Fail to update Freez Status registers */ + STATUS_FCCU_ERROR_CLEAR_FREEZE = 0xB07U, /*!< FCCU Fail to Clear Freez Status registers */ + STATUS_FCCU_ERROR_SET_EOUT = 0xB08U, /*!< FCCU Fail to Set Eout Configuration */ + STATUS_FCCU_ERROR_FAULT_DETECTED = 0xB09U, /*!< FCCU Faults Detected */ + STATUS_FCCU_ERROR_OTHER = 0xB0AU, /*!< FCCU other Error */ + + /* EMIOS specific error codes */ + STATUS_EMIOS_WRONG_MODE = 0xC00U, /*!< EMIOS unsuccessful attempt selecting wrong mode. */ + STATUS_EMIOS_CNT_BUS_OVERFLOW = 0xC01U, /*!< EMIOS counter bus overflow. */ + STATUS_EMIOS_WRONG_CNT_BUS = 0xC02U, /*!< EMIOS unsuccessful attempt selecting wrong counter bus. */ + STATUS_EMIOS_ENABLE_GLOBAL_FRZ = 0xC03U, /*!< EMIOS must set global allow enter debug mode first. */ + + /* EEE specific error codes */ + STATUS_EEE_ERROR_NO_ENOUGH_SPACE = 0xD00U, /*!< The data is too big to fit in any of the block */ + STATUS_EEE_ERROR_NO_ENOUGH_BLOCK = 0xD01U, /*!< The block numbers is not enough for round robin */ + STATUS_EEE_ERROR_DATA_NOT_FOUND = 0xD02U, /*!< The required data is not found in the EEPROM emulation */ + STATUS_EEE_ERROR_NOT_IN_CACHE = 0xD03U, /*!< The required data is not in the cache table */ + STATUS_EEE_ERROR_PROGRAM_INDICATOR = 0xD04U, /*!< Failed to make block indicator to non-blank for several times */ + STATUS_EEE_HVOP_INPROGRESS = 0xD05U, /*!< The high voltage operation is in progress */ + + /* uSDHC specific error codes */ + STATUS_USDHC_OUT_OF_RANGE = 0xE00U, /*!< The size of data to be sent is larger than maximum size of ADMA table */ + STATUS_USDHC_PREPARE_ADMA_FAILED = 0xE01U, /*!< Failed to prepare the ADMA table */ + + /* TDM specific error codes */ + STATUS_TDM_DIARY_FULL = 0xF01U, /*!< No empty flash left in diary region */ + + /* PHY specific error codes */ + STATUS_PHY_ACCESS_FAILED = 0x1001U, /*!< Could not access PHY registers */ + STATUS_PHY_INCOMPATIBLE_DEVICE = 0x1002U /*!< The selected PHY driver is not compatible with the device */ +} status_t; + +#endif /* STATUS_H */ + +/******************************************************************************* + * EOF + ******************************************************************************/ diff --git a/code_app_out/Source/main.c b/code_app_out/Source/main.c new file mode 100644 index 0000000..5175680 --- /dev/null +++ b/code_app_out/Source/main.c @@ -0,0 +1,152 @@ + +#include "main.h" +#include "user_init.h" +#include "common_cfg.h" +#include "key_encoder_driver.h" +#include "app_encoder.h" +#include "led_app.h" +#include "CanNm.h" +#include "Can_BusOff.h" +#include "low_power_app.h" +#include "system_voltage_app.h" +#include "can_app.h" +#include "demm_app.h" +#include "SimpleOs.h" +#include "SimpleOs_Cfg.h" +#include "SimpleOs_Time.h" +#include "Cpu.h" +#include "pwm_manage.h" +#include "wheelHeat.h" + + + + +int main(void) +{ + + System_DisableIrqGlobal(); + + (void)wdog_init(); + + (void)rmu_init(); + (void)nvic_init(); + (void)clk_init(); + (void)svd_init(); + (void)gpio_init(); + (void)adc_init(); + (void)tim_init(); + (void)system_voltage_manage_init(); + (void)app_encoder_init(); + (void)stack_check_init(); + (void)CanTrcv_Init(); + (void)Can_Init(); + (void)CanIf_Init(); + (void)CanIf_SetControllerMode(0,CANIF_CS_STARTED); + (void)Com_Init(); + (void)CanNm_Init(NULL_PTR); + (void)Com_TxStart(); + (void)Com_RxStart(); + (void)CanTp_Init(((void *) 0)); + (void)CAN_BusOff_Init(); + (void)Dcm_Init(((void *) 0)); + (void)key_app_init(); + (void)key_encoder_driver_init(); + (void)cal_did_init(); + (void)boot_app_init(); + (void)random_init(); + (void)service_27_init(); + (void)nvm_init(); + (void)dem_task_init(); + (void)can_app_init(); + (void)led_app_init(); + (void)WheelHeat_Init(); + NVIC_DisableIRQ(CAN_IRQn); + NVIC_SetPriority(CAN_IRQn, 0);/* 中断优先级配置 */ + NVIC_EnableIRQ(CAN_IRQn); + + System_EnableIrqGlobal(); + + + SimpleOs_Start(); +} + + + + + +TASK(OS_Task1ms) +{ + + (void)wdog_task(); + (void)wdt_feed_windows(); + (void)adc_task(); + (void)key_encoder_driver_task(); + (void)eeprom_task(); + +} + +TASK(OS_Task2ms) +{ + + (void)system_voltage_manage_task(); + (void)system_voltage_app_task(); + +} +TASK(OS_Task5msA) +{ + + (void)Com_MainFunctionRx(); + (void)Com_MainFunctionTx(); + (void)Dcm_MainFunction(); + (void)CanTp_MainFunction(); + (void)CanNm_MainFunction(); + (void)CanBusOffMainFunction(); + +} +TASK(OS_Task5msB) +{ + + (void)dem_task(); + +} +TASK(OS_Task5msC) +{ + + (void)led_app_task(); + +} +TASK(OS_Task10msA) +{ + + key_digital_driver_normal_task(); + key_adc_mid_task(); + key_app_task(); + +} +TASK(OS_Task10msB) +{ + (void)low_power_app_task(); + + +} +TASK(OS_Task10msC) +{ + + (void)demm_app_task(); +} + + +TASK(OS_Task10msD) +{ + + (void)app_encoder_task(); + +} +TASK(OS_Task10msE) +{ + + WheelHeat_MainFunction(); + +} + + diff --git a/code_app_out/Source/module/BusOff/Can_BusOff.c b/code_app_out/Source/module/BusOff/Can_BusOff.c new file mode 100644 index 0000000..d4507d1 --- /dev/null +++ b/code_app_out/Source/module/BusOff/Can_BusOff.c @@ -0,0 +1,397 @@ +/********************************************************************************************************************** + * COPYRIGHT + * ------------------------------------------------------------------------------------------------------------------- + * \verbatim + * Copyright (c) 2007-2014 by Vector Informatik GmbH. All rights reserved. + * + * This software is copyright protected and proprietary to Vector Informatik GmbH. + * Vector Informatik GmbH grants to you only those rights as set out in the license conditions. + * All other rights remain with Vector Informatik GmbH. + * \endverbatim + * ------------------------------------------------------------------------------------------------------------------- + * FILE DESCRIPTION + * ------------------------------------------------------------------------------------------------------------------- + * File: CanNm.c + * Component: AUTOSAR CAN Network Management + * Module: AUTOSAR Network Management + * Generator: - + * + * Description: Source of AUTOSAR CAN Network Management + * AUTOSAR Release 3.0 + * + *********************************************************************************************************************/ +#include "Can_BusOff.h" +#include "CanIf.h" +#include "Can.h" +#include "Com_Cfg.h" +#include "CanNm.h" +#include "Com.h" +STATIC VAR(uint8_t, CAN_BUSOFF_PRIVATE_DATA) BusOffFlagAry[CAN_USED_CONTROLLER_NUM]; +STATIC VAR(uint8, CAN_BUSOFF_PRIVATE_DATA) nubNmBusOffCntAry[CAN_USED_CONTROLLER_NUM]; +STATIC VAR(uint8, CAN_BUSOFF_PRIVATE_DATA) nmStatusErrRestoringAry[CAN_USED_CONTROLLER_NUM]; +STATIC VAR(uint8, CAN_BUSOFF_PRIVATE_DATA) nmStatusSlowRecoveryAry[CAN_USED_CONTROLLER_NUM]; +STATIC VAR(uint8, CAN_BUSOFF_PRIVATE_DATA) NMBusErrorAry[CAN_USED_CONTROLLER_NUM]; +STATIC VAR(nmTimerCntType, CAN_BUSOFF_PRIVATE_DATA) nmTimerCntTbusoffAry[CAN_USED_CONTROLLER_NUM]; + +static FUNC(void, CAN_BUSOFF_PRIVATE_CODE) NmCanBusOffCheckFun(const uint16_t CurChannel); + + + +/* BEGIN_FUNCTION_HDR +******************************************************************************** +* Function Name: CAN_BusOff_Init +* +* Description: bus-off +* +* Inputs: None +* +* Outputs: None +* +* Limitations: None +******************************************************************************** +END_FUNCTION_HDR*/ +void CAN_BusOff_Init(void) +{ + uint8_t i; + + for(i = 0; i < CAN_USED_CONTROLLER_NUM; i ++) + { + BusOffFlagAry[i] = 0; + nubNmBusOffCntAry[i] = 0; + nmStatusErrRestoringAry[i] = 0; + nmStatusSlowRecoveryAry[i] = 0; + NMBusErrorAry[i] = 0; + nmTimerCntTbusoffAry[i] = 0; + } +} + +/* BEGIN_FUNCTION_HDR +******************************************************************************** +* Function Name: ApplNmBusOff +* +* Description: bus-off +* +* Inputs: None +* +* Outputs: None +* +* Limitations: None +******************************************************************************** +END_FUNCTION_HDR*/ +void ApplNmBusOff(const uint16_t CurChannel)/*indicates bus off error occured*/ +{ + + (void)CurChannel; + Com_TxStop(); + Com_RxStop(); +} + + +/* BEGIN_FUNCTION_HDR +******************************************************************************** +* Function Name: ApplNmBusOffEnd +* +* Description: bus-off +* +* Inputs: None +* +* Outputs: None +* +* Limitations: None +******************************************************************************** +END_FUNCTION_HDR*/ +void ApplNmBusOffEnd(const uint16_t CurChannel)/*indicates bus off error occured*/ +{ + + (void)CurChannel; + Com_TxStart(); + Com_RxStart(); +} + +/* BEGIN_FUNCTION_HDR +******************************************************************************** +* Function Name: Can_BusOff +* +* Description: bus-off +* +* Inputs: None +* +* Outputs: None +* +* Limitations: None +******************************************************************************** +END_FUNCTION_HDR*/ +FUNC(void, CAN_BUSOFF_PRIVATE_CODE) Can_BusOff(const uint16_t CanControllerId) +{ + + + uint16_t CurChannel; + + CurChannel = CanControllerId; + + nmStatusNMBusOffFlag = 1u; + +} +/*This callback function is performed when busOff recovery successed.*/ +void ApplNmBusOffRecoverySuccess(const uint16_t nmChannelHandle) +{ + uint16_t CurChannel; + CurChannel = nmChannelHandle; + if(1 == nmStatusErrRestoring) + { + /*OsekNm_008*/ + nubNmBusOffCnt = 0; + nmStatusSlowRecovery = 0; + nmStatusErrRestoring = 0; + + } +} + +void ApplNmCanBusOffRecoveryFail(const uint16_t nmChannelHandle) +{ + /*Bus Off recovery failed */ + + + + +} + +/* BEGIN_FUNCTION_HDR +******************************************************************************** +* Function Name: BusErrorRecover +* +* Description: Process the NM when BusOff. +* +* Inputs: initMode +* +* Outputs: None +* +* Limitations: None +******************************************************************************** +END_FUNCTION_HDR*/ +STATIC FUNC(void, CAN_BUSOFF_PRIVATE_CODE) NmBusErrorRecover +( + const uint16_t CurChannel +) +{ + + /*OsekNm_008*/ + (void)CanNm_PassiveStartUp(0); + + nubNmBusOffCnt++; + + nmStatusErrRestoring = 1u; + +#if ( NM_BUSOFF_FAST_RECOVERY_ENABLE != STD_OFF) + + if((nubNmBusOffCnt <= NM_BUSOFF_FAST_RECOVERY_TIMES)&&(0 == nmStatusSlowRecovery)) + { + if(nubNmBusOffCnt == NM_BUSOFF_FAST_RECOVERY_TIMES) + { + /* 1:Fast recover will try last one time,Slow recover will be processed*/ + nmStatusSlowRecovery = 1u; + nubNmBusOffCnt = 0; + } + else + { + + } + nmTimerCntTbusoff = NM_COUNT_FAST_TBUSOFF; + /*CallBack function, inform Application Bus off*/ + ApplNmBusOff(CurChannel); + + } + else if(nubNmBusOffCnt <= NM_BUSOFF_SLOW_RECOVERY_TIMES) +#else + if(nubNmBusOffCnt <= NM_BUSOFF_SLOW_RECOVERY_TIMES) +#endif + { + /*OsekNm_006*/ + nmTimerCntTbusoff = NM_COUNT_SLOW_TBUSOFF; + + /*CallBack function, inform Application Bus off*/ + ApplNmBusOff(CurChannel); + } + else + { + nubNmBusOffCnt = 0; + /*process fast recover first*/ + nmStatusSlowRecovery = 0u; + ApplNmCanBusOffRecoveryFail(CurChannel); + } + +} +/* BEGIN_FUNCTION_HDR +******************************************************************************** +* Function Name: NmTerrTimeOutProc +* +* Description: Carry out this event Function when Time-out Terr +* +* Inputs: None +* +* Outputs: None +* +* Limitations: None +******************************************************************************** +END_FUNCTION_HDR*/ +STATIC FUNC(void, CAN_BUSOFF_PRIVATE_CODE) NmTerrTimeOutProc +( + const uint16_t CurChannel +) +{ + Nm_StateType nmCurState_Par; + Nm_ModeType nmCurMode_Par; + + uint32_t primask; + BusOffCanInterruptDisable(); + + + /*OsekNm_004 end*/ + if(1u == nmStatusNMBusError ) + { + nmStatusNMBusError = 0; + /*clear CAN driver buffer*/ + NmCanClearBuffer(CurChannel); + /*OsekNm_008 start*/ + NMBusErrorCanInit(CurChannel); + NMBusErrorCanStart(CurChannel); + ApplNmBusOffEnd(CurChannel); + + /* enable application communication (D_online) */ + (void)NmCanTxOnline(CurChannel); + /*OsekNm_008 end*/ + } + else + { + /*nothing to do*/ + } + + Com_Transmit(0,&COM_TxDataPtr[0]); + + + BusOffCanInterruptRestore(); +} + +/* BEGIN_FUNCTION_HDR +******************************************************************************** +* Function Name: NmTbusOffRecoveryTimeOutProc +* +* Description: BusOff recovery process +* +* Inputs: None +* +* Outputs: None +* +* Limitations: None +******************************************************************************** +END_FUNCTION_HDR*/ +/*OsekNm_006*/ +STATIC FUNC(void, CAN_BUSOFF_PRIVATE_CODE) NmTBusOffRecoveryTimeOutProc +( + const uint16_t CurChannel +) +{ + NmTerrTimeOutProc(CurChannel); +} +/* BEGIN_FUNCTION_HDR +******************************************************************************** +* Function Name: NmTimerTTxCntFun +* +* Description: bus-off timer function +* +* Inputs: None +* +* Outputs: None +* +* Limitations: None +******************************************************************************** +END_FUNCTION_HDR*/ +/*OsekNm_006*/ +STATIC FUNC(void, CAN_BUSOFF_PRIVATE_CODE) NmTimerTBusOffCntFun +( + const uint16_t CurChannel +) +{ + uint32_t primask; + BusOffCanInterruptDisable(); + + if(nmTimerCntTbusoff != 0) + { + nmTimerCntTbusoff--; + + if(0 == nmTimerCntTbusoff) + { + NmTBusOffRecoveryTimeOutProc(CurChannel); + } + else + { + /* do nothing */ + } + } + else + { + /* do nothing */ + } + BusOffCanInterruptRestore(); +} +/* BEGIN_FUNCTION_HDR +******************************************************************************** +* Function Name: CanBusOffMainFunction +* +* Description: bus-off +* +* Inputs: None +* +* Outputs: None +* +* Limitations: None +******************************************************************************** +END_FUNCTION_HDR*/ +FUNC(void, CAN_BUSOFF_PRIVATE_CODE) CanBusOffMainFunction(void) +{ + NmCanBusOffCheckFun(0); + NmTimerTBusOffCntFun(0); +} + + + +/* BEGIN_FUNCTION_HDR +******************************************************************************** +* Function Name: CanBusOffCheckFun +* +* Description: bus-off +* +* Inputs: None +* +* Outputs: None +* +* Limitations: None +******************************************************************************** +END_FUNCTION_HDR*/ +static FUNC(void, CAN_BUSOFF_PRIVATE_CODE) NmCanBusOffCheckFun(const uint16_t CurChannel) +{ + uint32_t primask; + + if(1 == nmStatusNMBusOffFlag) + { + BusOffCanInterruptDisable(); + + (void)NmCanTxOffline(CurChannel); + + nmStatusNMBusOffFlag = 0; + nmStatusNMBusError = 1; + + NmCanClearBuffer(CurChannel); +// NMBusErrorCanInit(CurChannel); +// NMBusErrorCanStart(CurChannel); + /*Bus off recovery*/ + NmBusErrorRecover(CurChannel); + + BusOffCanInterruptRestore(); + } + else + { + /*do nothing*/ + } + +} diff --git a/code_app_out/Source/module/BusOff/Can_BusOff.h b/code_app_out/Source/module/BusOff/Can_BusOff.h new file mode 100644 index 0000000..403f1b4 --- /dev/null +++ b/code_app_out/Source/module/BusOff/Can_BusOff.h @@ -0,0 +1,53 @@ + +/********************************************************************************************************************** + * COPYRIGHT + * ------------------------------------------------------------------------------------------------------------------- + * \verbatim + * Copyright (c) 2007-2014 by Vector Informatik GmbH. All rights reserved. + * + * This software is copyright protected and proprietary to Vector Informatik GmbH. + * Vector Informatik GmbH grants to you only those rights as set out in the license conditions. + * All other rights remain with Vector Informatik GmbH. + * \endverbatim + * ------------------------------------------------------------------------------------------------------------------- + * FILE DESCRIPTION + * ------------------------------------------------------------------------------------------------------------------- + * File: CanNm.h + * Component: AUTOSAR CAN Network Management + * Module: AUTOSAR Network Management + * Generator: - + * + * Description: Header of AUTOSAR CAN Network Management + * AUTOSAR Release 3.0 + * + *********************************************************************************************************************/ +#ifndef CAN_BUS_OFF_H +#define CAN_BUS_OFF_H + +#include "mf_config.h" +#include "fm33lg0xx_fl.h" +#include "Can_BusOffCfg.h" + +#define CAN_BUSOFF_PRIVATE_CODE +#define CAN_BUSOFF_PRIVATE_DATA + + +#define nmStatusNMBusOffFlag BusOffFlagAry[CurChannel] +#define nubNmBusOffCnt nubNmBusOffCntAry[CurChannel] +#define nmStatusErrRestoring nmStatusErrRestoringAry[CurChannel] +#define NM_BUSOFF_FAST_RECOVERY_TIMES nmBusOffFastRecoveryAry[CurChannel] +#define nmStatusSlowRecovery nmStatusSlowRecoveryAry[CurChannel] +#define nmTimerCntTbusoff nmTimerCntTbusoffAry[CurChannel] +#define NM_BUSOFF_SLOW_RECOVERY_TIMES nmBusOffSlowRecoveryAry[CurChannel] +#define nmStatusNMBusError NMBusErrorAry[CurChannel] + +#define NM_COUNT_FAST_TBUSOFF \ + (nmCountBusoffFastTimerAry[CurChannel]/NM_MAINFUNCTION_PERIOD) +#define NM_COUNT_SLOW_TBUSOFF \ + (nmCountBusoffSlowTimerAry[CurChannel]/NM_MAINFUNCTION_PERIOD) + +extern FUNC(void, CAN_BUSOFF_PRIVATE_CODE) Can_BusOff(const uint16_t CanControllerId); +extern FUNC(void, CAN_BUSOFF_PRIVATE_CODE) CanBusOffMainFunction(void); +extern void ApplNmBusOffRecoverySuccess(const uint16_t nmChannelHandle); +extern void CAN_BusOff_Init(void); +#endif diff --git a/code_app_out/Source/module/BusOff/Can_BusOffCfg.c b/code_app_out/Source/module/BusOff/Can_BusOffCfg.c new file mode 100644 index 0000000..38e3d6b --- /dev/null +++ b/code_app_out/Source/module/BusOff/Can_BusOffCfg.c @@ -0,0 +1,52 @@ +/********************************************************************************************************************** + * COPYRIGHT + * ------------------------------------------------------------------------------------------------------------------- + * \verbatim + * Copyright (c) 2007-2014 by Vector Informatik GmbH. All rights reserved. + * + * This software is copyright protected and proprietary to Vector Informatik GmbH. + * Vector Informatik GmbH grants to you only those rights as set out in the license conditions. + * All other rights remain with Vector Informatik GmbH. + * \endverbatim + * ------------------------------------------------------------------------------------------------------------------- + * FILE DESCRIPTION + * ------------------------------------------------------------------------------------------------------------------- + * File: CanNm.c + * Component: AUTOSAR CAN Network Management + * Module: AUTOSAR Network Management + * Generator: - + * + * Description: Source of AUTOSAR CAN Network Management + * AUTOSAR Release 3.0 + * + *********************************************************************************************************************/ +#include "Can_BusOffCfg.h" + + + +/*Fast Recover times*/ +CONST(uint16,CAN_BUSOFF_CONFIG_CONST) + nmBusOffFastRecoveryAry[CAN_USED_CONTROLLER_NUM] = +{ + 10 +}; + +/*Slow Recover times*/ +CONST(uint16,CAN_BUSOFF_CONFIG_CONST) + nmBusOffSlowRecoveryAry[CAN_USED_CONTROLLER_NUM] = +{ + 0xffff +}; + + +CONST(nmTimerCntType,CAN_BUSOFF_CONFIG_CONST) + nmCountBusoffFastTimerAry[CAN_USED_CONTROLLER_NUM] = +{ + 100 +}; + +CONST(nmTimerCntType,CAN_BUSOFF_CONFIG_CONST) + nmCountBusoffSlowTimerAry[CAN_USED_CONTROLLER_NUM] = +{ + 1000 +}; \ No newline at end of file diff --git a/code_app_out/Source/module/BusOff/Can_BusOffCfg.h b/code_app_out/Source/module/BusOff/Can_BusOffCfg.h new file mode 100644 index 0000000..786f348 --- /dev/null +++ b/code_app_out/Source/module/BusOff/Can_BusOffCfg.h @@ -0,0 +1,72 @@ + +/********************************************************************************************************************** + * COPYRIGHT + * ------------------------------------------------------------------------------------------------------------------- + * \verbatim + * Copyright (c) 2007-2014 by Vector Informatik GmbH. All rights reserved. + * + * This software is copyright protected and proprietary to Vector Informatik GmbH. + * Vector Informatik GmbH grants to you only those rights as set out in the license conditions. + * All other rights remain with Vector Informatik GmbH. + * \endverbatim + * ------------------------------------------------------------------------------------------------------------------- + * FILE DESCRIPTION + * ------------------------------------------------------------------------------------------------------------------- + * File: CanNm.h + * Component: AUTOSAR CAN Network Management + * Module: AUTOSAR Network Management + * Generator: - + * + * Description: Header of AUTOSAR CAN Network Management + * AUTOSAR Release 3.0 + * + *********************************************************************************************************************/ +#ifndef CAN_BUS_OFF_CFG_H +#define CAN_BUS_OFF_CFG_H + +#include "ComStack_Types.h" +#include "Can_Cfg.h" + + +#define CAN_BUSOFF_CONFIG_CONST + +typedef uint16 nmTimerCntType; + +#define NM_MAINFUNCTION_PERIOD (5) + +#define BusOffCanInterruptRestore() \ + Can_EnableGlobalInterrupts() +#define BusOffCanInterruptDisable() \ + Can_DisableGlobalInterrupts() + +#define NM_BUSOFF_FAST_RECOVERY_ENABLE (STD_ON) + +#define NmCanTxOffline(NmChanneld) \ + CanIf_SetPduMode(NmChanneld, CANIF_SET_TX_OFFLINE) + +#define NmCanTxOnline(NmChanneld) \ + CanIf_SetPduMode(NmChanneld, CANIF_SET_TX_ONLINE) + + +#define NmCanClearBuffer(NmChanneld) \ + CanIf_ClearTransmitBuffer(NmChanneld) + + +#define NMBusErrorCanInit(NmChanneld) \ + Can_InitController(((NmChanneld)),\ + (P2VAR(Can_ControllerBaudrateConfigType, AUTOMATIC, CAN_CONFIG_CONST))(0)) + +#define NMBusErrorCanStart(NmChanneld) \ + (void)CanIf_SetControllerMode(NmChanneld,CANIF_CS_STARTED) + + + +extern CONST(uint16,CAN_BUSOFF_CONFIG_CONST) + nmBusOffFastRecoveryAry[CAN_USED_CONTROLLER_NUM]; +extern CONST(nmTimerCntType,CAN_BUSOFF_CONFIG_CONST) + nmCountBusoffFastTimerAry[CAN_USED_CONTROLLER_NUM]; +extern CONST(uint16,CAN_BUSOFF_CONFIG_CONST) + nmBusOffSlowRecoveryAry[CAN_USED_CONTROLLER_NUM]; +extern CONST(nmTimerCntType,CAN_BUSOFF_CONFIG_CONST) + nmCountBusoffSlowTimerAry[CAN_USED_CONTROLLER_NUM]; +#endif \ No newline at end of file diff --git a/code_app_out/Source/module/calibration/calibration.c b/code_app_out/Source/module/calibration/calibration.c new file mode 100644 index 0000000..aebeb24 --- /dev/null +++ b/code_app_out/Source/module/calibration/calibration.c @@ -0,0 +1,565 @@ +/** + * @copyright: KUWE technologies Co.,Ltd. 2013-2015. all rights reserved. + * @file: calibration.h + * @brief: This file contains all the functions prototypes for the calibration. + * @author: + * @version: V1.0.0 + * @date: 2016-03-31 + * @history: + * 1. + * author: + * version: + * date: + * modification: + */ +#include "error.h" +#include "calibration.h" +#include "cpu.h" +#include "nvm.h" +#include "key_app.h" + + +//110078209 +#ifdef __ICCARM__ +MEMORY_MAP_FLAG_NO_OPTIME const u8 g_sysdid_f182[SYSDID_F182_CK_LEN] @SYSDID_F182_ADDR = +#else +MEMORY_MAP_FLAG_NO_OPTIME const u8 g_sysdid_f182[SYSDID_F182_CK_LEN] __attribute__((at(SYSDID_F182_ADDR)))= +//const u8 g_sysdid_f182[SYSDID_F182_CK_LEN] __attribute__((at(0x00015BCC)))= +#endif +{ + 0x30,0x30,0x30,0x30,0x30,0x31,0x31,0x30,0x30,0x37,0x38,0x32,0x30,0x39,0x00, +}; + +#ifdef __ICCARM__ +MEMORY_MAP_FLAG_NO_OPTIME const u8 g_sysdid_f187[SYSDID_F187_CK_LEN] @SYSDID_F187_ADDR = +#else +MEMORY_MAP_FLAG_NO_OPTIME const u8 g_sysdid_f187[SYSDID_F187_CK_LEN] __attribute__((at(SYSDID_F187_ADDR)))= +#endif +{ + 0x30,0x31,0x31,0x30,0x30,0x37,0x38,0x32,0x30,0x37,0x2fu,0x30,0x30,0x31,0x00 +}; + +#ifdef __ICCARM__ +MEMORY_MAP_FLAG_NO_OPTIME const u8 g_sysdid_f188[SYSDID_F188_CK_LEN] @SYSDID_F188_ADDR = +#else +MEMORY_MAP_FLAG_NO_OPTIME const u8 g_sysdid_f188[SYSDID_F188_CK_LEN] __attribute__((at(SYSDID_F188_ADDR)))= +#endif +{ + 0x30,0x31,0x31,0x30,0x30,0x37,0x38,0x32,0x30,0x38,0x2fu,0x30,0x30,0x31,0x00 +}; + +#ifdef __ICCARM__ +MEMORY_MAP_FLAG_NO_OPTIME const u8 g_sysdid_f18a[SYSDID_F18A_CK_LEN] @SYSDID_F18A_ADDR = +#else +MEMORY_MAP_FLAG_NO_OPTIME const u8 g_sysdid_f18a[SYSDID_F18A_CK_LEN] __attribute__((at(SYSDID_F18A_ADDR)))= +#endif +{ + 0x35,0x30,0x32,0x32,0x30,0x38,0x00, +}; + +#ifdef __ICCARM__ +MEMORY_MAP_FLAG_NO_OPTIME const u8 g_sysdid_f18b[SYSDID_F18B_CK_LEN] @SYSDID_F18B_ADDR = +#else +MEMORY_MAP_FLAG_NO_OPTIME const u8 g_sysdid_f18b[SYSDID_F18B_CK_LEN] __attribute__((at(SYSDID_F18B_ADDR)))= +#endif +{ + 0x20,0x21,0x05,0x08,0x00, +}; + +#ifdef __ICCARM__ +MEMORY_MAP_FLAG_NO_OPTIME const u8 g_sysdid_f18c[SYSDID_F18C_CK_LEN] @SYSDID_F18C_ADDR = +#else +MEMORY_MAP_FLAG_NO_OPTIME const u8 g_sysdid_f18c[SYSDID_F18C_CK_LEN] __attribute__((at(SYSDID_F18C_ADDR)))= +#endif +{ + 0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x00, +}; + +//656106800A 110008086 0110008086/001 +#ifdef __ICCARM__ +MEMORY_MAP_FLAG_NO_OPTIME const u8 g_sysdid_f191[SYSDID_F191_CK_LEN] @SYSDID_F191_ADDR = +#else +MEMORY_MAP_FLAG_NO_OPTIME const u8 g_sysdid_f191[SYSDID_F191_CK_LEN] __attribute__((at(SYSDID_F191_ADDR)))= +#endif +{ + 0x30,0x31,0x31,0x30,0x30,0x30,0x38,0x30,0x38,0x36,0x2fu,0x30,0x30,0x01,0x00 +}; + +#ifdef __ICCARM__ +MEMORY_MAP_FLAG_NO_OPTIME const u8 g_sysdid_f192[SYSDID_F192_CK_LEN] @SYSDID_F192_ADDR = +#else +MEMORY_MAP_FLAG_NO_OPTIME const u8 g_sysdid_f192[SYSDID_F192_CK_LEN] __attribute__((at(SYSDID_F192_ADDR)))= +#endif +{ + + 'U','K','E','A','-','7','7','J','S','W','0','4','0','2','_','2','5','0','2','2','8','_','H','1',0x00u + +}; + +#ifdef __ICCARM__ +MEMORY_MAP_FLAG_NO_OPTIME const u8 g_sysdid_f193[SYSDID_F193_CK_LEN] @SYSDID_F193_ADDR = +#else +MEMORY_MAP_FLAG_NO_OPTIME const u8 g_sysdid_f193[SYSDID_F193_CK_LEN] __attribute__((at(SYSDID_F193_ADDR)))= +#endif +{ + #if 0 + //'V','1','.','0','-',0x32,0x30,0x32,0x31,0x30,0x34,0x31,0x34,0x30,0x00, + 0x56u,0x31u,0x2eu,0x30u,0x2du,0x32u,0x30u,0x32u,0x31u,0x30u,0x34u,0x31u,0x34u,0x30u,0x00u + #else + 1,23,4,14,0,0, + #endif +}; + +#ifdef __ICCARM__ +MEMORY_MAP_FLAG_NO_OPTIME const u8 g_sysdid_f194[SYSDID_F194_CK_LEN] @SYSDID_F194_ADDR = +#else +MEMORY_MAP_FLAG_NO_OPTIME const u8 g_sysdid_f194[SYSDID_F194_CK_LEN] __attribute__((at(SYSDID_F194_ADDR)))= +#endif +{ + //0x4Du,0x54u,0x00u,0x11u,0x99u,0x1Eu,0x00u,0x00u,0x02u,0x6B //最后一个字节校验码，方式是全字节累加 + 0x4Du,0x54u,0x00u,0x10u,0xADu,0x1Eu,0x00u,0x00u,0x01u,0x7Du //最后一个字节校验码，方式是全字节累加--UKEA-C的编码 +}; + +#ifdef __ICCARM__ +MEMORY_MAP_FLAG_NO_OPTIME const u8 g_sysdid_f195[SYSDID_F195_CK_LEN] @SYSDID_F195_ADDR = +#else +MEMORY_MAP_FLAG_NO_OPTIME const u8 g_sysdid_f195[SYSDID_F195_CK_LEN] __attribute__((at(SYSDID_F195_ADDR)))= +#endif +{ + 0x9Cu,0x42u,0x19u,0x02u,0x1Cu,0x00u,0x00u, +}; + + + +#ifdef __ICCARM__ +MEMORY_MAP_FLAG_NO_OPTIME const u8 g_sysdid_f1f1[SYSDID_F1F1_CK_LEN] @SYSDID_F1F1_ADDR = +#else +MEMORY_MAP_FLAG_NO_OPTIME const u8 g_sysdid_f1f1[SYSDID_F1F1_CK_LEN] __attribute__((at(SYSDID_F1F1_ADDR)))= +#endif +{ + 0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x00, +}; + +#ifdef __ICCARM__ +MEMORY_MAP_FLAG_NO_OPTIME const u8 g_sysdid_f19e[SYSDID_F19E_CK_LEN] @SYSDID_F19E_ADDR= +#else +MEMORY_MAP_FLAG_NO_OPTIME const u8 g_sysdid_f19e[SYSDID_F19E_CK_LEN] __attribute__((at(SYSDID_F19E_ADDR)))= +#endif +{ + 0x30,0x30,0x30,0x30,0x30,0x31,0x31,0x30,0x30,0x37,0x38,0x32,0x31,0x31,0x00, +}; + +#if 1 +#ifdef __ICCARM__ +MEMORY_MAP_FLAG_NO_OPTIME const u8 eeprom_flag_first_reset[4] @(EEPROM_FLAG_FIRST_ADDR) ;//= EEPROM_FLAG_NOT_FIRST_RESET; +#else +MEMORY_MAP_FLAG_NO_OPTIME const u8 eeprom_flag_first_reset[4] __attribute__((at(EEPROM_FLAG_FIRST_ADDR)))= EEPROM_FLAG_NOT_FIRST_RESET; +#endif +#endif + + +//當節點丟失後，收到N幀，認為清除DTC +#ifdef __ICCARM__ +MEMORY_MAP_FLAG_NO_OPTIME const u8 g_dtc_loss_recover_times[DTC_LOSS_RECOVER_TIMES_CK_LEN] @DTC_LOSS_RECOVER_TIMES_ADDR= +#else +MEMORY_MAP_FLAG_NO_OPTIME const u8 g_dtc_loss_recover_times[DTC_LOSS_RECOVER_TIMES_CK_LEN] __attribute__((at(DTC_LOSS_RECOVER_TIMES_ADDR)))= +#endif +{ + 3, //第一个参数是表示节点丢失后，要恢复的满足的次数3次， + 10, //第二个参数是checksum错误和恢复的总计数 + 10, //第三个参数是rolling count错误的总计数 + 3, //第四个参数是rollingcount相差的个数 + 0x00 +}; + + +//各 DATA ID +#if 0 +const u16 g_data_id_cfg[E2E_DATA_ID_U16_CK_LEN] @E2E_DATA_ID_ADDR = +{ + CAN_TX_DATAID_SWS_LEFT, + CAN_TX_DATAID_SWS_RIGHT, + CAN_RX_DATAID_BCM_STA, + CAN_RX_DATAID_ADAS_HWA, + 0, +}; +//當節點丟失後，收到N幀，認為清除DTC +const u16 g_key_cfg_times1[KEY_TIME_CFG_U16_CK_LEN] @KEY_TIME_CFG_ADDR= +{ + 0u,//KEY_SCAN_DITHERING_TIME,//第一个参数是数字按键的消抖时间，单位是和key app调用周期相关 + 0u,//KEY_SCAN_STUCK_TIMEOUT,//第二个参数是数字按键的消卡滞时间，单位是和key app调用周期相关 + 0u,//KEY_SCAN_FAULT_TIMEOUT, //故障检测 + 0u,//ADC_KEY_TIME_DEBOUNCE,//第三个参数是ad按键的消抖时间，单位是和key adc mid 调用周期相关 + 0u,//ADC_KEY_TIME_STICKPRESS,//第四个参数是ad按键的卡滞时间，单位是和key adc mid调用周期相关 + 0u,//ADC_KEY_TIME_FAULT, //故障检测 + 0u,//ADC_ASIL_KEY_TIME_DEBOUNCE, //预留给ASILA按键 + 0u,//ADC_ASIL_KEY_TIME_STUCK, //预留给ASILA按键 + 0u,//ADC_ASIL_KEY_TIME_FAULT, //预留给ASILA按键 + 0u +}; +#endif + +MEMORY_MAP_FLAG_NO_OPTIME const u8 g_cfg_supply_info[CFG_SUPPLY_INFO_CK_LEN] @CFG_SUPPLY_INFO_ADDR= // +{ + 1u, //支持level 写入 01a0 + 0u +}; + +MEMORY_MAP_FLAG_NO_OPTIME const u8 g_cfg_speed_limit[CFG_SPEED_LIMIT_CK_LEN] @CFG_SPEED_LIMIT_ADDR= +{ + 0u,//APP_COM_VHSPEED_MIN, + 0u, +}; + +const did_attribute_t did_attribute_table[DID_ATTRIBUTE_TABLE_LENGTH] = +{ + {0xF180u, DID_TYPE_CONST, READ_ONLY, SYSDID_F180_ADDR, SYSDID_F180_CK_LEN}, + {0xF181u, DID_TYPE_CONST, READ_ONLY, SYSDID_F181_ADDR, SYSDID_F181_CK_LEN}, + {0xF1F2u, DID_TYPE_CONST, READ_ONLY, SYSDID_F1F2_ADDR, SYSDID_F1F2_CK_LEN}, + {0xF182u, DID_TYPE_CONST, READ_ONLY, SYSDID_F182_ADDR, SYSDID_F182_CK_LEN}, + {0xF187u, DID_TYPE_CONST, READ_ONLY, SYSDID_F187_ADDR, SYSDID_F187_CK_LEN}, + {0xF188u, DID_TYPE_CONST, READ_ONLY, SYSDID_F188_ADDR, SYSDID_F188_CK_LEN}, + {0xF18Au, DID_TYPE_CONST, READ_ONLY, SYSDID_F18A_ADDR, SYSDID_F18A_CK_LEN}, + {0xF18Bu, DID_TYPE_CONST, READ_ONLY, SYSDID_F18B_ADDR, SYSDID_F18B_CK_LEN}, + {0xF18Cu, DID_TYPE_VOLATILE, READ_AND_WRITE, SYSDID_ECU_SN_ADDR, SYSDID_ECU_SN_CK_LEN}, + {0xF191u, DID_TYPE_CONST, READ_ONLY, SYSDID_F191_ADDR, SYSDID_F191_CK_LEN}, + {0xF192u, DID_TYPE_CONST, READ_ONLY, SYSDID_F192_ADDR, SYSDID_F192_CK_LEN}, + {0xF193u, DID_TYPE_CONST, READ_ONLY, SYSDID_F193_ADDR, SYSDID_F193_CK_LEN}, + {0xF194u, DID_TYPE_CONST, READ_ONLY, SYSDID_F194_ADDR, SYSDID_F194_CK_LEN}, + {0xF195u, DID_TYPE_CONST, READ_ONLY, SYSDID_F195_ADDR, SYSDID_F195_CK_LEN}, //(uint32_t)&g_sysdid_f195[0] + {0xF1F1u, DID_TYPE_CONST, READ_ONLY, SYSDID_F1F1_ADDR, SYSDID_F1F1_CK_LEN}, + {0xF19eu, DID_TYPE_CONST, READ_ONLY, SYSDID_F19E_ADDR, SYSDID_F19E_CK_LEN}, + {0xF1A0u, DID_TYPE_VOLATILE, READ_AND_WRITE, SYSDID_VEHICLE_CONFIG_ADDR, SYSDID_VEHICLE_CONFIG_CK_LEN}, + {0x01A0u, DID_TYPE_VOLATILE, READ_AND_WRITE, SYSDID_MANUFAC_LIFECYCLE_COUNT_ADDR, SYSDID_MANUFAC_LIFECYCLE_COUNT_CK_LEN}, + {0x01B0u, DID_TYPE_VOLATILE, WRITE_ONLY, SYSDID_SECURITY_KEY_ADDR, SYSDID_SECURITY_KEY_CK_LEN}, + {0xF190u, DID_TYPE_VOLATILE, READ_AND_WRITE, SYSDID_F190_VIN_ADDR, SYSDID_F190_VIN_CK_LEN}, + {0xF198u, DID_TYPE_VOLATILE, READ_ONLY, SYSDID_F198_REPAIR_SN_ADDR, SYSDID_F198_REPAIR_SN_CK_LEN}, + {0xF199u, DID_TYPE_VOLATILE, READ_ONLY, SYSDID_F199_DATE_ADDR, SYSDID_F199_DATE_CK_LEN}, + {0xF100u, DID_TYPE_VOLATILE, READ_ONLY, SYSDID_ATTEMP_ADDR, SYSDID_ATTEMP_LEN+SYSDID_ATTEMP_MAX_LEN} +}; + + + +static uint8_t get_did_headler(did_t did) + +{ + uint8_t i; + u8 l_result =0xffu; + for(i = 0; i < DID_ATTRIBUTE_TABLE_LENGTH; i++) + { + if(did == did_attribute_table[i].id) + { + l_result = i; + break; + } + } + return l_result; +} + +u8 cal_read_did(did_t did, uint8_t *p_buf, uint8_t length) +{ + uint8_t headler; + uint8_t opt_length; + u8 l_result = TRUE; + + + + do + { + headler = get_did_headler(did) ; + if( (headler == 0xffu) || (did_attribute_table[headler].rw == WRITE_ONLY) ) + { + l_result = FALSE; + break; + } + + if(length < did_attribute_table[headler].length) + { + opt_length = length; + } + else + { + opt_length = did_attribute_table[headler].length; + } + + CAL_ENTER_CRITICAL(); + #if 0 + for(i = 0; i < opt_length; i++) + { + p_buf[i] = did_attribute_table[headler].addr[i]; + } + #endif + if(did_attribute_table[headler].type == DID_TYPE_CONST) + { + (void)nvm_read_bytes(NVM_TYPE_FLASH,did_attribute_table[headler].phy_addr,p_buf,(u16)opt_length); + } + else + { + (void)nvm_read_bytes(NVM_TYPE_EEPROM,did_attribute_table[headler].phy_addr,p_buf,(u16)opt_length); + } + CAL_EXIT_CRITICAL(); + }while(0); + + return l_result; +} + +volatile uint16_t test1; +u8 cal_write_did(did_t did, const uint8_t *p_buf, uint8_t length) +{ + uint8_t l_result = FALSE; + uint8_t headler; + uint8_t opt_length; + + + do + { + headler = get_did_headler(did) ; + if( (headler == 0xffu) || (did_attribute_table[headler].rw == READ_ONLY)) + { + l_result = FALSE; + break; + } + + if(length < did_attribute_table[headler].length) + { + opt_length = length; + } + else + { + opt_length = did_attribute_table[headler].length; + } + CAL_ENTER_CRITICAL(); + #if 0 + for(i = 0; i < opt_length; i++) + { + did_attribute_table[headler].addr[i] = p_buf[i]; + } + #endif + if(did_attribute_table[headler].type == DID_TYPE_CONST) + { + l_result = TRUE; + //(void)nvm_write_bytes(NVM_TYPE_FLASH,did_attribute_table[headler].phy_addr,p_buf,opt_length); + } + else + { + l_result = nvm_write_bytes(NVM_TYPE_EEPROM,did_attribute_table[headler].phy_addr,(u8*)&p_buf[0],(u16)opt_length); /*PRQA S 0311*/ + if((u8)ERR_OK == l_result) + { + l_result = TRUE; + } + } + CAL_EXIT_CRITICAL(); + }while(0); + + return l_result; +} + +void cal_did_init(void) +{ + uint8_t i; + //u8 j; + //u16_swap_t l_buf[8]; + //u8 l_data[64]; + + + for(i = 0; i < DID_ATTRIBUTE_TABLE_LENGTH; i++) + { + + #ifdef FUN_WDT_ENABLE + wdog_task(); + #endif + + if(did_attribute_table[ i ].type == DID_TYPE_CONST) + { + + continue; + } + CAL_ENTER_CRITICAL(); + + CAL_EXIT_CRITICAL(); + + + } + + //cal_did_test(); +} + + +//static u8 g_cal_refresh_flag = 0u; /*PRQA S 3207*/ + + +/*讀取數據之後的更新*/ +void cal_did_read_refresh(void) +{ + #if 0 + u8 j; + u16_swap_t l_buf[16]={0}; + + if(g_cal_refresh_flag ==0) + { + g_cal_refresh_flag = 1; + + #ifdef FUN_WDT_ENABLE + wdog_task(); + #endif + + #if 1 + /*F180*/ + for(j=0;j<8;j++) + { + #ifdef CAL_USE_NVM + (void)eeprom_get_u16((eeprom_addr_t)(EEPROM_DATA_BASE_ADDR+EEPROM_F180_ADDR+2*j), &l_buf[j].w); + #endif + volatile_did.boot_soft_id[2*j] = l_buf[j].w >> 8; + volatile_did.boot_soft_id[2*j+1] = l_buf[j].w; + } + #endif + + #if 1 + /*F187*/ + for(j=0;j<5;j++) + { + l_buf[j].w = (u16)const_did.geely_spare_part_number[2*j] << 8 | const_did.geely_spare_part_number[2*j+1] ; + #ifdef CAL_USE_NVM + (void)eeprom_set_u16((eeprom_addr_t)(EEPROM_DATA_BASE_ADDR+EEPROM_F187_ADDR+2*j), l_buf[j].w); + #endif + } + #endif + + #if 1 + /*F189*/ + for(j=0;j<8;j++) + { + l_buf[j].w = (u16)const_did.ecu_software_version_number[2*j] << 8 | const_did.ecu_software_version_number[2*j+1] ; + #ifdef CAL_USE_NVM + (void)eeprom_set_u16((eeprom_addr_t)(EEPROM_DATA_BASE_ADDR+EEPROM_F189_ADDR+2*j), l_buf[j].w); + #endif + } + #endif + + #if 1 + + /*F193*/ + for(j=0;j<8;j++) + { + l_buf[j].w = (u16)const_did.system_supplier_ecu_hardware_version_number[2*j] << 8 | const_did.system_supplier_ecu_hardware_version_number[2*j+1] ; + #ifdef CAL_USE_NVM + (void)eeprom_set_u16((eeprom_addr_t)(EEPROM_DATA_BASE_ADDR+EEPROM_F193_ADDR+2*j), l_buf[j].w); + #endif + } + #endif + + + } + #endif +} + + + +/** 判斷數組的值是否都為 value; + * @param Pdata內容 + * @param + * @param + * @return + */ +u8 buf_judge_value_is_same(uc8 *pdata,u8 len ,u8 value) +{ + + u8 l_result = TRUE; + + u8 i; + + for(i=0;i
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+ ****************************************************************************** + * @History: + * @Author: + * @Data: + * @Version: +*/ + +#include "crc.h" +#include "common_types.h" + + +#ifdef CRC_USE_TABLE +#define CRC8_BIT(x) (1u << (x)) + +#ifdef CRC_TABLE_IS_CONST + +MEMORY_MAP_ROM_DATA_FOR_ASIL const u8 crc8_table[CRC8_ID_MAX][256]= +{ + { //多项式 1D 初始化值 FF 异或值 FF + 0x00, 0x1D, 0x3A, 0x27, 0x74, 0x69, 0x4E, 0x53, 0xE8, 0xF5, 0xD2, 0xCF, 0x9C, 0x81, 0xA6, 0xBB, + 0xCD, 0xD0, 0xF7, 0xEA, 0xB9, 0xA4, 0x83, 0x9E, 0x25, 0x38, 0x1F, 0x02, 0x51, 0x4C, 0x6B, 0x76, + 0x87, 0x9A, 0xBD, 0xA0, 0xF3, 0xEE, 0xC9, 0xD4, 0x6F, 0x72, 0x55, 0x48, 0x1B, 0x06, 0x21, 0x3C, + 0x4A, 0x57, 0x70, 0x6D, 0x3E, 0x23, 0x04, 0x19, 0xA2, 0xBF, 0x98, 0x85, 0xD6, 0xCB, 0xEC, 0xF1, + 0x13, 0x0E, 0x29, 0x34, 0x67, 0x7A, 0x5D, 0x40, 0xFB, 0xE6, 0xC1, 0xDC, 0x8F, 0x92, 0xB5, 0xA8, + 0xDE, 0xC3, 0xE4, 0xF9, 0xAA, 0xB7, 0x90, 0x8D, 0x36, 0x2B, 0x0C, 0x11, 0x42, 0x5F, 0x78, 0x65, + 0x94, 0x89, 0xAE, 0xB3, 0xE0, 0xFD, 0xDA, 0xC7, 0x7C, 0x61, 0x46, 0x5B, 0x08, 0x15, 0x32, 0x2F, + 0x59, 0x44, 0x63, 0x7E, 0x2D, 0x30, 0x17, 0x0A, 0xB1, 0xAC, 0x8B, 0x96, 0xC5, 0xD8, 0xFF, 0xE2, + 0x26, 0x3B, 0x1C, 0x01, 0x52, 0x4F, 0x68, 0x75, 0xCE, 0xD3, 0xF4, 0xE9, 0xBA, 0xA7, 0x80, 0x9D, + 0xEB, 0xF6, 0xD1, 0xCC, 0x9F, 0x82, 0xA5, 0xB8, 0x03, 0x1E, 0x39, 0x24, 0x77, 0x6A, 0x4D, 0x50, + 0xA1, 0xBC, 0x9B, 0x86, 0xD5, 0xC8, 0xEF, 0xF2, 0x49, 0x54, 0x73, 0x6E, 0x3D, 0x20, 0x07, 0x1A, + 0x6C, 0x71, 0x56, 0x4B, 0x18, 0x05, 0x22, 0x3F, 0x84, 0x99, 0xBE, 0xA3, 0xF0, 0xED, 0xCA, 0xD7, + 0x35, 0x28, 0x0F, 0x12, 0x41, 0x5C, 0x7B, 0x66, 0xDD, 0xC0, 0xE7, 0xFA, 0xA9, 0xB4, 0x93, 0x8E, + 0xF8, 0xE5, 0xC2, 0xDF, 0x8C, 0x91, 0xB6, 0xAB, 0x10, 0x0D, 0x2A, 0x37, 0x64, 0x79, 0x5E, 0x43, + 0xB2, 0xAF, 0x88, 0x95, 0xC6, 0xDB, 0xFC, 0xE1, 0x5A, 0x47, 0x60, 0x7D, 0x2E, 0x33, 0x14, 0x09, + 0x7F, 0x62, 0x45, 0x58, 0x0B, 0x16, 0x31, 0x2C, 0x97, 0x8A, 0xAD, 0xB0, 0xE3, 0xFE, 0xD9, 0xC4 + }, + { //多项式 1D 初始化值 00 异或值 00 + 0x00, 0x1D, 0x3A, 0x27, 0x74, 0x69, 0x4E, 0x53, 0xE8, 0xF5, 0xD2, 0xCF, 0x9C, 0x81, 0xA6, 0xBB, + 0xCD, 0xD0, 0xF7, 0xEA, 0xB9, 0xA4, 0x83, 0x9E, 0x25, 0x38, 0x1F, 0x02, 0x51, 0x4C, 0x6B, 0x76, + 0x87, 0x9A, 0xBD, 0xA0, 0xF3, 0xEE, 0xC9, 0xD4, 0x6F, 0x72, 0x55, 0x48, 0x1B, 0x06, 0x21, 0x3C, + 0x4A, 0x57, 0x70, 0x6D, 0x3E, 0x23, 0x04, 0x19, 0xA2, 0xBF, 0x98, 0x85, 0xD6, 0xCB, 0xEC, 0xF1, + 0x13, 0x0E, 0x29, 0x34, 0x67, 0x7A, 0x5D, 0x40, 0xFB, 0xE6, 0xC1, 0xDC, 0x8F, 0x92, 0xB5, 0xA8, + 0xDE, 0xC3, 0xE4, 0xF9, 0xAA, 0xB7, 0x90, 0x8D, 0x36, 0x2B, 0x0C, 0x11, 0x42, 0x5F, 0x78, 0x65, + 0x94, 0x89, 0xAE, 0xB3, 0xE0, 0xFD, 0xDA, 0xC7, 0x7C, 0x61, 0x46, 0x5B, 0x08, 0x15, 0x32, 0x2F, + 0x59, 0x44, 0x63, 0x7E, 0x2D, 0x30, 0x17, 0x0A, 0xB1, 0xAC, 0x8B, 0x96, 0xC5, 0xD8, 0xFF, 0xE2, + 0x26, 0x3B, 0x1C, 0x01, 0x52, 0x4F, 0x68, 0x75, 0xCE, 0xD3, 0xF4, 0xE9, 0xBA, 0xA7, 0x80, 0x9D, + 0xEB, 0xF6, 0xD1, 0xCC, 0x9F, 0x82, 0xA5, 0xB8, 0x03, 0x1E, 0x39, 0x24, 0x77, 0x6A, 0x4D, 0x50, + 0xA1, 0xBC, 0x9B, 0x86, 0xD5, 0xC8, 0xEF, 0xF2, 0x49, 0x54, 0x73, 0x6E, 0x3D, 0x20, 0x07, 0x1A, + 0x6C, 0x71, 0x56, 0x4B, 0x18, 0x05, 0x22, 0x3F, 0x84, 0x99, 0xBE, 0xA3, 0xF0, 0xED, 0xCA, 0xD7, + 0x35, 0x28, 0x0F, 0x12, 0x41, 0x5C, 0x7B, 0x66, 0xDD, 0xC0, 0xE7, 0xFA, 0xA9, 0xB4, 0x93, 0x8E, + 0xF8, 0xE5, 0xC2, 0xDF, 0x8C, 0x91, 0xB6, 0xAB, 0x10, 0x0D, 0x2A, 0x37, 0x64, 0x79, 0x5E, 0x43, + 0xB2, 0xAF, 0x88, 0x95, 0xC6, 0xDB, 0xFC, 0xE1, 0x5A, 0x47, 0x60, 0x7D, 0x2E, 0x33, 0x14, 0x09, + 0x7F, 0x62, 0x45, 0x58, 0x0B, 0x16, 0x31, 0x2C, 0x97, 0x8A, 0xAD, 0xB0, 0xE3, 0xFE, 0xD9, 0xC4 + } +}; + +#else + +MEMORY_MAP_RAM_FOR_ASIL ENABLE_STATIC_FOR_ASIL u8 crc8_table[CRC8_ID_MAX][256] = {0u}; + +#endif + +typedef struct +{ + u8 width; + u8 poly; + u8 init; + u8 refin; + u8 refout; + u8 xorout; +}crc8_info_s; + +MEMORY_MAP_RAM_FOR_ASIL ENABLE_STATIC_FOR_ASIL crc8_info_s crc_struct[CRC8_ID_MAX] = +{ + {8, CRC8_L1_POLY_VALUE, CRC8_L1_INIT_VALUE, 0, 0, CRC8_L1_XOR_VALUE}, //CRC8_SAE J1850 + {8, CRC8_L2_POLY_VALUE, CRC8_L2_INIT_VALUE, 0, 0, CRC8_L2_XOR_VALUE}, //CRC8_SAE J1850 +}; + + +//位逆转 +MEMORY_MAP_ROM_FOR_ASIL u8 crc8_reflected(u8 input_value, u8 bits) +{ + u8 var = 0u; + u8 l_bits = bits; + while(l_bits) + { + l_bits -= 1u; + var <<= 1; + if (input_value & 0x01u) + { + var |= 1u; + } + input_value >>= 1u; + } + return var; +} + +MEMORY_MAP_ROM_FOR_ASIL void crc8_table_init(u8 id) /*PRQA S 3206*/ /*CRC_TABLE_IS_CONST开着引起的*/ +{ + #ifdef CRC_TABLE_IS_CONST + + #else + + u16 i; + u8 j; + u8 poly, value; + u8 valid_bits; + u8 l_bit ; + + if(id> 1u) ^ poly; + } + else + { + value = (value >> 1u); + } + } + crc8_table[id][i] = value & valid_bits; + } + } + //正序MSB输入 + else + { + //如果位数小于8，poly要左移到最高位 + poly = crc_struct[id].width < 8u ? crc_struct[id].poly << (8u - crc_struct[id].width) : crc_struct[id].poly; + l_bit = crc_struct[id].width > 8u ? CRC8_BIT(crc_struct[id].width - 1u) : 0x80u; + + for (i = 0u; i < 256u; i++) + { + value = crc_struct[id].width > 8u ? i << (crc_struct[id].width - 8u) : i; + for (j = 0u; j < 8u; j++) + { + if (value & l_bit) + { + value = (value << 1) ^ poly; + } + else + { + value = (value << 1); + } + } + //如果width < 8，那么实际上，crc是在高width位的，需要右移 8 - width + //但是为了方便后续异或（还是要移位到最高位与*ptr的bit7对齐），所以不处理 + // if (info->width < 8) + // value >>= 8 - info->width; + // crc8_table[id][i] = value & (2 << (info->width - 1)) - 1); + + [id][i] = value & (crc_struct[id].width < 8u ? 0xff : valid_bits); + } + } + } + #endif +} + + + +MEMORY_MAP_ROM_FOR_ASIL u8 crc8_table_set_init_value(u8 id,u8 value) +{ + if(id
© COPYRIGHT 2021
+ ****************************************************************************** + * @History: + * @Author: + * @Data: + * @Version: +*/ +#ifndef _CRC_H_ +#define _CRC_H_ + +#include "common_types.h" +#include "common_cfg.h" + +//#define CRC8_ID_FOR_SBC 0 +#define CRC8_ID_FOR_E2E_L1 0u +#define CRC8_ID_FOR_E2E_L2 1u + +#define CRC8_ID_MAX 2u + + //{8, 0x1d, 0x00, 0, 0, 0x00}, //CRC8_SAE J1850 +#define CRC8_L1_INIT_VALUE 0XFFu //调试的板子是H +#define CRC8_L1_POLY_VALUE 0x1Du +#define CRC8_L1_XOR_VALUE 0XFFu + +#define CRC8_L2_INIT_VALUE 0X00u //调试的板子是H +#define CRC8_L2_POLY_VALUE 0x1Du +#define CRC8_L2_XOR_VALUE 0X00u + +#define CRC_TABLE_IS_CONST 1u //crc 表，固定数组值 + +#if 0 +/*immo crc校验常数自定义*/ +#define CRC8_CPOLYNOME (0x7u) +#define POLYNOMINAL 0x8408 +#define PRESET_VALUE 0x3791 +#define CHECK_VALUE 0x0000 + +#define CRC16_Make 0x01 +#define CRC16_Check 0x00 + +//extern u16 crc16_make_check(u8 *buffer, u8 size); +unsigned int crc16_make_check(unsigned char *Buffer, unsigned char size, unsigned char Calc_CRC); +unsigned int crc16_make(unsigned char *Buffer, unsigned char size); +uint8_t crc8_make(uint8_t *pu8Data, uint8_t u8Len); +#endif + +u8 crc_8_for_sa3f(u8 *p_data,u8 len); + +#if 0 //def RAM_OPTIMIZE_EN +#define CRC_USE_TABLE 1 //不用表格，直接用算法 +u8 crc_8_make_l1(u8 *u8_data,u8 u8_len); +u8 crc_8_make_l2(u8 *u8_data,u8 u8_len); +#ifdef ASIL_EN +void crc_init(void); +#endif + +#else + +#define CRC_USE_TABLE 1 //利用生成表格 +void crc8_table_init(u8 id); +u8 crc8_make_by_table(u8 id,u8 *p_data,u8 len); +u8 crc8_table_set_init_value(u8 id,u8 value); +#ifdef ASIL_EN +void crc_init(void); +#endif + +#endif + +#endif \ No newline at end of file diff --git a/code_app_out/Source/module/i2c_simu/i2c_simu.c b/code_app_out/Source/module/i2c_simu/i2c_simu.c new file mode 100644 index 0000000..4061be2 --- /dev/null +++ b/code_app_out/Source/module/i2c_simu/i2c_simu.c @@ -0,0 +1,270 @@ +/** ########################################################################## +** Filename : i2c_simu.c +** Project : +** Module : +** Processor : +** Version : 1.0 +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : 模拟I2C +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20230602- --V1.0-- --mingyea--- --修改-- + +** #########################################################################*/ + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ +//#include "Events.h" +#include "common_cfg.h" +#include "common_memory.h" +#include "i2c_simu.h" + +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- S T A T I C V A R I A B L E S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- G L O B A L V A R I A B L E S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +|Prototype : i2c_simu_init +|Called by : None +|Preconditions : None +|Input parameters : None +|Output parameters : None +|Return value : None +|Description : 初始化 +----------------------------------------------------------------------------*/ +void i2c_simu_init(void) +{ + i2c_simu_sda_init_output(); + i2c_simu_scl_init_output(); + I2C_SIMU_SCL_HIGH(); + I2C_SIMU_SDA_HIGH(); +} /* End of function i2c_simu_init*/ + +/*--------------------------------------------------------------------------- +|Prototype : void i2c_simu_task(void) +|Called by : None +|Preconditions : None +|Input parameters : None +|Output parameters : None +|Return value : None +|Description : 预留 +----------------------------------------------------------------------------*/ +void i2c_simu_task(void) +{ + +} /* End of function i2c_simu_task*/ + +/*--------------------------------------------------------------------------- +|Prototype : void i2c_simu_start(void) +|Called by : None +|Preconditions : None +|Input parameters : None +|Output parameters : None +|Return value : None +|Description : 启动 +----------------------------------------------------------------------------*/ +void i2c_simu_start(void) +{ + i2c_simu_sda_init_output(); + I2C_SIMU_SDA_HIGH(); + I2C_SIMU_SCL_HIGH(); + i2c_simu_delay_us(I2C_SIMU_START_STOP_DELAY); + I2C_SIMU_SDA_LOW();//START:when CLK is high,DATA change form high to low + i2c_simu_delay_us(I2C_SIMU_START_STOP_DELAY); + I2C_SIMU_SCL_LOW() ; +} /* End of function i2c_simu_start*/ + +/*--------------------------------------------------------------------------- +|Prototype : void i2c_simu_stop(void) +|Called by : None +|Preconditions : None +|Input parameters : None +|Output parameters : None +|Return value : None +|Description : 停止 +----------------------------------------------------------------------------*/ +void i2c_simu_stop(void) +{ + i2c_simu_sda_init_output(); + I2C_SIMU_SCL_LOW(); + I2C_SIMU_SDA_LOW();//STOP:when CLK is high DATA change form low to high + i2c_simu_delay_us(I2C_SIMU_START_STOP_DELAY); + I2C_SIMU_SCL_HIGH(); + I2C_SIMU_SDA_HIGH(); + i2c_simu_delay_us(I2C_SIMU_START_STOP_DELAY); +} /* End of function i2c_simu_stop*/ + +/*--------------------------------------------------------------------------- +|Prototype : u8 i2c_simu_wait_ack(void) +|Called by : None +|Preconditions : None +|Input parameters : None +|Output parameters : None +|Return value : None +|Description : wait ack +----------------------------------------------------------------------------*/ +u8 i2c_simu_wait_ack(void) +{ + u8 ucErrTime=0u; + i2c_simu_sda_init_input(); + I2C_SIMU_SDA_HIGH(); + i2c_simu_delay_us(I2C_SIMU_WAIT_ACK_DELAY); + I2C_SIMU_SCL_HIGH(); + i2c_simu_delay_us(I2C_SIMU_WAIT_ACK_DELAY); + while(I2C_SIMU_READ_SDA_PIN()) + { + ucErrTime++; + if(ucErrTime>I2C_SIMU_ACK_WAIT_DELAY) + { + i2c_simu_stop(); + return 1; + } + } + I2C_SIMU_SCL_LOW(); + return 0; +} /* End of function i2c_simu_wait_ack*/ + +/*--------------------------------------------------------------------------- +|Prototype : void i2c_simu_ack(void) +|Called by : None +|Preconditions : None +|Input parameters : None +|Output parameters : None +|Return value : None +|Description : ack +----------------------------------------------------------------------------*/ +void i2c_simu_ack(void) +{ + I2C_SIMU_SCL_LOW() ; + i2c_simu_sda_init_output(); + I2C_SIMU_SDA_LOW(); + i2c_simu_delay_us(I2C_SIMU_ACK_DELAY); + I2C_SIMU_SCL_HIGH(); + i2c_simu_delay_us(I2C_SIMU_ACK_DELAY); + I2C_SIMU_SCL_LOW(); +} /* End of function i2c_simu_ack*/ + + +/*--------------------------------------------------------------------------- +|Prototype : void i2c_simu_nack(void) +|Called by : None +|Preconditions : None +|Input parameters : None +|Output parameters : None +|Return value : None +|Description : nack +----------------------------------------------------------------------------*/ +void i2c_simu_nack(void) +{ + I2C_SIMU_SCL_LOW() ; + i2c_simu_sda_init_output(); + I2C_SIMU_SDA_HIGH(); + i2c_simu_delay_us(I2C_SIMU_NACK_DELAY); + I2C_SIMU_SCL_HIGH(); + i2c_simu_delay_us(I2C_SIMU_NACK_DELAY); + I2C_SIMU_SCL_LOW() ; +} /* End of function i2c_simu_nack*/ + +/*--------------------------------------------------------------------------- +|Prototype : void i2c_simu_send_byte(i2c_simu_data_t txd) +|Called by : None +|Preconditions : None +|Input parameters : None +|Output parameters : None +|Return value : None +|Description : nack +----------------------------------------------------------------------------*/ +void i2c_simu_send_byte(i2c_simu_data_t txd) +{ + u8 t; + i2c_simu_sda_init_output(); + I2C_SIMU_SCL_LOW(); + for(t=0u;t<8u;t++) + { + if((txd&0x80)) + { + I2C_SIMU_SDA_HIGH(); + } + else + { + I2C_SIMU_SDA_LOW(); + } + + txd<<=1; + i2c_simu_delay_us(I2C_SIMU_SEND_DATA_DELAY); + I2C_SIMU_SCL_HIGH(); + i2c_simu_delay_us(I2C_SIMU_SEND_SCL_H_DELAY); + I2C_SIMU_SCL_LOW(); + i2c_simu_delay_us(I2C_SIMU_SEND_SCL_L_DELAY); + } +} /* End of function i2c_simu_send_byte*/ + +/*--------------------------------------------------------------------------- +|Prototype : i2c_simu_data_t i2c_simu_read_byte(i2c_simu_ack_t ack) +|Called by : None +|Preconditions : None +|Input parameters : None +|Output parameters : None +|Return value : None +|Description : nack +----------------------------------------------------------------------------*/ +i2c_simu_data_t i2c_simu_read_byte(i2c_simu_ack_t ack) +{ + u8 i; + i2c_simu_data_t receive=0u; + i2c_simu_sda_init_input(); + for(i=0u;i<8u;i++ ) + { + I2C_SIMU_SCL_LOW(); + i2c_simu_delay_us(I2C_SIMU_READ_DATA_DELAY); + I2C_SIMU_SCL_HIGH(); + receive<<=1; + if(I2C_SIMU_READ_SDA_PIN()) + { + receive++; + } + i2c_simu_delay_us(I2C_SIMU_READ_DATA_DELAY1); + } + if (!ack) + { + i2c_simu_nack(); + } + else + { + i2c_simu_ack(); + } + return receive; +} /* End of function i2c_simu_read_byte*/ + + +/* [] END OF FILE */ + diff --git a/code_app_out/Source/module/i2c_simu/i2c_simu.h b/code_app_out/Source/module/i2c_simu/i2c_simu.h new file mode 100644 index 0000000..9cc06d2 --- /dev/null +++ b/code_app_out/Source/module/i2c_simu/i2c_simu.h @@ -0,0 +1,66 @@ +/** ########################################################################## +** Filename : i2c_simu.h +** Project : +** Module : +** Processor : +** Version : 1.0 +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : 模拟I2C +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20230602- --V1.0-- --mingyea--- --修改-- + +** #########################################################################*/ +#ifndef I2C_SIMU__H +#define I2C_SIMU__H + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ +#include "common_types.h" +#include "error.h" +#include "i2c_simu_cfg.h" + +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- G L O B A L V A R I A B L E S +- only configuration table allowed here,variables are not allowed! +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ +void i2c_simu_init(void); +void i2c_simu_task(void); +void i2c_simu_start(void); +void i2c_simu_stop(void); +u8 i2c_simu_wait_ack(void); +void i2c_simu_ack(void); +void i2c_simu_nack(void); +void i2c_simu_send_byte(i2c_simu_data_t txd); +i2c_simu_data_t i2c_simu_read_byte(i2c_simu_ack_t ack); + + + +#endif /* I2C_SIMU__H */ + +/* [] END OF FILE */ diff --git a/code_app_out/Source/module/i2c_simu/i2c_simu_cfg.c b/code_app_out/Source/module/i2c_simu/i2c_simu_cfg.c new file mode 100644 index 0000000..4bdf152 --- /dev/null +++ b/code_app_out/Source/module/i2c_simu/i2c_simu_cfg.c @@ -0,0 +1,171 @@ +/** ########################################################################## +** Filename : i2c_simu_cfg.c +** Project : +** Module : +** Processor : +** Version : 1.0 +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : 模拟I2C +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20230602- --V1.0-- --mingyea--- --修改-- + +** #########################################################################*/ + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ +#include "i2c_simu.h" +#include "common_memory.h" + +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- S T A T I C V A R I A B L E S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- G L O B A L V A R I A B L E S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +|Prototype : void i2c_simu_sda_init_output(void) +|Called by : None +|Preconditions : None +|Input parameters : None +|Output parameters : None +|Return value : None +|Description : 把SDA设为输出模式 +----------------------------------------------------------------------------*/ +void i2c_simu_sda_init_output(void) +{ + #ifdef I2C_SIMU_GPIO_CFD_EN + FL_GPIO_InitTypeDef GPIO_InitStruct = {0}; + + GPIO_InitStruct.pin = I2C0_SDA_PIN_MASK; + GPIO_InitStruct.mode = FL_GPIO_MODE_OUTPUT; + GPIO_InitStruct.outputType = FL_GPIO_OUTPUT_PUSHPULL; //FL_GPIO_OUTPUT_OPENDRAIN + GPIO_InitStruct.pull = FL_DISABLE; + GPIO_InitStruct.remapPin = I2C0_SCL_REPIN; //注意 + GPIO_InitStruct.analogSwitch = FL_DISABLE; + FL_GPIO_Init(I2C0_SDA_GPIO, &GPIO_InitStruct); + #endif +} /* End of function i2c_simu_sda_init_output*/ + +/*--------------------------------------------------------------------------- +|Prototype : void i2c_simu_sda_init_input(void) +|Called by : None +|Preconditions : None +|Input parameters : None +|Output parameters : None +|Return value : None +|Description : 把SDA设为输入模式 +----------------------------------------------------------------------------*/ +void i2c_simu_sda_init_input(void) +{ + #ifdef I2C_SIMU_GPIO_CFD_EN + FL_GPIO_InitTypeDef GPIO_InitStruct = {0}; + + GPIO_InitStruct.pin = I2C0_SDA_PIN_MASK; + GPIO_InitStruct.mode = FL_GPIO_MODE_INPUT; + GPIO_InitStruct.outputType = FL_GPIO_OUTPUT_PUSHPULL; //FL_GPIO_OUTPUT_OPENDRAIN + GPIO_InitStruct.pull = FL_DISABLE; + GPIO_InitStruct.remapPin = I2C0_SCL_REPIN; //注意 + GPIO_InitStruct.analogSwitch = FL_DISABLE; + FL_GPIO_Init(I2C0_SDA_GPIO, &GPIO_InitStruct); + #endif +} /* End of function i2c_simu_sda_init_input*/ + +/*--------------------------------------------------------------------------- +|Prototype : void i2c_simu_scl_init_output(void) +|Called by : None +|Preconditions : None +|Input parameters : None +|Output parameters : None +|Return value : None +|Description : 把SDA设为输出模式 +----------------------------------------------------------------------------*/ +void i2c_simu_scl_init_output(void) +{ + #ifdef I2C_SIMU_GPIO_CFD_EN + FL_GPIO_InitTypeDef GPIO_InitStruct = {0}; + + GPIO_InitStruct.pin = I2C0_SCL_PIN_MASK; + GPIO_InitStruct.mode = FL_GPIO_MODE_OUTPUT; + GPIO_InitStruct.outputType = FL_GPIO_OUTPUT_PUSHPULL; //FL_GPIO_OUTPUT_OPENDRAIN + GPIO_InitStruct.pull = FL_DISABLE; + GPIO_InitStruct.remapPin = I2C0_SCL_REPIN; //注意 + GPIO_InitStruct.analogSwitch = FL_DISABLE; + FL_GPIO_Init(I2C0_SCL_GPIO, &GPIO_InitStruct); + #endif +} /* End of function i2c_simu_scl_init_output*/ + +/*--------------------------------------------------------------------------- +|Prototype : void i2c_simu_scl_init_input(void) +|Called by : None +|Preconditions : None +|Input parameters : None +|Output parameters : None +|Return value : None +|Description : 把SDA设为输入模式 +----------------------------------------------------------------------------*/ +void i2c_simu_scl_init_input(void) +{ + #ifdef I2C_SIMU_GPIO_CFD_EN + FL_GPIO_InitTypeDef GPIO_InitStruct = {0}; + + GPIO_InitStruct.pin = I2C0_SCL_PIN_MASK; + GPIO_InitStruct.mode = FL_GPIO_MODE_INPUT; + GPIO_InitStruct.outputType = FL_GPIO_OUTPUT_PUSHPULL; //FL_GPIO_OUTPUT_OPENDRAIN + GPIO_InitStruct.pull = FL_DISABLE; + GPIO_InitStruct.remapPin = I2C0_SCL_REPIN; //注意 + GPIO_InitStruct.analogSwitch = FL_DISABLE; + FL_GPIO_Init(I2C0_SCL_GPIO, &GPIO_InitStruct); + #endif +} /* End of function i2c_simu_scl_init_input*/ + +/*--------------------------------------------------------------------------- +|Prototype : void i2c_simu_delay_us(i2c_simu_delay_us_t cnt) +|Called by : None +|Preconditions : None +|Input parameters : None +|Output parameters : None +|Return value : None +|Description : 延时，需要实测 +----------------------------------------------------------------------------*/ +void i2c_simu_delay_us(i2c_simu_delay_us_t cnt) +{ + //uint32_t u32cnt = 1; + while(cnt--) + { + // u32cnt = 1; + // while(u32cnt--); + } +} /* End of function i2c_simu_delay_us*/ + + + +/* [] END OF FILE */ diff --git a/code_app_out/Source/module/i2c_simu/i2c_simu_cfg.h b/code_app_out/Source/module/i2c_simu/i2c_simu_cfg.h new file mode 100644 index 0000000..1d716c5 --- /dev/null +++ b/code_app_out/Source/module/i2c_simu/i2c_simu_cfg.h @@ -0,0 +1,100 @@ +/** ########################################################################## +** Filename : i2c_simu_cfg.h +** Project : +** Module : +** Processor : +** Version : 1.0 +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : 模拟I2C +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20230602- --V1.0-- --mingyea--- --修改-- + +** #########################################################################*/ +#ifndef I2C_SIMU_CFG__H +#define I2C_SIMU_CFG__H + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ +#include "common_types.h" +#include "error.h" +#include "cpu.h" +#include "gpio.h" + +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ +//#define I2C_SIMU_GPIO_CFD_EN +//#define I2C_SIMU_DEBUG_EN +//#define I2C_SIMU_TEST_EN + +#define IIC_SIMU_STATUS_NULL 0u +#define IIC_SIMU_STATUS_SUCCESS 1u +#define IIC_SIMU_STATUS_NACK 2u + +#define IIC_SIMU_LEN_ERROR 4u +//这些时间，要实测去配 +#define I2C_SIMU_START_STOP_DELAY 12u +#define I2C_SIMU_WAIT_ACK_DELAY 8u +#define I2C_SIMU_ACK_WAIT_DELAY 200u +#define I2C_SIMU_ACK_DELAY 8u +#define I2C_SIMU_NACK_DELAY 8u +#define I2C_SIMU_SEND_DATA_DELAY 8u +#define I2C_SIMU_SEND_SCL_H_DELAY 36u +#define I2C_SIMU_SEND_SCL_L_DELAY 20u +#define I2C_SIMU_READ_DATA_DELAY 36u +#define I2C_SIMU_READ_DATA_DELAY1 8u + +#ifdef I2C_SIMU_GPIO_CFD_EN +#define I2C_SIMU_SCL_HIGH() //FL_GPIO_SetOutputPin(I2C0_SCL_GPIO, I2C0_SCL_PIN_MASK) +#define I2C_SIMU_SCL_LOW() //FL_GPIO_ResetOutputPin(I2C0_SCL_GPIO, I2C0_SCL_PIN_MASK) +#define I2C_SIMU_SDA_HIGH() // FL_GPIO_SetOutputPin(I2C0_SDA_GPIO, I2C0_SDA_PIN_MASK) +#define I2C_SIMU_SDA_LOW() //FL_GPIO_ResetOutputPin(I2C0_SDA_GPIO, I2C0_SDA_PIN_MASK) +#define I2C_SIMU_READ_SDA_PIN() //FL_GPIO_GetInputPin(I2C0_SDA_GPIO,I2C0_SDA_PIN_MASK) +#else +#define I2C_SIMU_SCL_HIGH() //FL_GPIO_SetOutputPin(I2C0_SCL_GPIO, I2C0_SCL_PIN_MASK) +#define I2C_SIMU_SCL_LOW() //FL_GPIO_ResetOutputPin(I2C0_SCL_GPIO, I2C0_SCL_PIN_MASK) +#define I2C_SIMU_SDA_HIGH() //FL_GPIO_SetOutputPin(I2C0_SDA_GPIO, I2C0_SDA_PIN_MASK) +#define I2C_SIMU_SDA_LOW() //FL_GPIO_ResetOutputPin(I2C0_SDA_GPIO, I2C0_SDA_PIN_MASK) +#define I2C_SIMU_READ_SDA_PIN() (0)//FL_GPIO_GetInputPin(I2C0_SDA_GPIO,I2C0_SDA_PIN_MASK) +#endif + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ +typedef u16 i2c_simu_delay_us_t; +typedef u8 i2c_simu_data_t; +typedef u8 i2c_simu_ack_t; + +/*--------------------------------------------------------------------------- +- G L O B A L V A R I A B L E S +- only configuration table allowed here,variables are not allowed! +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ +void i2c_simu_sda_init_output(void); +void i2c_simu_sda_init_input(void); +void i2c_simu_scl_init_output(void); +void i2c_simu_scl_init_input(void); +void i2c_simu_delay_us(i2c_simu_delay_us_t cnt); + + + +#endif /* I2C_SIMU_CFG__H */ + +/* [] END OF FILE */ diff --git a/code_app_out/Source/module/key_encoder/key_encoder_driver.c b/code_app_out/Source/module/key_encoder/key_encoder_driver.c new file mode 100644 index 0000000..8dc1771 --- /dev/null +++ b/code_app_out/Source/module/key_encoder/key_encoder_driver.c @@ -0,0 +1,371 @@ +/** ########################################################################## +** Filename : key_encoder_driver.c +** Project : +** Module : +** Processor : +** Version : 1.0 +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : 滚轮， +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20230602- --V1.0-- --mingyea--- --修改-- + +** #########################################################################*/ + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ +#include "common_memory.h" +#include "common_cfg.h" +#include "key_encoder_driver.h" + +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- S T A T I C V A R I A B L E S +----------------------------------------------------------------------------*/ +static key_encoder_s g_key_encoder = {0}; + +/*--------------------------------------------------------------------------- +- G L O B A L V A R I A B L E S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ +static void key_encoder_driver_timeout(void); +static void key_encoder_set_event(u8 event); +static void key_encoder_logic_operate(void); + +/*--------------------------------------------------------------------------- +|Prototype : void key_encoder_driver_init(void) +|Called by : None +|Preconditions : None +|Input parameters : None +|Output parameters : None +|Return value : None +|Description : 初始化 +----------------------------------------------------------------------------*/ +void key_encoder_driver_init(void) +{ + key_encoder_driver_cfg_init(); + common_memory_clear((u8*)&g_key_encoder,sizeof(g_key_encoder)); + g_key_encoder.state = KEY_ENCODER_STATE_ERROR; + g_key_encoder.input0 = KEY_ENCODER_INPUT_0_PIN; + g_key_encoder.input1 = KEY_ENCODER_INPUT_1_PIN; + g_key_encoder.pre_input0 = KEY_ENCODER_INPUT_0_PIN; + g_key_encoder.pre_input1 = KEY_ENCODER_INPUT_1_PIN; + key_encoder_driver_goto_wakeup(); /*PRQA S 2987*/ /*内容被宏屏蔽*/ +} + +/*--------------------------------------------------------------------------- +|Prototype : void key_encoder_driver_timeout(void) +|Called by : None +|Preconditions : None +|Input parameters : None +|Output parameters : None +|Return value : None +|Description : cycle task 在1ms中断里调用 +----------------------------------------------------------------------------*/ +static void key_encoder_driver_timeout(void) +{ + + if((g_key_encoder.input0 == g_key_encoder.pre_input0) + && (g_key_encoder.input1 == g_key_encoder.pre_input1)) + { + g_key_encoder.time_count ++; + if(g_key_encoder.time_count >= KEY_ENCODER_TIME_OUT) + { + g_key_encoder.time_count = 0; + if(g_key_encoder.state != KEY_ENCODER_STATE_IDLE) + { + g_key_encoder.state = KEY_ENCODER_STATE_ERROR; + } + + } + } + else + { + g_key_encoder.time_count = 0u; + } + + +} + +/*--------------------------------------------------------------------------- +|Prototype : void key_encoder_driver_task(void) +|Called by : None +|Preconditions : None +|Input parameters : None +|Output parameters : None +|Return value : None +|Description : cycle task 在1ms中断里调用 +----------------------------------------------------------------------------*/ +void key_encoder_driver_task(void) +{ + g_key_encoder.input0 = KEY_ENCODER_INPUT_0_PIN; + g_key_encoder.input1 = KEY_ENCODER_INPUT_1_PIN; + (void)key_encoder_logic_operate(); + (void)key_encoder_driver_timeout(); + g_key_encoder.pre_input0 = g_key_encoder.input0; + g_key_encoder.pre_input1 = g_key_encoder.input1; +} + +/*--------------------------------------------------------------------------- +|Prototype : void key_encoder_logic_operate(void) +|Called by : None +|Preconditions : None +|Input parameters : None +|Output parameters : None +|Return value : None +|Description : cycle task 在1ms中断里调用 +----------------------------------------------------------------------------*/ +#ifndef KEY_ENCODER_FULL_CYCLE_TRIG +void key_encoder_logic_operate(void) +{ + + g_key_encoder.input0_changed = false; + g_key_encoder.input1_changed = false; + + if(g_key_encoder.pre_input0 != g_key_encoder.input0) + { + g_key_encoder.input0_changed = true; + } + + if(g_key_encoder.pre_input1 != g_key_encoder.input1) + { + g_key_encoder.input1_changed = true; + } + switch(g_key_encoder.state) + { + case KEY_ENCODER_STATE_IDLE: + if( (g_key_encoder.input0_changed == true) && (g_key_encoder.input1_changed == false) ) + { + g_key_encoder.state = KEY_ENCODER_STATE_1; + } + else if( (g_key_encoder.input0_changed == false) && (g_key_encoder.input1_changed == true) ) + { + g_key_encoder.state = KEY_ENCODER_STATE_2; + } + else + { + g_key_encoder.state = KEY_ENCODER_STATE_IDLE; + } + break; + case KEY_ENCODER_STATE_1: + if( (g_key_encoder.input0_changed == false) && (g_key_encoder.input1_changed == true) ) + { + (void)key_encoder_set_event(KEY_ENCODER_EVENT_1); + g_key_encoder.state = KEY_ENCODER_STATE_WAIT_RELEASE; + + } + else if( (g_key_encoder.input0_changed == true)) + { + g_key_encoder.state = KEY_ENCODER_STATE_ERROR; + } + else + { + g_key_encoder.state = KEY_ENCODER_STATE_1; + } + break; + case KEY_ENCODER_STATE_2: + if( (g_key_encoder.input0_changed == true) && (g_key_encoder.input1_changed == false)) + { + (void)key_encoder_set_event(KEY_ENCODER_EVENT_2); + g_key_encoder.state = KEY_ENCODER_STATE_WAIT_RELEASE; + + } + else if((g_key_encoder.input1_changed == true)) + { + g_key_encoder.state = KEY_ENCODER_STATE_ERROR; + } + else + { + g_key_encoder.state = KEY_ENCODER_STATE_2; + } + break; + case KEY_ENCODER_STATE_WAIT_RELEASE: + case KEY_ENCODER_STATE_ERROR: + if((g_key_encoder.input1 == g_key_encoder.input0)) + { + g_key_encoder.state = KEY_ENCODER_STATE_IDLE; + } + break; + default: + while(1); + break; + } + +} +#else +void key_encoder_logic_operate(void) +{ + switch(g_key_encoder.state) + { + case KEY_ENCODER_STATE_IDLE: + g_key_encoder.result = KEY_ENCODER_EVENT_NULL; + if((g_key_encoder.input0 == KEY_ENCODER_VALID_LEVEL) && (g_key_encoder.input1 == KEY_ENCODER_IDLE_LEVEL)) + { + g_key_encoder.state = KEY_ENCODER_STATE_1; + } + else if((g_key_encoder.input0 == KEY_ENCODER_IDLE_LEVEL) && (g_key_encoder.input1 == KEY_ENCODER_VALID_LEVEL)) + { + g_key_encoder.state = KEY_ENCODER_STATE_2; + } + else + { + g_key_encoder.state = KEY_ENCODER_STATE_IDLE; + } + break; + case KEY_ENCODER_STATE_1: + if((g_key_encoder.input0 == KEY_ENCODER_VALID_LEVEL) && (g_key_encoder.input1 == KEY_ENCODER_VALID_LEVEL)) + { + g_key_encoder.result = KEY_ENCODER_EVENT_1; + g_key_encoder.state = KEY_ENCODER_STATE_WAIT_RELEASE; + } + else if((g_key_encoder.input0 == KEY_ENCODER_VALID_LEVEL) && (g_key_encoder.input1 == KEY_ENCODER_IDLE_LEVEL)) + { + g_key_encoder.state = KEY_ENCODER_STATE_1; + } + else + { + g_key_encoder.state = KEY_ENCODER_STATE_ERROR; + } + break; + case KEY_ENCODER_STATE_2: + if((g_key_encoder.input0 == KEY_ENCODER_VALID_LEVEL) && (g_key_encoder.input1 == KEY_ENCODER_VALID_LEVEL)) + { + g_key_encoder.result = KEY_ENCODER_EVENT_2; + g_key_encoder.state = KEY_ENCODER_STATE_WAIT_RELEASE; + } + else if((g_key_encoder.input0 == KEY_ENCODER_IDLE_LEVEL) && (g_key_encoder.input1 == KEY_ENCODER_VALID_LEVEL)) + { + g_key_encoder.state = KEY_ENCODER_STATE_2; + } + else + { + g_key_encoder.state = KEY_ENCODER_STATE_ERROR; + } + break; + case KEY_ENCODER_STATE_WAIT_RELEASE: + case KEY_ENCODER_STATE_ERROR: + if((g_key_encoder.input0 == KEY_ENCODER_IDLE_LEVEL) && (g_key_encoder.input1 == KEY_ENCODER_IDLE_LEVEL)) + { + (void)key_encoder_set_event(g_key_encoder.result); + g_key_encoder.result = KEY_ENCODER_EVENT_NULL; + g_key_encoder.state = KEY_ENCODER_STATE_IDLE; + } + break; + default: + while(1); + break; + } +} +#endif + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : - +|Input parameters : None id 是邏輯id +|Output parameters : None +|Return value : None +|Description : 进入sleep前，要做的事情;---把数据 +----------------------------------------------------------------------------*/ +void key_encoder_driver_goto_sleep(void) +{ + common_memory_clear((u8*)&g_key_encoder,sizeof(g_key_encoder)); +} + + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : - +|Input parameters : None id 是邏輯id +|Output parameters : None +|Return value : None +|Description : 进入sleep前，要做的事情;---把数据 +----------------------------------------------------------------------------*/ +void key_encoder_driver_goto_wakeup(void) +{ + // +} + + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Output parameters : None +|Return value : None +|Description : +----------------------------------------------------------------------------*/ +static void key_encoder_set_event(u8 event) +{ + if(g_key_encoder.event_num < NUM_OF_KEY_ENCODER_EVENT) + { + g_key_encoder.event_num ++; + g_key_encoder.write_index ++; + if(g_key_encoder.write_index >= NUM_OF_KEY_ENCODER_EVENT) + { + g_key_encoder.write_index = 0; + } + g_key_encoder.event[g_key_encoder.write_index] = event; + } +} + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Output parameters : None +|Return value : None +|Description : +----------------------------------------------------------------------------*/ +u8 key_encoder_get_event(void) +{ + u8 l_event; + + if(g_key_encoder.event_num) + { + g_key_encoder.event_num --; + g_key_encoder.read_index ++; + if(g_key_encoder.read_index >= NUM_OF_KEY_ENCODER_EVENT) + { + g_key_encoder.read_index = 0; + } + l_event = g_key_encoder.event[g_key_encoder.read_index]; + } + else + { + l_event = KEY_ENCODER_EVENT_NULL; + } + + return (l_event); +} + + + + +/* [] END OF FILE */ diff --git a/code_app_out/Source/module/key_encoder/key_encoder_driver.h b/code_app_out/Source/module/key_encoder/key_encoder_driver.h new file mode 100644 index 0000000..006c3c1 --- /dev/null +++ b/code_app_out/Source/module/key_encoder/key_encoder_driver.h @@ -0,0 +1,81 @@ +/** ########################################################################## +** Filename : key_encode_driver.h +** Project : +** Module : +** Processor : +** Version : 1.0 +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : 滚轮， +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20230602- --V1.0-- --mingyea--- --修改-- + +** #########################################################################*/ +#ifndef KEY_ENCODER_DRIVER__H +#define KEY_ENCODER_DRIVER__H + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ +#include "common_types.h" +#include "key_encoder_driver_cfg.h" + +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ +typedef struct +{ + u8 input0; //0 dec 1 inc + u8 input1; + u8 pre_input0; + u8 pre_input1; + u8 event_num; + u8 event[NUM_OF_KEY_ENCODER_EVENT]; + u8 write_index; + u8 read_index; + u8 state; + u8 result; + u16 time_count; + u8 input0_changed; + u8 input1_changed; + +}key_encoder_s; + +/*--------------------------------------------------------------------------- +- G L O B A L V A R I A B L E S +- only configuration table allowed here,variables are not allowed! +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ +void key_encoder_driver_init(void); //按键初始化 +void key_encoder_driver_task(void); //按键任务周期调用 +u8 key_encoder_get_event(void); +void key_encoder_driver_goto_sleep(void); +void key_encoder_driver_goto_wakeup(void); +//void key_encoder_set_col_count(u8 rol_count); + + + +#endif /* KEY_ENCODER_DRIVER__H */ + +/* [] END OF FILE */ diff --git a/code_app_out/Source/module/key_encoder/key_encoder_driver_cfg.c b/code_app_out/Source/module/key_encoder/key_encoder_driver_cfg.c new file mode 100644 index 0000000..3ce096b --- /dev/null +++ b/code_app_out/Source/module/key_encoder/key_encoder_driver_cfg.c @@ -0,0 +1,74 @@ +/** ########################################################################## +** Filename : key_encoder_driver_cfg.c +** Project : +** Module : +** Processor : +** Version : 1.0 +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : 滚轮， +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20230602- --V1.0-- --mingyea--- --修改-- + +** #########################################################################*/ + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ +#include "key_encoder_driver.h" + + +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- S T A T I C V A R I A B L E S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- G L O B A L V A R I A B L E S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ + + + + +/*--------------------------------------------------------------------------- +|Prototype : void key_encoder_driver_cfg_init(void) +|Called by : +|Preconditions : - +|Input parameters : None +|Output parameters : None +|Return value : None +|Description : +----------------------------------------------------------------------------*/ +void key_encoder_driver_cfg_init(void) +{ + +} /* End of function key_encoder_driver_cfg_init*/ + + + + +/* [] END OF FILE */ diff --git a/code_app_out/Source/module/key_encoder/key_encoder_driver_cfg.h b/code_app_out/Source/module/key_encoder/key_encoder_driver_cfg.h new file mode 100644 index 0000000..6cccb3f --- /dev/null +++ b/code_app_out/Source/module/key_encoder/key_encoder_driver_cfg.h @@ -0,0 +1,117 @@ +/** ########################################################################## +** Filename : key_encoder_driver_cfg.h +** Project : +** Module : +** Processor : +** Version : 1.0 +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : 滚轮， +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20230602- --V1.0-- --mingyea--- --修改-- + +** #########################################################################*/ +#ifndef KEY_ENCODER_DRIVER_CFG__H +#define KEY_ENCODER_DRIVER_CFG__H + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ +#include "common_types.h" +#include "common_cfg.h" +#include "gpio.h" +#include "cpu.h" + +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ +#define KEY_ENCODER_EN +//#define KEY_ENCODER_FULL_CYCLE_TRIG //一格全周期4个波形，，半周期 2个波形 +//#define KEY_ENCODER_INTRRUPT_MODE 1 //IO中断方式 +//#define KEY_ENCODER_DEBUG_EN + + +#define KEY_ENCODER_ENTER_CRITICAL() System_DisableIrqGlobal() +#define KEY_ENCODER_EXIT_CRITICAL() System_EnableIrqGlobal() + + +#define KEY_ENCODER_STATE_IDLE 0u +#define KEY_ENCODER_STATE_1 1u +#define KEY_ENCODER_STATE_2 2u +#define KEY_ENCODER_STATE_WAIT_RELEASE 3u +#define KEY_ENCODER_STATE_ERROR 4u + + + +#define NUM_OF_KEY_ENCODER_EVENT 10u + + +#define KEY_ENCODER_DIR_REVERSE //方向翻转 +#ifdef KEY_ENCODER_DIR_REVERSE + //有效电平 + #define KEY_ENCODER_VALID_LEVEL 1u + //待机电平 + #define KEY_ENCODER_IDLE_LEVEL 0u +#else + //有效电平 + #define KEY_ENCODER_VALID_LEVEL 0u + //待机电平 + #define KEY_ENCODER_IDLE_LEVEL 1u +#endif + +#define KEY_ENCODER_EVENT_NULL 0U +#define KEY_ENCODER_EVENT_1 1U +#define KEY_ENCODER_EVENT_2 2U + +#define KEY_ENCODER_EVENT_UP KEY_ENCODER_EVENT_1 +#define KEY_ENCODER_EVENT_DOWN KEY_ENCODER_EVENT_2 + +#if 0 //要以实际项目GPIO +#define KEY_ENCODER_INPUT_0_PIN //GPIO_GetPinLevel(KEY_ENCODER_1_GPIO,KEY_ENCODER_1_PIN_ID) +#define KEY_ENCODER_INPUT_1_PIN //GPIO_GetPinLevel(KEY_ENCODER_2_GPIO,KEY_ENCODER_2_PIN_ID) +#else +#define KEY_ENCODER_INPUT_0_PIN gpio_read_pin_input(KEY_1_ENCODE_GPIO,KEY_1_ENCODE_PIN_MASK) +#define KEY_ENCODER_INPUT_1_PIN gpio_read_pin_input(KEY_2_ENCODE_GPIO,KEY_2_ENCODE_PIN_MASK); +#endif + + + + +#define KEY_ENCODER_TIME_UNIT 1u //1ms +#define KEY_ENCODER_TIME_OUT (5000u/KEY_ENCODER_TIME_UNIT) + + + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- G L O B A L V A R I A B L E S +- only configuration table allowed here,variables are not allowed! +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ + +void key_encoder_driver_cfg_init(void); + + +#endif /* KEY_ENCODER_DRIVER_CFG__H */ + +/* [] END OF FILE */ diff --git a/code_app_out/Source/module/keyboard/key_adc_driver.c b/code_app_out/Source/module/keyboard/key_adc_driver.c new file mode 100644 index 0000000..3d9cdc9 --- /dev/null +++ b/code_app_out/Source/module/keyboard/key_adc_driver.c @@ -0,0 +1,340 @@ +/** ########################################################################## +** Filename : keyboard_drive.c +** Project : RGB LED +** Module : +** Processor : Cypress CY8C4125LQE-S433 +** Version : V1.0 +** Compiler : PSoC Creator 4.2 +** Date/Time : 2020/02/26 +** Abstract : +** +** Contents : +** +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** --------- ---- ----------------- -------------------------------------- +** #########################################################################*/ +#include "key_adc_driver.h" +#include "adc.h" + +#include "common_memory.h" + +/***************************************************************************** +* I N C L U D E F I L E S +*****************************************************************************/ +void key_adc_driver_check_channel(u16 adc_value,key_adc_driver_s *p_key_sm,const key_adc_range_cfg_s *p_key_cfg); +static u8 key_adc_driver_check_state(u8 count,key_adc_driver_s *p_key_sm,const key_adc_range_cfg_s *p_key_cfg); +static void key_adc_driver_check_channel_op(u8 result1,key_adc_driver_s *p_key_sm,const key_adc_range_cfg_s *p_key_cfg); + +/***************************************************************************** +* D E F I N E S +*****************************************************************************/ +static key_adc_driver_s g_key_adc_driver[KEY_ADC_CHANNEL_TOTALS]; + +/***************************************************************************** +|Prototype : void key_adc_drive_init(void) +|Called by : None +|Preconditions : None +|Input parameters : None +|Output parameters : None +|Return value : None +|Description : cycle task +*****************************************************************************/ +void key_adc_driver_init(void) +{ + common_memory_clear((u8*)&g_key_adc_driver,(u16)sizeof(g_key_adc_driver)); +} + + +/***************************************************************************** +|Prototype : void key_adc_drive_task(void) +|Called by : None +|Preconditions : None +|Input parameters : None +|Output parameters : None +|Return value : None +|Description : cycle task +*****************************************************************************/ +void key_adc_driver_task(void) +{ + u8 i; + adc_result_t l_adc_value[KEY_ADC_CHANNEL_TOTALS]; + key_adc_driver_cfg_get_value(KEY_ADC_CHANNEL_TOTALS,&l_adc_value[0]); + for(i=0u;ijude_line[j]) + { + case KEY_ADC_RESULT_IDLE: + if(p_key_cfg[j].valid == 0x80u) + { + p_key_sm->count++; + if(p_key_sm->count>=g_key_cfg_times[KEY_ADC_FAULT_TIME_ID]) /* p_key_cfg[j].debounce */ + { + p_key_sm->count =0; + p_key_sm->jude_line[j] = KEY_ADC_RESULT_PRESSS; + l_result = j; + } + } + else + { + p_key_sm->count++; + if(p_key_sm->count>=g_key_cfg_times[KEY_ADC_DEBOUNCE_TIME_ID]) /*p_key_cfg[j].debounce*/ + { + p_key_sm->count =0; + p_key_sm->jude_line[j] = KEY_ADC_RESULT_PRESSS; + l_result = j; + } + } + break; + #if 0 + case KEY_ADC_RESULT_PRESSS: + p_key_sm->count++; + if(p_key_sm->count>=p_key_cfg[j].long_press) + { + /*p_key_sm->count =0;*/ + p_key_sm->jude_line[j] = KEY_RESULT_LONG; + } + break; + case KEY_RESULT_LONG: + p_key_sm->count++; + if(p_key_sm->count>=p_key_cfg[j].stick_press) + { + /*p_key_sm->count =0;*/ + p_key_sm->jude_line[j] = KEY_ADC_RESULT_STICK; + } + break; + #else + case KEY_ADC_RESULT_PRESSS: + l_result = j; + p_key_sm->count=0u; + break; + #endif + default: + /*code*/ + break; + } + return l_result; +} + +static void key_adc_driver_check_channel_op(u8 result1,key_adc_driver_s *p_key_sm,const key_adc_range_cfg_s *p_key_cfg) +{ + u8 j; + u8 l_result = result1; + /*如果是沒有任何按鍵有效*/ + if(l_result == 0xffu) + { + #if 0 + for(j=0;jjude_line[j] = KEY_ADC_RESULT_IDLE; + } + for(j=0;jresult[j] = KEY_ADC_RESULT_IDLE; + } + #endif + } + else + { + for(j=0;jresult[j]!=KEY_ADC_RESULT_FAULT) )// &&　(p_key_sm->pre_state!=KEY_ADC_STATE_FAULT) ) + { + p_key_sm->result[j] = KEY_ADC_RESULT_PRESSS; + } + } + else + { + //第一个判断句，是为了保持上次fault，第二个判断句，是为了弹起时，才清除状态 + //if( (p_key_sm->result[j] != KEY_ADC_RESULT_FAULT) || (p_key_sm->state==KEY_ADC_STATE_IDLE) ) + { + p_key_sm->result[j] =KEY_ADC_RESULT_IDLE; + } + } + /*机械故障*/ + if(p_key_cfg[l_result].valid == 0x80u) + { + p_key_sm->result[j] =KEY_ADC_RESULT_FAULT; + p_key_sm->state = KEY_ADC_STATE_FAULT; //在错误的范围 + } + } + // + } +} + +/***************************************************************************** +|Prototype : void key_adc_drive_task(void) +|Called by : None +|Preconditions : None +|Input parameters : None +|Output parameters : None +|Return value : None +|Description : cycle task +*****************************************************************************/ +void key_adc_driver_check_channel(u16 adc_value,key_adc_driver_s *p_key_sm,const key_adc_range_cfg_s *p_key_cfg) +{ + u8 j,k; + u8 l_result = 0xffu; + u8 l_breakout =0u; + for(j=0;j= p_key_cfg[j].min) && (adc_value <= p_key_cfg[j].max) ) /*&& (p_key_cfg[j].valid!=0u) )*/ + { + p_key_sm->state = (key_adc_state_e)j; + if(p_key_sm->pre_state != p_key_sm->state) + { + p_key_sm->count =0; + for(k=0;kjude_line[k] = KEY_ADC_RESULT_IDLE; + } + } + else + { + /*code*/ + } + l_result = key_adc_driver_check_state(j,p_key_sm,p_key_cfg); + l_breakout=1u; + /*break;*/ + } + else + { + /*p_key_sm->jude_line[j] = KEY_ADC_RESULT_IDLE;*/ + if(p_key_sm->jude_line[j] != KEY_ADC_RESULT_IDLE) + { + p_key_sm->count++; + if(p_key_sm->count>=p_key_cfg[j].debounce) + { + p_key_sm->count =0; + p_key_sm->jude_line[j] = KEY_ADC_RESULT_IDLE; + l_result = 0xffu; + l_breakout=1u; + /*break;*/ + } + } + } + if(l_breakout==1u) + { + break; + } + } + + //不在任何范围内 + if(l_breakout==0u) + { + //消抖的时间，要更久一点，达到秒级 + p_key_sm->count++; + if(p_key_sm->count>=g_key_cfg_times[KEY_ADC_OTHER_FAULT_TIME_ID]) + { + p_key_sm->count =0; + l_result = 0xffu; + + for(j=0;jjude_line[j] = KEY_ADC_RESULT_IDLE; + } + for(j=0;jresult[j] = KEY_ADC_RESULT_FAULT; + } + p_key_sm->state = KEY_ADC_STATE_FAULT; //不在任何判斷範圍 + } + } + + key_adc_driver_check_channel_op(l_result,p_key_sm,p_key_cfg); + + p_key_sm->pre_state = p_key_sm->state; +} + +/***************************************************************************** +|Prototype : void key_adc_driver_get_result(void) +|Called by : None +|Preconditions : None +|Input parameters : channel AD邏輯通道 sub_id 內部的key排序 +|Output parameters : None +|Return value : None +|Description : +*****************************************************************************/ +key_adc_result_e key_adc_driver_get_result(u8 channel,u8 sub_id) +{ + key_adc_result_e l_result=KEY_ADC_RESULT_IDLE; + if(channel<=KEY_ADC_CHANNEL_TOTALS) + { + if(sub_id<=KEY_ADC_1CHANNEL_PHY_TOTALS) + { + if(g_key_adc_driver[channel].result[sub_id] != KEY_ADC_RESULT_IDLE) + { + l_result = g_key_adc_driver[channel].result[sub_id]; + } + else + { + l_result = KEY_ADC_RESULT_IDLE; + } + } + } + return l_result; +} + + +/***************************************************************************** +|Prototype : void key_adc_goto_sleep(void) +|Called by : None +|Preconditions : None +|Input parameters : None +|Output parameters : None +|Return value : None +|Description : cycle task +*****************************************************************************/ +/* software detailed design ID ： */ +void key_adc_goto_sleep(void) +{ + #if 1 + common_memory_clear((u8*)&g_key_adc_driver,(u16)sizeof(g_key_adc_driver)); + #else + u8 i; + for(i=0u;i=g_key_adc_mid_time_cfg[i].long_press)//g_key_cfg_times[KEY_ADC_LONGPRESS_TIME_ID]) + { + g_key_adc_mid.key[i].state = KEY_ADC_RESULT_LONG; + } + } + break; + case KEY_ADC_RESULT_LONG: + /*if(l_temp == KEY_ADC_RESULT_PRESSS)*/ + { + g_key_adc_mid.key[i].count++; + if(g_key_adc_mid.key[i].count>=g_key_adc_mid_time_cfg[i].stick_press) //g_key_cfg_times[KEY_ADC_STICKPRESS_TIME_ID]) /*g_key_adc_mid_time_cfg[i].stick_press*/ + { + g_key_adc_mid.key[i].state = KEY_ADC_RESULT_STICK; + } + } + break; + #else + case KEY_ADC_RESULT_PRESSS: + /*if(l_temp == KEY_ADC_RESULT_PRESSS)*/ + { + g_key_adc_mid.key[i].count++; + if(g_key_adc_mid.key[i].count>=g_key_cfg_times[KEY_TIME_CFG_AD_STUCK_ID]) + { + g_key_adc_mid.key[i].state = KEY_ADC_RESULT_STICK; + } + } + break; + #endif + #if 0 + case KEY_ADC_RESULT_STICK: + /*if(l_temp == KEY_ADC_RESULT_PRESSS)*/ + { + if(g_key_adc_mid.key[i].count<0xffffu) + { + g_key_adc_mid.key[i].count++; + } + } + break; + #endif + default: + /*code*/ + break; + } + } + + if(g_key_adc_mid.key[i].pre_state != g_key_adc_mid.key[i].state) + { + if((g_key_adc_mid.key[i].state == KEY_ADC_RESULT_PRESSS)) + { + g_key_adc_mid.key[i].event |= KEY_ADC_EVENT_PRESSED; + } + else if (g_key_adc_mid.key[i].state == KEY_ADC_RESULT_LONG) + { + g_key_adc_mid.key[i].event |= KEY_ADC_EVENT_LONG_DOWN; + } + else if((g_key_adc_mid.key[i].pre_state == KEY_ADC_RESULT_PRESSS) && (g_key_adc_mid.key[i].state == KEY_ADC_RESULT_IDLE)) + { + g_key_adc_mid.key[i].event |= KEY_ADC_EVENT_SHORT_DOWN_RELEASE; + } + if(g_key_adc_mid.key[i].state == KEY_ADC_RESULT_IDLE) + { + g_key_adc_mid.key[i].count=0; + g_key_adc_mid.key[i].state = KEY_ADC_RESULT_IDLE; + if((g_key_adc_mid.key[i].pre_state == KEY_ADC_RESULT_LONG) || (g_key_adc_mid.key[i].pre_state == KEY_ADC_RESULT_FAULT)) + { + g_key_adc_mid.key[i].event = KEY_ADC_EVENT_RELEASE; + } + + } + if( (g_key_adc_mid.key[i].state == KEY_ADC_RESULT_IDLE) || (g_key_adc_mid.key[i].state == KEY_ADC_RESULT_PRESSS) ) + { + g_key_adc_mid.key[i].state_change =1u; + } + } + else + { + g_key_adc_mid.key[i].state_change =0u; + } + + g_key_adc_mid.key[i].pre_state = g_key_adc_mid.key[i].state; + + } +} + + +void key_adc_mid_quick_task(void) +{ + u8 i; + #if 0 + for(i=0;i=KEY_ADC_RESULT_STICK) //未弹起过，也要计时卡滞 + { + l_result = g_key_adc_mid.key[key_id].state; + } + else + { + l_result = KEY_ADC_RESULT_IDLE; + } + } + #else + l_result = g_key_adc_mid.key[key_id].state; + #endif + } + #endif + return l_result; +} + +/***************************************************************************** +|Prototype : +|Called by : +|Preconditions : - +|Input parameters : None id 是邏輯id +|Output parameters : None +|Return value : None +|Description : 回讀按鍵的變化，注意，要馬上處理，下一周期就無變化了, 一般用于按键从无效到有效。或者从有效到无效，且消抖后。 +*****************************************************************************/ +u8 key_adc_mid_driver_get_change(u8 id) +{ + u8 l_change; + if(id= KEY_ADC_RESULT_PRESSS) && (g_key_adc_mid.key[i].state <= KEY_ADC_RESULT_STICK) ) + { + l_result=KEY_ADC_MID_DIFF_SURE; + break; + } + } + return l_result; +} + + +/***************************************************************************** +|Prototype : +|Called by : +|Preconditions : - +|Input parameters : None id 是邏輯id +|Output parameters : None +|Return value : None +|Description : 进入sleep前，要做的事情;---把数据 +*****************************************************************************/ +void key_adc_mid_goto_sleep(void) +{ + u8 i; + key_adc_goto_sleep(); + //再次记录 上次值和当前值，保持一致 + for(i=0u;i= ADC_ORIGINAL_NO_KEY_ORG_MIN) ) + + { + l_result =1; + } + #else + l_result =1; + #endif + + return l_result; +} + + +void key_adc_clear_result(void) +{ + u8 i; + #if 0 + for(i=0;igpio_base,p_key_table->pin_id); + #endif + g_key_digital_driver.digital_key[id].phy_cur_level = l_ret; + if(l_ret == (u8)(p_key_table->valid_level)) + { + g_key_digital_driver.digital_key[id].logic_cur_level = 1u; + } + else + { + g_key_digital_driver.digital_key[id].logic_cur_level = 0u; + } + + //變化時，計時清零 + if(g_key_digital_driver.digital_key[id].phy_cur_level != g_key_digital_driver.digital_key[id].phy_pre_level) + { + g_key_digital_driver.digital_key[id].timecount = 0u; + } + g_key_digital_driver.digital_key[id].timecount++; + g_key_digital_driver.digital_key[id].phy_pre_level = g_key_digital_driver.digital_key[id].phy_cur_level; + g_key_digital_driver.digital_key[id].logic_pre_level = g_key_digital_driver.digital_key[id].logic_cur_level; +} + +/***************************************************************************** +|Prototype : +|Called by : +|Preconditions : - +|Input parameters : None id 是邏輯id +|Output parameters : None +|Return value : None +|Description : 越界保護，由key_digital_driver_alone_task來保證 +*****************************************************************************/ +static void key_digital_driver_alone_up_task(u8 id) +{ + //key_digital_driver_cfg_tab_s *p_key_table; + //p_key_table = (key_digital_driver_cfg_tab_s*)&g_key_digital_driver_cfg_tab[id]; + #ifdef KEY_DIGITAL_INIT_INVALID + if(KEY_DIGITAL_DRIVER_SUBSTATE_UP == g_key_digital_driver.digital_key[id].sub_state) + #else + if(1) + #endif + { + if(g_key_digital_driver.digital_key[id].timecount>=g_key_digital_driver_cfg_tab[id].debounce_time)//g_key_cfg_times[KEY_DIGITAL_DITHERING_TIME_ID]) //p_key_table->debounce_time + { + //g_key_digital_driver.digital_key[id].timecount=0u; + if(g_key_digital_driver.digital_key[id].logic_cur_level!=0u) //邏輯有效 + { + g_key_digital_driver.digital_key[id].sub_state=KEY_DIGITAL_DRIVER_SUBSTATE_INIT; + g_key_digital_driver.digital_key[id].state = KEY_DIGITAL_DRIVER_STATE_SHORT_DOWN; + g_key_digital_driver.digital_key[id].event |= KEY_DIGITAL_EVENT_PRESSED; + } + else + { + //g_key_digital_driver.digital_key[id].sub_state=KEY_DIGITAL_DRIVER_SUBSTATE_UP; + } + } + } + else + { + if(g_key_digital_driver.digital_key[id].timecount>=g_key_digital_driver_cfg_tab[id].debounce_time)//g_key_cfg_times[KEY_DIGITAL_DITHERING_TIME_ID]) /*PRQA S 2880*/ /*KEY_DIGITAL_INIT_INVALID关闭了*/ + { + g_key_digital_driver.digital_key[id].timecount=0u; + if(g_key_digital_driver.digital_key[id].logic_cur_level!=0u) //邏輯有效 + { + g_key_digital_driver.digital_key[id].sub_state=KEY_DIGITAL_DRIVER_SUBSTATE_ERROR; + } + else + { + g_key_digital_driver.digital_key[id].sub_state=KEY_DIGITAL_DRIVER_SUBSTATE_UP; + } + } + } +} + +/***************************************************************************** +|Prototype : +|Called by : +|Preconditions : - +|Input parameters : None id 是邏輯id +|Output parameters : None +|Return value : None +|Description : 越界保護，由key_digital_driver_alone_task來保證 +*****************************************************************************/ +static void key_digital_driver_alone_shortdown_task(u8 id) +{ + //key_digital_driver_cfg_tab_s *p_key_table; + //p_key_table = (key_digital_driver_cfg_tab_s*)&g_key_digital_driver_cfg_tab[id]; + if(g_key_digital_driver.digital_key[id].logic_cur_level!=0u) //邏輯有效 + { + //長按有效 + if(g_key_digital_driver.digital_key[id].timecount>=g_key_digital_driver_cfg_tab[id].long_down_time)//g_key_cfg_times[KEY_DIGITAL_LONGDOWN_TIMEOUT_ID]) + { + g_key_digital_driver.digital_key[id].sub_state=KEY_DIGITAL_DRIVER_SUBSTATE_INIT; + + + g_key_digital_driver.digital_key[id].state = KEY_DIGITAL_DRIVER_STATE_LONG_DOWN; + g_key_digital_driver.digital_key[id].event |= KEY_DIGITAL_EVENT_LONG_DOWN; + } + } + else + { + //彈起 + if(g_key_digital_driver.digital_key[id].timecount>=g_key_digital_driver_cfg_tab[id].debounce_time)//g_key_cfg_times[KEY_DIGITAL_DITHERING_TIME_ID]) + { + g_key_digital_driver.digital_key[id].timecount=0u; + g_key_digital_driver.digital_key[id].sub_state=KEY_DIGITAL_DRIVER_SUBSTATE_UP; + g_key_digital_driver.digital_key[id].state = KEY_DIGITAL_DRIVER_STATE_UP; + g_key_digital_driver.digital_key[id].event = KEY_DIGITAL_EVENT_RELEASE; + g_key_digital_driver.digital_key[id].event |= KEY_DIGITAL_EVENT_SHORT_DOWN_RELEASE; + } + } +} + +/***************************************************************************** +|Prototype : +|Called by : +|Preconditions : - +|Input parameters : None id 是邏輯id +|Output parameters : None +|Return value : None +|Description : 越界保護，由key_digital_driver_alone_task來保證 +*****************************************************************************/ +static void key_digital_driver_alone_longdown_task(u8 id) +{ + //key_digital_driver_cfg_tab_s *p_key_table; + //p_key_table = (key_digital_driver_cfg_tab_s*)&g_key_digital_driver_cfg_tab[id]; + if(g_key_digital_driver.digital_key[id].logic_cur_level!=0u) //邏輯有效 + { + //卡住有效 + if(g_key_digital_driver.digital_key[id].timecount>=g_key_digital_driver_cfg_tab[id].stick_time)//g_key_cfg_times[KEY_DIGITAL_STUCK_TIMEOUT_ID]) + { + g_key_digital_driver.digital_key[id].sub_state=KEY_DIGITAL_DRIVER_SUBSTATE_INIT; + g_key_digital_driver.digital_key[id].state = KEY_DIGITAL_DRIVER_STATE_STICK; + } + } + else + { + //彈起 + if(g_key_digital_driver.digital_key[id].timecount>=g_key_digital_driver_cfg_tab[id].debounce_time)//g_key_cfg_times[KEY_DIGITAL_DITHERING_TIME_ID]) + { + g_key_digital_driver.digital_key[id].timecount=0u; + g_key_digital_driver.digital_key[id].sub_state=KEY_DIGITAL_DRIVER_SUBSTATE_UP; + g_key_digital_driver.digital_key[id].state = KEY_DIGITAL_DRIVER_STATE_UP; + g_key_digital_driver.digital_key[id].event = KEY_DIGITAL_EVENT_RELEASE; + } + } +} + +/***************************************************************************** +|Prototype : +|Called by : +|Preconditions : - +|Input parameters : None id 是邏輯id +|Output parameters : None +|Return value : None +|Description : 越界保護，由key_digital_driver_alone_task來保證 +*****************************************************************************/ +static void key_digital_driver_alone_stick_task(u8 id) +{ + //key_digital_driver_cfg_tab_s *p_key_table; + //p_key_table = (key_digital_driver_cfg_tab_s*)&g_key_digital_driver_cfg_tab[id]; + if(g_key_digital_driver.digital_key[id].logic_cur_level!=0u) //邏輯有效 + { + //卡住有效 + if(g_key_digital_driver.digital_key[id].timecount>=g_key_digital_driver_cfg_tab[id].stick_time)//g_key_cfg_times[KEY_DIGITAL_STUCK_TIMEOUT_ID]) + { + g_key_digital_driver.digital_key[id].sub_state=KEY_DIGITAL_DRIVER_SUBSTATE_INIT; + g_key_digital_driver.digital_key[id].state = KEY_DIGITAL_DRIVER_STATE_STICK; + } + } + else + { + //彈起 + if(g_key_digital_driver.digital_key[id].timecount>=g_key_digital_driver_cfg_tab[id].debounce_time)//g_key_cfg_times[KEY_DIGITAL_DITHERING_TIME_ID]) + { + g_key_digital_driver.digital_key[id].timecount=0u; + g_key_digital_driver.digital_key[id].sub_state=KEY_DIGITAL_DRIVER_SUBSTATE_UP; + g_key_digital_driver.digital_key[id].state = KEY_DIGITAL_DRIVER_STATE_UP; + } + } +} + + +/***************************************************************************** +|Prototype : +|Called by : +|Preconditions : - +|Input parameters : None id 是邏輯id +|Output parameters : None +|Return value : None +|Description : +*****************************************************************************/ +static void key_digital_driver_alone_task(u8 id) +{ + if(idgpio_base,p_key_table->pin_id); + #endif + g_key_digital_driver.digital_key[i].phy_cur_level = l_ret; + #if 1 + if(l_ret == (u8)(p_key_table->valid_level)) + { + g_key_digital_driver.digital_key[i].logic_cur_level = (u8)KEY_DIGITAL_DRIVER_LOGIC_VALID; + } + else + { + g_key_digital_driver.digital_key[i].logic_cur_level = (u8)KEY_DIGITAL_DRIVER_LOGIC_INIT; + } + #endif + } +} + + +/***************************************************************************** +|Prototype : +|Called by : +|Preconditions : - +|Input parameters : None id 是邏輯id +|Output parameters : None +|Return value : None +|Description : 轻量级判斷，是否按鍵有變化； 0表示沒有變化，1表示有變化 +*****************************************************************************/ +key_digital_driver_diff_e key_digital_driver_judge_diff_wakeup(void) +{ + u8 i; + key_digital_driver_diff_e l_result =KEY_DIGITAL_DRIVER_DIFF_NULL; + for(i=0u;iRAM_END_ADDR) || ((addr+len)>(RAM_END_ADDR+1)) ) + { + l_result = ERR_FAILED; + } + else + { + p_src = (u8 *)(addr); + + for (i = 0; i < len; i++) + { + p_data[i] = p_src[i]; /*lint !e511*/ + } + + l_result = ERR_OK; + } + + return l_result; +} + +/** + * @brief ram_write_bytes + * @param input none + * @param input none: + * @param output: + * @retval None + * @calls + * @calls by + * @others 主要用于 program flag + */ +u8 ram_write_bytes(u32 addr,u8 *p_data,u16 len) +{ + u8 l_result; + u8 *p_addr; + u16 i; + + if( (addrRAM_END_ADDR) || ((addr+len)>(RAM_END_ADDR+1)) ) + { + l_result = ERR_FAILED; + } + else + { + p_addr = (u8 *)(addr); + + for (i = 0; i < len; i++) + { + p_addr[i] = p_data[i] ; /*lint !e511*/ + } + + l_result = ERR_OK; + } + + return l_result; +} + +/** + * @brief flash_read_bytes + * @param input none + * @param input none: + * @param output: + * @retval None + * @calls + * @calls by + * @others + */ +u8 flash_read_bytes(u32 addr,u8 *p_data,u16 len) +{ + u8 l_result; + u8 *p_src; + u16 i; + + if( (addrFLASH_END_ADDR) || ((addr+len)>(FLASH_END_ADDR+1)) ) + { + l_result = ERR_FAILED; + } + else + { + p_src = (u8 *)(addr); + + for (i = 0; i < len; i++) + { + p_data[i] = p_src[i]; /*lint !e511*/ + } + + l_result = ERR_OK; + } + + return l_result; +} + +/** + * @brief nvm_init + * @param input none + * @param input none: + * @param output: + * @retval None + * @calls + * @calls by + * @others + */ +void nvm_init(void) +{ + //u8 i; + + #ifdef NVM_EEPROM_EXT_EN + eeprom_init(); + #endif + + //nvm_eeprom_init(); + + //eeprom_init(); + #if 0 + g_nvm_test.result = nvm_read_bytes(NVM_TYPE_EEPROM,0x100300,&g_nvm_test.read_data[0],16); + for(i=0;i<20;i++) + { + g_nvm_test.read_data[i] = 0; + g_nvm_test.write_data[i] = 0x36+i; + } + g_nvm_test.result = nvm_write_bytes(NVM_TYPE_EEPROM,0x100300,&g_nvm_test.write_data[0],16); + g_nvm_test.result = nvm_read_bytes(NVM_TYPE_EEPROM,0x100300,&g_nvm_test.read_data[0],16); + + g_nvm_test.result = nvm_read_bytes(NVM_TYPE_FLASH,0xfe0000,&g_nvm_test.read_data[0],16); + g_nvm_test.result = nvm_read_bytes(NVM_TYPE_RAM,0x001000ul,&g_nvm_test.read_data[0],8); + for(i=0;i<20;i++) + { + g_nvm_test.write_data[i] = 0x36+i; + } + g_nvm_test.result = nvm_write_bytes(NVM_TYPE_RAM,0x001000ul,&g_nvm_test.write_data[0],8); + g_nvm_test.result = nvm_read_bytes(NVM_TYPE_RAM,0x001000ul,&g_nvm_test.read_data[0],8); + #endif +} + + +/** + * @brief nvm_task + * @param input none + * @param input none: + * @param output: + * @retval None + * @calls + * @calls by + * @others + */ +void nvm_task(void) +{ + //#ifdef EEPROM_EXT_STATE_MACHILE_ENABLE + //eeprom_task(); //直接移到外面 + //#endif +} + + + + +/** + * @brief nvm_read_bytes + * @param input none + * @param input none: + * @param output: + * @retval None + * @calls + * @calls by + * @others + */ +u8 nvm_read_bytes(nvm_type_e type,u32 addr, u8 *p_data, u16 num) +{ + u8 l_result = ERR_FAILED; + switch(type) + { + case NVM_TYPE_EEPROM: + #ifdef NVM_EEPROM_EXT_EN + if(eeprom_state_machine_area_get_all_ready()!=EFLASH_STATE_READ) + { + l_result =eeprom_read_u8_ext(addr,p_data,num); + } + #endif + break; + case NVM_TYPE_RAM: + l_result =ram_read_bytes(addr,p_data,num); + break; + case NVM_TYPE_FLASH: + l_result =flash_read_bytes(addr,p_data,num); + break; + default: + //code + break; + } + return l_result; +} + +/** + * @brief nvm_write_bytes + * @param input none + * @param input none: + * @param output: + * @retval None + * @calls + * @calls by + * @others + */ +u8 nvm_write_bytes(nvm_type_e type,u32 addr, u8 *p_data, u16 num) +{ + u8 l_result = ERR_FAILED; + switch(type) + { + case NVM_TYPE_EEPROM: + #ifdef NVM_EEPROM_EXT_EN + //主要是，在上电读取时，不能写入 + if(eeprom_state_machine_area_get_all_ready()!=EFLASH_STATE_READ) + { + l_result =eeprom_write_u8_ext(addr,p_data,num); + } + #endif + break; + case NVM_TYPE_RAM: + l_result =ram_write_bytes(addr,p_data,num); + break; + case NVM_TYPE_FLASH: + //l_result =flash_read_bytes(addr,p_data,num); + break; + default: + //code + break; + } + return l_result; +} + + diff --git a/code_app_out/Source/module/nvm/nvm.h b/code_app_out/Source/module/nvm/nvm.h new file mode 100644 index 0000000..4cad35b --- /dev/null +++ b/code_app_out/Source/module/nvm/nvm.h @@ -0,0 +1,43 @@ +/**~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +** Filename : eeprom_drive.h +** Project : KUWE (PM01 PEPS) +** Module : +** Processor : Freescale mc9s12g128 +** Date/Time : 2016-07-14, 9:00 +** Abstract : +** Contents : +** Author : +** http : +** mail : +** -------------------------------------------------------------------------- +** +** -------------------------------------------------------------------------- +**~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~*/ + +#ifndef __NVM_H__ +#define __NVM_H__ + +#include "common_types.h" +#include "nvm_cfg.h" +#include "gpio.h" +#include "eeprom.h" +#include "eeprom_state_machine.h" +#include "eeprom_seq.h" + +typedef enum +{ + NVM_TYPE_EEPROM=0, + NVM_TYPE_RAM, + NVM_TYPE_FLASH +}nvm_type_e; + +u8 ram_write_bytes(u32 addr,u8 *p_data,u16 len); +u8 ram_read_bytes(u32 addr,u8 *p_data,u16 len); +u8 flash_read_bytes(u32 addr,u8 *p_data,u16 len); + +void nvm_init(void); +void nvm_task(void); +u8 nvm_read_bytes(nvm_type_e type,u32 addr, u8 *p_data, u16 num); +u8 nvm_write_bytes(nvm_type_e type,u32 addr, u8 *p_data, u16 num); + +#endif diff --git a/code_app_out/Source/module/nvm/nvm_cfg.c b/code_app_out/Source/module/nvm/nvm_cfg.c new file mode 100644 index 0000000..bf0b740 --- /dev/null +++ b/code_app_out/Source/module/nvm/nvm_cfg.c @@ -0,0 +1,131 @@ +/**~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +** Filename : eeprom_drive.h +** Project : KUWE (PM01 PEPS) +** Module : +** Processor : Freescale mc9s12g128 +** Date/Time : 2015-07-28, 9:00 +** Abstract : +** Contents : +** Author : +** http : +** mail : +** -------------------------------------------------------------------------- +** +** -------------------------------------------------------------------------- +**~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~*/ +/***************************************************************************** +* Include Files +*****************************************************************************/ +#include "common_types.h" +#include "error.h" +#include "gpio.h" +#include "nvm.h" +#include "Cpu.h" + + + + + +#ifdef NVM_FLASH_DEBUG_EN + +#define NVM_FLASH_PAGE_SIZE 512u //字节 +#define NVM_FLASH_SECTOR_SIZE 2048u //字节 +#define NVM_FLASH_TEST_ADDR 0x00016000 +#define TestPageNum ((NVM_FLASH_TEST_ADDR - 0x00000000)/NVM_FLASH_SECTOR_SIZE) + +#pragma pack(4) +typedef struct +{ + u8 state; + u8 read_project; + u8 write_project; + u8 result; + u16 page_id; + u32 addr; + u8 wr_data[NVM_FLASH_SECTOR_SIZE]; + u8 rd_data[NVM_FLASH_SECTOR_SIZE]; + u8 test[20]; +}nvm_flash_test_s; +#pragma pack() + + +nvm_flash_test_s g_nvm_flash_test; + + +void nvm_falsh_init(void) +{ + // +} + +#define NVM_TEST_ON() //NVM_TEST_ON() +#define NVM_TEST_OFF() //NVM_TEST_OFF() + +void nvm_flash_test(void) +{ + #if 1 + u16 i; + + for (i=0;i
© COPYRIGHT 2021
+ ****************************************************************************** + * @History: + * @Author: + * @Data: + * @Version: +*/ + +#include "common_types.h" +//#include "error.h" +#include "crc.h" +#include "adc.h" +#include "random_pseudo.h" +//#include "adc.h" +#include "service_27.h" +//#include "common_timer.h" + +#define RAND_SEED_INIT_VAL 1u /* See Note #1a. */ + +#define RAND_LCG_PARAM_M 0x7FFFFFFFu /* See Note #1b2B. */ +#define RAND_LCG_PARAM_A 1103515245u /* See Note #1b1A2. */ +#define RAND_LCG_PARAM_B 12345u /* See Note #1b1A3. */ + +static u32 random_seed_cur=0; //当前随机数值 +static u32 random_seed_pre=0; //上次随机数值 +static u32 random_input1_count=0; + +static void random_set_seed(u32 seed); +static u32 random_seed(u32 seed); +static u32 random_generate_seed(void); + +/** + * @brief 初始化 + * @param input: + * @param output: + * @return none: + * @calls + * @calls by + * @others 注意，不能初始值为一个固定值，应考虙每个单片机的不同；在定时器初始化之后 + */ +void random_init(void) +{ + u32 l_random; + #if 0 + random_set_seed(RAND_SEED_INIT_VAL); //第一次 + #else + l_random = adc_get_voltage_value(ADC_CHANNEL_SBAT); //定时器0寄存器的计数值 + random_set_seed(l_random); //第一次 + #endif +} + + + +static void random_set_seed(u32 seed) +{ + random_seed_cur = seed; +} + + +/** + * @brief 算法 + * @param input: + * @param output: + * @return none: + * @calls + * @calls by + * @others + */ +static u32 random_seed(u32 seed) +{ + u32 l_random; + l_random = ( ( (u32)RAND_LCG_PARAM_A * seed) + (u32)RAND_LCG_PARAM_B) % ((u32)RAND_LCG_PARAM_M + 1u); + return l_random; +} + + +/** + * @brief 产生随机数 + * @param input: + * @param output: + * @return none: + * @calls + * @calls by + * @others + */ +static u32 random_generate_seed(void) +{ + u32 l_random; + l_random = random_seed_cur; + random_seed_cur = random_seed(l_random + adc_get_voltage_value(ADC_CHANNEL_SBAT) + random_input1_count); + return random_seed_cur; +} + + + +/** + * @brief 启动一次随机数的产生； + * @param input: + * @param output: + * @return none: + * @calls + * @calls by + * @others 防止连续两次不重复 + */ +void random_start(void) +{ + (void)random_generate_seed(); + if( random_seed_cur == random_seed_pre) + { + random_seed_cur++; + } + else + { + + } + random_seed_pre = random_seed_cur; +} + + + +/** + * @brief 返回当前随机数 + * @param input: + * @param output: + * @return none: + * @calls + * @calls by + * @others + */ +void random_get(u8 *random_data,u8 random_len) +{ + //u8 i; + u8 l_len = random_len; + if(l_len > SERVICE_SEED_LEN_VALID) + { + //l_len =SERVICE_SEED_LEN_VALID; + } + random_data[0] = (u8)(random_seed_cur >> 24); + random_data[1] = (u8)(random_seed_cur >> 16); + random_data[2] = (u8)(random_seed_cur >> 8); + random_data[3] = (u8)(random_seed_cur); +} + + + + + + + +void random_input_count(void) +{ + random_input1_count++; +} + + + + + + + + + + + + + + diff --git a/code_app_out/Source/module/random/random_pseudo.h b/code_app_out/Source/module/random/random_pseudo.h new file mode 100644 index 0000000..f38870d --- /dev/null +++ b/code_app_out/Source/module/random/random_pseudo.h @@ -0,0 +1,41 @@ +/** + ****************************************************************************** + * @file + * @author + * @version + * @date + * @brief + * @function List: + ****************************************************************************** + * @attention + * + * + *

© COPYRIGHT 2021

+ ****************************************************************************** + * @History: + * @Author: + * @Data: + * @Version: +*/ +#ifndef _RANDOM_PSEUDO_H_ +#define _RANDOM_PSEUDO_H_ + +#include "common_types.h" +//#include "adc.h" + +#define SEED_LEN_MAX 4u + +//#define ADC_CHANNEL_SBAT 0 + + +void random_init(void); + +void random_start(void); + +void random_get(u8 *random_data,u8 random_len); + + +void random_input_count(void); + + +#endif diff --git a/code_app_out/Source/module/random/service_27.c b/code_app_out/Source/module/random/service_27.c new file mode 100644 index 0000000..207a962 --- /dev/null +++ b/code_app_out/Source/module/random/service_27.c @@ -0,0 +1,135 @@ +/** + ****************************************************************************** + * @file boot_app.c + * @author Mingyea Asamiya + * @version V1.0.0 + * @date 2017-01-19 + * @brief + * @function List: + ****************************************************************************** + * @attention + * + * + *

© COPYRIGHT 2011 STMicroelectronics

+ ****************************************************************************** + * @History: + * @Author: + * @Data: + * @Version: + */ + + +#include "system_config.h" +//#include "common_timer.h" +#include "random_pseudo.h" +#include "service_27.h" + + + +static const unsigned char key_u8[4] = { 0x00U, 0x00U, 0x00U, 0x17U }; +static const u32 key_u32= 0x00000017; + +static u8 g_aes128_seed[SERVICE_SEED_LEN_MAX] ; + +/* BEGIN_FUNCTION_HDR +************************************************************************************************ +* Function Name : service_27_init +* +* Description : Set the reprogramming flag and reset the ECU. +* +* Inputs : none +* +* Outputs : none +* +* Limitations : Only for Bootloader +* +************************************************************************************************ +END_FUNCTION_HDR */ +void service_27_init(void) +{ + //service_27_test(); + //aes128_cbc_init(); +} + +void service_27_generate_seed(void) +{ + #if 1 + random_start(); + random_get(&g_aes128_seed[0],SERVICE_SEED_LEN_VALID); + //pcks7(&g_aes128_seed[0],SERVICE_SEED_LEN_VALID,&g_aes128_seed[0],SERVICE_SEED_LEN_MAX); + #else + g_aes128_seed[0] =0x12; + g_aes128_seed[1] =0x34; + g_aes128_seed[2] =0x56; + g_aes128_seed[3] =0x78; + #endif +} + + +void service_27_get_seed(u8 *pdata,u8 len) +{ + u8 i; + for(i=0;i> 1) ^ l_seed) <<3) ^ (l_seed >>2)); + l_key = l_result ^ key_u32; + p_key[0] = l_key>>24; + p_key[1] = l_key>>16; + p_key[2] = l_key>>8; + p_key[3] = l_key; + break; + + case 0x05: //值是0x05 + l_result = ((((l_seed >> 1) ^ l_seed) <<3) ^ (l_seed >>2)); + l_key = l_result ^ key_u32; + p_key[0] = l_key>>24; + p_key[1] = l_key>>16; + p_key[2] = l_key>>8; + p_key[3] = l_key; + break; + default: + break; + } +} + + diff --git a/code_app_out/Source/module/random/service_27.h b/code_app_out/Source/module/random/service_27.h new file mode 100644 index 0000000..784fe15 --- /dev/null +++ b/code_app_out/Source/module/random/service_27.h @@ -0,0 +1,64 @@ +/** + ****************************************************************************** + * @file boot_app.h + * @author Mingyea Asamiya + * @version V1.0.0 + * @date 2017-01-19 + * @brief 測試用 + * @function List: + ****************************************************************************** + * @attention + * + * + *

© COPYRIGHT 2011 STMicroelectronics

+ ****************************************************************************** + * @History: + * @Author: + * @Data: + * @Version: + */ + + + + + +#ifndef __SERVICE_27_H__ +#define __SERVICE_27_H__ + + + + +#include "common_types.h" + + +/*lint -e749 */ /* 枚舉 not referenced*/ +/*lint -e750 */ /* 宏 not referenced*/ +/*lint -e751 */ /* 變量 not referenced*/ +/*lint -e752 */ /* 函數 not referenced*/ +/*lint -e754 */ /* 結構體成員 not referenced*/ +#define DCM_KEY_LEN 4u + +#define SERVICE_SEED_LEN_MAX 4u //加入運算的seed長度，其實有16字節； +#define SERVICE_SEED_LEN_VALID 4u //真正用到的，前4個字節 +#define SERVICE_LEVEL_MAX 6u + +void service_27_init(void); +void service_27_generate_seed(void); +void service_27_get_seed(u8 *pdata,u8 len); +u8 service_27_get_seed_element(u8 buf_id); +void service_27_get_key(u8 Dcm_SecuirityLevel, u8* p_key); + + + +//#define service_27_decrypt aes128_cbc_decrypt_ext + +#if 0 +void service_27_get_iv(u8 *pdata); +#endif + + +//void ResetMCUHandle(void); +void service_27_test(void); + + +#endif /* __SERVICE_27_H__ */ \ No newline at end of file diff --git a/code_app_out/Source/module/system_voltage_manage/system_voltage_manage.c b/code_app_out/Source/module/system_voltage_manage/system_voltage_manage.c new file mode 100644 index 0000000..80f8cd1 --- /dev/null +++ b/code_app_out/Source/module/system_voltage_manage/system_voltage_manage.c @@ -0,0 +1,294 @@ +/** ########################################################################## +** Filename : system_voltage_manage.c +** Project : +** Module : +** Processor : +** Version : 1.0 +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20230620- V01-- --Linboyi--- --初版-- +** #########################################################################*/ + + + +/***************************************************************************** +* I N C L U D E F I L E S +*****************************************************************************/ +#include "system_voltage_manage.h" +#include "system_voltage_manage_cfg.h" + + + +/***************************************************************************** +* D E F I N E S / M A C R O S +*****************************************************************************/ + + +/***************************************************************************** +* T Y P E D E F I N I T I O N S +*****************************************************************************/ +typedef struct +{ + uint8_t u8mode; + uint16_t u16timer; + uint8_t u8new_mode; + uint8_t u8old_mode; +}system_voltage_manage_s; + + + +/***************************************************************************** +* S T A T I C V A R I A B L E S +*****************************************************************************/ +system_voltage_manage_s gs_system_voltage_manage[NUM_OF_SYSTEM_VOLTAGE_MANAGE]; + + + +/***************************************************************************** +* G L O B A L V A R I A B L E S +*****************************************************************************/ + + +/***************************************************************************** +* C O N S T A N T S +*****************************************************************************/ + +/***************************************************************************** +* F U N C T I O N P R O T O T Y P E +*****************************************************************************/ + + +/***************************************************************************** +|Prototype : system_voltage_manage_init +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +*****************************************************************************/ +void system_voltage_manage_init(void) +{ + uint8_t i; + + for(i = 0u; i < NUM_OF_SYSTEM_VOLTAGE_MANAGE; i ++) + { + gs_system_voltage_manage[i].u8mode = SYSTEM_VOLTAGE_MODE_UNKNOWN; + gs_system_voltage_manage[i].u16timer = 0u; + gs_system_voltage_manage[i].u8new_mode = SYSTEM_VOLTAGE_MODE_UNKNOWN; + gs_system_voltage_manage[i].u8old_mode = SYSTEM_VOLTAGE_MODE_UNKNOWN; + } +} + + + +/***************************************************************************** +|Prototype : system_voltage_manage_compare +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +*****************************************************************************/ +void system_voltage_manage_compare(uint8_t index) +{ + uint16_t adc_result_mv; + uint16_t system_voltage_mode_low_max; + uint16_t system_voltage_mode_high_min; + uint16_t system_voltage_mode_normal_min; + uint16_t system_voltage_mode_normal_max; + + adc_result_mv = SYSTEM_VOLTAGE_MANAGE_GET_ADC_MV(); + + switch(gs_system_voltage_manage[index].u8mode) + { + case SYSTEM_VOLTAGE_MODE_NORMAL: + system_voltage_mode_low_max = system_voltage_cfg_max_get(index, SYSTEM_VOLTAGE_MODE_LOW_CFG_ID); + system_voltage_mode_high_min = system_voltage_cfg_min_get(index, SYSTEM_VOLTAGE_MODE_HIGH_CFG_ID); + if(adc_result_mv <= system_voltage_mode_low_max) + { + gs_system_voltage_manage[index].u8new_mode = SYSTEM_VOLTAGE_MODE_LOW; + } + else if(adc_result_mv >= system_voltage_mode_high_min) + { + gs_system_voltage_manage[index].u8new_mode = SYSTEM_VOLTAGE_MODE_HIGH; + } + else + { + gs_system_voltage_manage[index].u8new_mode = SYSTEM_VOLTAGE_MODE_NORMAL; + } + break; + case SYSTEM_VOLTAGE_MODE_LOW: + system_voltage_mode_normal_min = system_voltage_cfg_min_get(index, SYSTEM_VOLTAGE_MODE_NORMAL_CFG_ID); + system_voltage_mode_high_min = system_voltage_cfg_min_get(index, SYSTEM_VOLTAGE_MODE_HIGH_CFG_ID); + if(adc_result_mv >= system_voltage_mode_high_min) + { + gs_system_voltage_manage[index].u8new_mode = SYSTEM_VOLTAGE_MODE_HIGH; + } + else if(adc_result_mv >= system_voltage_mode_normal_min) + { + gs_system_voltage_manage[index].u8new_mode = SYSTEM_VOLTAGE_MODE_NORMAL; + } + else + { + gs_system_voltage_manage[index].u8new_mode = SYSTEM_VOLTAGE_MODE_LOW; + } + break; + case SYSTEM_VOLTAGE_MODE_HIGH: + system_voltage_mode_low_max = system_voltage_cfg_max_get(index, SYSTEM_VOLTAGE_MODE_LOW_CFG_ID); + system_voltage_mode_normal_max = system_voltage_cfg_max_get(index, SYSTEM_VOLTAGE_MODE_NORMAL_CFG_ID); + if(adc_result_mv <= system_voltage_mode_low_max) + { + gs_system_voltage_manage[index].u8new_mode = SYSTEM_VOLTAGE_MODE_LOW; + } + else if(adc_result_mv <= system_voltage_mode_normal_max) + { + gs_system_voltage_manage[index].u8new_mode = SYSTEM_VOLTAGE_MODE_NORMAL; + } + else + { + gs_system_voltage_manage[index].u8new_mode = SYSTEM_VOLTAGE_MODE_HIGH; + } + break; + case SYSTEM_VOLTAGE_MODE_UNKNOWN: + system_voltage_mode_low_max = system_voltage_cfg_max_get(index, SYSTEM_VOLTAGE_MODE_LOW_CFG_ID); + system_voltage_mode_high_min = system_voltage_cfg_min_get(index, SYSTEM_VOLTAGE_MODE_HIGH_CFG_ID); + if(adc_result_mv <= system_voltage_mode_low_max) + { + gs_system_voltage_manage[index].u8new_mode = SYSTEM_VOLTAGE_MODE_LOW; + } + else if(adc_result_mv >= system_voltage_mode_high_min) + { + gs_system_voltage_manage[index].u8new_mode = SYSTEM_VOLTAGE_MODE_HIGH; + } + else + { + gs_system_voltage_manage[index].u8new_mode = SYSTEM_VOLTAGE_MODE_NORMAL; + } + break; + default: + while(1) + { + ; + } + } +} + +/***************************************************************************** +|Prototype : system_voltage_manage_decode +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +*****************************************************************************/ +void system_voltage_manage_decode(uint8_t index) +{ + + uint16_t debounce_time; + + + if(gs_system_voltage_manage[index].u8new_mode != gs_system_voltage_manage[index].u8old_mode) + { + gs_system_voltage_manage[index].u16timer = 0; + } + else + { + if(gs_system_voltage_manage[index].u16timer < 0xffffu) + { + gs_system_voltage_manage[index].u16timer ++; + } + + + if(gs_system_voltage_manage[index].u8new_mode != gs_system_voltage_manage[index].u8mode) + { + if(gs_system_voltage_manage[index].u8mode == SYSTEM_VOLTAGE_MODE_UNKNOWN) + { + debounce_time = SYSTEM_VOLTAGE_MODE_UNKNOWN_DEBOUNCE_TIME; + } + else + { + debounce_time = system_voltage_cfg_debounce_time_get(index, gs_system_voltage_manage[index].u8new_mode); + } + + if(gs_system_voltage_manage[index].u16timer >= debounce_time) + { + gs_system_voltage_manage[index].u8mode = gs_system_voltage_manage[index].u8new_mode; + } + } + } + gs_system_voltage_manage[index].u8old_mode = gs_system_voltage_manage[index].u8new_mode; + + + +} + + +/***************************************************************************** +|Prototype : system_voltage_manage_task +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +*****************************************************************************/ +void system_voltage_manage_task(void) +{ + uint8_t i; + + + for(i = 0; i < NUM_OF_SYSTEM_VOLTAGE_MANAGE; i ++) + { + system_voltage_manage_compare(i); + system_voltage_manage_decode(i); + } +} + + + +/***************************************************************************** +|Prototype : system_voltage_manage_mode_get +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +*****************************************************************************/ +uint8_t system_voltage_manage_mode_get(uint8_t system_voltage_manage_id) +{ + uint8_t system_voltage_mode; + + switch(gs_system_voltage_manage[system_voltage_manage_id].u8mode) + { + case SYSTEM_VOLTAGE_MODE_UNKNOWN: + system_voltage_mode = SYSTEM_VOLTAGE_MODE_UNKNOWN; + break; + case SYSTEM_VOLTAGE_MODE_NORMAL: + system_voltage_mode = SYSTEM_VOLTAGE_MODE_NORMAL; + break; + case SYSTEM_VOLTAGE_MODE_LOW: + system_voltage_mode = SYSTEM_VOLTAGE_MODE_LOW; + break; + case SYSTEM_VOLTAGE_MODE_HIGH: + system_voltage_mode = SYSTEM_VOLTAGE_MODE_HIGH; + break; + default: + system_voltage_mode = SYSTEM_VOLTAGE_MODE_UNKNOWN; + gs_system_voltage_manage[system_voltage_manage_id].u8mode = SYSTEM_VOLTAGE_MODE_UNKNOWN; + break; + } + return(system_voltage_mode); +} \ No newline at end of file diff --git a/code_app_out/Source/module/system_voltage_manage/system_voltage_manage.h b/code_app_out/Source/module/system_voltage_manage/system_voltage_manage.h new file mode 100644 index 0000000..af084b9 --- /dev/null +++ b/code_app_out/Source/module/system_voltage_manage/system_voltage_manage.h @@ -0,0 +1,54 @@ +/** ########################################################################## +** Filename : system_voltage_manage.h +** Project : +** Module : +** Processor : +** Version : 1.0 +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20230620- V01-- --Linboyi--- --初版-- +** #########################################################################*/ +#ifndef _SYSTEM_VOLTAGE_MANAGE_H +#define _SYSTEM_VOLTAGE_MANAGE_H + +/***************************************************************************** +* I N C L U D E F I L E S +*****************************************************************************/ +#include "system_voltage_manage_cfg.h" + +/***************************************************************************** +* D E F I N E S / M A C R O S +*****************************************************************************/ + + +/***************************************************************************** +* T Y P E D E F I N I T I O N S +*****************************************************************************/ + +/***************************************************************************** +* G L O B A L V A R I A B L E S +* only configuration table allowed here,variables are not allowed! +*****************************************************************************/ + +/***************************************************************************** +* C O N S T A N T S +*****************************************************************************/ + +/***************************************************************************** +* F U N C T I O N P R O T O T Y P E +*****************************************************************************/ +void system_voltage_manage_init(void); +void system_voltage_manage_task(void); +uint8_t system_voltage_manage_mode_get(uint8_t system_voltage_manage_id); + + +#endif \ No newline at end of file diff --git a/code_app_out/Source/module/system_voltage_manage/system_voltage_manage_cfg.c b/code_app_out/Source/module/system_voltage_manage/system_voltage_manage_cfg.c new file mode 100644 index 0000000..ce143fe --- /dev/null +++ b/code_app_out/Source/module/system_voltage_manage/system_voltage_manage_cfg.c @@ -0,0 +1,154 @@ +/** ########################################################################## +** Filename : system_voltage_manage_cfg.c +** Project : +** Module : +** Processor : +** Version : 1.0 +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20230620- V01-- --Linboyi--- --初版-- +** #########################################################################*/ + + + +/***************************************************************************** +* I N C L U D E F I L E S +*****************************************************************************/ +#include "system_voltage_manage_cfg.h" + + +/***************************************************************************** +* D E F I N E S / M A C R O S +*****************************************************************************/ +#define NUM_OF_SYSTEM_VOLTAGE_CLASS 3u + + +#define SYSTEM_VOLTAGE_MANAGE_MV(a) (a) +#define SYSTEM_VOLTAGE_MANAGE_DEBOUNCE_TIME(a) (a / SYSTEM_VOLTAGE_MANAGE_TASK_CYCLE_TIME) +/***************************************************************************** +* T Y P E D E F I N I T I O N S +*****************************************************************************/ +typedef struct +{ + uint8_t u8state; + uint16_t u16min; + uint16_t u16max; + uint16_t u16debounce_time; +}system_voltage_manage_cfg_s; + +/***************************************************************************** +* G L O B A L V A R I A B L E S +* only configuration table allowed here,variables are not allowed! +*****************************************************************************/ + + +/***************************************************************************** +* C O N S T A N T S +*****************************************************************************/ +const static system_voltage_manage_cfg_s gs_system_voltage_manage_cfg[NUM_OF_SYSTEM_VOLTAGE_MANAGE][NUM_OF_SYSTEM_VOLTAGE_CLASS] = +{ + /* 功能电压等级管理 */ + { + {SYSTEM_VOLTAGE_MODE_NORMAL, SYSTEM_VOLTAGE_MANAGE_MV(9000), SYSTEM_VOLTAGE_MANAGE_MV(16000),SYSTEM_VOLTAGE_MANAGE_DEBOUNCE_TIME(500)}, + {SYSTEM_VOLTAGE_MODE_LOW, SYSTEM_VOLTAGE_MANAGE_MV(0), SYSTEM_VOLTAGE_MANAGE_MV(8500), SYSTEM_VOLTAGE_MANAGE_DEBOUNCE_TIME(500)}, + {SYSTEM_VOLTAGE_MODE_HIGH, SYSTEM_VOLTAGE_MANAGE_MV(16500),SYSTEM_VOLTAGE_MANAGE_MV(0xffffu),SYSTEM_VOLTAGE_MANAGE_DEBOUNCE_TIME(500)}, + }, + /* DTC电压等级管理 */ + { + {SYSTEM_VOLTAGE_MODE_NORMAL, SYSTEM_VOLTAGE_MANAGE_MV(6000), SYSTEM_VOLTAGE_MANAGE_MV(18000),SYSTEM_VOLTAGE_MANAGE_DEBOUNCE_TIME(500)}, + {SYSTEM_VOLTAGE_MODE_LOW, SYSTEM_VOLTAGE_MANAGE_MV(0), SYSTEM_VOLTAGE_MANAGE_MV(5500), SYSTEM_VOLTAGE_MANAGE_DEBOUNCE_TIME(500)}, + {SYSTEM_VOLTAGE_MODE_HIGH, SYSTEM_VOLTAGE_MANAGE_MV(18500),SYSTEM_VOLTAGE_MANAGE_MV(0xffffu),SYSTEM_VOLTAGE_MANAGE_DEBOUNCE_TIME(500)}, + }, + /* 通讯电压等级管理 */ + { + {SYSTEM_VOLTAGE_MODE_NORMAL, SYSTEM_VOLTAGE_MANAGE_MV(7000), SYSTEM_VOLTAGE_MANAGE_MV(17500),SYSTEM_VOLTAGE_MANAGE_DEBOUNCE_TIME(500)}, + {SYSTEM_VOLTAGE_MODE_LOW, SYSTEM_VOLTAGE_MANAGE_MV(0), SYSTEM_VOLTAGE_MANAGE_MV(6500), SYSTEM_VOLTAGE_MANAGE_DEBOUNCE_TIME(500)}, + {SYSTEM_VOLTAGE_MODE_HIGH, SYSTEM_VOLTAGE_MANAGE_MV(18000),SYSTEM_VOLTAGE_MANAGE_MV(0xffffu),SYSTEM_VOLTAGE_MANAGE_DEBOUNCE_TIME(500)}, + } +}; + + + +/***************************************************************************** +|Prototype : system_voltage_cfg_min_get +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +*****************************************************************************/ +uint16_t system_voltage_cfg_min_get(uint8_t system_voltage_manage_id, uint8_t system_voltage_mode_id) +{ + uint16_t temp; + + temp = gs_system_voltage_manage_cfg[system_voltage_manage_id][system_voltage_mode_id].u16min; + + return (temp); +} + + +/***************************************************************************** +|Prototype : system_voltage_cfg_max_get +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +*****************************************************************************/ +uint16_t system_voltage_cfg_max_get(uint8_t system_voltage_manage_id, uint8_t system_voltage_mode_id) +{ + uint16_t temp; + + temp = gs_system_voltage_manage_cfg[system_voltage_manage_id][system_voltage_mode_id].u16max; + + return (temp); +} + + +/***************************************************************************** +|Prototype : system_voltage_cfg_debounce_time_get +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +*****************************************************************************/ +uint16_t system_voltage_cfg_debounce_time_get(uint8_t system_voltage_manage_id, uint8_t system_voltage_mode_id) +{ + uint16_t temp; + + temp = gs_system_voltage_manage_cfg[system_voltage_manage_id][system_voltage_mode_id].u16debounce_time; + + return (temp); +} + + + +/***************************************************************************** +|Prototype : system_voltage_cfg_get_sys_power +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +*****************************************************************************/ +#if (SYSTEM_VOLTAGE_MANAGE_DEBUG_EN == 1u) +u16 g_adc_sys_power = 16500u; +uint16_t system_voltage_cfg_get_sys_power(void) +{ + return g_adc_sys_power; //实际调用，ADC的 系统电压接口 +} +#endif \ No newline at end of file diff --git a/code_app_out/Source/module/system_voltage_manage/system_voltage_manage_cfg.h b/code_app_out/Source/module/system_voltage_manage/system_voltage_manage_cfg.h new file mode 100644 index 0000000..19e0ee5 --- /dev/null +++ b/code_app_out/Source/module/system_voltage_manage/system_voltage_manage_cfg.h @@ -0,0 +1,96 @@ +/** ########################################################################## +** Filename : system_voltage_manage_cfg.h +** Project : +** Module : +** Processor : +** Version : 1.0 +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20230620- V01-- --Linboyi--- --初版-- +** #########################################################################*/ +#ifndef _SYSTEM_VOLTAGE_MANAGE_CFG_H +#define _SYSTEM_VOLTAGE_MANAGE_CFG_H + +/***************************************************************************** +* I N C L U D E F I L E S +*****************************************************************************/ +#include "common_types.h" +#include "adc_cfg.h" + +/***************************************************************************** +* D E F I N E S / M A C R O S +*****************************************************************************/ +#define SYSTEM_VOLTAGE_MANAGE_DEBUG_EN 0u + + +#define SYSTEM_VOLTAGE_MANAGE_TASK_CYCLE_TIME 2u +#define SYSTEM_VOLTAGE_MODE_UNKNOWN_DEBOUNCE_TIME (100u/SYSTEM_VOLTAGE_MANAGE_TASK_CYCLE_TIME) + +#define FUNC_SYSTEM_VOLTAGE_MANAGE_ID 0u +#define DTC_SYSTEM_VOLTAGE_MANAGE_ID 1u +#define COMM_SYSTEM_VOLTAGE_MANAGE_ID 2u + + +#define SYSTEM_VOLTAGE_MODE_NORMAL_CFG_ID 0u +#define SYSTEM_VOLTAGE_MODE_LOW_CFG_ID 1u +#define SYSTEM_VOLTAGE_MODE_HIGH_CFG_ID 2u + + +#define NUM_OF_SYSTEM_VOLTAGE_MANAGE 3u + + +#define SYSTEM_VOLTAGE_MODE_NORMAL 0u +#define SYSTEM_VOLTAGE_MODE_LOW 1u +#define SYSTEM_VOLTAGE_MODE_HIGH 2u +#define SYSTEM_VOLTAGE_MODE_UNKNOWN 3u + +/***************************************************************************** +* T Y P E D E F I N I T I O N S +*****************************************************************************/ +/*! @brief + */ + + +/***************************************************************************** +* G L O B A L V A R I A B L E S +* only configuration table allowed here,variables are not allowed! +*****************************************************************************/ + + +/***************************************************************************** +* C O N S T A N T S +*****************************************************************************/ + +/***************************************************************************** +* F U N C T I O N P R O T O T Y P E +*****************************************************************************/ +uint16_t system_voltage_cfg_min_get(uint8_t system_voltage_manage_id, uint8_t system_voltage_mode_id); +uint16_t system_voltage_cfg_max_get(uint8_t system_voltage_manage_id, uint8_t system_voltage_mode_id); +uint16_t system_voltage_cfg_debounce_time_get(uint8_t system_voltage_manage_id, uint8_t system_voltage_mode_id); + + +#if (SYSTEM_VOLTAGE_MANAGE_DEBUG_EN == 1u) +uint16_t system_voltage_cfg_get_sys_power(void); +#define SYSTEM_VOLTAGE_MANAGE_GET_ADC_MV() system_voltage_cfg_get_sys_power() + +#else + +#define SYSTEM_VOLTAGE_MANAGE_GET_ADC_MV() adc_manage_get_sbat_voltage();//TODO 添加实际系统电压mV单位的函数 + +#endif + + + + +#endif /*DEFINES_NAME*/ + +/* [] END OF FILE */ \ No newline at end of file diff --git a/code_app_out/Source/sdk/Drivers/CMSIS/Device/FM/FM33xx/Include/core_cm0plus.h b/code_app_out/Source/sdk/Drivers/CMSIS/Device/FM/FM33xx/Include/core_cm0plus.h new file mode 100644 index 0000000..e39c6f3 --- /dev/null +++ b/code_app_out/Source/sdk/Drivers/CMSIS/Device/FM/FM33xx/Include/core_cm0plus.h @@ -0,0 +1,1000 @@ +/**************************************************************************//** + * @file core_cm0plus.h + * @brief CMSIS Cortex-M0+ Core Peripheral Access Layer Header File + * @version V5.00 + * @date 29. April 2016 + ******************************************************************************/ +/* + * Copyright (c) 2009-2016 ARM Limited. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#if defined ( __ICCARM__ ) + #pragma system_include /* treat file as system include file for MISRA check */ +#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) + #pragma clang system_header /* treat file as system include file */ +#endif + +#ifndef __CORE_CM0PLUS_H_GENERIC +#define __CORE_CM0PLUS_H_GENERIC + +#include + +#ifdef __cplusplus + extern "C" { +#endif + +/** + \page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions + CMSIS violates the following MISRA-C:2004 rules: + + \li Required Rule 8.5, object/function definition in header file.
+ Function definitions in header files are used to allow 'inlining'. + + \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.
+ Unions are used for effective representation of core registers. + + \li Advisory Rule 19.7, Function-like macro defined.
+ Function-like macros are used to allow more efficient code. + */ + + +/******************************************************************************* + * CMSIS definitions + ******************************************************************************/ +/** + \ingroup Cortex-M0+ + @{ + */ + +/* CMSIS CM0+ definitions */ +#define __CM0PLUS_CMSIS_VERSION_MAIN ( 5U) /*!< [31:16] CMSIS HAL main version */ +#define __CM0PLUS_CMSIS_VERSION_SUB ( 0U) /*!< [15:0] CMSIS HAL sub version */ +#define __CM0PLUS_CMSIS_VERSION ((__CM0PLUS_CMSIS_VERSION_MAIN << 16U) | \ + __CM0PLUS_CMSIS_VERSION_SUB ) /*!< CMSIS HAL version number */ + +#define __CORTEX_M (0U) /*!< Cortex-M Core */ + +/* Common defines in core_*.h files + - #define __ASM Compiler keyword for asm + - #define __INLINE Compiler keyword for inline + - #define __STATIC_INLINE Compiler keyword for static inline + - #define __NO_RETURN function that never returns + - #define __USED function or variable that is not optimized away + - #define __WEAK weak function or variable + - #define __UNALIGNED_UINT32 pointer to unaligned uint32_t variable + */ +#if defined ( __CC_ARM ) /* ARM Compiler 4/5 */ + #define __ASM __asm + #define __INLINE __inline + #define __STATIC_INLINE static __inline + #define __NO_RETURN __declspec(noreturn) + #define __USED __attribute__((used)) + #define __WEAK __attribute__((weak)) + #define __UNALIGNED_UINT32(x) (*((__packed uint32_t *)(x))) + +#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) /* ARM Compiler 6 */ + #define __ASM __asm + #define __INLINE __inline + #define __STATIC_INLINE static __inline + #define __NO_RETURN __attribute__((noreturn)) + #define __USED __attribute__((used)) + #define __WEAK __attribute__((weak)) + #pragma clang diagnostic push + #pragma clang diagnostic ignored "-Wpacked" + struct __attribute__((packed)) T_UINT32 { uint32_t v; }; + #pragma clang diagnostic pop + #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v) + +#elif defined ( __GNUC__ ) /* GNU Compiler */ + #define __ASM __asm + #define __INLINE inline + #define __STATIC_INLINE static inline + #define __NO_RETURN __attribute__((noreturn)) + #define __USED __attribute__((used)) + #define __WEAK __attribute__((weak)) + struct __attribute__((packed)) T_UINT32 { uint32_t v; }; + #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v) + +#elif defined ( __ICCARM__ ) /* IAR Compiler */ + #define __ASM __asm + #define __INLINE inline + #define __STATIC_INLINE static inline + #define __NO_RETURN __noreturn + #define __USED + #define __WEAK __weak +// struct __packed T_UINT32 { uint32_t v; }; + #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v) + +#elif defined ( __TI_ARM__ ) /* TI ARM Compiler */ + #define __ASM __asm + #define __INLINE inline + #define __STATIC_INLINE static inline + #define __NO_RETURN __attribute__((noreturn)) + #define __USED __attribute__((used)) + #define __WEAK __attribute__((weak)) + struct __attribute__((packed)) T_UINT32 { uint32_t v; }; + #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v) + +#elif defined ( __TASKING__ ) /* TASKING Compiler */ + #define __ASM __asm + #define __INLINE inline + #define __STATIC_INLINE static inline + #define __NO_RETURN __attribute__((noreturn)) + #define __USED __attribute__((used)) + #define __WEAK __attribute__((weak)) + struct __packed__ T_UINT32 { uint32_t v; }; + #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v) + +#elif defined ( __CSMC__ ) /* COSMIC Compiler */ + #define __packed + #define __ASM _asm + #define __INLINE inline + #define __STATIC_INLINE static inline + #define __NO_RETURN + #define __USED + #define __WEAK + #define __UNALIGNED_UINT32(x) (*x) + +#else + #error Unknown compiler +#endif + +/** __FPU_USED indicates whether an FPU is used or not. + This core does not support an FPU at all +*/ +#define __FPU_USED 0U + +#if defined ( __CC_ARM ) + #if defined __TARGET_FPU_VFP + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) + #if defined __ARM_PCS_VFP + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined ( __GNUC__ ) + #if defined (__VFP_FP__) && !defined(__SOFTFP__) + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined ( __ICCARM__ ) + #if defined __ARMVFP__ + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined ( __TI_ARM__ ) + #if defined __TI_VFP_SUPPORT__ + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined ( __TASKING__ ) + #if defined __FPU_VFP__ + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined ( __CSMC__ ) + #if ( __CSMC__ & 0x400U) + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#endif + +#include "core_cminstr.h" /* Core Instruction Access */ +#include "core_cmfunc.h" /* Core Function Access */ + +#ifdef __cplusplus +} +#endif + +#endif /* __CORE_CM0PLUS_H_GENERIC */ + +#ifndef __CMSIS_GENERIC + +#ifndef __CORE_CM0PLUS_H_DEPENDANT +#define __CORE_CM0PLUS_H_DEPENDANT + +#ifdef __cplusplus + extern "C" { +#endif + +/* check device defines and use defaults */ +#if defined __CHECK_DEVICE_DEFINES + #ifndef __CM0PLUS_REV + #define __CM0PLUS_REV 0x0000U + #warning "__CM0PLUS_REV not defined in device header file; using default!" + #endif + + #ifndef __MPU_PRESENT + #define __MPU_PRESENT 0U + #warning "__MPU_PRESENT not defined in device header file; using default!" + #endif + + #ifndef __VTOR_PRESENT + #define __VTOR_PRESENT 0U + #warning "__VTOR_PRESENT not defined in device header file; using default!" + #endif + + #ifndef __NVIC_PRIO_BITS + #define __NVIC_PRIO_BITS 2U + #warning "__NVIC_PRIO_BITS not defined in device header file; using default!" + #endif + + #ifndef __Vendor_SysTickConfig + #define __Vendor_SysTickConfig 0U + #warning "__Vendor_SysTickConfig not defined in device header file; using default!" + #endif +#endif + +/* IO definitions (access restrictions to peripheral registers) */ +/** + \defgroup CMSIS_glob_defs CMSIS Global Defines + + IO Type Qualifiers are used + \li to specify the access to peripheral variables. + \li for automatic generation of peripheral register debug information. +*/ +#ifdef __cplusplus + #define __I volatile /*!< Defines 'read only' permissions */ +#else + #define __I volatile const /*!< Defines 'read only' permissions */ +#endif +#define __O volatile /*!< Defines 'write only' permissions */ +#define __IO volatile /*!< Defines 'read / write' permissions */ + +/* following defines should be used for structure members */ +#define __IM volatile const /*! Defines 'read only' structure member permissions */ +#define __OM volatile /*! Defines 'write only' structure member permissions */ +#define __IOM volatile /*! Defines 'read / write' structure member permissions */ + +/*@} end of group Cortex-M0+ */ + + + +/******************************************************************************* + * Register Abstraction + Core Register contain: + - Core Register + - Core NVIC Register + - Core SCB Register + - Core SysTick Register + - Core MPU Register + ******************************************************************************/ +/** + \defgroup CMSIS_core_register Defines and Type Definitions + \brief Type definitions and defines for Cortex-M processor based devices. +*/ + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_CORE Status and Control Registers + \brief Core Register type definitions. + @{ + */ + +/** + \brief Union type to access the Application Program Status Register (APSR). + */ +typedef union +{ + struct + { + uint32_t _reserved0:28; /*!< bit: 0..27 Reserved */ + uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ + uint32_t C:1; /*!< bit: 29 Carry condition code flag */ + uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ + uint32_t N:1; /*!< bit: 31 Negative condition code flag */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} APSR_Type; + +/* APSR Register Definitions */ +#define APSR_N_Pos 31U /*!< APSR: N Position */ +#define APSR_N_Msk (1UL << APSR_N_Pos) /*!< APSR: N Mask */ + +#define APSR_Z_Pos 30U /*!< APSR: Z Position */ +#define APSR_Z_Msk (1UL << APSR_Z_Pos) /*!< APSR: Z Mask */ + +#define APSR_C_Pos 29U /*!< APSR: C Position */ +#define APSR_C_Msk (1UL << APSR_C_Pos) /*!< APSR: C Mask */ + +#define APSR_V_Pos 28U /*!< APSR: V Position */ +#define APSR_V_Msk (1UL << APSR_V_Pos) /*!< APSR: V Mask */ + + +/** + \brief Union type to access the Interrupt Program Status Register (IPSR). + */ +typedef union +{ + struct + { + uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ + uint32_t _reserved0:23; /*!< bit: 9..31 Reserved */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} IPSR_Type; + +/* IPSR Register Definitions */ +#define IPSR_ISR_Pos 0U /*!< IPSR: ISR Position */ +#define IPSR_ISR_Msk (0x1FFUL /*<< IPSR_ISR_Pos*/) /*!< IPSR: ISR Mask */ + + +/** + \brief Union type to access the Special-Purpose Program Status Registers (xPSR). + */ +typedef union +{ + struct + { + uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ + uint32_t _reserved0:15; /*!< bit: 9..23 Reserved */ + uint32_t T:1; /*!< bit: 24 Thumb bit (read 0) */ + uint32_t _reserved1:3; /*!< bit: 25..27 Reserved */ + uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ + uint32_t C:1; /*!< bit: 29 Carry condition code flag */ + uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ + uint32_t N:1; /*!< bit: 31 Negative condition code flag */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} xPSR_Type; + +/* xPSR Register Definitions */ +#define xPSR_N_Pos 31U /*!< xPSR: N Position */ +#define xPSR_N_Msk (1UL << xPSR_N_Pos) /*!< xPSR: N Mask */ + +#define xPSR_Z_Pos 30U /*!< xPSR: Z Position */ +#define xPSR_Z_Msk (1UL << xPSR_Z_Pos) /*!< xPSR: Z Mask */ + +#define xPSR_C_Pos 29U /*!< xPSR: C Position */ +#define xPSR_C_Msk (1UL << xPSR_C_Pos) /*!< xPSR: C Mask */ + +#define xPSR_V_Pos 28U /*!< xPSR: V Position */ +#define xPSR_V_Msk (1UL << xPSR_V_Pos) /*!< xPSR: V Mask */ + +#define xPSR_T_Pos 24U /*!< xPSR: T Position */ +#define xPSR_T_Msk (1UL << xPSR_T_Pos) /*!< xPSR: T Mask */ + +#define xPSR_ISR_Pos 0U /*!< xPSR: ISR Position */ +#define xPSR_ISR_Msk (0x1FFUL /*<< xPSR_ISR_Pos*/) /*!< xPSR: ISR Mask */ + + +/** + \brief Union type to access the Control Registers (CONTROL). + */ +typedef union +{ + struct + { + uint32_t nPRIV:1; /*!< bit: 0 Execution privilege in Thread mode */ + uint32_t SPSEL:1; /*!< bit: 1 Stack to be used */ + uint32_t _reserved1:30; /*!< bit: 2..31 Reserved */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} CONTROL_Type; + +/* CONTROL Register Definitions */ +#define CONTROL_SPSEL_Pos 1U /*!< CONTROL: SPSEL Position */ +#define CONTROL_SPSEL_Msk (1UL << CONTROL_SPSEL_Pos) /*!< CONTROL: SPSEL Mask */ + +#define CONTROL_nPRIV_Pos 0U /*!< CONTROL: nPRIV Position */ +#define CONTROL_nPRIV_Msk (1UL /*<< CONTROL_nPRIV_Pos*/) /*!< CONTROL: nPRIV Mask */ + +/*@} end of group CMSIS_CORE */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_NVIC Nested Vectored Interrupt Controller (NVIC) + \brief Type definitions for the NVIC Registers + @{ + */ + +/** + \brief Structure type to access the Nested Vectored Interrupt Controller (NVIC). + */ +typedef struct +{ + __IOM uint32_t ISER[1U]; /*!< Offset: 0x000 (R/W) Interrupt Set Enable Register */ + uint32_t RESERVED0[31U]; + __IOM uint32_t ICER[1U]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register */ + uint32_t RSERVED1[31U]; + __IOM uint32_t ISPR[1U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */ + uint32_t RESERVED2[31U]; + __IOM uint32_t ICPR[1U]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register */ + uint32_t RESERVED3[31U]; + uint32_t RESERVED4[64U]; + __IOM uint32_t IP[8U]; /*!< Offset: 0x300 (R/W) Interrupt Priority Register */ +} NVIC_Type; + +/*@} end of group CMSIS_NVIC */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_SCB System Control Block (SCB) + \brief Type definitions for the System Control Block Registers + @{ + */ + +/** + \brief Structure type to access the System Control Block (SCB). + */ +typedef struct +{ + __IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */ + __IOM uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Register */ +#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U) + __IOM uint32_t VTOR; /*!< Offset: 0x008 (R/W) Vector Table Offset Register */ +#else + uint32_t RESERVED0; +#endif + __IOM uint32_t AIRCR; /*!< Offset: 0x00C (R/W) Application Interrupt and Reset Control Register */ + __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */ + __IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */ + uint32_t RESERVED1; + __IOM uint32_t SHP[2U]; /*!< Offset: 0x01C (R/W) System Handlers Priority Registers. [0] is RESERVED */ + __IOM uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State Register */ +} SCB_Type; + +/* SCB CPUID Register Definitions */ +#define SCB_CPUID_IMPLEMENTER_Pos 24U /*!< SCB CPUID: IMPLEMENTER Position */ +#define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB CPUID: IMPLEMENTER Mask */ + +#define SCB_CPUID_VARIANT_Pos 20U /*!< SCB CPUID: VARIANT Position */ +#define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) /*!< SCB CPUID: VARIANT Mask */ + +#define SCB_CPUID_ARCHITECTURE_Pos 16U /*!< SCB CPUID: ARCHITECTURE Position */ +#define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB CPUID: ARCHITECTURE Mask */ + +#define SCB_CPUID_PARTNO_Pos 4U /*!< SCB CPUID: PARTNO Position */ +#define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB CPUID: PARTNO Mask */ + +#define SCB_CPUID_REVISION_Pos 0U /*!< SCB CPUID: REVISION Position */ +#define SCB_CPUID_REVISION_Msk (0xFUL /*<< SCB_CPUID_REVISION_Pos*/) /*!< SCB CPUID: REVISION Mask */ + +/* SCB Interrupt Control State Register Definitions */ +#define SCB_ICSR_NMIPENDSET_Pos 31U /*!< SCB ICSR: NMIPENDSET Position */ +#define SCB_ICSR_NMIPENDSET_Msk (1UL << SCB_ICSR_NMIPENDSET_Pos) /*!< SCB ICSR: NMIPENDSET Mask */ + +#define SCB_ICSR_PENDSVSET_Pos 28U /*!< SCB ICSR: PENDSVSET Position */ +#define SCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos) /*!< SCB ICSR: PENDSVSET Mask */ + +#define SCB_ICSR_PENDSVCLR_Pos 27U /*!< SCB ICSR: PENDSVCLR Position */ +#define SCB_ICSR_PENDSVCLR_Msk (1UL << SCB_ICSR_PENDSVCLR_Pos) /*!< SCB ICSR: PENDSVCLR Mask */ + +#define SCB_ICSR_PENDSTSET_Pos 26U /*!< SCB ICSR: PENDSTSET Position */ +#define SCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos) /*!< SCB ICSR: PENDSTSET Mask */ + +#define SCB_ICSR_PENDSTCLR_Pos 25U /*!< SCB ICSR: PENDSTCLR Position */ +#define SCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos) /*!< SCB ICSR: PENDSTCLR Mask */ + +#define SCB_ICSR_ISRPREEMPT_Pos 23U /*!< SCB ICSR: ISRPREEMPT Position */ +#define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB ICSR: ISRPREEMPT Mask */ + +#define SCB_ICSR_ISRPENDING_Pos 22U /*!< SCB ICSR: ISRPENDING Position */ +#define SCB_ICSR_ISRPENDING_Msk (1UL << SCB_ICSR_ISRPENDING_Pos) /*!< SCB ICSR: ISRPENDING Mask */ + +#define SCB_ICSR_VECTPENDING_Pos 12U /*!< SCB ICSR: VECTPENDING Position */ +#define SCB_ICSR_VECTPENDING_Msk (0x1FFUL << SCB_ICSR_VECTPENDING_Pos) /*!< SCB ICSR: VECTPENDING Mask */ + +#define SCB_ICSR_VECTACTIVE_Pos 0U /*!< SCB ICSR: VECTACTIVE Position */ +#define SCB_ICSR_VECTACTIVE_Msk (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/) /*!< SCB ICSR: VECTACTIVE Mask */ + +#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U) +/* SCB Interrupt Control State Register Definitions */ +#define SCB_VTOR_TBLOFF_Pos 8U /*!< SCB VTOR: TBLOFF Position */ +#define SCB_VTOR_TBLOFF_Msk (0xFFFFFFUL << SCB_VTOR_TBLOFF_Pos) /*!< SCB VTOR: TBLOFF Mask */ +#endif + +/* SCB Application Interrupt and Reset Control Register Definitions */ +#define SCB_AIRCR_VECTKEY_Pos 16U /*!< SCB AIRCR: VECTKEY Position */ +#define SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos) /*!< SCB AIRCR: VECTKEY Mask */ + +#define SCB_AIRCR_VECTKEYSTAT_Pos 16U /*!< SCB AIRCR: VECTKEYSTAT Position */ +#define SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos) /*!< SCB AIRCR: VECTKEYSTAT Mask */ + +#define SCB_AIRCR_ENDIANESS_Pos 15U /*!< SCB AIRCR: ENDIANESS Position */ +#define SCB_AIRCR_ENDIANESS_Msk (1UL << SCB_AIRCR_ENDIANESS_Pos) /*!< SCB AIRCR: ENDIANESS Mask */ + +#define SCB_AIRCR_SYSRESETREQ_Pos 2U /*!< SCB AIRCR: SYSRESETREQ Position */ +#define SCB_AIRCR_SYSRESETREQ_Msk (1UL << SCB_AIRCR_SYSRESETREQ_Pos) /*!< SCB AIRCR: SYSRESETREQ Mask */ + +#define SCB_AIRCR_VECTCLRACTIVE_Pos 1U /*!< SCB AIRCR: VECTCLRACTIVE Position */ +#define SCB_AIRCR_VECTCLRACTIVE_Msk (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos) /*!< SCB AIRCR: VECTCLRACTIVE Mask */ + +/* SCB System Control Register Definitions */ +#define SCB_SCR_SEVONPEND_Pos 4U /*!< SCB SCR: SEVONPEND Position */ +#define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) /*!< SCB SCR: SEVONPEND Mask */ + +#define SCB_SCR_SLEEPDEEP_Pos 2U /*!< SCB SCR: SLEEPDEEP Position */ +#define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB SCR: SLEEPDEEP Mask */ + +#define SCB_SCR_SLEEPONEXIT_Pos 1U /*!< SCB SCR: SLEEPONEXIT Position */ +#define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB SCR: SLEEPONEXIT Mask */ + +/* SCB Configuration Control Register Definitions */ +#define SCB_CCR_STKALIGN_Pos 9U /*!< SCB CCR: STKALIGN Position */ +#define SCB_CCR_STKALIGN_Msk (1UL << SCB_CCR_STKALIGN_Pos) /*!< SCB CCR: STKALIGN Mask */ + +#define SCB_CCR_UNALIGN_TRP_Pos 3U /*!< SCB CCR: UNALIGN_TRP Position */ +#define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */ + +/* SCB System Handler Control and State Register Definitions */ +#define SCB_SHCSR_SVCALLPENDED_Pos 15U /*!< SCB SHCSR: SVCALLPENDED Position */ +#define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB SHCSR: SVCALLPENDED Mask */ + +/*@} end of group CMSIS_SCB */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_SysTick System Tick Timer (SysTick) + \brief Type definitions for the System Timer Registers. + @{ + */ + +/** + \brief Structure type to access the System Timer (SysTick). + */ +typedef struct +{ + __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Register */ + __IOM uint32_t LOAD; /*!< Offset: 0x004 (R/W) SysTick Reload Value Register */ + __IOM uint32_t VAL; /*!< Offset: 0x008 (R/W) SysTick Current Value Register */ + __IM uint32_t CALIB; /*!< Offset: 0x00C (R/ ) SysTick Calibration Register */ +} SysTick_Type; + +/* SysTick Control / Status Register Definitions */ +#define SysTick_CTRL_COUNTFLAG_Pos 16U /*!< SysTick CTRL: COUNTFLAG Position */ +#define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */ + +#define SysTick_CTRL_CLKSOURCE_Pos 2U /*!< SysTick CTRL: CLKSOURCE Position */ +#define SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */ + +#define SysTick_CTRL_TICKINT_Pos 1U /*!< SysTick CTRL: TICKINT Position */ +#define SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */ + +#define SysTick_CTRL_ENABLE_Pos 0U /*!< SysTick CTRL: ENABLE Position */ +#define SysTick_CTRL_ENABLE_Msk (1UL /*<< SysTick_CTRL_ENABLE_Pos*/) /*!< SysTick CTRL: ENABLE Mask */ + +/* SysTick Reload Register Definitions */ +#define SysTick_LOAD_RELOAD_Pos 0U /*!< SysTick LOAD: RELOAD Position */ +#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/) /*!< SysTick LOAD: RELOAD Mask */ + +/* SysTick Current Register Definitions */ +#define SysTick_VAL_CURRENT_Pos 0U /*!< SysTick VAL: CURRENT Position */ +#define SysTick_VAL_CURRENT_Msk (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/) /*!< SysTick VAL: CURRENT Mask */ + +/* SysTick Calibration Register Definitions */ +#define SysTick_CALIB_NOREF_Pos 31U /*!< SysTick CALIB: NOREF Position */ +#define SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */ + +#define SysTick_CALIB_SKEW_Pos 30U /*!< SysTick CALIB: SKEW Position */ +#define SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */ + +#define SysTick_CALIB_TENMS_Pos 0U /*!< SysTick CALIB: TENMS Position */ +#define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/) /*!< SysTick CALIB: TENMS Mask */ + +/*@} end of group CMSIS_SysTick */ + +#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_MPU Memory Protection Unit (MPU) + \brief Type definitions for the Memory Protection Unit (MPU) + @{ + */ + +/** + \brief Structure type to access the Memory Protection Unit (MPU). + */ +typedef struct +{ + __IM uint32_t TYPE; /*!< Offset: 0x000 (R/ ) MPU Type Register */ + __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */ + __IOM uint32_t RNR; /*!< Offset: 0x008 (R/W) MPU Region RNRber Register */ + __IOM uint32_t RBAR; /*!< Offset: 0x00C (R/W) MPU Region Base Address Register */ + __IOM uint32_t RASR; /*!< Offset: 0x010 (R/W) MPU Region Attribute and Size Register */ +} MPU_Type; + +/* MPU Type Register Definitions */ +#define MPU_TYPE_IREGION_Pos 16U /*!< MPU TYPE: IREGION Position */ +#define MPU_TYPE_IREGION_Msk (0xFFUL << MPU_TYPE_IREGION_Pos) /*!< MPU TYPE: IREGION Mask */ + +#define MPU_TYPE_DREGION_Pos 8U /*!< MPU TYPE: DREGION Position */ +#define MPU_TYPE_DREGION_Msk (0xFFUL << MPU_TYPE_DREGION_Pos) /*!< MPU TYPE: DREGION Mask */ + +#define MPU_TYPE_SEPARATE_Pos 0U /*!< MPU TYPE: SEPARATE Position */ +#define MPU_TYPE_SEPARATE_Msk (1UL /*<< MPU_TYPE_SEPARATE_Pos*/) /*!< MPU TYPE: SEPARATE Mask */ + +/* MPU Control Register Definitions */ +#define MPU_CTRL_PRIVDEFENA_Pos 2U /*!< MPU CTRL: PRIVDEFENA Position */ +#define MPU_CTRL_PRIVDEFENA_Msk (1UL << MPU_CTRL_PRIVDEFENA_Pos) /*!< MPU CTRL: PRIVDEFENA Mask */ + +#define MPU_CTRL_HFNMIENA_Pos 1U /*!< MPU CTRL: HFNMIENA Position */ +#define MPU_CTRL_HFNMIENA_Msk (1UL << MPU_CTRL_HFNMIENA_Pos) /*!< MPU CTRL: HFNMIENA Mask */ + +#define MPU_CTRL_ENABLE_Pos 0U /*!< MPU CTRL: ENABLE Position */ +#define MPU_CTRL_ENABLE_Msk (1UL /*<< MPU_CTRL_ENABLE_Pos*/) /*!< MPU CTRL: ENABLE Mask */ + +/* MPU Region Number Register Definitions */ +#define MPU_RNR_REGION_Pos 0U /*!< MPU RNR: REGION Position */ +#define MPU_RNR_REGION_Msk (0xFFUL /*<< MPU_RNR_REGION_Pos*/) /*!< MPU RNR: REGION Mask */ + +/* MPU Region Base Address Register Definitions */ +#define MPU_RBAR_ADDR_Pos 8U /*!< MPU RBAR: ADDR Position */ +#define MPU_RBAR_ADDR_Msk (0xFFFFFFUL << MPU_RBAR_ADDR_Pos) /*!< MPU RBAR: ADDR Mask */ + +#define MPU_RBAR_VALID_Pos 4U /*!< MPU RBAR: VALID Position */ +#define MPU_RBAR_VALID_Msk (1UL << MPU_RBAR_VALID_Pos) /*!< MPU RBAR: VALID Mask */ + +#define MPU_RBAR_REGION_Pos 0U /*!< MPU RBAR: REGION Position */ +#define MPU_RBAR_REGION_Msk (0xFUL /*<< MPU_RBAR_REGION_Pos*/) /*!< MPU RBAR: REGION Mask */ + +/* MPU Region Attribute and Size Register Definitions */ +#define MPU_RASR_ATTRS_Pos 16U /*!< MPU RASR: MPU Region Attribute field Position */ +#define MPU_RASR_ATTRS_Msk (0xFFFFUL << MPU_RASR_ATTRS_Pos) /*!< MPU RASR: MPU Region Attribute field Mask */ + +#define MPU_RASR_XN_Pos 28U /*!< MPU RASR: ATTRS.XN Position */ +#define MPU_RASR_XN_Msk (1UL << MPU_RASR_XN_Pos) /*!< MPU RASR: ATTRS.XN Mask */ + +#define MPU_RASR_AP_Pos 24U /*!< MPU RASR: ATTRS.AP Position */ +#define MPU_RASR_AP_Msk (0x7UL << MPU_RASR_AP_Pos) /*!< MPU RASR: ATTRS.AP Mask */ + +#define MPU_RASR_TEX_Pos 19U /*!< MPU RASR: ATTRS.TEX Position */ +#define MPU_RASR_TEX_Msk (0x7UL << MPU_RASR_TEX_Pos) /*!< MPU RASR: ATTRS.TEX Mask */ + +#define MPU_RASR_S_Pos 18U /*!< MPU RASR: ATTRS.S Position */ +#define MPU_RASR_S_Msk (1UL << MPU_RASR_S_Pos) /*!< MPU RASR: ATTRS.S Mask */ + +#define MPU_RASR_C_Pos 17U /*!< MPU RASR: ATTRS.C Position */ +#define MPU_RASR_C_Msk (1UL << MPU_RASR_C_Pos) /*!< MPU RASR: ATTRS.C Mask */ + +#define MPU_RASR_B_Pos 16U /*!< MPU RASR: ATTRS.B Position */ +#define MPU_RASR_B_Msk (1UL << MPU_RASR_B_Pos) /*!< MPU RASR: ATTRS.B Mask */ + +#define MPU_RASR_SRD_Pos 8U /*!< MPU RASR: Sub-Region Disable Position */ +#define MPU_RASR_SRD_Msk (0xFFUL << MPU_RASR_SRD_Pos) /*!< MPU RASR: Sub-Region Disable Mask */ + +#define MPU_RASR_SIZE_Pos 1U /*!< MPU RASR: Region Size Field Position */ +#define MPU_RASR_SIZE_Msk (0x1FUL << MPU_RASR_SIZE_Pos) /*!< MPU RASR: Region Size Field Mask */ + +#define MPU_RASR_ENABLE_Pos 0U /*!< MPU RASR: Region enable bit Position */ +#define MPU_RASR_ENABLE_Msk (1UL /*<< MPU_RASR_ENABLE_Pos*/) /*!< MPU RASR: Region enable bit Disable Mask */ + +/*@} end of group CMSIS_MPU */ +#endif + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_CoreDebug Core Debug Registers (CoreDebug) + \brief Cortex-M0+ Core Debug Registers (DCB registers, SHCSR, and DFSR) are only accessible over DAP and not via processor. + Therefore they are not covered by the Cortex-M0+ header file. + @{ + */ +/*@} end of group CMSIS_CoreDebug */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_core_bitfield Core register bit field macros + \brief Macros for use with bit field definitions (xxx_Pos, xxx_Msk). + @{ + */ + +/** + \brief Mask and shift a bit field value for use in a register bit range. + \param[in] field Name of the register bit field. + \param[in] value Value of the bit field. This parameter is interpreted as an uint32_t type. + \return Masked and shifted value. +*/ +#define _VAL2FLD(field, value) (((uint32_t)(value) << field ## _Pos) & field ## _Msk) + +/** + \brief Mask and shift a register value to extract a bit filed value. + \param[in] field Name of the register bit field. + \param[in] value Value of register. This parameter is interpreted as an uint32_t type. + \return Masked and shifted bit field value. +*/ +#define _FLD2VAL(field, value) (((uint32_t)(value) & field ## _Msk) >> field ## _Pos) + +/*@} end of group CMSIS_core_bitfield */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_core_base Core Definitions + \brief Definitions for base addresses, unions, and structures. + @{ + */ + +/* Memory mapping of Cortex-M0+ Hardware */ +#define SCS_BASE (0xE000E000UL) /*!< System Control Space Base Address */ +#define SysTick_BASE (SCS_BASE + 0x0010UL) /*!< SysTick Base Address */ +#define NVIC_BASE (SCS_BASE + 0x0100UL) /*!< NVIC Base Address */ +#define SCB_BASE (SCS_BASE + 0x0D00UL) /*!< System Control Block Base Address */ + +#define SCB ((SCB_Type *) SCB_BASE ) /*!< SCB configuration struct */ +#define SysTick ((SysTick_Type *) SysTick_BASE ) /*!< SysTick configuration struct */ +#define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration struct */ + +#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) + #define MPU_BASE (SCS_BASE + 0x0D90UL) /*!< Memory Protection Unit */ + #define MPU ((MPU_Type *) MPU_BASE ) /*!< Memory Protection Unit */ +#endif + +/*@} */ + + + +/******************************************************************************* + * Hardware Abstraction Layer + Core Function Interface contains: + - Core NVIC Functions + - Core SysTick Functions + - Core Register Access Functions + ******************************************************************************/ +/** + \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference +*/ + + + +/* ########################## NVIC functions #################################### */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_NVICFunctions NVIC Functions + \brief Functions that manage interrupts and exceptions via the NVIC. + @{ + */ + +/* Interrupt Priorities are WORD accessible only under ARMv6M */ +/* The following MACROS handle generation of the register offset and byte masks */ +#define _BIT_SHIFT(IRQn) ( ((((uint32_t)(int32_t)(IRQn)) ) & 0x03UL) * 8UL) +#define _SHP_IDX(IRQn) ( (((((uint32_t)(int32_t)(IRQn)) & 0x0FUL)-8UL) >> 2UL) ) +#define _IP_IDX(IRQn) ( (((uint32_t)(int32_t)(IRQn)) >> 2UL) ) + + +/** + \brief Enable Interrupt + \details Enables a device specific interrupt in the NVIC interrupt controller. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be nagative. + */ +__STATIC_INLINE void NVIC_EnableIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->ISER[0U] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL)); + } +} + + +/** + \brief Disable Interrupt + \details Disables a device specific interrupt in the NVIC interrupt controller. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be nagative. + */ +__STATIC_INLINE void NVIC_DisableIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->ICER[0U] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL)); + } +} + + +/** + \brief Get Pending Interrupt + \details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt. + \param [in] IRQn Device specific interrupt number. + \return 0 Interrupt status is not pending. + \return 1 Interrupt status is pending. + \note IRQn must not be nagative. + */ +__STATIC_INLINE uint32_t NVIC_GetPendingIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC->ISPR[0U] & (1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +/** + \brief Set Pending Interrupt + \details Sets the pending bit of a device specific interrupt in the NVIC pending register. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be nagative. + */ +__STATIC_INLINE void NVIC_SetPendingIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->ISPR[0U] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL)); + } +} + + +/** + \brief Clear Pending Interrupt + \details Clears the pending bit of a device specific interrupt in the NVIC pending register. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be nagative. + */ +__STATIC_INLINE void NVIC_ClearPendingIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->ICPR[0U] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL)); + } +} + + +/** + \brief Set Interrupt Priority + \details Sets the priority of a device specific interrupt or a processor exception. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + \param [in] IRQn Interrupt number. + \param [in] priority Priority to set. + \note The priority cannot be set for every processor exception. + */ +__STATIC_INLINE void NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->IP[_IP_IDX(IRQn)] = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | + (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); + } + else + { + SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | + (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); + } +} + + +/** + \brief Get Interrupt Priority + \details Reads the priority of a device specific interrupt or a processor exception. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + \param [in] IRQn Interrupt number. + \return Interrupt Priority. + Value is aligned automatically to the implemented priority bits of the microcontroller. + */ +__STATIC_INLINE uint32_t NVIC_GetPriority(IRQn_Type IRQn) +{ + + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC->IP[ _IP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS))); + } + else + { + return((uint32_t)(((SCB->SHP[_SHP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS))); + } +} + + +/** + \brief System Reset + \details Initiates a system reset request to reset the MCU. + */ +__STATIC_INLINE void NVIC_SystemReset(void) +{ + __DSB(); /* Ensure all outstanding memory accesses included + buffered write are completed before reset */ + SCB->AIRCR = ((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | + SCB_AIRCR_SYSRESETREQ_Msk); + __DSB(); /* Ensure completion of memory access */ + + for(;;) /* wait until reset */ + { + __NOP(); + } +} + +/*@} end of CMSIS_Core_NVICFunctions */ + + +/* ########################## FPU functions #################################### */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_FpuFunctions FPU Functions + \brief Function that provides FPU type. + @{ + */ + +/** + \brief get FPU type + \details returns the FPU type + \returns + - \b 0: No FPU + - \b 1: Single precision FPU + - \b 2: Double + Single precision FPU + */ +__STATIC_INLINE uint32_t SCB_GetFPUType(void) +{ + return 0U; /* No FPU */ +} + + +/*@} end of CMSIS_Core_FpuFunctions */ + + + +/* ################################## SysTick function ############################################ */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_SysTickFunctions SysTick Functions + \brief Functions that configure the System. + @{ + */ + +#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U) + +/** + \brief System Tick Configuration + \details Initializes the System Timer and its interrupt, and starts the System Tick Timer. + Counter is in free running mode to generate periodic interrupts. + \param [in] ticks Number of ticks between two interrupts. + \return 0 Function succeeded. + \return 1 Function failed. + \note When the variable __Vendor_SysTickConfig is set to 1, then the + function SysTick_Config is not included. In this case, the file device.h + must contain a vendor-specific implementation of this function. + */ +__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) +{ + if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) + { + return (1UL); /* Reload value impossible */ + } + + SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ + NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ + SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ + SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | + SysTick_CTRL_TICKINT_Msk | + SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ + return (0UL); /* Function successful */ +} + +#endif + +/*@} end of CMSIS_Core_SysTickFunctions */ + + + + +#ifdef __cplusplus +} +#endif + +#endif /* __CORE_CM0PLUS_H_DEPENDANT */ + +#endif /* __CMSIS_GENERIC */ diff --git a/code_app_out/Source/sdk/Drivers/CMSIS/Device/FM/FM33xx/Include/core_cmFunc.h b/code_app_out/Source/sdk/Drivers/CMSIS/Device/FM/FM33xx/Include/core_cmFunc.h new file mode 100644 index 0000000..b6ad0a4 --- /dev/null +++ b/code_app_out/Source/sdk/Drivers/CMSIS/Device/FM/FM33xx/Include/core_cmFunc.h @@ -0,0 +1,664 @@ +/**************************************************************************//** + * @file core_cmFunc.h + * @brief CMSIS Cortex-M Core Function Access Header File + * @version V4.10 + * @date 18. March 2015 + * + * @note + * + ******************************************************************************/ +/* Copyright (c) 2009 - 2015 ARM LIMITED + + All rights reserved. + Redistribution and use in source and binary forms, with or without + modification, are permitted provided that the following conditions are met: + - Redistributions of source code must retain the above copyright + notice, this list of conditions and the following disclaimer. + - Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the + documentation and/or other materials provided with the distribution. + - Neither the name of ARM nor the names of its contributors may be used + to endorse or promote products derived from this software without + specific prior written permission. + * + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE + LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + POSSIBILITY OF SUCH DAMAGE. + ---------------------------------------------------------------------------*/ + + +#ifndef __CORE_CMFUNC_H +#define __CORE_CMFUNC_H + + +/* ########################### Core Function Access ########################### */ +/** \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions + @{ + */ + +#if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/ +/* ARM armcc specific functions */ + +#if (__ARMCC_VERSION < 400677) + #error "Please use ARM Compiler Toolchain V4.0.677 or later!" +#endif + +/* intrinsic void __enable_irq(); */ +/* intrinsic void __disable_irq(); */ + +/** \brief Get Control Register + + This function returns the content of the Control Register. + + \return Control Register value + */ +__STATIC_INLINE uint32_t __get_CONTROL(void) +{ + register uint32_t __regControl __ASM("control"); + return(__regControl); +} + + +/** \brief Set Control Register + + This function writes the given value to the Control Register. + + \param [in] control Control Register value to set + */ +__STATIC_INLINE void __set_CONTROL(uint32_t control) +{ + register uint32_t __regControl __ASM("control"); + __regControl = control; +} + + +/** \brief Get IPSR Register + + This function returns the content of the IPSR Register. + + \return IPSR Register value + */ +__STATIC_INLINE uint32_t __get_IPSR(void) +{ + register uint32_t __regIPSR __ASM("ipsr"); + return(__regIPSR); +} + + +/** \brief Get APSR Register + + This function returns the content of the APSR Register. + + \return APSR Register value + */ +__STATIC_INLINE uint32_t __get_APSR(void) +{ + register uint32_t __regAPSR __ASM("apsr"); + return(__regAPSR); +} + + +/** \brief Get xPSR Register + + This function returns the content of the xPSR Register. + + \return xPSR Register value + */ +__STATIC_INLINE uint32_t __get_xPSR(void) +{ + register uint32_t __regXPSR __ASM("xpsr"); + return(__regXPSR); +} + + +/** \brief Get Process Stack Pointer + + This function returns the current value of the Process Stack Pointer (PSP). + + \return PSP Register value + */ +__STATIC_INLINE uint32_t __get_PSP(void) +{ + register uint32_t __regProcessStackPointer __ASM("psp"); + return(__regProcessStackPointer); +} + + +/** \brief Set Process Stack Pointer + + This function assigns the given value to the Process Stack Pointer (PSP). + + \param [in] topOfProcStack Process Stack Pointer value to set + */ +__STATIC_INLINE void __set_PSP(uint32_t topOfProcStack) +{ + register uint32_t __regProcessStackPointer __ASM("psp"); + __regProcessStackPointer = topOfProcStack; +} + + +/** \brief Get Main Stack Pointer + + This function returns the current value of the Main Stack Pointer (MSP). + + \return MSP Register value + */ +__STATIC_INLINE uint32_t __get_MSP(void) +{ + register uint32_t __regMainStackPointer __ASM("msp"); + return(__regMainStackPointer); +} + + +/** \brief Set Main Stack Pointer + + This function assigns the given value to the Main Stack Pointer (MSP). + + \param [in] topOfMainStack Main Stack Pointer value to set + */ +__STATIC_INLINE void __set_MSP(uint32_t topOfMainStack) +{ + register uint32_t __regMainStackPointer __ASM("msp"); + __regMainStackPointer = topOfMainStack; +} + + +/** \brief Get Priority Mask + + This function returns the current state of the priority mask bit from the Priority Mask Register. + + \return Priority Mask value + */ +__STATIC_INLINE uint32_t __get_PRIMASK(void) +{ + register uint32_t __regPriMask __ASM("primask"); + return(__regPriMask); +} + + +/** \brief Set Priority Mask + + This function assigns the given value to the Priority Mask Register. + + \param [in] priMask Priority Mask + */ +__STATIC_INLINE void __set_PRIMASK(uint32_t priMask) +{ + register uint32_t __regPriMask __ASM("primask"); + __regPriMask = (priMask); +} + + +#if (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300) + +/** \brief Enable FIQ + + This function enables FIQ interrupts by clearing the F-bit in the CPSR. + Can only be executed in Privileged modes. + */ +#define __enable_fault_irq __enable_fiq + + +/** \brief Disable FIQ + + This function disables FIQ interrupts by setting the F-bit in the CPSR. + Can only be executed in Privileged modes. + */ +#define __disable_fault_irq __disable_fiq + + +/** \brief Get Base Priority + + This function returns the current value of the Base Priority register. + + \return Base Priority register value + */ +__STATIC_INLINE uint32_t __get_BASEPRI(void) +{ + register uint32_t __regBasePri __ASM("basepri"); + return(__regBasePri); +} + + +/** \brief Set Base Priority + + This function assigns the given value to the Base Priority register. + + \param [in] basePri Base Priority value to set + */ +__STATIC_INLINE void __set_BASEPRI(uint32_t basePri) +{ + register uint32_t __regBasePri __ASM("basepri"); + __regBasePri = (basePri & 0xff); +} + + +/** \brief Set Base Priority with condition + + This function assigns the given value to the Base Priority register only if BASEPRI masking is disabled, + or the new value increases the BASEPRI priority level. + + \param [in] basePri Base Priority value to set + */ +__STATIC_INLINE void __set_BASEPRI_MAX(uint32_t basePri) +{ + register uint32_t __regBasePriMax __ASM("basepri_max"); + __regBasePriMax = (basePri & 0xff); +} + + +/** \brief Get Fault Mask + + This function returns the current value of the Fault Mask register. + + \return Fault Mask register value + */ +__STATIC_INLINE uint32_t __get_FAULTMASK(void) +{ + register uint32_t __regFaultMask __ASM("faultmask"); + return(__regFaultMask); +} + + +/** \brief Set Fault Mask + + This function assigns the given value to the Fault Mask register. + + \param [in] faultMask Fault Mask value to set + */ +__STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask) +{ + register uint32_t __regFaultMask __ASM("faultmask"); + __regFaultMask = (faultMask & (uint32_t)1); +} + +#endif /* (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300) */ + + +#if (__CORTEX_M == 0x04) || (__CORTEX_M == 0x07) + +/** \brief Get FPSCR + + This function returns the current value of the Floating Point Status/Control register. + + \return Floating Point Status/Control register value + */ +__STATIC_INLINE uint32_t __get_FPSCR(void) +{ +#if (__FPU_PRESENT == 1) && (__FPU_USED == 1) + register uint32_t __regfpscr __ASM("fpscr"); + return(__regfpscr); +#else + return(0); +#endif +} + + +/** \brief Set FPSCR + + This function assigns the given value to the Floating Point Status/Control register. + + \param [in] fpscr Floating Point Status/Control value to set + */ +__STATIC_INLINE void __set_FPSCR(uint32_t fpscr) +{ +#if (__FPU_PRESENT == 1) && (__FPU_USED == 1) + register uint32_t __regfpscr __ASM("fpscr"); + __regfpscr = (fpscr); +#endif +} + +#endif /* (__CORTEX_M == 0x04) || (__CORTEX_M == 0x07) */ + + +#elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/ +/* GNU gcc specific functions */ + +/** \brief Enable IRQ Interrupts + + This function enables IRQ interrupts by clearing the I-bit in the CPSR. + Can only be executed in Privileged modes. + */ +__attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_irq(void) +{ + __ASM volatile ("cpsie i" : : : "memory"); +} + + +/** \brief Disable IRQ Interrupts + + This function disables IRQ interrupts by setting the I-bit in the CPSR. + Can only be executed in Privileged modes. + */ +__attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_irq(void) +{ + __ASM volatile ("cpsid i" : : : "memory"); +} + + +/** \brief Get Control Register + + This function returns the content of the Control Register. + + \return Control Register value + */ +__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_CONTROL(void) +{ + uint32_t result; + + __ASM volatile ("MRS %0, control" : "=r" (result) ); + return(result); +} + + +/** \brief Set Control Register + + This function writes the given value to the Control Register. + + \param [in] control Control Register value to set + */ +__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_CONTROL(uint32_t control) +{ + __ASM volatile ("MSR control, %0" : : "r" (control) : "memory"); +} + + +/** \brief Get IPSR Register + + This function returns the content of the IPSR Register. + + \return IPSR Register value + */ +__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_IPSR(void) +{ + uint32_t result; + + __ASM volatile ("MRS %0, ipsr" : "=r" (result) ); + return(result); +} + + +/** \brief Get APSR Register + + This function returns the content of the APSR Register. + + \return APSR Register value + */ +__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_APSR(void) +{ + uint32_t result; + + __ASM volatile ("MRS %0, apsr" : "=r" (result) ); + return(result); +} + + +/** \brief Get xPSR Register + + This function returns the content of the xPSR Register. + + \return xPSR Register value + */ +__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_xPSR(void) +{ + uint32_t result; + + __ASM volatile ("MRS %0, xpsr" : "=r" (result) ); + return(result); +} + + +/** \brief Get Process Stack Pointer + + This function returns the current value of the Process Stack Pointer (PSP). + + \return PSP Register value + */ +__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_PSP(void) +{ + register uint32_t result; + + __ASM volatile ("MRS %0, psp\n" : "=r" (result) ); + return(result); +} + + +/** \brief Set Process Stack Pointer + + This function assigns the given value to the Process Stack Pointer (PSP). + + \param [in] topOfProcStack Process Stack Pointer value to set + */ +__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_PSP(uint32_t topOfProcStack) +{ + __ASM volatile ("MSR psp, %0\n" : : "r" (topOfProcStack) : "sp"); +} + + +/** \brief Get Main Stack Pointer + + This function returns the current value of the Main Stack Pointer (MSP). + + \return MSP Register value + */ +__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_MSP(void) +{ + register uint32_t result; + + __ASM volatile ("MRS %0, msp\n" : "=r" (result) ); + return(result); +} + + +/** \brief Set Main Stack Pointer + + This function assigns the given value to the Main Stack Pointer (MSP). + + \param [in] topOfMainStack Main Stack Pointer value to set + */ +__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_MSP(uint32_t topOfMainStack) +{ + __ASM volatile ("MSR msp, %0\n" : : "r" (topOfMainStack) : "sp"); +} + + +/** \brief Get Priority Mask + + This function returns the current state of the priority mask bit from the Priority Mask Register. + + \return Priority Mask value + */ +__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_PRIMASK(void) +{ + uint32_t result; + + __ASM volatile ("MRS %0, primask" : "=r" (result) ); + return(result); +} + + +/** \brief Set Priority Mask + + This function assigns the given value to the Priority Mask Register. + + \param [in] priMask Priority Mask + */ +__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_PRIMASK(uint32_t priMask) +{ + __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); +} + + +#if (__CORTEX_M >= 0x03) + +/** \brief Enable FIQ + + This function enables FIQ interrupts by clearing the F-bit in the CPSR. + Can only be executed in Privileged modes. + */ +__attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_fault_irq(void) +{ + __ASM volatile ("cpsie f" : : : "memory"); +} + + +/** \brief Disable FIQ + + This function disables FIQ interrupts by setting the F-bit in the CPSR. + Can only be executed in Privileged modes. + */ +__attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_fault_irq(void) +{ + __ASM volatile ("cpsid f" : : : "memory"); +} + + +/** \brief Get Base Priority + + This function returns the current value of the Base Priority register. + + \return Base Priority register value + */ +__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_BASEPRI(void) +{ + uint32_t result; + + __ASM volatile ("MRS %0, basepri" : "=r" (result) ); + return(result); +} + + +/** \brief Set Base Priority + + This function assigns the given value to the Base Priority register. + + \param [in] basePri Base Priority value to set + */ +__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_BASEPRI(uint32_t value) +{ + __ASM volatile ("MSR basepri, %0" : : "r" (value) : "memory"); +} + + +/** \brief Set Base Priority with condition + + This function assigns the given value to the Base Priority register only if BASEPRI masking is disabled, + or the new value increases the BASEPRI priority level. + + \param [in] basePri Base Priority value to set + */ +__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_BASEPRI_MAX(uint32_t value) +{ + __ASM volatile ("MSR basepri_max, %0" : : "r" (value) : "memory"); +} + + +/** \brief Get Fault Mask + + This function returns the current value of the Fault Mask register. + + \return Fault Mask register value + */ +__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_FAULTMASK(void) +{ + uint32_t result; + + __ASM volatile ("MRS %0, faultmask" : "=r" (result) ); + return(result); +} + + +/** \brief Set Fault Mask + + This function assigns the given value to the Fault Mask register. + + \param [in] faultMask Fault Mask value to set + */ +__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask) +{ + __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory"); +} + +#endif /* (__CORTEX_M >= 0x03) */ + + +#if (__CORTEX_M == 0x04) || (__CORTEX_M == 0x07) + +/** \brief Get FPSCR + + This function returns the current value of the Floating Point Status/Control register. + + \return Floating Point Status/Control register value + */ +__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_FPSCR(void) +{ +#if (__FPU_PRESENT == 1) && (__FPU_USED == 1) + uint32_t result; + + /* Empty asm statement works as a scheduling barrier */ + __ASM volatile (""); + __ASM volatile ("VMRS %0, fpscr" : "=r" (result) ); + __ASM volatile (""); + return(result); +#else + return(0); +#endif +} + + +/** \brief Set FPSCR + + This function assigns the given value to the Floating Point Status/Control register. + + \param [in] fpscr Floating Point Status/Control value to set + */ +__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_FPSCR(uint32_t fpscr) +{ +#if (__FPU_PRESENT == 1) && (__FPU_USED == 1) + /* Empty asm statement works as a scheduling barrier */ + __ASM volatile (""); + __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc"); + __ASM volatile (""); +#endif +} + +#endif /* (__CORTEX_M == 0x04) || (__CORTEX_M == 0x07) */ + + +#elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/ +/* IAR iccarm specific functions */ +#include + + +#elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/ +/* TI CCS specific functions */ +#include + + +#elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/ +/* TASKING carm specific functions */ +/* + * The CMSIS functions have been implemented as intrinsics in the compiler. + * Please use "carm -?i" to get an up to date list of all intrinsics, + * Including the CMSIS ones. + */ + + +#elif defined ( __CSMC__ ) /*------------------ COSMIC Compiler -------------------*/ +/* Cosmic specific functions */ +#include + +#endif + +/*@} end of CMSIS_Core_RegAccFunctions */ + +#endif /* __CORE_CMFUNC_H */ diff --git a/code_app_out/Source/sdk/Drivers/CMSIS/Device/FM/FM33xx/Include/core_cmInstr.h b/code_app_out/Source/sdk/Drivers/CMSIS/Device/FM/FM33xx/Include/core_cmInstr.h new file mode 100644 index 0000000..fca425c --- /dev/null +++ b/code_app_out/Source/sdk/Drivers/CMSIS/Device/FM/FM33xx/Include/core_cmInstr.h @@ -0,0 +1,916 @@ +/**************************************************************************//** + * @file core_cmInstr.h + * @brief CMSIS Cortex-M Core Instruction Access Header File + * @version V4.10 + * @date 18. March 2015 + * + * @note + * + ******************************************************************************/ +/* Copyright (c) 2009 - 2014 ARM LIMITED + + All rights reserved. + Redistribution and use in source and binary forms, with or without + modification, are permitted provided that the following conditions are met: + - Redistributions of source code must retain the above copyright + notice, this list of conditions and the following disclaimer. + - Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the + documentation and/or other materials provided with the distribution. + - Neither the name of ARM nor the names of its contributors may be used + to endorse or promote products derived from this software without + specific prior written permission. + * + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE + LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + POSSIBILITY OF SUCH DAMAGE. + ---------------------------------------------------------------------------*/ + + +#ifndef __CORE_CMINSTR_H +#define __CORE_CMINSTR_H + + +/* ########################## Core Instruction Access ######################### */ +/** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface + Access to dedicated instructions + @{ +*/ + +#if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/ +/* ARM armcc specific functions */ + +#if (__ARMCC_VERSION < 400677) + #error "Please use ARM Compiler Toolchain V4.0.677 or later!" +#endif + + +/** \brief No Operation + + No Operation does nothing. This instruction can be used for code alignment purposes. + */ +#define __NOP __nop + + +/** \brief Wait For Interrupt + + Wait For Interrupt is a hint instruction that suspends execution + until one of a number of events occurs. + */ +#define __WFI __wfi + + +/** \brief Wait For Event + + Wait For Event is a hint instruction that permits the processor to enter + a low-power state until one of a number of events occurs. + */ +#define __WFE __wfe + + +/** \brief Send Event + + Send Event is a hint instruction. It causes an event to be signaled to the CPU. + */ +#define __SEV __sev + + +/** \brief Instruction Synchronization Barrier + + Instruction Synchronization Barrier flushes the pipeline in the processor, + so that all instructions following the ISB are fetched from cache or + memory, after the instruction has been completed. + */ +#define __ISB() do {\ + __schedule_barrier();\ + __isb(0xF);\ + __schedule_barrier();\ + } while (0) + +/** \brief Data Synchronization Barrier + + This function acts as a special kind of Data Memory Barrier. + It completes when all explicit memory accesses before this instruction complete. + */ +#define __DSB() do {\ + __schedule_barrier();\ + __dsb(0xF);\ + __schedule_barrier();\ + } while (0) + +/** \brief Data Memory Barrier + + This function ensures the apparent order of the explicit memory operations before + and after the instruction, without ensuring their completion. + */ +#define __DMB() do {\ + __schedule_barrier();\ + __dmb(0xF);\ + __schedule_barrier();\ + } while (0) + +/** \brief Reverse byte order (32 bit) + + This function reverses the byte order in integer value. + + \param [in] value Value to reverse + \return Reversed value + */ +#define __REV __rev + + +/** \brief Reverse byte order (16 bit) + + This function reverses the byte order in two unsigned short values. + + \param [in] value Value to reverse + \return Reversed value + */ +#ifndef __NO_EMBEDDED_ASM +__attribute__((section(".rev16_text"))) __STATIC_INLINE __ASM uint32_t __REV16(uint32_t value) +{ + rev16 r0, r0 + bx lr +} +#endif + +/** \brief Reverse byte order in signed short value + + This function reverses the byte order in a signed short value with sign extension to integer. + + \param [in] value Value to reverse + \return Reversed value + */ +#ifndef __NO_EMBEDDED_ASM +__attribute__((section(".revsh_text"))) __STATIC_INLINE __ASM int32_t __REVSH(int32_t value) +{ + revsh r0, r0 + bx lr +} +#endif + + +/** \brief Rotate Right in unsigned value (32 bit) + + This function Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits. + + \param [in] value Value to rotate + \param [in] value Number of Bits to rotate + \return Rotated value + */ +#define __ROR __ror + + +/** \brief Breakpoint + + This function causes the processor to enter Debug state. + Debug tools can use this to investigate system state when the instruction at a particular address is reached. + + \param [in] value is ignored by the processor. + If required, a debugger can use it to store additional information about the breakpoint. + */ +#define __BKPT(value) __breakpoint(value) + + +/** \brief Reverse bit order of value + + This function reverses the bit order of the given value. + + \param [in] value Value to reverse + \return Reversed value + */ +#if (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300) + #define __RBIT __rbit +#else +__attribute__((always_inline)) __STATIC_INLINE uint32_t __RBIT(uint32_t value) +{ + uint32_t result; + int32_t s = 4 /*sizeof(v)*/ * 8 - 1; // extra shift needed at end + + result = value; // r will be reversed bits of v; first get LSB of v + for (value >>= 1; value; value >>= 1) + { + result <<= 1; + result |= value & 1; + s--; + } + result <<= s; // shift when v's highest bits are zero + return(result); +} +#endif + + +/** \brief Count leading zeros + + This function counts the number of leading zeros of a data value. + + \param [in] value Value to count the leading zeros + \return number of leading zeros in value + */ +#define __CLZ __clz + + +#if (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300) + +/** \brief LDR Exclusive (8 bit) + + This function executes a exclusive LDR instruction for 8 bit value. + + \param [in] ptr Pointer to data + \return value of type uint8_t at (*ptr) + */ +#define __LDREXB(ptr) ((uint8_t ) __ldrex(ptr)) + + +/** \brief LDR Exclusive (16 bit) + + This function executes a exclusive LDR instruction for 16 bit values. + + \param [in] ptr Pointer to data + \return value of type uint16_t at (*ptr) + */ +#define __LDREXH(ptr) ((uint16_t) __ldrex(ptr)) + + +/** \brief LDR Exclusive (32 bit) + + This function executes a exclusive LDR instruction for 32 bit values. + + \param [in] ptr Pointer to data + \return value of type uint32_t at (*ptr) + */ +#define __LDREXW(ptr) ((uint32_t ) __ldrex(ptr)) + + +/** \brief STR Exclusive (8 bit) + + This function executes a exclusive STR instruction for 8 bit values. + + \param [in] value Value to store + \param [in] ptr Pointer to location + \return 0 Function succeeded + \return 1 Function failed + */ +#define __STREXB(value, ptr) __strex(value, ptr) + + +/** \brief STR Exclusive (16 bit) + + This function executes a exclusive STR instruction for 16 bit values. + + \param [in] value Value to store + \param [in] ptr Pointer to location + \return 0 Function succeeded + \return 1 Function failed + */ +#define __STREXH(value, ptr) __strex(value, ptr) + + +/** \brief STR Exclusive (32 bit) + + This function executes a exclusive STR instruction for 32 bit values. + + \param [in] value Value to store + \param [in] ptr Pointer to location + \return 0 Function succeeded + \return 1 Function failed + */ +#define __STREXW(value, ptr) __strex(value, ptr) + + +/** \brief Remove the exclusive lock + + This function removes the exclusive lock which is created by LDREX. + + */ +#define __CLREX __clrex + + +/** \brief Signed Saturate + + This function saturates a signed value. + + \param [in] value Value to be saturated + \param [in] sat Bit position to saturate to (1..32) + \return Saturated value + */ +#define __SSAT __ssat + + +/** \brief Unsigned Saturate + + This function saturates an unsigned value. + + \param [in] value Value to be saturated + \param [in] sat Bit position to saturate to (0..31) + \return Saturated value + */ +#define __USAT __usat + + +/** \brief Rotate Right with Extend (32 bit) + + This function moves each bit of a bitstring right by one bit. + The carry input is shifted in at the left end of the bitstring. + + \param [in] value Value to rotate + \return Rotated value + */ +#ifndef __NO_EMBEDDED_ASM +__attribute__((section(".rrx_text"))) __STATIC_INLINE __ASM uint32_t __RRX(uint32_t value) +{ + rrx r0, r0 + bx lr +} +#endif + + +/** \brief LDRT Unprivileged (8 bit) + + This function executes a Unprivileged LDRT instruction for 8 bit value. + + \param [in] ptr Pointer to data + \return value of type uint8_t at (*ptr) + */ +#define __LDRBT(ptr) ((uint8_t ) __ldrt(ptr)) + + +/** \brief LDRT Unprivileged (16 bit) + + This function executes a Unprivileged LDRT instruction for 16 bit values. + + \param [in] ptr Pointer to data + \return value of type uint16_t at (*ptr) + */ +#define __LDRHT(ptr) ((uint16_t) __ldrt(ptr)) + + +/** \brief LDRT Unprivileged (32 bit) + + This function executes a Unprivileged LDRT instruction for 32 bit values. + + \param [in] ptr Pointer to data + \return value of type uint32_t at (*ptr) + */ +#define __LDRT(ptr) ((uint32_t ) __ldrt(ptr)) + + +/** \brief STRT Unprivileged (8 bit) + + This function executes a Unprivileged STRT instruction for 8 bit values. + + \param [in] value Value to store + \param [in] ptr Pointer to location + */ +#define __STRBT(value, ptr) __strt(value, ptr) + + +/** \brief STRT Unprivileged (16 bit) + + This function executes a Unprivileged STRT instruction for 16 bit values. + + \param [in] value Value to store + \param [in] ptr Pointer to location + */ +#define __STRHT(value, ptr) __strt(value, ptr) + + +/** \brief STRT Unprivileged (32 bit) + + This function executes a Unprivileged STRT instruction for 32 bit values. + + \param [in] value Value to store + \param [in] ptr Pointer to location + */ +#define __STRT(value, ptr) __strt(value, ptr) + +#endif /* (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300) */ + + +#elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/ +/* GNU gcc specific functions */ + +/* Define macros for porting to both thumb1 and thumb2. + * For thumb1, use low register (r0-r7), specified by constrant "l" + * Otherwise, use general registers, specified by constrant "r" */ +#if defined (__thumb__) && !defined (__thumb2__) +#define __CMSIS_GCC_OUT_REG(r) "=l" (r) +#define __CMSIS_GCC_USE_REG(r) "l" (r) +#else +#define __CMSIS_GCC_OUT_REG(r) "=r" (r) +#define __CMSIS_GCC_USE_REG(r) "r" (r) +#endif + +/** \brief No Operation + + No Operation does nothing. This instruction can be used for code alignment purposes. + */ +__attribute__((always_inline)) __STATIC_INLINE void __NOP(void) +{ + __ASM volatile ("nop"); +} + + +/** \brief Wait For Interrupt + + Wait For Interrupt is a hint instruction that suspends execution + until one of a number of events occurs. + */ +__attribute__((always_inline)) __STATIC_INLINE void __WFI(void) +{ + __ASM volatile ("wfi"); +} + + +/** \brief Wait For Event + + Wait For Event is a hint instruction that permits the processor to enter + a low-power state until one of a number of events occurs. + */ +__attribute__((always_inline)) __STATIC_INLINE void __WFE(void) +{ + __ASM volatile ("wfe"); +} + + +/** \brief Send Event + + Send Event is a hint instruction. It causes an event to be signaled to the CPU. + */ +__attribute__((always_inline)) __STATIC_INLINE void __SEV(void) +{ + __ASM volatile ("sev"); +} + + +/** \brief Instruction Synchronization Barrier + + Instruction Synchronization Barrier flushes the pipeline in the processor, + so that all instructions following the ISB are fetched from cache or + memory, after the instruction has been completed. + */ +__attribute__((always_inline)) __STATIC_INLINE void __ISB(void) +{ + __ASM volatile ("isb 0xF":::"memory"); +} + + +/** \brief Data Synchronization Barrier + + This function acts as a special kind of Data Memory Barrier. + It completes when all explicit memory accesses before this instruction complete. + */ +__attribute__((always_inline)) __STATIC_INLINE void __DSB(void) +{ + __ASM volatile ("dsb 0xF":::"memory"); +} + + +/** \brief Data Memory Barrier + + This function ensures the apparent order of the explicit memory operations before + and after the instruction, without ensuring their completion. + */ +__attribute__((always_inline)) __STATIC_INLINE void __DMB(void) +{ + __ASM volatile ("dmb 0xF":::"memory"); +} + + +/** \brief Reverse byte order (32 bit) + + This function reverses the byte order in integer value. + + \param [in] value Value to reverse + \return Reversed value + */ +__attribute__((always_inline)) __STATIC_INLINE uint32_t __REV(uint32_t value) +{ +#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 5) + return __builtin_bswap32(value); +#else + uint32_t result; + + __ASM volatile ("rev %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); + return(result); +#endif +} + + +/** \brief Reverse byte order (16 bit) + + This function reverses the byte order in two unsigned short values. + + \param [in] value Value to reverse + \return Reversed value + */ +__attribute__((always_inline)) __STATIC_INLINE uint32_t __REV16(uint32_t value) +{ + uint32_t result; + + __ASM volatile ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); + return(result); +} + + +/** \brief Reverse byte order in signed short value + + This function reverses the byte order in a signed short value with sign extension to integer. + + \param [in] value Value to reverse + \return Reversed value + */ +__attribute__((always_inline)) __STATIC_INLINE int32_t __REVSH(int32_t value) +{ +#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8) + return (short)__builtin_bswap16(value); +#else + uint32_t result; + + __ASM volatile ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); + return(result); +#endif +} + + +/** \brief Rotate Right in unsigned value (32 bit) + + This function Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits. + + \param [in] value Value to rotate + \param [in] value Number of Bits to rotate + \return Rotated value + */ +__attribute__((always_inline)) __STATIC_INLINE uint32_t __ROR(uint32_t op1, uint32_t op2) +{ + return (op1 >> op2) | (op1 << (32 - op2)); +} + + +/** \brief Breakpoint + + This function causes the processor to enter Debug state. + Debug tools can use this to investigate system state when the instruction at a particular address is reached. + + \param [in] value is ignored by the processor. + If required, a debugger can use it to store additional information about the breakpoint. + */ +#define __BKPT(value) __ASM volatile ("bkpt "#value) + + +/** \brief Reverse bit order of value + + This function reverses the bit order of the given value. + + \param [in] value Value to reverse + \return Reversed value + */ +__attribute__((always_inline)) __STATIC_INLINE uint32_t __RBIT(uint32_t value) +{ + uint32_t result; + +#if (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300) + __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); +#else + int32_t s = 4 /*sizeof(v)*/ * 8 - 1; // extra shift needed at end + + result = value; // r will be reversed bits of v; first get LSB of v + for (value >>= 1; value; value >>= 1) + { + result <<= 1; + result |= value & 1; + s--; + } + result <<= s; // shift when v's highest bits are zero +#endif + return(result); +} + + +/** \brief Count leading zeros + + This function counts the number of leading zeros of a data value. + + \param [in] value Value to count the leading zeros + \return number of leading zeros in value + */ +#define __CLZ __builtin_clz + + +#if (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300) + +/** \brief LDR Exclusive (8 bit) + + This function executes a exclusive LDR instruction for 8 bit value. + + \param [in] ptr Pointer to data + \return value of type uint8_t at (*ptr) + */ +__attribute__((always_inline)) __STATIC_INLINE uint8_t __LDREXB(volatile uint8_t *addr) +{ + uint32_t result; + +#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8) + __ASM volatile ("ldrexb %0, %1" : "=r" (result) : "Q" (*addr) ); +#else + /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not + accepted by assembler. So has to use following less efficient pattern. + */ + __ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) : "memory" ); +#endif + return ((uint8_t) result); /* Add explicit type cast here */ +} + + +/** \brief LDR Exclusive (16 bit) + + This function executes a exclusive LDR instruction for 16 bit values. + + \param [in] ptr Pointer to data + \return value of type uint16_t at (*ptr) + */ +__attribute__((always_inline)) __STATIC_INLINE uint16_t __LDREXH(volatile uint16_t *addr) +{ + uint32_t result; + +#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8) + __ASM volatile ("ldrexh %0, %1" : "=r" (result) : "Q" (*addr) ); +#else + /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not + accepted by assembler. So has to use following less efficient pattern. + */ + __ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) : "memory" ); +#endif + return ((uint16_t) result); /* Add explicit type cast here */ +} + + +/** \brief LDR Exclusive (32 bit) + + This function executes a exclusive LDR instruction for 32 bit values. + + \param [in] ptr Pointer to data + \return value of type uint32_t at (*ptr) + */ +__attribute__((always_inline)) __STATIC_INLINE uint32_t __LDREXW(volatile uint32_t *addr) +{ + uint32_t result; + + __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); + return(result); +} + + +/** \brief STR Exclusive (8 bit) + + This function executes a exclusive STR instruction for 8 bit values. + + \param [in] value Value to store + \param [in] ptr Pointer to location + \return 0 Function succeeded + \return 1 Function failed + */ +__attribute__((always_inline)) __STATIC_INLINE uint32_t __STREXB(uint8_t value, volatile uint8_t *addr) +{ + uint32_t result; + + __ASM volatile ("strexb %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) ); + return(result); +} + + +/** \brief STR Exclusive (16 bit) + + This function executes a exclusive STR instruction for 16 bit values. + + \param [in] value Value to store + \param [in] ptr Pointer to location + \return 0 Function succeeded + \return 1 Function failed + */ +__attribute__((always_inline)) __STATIC_INLINE uint32_t __STREXH(uint16_t value, volatile uint16_t *addr) +{ + uint32_t result; + + __ASM volatile ("strexh %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) ); + return(result); +} + + +/** \brief STR Exclusive (32 bit) + + This function executes a exclusive STR instruction for 32 bit values. + + \param [in] value Value to store + \param [in] ptr Pointer to location + \return 0 Function succeeded + \return 1 Function failed + */ +__attribute__((always_inline)) __STATIC_INLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr) +{ + uint32_t result; + + __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); + return(result); +} + + +/** \brief Remove the exclusive lock + + This function removes the exclusive lock which is created by LDREX. + + */ +__attribute__((always_inline)) __STATIC_INLINE void __CLREX(void) +{ + __ASM volatile ("clrex" ::: "memory"); +} + + +/** \brief Signed Saturate + + This function saturates a signed value. + + \param [in] value Value to be saturated + \param [in] sat Bit position to saturate to (1..32) + \return Saturated value + */ +#define __SSAT(ARG1,ARG2) \ +({ \ + uint32_t __RES, __ARG1 = (ARG1); \ + __ASM ("ssat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \ + __RES; \ + }) + + +/** \brief Unsigned Saturate + + This function saturates an unsigned value. + + \param [in] value Value to be saturated + \param [in] sat Bit position to saturate to (0..31) + \return Saturated value + */ +#define __USAT(ARG1,ARG2) \ +({ \ + uint32_t __RES, __ARG1 = (ARG1); \ + __ASM ("usat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \ + __RES; \ + }) + + +/** \brief Rotate Right with Extend (32 bit) + + This function moves each bit of a bitstring right by one bit. + The carry input is shifted in at the left end of the bitstring. + + \param [in] value Value to rotate + \return Rotated value + */ +__attribute__((always_inline)) __STATIC_INLINE uint32_t __RRX(uint32_t value) +{ + uint32_t result; + + __ASM volatile ("rrx %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); + return(result); +} + + +/** \brief LDRT Unprivileged (8 bit) + + This function executes a Unprivileged LDRT instruction for 8 bit value. + + \param [in] ptr Pointer to data + \return value of type uint8_t at (*ptr) + */ +__attribute__((always_inline)) __STATIC_INLINE uint8_t __LDRBT(volatile uint8_t *addr) +{ + uint32_t result; + +#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8) + __ASM volatile ("ldrbt %0, %1" : "=r" (result) : "Q" (*addr) ); +#else + /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not + accepted by assembler. So has to use following less efficient pattern. + */ + __ASM volatile ("ldrbt %0, [%1]" : "=r" (result) : "r" (addr) : "memory" ); +#endif + return ((uint8_t) result); /* Add explicit type cast here */ +} + + +/** \brief LDRT Unprivileged (16 bit) + + This function executes a Unprivileged LDRT instruction for 16 bit values. + + \param [in] ptr Pointer to data + \return value of type uint16_t at (*ptr) + */ +__attribute__((always_inline)) __STATIC_INLINE uint16_t __LDRHT(volatile uint16_t *addr) +{ + uint32_t result; + +#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8) + __ASM volatile ("ldrht %0, %1" : "=r" (result) : "Q" (*addr) ); +#else + /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not + accepted by assembler. So has to use following less efficient pattern. + */ + __ASM volatile ("ldrht %0, [%1]" : "=r" (result) : "r" (addr) : "memory" ); +#endif + return ((uint16_t) result); /* Add explicit type cast here */ +} + + +/** \brief LDRT Unprivileged (32 bit) + + This function executes a Unprivileged LDRT instruction for 32 bit values. + + \param [in] ptr Pointer to data + \return value of type uint32_t at (*ptr) + */ +__attribute__((always_inline)) __STATIC_INLINE uint32_t __LDRT(volatile uint32_t *addr) +{ + uint32_t result; + + __ASM volatile ("ldrt %0, %1" : "=r" (result) : "Q" (*addr) ); + return(result); +} + + +/** \brief STRT Unprivileged (8 bit) + + This function executes a Unprivileged STRT instruction for 8 bit values. + + \param [in] value Value to store + \param [in] ptr Pointer to location + */ +__attribute__((always_inline)) __STATIC_INLINE void __STRBT(uint8_t value, volatile uint8_t *addr) +{ + __ASM volatile ("strbt %1, %0" : "=Q" (*addr) : "r" ((uint32_t)value) ); +} + + +/** \brief STRT Unprivileged (16 bit) + + This function executes a Unprivileged STRT instruction for 16 bit values. + + \param [in] value Value to store + \param [in] ptr Pointer to location + */ +__attribute__((always_inline)) __STATIC_INLINE void __STRHT(uint16_t value, volatile uint16_t *addr) +{ + __ASM volatile ("strht %1, %0" : "=Q" (*addr) : "r" ((uint32_t)value) ); +} + + +/** \brief STRT Unprivileged (32 bit) + + This function executes a Unprivileged STRT instruction for 32 bit values. + + \param [in] value Value to store + \param [in] ptr Pointer to location + */ +__attribute__((always_inline)) __STATIC_INLINE void __STRT(uint32_t value, volatile uint32_t *addr) +{ + __ASM volatile ("strt %1, %0" : "=Q" (*addr) : "r" (value) ); +} + +#endif /* (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300) */ + + +#elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/ +/* IAR iccarm specific functions */ +#include + + +#elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/ +/* TI CCS specific functions */ +#include + + +#elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/ +/* TASKING carm specific functions */ +/* + * The CMSIS functions have been implemented as intrinsics in the compiler. + * Please use "carm -?i" to get an up to date list of all intrinsics, + * Including the CMSIS ones. + */ + + +#elif defined ( __CSMC__ ) /*------------------ COSMIC Compiler -------------------*/ +/* Cosmic specific functions */ +#include + +#endif + +/*@}*/ /* end of group CMSIS_Core_InstructionInterface */ + +#endif /* __CORE_CMINSTR_H */ diff --git a/code_app_out/Source/sdk/Drivers/CMSIS/Device/FM/FM33xx/Include/fm33lg0xx.h b/code_app_out/Source/sdk/Drivers/CMSIS/Device/FM/FM33xx/Include/fm33lg0xx.h new file mode 100644 index 0000000..5e4ee6d --- /dev/null +++ b/code_app_out/Source/sdk/Drivers/CMSIS/Device/FM/FM33xx/Include/fm33lg0xx.h @@ -0,0 +1,993 @@ +/**************************************************************************************************** + * @file FM33LG0XX.h + * + * @brief CMSIS CORTEX-M0 Peripheral Access Layer Header File for + * FM33LG0XX from Keil. + * + * @version V0.0.1 + * @date 14 july 2020 + * + * @note Generated with SVDConv V2.87e + * from CMSIS SVD File 'FM33LG0XX.SVD' Version 1.0, + * + * @par ARM Limited (ARM) is supplying this software for use with Cortex-M + * processor based microcontroller, but can be equally used for other + * suitable processor architectures. This file can be freely distributed. + * Modifications to this file shall be clearly marked. + * + * THIS SOFTWARE IS PROVIDED “AS IS”. NO WARRANTIES, WHETHER EXPRESS, IMPLIED + * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. + * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR + * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. + * + *******************************************************************************************************/ + + +/** @addtogroup Keil + * @{ + */ + +/** @addtogroup FM33LG0XX + * @{ + */ + +#ifndef __FM33LG0XX_H +#define __FM33LG0XX_H + +#ifdef __cplusplus +extern "C" { +#endif + + +#define __RCHF_INITIAL_CLOCK (8000000) /* Value of the Internal RC HIGH oscillator in Hz */ +#define __RCLP_CLOCK (32000) /* Value of the Internal RC LOW oscillator in Hz */ +#define __XTHF_CLOCK (8000000) /* Value of the EXTERNAL oscillator in Hz */ +#define __XTLF_CLOCK (32768) /* Value of the EXTERNAL oscillator in Hz */ + +/** + * @brief Configuration of the Cortex-M0 Processor and Core Peripherals + */ +#define __CM0_REV 0x0100U /*!< Cortex-M0 Core Revision */ +#define __MPU_PRESENT 1U /*!< MPU present or not */ +#define __VTOR_PRESENT 1U /*!< VTOR present or not */ +#define __NVIC_PRIO_BITS 2U /*!< Number of Bits used for Priority Levels */ +#define __Vendor_SysTickConfig 0U /*!< Set to 1 if different SysTick Config is used */ +/* ------------------------- Interrupt Number Definition ------------------------ */ + +/** + * @brief FM33LG0XX Interrupt Number Definition, according to the selected device + * in @ref Library_configuration_section + */ + +typedef enum { +/****** Cortex-M0 Processor Exceptions Numbers ****************************************************************/ + Reset_IRQn = -15, /*!< 1 复位向量 */ + NMI_IRQn = -14, /*!< 2 WKUPx中断、低功耗模式错误中断 */ + HardFault_IRQn = -13, /*!< 3 HardFault中断向量 */ + SVC_IRQn = -5, /*!< 11 SVCall系统服务请求 */ + PendSV_IRQn = -2, /*!< 14 可挂起系统服务请求 */ + SysTick_IRQn = -1, /*!< 15 内部定时器中断向量 */ + +/* -------------------- FM33LG0XX specific Interrupt Numbers --------------------*/ + WWDT_IRQn = 0, /*!< 0 窗口看门狗或独立看门狗中断 */ + SVD_IRQn = 1, /*!< 1 电源监测报警中断 */ + RTCx_IRQn = 2, /*!< 2 实时时钟中断 */ + FLASH_IRQn = 3, /*!< 3 NVMIF中断 */ + FDET_IRQn = 4, /*!< 4 XTLF或XTHF停振检测中断、系统时钟选择错误中断 */ + ADC_IRQn = 5, /*!< 5 ADC转换完成中断 */ + DAC_IRQn = 6, /*!< 6 DAC中断 */ + SPI0_IRQn = 7, /*!< 7 SPI0中断 */ + SPI1_IRQn = 8, /*!< 8 SPI1中断 */ + SPI2_IRQn = 9, /*!< 9 SPI2中断 */ + UART0_IRQn = 10, /*!< 10 UART0中断 */ + UART1_IRQn = 11, /*!< 11 UART1中断 */ + UART3_IRQn = 12, /*!< 12 UART3中断 */ + UART4_IRQn = 13, /*!< 13 UART4中断 */ + UART5_IRQn = 14, /*!< 14 UART5中断 */ + LPUARTx_IRQn = 16, /*!< 16 LPUART0/1/2中断 */ + I2C_IRQn = 17, /*!< 17 I2C中断 */ + CCL_IRQn = 18, /*!< 18 时钟校准中断 */ + AES_IRQn = 19, /*!< 19 AES中断 */ + LPTIMx_IRQn = 20, /*!< 20 LPTIM16或LPTIM32中断 */ + DMA_IRQn = 21, /*!< 21 DMA中断 */ + WKUPx_IRQn = 22, /*!< 22 WKUP引脚中断 */ + LUT_IRQn = 23, /*!< 23 LUT中断 */ + BSTIM_IRQn = 24, /*!< 24 BSTIM16或BSTIM32中断 */ + COMPx_IRQn = 25, /*!< 25 COMPx中断 */ + GPTIM01_IRQn = 26, /*!< 26 通用定时器0,1中断 */ + GPTIM2_IRQn = 27, /*!< 27 通用定时器2中断 */ + ATIM_IRQn = 28, /*!< 28 高级定时器中断 */ + VREF_IRQn = 29, /*!< 29 1.2V内部基准电压建立中断、VREF_VREG中断 */ + GPIO_IRQn = 30, /*!< 30 外部引脚中断 */ + CAN_IRQn = 31, /*!< 31 CAN2.0中断 */ + +} IRQn_Type; + + +/** @addtogroup Configuration_of_CMSIS + * @{ + */ + +/* ================================================================================ */ +/* ================ Processor and Core Peripheral Section ================ */ +/* ================================================================================ */ + +#include "core_cm0plus.h" /*!< Cortex-M0 processor and core peripherals */ +#include "system_fm33lg0xx.h" /*!< FM33LG0XX System */ + +/* ================================================================================ */ +/* ================ Device Specific Peripheral Section ================ */ +/* ================================================================================ */ + +/** @addtogroup Device_Peripheral_Registers + * @{ + */ + +/* ================================================================================ */ +/* ================ FLS ================ */ +/* ================================================================================ */ + +typedef struct +{ + __IO uint32_t RDCR; /*!< Flash Read Control Register, Address offset: 0x00 */ + __IO uint32_t PFCR; /*!< Flash Prefetch Control Register, Address offset: 0x04 */ + __I uint32_t OPTBR; /*!< Flash Option Bytes Register, Address offset: 0x08 */ + __IO uint32_t ACLOCK1; /*!< Flash Application Code Lock Register1, Address offset: 0x0C */ + __IO uint32_t ACLOCK2; /*!< Flash Application Code Lock Register2, Address offset: 0x10 */ + __IO uint32_t EPCR; /*!< Flash Erase/Program Control Register, Address offset: 0x14 */ + __O uint32_t KEY; /*!< Flash Key Register, Address offset: 0x18 */ + __IO uint32_t IER; /*!< Flash Interrupt Enable Register, Address offset: 0x1C */ + __IO uint32_t ISR; /*!< Flash Interrupt Status Register, Address offset: 0x20 */ +}FLASH_Type; + + +/* ================================================================================ */ +/* ================ PMU ================ */ +/* ================================================================================ */ + +typedef struct +{ + __IO uint32_t CR; /*!< Power Management Control Register, Address offset: 0x00 */ + __IO uint32_t WKTR; /*!< Wakeup Time Register, Address offset: 0x04 */ + __IO uint32_t WKFR; /*!< Wakeup Source Flags Register, Address offset: 0x08 */ + __IO uint32_t IER; /*!< PMU Interrupt Enable Register, Address offset: 0x0C */ + __IO uint32_t ISR; /*!< PMU Interrupt and Status Register, Address offset: 0x10 */ + __IO uint32_t RSV1[9]; /*!< RESERVED REGISTER, Address offset: 0x14 */ + __IO uint32_t ULPB_TR; /*!< ULPBG trim Register, Address offset: 0x38 */ +}PMU_Type; + +/* ================================================================================ */ +/* ================ VREFP ================ */ +/* ================================================================================ */ + +typedef struct +{ + __IO uint32_t CR; /*!< VREFP Control Register, Address offset: 0x00 */ + __IO uint32_t CFGR; /*!< VREFP Config Register, Address offset: 0x04 */ + __IO uint32_t ISR; /*!< VREFP Interrupt Status Register, Address offset: 0x08 */ + __IO uint32_t TR; /*!< VREFP Trim Register, Address offset: 0x0C */ +}VREFP_Type; + +/* ================================================================================ */ +/* ================ VREF ================ */ +/* ================================================================================ */ + +typedef struct +{ + __IO uint32_t CR; /*!< VREF Control Register, Address offset: 0x00 */ + __IO uint32_t CFGR; /*!< VREF Config Register, Address offset: 0x04 */ + __IO uint32_t ISR; /*!< VREF Status Register, Address offset: 0x08 */ + __IO uint32_t IER; /*!< VREF Interrupt Enable Register, Address offset: 0x0C */ + __IO uint32_t BUFCR; /*!< Buffer Control Register, Address offset: 0x10 */ +}VREF_Type; + + +/* ================================================================================ */ +/* ================ VAO ================ */ +/* ================================================================================ */ + +typedef struct +{ + __IO uint32_t RSV1[512]; /*!< RESERVED REGISTER, Address offset: 0x00 */ + __IO uint32_t RSTCR; /*!< VBAT Reset Control Register, Address offset: 0x800 */ + __IO uint32_t XTLFCR; /*!< XTLF Control Register, Address offset: 0x804 */ + __IO uint32_t XTLFPR; /*!< XTLF Power Register, Address offset: 0x808 */ + __IO uint32_t FDIER; /*!< XTLF Oscillation Fail Detection Interrupt Enable Register,Address offset: 0x80C */ + __IO uint32_t FDISR; /*!< XTLF Oscillation Fail Detection Interrupt Status Register,Address offset: 0x810 */ + __IO uint32_t RSV2[251]; /*!< RESERVED REGISTER, Address offset: 0x814 */ + __IO uint32_t INEN; /*!< VAO IO Input Enable Register, Address offset: 0xC00 */ + __IO uint32_t PUEN; /*!< VAO IO Pull-up Enable Register, Address offset: 0xC04 */ + __IO uint32_t ODEN; /*!< VAO IO Open Drain Enable Register, Address offset: 0xC08 */ + __IO uint32_t FCR; /*!< VAO IO Function Control Register, Address offset: 0xC0C */ + __IO uint32_t DOR; /*!< VAO IO Data Output Register, Address offset: 0xC10 */ + __I uint32_t DIR; /*!< VAO IO Data Input Register, Address offset: 0xC14 */ + __IO uint32_t VILR; /*!< VAO IO Voltage Input Low Register, Address offset: 0xC18 */ +}VAO_Type; + + +/* ================================================================================ */ +/* ================ CDIF ================ */ +/* ================================================================================ */ + +typedef struct +{ + __IO uint32_t CR; /*!< , Address offset: 0x00 */ + __IO uint32_t PRSC; /*!< , Address offset: 0x04 */ +}CDIF_Type; + + +/* ================================================================================ */ +/* ================ RMU ================ */ +/* ================================================================================ */ + +typedef struct +{ + __IO uint32_t PDRCR; /*!< PDR Control Register, Address offset: 0x00 */ + __IO uint32_t BORCR; /*!< BOR Control Register, Address offset: 0x04 */ + __IO uint32_t LKPCR; /*!< Reset Config Register, Address offset: 0x08 */ + __O uint32_t SOFTRST; /*!< Software Reset Register, Address offset: 0x0C */ + __IO uint32_t RSTFR; /*!< Reset Flag Register, Address offset: 0x10 */ + __O uint32_t PRSTEN; /*!< Peripheral Reset Enable Register, Address offset: 0x14 */ + __IO uint32_t AHBRSTCR; /*!< AHB Peripherals Reset Register, Address offset: 0x18 */ + __IO uint32_t APBRSTCR1; /*!< APB Peripherals Reset Register1, Address offset: 0x1C */ + __IO uint32_t APBRSTCR2; /*!< APB Peripherals Reset Register2, Address offset: 0x20 */ +}RMU_Type; + + +/* ================================================================================ */ +/* ================ IWDT ================ */ +/* ================================================================================ */ + +typedef struct +{ + __O uint32_t SERV; /*!< IWDT Service Register, Address offset: 0x00 */ + __IO uint32_t CR; /*!< IWDT Config Register, Address offset: 0x04 */ + __I uint32_t CNT; /*!< IWDT Counter Register, Address offset: 0x08 */ + __IO uint32_t WIN; /*!< IWDT Window Register, Address offset: 0x0C */ + __IO uint32_t IER; /*!< IWDT Interrupt Enable Register, Address offset: 0x10 */ + __IO uint32_t ISR; /*!< IWDT Interrupt Status Register, Address offset: 0x14 */ +}IWDT_Type; + + +/* ================================================================================ */ +/* ================ WWDT ================ */ +/* ================================================================================ */ + +typedef struct +{ + __O uint32_t CR; /*!< WWDT Control Register, Address offset: 0x00 */ + __IO uint32_t CFGR; /*!< WWDT Config Register, Address offset: 0x04 */ + __I uint32_t CNT; /*!< WWDT Counter Register, Address offset: 0x08 */ + __IO uint32_t IER; /*!< WWDT Interrupt Enable Register, Address offset: 0x0C */ + __IO uint32_t ISR; /*!< WWDT Interrupt Status Register, Address offset: 0x10 */ + __I uint32_t PSC; /*!< WWDT Prescaler Register, Address offset: 0x14 */ +}WWDT_Type; + + +/* ================================================================================ */ +/* ================ CMU ================ */ +/* ================================================================================ */ + +typedef struct +{ + __IO uint32_t SYSCLKCR; /*!< System Clock Control Register, Address offset: 0x00 */ + __IO uint32_t RCHFCR; /*!< RCHF Control Register, Address offset: 0x04 */ + __IO uint32_t RCHFTR; /*!< RCHF Trim Register, Address offset: 0x08 */ + __IO uint32_t PLLCR; /*!< PLL Control Register, Address offset: 0x0C */ + __IO uint32_t RCLPCR; /*!< RCLP Control Register, Address offset: 0x10 */ + __IO uint32_t RCLPTR; /*!< RCLP Trim Register, Address offset: 0x14 */ + __IO uint32_t RSV1; /*!< RESERVED REGISTER, Address offset: 0x18 */ + __IO uint32_t LSCLKSEL; /*!< LSCLK Select Register, Address offset: 0x1C */ + __IO uint32_t XTHFCR; /*!< XTHF Control Register, Address offset: 0x20 */ + __IO uint32_t RCLFCR; /*!< RCLF Control Register, Address offset: 0x24 */ + __IO uint32_t RCLFTR; /*!< RCLF Trim Register, Address offset: 0x28 */ + __IO uint32_t IER; /*!< Interrupt Enable Register, Address offset: 0x2C */ + __IO uint32_t ISR; /*!< Interrupt Status Register, Address offset: 0x30 */ + __IO uint32_t PCLKCR1; /*!< Peripheral bus Clock Control Register1, Address offset: 0x34 */ + __IO uint32_t PCLKCR2; /*!< Peripheral bus Clock Control Register2, Address offset: 0x38 */ + __IO uint32_t PCLKCR3; /*!< Peripheral bus Clock Control Register3, Address offset: 0x3C */ + __IO uint32_t PCLKCR4; /*!< Peripheral bus Clock Control Register4, Address offset: 0x40 */ + __IO uint32_t OPCCR1; /*!< Peripheral Clock Config Register1, Address offset: 0x44 */ + __IO uint32_t OPCCR2; /*!< Peripheral Clock Config Register 2, Address offset: 0x48 */ + __IO uint32_t OPCCR3; /*!< Peripheral Clock Config Register 3, Address offset: 0x4C */ + __IO uint32_t AHBMCR; /*!< AHB Master Control Register, Address offset: 0x50 */ + __IO uint32_t CCCR; /*!< Clock Calibration Control Register, Address offset: 0x54 */ + __IO uint32_t CCFR; /*!< Clock Calibration Config Register, Address offset: 0x58 */ + __I uint32_t CCNR; /*!< Clock Calibration Counter Register, Address offset: 0x5C */ + __IO uint32_t CCISR; /*!< Clock Calibration Interrupt Status Register, Address offset: 0x60 */ +}CMU_Type; + + +/* ================================================================================ */ +/* ================ SVD ================ */ +/* ================================================================================ */ + +typedef struct +{ + __IO uint32_t CFGR; /*!< SVD Config Register, Address offset: 0x00 */ + __IO uint32_t CR; /*!< SVD Control Register, Address offset: 0x04 */ + __IO uint32_t IER; /*!< SVD Interrupt Enable Register, Address offset: 0x08 */ + __IO uint32_t ISR; /*!< SVD Interrupt Status Register, Address offset: 0x0C */ + __IO uint32_t VSR; /*!< SVD reference Voltage Select Register, Address offset: 0x10 */ +}SVD_Type; + + +/* ================================================================================ */ +/* ================ AES ================ */ +/* ================================================================================ */ + +typedef struct +{ + __IO uint32_t CR; /*!< AES Control Register, Address offset: 0x00 */ + __IO uint32_t IER; /*!< AES Interrupt Enable Register, Address offset: 0x04 */ + __IO uint32_t ISR; /*!< AES Interrupt Status Register, Address offset: 0x08 */ + __IO uint32_t DIR; /*!< AES Data Input Register, Address offset: 0x0C */ + __I uint32_t DOR; /*!< AES Data Output Register, Address offset: 0x10 */ + __IO uint32_t KEY0; /*!< AES Key Register 0, Address offset: 0x14 */ + __IO uint32_t KEY1; /*!< AES Key Register 1, Address offset: 0x18 */ + __IO uint32_t KEY2; /*!< AES Key Register 2, Address offset: 0x1C */ + __IO uint32_t KEY3; /*!< AES Key Register 3, Address offset: 0x20 */ + __IO uint32_t KEY4; /*!< AES Key Register 4, Address offset: 0x24 */ + __IO uint32_t KEY5; /*!< AES Key Register 5, Address offset: 0x28 */ + __IO uint32_t KEY6; /*!< AES Key Register 6, Address offset: 0x2C */ + __IO uint32_t KEY7; /*!< AES Key Register 7, Address offset: 0x30 */ + __IO uint32_t IVR0; /*!< AES Initial Vector Register 0, Address offset: 0x34 */ + __IO uint32_t IVR1; /*!< AES Initial Vector Register 1, Address offset: 0x38 */ + __IO uint32_t IVR2; /*!< AES Initial Vector Register 2, Address offset: 0x3C */ + __IO uint32_t IVR3; /*!< AES Initial Vector Register 3, Address offset: 0x40 */ + __IO uint32_t H0; /*!< AES MultH parameter Register 0, Address offset: 0x44 */ + __IO uint32_t H1; /*!< AES MultH parameter Register 1, Address offset: 0x48 */ + __IO uint32_t H2; /*!< AES MultH parameter Register 2, Address offset: 0x4C */ + __IO uint32_t H3; /*!< AES MultH parameter Register 3, Address offset: 0x50 */ +}AES_Type; + + +/* ================================================================================ */ +/* ================ RNG ================ */ +/* ================================================================================ */ + +typedef struct +{ + __IO uint32_t CR; /*!< Random Number Generator Control Register, Address offset: 0x00 */ + __I uint32_t DOR; /*!< Random Number Generator Data Output Register, Address offset: 0x04 */ + __IO uint32_t RSV1[2]; /*!< RESERVED REGISTER, Address offset: 0x08 */ + __IO uint32_t SR; /*!< Random Number Generator Status Register, Address offset: 0x10 */ + __IO uint32_t CRCCR; /*!< CRC Control Register, Address offset: 0x14 */ + __IO uint32_t CRCDIR; /*!< CRC Data input Register, Address offset: 0x18 */ + __IO uint32_t CRCSR; /*!< CRC Status Register, Address offset: 0x1C */ +}RNG_Type; + + +/* ================================================================================ */ +/* ================ COMP ================ */ +/* ================================================================================ */ +typedef struct +{ + __IO uint32_t CR; /*!< ComparatorControl Register 1, Address offset: 0x00 */ + +} COMP_Type; + +typedef struct +{ + __IO uint32_t ICR; /*!< Comparator Interrupt Config Register, Address offset: 0x0C */ + __IO uint32_t ISR; /*!< Comparator Interrupt Status Register, Address offset: 0x10 */ + __IO uint32_t BUFCR; /*!< Comparator Buffer Control Register, Address offset: 0x14 */ +}COMP_COMMON_Type; + + +/* ================================================================================ */ +/* ================ CALC ================ */ +/* ================================================================================ */ + +typedef struct +{ + __IO uint32_t OPRD; /*!< Operand Register, Address offset: 0x00 */ + __IO uint32_t DIVSOR; /*!< Divisor Regsiter, Address offset: 0x04 */ + __I uint32_t QUOT; /*!< Quotient Register, Address offset: 0x08 */ + __I uint32_t REMD; /*!< Reminder Register, Address offset: 0x0C */ + __I uint32_t ROOT; /*!< Root Register, Address offset: 0x10 */ + __I uint32_t SR; /*!< Status Register, Address offset: 0x14 */ + __IO uint32_t CR; /*!< Control Register, Address offset: 0x18 */ +}DIVAS_Type; + + +/* ================================================================================ */ +/* ================ I2C ================ */ +/* ================================================================================ */ + +typedef struct +{ + __IO uint32_t MSPCFGR; /*!< I2C Master Config Register, Address offset: 0x00 */ + __IO uint32_t MSPCR; /*!< I2C Master Control Register, Address offset: 0x04 */ + __IO uint32_t MSPIER; /*!< I2C Master Intterupt Enable Register, Address offset: 0x08 */ + __IO uint32_t MSPISR; /*!< I2C Master Interrupt Status Register, Address offset: 0x0C */ + __IO uint32_t MSPSR; /*!< I2C Master Status Register, Address offset: 0x10 */ + __IO uint32_t MSPBGR; /*!< I2C Master Baud rate Generator Register, Address offset: 0x14 */ + __IO uint32_t MSPBUF; /*!< I2C Master transfer Buffer, Address offset: 0x18 */ + __IO uint32_t MSPTCR; /*!< I2C Master Timing Control Register, Address offset: 0x1C */ + __IO uint32_t MSPTOR; /*!< I2C Master Time-Out Register, Address offset: 0x20 */ + __IO uint32_t SSPCR; /*!< I2C Slave Control Register, Address offset: 0x24 */ + __IO uint32_t SSPIER; /*!< I2C Slave Interrupt Enable Register, Address offset: 0x28 */ + __IO uint32_t SSPISR; /*!< I2C Slave Interrupt Status Register, Address offset: 0x2C */ + __I uint32_t SSPSR; /*!< I2C Slave Status Register, Address offset: 0x30 */ + __IO uint32_t SSPBUF; /*!< I2C Slave transfer Buffer, Address offset: 0x34 */ + __IO uint32_t SSPADR; /*!< I2C Slave Address Register, Address offset: 0x38 */ +}I2C_Type; + + +/* ================================================================================ */ +/* ================ UART_COMMON ================ */ +/* ================================================================================ */ + +typedef struct +{ + __IO uint32_t IRCR; /*!< Infrared modulation Control Register, Address offset: 0x00 */ +}UART_COMMON_Type; + + +/* ================================================================================ */ +/* ================ UARTx ================ */ +/* ================================================================================ */ + +typedef struct +{ + __IO uint32_t CSR; /*!< UARTx Control Status Register, Address offset: 0x00 */ + __IO uint32_t IER; /*!< UARTx Interrupt Enable Register, Address offset: 0x04 */ + __IO uint32_t ISR; /*!< UARTx Interrupt Status Register, Address offset: 0x08 */ + __IO uint32_t TODR; /*!< UARTx Time-Out and Delay Register, Address offset: 0x0C */ + __I uint32_t RXBUF; /*!< UARTx Receive Buffer, Address offset: 0x10 */ + __O uint32_t TXBUF; /*!< UARTx Transmit Buffer, Address offset: 0x14 */ + __IO uint32_t BGR; /*!< UARTx Baud rate Generator Register, Address offset: 0x18 */ +}UART_Type; + + +/* ================================================================================ */ +/* ================ LPUARTx ================ */ +/* ================================================================================ */ + +typedef struct +{ + __IO uint32_t CSR; /*!< LPUARTx Control Status Register, Address offset: 0x00 */ + __IO uint32_t IER; /*!< LPUARTx Interrupt Enable Register, Address offset: 0x04 */ + __IO uint32_t ISR; /*!< LPUARTx Interrupt Status Register, Address offset: 0x08 */ + __IO uint32_t BMR; /*!< LPUARTx Baud rate Modulation Register, Address offset: 0x0C */ + __I uint32_t RXBUF; /*!< LPUARTx Receive Buffer Register, Address offset: 0x10 */ + __IO uint32_t TXBUF; /*!< LPUARTx Transmit Buffer Register, Address offset: 0x14 */ + __IO uint32_t DMR; /*!< LPUARTx data Matching Register, Address offset: 0x18 */ +}LPUART_Type; + + +/* ================================================================================ */ +/* ================ SPIx ================ */ +/* ================================================================================ */ + +typedef struct +{ + __IO uint32_t CR1; /*!< SPIxControl Register1, Address offset: 0x00 */ + __IO uint32_t CR2; /*!< SPIxControl Register2, Address offset: 0x04 */ + __IO uint32_t CR3; /*!< Control Register3, Address offset: 0x08 */ + __IO uint32_t IER; /*!< SPIxInterrupt Enable Register, Address offset: 0x0C */ + __IO uint32_t ISR; /*!< SPIxStatus Register, Address offset: 0x10 */ + __O uint32_t TXBUF; /*!< SPIxTransmit Buffer, Address offset: 0x14 */ + __I uint32_t RXBUF; /*!< SPIxReceive Buffer, Address offset: 0x18 */ +}SPI_Type; + + +/* ================================================================================ */ +/* ================ CAN ================ */ +/* ================================================================================ */ + +typedef struct +{ + __IO uint32_t CR; /*!< CAN Control Register, Address offset: 0x00 */ + __IO uint32_t MSR; /*!< CAN mode select register, Address offset: 0x04 */ + __IO uint32_t BRPR; /*!< CAN Baud rate Prescaler Register, Address offset: 0x08 */ + __IO uint32_t BTR; /*!< CAN Bit Timing Register, Address offset: 0x0C */ + __I uint32_t ECR; /*!< CAN Error Counter Register, Address offset: 0x10 */ + __IO uint32_t ESR; /*!< CAN Error Status Register, Address offset: 0x14 */ + __I uint32_t SR; /*!< CAN Status Register, Address offset: 0x18 */ + __I uint32_t ISR; /*!< CAN Interrupt Status Register, Address offset: 0x1C */ + __IO uint32_t IER; /*!< CAN Interrupt Enable Register, Address offset: 0x20 */ + __IO uint32_t ICR; /*!< CAN Interrupt Clear Register, Address offset: 0x24 */ + __IO uint32_t RSV1[2]; /*!< RESERVED REGISTER, Address offset: 0x28 */ + __O uint32_t TXFIDR; /*!< CAN TX FIFO ID Register, Address offset: 0x30 */ + __O uint32_t TXFDLCR; /*!< CAN TX FIFO DLC Register, Address offset: 0x34 */ + __O uint32_t TXFDW1R; /*!< CAN TX FIFO Data Word1 Register, Address offset: 0x38 */ + __O uint32_t TXFDW2R; /*!< CAN TX FIFO Data Word2 Register, Address offset: 0x3C */ + __O uint32_t HPBIDR; /*!< CAN TX HPB ID Register, Address offset: 0x40 */ + __O uint32_t HPBDLCR; /*!< CAN TX HPB DLC Register, Address offset: 0x44 */ + __O uint32_t HPBDW1R; /*!< CAN TX HPB Data Word1 Register, Address offset: 0x48 */ + __O uint32_t HPBDW2R; /*!< CAN TX HPB Data Word2 Register, Address offset: 0x4C */ + __O uint32_t RXFIDR; /*!< CAN RX FIFO ID Register, Address offset: 0x50 */ + __O uint32_t RXFDLCR; /*!< CAN RX FIFO DLC Register, Address offset: 0x54 */ + __O uint32_t RXFDW1R; /*!< CAN RX FIFO Data Word1 Register, Address offset: 0x58 */ + __O uint32_t RXFDW2R; /*!< CAN RX FIFO Data Word2 Register, Address offset: 0x5C */ + __IO uint32_t AFR; /*!< Acceptance Filter Register, Address offset: 0x60 */ + __IO uint32_t AFMR0; /*!< Acceptance Filter Mask Register0, Address offset: 0x64 */ + __IO uint32_t AFIR0; /*!< Acceptance Filter ID Register0, Address offset: 0x68 */ + __IO uint32_t AFMR1; /*!< Acceptance Filter Mask Register1, Address offset: 0x6C */ + __IO uint32_t AFIR1; /*!< Acceptance Filter ID Register1, Address offset: 0x70 */ + __IO uint32_t AFMR2; /*!< Acceptance Filter Mask Register2, Address offset: 0x74 */ + __IO uint32_t AFIR2; /*!< Acceptance Filter ID Register2, Address offset: 0x78 */ + __IO uint32_t AFMR3; /*!< Acceptance Filter Mask Register3, Address offset: 0x7C */ + __IO uint32_t AFIR3; /*!< Acceptance Filter ID Register3, Address offset: 0x80 */ +}CAN_Type; + + +/* ================================================================================ */ +/* ================ DMA ================ */ +/* ================================================================================ */ + +typedef struct +{ + __IO uint32_t GCR; /*!< DMA Global Control Register, Address offset: 0x00 */ + __IO uint32_t CH0CR; /*!< Channel 0 Control Register, Address offset: 0x04 */ + __IO uint32_t CH0MAD; /*!< Channel 0 Memory Address Register, Address offset: 0x08 */ + __IO uint32_t CH1CR; /*!< Channel 1 Control Register, Address offset: 0x0C */ + __IO uint32_t CH1MAD; /*!< Channel 1 Memory Address Register, Address offset: 0x10 */ + __IO uint32_t CH2CR; /*!< Channel 2 Control Register, Address offset: 0x14 */ + __IO uint32_t CH2MAD; /*!< Channel 2 Memory Address Register, Address offset: 0x18 */ + __IO uint32_t CH3CR; /*!< Channel 3 Control Register, Address offset: 0x1C */ + __IO uint32_t CH3MAD; /*!< Channel 3 Memory Address Register, Address offset: 0x20 */ + __IO uint32_t CH4CR; /*!< Channel 4 Control Register, Address offset: 0x24 */ + __IO uint32_t CH4MAD; /*!< Channel 4 Memory Address Register, Address offset: 0x28 */ + __IO uint32_t CH5CR; /*!< Channel 5 Control Register, Address offset: 0x2C */ + __IO uint32_t CH5MAD; /*!< Channel 5 Memory Address Register, Address offset: 0x30 */ + __IO uint32_t CH6CR; /*!< Channel 6 Control Register, Address offset: 0x34 */ + __IO uint32_t CH6MAD; /*!< Channel 6 Memory Address Register, Address offset: 0x38 */ + __IO uint32_t CH7CR; /*!< Channel 11 Control Register, Address offset: 0x3C */ + __IO uint32_t CH7FLSAD; /*!< Channel 11 Flash Address Register, Address offset: 0x40 */ + __IO uint32_t CH7RAMAD; /*!< Channel 11 RAM Address Register, Address offset: 0x44 */ + __IO uint32_t ISR; /*!< DMA Interrupt Status Register, Address offset: 0x48 */ +}DMA_Type; + + +/* ================================================================================ */ +/* ================ CRC ================ */ +/* ================================================================================ */ + +typedef struct +{ + __IO uint32_t DR; /*!< CRC Data Register, Address offset: 0x00 */ + __IO uint32_t CR; /*!< Control Register, Address offset: 0x04 */ + __IO uint32_t LFSR; /*!< CRC Linear Feedback Shift Register, Address offset: 0x08 */ + __IO uint32_t XOR; /*!< CRC output XOR Register, Address offset: 0x0C */ + __IO uint32_t RSV1[3]; /*!< RESERVED REGISTER, Address offset: 0x10 */ + __IO uint32_t POLY; /*!< CRC Polynominal Register, Address offset: 0x1C */ +}CRC_Type; + + +/* ================================================================================ */ +/* ================ ATIM ================ */ +/* ================================================================================ */ + +typedef struct +{ + __IO uint32_t CR1; /*!< ATIM Control Register1, Address offset: 0x00 */ + __IO uint32_t CR2; /*!< ATIM Control Register2, Address offset: 0x04 */ + __IO uint32_t SMCR; /*!< ATIM Slave Mode Control Register, Address offset: 0x08 */ + __IO uint32_t DIER; /*!< ATIM DMA and Interrupt Enable Register, Address offset: 0x0C */ + __IO uint32_t ISR; /*!< ATIM Interrupt Status Register, Address offset: 0x10 */ + __O uint32_t EGR; /*!< ATIM Event Generation Register, Address offset: 0x14 */ + __IO uint32_t CCMR1; /*!< ATIM Capture/Compare Mode Register1, Address offset: 0x18 */ + __IO uint32_t CCMR2; /*!< ATIM Capture/Compare Mode Register2, Address offset: 0x1C */ + __IO uint32_t CCER; /*!< ATIM Capture/Compare Enable Register, Address offset: 0x20 */ + __IO uint32_t CNT; /*!< ATIM Counter Register, Address offset: 0x24 */ + __IO uint32_t PSC; /*!< ATIM Prescaler Register, Address offset: 0x28 */ + __IO uint32_t ARR; /*!< ATIM Auto-Reload Register, Address offset: 0x2C */ + __IO uint32_t RCR; /*!< ATIM Repetition Counter Register, Address offset: 0x30 */ + __IO uint32_t CCR1; /*!< ATIM Capture/Compare Register1, Address offset: 0x34 */ + __IO uint32_t CCR2; /*!< ATIM Capture/Compare Register2, Address offset: 0x38 */ + __IO uint32_t CCR3; /*!< ATIM Capture/Compare Register3, Address offset: 0x3C */ + __IO uint32_t CCR4; /*!< ATIM Capture/Compare Register4, Address offset: 0x40 */ + __IO uint32_t BDTR; /*!< ATIM Break and Deadtime Register, Address offset: 0x44 */ + __IO uint32_t DCR; /*!< ATIM DMA Control Register, Address offset: 0x48 */ + __IO uint32_t DMAR; /*!< ATIM DMA Access Register, Address offset: 0x4C */ + __IO uint32_t RSV1[4]; /*!< RESERVED REGISTER, Address offset: 0x50 */ + __IO uint32_t BKCR; /*!< ATIM Break Control Register, Address offset: 0x60 */ +}ATIM_Type; + + +/* ================================================================================ */ +/* ================ GPTIMx ================ */ +/* ================================================================================ */ + +typedef struct +{ + __IO uint32_t CR1; /*!< GPTIMx Control Register1, Address offset: 0x00 */ + __IO uint32_t CR2; /*!< GPTIMx Control Register2, Address offset: 0x04 */ + __IO uint32_t SMCR; /*!< GPTIMx Slave Mode Control Register, Address offset: 0x08 */ + __IO uint32_t DIER; /*!< GPTIMx DMA and Interrupt Enable Register, Address offset: 0x0C */ + __IO uint32_t ISR; /*!< Interrupt Status Register, Address offset: 0x10 */ + __O uint32_t EGR; /*!< GPTIMx Event Generation Register, Address offset: 0x14 */ + __IO uint32_t CCMR1; /*!< GPTIMx Capture/Compare Mode Register1, Address offset: 0x18 */ + __IO uint32_t CCMR2; /*!< GPTIMx Capture/Compare Mode Register2, Address offset: 0x1C */ + __IO uint32_t CCER; /*!< GPTIMx Capture/Compare Enable Register, Address offset: 0x20 */ + __IO uint32_t CNT; /*!< GPTIMx Counter Register, Address offset: 0x24 */ + __IO uint32_t PSC; /*!< GPTIMx Prescaler Register, Address offset: 0x28 */ + __IO uint32_t ARR; /*!< GPTIMx Auto-Reload Register, Address offset: 0x2C */ + __IO uint32_t RSV1; /*!< RESERVED REGISTER, Address offset: 0x30 */ + __IO uint32_t CCR1; /*!< GPTIMx Capture/Compare Register1, Address offset: 0x34 */ + __IO uint32_t CCR2; /*!< GPTIMx Capture/Compare Register2, Address offset: 0x38 */ + __IO uint32_t CCR3; /*!< GPTIMx Capture/Compare Register3, Address offset: 0x3C */ + __IO uint32_t CCR4; /*!< GPTIMx Capture/Compare Register4, Address offset: 0x40 */ + __IO uint32_t RSV2; /*!< RESERVED REGISTER, Address offset: 0x44 */ + __IO uint32_t DCR; /*!< GPTIMx DMA Control Register, Address offset: 0x48 */ + __IO uint32_t DMAR; /*!< GPTIMx DMA access Register, Address offset: 0x4C */ + __IO uint32_t RSV3[4]; /*!< RESERVED REGISTER, Address offset: 0x50 */ + __IO uint32_t ITRSEL; /*!< GPTIMx Internal Trigger Select Register, Address offset: 0x60 */ +}GPTIM_Type; + + +/* ================================================================================ */ +/* ================ BSTIM32 ================ */ +/* ================================================================================ */ + +typedef struct +{ + __IO uint32_t CR1; /*!< BSTIM Control Register1, Address offset: 0x00 */ + __IO uint32_t CR2; /*!< BSTIM Control Register2, Address offset: 0x04 */ + __IO uint32_t RSV1; /*!< RESERVED REGISTER, Address offset: 0x08 */ + __IO uint32_t IER; /*!< BSTIM Interrupt Enable Register, Address offset: 0x0C */ + __IO uint32_t ISR; /*!< BSTIM Interrupt Status Register, Address offset: 0x10 */ + __O uint32_t EGR; /*!< BSTIM Event Generation Register, Address offset: 0x14 */ + __IO uint32_t RSV2[3]; /*!< RESERVED REGISTER, Address offset: 0x18 */ + __IO uint32_t CNT; /*!< BSTIM Counter Register, Address offset: 0x24 */ + __IO uint32_t PSC; /*!< BSTIM Prescaler Register, Address offset: 0x28 */ + __IO uint32_t ARR; /*!< BSTIM Auto-Reload Register, Address offset: 0x2C */ +}BSTIM32_Type; + + +/* ================================================================================ */ +/* ================ BSTIM16 ================ */ +/* ================================================================================ */ + +typedef struct +{ + __IO uint32_t CR1; /*!< BSTIM Control Register1, Address offset: 0x00 */ + __IO uint32_t CR2; /*!< BSTIM Control Register2, Address offset: 0x04 */ + __IO uint32_t RSV1; /*!< RESERVED REGISTER, Address offset: 0x08 */ + __IO uint32_t IER; /*!< BSTIM Interrupt Enable Register, Address offset: 0x0C */ + __IO uint32_t ISR; /*!< BSTIM Interrupt Status Register, Address offset: 0x10 */ + __O uint32_t EGR; /*!< BSTIM Event Generation Register, Address offset: 0x14 */ + __IO uint32_t RSV2[3]; /*!< RESERVED REGISTER, Address offset: 0x18 */ + __IO uint32_t CNT; /*!< BSTIM Counter Register, Address offset: 0x24 */ + __IO uint32_t PSC; /*!< BSTIM Prescaler Register, Address offset: 0x28 */ + __IO uint32_t ARR; /*!< BSTIM Auto-Reload Register, Address offset: 0x2C */ +}BSTIM16_Type; + + +/* ================================================================================ */ +/* ================ LPTIM32 ================ */ +/* ================================================================================ */ + +typedef struct +{ + __IO uint32_t CFGR; /*!< LPTIM32 Config Register, Address offset: 0x00 */ + __I uint32_t CNT; /*!< LPTIM32 Counter Register, Address offset: 0x04 */ + __IO uint32_t CCSR; /*!< LPTIM32 Capture/Compare Control and Status Register, Address offset: 0x08 */ + __IO uint32_t ARR; /*!< LPTIM32 Auto-Reload Register, Address offset: 0x0C */ + __IO uint32_t IER; /*!< LPTIM32 Interrupt Enable Register, Address offset: 0x10 */ + __IO uint32_t ISR; /*!< LPTIM32 Interrupt Status Register, Address offset: 0x14 */ + __IO uint32_t CR; /*!< LPTIM32 Control Register, Address offset: 0x18 */ + __IO uint32_t RSV1; /*!< RESERVED REGISTER, Address offset: 0x1C */ + __IO uint32_t CCR1; /*!< LPTIM32 Capture/Compare Register1, Address offset: 0x20 */ + __IO uint32_t CCR2; /*!< LPTIM32 Capture/Compare Register2, Address offset: 0x24 */ + __IO uint32_t CCR3; /*!< LPTIM32 Capture/Compare Register3, Address offset: 0x28 */ + __IO uint32_t CCR4; /*!< LPTIM32 Capture/Compare Register4, Address offset: 0x2C */ +}LPTIM32_Type; + + +/* ================================================================================ */ +/* ================ LPTIM16 ================ */ +/* ================================================================================ */ + +typedef struct +{ + __IO uint32_t CFGR; /*!< LPTIM Config Register, Address offset: 0x00 */ + __I uint32_t CNT; /*!< LPTIM Counter Register, Address offset: 0x04 */ + __IO uint32_t CCSR; /*!< LPTIM Capture/Compare Control and Status Register, Address offset: 0x08 */ + __IO uint32_t ARR; /*!< LPTIM Auto-Reload Register, Address offset: 0x0C */ + __IO uint32_t IER; /*!< LPTIM Interrupt Enable Register, Address offset: 0x10 */ + __IO uint32_t ISR; /*!< LPTIM Interrupt Status Register, Address offset: 0x14 */ + __IO uint32_t CR; /*!< LPTIM Control Register, Address offset: 0x18 */ + __IO uint32_t RSV1; /*!< RESERVED REGISTER, Address offset: 0x1C */ + __IO uint32_t CCR1; /*!< LPTIM Capture/Compare Register1, Address offset: 0x20 */ + __IO uint32_t CCR2; /*!< LPTIM Capture/Compare Register2, Address offset: 0x24 */ +}LPTIM16_Type; + + +/* ================================================================================ */ +/* ================ RTCA ================ */ +/* ================================================================================ */ + +typedef struct +{ + __IO uint32_t WER; /*!< RTC Write Enable Register, Address offset: 0x00 */ + __IO uint32_t IER; /*!< RTC Interrupt Enable Register, Address offset: 0x04 */ + __IO uint32_t ISR; /*!< RTC Interrupt Status Register, Address offset: 0x08 */ + __IO uint32_t BCDSEC; /*!< BCD format time second registers, Address offset: 0x0C */ + __IO uint32_t BCDMIN; /*!< BCD format time minute registers, Address offset: 0x10 */ + __IO uint32_t BCDHOUR; /*!< BCD format time hour registers, Address offset: 0x14 */ + __IO uint32_t BCDDAY; /*!< BCD format time day registers, Address offset: 0x18 */ + __IO uint32_t BCDWEEK; /*!< BCD format time week registers, Address offset: 0x1C */ + __IO uint32_t BCDMONTH; /*!< BCD format time month registers, Address offset: 0x20 */ + __IO uint32_t BCDYEAR; /*!< BCD format time year registers, Address offset: 0x24 */ + __IO uint32_t ALARM; /*!< RTCA Alarm Register, Address offset: 0x28 */ + __IO uint32_t TMSEL; /*!< RTCA Time Mark Select, Address offset: 0x2C */ + __IO uint32_t ADJUST; /*!< RTCA time Adjust Register, Address offset: 0x30 */ + __IO uint32_t ADSIGN; /*!< RTCA time Adjust Sign Register, Address offset: 0x34 */ + __IO uint32_t RSV1; /*!< RESERVED REGISTER, Address offset: 0x38 */ + __IO uint32_t SBSCNT; /*!< RTCA Sub-Second Counter, Address offset: 0x3C */ + __IO uint32_t CR; /*!< RTCA Control Register, Address offset: 0x40 */ +}RTCA_Type; + + +/* ================================================================================ */ +/* ================ LCD ================ */ +/* ================================================================================ */ + +typedef struct +{ + __IO uint32_t CR; /*!< LCD Control Register, Address offset: 0x00 */ + __IO uint32_t TEST; /*!< LCD test Register, Address offset: 0x04 */ + __IO uint32_t FCR; /*!< LCD Frequency Control Register, Address offset: 0x08 */ + __IO uint32_t FLKT; /*!< LCD Flick Time Register, Address offset: 0x0C */ + __IO uint32_t RSV1; /*!< RESERVED REGISTER, Address offset: 0x10 */ + __IO uint32_t IER; /*!< LCD Interrupt Enable Register, Address offset: 0x14 */ + __IO uint32_t ISR; /*!< LCD Interrupt Status Register, Address offset: 0x18 */ + __IO uint32_t RSV2[2]; /*!< RESERVED REGISTER, Address offset: 0x1C */ + __IO uint32_t DATA0; /*!< LCD data buffer registers 0, Address offset: 0x24 */ + __IO uint32_t DATA1; /*!< LCD data buffer registers 1, Address offset: 0x28 */ + __IO uint32_t DATA2; /*!< LCD data buffer registers 2, Address offset: 0x2C */ + __IO uint32_t DATA3; /*!< LCD data buffer registers 3, Address offset: 0x30 */ + __IO uint32_t DATA4; /*!< LCD data buffer registers 4, Address offset: 0x34 */ + __IO uint32_t DATA5; /*!< LCD data buffer registers 5, Address offset: 0x38 */ + __IO uint32_t DATA6; /*!< LCD data buffer registers 6, Address offset: 0x3C */ + __IO uint32_t DATA7; /*!< LCD data buffer registers 7, Address offset: 0x40 */ + __IO uint32_t DATA8; /*!< LCD data buffer registers 8, Address offset: 0x44 */ + __IO uint32_t DATA9; /*!< LCD data buffer registers 9, Address offset: 0x48 */ + __IO uint32_t RSV3; /*!< RESERVED REGISTER, Address offset: 0x4C */ + __IO uint32_t COMEN; /*!< LCD COM Enable Register, Address offset: 0x50 */ + __IO uint32_t SEGEN0; /*!< LCD SEG Enable Register0, Address offset: 0x54 */ + __IO uint32_t SEGEN1; /*!< LCD SEG Enable Register 1, Address offset: 0x58 */ +}LCD_Type; + + +/* ================================================================================ */ +/* ================ ADC ================ */ +/* ================================================================================ */ + +typedef struct +{ + __IO uint32_t ISR; /*!< ADC Interrupt and Status Register, Address offset: 0x00 */ + __IO uint32_t IER; /*!< ADC Interrupt Enable Register, Address offset: 0x04 */ + __IO uint32_t CR1; /*!< ADC Control Register, Address offset: 0x08 */ + __IO uint32_t CR2; /*!< ADC Control Register, Address offset: 0x0C */ + __IO uint32_t CALR; /*!< ADC Calibration Register, Address offset: 0x10 */ + __IO uint32_t CFGR1; /*!< ADC Config Register1, Address offset: 0x14 */ + __IO uint32_t CFGR2; /*!< ADC Config Register2, Address offset: 0x18 */ + __IO uint32_t SMTR; /*!< ADC Sampling Time Register, Address offset: 0x1C */ + __IO uint32_t CHER; /*!< ADC Channel Enable Register, Address offset: 0x20 */ + __IO uint32_t DCR; /*!< ADC Differential Channel Control Register, Address offset: 0x24 */ + __I uint32_t DR; /*!< ADC Data Register, Address offset: 0x28 */ + __IO uint32_t HLTR; /*!< ADC analog watchdog Threshold Register, Address offset: 0x2C */ +}ADC_Type; + + +/* ================================================================================ */ +/* ================ DAC ================ */ +/* ================================================================================ */ + +typedef struct +{ + __IO uint32_t CR1; /*!< DAC Control Register, Address offset: 0x00 */ + __IO uint32_t CR2; /*!< DAC Control Register, Address offset: 0x04 */ + __IO uint32_t CFGR; /*!< DAC Config Register, Address offset: 0x08 */ + __O uint32_t SWTRGR; /*!< DAC Software Trigger Register, Address offset: 0x0C */ + __IO uint32_t DHR; /*!< DAC Data Holding Register, Address offset: 0x10 */ + __IO uint32_t ISR; /*!< DAC Interrupt Status Register, Address offset: 0x14 */ + __IO uint32_t IER; /*!< DAC Interrupt Enable Register, Address offset: 0x18 */ + __IO uint32_t SHTR; /*!< DAC Sample Hold Time Register, Address offset: 0x1C */ +}DAC_Type; + + +/* ================================================================================ */ +/* ================ GPIO ================ */ +/* ================================================================================ */ + +typedef struct +{ + __IO uint32_t INEN; /*!< GPIOx Input Enable Register, Address offset: 0x00 */ + __IO uint32_t PUEN; /*!< GPIOx Pull-Up Enable Register, Address offset: 0x04 */ + __IO uint32_t ODEN; /*!< GPIOx Open-Drain Enable Register, Address offset: 0x08 */ + __IO uint32_t FCR; /*!< GPIOx Function Control Register, Address offset: 0x0C */ + __IO uint32_t DO; /*!< GPIOx Data Output Register, Address offset: 0x10 */ + __O uint32_t DSET; /*!< GPIOx Data Set Register, Address offset: 0x14 */ + __O uint32_t DRST; /*!< GPIOx Data Reset Register, Address offset: 0x18 */ + __I uint32_t DIN; /*!< GPIOx Data Input Register, Address offset: 0x1C */ + __IO uint32_t DFS; /*!< GPIOx Digital Function Select, Address offset: 0x20 */ + __IO uint32_t RSV1; /*!< RESERVED REGISTER, Address offset: 0x24 */ + __IO uint32_t ANEN; /*!< GPIOx Analog channel Enable Register, Address offset: 0x28 */ + __IO uint32_t VILR; /*!< GPIOx Voltage Input Low Register, Address offset: 0x2C */ +}GPIO_Type; + + +/* ================================================================================ */ +/* ================ GPIO_COMMON ================ */ +/* ================================================================================ */ + +typedef struct +{ + __IO uint32_t EXTISEL0; /*!< External Interrupt Input Select Register0, Address offset: 0x00 */ + __IO uint32_t EXTISEL1; /*!< External Interrupt Input Select Register1, Address offset: 0x04 */ + __IO uint32_t EXTIEDS0; /*!< External Interrupt Edge Select and Enable Register0, Address offset: 0x08 */ + __IO uint32_t EXTIEDS1; /*!< External Interrupt Edge Select and Enable Register1, Address offset: 0x0C */ + __IO uint32_t EXTIDF; /*!< External Interrupt Digital Filter Register, Address offset: 0x10 */ + __IO uint32_t EXTIISR; /*!< External Interrupt and Status Register, Address offset: 0x14 */ + __I uint32_t EXTIDI; /*!< External Interrupt Data Input Register, Address offset: 0x18 */ + __IO uint32_t RSV1[9]; /*!< RESERVED REGISTER, Address offset: 0x1C */ + __IO uint32_t FOUTSEL; /*!< Frequency Output Select Register, Address offset: 0x100 */ + __IO uint32_t RSV2[63]; /*!< RESERVED REGISTER, Address offset: 0x104 */ + __IO uint32_t PINWKEN; /*!< Wakeup Enable Register, Address offset: 0x200 */ +}GPIO_COMMON_Type; + + +/* ================================================================================ */ +/* ================ DBG ================ */ +/* ================================================================================ */ + +typedef struct +{ + __I uint32_t SYSCFG; /*!< , Address offset: 0x00 */ + __IO uint32_t CR; /*!< , Address offset: 0x04 */ + __IO uint32_t HDFR; /*!< , Address offset: 0x08 */ +}DBG_Type; + + + +/* ================================================================================ */ +/* ================ CPU memory map ================ */ +/* ================================================================================ */ + + +/* Peripheral and SRAM base address */ + +#define FLASH_BASE (( uint32_t)0x00000000) +#define SRAM_BASE (( uint32_t)0x20000000) +#define PERIPH_BASE (( uint32_t)0x40000000) + + +/* ================================================================================ */ +/* ================ Peripheral memory map ================ */ +/* ================================================================================ */ + +/* Peripheral memory map */ + +#define FLASH_R_BASE (PERIPH_BASE +0x00001000) +#define PMU_BASE (PERIPH_BASE +0x00002000) +#define VREFP_BASE (PERIPH_BASE +0x0000203C) +#define VREF_BASE (PERIPH_BASE +0x0001A400) +#define VAO_BASE (PERIPH_BASE +0x0001F000) +#define CDIF_BASE (PERIPH_BASE +0x0001E000) +#define RMU_BASE (PERIPH_BASE +0x00002800) +#define IWDT_BASE (PERIPH_BASE +0x00011400) +#define WWDT_BASE (PERIPH_BASE +0x00011800) +#define CMU_BASE (PERIPH_BASE +0x00002400) +#define SVD_BASE (PERIPH_BASE +0x00012800) +#define AES_BASE (PERIPH_BASE +0x00013800) +#define RNG_BASE (PERIPH_BASE +0x00013C00) +#define COMP1_BASE (PERIPH_BASE +0x00015400) +#define COMP2_BASE (PERIPH_BASE +0x00015404) +#define COMP3_BASE (PERIPH_BASE +0x00015408) +#define COMP_COMMON_BASE (PERIPH_BASE +0x0001540C) +#define DIVAS_BASE (PERIPH_BASE +0x00019C00) +#define I2C_BASE (PERIPH_BASE +0x00012400) +#define UART_COMMON_BASE (PERIPH_BASE +0x00017C00) +#define UART0_BASE (PERIPH_BASE +0x00012000) +#define UART1_BASE (PERIPH_BASE +0x00016800) +#define UART3_BASE (PERIPH_BASE +0x00017000) +#define UART4_BASE (PERIPH_BASE +0x00017400) +#define UART5_BASE (PERIPH_BASE +0x00017800) +#define LPUART0_BASE (PERIPH_BASE +0x00014000) +#define LPUART1_BASE (PERIPH_BASE +0x00014400) +#define LPUART2_BASE (PERIPH_BASE +0x00015000) +#define SPI0_BASE (PERIPH_BASE +0x00010400) +#define SPI1_BASE (PERIPH_BASE +0x00010800) +#define SPI2_BASE (PERIPH_BASE +0x00014800) +#define CAN_BASE (PERIPH_BASE +0x00019400) +#define DMA_BASE (PERIPH_BASE +0x00000400) +#define CRC_BASE (PERIPH_BASE +0x00010000) +#define ATIM_BASE (PERIPH_BASE +0x00013000) +#define GPTIM0_BASE (PERIPH_BASE +0x00014C00) +#define GPTIM1_BASE (PERIPH_BASE +0x00016400) +#define GPTIM2_BASE (PERIPH_BASE +0x00018000) +#define BSTIM32_BASE (PERIPH_BASE +0x00016000) +#define BSTIM16_BASE (PERIPH_BASE +0x00018C00) +#define LPTIM32_BASE (PERIPH_BASE +0x00013400) +#define LPTIM16_BASE (PERIPH_BASE +0x00018800) +#define RTCA_BASE (PERIPH_BASE +0x00011000) +#define LCD_BASE (PERIPH_BASE +0x00010C00) +#define ADC_BASE (PERIPH_BASE +0x00015C00) +#define DAC_BASE (PERIPH_BASE +0x00019800) +#define GPIOA_BASE (PERIPH_BASE +0x00000C00) +#define GPIOB_BASE (PERIPH_BASE +0x00000C40) +#define GPIOC_BASE (PERIPH_BASE +0x00000C80) +#define GPIOD_BASE (PERIPH_BASE +0x00000CC0) +#define GPIOE_BASE (PERIPH_BASE +0x00000D00) +#define GPIO_COMMON_BASE (PERIPH_BASE +0x00000DC0) +#define DBG_BASE (PERIPH_BASE +0x00000000) + +/* ================================================================================ */ +/* ================ Peripheral declaration ================ */ +/* ================================================================================ */ + +#define FLASH ((FLASH_Type *) FLASH_R_BASE ) +#define PMU ((PMU_Type *) PMU_BASE ) +#define VREFP ((VREFP_Type *) VREFP_BASE ) +#define VREF ((VREF_Type *) VREF_BASE ) +#define VAO ((VAO_Type *) VAO_BASE ) +#define CDIF ((CDIF_Type *) CDIF_BASE ) +#define RMU ((RMU_Type *) RMU_BASE ) +#define IWDT ((IWDT_Type *) IWDT_BASE ) +#define WWDT ((WWDT_Type *) WWDT_BASE ) +#define CMU ((CMU_Type *) CMU_BASE ) +#define SVD ((SVD_Type *) SVD_BASE ) +#define AES ((AES_Type *) AES_BASE ) +#define RNG ((RNG_Type *) RNG_BASE ) +#define COMP1 ((COMP_Type *) COMP1_BASE ) +#define COMP2 ((COMP_Type *) COMP2_BASE ) +#define COMP3 ((COMP_Type *) COMP3_BASE ) +#define COMP ((COMP_COMMON_Type *)COMP_COMMON_BASE ) +#define DIVAS ((DIVAS_Type *) DIVAS_BASE ) +#define I2C ((I2C_Type *) I2C_BASE ) +#define UART ((UART_COMMON_Type *) UART_COMMON_BASE ) +#define UART0 ((UART_Type *) UART0_BASE ) +#define UART1 ((UART_Type *) UART1_BASE ) +#define UART3 ((UART_Type *) UART3_BASE ) +#define UART4 ((UART_Type *) UART4_BASE ) +#define UART5 ((UART_Type *) UART5_BASE ) +#define LPUART0 ((LPUART_Type *) LPUART0_BASE ) +#define LPUART1 ((LPUART_Type *) LPUART1_BASE ) +#define LPUART2 ((LPUART_Type *) LPUART2_BASE ) +#define SPI0 ((SPI_Type *) SPI0_BASE ) +#define SPI1 ((SPI_Type *) SPI1_BASE ) +#define SPI2 ((SPI_Type *) SPI2_BASE ) +#define CAN ((CAN_Type *) CAN_BASE ) +#define DMA ((DMA_Type *) DMA_BASE ) +#define CRC ((CRC_Type *) CRC_BASE ) +#define ATIM ((ATIM_Type *) ATIM_BASE ) +#define GPTIM0 ((GPTIM_Type *) GPTIM0_BASE ) +#define GPTIM1 ((GPTIM_Type *) GPTIM1_BASE ) +#define GPTIM2 ((GPTIM_Type *) GPTIM2_BASE ) +#define BSTIM32 ((BSTIM32_Type *) BSTIM32_BASE ) +#define BSTIM16 ((BSTIM16_Type *) BSTIM16_BASE ) +#define LPTIM32 ((LPTIM32_Type *) LPTIM32_BASE ) +#define LPTIM16 ((LPTIM16_Type *) LPTIM16_BASE ) +#define RTCA ((RTCA_Type *) RTCA_BASE ) +#define LCD ((LCD_Type *) LCD_BASE ) +#define ADC ((ADC_Type *) ADC_BASE ) +#define DAC ((DAC_Type *) DAC_BASE ) +#define GPIOA ((GPIO_Type *) GPIOA_BASE ) +#define GPIOB ((GPIO_Type *) GPIOB_BASE ) +#define GPIOC ((GPIO_Type *) GPIOC_BASE ) +#define GPIOD ((GPIO_Type *) GPIOD_BASE ) +#define GPIOE ((GPIO_Type *) GPIOE_BASE ) +#define GPIO ((GPIO_COMMON_Type *) GPIO_COMMON_BASE ) +#define DBG ((DBG_Type *) DBG_BASE ) + +/* ================================================================================ */ +/* ================ Peripheral include ================ */ +/* ================================================================================ */ + +/** @} */ /* End of group Device_Peripheral_Registers */ +/** @} */ /* End of group FM33LG0XX */ +/** @} */ /* End of group Keil */ + +#ifdef __cplusplus +} +#endif + +#endif /* FM33LG0XX_H */ + diff --git a/code_app_out/Source/sdk/Drivers/CMSIS/Device/FM/FM33xx/Include/system_fm33lg0xx.h b/code_app_out/Source/sdk/Drivers/CMSIS/Device/FM/FM33xx/Include/system_fm33lg0xx.h new file mode 100644 index 0000000..8fe3216 --- /dev/null +++ b/code_app_out/Source/sdk/Drivers/CMSIS/Device/FM/FM33xx/Include/system_fm33lg0xx.h @@ -0,0 +1,177 @@ +/**************************************************************************//** + * @file system_fm33lg0xx.h + * @brief CMSIS Cortex-M0 Device Peripheral Access Layer Header File for + * Device FM33LG0XX + * @version V2.0.0 + * @date 15. Mar 2021 + * + * @note + * + ******************************************************************************/ +/* Copyright (c) 2012 ARM LIMITED + + All rights reserved. + Redistribution and use in source and binary forms, with or without + modification, are permitted provided that the following conditions are met: + - Redistributions of source code must retain the above copyright + notice, this list of conditions and the following disclaimer. + - Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the + documentation and/or other materials provided with the distribution. + - Neither the name of ARM nor the names of its contributors may be used + to endorse or promote products derived from this software without + specific prior written permission. + * + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE + LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + POSSIBILITY OF SUCH DAMAGE. + ---------------------------------------------------------------------------*/ + +#ifndef SYSTEM_FM33LC0XX_H +#define SYSTEM_FM33LC0XX_H + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @brief CMSIS Device version number + */ +#define __FM33LG0xx_CMSIS_VERSION_MAIN (0x02) /*!< [31:24] main version */ +#define __FM33LG0xx_CMSIS_VERSION_SUB1 (0x03) /*!< [23:16] sub1 version */ +#define __FM33LG0xx_CMSIS_VERSION_SUB2 (0x00) /*!< [15:0] sub2 version */ +#define __FM33LG0xx_CMSIS_VERSION ((__FM33LG0xx_CMSIS_VERSION_MAIN << 24)\ + |(__FM33LG0xx_CMSIS_VERSION_SUB1 << 16)\ + |(__FM33LG0xx_CMSIS_VERSION_SUB2)) + +/* Configurations ------------------------------------------------------------*/ +/** + * @brief LSCLK auto switch + * @note Comment the following line to enable LSCLK auto switch function. + */ +//#define USE_LSCLK_AUTO_SWITCH + + +/** + * @brief Keep debug connection under sleep mode + * @note Uncomment the following line to debug under sleep mode + */ +/* #define USE_DEBUG_UNDER_SLEEP */ +#define USE_DEBUG_UNDER_SLEEP //TEMP_CLOSE +/** + * @brief Open IWDT on program startup + * @note Uncomment the following line to use IWDT on startup. User can modify + * the IWDT_OVERFLOW_PERIOD to change the IDWT overflow period. + */ +/* #define USE_IWDT_ON_STARTUP */ + +#ifdef USE_IWDT_ON_STARTUP + +/* + Valid value of IWDT_OVERFLOW_PERIOD: + - 0x0: 125ms + - 0x1: 250ms + - 0x2: 500ms + - 0x3: 1s + - 0x4: 2s + - 0x5: 4s + - 0x6: 8s + - 0x7: 16s + */ +#define IWDT_OVERFLOW_PERIOD 0x7 + +#endif /* USE_IWDT_ON_STARTUP */ + +/* Includes ------------------------------------------------------------------*/ +#include + +/* Device Includes -----------------------------------------------------------*/ +#include "fm33lg0xx.h" + +/* Trim Values ---------------------------------------------------------------*/ +/* Validate Function */ +#define LDT_CHECK(_N_VALUE_, _T_VALUE_) \ + ((((_N_VALUE_ >> 16) & 0xFFFFU) == \ + (~(_N_VALUE_) & 0xFFFFU)) ? (_N_VALUE_) : (_T_VALUE_)) + +#define RCHF8M_LDT_TRIM (*(uint32_t *)0x1FFFFB40U) /* RC8M 常温校准值 */ +#define RCHF16M_LDT_TRIM (*(uint32_t *)0x1FFFFB3CU) /* RC16M 常温校准值 */ +#define RCHF24M_LDT_TRIM (*(uint32_t *)0x1FFFFB38U) /* RC24M 常温校准值 */ +#define RCHF32M_LDT_TRIM (*(uint32_t *)0x1FFFFB34U) /* RC32M 常温校准值 */ +#define RCLF_LDT_TRIM (*(uint32_t *)0x1FFFFB44U) /* RCLF 常温校准值 */ +#define RCLP_LDT_TRIM (*(uint32_t *)0x1FFFFB20U) /* RCLP 常温校准值 */ + + +#define RCHF8M_LDT_TRIM_BKP (*(uint16_t *)0x1FFFFBC2U) /* RC8M 常温校准值备份 */ +#define RCHF16M_LDT_TRIM_BKP (*(uint16_t *)0x1FFFFBC4U) /* RC16M 常温校准值备份 */ +#define RCHF24M_LDT_TRIM_BKP (*(uint16_t *)0x1FFFFBC6U) /* RC24M 常温校准值备份 */ +#define RCHF32M_LDT_TRIM_BKP (*(uint16_t *)0x1FFFFBC8U) /* RC32M 常温校准值备份 */ +#define RCLF_LDT_TRIM_BKP (*(uint16_t *)0x1FFFFBC0U) /* RCLF 常温校准值备份 */ +#define RCLP_LDT_TRIM_BKP (*(uint16_t *)0x1FFFFBCEU) /* RCLP 常温校准值备份 */ + + +#define RCHF8M_TRIM (LDT_CHECK(RCHF8M_LDT_TRIM, RCHF8M_LDT_TRIM_BKP) & 0xffU) +#define RCHF16M_TRIM (LDT_CHECK(RCHF16M_LDT_TRIM, RCHF16M_LDT_TRIM_BKP) & 0xffU) +#define RCHF24M_TRIM (LDT_CHECK(RCHF24M_LDT_TRIM, RCHF24M_LDT_TRIM_BKP) & 0xffU) +#define RCHF32M_TRIM (LDT_CHECK(RCHF32M_LDT_TRIM, RCHF32M_LDT_TRIM_BKP) & 0xffU) +#define RCLF_TRIM (LDT_CHECK(RCLF_LDT_TRIM, RCLF_LDT_TRIM_BKP) & 0xffU) +#define RCLP_TRIM (LDT_CHECK(RCLP_LDT_TRIM, RCLP_LDT_TRIM_BKP) & 0xffU) + + +#define ULPBG_LDT_TRIM (*(uint32_t *)0x1FFFFA98U) + +#define ULPBG_LDT_TRIM_BKP (*(uint16_t *)0x1FFFFBAAU) /* 备份值 */ + +#define ULPBG_TRIM (LDT_CHECK(ULPBG_LDT_TRIM, ULPBG_LDT_TRIM_BKP) & 0x1fU) + +/* Default Clock Frequency Values --------------------------------------------*/ + +#define XTHF_DEFAULT_VALUE ((uint32_t)8000000U) /*!< Default value of XTHF in Hz */ +#define XTLF_DEFAULT_VALUE ((uint32_t)32768U) /*!< Default value of XTLF in Hz */ + +/* Default system core clock value */ +#define HCLK_DEFAULT_VALUE ((uint32_t)8000000U) + +/* Exported Clock Frequency Variables --------------------------------------- */ +/* + - [SystemCoreClock] holds the value of CPU operation clock freqency, and is initialized + to HCLK_DEFAULT_VALUE; + - [XTLFClock] holds the value of external low-frequency oscillator(XTLF), + and is initialized to XTLF_DEFAULT_VALUE; + - [XTHFClock] holds the value of external high_frequency oscillator(XTHF), + and is initialized to XTHF_DEFAULT_VALUE; + + NOTE: If users are using these two external oscillators, they should modify the + value of XTLFClock and XTHFClock to the correct value, and call the SystemCoreClockUpdate() + to update the SystemCoreClock variable, otherwise those codes which rely on + the SystemCoreClock variable will fail to run. + */ +extern uint32_t XTLFClock; /*!< External Low-freq Osc Clock Frequency (XTLF) */ +extern uint32_t XTHFClock; /*!< External High-freq Osc Clock Frequency (XTHF) */ +extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */ + +/** + * @brief Setup the microcontroller system. + * Initialize the System. + */ +void SystemInit(void); + +/** + * @brief Updates the SystemCoreClock with current core Clock + * retrieved from cpu registers. + */ +void SystemCoreClockUpdate(void); + +#ifdef __cplusplus +} +#endif + +#endif /* SYSTEM_FM33LG0XX_H */ diff --git a/code_app_out/Source/sdk/Drivers/CMSIS/Device/FM/FM33xx/Source/Templates/ARM/startup_fm33lg0xx.s b/code_app_out/Source/sdk/Drivers/CMSIS/Device/FM/FM33xx/Source/Templates/ARM/startup_fm33lg0xx.s new file mode 100644 index 0000000..7cded38 --- /dev/null +++ b/code_app_out/Source/sdk/Drivers/CMSIS/Device/FM/FM33xx/Source/Templates/ARM/startup_fm33lg0xx.s @@ -0,0 +1,231 @@ +;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------ +;*/ + + +; Stack Configuration +; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + +Stack_Size EQU 0x00000800 + + AREA STACK, NOINIT, READWRITE, ALIGN=3 +Stack_Mem SPACE Stack_Size +__initial_sp + + +; Heap Configuration +; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + +Heap_Size EQU 0x00000800 + + AREA HEAP, NOINIT, READWRITE, ALIGN=3 +__heap_base +Heap_Mem SPACE Heap_Size +__heap_limit + + PRESERVE8 + THUMB + + +; Vector Table Mapped to Address 0 at Reset + + AREA RESET, DATA, READONLY + EXPORT __Vectors + EXPORT __Vectors_End + EXPORT __Vectors_Size + +__Vectors DCD __initial_sp ; Top of Stack + DCD Reset_Handler ; Reset Handler + DCD NMI_Handler ; NMI Handler + DCD HardFault_Handler ; Hard Fault Handler + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD SVC_Handler ; SVCall Handler + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD PendSV_Handler ; PendSV Handler + DCD SysTick_Handler ; SysTick Handler + + ; External Interrupts + DCD WDT_IRQHandler ; 0: WWDT + DCD SVD_IRQHandler ; 1: SVD + DCD RTC_IRQHandler ; 2: RTC + DCD FLASH_IRQHandler ; 3: FLASH + DCD FDET_IRQHandler ; 4: LFDET + DCD ADC_IRQHandler ; 5: ADC + DCD DAC_IRQHandler ; 6: DAC + DCD SPI0_IRQHandler ; 7: SPI0 + DCD SPI1_IRQHandler ; 8: SPI1 + DCD SPI2_IRQHandler ; 9: SPI2 + DCD UART0_IRQHandler ; 10: UART0 + DCD UART1_IRQHandler ; 11: UART1 + DCD UART3_IRQHandler ; 12: UART3 + DCD UART4_IRQHandler ; 13: UART4 + DCD UART5_IRQHandler ; 14: UART5 + DCD 0 ; 15: + DCD LPUARTx_IRQHandler ; 16: LPUART + DCD I2C_IRQHandler ; 17: I2C + DCD CCL_IRQHandler ; 18: CCL + DCD AES_IRQHandler ; 19: AES + DCD LPTIM_IRQHandler ; 20: LPTIM + DCD DMA_IRQHandler ; 21: DMA + DCD WKUPx_IRQHandler ; 22: WKUP + DCD LUT_IRQHandler ; 23: LUT + DCD BSTIM_IRQHandler ; 24: BSTIM + DCD COMPx_IRQHandler ; 25: COMPx + DCD GPTIM0_1_IRQHandler ; 26: GPTIM0_1 + DCD GPTIM2_IRQHandler ; 27: GPTIM2 + DCD ATIM_IRQHandler ; 28: ATIM + DCD VREF_IRQHandler ; 29: VREF + DCD GPIO_IRQHandler ; 30: GPIO + DCD CAN_IRQHandler ; 31: CAN +__Vectors_End + +__Vectors_Size EQU __Vectors_End - __Vectors + + AREA |.text|, CODE, READONLY + + +; Reset Handler + +Reset_Handler PROC + EXPORT Reset_Handler [WEAK] + IMPORT SystemInit + IMPORT __main + LDR R0, =SystemInit + BLX R0 + LDR R0, =__main + BX R0 + ENDP + + +; Dummy Exception Handlers (infinite loops which can be modified) + +NMI_Handler PROC + EXPORT NMI_Handler [WEAK] + B . + ENDP +HardFault_Handler\ + PROC + EXPORT HardFault_Handler [WEAK] + B . + ENDP +SVC_Handler PROC + EXPORT SVC_Handler [WEAK] + B . + ENDP +PendSV_Handler PROC + EXPORT PendSV_Handler [WEAK] + B . + ENDP +SysTick_Handler PROC + EXPORT SysTick_Handler [WEAK] + B . + ENDP + +Default_Handler PROC + EXPORT CAN_IRQHandler [WEAK] + EXPORT GPIO_IRQHandler [WEAK] + EXPORT VREF_IRQHandler [WEAK] + EXPORT ATIM_IRQHandler [WEAK] + EXPORT GPTIM2_IRQHandler [WEAK] + EXPORT GPTIM0_1_IRQHandler [WEAK] + EXPORT COMPx_IRQHandler [WEAK] + EXPORT BSTIM_IRQHandler [WEAK] + EXPORT LUT_IRQHandler [WEAK] + EXPORT WKUPx_IRQHandler [WEAK] + EXPORT DMA_IRQHandler [WEAK] + EXPORT LPTIM_IRQHandler [WEAK] + EXPORT AES_IRQHandler [WEAK] + EXPORT CCL_IRQHandler [WEAK] + EXPORT I2C_IRQHandler [WEAK] + EXPORT LPUARTx_IRQHandler [WEAK] + EXPORT UART5_IRQHandler [WEAK] + EXPORT UART4_IRQHandler [WEAK] + EXPORT UART3_IRQHandler [WEAK] + EXPORT UART1_IRQHandler [WEAK] + EXPORT UART0_IRQHandler [WEAK] + EXPORT SPI2_IRQHandler [WEAK] + EXPORT SPI1_IRQHandler [WEAK] + EXPORT SPI0_IRQHandler [WEAK] + EXPORT DAC_IRQHandler [WEAK] + EXPORT ADC_IRQHandler [WEAK] + EXPORT FDET_IRQHandler [WEAK] + EXPORT FLASH_IRQHandler [WEAK] + EXPORT RTC_IRQHandler [WEAK] + EXPORT SVD_IRQHandler [WEAK] + EXPORT WDT_IRQHandler [WEAK] + +CAN_IRQHandler +GPIO_IRQHandler +VREF_IRQHandler +ATIM_IRQHandler +GPTIM2_IRQHandler +GPTIM0_1_IRQHandler +COMPx_IRQHandler +BSTIM_IRQHandler +LUT_IRQHandler +WKUPx_IRQHandler +DMA_IRQHandler +LPTIM_IRQHandler +AES_IRQHandler +CCL_IRQHandler +I2C_IRQHandler +LPUARTx_IRQHandler +UART5_IRQHandler +UART4_IRQHandler +UART3_IRQHandler +UART1_IRQHandler +UART0_IRQHandler +SPI2_IRQHandler +SPI1_IRQHandler +SPI0_IRQHandler +DAC_IRQHandler +ADC_IRQHandler +FDET_IRQHandler +FLASH_IRQHandler +RTC_IRQHandler +SVD_IRQHandler +WDT_IRQHandler + + B . + ENDP + + + ALIGN + + +; User Initial Stack & Heap + + IF :DEF:__MICROLIB + + EXPORT __initial_sp + EXPORT __heap_base + EXPORT __heap_limit + + ELSE + + IMPORT __use_two_region_memory + EXPORT __user_initial_stackheap +__user_initial_stackheap + + LDR R0, = Heap_Mem + LDR R1, =(Stack_Mem + Stack_Size) + LDR R2, = (Heap_Mem + Heap_Size) + LDR R3, = Stack_Mem + BX LR + + ALIGN + + ENDIF + + + END + + *****END OF FILE***** \ No newline at end of file diff --git a/code_app_out/Source/sdk/Drivers/CMSIS/Device/FM/FM33xx/Source/Templates/gcc/linker/fm33lg02x_flash.ld b/code_app_out/Source/sdk/Drivers/CMSIS/Device/FM/FM33xx/Source/Templates/gcc/linker/fm33lg02x_flash.ld new file mode 100644 index 0000000..e65baef --- /dev/null +++ b/code_app_out/Source/sdk/Drivers/CMSIS/Device/FM/FM33xx/Source/Templates/gcc/linker/fm33lg02x_flash.ld @@ -0,0 +1,139 @@ +/* Entry Point */ +ENTRY(Reset_Handler) + +/* Highest address of the user mode stack */ +_estack = 0x20008000; /* end of RAM */ +/* Generate a link error if heap and stack don't fit into RAM */ +_Min_Heap_Size = 0x400; /* required amount of heap */ +_Stack_Size = 0x400; /* amount of stack */ + +/* Specify the memory areas */ +MEMORY +{ +RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 32K +FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 128K +} + +/* Define output sections */ +SECTIONS +{ + /* The startup code goes first into FLASH */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + } >FLASH + + /* The program code and other data goes into FLASH */ + .text : + { + . = ALIGN(4); + *(.text) /* .text sections (code) */ + *(.text*) /* .text* sections (code) */ + *(.glue_7) /* glue arm to thumb code */ + *(.glue_7t) /* glue thumb to arm code */ + *(.eh_frame) + + KEEP (*(.init)) + KEEP (*(.fini)) + + . = ALIGN(4); + _etext = .; /* define a global symbols at end of code */ + } >FLASH + + /* Constant data goes into FLASH */ + .rodata : + { + . = ALIGN(4); + *(.rodata) /* .rodata sections (constants, strings, etc.) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + . = ALIGN(4); + } >FLASH + + .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH + .ARM : { + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + } >FLASH + + .preinit_array : + { + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array*)) + PROVIDE_HIDDEN (__preinit_array_end = .); + } >FLASH + .init_array : + { + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array*)) + PROVIDE_HIDDEN (__init_array_end = .); + } >FLASH + .fini_array : + { + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(SORT(.fini_array.*))) + KEEP (*(.fini_array*)) + PROVIDE_HIDDEN (__fini_array_end = .); + } >FLASH + + /* used by the startup to initialize data */ + _sidata = LOADADDR(.data); + + /* Initialized data sections goes into RAM, load LMA copy after code */ + .data : + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start */ + *(.data) /* .data sections */ + *(.data*) /* .data* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end */ + } >RAM AT> FLASH + + + /* Uninitialized data section */ + . = ALIGN(4); + .bss : + { + /* This is used by the startup in order to initialize the .bss secion */ + _sbss = .; /* define a global symbol at bss start */ + __bss_start__ = _sbss; + *(.bss) + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end */ + __bss_end__ = _ebss; + } >RAM + + /* Remove information from the standard libraries */ + /DISCARD/ : + { + libc.a ( * ) + libm.a ( * ) + libgcc.a ( * ) + } + + /* User_heap_stack section, used to check that there is enough RAM left */ + . = ALIGN(8); + PROVIDE ( end = . ); + PROVIDE ( _end = . ); + + /* system stack */ + PROVIDE (_stack_base = _estack - _Stack_Size); /* _estack is top of stack*/ + ASSERT ((_stack_base > end), "Error: No room left for the stack") + /* _estack is top of stack*/ + + /* left ram for heap */ + PROVIDE (heap_start = _end); + PROVIDE (heap_end = _stack_base); + PROVIDE (heap_len = heap_end - heap_start); + ASSERT ((heap_len > _Min_Heap_Size), "Error: No room left for the heap") + + .ARM.attributes 0 : { *(.ARM.attributes) } +} diff --git a/code_app_out/Source/sdk/Drivers/CMSIS/Device/FM/FM33xx/Source/Templates/gcc/linker/fm33lg04x_flash.ld b/code_app_out/Source/sdk/Drivers/CMSIS/Device/FM/FM33xx/Source/Templates/gcc/linker/fm33lg04x_flash.ld new file mode 100644 index 0000000..c15d35d --- /dev/null +++ b/code_app_out/Source/sdk/Drivers/CMSIS/Device/FM/FM33xx/Source/Templates/gcc/linker/fm33lg04x_flash.ld @@ -0,0 +1,289 @@ +/* +** ################################################################### +** Processor: S32K11x with mm KB SRAM +** Compiler: GNU C Compiler +** +** Abstract: +** Linker file for the GNU C Compiler +** +** Copyright 2018 NXP +** All rights reserved. +** +** THIS SOFTWARE IS PROVIDED BY NXP "AS IS" AND ANY EXPRESSED OR +** IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES +** OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. +** IN NO EVENT SHALL NXP OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, +** INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR +** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) +** HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, +** STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING +** IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF +** THE POSSIBILITY OF SUCH DAMAGE. +** +** http: www.freescale.com +** mail: support@freescale.com +** +** ################################################################### +*/ + +/* Entry Point */ +ENTRY(Reset_Handler) + +HEAP_SIZE = DEFINED(__heap_size__) ? __heap_size__ : 0x00000200; +STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x00000200; +STACK_CHECK_S_ADDR = 0x210; + +/* If symbol __flash_vector_table__=1 is defined at link time + * the interrupt vector will not be copied to RAM. + * Warning: Using the interrupt vector from Flash will not allow + * INT_SYS_InstallHandler because the section is Read Only. + */ +M_VECTOR_RAM_SIZE = DEFINED(__flash_vector_table__) ? 0x0 : 0x00C0; + +/* Specify the memory areas */ +MEMORY +{ + /* Flash */ + m_interrupts (RX) : ORIGIN = 0x00008100, LENGTH = 0x000000C0 + + + m_text (RX) : ORIGIN = 0x00008200, LENGTH = 0x000D800 + m_text1 (RX) : ORIGIN = 0x0001BBCC, LENGTH = 1k /*FOR UDS DATA*/ + m_text2 (RX) : ORIGIN = 0x0001BFCC, LENGTH = 4 /*FOR RES*/ + m_text3 (RX) : ORIGIN = 0x00008000, LENGTH = 16 /*FOR APP FLAG*/ + + + /* SRAM_L */ + /*m_custom (RW) : ORIGIN = 0x1FFFFC00, LENGTH = 0x00000300*/ + /* SRAM_U */ + m_data (RW) : ORIGIN = 0x20000000, LENGTH = 0x00006000 + m_data_2 (RW) : ORIGIN = 0x20006000, LENGTH = 0x00000100 /*Ŀǰ ASIL */ + m_data_5 (RW) : ORIGIN = 0x20007C00, LENGTH = 0x00000200 /*Ŀǰδʼ*/ + m_data_3 (RW) : ORIGIN = (0x20006000-STACK_CHECK_S_ADDR), LENGTH = 0x10 +} + +/* Define output sections */ +SECTIONS +{ + FLASH_VALID_FLAG1_ADDR 0x00008000 : + { + *(FLASH_VALID_FLAG1_ADDR) + } + /* The startup code goes first into internal flash */ + .interrupts : + { + __VECTOR_TABLE = .; + __interrupts_start__ = .; + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + __interrupts_end__ = .; + . = ALIGN(4); + } > m_interrupts + + + /* The program code and other data goes into internal flash */ + .text : + { + . = ALIGN(4); + *(.text) /* .text sections (code) */ + *(.text*) /* .text* sections (code) */ + *(.rodata) /* .rodata sections (constants, strings, etc.) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + *(.init) /* section used in crti.o files */ + *(.fini) /* section used in crti.o files */ + *(.eh_frame) /* section used in crtbegin.o files */ + . = ALIGN(4); + } > m_text + + /* Section used by the libgcc.a library for fvp4 */ + .ARM : + { + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + } > m_text + + __etext = .; /* Define a global symbol at end of code. */ + __DATA_ROM = .; /* Symbol is used by startup for data initialization. */ + + /* The program code and other data goes into internal flash */ + .ROM_DATA_UDS : + { + *(.ROM_DATA_UDS) /* .text sections (code) */ + *(.ROM_DATA_UDS*) /* .text* sections (code) */ + } > m_text1 + __DATA_UDS_ROM = .; /* Symbol is used by startup for data initialization. */ + + /* The program code and other data goes into internal flash */ + .ROM_APP_RES : + { + *(.ROM_APP_RES) /* .text sections (code) */ + *(.ROM_APP_RES*) /* .text* sections (code) */ + } > m_text2 + __DATA_RES_ROM = .; /* Symbol is used by startup for data initialization. */ + + /* The program code and other data goes into internal flash */ + .ROM_APP_VALID : + { + *(.ROM_APP_VALID) /* .text sections (code) */ + *(.ROM_APP_VALID*) /* .text* sections (code) */ + } > m_text3 + __DATA_APP_VALID_ROM = .; /* Symbol is used by startup for data initialization. */ + + + .interrupts_ram : + { + . = ALIGN(4); + __VECTOR_RAM__ = .; + __RAM_START = .; + __interrupts_ram_start__ = .; /* Create a global symbol at data start. */ + *(.m_interrupts_ram) /* This is a user defined section. */ + . += M_VECTOR_RAM_SIZE; + . = ALIGN(4); + __interrupts_ram_end__ = .; /* Define a global symbol at data end. */ + } > m_data + + __VECTOR_RAM = DEFINED(__flash_vector_table__) ? ORIGIN(m_interrupts) : __VECTOR_RAM__ ; + __RAM_VECTOR_TABLE_SIZE = DEFINED(__flash_vector_table__) ? 0x0 : (__interrupts_ram_end__ - __interrupts_ram_start__) ; + + .data : AT(__DATA_ROM) + { + . = ALIGN(4); + __DATA_RAM = .; + __data_start__ = .; /* Create a global symbol at data start. */ + *(.data) /* .data sections */ + *(.data*) /* .data* sections */ + . = ALIGN(4); + __data_end__ = .; /* Define a global symbol at data end. */ + } > m_data + + __DATA_END = __DATA_ROM + (__data_end__ - __data_start__); + __CODE_ROM = __DATA_END; /* Symbol is used by code initialization. */ + + .code : AT(__CODE_ROM) + { + . = ALIGN(4); + __CODE_RAM = .; + __code_start__ = .; /* Create a global symbol at code start. */ + __code_ram_start__ = .; + *(.code_ram) /* Custom section for storing code in RAM */ + . = ALIGN(4); + __code_end__ = .; /* Define a global symbol at code end. */ + __code_ram_end__ = .; + } > m_data + + __CODE_END = __CODE_ROM + (__code_end__ - __code_start__); + __CUSTOM_ROM = __CODE_END; + + /* Custom Section Block that can be used to place data at absolute address. */ + /* Use __attribute__((section (".customSection"))) to place data here. */ + /* Use this section only when MTB (Micro Trace Buffer) is not used, because MTB uses the same RAM area, as described in S32K Reference Manual. */ + + + /* Uninitialized data section. */ + .bss : + { + /* This is used by the startup in order to initialize the .bss section. */ + . = ALIGN(4); + __BSS_START = .; + __bss_start__ = .; + *(.bss) + *(.bss*) + *(COMMON) + . = ALIGN(4); + __bss_end__ = .; + __BSS_END = .; + } > m_data + + /* Put heap section after the program data */ + .heap : + { + . = ALIGN(8); + __end__ = .; + __heap_start__ = .; + PROVIDE(end = .); + PROVIDE(_end = .); + PROVIDE(__end = .); + __HeapBase = .; + . += HEAP_SIZE; + __HeapLimit = .; + __heap_limit = .; + __heap_end__ = .; + } > m_data + + /* Initializes stack on the end of block */ + __StackTop = ORIGIN(m_data) + LENGTH(m_data); + __StackLimit = __StackTop - STACK_SIZE; + __StackLimit_check = __StackTop - STACK_SIZE -0x10; + PROVIDE(__stack = __StackTop); + //__RAM_END = __StackTop; + + .stack __StackLimit : + { + . = ALIGN(8); + __stack_start__ = .; + . += STACK_SIZE; + __stack_end__ = .; + } > m_data + + + + __DATA2_ROM = __CUSTOM_ROM; + .RAM_ASIL ORIGIN(m_data_2) : AT(__DATA2_ROM) + { + . = ALIGN(4); + __RAM_ASILStart = .; + __RAM_ASIL_Start__ = .; + KEEP(*(.RAM_ASIL)) /* Keep section even if not referenced. */ + __RAM_ASIL_end__ = .; + . = ALIGN(4); + __scst_data_start__ = .; + *(.m0_scst_ram_data) + . = ALIGN(4); + *(.m0_scst_ram_data_target0) + . = ALIGN(4); + *(.m0_scst_ram_data_target1) + . = ALIGN(4); + *(.m0_scst_ram_test_code) + *(.m0_scst_test_shell_data) + __scst_data_end__ = .; + } >m_data_2 + + /* Initializes stack on the end of block */ + __DATA2_RAM_END = ORIGIN(m_data_2) + LENGTH(m_data_2); + __DATA2_ROM_END = __DATA2_ROM + __scst_data_end__ - __RAM_ASIL_Start__; + + __STACK_CHECK_ROM = __DATA2_ROM_END; + __STACK_CHECK_RAM = ORIGIN(m_data_3) + LENGTH(m_data_3); + .STACK_CHECK_ADDR ORIGIN(m_data_3) : AT(__STACK_CHECK_ROM) + { + __STACK_CHECK_ADDRStart = .; + __STACK_CHECK_ADDR_start__ = .; + KEEP(*(.STACK_CHECK_ADDR)) /* Keep section even if not referenced. */ + __STACK_CHECK_ADDR_end__ = .; + } > m_data_3 + __STACK_CHECK_ROM_END = __STACK_CHECK_ROM + (__STACK_CHECK_ADDR_end__ - __STACK_CHECK_ADDR_start__); + + __DATA5_ROM = __STACK_CHECK_ROM_END; + .RAM_FLAG_NOLINT ORIGIN(m_data_5) : AT(__DATA5_ROM) + { + . = ALIGN(4); + __RAM_FLAG_NOLINTstart = .; + __RAM_FLAG_NOLINT_Start__ = .; + KEEP(*(.RAM_FLAG_NOLINT)) /* Keep section even if not referenced. */ + __RAM_FLAG_NOLINT_end__ = .; + . = ALIGN(4); + } >m_data_5 + + /* Initializes stack on the end of block */ + __DATA5_RAM_END = ORIGIN(m_data_5) + LENGTH(m_data_5); + __DATA5_ROM_END = __DATA5_ROM + __RAM_FLAG_NOLINT_end__ - __RAM_FLAG_NOLINTstart; + + __RAM_END = __DATA2_RAM_END; + .ARM.attributes 0 : { *(.ARM.attributes) } + + ASSERT(__StackLimit >= __HeapLimit, "region m_data overflowed with stack and heap") + ASSERT((0x20006000-STACK_CHECK_S_ADDR) == __StackLimit_check, "region stack check addr is error") +} + diff --git a/code_app_out/Source/sdk/Drivers/CMSIS/Device/FM/FM33xx/Source/Templates/gcc/linker/fm33lg04x_flash_backup.ld b/code_app_out/Source/sdk/Drivers/CMSIS/Device/FM/FM33xx/Source/Templates/gcc/linker/fm33lg04x_flash_backup.ld new file mode 100644 index 0000000..49f3d0f --- /dev/null +++ b/code_app_out/Source/sdk/Drivers/CMSIS/Device/FM/FM33xx/Source/Templates/gcc/linker/fm33lg04x_flash_backup.ld @@ -0,0 +1,131 @@ +/* Entry Point */ +ENTRY(Reset_Handler) + +/* Highest address of the user mode stack */ +_estack = 0x20008000; /* end of RAM */ +/* Generate a link error if heap and stack don't fit into RAM */ +_Min_Heap_Size = 0x400; /* required amount of heap */ +_Stack_Size = 0x400; /* amount of stack */ + +/* Specify the memory areas */ +MEMORY +{ +RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 32K +FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 256K +} + +/* Define output sections */ +SECTIONS +{ + /* The startup code goes first into FLASH */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + } >FLASH + + /* The program code and other data goes into FLASH */ + .text : + { + . = ALIGN(4); + *(.text) /* .text sections (code) */ + *(.text*) /* .text* sections (code) */ + *(.glue_7) /* glue arm to thumb code */ + *(.glue_7t) /* glue thumb to arm code */ + *(.eh_frame) + + KEEP (*(.init)) + KEEP (*(.fini)) + + . = ALIGN(4); + _etext = .; /* define a global symbols at end of code */ + } >FLASH + + /* Constant data goes into FLASH */ + .rodata : + { + . = ALIGN(4); + *(.rodata) /* .rodata sections (constants, strings, etc.) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + . = ALIGN(4); + } >FLASH + + .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH + .ARM : { + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + } >FLASH + + .preinit_array : + { + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array*)) + PROVIDE_HIDDEN (__preinit_array_end = .); + } >FLASH + .init_array : + { + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array*)) + PROVIDE_HIDDEN (__init_array_end = .); + } >FLASH + .fini_array : + { + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(SORT(.fini_array.*))) + KEEP (*(.fini_array*)) + PROVIDE_HIDDEN (__fini_array_end = .); + } >FLASH + + /* used by the startup to initialize data */ + _sidata = LOADADDR(.data); + + /* Initialized data sections goes into RAM, load LMA copy after code */ + .data : + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start */ + *(.data) /* .data sections */ + *(.data*) /* .data* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end */ + } >RAM AT> FLASH + + + /* Uninitialized data section */ + . = ALIGN(4); + .bss : + { + /* This is used by the startup in order to initialize the .bss secion */ + _sbss = .; /* define a global symbol at bss start */ + __bss_start__ = _sbss; + *(.bss) + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end */ + __bss_end__ = _ebss; + } >RAM + + /* User_heap_stack section, used to check that there is enough RAM left */ + . = ALIGN(8); + PROVIDE ( end = . ); + PROVIDE ( _end = . ); + + /* system stack */ + PROVIDE (_stack_base = _estack - _Stack_Size); /* _estack is top of stack*/ + ASSERT ((_stack_base > end), "Error: No room left for the stack") + /* _estack is top of stack*/ + + /* left ram for heap */ + PROVIDE (heap_start = _end); + PROVIDE (heap_end = _stack_base); + PROVIDE (heap_len = heap_end - heap_start); + ASSERT ((heap_len > _Min_Heap_Size), "Error: No room left for the heap") + + .ARM.attributes 0 : { *(.ARM.attributes) } +} diff --git a/code_app_out/Source/sdk/Drivers/CMSIS/Device/FM/FM33xx/Source/Templates/gcc/startup_fm33lg0xx.S b/code_app_out/Source/sdk/Drivers/CMSIS/Device/FM/FM33xx/Source/Templates/gcc/startup_fm33lg0xx.S new file mode 100644 index 0000000..4c22beb --- /dev/null +++ b/code_app_out/Source/sdk/Drivers/CMSIS/Device/FM/FM33xx/Source/Templates/gcc/startup_fm33lg0xx.S @@ -0,0 +1,235 @@ +/* ---------------------------------------------------------------------------------------*/ +/* @file: startup_S32K118.s */ +/* @purpose: GNU Compiler Collection Startup File */ +/* S32K118 */ +/* @version: 1.0 */ +/* @date: 2018-1-22 */ +/* @build: b170107 */ +/* ---------------------------------------------------------------------------------------*/ +/* */ +/* Copyright 2018 NXP */ +/* All rights reserved. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY NXP "AS IS" AND ANY EXPRESSED OR */ +/* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES */ +/* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. */ +/* IN NO EVENT SHALL NXP OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, */ +/* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES */ +/* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR */ +/* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) */ +/* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, */ +/* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING */ +/* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF */ +/* THE POSSIBILITY OF SUCH DAMAGE. */ +/*****************************************************************************/ +/* Version: GNU Compiler Collection */ +/*****************************************************************************/ + .syntax unified + .arch armv6-m + + .section .isr_vector, "a" + .align 2 + .globl __isr_vector +__isr_vector: + .long __StackTop /* Top of Stack */ + .long Reset_Handler /* Reset Handler */ + .long NMI_Handler /* Non Maskable Interrupt */ + .long HardFault_Handler /* Cortex-M0 SV Hard Fault Interrupt */ + .long 0 + .long 0 + .long 0 + .long 0 + .long 0 + .long 0 + .long 0 + .long SVC_Handler /* Cortex-M0 SV Call Interrupt */ + .long 0 + .long 0 + .long PendSV_Handler /* Cortex-M0 Pend SV Interrupt */ + .long SysTick_Handler /* Cortex-M0 System Tick Interrupt */ + + + .long WWDT_IRQHandler /* 0: WWDT */ + .long SVD_IRQHandler /* 1: SVD */ + .long RTC_IRQHandler /* 2: RTC */ + .long FLASH_IRQHandler /* 3: FLASH */ + .long FDET_IRQHandler /* 4: FDET */ + .long ADC_IRQHandler /* 5: ADC */ + .long DAC_IRQHandler /* 6: DAC */ + .long SPI0_IRQHandler /* 7: SPI0 */ + .long SPI1_IRQHandler /* 8: SPI1 */ + .long SPI2_IRQHandler /* 9: SPI2 */ + .long UART0_IRQHandler /* 10: UART0 */ + .long UART1_IRQHandler /* 11: UART1 */ + .long UART3_IRQHandler /* 12: UART3 */ + .long UART4_IRQHandler /* 13: UART4 */ + .long UART5_IRQHandler /* 14: UART5 */ + .long U7816_IRQHandler /* 15: U7816 */ + .long LPUARTx_IRQHandler /* 16: LPUARTx */ + .long I2C_IRQHandler /* 17: I2C */ + .long CCL_IRQHandler /* 18: CCL */ + .long AES_IRQHandler /* 19: AES */ + .long LPTIM_IRQHandler /* 20: LPTIM */ + .long DMA_IRQHandler /* 21: DMA */ + .long WKUPx_IRQHandler /* 22: WKUP */ + .long LUT_IRQHandler /* 23: LUT */ + .long BSTIM_IRQHandler /* 24: BSTIM */ + .long COMPx_IRQHandler /* 25: COMPx */ + .long GPTIM0_1_IRQHandler /* 26: GPTIM0(1) */ + .long GPTIM2_IRQHandler /* 27: GPTIM2 */ + .long ATIM_IRQHandler /* 28: ATIM */ + .long VREF_IRQHandler /* 39: VREF */ + .long GPIO_IRQHandler /* 30: GPIO */ + .long CAN_IRQHandler /* 31: CAN */ + + .size __isr_vector, . - __isr_vector + +/* Flash Configuration */ + .section .FlashConfig, "a" + .long 0xFFFFFFFF /* 8 bytes backdoor comparison key */ + .long 0xFFFFFFFF /* */ + .long 0xFFFFFFFF /* 4 bytes program flash protection bytes */ + .long 0xFFFF7FFE /* FDPROT:FEPROT:FOPT:FSEC(0xFE = unsecured) */ + + .text + .thumb + +/* Reset Handler */ + + .thumb_func + .align 2 + .globl Reset_Handler + .weak Reset_Handler + .type Reset_Handler, %function +Reset_Handler: + cpsid i /* Mask interrupts */ + + /* Init the rest of the registers */ + ldr r1,=0 + ldr r2,=0 + ldr r3,=0 + ldr r4,=0 + ldr r5,=0 + ldr r6,=0 + ldr r7,=0 + mov r8,r7 + mov r9,r7 + mov r10,r7 + mov r11,r7 + mov r12,r7 + +#ifdef START_FROM_FLASH + + /* Init ECC RAM */ + #ldr r6, =0x200030c0 + #ldr r7, =0x200030d0 + ldr r1, =__RAM_START + ldr r2, =__RAM_END + + + subs r2, r1 + subs r2, #1 + ble .LC5 + + movs r0, 0 + movs r3, #4 +.LC4: + str r0, [r1] +.LC41: + add r1, r1, r3 + subs r2, 4 + bge .LC4 + blt .LC5 +.LC42: + /*a<0x200030c0 a>0x200030d0 LC41*/ + ldr r5, =0x20005710 + movs r4,r1 + subs r4,r5 + bgt .LC4 + ldr r5, =0x20005700 + movs r4,r1 + subs r4,r5 + blt .LC4 + bge .LC41 +.LC5: +#else + bl ram_init +#endif + + /* Initialize the stack pointer */ + ldr r0,=__StackTop + mov r13,r0 + +#ifndef __NO_SYSTEM_INIT + /* Call the system init routine */ + ldr r0,=SystemInit + blx r0 +#endif + + /* Init .data and .bss sections */ + ldr r0,=init_data_bss + blx r0 + cpsie i /* Unmask interrupts */ + bl main +JumpToSelf: + b JumpToSelf + + .pool + .size Reset_Handler, . - Reset_Handler + + .align 1 + .thumb_func + .weak DefaultISR + .type DefaultISR, %function +DefaultISR: + b DefaultISR + .size DefaultISR, . - DefaultISR + +/* Macro to define default handlers. Default handler + * will be weak symbol and just dead loops. They can be + * overwritten by other handlers */ + .macro def_irq_handler handler_name + .weak \handler_name + .set \handler_name, DefaultISR + .endm + +/* Exception Handlers */ + def_irq_handler NMI_Handler + def_irq_handler HardFault_Handler + def_irq_handler SVC_Handler + def_irq_handler PendSV_Handler + def_irq_handler SysTick_Handler + def_irq_handler WWDT_IRQHandler + def_irq_handler SVD_IRQHandler + def_irq_handler RTC_IRQHandler + def_irq_handler FLASH_IRQHandler + def_irq_handler FDET_IRQHandler + def_irq_handler ADC_IRQHandler + def_irq_handler DAC_IRQHandler + def_irq_handler SPI0_IRQHandler + def_irq_handler SPI1_IRQHandler + def_irq_handler SPI2_IRQHandler + def_irq_handler UART0_IRQHandler + def_irq_handler UART1_IRQHandler + def_irq_handler UART3_IRQHandler + def_irq_handler UART4_IRQHandler + def_irq_handler UART5_IRQHandler + def_irq_handler U7816_IRQHandler + def_irq_handler LPUARTx_IRQHandler + def_irq_handler I2C_IRQHandler + def_irq_handler CCL_IRQHandler + def_irq_handler AES_IRQHandler + def_irq_handler LPTIM_IRQHandler + def_irq_handler DMA_IRQHandler + def_irq_handler WKUPx_IRQHandler + def_irq_handler LUT_IRQHandler + def_irq_handler BSTIM_IRQHandler + def_irq_handler COMPx_IRQHandler + def_irq_handler GPTIM0_1_IRQHandler + def_irq_handler GPTIM2_IRQHandler + def_irq_handler ATIM_IRQHandler + def_irq_handler VREF_IRQHandler + def_irq_handler GPIO_IRQHandler + def_irq_handler CAN_IRQHandler + + .end diff --git a/code_app_out/Source/sdk/Drivers/CMSIS/Device/FM/FM33xx/Source/Templates/gcc/startup_fm33lg0xx_back.S b/code_app_out/Source/sdk/Drivers/CMSIS/Device/FM/FM33xx/Source/Templates/gcc/startup_fm33lg0xx_back.S new file mode 100644 index 0000000..e1c4d0d --- /dev/null +++ b/code_app_out/Source/sdk/Drivers/CMSIS/Device/FM/FM33xx/Source/Templates/gcc/startup_fm33lg0xx_back.S @@ -0,0 +1,250 @@ + .syntax unified + .cpu cortex-m0plus + .fpu softvfp + .thumb + +.global Default_Handler + +/* start address for the initialization values of the .data section. +defined in linker script */ +.word _sidata +/* start address for the .data section. defined in linker script */ +.word _sdata +/* end address for the .data section. defined in linker script */ +.word _edata +/* start address for the .bss section. defined in linker script */ +.word _sbss +/* end address for the .bss section. defined in linker script */ +.word _ebss + + .section .text.Reset_Handler + .weak Reset_Handler + .type Reset_Handler, %function +Reset_Handler: + ldr r0, =_estack + mov sp, r0 /* set stack pointer */ + +/* Copy the data segment initializers from flash to SRAM */ + movs r1, #0 + b LoopCopyDataInit + +CopyDataInit: + ldr r3, =_sidata + ldr r3, [r3, r1] + str r3, [r0, r1] + adds r1, r1, #4 + +LoopCopyDataInit: + ldr r0, =_sdata + ldr r3, =_edata + adds r2, r0, r1 + cmp r2, r3 + bcc CopyDataInit + ldr r2, =_sbss + b LoopFillZerobss +/* Zero fill the bss segment. */ +FillZerobss: + movs r3, #0 + str r3, [r2] + adds r2, r2, #4 + +LoopFillZerobss: + ldr r3, = _ebss + cmp r2, r3 + bcc FillZerobss + +/* Call the clock system intitialization function.*/ + bl SystemInit +/* Call static constructors */ +// bl __libc_init_array +/* Call the application's entry point.*/ + bl main + +LoopForever: + b LoopForever + + .size Reset_Handler, .-Reset_Handler + .section .text.Default_Handler,"ax",%progbits +Default_Handler: +Infinite_Loop: + b Infinite_Loop + .size Default_Handler, .-Default_Handler + +/****************************************************************************** +* +* The minimal vector table for a Cortex M0. Note that the proper constructs +* must be placed on this to ensure that it ends up at physical address +* 0x0000.0000. +* +******************************************************************************/ + .section .isr_vector,"a",%progbits + .global g_pfnVectors +g_pfnVectors: + .word _estack + .word Reset_Handler + .word NMI_Handler + .word HardFault_Handler + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word SVC_Handler + .word 0 + .word 0 + .word PendSV_Handler + .word SysTick_Handler + /* External Interrupts */ + .word WWDT_IRQHandler /* 0: WWDT */ + .word SVD_IRQHandler /* 1: SVD */ + .word RTC_IRQHandler /* 2: RTC */ + .word FLASH_IRQHandler /* 3: FLASH */ + .word FDET_IRQHandler /* 4: FDET */ + .word ADC_IRQHandler /* 5: ADC */ + .word DAC_IRQHandler /* 6: DAC */ + .word SPI0_IRQHandler /* 7: SPI0 */ + .word SPI1_IRQHandler /* 8: SPI1 */ + .word SPI2_IRQHandler /* 9: SPI2 */ + .word UART0_IRQHandler /* 10: UART0 */ + .word UART1_IRQHandler /* 11: UART1 */ + .word UART3_IRQHandler /* 12: UART3 */ + .word UART4_IRQHandler /* 13: UART4 */ + .word UART5_IRQHandler /* 14: UART5 */ + .word U7816_IRQHandler /* 15: U7816 */ + .word LPUARTx_IRQHandler /* 16: LPUARTx */ + .word I2C_IRQHandler /* 17: I2C */ + .word CCL_IRQHandler /* 18: CCL */ + .word AES_IRQHandler /* 19: AES */ + .word LPTIM_IRQHandler /* 20: LPTIM */ + .word DMA_IRQHandler /* 21: DMA */ + .word WKUPx_IRQHandler /* 22: WKUP */ + .word LUT_IRQHandler /* 23: LUT */ + .word BSTIM_IRQHandler /* 24: BSTIM */ + .word COMPx_IRQHandler /* 25: COMPx */ + .word GPTIM0_1_IRQHandler /* 26: GPTIM0(1) */ + .word GPTIM2_IRQHandler /* 27: GPTIM2 */ + .word ATIM_IRQHandler /* 28: ATIM */ + .word VREF_IRQHandler /* 39: VREF */ + .word GPIO_IRQHandler /* 30: GPIO */ + .word CAN_IRQHandler /* 31: CAN */ + +/******************************************************************************* +* +* Provide weak aliases for each Exception handler to the Default_Handler. +* As they are weak aliases, any function with the same name will override +* this definition. +* +*******************************************************************************/ + .weak NMI_Handler + .thumb_set NMI_Handler,Default_Handler + + .weak HardFault_Handler + .thumb_set HardFault_Handler,Default_Handler + + .weak SVC_Handler + .thumb_set SVC_Handler,Default_Handler + + .weak PendSV_Handler + .thumb_set PendSV_Handler,Default_Handler + + .weak SysTick_Handler + .thumb_set SysTick_Handler,Default_Handler + + .weak WWDT_IRQHandler + .thumb_set WWDT_IRQHandler,Default_Handler + + .weak SVD_IRQHandler + .thumb_set SVD_IRQHandler,Default_Handler + + .weak RTC_IRQHandler + .thumb_set RTC_IRQHandler,Default_Handler + + .weak FLASH_IRQHandler + .thumb_set FLASH_IRQHandler,Default_Handler + + .weak FDET_IRQHandler + .thumb_set FDET_IRQHandler,Default_Handler + + .weak ADC_IRQHandler + .thumb_set ADC_IRQHandler,Default_Handler + + .weak DAC_IRQHandler + .thumb_set DAC_IRQHandler,Default_Handler + + .weak SPI0_IRQHandler + .thumb_set SPI0_IRQHandler,Default_Handler + + .weak SPI1_IRQHandler + .thumb_set SPI1_IRQHandler,Default_Handler + + .weak SPI2_IRQHandler + .thumb_set SPI2_IRQHandler,Default_Handler + + .weak UART0_IRQHandler + .thumb_set UART0_IRQHandler,Default_Handler + + .weak UART1_IRQHandler + .thumb_set UART1_IRQHandler,Default_Handler + + .weak UART3_IRQHandler + .thumb_set UART3_IRQHandler,Default_Handler + + .weak UART4_IRQHandler + .thumb_set UART4_IRQHandler,Default_Handler + + .weak UART5_IRQHandler + .thumb_set UART5_IRQHandler,Default_Handler + + .weak U7816_IRQHandler + .thumb_set U7816_IRQHandler,Default_Handler + + .weak LPUARTx_IRQHandler + .thumb_set LPUARTx_IRQHandler,Default_Handler + + .weak I2C_IRQHandler + .thumb_set I2C_IRQHandler,Default_Handler + + .weak CCL_IRQHandler + .thumb_set CCL_IRQHandler,Default_Handler + + .weak AES_IRQHandler + .thumb_set AES_IRQHandler,Default_Handler + + .weak LPTIM_IRQHandler + .thumb_set LPTIM_IRQHandler,Default_Handler + + .weak DMA_IRQHandler + .thumb_set DMA_IRQHandler,Default_Handler + + .weak WKUPx_IRQHandler + .thumb_set WKUPx_IRQHandler,Default_Handler + + .weak LUT_IRQHandler + .thumb_set LUT_IRQHandler,Default_Handler + + .weak BSTIM_IRQHandler + .thumb_set BSTIM_IRQHandler,Default_Handler + + .weak COMPx_IRQHandler + .thumb_set COMPx_IRQHandler,Default_Handler + + .weak GPTIM0_1_IRQHandler + .thumb_set GPTIM0_1_IRQHandler,Default_Handler + + .weak GPTIM2_IRQHandler + .thumb_set GPTIM2_IRQHandler,Default_Handler + + .weak ATIM_IRQHandler + .thumb_set ATIM_IRQHandler,Default_Handler + + .weak VREF_IRQHandler + .thumb_set VREF_IRQHandler,Default_Handler + + .weak GPIO_IRQHandler + .thumb_set GPIO_IRQHandler,Default_Handler + + .weak CAN_IRQHandler + .thumb_set CAN_IRQHandler,Default_Handler + diff --git a/code_app_out/Source/sdk/Drivers/CMSIS/Device/FM/FM33xx/Source/Templates/iar/linker/FM33LG04x.icf b/code_app_out/Source/sdk/Drivers/CMSIS/Device/FM/FM33xx/Source/Templates/iar/linker/FM33LG04x.icf new file mode 100644 index 0000000..4033063 --- /dev/null +++ b/code_app_out/Source/sdk/Drivers/CMSIS/Device/FM/FM33xx/Source/Templates/iar/linker/FM33LG04x.icf @@ -0,0 +1,227 @@ +/* +** ################################################################### +** Processor: +** Compiler: IAR ANSI C/C++ Compiler for ARM +** +** Abstract: +** Linker file for the IAR ANSI C/C++ Compiler for ARM +** +** Copyright 2018 NXP +** All rights reserved. +** +** THIS SOFTWARE IS PROVIDED BY NXP "AS IS" AND ANY EXPRESSED OR +** IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES +** OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. +** IN NO EVENT SHALL NXP OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, +** INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR +** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) +** HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, +** STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING +** IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF +** THE POSSIBILITY OF SUCH DAMAGE. +** +** http: www.freescale.com +** mail: support@freescale.com +** +** ################################################################### +*/ + +/* If symbol __flash_vector_table__=1 is defined at link time + * the interrupt vector will not be copied to RAM. + * Warning: Using the interrupt vector from FLASH will not allow + * INT_SYS_InstallHandler because the section is Read Only. + */ +define symbol __ram_vector_table_size__ = isdefinedsymbol(__flash_vector_table__) ? 0 : 0x000000C0; +define symbol __ram_vector_table_offset__ = isdefinedsymbol(__flash_vector_table__) ? 0 : 0x000000BF; + +/* Flash */ +define symbol m_interrupts_start = 0x00008100; +define symbol m_interrupts_end = 0x000081BF; + +/*define symbol m_flash_config_start = 0x00008500; +define symbol m_flash_config_end = 0x0000850F;*/ + +define symbol m_text_start = 0x000081C0; +define symbol m_text_end = 0x0001BBCB; //0x0001ABBF 0x0001ABCB + +/* +define symbol m_text_start1 = 0x0001ABC0; +define symbol m_text_end1 = 0x0001ABC7; // for code asil + +define symbol m_text_start2 = 0x0001ABC8; // for rom data asil +define symbol m_text_end2 = 0x0001ABCB; // +*/ + +define symbol m_text_start3 = 0x0001BBCC; // for uds data APP_CALIBRATION_START_ADDR +define symbol m_text_end3 = 0x0001BFCB; // + +define symbol m_text_start5 = 0x0001BFCC; // for app res MEMORY_MAP_ROM_APP_RES +define symbol m_text_end5 = 0x0001BFCF; // + +define symbol m_text_start6 = 0x00008000; // for app valid start MEMORY_MAP_ROM_APP_VALID +define symbol m_text_end6 = 0x000080FF; // + +define symbol m_text_start7 = 0x0001BFF0; // for app valid end IN BOOT +define symbol m_text_end7 = 0x0001BFFF; // + + +/* SRAM_U */ +define symbol m_interrupts_ram_start = 0x20000000; +define symbol m_interrupts_ram_end = 0x20000000 + __ram_vector_table_offset__; + +define symbol m_data_start = m_interrupts_ram_start + __ram_vector_table_size__; +define symbol m_data_end = 0x200037FF; //3000-37ff is stack , 2fff-2ff0 is check stack + +define symbol m_data_2_start = 0x20003800; //for asil ram +define symbol m_data_2_end = 0x20005FFF; + +define symbol m_data_3_start = 0x20006000; //for eeprom +define symbol m_data_3_end = 0x20006FFF; + +/* --delete for boot +define symbol m_data_3_start = 0x20007000; //for flash driver +define symbol m_data_3_end = 0x200077FF; */ + +define symbol m_data_4_start = 0x20007800; //for wdog +define symbol m_data_4_end = 0x20007BFF; + +define symbol m_data_5_start = 0x20007C00; //for no init +define symbol m_data_5_end = 0x20007DFF; + +define symbol m_data_6_start = 0x20007FC0; //for PROGRAM FLAG +define symbol m_data_6_end = 0x20007FCF; + +/* --delete +define symbol m_data_6_start = 0x20007FD0; //for signature +define symbol m_data_6_end = 0x20007FEF; */ + +/* Sizes */ +if (isdefinedsymbol(__stack_size__)) { + define symbol __size_cstack__ = __stack_size__; +} else { + define symbol __size_cstack__ = 0x00000800; +} + +if (isdefinedsymbol(__heap_size__)) { + define symbol __size_heap__ = __heap_size__; +} else { + define symbol __size_heap__ = 0x00000200; +} + +define exported symbol __VECTOR_TABLE = m_interrupts_start; +define exported symbol __VECTOR_RAM = isdefinedsymbol(__flash_vector_table__) ? m_interrupts_start : m_interrupts_ram_start; +define exported symbol __RAM_VECTOR_TABLE_SIZE = __ram_vector_table_size__; + +define exported symbol __RAM_START = m_interrupts_ram_start; +define exported symbol __RAM_END = m_data_2_end; + +define memory mem with size = 4G; +/*define region m_flash_config_region = mem:[from m_flash_config_start to m_flash_config_end];*/ +define region TEXT_region = mem:[from m_interrupts_start to m_interrupts_end] + | mem:[from m_text_start to m_text_end]; +/*define region TEXT_region1 = mem:[from m_text_start1 to m_text_end1]; +define region TEXT_region2 = mem:[from m_text_start2 to m_text_end2];*/ +define region TEXT_region3 = mem:[from m_text_start3 to m_text_end3]; +define region TEXT_region5 = mem:[from m_text_start5 to m_text_end5]; +define region TEXT_region6 = mem:[from m_text_start6 to m_text_end6]; +define region TEXT_region7 = mem:[from m_text_start7 to m_text_end7]; +define region DATA_region = mem:[from m_data_start to m_data_end-__size_cstack__]; +define region DATA_region_2 = mem:[from m_data_2_start to m_data_2_end]; +define region DATA_region_3 = mem:[from m_data_3_start to m_data_3_end]; +define region DATA_region_4 = mem:[from m_data_4_start to m_data_4_end]; +define region DATA_region_5 = mem:[from m_data_5_start to m_data_5_end]; +define region DATA_region_6 = mem:[from m_data_6_start to m_data_6_end]; +define region CSTACK_region = mem:[from m_data_end-__size_cstack__+1 to m_data_end]; +define region CSTACK_region_check = mem:[from m_data_end-__size_cstack__+1-16 to m_data_end-__size_cstack__]; +define region m_interrupts_ram_region = mem:[from m_interrupts_ram_start to m_interrupts_ram_end]; + + +define block CSTACK with alignment = 8, size = __size_cstack__ { }; +define block HEAP with alignment = 8, size = __size_heap__ { }; +define block RW { readwrite }; +define block ZI { zi }; + +/* Custom Section Block that can be used to place data at absolute address. */ +/* Use __attribute__((section (".customSection"))) to place data here. */ +/* Use this section only when MTB (Micro Trace Buffer) is not used, because MTB uses the same RAM area, as described in S32K Reference Manual. */ + +define block stack_check_Block { section .STACK_CHECK_ADDR }; + +define block __CODE_ROM { section .textrw_init }; +define block __CODE_RAM { section .textrw }; + +/* +define block m0_scst_test_code with alignment = 4 { section .m0_scst_test_code}; +define block m0_scst_exception_wrappers with alignment = 4 { section .m0_scst_exception_wrappers}; +define block m0_scst_test_code_unprivileged with alignment = 4 { section .m0_scst_test_code_unprivileged}; +define block m0_scst_test_shell_code with alignment = 4 { section .m0_scst_test_shell_code}; +define block m0_scst_vector_table with alignment = 4 { section .m0_scst_vector_table}; +define block m0_scst_rom_data with alignment = 4 { section .m0_scst_rom_data}; +define block m0_scst_test_code1_unprivileged with alignment = 4 { section .m0_scst_test_code1_unprivileged}; + +define block m0_scst_ram_data with alignment = 4 { section .m0_scst_ram_data}; +define block m0_scst_ram_data_target0 with alignment = 4 { section .m0_scst_ram_data_target0}; +define block m0_scst_ram_data_target1 with alignment = 4 { section .m0_scst_ram_data_target1}; +define block m0_scst_ram_test_code with alignment = 4 { section .m0_scst_ram_test_code}; +define block m0_scst_test_shell_data with alignment = 4 { section .m0_scst_test_shell_data}; +*/ +initialize manually { section .textrw }; +initialize manually { section .bss }; +initialize manually { section .customSection }; +initialize manually { section .RAM_FLAG_NOLINT }; +initialize manually { section .RAM_ASIL }; +initialize manually { section .STACK_CHECK_ADDR }; +initialize manually { section .data }; +initialize manually { section __DLIB_PERTHREAD }; +initialize manually { section .m0_scst_ram_data }; +initialize manually { section .m0_scst_ram_data_target0 }; +initialize manually { section .m0_scst_ram_data_target1 }; +initialize manually { section .m0_scst_ram_test_code }; +initialize manually { section .m0_scst_test_shell_data }; + +do not initialize { section .noinit, section .bss, section .data, section __DLIB_PERTHREAD, section .customSection,section .STACK_CHECK_ADDR ,section .RAM_ASIL,section .RAM_FLAG_NOLINT,section .m0_scst_ram_data,section .m0_scst_ram_data_target0 + ,section .m0_scst_ram_data_target1, section .m0_scst_ram_test_code,section .m0_scst_test_shell_data}; + + +place at address mem: m_interrupts_start { readonly section .intvec }; +/*place in m_flash_config_region { section FlashConfig };*/ +place in TEXT_region { readonly }; +place in TEXT_region { block __CODE_ROM }; +/* +place in TEXT_region1 { section .ROM_ASIL}; +place in TEXT_region1 { block m0_scst_test_code}; +place in TEXT_region1 { block m0_scst_exception_wrappers}; +place in TEXT_region1 { block m0_scst_test_code_unprivileged}; +place in TEXT_region1 { block m0_scst_test_shell_code}; +place in TEXT_region1 { block m0_scst_vector_table}; +place in TEXT_region1 { block m0_scst_rom_data}; +place in TEXT_region1 { block m0_scst_test_code1_unprivileged}; +place in TEXT_region2 { section .ROM_DATA_ASIL}; +*/ +place in TEXT_region3 { section .ROM_DATA_UDS}; +place in TEXT_region5 { section .ROM_APP_RES}; +place in TEXT_region6 { section .ROM_APP_VALID}; +place in TEXT_region7 { section .ROM_APP_VALID_END}; +place in DATA_region { block RW }; +place in DATA_region { block __CODE_RAM }; +/*place in DATA_region { section .RAM_L};*/ +place in DATA_region { block ZI }; +place in DATA_region { last block HEAP }; +/* +place in DATA_region_2 { block m0_scst_ram_data }; +place in DATA_region_2 { block m0_scst_ram_data_target0 }; +place in DATA_region_2 { block m0_scst_ram_data_target1 }; +place in DATA_region_2 { block m0_scst_ram_test_code }; +place in DATA_region_2 { block m0_scst_test_shell_data }; +*/ +place in DATA_region_2 { section .RAM_ASIL }; +place in DATA_region_3 { section .RAM_EEPROM }; +place in DATA_region_4 { section .RAM_WDOG }; +place in DATA_region_5 { section .RAM_FLAG_NOLINT }; +place in DATA_region_6 { section .RAM_FLAG_PROG }; +place in CSTACK_region { block CSTACK }; +place in CSTACK_region_check { block stack_check_Block}; +place in m_interrupts_ram_region { section m_interrupts_ram }; + + diff --git a/code_app_out/Source/sdk/Drivers/CMSIS/Device/FM/FM33xx/Source/Templates/iar/linker/FM33LG04x_backup.icf b/code_app_out/Source/sdk/Drivers/CMSIS/Device/FM/FM33xx/Source/Templates/iar/linker/FM33LG04x_backup.icf new file mode 100644 index 0000000..9320907 --- /dev/null +++ b/code_app_out/Source/sdk/Drivers/CMSIS/Device/FM/FM33xx/Source/Templates/iar/linker/FM33LG04x_backup.icf @@ -0,0 +1,33 @@ +/*###ICF### Section handled by ICF editor, don't touch! ****/ +/*-Editor annotation file-*/ +/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ +/*-Specials-*/ +define symbol __ICFEDIT_intvec_start__ = 0x00008100; +/*-Memory Regions-*/ +define symbol __ICFEDIT_region_ROM_start__ = 0x00000000; +define symbol __ICFEDIT_region_ROM_end__ = 0x0003FFFF; +define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; +define symbol __ICFEDIT_region_RAM_end__ = 0x20007FFF; +/*-Sizes-*/ +define symbol __ICFEDIT_size_cstack__ = 0x800; +define symbol __ICFEDIT_size_heap__ = 0x0; +/**** End of ICF editor section. ###ICF###*/ + +define memory mem with size = 4G; +define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; +define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; + +define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; +define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; + +initialize by copy { readwrite }; +do not initialize { section .noinit }; + +place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; + +place in ROM_region { readonly }; +place in RAM_region { readwrite, + block CSTACK, block HEAP }; + +export symbol __ICFEDIT_region_RAM_start__; +export symbol __ICFEDIT_region_RAM_end__; \ No newline at end of file diff --git a/code_app_out/Source/sdk/Drivers/CMSIS/Device/FM/FM33xx/Source/Templates/iar/startup_fm33lg0xx.s b/code_app_out/Source/sdk/Drivers/CMSIS/Device/FM/FM33xx/Source/Templates/iar/startup_fm33lg0xx.s new file mode 100644 index 0000000..3964a68 --- /dev/null +++ b/code_app_out/Source/sdk/Drivers/CMSIS/Device/FM/FM33xx/Source/Templates/iar/startup_fm33lg0xx.s @@ -0,0 +1,352 @@ + + MODULE ?cstartup + + ;; Forward declaration of sections. + SECTION CSTACK:DATA:NOROOT(3) + + SECTION .intvec:CODE:NOROOT(2) + + EXTERN init_data_bss + EXTERN main + EXTERN __iar_program_start + EXTERN SystemInit + PUBLIC __vector_table + PUBLIC __Vectors + PUBLIC __Vectors_End + PUBLIC __Vectors_Size + + DATA + +__vector_table + DCD sfe(CSTACK) + DCD Reset_Handler ; Reset Handler + DCD NMI_Handler ; NMI Handler + DCD HardFault_Handler ; Hard Fault Handler + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD SVC_Handler ; SVCall Handler + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD PendSV_Handler ; PendSV Handler + DCD SysTick_Handler ; SysTick Handler + + ; External Interrupts + DCD WDT_IRQHandler ; 0: WWDT + DCD SVD_IRQHandler ; 1: SVD + DCD RTC_IRQHandler ; 2: RTC + DCD FLASH_IRQHandler ; 3: FLASH + DCD FDET_IRQHandler ; 4: LFDET + DCD ADC_IRQHandler ; 5: ADC + DCD DAC_IRQHandler ; 6: DAC + DCD SPI0_IRQHandler ; 7: SPI0 + DCD SPI1_IRQHandler ; 8: SPI1 + DCD SPI2_IRQHandler ; 9: SPI2 + DCD UART0_IRQHandler ; 10: UART0 + DCD UART1_IRQHandler ; 11: UART1 + DCD UART3_IRQHandler ; 12: UART3 + DCD UART4_IRQHandler ; 13: UART4 + DCD UART5_IRQHandler ; 14: UART5 + DCD U7816_IRQHandler ; 15: U7816 + DCD LPUARTx_IRQHandler ; 16: LPUART + DCD I2C_IRQHandler ; 17: I2C + DCD CCL_IRQHandler ; 18: CCL + DCD AES_IRQHandler ; 19: AES + DCD LPTIM_IRQHandler ; 20: LPTIM + DCD DMA_IRQHandler ; 21: DMA + DCD WKUPx_IRQHandler ; 22: WKUP + DCD LUT_IRQHandler ; 23: LUT + DCD BSTIM_IRQHandler ; 24: BSTIM + DCD COMPx_IRQHandler ; 25: COMPx + DCD GPTIM0_1_IRQHandler ; 26: GPTIM0_1 + DCD GPTIM2_IRQHandler ; 27: GPTIM2 + DCD ATIM_IRQHandler ; 28: ATIM + DCD VREF_IRQHandler ; 29: VREF + DCD GPIO_IRQHandler ; 30: GPIO + DCD CAN_IRQHandler ; 31: CAN +__Vectors_End + +__Vectors EQU __vector_table +__Vectors_Size EQU __Vectors_End - __Vectors +;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; +;; +;; Default interrupt handlers. +;; + THUMB + + PUBWEAK Reset_Handler + SECTION .text:CODE:REORDER:NOROOT(2) +Reset_Handler + CPSID I ; Mask interrupts + ;; Init the rest of the registers + LDR R1,=0 + LDR R2,=0 + LDR R3,=0 + LDR R4,=0 + LDR R5,=0 + LDR R6,=0 + LDR R7,=0 + MOV R8,R7 + MOV R9,R7 + MOV R10,R7 + MOV R11,R7 + MOV R12,R7 +#ifdef START_FROM_FLASH + IMPORT __RAM_START, __RAM_END + ;; INIT ECC RAM + + LDR R1, =__RAM_START + LDR R2, =__RAM_END + + SUBS R2, R2, R1 + SUBS R2, #1 + BLE .LC5 + + MOVS R0, #0 + MOVS R3, #4 + .LC4: + STR R0, [R1] + ADD R1, R1, R3 + SUBS R2, #4 + BGE .LC4 + .LC5: +#endif +;; Initialize the stack pointer + LDR R0, =sfe(CSTACK) + MOV R13,R0 + +#ifndef __NO_SYSTEM_INIT + ;; Call the CMSIS system init routine + LDR R0, =SystemInit + BLX R0 +#endif + + ;; Init .data and .bss sections + LDR R0, =init_data_bss + BLX R0 + ;CPSIE I ; Unmask interrupts + + BL main ;main __iar_program_start + + PUBWEAK NMI_Handler + SECTION .text:CODE:REORDER:NOROOT(1) +NMI_Handler + B NMI_Handler + + + PUBWEAK HardFault_Handler + SECTION .text:CODE:NOROOT:REORDER(1) +HardFault_Handler + B HardFault_Handler + + + PUBWEAK SVC_Handler + SECTION .text:CODE:NOROOT:REORDER(1) +SVC_Handler + B SVC_Handler + + + PUBWEAK PendSV_Handler + SECTION .text:CODE:NOROOT:REORDER(1) +PendSV_Handler + B PendSV_Handler + + + PUBWEAK SysTick_Handler + SECTION .text:CODE:NOROOT:REORDER(1) +SysTick_Handler + B SysTick_Handler + + + PUBWEAK WDT_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +WDT_IRQHandler + B WDT_IRQHandler + + + PUBWEAK SVD_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +SVD_IRQHandler + B SVD_IRQHandler + + + PUBWEAK RTC_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +RTC_IRQHandler + B RTC_IRQHandler + + + PUBWEAK FLASH_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +FLASH_IRQHandler + B FLASH_IRQHandler + + + PUBWEAK FDET_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +FDET_IRQHandler + B FDET_IRQHandler + + + PUBWEAK ADC_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +ADC_IRQHandler + B ADC_IRQHandler + + PUBWEAK DAC_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +DAC_IRQHandler + B DAC_IRQHandler + + + PUBWEAK SPI0_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +SPI0_IRQHandler + B SPI0_IRQHandler + + + PUBWEAK SPI1_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +SPI1_IRQHandler + B SPI1_IRQHandler + + + PUBWEAK SPI2_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +SPI2_IRQHandler + B SPI2_IRQHandler + + + PUBWEAK UART0_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +UART0_IRQHandler + B UART0_IRQHandler + + + PUBWEAK UART1_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +UART1_IRQHandler + B UART1_IRQHandler + + + PUBWEAK UART3_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +UART3_IRQHandler + B UART3_IRQHandler + + + PUBWEAK UART4_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +UART4_IRQHandler + B UART4_IRQHandler + + + PUBWEAK UART5_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +UART5_IRQHandler + B UART5_IRQHandler + + + PUBWEAK U7816_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +U7816_IRQHandler + B U7816_IRQHandler + + + PUBWEAK LPUARTx_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +LPUARTx_IRQHandler + B LPUARTx_IRQHandler + + + PUBWEAK I2C_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +I2C_IRQHandler + B I2C_IRQHandler + + PUBWEAK CCL_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +CCL_IRQHandler + B CCL_IRQHandler + + + PUBWEAK AES_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +AES_IRQHandler + B AES_IRQHandler + + + PUBWEAK LPTIM_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +LPTIM_IRQHandler + B LPTIM_IRQHandler + + + PUBWEAK DMA_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +DMA_IRQHandler + B DMA_IRQHandler + + + PUBWEAK WKUPx_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +WKUPx_IRQHandler + B WKUPx_IRQHandler + + PUBWEAK LUT_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +LUT_IRQHandler + B LUT_IRQHandler + + + PUBWEAK BSTIM_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +BSTIM_IRQHandler + B BSTIM_IRQHandler + + + PUBWEAK COMPx_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +COMPx_IRQHandler + B COMPx_IRQHandler + + + PUBWEAK GPTIM0_1_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +GPTIM0_1_IRQHandler + B GPTIM0_1_IRQHandler + + + PUBWEAK GPTIM2_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +GPTIM2_IRQHandler + B GPTIM2_IRQHandler + + + PUBWEAK ATIM_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +ATIM_IRQHandler + B ATIM_IRQHandler + + + PUBWEAK VREF_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +VREF_IRQHandler + B VREF_IRQHandler + + + PUBWEAK GPIO_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +GPIO_IRQHandler + B GPIO_IRQHandler + + + PUBWEAK CAN_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +CAN_IRQHandler + B CAN_IRQHandler + END \ No newline at end of file diff --git a/code_app_out/Source/sdk/Drivers/CMSIS/Device/FM/FM33xx/Source/Templates/iar/startup_fm33lg0xx_backup.s b/code_app_out/Source/sdk/Drivers/CMSIS/Device/FM/FM33xx/Source/Templates/iar/startup_fm33lg0xx_backup.s new file mode 100644 index 0000000..4004ec6 --- /dev/null +++ b/code_app_out/Source/sdk/Drivers/CMSIS/Device/FM/FM33xx/Source/Templates/iar/startup_fm33lg0xx_backup.s @@ -0,0 +1,299 @@ + + MODULE ?cstartup + + ;; Forward declaration of sections. + SECTION CSTACK:DATA:NOROOT(3) + + SECTION .intvec:CODE:NOROOT(2) + + EXTERN __iar_program_start + PUBLIC __vector_table + + DATA + +__vector_table + DCD sfe(CSTACK) + DCD Reset_Handler ; Reset Handler + DCD NMI_Handler ; NMI Handler + DCD HardFault_Handler ; Hard Fault Handler + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD SVC_Handler ; SVCall Handler + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD PendSV_Handler ; PendSV Handler + DCD SysTick_Handler ; SysTick Handler + + ; External Interrupts + DCD WDT_IRQHandler ; 0: WWDT + DCD SVD_IRQHandler ; 1: SVD + DCD RTC_IRQHandler ; 2: RTC + DCD FLASH_IRQHandler ; 3: FLASH + DCD FDET_IRQHandler ; 4: LFDET + DCD ADC_IRQHandler ; 5: ADC + DCD DAC_IRQHandler ; 6: DAC + DCD SPI0_IRQHandler ; 7: SPI0 + DCD SPI1_IRQHandler ; 8: SPI1 + DCD SPI2_IRQHandler ; 9: SPI2 + DCD UART0_IRQHandler ; 10: UART0 + DCD UART1_IRQHandler ; 11: UART1 + DCD UART3_IRQHandler ; 12: UART3 + DCD UART4_IRQHandler ; 13: UART4 + DCD UART5_IRQHandler ; 14: UART5 + DCD U7816_IRQHandler ; 15: U7816 + DCD LPUARTx_IRQHandler ; 16: LPUART + DCD I2C_IRQHandler ; 17: I2C + DCD CCL_IRQHandler ; 18: CCL + DCD AES_IRQHandler ; 19: AES + DCD LPTIM_IRQHandler ; 20: LPTIM + DCD DMA_IRQHandler ; 21: DMA + DCD WKUPx_IRQHandler ; 22: WKUP + DCD LUT_IRQHandler ; 23: LUT + DCD BSTIM_IRQHandler ; 24: BSTIM + DCD COMPx_IRQHandler ; 25: COMPx + DCD GPTIM0_1_IRQHandler ; 26: GPTIM0_1 + DCD GPTIM2_IRQHandler ; 27: GPTIM2 + DCD ATIM_IRQHandler ; 28: ATIM + DCD VREF_IRQHandler ; 29: VREF + DCD GPIO_IRQHandler ; 30: GPIO + DCD CAN_IRQHandler ; 31: CAN +__Vectors_End + +;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; +;; +;; Default interrupt handlers. +;; + THUMB + + PUBWEAK Reset_Handler + SECTION .text:CODE:NOROOT:REORDER(2) +Reset_Handler + IMPORT SystemInit + LDR R0, =SystemInit + BLX R0 + LDR R0, =__iar_program_start + BX R0 + + PUBWEAK NMI_Handler + SECTION .text:CODE:NOROOT:REORDER(1) +NMI_Handler + B NMI_Handler + + + PUBWEAK HardFault_Handler + SECTION .text:CODE:NOROOT:REORDER(1) +HardFault_Handler + B HardFault_Handler + + + PUBWEAK SVC_Handler + SECTION .text:CODE:NOROOT:REORDER(1) +SVC_Handler + B SVC_Handler + + + PUBWEAK PendSV_Handler + SECTION .text:CODE:NOROOT:REORDER(1) +PendSV_Handler + B PendSV_Handler + + + PUBWEAK SysTick_Handler + SECTION .text:CODE:NOROOT:REORDER(1) +SysTick_Handler + B SysTick_Handler + + + PUBWEAK WDT_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +WDT_IRQHandler + B WDT_IRQHandler + + + PUBWEAK SVD_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +SVD_IRQHandler + B SVD_IRQHandler + + + PUBWEAK RTC_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +RTC_IRQHandler + B RTC_IRQHandler + + + PUBWEAK FLASH_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +FLASH_IRQHandler + B FLASH_IRQHandler + + + PUBWEAK FDET_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +FDET_IRQHandler + B FDET_IRQHandler + + + PUBWEAK ADC_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +ADC_IRQHandler + B ADC_IRQHandler + + PUBWEAK DAC_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +DAC_IRQHandler + B DAC_IRQHandler + + + PUBWEAK SPI0_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +SPI0_IRQHandler + B SPI0_IRQHandler + + + PUBWEAK SPI1_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +SPI1_IRQHandler + B SPI1_IRQHandler + + + PUBWEAK SPI2_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +SPI2_IRQHandler + B SPI2_IRQHandler + + + PUBWEAK UART0_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +UART0_IRQHandler + B UART0_IRQHandler + + + PUBWEAK UART1_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +UART1_IRQHandler + B UART1_IRQHandler + + + PUBWEAK UART3_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +UART3_IRQHandler + B UART3_IRQHandler + + + PUBWEAK UART4_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +UART4_IRQHandler + B UART4_IRQHandler + + + PUBWEAK UART5_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +UART5_IRQHandler + B UART5_IRQHandler + + + PUBWEAK U7816_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +U7816_IRQHandler + B U7816_IRQHandler + + + PUBWEAK LPUARTx_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +LPUARTx_IRQHandler + B LPUARTx_IRQHandler + + + PUBWEAK I2C_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +I2C_IRQHandler + B I2C_IRQHandler + + PUBWEAK CCL_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +CCL_IRQHandler + B CCL_IRQHandler + + + PUBWEAK AES_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +AES_IRQHandler + B AES_IRQHandler + + + PUBWEAK LPTIM_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +LPTIM_IRQHandler + B LPTIM_IRQHandler + + + PUBWEAK DMA_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +DMA_IRQHandler + B DMA_IRQHandler + + + PUBWEAK WKUPx_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +WKUPx_IRQHandler + B WKUPx_IRQHandler + + PUBWEAK LUT_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +LUT_IRQHandler + B LUT_IRQHandler + + + PUBWEAK BSTIM_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +BSTIM_IRQHandler + B BSTIM_IRQHandler + + + PUBWEAK COMPx_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +COMPx_IRQHandler + B COMPx_IRQHandler + + + PUBWEAK GPTIM0_1_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +GPTIM0_1_IRQHandler + B GPTIM0_1_IRQHandler + + + PUBWEAK GPTIM2_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +GPTIM2_IRQHandler + B GPTIM2_IRQHandler + + + PUBWEAK ATIM_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +ATIM_IRQHandler + B ATIM_IRQHandler + + + PUBWEAK VREF_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +VREF_IRQHandler + B VREF_IRQHandler + + + PUBWEAK GPIO_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +GPIO_IRQHandler + B GPIO_IRQHandler + + + PUBWEAK CAN_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +CAN_IRQHandler + B CAN_IRQHandler + END \ No newline at end of file diff --git a/code_app_out/Source/sdk/Drivers/CMSIS/Device/FM/FM33xx/Source/Templates/startup.c b/code_app_out/Source/sdk/Drivers/CMSIS/Device/FM/FM33xx/Source/Templates/startup.c new file mode 100644 index 0000000..9496d75 --- /dev/null +++ b/code_app_out/Source/sdk/Drivers/CMSIS/Device/FM/FM33xx/Source/Templates/startup.c @@ -0,0 +1,314 @@ +/* + * Copyright (c) 2013 - 2014, Freescale Semiconductor, Inc. + * Copyright 2016-2018 NXP + * All rights reserved. + * + * THIS SOFTWARE IS PROVIDED BY NXP "AS IS" AND ANY EXPRESSED OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL NXP OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF + * THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * @page misra_violations MISRA-C:2012 violations + * + * @section [global] + * Violates MISRA 2012 Advisory Rule 8.9, An object should be defined at block + * scope if its identifier only appears in a single function. + * All variables with this problem are defined in the linker files. + * + * @section [global] + * Violates MISRA 2012 Advisory Rule 8.11, When an array with external linkage + * is declared, its size should be explicitly specified. + * The size of the arrays can not be explicitly determined. + * + * @section [global] + * Violates MISRA 2012 Advisory Rule 11.4, A conversion should not be performed + * between a pointer to object and an integer type. + * The cast is required to initialize a pointer with an unsigned int define, + * representing an address. + * + * @section [global] + * Violates MISRA 2012 Required Rule 11.6, A cast shall not be performed + * between pointer to void and an arithmetic type. + * The cast is required to initialize a pointer with an unsigned int define, + * representing an address. + * + * @section [global] + * Violates MISRA 2012 Required Rule 2.1, A project shall not contain unreachable + * code. + * The condition compares two address defined in linker files that can be different. + * + * @section [global] + * Violates MISRA 2012 Advisory Rule 8.7, External could be made static. + * Function is defined for usage by application code. + * + * @section [global] + * Violates MISRA 2012 Mandatory Rule 17.3, Symbol 'MFSPR' undeclared, assumed + * to return int. + * This is an e200 Power Architecture Assembly instruction used to retrieve + * the core number. + * + */ + +#include "startup.h" +#include +#include "Cpu.h" +#include "core_cm0plus.h" + +#define GET_CORE_ID() 0U +#define NUMBER_OF_CORES (1u) +#define FEATURE_INTERRUPT_INT_VECTORS {&SCB->VTOR} + +/******************************************************************************* + * Static Variables + ******************************************************************************/ +static volatile uint32_t * const s_vectors[NUMBER_OF_CORES] = FEATURE_INTERRUPT_INT_VECTORS; + +/******************************************************************************* + * Code + ******************************************************************************/ + +/*FUNCTION********************************************************************** + * + * Function Name : init_data_bss + * Description : Make necessary initializations for RAM. + * - Copy the vector table from ROM to RAM. + * - Copy initialized data from ROM to RAM. + * - Copy code that should reside in RAM from ROM + * - Clear the zero-initialized data section. + * + * Tool Chains: + * __GNUC__ : GNU Compiler Collection + * __ghs__ : Green Hills ARM Compiler + * __ICCARM__ : IAR ARM Compiler + * __DCC__ : Wind River Diab Compiler + * __ARMCC_VERSION : ARMC Compiler + * + * Implements : init_data_bss_Activity + *END**************************************************************************/ +void init_data_bss(void) +{ + #if 1 + uint32_t n; + uint8_t coreId; +/* For ARMC we are using the library method of initializing DATA, Custom Section and + * Code RAM sections so the below variables are not needed */ +#if !defined(__ARMCC_VERSION) + /* Declare pointers for various data sections. These pointers + * are initialized using values pulled in from the linker file */ + uint8_t * data_ram; + uint8_t * code_ram; + uint8_t * bss_start; + uint8_t * custom_ram; + uint8_t * stack_check_ram; + uint8_t * code_asil_ram; + const uint8_t * data_rom, * data_rom_end; + const uint8_t * code_rom, * code_rom_end; + const uint8_t * bss_end; + const uint8_t * custom_rom, * custom_rom_end; + const uint8_t * code_asil_rom, * stack_check_rom_end; + const uint8_t * stack_check_rom, * code_asil_rom_end; +#endif + /* Addresses for VECTOR_TABLE and VECTOR_RAM come from the linker file */ + +#if defined(__ARMCC_VERSION) + extern uint32_t __RAM_VECTOR_TABLE_SIZE; + extern uint32_t __VECTOR_ROM; + extern uint32_t __VECTOR_RAM; +#else + extern uint32_t __RAM_VECTOR_TABLE_SIZE[]; + extern uint32_t __VECTOR_TABLE[]; + extern uint32_t __VECTOR_RAM[]; +#endif + /* Get section information from linker files */ +#if defined(__ICCARM__) + /* Data */ + data_ram = __section_begin(".data"); + data_rom = __section_begin(".data_init"); + data_rom_end = __section_end(".data_init"); + + /* CODE RAM */ + #pragma section = "__CODE_ROM" + #pragma section = "__CODE_RAM" + code_ram = __section_begin("__CODE_RAM"); + code_rom = __section_begin("__CODE_ROM"); + code_rom_end = __section_end("__CODE_ROM"); + + /* BSS */ + bss_start = __section_begin(".bss"); + bss_end = __section_end(".bss"); + + //custom_ram = __section_begin(".customSection"); + //custom_rom = __section_begin(".customSection_init"); + //custom_rom_end = __section_end(".customSection_init"); + #if 0 //暂时关闭 + /*分离出来的ASIL 相关的ram变量--这里先是data region2相关*/ + #pragma section = ".RAM_ASIL" + #pragma section = ".RAM_ASIL_init" + code_asil_ram = __section_begin(".RAM_ASIL"); + code_asil_rom = __section_begin(".RAM_ASIL_init"); + code_asil_rom_end = __section_end(".RAM_ASIL_init"); + #endif + + /*分离出来的ASIL 相关的ram变量--这里先是stack check相关*/ + #pragma section = ".STACK_CHECK_ADDR" + #pragma section = ".STACK_CHECK_ADDR_init" + stack_check_ram = __section_begin(".STACK_CHECK_ADDR"); + stack_check_rom = __section_begin(".STACK_CHECK_ADDR_init"); + stack_check_rom_end = __section_end(".STACK_CHECK_ADDR_init"); + +#elif defined (__ARMCC_VERSION) + /* VECTOR TABLE*/ + uint8_t * vector_table_size = (uint8_t *)__RAM_VECTOR_TABLE_SIZE; + uint32_t * vector_rom = (uint32_t *)__VECTOR_ROM; + uint32_t * vector_ram = (uint32_t *)__VECTOR_RAM; +#else + extern uint32_t __DATA_ROM[]; + extern uint32_t __DATA_RAM[]; + extern uint32_t __DATA_END[]; + + extern uint32_t __CODE_RAM[]; + extern uint32_t __CODE_ROM[]; + extern uint32_t __CODE_END[]; + + extern uint32_t __BSS_START[]; + extern uint32_t __BSS_END[]; + + extern uint32_t __CUSTOM_ROM[]; + extern uint32_t __CUSTOM_END[]; + + extern uint32_t __DATA2_ROM[]; + extern uint32_t __DATA2_ROM_END[]; + + extern uint32_t __STACK_CHECK_ROM[]; + extern uint32_t __STACK_CHECK_ROM_END[]; + + /* Data */ + data_ram = (uint8_t *)__DATA_RAM; + data_rom = (uint8_t *)__DATA_ROM; + data_rom_end = (uint8_t *)__DATA_END; + /* CODE RAM */ + code_ram = (uint8_t *)__CODE_RAM; + code_rom = (uint8_t *)__CODE_ROM; + code_rom_end = (uint8_t *)__CODE_END; + /* BSS */ + bss_start = (uint8_t *)__BSS_START; + bss_end = (uint8_t *)__BSS_END; + + /* Custom section */ + //custom_ram = CUSTOMSECTION_SECTION_START; + //custom_rom = (uint8_t *)__CUSTOM_ROM; + //custom_rom_end = (uint8_t *)__CUSTOM_END; + + /*分离出来的ASIL 相关的ram变量--这里先是data region2相关*/ + code_asil_ram = DATA2_ADDR_START; + code_asil_rom = (uint8_t *)__DATA2_ROM; + code_asil_rom_end = (uint8_t *)__DATA2_ROM_END; + + /*分离出来的ASIL 相关的ram变量--这里先是stack check相关*/ + stack_check_ram = STACK_CHECK_ADDR_START; + stack_check_rom = (uint8_t *)__STACK_CHECK_ROM; + stack_check_rom_end = (uint8_t *)__STACK_CHECK_ROM_END; + +#endif + +#if !defined(__ARMCC_VERSION) + /* Copy initialized data from ROM to RAM */ + while (data_rom_end != data_rom) + { + *data_ram = *data_rom; + data_ram++; + data_rom++; + } + + /* Copy functions from ROM to RAM */ + while (code_rom_end != code_rom) + { + *code_ram = *code_rom; + code_ram++; + code_rom++; + } + + /* Clear the zero-initialized data section */ + while(bss_end != bss_start) + { + *bss_start = 0; + bss_start++; + } + #if 0 + /* Copy customsection rom to ram */ + while(custom_rom_end != custom_rom) + { + *custom_ram = *custom_rom; + custom_rom++; + custom_ram++; + } + #endif + #if 0 //暂时关闭 + /* Copy ASIL rom to ram */ + while(code_asil_rom_end != code_asil_rom) + { + *code_asil_ram = *code_asil_rom; + code_asil_rom++; + code_asil_ram++; + } + #endif + + #if 1 + /* Copy stack rom to ram */ + while(stack_check_rom_end != stack_check_rom) + { + *stack_check_ram = *stack_check_rom; + stack_check_rom++; + stack_check_ram++; + } + #endif + +#endif + +#if 0 + coreId = (uint8_t)GET_CORE_ID(); +#if defined (__ARMCC_VERSION) + /* Copy the vector table from ROM to RAM */ + /* Workaround */ + for (n = 0; n < (((uint32_t)(vector_table_size))/sizeof(uint32_t)); n++) + { + vector_ram[n] = vector_rom[n]; + } + /* Point the VTOR to the position of vector table */ + *s_vectors[coreId] = (uint32_t) __VECTOR_RAM; +#else + /* Check if VECTOR_TABLE copy is needed */ + if (__VECTOR_RAM != __VECTOR_TABLE) + { + /* Copy the vector table from ROM to RAM */ + for (n = 0; n < (((uint32_t)__RAM_VECTOR_TABLE_SIZE)/sizeof(uint32_t)); n++) + { + __VECTOR_RAM[n] = __VECTOR_TABLE[n]; + } + /* Point the VTOR to the position of vector table */ + *s_vectors[coreId] = (uint32_t)__VECTOR_RAM; + } + else + { + /* Point the VTOR to the position of vector table */ + *s_vectors[coreId] = (uint32_t)__VECTOR_TABLE; + } +#endif +#endif + +#endif +} + +/******************************************************************************* + * EOF + ******************************************************************************/ + diff --git a/code_app_out/Source/sdk/Drivers/CMSIS/Device/FM/FM33xx/Source/Templates/startup.h b/code_app_out/Source/sdk/Drivers/CMSIS/Device/FM/FM33xx/Source/Templates/startup.h new file mode 100644 index 0000000..9d3b9eb --- /dev/null +++ b/code_app_out/Source/sdk/Drivers/CMSIS/Device/FM/FM33xx/Source/Templates/startup.h @@ -0,0 +1,152 @@ +/* + * Copyright (c) 2013 - 2014, Freescale Semiconductor, Inc. + * Copyright 2016-2017 NXP + * All rights reserved. + * + * THIS SOFTWARE IS PROVIDED BY NXP "AS IS" AND ANY EXPRESSED OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL NXP OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF + * THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef STARTUP_H +#define STARTUP_H + +#include +//#include "device_registers.h" +/** + * @page misra_violations MISRA-C:2012 violations + * + * @section [global] + * Violates MISRA 2012 Advisory Rule 2.5, Local macro not referenced. + * The defined macro is used as include guard. + * + * @section [global] + * Violates MISRA 2012 Advisory Rule 8.9, An object should be defined at block + * scope if its identifier only appears in a single function. + * All variables with this problem are defined in the linker files. + * + */ +#if 1 +/******************************************************************************* + * API + ******************************************************************************/ + +/*! + * @brief define symbols that specific start and end addres of some basic sections. + */ +//#if (defined(S32K14x_SERIES) || defined(S32K11x_SERIES) || defined(S32V234_SERIES) || defined(MPC574x_SERIES) || defined(S32R_SERIES) || defined(S32MTV_SERIES) || defined(SJA1110_SERIES)) + #if (defined(__ICCARM__)) + #define INTERRUPTS_SECTION_START __section_begin(".intvec") + #define INTERRUPTS_SECTION_END __section_end(".intvec") + #define BSS_SECTION_START __section_begin(".bss") + #define BSS_SECTION_END __section_end(".bss") + #define DATA_SECTION_START __section_begin(".data") + #define DATA_SECTION_END __section_end(".data") + #define CUSTOMSECTION_SECTION_START __section_begin(".customSection") + #define CUSTOMSECTION_SECTION_END __section_end(".customSection") + #define CODE_RAM_SECTION_START __section_begin("__CODE_RAM") + #define CODE_RAM_SECTION_END __section_end("__CODE_RAM") + #define DATA_INIT_SECTION_START __section_begin(".data_init") + #define DATA_INIT_SECTION_END __section_end(".data_init") + #define CODE_ROM_SECTION_START __section_begin("__CODE_ROM") + #define CODE_ROM_SECTION_END __section_end("__CODE_ROM") + + #elif (defined(__ARMCC_VERSION)) + #define INTERRUPTS_SECTION_START (uint8_t *)__VECTOR_ROM_START + #define INTERRUPTS_SECTION_END (uint8_t *)__VECTOR_ROM_END + #define BSS_SECTION_START (uint8_t *)__BSS_START + #define BSS_SECTION_END (uint8_t *)__BSS_END + #define DATA_SECTION_START (uint8_t *)__DATA_RAM_START + #define DATA_SECTION_END (uint8_t *)__DATA_RAM_END + #define CUSTOMSECTION_SECTION_START (uint8_t *)__CUSTOM_SECTION_START + #define CUSTOMSECTION_SECTION_END (uint8_t *)__CUSTOM_SECTION_END + #define CODE_RAM_SECTION_START (uint8_t *)__CODE_RAM_START + #define CODE_RAM_SECTION_END (uint8_t *)__CODE_RAM_END + + extern uint32_t __VECTOR_ROM_START; + extern uint32_t __VECTOR_ROM_END; + extern uint32_t __BSS_START; + extern uint32_t __BSS_END; + extern uint32_t __DATA_RAM_START; + extern uint32_t __DATA_RAM_END; + extern uint32_t __CUSTOM_SECTION_START; + extern uint32_t __CUSTOM_SECTION_END; + extern uint32_t __CODE_RAM_START; + extern uint32_t __CODE_RAM_END; + #else + #define INTERRUPTS_SECTION_START (uint8_t *)&__interrupts_start__ + #define INTERRUPTS_SECTION_END (uint8_t *)&__interrupts_end__ + #define BSS_SECTION_START (uint8_t *)&__bss_start__ + #define BSS_SECTION_END (uint8_t *)&__bss_end__ + #define DATA_SECTION_START (uint8_t *)&__data_start__ + #define DATA_SECTION_END (uint8_t *)&__data_end__ + #define CUSTOMSECTION_SECTION_START (uint8_t *)&__customSection_start__ + #define CUSTOMSECTION_SECTION_END (uint8_t *)&__customSection_end__ + #define CODE_RAM_SECTION_START (uint8_t *)&__code_ram_start__ + #define CODE_RAM_SECTION_END (uint8_t *)&__code_ram_end__ + + #define DATA2_ADDR_START (uint8_t *)&__RAM_ASIL_Start__ + #define DATA2_ADDR_END (uint8_t *)&__RAM_ASIL_end__ + + #define STACK_CHECK_ADDR_START (uint8_t *)&__STACK_CHECK_ADDRStart + #define STACK_CHECK_ADDR_END (uint8_t *)&__STACK_CHECK_ADDR_end__ + + extern uint32_t __interrupts_start__; + extern uint32_t __interrupts_end__; + extern uint32_t __bss_start__; + extern uint32_t __bss_end__; + extern uint32_t __data_start__; + extern uint32_t __data_end__; + extern uint32_t __customSection_start__; + extern uint32_t __customSection_end__; + extern uint32_t __code_ram_start__; + extern uint32_t __code_ram_end__; + + extern uint32_t __RAM_ASIL_Start__; + extern uint32_t __RAM_ASIL_end__; + + extern uint32_t __STACK_CHECK_ADDRStart; + extern uint32_t __STACK_CHECK_ADDR_end__; + + #endif +//#endif + +#if (defined(__ICCARM__)) + #pragma section = ".data" + #pragma section = ".data_init" + #pragma section = ".bss" + #pragma section = ".intvec" + #pragma section = ".customSection" + #pragma section = ".customSection_init" + #pragma section = "__CODE_RAM" + #pragma section = "__CODE_ROM" + #pragma section = ".RAM_ASIL" + #pragma section = ".RAM_ASIL_init" + #pragma section = ".STACK_CHECK_ADDR" + #pragma section = ".STACK_CHECK_ADDR_init" + //#pragma section = ".STACK_CHECK_ADDR_init" +#endif + +/*! + * @brief Make necessary initializations for RAM. + * + * - Copy initialized data from ROM to RAM. + * - Clear the zero-initialized data section. + * - Copy the vector table from ROM to RAM. This could be an option. + */ +#endif +void init_data_bss(void); + +#endif /* STARTUP_H*/ +/******************************************************************************* + * EOF + ******************************************************************************/ + diff --git a/code_app_out/Source/sdk/Drivers/CMSIS/Device/FM/FM33xx/Source/system_fm33lg0xx.c b/code_app_out/Source/sdk/Drivers/CMSIS/Device/FM/FM33xx/Source/system_fm33lg0xx.c new file mode 100644 index 0000000..1c93a98 --- /dev/null +++ b/code_app_out/Source/sdk/Drivers/CMSIS/Device/FM/FM33xx/Source/system_fm33lg0xx.c @@ -0,0 +1,300 @@ +/**************************************************************************//** + * @file system_fm33lg0xx.c + * @brief CMSIS Cortex-M0 Device Peripheral Access Layer Source File for + * Device FM33LG0XX + * @version V2.0.0 + * @date 15. Mar 2021 + * + * @note + * + ******************************************************************************/ +/* Copyright (c) 2012 ARM LIMITED + + All rights reserved. + Redistribution and use in source and binary forms, with or without + modification, are permitted provided that the following conditions are met: + - Redistributions of source code must retain the above copyright + notice, this list of conditions and the following disclaimer. + - Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the + documentation and/or other materials provided with the distribution. + - Neither the name of ARM nor the names of its contributors may be used + to endorse or promote products derived from this software without + specific prior written permission. + * + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE + LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + POSSIBILITY OF SUCH DAMAGE. + ---------------------------------------------------------------------------*/ + +#include "system_fm33lg0xx.h" + +/* Clock Variable definitions ------------------------------------------------*/ +uint32_t XTLFClock = XTLF_DEFAULT_VALUE; /*!< External Low-freq Osc Clock Frequency (XTLF) */ +uint32_t XTHFClock = XTHF_DEFAULT_VALUE; /*!< External High-freq Osc Clock Frequency (XTHF) */ +uint32_t SystemCoreClock = HCLK_DEFAULT_VALUE; /*!< System Clock Frequency (Core Clock) */ + +/* Clock functions -----------------------------------------------------------*/ +/** + * @brief Retrieve the PLL clock frequency + * + * @retval PLL clock frequency + */ +static uint32_t SystemPLLClockUpdate(void) +{ + uint32_t clock = 0; + + /* Acquire PLL clock source */ + switch ((CMU->PLLCR >> 1) & 0x1) + { + case 0: + switch ((CMU->RCHFCR >> 16) & 0xFU) + { + case 1: /* 16MHz */ + clock = 16000000; + break; + + case 2: /* 24MHz */ + clock = 24000000; + break; + + case 3: /* 32MHz */ + clock = 32000000; + break; + + case 0: /* 8MHz */ + default: + clock = 8000000; + break; + } + break; + + case 1: + clock = XTHFClock; + break; + } + + /* Acquire PLL prescaler */ + switch ((CMU->PLLCR >> 0x4) & 0x7) + { + case 0: /* input divided by 1 */ + clock /= 1; + break; + + case 1: /* input divided by 2 */ + clock /= 2; + break; + + case 2: /* input divided by 4 */ + clock /= 4; + break; + + case 3: /* input divided by 8 */ + clock /= 8; + break; + + case 4: /* input divided by 12 */ + clock /= 12; + break; + + case 5: /* input divided by 16 */ + clock /= 16; + break; + + case 6: /* input divided by 24 */ + clock /= 24; + break; + + case 7: /* input divided by 32 */ + clock /= 32; + break; + } + + /* Acquire PLL multiplier and calculate PLL frequency */ + clock = clock * (((CMU->PLLCR >> 16) & 0x7F) + 1); + + /* Acquire PLL output channel(PLLx1 or PLLx2) */ + if ((CMU->PLLCR >> 3) & 0x1) + { + clock *= 2; + } + + return clock; +} + +/** + * @brief Update the core clock frequency variable: SystemCoreClock + * + */ +void SystemCoreClockUpdate(void) +{ + switch ((CMU->SYSCLKCR >> 0) & 0x7) + { + case 1: /* XTHF */ + SystemCoreClock = XTHFClock; + break; + + case 2: /* PLL */ + SystemCoreClock = SystemPLLClockUpdate(); + break; + + case 4: /* RCLF */ + switch ((CMU->RCLFCR >> 16) & 0x3) + { + case 0: /* output divided by 1 */ + SystemCoreClock = 614400; + break; + + case 1: /* output divided by 4 */ + SystemCoreClock = 153600; + break; + + case 2: /* output divided by 8 */ + SystemCoreClock = 76800; + break; + + case 3: /* output divided by 16 */ + SystemCoreClock = 38400; + break; + } + break; + + case 5: /* XTLF */ + SystemCoreClock = XTLFClock; + break; + + case 6: /* RCLP */ + SystemCoreClock = 32000; + break; + + default: + switch ((CMU->RCHFCR >> 16) & 0xf) + { + case 1: /* 16MHz */ + SystemCoreClock = 16000000; + break; + + case 2: /* 24MHz */ + SystemCoreClock = 24000000; + break; + + case 3: /* 32MHz */ + SystemCoreClock = 32000000; + break; + + case 0: /* 8MHz */ + default: + SystemCoreClock = 8000000; + break; + } + break; + } + /* AHB Prescaler */ + switch((CMU->SYSCLKCR >> 8) & 0x7) + { + case 4: /* divide by 2 */ + SystemCoreClock /= 2; + break; + + case 5: /* divide by 4 */ + SystemCoreClock /= 4; + break; + + case 6: /* divide by 8 */ + SystemCoreClock /= 8; + break; + + case 7: /* divide by 16 */ + SystemCoreClock /= 16; + break; + + default: /* no division */ + break; + } +} + +/** + * @brief Setup the microcontroller system. + * Initialize the System. + */ +void SystemInit(void) +{ + + #if defined(USE_IWDT_ON_STARTUP) + CMU->PCLKCR1 |= 0x20U; /* Enable IWDT Operation Clock */ + IWDT->CR = IWDT_OVERFLOW_PERIOD; /* Configure IWDT overflow period */ + IWDT->SERV = 0x12345A5AU; /* Enable IWDT */ + #endif + + /* Enable VREF Operation Clock */ + CMU->PCLKCR1 |= 0x1U << 12; + + /* Enable PAD Operation Clock */ + CMU->PCLKCR1 |= 0x1U << 7; + + #ifdef USE_LSCLK_AUTO_SWITCH + + /* Enable LSCLK auto switch */ + CMU->SYSCLKCR |= 0x8000000U; + CMU->LSCLKSEL = 0x55U; + + #else + + /* Disable LSCLK auto switch */ + CMU->SYSCLKCR &= 0x7FFFFFFU; + CMU->LSCLKSEL = 0x55U; + + #endif /* USE_LSCLK_AUTO_SWITCH */ + + /* Keep timers running and disable IWDT && WWDT under debug mode */ + DBG->CR = 0x3U; + + #ifdef USE_DEBUG_UNDER_SLEEP + /* Keep debug connnection under sleep mode */ + DBG->CR |= 0x1U << 16; + #endif + + /* Load power trim value */ + PMU->ULPB_TR = ULPBG_TRIM; + + /* Load default clock trim value */ + CMU->RCHFTR = RCHF8M_TRIM; + CMU->RCLFTR = RCLF_TRIM; + CMU->RCLPTR = RCLP_TRIM; + + /* Enable SWD port pull up */ + GPIOD->PUEN |= 0x3U << 7; + + /* + If BOR is disabled, power down will be monitored by PDR. This means VDD can + be below the minimum operating voltage(1.65V) to V_PDR threshold without + power down reset. To solve this, user should use SVD to monitor VDD voltage. + When the VDD voltage drop below 1.65V, program can enter sleep. + */ + + /* PDR Config enable 1.5v */ + RMU->PDRCR = 0x5; + + /* Disable BOR power down */ + RMU->BORCR = 0x01; + + /* Update System Core Clock */ + SystemCoreClockUpdate(); + + #if defined(USE_IWDT_ON_STARTUP) + IWDT->SERV = 0x12345A5AU; /* Feed IWDT */ + #endif +} + + + + + diff --git a/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33_assert.h b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33_assert.h new file mode 100644 index 0000000..ba68265 --- /dev/null +++ b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33_assert.h @@ -0,0 +1,65 @@ + /** + **************************************************************************************************** + * @file fm33_assert.h + * @author FMSH Application Team + * @brief Assert function define + **************************************************************************************************** + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef __FM33_ASSERT_H +#define __FM33_ASSERT_H + +#ifdef __cplusplus + extern "C" { +#endif + +#ifdef USE_FULL_ASSERT +#define assert_param(expr) do{if((expr) == 0)for(;;);}while(0) +#else +#define assert_param(expr) ((void)0U) +#endif + +#ifdef __cplusplus +} +#endif + + +#endif + diff --git a/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl.h b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl.h new file mode 100644 index 0000000..d815da6 --- /dev/null +++ b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl.h @@ -0,0 +1,142 @@ + /** + ******************************************************************************************************* + * @file fm33lg0xx_fl.h + * @author FMSH Application Team + * @brief Header file of FL Driver Library + ******************************************************************************************************* + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + + +/* Define to prevent recursive inclusion -------------------------------------------------------------*/ +#ifndef __FM33LG0XX_FL_H +#define __FM33LG0XX_FL_H + +#ifdef __cplusplus +extern "C" { +#endif + +/* Includes -------------------------------------------------------------------------------------------*/ +#include "fm33lg0xx_fl_conf.h" +#include "fm33lg0xx_fl_def.h" + +/* Macros ---------------------------------------------------------------------------------------------*/ +/** @defgroup FL_Private_Macros FL Driver Library Private Macros + * @{ + */ + +/** + * @brief FM33LG0xx FL Driver Library version number + */ +#define __FM33LG0xx_FL_VERSION_MAIN (0x02) /*!< [31:24] main version */ +#define __FM33LG0xx_FL_VERSION_SUB1 (0x03) /*!< [23:16] sub1 version */ +#define __FM33LG0xx_FL_VERSION_SUB2 (0x00) /*!< [15:0] sub2 version */ +#define __FM33LG0xx_FL_VERSION ((__FM33LG0xx_FL_VERSION_MAIN << 24)\ + |(__FM33LG0xx_FL_VERSION_SUB1 << 16)\ + |(__FM33LG0xx_FL_VERSION_SUB2)) + +/** + * @brief Macros used by delay support functions + */ +#define FL_DELAY_US (SystemCoreClock/1000000) +#define FL_DELAY_MS (SystemCoreClock/1000) + +/** + * @} + */ + + /* Struct Defines -------------------------------------------------------------------------------------*/ +/** @defgroup FL_ET_NVIC FL Driver Library NVIC Init Sturcture Defines + * @{ + */ + +typedef struct +{ + /** 中断抢占优先级 */ + uint32_t preemptPriority; + +} FL_NVIC_ConfigTypeDef; + +/** + * @} + */ + +/* Exported Functions ---------------------------------------------------------------------------------*/ +/** @defgroup FL_EF_DELAY Exported FL Driver Library Delay Support Functions + * @{ + */ + +void FL_DelayInit(void); +void FL_DelayUs(uint32_t count); +void FL_DelayMs(uint32_t count); +void FL_DelayUsStart(uint32_t count); +void FL_DelayMsStart(uint32_t count); +bool FL_DelayEnd(void); + +/** + * @} + */ + +/** @defgroup FL_EF_INIT FL Driver Library Exported Init Functions + * @{ + */ + +void FL_Init(void); + +/** + * @} + */ + +/** @defgroup FL_EF_NVIC FL Driver Library Exported NVIC Configuration Functions + * @{ + */ + +void FL_NVIC_Init(FL_NVIC_ConfigTypeDef *configStruct, IRQn_Type irq); + +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif /* __FM33LG0XX_FL_H */ + +/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/ diff --git a/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_adc.h b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_adc.h new file mode 100644 index 0000000..8ff3aa4 --- /dev/null +++ b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_adc.h @@ -0,0 +1,2104 @@ + /** + ******************************************************************************************************* + * @file fm33lg0xx_fl_adc.h + * @author FMSH Application Team + * @brief Head file of ADC FL Module + ******************************************************************************************************* + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + + +/* Define to prevent recursive inclusion---------------------------------------------------------------*/ +#ifndef __FM33LG0XX_FL_ADC_H +#define __FM33LG0XX_FL_ADC_H + +#ifdef __cplusplus +extern "C" { +#endif +/* Includes -------------------------------------------------------------------------------------------*/ +#include "fm33lg0xx_fl_def.h" +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + + /** @defgroup ADC ADC + * @brief ADC FL driver + * @{ + */ + +/* Exported types -------------------------------------------------------------------------------------*/ +/** @defgroup ADC_FL_ES_INIT ADC Exported Init structures + * @{ + */ +#define ADC_VREF_SOURCE (*((uint16_t *)(0x1FFFFB08))) /* vref122定标值 */ + +#define ADC_VREF_BKP (*((uint16_t *)(0x1FFFFBF6))) /* vref122备份值 */ + +#define ADC_VREF ((((ADC_VREF_SOURCE & 0xffffU)>0x0654) && ((ADC_VREF_SOURCE & 0xffffU)<0x0690)) ? ADC_VREF_SOURCE : ADC_VREF_BKP) + + +#define ADC_TS_SOURCE (*((uint16_t *)(0x1FFFFB12))) /* PTAT定标值 */ + +#define ADC_TS_BKP (*((uint16_t *)(0x1FFFFBE2))) /* PTAT备份值 */ + +#define ADC_TS ((((ADC_TS_SOURCE & 0xffffU)>0x03E8) && ((ADC_TS_SOURCE & 0xffffU)<0x0474)) ? ADC_TS_SOURCE : ADC_TS_BKP) + +/** + * @brief FL ADC Init Sturcture definition + */ +typedef struct +{ + /** ADC工作时钟源选择 */ + uint32_t clockSource; + /** ADCCLK预分频配置 */ + uint32_t clockPrescaler; + /** ADC基准源选择 */ + uint32_t referenceSource; + /** ADC数据位选择 */ + uint32_t bitWidth; + +} FL_ADC_CommonInitTypeDef; + +typedef struct +{ + /** 连续转换模式配置 */ + uint32_t conversionMode; + /** 单次自动转换模式配置 */ + uint32_t autoMode; + /** 等待模式配置 */ + FL_FunState waitMode; + /** 覆盖模式配置 */ + FL_FunState overrunMode; + /** 通道扫描顺序配置 */ + uint32_t scanDirection; + /** 触发信号使能配置 */ + uint32_t externalTrigConv; + /** 触发源选择 */ + uint32_t triggerSource; + /** 快速通道采样时间配置 */ + uint32_t fastChannelTime; + /** 慢速通道采样时间配置 */ + uint32_t lowChannelTime; + /** 过采样使能配置 */ + FL_FunState oversamplingMode; + /** 过采样率配置 */ + uint32_t overSampingMultiplier; + /** 过采样移位配置 */ + uint32_t oversamplingShift; + +} FL_ADC_InitTypeDef; +/** + * @} + */ +/* Exported constants ---------------------------------------------------------------------------------*/ +/** @defgroup ADC_FL_Exported_Constants ADC Exported Constants + * @{ + */ + +#define ADC_ISR_EOC_Pos (0U) +#define ADC_ISR_EOC_Msk (0x1U << ADC_ISR_EOC_Pos) +#define ADC_ISR_EOC ADC_ISR_EOC_Msk + +#define ADC_ISR_EOS_Pos (1U) +#define ADC_ISR_EOS_Msk (0x1U << ADC_ISR_EOS_Pos) +#define ADC_ISR_EOS ADC_ISR_EOS_Msk + +#define ADC_ISR_OVR_Pos (2U) +#define ADC_ISR_OVR_Msk (0x1U << ADC_ISR_OVR_Pos) +#define ADC_ISR_OVR ADC_ISR_OVR_Msk + +#define ADC_ISR_BUSY_Pos (3U) +#define ADC_ISR_BUSY_Msk (0x1U << ADC_ISR_BUSY_Pos) +#define ADC_ISR_BUSY ADC_ISR_BUSY_Msk + +#define ADC_ISR_EOCAL_Pos (4U) +#define ADC_ISR_EOCAL_Msk (0x1U << ADC_ISR_EOCAL_Pos) +#define ADC_ISR_EOCAL ADC_ISR_EOCAL_Msk + +#define ADC_ISR_AWD_UL_Pos (5U) +#define ADC_ISR_AWD_UL_Msk (0x1U << ADC_ISR_AWD_UL_Pos) +#define ADC_ISR_AWD_UL ADC_ISR_AWD_UL_Msk + +#define ADC_ISR_AWD_AH_Pos (6U) +#define ADC_ISR_AWD_AH_Msk (0x1U << ADC_ISR_AWD_AH_Pos) +#define ADC_ISR_AWD_AH ADC_ISR_AWD_AH_Msk + +#define ADC_IER_EOCIE_Pos (0U) +#define ADC_IER_EOCIE_Msk (0x1U << ADC_IER_EOCIE_Pos) +#define ADC_IER_EOCIE ADC_IER_EOCIE_Msk + +#define ADC_IER_EOSIE_Pos (1U) +#define ADC_IER_EOSIE_Msk (0x1U << ADC_IER_EOSIE_Pos) +#define ADC_IER_EOSIE ADC_IER_EOSIE_Msk + +#define ADC_IER_OVRIE_Pos (2U) +#define ADC_IER_OVRIE_Msk (0x1U << ADC_IER_OVRIE_Pos) +#define ADC_IER_OVRIE ADC_IER_OVRIE_Msk + +#define ADC_IER_EOCALIE_Pos (4U) +#define ADC_IER_EOCALIE_Msk (0x1U << ADC_IER_EOCALIE_Pos) +#define ADC_IER_EOCALIE ADC_IER_EOCALIE_Msk + +#define ADC_IER_AWD_ULIE_Pos (5U) +#define ADC_IER_AWD_ULIE_Msk (0x1U << ADC_IER_AWD_ULIE_Pos) +#define ADC_IER_AWD_ULIE ADC_IER_AWD_ULIE_Msk + +#define ADC_IER_AWD_AHIE_Pos (6U) +#define ADC_IER_AWD_AHIE_Msk (0x1U << ADC_IER_AWD_AHIE_Pos) +#define ADC_IER_AWD_AHIE ADC_IER_AWD_AHIE_Msk + +#define ADC_CR1_ADEN_Pos (0U) +#define ADC_CR1_ADEN_Msk (0x1U << ADC_CR1_ADEN_Pos) +#define ADC_CR1_ADEN ADC_CR1_ADEN_Msk + +#define ADC_CR1_SWTRIG_Pos (1U) +#define ADC_CR1_SWTRIG_Msk (0x1U << ADC_CR1_SWTRIG_Pos) +#define ADC_CR1_SWTRIG ADC_CR1_SWTRIG_Msk + +#define ADC_CR2_TRGCFG_Pos (0U) +#define ADC_CR2_TRGCFG_Msk (0x3U << ADC_CR2_TRGCFG_Pos) +#define ADC_CR2_TRGCFG ADC_CR2_TRGCFG_Msk + +#define ADC_CALR_CALEN_Pos (0U) +#define ADC_CALR_CALEN_Msk (0x1U << ADC_CALR_CALEN_Pos) +#define ADC_CALR_CALEN ADC_CALR_CALEN_Msk + +#define ADC_CFGR1_PEFSEL_Pos (0U) +#define ADC_CFGR1_PEFSEL_Msk (0x3U << ADC_CFGR1_PEFSEL_Pos) +#define ADC_CFGR1_PEFSEL ADC_CFGR1_PEFSEL_Msk + +#define ADC_CFGR1_CLKSEL_Pos (2U) +#define ADC_CFGR1_CLKSEL_Msk (0x1U << ADC_CFGR1_CLKSEL_Pos) +#define ADC_CFGR1_CLKSEL ADC_CFGR1_CLKSEL_Msk + +#define ADC_CFGR1_BITSEL_Pos (3U) +#define ADC_CFGR1_BITSEL_Msk (0x3U << ADC_CFGR1_BITSEL_Pos) +#define ADC_CFGR1_BITSEL ADC_CFGR1_BITSEL_Msk + +#define ADC_CFGR1_EXSOC_Pos (5U) +#define ADC_CFGR1_EXSOC_Msk (0x1U << ADC_CFGR1_EXSOC_Pos) +#define ADC_CFGR1_EXSOC ADC_CFGR1_EXSOC_Msk + +#define ADC_CFGR1_APBCLK_PSC_Pos (6U) +#define ADC_CFGR1_APBCLK_PSC_Msk (0x3U << ADC_CFGR1_APBCLK_PSC_Pos) +#define ADC_CFGR1_APBCLK_PSC ADC_CFGR1_APBCLK_PSC_Msk + +#define ADC_CFGR1_BUFEN_Pos (8U) +#define ADC_CFGR1_BUFEN_Msk (0x1U << ADC_CFGR1_BUFEN_Pos) +#define ADC_CFGR1_BUFEN ADC_CFGR1_BUFEN_Msk + +#define ADC_CFGR1_BUFMOD_Pos (9U) +#define ADC_CFGR1_BUFMOD_Msk (0x1U << ADC_CFGR1_BUFMOD_Pos) +#define ADC_CFGR1_BUFMOD ADC_CFGR1_BUFMOD_Msk + +#define ADC_CFGR1_BUFLPF_Pos (10U) +#define ADC_CFGR1_BUFLPF_Msk (0x1U << ADC_CFGR1_BUFLPF_Pos) +#define ADC_CFGR1_BUFLPF ADC_CFGR1_BUFLPF_Msk + +#define ADC_CFGR1_BUFCHP_EN_Pos (11U) +#define ADC_CFGR1_BUFCHP_EN_Msk (0x1U << ADC_CFGR1_BUFCHP_EN_Pos) +#define ADC_CFGR1_BUFCHP_EN ADC_CFGR1_BUFCHP_EN_Msk + +#define ADC_CFGR2_DMAEN_Pos (0U) +#define ADC_CFGR2_DMAEN_Msk (0x1U << ADC_CFGR2_DMAEN_Pos) +#define ADC_CFGR2_DMAEN ADC_CFGR2_DMAEN_Msk + +#define ADC_CFGR2_SCANDIR_Pos (2U) +#define ADC_CFGR2_SCANDIR_Msk (0x1U << ADC_CFGR2_SCANDIR_Pos) +#define ADC_CFGR2_SCANDIR ADC_CFGR2_SCANDIR_Msk + +#define ADC_CFGR2_EXTS_Pos (4U) +#define ADC_CFGR2_EXTS_Msk (0xfU << ADC_CFGR2_EXTS_Pos) +#define ADC_CFGR2_EXTS ADC_CFGR2_EXTS_Msk + +#define ADC_CFGR2_OVRM_Pos (8U) +#define ADC_CFGR2_OVRM_Msk (0x1U << ADC_CFGR2_OVRM_Pos) +#define ADC_CFGR2_OVRM ADC_CFGR2_OVRM_Msk + +#define ADC_CFGR2_CONT_Pos (9U) +#define ADC_CFGR2_CONT_Msk (0x1U << ADC_CFGR2_CONT_Pos) +#define ADC_CFGR2_CONT ADC_CFGR2_CONT_Msk + +#define ADC_CFGR2_WAIT_Pos (10U) +#define ADC_CFGR2_WAIT_Msk (0x1U << ADC_CFGR2_WAIT_Pos) +#define ADC_CFGR2_WAIT ADC_CFGR2_WAIT_Msk + +#define ADC_CFGR2_SEMI_Pos (11U) +#define ADC_CFGR2_SEMI_Msk (0x1U << ADC_CFGR2_SEMI_Pos) +#define ADC_CFGR2_SEMI ADC_CFGR2_SEMI_Msk + +#define ADC_CFGR2_IOTRFEN_Pos (14U) +#define ADC_CFGR2_IOTRFEN_Msk (0x1U << ADC_CFGR2_IOTRFEN_Pos) +#define ADC_CFGR2_IOTRFEN ADC_CFGR2_IOTRFEN_Msk + +#define ADC_CFGR2_OVSEN_Pos (16U) +#define ADC_CFGR2_OVSEN_Msk (0x1U << ADC_CFGR2_OVSEN_Pos) +#define ADC_CFGR2_OVSEN ADC_CFGR2_OVSEN_Msk + +#define ADC_CFGR2_OVSR_Pos (17U) +#define ADC_CFGR2_OVSR_Msk (0x7U << ADC_CFGR2_OVSR_Pos) +#define ADC_CFGR2_OVSR ADC_CFGR2_OVSR_Msk + +#define ADC_CFGR2_OVSS_Pos (20U) +#define ADC_CFGR2_OVSS_Msk (0xfU << ADC_CFGR2_OVSS_Pos) +#define ADC_CFGR2_OVSS ADC_CFGR2_OVSS_Msk + +#define ADC_CFGR2_AWDEN_Pos (24U) +#define ADC_CFGR2_AWDEN_Msk (0x1U << ADC_CFGR2_AWDEN_Pos) +#define ADC_CFGR2_AWDEN ADC_CFGR2_AWDEN_Msk + +#define ADC_CFGR2_AWDSC_Pos (25U) +#define ADC_CFGR2_AWDSC_Msk (0x1U << ADC_CFGR2_AWDSC_Pos) +#define ADC_CFGR2_AWDSC ADC_CFGR2_AWDSC_Msk + +#define ADC_CFGR2_AWDCH_Pos (26U) +#define ADC_CFGR2_AWDCH_Msk (0x1fU << ADC_CFGR2_AWDCH_Pos) +#define ADC_CFGR2_AWDCH ADC_CFGR2_AWDCH_Msk + +#define ADC_SMTR_SMTS1_Pos (0U) +#define ADC_SMTR_SMTS1_Msk (0xfU << ADC_SMTR_SMTS1_Pos) +#define ADC_SMTR_SMTS1 ADC_SMTR_SMTS1_Msk + +#define ADC_SMTR_SMTS2_Pos (4U) +#define ADC_SMTR_SMTS2_Msk (0xfU << ADC_SMTR_SMTS2_Pos) +#define ADC_SMTR_SMTS2 ADC_SMTR_SMTS2_Msk + +#define ADC_DR_DATA_Pos (0U) +#define ADC_DR_DATA_Msk (0xffffU << ADC_DR_DATA_Pos) +#define ADC_DR_DATA ADC_DR_DATA_Msk + +#define ADC_HLTR_AWD_LT_Pos (0U) +#define ADC_HLTR_AWD_LT_Msk (0xffffU << ADC_HLTR_AWD_LT_Pos) +#define ADC_HLTR_AWD_LT ADC_HLTR_AWD_LT_Msk + +#define ADC_HLTR_AWD_HT_Pos (16U) +#define ADC_HLTR_AWD_HT_Msk (0xffffU << ADC_HLTR_AWD_HT_Pos) +#define ADC_HLTR_AWD_HT ADC_HLTR_AWD_HT_Msk + + + +#define FL_ADC_EXTERNAL_CH0 ((u32)0x1U << 0U) +#define FL_ADC_EXTERNAL_CH1 ((u32)0x1U << 1U) +#define FL_ADC_EXTERNAL_CH2 ((u32)0x1U << 2U) +#define FL_ADC_EXTERNAL_CH3 ((u32)0x1U << 3U) +#define FL_ADC_EXTERNAL_CH4 ((u32)0x1U << 4U) +#define FL_ADC_EXTERNAL_CH5 ((u32)0x1U << 5U) +#define FL_ADC_EXTERNAL_CH6 ((u32)0x1U << 6U) +#define FL_ADC_EXTERNAL_CH7 ((u32)0x1U << 7U) +#define FL_ADC_EXTERNAL_CH8 ((u32)0x1U << 8U) +#define FL_ADC_EXTERNAL_CH9 ((u32)0x1U << 9U) +#define FL_ADC_EXTERNAL_CH10 ((u32)0x1U << 10U) +#define FL_ADC_EXTERNAL_CH11 ((u32)0x1U << 11U) +#define FL_ADC_EXTERNAL_CH12 ((u32)0x1U << 12U) +#define FL_ADC_EXTERNAL_CH13 ((u32)0x1U << 13U) +#define FL_ADC_EXTERNAL_CH14 ((u32)0x1U << 14U) +#define FL_ADC_EXTERNAL_CH15 ((u32)0x1U << 15U) +#define FL_ADC_EXTERNAL_CH16 ((u32)0x1U << 16U) +#define FL_ADC_EXTERNAL_CH17 ((u32)0x1U << 17U) +#define FL_ADC_EXTERNAL_CH18 ((u32)0x1U << 18U) +#define FL_ADC_EXTERNAL_CH19 ((u32)0x1U << 19U) +#define FL_ADC_INTERNAL_VREF1P2 ((u32)0x1U << 24U) +#define FL_ADC_INTERNAL_TS ((u32)0x1U << 25U) +#define FL_ADC_INTERNAL_AVREF ((u32)0x1U << 26U) +#define FL_ADC_INTERNAL_VBAT_DIV3 ((u32)0x1U << 27U) +#define FL_ADC_INTERNAL_VDD_DIV3 ((u32)0x1U << 28U) +#define FL_ADC_INTERNAL_DAC ((u32)0x1U << 29U) +#define FL_ADC_ALL_CHANNEL (0xfffffU << 0U) + + +#define FL_ADC_DIFFERENTIAL_GROUP0 (0x1U << 0U) +#define FL_ADC_DIFFERENTIAL_GROUP1 (0x1U << 1U) +#define FL_ADC_DIFFERENTIAL_GROUP2 (0x1U << 2U) +#define FL_ADC_DIFFERENTIAL_GROUP3 (0x1U << 3U) +#define FL_ADC_DIFFERENTIAL_GROUP4 (0x1U << 4U) +#define FL_ADC_DIFFERENTIAL_GROUP5 (0x1U << 5U) +#define FL_ADC_DIFFERENTIAL_GROUP6 (0x1U << 6U) +#define FL_ADC_CLK_PSC_DIV1 (0x0U << 0U) +#define FL_ADC_CLK_PSC_DIV2 (0x1U << 0U) +#define FL_ADC_CLK_PSC_DIV4 (0x2U << 0U) +#define FL_ADC_CLK_PSC_DIV8 (0x3U << 0U) +#define FL_ADC_CLK_PSC_DIV16 (0x4U << 0U) +#define FL_ADC_CLK_PSC_DIV32 (0x5U << 0U) + + + +#define FL_ADC_TRIGGER_EDGE_NONE (0x0U << ADC_CR2_TRGCFG_Pos) +#define FL_ADC_TRIGGER_EDGE_RISING (0x1U << ADC_CR2_TRGCFG_Pos) +#define FL_ADC_TRIGGER_EDGE_FALLING (0x2U << ADC_CR2_TRGCFG_Pos) +#define FL_ADC_TRIGGER_EDGE_BOTH (0x3U << ADC_CR2_TRGCFG_Pos) + + +#define FL_ADC_REF_SOURCE_VDDA (0x0U << ADC_CFGR1_PEFSEL_Pos) +#define FL_ADC_REF_SOURCE_VREFP (0x1U << ADC_CFGR1_PEFSEL_Pos) +#define FL_ADC_REF_SOURCE_VDD15 (0x2U << ADC_CFGR1_PEFSEL_Pos) + + +#define FL_ADC_CLK_SOURCE_ADCCLK (0x0U << ADC_CFGR1_CLKSEL_Pos) +#define FL_ADC_CLK_SOURCE_APBCLK (0x1U << ADC_CFGR1_CLKSEL_Pos) + + +#define FL_ADC_BIT_WIDTH_12B (0x0U << ADC_CFGR1_BITSEL_Pos) +#define FL_ADC_BIT_WIDTH_10B (0x1U << ADC_CFGR1_BITSEL_Pos) +#define FL_ADC_BIT_WIDTH_8B (0x2U << ADC_CFGR1_BITSEL_Pos) +#define FL_ADC_BIT_WIDTH_6B (0x3U << ADC_CFGR1_BITSEL_Pos) + + +#define FL_ADC_APBCLK_PSC_DIV1 (0x0U << ADC_CFGR1_APBCLK_PSC_Pos) +#define FL_ADC_APBCLK_PSC_DIV2 (0x1U << ADC_CFGR1_APBCLK_PSC_Pos) +#define FL_ADC_APBCLK_PSC_DIV4 (0x2U << ADC_CFGR1_APBCLK_PSC_Pos) +#define FL_ADC_APBCLK_PSC_DIV8 (0x3U << ADC_CFGR1_APBCLK_PSC_Pos) + + +#define FL_ADC_BUFF_POWER_MODE_NORMAL (0x0U << ADC_CFGR1_BUFMOD_Pos) +#define FL_ADC_BUFF_POWER_MODE_LOW (0x1U << ADC_CFGR1_BUFMOD_Pos) + + +#define FL_ADC_BUFF_FILTER_MODE_NORMAL (0x0U << ADC_CFGR1_BUFLPF_Pos) +#define FL_ADC_BUFF_FILTER_MODE_LOWPASS (0x1U << ADC_CFGR1_BUFLPF_Pos) + + +#define FL_ADC_SEQ_SCAN_DIR_FORWARD (0x0U << ADC_CFGR2_SCANDIR_Pos) +#define FL_ADC_SEQ_SCAN_DIR_BACKWARD (0x1U << ADC_CFGR2_SCANDIR_Pos) + + +#define FL_ADC_TRGI_LUT0 (0x0U << ADC_CFGR2_EXTS_Pos) +#define FL_ADC_TRGI_LUT1 (0x1U << ADC_CFGR2_EXTS_Pos) +#define FL_ADC_TRGI_LUT2 (0x2U << ADC_CFGR2_EXTS_Pos) +#define FL_ADC_TRGI_ATIM (0x3U << ADC_CFGR2_EXTS_Pos) +#define FL_ADC_TRGI_GPTIM1 (0x4U << ADC_CFGR2_EXTS_Pos) +#define FL_ADC_TRGI_GPTIM2 (0x5U << ADC_CFGR2_EXTS_Pos) +#define FL_ADC_TRGI_BSTIM16 (0x6U << ADC_CFGR2_EXTS_Pos) +#define FL_ADC_TRGI_LPTIM16 (0x7U << ADC_CFGR2_EXTS_Pos) +#define FL_ADC_TRGI_COMP1 (0x8U << ADC_CFGR2_EXTS_Pos) +#define FL_ADC_TRGI_COMP2 (0x9U << ADC_CFGR2_EXTS_Pos) +#define FL_ADC_TRGI_RTCA (0xaU << ADC_CFGR2_EXTS_Pos) +#define FL_ADC_TRGI_LUT3 (0xbU << ADC_CFGR2_EXTS_Pos) +#define FL_ADC_TRGI_GPTIM0 (0xcU << ADC_CFGR2_EXTS_Pos) +#define FL_ADC_TRGI_COMP3 (0xdU << ADC_CFGR2_EXTS_Pos) + + +#define FL_ADC_CONV_MODE_SINGLE (0x0U << ADC_CFGR2_CONT_Pos) +#define FL_ADC_CONV_MODE_CONTINUOUS (0x1U << ADC_CFGR2_CONT_Pos) + + +#define FL_ADC_SINGLE_CONV_MODE_AUTO (0x0U << ADC_CFGR2_SEMI_Pos) +#define FL_ADC_SINGLE_CONV_MODE_SEMIAUTO (0x1U << ADC_CFGR2_SEMI_Pos) + + +#define FL_ADC_OVERSAMPLING_MUL_2X (0x0U << ADC_CFGR2_OVSR_Pos) +#define FL_ADC_OVERSAMPLING_MUL_4X (0x1U << ADC_CFGR2_OVSR_Pos) +#define FL_ADC_OVERSAMPLING_MUL_8X (0x2U << ADC_CFGR2_OVSR_Pos) +#define FL_ADC_OVERSAMPLING_MUL_16X (0x3U << ADC_CFGR2_OVSR_Pos) +#define FL_ADC_OVERSAMPLING_MUL_32X (0x4U << ADC_CFGR2_OVSR_Pos) +#define FL_ADC_OVERSAMPLING_MUL_64X (0x5U << ADC_CFGR2_OVSR_Pos) +#define FL_ADC_OVERSAMPLING_MUL_128X (0x6U << ADC_CFGR2_OVSR_Pos) +#define FL_ADC_OVERSAMPLING_MUL_256X (0x7U << ADC_CFGR2_OVSR_Pos) + + +#define FL_ADC_OVERSAMPLING_SHIFT_0B (0x0U << ADC_CFGR2_OVSS_Pos) +#define FL_ADC_OVERSAMPLING_SHIFT_1B (0x1U << ADC_CFGR2_OVSS_Pos) +#define FL_ADC_OVERSAMPLING_SHIFT_2B (0x2U << ADC_CFGR2_OVSS_Pos) +#define FL_ADC_OVERSAMPLING_SHIFT_3B (0x3U << ADC_CFGR2_OVSS_Pos) +#define FL_ADC_OVERSAMPLING_SHIFT_4B (0x4U << ADC_CFGR2_OVSS_Pos) +#define FL_ADC_OVERSAMPLING_SHIFT_5B (0x5U << ADC_CFGR2_OVSS_Pos) +#define FL_ADC_OVERSAMPLING_SHIFT_6B (0x6U << ADC_CFGR2_OVSS_Pos) +#define FL_ADC_OVERSAMPLING_SHIFT_7B (0x7U << ADC_CFGR2_OVSS_Pos) +#define FL_ADC_OVERSAMPLING_SHIFT_8B (0x8U << ADC_CFGR2_OVSS_Pos) + + +#define FL_ADC_AWDG_ALL_CHANNEL (0x0U << ADC_CFGR2_AWDSC_Pos) +#define FL_ADC_AWDG_SINGLE_CHANNEL (0x1U << ADC_CFGR2_AWDSC_Pos) + + +#define FL_ADC_AWDG_CH0 (0x0U << ADC_CFGR2_AWDCH_Pos) +#define FL_ADC_AWDG_CH1 (0x1U << ADC_CFGR2_AWDCH_Pos) +#define FL_ADC_AWDG_CH2 (0x2U << ADC_CFGR2_AWDCH_Pos) +#define FL_ADC_AWDG_CH3 (0x3U << ADC_CFGR2_AWDCH_Pos) +#define FL_ADC_AWDG_CH4 (0x4U << ADC_CFGR2_AWDCH_Pos) +#define FL_ADC_AWDG_CH5 (0x5U << ADC_CFGR2_AWDCH_Pos) +#define FL_ADC_AWDG_CH6 (0x6U << ADC_CFGR2_AWDCH_Pos) +#define FL_ADC_AWDG_CH7 (0x7U << ADC_CFGR2_AWDCH_Pos) +#define FL_ADC_AWDG_CH8 (0x8U << ADC_CFGR2_AWDCH_Pos) +#define FL_ADC_AWDG_CH9 (0x9U << ADC_CFGR2_AWDCH_Pos) +#define FL_ADC_AWDG_CH10 (0xaU << ADC_CFGR2_AWDCH_Pos) +#define FL_ADC_AWDG_CH11 (0xbU << ADC_CFGR2_AWDCH_Pos) +#define FL_ADC_AWDG_CH12 (0xcU << ADC_CFGR2_AWDCH_Pos) +#define FL_ADC_AWDG_CH13 (0xdU << ADC_CFGR2_AWDCH_Pos) +#define FL_ADC_AWDG_CH14 (0xeU << ADC_CFGR2_AWDCH_Pos) +#define FL_ADC_AWDG_CH15 (0xfU << ADC_CFGR2_AWDCH_Pos) +#define FL_ADC_AWDG_CH16 (0x10U << ADC_CFGR2_AWDCH_Pos) +#define FL_ADC_AWDG_CH17 (0x11U << ADC_CFGR2_AWDCH_Pos) +#define FL_ADC_AWDG_CH18 (0x12U << ADC_CFGR2_AWDCH_Pos) +#define FL_ADC_AWDG_CH19 (0x13U << ADC_CFGR2_AWDCH_Pos) + + +#define FL_ADC_SLOW_CH_SAMPLING_TIME_2_ADCCLK (0x0U << ADC_SMTR_SMTS1_Pos) +#define FL_ADC_SLOW_CH_SAMPLING_TIME_4_ADCCLK (0x1U << ADC_SMTR_SMTS1_Pos) +#define FL_ADC_SLOW_CH_SAMPLING_TIME_8_ADCCLK (0x2U << ADC_SMTR_SMTS1_Pos) +#define FL_ADC_SLOW_CH_SAMPLING_TIME_12_ADCCLK (0x3U << ADC_SMTR_SMTS1_Pos) +#define FL_ADC_SLOW_CH_SAMPLING_TIME_16_ADCCLK (0x4U << ADC_SMTR_SMTS1_Pos) +#define FL_ADC_SLOW_CH_SAMPLING_TIME_32_ADCCLK (0x5U << ADC_SMTR_SMTS1_Pos) +#define FL_ADC_SLOW_CH_SAMPLING_TIME_64_ADCCLK (0x6U << ADC_SMTR_SMTS1_Pos) +#define FL_ADC_SLOW_CH_SAMPLING_TIME_80_ADCCLK (0x7U << ADC_SMTR_SMTS1_Pos) +#define FL_ADC_SLOW_CH_SAMPLING_TIME_96_ADCCLK (0x8U << ADC_SMTR_SMTS1_Pos) +#define FL_ADC_SLOW_CH_SAMPLING_TIME_128_ADCCLK (0x9U << ADC_SMTR_SMTS1_Pos) +#define FL_ADC_SLOW_CH_SAMPLING_TIME_160_ADCCLK (0xaU << ADC_SMTR_SMTS1_Pos) +#define FL_ADC_SLOW_CH_SAMPLING_TIME_192_ADCCLK (0xbU << ADC_SMTR_SMTS1_Pos) +#define FL_ADC_SLOW_CH_SAMPLING_TIME_256_ADCCLK (0xcU << ADC_SMTR_SMTS1_Pos) +#define FL_ADC_SLOW_CH_SAMPLING_TIME_320_ADCCLK (0xdU << ADC_SMTR_SMTS1_Pos) +#define FL_ADC_SLOW_CH_SAMPLING_TIME_384_ADCCLK (0xeU << ADC_SMTR_SMTS1_Pos) +#define FL_ADC_SLOW_CH_SAMPLING_TIME_512_ADCCLK (0xfU << ADC_SMTR_SMTS1_Pos) + + +#define FL_ADC_FAST_CH_SAMPLING_TIME_2_ADCCLK (0x0U << ADC_SMTR_SMTS2_Pos) +#define FL_ADC_FAST_CH_SAMPLING_TIME_4_ADCCLK (0x1U << ADC_SMTR_SMTS2_Pos) +#define FL_ADC_FAST_CH_SAMPLING_TIME_8_ADCCLK (0x2U << ADC_SMTR_SMTS2_Pos) +#define FL_ADC_FAST_CH_SAMPLING_TIME_12_ADCCLK (0x3U << ADC_SMTR_SMTS2_Pos) +#define FL_ADC_FAST_CH_SAMPLING_TIME_16_ADCCLK (0x4U << ADC_SMTR_SMTS2_Pos) +#define FL_ADC_FAST_CH_SAMPLING_TIME_32_ADCCLK (0x5U << ADC_SMTR_SMTS2_Pos) +#define FL_ADC_FAST_CH_SAMPLING_TIME_64_ADCCLK (0x6U << ADC_SMTR_SMTS2_Pos) +#define FL_ADC_FAST_CH_SAMPLING_TIME_80_ADCCLK (0x7U << ADC_SMTR_SMTS2_Pos) +#define FL_ADC_FAST_CH_SAMPLING_TIME_96_ADCCLK (0x8U << ADC_SMTR_SMTS2_Pos) +#define FL_ADC_FAST_CH_SAMPLING_TIME_128_ADCCLK (0x9U << ADC_SMTR_SMTS2_Pos) +#define FL_ADC_FAST_CH_SAMPLING_TIME_160_ADCCLK (0xaU << ADC_SMTR_SMTS2_Pos) +#define FL_ADC_FAST_CH_SAMPLING_TIME_192_ADCCLK (0xbU << ADC_SMTR_SMTS2_Pos) +#define FL_ADC_FAST_CH_SAMPLING_TIME_256_ADCCLK (0xcU << ADC_SMTR_SMTS2_Pos) +#define FL_ADC_FAST_CH_SAMPLING_TIME_320_ADCCLK (0xdU << ADC_SMTR_SMTS2_Pos) +#define FL_ADC_FAST_CH_SAMPLING_TIME_384_ADCCLK (0xeU << ADC_SMTR_SMTS2_Pos) +#define FL_ADC_FAST_CH_SAMPLING_TIME_512_ADCCLK (0xfU << ADC_SMTR_SMTS2_Pos) + + +/** + * @} + */ +/* Exported functions ---------------------------------------------------------------------------------*/ +/** @defgroup ADC_FL_Exported_Functions ADC Exported Functions + * @{ + */ + +/** + * @brief Get ADC End Of Conversion Flag + * @rmtoll ISR EOC FL_ADC_IsActiveFlag_EndOfConversion + * @param ADCx ADC instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ADC_IsActiveFlag_EndOfConversion(ADC_Type *ADCx) +{ + return (uint32_t)(READ_BIT(ADCx->ISR, ADC_ISR_EOC_Msk) == (ADC_ISR_EOC_Msk)); +} + +/** + * @brief Clear ADC End Of Conversion Flag + * @rmtoll ISR EOC FL_ADC_ClearFlag_EndOfConversion + * @param ADCx ADC instance + * @retval None + */ +__STATIC_INLINE void FL_ADC_ClearFlag_EndOfConversion(ADC_Type *ADCx) +{ + WRITE_REG(ADCx->ISR, ADC_ISR_EOC_Msk); +} + +/** + * @brief Get ADC End Of Sequence Flag + * @rmtoll ISR EOS FL_ADC_IsActiveFlag_EndOfSequence + * @param ADCx ADC instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ADC_IsActiveFlag_EndOfSequence(ADC_Type *ADCx) +{ + return (uint32_t)(READ_BIT(ADCx->ISR, ADC_ISR_EOS_Msk) == (ADC_ISR_EOS_Msk)); +} + +/** + * @brief Clear ADC End Of Sequence Flag + * @rmtoll ISR EOS FL_ADC_ClearFlag_EndOfSequence + * @param ADCx ADC instance + * @retval None + */ +__STATIC_INLINE void FL_ADC_ClearFlag_EndOfSequence(ADC_Type *ADCx) +{ + WRITE_REG(ADCx->ISR, ADC_ISR_EOS_Msk); +} + +/** + * @brief Get ADC Data Overrun Flag + * @rmtoll ISR OVR FL_ADC_IsActiveFlag_Overrun + * @param ADCx ADC instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ADC_IsActiveFlag_Overrun(ADC_Type *ADCx) +{ + return (uint32_t)(READ_BIT(ADCx->ISR, ADC_ISR_OVR_Msk) == (ADC_ISR_OVR_Msk)); +} + +/** + * @brief Clear ADC Data Overrun Flag + * @rmtoll ISR OVR FL_ADC_ClearFlag_Overrun + * @param ADCx ADC instance + * @retval None + */ +__STATIC_INLINE void FL_ADC_ClearFlag_Overrun(ADC_Type *ADCx) +{ + WRITE_REG(ADCx->ISR, ADC_ISR_OVR_Msk); +} + +/** + * @brief Get ADC Busy Flag + * @rmtoll ISR BUSY FL_ADC_IsActiveFlag_Busy + * @param ADCx ADC instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ADC_IsActiveFlag_Busy(ADC_Type *ADCx) +{ + return (uint32_t)(READ_BIT(ADCx->ISR, ADC_ISR_BUSY_Msk) == (ADC_ISR_BUSY_Msk)); +} + +/** + * @brief Get ADC End Of Calibration Flag + * @rmtoll ISR EOCAL FL_ADC_IsActiveFlag_EndOfCalibration + * @param ADCx ADC instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ADC_IsActiveFlag_EndOfCalibration(ADC_Type *ADCx) +{ + return (uint32_t)(READ_BIT(ADCx->ISR, ADC_ISR_EOCAL_Msk) == (ADC_ISR_EOCAL_Msk)); +} + +/** + * @brief Clear ADC End Of Calibration Flag + * @rmtoll ISR EOCAL FL_ADC_ClearFlag_EndOfCalibration + * @param ADCx ADC instance + * @retval None + */ +__STATIC_INLINE void FL_ADC_ClearFlag_EndOfCalibration(ADC_Type *ADCx) +{ + WRITE_REG(ADCx->ISR, ADC_ISR_EOCAL_Msk); +} + +/** + * @brief Get ADC Analog Watchdog Under Low + * @rmtoll ISR AWD_UL FL_ADC_IsActiveFlag_AnalogWDGUnderLow + * @param ADCx ADC instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ADC_IsActiveFlag_AnalogWDGUnderLow(ADC_Type *ADCx) +{ + return (uint32_t)(READ_BIT(ADCx->ISR, ADC_ISR_AWD_UL_Msk) == (ADC_ISR_AWD_UL_Msk)); +} + +/** + * @brief Clear ADC Analog Watchdog Under Low + * @rmtoll ISR AWD_UL FL_ADC_ClearFlag_AnalogWDGUnderLow + * @param ADCx ADC instance + * @retval None + */ +__STATIC_INLINE void FL_ADC_ClearFlag_AnalogWDGUnderLow(ADC_Type *ADCx) +{ + WRITE_REG(ADCx->ISR, ADC_ISR_AWD_UL_Msk); +} + +/** + * @brief Get ADC Analog Watchdog Above High + * @rmtoll ISR AWD_AH FL_ADC_IsActiveFlag_AnalogWDGAboveHigh + * @param ADCx ADC instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ADC_IsActiveFlag_AnalogWDGAboveHigh(ADC_Type *ADCx) +{ + return (uint32_t)(READ_BIT(ADCx->ISR, ADC_ISR_AWD_AH_Msk) == (ADC_ISR_AWD_AH_Msk)); +} + +/** + * @brief Clear ADC Analog Watchdog Above High + * @rmtoll ISR AWD_AH FL_ADC_ClearFlag_AnalogWDGAboveHigh + * @param ADCx ADC instance + * @retval None + */ +__STATIC_INLINE void FL_ADC_ClearFlag_AnalogWDGAboveHigh(ADC_Type *ADCx) +{ + WRITE_REG(ADCx->ISR, ADC_ISR_AWD_AH_Msk); +} + +/** + * @brief Enable ADC End 0f Conversion interrupt + * @rmtoll IER EOCIE FL_ADC_EnableIT_EndOfConversion + * @param ADCx ADC instance + * @retval None + */ +__STATIC_INLINE void FL_ADC_EnableIT_EndOfConversion(ADC_Type *ADCx) +{ + SET_BIT(ADCx->IER, ADC_IER_EOCIE_Msk); +} + +/** + * @brief Disable ADC End 0f Conversion interrupt + * @rmtoll IER EOCIE FL_ADC_DisableIT_EndOfConversion + * @param ADCx ADC instance + * @retval None + */ +__STATIC_INLINE void FL_ADC_DisableIT_EndOfConversion(ADC_Type *ADCx) +{ + CLEAR_BIT(ADCx->IER, ADC_IER_EOCIE_Msk); +} + +/** + * @brief Get ADC End 0f Conversion interrupt Enable Status + * @rmtoll IER EOCIE FL_ADC_IsEnabledIT_EndOfConversion + * @param ADCx ADC instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ADC_IsEnabledIT_EndOfConversion(ADC_Type *ADCx) +{ + return (uint32_t)(READ_BIT(ADCx->IER, ADC_IER_EOCIE_Msk) == ADC_IER_EOCIE_Msk); +} + +/** + * @brief Enable ADC End Of Sequence interrupt + * @rmtoll IER EOSIE FL_ADC_EnableIT_EndOfSequence + * @param ADCx ADC instance + * @retval None + */ +__STATIC_INLINE void FL_ADC_EnableIT_EndOfSequence(ADC_Type *ADCx) +{ + SET_BIT(ADCx->IER, ADC_IER_EOSIE_Msk); +} + +/** + * @brief Disable ADC End Of Sequence interrupt + * @rmtoll IER EOSIE FL_ADC_DisableIT_EndOfSequence + * @param ADCx ADC instance + * @retval None + */ +__STATIC_INLINE void FL_ADC_DisableIT_EndOfSequence(ADC_Type *ADCx) +{ + CLEAR_BIT(ADCx->IER, ADC_IER_EOSIE_Msk); +} + +/** + * @brief Get ADC End Of Sequence interrupt Enable Status + * @rmtoll IER EOSIE FL_ADC_IsEnabledIT_EndOfSequence + * @param ADCx ADC instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ADC_IsEnabledIT_EndOfSequence(ADC_Type *ADCx) +{ + return (uint32_t)(READ_BIT(ADCx->IER, ADC_IER_EOSIE_Msk) == ADC_IER_EOSIE_Msk); +} + +/** + * @brief Enable ADC Data Overrun interrupt + * @rmtoll IER OVRIE FL_ADC_EnableIT_Overrun + * @param ADCx ADC instance + * @retval None + */ +__STATIC_INLINE void FL_ADC_EnableIT_Overrun(ADC_Type *ADCx) +{ + SET_BIT(ADCx->IER, ADC_IER_OVRIE_Msk); +} + +/** + * @brief Disable ADC Data Overrun interrupt + * @rmtoll IER OVRIE FL_ADC_DisableIT_Overrun + * @param ADCx ADC instance + * @retval None + */ +__STATIC_INLINE void FL_ADC_DisableIT_Overrun(ADC_Type *ADCx) +{ + CLEAR_BIT(ADCx->IER, ADC_IER_OVRIE_Msk); +} + +/** + * @brief Get ADC Data Overrun interrupt Enable Status + * @rmtoll IER OVRIE FL_ADC_IsEnabledIT_Overrun + * @param ADCx ADC instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ADC_IsEnabledIT_Overrun(ADC_Type *ADCx) +{ + return (uint32_t)(READ_BIT(ADCx->IER, ADC_IER_OVRIE_Msk) == ADC_IER_OVRIE_Msk); +} + +/** + * @brief Enable ADC End Of Calibration interrupt + * @rmtoll IER EOCALIE FL_ADC_EnableIT_EndOfCalibration + * @param ADCx ADC instance + * @retval None + */ +__STATIC_INLINE void FL_ADC_EnableIT_EndOfCalibration(ADC_Type *ADCx) +{ + SET_BIT(ADCx->IER, ADC_IER_EOCALIE_Msk); +} + +/** + * @brief Disable ADC End Of Calibration interrupt + * @rmtoll IER EOCALIE FL_ADC_DisableIT_EndOfCalibration + * @param ADCx ADC instance + * @retval None + */ +__STATIC_INLINE void FL_ADC_DisableIT_EndOfCalibration(ADC_Type *ADCx) +{ + CLEAR_BIT(ADCx->IER, ADC_IER_EOCALIE_Msk); +} + +/** + * @brief Get ADC End Of Calibration interrupt Enable Status + * @rmtoll IER EOCALIE FL_ADC_IsEnabledIT_EndOfCalibration + * @param ADCx ADC instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ADC_IsEnabledIT_EndOfCalibration(ADC_Type *ADCx) +{ + return (uint32_t)(READ_BIT(ADCx->IER, ADC_IER_EOCALIE_Msk) == ADC_IER_EOCALIE_Msk); +} + +/** + * @brief Enable ADC Analog Watchdog Under Low interrupt + * @rmtoll IER AWD_ULIE FL_ADC_EnableIT_AnalogWDGUnderLow + * @param ADCx ADC instance + * @retval None + */ +__STATIC_INLINE void FL_ADC_EnableIT_AnalogWDGUnderLow(ADC_Type *ADCx) +{ + SET_BIT(ADCx->IER, ADC_IER_AWD_ULIE_Msk); +} + +/** + * @brief Disable ADC Analog Watchdog Under Low interrupt + * @rmtoll IER AWD_ULIE FL_ADC_DisableIT_AnalogWDGUnderLow + * @param ADCx ADC instance + * @retval None + */ +__STATIC_INLINE void FL_ADC_DisableIT_AnalogWDGUnderLow(ADC_Type *ADCx) +{ + CLEAR_BIT(ADCx->IER, ADC_IER_AWD_ULIE_Msk); +} + +/** + * @brief Get ADC Analog Watchdog Under Low interrupt Enable Status + * @rmtoll IER AWD_ULIE FL_ADC_IsEnabledIT_AnalogWDGUnderLow + * @param ADCx ADC instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ADC_IsEnabledIT_AnalogWDGUnderLow(ADC_Type *ADCx) +{ + return (uint32_t)(READ_BIT(ADCx->IER, ADC_IER_AWD_ULIE_Msk) == ADC_IER_AWD_ULIE_Msk); +} + +/** + * @brief Enable ADC Analog Watchdog Above High interrupt + * @rmtoll IER AWD_AHIE FL_ADC_EnableIT_AnalogWDGAboveHigh + * @param ADCx ADC instance + * @retval None + */ +__STATIC_INLINE void FL_ADC_EnableIT_AnalogWDGAboveHigh(ADC_Type *ADCx) +{ + SET_BIT(ADCx->IER, ADC_IER_AWD_AHIE_Msk); +} + +/** + * @brief Disable ADC Analog Watchdog Above High interrupt + * @rmtoll IER AWD_AHIE FL_ADC_DisableIT_AnalogWDGAboveHigh + * @param ADCx ADC instance + * @retval None + */ +__STATIC_INLINE void FL_ADC_DisableIT_AnalogWDGAboveHigh(ADC_Type *ADCx) +{ + CLEAR_BIT(ADCx->IER, ADC_IER_AWD_AHIE_Msk); +} + +/** + * @brief Get ADC Analog Watchdog Above High interrupt Enable Status + * @rmtoll IER AWD_AHIE FL_ADC_IsEnabledIT_AnalogWDGAboveHigh + * @param ADCx ADC instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ADC_IsEnabledIT_AnalogWDGAboveHigh(ADC_Type *ADCx) +{ + return (uint32_t)(READ_BIT(ADCx->IER, ADC_IER_AWD_AHIE_Msk) == ADC_IER_AWD_AHIE_Msk); +} + +/** + * @brief Enable ADC + * @rmtoll CR1 ADEN FL_ADC_Enable + * @param ADCx ADC instance + * @retval None + */ +__STATIC_INLINE void FL_ADC_Enable(ADC_Type *ADCx) +{ + SET_BIT(ADCx->CR1, ADC_CR1_ADEN_Msk); +} + +/** + * @brief Disable ADC + * @rmtoll CR1 ADEN FL_ADC_Disable + * @param ADCx ADC instance + * @retval None + */ +__STATIC_INLINE void FL_ADC_Disable(ADC_Type *ADCx) +{ + CLEAR_BIT(ADCx->CR1, ADC_CR1_ADEN_Msk); +} + +/** + * @brief Get ADC Enable Status + * @rmtoll CR1 ADEN FL_ADC_IsEnabled + * @param ADCx ADC instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ADC_IsEnabled(ADC_Type *ADCx) +{ + return (uint32_t)(READ_BIT(ADCx->CR1, ADC_CR1_ADEN_Msk) == ADC_CR1_ADEN_Msk); +} + +/** + * @brief Enable ADC Sofeware Triggered Conversion + * @rmtoll CR1 SWTRIG FL_ADC_EnableSWConversion + * @param ADCx ADC instance + * @retval None + */ +__STATIC_INLINE void FL_ADC_EnableSWConversion(ADC_Type *ADCx) +{ + SET_BIT(ADCx->CR1, ADC_CR1_SWTRIG_Msk); +} + +/** + * @brief Set ADC Trigger Edge + * @rmtoll CR2 TRGCFG FL_ADC_SetTriggerEdge + * @param ADCx ADC instance + * @param edge This parameter can be one of the following values: + * @arg @ref FL_ADC_TRIGGER_EDGE_NONE + * @arg @ref FL_ADC_TRIGGER_EDGE_RISING + * @arg @ref FL_ADC_TRIGGER_EDGE_FALLING + * @arg @ref FL_ADC_TRIGGER_EDGE_BOTH + * @retval None + */ +__STATIC_INLINE void FL_ADC_SetTriggerEdge(ADC_Type *ADCx, uint32_t edge) +{ + MODIFY_REG(ADCx->CR2, ADC_CR2_TRGCFG_Msk, edge); +} + +/** + * @brief Read ADC Trigger Edge + * @rmtoll CR2 TRGCFG FL_ADC_GetTriggerEdge + * @param ADCx ADC instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_ADC_TRIGGER_EDGE_NONE + * @arg @ref FL_ADC_TRIGGER_EDGE_RISING + * @arg @ref FL_ADC_TRIGGER_EDGE_FALLING + * @arg @ref FL_ADC_TRIGGER_EDGE_BOTH + */ +__STATIC_INLINE uint32_t FL_ADC_GetTriggerEdge(ADC_Type *ADCx) +{ + return (uint32_t)(READ_BIT(ADCx->CR2, ADC_CR2_TRGCFG_Msk)); +} + +/** + * @brief Enable ADC Calibration + * @rmtoll CALR CALEN FL_ADC_EnableCalibration + * @param ADCx ADC instance + * @retval None + */ +__STATIC_INLINE void FL_ADC_EnableCalibration(ADC_Type *ADCx) +{ + SET_BIT(ADCx->CALR, ADC_CALR_CALEN_Msk); +} + +/** + * @brief Disable ADC Calibration + * @rmtoll CALR CALEN FL_ADC_DisableCalibration + * @param ADCx ADC instance + * @retval None + */ +__STATIC_INLINE void FL_ADC_DisableCalibration(ADC_Type *ADCx) +{ + CLEAR_BIT(ADCx->CALR, ADC_CALR_CALEN_Msk); +} + +/** + * @brief Get ADC Calibration Enable Status + * @rmtoll CALR CALEN FL_ADC_IsEnabledCalibration + * @param ADCx ADC instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ADC_IsEnabledCalibration(ADC_Type *ADCx) +{ + return (uint32_t)(READ_BIT(ADCx->CALR, ADC_CALR_CALEN_Msk) == ADC_CALR_CALEN_Msk); +} + +/** + * @brief Set ADC Reference Source + * @rmtoll CFGR1 PEFSEL FL_ADC_SetReferenceSource + * @param ADCx ADC instance + * @param ref This parameter can be one of the following values: + * @arg @ref FL_ADC_REF_SOURCE_VDDA + * @arg @ref FL_ADC_REF_SOURCE_VREFP + * @arg @ref FL_ADC_REF_SOURCE_VDD15 + * @retval None + */ +__STATIC_INLINE void FL_ADC_SetReferenceSource(ADC_Type *ADCx, uint32_t ref) +{ + MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_PEFSEL_Msk, ref); +} + +/** + * @brief Read ADC Reference Source + * @rmtoll CFGR1 PEFSEL FL_ADC_GetReferenceSource + * @param ADCx ADC instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_ADC_REF_SOURCE_VDDA + * @arg @ref FL_ADC_REF_SOURCE_VREFP + * @arg @ref FL_ADC_REF_SOURCE_VDD15 + */ +__STATIC_INLINE uint32_t FL_ADC_GetReferenceSource(ADC_Type *ADCx) +{ + return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC_CFGR1_PEFSEL_Msk)); +} + +/** + * @brief Set ADC Working Clock + * @rmtoll CFGR1 CLKSEL FL_ADC_SetClockSource + * @param ADCx ADC instance + * @param clock This parameter can be one of the following values: + * @arg @ref FL_ADC_CLK_SOURCE_ADCCLK + * @arg @ref FL_ADC_CLK_SOURCE_APBCLK + * @retval None + */ +__STATIC_INLINE void FL_ADC_SetClockSource(ADC_Type *ADCx, uint32_t clock) +{ + MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_CLKSEL_Msk, clock); +} + +/** + * @brief Read ADC Working Clock + * @rmtoll CFGR1 CLKSEL FL_ADC_GetClockSource + * @param ADCx ADC instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_ADC_CLK_SOURCE_ADCCLK + * @arg @ref FL_ADC_CLK_SOURCE_APBCLK + */ +__STATIC_INLINE uint32_t FL_ADC_GetClockSource(ADC_Type *ADCx) +{ + return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC_CFGR1_CLKSEL_Msk)); +} + +/** + * @brief Set ADC Output Bit Width + * @rmtoll CFGR1 BITSEL FL_ADC_SetBitWidth + * @param ADCx ADC instance + * @param bitWidth This parameter can be one of the following values: + * @arg @ref FL_ADC_BIT_WIDTH_12B + * @arg @ref FL_ADC_BIT_WIDTH_10B + * @arg @ref FL_ADC_BIT_WIDTH_8B + * @arg @ref FL_ADC_BIT_WIDTH_6B + * @retval None + */ +__STATIC_INLINE void FL_ADC_SetBitWidth(ADC_Type *ADCx, uint32_t bitWidth) +{ + MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_BITSEL_Msk, bitWidth); +} + +/** + * @brief Read ADC Output Bit Width + * @rmtoll CFGR1 BITSEL FL_ADC_GetBitWidth + * @param ADCx ADC instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_ADC_BIT_WIDTH_12B + * @arg @ref FL_ADC_BIT_WIDTH_10B + * @arg @ref FL_ADC_BIT_WIDTH_8B + * @arg @ref FL_ADC_BIT_WIDTH_6B + */ +__STATIC_INLINE uint32_t FL_ADC_GetBitWidth(ADC_Type *ADCx) +{ + return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC_CFGR1_BITSEL_Msk)); +} + +/** + * @brief Enable ADC External Conversion + * @rmtoll CFGR1 EXSOC FL_ADC_EnableExternalConversion + * @param ADCx ADC instance + * @retval None + */ +__STATIC_INLINE void FL_ADC_EnableExternalConversion(ADC_Type *ADCx) +{ + SET_BIT(ADCx->CFGR1, ADC_CFGR1_EXSOC_Msk); +} + +/** + * @brief Disable ADC External Conversion + * @rmtoll CFGR1 EXSOC FL_ADC_DisableExternalConversion + * @param ADCx ADC instance + * @retval None + */ +__STATIC_INLINE void FL_ADC_DisableExternalConversion(ADC_Type *ADCx) +{ + CLEAR_BIT(ADCx->CFGR1, ADC_CFGR1_EXSOC_Msk); +} + +/** + * @brief Get ADC External Conversion Enable Status + * @rmtoll CFGR1 EXSOC FL_ADC_IsEnabledExternalConversion + * @param ADCx ADC instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ADC_IsEnabledExternalConversion(ADC_Type *ADCx) +{ + return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC_CFGR1_EXSOC_Msk) == ADC_CFGR1_EXSOC_Msk); +} + +/** + * @brief Set ADC APBCLK Prescaler + * @rmtoll CFGR1 APBCLK_PSC FL_ADC_SetAPBPrescaler + * @param ADCx ADC instance + * @param psc This parameter can be one of the following values: + * @arg @ref FL_ADC_APBCLK_PSC_DIV1 + * @arg @ref FL_ADC_APBCLK_PSC_DIV2 + * @arg @ref FL_ADC_APBCLK_PSC_DIV4 + * @arg @ref FL_ADC_APBCLK_PSC_DIV8 + * @retval None + */ +__STATIC_INLINE void FL_ADC_SetAPBPrescaler(ADC_Type *ADCx, uint32_t psc) +{ + MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_APBCLK_PSC_Msk, psc); +} + +/** + * @brief Read ADC APBCLK Prescaler + * @rmtoll CFGR1 APBCLK_PSC FL_ADC_GetAPBPrescaler + * @param ADCx ADC instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_ADC_APBCLK_PSC_DIV1 + * @arg @ref FL_ADC_APBCLK_PSC_DIV2 + * @arg @ref FL_ADC_APBCLK_PSC_DIV4 + * @arg @ref FL_ADC_APBCLK_PSC_DIV8 + */ +__STATIC_INLINE uint32_t FL_ADC_GetAPBPrescaler(ADC_Type *ADCx) +{ + return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC_CFGR1_APBCLK_PSC_Msk)); +} + +/** + * @brief Enable ADC Buffer + * @rmtoll CFGR1 BUFEN FL_ADC_EnableBuffer + * @param ADCx ADC instance + * @retval None + */ +__STATIC_INLINE void FL_ADC_EnableBuffer(ADC_Type *ADCx) +{ + SET_BIT(ADCx->CFGR1, ADC_CFGR1_BUFEN_Msk); +} + +/** + * @brief Disable ADC Buffer + * @rmtoll CFGR1 BUFEN FL_ADC_DisableBuffer + * @param ADCx ADC instance + * @retval None + */ +__STATIC_INLINE void FL_ADC_DisableBuffer(ADC_Type *ADCx) +{ + CLEAR_BIT(ADCx->CFGR1, ADC_CFGR1_BUFEN_Msk); +} + +/** + * @brief Get ADC Buffer Enable Status + * @rmtoll CFGR1 BUFEN FL_ADC_IsEnabledBuffer + * @param ADCx ADC instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ADC_IsEnabledBuffer(ADC_Type *ADCx) +{ + return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC_CFGR1_BUFEN_Msk) == ADC_CFGR1_BUFEN_Msk); +} + +/** + * @brief Set ADC Buffer Power Mode + * @rmtoll CFGR1 BUFMOD FL_ADC_SetBufferPowerMode + * @param ADCx ADC instance + * @param mode This parameter can be one of the following values: + * @arg @ref FL_ADC_BUFF_POWER_MODE_NORMAL + * @arg @ref FL_ADC_BUFF_POWER_MODE_LOW + * @retval None + */ +__STATIC_INLINE void FL_ADC_SetBufferPowerMode(ADC_Type *ADCx, uint32_t mode) +{ + MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_BUFMOD_Msk, mode); +} + +/** + * @brief Read ADC Buffer Power Mode + * @rmtoll CFGR1 BUFMOD FL_ADC_GetBufferPowerMode + * @param ADCx ADC instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_ADC_BUFF_POWER_MODE_NORMAL + * @arg @ref FL_ADC_BUFF_POWER_MODE_LOW + */ +__STATIC_INLINE uint32_t FL_ADC_GetBufferPowerMode(ADC_Type *ADCx) +{ + return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC_CFGR1_BUFMOD_Msk)); +} + +/** + * @brief Set ADC Buffer Filter Mode + * @rmtoll CFGR1 BUFLPF FL_ADC_SetBufferFilterMode + * @param ADCx ADC instance + * @param mode This parameter can be one of the following values: + * @arg @ref FL_ADC_BUFF_FILTER_MODE_NORMAL + * @arg @ref FL_ADC_BUFF_FILTER_MODE_LOWPASS + * @retval None + */ +__STATIC_INLINE void FL_ADC_SetBufferFilterMode(ADC_Type *ADCx, uint32_t mode) +{ + MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_BUFLPF_Msk, mode); +} + +/** + * @brief Read ADC Buffer Filter Mode + * @rmtoll CFGR1 BUFLPF FL_ADC_GetBufferFilterMode + * @param ADCx ADC instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_ADC_BUFF_FILTER_MODE_NORMAL + * @arg @ref FL_ADC_BUFF_FILTER_MODE_LOWPASS + */ +__STATIC_INLINE uint32_t FL_ADC_GetBufferFilterMode(ADC_Type *ADCx) +{ + return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC_CFGR1_BUFLPF_Msk)); +} + +/** + * @brief Enable ADC Buffer Chopper + * @rmtoll CFGR1 BUFCHP_EN FL_ADC_EnableBufferChopper + * @param ADCx ADC instance + * @retval None + */ +__STATIC_INLINE void FL_ADC_EnableBufferChopper(ADC_Type *ADCx) +{ + SET_BIT(ADCx->CFGR1, ADC_CFGR1_BUFCHP_EN_Msk); +} + +/** + * @brief Disable ADC Buffer Chopper + * @rmtoll CFGR1 BUFCHP_EN FL_ADC_DisableBufferChopper + * @param ADCx ADC instance + * @retval None + */ +__STATIC_INLINE void FL_ADC_DisableBufferChopper(ADC_Type *ADCx) +{ + CLEAR_BIT(ADCx->CFGR1, ADC_CFGR1_BUFCHP_EN_Msk); +} + +/** + * @brief Get ADC Buffer Chopper Enable Status + * @rmtoll CFGR1 BUFCHP_EN FL_ADC_IsEnabledBufferChopper + * @param ADCx ADC instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ADC_IsEnabledBufferChopper(ADC_Type *ADCx) +{ + return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC_CFGR1_BUFCHP_EN_Msk) == ADC_CFGR1_BUFCHP_EN_Msk); +} + +/** + * @brief Enable ADC DMA + * @rmtoll CFGR2 DMAEN FL_ADC_EnableDMAReq + * @param ADCx ADC instance + * @retval None + */ +__STATIC_INLINE void FL_ADC_EnableDMAReq(ADC_Type *ADCx) +{ + SET_BIT(ADCx->CFGR2, ADC_CFGR2_DMAEN_Msk); +} + +/** + * @brief Disable ADC DMA + * @rmtoll CFGR2 DMAEN FL_ADC_DisableDMAReq + * @param ADCx ADC instance + * @retval None + */ +__STATIC_INLINE void FL_ADC_DisableDMAReq(ADC_Type *ADCx) +{ + CLEAR_BIT(ADCx->CFGR2, ADC_CFGR2_DMAEN_Msk); +} + +/** + * @brief Get ADC DMA Enable Status + * @rmtoll CFGR2 DMAEN FL_ADC_IsEnabledDMAReq + * @param ADCx ADC instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ADC_IsEnabledDMAReq(ADC_Type *ADCx) +{ + return (uint32_t)(READ_BIT(ADCx->CFGR2, ADC_CFGR2_DMAEN_Msk) == ADC_CFGR2_DMAEN_Msk); +} + +/** + * @brief Set ADC Channel Scan Direction + * @rmtoll CFGR2 SCANDIR FL_ADC_SetSequenceScanDirection + * @param ADCx ADC instance + * @param dir This parameter can be one of the following values: + * @arg @ref FL_ADC_SEQ_SCAN_DIR_FORWARD + * @arg @ref FL_ADC_SEQ_SCAN_DIR_BACKWARD + * @retval None + */ +__STATIC_INLINE void FL_ADC_SetSequenceScanDirection(ADC_Type *ADCx, uint32_t dir) +{ + MODIFY_REG(ADCx->CFGR2, ADC_CFGR2_SCANDIR_Msk, dir); +} + +/** + * @brief Get ADC Channel Scan Direction + * @rmtoll CFGR2 SCANDIR FL_ADC_GetSequenceScanDirection + * @param ADCx ADC instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_ADC_SEQ_SCAN_DIR_FORWARD + * @arg @ref FL_ADC_SEQ_SCAN_DIR_BACKWARD + */ +__STATIC_INLINE uint32_t FL_ADC_GetSequenceScanDirection(ADC_Type *ADCx) +{ + return (uint32_t)(READ_BIT(ADCx->CFGR2, ADC_CFGR2_SCANDIR_Msk)); +} + +/** + * @brief Set ADC Trigger Source + * @rmtoll CFGR2 EXTS FL_ADC_SetTriggerSource + * @param ADCx ADC instance + * @param source This parameter can be one of the following values: + * @arg @ref FL_ADC_TRGI_LUT0 + * @arg @ref FL_ADC_TRGI_LUT1 + * @arg @ref FL_ADC_TRGI_LUT2 + * @arg @ref FL_ADC_TRGI_ATIM + * @arg @ref FL_ADC_TRGI_GPTIM1 + * @arg @ref FL_ADC_TRGI_GPTIM2 + * @arg @ref FL_ADC_TRGI_BSTIM16 + * @arg @ref FL_ADC_TRGI_LPTIM16 + * @arg @ref FL_ADC_TRGI_COMP1 + * @arg @ref FL_ADC_TRGI_COMP2 + * @arg @ref FL_ADC_TRGI_RTCA + * @arg @ref FL_ADC_TRGI_LUT3 + * @arg @ref FL_ADC_TRGI_GPTIM0 + * @arg @ref FL_ADC_TRGI_COMP3 + * @retval None + */ +__STATIC_INLINE void FL_ADC_SetTriggerSource(ADC_Type *ADCx, uint32_t source) +{ + MODIFY_REG(ADCx->CFGR2, ADC_CFGR2_EXTS_Msk, source); +} + +/** + * @brief Get ADC Trigger Source + * @rmtoll CFGR2 EXTS FL_ADC_GetTriggerSource + * @param ADCx ADC instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_ADC_TRGI_LUT0 + * @arg @ref FL_ADC_TRGI_LUT1 + * @arg @ref FL_ADC_TRGI_LUT2 + * @arg @ref FL_ADC_TRGI_ATIM + * @arg @ref FL_ADC_TRGI_GPTIM1 + * @arg @ref FL_ADC_TRGI_GPTIM2 + * @arg @ref FL_ADC_TRGI_BSTIM16 + * @arg @ref FL_ADC_TRGI_LPTIM16 + * @arg @ref FL_ADC_TRGI_COMP1 + * @arg @ref FL_ADC_TRGI_COMP2 + * @arg @ref FL_ADC_TRGI_RTCA + * @arg @ref FL_ADC_TRGI_LUT3 + * @arg @ref FL_ADC_TRGI_GPTIM0 + * @arg @ref FL_ADC_TRGI_COMP3 + */ +__STATIC_INLINE uint32_t FL_ADC_GetTriggerSource(ADC_Type *ADCx) +{ + return (uint32_t)(READ_BIT(ADCx->CFGR2, ADC_CFGR2_EXTS_Msk)); +} + +/** + * @brief Enable ADC Overrun Mode + * @rmtoll CFGR2 OVRM FL_ADC_EnableOverrunMode + * @param ADCx ADC instance + * @retval None + */ +__STATIC_INLINE void FL_ADC_EnableOverrunMode(ADC_Type *ADCx) +{ + SET_BIT(ADCx->CFGR2, ADC_CFGR2_OVRM_Msk); +} + +/** + * @brief Disable ADC Overrun Mode + * @rmtoll CFGR2 OVRM FL_ADC_DisableOverrunMode + * @param ADCx ADC instance + * @retval None + */ +__STATIC_INLINE void FL_ADC_DisableOverrunMode(ADC_Type *ADCx) +{ + CLEAR_BIT(ADCx->CFGR2, ADC_CFGR2_OVRM_Msk); +} + +/** + * @brief Get ADC Overrun Mode Enable Status + * @rmtoll CFGR2 OVRM FL_ADC_IsEnabledOverrunMode + * @param ADCx ADC instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ADC_IsEnabledOverrunMode(ADC_Type *ADCx) +{ + return (uint32_t)(READ_BIT(ADCx->CFGR2, ADC_CFGR2_OVRM_Msk) == ADC_CFGR2_OVRM_Msk); +} + +/** + * @brief Set ADC Conversion Mode + * @rmtoll CFGR2 CONT FL_ADC_SetConversionMode + * @param ADCx ADC instance + * @param mode This parameter can be one of the following values: + * @arg @ref FL_ADC_CONV_MODE_SINGLE + * @arg @ref FL_ADC_CONV_MODE_CONTINUOUS + * @retval None + */ +__STATIC_INLINE void FL_ADC_SetConversionMode(ADC_Type *ADCx, uint32_t mode) +{ + MODIFY_REG(ADCx->CFGR2, ADC_CFGR2_CONT_Msk, mode); +} + +/** + * @brief Get ADC Conversion Mode + * @rmtoll CFGR2 CONT FL_ADC_GetConversionMode + * @param ADCx ADC instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_ADC_CONV_MODE_SINGLE + * @arg @ref FL_ADC_CONV_MODE_CONTINUOUS + */ +__STATIC_INLINE uint32_t FL_ADC_GetConversionMode(ADC_Type *ADCx) +{ + return (uint32_t)(READ_BIT(ADCx->CFGR2, ADC_CFGR2_CONT_Msk)); +} + +/** + * @brief Enable ADC Wait Mode + * @rmtoll CFGR2 WAIT FL_ADC_EnableWaitMode + * @param ADCx ADC instance + * @retval None + */ +__STATIC_INLINE void FL_ADC_EnableWaitMode(ADC_Type *ADCx) +{ + SET_BIT(ADCx->CFGR2, ADC_CFGR2_WAIT_Msk); +} + +/** + * @brief Disable ADC Wait Mode + * @rmtoll CFGR2 WAIT FL_ADC_DisableWaitMode + * @param ADCx ADC instance + * @retval None + */ +__STATIC_INLINE void FL_ADC_DisableWaitMode(ADC_Type *ADCx) +{ + CLEAR_BIT(ADCx->CFGR2, ADC_CFGR2_WAIT_Msk); +} + +/** + * @brief Get ADC Wait Mode Enable Status + * @rmtoll CFGR2 WAIT FL_ADC_IsEnabledWaitMode + * @param ADCx ADC instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ADC_IsEnabledWaitMode(ADC_Type *ADCx) +{ + return (uint32_t)(READ_BIT(ADCx->CFGR2, ADC_CFGR2_WAIT_Msk) == ADC_CFGR2_WAIT_Msk); +} + +/** + * @brief Set ADC Single Conversion Mode + * @rmtoll CFGR2 SEMI FL_ADC_SetSingleConversionAutoMode + * @param ADCx ADC instance + * @param mode This parameter can be one of the following values: + * @arg @ref FL_ADC_SINGLE_CONV_MODE_AUTO + * @arg @ref FL_ADC_SINGLE_CONV_MODE_SEMIAUTO + * @retval None + */ +__STATIC_INLINE void FL_ADC_SetSingleConversionAutoMode(ADC_Type *ADCx, uint32_t mode) +{ + MODIFY_REG(ADCx->CFGR2, ADC_CFGR2_SEMI_Msk, mode); +} + +/** + * @brief Get ADC Single Conversion Mode + * @rmtoll CFGR2 SEMI FL_ADC_GetSingleConversionAutoMode + * @param ADCx ADC instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_ADC_SINGLE_CONV_MODE_AUTO + * @arg @ref FL_ADC_SINGLE_CONV_MODE_SEMIAUTO + */ +__STATIC_INLINE uint32_t FL_ADC_GetSingleConversionAutoMode(ADC_Type *ADCx) +{ + return (uint32_t)(READ_BIT(ADCx->CFGR2, ADC_CFGR2_SEMI_Msk)); +} + +/** + * @brief Enable ADC Trigger Filter + * @rmtoll CFGR2 IOTRFEN FL_ADC_EnableTriggerFilter + * @param ADCx ADC instance + * @retval None + */ +__STATIC_INLINE void FL_ADC_EnableTriggerFilter(ADC_Type *ADCx) +{ + SET_BIT(ADCx->CFGR2, ADC_CFGR2_IOTRFEN_Msk); +} + +/** + * @brief Disable ADC Trigger Filter + * @rmtoll CFGR2 IOTRFEN FL_ADC_DisableTriggerFilter + * @param ADCx ADC instance + * @retval None + */ +__STATIC_INLINE void FL_ADC_DisableTriggerFilter(ADC_Type *ADCx) +{ + CLEAR_BIT(ADCx->CFGR2, ADC_CFGR2_IOTRFEN_Msk); +} + +/** + * @brief Get ADC Trigger Filter Enable Status + * @rmtoll CFGR2 IOTRFEN FL_ADC_IsEnabledTriggerFilter + * @param ADCx ADC instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ADC_IsEnabledTriggerFilter(ADC_Type *ADCx) +{ + return (uint32_t)(READ_BIT(ADCx->CFGR2, ADC_CFGR2_IOTRFEN_Msk) == ADC_CFGR2_IOTRFEN_Msk); +} + +/** + * @brief Enable ADC OverSampling + * @rmtoll CFGR2 OVSEN FL_ADC_EnableOverSampling + * @param ADCx ADC instance + * @retval None + */ +__STATIC_INLINE void FL_ADC_EnableOverSampling(ADC_Type *ADCx) +{ + SET_BIT(ADCx->CFGR2, ADC_CFGR2_OVSEN_Msk); +} + +/** + * @brief Disable ADC OverSampling + * @rmtoll CFGR2 OVSEN FL_ADC_DisableOverSampling + * @param ADCx ADC instance + * @retval None + */ +__STATIC_INLINE void FL_ADC_DisableOverSampling(ADC_Type *ADCx) +{ + CLEAR_BIT(ADCx->CFGR2, ADC_CFGR2_OVSEN_Msk); +} + +/** + * @brief Get ADC OverSampling Enable Status + * @rmtoll CFGR2 OVSEN FL_ADC_IsEnabledOverSampling + * @param ADCx ADC instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ADC_IsEnabledOverSampling(ADC_Type *ADCx) +{ + return (uint32_t)(READ_BIT(ADCx->CFGR2, ADC_CFGR2_OVSEN_Msk) == ADC_CFGR2_OVSEN_Msk); +} + +/** + * @brief Set ADC OverSampling Multiplier + * @rmtoll CFGR2 OVSR FL_ADC_SetOverSamplingMultiplier + * @param ADCx ADC instance + * @param mul This parameter can be one of the following values: + * @arg @ref FL_ADC_OVERSAMPLING_MUL_2X + * @arg @ref FL_ADC_OVERSAMPLING_MUL_4X + * @arg @ref FL_ADC_OVERSAMPLING_MUL_8X + * @arg @ref FL_ADC_OVERSAMPLING_MUL_16X + * @arg @ref FL_ADC_OVERSAMPLING_MUL_32X + * @arg @ref FL_ADC_OVERSAMPLING_MUL_64X + * @arg @ref FL_ADC_OVERSAMPLING_MUL_128X + * @arg @ref FL_ADC_OVERSAMPLING_MUL_256X + * @retval None + */ +__STATIC_INLINE void FL_ADC_SetOverSamplingMultiplier(ADC_Type *ADCx, uint32_t mul) +{ + MODIFY_REG(ADCx->CFGR2, ADC_CFGR2_OVSR_Msk, mul); +} + +/** + * @brief Read ADC OverSampling Multiplier + * @rmtoll CFGR2 OVSR FL_ADC_GetOverSamplingMultiplier + * @param ADCx ADC instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_ADC_OVERSAMPLING_MUL_2X + * @arg @ref FL_ADC_OVERSAMPLING_MUL_4X + * @arg @ref FL_ADC_OVERSAMPLING_MUL_8X + * @arg @ref FL_ADC_OVERSAMPLING_MUL_16X + * @arg @ref FL_ADC_OVERSAMPLING_MUL_32X + * @arg @ref FL_ADC_OVERSAMPLING_MUL_64X + * @arg @ref FL_ADC_OVERSAMPLING_MUL_128X + * @arg @ref FL_ADC_OVERSAMPLING_MUL_256X + */ +__STATIC_INLINE uint32_t FL_ADC_GetOverSamplingMultiplier(ADC_Type *ADCx) +{ + return (uint32_t)(READ_BIT(ADCx->CFGR2, ADC_CFGR2_OVSR_Msk)); +} + +/** + * @brief Set ADC OverSampling Shift + * @rmtoll CFGR2 OVSS FL_ADC_SetOverSamplingShift + * @param ADCx ADC instance + * @param shift This parameter can be one of the following values: + * @arg @ref FL_ADC_OVERSAMPLING_SHIFT_0B + * @arg @ref FL_ADC_OVERSAMPLING_SHIFT_1B + * @arg @ref FL_ADC_OVERSAMPLING_SHIFT_2B + * @arg @ref FL_ADC_OVERSAMPLING_SHIFT_3B + * @arg @ref FL_ADC_OVERSAMPLING_SHIFT_4B + * @arg @ref FL_ADC_OVERSAMPLING_SHIFT_5B + * @arg @ref FL_ADC_OVERSAMPLING_SHIFT_6B + * @arg @ref FL_ADC_OVERSAMPLING_SHIFT_7B + * @arg @ref FL_ADC_OVERSAMPLING_SHIFT_8B + * @retval None + */ +__STATIC_INLINE void FL_ADC_SetOverSamplingShift(ADC_Type *ADCx, uint32_t shift) +{ + MODIFY_REG(ADCx->CFGR2, ADC_CFGR2_OVSS_Msk, shift); +} + +/** + * @brief Read ADC OverSampling Shift + * @rmtoll CFGR2 OVSS FL_ADC_GetOverSamplingShift + * @param ADCx ADC instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_ADC_OVERSAMPLING_SHIFT_0B + * @arg @ref FL_ADC_OVERSAMPLING_SHIFT_1B + * @arg @ref FL_ADC_OVERSAMPLING_SHIFT_2B + * @arg @ref FL_ADC_OVERSAMPLING_SHIFT_3B + * @arg @ref FL_ADC_OVERSAMPLING_SHIFT_4B + * @arg @ref FL_ADC_OVERSAMPLING_SHIFT_5B + * @arg @ref FL_ADC_OVERSAMPLING_SHIFT_6B + * @arg @ref FL_ADC_OVERSAMPLING_SHIFT_7B + * @arg @ref FL_ADC_OVERSAMPLING_SHIFT_8B + */ +__STATIC_INLINE uint32_t FL_ADC_GetOverSamplingShift(ADC_Type *ADCx) +{ + return (uint32_t)(READ_BIT(ADCx->CFGR2, ADC_CFGR2_OVSS_Msk)); +} + +/** + * @brief Enable ADC Analog WDG + * @rmtoll CFGR2 AWDEN FL_ADC_EnableAnalogWDG + * @param ADCx ADC instance + * @retval None + */ +__STATIC_INLINE void FL_ADC_EnableAnalogWDG(ADC_Type *ADCx) +{ + SET_BIT(ADCx->CFGR2, ADC_CFGR2_AWDEN_Msk); +} + +/** + * @brief Disable ADC Analog WDG + * @rmtoll CFGR2 AWDEN FL_ADC_DisableAnalogWDG + * @param ADCx ADC instance + * @retval None + */ +__STATIC_INLINE void FL_ADC_DisableAnalogWDG(ADC_Type *ADCx) +{ + CLEAR_BIT(ADCx->CFGR2, ADC_CFGR2_AWDEN_Msk); +} + +/** + * @brief Get ADC Analog WDG Enable Status + * @rmtoll CFGR2 AWDEN FL_ADC_IsEnabledAnalogWDG + * @param ADCx ADC instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ADC_IsEnabledAnalogWDG(ADC_Type *ADCx) +{ + return (uint32_t)(READ_BIT(ADCx->CFGR2, ADC_CFGR2_AWDEN_Msk) == ADC_CFGR2_AWDEN_Msk); +} + +/** + * @brief Set ADC Analog WDG Monitor Mode + * @rmtoll CFGR2 AWDSC FL_ADC_SetAnalogWDGMonitorMode + * @param ADCx ADC instance + * @param mode This parameter can be one of the following values: + * @arg @ref FL_ADC_AWDG_ALL_CHANNEL + * @arg @ref FL_ADC_AWDG_SINGLE_CHANNEL + * @retval None + */ +__STATIC_INLINE void FL_ADC_SetAnalogWDGMonitorMode(ADC_Type *ADCx, uint32_t mode) +{ + MODIFY_REG(ADCx->CFGR2, ADC_CFGR2_AWDSC_Msk, mode); +} + +/** + * @brief Read ADC Analog WDG Monitor Mode + * @rmtoll CFGR2 AWDSC FL_ADC_GetAnalogWDGMonitorMode + * @param ADCx ADC instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_ADC_AWDG_ALL_CHANNEL + * @arg @ref FL_ADC_AWDG_SINGLE_CHANNEL + */ +__STATIC_INLINE uint32_t FL_ADC_GetAnalogWDGMonitorMode(ADC_Type *ADCx) +{ + return (uint32_t)(READ_BIT(ADCx->CFGR2, ADC_CFGR2_AWDSC_Msk)); +} + +/** + * @brief Set ADC Analog WDG Monitor Channel + * @rmtoll CFGR2 AWDCH FL_ADC_SetAnalogWDGMonitorChannel + * @param ADCx ADC instance + * @param monitorChannel This parameter can be one of the following values: + * @arg @ref FL_ADC_AWDG_CH0 + * @arg @ref FL_ADC_AWDG_CH1 + * @arg @ref FL_ADC_AWDG_CH2 + * @arg @ref FL_ADC_AWDG_CH3 + * @arg @ref FL_ADC_AWDG_CH4 + * @arg @ref FL_ADC_AWDG_CH5 + * @arg @ref FL_ADC_AWDG_CH6 + * @arg @ref FL_ADC_AWDG_CH7 + * @arg @ref FL_ADC_AWDG_CH8 + * @arg @ref FL_ADC_AWDG_CH9 + * @arg @ref FL_ADC_AWDG_CH10 + * @arg @ref FL_ADC_AWDG_CH11 + * @arg @ref FL_ADC_AWDG_CH12 + * @arg @ref FL_ADC_AWDG_CH13 + * @arg @ref FL_ADC_AWDG_CH14 + * @arg @ref FL_ADC_AWDG_CH15 + * @arg @ref FL_ADC_AWDG_CH16 + * @arg @ref FL_ADC_AWDG_CH17 + * @arg @ref FL_ADC_AWDG_CH18 + * @arg @ref FL_ADC_AWDG_CH19 + * @retval None + */ +__STATIC_INLINE void FL_ADC_SetAnalogWDGMonitorChannel(ADC_Type *ADCx, uint32_t monitorChannel) +{ + MODIFY_REG(ADCx->CFGR2, ADC_CFGR2_AWDCH_Msk, monitorChannel); +} + +/** + * @brief Read ADC Analog WDG Monitor Channel + * @rmtoll CFGR2 AWDCH FL_ADC_GetAnalogWDGMonitorChannel + * @param ADCx ADC instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_ADC_AWDG_CH0 + * @arg @ref FL_ADC_AWDG_CH1 + * @arg @ref FL_ADC_AWDG_CH2 + * @arg @ref FL_ADC_AWDG_CH3 + * @arg @ref FL_ADC_AWDG_CH4 + * @arg @ref FL_ADC_AWDG_CH5 + * @arg @ref FL_ADC_AWDG_CH6 + * @arg @ref FL_ADC_AWDG_CH7 + * @arg @ref FL_ADC_AWDG_CH8 + * @arg @ref FL_ADC_AWDG_CH9 + * @arg @ref FL_ADC_AWDG_CH10 + * @arg @ref FL_ADC_AWDG_CH11 + * @arg @ref FL_ADC_AWDG_CH12 + * @arg @ref FL_ADC_AWDG_CH13 + * @arg @ref FL_ADC_AWDG_CH14 + * @arg @ref FL_ADC_AWDG_CH15 + * @arg @ref FL_ADC_AWDG_CH16 + * @arg @ref FL_ADC_AWDG_CH17 + * @arg @ref FL_ADC_AWDG_CH18 + * @arg @ref FL_ADC_AWDG_CH19 + */ +__STATIC_INLINE uint32_t FL_ADC_GetAnalogWDGMonitorChannel(ADC_Type *ADCx) +{ + return (uint32_t)(READ_BIT(ADCx->CFGR2, ADC_CFGR2_AWDCH_Msk)); +} + +/** + * @brief Set ADC Slow Channel Sampling Time + * @rmtoll SMTR SMTS1 FL_ADC_SetSlowChannelSamplingTime + * @param ADCx ADC instance + * @param time This parameter can be one of the following values: + * @arg @ref FL_ADC_SLOW_CH_SAMPLING_TIME_2_ADCCLK + * @arg @ref FL_ADC_SLOW_CH_SAMPLING_TIME_4_ADCCLK + * @arg @ref FL_ADC_SLOW_CH_SAMPLING_TIME_8_ADCCLK + * @arg @ref FL_ADC_SLOW_CH_SAMPLING_TIME_12_ADCCLK + * @arg @ref FL_ADC_SLOW_CH_SAMPLING_TIME_16_ADCCLK + * @arg @ref FL_ADC_SLOW_CH_SAMPLING_TIME_32_ADCCLK + * @arg @ref FL_ADC_SLOW_CH_SAMPLING_TIME_64_ADCCLK + * @arg @ref FL_ADC_SLOW_CH_SAMPLING_TIME_80_ADCCLK + * @arg @ref FL_ADC_SLOW_CH_SAMPLING_TIME_96_ADCCLK + * @arg @ref FL_ADC_SLOW_CH_SAMPLING_TIME_128_ADCCLK + * @arg @ref FL_ADC_SLOW_CH_SAMPLING_TIME_160_ADCCLK + * @arg @ref FL_ADC_SLOW_CH_SAMPLING_TIME_192_ADCCLK + * @arg @ref FL_ADC_SLOW_CH_SAMPLING_TIME_256_ADCCLK + * @arg @ref FL_ADC_SLOW_CH_SAMPLING_TIME_320_ADCCLK + * @arg @ref FL_ADC_SLOW_CH_SAMPLING_TIME_384_ADCCLK + * @arg @ref FL_ADC_SLOW_CH_SAMPLING_TIME_512_ADCCLK + * @retval None + */ +__STATIC_INLINE void FL_ADC_SetSlowChannelSamplingTime(ADC_Type *ADCx, uint32_t time) +{ + MODIFY_REG(ADCx->SMTR, ADC_SMTR_SMTS1_Msk, time); +} + +/** + * @brief Read ADC Slow Channel Sampling Time + * @rmtoll SMTR SMTS1 FL_ADC_GetSlowChannelSamplingTime + * @param ADCx ADC instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_ADC_SLOW_CH_SAMPLING_TIME_2_ADCCLK + * @arg @ref FL_ADC_SLOW_CH_SAMPLING_TIME_4_ADCCLK + * @arg @ref FL_ADC_SLOW_CH_SAMPLING_TIME_8_ADCCLK + * @arg @ref FL_ADC_SLOW_CH_SAMPLING_TIME_12_ADCCLK + * @arg @ref FL_ADC_SLOW_CH_SAMPLING_TIME_16_ADCCLK + * @arg @ref FL_ADC_SLOW_CH_SAMPLING_TIME_32_ADCCLK + * @arg @ref FL_ADC_SLOW_CH_SAMPLING_TIME_64_ADCCLK + * @arg @ref FL_ADC_SLOW_CH_SAMPLING_TIME_80_ADCCLK + * @arg @ref FL_ADC_SLOW_CH_SAMPLING_TIME_96_ADCCLK + * @arg @ref FL_ADC_SLOW_CH_SAMPLING_TIME_128_ADCCLK + * @arg @ref FL_ADC_SLOW_CH_SAMPLING_TIME_160_ADCCLK + * @arg @ref FL_ADC_SLOW_CH_SAMPLING_TIME_192_ADCCLK + * @arg @ref FL_ADC_SLOW_CH_SAMPLING_TIME_256_ADCCLK + * @arg @ref FL_ADC_SLOW_CH_SAMPLING_TIME_320_ADCCLK + * @arg @ref FL_ADC_SLOW_CH_SAMPLING_TIME_384_ADCCLK + * @arg @ref FL_ADC_SLOW_CH_SAMPLING_TIME_512_ADCCLK + */ +__STATIC_INLINE uint32_t FL_ADC_GetSlowChannelSamplingTime(ADC_Type *ADCx) +{ + return (uint32_t)(READ_BIT(ADCx->SMTR, ADC_SMTR_SMTS1_Msk)); +} + +/** + * @brief Set ADC Fast Channel Sampling Time + * @rmtoll SMTR SMTS2 FL_ADC_SetFastChannelSamplingTime + * @param ADCx ADC instance + * @param time This parameter can be one of the following values: + * @arg @ref FL_ADC_FAST_CH_SAMPLING_TIME_2_ADCCLK + * @arg @ref FL_ADC_FAST_CH_SAMPLING_TIME_4_ADCCLK + * @arg @ref FL_ADC_FAST_CH_SAMPLING_TIME_8_ADCCLK + * @arg @ref FL_ADC_FAST_CH_SAMPLING_TIME_12_ADCCLK + * @arg @ref FL_ADC_FAST_CH_SAMPLING_TIME_16_ADCCLK + * @arg @ref FL_ADC_FAST_CH_SAMPLING_TIME_32_ADCCLK + * @arg @ref FL_ADC_FAST_CH_SAMPLING_TIME_64_ADCCLK + * @arg @ref FL_ADC_FAST_CH_SAMPLING_TIME_80_ADCCLK + * @arg @ref FL_ADC_FAST_CH_SAMPLING_TIME_96_ADCCLK + * @arg @ref FL_ADC_FAST_CH_SAMPLING_TIME_128_ADCCLK + * @arg @ref FL_ADC_FAST_CH_SAMPLING_TIME_160_ADCCLK + * @arg @ref FL_ADC_FAST_CH_SAMPLING_TIME_192_ADCCLK + * @arg @ref FL_ADC_FAST_CH_SAMPLING_TIME_256_ADCCLK + * @arg @ref FL_ADC_FAST_CH_SAMPLING_TIME_320_ADCCLK + * @arg @ref FL_ADC_FAST_CH_SAMPLING_TIME_384_ADCCLK + * @arg @ref FL_ADC_FAST_CH_SAMPLING_TIME_512_ADCCLK + * @retval None + */ +__STATIC_INLINE void FL_ADC_SetFastChannelSamplingTime(ADC_Type *ADCx, uint32_t time) +{ + MODIFY_REG(ADCx->SMTR, ADC_SMTR_SMTS2_Msk, time); +} + +/** + * @brief Read ADC Fast Channel Sampling Time + * @rmtoll SMTR SMTS2 FL_ADC_GetFastChannelSamplingTime + * @param ADCx ADC instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_ADC_FAST_CH_SAMPLING_TIME_2_ADCCLK + * @arg @ref FL_ADC_FAST_CH_SAMPLING_TIME_4_ADCCLK + * @arg @ref FL_ADC_FAST_CH_SAMPLING_TIME_8_ADCCLK + * @arg @ref FL_ADC_FAST_CH_SAMPLING_TIME_12_ADCCLK + * @arg @ref FL_ADC_FAST_CH_SAMPLING_TIME_16_ADCCLK + * @arg @ref FL_ADC_FAST_CH_SAMPLING_TIME_32_ADCCLK + * @arg @ref FL_ADC_FAST_CH_SAMPLING_TIME_64_ADCCLK + * @arg @ref FL_ADC_FAST_CH_SAMPLING_TIME_80_ADCCLK + * @arg @ref FL_ADC_FAST_CH_SAMPLING_TIME_96_ADCCLK + * @arg @ref FL_ADC_FAST_CH_SAMPLING_TIME_128_ADCCLK + * @arg @ref FL_ADC_FAST_CH_SAMPLING_TIME_160_ADCCLK + * @arg @ref FL_ADC_FAST_CH_SAMPLING_TIME_192_ADCCLK + * @arg @ref FL_ADC_FAST_CH_SAMPLING_TIME_256_ADCCLK + * @arg @ref FL_ADC_FAST_CH_SAMPLING_TIME_320_ADCCLK + * @arg @ref FL_ADC_FAST_CH_SAMPLING_TIME_384_ADCCLK + * @arg @ref FL_ADC_FAST_CH_SAMPLING_TIME_512_ADCCLK + */ +__STATIC_INLINE uint32_t FL_ADC_GetFastChannelSamplingTime(ADC_Type *ADCx) +{ + return (uint32_t)(READ_BIT(ADCx->SMTR, ADC_SMTR_SMTS2_Msk)); +} + +/** + * @brief Enable ADC Channel + * @rmtoll CHER FL_ADC_EnableSequencerChannel + * @param ADCx ADC instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_ADC_EXTERNAL_CH0 + * @arg @ref FL_ADC_EXTERNAL_CH1 + * @arg @ref FL_ADC_EXTERNAL_CH2 + * @arg @ref FL_ADC_EXTERNAL_CH3 + * @arg @ref FL_ADC_EXTERNAL_CH4 + * @arg @ref FL_ADC_EXTERNAL_CH5 + * @arg @ref FL_ADC_EXTERNAL_CH6 + * @arg @ref FL_ADC_EXTERNAL_CH7 + * @arg @ref FL_ADC_EXTERNAL_CH8 + * @arg @ref FL_ADC_EXTERNAL_CH9 + * @arg @ref FL_ADC_EXTERNAL_CH10 + * @arg @ref FL_ADC_EXTERNAL_CH11 + * @arg @ref FL_ADC_EXTERNAL_CH12 + * @arg @ref FL_ADC_EXTERNAL_CH13 + * @arg @ref FL_ADC_EXTERNAL_CH14 + * @arg @ref FL_ADC_EXTERNAL_CH15 + * @arg @ref FL_ADC_EXTERNAL_CH16 + * @arg @ref FL_ADC_EXTERNAL_CH17 + * @arg @ref FL_ADC_EXTERNAL_CH18 + * @arg @ref FL_ADC_EXTERNAL_CH19 + * @arg @ref FL_ADC_INTERNAL_VREF1P2 + * @arg @ref FL_ADC_INTERNAL_TS + * @arg @ref FL_ADC_INTERNAL_AVREF + * @arg @ref FL_ADC_INTERNAL_VBAT_DIV3 + * @arg @ref FL_ADC_INTERNAL_VDD_DIV3 + * @arg @ref FL_ADC_INTERNAL_DAC + * @retval None + */ +__STATIC_INLINE void FL_ADC_EnableSequencerChannel(ADC_Type *ADCx, uint32_t channel) +{ + SET_BIT(ADCx->CHER, ((channel & 0x7fffffff) << 0x0U)); +} + +/** + * @brief Disable ADC Channel + * @rmtoll CHER FL_ADC_DisableSequencerChannel + * @param ADCx ADC instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_ADC_EXTERNAL_CH0 + * @arg @ref FL_ADC_EXTERNAL_CH1 + * @arg @ref FL_ADC_EXTERNAL_CH2 + * @arg @ref FL_ADC_EXTERNAL_CH3 + * @arg @ref FL_ADC_EXTERNAL_CH4 + * @arg @ref FL_ADC_EXTERNAL_CH5 + * @arg @ref FL_ADC_EXTERNAL_CH6 + * @arg @ref FL_ADC_EXTERNAL_CH7 + * @arg @ref FL_ADC_EXTERNAL_CH8 + * @arg @ref FL_ADC_EXTERNAL_CH9 + * @arg @ref FL_ADC_EXTERNAL_CH10 + * @arg @ref FL_ADC_EXTERNAL_CH11 + * @arg @ref FL_ADC_EXTERNAL_CH12 + * @arg @ref FL_ADC_EXTERNAL_CH13 + * @arg @ref FL_ADC_EXTERNAL_CH14 + * @arg @ref FL_ADC_EXTERNAL_CH15 + * @arg @ref FL_ADC_EXTERNAL_CH16 + * @arg @ref FL_ADC_EXTERNAL_CH17 + * @arg @ref FL_ADC_EXTERNAL_CH18 + * @arg @ref FL_ADC_EXTERNAL_CH19 + * @arg @ref FL_ADC_INTERNAL_VREF1P2 + * @arg @ref FL_ADC_INTERNAL_TS + * @arg @ref FL_ADC_INTERNAL_AVREF + * @arg @ref FL_ADC_INTERNAL_VBAT_DIV3 + * @arg @ref FL_ADC_INTERNAL_VDD_DIV3 + * @arg @ref FL_ADC_INTERNAL_DAC + * @retval None + */ +__STATIC_INLINE void FL_ADC_DisableSequencerChannel(ADC_Type *ADCx, uint32_t channel) +{ + CLEAR_BIT(ADCx->CHER, ((channel & 0x7fffffff) << 0x0U)); +} + +/** + * @brief Get ADC Channel Enable Status + * @rmtoll CHER FL_ADC_IsEnabledSequencerChannel + * @param ADCx ADC instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_ADC_EXTERNAL_CH0 + * @arg @ref FL_ADC_EXTERNAL_CH1 + * @arg @ref FL_ADC_EXTERNAL_CH2 + * @arg @ref FL_ADC_EXTERNAL_CH3 + * @arg @ref FL_ADC_EXTERNAL_CH4 + * @arg @ref FL_ADC_EXTERNAL_CH5 + * @arg @ref FL_ADC_EXTERNAL_CH6 + * @arg @ref FL_ADC_EXTERNAL_CH7 + * @arg @ref FL_ADC_EXTERNAL_CH8 + * @arg @ref FL_ADC_EXTERNAL_CH9 + * @arg @ref FL_ADC_EXTERNAL_CH10 + * @arg @ref FL_ADC_EXTERNAL_CH11 + * @arg @ref FL_ADC_EXTERNAL_CH12 + * @arg @ref FL_ADC_EXTERNAL_CH13 + * @arg @ref FL_ADC_EXTERNAL_CH14 + * @arg @ref FL_ADC_EXTERNAL_CH15 + * @arg @ref FL_ADC_EXTERNAL_CH16 + * @arg @ref FL_ADC_EXTERNAL_CH17 + * @arg @ref FL_ADC_EXTERNAL_CH18 + * @arg @ref FL_ADC_EXTERNAL_CH19 + * @arg @ref FL_ADC_INTERNAL_VREF1P2 + * @arg @ref FL_ADC_INTERNAL_TS + * @arg @ref FL_ADC_INTERNAL_AVREF + * @arg @ref FL_ADC_INTERNAL_VBAT_DIV3 + * @arg @ref FL_ADC_INTERNAL_VDD_DIV3 + * @arg @ref FL_ADC_INTERNAL_DAC + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ADC_IsEnabledSequencerChannel(ADC_Type *ADCx, uint32_t channel) +{ + return (uint32_t)(READ_BIT(ADCx->CHER, ((channel & 0x7fffffff) << 0x0U)) == ((channel & 0x7fffffff) << 0x0U)); +} + +/** + * @brief Enable ADC Differential Channel + * @rmtoll DCR FL_ADC_EnableDifferentialChannel + * @param ADCx ADC instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_ADC_DIFFERENTIAL_GROUP0 + * @arg @ref FL_ADC_DIFFERENTIAL_GROUP1 + * @arg @ref FL_ADC_DIFFERENTIAL_GROUP2 + * @arg @ref FL_ADC_DIFFERENTIAL_GROUP3 + * @arg @ref FL_ADC_DIFFERENTIAL_GROUP4 + * @arg @ref FL_ADC_DIFFERENTIAL_GROUP5 + * @arg @ref FL_ADC_DIFFERENTIAL_GROUP6 + * @retval None + */ +__STATIC_INLINE void FL_ADC_EnableDifferentialChannel(ADC_Type *ADCx, uint32_t channel) +{ + SET_BIT(ADCx->DCR, ((channel & 0x7f) << 0x0U)); +} + +/** + * @brief Disable ADC Differential Channel + * @rmtoll DCR FL_ADC_DisableDifferentialChannel + * @param ADCx ADC instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_ADC_DIFFERENTIAL_GROUP0 + * @arg @ref FL_ADC_DIFFERENTIAL_GROUP1 + * @arg @ref FL_ADC_DIFFERENTIAL_GROUP2 + * @arg @ref FL_ADC_DIFFERENTIAL_GROUP3 + * @arg @ref FL_ADC_DIFFERENTIAL_GROUP4 + * @arg @ref FL_ADC_DIFFERENTIAL_GROUP5 + * @arg @ref FL_ADC_DIFFERENTIAL_GROUP6 + * @retval None + */ +__STATIC_INLINE void FL_ADC_DisableDifferentialChannel(ADC_Type *ADCx, uint32_t channel) +{ + CLEAR_BIT(ADCx->DCR, ((channel & 0x7f) << 0x0U)); +} + +/** + * @brief Get ADC Differential Channel Enable Status + * @rmtoll DCR FL_ADC_IsEnabledDifferentialChannel + * @param ADCx ADC instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_ADC_DIFFERENTIAL_GROUP0 + * @arg @ref FL_ADC_DIFFERENTIAL_GROUP1 + * @arg @ref FL_ADC_DIFFERENTIAL_GROUP2 + * @arg @ref FL_ADC_DIFFERENTIAL_GROUP3 + * @arg @ref FL_ADC_DIFFERENTIAL_GROUP4 + * @arg @ref FL_ADC_DIFFERENTIAL_GROUP5 + * @arg @ref FL_ADC_DIFFERENTIAL_GROUP6 + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ADC_IsEnabledDifferentialChannel(ADC_Type *ADCx, uint32_t channel) +{ + return (uint32_t)(READ_BIT(ADCx->DCR, ((channel & 0x7f) << 0x0U)) == ((channel & 0x7f) << 0x0U)); +} + +/** + * @brief Get ADC Conversion Data + * @rmtoll DR DATA FL_ADC_ReadConversionData + * @param ADCx ADC instance + * @retval + */ +__STATIC_INLINE uint32_t FL_ADC_ReadConversionData(ADC_Type *ADCx) +{ + return (uint32_t)(READ_BIT(ADCx->DR, (0xffffU << 0U)) >> 0U); +} + +/** + * @brief Write ADC Analog Watchdog Under Low + * @rmtoll HLTR AWD_LT FL_ADC_WriteAnalogWDGLowThreshold + * @param ADCx ADC instance + * @param threshold + * @retval None + */ +__STATIC_INLINE void FL_ADC_WriteAnalogWDGLowThreshold(ADC_Type *ADCx, uint32_t threshold) +{ + MODIFY_REG(ADCx->HLTR, (0xffffU << 0U), (threshold << 0U)); +} + +/** + * @brief Read ADC Analog Watchdog Under Low + * @rmtoll HLTR AWD_LT FL_ADC_ReadAnalogWDGLowThreshold + * @param ADCx ADC instance + * @retval + */ +__STATIC_INLINE uint32_t FL_ADC_ReadAnalogWDGLowThreshold(ADC_Type *ADCx) +{ + return (uint32_t)(READ_BIT(ADCx->HLTR, (0xffffU << 0U)) >> 0U); +} + +/** + * @brief Write ADC Analog Watchdog Above High + * @rmtoll HLTR AWD_HT FL_ADC_WriteAnalogWDGHighThreshold + * @param ADCx ADC instance + * @param threshold + * @retval None + */ +__STATIC_INLINE void FL_ADC_WriteAnalogWDGHighThreshold(ADC_Type *ADCx, uint32_t threshold) +{ + MODIFY_REG(ADCx->HLTR, (0xffffU << 16U), (threshold << 16U)); +} + +/** + * @brief Read ADC Analog Watchdog Above High + * @rmtoll HLTR AWD_HT FL_ADC_ReadAnalogWDGHighThreshold + * @param ADCx ADC instance + * @retval + */ +__STATIC_INLINE uint32_t FL_ADC_ReadAnalogWDGHighThreshold(ADC_Type *ADCx) +{ + return (uint32_t)(READ_BIT(ADCx->HLTR, (0xffffU << 16U)) >> 16U); +} + +/** + * @} + */ + +/** @defgroup ADC_FL_EF_Init Initialization and de-initialization functions + * @{ + */ +FL_ErrorStatus FL_ADC_CommonDeInit(void); +FL_ErrorStatus FL_ADC_DeInit(ADC_Type *ADCx); +uint32_t GetActualVddaVoltage(ADC_Type *ADCx); +void FL_ADC_StructInit(FL_ADC_InitTypeDef *ADC_InitStruct); +FL_ErrorStatus FL_ADC_Init(ADC_Type *ADCx, FL_ADC_InitTypeDef *ADC_InitStruct); +void FL_ADC_CommonStructInit(FL_ADC_CommonInitTypeDef *ADC_CommonInitStruct); +FL_ErrorStatus FL_ADC_CommonInit(FL_ADC_CommonInitTypeDef *ADC_CommonInitStruct); + +/** + * @} + */ + + +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif /* __FM33LG0XX_FL_ADC_H*/ + +/*************************Py_Code_Generator Version: 0.1-0.14-0.1 @ 2022-05-09*************************/ +/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/ diff --git a/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_aes.h b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_aes.h new file mode 100644 index 0000000..fbdc560 --- /dev/null +++ b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_aes.h @@ -0,0 +1,784 @@ + /** + ******************************************************************************************************* + * @file fm33lg0xx_fl_aes.h + * @author FMSH Application Team + * @brief Head file of AES FL Module + ******************************************************************************************************* + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + + +/* Define to prevent recursive inclusion---------------------------------------------------------------*/ +#ifndef __FM33LG0XX_FL_AES_H +#define __FM33LG0XX_FL_AES_H + +#ifdef __cplusplus +extern "C" { +#endif +/* Includes -------------------------------------------------------------------------------------------*/ +#include "fm33lg0xx_fl_def.h" +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @defgroup AES AES + * @brief AES FL driver + * @{ + */ + +/* Exported types -------------------------------------------------------------------------------------*/ +/** @defgroup AES_FL_ES_INIT AES Exported Init structures + * @{ + */ + +/** + * @brief FL AES Init Sturcture definition + */ +typedef struct +{ + /* 秘钥长度 */ + uint32_t keyLength; + /* 数据流处理模式 */ + uint32_t cipherMode; + /* AES工作模式 */ + uint32_t operationMode; + /* 输入数据类型 */ + uint32_t dataType; + +} FL_AES_InitTypeDef; +/** + * @} + */ +/* Exported constants ---------------------------------------------------------------------------------*/ +/** @defgroup AES_FL_Exported_Constants AES Exported Constants + * @{ + */ + +#define AES_CR_KEYLEN_Pos (13U) +#define AES_CR_KEYLEN_Msk (0x3U << AES_CR_KEYLEN_Pos) +#define AES_CR_KEYLEN AES_CR_KEYLEN_Msk + +#define AES_CR_DMAOEN_Pos (12U) +#define AES_CR_DMAOEN_Msk (0x1U << AES_CR_DMAOEN_Pos) +#define AES_CR_DMAOEN AES_CR_DMAOEN_Msk + +#define AES_CR_DMAIEN_Pos (11U) +#define AES_CR_DMAIEN_Msk (0x1U << AES_CR_DMAIEN_Pos) +#define AES_CR_DMAIEN AES_CR_DMAIEN_Msk + +#define AES_CR_IVRSWAP_Pos (9U) +#define AES_CR_IVRSWAP_Msk (0x3U << AES_CR_IVRSWAP_Pos) +#define AES_CR_IVRSWAP AES_CR_IVRSWAP_Msk + +#define AES_CR_CHMOD_Pos (5U) +#define AES_CR_CHMOD_Msk (0x3U << AES_CR_CHMOD_Pos) +#define AES_CR_CHMOD AES_CR_CHMOD_Msk + +#define AES_CR_MODE_Pos (3U) +#define AES_CR_MODE_Msk (0x3U << AES_CR_MODE_Pos) +#define AES_CR_MODE AES_CR_MODE_Msk + +#define AES_CR_DATATYP_Pos (1U) +#define AES_CR_DATATYP_Msk (0x3U << AES_CR_DATATYP_Pos) +#define AES_CR_DATATYP AES_CR_DATATYP_Msk + +#define AES_CR_EN_Pos (0U) +#define AES_CR_EN_Msk (0x1U << AES_CR_EN_Pos) +#define AES_CR_EN AES_CR_EN_Msk + +#define AES_IER_WRERR_IE_Pos (2U) +#define AES_IER_WRERR_IE_Msk (0x1U << AES_IER_WRERR_IE_Pos) +#define AES_IER_WRERR_IE AES_IER_WRERR_IE_Msk + +#define AES_IER_RDERR_IE_Pos (1U) +#define AES_IER_RDERR_IE_Msk (0x1U << AES_IER_RDERR_IE_Pos) +#define AES_IER_RDERR_IE AES_IER_RDERR_IE_Msk + +#define AES_IER_CCF_IE_Pos (0U) +#define AES_IER_CCF_IE_Msk (0x1U << AES_IER_CCF_IE_Pos) +#define AES_IER_CCF_IE AES_IER_CCF_IE_Msk + +#define AES_ISR_WRERR_Pos (2U) +#define AES_ISR_WRERR_Msk (0x1U << AES_ISR_WRERR_Pos) +#define AES_ISR_WRERR AES_ISR_WRERR_Msk + +#define AES_ISR_RDERR_Pos (1U) +#define AES_ISR_RDERR_Msk (0x1U << AES_ISR_RDERR_Pos) +#define AES_ISR_RDERR AES_ISR_RDERR_Msk + +#define AES_ISR_CCF_Pos (0U) +#define AES_ISR_CCF_Msk (0x1U << AES_ISR_CCF_Pos) +#define AES_ISR_CCF AES_ISR_CCF_Msk + + + +#define FL_AES_KEY0_OFFSET (0x0U << 0U) +#define FL_AES_KEY1_OFFSET (0x1U << 0U) +#define FL_AES_KEY2_OFFSET (0x2U << 0U) +#define FL_AES_KEY3_OFFSET (0x3U << 0U) +#define FL_AES_KEY4_OFFSET (0x4U << 0U) +#define FL_AES_KEY5_OFFSET (0x5U << 0U) +#define FL_AES_KEY6_OFFSET (0x6U << 0U) +#define FL_AES_KEY7_OFFSET (0x7U << 0U) +#define FL_AES_IVR0_OFFSET (0x0U << 0U) +#define FL_AES_IVR1_OFFSET (0x1U << 0U) +#define FL_AES_IVR2_OFFSET (0x2U << 0U) +#define FL_AES_IVR3_OFFSET (0x3U << 0U) +#define FL_AES_H0_OFFSET (0x0U << 0U) +#define FL_AES_H1_OFFSET (0x1U << 0U) +#define FL_AES_H2_OFFSET (0x2U << 0U) +#define FL_AES_H3_OFFSET (0x3U << 0U) + + + +#define FL_AES_KEY_LENGTH_128B (0x0U << AES_CR_KEYLEN_Pos) +#define FL_AES_KEY_LENGTH_192B (0x1U << AES_CR_KEYLEN_Pos) +#define FL_AES_KEY_LENGTH_256B (0x2U << AES_CR_KEYLEN_Pos) + + +#define FL_AES_IVR_SWAP_32B (0x0U << AES_CR_IVRSWAP_Pos) +#define FL_AES_IVR_SWAP_16B (0x1U << AES_CR_IVRSWAP_Pos) +#define FL_AES_IVR_SWAP_8B (0x2U << AES_CR_IVRSWAP_Pos) +#define FL_AES_IVR_SWAP_1B (0x3U << AES_CR_IVRSWAP_Pos) + + +#define FL_AES_CIPHER_ECB (0x0U << AES_CR_CHMOD_Pos) +#define FL_AES_CIPHER_CBC (0x1U << AES_CR_CHMOD_Pos) +#define FL_AES_CIPHER_CTR (0x2U << AES_CR_CHMOD_Pos) +#define FL_AES_CIPHER_MULTH (0x3U << AES_CR_CHMOD_Pos) + + +#define FL_AES_OPERATION_MODE_ENCRYPTION (0x0U << AES_CR_MODE_Pos) +#define FL_AES_OPERATION_MODE_KEYDERIVATION (0x1U << AES_CR_MODE_Pos) +#define FL_AES_OPERATION_MODE_DECRYPTION (0x2U << AES_CR_MODE_Pos) +#define FL_AES_OPERATION_MODE_KEYDERIVATION_DECRYPTION (0x3U << AES_CR_MODE_Pos) + + +#define FL_AES_DATA_TYPE_32B (0x0U << AES_CR_DATATYP_Pos) +#define FL_AES_DATA_TYPE_16B (0x1U << AES_CR_DATATYP_Pos) +#define FL_AES_DATA_TYPE_8B (0x2U << AES_CR_DATATYP_Pos) +#define FL_AES_DATA_TYPE_1B (0x3U << AES_CR_DATATYP_Pos) + + +/** + * @} + */ +/* Exported functions ---------------------------------------------------------------------------------*/ +/** @defgroup AES_FL_Exported_Functions AES Exported Functions + * @{ + */ + +/** + * @brief Set key size selection + * @rmtoll CR KEYLEN FL_AES_SetKeySize + * @param AESx AES instance + * @param keySize This parameter can be one of the following values: + * @arg @ref FL_AES_KEY_LENGTH_128B + * @arg @ref FL_AES_KEY_LENGTH_192B + * @arg @ref FL_AES_KEY_LENGTH_256B + * @retval None + */ +__STATIC_INLINE void FL_AES_SetKeySize(AES_Type *AESx, uint32_t keySize) +{ + MODIFY_REG(AESx->CR, AES_CR_KEYLEN_Msk, keySize); +} + +/** + * @brief Get key size selection + * @rmtoll CR KEYLEN FL_AES_GetKeySize + * @param AESx AES instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_AES_KEY_LENGTH_128B + * @arg @ref FL_AES_KEY_LENGTH_192B + * @arg @ref FL_AES_KEY_LENGTH_256B + */ +__STATIC_INLINE uint32_t FL_AES_GetKeySize(AES_Type *AESx) +{ + return (uint32_t)(READ_BIT(AESx->CR, AES_CR_KEYLEN_Msk)); +} + +/** + * @brief DMA output enable + * @rmtoll CR DMAOEN FL_AES_EnableDMAReq_Output + * @param AESx AES instance + * @retval None + */ +__STATIC_INLINE void FL_AES_EnableDMAReq_Output(AES_Type *AESx) +{ + SET_BIT(AESx->CR, AES_CR_DMAOEN_Msk); +} + +/** + * @brief DMA output enable status + * @rmtoll CR DMAOEN FL_AES_IsEnabledDMAReq_Output + * @param AESx AES instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_AES_IsEnabledDMAReq_Output(AES_Type *AESx) +{ + return (uint32_t)(READ_BIT(AESx->CR, AES_CR_DMAOEN_Msk) == AES_CR_DMAOEN_Msk); +} + +/** + * @brief DMA output disable + * @rmtoll CR DMAOEN FL_AES_DisableDMAReq_Output + * @param AESx AES instance + * @retval None + */ +__STATIC_INLINE void FL_AES_DisableDMAReq_Output(AES_Type *AESx) +{ + CLEAR_BIT(AESx->CR, AES_CR_DMAOEN_Msk); +} + +/** + * @brief DMA input enable + * @rmtoll CR DMAIEN FL_AES_EnableDMAReq_Input + * @param AESx AES instance + * @retval None + */ +__STATIC_INLINE void FL_AES_EnableDMAReq_Input(AES_Type *AESx) +{ + SET_BIT(AESx->CR, AES_CR_DMAIEN_Msk); +} + +/** + * @brief DMA input enable status + * @rmtoll CR DMAIEN FL_AES_IsEnabledDMAReq_Input + * @param AESx AES instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_AES_IsEnabledDMAReq_Input(AES_Type *AESx) +{ + return (uint32_t)(READ_BIT(AESx->CR, AES_CR_DMAIEN_Msk) == AES_CR_DMAIEN_Msk); +} + +/** + * @brief DMA input disable + * @rmtoll CR DMAIEN FL_AES_DisableDMAReq_Input + * @param AESx AES instance + * @retval None + */ +__STATIC_INLINE void FL_AES_DisableDMAReq_Input(AES_Type *AESx) +{ + CLEAR_BIT(AESx->CR, AES_CR_DMAIEN_Msk); +} + +/** + * @brief Set IVR register read out swapping + * @rmtoll CR IVRSWAP FL_AES_SetIVRSwapType + * @param AESx AES instance + * @param type This parameter can be one of the following values: + * @arg @ref FL_AES_IVR_SWAP_32B + * @arg @ref FL_AES_IVR_SWAP_16B + * @arg @ref FL_AES_IVR_SWAP_8B + * @arg @ref FL_AES_IVR_SWAP_1B + * @retval None + */ +__STATIC_INLINE void FL_AES_SetIVRSwapType(AES_Type *AESx, uint32_t type) +{ + MODIFY_REG(AESx->CR, AES_CR_IVRSWAP_Msk, type); +} + +/** + * @brief Get IVR register read out swapping + * @rmtoll CR IVRSWAP FL_AES_GetIVRSwapType + * @param AESx AES instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_AES_IVR_SWAP_32B + * @arg @ref FL_AES_IVR_SWAP_16B + * @arg @ref FL_AES_IVR_SWAP_8B + * @arg @ref FL_AES_IVR_SWAP_1B + */ +__STATIC_INLINE uint32_t FL_AES_GetIVRSwapType(AES_Type *AESx) +{ + return (uint32_t)(READ_BIT(AESx->CR, AES_CR_IVRSWAP_Msk)); +} + +/** + * @brief Set cipher mode + * @rmtoll CR CHMOD FL_AES_SetCipherMode + * @param AESx AES instance + * @param mode This parameter can be one of the following values: + * @arg @ref FL_AES_CIPHER_ECB + * @arg @ref FL_AES_CIPHER_CBC + * @arg @ref FL_AES_CIPHER_CTR + * @arg @ref FL_AES_CIPHER_MULTH + * @retval None + */ +__STATIC_INLINE void FL_AES_SetCipherMode(AES_Type *AESx, uint32_t mode) +{ + MODIFY_REG(AESx->CR, AES_CR_CHMOD_Msk, mode); +} + +/** + * @brief Get cipher mode + * @rmtoll CR CHMOD FL_AES_GetCipherMode + * @param AESx AES instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_AES_CIPHER_ECB + * @arg @ref FL_AES_CIPHER_CBC + * @arg @ref FL_AES_CIPHER_CTR + * @arg @ref FL_AES_CIPHER_MULTH + */ +__STATIC_INLINE uint32_t FL_AES_GetCipherMode(AES_Type *AESx) +{ + return (uint32_t)(READ_BIT(AESx->CR, AES_CR_CHMOD_Msk)); +} + +/** + * @brief Set operation mode + * @rmtoll CR MODE FL_AES_SetOperationMode + * @param AESx AES instance + * @param mode This parameter can be one of the following values: + * @arg @ref FL_AES_OPERATION_MODE_ENCRYPTION + * @arg @ref FL_AES_OPERATION_MODE_KEYDERIVATION + * @arg @ref FL_AES_OPERATION_MODE_DECRYPTION + * @arg @ref FL_AES_OPERATION_MODE_KEYDERIVATION_DECRYPTION + * @retval None + */ +__STATIC_INLINE void FL_AES_SetOperationMode(AES_Type *AESx, uint32_t mode) +{ + MODIFY_REG(AESx->CR, AES_CR_MODE_Msk, mode); +} + +/** + * @brief Get operation mode + * @rmtoll CR MODE FL_AES_GetOperationMode + * @param AESx AES instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_AES_OPERATION_MODE_ENCRYPTION + * @arg @ref FL_AES_OPERATION_MODE_KEYDERIVATION + * @arg @ref FL_AES_OPERATION_MODE_DECRYPTION + * @arg @ref FL_AES_OPERATION_MODE_KEYDERIVATION_DECRYPTION + */ +__STATIC_INLINE uint32_t FL_AES_GetOperationMode(AES_Type *AESx) +{ + return (uint32_t)(READ_BIT(AESx->CR, AES_CR_MODE_Msk)); +} + +/** + * @brief Set data type selection + * @rmtoll CR DATATYP FL_AES_SetDataType + * @param AESx AES instance + * @param rule This parameter can be one of the following values: + * @arg @ref FL_AES_DATA_TYPE_32B + * @arg @ref FL_AES_DATA_TYPE_16B + * @arg @ref FL_AES_DATA_TYPE_8B + * @arg @ref FL_AES_DATA_TYPE_1B + * @retval None + */ +__STATIC_INLINE void FL_AES_SetDataType(AES_Type *AESx, uint32_t rule) +{ + MODIFY_REG(AESx->CR, AES_CR_DATATYP_Msk, rule); +} + +/** + * @brief Get data type selection + * @rmtoll CR DATATYP FL_AES_GetDataType + * @param AESx AES instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_AES_DATA_TYPE_32B + * @arg @ref FL_AES_DATA_TYPE_16B + * @arg @ref FL_AES_DATA_TYPE_8B + * @arg @ref FL_AES_DATA_TYPE_1B + */ +__STATIC_INLINE uint32_t FL_AES_GetDataType(AES_Type *AESx) +{ + return (uint32_t)(READ_BIT(AESx->CR, AES_CR_DATATYP_Msk)); +} + +/** + * @brief AES enable + * @rmtoll CR EN FL_AES_Enable + * @param AESx AES instance + * @retval None + */ +__STATIC_INLINE void FL_AES_Enable(AES_Type *AESx) +{ + SET_BIT(AESx->CR, AES_CR_EN_Msk); +} + +/** + * @brief Get AES enable status + * @rmtoll CR EN FL_AES_IsEnabled + * @param AESx AES instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_AES_IsEnabled(AES_Type *AESx) +{ + return (uint32_t)(READ_BIT(AESx->CR, AES_CR_EN_Msk) == AES_CR_EN_Msk); +} + +/** + * @brief AES disable + * @rmtoll CR EN FL_AES_Disable + * @param AESx AES instance + * @retval None + */ +__STATIC_INLINE void FL_AES_Disable(AES_Type *AESx) +{ + CLEAR_BIT(AESx->CR, AES_CR_EN_Msk); +} + +/** + * @brief Write error interrupt enable + * @rmtoll IER WRERR_IE FL_AES_EnableIT_WriteError + * @param AESx AES instance + * @retval None + */ +__STATIC_INLINE void FL_AES_EnableIT_WriteError(AES_Type *AESx) +{ + SET_BIT(AESx->IER, AES_IER_WRERR_IE_Msk); +} + +/** + * @brief Get write error interrupt enable status + * @rmtoll IER WRERR_IE FL_AES_IsEnabledIT_WriteError + * @param AESx AES instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_AES_IsEnabledIT_WriteError(AES_Type *AESx) +{ + return (uint32_t)(READ_BIT(AESx->IER, AES_IER_WRERR_IE_Msk) == AES_IER_WRERR_IE_Msk); +} + +/** + * @brief Write error interrupt disable + * @rmtoll IER WRERR_IE FL_AES_DisableIT_WriteError + * @param AESx AES instance + * @retval None + */ +__STATIC_INLINE void FL_AES_DisableIT_WriteError(AES_Type *AESx) +{ + CLEAR_BIT(AESx->IER, AES_IER_WRERR_IE_Msk); +} + +/** + * @brief Read error interrupt enable + * @rmtoll IER RDERR_IE FL_AES_EnableIT_ReadError + * @param AESx AES instance + * @retval None + */ +__STATIC_INLINE void FL_AES_EnableIT_ReadError(AES_Type *AESx) +{ + SET_BIT(AESx->IER, AES_IER_RDERR_IE_Msk); +} + +/** + * @brief Get read Error interrupt enable status + * @rmtoll IER RDERR_IE FL_AES_IsEnabledIT_ReadError + * @param AESx AES instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_AES_IsEnabledIT_ReadError(AES_Type *AESx) +{ + return (uint32_t)(READ_BIT(AESx->IER, AES_IER_RDERR_IE_Msk) == AES_IER_RDERR_IE_Msk); +} + +/** + * @brief Read error interrupt disable + * @rmtoll IER RDERR_IE FL_AES_DisableIT_ReadError + * @param AESx AES instance + * @retval None + */ +__STATIC_INLINE void FL_AES_DisableIT_ReadError(AES_Type *AESx) +{ + CLEAR_BIT(AESx->IER, AES_IER_RDERR_IE_Msk); +} + +/** + * @brief Cipher complete interrupt enable + * @rmtoll IER CCF_IE FL_AES_EnableIT_Complete + * @param AESx AES instance + * @retval None + */ +__STATIC_INLINE void FL_AES_EnableIT_Complete(AES_Type *AESx) +{ + SET_BIT(AESx->IER, AES_IER_CCF_IE_Msk); +} + +/** + * @brief Get cipher complete interrupt enable status + * @rmtoll IER CCF_IE FL_AES_IsEnabledIT_Complete + * @param AESx AES instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_AES_IsEnabledIT_Complete(AES_Type *AESx) +{ + return (uint32_t)(READ_BIT(AESx->IER, AES_IER_CCF_IE_Msk) == AES_IER_CCF_IE_Msk); +} + +/** + * @brief Cipher complete interrupt disable + * @rmtoll IER CCF_IE FL_AES_DisableIT_Complete + * @param AESx AES instance + * @retval None + */ +__STATIC_INLINE void FL_AES_DisableIT_Complete(AES_Type *AESx) +{ + CLEAR_BIT(AESx->IER, AES_IER_CCF_IE_Msk); +} + +/** + * @brief Get write error flag + * @rmtoll ISR WRERR FL_AES_IsActiveFlag_WriteError + * @param AESx AES instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_AES_IsActiveFlag_WriteError(AES_Type *AESx) +{ + return (uint32_t)(READ_BIT(AESx->ISR, AES_ISR_WRERR_Msk) == (AES_ISR_WRERR_Msk)); +} + +/** + * @brief Clear write error flag + * @rmtoll ISR WRERR FL_AES_ClearFlag_WriteError + * @param AESx AES instance + * @retval None + */ +__STATIC_INLINE void FL_AES_ClearFlag_WriteError(AES_Type *AESx) +{ + WRITE_REG(AESx->ISR, AES_ISR_WRERR_Msk); +} + +/** + * @brief Get read error flag + * @rmtoll ISR RDERR FL_AES_IsActiveFlag_ReadError + * @param AESx AES instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_AES_IsActiveFlag_ReadError(AES_Type *AESx) +{ + return (uint32_t)(READ_BIT(AESx->ISR, AES_ISR_RDERR_Msk) == (AES_ISR_RDERR_Msk)); +} + +/** + * @brief Clear read error flag + * @rmtoll ISR RDERR FL_AES_ClearFlag_ReadError + * @param AESx AES instance + * @retval None + */ +__STATIC_INLINE void FL_AES_ClearFlag_ReadError(AES_Type *AESx) +{ + WRITE_REG(AESx->ISR, AES_ISR_RDERR_Msk); +} + +/** + * @brief Get cipher complete flag + * @rmtoll ISR CCF FL_AES_IsActiveFlag_Complete + * @param AESx AES instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_AES_IsActiveFlag_Complete(AES_Type *AESx) +{ + return (uint32_t)(READ_BIT(AESx->ISR, AES_ISR_CCF_Msk) == (AES_ISR_CCF_Msk)); +} + +/** + * @brief Clear cipher complete flag + * @rmtoll ISR CCF FL_AES_ClearFlag_Complete + * @param AESx AES instance + * @retval None + */ +__STATIC_INLINE void FL_AES_ClearFlag_Complete(AES_Type *AESx) +{ + WRITE_REG(AESx->ISR, AES_ISR_CCF_Msk); +} + +/** + * @brief Write AES data input register + * @rmtoll DIR FL_AES_WriteInputData + * @param AESx AES instance + * @param data + * @retval None + */ +__STATIC_INLINE void FL_AES_WriteInputData(AES_Type *AESx, uint32_t data) +{ + MODIFY_REG(AESx->DIR, (0xffffffffU << 0U), (data << 0U)); +} + +/** + * @brief Read AES data output register + * @rmtoll DOR FL_AES_ReadOutputData + * @param AESx AES instance + * @retval + */ +__STATIC_INLINE uint32_t FL_AES_ReadOutputData(AES_Type *AESx) +{ + return (uint32_t)(READ_BIT(AESx->DOR, (0xffffffffU << 0U)) >> 0U); +} + +/** + * @brief Set key registers + * @rmtoll KEY0 FL_AES_WriteKeys + * @param AESx AES instance + * @param offset This parameter can be one of the following values: + * @arg @ref FL_AES_KEY0_OFFSET + * @arg @ref FL_AES_KEY1_OFFSET + * @arg @ref FL_AES_KEY2_OFFSET + * @arg @ref FL_AES_KEY3_OFFSET + * @arg @ref FL_AES_KEY4_OFFSET + * @arg @ref FL_AES_KEY5_OFFSET + * @arg @ref FL_AES_KEY6_OFFSET + * @arg @ref FL_AES_KEY7_OFFSET + * @param data + * @retval None + */ +__STATIC_INLINE void FL_AES_WriteKeys(AES_Type *AESx, uint32_t offset, uint32_t data) +{ + WRITE_REG(*((&AESx->KEY0) + offset), data); +} + +/** + * @brief Get key registers + * @rmtoll KEY0 FL_AES_ReadKeys + * @param AESx AES instance + * @param offset This parameter can be one of the following values: + * @arg @ref FL_AES_KEY0_OFFSET + * @arg @ref FL_AES_KEY1_OFFSET + * @arg @ref FL_AES_KEY2_OFFSET + * @arg @ref FL_AES_KEY3_OFFSET + * @arg @ref FL_AES_KEY4_OFFSET + * @arg @ref FL_AES_KEY5_OFFSET + * @arg @ref FL_AES_KEY6_OFFSET + * @arg @ref FL_AES_KEY7_OFFSET + * @retval + */ +__STATIC_INLINE uint32_t FL_AES_ReadKeys(AES_Type *AESx, uint32_t offset) +{ + return (uint32_t)READ_REG(*((&AESx->KEY0) + offset)); +} + +/** + * @brief Write initialization vector registers + * @rmtoll DIR FL_AES_WriteIVR + * @param AESx AES instance + * @param offset This parameter can be one of the following values: + * @arg @ref FL_AES_IVR0_OFFSET + * @arg @ref FL_AES_IVR1_OFFSET + * @arg @ref FL_AES_IVR2_OFFSET + * @arg @ref FL_AES_IVR3_OFFSET + * @param data + * @retval None + */ +__STATIC_INLINE void FL_AES_WriteIVR(AES_Type *AESx, uint32_t offset, uint32_t data) +{ + WRITE_REG(*((&AESx->IVR0) + offset), data); +} + +/** + * @brief Read initialization vector registers + * @rmtoll DOR FL_AES_ReadIVR + * @param AESx AES instance + * @param offset This parameter can be one of the following values: + * @arg @ref FL_AES_IVR0_OFFSET + * @arg @ref FL_AES_IVR1_OFFSET + * @arg @ref FL_AES_IVR2_OFFSET + * @arg @ref FL_AES_IVR3_OFFSET + * @retval + */ +__STATIC_INLINE uint32_t FL_AES_ReadIVR(AES_Type *AESx, uint32_t offset) +{ + return (uint32_t)READ_REG(*((&AESx->IVR0) + offset)); +} + +/** + * @brief Set AES MultH parameter Register + * @rmtoll H0 FL_AES_WriteHParams + * @param AESx AES instance + * @param offset This parameter can be one of the following values: + * @arg @ref FL_AES_H0_OFFSET + * @arg @ref FL_AES_H1_OFFSET + * @arg @ref FL_AES_H2_OFFSET + * @arg @ref FL_AES_H3_OFFSET + * @param data + * @retval None + */ +__STATIC_INLINE void FL_AES_WriteHParams(AES_Type *AESx, uint32_t offset, uint32_t data) +{ + WRITE_REG(*((&AESx->H0) + offset), data); +} + +/** + * @brief Get AES MultH parameter Register + * @rmtoll H0 FL_AES_ReadHParams + * @param AESx AES instance + * @param offset This parameter can be one of the following values: + * @arg @ref FL_AES_H0_OFFSET + * @arg @ref FL_AES_H1_OFFSET + * @arg @ref FL_AES_H2_OFFSET + * @arg @ref FL_AES_H3_OFFSET + * @retval + */ +__STATIC_INLINE uint32_t FL_AES_ReadHParams(AES_Type *AESx, uint32_t offset) +{ + return (uint32_t)READ_REG(*((&AESx->H0) + offset)); +} + +/** + * @} + */ + +/** @defgroup AES_FL_EF_Init Initialization and de-initialization functions + * @{ + */ +FL_ErrorStatus FL_AES_DeInit(void); +void FL_AES_StructInit(FL_AES_InitTypeDef *AES_InitStructer); +FL_ErrorStatus FL_AES_Init(AES_Type *AESx, FL_AES_InitTypeDef *AES_InitStructer); + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif /* __FM33LG0XX_FL_AES_H*/ + +/*************************Py_Code_Generator Version: 0.1-0.11-0.1 @ 2020-09-14*************************/ +/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/ diff --git a/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_atim.h b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_atim.h new file mode 100644 index 0000000..cc90d2f --- /dev/null +++ b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_atim.h @@ -0,0 +1,3773 @@ + /** + ******************************************************************************************************* + * @file fm33lg0xx_fl_atim.h + * @author FMSH Application Team + * @brief Head file of ATIM FL Module + ******************************************************************************************************* + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + + +/* Define to prevent recursive inclusion---------------------------------------------------------------*/ +#ifndef __FM33LG0XX_FL_ATIM_H +#define __FM33LG0XX_FL_ATIM_H + +#ifdef __cplusplus +extern "C" { +#endif +/* Includes -------------------------------------------------------------------------------------------*/ +#include "fm33lg0xx_fl_def.h" +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @defgroup ATIM ATIM + * @brief ATIM FL driver + * @{ + */ + +/* Exported types -------------------------------------------------------------------------------------*/ +/** @defgroup ATIM_FL_ES_INIT ATIM Exported Init structures + * @{ + */ + +/** + * @brief FL ATIM Init Sturcture definition + */ + +typedef struct +{ + /*! 时钟源选择 */ + uint32_t clockSource; + /*! 预分频系数 */ + uint32_t prescaler; + /*! 计数模式 */ + uint32_t counterMode; + /*! 自动重装载值 */ + uint32_t autoReload; + /*! 预装载使能 */ + uint32_t autoReloadState; + /*! 定时器分频系数与数字滤波器所使用的采样时钟分频比 */ + uint32_t clockDivision; + /*! 重复计数次数 */ + uint32_t repetitionCounter; + +} FL_ATIM_InitTypeDef; + + +typedef struct +{ + + /*! 外部时钟源模式 */ + uint32_t slaveMode; + /*! 输入触发信号选择 */ + uint32_t triggerSrc; + /*! Trigger 延迟*/ + uint32_t triggerDelay; + +} FL_ATIM_SlaveInitTypeDef; + +/** + * @brief TIM ETR configuration structure definition. + */ + +typedef struct +{ + /*! 外部触发使能 */ + uint32_t useExternalTrigger; + /*! 外部时钟滤波 */ + uint32_t ETRFilter; + /*! 外部时钟分频 */ + uint32_t ETRClockDivision; + /*! 外部时钟触发极性 */ + uint32_t ETRPolarity; + +} FL_ATIM_ETR_InitTypeDef; + +/** + * @brief TIM Output Compare configuration structure definition. + */ +typedef struct +{ + /*! 比较输出模式 */ + uint32_t OCMode; + /*! 正向比较通道输出使能 */ + uint32_t OCState; + /*! 比较互补通道输出使能 */ + uint32_t OCNState; + /*! 比较输出极性 */ + uint32_t OCPolarity; + /*! 比较互补输出极性 */ + uint32_t OCNPolarity; + /*! 比较输出通道快速模式使能 */ + uint32_t OCFastMode; + /*! 输出比较预装载 */ + uint32_t OCPreload; + /*! 通道比较值 */ + uint32_t compareValue; + /*! 输出空闲状态电平 */ + uint32_t OCIdleState; + /*! ETR清0使能 */ + uint32_t OCETRFStatus; + /*! 互补输出空闲状态电平 */ + uint32_t OCNIdleState; + +} FL_ATIM_OC_InitTypeDef; +/** + * @brief TIM Input Capture configuration structure definition. + */ + +typedef struct +{ + /*! 输入捕获使能 */ + uint32_t captureState; + /*! 输入捕获极性 */ + uint32_t ICPolarity; + /*! 通道映射激活的输入选择 */ + uint32_t ICActiveInput; + /*! 输入分频 */ + uint32_t ICPrescaler; + /*! 输入滤波 */ + uint32_t ICFilter; + +} FL_ATIM_IC_InitTypeDef; + +/** + * @brief BDTR (Break and Dead Time) structure definition + */ +typedef struct +{ + /*! 运行状态下的输出关闭状态 */ + uint32_t OSSRState; + /*! 空闲状态下的输出关闭状态 */ + uint32_t OSSIState; + /*! 寄存器写保护等级 */ + uint32_t lockLevel; + /*! 死区时间 */ + uint32_t deadTime; + /*! 刹车使能 */ + uint32_t breakState; + /*! 刹车信号滤波 */ + uint32_t breakFilter; + /*! 刹车信号极性 */ + uint32_t breakPolarity; + /*! 刹车后计数器重装后自动输出使能*/ + uint32_t automaticOutput; + /*! 刹车信号1门控 */ + uint32_t gatedBrakeSignal_1; + /*! 刹车信号2门控 */ + uint32_t gatedBrakeSignal_2; + /*! 两路刹车信号控制逻辑 */ + uint32_t brakeSignalCombined; + +} FL_ATIM_BDTR_InitTypeDef; +/** + * @} + */ +/* Exported constants ---------------------------------------------------------------------------------*/ +/** @defgroup ATIM_FL_Exported_Constants ATIM Exported Constants + * @{ + */ + +#define ATIM_CR1_CKD_Pos (8U) +#define ATIM_CR1_CKD_Msk (0x3U << ATIM_CR1_CKD_Pos) +#define ATIM_CR1_CKD ATIM_CR1_CKD_Msk + +#define ATIM_CR1_ARPE_Pos (7U) +#define ATIM_CR1_ARPE_Msk (0x1U << ATIM_CR1_ARPE_Pos) +#define ATIM_CR1_ARPE ATIM_CR1_ARPE_Msk + +#define ATIM_CR1_CMS_Pos (5U) +#define ATIM_CR1_CMS_Msk (0x3U << ATIM_CR1_CMS_Pos) +#define ATIM_CR1_CMS ATIM_CR1_CMS_Msk + +#define ATIM_CR1_DIR_Pos (4U) +#define ATIM_CR1_DIR_Msk (0x1U << ATIM_CR1_DIR_Pos) +#define ATIM_CR1_DIR ATIM_CR1_DIR_Msk + +#define ATIM_CR1_OPM_Pos (3U) +#define ATIM_CR1_OPM_Msk (0x1U << ATIM_CR1_OPM_Pos) +#define ATIM_CR1_OPM ATIM_CR1_OPM_Msk + +#define ATIM_CR1_URS_Pos (2U) +#define ATIM_CR1_URS_Msk (0x1U << ATIM_CR1_URS_Pos) +#define ATIM_CR1_URS ATIM_CR1_URS_Msk + +#define ATIM_CR1_UDIS_Pos (1U) +#define ATIM_CR1_UDIS_Msk (0x1U << ATIM_CR1_UDIS_Pos) +#define ATIM_CR1_UDIS ATIM_CR1_UDIS_Msk + +#define ATIM_CR1_CEN_Pos (0U) +#define ATIM_CR1_CEN_Msk (0x1U << ATIM_CR1_CEN_Pos) +#define ATIM_CR1_CEN ATIM_CR1_CEN_Msk + +#define ATIM_CR2_OISN_Pos (9U) +#define ATIM_CR2_OISN_Msk (0x1U << ATIM_CR2_OISN_Pos) +#define ATIM_CR2_OISN ATIM_CR2_OISN_Msk + +#define ATIM_CR2_OIS_Pos (8U) +#define ATIM_CR2_OIS_Msk (0x1U << ATIM_CR2_OIS_Pos) +#define ATIM_CR2_OIS ATIM_CR2_OIS_Msk + +#define ATIM_CR2_TI1S_Pos (7U) +#define ATIM_CR2_TI1S_Msk (0x1U << ATIM_CR2_TI1S_Pos) +#define ATIM_CR2_TI1S ATIM_CR2_TI1S_Msk + +#define ATIM_CR2_MMS_Pos (4U) +#define ATIM_CR2_MMS_Msk (0x7U << ATIM_CR2_MMS_Pos) +#define ATIM_CR2_MMS ATIM_CR2_MMS_Msk + +#define ATIM_CR2_CCDS_Pos (3U) +#define ATIM_CR2_CCDS_Msk (0x1U << ATIM_CR2_CCDS_Pos) +#define ATIM_CR2_CCDS ATIM_CR2_CCDS_Msk + +#define ATIM_CR2_CCUS_Pos (2U) +#define ATIM_CR2_CCUS_Msk (0x1U << ATIM_CR2_CCUS_Pos) +#define ATIM_CR2_CCUS ATIM_CR2_CCUS_Msk + +#define ATIM_CR2_CCPC_Pos (0U) +#define ATIM_CR2_CCPC_Msk (0x1U << ATIM_CR2_CCPC_Pos) +#define ATIM_CR2_CCPC ATIM_CR2_CCPC_Msk + +#define ATIM_SMCR_ETP_Pos (15U) +#define ATIM_SMCR_ETP_Msk (0x1U << ATIM_SMCR_ETP_Pos) +#define ATIM_SMCR_ETP ATIM_SMCR_ETP_Msk + +#define ATIM_SMCR_ECE_Pos (14U) +#define ATIM_SMCR_ECE_Msk (0x1U << ATIM_SMCR_ECE_Pos) +#define ATIM_SMCR_ECE ATIM_SMCR_ECE_Msk + +#define ATIM_SMCR_ETPS_Pos (12U) +#define ATIM_SMCR_ETPS_Msk (0x3U << ATIM_SMCR_ETPS_Pos) +#define ATIM_SMCR_ETPS ATIM_SMCR_ETPS_Msk + +#define ATIM_SMCR_ETF_Pos (8U) +#define ATIM_SMCR_ETF_Msk (0xfU << ATIM_SMCR_ETF_Pos) +#define ATIM_SMCR_ETF ATIM_SMCR_ETF_Msk + +#define ATIM_SMCR_MSM_Pos (7U) +#define ATIM_SMCR_MSM_Msk (0x1U << ATIM_SMCR_MSM_Pos) +#define ATIM_SMCR_MSM ATIM_SMCR_MSM_Msk + +#define ATIM_SMCR_TS_Pos (4U) +#define ATIM_SMCR_TS_Msk (0x7U << ATIM_SMCR_TS_Pos) +#define ATIM_SMCR_TS ATIM_SMCR_TS_Msk + +#define ATIM_SMCR_SMS_Pos (0U) +#define ATIM_SMCR_SMS_Msk (0x7U << ATIM_SMCR_SMS_Pos) +#define ATIM_SMCR_SMS ATIM_SMCR_SMS_Msk + +#define ATIM_DIER_CC1BURSTEN_Pos (16U) +#define ATIM_DIER_CC1BURSTEN_Msk (0x1U << ATIM_DIER_CC1BURSTEN_Pos) +#define ATIM_DIER_CC1BURSTEN ATIM_DIER_CC1BURSTEN_Msk + +#define ATIM_DIER_CC2BURSTEN_Pos (17U) +#define ATIM_DIER_CC2BURSTEN_Msk (0x1U << ATIM_DIER_CC2BURSTEN_Pos) +#define ATIM_DIER_CC2BURSTEN ATIM_DIER_CC2BURSTEN_Msk + +#define ATIM_DIER_CC3BURSTEN_Pos (18U) +#define ATIM_DIER_CC3BURSTEN_Msk (0x1U << ATIM_DIER_CC3BURSTEN_Pos) +#define ATIM_DIER_CC3BURSTEN ATIM_DIER_CC3BURSTEN_Msk + +#define ATIM_DIER_CC4BURSTEN_Pos (19U) +#define ATIM_DIER_CC4BURSTEN_Msk (0x1U << ATIM_DIER_CC4BURSTEN_Pos) +#define ATIM_DIER_CC4BURSTEN ATIM_DIER_CC4BURSTEN_Msk + +#define ATIM_DIER_TDE_Pos (14U) +#define ATIM_DIER_TDE_Msk (0x1U << ATIM_DIER_TDE_Pos) +#define ATIM_DIER_TDE ATIM_DIER_TDE_Msk + +#define ATIM_DIER_COMDE_Pos (13U) +#define ATIM_DIER_COMDE_Msk (0x1U << ATIM_DIER_COMDE_Pos) +#define ATIM_DIER_COMDE ATIM_DIER_COMDE_Msk + +#define ATIM_DIER_CCDE_Pos (9U) +#define ATIM_DIER_CCDE_Msk (0x1U << ATIM_DIER_CCDE_Pos) +#define ATIM_DIER_CCDE ATIM_DIER_CCDE_Msk + +#define ATIM_DIER_UDE_Pos (8U) +#define ATIM_DIER_UDE_Msk (0x1U << ATIM_DIER_UDE_Pos) +#define ATIM_DIER_UDE ATIM_DIER_UDE_Msk + +#define ATIM_DIER_BIE_Pos (7U) +#define ATIM_DIER_BIE_Msk (0x1U << ATIM_DIER_BIE_Pos) +#define ATIM_DIER_BIE ATIM_DIER_BIE_Msk + +#define ATIM_DIER_TIE_Pos (6U) +#define ATIM_DIER_TIE_Msk (0x1U << ATIM_DIER_TIE_Pos) +#define ATIM_DIER_TIE ATIM_DIER_TIE_Msk + +#define ATIM_DIER_COMIE_Pos (5U) +#define ATIM_DIER_COMIE_Msk (0x1U << ATIM_DIER_COMIE_Pos) +#define ATIM_DIER_COMIE ATIM_DIER_COMIE_Msk + +#define ATIM_DIER_CCIE_Pos (1U) +#define ATIM_DIER_CCIE_Msk (0x1U << ATIM_DIER_CCIE_Pos) +#define ATIM_DIER_CCIE ATIM_DIER_CCIE_Msk + +#define ATIM_DIER_UIE_Pos (0U) +#define ATIM_DIER_UIE_Msk (0x1U << ATIM_DIER_UIE_Pos) +#define ATIM_DIER_UIE ATIM_DIER_UIE_Msk + +#define ATIM_ISR_CCOF_Pos (9U) +#define ATIM_ISR_CCOF_Msk (0x1U << ATIM_ISR_CCOF_Pos) +#define ATIM_ISR_CCOF ATIM_ISR_CCOF_Msk + +#define ATIM_ISR_BIF_Pos (7U) +#define ATIM_ISR_BIF_Msk (0x1U << ATIM_ISR_BIF_Pos) +#define ATIM_ISR_BIF ATIM_ISR_BIF_Msk + +#define ATIM_ISR_TIF_Pos (6U) +#define ATIM_ISR_TIF_Msk (0x1U << ATIM_ISR_TIF_Pos) +#define ATIM_ISR_TIF ATIM_ISR_TIF_Msk + +#define ATIM_ISR_COMIF_Pos (5U) +#define ATIM_ISR_COMIF_Msk (0x1U << ATIM_ISR_COMIF_Pos) +#define ATIM_ISR_COMIF ATIM_ISR_COMIF_Msk + +#define ATIM_ISR_CCIF_Pos (1U) +#define ATIM_ISR_CCIF_Msk (0x1U << ATIM_ISR_CCIF_Pos) +#define ATIM_ISR_CCIF ATIM_ISR_CCIF_Msk + +#define ATIM_ISR_UIF_Pos (0U) +#define ATIM_ISR_UIF_Msk (0x1U << ATIM_ISR_UIF_Pos) +#define ATIM_ISR_UIF ATIM_ISR_UIF_Msk + +#define ATIM_EGR_BG_Pos (7U) +#define ATIM_EGR_BG_Msk (0x1U << ATIM_EGR_BG_Pos) +#define ATIM_EGR_BG ATIM_EGR_BG_Msk + +#define ATIM_EGR_TG_Pos (6U) +#define ATIM_EGR_TG_Msk (0x1U << ATIM_EGR_TG_Pos) +#define ATIM_EGR_TG ATIM_EGR_TG_Msk + +#define ATIM_EGR_COMG_Pos (5U) +#define ATIM_EGR_COMG_Msk (0x1U << ATIM_EGR_COMG_Pos) +#define ATIM_EGR_COMG ATIM_EGR_COMG_Msk + +#define ATIM_EGR_CCG_Pos (1U) +#define ATIM_EGR_CCG_Msk (0x1U << ATIM_EGR_CCG_Pos) +#define ATIM_EGR_CCG ATIM_EGR_CCG_Msk + +#define ATIM_EGR_UG_Pos (0U) +#define ATIM_EGR_UG_Msk (0x1U << ATIM_EGR_UG_Pos) +#define ATIM_EGR_UG ATIM_EGR_UG_Msk + +#define ATIM_DCR_DBL_Pos (8U) +#define ATIM_DCR_DBL_Msk (0x1fU << ATIM_DCR_DBL_Pos) +#define ATIM_DCR_DBL ATIM_DCR_DBL_Msk + +#define ATIM_DCR_DBA_Pos (0U) +#define ATIM_DCR_DBA_Msk (0x1fU << ATIM_DCR_DBA_Pos) +#define ATIM_DCR_DBA ATIM_DCR_DBA_Msk + +#define ATIM_CCMR_OCCE_Pos (7U) +#define ATIM_CCMR_OCCE_Msk (0x1U << ATIM_CCMR_OCCE_Pos) +#define ATIM_CCMR_OCCE ATIM_CCMR_OCCE_Msk + +#define ATIM_CCMR_OCM_Pos (4U) +#define ATIM_CCMR_OCM_Msk (0x7U << ATIM_CCMR_OCM_Pos) +#define ATIM_CCMR_OCM ATIM_CCMR_OCM_Msk + +#define ATIM_CCMR_OCPE_Pos (3U) +#define ATIM_CCMR_OCPE_Msk (0x1U << ATIM_CCMR_OCPE_Pos) +#define ATIM_CCMR_OCPE ATIM_CCMR_OCPE_Msk + +#define ATIM_CCMR_OCFE_Pos (2U) +#define ATIM_CCMR_OCFE_Msk (0x1U << ATIM_CCMR_OCFE_Pos) +#define ATIM_CCMR_OCFE ATIM_CCMR_OCFE_Msk + +#define ATIM_CCMR_ICF_Pos (4U) +#define ATIM_CCMR_ICF_Msk (0xfU << ATIM_CCMR_ICF_Pos) +#define ATIM_CCMR_ICF ATIM_CCMR_ICF_Msk + +#define ATIM_CCMR_ICPSC_Pos (2U) +#define ATIM_CCMR_ICPSC_Msk (0x3U << ATIM_CCMR_ICPSC_Pos) +#define ATIM_CCMR_ICPSC ATIM_CCMR_ICPSC_Msk + +#define ATIM_CCMR_CCS_Pos (0U) +#define ATIM_CCMR_CCS_Msk (0x3U << ATIM_CCMR_CCS_Pos) +#define ATIM_CCMR_CCS ATIM_CCMR_CCS_Msk + +#define ATIM_CCER_CCNP_Pos (3U) +#define ATIM_CCER_CCNP_Msk (0x1U << ATIM_CCER_CCNP_Pos) +#define ATIM_CCER_CCNP ATIM_CCER_CCNP_Msk + +#define ATIM_CCER_CCNE_Pos (2U) +#define ATIM_CCER_CCNE_Msk (0x1U << ATIM_CCER_CCNE_Pos) +#define ATIM_CCER_CCNE ATIM_CCER_CCNE_Msk + +#define ATIM_CCER_CCOP_Pos (1U) +#define ATIM_CCER_CCOP_Msk (0x1U << ATIM_CCER_CCOP_Pos) +#define ATIM_CCER_CCOP ATIM_CCER_CCOP_Msk + +#define ATIM_CCER_CCIP_Pos (1U) +#define ATIM_CCER_CCIP_Msk (0x1U << ATIM_CCER_CCIP_Pos) +#define ATIM_CCER_CCIP ATIM_CCER_CCIP_Msk + +#define ATIM_CCER_CCOE_Pos (0U) +#define ATIM_CCER_CCOE_Msk (0x1U << ATIM_CCER_CCOE_Pos) +#define ATIM_CCER_CCOE ATIM_CCER_CCOE_Msk + +#define ATIM_CCER_CCIE_Pos (0U) +#define ATIM_CCER_CCIE_Msk (0x1U << ATIM_CCER_CCIE_Pos) +#define ATIM_CCER_CCIE ATIM_CCER_CCIE_Msk + +#define ATIM_BDTR_MOE_Pos (15U) +#define ATIM_BDTR_MOE_Msk (0x1U << ATIM_BDTR_MOE_Pos) +#define ATIM_BDTR_MOE ATIM_BDTR_MOE_Msk + +#define ATIM_BDTR_AOE_Pos (14U) +#define ATIM_BDTR_AOE_Msk (0x1U << ATIM_BDTR_AOE_Pos) +#define ATIM_BDTR_AOE ATIM_BDTR_AOE_Msk + +#define ATIM_BDTR_BKP_Pos (13U) +#define ATIM_BDTR_BKP_Msk (0x1U << ATIM_BDTR_BKP_Pos) +#define ATIM_BDTR_BKP ATIM_BDTR_BKP_Msk + +#define ATIM_BDTR_BKE_Pos (12U) +#define ATIM_BDTR_BKE_Msk (0x1U << ATIM_BDTR_BKE_Pos) +#define ATIM_BDTR_BKE ATIM_BDTR_BKE_Msk + +#define ATIM_BDTR_OSSR_Pos (11U) +#define ATIM_BDTR_OSSR_Msk (0x1U << ATIM_BDTR_OSSR_Pos) +#define ATIM_BDTR_OSSR ATIM_BDTR_OSSR_Msk + +#define ATIM_BDTR_OSSI_Pos (10U) +#define ATIM_BDTR_OSSI_Msk (0x1U << ATIM_BDTR_OSSI_Pos) +#define ATIM_BDTR_OSSI ATIM_BDTR_OSSI_Msk + +#define ATIM_BDTR_LOCK_Pos (8U) +#define ATIM_BDTR_LOCK_Msk (0x3U << ATIM_BDTR_LOCK_Pos) +#define ATIM_BDTR_LOCK ATIM_BDTR_LOCK_Msk + +#define ATIM_BDTR_DTG_Pos (0U) +#define ATIM_BDTR_DTG_Msk (0xffU << ATIM_BDTR_DTG_Pos) +#define ATIM_BDTR_DTG ATIM_BDTR_DTG_Msk + +#define ATIM_BKCR_BRK1GATE_Pos (8U) +#define ATIM_BKCR_BRK1GATE_Msk (0x1U << ATIM_BKCR_BRK1GATE_Pos) +#define ATIM_BKCR_BRK1GATE ATIM_BKCR_BRK1GATE_Msk + +#define ATIM_BKCR_BRK2GATE_Pos (9U) +#define ATIM_BKCR_BRK2GATE_Msk (0x1U << ATIM_BKCR_BRK2GATE_Pos) +#define ATIM_BKCR_BRK2GATE ATIM_BKCR_BRK2GATE_Msk + +#define ATIM_BKCR_BRKF_Pos (4U) +#define ATIM_BKCR_BRKF_Msk (0xfU << ATIM_BKCR_BRKF_Pos) +#define ATIM_BKCR_BRKF ATIM_BKCR_BRKF_Msk + +#define ATIM_BKCR_BRKCOMB_Pos (3U) +#define ATIM_BKCR_BRKCOMB_Msk (0x1U << ATIM_BKCR_BRKCOMB_Pos) +#define ATIM_BKCR_BRKCOMB ATIM_BKCR_BRKCOMB_Msk + +#define ATIM_BKCR_HFDET_BRKEN_Pos (2U) +#define ATIM_BKCR_HFDET_BRKEN_Msk (0x1U << ATIM_BKCR_HFDET_BRKEN_Pos) +#define ATIM_BKCR_HFDET_BRKEN ATIM_BKCR_HFDET_BRKEN_Msk + +#define ATIM_BKCR_SVD_BRKEN_Pos (1U) +#define ATIM_BKCR_SVD_BRKEN_Msk (0x1U << ATIM_BKCR_SVD_BRKEN_Pos) +#define ATIM_BKCR_SVD_BRKEN ATIM_BKCR_SVD_BRKEN_Msk + +#define ATIM_BKCR_COMP_BRKEN_Pos (0U) +#define ATIM_BKCR_COMP_BRKEN_Msk (0x1U << ATIM_BKCR_COMP_BRKEN_Pos) +#define ATIM_BKCR_COMP_BRKEN ATIM_BKCR_COMP_BRKEN_Msk + + + +#define FL_ATIM_CHANNEL_1 0x0U +#define FL_ATIM_CHANNEL_2 0x1U +#define FL_ATIM_CHANNEL_3 0x2U +#define FL_ATIM_CHANNEL_4 0x3U + + + +#define FL_ATIM_CLK_DIVISION_DIV1 (0x0U << ATIM_CR1_CKD_Pos) +#define FL_ATIM_CLK_DIVISION_DIV2 (0x1U << ATIM_CR1_CKD_Pos) +#define FL_ATIM_CLK_DIVISION_DIV4 (0x2U << ATIM_CR1_CKD_Pos) + + +#define FL_ATIM_COUNTER_ALIGNED_EDGE (0x0U << ATIM_CR1_CMS_Pos) +#define FL_ATIM_COUNTER_ALIGNED_CENTER_DOWN (0x1U << ATIM_CR1_CMS_Pos) +#define FL_ATIM_COUNTER_ALIGNED_CENTER_UP (0x2U << ATIM_CR1_CMS_Pos) +#define FL_ATIM_COUNTER_ALIGNED_CENTER_UP_DOWN (0x3U << ATIM_CR1_CMS_Pos) + + +#define FL_ATIM_COUNTER_DIR_UP (0x0U << ATIM_CR1_DIR_Pos) +#define FL_ATIM_COUNTER_DIR_DOWN (0x1U << ATIM_CR1_DIR_Pos) + + +#define FL_ATIM_ONE_PULSE_MODE_CONTINUOUS (0x0U << ATIM_CR1_OPM_Pos) +#define FL_ATIM_ONE_PULSE_MODE_SINGLE (0x1U << ATIM_CR1_OPM_Pos) + + +#define FL_ATIM_UPDATE_SOURCE_REGULAR (0x0U << ATIM_CR1_URS_Pos) +#define FL_ATIM_UPDATE_SOURCE_COUNTER (0x1U << ATIM_CR1_URS_Pos) + + +#define FL_ATIM_OCN_IDLE_STATE_LOW (0x0U << ATIM_CR2_OISN_Pos) +#define FL_ATIM_OCN_IDLE_STATE_HIGH (0x1U << ATIM_CR2_OISN_Pos) + + +#define FL_ATIM_OC_IDLE_STATE_LOW (0x0U << ATIM_CR2_OIS_Pos) +#define FL_ATIM_OC_IDLE_STATE_HIGH (0x1U << ATIM_CR2_OIS_Pos) + + +#define FL_ATIM_TRGO_RESET (0x0U << ATIM_CR2_MMS_Pos) +#define FL_ATIM_TRGO_ENABLE (0x1U << ATIM_CR2_MMS_Pos) +#define FL_ATIM_TRGO_UPDATE (0x2U << ATIM_CR2_MMS_Pos) +#define FL_ATIM_TRGO_CC1IF (0x3U << ATIM_CR2_MMS_Pos) +#define FL_ATIM_TRGO_OC1REF (0x4U << ATIM_CR2_MMS_Pos) +#define FL_ATIM_TRGO_OC2REF (0x5U << ATIM_CR2_MMS_Pos) +#define FL_ATIM_TRGO_OC3REF (0x6U << ATIM_CR2_MMS_Pos) +#define FL_ATIM_TRGO_OC4REF (0x7U << ATIM_CR2_MMS_Pos) + + +#define FL_ATIM_DMA_REQ_CC (0x0U << ATIM_CR2_CCDS_Pos) +#define FL_ATIM_DMA_REQ_UPDATE (0x1U << ATIM_CR2_CCDS_Pos) + + +#define FL_ATIM_UPDATE_SOURCE_COMG_ONLY (0x0U << ATIM_CR2_CCUS_Pos) +#define FL_ATIM_UPDATE_SOURCE_COMG_AND_TRGI (0x1U << ATIM_CR2_CCUS_Pos) + + +#define FL_ATIM_ETR_POLARITY_NORMAL (0x0U << ATIM_SMCR_ETP_Pos) +#define FL_ATIM_ETR_POLARITY_INVERT (0x1U << ATIM_SMCR_ETP_Pos) + + +#define FL_ATIM_ETR_PSC_DIV1 (0x0U << ATIM_SMCR_ETPS_Pos) +#define FL_ATIM_ETR_PSC_DIV2 (0x1U << ATIM_SMCR_ETPS_Pos) +#define FL_ATIM_ETR_PSC_DIV4 (0x2U << ATIM_SMCR_ETPS_Pos) +#define FL_ATIM_ETR_PSC_DIV8 (0x3U << ATIM_SMCR_ETPS_Pos) + + +#define FL_ATIM_ETR_FILTER_DIV1 (0x0U << ATIM_SMCR_ETF_Pos) +#define FL_ATIM_ETR_FILTER_DIV1_N2 (0x1U << ATIM_SMCR_ETF_Pos) +#define FL_ATIM_ETR_FILTER_DIV1_N4 (0x2U << ATIM_SMCR_ETF_Pos) +#define FL_ATIM_ETR_FILTER_DIV1_N8 (0x3U << ATIM_SMCR_ETF_Pos) +#define FL_ATIM_ETR_FILTER_DIV2_N6 (0x4U << ATIM_SMCR_ETF_Pos) +#define FL_ATIM_ETR_FILTER_DIV2_N8 (0x5U << ATIM_SMCR_ETF_Pos) +#define FL_ATIM_ETR_FILTER_DIV4_N6 (0x6U << ATIM_SMCR_ETF_Pos) +#define FL_ATIM_ETR_FILTER_DIV4_N8 (0x7U << ATIM_SMCR_ETF_Pos) +#define FL_ATIM_ETR_FILTER_DIV8_N6 (0x8U << ATIM_SMCR_ETF_Pos) +#define FL_ATIM_ETR_FILTER_DIV8_N8 (0x9U << ATIM_SMCR_ETF_Pos) +#define FL_ATIM_ETR_FILTER_DIV16_N5 (0xaU << ATIM_SMCR_ETF_Pos) +#define FL_ATIM_ETR_FILTER_DIV16_N6 (0xbU << ATIM_SMCR_ETF_Pos) +#define FL_ATIM_ETR_FILTER_DIV16_N8 (0xcU << ATIM_SMCR_ETF_Pos) +#define FL_ATIM_ETR_FILTER_DIV32_N5 (0xdU << ATIM_SMCR_ETF_Pos) +#define FL_ATIM_ETR_FILTER_DIV32_N6 (0xeU << ATIM_SMCR_ETF_Pos) +#define FL_ATIM_ETR_FILTER_DIV32_N8 (0xfU << ATIM_SMCR_ETF_Pos) + + +#define FL_ATIM_TRGI_ITR0 (0x0U << ATIM_SMCR_TS_Pos) +#define FL_ATIM_TRGI_ITR1 (0x1U << ATIM_SMCR_TS_Pos) +#define FL_ATIM_TRGI_ITR2 (0x2U << ATIM_SMCR_TS_Pos) +#define FL_ATIM_TRGI_ITR3 (0x3U << ATIM_SMCR_TS_Pos) +#define FL_ATIM_TRGI_TI1F_EDGE (0x4U << ATIM_SMCR_TS_Pos) +#define FL_ATIM_TRGI_TI1FP1 (0x5U << ATIM_SMCR_TS_Pos) +#define FL_ATIM_TRGI_TI2FP2 (0x6U << ATIM_SMCR_TS_Pos) +#define FL_ATIM_TRGI_ETRF (0x7U << ATIM_SMCR_TS_Pos) + + +#define FL_ATIM_SLAVE_MODE_PROHIBITED (0x0U << ATIM_SMCR_SMS_Pos) +#define FL_ATIM_SLAVE_MODE_ENCODER_X2_TI1 (0x1U << ATIM_SMCR_SMS_Pos) +#define FL_ATIM_SLAVE_MODE_ENCODER_X2_TI2 (0x2U << ATIM_SMCR_SMS_Pos) +#define FL_ATIM_SLAVE_MODE_ENCODER_X4_TI1TI2 (0x3U << ATIM_SMCR_SMS_Pos) +#define FL_ATIM_SLAVE_MODE_TRGI_RISE_RST (0x4U << ATIM_SMCR_SMS_Pos) +#define FL_ATIM_SLAVE_MODE_TRGI_HIGH_RUN (0x5U << ATIM_SMCR_SMS_Pos) +#define FL_ATIM_SLAVE_MODE_TRGI_RISE_RUN (0x6U << ATIM_SMCR_SMS_Pos) +#define FL_ATIM_SLAVE_MODE_TRGI_CLK (0x7U << ATIM_SMCR_SMS_Pos) + + +#define FL_ATIM_DMA_BURST_LENGTH_1 (0x0U << ATIM_DCR_DBL_Pos) +#define FL_ATIM_DMA_BURST_LENGTH_2 (0x1U << ATIM_DCR_DBL_Pos) +#define FL_ATIM_DMA_BURST_LENGTH_3 (0x2U << ATIM_DCR_DBL_Pos) +#define FL_ATIM_DMA_BURST_LENGTH_4 (0x3U << ATIM_DCR_DBL_Pos) +#define FL_ATIM_DMA_BURST_LENGTH_5 (0x4U << ATIM_DCR_DBL_Pos) +#define FL_ATIM_DMA_BURST_LENGTH_6 (0x5U << ATIM_DCR_DBL_Pos) +#define FL_ATIM_DMA_BURST_LENGTH_7 (0x6U << ATIM_DCR_DBL_Pos) +#define FL_ATIM_DMA_BURST_LENGTH_8 (0x7U << ATIM_DCR_DBL_Pos) +#define FL_ATIM_DMA_BURST_LENGTH_9 (0x8U << ATIM_DCR_DBL_Pos) +#define FL_ATIM_DMA_BURST_LENGTH_10 (0x9U << ATIM_DCR_DBL_Pos) +#define FL_ATIM_DMA_BURST_LENGTH_11 (0xaU << ATIM_DCR_DBL_Pos) +#define FL_ATIM_DMA_BURST_LENGTH_12 (0xbU << ATIM_DCR_DBL_Pos) +#define FL_ATIM_DMA_BURST_LENGTH_13 (0xcU << ATIM_DCR_DBL_Pos) +#define FL_ATIM_DMA_BURST_LENGTH_14 (0xdU << ATIM_DCR_DBL_Pos) +#define FL_ATIM_DMA_BURST_LENGTH_15 (0xeU << ATIM_DCR_DBL_Pos) +#define FL_ATIM_DMA_BURST_LENGTH_16 (0xfU << ATIM_DCR_DBL_Pos) +#define FL_ATIM_DMA_BURST_LENGTH_17 (0x10U << ATIM_DCR_DBL_Pos) +#define FL_ATIM_DMA_BURST_LENGTH_18 (0x11U << ATIM_DCR_DBL_Pos) + + +#define FL_ATIM_DMA_BURST_ADDR_CR1 (0x0U << ATIM_DCR_DBA_Pos) +#define FL_ATIM_DMA_BURST_ADDR_CR2 (0x1U << ATIM_DCR_DBA_Pos) +#define FL_ATIM_DMA_BURST_ADDR_SMCR (0x2U << ATIM_DCR_DBA_Pos) +#define FL_ATIM_DMA_BURST_ADDR_DIER (0x3U << ATIM_DCR_DBA_Pos) +#define FL_ATIM_DMA_BURST_ADDR_SR (0x4U << ATIM_DCR_DBA_Pos) +#define FL_ATIM_DMA_BURST_ADDR_EGR (0x5U << ATIM_DCR_DBA_Pos) +#define FL_ATIM_DMA_BURST_ADDR_CCMR1 (0x6U << ATIM_DCR_DBA_Pos) +#define FL_ATIM_DMA_BURST_ADDR_CCMR2 (0x7U << ATIM_DCR_DBA_Pos) +#define FL_ATIM_DMA_BURST_ADDR_CCER (0x8U << ATIM_DCR_DBA_Pos) +#define FL_ATIM_DMA_BURST_ADDR_CNT (0x9U << ATIM_DCR_DBA_Pos) +#define FL_ATIM_DMA_BURST_ADDR_PSC (0xaU << ATIM_DCR_DBA_Pos) +#define FL_ATIM_DMA_BURST_ADDR_ARR (0xbU << ATIM_DCR_DBA_Pos) +#define FL_ATIM_DMA_BURST_ADDR_RCR (0xcU << ATIM_DCR_DBA_Pos) +#define FL_ATIM_DMA_BURST_ADDR_CCR1 (0xdU << ATIM_DCR_DBA_Pos) +#define FL_ATIM_DMA_BURST_ADDR_CCR2 (0xeU << ATIM_DCR_DBA_Pos) +#define FL_ATIM_DMA_BURST_ADDR_CCR3 (0xfU << ATIM_DCR_DBA_Pos) +#define FL_ATIM_DMA_BURST_ADDR_CCR4 (0x10U << ATIM_DCR_DBA_Pos) +#define FL_ATIM_DMA_BURST_ADDR_BDTR (0x11U << ATIM_DCR_DBA_Pos) + + +#define FL_ATIM_OC_MODE_FROZEN (0x0U << ATIM_CCMR_OCM_Pos) +#define FL_ATIM_OC_MODE_ACTIVE (0x1U << ATIM_CCMR_OCM_Pos) +#define FL_ATIM_OC_MODE_INACTIVE (0x2U << ATIM_CCMR_OCM_Pos) +#define FL_ATIM_OC_MODE_TOGGLE (0x3U << ATIM_CCMR_OCM_Pos) +#define FL_ATIM_OC_MODE_FORCED_INACTIVE (0x4U << ATIM_CCMR_OCM_Pos) +#define FL_ATIM_OC_MODE_FORCED_ACTIVE (0x5U << ATIM_CCMR_OCM_Pos) +#define FL_ATIM_OC_MODE_PWM1 (0x6U << ATIM_CCMR_OCM_Pos) +#define FL_ATIM_OC_MODE_PWM2 (0x7U << ATIM_CCMR_OCM_Pos) + + +#define FL_ATIM_IC_FILTER_DIV1 (0x0U << ATIM_CCMR_ICF_Pos) +#define FL_ATIM_IC_FILTER_DIV1_N2 (0x1U << ATIM_CCMR_ICF_Pos) +#define FL_ATIM_IC_FILTER_DIV1_N4 (0x2U << ATIM_CCMR_ICF_Pos) +#define FL_ATIM_IC_FILTER_DIV1_N8 (0x3U << ATIM_CCMR_ICF_Pos) +#define FL_ATIM_IC_FILTER_DIV2_N6 (0x4U << ATIM_CCMR_ICF_Pos) +#define FL_ATIM_IC_FILTER_DIV2_N8 (0x5U << ATIM_CCMR_ICF_Pos) +#define FL_ATIM_IC_FILTER_DIV4_N6 (0x6U << ATIM_CCMR_ICF_Pos) +#define FL_ATIM_IC_FILTER_DIV4_N8 (0x7U << ATIM_CCMR_ICF_Pos) +#define FL_ATIM_IC_FILTER_DIV8_N6 (0x8U << ATIM_CCMR_ICF_Pos) +#define FL_ATIM_IC_FILTER_DIV8_N8 (0x9U << ATIM_CCMR_ICF_Pos) +#define FL_ATIM_IC_FILTER_DIV16_N5 (0xaU << ATIM_CCMR_ICF_Pos) +#define FL_ATIM_IC_FILTER_DIV16_N6 (0xbU << ATIM_CCMR_ICF_Pos) +#define FL_ATIM_IC_FILTER_DIV16_N8 (0xcU << ATIM_CCMR_ICF_Pos) +#define FL_ATIM_IC_FILTER_DIV32_N5 (0xdU << ATIM_CCMR_ICF_Pos) +#define FL_ATIM_IC_FILTER_DIV32_N6 (0xeU << ATIM_CCMR_ICF_Pos) +#define FL_ATIM_IC_FILTER_DIV32_N8 (0xfU << ATIM_CCMR_ICF_Pos) + + +#define FL_ATIM_IC_PSC_DIV1 (0x0U << ATIM_CCMR_ICPSC_Pos) +#define FL_ATIM_IC_PSC_DIV2 (0x1U << ATIM_CCMR_ICPSC_Pos) +#define FL_ATIM_IC_PSC_DIV4 (0x2U << ATIM_CCMR_ICPSC_Pos) +#define FL_ATIM_IC_PSC_DIV8 (0x3U << ATIM_CCMR_ICPSC_Pos) + + +#define FL_ATIM_CHANNEL_MODE_OUTPUT (0x0U << ATIM_CCMR_CCS_Pos) +#define FL_ATIM_CHANNEL_MODE_INPUT_NORMAL (0x1U << ATIM_CCMR_CCS_Pos) +#define FL_ATIM_CHANNEL_MODE_INPUT_CROSSOVER (0x2U << ATIM_CCMR_CCS_Pos) +#define FL_ATIM_CHANNEL_MODE_INPUT_TRC (0x3U << ATIM_CCMR_CCS_Pos) + + +#define FL_ATIM_OCN_POLARITY_NORMAL (0x0U << ATIM_CCER_CCNP_Pos) +#define FL_ATIM_OCN_POLARITY_INVERT (0x1U << ATIM_CCER_CCNP_Pos) + + +#define FL_ATIM_OC_POLARITY_NORMAL (0x0U << ATIM_CCER_CCOP_Pos) +#define FL_ATIM_OC_POLARITY_INVERT (0x1U << ATIM_CCER_CCOP_Pos) + + +#define FL_ATIM_IC_POLARITY_NORMAL (0x0U << ATIM_CCER_CCIP_Pos) +#define FL_ATIM_IC_POLARITY_INVERT (0x1U << ATIM_CCER_CCIP_Pos) + + +#define FL_ATIM_BREAK_POLARITY_LOW (0x0U << ATIM_BDTR_BKP_Pos) +#define FL_ATIM_BREAK_POLARITY_HIGH (0x1U << ATIM_BDTR_BKP_Pos) + + +#define FL_ATIM_OSSR_DISABLE (0x0U << ATIM_BDTR_OSSR_Pos) +#define FL_ATIM_OSSR_ENABLE (0x1U << ATIM_BDTR_OSSR_Pos) + + +#define FL_ATIM_OSSI_DISABLE (0x0U << ATIM_BDTR_OSSI_Pos) +#define FL_ATIM_OSSI_ENABLE (0x1U << ATIM_BDTR_OSSI_Pos) + + +#define FL_ATIM_LOCK_LEVEL_OFF (0x0U << ATIM_BDTR_LOCK_Pos) +#define FL_ATIM_LOCK_LEVEL_1 (0x1U << ATIM_BDTR_LOCK_Pos) +#define FL_ATIM_LOCK_LEVEL_2 (0x2U << ATIM_BDTR_LOCK_Pos) +#define FL_ATIM_LOCK_LEVEL_3 (0x3U << ATIM_BDTR_LOCK_Pos) + + +#define FL_ATIM_BREAK1_GATE_LOW (0x0U << ATIM_BKCR_BRK1GATE_Pos) +#define FL_ATIM_BREAK1_GATE_AUTO (0x1U << ATIM_BKCR_BRK1GATE_Pos) + + +#define FL_ATIM_BREAK2_GATE_LOW (0x0U << ATIM_BKCR_BRK2GATE_Pos) +#define FL_ATIM_BREAK2_GATE_AUTO (0x1U << ATIM_BKCR_BRK2GATE_Pos) + + +#define FL_ATIM_BREAK_FILTER_DIV1 (0x0U << ATIM_BKCR_BRKF_Pos) +#define FL_ATIM_BREAK_FILTER_DIV1_N2 (0x1U << ATIM_BKCR_BRKF_Pos) +#define FL_ATIM_BREAK_FILTER_DIV1_N4 (0x2U << ATIM_BKCR_BRKF_Pos) +#define FL_ATIM_BREAK_FILTER_DIV1_N8 (0x3U << ATIM_BKCR_BRKF_Pos) +#define FL_ATIM_BREAK_FILTER_DIV2_N6 (0x4U << ATIM_BKCR_BRKF_Pos) +#define FL_ATIM_BREAK_FILTER_DIV2_N8 (0x5U << ATIM_BKCR_BRKF_Pos) +#define FL_ATIM_BREAK_FILTER_DIV4_N6 (0x6U << ATIM_BKCR_BRKF_Pos) +#define FL_ATIM_BREAK_FILTER_DIV4_N8 (0x7U << ATIM_BKCR_BRKF_Pos) +#define FL_ATIM_BREAK_FILTER_DIV8_N6 (0x8U << ATIM_BKCR_BRKF_Pos) +#define FL_ATIM_BREAK_FILTER_DIV8_N8 (0x9U << ATIM_BKCR_BRKF_Pos) +#define FL_ATIM_BREAK_FILTER_DIV16_N5 (0xaU << ATIM_BKCR_BRKF_Pos) +#define FL_ATIM_BREAK_FILTER_DIV16_N6 (0xbU << ATIM_BKCR_BRKF_Pos) +#define FL_ATIM_BREAK_FILTER_DIV16_N8 (0xcU << ATIM_BKCR_BRKF_Pos) +#define FL_ATIM_BREAK_FILTER_DIV32_N5 (0xdU << ATIM_BKCR_BRKF_Pos) +#define FL_ATIM_BREAK_FILTER_DIV32_N6 (0xeU << ATIM_BKCR_BRKF_Pos) +#define FL_ATIM_BREAK_FILTER_DIV32_N8 (0xfU << ATIM_BKCR_BRKF_Pos) + + +#define FL_ATIM_BREAK_COMBINATION_OR (0x0U << ATIM_BKCR_BRKCOMB_Pos) +#define FL_ATIM_BREAK_COMBINATION_AND (0x1U << ATIM_BKCR_BRKCOMB_Pos) + + +/** + * @} + */ +/* Exported functions ---------------------------------------------------------------------------------*/ +/** @defgroup ATIM_FL_Exported_Functions ATIM Exported Functions + * @{ + */ + +/** + * @brief 设置时钟分频因子 + * @rmtoll CR1 CKD FL_ATIM_SetClockDivision + * @param TIMx TIM instance + * @param div This parameter can be one of the following values: + * @arg @ref FL_ATIM_CLK_DIVISION_DIV1 + * @arg @ref FL_ATIM_CLK_DIVISION_DIV2 + * @arg @ref FL_ATIM_CLK_DIVISION_DIV4 + * @retval None + */ +__STATIC_INLINE void FL_ATIM_SetClockDivision(ATIM_Type *TIMx, uint32_t div) +{ + MODIFY_REG(TIMx->CR1, ATIM_CR1_CKD_Msk, div); +} + +/** + * @brief 读取时钟分频因子 + * @rmtoll CR1 CKD FL_ATIM_GetClockDivision + * @param TIMx TIM instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_ATIM_CLK_DIVISION_DIV1 + * @arg @ref FL_ATIM_CLK_DIVISION_DIV2 + * @arg @ref FL_ATIM_CLK_DIVISION_DIV4 + */ +__STATIC_INLINE uint32_t FL_ATIM_GetClockDivision(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->CR1, ATIM_CR1_CKD_Msk)); +} + +/** + * @brief 自动重装载使能 + * @rmtoll CR1 ARPE FL_ATIM_EnableARRPreload + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_ATIM_EnableARRPreload(ATIM_Type *TIMx) +{ + SET_BIT(TIMx->CR1, ATIM_CR1_ARPE_Msk); +} + +/** + * @brief 获取自动重装载使能状态 + * @rmtoll CR1 ARPE FL_ATIM_IsEnabledARRPreload + * @param TIMx TIM instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ATIM_IsEnabledARRPreload(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->CR1, ATIM_CR1_ARPE_Msk) == ATIM_CR1_ARPE_Msk); +} + +/** + * @brief 自动重装载禁用 + * @rmtoll CR1 ARPE FL_ATIM_DisableARRPreload + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_ATIM_DisableARRPreload(ATIM_Type *TIMx) +{ + CLEAR_BIT(TIMx->CR1, ATIM_CR1_ARPE_Msk); +} + +/** + * @brief 计数器对齐模式设置 + * @rmtoll CR1 CMS FL_ATIM_SetCounterAlignedMode + * @param TIMx TIM instance + * @param mode This parameter can be one of the following values: + * @arg @ref FL_ATIM_COUNTER_ALIGNED_EDGE + * @arg @ref FL_ATIM_COUNTER_ALIGNED_CENTER_DOWN + * @arg @ref FL_ATIM_COUNTER_ALIGNED_CENTER_UP + * @arg @ref FL_ATIM_COUNTER_ALIGNED_CENTER_UP_DOWN + * @retval None + */ +__STATIC_INLINE void FL_ATIM_SetCounterAlignedMode(ATIM_Type *TIMx, uint32_t mode) +{ + MODIFY_REG(TIMx->CR1, ATIM_CR1_CMS_Msk, mode); +} + +/** + * @brief 读取计数器对齐模式 + * @rmtoll CR1 CMS FL_ATIM_GetCounterAlignedMode + * @param TIMx TIM instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_ATIM_COUNTER_ALIGNED_EDGE + * @arg @ref FL_ATIM_COUNTER_ALIGNED_CENTER_DOWN + * @arg @ref FL_ATIM_COUNTER_ALIGNED_CENTER_UP + * @arg @ref FL_ATIM_COUNTER_ALIGNED_CENTER_UP_DOWN + */ +__STATIC_INLINE uint32_t FL_ATIM_GetCounterAlignedMode(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->CR1, ATIM_CR1_CMS_Msk)); +} + +/** + * @brief 设置记数方向 + * @rmtoll CR1 DIR FL_ATIM_SetCounterDirection + * @param TIMx TIM instance + * @param dir This parameter can be one of the following values: + * @arg @ref FL_ATIM_COUNTER_DIR_UP + * @arg @ref FL_ATIM_COUNTER_DIR_DOWN + * @retval None + */ +__STATIC_INLINE void FL_ATIM_SetCounterDirection(ATIM_Type *TIMx, uint32_t dir) +{ + MODIFY_REG(TIMx->CR1, ATIM_CR1_DIR_Msk, dir); +} + +/** + * @brief 读取记数方向 + * @rmtoll CR1 DIR FL_ATIM_GetCounterDirection + * @param TIMx TIM instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_ATIM_COUNTER_DIR_UP + * @arg @ref FL_ATIM_COUNTER_DIR_DOWN + */ +__STATIC_INLINE uint32_t FL_ATIM_GetCounterDirection(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->CR1, ATIM_CR1_DIR_Msk)); +} + +/** + * @brief 设置单脉冲输出模式 + * @rmtoll CR1 OPM FL_ATIM_SetOnePulseMode + * @param TIMx TIM instance + * @param mode This parameter can be one of the following values: + * @arg @ref FL_ATIM_ONE_PULSE_MODE_CONTINUOUS + * @arg @ref FL_ATIM_ONE_PULSE_MODE_SINGLE + * @retval None + */ +__STATIC_INLINE void FL_ATIM_SetOnePulseMode(ATIM_Type *TIMx, uint32_t mode) +{ + MODIFY_REG(TIMx->CR1, ATIM_CR1_OPM_Msk, mode); +} + +/** + * @brief 读取单脉冲输出的模式 + * @rmtoll CR1 OPM FL_ATIM_GetOnePulseMode + * @param TIMx TIM instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_ATIM_ONE_PULSE_MODE_CONTINUOUS + * @arg @ref FL_ATIM_ONE_PULSE_MODE_SINGLE + */ +__STATIC_INLINE uint32_t FL_ATIM_GetOnePulseMode(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->CR1, ATIM_CR1_OPM_Msk)); +} + +/** + * @brief 设置更新请求源 + * @rmtoll CR1 URS FL_ATIM_SetUpdateSource + * @param TIMx TIM instance + * @param source This parameter can be one of the following values: + * @arg @ref FL_ATIM_UPDATE_SOURCE_REGULAR + * @arg @ref FL_ATIM_UPDATE_SOURCE_COUNTER + * @retval None + */ +__STATIC_INLINE void FL_ATIM_SetUpdateSource(ATIM_Type *TIMx, uint32_t source) +{ + MODIFY_REG(TIMx->CR1, ATIM_CR1_URS_Msk, source); +} + +/** + * @brief 读取更新请求源 + * @rmtoll CR1 URS FL_ATIM_GetUpdateSource + * @param TIMx TIM instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_ATIM_UPDATE_SOURCE_REGULAR + * @arg @ref FL_ATIM_UPDATE_SOURCE_COUNTER + */ +__STATIC_INLINE uint32_t FL_ATIM_GetUpdateSource(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->CR1, ATIM_CR1_URS_Msk)); +} + +/** + * @brief 使能更新事件 + * @rmtoll CR1 UDIS FL_ATIM_EnableUpdateEvent + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_ATIM_EnableUpdateEvent(ATIM_Type *TIMx) +{ + CLEAR_BIT(TIMx->CR1, ATIM_CR1_UDIS_Msk); +} + +/** + * @brief 读取更新事件状态 + * @rmtoll CR1 UDIS FL_ATIM_IsEnabledUpdateEvent + * @param TIMx TIM instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ATIM_IsEnabledUpdateEvent(ATIM_Type *TIMx) +{ + return (uint32_t)!(READ_BIT(TIMx->CR1, ATIM_CR1_UDIS_Msk) == ATIM_CR1_UDIS_Msk); +} + +/** + * @brief 禁用更新事件 + * @rmtoll CR1 UDIS FL_ATIM_DisableUpdateEvent + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_ATIM_DisableUpdateEvent(ATIM_Type *TIMx) +{ + SET_BIT(TIMx->CR1, ATIM_CR1_UDIS_Msk); +} + +/** + * @brief 计数器使能 + * @rmtoll CR1 CEN FL_ATIM_Enable + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_ATIM_Enable(ATIM_Type *TIMx) +{ + SET_BIT(TIMx->CR1, ATIM_CR1_CEN_Msk); +} + +/** + * @brief 读取计数器使能状态 + * @rmtoll CR1 CEN FL_ATIM_IsEnabled + * @param TIMx TIM instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ATIM_IsEnabled(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->CR1, ATIM_CR1_CEN_Msk) == ATIM_CR1_CEN_Msk); +} + +/** + * @brief 计数器关闭 + * @rmtoll CR1 CEN FL_ATIM_Disable + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_ATIM_Disable(ATIM_Type *TIMx) +{ + CLEAR_BIT(TIMx->CR1, ATIM_CR1_CEN_Msk); +} + +/** + * @brief 设置OCN的输出空闲状态 + * @note + * @rmtoll CR2 OISN FL_ATIM_OC_SetReverseChannelIdleState + * @param TIMx TIM instance + * @param OCNIdleState This parameter can be one of the following values: + * @arg @ref FL_ATIM_OCN_IDLE_STATE_LOW + * @arg @ref FL_ATIM_OCN_IDLE_STATE_HIGH + * @param channel This parameter can be one of the following values: + * @arg @ref FL_ATIM_CHANNEL_1 + * @arg @ref FL_ATIM_CHANNEL_2 + * @arg @ref FL_ATIM_CHANNEL_3 + * @retval None + */ +__STATIC_INLINE void FL_ATIM_OC_SetReverseChannelIdleState(ATIM_Type *TIMx, uint32_t OCNIdleState, uint32_t channel) +{ + MODIFY_REG(TIMx->CR2, (ATIM_CR2_OISN_Msk << (channel * 2)), OCNIdleState << (channel * 2)); +} + +/** + * @brief 读取OCN的输出空闲状态 + * @note + * @rmtoll CR2 OISN FL_ATIM_OC_GetReverseChannelIdleState + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_ATIM_CHANNEL_1 + * @arg @ref FL_ATIM_CHANNEL_2 + * @arg @ref FL_ATIM_CHANNEL_3 + * @retval Returned value can be one of the following values: + * @arg @ref FL_ATIM_OCN_IDLE_STATE_LOW + * @arg @ref FL_ATIM_OCN_IDLE_STATE_HIGH + */ +__STATIC_INLINE uint32_t FL_ATIM_OC_GetReverseChannelIdleState(ATIM_Type *TIMx, uint32_t channel) +{ + return (uint32_t)(READ_BIT(TIMx->CR2, (ATIM_CR2_OISN_Msk << (channel * 2)))); +} + +/** + * @brief 设置OC的输出空闲状态 + * @note + * @rmtoll CR2 OIS FL_ATIM_OC_SetChannelIdleState + * @param TIMx TIM instance + * @param OCIdleState This parameter can be one of the following values: + * @arg @ref FL_ATIM_OC_IDLE_STATE_LOW + * @arg @ref FL_ATIM_OC_IDLE_STATE_HIGH + * @param channel This parameter can be one of the following values: + * @arg @ref FL_ATIM_CHANNEL_1 + * @arg @ref FL_ATIM_CHANNEL_2 + * @arg @ref FL_ATIM_CHANNEL_3 + * @arg @ref FL_ATIM_CHANNEL_4 + * @retval None + */ +__STATIC_INLINE void FL_ATIM_OC_SetChannelIdleState(ATIM_Type *TIMx, uint32_t OCIdleState, uint32_t channel) +{ + MODIFY_REG(TIMx->CR2, (ATIM_CR2_OIS_Msk << (channel * 2)), OCIdleState << (channel * 2)); +} + +/** + * @brief 读取OC的输出空闲状态 + * @note + * @rmtoll CR2 OIS FL_ATIM_OC_GetChannelIdleState + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_ATIM_CHANNEL_1 + * @arg @ref FL_ATIM_CHANNEL_2 + * @arg @ref FL_ATIM_CHANNEL_3 + * @arg @ref FL_ATIM_CHANNEL_4 + * @retval Returned value can be one of the following values: + * @arg @ref FL_ATIM_OC_IDLE_STATE_LOW + * @arg @ref FL_ATIM_OC_IDLE_STATE_HIGH + */ +__STATIC_INLINE uint32_t FL_ATIM_OC_GetChannelIdleState(ATIM_Type *TIMx, uint32_t channel) +{ + return (uint32_t)(READ_BIT(TIMx->CR2, (ATIM_CR2_OIS_Msk << (channel * 2)))); +} + +/** + * @brief 通道1输入源选择 + * @rmtoll CR2 TI1S FL_ATIM_IC_EnableXORCombination + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_ATIM_IC_EnableXORCombination(ATIM_Type *TIMx) +{ + SET_BIT(TIMx->CR2, ATIM_CR2_TI1S_Msk); +} + +/** + * @brief 读取通道1输入源 + * @rmtoll CR2 TI1S FL_ATIM_IC_IsEnabledXORCombination + * @param TIMx TIM instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ATIM_IC_IsEnabledXORCombination(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->CR2, ATIM_CR2_TI1S_Msk) == ATIM_CR2_TI1S_Msk); +} + +/** + * @brief 通道1输入源禁用XOR组合 + * @rmtoll CR2 TI1S FL_ATIM_IC_DisableXORCombination + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_ATIM_IC_DisableXORCombination(ATIM_Type *TIMx) +{ + CLEAR_BIT(TIMx->CR2, ATIM_CR2_TI1S_Msk); +} + +/** + * @brief 设置同步触发信号源 + * @rmtoll CR2 MMS FL_ATIM_SetTriggerOutput + * @param TIMx TIM instance + * @param triggerOutput This parameter can be one of the following values: + * @arg @ref FL_ATIM_TRGO_RESET + * @arg @ref FL_ATIM_TRGO_ENABLE + * @arg @ref FL_ATIM_TRGO_UPDATE + * @arg @ref FL_ATIM_TRGO_CC1IF + * @arg @ref FL_ATIM_TRGO_OC1REF + * @arg @ref FL_ATIM_TRGO_OC2REF + * @arg @ref FL_ATIM_TRGO_OC3REF + * @arg @ref FL_ATIM_TRGO_OC4REF + * @retval None + */ +__STATIC_INLINE void FL_ATIM_SetTriggerOutput(ATIM_Type *TIMx, uint32_t triggerOutput) +{ + MODIFY_REG(TIMx->CR2, ATIM_CR2_MMS_Msk, triggerOutput); +} + +/** + * @brief 读取同步触发源 + * @rmtoll CR2 MMS FL_ATIM_GetTriggerOutput + * @param TIMx TIM instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_ATIM_TRGO_RESET + * @arg @ref FL_ATIM_TRGO_ENABLE + * @arg @ref FL_ATIM_TRGO_UPDATE + * @arg @ref FL_ATIM_TRGO_CC1IF + * @arg @ref FL_ATIM_TRGO_OC1REF + * @arg @ref FL_ATIM_TRGO_OC2REF + * @arg @ref FL_ATIM_TRGO_OC3REF + * @arg @ref FL_ATIM_TRGO_OC4REF + */ +__STATIC_INLINE uint32_t FL_ATIM_GetTriggerOutput(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->CR2, ATIM_CR2_MMS_Msk)); +} + +/** + * @brief 设置DMA请求触发 + * @rmtoll CR2 CCDS FL_ATIM_CC_SetDMAReqTrigger + * @param TIMx TIM instance + * @param trigger This parameter can be one of the following values: + * @arg @ref FL_ATIM_DMA_REQ_CC + * @arg @ref FL_ATIM_DMA_REQ_UPDATE + * @retval None + */ +__STATIC_INLINE void FL_ATIM_CC_SetDMAReqTrigger(ATIM_Type *TIMx, uint32_t trigger) +{ + MODIFY_REG(TIMx->CR2, ATIM_CR2_CCDS_Msk, trigger); +} + +/** + * @brief 读取DMA请求触发 + * @rmtoll CR2 CCDS FL_ATIM_CC_GetDMAReqTrigger + * @param TIMx TIM instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_ATIM_DMA_REQ_CC + * @arg @ref FL_ATIM_DMA_REQ_UPDATE + */ +__STATIC_INLINE uint32_t FL_ATIM_CC_GetDMAReqTrigger(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->CR2, ATIM_CR2_CCDS_Msk)); +} + +/** + * @brief 设置捕捉比较寄存器更新选择 + * @rmtoll CR2 CCUS FL_ATIM_CC_SetUpdateSource + * @param TIMx TIM instance + * @param updateSource This parameter can be one of the following values: + * @arg @ref FL_ATIM_UPDATE_SOURCE_COMG_ONLY + * @arg @ref FL_ATIM_UPDATE_SOURCE_COMG_AND_TRGI + * @retval None + */ +__STATIC_INLINE void FL_ATIM_CC_SetUpdateSource(ATIM_Type *TIMx, uint32_t updateSource) +{ + MODIFY_REG(TIMx->CR2, ATIM_CR2_CCUS_Msk, updateSource); +} + +/** + * @brief 读取捕捉比较寄存器更新源 + * @rmtoll CR2 CCUS FL_ATIM_CC_GetUpdateSource + * @param TIMx TIM instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_ATIM_UPDATE_SOURCE_COMG_ONLY + * @arg @ref FL_ATIM_UPDATE_SOURCE_COMG_AND_TRGI + */ +__STATIC_INLINE uint32_t FL_ATIM_CC_GetUpdateSource(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->CR2, ATIM_CR2_CCUS_Msk)); +} + +/** + * @brief 捕捉比较预装载使能 + * @rmtoll CR2 CCPC FL_ATIM_CC_EnablePreload + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_ATIM_CC_EnablePreload(ATIM_Type *TIMx) +{ + SET_BIT(TIMx->CR2, ATIM_CR2_CCPC_Msk); +} + +/** + * @brief 读取捕捉比较预装载使能状态 + * @rmtoll CR2 CCPC FL_ATIM_CC_IsEnabledPreload + * @param TIMx TIM instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ATIM_CC_IsEnabledPreload(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->CR2, ATIM_CR2_CCPC_Msk) == ATIM_CR2_CCPC_Msk); +} + +/** + * @brief 捕捉比较预装载失能 + * @rmtoll CR2 CCPC FL_ATIM_CC_DisablePreload + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_ATIM_CC_DisablePreload(ATIM_Type *TIMx) +{ + CLEAR_BIT(TIMx->CR2, ATIM_CR2_CCPC_Msk); +} + +/** + * @brief 设置外部触发信号极性 + * @rmtoll SMCR ETP FL_ATIM_SetETRPolarity + * @param TIMx TIM instance + * @param polarity This parameter can be one of the following values: + * @arg @ref FL_ATIM_ETR_POLARITY_NORMAL + * @arg @ref FL_ATIM_ETR_POLARITY_INVERT + * @retval None + */ +__STATIC_INLINE void FL_ATIM_SetETRPolarity(ATIM_Type *TIMx, uint32_t polarity) +{ + MODIFY_REG(TIMx->SMCR, ATIM_SMCR_ETP_Msk, polarity); +} + +/** + * @brief 读取外部触发信号极性 + * @rmtoll SMCR ETP FL_ATIM_GetETRPolarity + * @param TIMx TIM instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_ATIM_ETR_POLARITY_NORMAL + * @arg @ref FL_ATIM_ETR_POLARITY_INVERT + */ +__STATIC_INLINE uint32_t FL_ATIM_GetETRPolarity(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->SMCR, ATIM_SMCR_ETP_Msk)); +} + +/** + * @brief 外部时钟使能 + * @rmtoll SMCR ECE FL_ATIM_EnableExternalClock + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_ATIM_EnableExternalClock(ATIM_Type *TIMx) +{ + SET_BIT(TIMx->SMCR, ATIM_SMCR_ECE_Msk); +} + +/** + * @brief 读取外部时钟使能状态 + * @rmtoll SMCR ECE FL_ATIM_IsEnabledExternalClock + * @param TIMx TIM instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ATIM_IsEnabledExternalClock(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->SMCR, ATIM_SMCR_ECE_Msk) == ATIM_SMCR_ECE_Msk); +} + +/** + * @brief 外部时钟禁用 + * @rmtoll SMCR ECE FL_ATIM_DisableExternalClock + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_ATIM_DisableExternalClock(ATIM_Type *TIMx) +{ + CLEAR_BIT(TIMx->SMCR, ATIM_SMCR_ECE_Msk); +} + +/** + * @brief 设置外部触发信号预分频 + * @rmtoll SMCR ETPS FL_ATIM_SetETRPrescaler + * @param TIMx TIM instance + * @param psc This parameter can be one of the following values: + * @arg @ref FL_ATIM_ETR_PSC_DIV1 + * @arg @ref FL_ATIM_ETR_PSC_DIV2 + * @arg @ref FL_ATIM_ETR_PSC_DIV4 + * @arg @ref FL_ATIM_ETR_PSC_DIV8 + * @retval None + */ +__STATIC_INLINE void FL_ATIM_SetETRPrescaler(ATIM_Type *TIMx, uint32_t psc) +{ + MODIFY_REG(TIMx->SMCR, ATIM_SMCR_ETPS_Msk, psc); +} + +/** + * @brief 读取外部触发信号预分频 + * @rmtoll SMCR ETPS FL_ATIM_GetETRPrescaler + * @param TIMx TIM instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_ATIM_ETR_PSC_DIV1 + * @arg @ref FL_ATIM_ETR_PSC_DIV2 + * @arg @ref FL_ATIM_ETR_PSC_DIV4 + * @arg @ref FL_ATIM_ETR_PSC_DIV8 + */ +__STATIC_INLINE uint32_t FL_ATIM_GetETRPrescaler(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->SMCR, ATIM_SMCR_ETPS_Msk)); +} + +/** + * @brief 设置外部触发信号滤波时钟和长度 + * @rmtoll SMCR ETF FL_ATIM_SetETRFilter + * @param TIMx TIM instance + * @param filter This parameter can be one of the following values: + * @arg @ref FL_ATIM_ETR_FILTER_DIV1 + * @arg @ref FL_ATIM_ETR_FILTER_DIV1_N2 + * @arg @ref FL_ATIM_ETR_FILTER_DIV1_N4 + * @arg @ref FL_ATIM_ETR_FILTER_DIV1_N8 + * @arg @ref FL_ATIM_ETR_FILTER_DIV2_N6 + * @arg @ref FL_ATIM_ETR_FILTER_DIV2_N8 + * @arg @ref FL_ATIM_ETR_FILTER_DIV4_N6 + * @arg @ref FL_ATIM_ETR_FILTER_DIV4_N8 + * @arg @ref FL_ATIM_ETR_FILTER_DIV8_N6 + * @arg @ref FL_ATIM_ETR_FILTER_DIV8_N8 + * @arg @ref FL_ATIM_ETR_FILTER_DIV16_N5 + * @arg @ref FL_ATIM_ETR_FILTER_DIV16_N6 + * @arg @ref FL_ATIM_ETR_FILTER_DIV16_N8 + * @arg @ref FL_ATIM_ETR_FILTER_DIV32_N5 + * @arg @ref FL_ATIM_ETR_FILTER_DIV32_N6 + * @arg @ref FL_ATIM_ETR_FILTER_DIV32_N8 + * @retval None + */ +__STATIC_INLINE void FL_ATIM_SetETRFilter(ATIM_Type *TIMx, uint32_t filter) +{ + MODIFY_REG(TIMx->SMCR, ATIM_SMCR_ETF_Msk, filter); +} + +/** + * @brief 读取外部触发信号滤波时钟和长度 + * @rmtoll SMCR ETF FL_ATIM_GetETRFilter + * @param TIMx TIM instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_ATIM_ETR_FILTER_DIV1 + * @arg @ref FL_ATIM_ETR_FILTER_DIV1_N2 + * @arg @ref FL_ATIM_ETR_FILTER_DIV1_N4 + * @arg @ref FL_ATIM_ETR_FILTER_DIV1_N8 + * @arg @ref FL_ATIM_ETR_FILTER_DIV2_N6 + * @arg @ref FL_ATIM_ETR_FILTER_DIV2_N8 + * @arg @ref FL_ATIM_ETR_FILTER_DIV4_N6 + * @arg @ref FL_ATIM_ETR_FILTER_DIV4_N8 + * @arg @ref FL_ATIM_ETR_FILTER_DIV8_N6 + * @arg @ref FL_ATIM_ETR_FILTER_DIV8_N8 + * @arg @ref FL_ATIM_ETR_FILTER_DIV16_N5 + * @arg @ref FL_ATIM_ETR_FILTER_DIV16_N6 + * @arg @ref FL_ATIM_ETR_FILTER_DIV16_N8 + * @arg @ref FL_ATIM_ETR_FILTER_DIV32_N5 + * @arg @ref FL_ATIM_ETR_FILTER_DIV32_N6 + * @arg @ref FL_ATIM_ETR_FILTER_DIV32_N8 + */ +__STATIC_INLINE uint32_t FL_ATIM_GetETRFilter(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->SMCR, ATIM_SMCR_ETF_Msk)); +} + +/** + * @brief 主/从模式使能 + * @rmtoll SMCR MSM FL_ATIM_EnableMasterSlaveMode + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_ATIM_EnableMasterSlaveMode(ATIM_Type *TIMx) +{ + SET_BIT(TIMx->SMCR, ATIM_SMCR_MSM_Msk); +} + +/** + * @brief 读取主/从模式使能状态 + * @rmtoll SMCR MSM FL_ATIM_IsEnabledMasterSlaveMode + * @param TIMx TIM instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ATIM_IsEnabledMasterSlaveMode(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->SMCR, ATIM_SMCR_MSM_Msk) == ATIM_SMCR_MSM_Msk); +} + +/** + * @brief 定时器主/从模式禁用 + * @rmtoll SMCR MSM FL_ATIM_DisableMasterSlaveMode + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_ATIM_DisableMasterSlaveMode(ATIM_Type *TIMx) +{ + CLEAR_BIT(TIMx->SMCR, ATIM_SMCR_MSM_Msk); +} + +/** + * @brief 设置同步计数器触发源 + * @rmtoll SMCR TS FL_ATIM_SetTriggerInput + * @param TIMx TIM instance + * @param triggerInput This parameter can be one of the following values: + * @arg @ref FL_ATIM_TRGI_ITR0 + * @arg @ref FL_ATIM_TRGI_ITR1 + * @arg @ref FL_ATIM_TRGI_ITR2 + * @arg @ref FL_ATIM_TRGI_ITR3 + * @arg @ref FL_ATIM_TRGI_TI1F_EDGE + * @arg @ref FL_ATIM_TRGI_TI1FP1 + * @arg @ref FL_ATIM_TRGI_TI2FP2 + * @arg @ref FL_ATIM_TRGI_ETRF + * @retval None + */ +__STATIC_INLINE void FL_ATIM_SetTriggerInput(ATIM_Type *TIMx, uint32_t triggerInput) +{ + MODIFY_REG(TIMx->SMCR, ATIM_SMCR_TS_Msk, triggerInput); +} + +/** + * @brief 读取同步计数器的触发源 + * @rmtoll SMCR TS FL_ATIM_GetTriggerInput + * @param TIMx TIM instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_ATIM_TRGI_ITR0 + * @arg @ref FL_ATIM_TRGI_ITR1 + * @arg @ref FL_ATIM_TRGI_ITR2 + * @arg @ref FL_ATIM_TRGI_ITR3 + * @arg @ref FL_ATIM_TRGI_TI1F_EDGE + * @arg @ref FL_ATIM_TRGI_TI1FP1 + * @arg @ref FL_ATIM_TRGI_TI2FP2 + * @arg @ref FL_ATIM_TRGI_ETRF + */ +__STATIC_INLINE uint32_t FL_ATIM_GetTriggerInput(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->SMCR, ATIM_SMCR_TS_Msk)); +} + +/** + * @brief 从机模式设置 + * @rmtoll SMCR SMS FL_ATIM_SetSlaveMode + * @param TIMx TIM instance + * @param encoderMode This parameter can be one of the following values: + * @arg @ref FL_ATIM_SLAVE_MODE_PROHIBITED + * @arg @ref FL_ATIM_SLAVE_MODE_ENCODER_X2_TI1 + * @arg @ref FL_ATIM_SLAVE_MODE_ENCODER_X2_TI2 + * @arg @ref FL_ATIM_SLAVE_MODE_ENCODER_X4_TI1TI2 + * @arg @ref FL_ATIM_SLAVE_MODE_TRGI_RISE_RST + * @arg @ref FL_ATIM_SLAVE_MODE_TRGI_HIGH_RUN + * @arg @ref FL_ATIM_SLAVE_MODE_TRGI_RISE_RUN + * @arg @ref FL_ATIM_SLAVE_MODE_TRGI_CLK + * @retval None + */ +__STATIC_INLINE void FL_ATIM_SetSlaveMode(ATIM_Type *TIMx, uint32_t encoderMode) +{ + MODIFY_REG(TIMx->SMCR, ATIM_SMCR_SMS_Msk, encoderMode); +} + +/** + * @brief 读取从机模式 + * @rmtoll SMCR SMS FL_ATIM_GetSlaveMode + * @param TIMx TIM instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_ATIM_SLAVE_MODE_PROHIBITED + * @arg @ref FL_ATIM_SLAVE_MODE_ENCODER_X2_TI1 + * @arg @ref FL_ATIM_SLAVE_MODE_ENCODER_X2_TI2 + * @arg @ref FL_ATIM_SLAVE_MODE_NCODER_X4_TI1TI2 + * @arg @ref FL_ATIM_SLAVE_MODE_TRGI_RISE_RST + * @arg @ref FL_ATIM_SLAVE_MODE_TRGI_HIGH_RUN + * @arg @ref FL_ATIM_SLAVE_MODE_TRGI_RISE_RUN + * @arg @ref FL_ATIM_SLAVE_MODE_TRGI_CLK + */ +__STATIC_INLINE uint32_t FL_ATIM_GetSlaveMode(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->SMCR, ATIM_SMCR_SMS_Msk)); +} + +/** + * @brief 通道1的模式配置为Burst模式 + * @rmtoll DIER CC1BURSTEN FL_ATIM_EnableCC1DMABurstMode + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_ATIM_EnableCC1DMABurstMode(ATIM_Type *TIMx) +{ + SET_BIT(TIMx->DIER, ATIM_DIER_CC1BURSTEN_Msk); +} + +/** + * @brief 读取通道1的模式配置 + * @rmtoll DIER CC1BURSTEN FL_ATIM_IsEnabledCC1DMABurstMode + * @param TIMx TIM instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ATIM_IsEnabledCC1DMABurstMode(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->DIER, ATIM_DIER_CC1BURSTEN_Msk) == ATIM_DIER_CC1BURSTEN_Msk); +} + +/** + * @brief 通道1的Burst模式禁用 + * @rmtoll DIER CC1BURSTEN FL_ATIM_DisableCC1DMABurstMode + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_ATIM_DisableCC1DMABurstMode(ATIM_Type *TIMx) +{ + CLEAR_BIT(TIMx->DIER, ATIM_DIER_CC1BURSTEN_Msk); +} + +/** + * @brief 通道2的模式配置为Burst模式 + * @rmtoll DIER CC2BURSTEN FL_ATIM_EnableCC2DMABurstMode + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_ATIM_EnableCC2DMABurstMode(ATIM_Type *TIMx) +{ + SET_BIT(TIMx->DIER, ATIM_DIER_CC2BURSTEN_Msk); +} + +/** + * @brief 读取通道2的模式配置 + * @rmtoll DIER CC2BURSTEN FL_ATIM_IsEnabledCC2DMABurstMode + * @param TIMx TIM instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ATIM_IsEnabledCC2DMABurstMode(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->DIER, ATIM_DIER_CC2BURSTEN_Msk) == ATIM_DIER_CC2BURSTEN_Msk); +} + +/** + * @brief 通道2的Burst模式禁用 + * @rmtoll DIER CC2BURSTEN FL_ATIM_DisableCC2DMABurstMode + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_ATIM_DisableCC2DMABurstMode(ATIM_Type *TIMx) +{ + CLEAR_BIT(TIMx->DIER, ATIM_DIER_CC2BURSTEN_Msk); +} + +/** + * @brief 通道3的模式配置为Burst模式 + * @rmtoll DIER CC3BURSTEN FL_ATIM_EnableCC3DMABurstMode + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_ATIM_EnableCC3DMABurstMode(ATIM_Type *TIMx) +{ + SET_BIT(TIMx->DIER, ATIM_DIER_CC3BURSTEN_Msk); +} + +/** + * @brief 读取通道3的模式配置 + * @rmtoll DIER CC3BURSTEN FL_ATIM_IsEnabledCC3DMABurstMode + * @param TIMx TIM instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ATIM_IsEnabledCC3DMABurstMode(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->DIER, ATIM_DIER_CC3BURSTEN_Msk) == ATIM_DIER_CC3BURSTEN_Msk); +} + +/** + * @brief 通道3的Burst模式禁用 + * @rmtoll DIER CC3BURSTEN FL_ATIM_DisableCC3DMABurstMode + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_ATIM_DisableCC3DMABurstMode(ATIM_Type *TIMx) +{ + CLEAR_BIT(TIMx->DIER, ATIM_DIER_CC3BURSTEN_Msk); +} + +/** + * @brief 通道4的模式配置为Burst模式 + * @rmtoll DIER CC4BURSTEN FL_ATIM_EnableCC4DMABurstMode + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_ATIM_EnableCC4DMABurstMode(ATIM_Type *TIMx) +{ + SET_BIT(TIMx->DIER, ATIM_DIER_CC4BURSTEN_Msk); +} + +/** + * @brief 读取通道4的模式配置 + * @rmtoll DIER CC4BURSTEN FL_ATIM_IsEnabledCC4DMABurstMode + * @param TIMx TIM instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ATIM_IsEnabledCC4DMABurstMode(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->DIER, ATIM_DIER_CC4BURSTEN_Msk) == ATIM_DIER_CC4BURSTEN_Msk); +} + +/** + * @brief 通道4的Burst模式禁用 + * @rmtoll DIER CC4BURSTEN FL_ATIM_DisableCC4DMABurstMode + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_ATIM_DisableCC4DMABurstMode(ATIM_Type *TIMx) +{ + CLEAR_BIT(TIMx->DIER, ATIM_DIER_CC4BURSTEN_Msk); +} + +/** + * @brief 外部触发DMA请求使能 + * @rmtoll DIER TDE FL_ATIM_EnableDMAReq_Trigger + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_ATIM_EnableDMAReq_Trigger(ATIM_Type *TIMx) +{ + SET_BIT(TIMx->DIER, ATIM_DIER_TDE_Msk); +} + +/** + * @brief 读取外部触发DMA请求使能状态 + * @rmtoll DIER TDE FL_ATIM_IsEnabledDMAReq_Trigger + * @param TIMx TIM instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ATIM_IsEnabledDMAReq_Trigger(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->DIER, ATIM_DIER_TDE_Msk) == ATIM_DIER_TDE_Msk); +} + +/** + * @brief 外部触发DMA请求禁用 + * @rmtoll DIER TDE FL_ATIM_DisableDMAReq_Trigger + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_ATIM_DisableDMAReq_Trigger(ATIM_Type *TIMx) +{ + CLEAR_BIT(TIMx->DIER, ATIM_DIER_TDE_Msk); +} + +/** + * @brief COM事件DMA请求使能 + * @note + * @rmtoll DIER COMDE FL_ATIM_EnableDMAReq_COM + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_ATIM_EnableDMAReq_COM(ATIM_Type *TIMx) +{ + SET_BIT(TIMx->DIER, ATIM_DIER_COMDE_Msk); +} + +/** + * @brief 读取COM事件DMA请求使能状态 + * @note + * @rmtoll DIER COMDE FL_ATIM_IsEnabledDMAReq_COM + * @param TIMx TIM instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ATIM_IsEnabledDMAReq_COM(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->DIER, ATIM_DIER_COMDE_Msk) == ATIM_DIER_COMDE_Msk); +} + +/** + * @brief COM事件DMA请求禁用 + * @note + * @rmtoll DIER COMDE FL_ATIM_DisableDMAReq_COM + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_ATIM_DisableDMAReq_COM(ATIM_Type *TIMx) +{ + CLEAR_BIT(TIMx->DIER, ATIM_DIER_COMDE_Msk); +} + +/** + * @brief 捕捉比较通道的DMA请求使能 + * @rmtoll DIER CCDE FL_ATIM_EnableDMAReq_CC + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_ATIM_CHANNEL_1 + * @arg @ref FL_ATIM_CHANNEL_2 + * @arg @ref FL_ATIM_CHANNEL_3 + * @arg @ref FL_ATIM_CHANNEL_4 + * @retval None + */ +__STATIC_INLINE void FL_ATIM_EnableDMAReq_CC(ATIM_Type *TIMx, uint32_t channel) +{ + SET_BIT(TIMx->DIER, ATIM_DIER_CCDE_Msk << channel); +} + +/** + * @brief 读取捕捉比较通道的DMA请求使能 + * @rmtoll DIER CCDE FL_ATIM_IsEnabledDMAReq_CC + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_ATIM_CHANNEL_1 + * @arg @ref FL_ATIM_CHANNEL_2 + * @arg @ref FL_ATIM_CHANNEL_3 + * @arg @ref FL_ATIM_CHANNEL_4 + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ATIM_IsEnabledDMAReq_CC(ATIM_Type *TIMx, uint32_t channel) +{ + return (uint32_t)(READ_BIT(TIMx->DIER, (ATIM_DIER_CCDE_Msk << channel)) == (ATIM_DIER_CCDE_Msk << channel)); +} + +/** + * @brief 捕捉比较通道的DMA请求禁用 + * @rmtoll DIER CCDE FL_ATIM_DisableDMAReq_CC + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_ATIM_CHANNEL_1 + * @arg @ref FL_ATIM_CHANNEL_2 + * @arg @ref FL_ATIM_CHANNEL_3 + * @arg @ref FL_ATIM_CHANNEL_4 + * @retval None + */ +__STATIC_INLINE void FL_ATIM_DisableDMAReq_CC(ATIM_Type *TIMx, uint32_t channel) +{ + CLEAR_BIT(TIMx->DIER, ATIM_DIER_CCDE_Msk << channel); +} + +/** + * @brief 更新事件DMA请求使能 + * @rmtoll DIER UDE FL_ATIM_EnableDMAReq_Update + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_ATIM_EnableDMAReq_Update(ATIM_Type *TIMx) +{ + SET_BIT(TIMx->DIER, ATIM_DIER_UDE_Msk); +} + +/** + * @brief 读取更新事件DMA请求使能状态 + * @rmtoll DIER UDE FL_ATIM_IsEnabledDMAReq_Update + * @param TIMx TIM instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ATIM_IsEnabledDMAReq_Update(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->DIER, ATIM_DIER_UDE_Msk) == ATIM_DIER_UDE_Msk); +} + +/** + * @brief 更新事件DMA请求禁用 + * @rmtoll DIER UDE FL_ATIM_DisableDMAReq_Update + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_ATIM_DisableDMAReq_Update(ATIM_Type *TIMx) +{ + CLEAR_BIT(TIMx->DIER, ATIM_DIER_UDE_Msk); +} + +/** + * @brief 刹车事件中断使能 + * @note + * @rmtoll DIER BIE FL_ATIM_EnableIT_Break + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_ATIM_EnableIT_Break(ATIM_Type *TIMx) +{ + SET_BIT(TIMx->DIER, ATIM_DIER_BIE_Msk); +} + +/** + * @brief 读取刹车事件中断使能状态 + * @note + * @rmtoll DIER BIE FL_ATIM_IsEnabledIT_Break + * @param TIMx TIM instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ATIM_IsEnabledIT_Break(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->DIER, ATIM_DIER_BIE_Msk) == ATIM_DIER_BIE_Msk); +} + +/** + * @brief 刹车事件中断禁用 + * @note + * @rmtoll DIER BIE FL_ATIM_DisableIT_Break + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_ATIM_DisableIT_Break(ATIM_Type *TIMx) +{ + CLEAR_BIT(TIMx->DIER, ATIM_DIER_BIE_Msk); +} + +/** + * @brief 触发事件中断使能 + * @rmtoll DIER TIE FL_ATIM_EnableIT_Trigger + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_ATIM_EnableIT_Trigger(ATIM_Type *TIMx) +{ + SET_BIT(TIMx->DIER, ATIM_DIER_TIE_Msk); +} + +/** + * @brief 读取触发事件中断使能 + * @rmtoll DIER TIE FL_ATIM_IsEnabledIT_Trigger + * @param TIMx TIM instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ATIM_IsEnabledIT_Trigger(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->DIER, ATIM_DIER_TIE_Msk) == ATIM_DIER_TIE_Msk); +} + +/** + * @brief 触发事件中断禁用 + * @rmtoll DIER TIE FL_ATIM_DisableIT_Trigger + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_ATIM_DisableIT_Trigger(ATIM_Type *TIMx) +{ + CLEAR_BIT(TIMx->DIER, ATIM_DIER_TIE_Msk); +} + +/** + * @brief COM事件中断使能 + * @note + * @rmtoll DIER COMIE FL_ATIM_EnableIT_COM + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_ATIM_EnableIT_COM(ATIM_Type *TIMx) +{ + SET_BIT(TIMx->DIER, ATIM_DIER_COMIE_Msk); +} + +/** + * @brief 读取COM事件中断使能状态 + * @note + * @rmtoll DIER COMIE FL_ATIM_IsEnabledIT_COM + * @param TIMx TIM instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ATIM_IsEnabledIT_COM(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->DIER, ATIM_DIER_COMIE_Msk) == ATIM_DIER_COMIE_Msk); +} + +/** + * @brief COM事件中断禁用 + * @note + * @rmtoll DIER COMIE FL_ATIM_DisableIT_COM + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_ATIM_DisableIT_COM(ATIM_Type *TIMx) +{ + CLEAR_BIT(TIMx->DIER, ATIM_DIER_COMIE_Msk); +} + +/** + * @brief 捕捉/比较通道中断使能 + * @rmtoll DIER CCIE FL_ATIM_EnableIT_CC + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_ATIM_CHANNEL_1 + * @arg @ref FL_ATIM_CHANNEL_2 + * @arg @ref FL_ATIM_CHANNEL_3 + * @arg @ref FL_ATIM_CHANNEL_4 + * @retval None + */ +__STATIC_INLINE void FL_ATIM_EnableIT_CC(ATIM_Type *TIMx, uint32_t channel) +{ + SET_BIT(TIMx->DIER, ATIM_DIER_CCIE_Msk << channel); +} + +/** + * @brief 读取捕捉/比较通道中断使能状态 + * @rmtoll DIER CCIE FL_ATIM_IsEnabledIT_CC + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_ATIM_CHANNEL_1 + * @arg @ref FL_ATIM_CHANNEL_2 + * @arg @ref FL_ATIM_CHANNEL_3 + * @arg @ref FL_ATIM_CHANNEL_4 + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ATIM_IsEnabledIT_CC(ATIM_Type *TIMx, uint32_t channel) +{ + return (uint32_t)(READ_BIT(TIMx->DIER, (ATIM_DIER_CCIE_Msk << channel)) == (ATIM_DIER_CCIE_Msk << channel)); +} + +/** + * @brief 捕捉/比较通道中断禁用 + * @rmtoll DIER CCIE FL_ATIM_DisableIT_CC + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_ATIM_CHANNEL_1 + * @arg @ref FL_ATIM_CHANNEL_2 + * @arg @ref FL_ATIM_CHANNEL_3 + * @arg @ref FL_ATIM_CHANNEL_4 + * @retval None + */ +__STATIC_INLINE void FL_ATIM_DisableIT_CC(ATIM_Type *TIMx, uint32_t channel) +{ + CLEAR_BIT(TIMx->DIER, ATIM_DIER_CCIE_Msk << channel); +} + +/** + * @brief 更新事件中断使能 + * @rmtoll DIER UIE FL_ATIM_EnableIT_Update + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_ATIM_EnableIT_Update(ATIM_Type *TIMx) +{ + SET_BIT(TIMx->DIER, ATIM_DIER_UIE_Msk); +} + +/** + * @brief 读取更新事件中断使能状态 + * @rmtoll DIER UIE FL_ATIM_IsEnabledIT_Update + * @param TIMx TIM instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ATIM_IsEnabledIT_Update(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->DIER, ATIM_DIER_UIE_Msk) == ATIM_DIER_UIE_Msk); +} + +/** + * @brief 更新事件中断禁用 + * @rmtoll DIER UIE FL_ATIM_DisableIT_Update + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_ATIM_DisableIT_Update(ATIM_Type *TIMx) +{ + CLEAR_BIT(TIMx->DIER, ATIM_DIER_UIE_Msk); +} + +/** + * @brief 捕捉/比较通道的Overcapture中断标志 + * @rmtoll ISR CCOF FL_ATIM_IsActiveFlag_CCOverflow + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_ATIM_CHANNEL_1 + * @arg @ref FL_ATIM_CHANNEL_2 + * @arg @ref FL_ATIM_CHANNEL_3 + * @arg @ref FL_ATIM_CHANNEL_4 + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ATIM_IsActiveFlag_CCOverflow(ATIM_Type *TIMx, uint32_t channel) +{ + return (uint32_t)(READ_BIT(TIMx->ISR, (ATIM_ISR_CCOF_Msk << channel)) == (ATIM_ISR_CCOF_Msk << channel)); +} + +/** + * @brief 清除Overcapture中断标志 + * @rmtoll ISR CCOF FL_ATIM_ClearFlag_CCOverflow + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_ATIM_CHANNEL_1 + * @arg @ref FL_ATIM_CHANNEL_2 + * @arg @ref FL_ATIM_CHANNEL_3 + * @arg @ref FL_ATIM_CHANNEL_4 + * @retval None + */ +__STATIC_INLINE void FL_ATIM_ClearFlag_CCOverflow(ATIM_Type *TIMx, uint32_t channel) +{ + WRITE_REG(TIMx->ISR, (ATIM_ISR_CCOF_Msk << channel)); +} + +/** + * @brief 读取刹车事件中断标志 + * @note + * @rmtoll ISR BIF FL_ATIM_IsActiveFlag_Break + * @param TIMx TIM instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ATIM_IsActiveFlag_Break(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->ISR, ATIM_ISR_BIF_Msk) == (ATIM_ISR_BIF_Msk)); +} + +/** + * @brief 清除刹车事件中断标志 + * @note + * @rmtoll ISR BIF FL_ATIM_ClearFlag_Break + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_ATIM_ClearFlag_Break(ATIM_Type *TIMx) +{ + WRITE_REG(TIMx->ISR, ATIM_ISR_BIF_Msk); +} + +/** + * @brief 触发事件中断标志 + * @rmtoll ISR TIF FL_ATIM_IsActiveFlag_Trigger + * @param TIMx TIM instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ATIM_IsActiveFlag_Trigger(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->ISR, ATIM_ISR_TIF_Msk) == (ATIM_ISR_TIF_Msk)); +} + +/** + * @brief 清除触发事件中断标志 + * @rmtoll ISR TIF FL_ATIM_ClearFlag_Trigger + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_ATIM_ClearFlag_Trigger(ATIM_Type *TIMx) +{ + WRITE_REG(TIMx->ISR, ATIM_ISR_TIF_Msk); +} + +/** + * @brief 读取COM事件中断标志 + * @note + * @rmtoll ISR COMIF FL_ATIM_IsActiveFlag_COM + * @param TIMx TIM instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ATIM_IsActiveFlag_COM(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->ISR, ATIM_ISR_COMIF_Msk) == (ATIM_ISR_COMIF_Msk)); +} + +/** + * @brief 清除COM事件中断标志 + * @note + * @rmtoll ISR COMIF FL_ATIM_ClearFlag_COM + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_ATIM_ClearFlag_COM(ATIM_Type *TIMx) +{ + WRITE_REG(TIMx->ISR, ATIM_ISR_COMIF_Msk); +} + +/** + * @brief 读取捕捉/比较通道中断标志 + * @rmtoll ISR CCIF FL_ATIM_IsActiveFlag_CC + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_ATIM_CHANNEL_1 + * @arg @ref FL_ATIM_CHANNEL_2 + * @arg @ref FL_ATIM_CHANNEL_3 + * @arg @ref FL_ATIM_CHANNEL_4 + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ATIM_IsActiveFlag_CC(ATIM_Type *TIMx, uint32_t channel) +{ + return (uint32_t)(READ_BIT(TIMx->ISR, (ATIM_ISR_CCIF_Msk << channel)) == (ATIM_ISR_CCIF_Msk << channel)); +} + +/** + * @brief 清除捕捉/比较通道中断标志 + * @rmtoll ISR CCIF FL_ATIM_ClearFlag_CC + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_ATIM_CHANNEL_1 + * @arg @ref FL_ATIM_CHANNEL_2 + * @arg @ref FL_ATIM_CHANNEL_3 + * @arg @ref FL_ATIM_CHANNEL_4 + * @retval None + */ +__STATIC_INLINE void FL_ATIM_ClearFlag_CC(ATIM_Type *TIMx, uint32_t channel) +{ + WRITE_REG(TIMx->ISR, (ATIM_ISR_CCIF_Msk << channel)); +} + +/** + * @brief 读取更新事件中断标志 + * @rmtoll ISR UIF FL_ATIM_IsActiveFlag_Update + * @param TIMx TIM instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ATIM_IsActiveFlag_Update(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->ISR, ATIM_ISR_UIF_Msk) == (ATIM_ISR_UIF_Msk)); +} + +/** + * @brief 清除更新事件中断标志 + * @rmtoll ISR UIF FL_ATIM_ClearFlag_Update + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_ATIM_ClearFlag_Update(ATIM_Type *TIMx) +{ + WRITE_REG(TIMx->ISR, ATIM_ISR_UIF_Msk); +} + +/** + * @brief 软件刹车使能 + * @note + * @rmtoll EGR BG FL_ATIM_GenerateBreakEvent + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_ATIM_GenerateBreakEvent(ATIM_Type *TIMx) +{ + SET_BIT(TIMx->EGR, ATIM_EGR_BG_Msk); +} + +/** + * @brief 软件触发使能 + * @rmtoll EGR TG FL_ATIM_GenerateTriggerEvent + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_ATIM_GenerateTriggerEvent(ATIM_Type *TIMx) +{ + SET_BIT(TIMx->EGR, ATIM_EGR_TG_Msk); +} + +/** + * @brief 软件COM事件使能 + * @note + * @rmtoll EGR COMG FL_ATIM_GenerateCOMEvent + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_ATIM_GenerateCOMEvent(ATIM_Type *TIMx) +{ + SET_BIT(TIMx->EGR, ATIM_EGR_COMG_Msk); +} + +/** + * @brief 捕捉/比较通道软件触发使能 + * @rmtoll EGR CCG FL_ATIM_GenerateCCEvent + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_ATIM_CHANNEL_1 + * @arg @ref FL_ATIM_CHANNEL_2 + * @arg @ref FL_ATIM_CHANNEL_3 + * @arg @ref FL_ATIM_CHANNEL_4 + * @retval None + */ +__STATIC_INLINE void FL_ATIM_GenerateCCEvent(ATIM_Type *TIMx, uint32_t channel) +{ + SET_BIT(TIMx->EGR, ATIM_EGR_CCG_Msk << channel); +} + +/** + * @brief 软件更新事件使能 + * @rmtoll EGR UG FL_ATIM_GenerateUpdateEvent + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_ATIM_GenerateUpdateEvent(ATIM_Type *TIMx) +{ + SET_BIT(TIMx->EGR, ATIM_EGR_UG_Msk); +} + +/** + * @brief 设置计数器值 + * @rmtoll CNT FL_ATIM_WriteCounter + * @param TIMx TIM instance + * @param counter + * @retval None + */ +__STATIC_INLINE void FL_ATIM_WriteCounter(ATIM_Type *TIMx, uint32_t counter) +{ + MODIFY_REG(TIMx->CNT, (0xffffU << 0U), (counter << 0U)); +} + +/** + * @brief 读取计数器值 + * @rmtoll CNT FL_ATIM_ReadCounter + * @param TIMx TIM instance + * @retval + */ +__STATIC_INLINE uint32_t FL_ATIM_ReadCounter(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->CNT, 0xffffU) >> 0U); +} + +/** + * @brief 设置计数器时钟预分频值 + * @rmtoll PSC FL_ATIM_WritePrescaler + * @param TIMx TIM instance + * @param psc + * @retval None + */ +__STATIC_INLINE void FL_ATIM_WritePrescaler(ATIM_Type *TIMx, uint32_t psc) +{ + MODIFY_REG(TIMx->PSC, (0xffffU << 0U), (psc << 0U)); +} + +/** + * @brief 读取计数器时钟预分频值 + * @rmtoll PSC FL_ATIM_ReadPrescaler + * @param TIMx TIM instance + * @retval + */ +__STATIC_INLINE uint32_t FL_ATIM_ReadPrescaler(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->PSC, 0xffffU) >> 0U); +} + +/** + * @brief 设置计数溢出时的自动重载值 + * @rmtoll ARR FL_ATIM_WriteAutoReload + * @param TIMx TIM instance + * @param autoReload + * @retval None + */ +__STATIC_INLINE void FL_ATIM_WriteAutoReload(ATIM_Type *TIMx, uint32_t autoReload) +{ + MODIFY_REG(TIMx->ARR, (0xffffU << 0U), (autoReload << 0U)); +} + +/** + * @brief 读取计数溢出时的自动重载值 + * @rmtoll ARR FL_ATIM_ReadAutoReload + * @param TIMx TIM instance + * @retval + */ +__STATIC_INLINE uint32_t FL_ATIM_ReadAutoReload(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->ARR, 0xffffU) >> 0U); +} + +/** + * @brief 捕捉/比较通道1寄存器配置 + * @rmtoll CCR1 FL_ATIM_WriteCompareCH1 + * @param TIMx TIM instance + * @param compareValue + * @retval None + */ +__STATIC_INLINE void FL_ATIM_WriteCompareCH1(ATIM_Type *TIMx, uint32_t compareValue) +{ + MODIFY_REG(TIMx->CCR1, (0xffffU << 0U), (compareValue << 0U)); +} + +/** + * @brief 读取捕捉/比较通道1寄存器值 + * @rmtoll CCR1 FL_ATIM_ReadCompareCH1 + * @param TIMx TIM instance + * @retval + */ +__STATIC_INLINE uint32_t FL_ATIM_ReadCompareCH1(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->CCR1, 0xffffU) >> 0U); +} + +/** + * @brief 捕捉/比较通道2寄存器配置 + * @rmtoll CCR2 FL_ATIM_WriteCompareCH2 + * @param TIMx TIM instance + * @param compareValue + * @retval None + */ +__STATIC_INLINE void FL_ATIM_WriteCompareCH2(ATIM_Type *TIMx, uint32_t compareValue) +{ + MODIFY_REG(TIMx->CCR2, (0xffffU << 0U), (compareValue << 0U)); +} + +/** + * @brief 读取捕捉/比较通道2寄存器值 + * @rmtoll CCR2 FL_ATIM_ReadCompareCH2 + * @param TIMx TIM instance + * @retval + */ +__STATIC_INLINE uint32_t FL_ATIM_ReadCompareCH2(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->CCR2, 0xffffU) >> 0U); +} + +/** + * @brief 捕捉/比较通道3寄存器配置 + * @rmtoll CCR3 FL_ATIM_WriteCompareCH3 + * @param TIMx TIM instance + * @param compareValue + * @retval None + */ +__STATIC_INLINE void FL_ATIM_WriteCompareCH3(ATIM_Type *TIMx, uint32_t compareValue) +{ + MODIFY_REG(TIMx->CCR3, (0xffffU << 0U), (compareValue << 0U)); +} + +/** + * @brief 读取捕捉/比较通道3寄存器值 + * @rmtoll CCR3 FL_ATIM_ReadCompareCH3 + * @param TIMx TIM instance + * @retval + */ +__STATIC_INLINE uint32_t FL_ATIM_ReadCompareCH3(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->CCR3, 0xffffU) >> 0U); +} + +/** + * @brief 捕捉/比较通道4寄存器配置 + * @rmtoll CCR4 FL_ATIM_WriteCompareCH4 + * @param TIMx TIM instance + * @param compareValue + * @retval None + */ +__STATIC_INLINE void FL_ATIM_WriteCompareCH4(ATIM_Type *TIMx, uint32_t compareValue) +{ + MODIFY_REG(TIMx->CCR4, (0xffffU << 0U), (compareValue << 0U)); +} + +/** + * @brief 读取捕捉/比较通道4寄存器值 + * @rmtoll CCR4 FL_ATIM_ReadCompareCH4 + * @param TIMx TIM instance + * @retval + */ +__STATIC_INLINE uint32_t FL_ATIM_ReadCompareCH4(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->CCR4, 0xffffU) >> 0U); +} + +/** + * @brief 设置DMA Burst长度 + * @rmtoll DCR DBL FL_ATIM_SetDMABurstLength + * @param TIMx TIM instance + * @param length This parameter can be one of the following values: + * @arg @ref FL_ATIM_DMA_BURST_LENGTH_1 + * @arg @ref FL_ATIM_DMA_BURST_LENGTH_2 + * @arg @ref FL_ATIM_DMA_BURST_LENGTH_3 + * @arg @ref FL_ATIM_DMA_BURST_LENGTH_4 + * @arg @ref FL_ATIM_DMA_BURST_LENGTH_5 + * @arg @ref FL_ATIM_DMA_BURST_LENGTH_6 + * @arg @ref FL_ATIM_DMA_BURST_LENGTH_7 + * @arg @ref FL_ATIM_DMA_BURST_LENGTH_8 + * @arg @ref FL_ATIM_DMA_BURST_LENGTH_9 + * @arg @ref FL_ATIM_DMA_BURST_LENGTH_10 + * @arg @ref FL_ATIM_DMA_BURST_LENGTH_11 + * @arg @ref FL_ATIM_DMA_BURST_LENGTH_12 + * @arg @ref FL_ATIM_DMA_BURST_LENGTH_13 + * @arg @ref FL_ATIM_DMA_BURST_LENGTH_14 + * @arg @ref FL_ATIM_DMA_BURST_LENGTH_15 + * @arg @ref FL_ATIM_DMA_BURST_LENGTH_16 + * @arg @ref FL_ATIM_DMA_BURST_LENGTH_17 + * @arg @ref FL_ATIM_DMA_BURST_LENGTH_18 + * @retval None + */ +__STATIC_INLINE void FL_ATIM_SetDMABurstLength(ATIM_Type *TIMx, uint32_t length) +{ + MODIFY_REG(TIMx->DCR, ATIM_DCR_DBL_Msk, length); +} + +/** + * @brief 读取DMA Burst长度 + * @rmtoll DCR DBL FL_ATIM_GetDMABurstLength + * @param TIMx TIM instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_ATIM_DMA_BURST_LENGTH_1 + * @arg @ref FL_ATIM_DMA_BURST_LENGTH_2 + * @arg @ref FL_ATIM_DMA_BURST_LENGTH_3 + * @arg @ref FL_ATIM_DMA_BURST_LENGTH_4 + * @arg @ref FL_ATIM_DMA_BURST_LENGTH_5 + * @arg @ref FL_ATIM_DMA_BURST_LENGTH_6 + * @arg @ref FL_ATIM_DMA_BURST_LENGTH_7 + * @arg @ref FL_ATIM_DMA_BURST_LENGTH_8 + * @arg @ref FL_ATIM_DMA_BURST_LENGTH_9 + * @arg @ref FL_ATIM_DMA_BURST_LENGTH_10 + * @arg @ref FL_ATIM_DMA_BURST_LENGTH_11 + * @arg @ref FL_ATIM_DMA_BURST_LENGTH_12 + * @arg @ref FL_ATIM_DMA_BURST_LENGTH_13 + * @arg @ref FL_ATIM_DMA_BURST_LENGTH_14 + * @arg @ref FL_ATIM_DMA_BURST_LENGTH_15 + * @arg @ref FL_ATIM_DMA_BURST_LENGTH_16 + * @arg @ref FL_ATIM_DMA_BURST_LENGTH_17 + * @arg @ref FL_ATIM_DMA_BURST_LENGTH_18 + */ +__STATIC_INLINE uint32_t FL_ATIM_GetDMABurstLength(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->DCR, ATIM_DCR_DBL_Msk)); +} + +/** + * @brief 设置指向DMA寄存器的偏移地址 + * @rmtoll DCR DBA FL_ATIM_SetDMABurstAddress + * @param TIMx TIM instance + * @param address This parameter can be one of the following values: + * @arg @ref FL_ATIM_DMA_BURST_ADDR_CR1 + * @arg @ref FL_ATIM_DMA_BURST_ADDR_CR2 + * @arg @ref FL_ATIM_DMA_BURST_ADDR_SMCR + * @arg @ref FL_ATIM_DMA_BURST_ADDR_DIER + * @arg @ref FL_ATIM_DMA_BURST_ADDR_SR + * @arg @ref FL_ATIM_DMA_BURST_ADDR_EGR + * @arg @ref FL_ATIM_DMA_BURST_ADDR_CCMR1 + * @arg @ref FL_ATIM_DMA_BURST_ADDR_CCMR2 + * @arg @ref FL_ATIM_DMA_BURST_ADDR_CCER + * @arg @ref FL_ATIM_DMA_BURST_ADDR_CNT + * @arg @ref FL_ATIM_DMA_BURST_ADDR_PSC + * @arg @ref FL_ATIM_DMA_BURST_ADDR_ARR + * @arg @ref FL_ATIM_DMA_BURST_ADDR_RCR + * @arg @ref FL_ATIM_DMA_BURST_ADDR_CCR1 + * @arg @ref FL_ATIM_DMA_BURST_ADDR_CCR2 + * @arg @ref FL_ATIM_DMA_BURST_ADDR_CCR3 + * @arg @ref FL_ATIM_DMA_BURST_ADDR_CCR4 + * @arg @ref FL_ATIM_DMA_BURST_ADDR_BDTR + * @retval None + */ +__STATIC_INLINE void FL_ATIM_SetDMABurstAddress(ATIM_Type *TIMx, uint32_t address) +{ + MODIFY_REG(TIMx->DCR, ATIM_DCR_DBA_Msk, address); +} + +/** + * @brief 读取指向DMA寄存器的偏移地址 + * @rmtoll DCR DBA FL_ATIM_GetDMABurstAddress + * @param TIMx TIM instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_ATIM_DMA_BURST_ADDR_CR1 + * @arg @ref FL_ATIM_DMA_BURST_ADDR_CR2 + * @arg @ref FL_ATIM_DMA_BURST_ADDR_SMCR + * @arg @ref FL_ATIM_DMA_BURST_ADDR_DIER + * @arg @ref FL_ATIM_DMA_BURST_ADDR_SR + * @arg @ref FL_ATIM_DMA_BURST_ADDR_EGR + * @arg @ref FL_ATIM_DMA_BURST_ADDR_CCMR1 + * @arg @ref FL_ATIM_DMA_BURST_ADDR_CCMR2 + * @arg @ref FL_ATIM_DMA_BURST_ADDR_CCER + * @arg @ref FL_ATIM_DMA_BURST_ADDR_CNT + * @arg @ref FL_ATIM_DMA_BURST_ADDR_PSC + * @arg @ref FL_ATIM_DMA_BURST_ADDR_ARR + * @arg @ref FL_ATIM_DMA_BURST_ADDR_RCR + * @arg @ref FL_ATIM_DMA_BURST_ADDR_CCR1 + * @arg @ref FL_ATIM_DMA_BURST_ADDR_CCR2 + * @arg @ref FL_ATIM_DMA_BURST_ADDR_CCR3 + * @arg @ref FL_ATIM_DMA_BURST_ADDR_CCR4 + * @arg @ref FL_ATIM_DMA_BURST_ADDR_BDTR + */ +__STATIC_INLINE uint32_t FL_ATIM_GetDMABurstAddress(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->DCR, ATIM_DCR_DBA_Msk)); +} + +/** + * @brief 配置DMA burst访问寄存器 + * @rmtoll DMAR FL_ATIM_WriteDMAAddress + * @param TIMx TIM instance + * @param address + * @retval None + */ +__STATIC_INLINE void FL_ATIM_WriteDMAAddress(ATIM_Type *TIMx, uint32_t address) +{ + MODIFY_REG(TIMx->DMAR, (0xffffffffU << 0U), (address << 0U)); +} + +/** + * @brief 读取DMA burst访问寄存器值 + * @rmtoll DMAR FL_ATIM_ReadDMAAddress + * @param TIMx TIM instance + * @retval + */ +__STATIC_INLINE uint32_t FL_ATIM_ReadDMAAddress(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->DMAR, 0xffffffffU) >> 0U); +} + +/** + * @brief 输出比较清零使能 + * @rmtoll CCMR OCCE FL_ATIM_OC_EnableClear + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_ATIM_CHANNEL_1 + * @arg @ref FL_ATIM_CHANNEL_2 + * @arg @ref FL_ATIM_CHANNEL_3 + * @arg @ref FL_ATIM_CHANNEL_4 + * @retval None + */ +__STATIC_INLINE void FL_ATIM_OC_EnableClear(ATIM_Type *TIMx, uint32_t channel) +{ + if(channel < FL_ATIM_CHANNEL_3) + { + SET_BIT(TIMx->CCMR1, (ATIM_CCMR_OCCE_Msk << (channel * 8))); + } + else + { + SET_BIT(TIMx->CCMR2, (ATIM_CCMR_OCCE_Msk << ((channel - 2) * 8))); + } +} + +/** + * @brief 读取输出比较清零使能状态 + * @rmtoll CCMR OCCE FL_ATIM_OC_IsEnabledClear + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_ATIM_CHANNEL_1 + * @arg @ref FL_ATIM_CHANNEL_2 + * @arg @ref FL_ATIM_CHANNEL_3 + * @arg @ref FL_ATIM_CHANNEL_4 + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ATIM_OC_IsEnabledClear(ATIM_Type *TIMx, uint32_t channel) +{ + if(channel < FL_ATIM_CHANNEL_3) + { + return (uint32_t)(READ_BIT(TIMx->CCMR1, (ATIM_CCMR_OCCE_Msk << (channel * 8))) == (ATIM_CCMR_OCCE_Msk << (channel * 8))); + } + else + { + return (uint32_t)(READ_BIT(TIMx->CCMR2, (ATIM_CCMR_OCCE_Msk << ((channel - 2) * 8))) == (ATIM_CCMR_OCCE_Msk << ((channel - 2) * 8))); + } +} + +/** + * @brief 输出比较清零禁用 + * @rmtoll CCMR OCCE FL_ATIM_OC_DisableClear + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_ATIM_CHANNEL_1 + * @arg @ref FL_ATIM_CHANNEL_2 + * @arg @ref FL_ATIM_CHANNEL_3 + * @arg @ref FL_ATIM_CHANNEL_4 + * @retval None + */ +__STATIC_INLINE void FL_ATIM_OC_DisableClear(ATIM_Type *TIMx, uint32_t channel) +{ + if(channel < FL_ATIM_CHANNEL_3) + { + CLEAR_BIT(TIMx->CCMR1, (ATIM_CCMR_OCCE_Msk << (channel * 8))); + } + else + { + CLEAR_BIT(TIMx->CCMR2, (ATIM_CCMR_OCCE_Msk << ((channel - 2) * 8))); + } +} + +/** + * @brief 输出比较模式配置 + * @rmtoll CCMR OCM FL_ATIM_OC_SetMode + * @param TIMx TIM instance + * @param mode This parameter can be one of the following values: + * @arg @ref FL_ATIM_OC_MODE_FROZEN + * @arg @ref FL_ATIM_OC_MODE_ACTIVE + * @arg @ref FL_ATIM_OC_MODE_INACTIVE + * @arg @ref FL_ATIM_OC_MODE_TOGGLE + * @arg @ref FL_ATIM_OC_MODE_FORCED_INACTIVE + * @arg @ref FL_ATIM_OC_MODE_FORCED_ACTIVE + * @arg @ref FL_ATIM_OC_MODE_PWM1 + * @arg @ref FL_ATIM_OC_MODE_PWM2 + * @param channel This parameter can be one of the following values: + * @arg @ref FL_ATIM_CHANNEL_1 + * @arg @ref FL_ATIM_CHANNEL_2 + * @arg @ref FL_ATIM_CHANNEL_3 + * @arg @ref FL_ATIM_CHANNEL_4 + * @retval None + */ +__STATIC_INLINE void FL_ATIM_OC_SetMode(ATIM_Type *TIMx, uint32_t mode, uint32_t channel) +{ + if(channel < FL_ATIM_CHANNEL_3) + { + MODIFY_REG(TIMx->CCMR1, (ATIM_CCMR_OCM_Msk << (channel * 8)), (mode << (channel * 8))); + } + else + { + MODIFY_REG(TIMx->CCMR2, (ATIM_CCMR_OCM_Msk << ((channel - 2) * 8)), (mode << ((channel - 2) * 8))); + } +} + +/** + * @brief 读取输出比较模式配置值 + * @rmtoll CCMR OCM FL_ATIM_OC_GetMode + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_ATIM_CHANNEL_1 + * @arg @ref FL_ATIM_CHANNEL_2 + * @arg @ref FL_ATIM_CHANNEL_3 + * @arg @ref FL_ATIM_CHANNEL_4 + * @retval Returned value can be one of the following values: + * @arg @ref FL_ATIM_OC_MODE_FROZEN + * @arg @ref FL_ATIM_OC_MODE_ACTIVE + * @arg @ref FL_ATIM_OC_MODE_INACTIVE + * @arg @ref FL_ATIM_OC_MODE_TOGGLE + * @arg @ref FL_ATIM_OC_MODE_FORCED_INACTIVE + * @arg @ref FL_ATIM_OC_MODE_FORCED_ACTIVE + * @arg @ref FL_ATIM_OC_MODE_PWM1 + * @arg @ref FL_ATIM_OC_MODE_PWM2 + */ +__STATIC_INLINE uint32_t FL_ATIM_OC_GetMode(ATIM_Type *TIMx, uint32_t channel) +{ + if(channel < FL_ATIM_CHANNEL_3) + { + return (uint32_t)(READ_BIT(TIMx->CCMR1, (ATIM_CCMR_OCM_Msk << (channel * 8)))); + } + else + { + return (uint32_t)(READ_BIT(TIMx->CCMR2, (ATIM_CCMR_OCM_Msk << ((channel - 2) * 8)))); + } +} + +/** + * @brief 输出比较预装载使能 + * @rmtoll CCMR OCPE FL_ATIM_OC_EnablePreload + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_ATIM_CHANNEL_1 + * @arg @ref FL_ATIM_CHANNEL_2 + * @arg @ref FL_ATIM_CHANNEL_3 + * @arg @ref FL_ATIM_CHANNEL_4 + * @retval None + */ +__STATIC_INLINE void FL_ATIM_OC_EnablePreload(ATIM_Type *TIMx, uint32_t channel) +{ + if(channel < FL_ATIM_CHANNEL_3) + { + SET_BIT(TIMx->CCMR1, (ATIM_CCMR_OCPE_Msk << (channel * 8))); + } + else + { + SET_BIT(TIMx->CCMR2, (ATIM_CCMR_OCPE_Msk << ((channel - 2) * 8))); + } +} + +/** + * @brief 读取输出比较预装载使能状态 + * @rmtoll CCMR OCPE FL_ATIM_OC_IsEnabledPreload + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_ATIM_CHANNEL_1 + * @arg @ref FL_ATIM_CHANNEL_2 + * @arg @ref FL_ATIM_CHANNEL_3 + * @arg @ref FL_ATIM_CHANNEL_4 + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ATIM_OC_IsEnabledPreload(ATIM_Type *TIMx, uint32_t channel) +{ + if(channel < FL_ATIM_CHANNEL_3) + { + return (uint32_t)(READ_BIT(TIMx->CCMR1, (ATIM_CCMR_OCPE_Msk << (channel * 8))) == (ATIM_CCMR_OCPE_Msk << (channel * 8))); + } + else + { + return (uint32_t)(READ_BIT(TIMx->CCMR2, (ATIM_CCMR_OCPE_Msk << ((channel - 2) * 8))) == (ATIM_CCMR_OCPE_Msk << ((channel - 2) * 8))); + } +} + +/** + * @brief 输出比较预装载禁用 + * @rmtoll CCMR OCPE FL_ATIM_OC_DisablePreload + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_ATIM_CHANNEL_1 + * @arg @ref FL_ATIM_CHANNEL_2 + * @arg @ref FL_ATIM_CHANNEL_3 + * @arg @ref FL_ATIM_CHANNEL_4 + * @retval None + */ +__STATIC_INLINE void FL_ATIM_OC_DisablePreload(ATIM_Type *TIMx, uint32_t channel) +{ + if(channel < FL_ATIM_CHANNEL_3) + { + CLEAR_BIT(TIMx->CCMR1, (ATIM_CCMR_OCPE_Msk << (channel * 8))); + } + else + { + CLEAR_BIT(TIMx->CCMR2, (ATIM_CCMR_OCPE_Msk << ((channel - 2) * 8))); + } +} + +/** + * @brief 输出比较快速使能 + * @rmtoll CCMR OCFE FL_ATIM_OC_EnableFastMode + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_ATIM_CHANNEL_1 + * @arg @ref FL_ATIM_CHANNEL_2 + * @arg @ref FL_ATIM_CHANNEL_3 + * @arg @ref FL_ATIM_CHANNEL_4 + * @retval None + */ +__STATIC_INLINE void FL_ATIM_OC_EnableFastMode(ATIM_Type *TIMx, uint32_t channel) +{ + if(channel < FL_ATIM_CHANNEL_3) + { + SET_BIT(TIMx->CCMR1, (ATIM_CCMR_OCFE_Msk << (channel * 8))); + } + else + { + SET_BIT(TIMx->CCMR2, (ATIM_CCMR_OCFE_Msk << ((channel - 2) * 8))); + } +} + +/** + * @brief 获取输出比较快速使能状态 + * @rmtoll CCMR OCFE FL_ATIM_OC_IsEnabledFastMode + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_ATIM_CHANNEL_1 + * @arg @ref FL_ATIM_CHANNEL_2 + * @arg @ref FL_ATIM_CHANNEL_3 + * @arg @ref FL_ATIM_CHANNEL_4 + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ATIM_OC_IsEnabledFastMode(ATIM_Type *TIMx, uint32_t channel) +{ + if(channel < FL_ATIM_CHANNEL_3) + { + return (uint32_t)(READ_BIT(TIMx->CCMR1, (ATIM_CCMR_OCFE_Msk << (channel * 8))) == (ATIM_CCMR_OCFE_Msk << (channel * 8))); + } + else + { + return (uint32_t)(READ_BIT(TIMx->CCMR2, (ATIM_CCMR_OCFE_Msk << ((channel - 2) * 8))) == (ATIM_CCMR_OCFE_Msk << ((channel - 2) * 8))); + } +} + +/** + * @brief 输出比较快速禁用 + * @rmtoll CCMR OCFE FL_ATIM_OC_DisableFastMode + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_ATIM_CHANNEL_1 + * @arg @ref FL_ATIM_CHANNEL_2 + * @arg @ref FL_ATIM_CHANNEL_3 + * @arg @ref FL_ATIM_CHANNEL_4 + * @retval None + */ +__STATIC_INLINE void FL_ATIM_OC_DisableFastMode(ATIM_Type *TIMx, uint32_t channel) +{ + if(channel < FL_ATIM_CHANNEL_3) + { + CLEAR_BIT(TIMx->CCMR1, (ATIM_CCMR_OCFE_Msk << (channel * 8))); + } + else + { + CLEAR_BIT(TIMx->CCMR2, (ATIM_CCMR_OCFE_Msk << ((channel - 2) * 8))); + } +} + +/** + * @brief 设置输入捕捉滤波器 + * @rmtoll CCMR ICF FL_ATIM_IC_SetFilter + * @param TIMx TIM instance + * @param filter This parameter can be one of the following values: + * @arg @ref FL_ATIM_IC_FILTER_DIV1 + * @arg @ref FL_ATIM_IC_FILTER_DIV1_N2 + * @arg @ref FL_ATIM_IC_FILTER_DIV1_N4 + * @arg @ref FL_ATIM_IC_FILTER_DIV1_N8 + * @arg @ref FL_ATIM_IC_FILTER_DIV2_N6 + * @arg @ref FL_ATIM_IC_FILTER_DIV2_N8 + * @arg @ref FL_ATIM_IC_FILTER_DIV4_N6 + * @arg @ref FL_ATIM_IC_FILTER_DIV4_N8 + * @arg @ref FL_ATIM_IC_FILTER_DIV8_N6 + * @arg @ref FL_ATIM_IC_FILTER_DIV8_N8 + * @arg @ref FL_ATIM_IC_FILTER_DIV16_N5 + * @arg @ref FL_ATIM_IC_FILTER_DIV16_N6 + * @arg @ref FL_ATIM_IC_FILTER_DIV16_N8 + * @arg @ref FL_ATIM_IC_FILTER_DIV32_N5 + * @arg @ref FL_ATIM_IC_FILTER_DIV32_N6 + * @arg @ref FL_ATIM_IC_FILTER_DIV32_N8 + * @param channel This parameter can be one of the following values: + * @arg @ref FL_ATIM_CHANNEL_1 + * @arg @ref FL_ATIM_CHANNEL_2 + * @arg @ref FL_ATIM_CHANNEL_3 + * @arg @ref FL_ATIM_CHANNEL_4 + * @retval None + */ +__STATIC_INLINE void FL_ATIM_IC_SetFilter(ATIM_Type *TIMx, uint32_t filter, uint32_t channel) +{ + if(channel < FL_ATIM_CHANNEL_3) + { + MODIFY_REG(TIMx->CCMR1, (ATIM_CCMR_ICF_Msk << (channel * 8)), (filter << (channel * 8))); + } + else + { + MODIFY_REG(TIMx->CCMR2, (ATIM_CCMR_ICF_Msk << ((channel - 2) * 8)), (filter << ((channel - 2) * 8))); + } +} + +/** + * @brief 读取输入滤波器值 + * @rmtoll CCMR ICF FL_ATIM_IC_GetFilter + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_ATIM_CHANNEL_1 + * @arg @ref FL_ATIM_CHANNEL_2 + * @arg @ref FL_ATIM_CHANNEL_3 + * @arg @ref FL_ATIM_CHANNEL_4 + * @retval Returned value can be one of the following values: + * @arg @ref FL_ATIM_IC_FILTER_DIV1 + * @arg @ref FL_ATIM_IC_FILTER_DIV1_N2 + * @arg @ref FL_ATIM_IC_FILTER_DIV1_N4 + * @arg @ref FL_ATIM_IC_FILTER_DIV1_N8 + * @arg @ref FL_ATIM_IC_FILTER_DIV2_N6 + * @arg @ref FL_ATIM_IC_FILTER_DIV2_N8 + * @arg @ref FL_ATIM_IC_FILTER_DIV4_N6 + * @arg @ref FL_ATIM_IC_FILTER_DIV4_N8 + * @arg @ref FL_ATIM_IC_FILTER_DIV8_N6 + * @arg @ref FL_ATIM_IC_FILTER_DIV8_N8 + * @arg @ref FL_ATIM_IC_FILTER_DIV16_N5 + * @arg @ref FL_ATIM_IC_FILTER_DIV16_N6 + * @arg @ref FL_ATIM_IC_FILTER_DIV16_N8 + * @arg @ref FL_ATIM_IC_FILTER_DIV32_N5 + * @arg @ref FL_ATIM_IC_FILTER_DIV32_N6 + * @arg @ref FL_ATIM_IC_FILTER_DIV32_N8 + */ +__STATIC_INLINE uint32_t FL_ATIM_IC_GetFilter(ATIM_Type *TIMx, uint32_t channel) +{ + if(channel < FL_ATIM_CHANNEL_3) + { + return (uint32_t)(READ_BIT(TIMx->CCMR1, (ATIM_CCMR_ICF_Msk << (channel * 8)))); + } + else + { + return (uint32_t)(READ_BIT(TIMx->CCMR2, (ATIM_CCMR_ICF_Msk << ((channel - 2) * 8)))); + } +} + +/** + * @brief 设置输入捕捉预分频 + * @rmtoll CCMR ICPSC FL_ATIM_IC_SetPrescaler + * @param TIMx TIM instance + * @param psc This parameter can be one of the following values: + * @arg @ref FL_ATIM_IC_PSC_DIV1 + * @arg @ref FL_ATIM_IC_PSC_DIV2 + * @arg @ref FL_ATIM_IC_PSC_DIV4 + * @arg @ref FL_ATIM_IC_PSC_DIV8 + * @param channel This parameter can be one of the following values: + * @arg @ref FL_ATIM_CHANNEL_1 + * @arg @ref FL_ATIM_CHANNEL_2 + * @arg @ref FL_ATIM_CHANNEL_3 + * @arg @ref FL_ATIM_CHANNEL_4 + * @retval None + */ +__STATIC_INLINE void FL_ATIM_IC_SetPrescaler(ATIM_Type *TIMx, uint32_t psc, uint32_t channel) +{ + if(channel < FL_ATIM_CHANNEL_3) + { + MODIFY_REG(TIMx->CCMR1, (ATIM_CCMR_ICPSC_Msk << (channel * 8)), (psc << (channel * 8))); + } + else + { + MODIFY_REG(TIMx->CCMR2, (ATIM_CCMR_ICPSC_Msk << ((channel - 2) * 8)), (psc << ((channel - 2) * 8))); + } +} + +/** + * @brief 读取输入捕捉预分频值 + * @rmtoll CCMR ICPSC FL_ATIM_IC_GetPrescaler + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_ATIM_CHANNEL_1 + * @arg @ref FL_ATIM_CHANNEL_2 + * @arg @ref FL_ATIM_CHANNEL_3 + * @arg @ref FL_ATIM_CHANNEL_4 + * @retval Returned value can be one of the following values: + * @arg @ref FL_ATIM_IC_PSC_DIV1 + * @arg @ref FL_ATIM_IC_PSC_DIV2 + * @arg @ref FL_ATIM_IC_PSC_DIV4 + * @arg @ref FL_ATIM_IC_PSC_DIV8 + */ +__STATIC_INLINE uint32_t FL_ATIM_IC_GetPrescaler(ATIM_Type *TIMx, uint32_t channel) +{ + if(channel < FL_ATIM_CHANNEL_3) + { + return (uint32_t)(READ_BIT(TIMx->CCMR1, (ATIM_CCMR_ICPSC_Msk << (channel * 8)))); + } + else + { + return (uint32_t)(READ_BIT(TIMx->CCMR2, (ATIM_CCMR_ICPSC_Msk << ((channel - 2) * 8)))); + } +} + +/** + * @brief 捕捉/比较通道选择 + * @rmtoll CCMR CCS FL_ATIM_CC_SetChannelMode + * @param TIMx TIM instance + * @param mode This parameter can be one of the following values: + * @arg @ref FL_ATIM_CHANNEL_MODE_OUTPUT + * @arg @ref FL_ATIM_CHANNEL_MODE_INPUT_NORMAL + * @arg @ref FL_ATIM_CHANNEL_MODE_INPUT_CROSSOVER + * @arg @ref FL_ATIM_CHANNEL_MODE_INPUT_TRC + * @param channel This parameter can be one of the following values: + * @arg @ref FL_ATIM_CHANNEL_1 + * @arg @ref FL_ATIM_CHANNEL_2 + * @arg @ref FL_ATIM_CHANNEL_3 + * @arg @ref FL_ATIM_CHANNEL_4 + * @retval None + */ +__STATIC_INLINE void FL_ATIM_CC_SetChannelMode(ATIM_Type *TIMx, uint32_t mode, uint32_t channel) +{ + if(channel < FL_ATIM_CHANNEL_3) + { + MODIFY_REG(TIMx->CCMR1, (ATIM_CCMR_CCS_Msk << (channel * 8)), (mode << (channel * 8))); + } + else + { + MODIFY_REG(TIMx->CCMR2, (ATIM_CCMR_CCS_Msk << ((channel - 2) * 8)), (mode << ((channel - 2) * 8))); + } +} + +/** + * @brief 获取捕捉/比较通道 + * @rmtoll CCMR CCS FL_ATIM_CC_GetChannelMode + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_ATIM_CHANNEL_1 + * @arg @ref FL_ATIM_CHANNEL_2 + * @arg @ref FL_ATIM_CHANNEL_3 + * @arg @ref FL_ATIM_CHANNEL_4 + * @retval Returned value can be one of the following values: + * @arg @ref FL_ATIM_CHANNEL_MODE_OUTPUT + * @arg @ref FL_ATIM_CHANNEL_MODE_INPUT_NORMAL + * @arg @ref FL_ATIM_CHANNEL_MODE_INPUT_CROSSOVER + * @arg @ref FL_ATIM_CHANNEL_MODE_INPUT_TRC + */ +__STATIC_INLINE uint32_t FL_ATIM_CC_GetChannelMode(ATIM_Type *TIMx, uint32_t channel) +{ + if(channel < FL_ATIM_CHANNEL_3) + { + return (uint32_t)(READ_BIT(TIMx->CCMR1, (ATIM_CCMR_CCS_Msk << (channel * 8)))); + } + else + { + return (uint32_t)(READ_BIT(TIMx->CCMR2, (ATIM_CCMR_CCS_Msk << ((channel - 2) * 8)))); + } +} + +/** + * @brief 设置捕捉/比较互补输出极性 + * @note + * @rmtoll CCER CCNP FL_ATIM_OC_SetReverseChannelPolarity + * @param TIMx TIM instance + * @param polarity This parameter can be one of the following values: + * @arg @ref FL_ATIM_OCN_POLARITY_NORMAL + * @arg @ref FL_ATIM_OCN_POLARITY_INVERT + * @param channel This parameter can be one of the following values: + * @arg @ref FL_ATIM_CHANNEL_1 + * @arg @ref FL_ATIM_CHANNEL_2 + * @arg @ref FL_ATIM_CHANNEL_3 + * @retval None + */ +__STATIC_INLINE void FL_ATIM_OC_SetReverseChannelPolarity(ATIM_Type *TIMx, uint32_t polarity, uint32_t channel) +{ + MODIFY_REG(TIMx->CCER, (ATIM_CCER_CCNP_Msk << (channel * 4)), (polarity << (channel * 4))); +} + +/** + * @brief 读取捕捉/比较互补输出极性 + * @note + * @rmtoll CCER CCNP FL_ATIM_OC_GetReverseChannelPolarity + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_ATIM_CHANNEL_1 + * @arg @ref FL_ATIM_CHANNEL_2 + * @arg @ref FL_ATIM_CHANNEL_3 + * @retval Returned value can be one of the following values: + * @arg @ref FL_ATIM_OCN_POLARITY_NORMAL + * @arg @ref FL_ATIM_OCN_POLARITY_INVERT + */ +__STATIC_INLINE uint32_t FL_ATIM_OC_GetReverseChannelPolarity(ATIM_Type *TIMx, uint32_t channel) +{ + return (uint32_t)(READ_BIT(TIMx->CCER, (ATIM_CCER_CCNP_Msk << (channel * 4)))); +} + +/** + * @brief 捕捉/比较互补输出使能 + * @note + * @rmtoll CCER CCNE FL_ATIM_OC_EnableReverseChannel + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_ATIM_CHANNEL_1 + * @arg @ref FL_ATIM_CHANNEL_2 + * @arg @ref FL_ATIM_CHANNEL_3 + * @retval None + */ +__STATIC_INLINE void FL_ATIM_OC_EnableReverseChannel(ATIM_Type *TIMx, uint32_t channel) +{ + SET_BIT(TIMx->CCER, (ATIM_CCER_CCNE_Msk << (channel * 4))); +} + +/** + * @brief 读取捕捉/比较互补输出使能状态 + * @note + * @rmtoll CCER CCNE FL_ATIM_OC_IsEnabledReverseChannel + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_ATIM_CHANNEL_1 + * @arg @ref FL_ATIM_CHANNEL_2 + * @arg @ref FL_ATIM_CHANNEL_3 + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ATIM_OC_IsEnabledReverseChannel(ATIM_Type *TIMx, uint32_t channel) +{ + return (uint32_t)(READ_BIT(TIMx->CCER, (ATIM_CCER_CCNE_Msk << (channel * 4))) == (ATIM_CCER_CCNE_Msk << (channel * 4))); +} + +/** + * @brief 捕捉/比较互补输出禁用 + * @note + * @rmtoll CCER CCNE FL_ATIM_OC_DisableReverseChannel + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_ATIM_CHANNEL_1 + * @arg @ref FL_ATIM_CHANNEL_2 + * @arg @ref FL_ATIM_CHANNEL_3 + * @retval None + */ +__STATIC_INLINE void FL_ATIM_OC_DisableReverseChannel(ATIM_Type *TIMx, uint32_t channel) +{ + CLEAR_BIT(TIMx->CCER, (ATIM_CCER_CCNE_Msk << (channel * 4))); +} + +/** + * @brief CC1通道配置为输出时，设置捕捉/比较输出极性 + * @rmtoll CCER CCOP FL_ATIM_OC_SetChannelPolarity + * @param TIMx TIM instance + * @param polarity This parameter can be one of the following values: + * @arg @ref FL_ATIM_OC_POLARITY_NORMAL + * @arg @ref FL_ATIM_OC_POLARITY_INVERT + * @param channel This parameter can be one of the following values: + * @arg @ref FL_ATIM_CHANNEL_1 + * @arg @ref FL_ATIM_CHANNEL_2 + * @arg @ref FL_ATIM_CHANNEL_3 + * @arg @ref FL_ATIM_CHANNEL_4 + * @retval None + */ +__STATIC_INLINE void FL_ATIM_OC_SetChannelPolarity(ATIM_Type *TIMx, uint32_t polarity, uint32_t channel) +{ + MODIFY_REG(TIMx->CCER, (ATIM_CCER_CCOP_Msk << (channel * 4)), (polarity << (channel * 4))); +} + +/** + * @brief CC1通道配置为输出时，读取捕捉/比较输出极性 + * @rmtoll CCER CCOP FL_ATIM_OC_GetChannelPolarity + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_ATIM_CHANNEL_1 + * @arg @ref FL_ATIM_CHANNEL_2 + * @arg @ref FL_ATIM_CHANNEL_3 + * @arg @ref FL_ATIM_CHANNEL_4 + * @retval Returned value can be one of the following values: + * @arg @ref FL_ATIM_OC_POLARITY_NORMAL + * @arg @ref FL_ATIM_OC_POLARITY_INVERT + */ +__STATIC_INLINE uint32_t FL_ATIM_OC_GetChannelPolarity(ATIM_Type *TIMx, uint32_t channel) +{ + return (uint32_t)(READ_BIT(TIMx->CCER, (ATIM_CCER_CCOP_Msk << (channel * 4)))); +} + +/** + * @brief CC1通道配置为输入时，设置捕捉/比较输出极性 + * @rmtoll CCER CCIP FL_ATIM_IC_SetChannelPolarity + * @param TIMx TIM instance + * @param polarity This parameter can be one of the following values: + * @arg @ref FL_ATIM_IC_POLARITY_NORMAL + * @arg @ref FL_ATIM_IC_POLARITY_INVERT + * @param channel This parameter can be one of the following values: + * @arg @ref FL_ATIM_CHANNEL_1 + * @arg @ref FL_ATIM_CHANNEL_2 + * @arg @ref FL_ATIM_CHANNEL_3 + * @arg @ref FL_ATIM_CHANNEL_4 + * @retval None + */ +__STATIC_INLINE void FL_ATIM_IC_SetChannelPolarity(ATIM_Type *TIMx, uint32_t polarity, uint32_t channel) +{ + MODIFY_REG(TIMx->CCER, (ATIM_CCER_CCIP_Msk << (channel * 4)), (polarity << (channel * 4))); +} + +/** + * @brief CC1通道配置为输入时，设置捕捉/比较输出极性 + * @rmtoll CCER CCIP FL_ATIM_IC_GetChannelPolarity + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_ATIM_CHANNEL_1 + * @arg @ref FL_ATIM_CHANNEL_2 + * @arg @ref FL_ATIM_CHANNEL_3 + * @arg @ref FL_ATIM_CHANNEL_4 + * @retval Returned value can be one of the following values: + * @arg @ref FL_ATIM_IC_POLARITY_NORMAL + * @arg @ref FL_ATIM_IC_POLARITY_INVERT + */ +__STATIC_INLINE uint32_t FL_ATIM_IC_GetChannelPolarity(ATIM_Type *TIMx, uint32_t channel) +{ + return (uint32_t)(READ_BIT(TIMx->CCER, (ATIM_CCER_CCIP_Msk << (channel * 4)))); +} + +/** + * @brief CC1通道配置为输出时，捕捉/比较输出使能 + * @rmtoll CCER CCOE FL_ATIM_OC_EnableChannel + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_ATIM_CHANNEL_1 + * @arg @ref FL_ATIM_CHANNEL_2 + * @arg @ref FL_ATIM_CHANNEL_3 + * @arg @ref FL_ATIM_CHANNEL_4 + * @retval None + */ +__STATIC_INLINE void FL_ATIM_OC_EnableChannel(ATIM_Type *TIMx, uint32_t channel) +{ + SET_BIT(TIMx->CCER, (ATIM_CCER_CCOE_Msk << (channel * 4))); +} + +/** + * @brief CC1通道配置为输出时，读取捕捉/比较输出使能状态 + * @rmtoll CCER CCOE FL_ATIM_OC_IsEnabledChannel + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_ATIM_CHANNEL_1 + * @arg @ref FL_ATIM_CHANNEL_2 + * @arg @ref FL_ATIM_CHANNEL_3 + * @arg @ref FL_ATIM_CHANNEL_4 + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ATIM_OC_IsEnabledChannel(ATIM_Type *TIMx, uint32_t channel) +{ + return (uint32_t)(READ_BIT(TIMx->CCER, (ATIM_CCER_CCOE_Msk << (channel * 4))) == (ATIM_CCER_CCOE_Msk << (channel * 4))); +} + +/** + * @brief CC1通道配置为输出时，捕捉/比较输出禁用 + * @rmtoll CCER CCOE FL_ATIM_OC_DisableChannel + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_ATIM_CHANNEL_1 + * @arg @ref FL_ATIM_CHANNEL_2 + * @arg @ref FL_ATIM_CHANNEL_3 + * @arg @ref FL_ATIM_CHANNEL_4 + * @retval None + */ +__STATIC_INLINE void FL_ATIM_OC_DisableChannel(ATIM_Type *TIMx, uint32_t channel) +{ + CLEAR_BIT(TIMx->CCER, (ATIM_CCER_CCOE_Msk << (channel * 4))); +} + +/** + * @brief CC1通道配置为输入时，捕捉/比较输出使能 + * @rmtoll CCER CCIE FL_ATIM_IC_EnableChannel + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_ATIM_CHANNEL_1 + * @arg @ref FL_ATIM_CHANNEL_2 + * @arg @ref FL_ATIM_CHANNEL_3 + * @arg @ref FL_ATIM_CHANNEL_4 + * @retval None + */ +__STATIC_INLINE void FL_ATIM_IC_EnableChannel(ATIM_Type *TIMx, uint32_t channel) +{ + SET_BIT(TIMx->CCER, (ATIM_CCER_CCIE_Msk << (channel * 4))); +} + +/** + * @brief CC1通道配置为输入时，读取捕捉/比较输出使能状态 + * @rmtoll CCER CCIE FL_ATIM_IC_IsEnabledChannel + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_ATIM_CHANNEL_1 + * @arg @ref FL_ATIM_CHANNEL_2 + * @arg @ref FL_ATIM_CHANNEL_3 + * @arg @ref FL_ATIM_CHANNEL_4 + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ATIM_IC_IsEnabledChannel(ATIM_Type *TIMx, uint32_t channel) +{ + return (uint32_t)(READ_BIT(TIMx->CCER, (ATIM_CCER_CCIE_Msk << (channel * 4))) == (ATIM_CCER_CCIE_Msk << (channel * 4))); +} + +/** + * @brief CC1通道配置为输入时，捕捉/比较输出禁用 + * @rmtoll CCER CCIE FL_ATIM_IC_DisableChannel + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_ATIM_CHANNEL_1 + * @arg @ref FL_ATIM_CHANNEL_2 + * @arg @ref FL_ATIM_CHANNEL_3 + * @arg @ref FL_ATIM_CHANNEL_4 + * @retval None + */ +__STATIC_INLINE void FL_ATIM_IC_DisableChannel(ATIM_Type *TIMx, uint32_t channel) +{ + CLEAR_BIT(TIMx->CCER, (ATIM_CCER_CCIE_Msk << (channel * 4))); +} + +/** + * @brief 设置重复计数值 + * @note + * @rmtoll RCR FL_ATIM_WriteRepetitionCounter + * @param TIMx TIM instance + * @param repeatCounter + * @retval None + */ +__STATIC_INLINE void FL_ATIM_WriteRepetitionCounter(ATIM_Type *TIMx, uint32_t repeatCounter) +{ + MODIFY_REG(TIMx->RCR, (0xffU << 0U), (repeatCounter << 0U)); +} + +/** + * @brief 读取重复计数值 + * @note + * @rmtoll RCR FL_ATIM_ReadRepetitionCounter + * @param TIMx TIM instance + * @retval + */ +__STATIC_INLINE uint32_t FL_ATIM_ReadRepetitionCounter(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->RCR, 0xffU) >> 0U); +} + +/** + * @brief 主控输出使能 + * @note + * @rmtoll BDTR MOE FL_ATIM_EnableALLOutput + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_ATIM_EnableALLOutput(ATIM_Type *TIMx) +{ + SET_BIT(TIMx->BDTR, ATIM_BDTR_MOE_Msk); +} + +/** + * @brief 读取主控输出使能状态 + * @note + * @rmtoll BDTR MOE FL_ATIM_IsEnabledALLOutput + * @param TIMx TIM instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ATIM_IsEnabledALLOutput(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->BDTR, ATIM_BDTR_MOE_Msk) == ATIM_BDTR_MOE_Msk); +} + +/** + * @brief 主控输出禁用 + * @note + * @rmtoll BDTR MOE FL_ATIM_DisableALLOutput + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_ATIM_DisableALLOutput(ATIM_Type *TIMx) +{ + CLEAR_BIT(TIMx->BDTR, ATIM_BDTR_MOE_Msk); +} + +/** + * @brief 自动输出使能 + * @note + * @rmtoll BDTR AOE FL_ATIM_EnableAutomaticOutput + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_ATIM_EnableAutomaticOutput(ATIM_Type *TIMx) +{ + SET_BIT(TIMx->BDTR, ATIM_BDTR_AOE_Msk); +} + +/** + * @brief 读取自动输出使能状态 + * @note + * @rmtoll BDTR AOE FL_ATIM_IsEnabledAutomaticOutput + * @param TIMx TIM instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ATIM_IsEnabledAutomaticOutput(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->BDTR, ATIM_BDTR_AOE_Msk) == ATIM_BDTR_AOE_Msk); +} + +/** + * @brief 自动输出禁用 + * @note + * @rmtoll BDTR AOE FL_ATIM_DisableAutomaticOutput + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_ATIM_DisableAutomaticOutput(ATIM_Type *TIMx) +{ + CLEAR_BIT(TIMx->BDTR, ATIM_BDTR_AOE_Msk); +} + +/** + * @brief 设置刹车极性 + * @note + * @rmtoll BDTR BKP FL_ATIM_SetBreakPolarity + * @param TIMx TIM instance + * @param polarity This parameter can be one of the following values: + * @arg @ref FL_ATIM_BREAK_POLARITY_LOW + * @arg @ref FL_ATIM_BREAK_POLARITY_HIGH + * @retval None + */ +__STATIC_INLINE void FL_ATIM_SetBreakPolarity(ATIM_Type *TIMx, uint32_t polarity) +{ + MODIFY_REG(TIMx->BDTR, ATIM_BDTR_BKP_Msk, polarity); +} + +/** + * @brief 读取刹车极性 + * @note + * @rmtoll BDTR BKP FL_ATIM_GetBreakPolarity + * @param TIMx TIM instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_ATIM_BREAK_POLARITY_LOW + * @arg @ref FL_ATIM_BREAK_POLARITY_HIGH + */ +__STATIC_INLINE uint32_t FL_ATIM_GetBreakPolarity(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->BDTR, ATIM_BDTR_BKP_Msk)); +} + +/** + * @brief 刹车使能 + * @note + * @rmtoll BDTR BKE FL_ATIM_EnableBreak + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_ATIM_EnableBreak(ATIM_Type *TIMx) +{ + SET_BIT(TIMx->BDTR, ATIM_BDTR_BKE_Msk); +} + +/** + * @brief 读取刹车使能状态 + * @note + * @rmtoll BDTR BKE FL_ATIM_IsEnabledBreak + * @param TIMx TIM instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ATIM_IsEnabledBreak(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->BDTR, ATIM_BDTR_BKE_Msk) == ATIM_BDTR_BKE_Msk); +} + +/** + * @brief 刹车禁用 + * @note + * @rmtoll BDTR BKE FL_ATIM_DisableBreak + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_ATIM_DisableBreak(ATIM_Type *TIMx) +{ + CLEAR_BIT(TIMx->BDTR, ATIM_BDTR_BKE_Msk); +} + +/** + * @brief 运行状态下的输出关闭状态选择 + * @note + * @rmtoll BDTR OSSR FL_ATIM_SetOffStateRun + * @param TIMx TIM instance + * @param state This parameter can be one of the following values: + * @arg @ref FL_ATIM_OSSR_DISABLE + * @arg @ref FL_ATIM_OSSR_ENABLE + * @retval None + */ +__STATIC_INLINE void FL_ATIM_SetOffStateRun(ATIM_Type *TIMx, uint32_t state) +{ + MODIFY_REG(TIMx->BDTR, ATIM_BDTR_OSSR_Msk, state); +} + +/** + * @brief 读取运行状态下的输出关闭状态选择 + * @note + * @rmtoll BDTR OSSR FL_ATIM_GetOffStateRun + * @param TIMx TIM instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_ATIM_OSSR_DISABLE + * @arg @ref FL_ATIM_OSSR_ENABLE + */ +__STATIC_INLINE uint32_t FL_ATIM_GetOffStateRun(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->BDTR, ATIM_BDTR_OSSR_Msk)); +} + +/** + * @brief IDLE状态下的输出关闭状态选择 + * @note + * @rmtoll BDTR OSSI FL_ATIM_SetOffStateIdle + * @param TIMx TIM instance + * @param state This parameter can be one of the following values: + * @arg @ref FL_ATIM_OSSI_DISABLE + * @arg @ref FL_ATIM_OSSI_ENABLE + * @retval None + */ +__STATIC_INLINE void FL_ATIM_SetOffStateIdle(ATIM_Type *TIMx, uint32_t state) +{ + MODIFY_REG(TIMx->BDTR, ATIM_BDTR_OSSI_Msk, state); +} + +/** + * @brief IDLE状态下的输出关闭状态选择 + * @note + * @rmtoll BDTR OSSI FL_ATIM_GetOffStateIdle + * @param TIMx TIM instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_ATIM_OSSI_DISABLE + * @arg @ref FL_ATIM_OSSI_ENABLE + */ +__STATIC_INLINE uint32_t FL_ATIM_GetOffStateIdle(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->BDTR, ATIM_BDTR_OSSI_Msk)); +} + +/** + * @brief 设置寄存器写保护等级 + * @note + * @rmtoll BDTR LOCK FL_ATIM_SetLockLevel + * @param TIMx TIM instance + * @param lockLevel This parameter can be one of the following values: + * @arg @ref FL_ATIM_LOCK_LEVEL_OFF + * @arg @ref FL_ATIM_LOCK_LEVEL_1 + * @arg @ref FL_ATIM_LOCK_LEVEL_2 + * @arg @ref FL_ATIM_LOCK_LEVEL_3 + * @retval None + */ +__STATIC_INLINE void FL_ATIM_SetLockLevel(ATIM_Type *TIMx, uint32_t lockLevel) +{ + MODIFY_REG(TIMx->BDTR, ATIM_BDTR_LOCK_Msk, lockLevel); +} + +/** + * @brief 读取寄存器写保护配置状态 + * @note + * @rmtoll BDTR LOCK FL_ATIM_GetLockLevel + * @param TIMx TIM instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_ATIM_LOCK_LEVEL_OFF + * @arg @ref FL_ATIM_LOCK_LEVEL_1 + * @arg @ref FL_ATIM_LOCK_LEVEL_2 + * @arg @ref FL_ATIM_LOCK_LEVEL_3 + */ +__STATIC_INLINE uint32_t FL_ATIM_GetLockLevel(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->BDTR, ATIM_BDTR_LOCK_Msk)); +} + +/** + * @brief 设置死区时间长度 + * @note + * @rmtoll BDTR DTG FL_ATIM_WriteDeadTime + * @param TIMx TIM instance + * @param deadTime + * @retval None + */ +__STATIC_INLINE void FL_ATIM_WriteDeadTime(ATIM_Type *TIMx, uint32_t deadTime) +{ + MODIFY_REG(TIMx->BDTR, (0xffU << 0U), (deadTime << 0U)); +} + +/** + * @brief 读取死区时间长度 + * @note + * @rmtoll BDTR DTG FL_ATIM_ReadDeadTime + * @param TIMx TIM instance + * @retval + */ +__STATIC_INLINE uint32_t FL_ATIM_ReadDeadTime(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->BDTR, 0xffU) >> 0U); +} + +/** + * @brief 设置ATIM_BRK1引脚输入门控信号 + * @note + * @rmtoll BKCR BRK1GATE FL_ATIM_SetBreak1GateState + * @param TIMx TIM instance + * @param state This parameter can be one of the following values: + * @arg @ref FL_ATIM_BREAK1_GATE_LOW + * @arg @ref FL_ATIM_BREAK1_GATE_AUTO + * @retval None + */ +__STATIC_INLINE void FL_ATIM_SetBreak1GateState(ATIM_Type *TIMx, uint32_t state) +{ + MODIFY_REG(TIMx->BKCR, ATIM_BKCR_BRK1GATE_Msk, state); +} + +/** + * @brief 读取ATIM_BRK1引脚输入门控信号 + * @note + * @rmtoll BKCR BRK1GATE FL_ATIM_GetBreak1GateState + * @param TIMx TIM instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_ATIM_BREAK1_GATE_LOW + * @arg @ref FL_ATIM_BREAK1_GATE_AUTO + */ +__STATIC_INLINE uint32_t FL_ATIM_GetBreak1GateState(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->BKCR, ATIM_BKCR_BRK1GATE_Msk)); +} + +/** + * @brief 设置ATIM_BRK2引脚输入门控信号 + * @note + * @rmtoll BKCR BRK2GATE FL_ATIM_SetBreak2GateState + * @param TIMx TIM instance + * @param state This parameter can be one of the following values: + * @arg @ref FL_ATIM_BREAK2_GATE_LOW + * @arg @ref FL_ATIM_BREAK2_GATE_AUTO + * @retval None + */ +__STATIC_INLINE void FL_ATIM_SetBreak2GateState(ATIM_Type *TIMx, uint32_t state) +{ + MODIFY_REG(TIMx->BKCR, ATIM_BKCR_BRK2GATE_Msk, state); +} + +/** + * @brief 读取ATIM_BRK2引脚输入门控信号 + * @note + * @rmtoll BKCR BRK2GATE FL_ATIM_GetBreak2GateState + * @param TIMx TIM instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_ATIM_BREAK2_GATE_LOW + * @arg @ref FL_ATIM_BREAK2_GATE_AUTO + */ +__STATIC_INLINE uint32_t FL_ATIM_GetBreak2GateState(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->BKCR, ATIM_BKCR_BRK2GATE_Msk)); +} + +/** + * @brief 设置刹车信号的滤波时钟和长度选择 + * @note + * @rmtoll BKCR BRKF FL_ATIM_SetBreakFilter + * @param TIMx TIM instance + * @param filter This parameter can be one of the following values: + * @arg @ref FL_ATIM_BREAK_FILTER_DIV1 + * @arg @ref FL_ATIM_BREAK_FILTER_DIV1_N2 + * @arg @ref FL_ATIM_BREAK_FILTER_DIV1_N4 + * @arg @ref FL_ATIM_BREAK_FILTER_DIV1_N8 + * @arg @ref FL_ATIM_BREAK_FILTER_DIV2_N6 + * @arg @ref FL_ATIM_BREAK_FILTER_DIV2_N8 + * @arg @ref FL_ATIM_BREAK_FILTER_DIV4_N6 + * @arg @ref FL_ATIM_BREAK_FILTER_DIV4_N8 + * @arg @ref FL_ATIM_BREAK_FILTER_DIV8_N6 + * @arg @ref FL_ATIM_BREAK_FILTER_DIV8_N8 + * @arg @ref FL_ATIM_BREAK_FILTER_DIV16_N5 + * @arg @ref FL_ATIM_BREAK_FILTER_DIV16_N6 + * @arg @ref FL_ATIM_BREAK_FILTER_DIV16_N8 + * @arg @ref FL_ATIM_BREAK_FILTER_DIV32_N5 + * @arg @ref FL_ATIM_BREAK_FILTER_DIV32_N6 + * @arg @ref FL_ATIM_BREAK_FILTER_DIV32_N8 + * @retval None + */ +__STATIC_INLINE void FL_ATIM_SetBreakFilter(ATIM_Type *TIMx, uint32_t filter) +{ + MODIFY_REG(TIMx->BKCR, ATIM_BKCR_BRKF_Msk, filter); +} + +/** + * @brief 读取刹车信号的滤波时钟和长度选择 + * @note + * @rmtoll BKCR BRKF FL_ATIM_GetBreakFilter + * @param TIMx TIM instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_ATIM_BREAK_FILTER_DIV1 + * @arg @ref FL_ATIM_BREAK_FILTER_DIV1_N2 + * @arg @ref FL_ATIM_BREAK_FILTER_DIV1_N4 + * @arg @ref FL_ATIM_BREAK_FILTER_DIV1_N8 + * @arg @ref FL_ATIM_BREAK_FILTER_DIV2_N6 + * @arg @ref FL_ATIM_BREAK_FILTER_DIV2_N8 + * @arg @ref FL_ATIM_BREAK_FILTER_DIV4_N6 + * @arg @ref FL_ATIM_BREAK_FILTER_DIV4_N8 + * @arg @ref FL_ATIM_BREAK_FILTER_DIV8_N6 + * @arg @ref FL_ATIM_BREAK_FILTER_DIV8_N8 + * @arg @ref FL_ATIM_BREAK_FILTER_DIV16_N5 + * @arg @ref FL_ATIM_BREAK_FILTER_DIV16_N6 + * @arg @ref FL_ATIM_BREAK_FILTER_DIV16_N8 + * @arg @ref FL_ATIM_BREAK_FILTER_DIV32_N5 + * @arg @ref FL_ATIM_BREAK_FILTER_DIV32_N6 + * @arg @ref FL_ATIM_BREAK_FILTER_DIV32_N8 + */ +__STATIC_INLINE uint32_t FL_ATIM_GetBreakFilter(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->BKCR, ATIM_BKCR_BRKF_Msk)); +} + +/** + * @brief 刹车组合控制 + * @note + * @rmtoll BKCR BRKCOMB FL_ATIM_SetBreakSignalCombination + * @param TIMx TIM instance + * @param filter This parameter can be one of the following values: + * @arg @ref FL_ATIM_BREAK_COMBINATION_OR + * @arg @ref FL_ATIM_BREAK_COMBINATION_AND + * @retval None + */ +__STATIC_INLINE void FL_ATIM_SetBreakSignalCombination(ATIM_Type *TIMx, uint32_t filter) +{ + MODIFY_REG(TIMx->BKCR, ATIM_BKCR_BRKCOMB_Msk, filter); +} + +/** + * @brief 读取刹车组合控制状态 + * @note + * @rmtoll BKCR BRKCOMB FL_ATIM_GetBreakSignalCombination + * @param TIMx TIM instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_ATIM_BREAK_COMBINATION_OR + * @arg @ref FL_ATIM_BREAK_COMBINATION_AND + */ +__STATIC_INLINE uint32_t FL_ATIM_GetBreakSignalCombination(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->BKCR, ATIM_BKCR_BRKCOMB_Msk)); +} + +/** + * @brief XTHF停振检测刹车信号使能 + * @note + * @rmtoll BKCR HFDET_BRKEN FL_ATIM_EnableHFDETBreak + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_ATIM_EnableHFDETBreak(ATIM_Type *TIMx) +{ + SET_BIT(TIMx->BKCR, ATIM_BKCR_HFDET_BRKEN_Msk); +} + +/** + * @brief 读取XTHF停振检测刹车信号使能状态 + * @note + * @rmtoll BKCR HFDET_BRKEN FL_ATIM_IsEnabledHFDETBreak + * @param TIMx TIM instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ATIM_IsEnabledHFDETBreak(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->BKCR, ATIM_BKCR_HFDET_BRKEN_Msk) == ATIM_BKCR_HFDET_BRKEN_Msk); +} + +/** + * @brief XTHF停振检测刹车信号禁用 + * @note + * @rmtoll BKCR HFDET_BRKEN FL_ATIM_DisableHFDETBreak + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_ATIM_DisableHFDETBreak(ATIM_Type *TIMx) +{ + CLEAR_BIT(TIMx->BKCR, ATIM_BKCR_HFDET_BRKEN_Msk); +} + +/** + * @brief SVD刹车信号使能 + * @note + * @rmtoll BKCR SVD_BRKEN FL_ATIM_EnableSVDBreak + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_ATIM_EnableSVDBreak(ATIM_Type *TIMx) +{ + SET_BIT(TIMx->BKCR, ATIM_BKCR_SVD_BRKEN_Msk); +} + +/** + * @brief 读取SVD刹车信号使能状态 + * @note + * @rmtoll BKCR SVD_BRKEN FL_ATIM_IsEnabledSVDBreak + * @param TIMx TIM instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ATIM_IsEnabledSVDBreak(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->BKCR, ATIM_BKCR_SVD_BRKEN_Msk) == ATIM_BKCR_SVD_BRKEN_Msk); +} + +/** + * @brief SVD刹车信号禁用 + * @note + * @rmtoll BKCR SVD_BRKEN FL_ATIM_DisableSVDBreak + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_ATIM_DisableSVDBreak(ATIM_Type *TIMx) +{ + CLEAR_BIT(TIMx->BKCR, ATIM_BKCR_SVD_BRKEN_Msk); +} + +/** + * @brief 比较器输出刹车信号使能 + * @note + * @rmtoll BKCR COMP_BRKEN FL_ATIM_EnableCOMPBreak + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_ATIM_EnableCOMPBreak(ATIM_Type *TIMx) +{ + SET_BIT(TIMx->BKCR, ATIM_BKCR_COMP_BRKEN_Msk); +} + +/** + * @brief 读取比较器输出刹车信号使能状态 + * @note + * @rmtoll BKCR COMP_BRKEN FL_ATIM_IsEnabledCOMPBreak + * @param TIMx TIM instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ATIM_IsEnabledCOMPBreak(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->BKCR, ATIM_BKCR_COMP_BRKEN_Msk) == ATIM_BKCR_COMP_BRKEN_Msk); +} + +/** + * @brief 比较器输出刹车信号禁用 + * @note + * @rmtoll BKCR COMP_BRKEN FL_ATIM_DisableCOMPBreak + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_ATIM_DisableCOMPBreak(ATIM_Type *TIMx) +{ + CLEAR_BIT(TIMx->BKCR, ATIM_BKCR_COMP_BRKEN_Msk); +} + +/** + * @} + */ + +/** @defgroup ATIM_FL_EF_Init Initialization and de-initialization functions + * @{ + */ + +FL_ErrorStatus FL_ATIM_DeInit(ATIM_Type *TIMx); + +void FL_ATIM_StructInit(FL_ATIM_InitTypeDef *TIM_InitStruct); +void FL_ATIM_SlaveModeStructInit(FL_ATIM_SlaveInitTypeDef *TIM_InitStruct); +void FL_ATIM_IC_StructInit(FL_ATIM_IC_InitTypeDef *TIM_ICInitStruct); +void FL_ATIM_OC_StructInit(FL_ATIM_OC_InitTypeDef *TIM_OC_InitStruct); +void FL_ATIM_ETRStructInit(FL_ATIM_ETR_InitTypeDef *TIM_InitStruct); +void FL_ATIM_BDTR_StructInit(FL_ATIM_BDTR_InitTypeDef *TIM_BDTR_InitStruct); + +FL_ErrorStatus FL_ATIM_Init(ATIM_Type *TIMx, FL_ATIM_InitTypeDef *TIM_InitStruct); +FL_ErrorStatus FL_ATIM_IC_Init(ATIM_Type *TIMx, uint32_t Channel, FL_ATIM_IC_InitTypeDef *IC_InitStruct); +FL_ErrorStatus FL_ATIM_ETR_Init(ATIM_Type *TIMx, FL_ATIM_ETR_InitTypeDef *TIM_InitStruct); +FL_ErrorStatus FL_ATIM_SlaveMode_Init(ATIM_Type *TIMx, FL_ATIM_SlaveInitTypeDef *TIM_InitStruct); +FL_ErrorStatus FL_ATIM_OC_Init(ATIM_Type *TIMx, uint32_t Channel, FL_ATIM_OC_InitTypeDef *TIM_OC_InitStruct); +FL_ErrorStatus FL_ATIM_BDTR_Init(ATIM_Type *TIMx, FL_ATIM_BDTR_InitTypeDef *TIM_BDTR_InitStruct); + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif /* __FM33LG0XX_FL_ATIM_H*/ + +/*************************Py_Code_Generator Version: 0.1-0.11-0.1 @ 2020-09-12*************************/ +/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/ diff --git a/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_bstim16.h b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_bstim16.h new file mode 100644 index 0000000..3fadc78 --- /dev/null +++ b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_bstim16.h @@ -0,0 +1,506 @@ + /** + ******************************************************************************************************* + * @file fm33lg0xx_fl_bstim16.h + * @author FMSH Application Team + * @brief Head file of BSTIM16 FL Module + ******************************************************************************************************* + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + + + +/* Define to prevent recursive inclusion---------------------------------------------------------------*/ +#ifndef __FM33LG0XX_FL_BSTIM16_H +#define __FM33LG0XX_FL_BSTIM16_H + +#ifdef __cplusplus +extern "C" { +#endif +/* Includes -------------------------------------------------------------------------------------------*/ +#include "fm33lg0xx_fl_def.h" +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @defgroup BSTIM16 BSTIM16 + * @brief BSTIM16 FL driver + * @{ + */ + +/* Exported types -------------------------------------------------------------------------------------*/ +/** @defgroup BSTIM16_FL_ES_INIT BSTIM16 Exported Init structures + * @{ + */ + +/** + * @brief FL BSTIM16 Init Sturcture definition + */ + +typedef struct +{ + /* 预分频系数 */ + uint32_t prescaler; + /* 自动重装载值 */ + uint32_t autoReload; + /* 自动重装载值 */ + uint32_t autoReloadState; + + uint32_t clockSource; + +} FL_BSTIM16_InitTypeDef; + +/** + * @} + */ +/* Exported constants ---------------------------------------------------------------------------------*/ +/** @defgroup BSTIM16_FL_Exported_Constants BSTIM16 Exported Constants + * @{ + */ + +#define BSTIM16_CR1_ARPE_Pos (7U) +#define BSTIM16_CR1_ARPE_Msk (0x1U << BSTIM16_CR1_ARPE_Pos) +#define BSTIM16_CR1_ARPE BSTIM16_CR1_ARPE_Msk + +#define BSTIM16_CR1_OPM_Pos (3U) +#define BSTIM16_CR1_OPM_Msk (0x1U << BSTIM16_CR1_OPM_Pos) +#define BSTIM16_CR1_OPM BSTIM16_CR1_OPM_Msk + +#define BSTIM16_CR1_URS_Pos (2U) +#define BSTIM16_CR1_URS_Msk (0x1U << BSTIM16_CR1_URS_Pos) +#define BSTIM16_CR1_URS BSTIM16_CR1_URS_Msk + +#define BSTIM16_CR1_UDIS_Pos (1U) +#define BSTIM16_CR1_UDIS_Msk (0x1U << BSTIM16_CR1_UDIS_Pos) +#define BSTIM16_CR1_UDIS BSTIM16_CR1_UDIS_Msk + +#define BSTIM16_CR1_CEN_Pos (0U) +#define BSTIM16_CR1_CEN_Msk (0x1U << BSTIM16_CR1_CEN_Pos) +#define BSTIM16_CR1_CEN BSTIM16_CR1_CEN_Msk + +#define BSTIM16_CR2_MMS_Pos (4U) +#define BSTIM16_CR2_MMS_Msk (0x7U << BSTIM16_CR2_MMS_Pos) +#define BSTIM16_CR2_MMS BSTIM16_CR2_MMS_Msk + +#define BSTIM16_IER_UIE_Pos (0U) +#define BSTIM16_IER_UIE_Msk (0x1U << BSTIM16_IER_UIE_Pos) +#define BSTIM16_IER_UIE BSTIM16_IER_UIE_Msk + +#define BSTIM16_ISR_UIF_Pos (0U) +#define BSTIM16_ISR_UIF_Msk (0x1U << BSTIM16_ISR_UIF_Pos) +#define BSTIM16_ISR_UIF BSTIM16_ISR_UIF_Msk + +#define BSTIM16_EGR_UG_Pos (0U) +#define BSTIM16_EGR_UG_Msk (0x1U << BSTIM16_EGR_UG_Pos) +#define BSTIM16_EGR_UG BSTIM16_EGR_UG_Msk + + + + + + +#define FL_BSTIM16_ONE_PULSE_MODE_CONTINUOUS (0x0U << BSTIM16_CR1_OPM_Pos) +#define FL_BSTIM16_ONE_PULSE_MODE_SINGLE (0x1U << BSTIM16_CR1_OPM_Pos) + + +#define FL_BSTIM16_UPDATE_SOURCE_REGULAR (0x0U << BSTIM16_CR1_URS_Pos) +#define FL_BSTIM16_UPDATE_SOURCE_COUNTER (0x1U << BSTIM16_CR1_URS_Pos) + + +#define FL_BSTIM16_TRGO_UG (0x0U << BSTIM16_CR2_MMS_Pos) +#define FL_BSTIM16_TRGO_ENABLE (0x1U << BSTIM16_CR2_MMS_Pos) +#define FL_BSTIM16_TRGO_UPDATE (0x2U << BSTIM16_CR2_MMS_Pos) + + +/** + * @} + */ +/* Exported functions ---------------------------------------------------------------------------------*/ +/** @defgroup BSTIM16_FL_Exported_Functions BSTIM16 Exported Functions + * @{ + */ + +/** + * @brief Auto-Reload preload enable + * @rmtoll CR1 ARPE FL_BSTIM16_EnableARRPreload + * @param BSTIM16x BSTIM16 instance + * @retval None + */ +__STATIC_INLINE void FL_BSTIM16_EnableARRPreload(BSTIM16_Type *BSTIM16x) +{ + SET_BIT(BSTIM16x->CR1, BSTIM16_CR1_ARPE_Msk); +} + +/** + * @brief Get Auto-Reload preload enable status + * @rmtoll CR1 ARPE FL_BSTIM16_IsEnabledARRPreload + * @param BSTIM16x BSTIM16 instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_BSTIM16_IsEnabledARRPreload(BSTIM16_Type *BSTIM16x) +{ + return (uint32_t)(READ_BIT(BSTIM16x->CR1, BSTIM16_CR1_ARPE_Msk) == BSTIM16_CR1_ARPE_Msk); +} + +/** + * @brief Auto-Reload preload disable + * @rmtoll CR1 ARPE FL_BSTIM16_DisableARRPreload + * @param BSTIM16x BSTIM16 instance + * @retval None + */ +__STATIC_INLINE void FL_BSTIM16_DisableARRPreload(BSTIM16_Type *BSTIM16x) +{ + CLEAR_BIT(BSTIM16x->CR1, BSTIM16_CR1_ARPE_Msk); +} + +/** + * @brief Set one pulse mode + * @rmtoll CR1 OPM FL_BSTIM16_SetOnePulseMode + * @param BSTIM16x BSTIM16 instance + * @param mode This parameter can be one of the following values: + * @arg @ref FL_BSTIM16_ONE_PULSE_MODE_CONTINUOUS + * @arg @ref FL_BSTIM16_ONE_PULSE_MODE_SINGLE + * @retval None + */ +__STATIC_INLINE void FL_BSTIM16_SetOnePulseMode(BSTIM16_Type *BSTIM16x, uint32_t mode) +{ + MODIFY_REG(BSTIM16x->CR1, BSTIM16_CR1_OPM_Msk, mode); +} + +/** + * @brief Get one pulse mode + * @rmtoll CR1 OPM FL_BSTIM16_GetOnePulseMode + * @param BSTIM16x BSTIM16 instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_BSTIM16_ONE_PULSE_MODE_CONTINUOUS + * @arg @ref FL_BSTIM16_ONE_PULSE_MODE_SINGLE + */ +__STATIC_INLINE uint32_t FL_BSTIM16_GetOnePulseMode(BSTIM16_Type *BSTIM16x) +{ + return (uint32_t)(READ_BIT(BSTIM16x->CR1, BSTIM16_CR1_OPM_Msk)); +} + +/** + * @brief Set update request + * @rmtoll CR1 URS FL_BSTIM16_SetUpdateSource + * @param BSTIM16x BSTIM16 instance + * @param source This parameter can be one of the following values: + * @arg @ref FL_BSTIM16_UPDATE_SOURCE_REGULAR + * @arg @ref FL_BSTIM16_UPDATE_SOURCE_COUNTER + * @retval None + */ +__STATIC_INLINE void FL_BSTIM16_SetUpdateSource(BSTIM16_Type *BSTIM16x, uint32_t source) +{ + MODIFY_REG(BSTIM16x->CR1, BSTIM16_CR1_URS_Msk, source); +} + +/** + * @brief Get update request status + * @rmtoll CR1 URS FL_BSTIM16_GetUpdateSource + * @param BSTIM16x BSTIM16 instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_BSTIM16_UPDATE_SOURCE_REGULAR + * @arg @ref FL_BSTIM16_UPDATE_SOURCE_COUNTER + */ +__STATIC_INLINE uint32_t FL_BSTIM16_GetUpdateSource(BSTIM16_Type *BSTIM16x) +{ + return (uint32_t)(READ_BIT(BSTIM16x->CR1, BSTIM16_CR1_URS_Msk)); +} + +/** + * @brief Update event enable + * @rmtoll CR1 UDIS FL_BSTIM16_EnableUpdateEvent + * @param BSTIM16x BSTIM16 instance + * @retval None + */ +__STATIC_INLINE void FL_BSTIM16_EnableUpdateEvent(BSTIM16_Type *BSTIM16x) +{ + CLEAR_BIT(BSTIM16x->CR1, BSTIM16_CR1_UDIS_Msk); +} + +/** + * @brief Get update event disable status + * @rmtoll CR1 UDIS FL_BSTIM16_IsEnabledUpdateEvent + * @param BSTIM16x BSTIM16 instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_BSTIM16_IsEnabledUpdateEvent(BSTIM16_Type *BSTIM16x) +{ + return (uint32_t)!(READ_BIT(BSTIM16x->CR1, BSTIM16_CR1_UDIS_Msk) == BSTIM16_CR1_UDIS_Msk); +} + +/** + * @brief Update event disable + * @rmtoll CR1 UDIS FL_BSTIM16_DisableUpdateEvent + * @param BSTIM16x BSTIM16 instance + * @retval None + */ +__STATIC_INLINE void FL_BSTIM16_DisableUpdateEvent(BSTIM16_Type *BSTIM16x) +{ + SET_BIT(BSTIM16x->CR1, BSTIM16_CR1_UDIS_Msk); +} + +/** + * @brief Counter enable + * @rmtoll CR1 CEN FL_BSTIM16_Enable + * @param BSTIM16x BSTIM16 instance + * @retval None + */ +__STATIC_INLINE void FL_BSTIM16_Enable(BSTIM16_Type *BSTIM16x) +{ + SET_BIT(BSTIM16x->CR1, BSTIM16_CR1_CEN_Msk); +} + +/** + * @brief Get counter enable status + * @rmtoll CR1 CEN FL_BSTIM16_IsEnabled + * @param BSTIM16x BSTIM16 instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_BSTIM16_IsEnabled(BSTIM16_Type *BSTIM16x) +{ + return (uint32_t)(READ_BIT(BSTIM16x->CR1, BSTIM16_CR1_CEN_Msk) == BSTIM16_CR1_CEN_Msk); +} + +/** + * @brief Counter disable + * @rmtoll CR1 CEN FL_BSTIM16_Disable + * @param BSTIM16x BSTIM16 instance + * @retval None + */ +__STATIC_INLINE void FL_BSTIM16_Disable(BSTIM16_Type *BSTIM16x) +{ + CLEAR_BIT(BSTIM16x->CR1, BSTIM16_CR1_CEN_Msk); +} + +/** + * @brief Set master Trigger Output mode + * @rmtoll CR2 MMS FL_BSTIM16_SetTriggerOutput + * @param BSTIM16x BSTIM16 instance + * @param triggerOutput This parameter can be one of the following values: + * @arg @ref FL_BSTIM16_TRGO_UG + * @arg @ref FL_BSTIM16_TRGO_ENABLE + * @arg @ref FL_BSTIM16_TRGO_UPDATE + * @retval None + */ +__STATIC_INLINE void FL_BSTIM16_SetTriggerOutput(BSTIM16_Type *BSTIM16x, uint32_t triggerOutput) +{ + MODIFY_REG(BSTIM16x->CR2, BSTIM16_CR2_MMS_Msk, triggerOutput); +} + +/** + * @brief Get master Trigger Output mode + * @rmtoll CR2 MMS FL_BSTIM16_GetTriggerOutput + * @param BSTIM16x BSTIM16 instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_BSTIM16_TRGO_UG + * @arg @ref FL_BSTIM16_TRGO_ENABLE + * @arg @ref FL_BSTIM16_TRGO_UPDATE + */ +__STATIC_INLINE uint32_t FL_BSTIM16_GetTriggerOutput(BSTIM16_Type *BSTIM16x) +{ + return (uint32_t)(READ_BIT(BSTIM16x->CR2, BSTIM16_CR2_MMS_Msk)); +} + +/** + * @brief Update event interrupt disable + * @rmtoll IER UIE FL_BSTIM16_DisableIT_Update + * @param BSTIM16x BSTIM16 instance + * @retval None + */ +__STATIC_INLINE void FL_BSTIM16_DisableIT_Update(BSTIM16_Type *BSTIM16x) +{ + CLEAR_BIT(BSTIM16x->IER, BSTIM16_IER_UIE_Msk); +} + +/** + * @brief Update event interrupt enable + * @rmtoll IER UIE FL_BSTIM16_EnableIT_Update + * @param BSTIM16x BSTIM16 instance + * @retval None + */ +__STATIC_INLINE void FL_BSTIM16_EnableIT_Update(BSTIM16_Type *BSTIM16x) +{ + SET_BIT(BSTIM16x->IER, BSTIM16_IER_UIE_Msk); +} + +/** + * @brief Get update event interrupt enable status + * @rmtoll IER UIE FL_BSTIM16_IsEnabledIT_Update + * @param BSTIM16x BSTIM16 instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_BSTIM16_IsEnabledIT_Update(BSTIM16_Type *BSTIM16x) +{ + return (uint32_t)(READ_BIT(BSTIM16x->IER, BSTIM16_IER_UIE_Msk) == BSTIM16_IER_UIE_Msk); +} + +/** + * @brief Get update event interrupt flag + * @rmtoll ISR UIF FL_BSTIM16_IsActiveFlag_Update + * @param BSTIM16x BSTIM16 instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_BSTIM16_IsActiveFlag_Update(BSTIM16_Type *BSTIM16x) +{ + return (uint32_t)(READ_BIT(BSTIM16x->ISR, BSTIM16_ISR_UIF_Msk) == (BSTIM16_ISR_UIF_Msk)); +} + +/** + * @brief Clear update event interrupt flag + * @rmtoll ISR UIF FL_BSTIM16_ClearFlag_Update + * @param BSTIM16x BSTIM16 instance + * @retval None + */ +__STATIC_INLINE void FL_BSTIM16_ClearFlag_Update(BSTIM16_Type *BSTIM16x) +{ + WRITE_REG(BSTIM16x->ISR, BSTIM16_ISR_UIF_Msk); +} + +/** + * @brief Software update event enable + * @rmtoll EGR UG FL_BSTIM16_GenerateUpdateEvent + * @param BSTIM16x BSTIM16 instance + * @retval None + */ +__STATIC_INLINE void FL_BSTIM16_GenerateUpdateEvent(BSTIM16_Type *BSTIM16x) +{ + SET_BIT(BSTIM16x->EGR, BSTIM16_EGR_UG_Msk); +} + +/** + * @brief Set counter value + * @rmtoll CNT FL_BSTIM16_WriteCounter + * @param BSTIM16x BSTIM16 instance + * @param count + * @retval None + */ +__STATIC_INLINE void FL_BSTIM16_WriteCounter(BSTIM16_Type *BSTIM16x, uint32_t count) +{ + MODIFY_REG(BSTIM16x->CNT, (0xffffU << 0U), (count << 0U)); +} + +/** + * @brief Get counter value + * @rmtoll CNT FL_BSTIM16_ReadCounter + * @param BSTIM16x BSTIM16 instance + * @retval + */ +__STATIC_INLINE uint32_t FL_BSTIM16_ReadCounter(BSTIM16_Type *BSTIM16x) +{ + return (uint32_t)(READ_BIT(BSTIM16x->CNT, 0xffffU) >> 0U); +} + +/** + * @brief Set counter Clock prescaler value + * @rmtoll PSC FL_BSTIM16_WritePrescaler + * @param BSTIM16x BSTIM16 instance + * @param psc + * @retval None + */ +__STATIC_INLINE void FL_BSTIM16_WritePrescaler(BSTIM16_Type *BSTIM16x, uint32_t psc) +{ + MODIFY_REG(BSTIM16x->PSC, (0xffffU << 0U), (psc << 0U)); +} + +/** + * @brief Get counter Clock prescaler value + * @rmtoll PSC FL_BSTIM16_ReadPrescaler + * @param BSTIM16x BSTIM16 instance + * @retval + */ +__STATIC_INLINE uint32_t FL_BSTIM16_ReadPrescaler(BSTIM16_Type *BSTIM16x) +{ + return (uint32_t)(READ_BIT(BSTIM16x->PSC, 0xffffU) >> 0U); +} + +/** + * @brief Set Auto-Reload register value + * @rmtoll ARR FL_BSTIM16_WriteAutoReload + * @param BSTIM16x BSTIM16 instance + * @param value + * @retval None + */ +__STATIC_INLINE void FL_BSTIM16_WriteAutoReload(BSTIM16_Type *BSTIM16x, uint32_t value) +{ + MODIFY_REG(BSTIM16x->ARR, (0xffffU << 0U), (value << 0U)); +} + +/** + * @brief Get Auto-Reload register value + * @rmtoll ARR FL_BSTIM16_ReadAutoReload + * @param BSTIM16x BSTIM16 instance + * @retval + */ +__STATIC_INLINE uint32_t FL_BSTIM16_ReadAutoReload(BSTIM16_Type *BSTIM16x) +{ + return (uint32_t)(READ_BIT(BSTIM16x->ARR, 0xffffU) >> 0U); +} + +/** + * @} + */ + +/** @defgroup BSTIM16_FL_EF_Init Initialization and de-initialization functions + * @{ + */ + +FL_ErrorStatus FL_BSTIM16_DeInit(BSTIM16_Type *BSTIM16x); +FL_ErrorStatus FL_BSTIM16_Init(BSTIM16_Type *BSTIM16x, FL_BSTIM16_InitTypeDef *init); +void FL_BSTIM16_StructInit(FL_BSTIM16_InitTypeDef *init); + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif /* __FM33LG0XX_FL_BSTIM16_H*/ + +/*************************Py_Code_Generator Version: 0.1-0.11-0.1 @ 2020-09-12*************************/ +/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/ diff --git a/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_bstim32.h b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_bstim32.h new file mode 100644 index 0000000..cd7dfd4 --- /dev/null +++ b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_bstim32.h @@ -0,0 +1,509 @@ + /** + ******************************************************************************************************* + * @file fm33lg0xx_fl_bstim32.h + * @author FMSH Application Team + * @brief Head file of BSTIM32 FL Module + ******************************************************************************************************* + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + + + +/* Define to prevent recursive inclusion---------------------------------------------------------------*/ +#ifndef __FM33LG0XX_FL_BSTIM32_H +#define __FM33LG0XX_FL_BSTIM32_H + +#ifdef __cplusplus +extern "C" { +#endif +/* Includes -------------------------------------------------------------------------------------------*/ +#include "fm33lg0xx_fl_def.h" +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @defgroup BSTIM32 BSTIM32 + * @brief BSTIM32 FL driver + * @{ + */ + +/* Exported types -------------------------------------------------------------------------------------*/ +/** @defgroup BSTIM32_FL_ES_INIT BSTIM32 Exported Init structures + * @{ + */ + +/** + * @brief FL BSTIM32 Init Sturcture definition + */ + +typedef struct +{ + /* 时钟源 */ + uint32_t clockSource; + + /* 预分频系数 */ + uint32_t prescaler; + + /* 自动重装载值 */ + uint32_t autoReload; + + /* 自动重装载值 */ + uint32_t autoReloadState; + +} FL_BSTIM32_InitTypeDef; + +/** + * @} + */ +/* Exported constants ---------------------------------------------------------------------------------*/ +/** @defgroup BSTIM32_FL_Exported_Constants BSTIM32 Exported Constants + * @{ + */ + +#define BSTIM32_CR1_ARPE_Pos (7U) +#define BSTIM32_CR1_ARPE_Msk (0x1U << BSTIM32_CR1_ARPE_Pos) +#define BSTIM32_CR1_ARPE BSTIM32_CR1_ARPE_Msk + +#define BSTIM32_CR1_OPM_Pos (3U) +#define BSTIM32_CR1_OPM_Msk (0x1U << BSTIM32_CR1_OPM_Pos) +#define BSTIM32_CR1_OPM BSTIM32_CR1_OPM_Msk + +#define BSTIM32_CR1_URS_Pos (2U) +#define BSTIM32_CR1_URS_Msk (0x1U << BSTIM32_CR1_URS_Pos) +#define BSTIM32_CR1_URS BSTIM32_CR1_URS_Msk + +#define BSTIM32_CR1_UDIS_Pos (1U) +#define BSTIM32_CR1_UDIS_Msk (0x1U << BSTIM32_CR1_UDIS_Pos) +#define BSTIM32_CR1_UDIS BSTIM32_CR1_UDIS_Msk + +#define BSTIM32_CR1_CEN_Pos (0U) +#define BSTIM32_CR1_CEN_Msk (0x1U << BSTIM32_CR1_CEN_Pos) +#define BSTIM32_CR1_CEN BSTIM32_CR1_CEN_Msk + +#define BSTIM32_CR2_MMS_Pos (4U) +#define BSTIM32_CR2_MMS_Msk (0x7U << BSTIM32_CR2_MMS_Pos) +#define BSTIM32_CR2_MMS BSTIM32_CR2_MMS_Msk + +#define BSTIM32_IER_UIE_Pos (0U) +#define BSTIM32_IER_UIE_Msk (0x1U << BSTIM32_IER_UIE_Pos) +#define BSTIM32_IER_UIE BSTIM32_IER_UIE_Msk + +#define BSTIM32_ISR_UIF_Pos (0U) +#define BSTIM32_ISR_UIF_Msk (0x1U << BSTIM32_ISR_UIF_Pos) +#define BSTIM32_ISR_UIF BSTIM32_ISR_UIF_Msk + +#define BSTIM32_EGR_UG_Pos (0U) +#define BSTIM32_EGR_UG_Msk (0x1U << BSTIM32_EGR_UG_Pos) +#define BSTIM32_EGR_UG BSTIM32_EGR_UG_Msk + + + + + + +#define FL_BSTIM32_ONE_PULSE_MODE_CONTINUOUS (0x0U << BSTIM32_CR1_OPM_Pos) +#define FL_BSTIM32_ONE_PULSE_MODE_SINGLE (0x1U << BSTIM32_CR1_OPM_Pos) + + +#define FL_BSTIM32_UPDATE_SOURCE_REGULAR (0x0U << BSTIM32_CR1_URS_Pos) +#define FL_BSTIM32_UPDATE_SOURCE_COUNTER (0x1U << BSTIM32_CR1_URS_Pos) + + +#define FL_BSTIM32_TRGO_UG (0x0U << BSTIM32_CR2_MMS_Pos) +#define FL_BSTIM32_TRGO_ENABLE (0x1U << BSTIM32_CR2_MMS_Pos) +#define FL_BSTIM32_TRGO_UPDATE (0x2U << BSTIM32_CR2_MMS_Pos) + + +/** + * @} + */ +/* Exported functions ---------------------------------------------------------------------------------*/ +/** @defgroup BSTIM32_FL_Exported_Functions BSTIM32 Exported Functions + * @{ + */ + +/** + * @brief Auto-Reload preload enable + * @rmtoll CR1 ARPE FL_BSTIM32_EnableARRPreload + * @param BSTIM32x BSTIM32 instance + * @retval None + */ +__STATIC_INLINE void FL_BSTIM32_EnableARRPreload(BSTIM32_Type *BSTIM32x) +{ + SET_BIT(BSTIM32x->CR1, BSTIM32_CR1_ARPE_Msk); +} + +/** + * @brief Get Auto-Reload preload enable status + * @rmtoll CR1 ARPE FL_BSTIM32_IsEnabledARRPreload + * @param BSTIM32x BSTIM32 instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_BSTIM32_IsEnabledARRPreload(BSTIM32_Type *BSTIM32x) +{ + return (uint32_t)(READ_BIT(BSTIM32x->CR1, BSTIM32_CR1_ARPE_Msk) == BSTIM32_CR1_ARPE_Msk); +} + +/** + * @brief Auto-Reload preload disable + * @rmtoll CR1 ARPE FL_BSTIM32_DisableARRPreload + * @param BSTIM32x BSTIM32 instance + * @retval None + */ +__STATIC_INLINE void FL_BSTIM32_DisableARRPreload(BSTIM32_Type *BSTIM32x) +{ + CLEAR_BIT(BSTIM32x->CR1, BSTIM32_CR1_ARPE_Msk); +} + +/** + * @brief Set one pulse mode + * @rmtoll CR1 OPM FL_BSTIM32_SetOnePulseMode + * @param BSTIM32x BSTIM32 instance + * @param mode This parameter can be one of the following values: + * @arg @ref FL_BSTIM32_ONE_PULSE_MODE_CONTINUOUS + * @arg @ref FL_BSTIM32_ONE_PULSE_MODE_SINGLE + * @retval None + */ +__STATIC_INLINE void FL_BSTIM32_SetOnePulseMode(BSTIM32_Type *BSTIM32x, uint32_t mode) +{ + MODIFY_REG(BSTIM32x->CR1, BSTIM32_CR1_OPM_Msk, mode); +} + +/** + * @brief Get one pulse mode + * @rmtoll CR1 OPM FL_BSTIM32_GetOnePulseMode + * @param BSTIM32x BSTIM32 instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_BSTIM32_ONE_PULSE_MODE_CONTINUOUS + * @arg @ref FL_BSTIM32_ONE_PULSE_MODE_SINGLE + */ +__STATIC_INLINE uint32_t FL_BSTIM32_GetOnePulseMode(BSTIM32_Type *BSTIM32x) +{ + return (uint32_t)(READ_BIT(BSTIM32x->CR1, BSTIM32_CR1_OPM_Msk)); +} + +/** + * @brief Set update request + * @rmtoll CR1 URS FL_BSTIM32_SetUpdateSource + * @param BSTIM32x BSTIM32 instance + * @param source This parameter can be one of the following values: + * @arg @ref FL_BSTIM32_UPDATE_SOURCE_REGULAR + * @arg @ref FL_BSTIM32_UPDATE_SOURCE_COUNTER + * @retval None + */ +__STATIC_INLINE void FL_BSTIM32_SetUpdateSource(BSTIM32_Type *BSTIM32x, uint32_t source) +{ + MODIFY_REG(BSTIM32x->CR1, BSTIM32_CR1_URS_Msk, source); +} + +/** + * @brief Get update request status + * @rmtoll CR1 URS FL_BSTIM32_GetUpdateSource + * @param BSTIM32x BSTIM32 instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_BSTIM32_UPDATE_SOURCE_REGULAR + * @arg @ref FL_BSTIM32_UPDATE_SOURCE_COUNTER + */ +__STATIC_INLINE uint32_t FL_BSTIM32_GetUpdateSource(BSTIM32_Type *BSTIM32x) +{ + return (uint32_t)(READ_BIT(BSTIM32x->CR1, BSTIM32_CR1_URS_Msk)); +} + +/** + * @brief Update event enable + * @rmtoll CR1 UDIS FL_BSTIM32_EnableUpdateEvent + * @param BSTIM32x BSTIM32 instance + * @retval None + */ +__STATIC_INLINE void FL_BSTIM32_EnableUpdateEvent(BSTIM32_Type *BSTIM32x) +{ + CLEAR_BIT(BSTIM32x->CR1, BSTIM32_CR1_UDIS_Msk); +} + +/** + * @brief Get update event disable status + * @rmtoll CR1 UDIS FL_BSTIM32_IsEnabledUpdateEvent + * @param BSTIM32x BSTIM32 instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_BSTIM32_IsEnabledUpdateEvent(BSTIM32_Type *BSTIM32x) +{ + return (uint32_t)!(READ_BIT(BSTIM32x->CR1, BSTIM32_CR1_UDIS_Msk) == BSTIM32_CR1_UDIS_Msk); +} + +/** + * @brief Update event disable + * @rmtoll CR1 UDIS FL_BSTIM32_DisableUpdateEvent + * @param BSTIM32x BSTIM32 instance + * @retval None + */ +__STATIC_INLINE void FL_BSTIM32_DisableUpdateEvent(BSTIM32_Type *BSTIM32x) +{ + SET_BIT(BSTIM32x->CR1, BSTIM32_CR1_UDIS_Msk); +} + +/** + * @brief Counter enable + * @rmtoll CR1 CEN FL_BSTIM32_Enable + * @param BSTIM32x BSTIM32 instance + * @retval None + */ +__STATIC_INLINE void FL_BSTIM32_Enable(BSTIM32_Type *BSTIM32x) +{ + SET_BIT(BSTIM32x->CR1, BSTIM32_CR1_CEN_Msk); +} + +/** + * @brief Get counter enable status + * @rmtoll CR1 CEN FL_BSTIM32_IsEnabled + * @param BSTIM32x BSTIM32 instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_BSTIM32_IsEnabled(BSTIM32_Type *BSTIM32x) +{ + return (uint32_t)(READ_BIT(BSTIM32x->CR1, BSTIM32_CR1_CEN_Msk) == BSTIM32_CR1_CEN_Msk); +} + +/** + * @brief Counter disable + * @rmtoll CR1 CEN FL_BSTIM32_Disable + * @param BSTIM32x BSTIM32 instance + * @retval None + */ +__STATIC_INLINE void FL_BSTIM32_Disable(BSTIM32_Type *BSTIM32x) +{ + CLEAR_BIT(BSTIM32x->CR1, BSTIM32_CR1_CEN_Msk); +} + +/** + * @brief Set master trigger mode + * @rmtoll CR2 MMS FL_BSTIM32_SetTriggerOutput + * @param BSTIM32x BSTIM32 instance + * @param triggerOutput This parameter can be one of the following values: + * @arg @ref FL_BSTIM32_TRGO_UG + * @arg @ref FL_BSTIM32_TRGO_ENABLE + * @arg @ref FL_BSTIM32_TRGO_UPDATE + * @retval None + */ +__STATIC_INLINE void FL_BSTIM32_SetTriggerOutput(BSTIM32_Type *BSTIM32x, uint32_t triggerOutput) +{ + MODIFY_REG(BSTIM32x->CR2, BSTIM32_CR2_MMS_Msk, triggerOutput); +} + +/** + * @brief Get master trigger mode status + * @rmtoll CR2 MMS FL_BSTIM32_GetTriggerOutput + * @param BSTIM32x BSTIM32 instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_BSTIM32_TRGO_UG + * @arg @ref FL_BSTIM32_TRGO_ENABLE + * @arg @ref FL_BSTIM32_TRGO_UPDATE + */ +__STATIC_INLINE uint32_t FL_BSTIM32_GetTriggerOutput(BSTIM32_Type *BSTIM32x) +{ + return (uint32_t)(READ_BIT(BSTIM32x->CR2, BSTIM32_CR2_MMS_Msk)); +} + +/** + * @brief Update event interrupt disable + * @rmtoll IER UIE FL_BSTIM32_DisableIT_Update + * @param BSTIM32x BSTIM32 instance + * @retval None + */ +__STATIC_INLINE void FL_BSTIM32_DisableIT_Update(BSTIM32_Type *BSTIM32x) +{ + CLEAR_BIT(BSTIM32x->IER, BSTIM32_IER_UIE_Msk); +} + +/** + * @brief Update event interrupt enable + * @rmtoll IER UIE FL_BSTIM32_EnableIT_Update + * @param BSTIM32x BSTIM32 instance + * @retval None + */ +__STATIC_INLINE void FL_BSTIM32_EnableIT_Update(BSTIM32_Type *BSTIM32x) +{ + SET_BIT(BSTIM32x->IER, BSTIM32_IER_UIE_Msk); +} + +/** + * @brief Get update event interrupt enable status + * @rmtoll IER UIE FL_BSTIM32_IsEnabledIT_Update + * @param BSTIM32x BSTIM32 instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_BSTIM32_IsEnabledIT_Update(BSTIM32_Type *BSTIM32x) +{ + return (uint32_t)(READ_BIT(BSTIM32x->IER, BSTIM32_IER_UIE_Msk) == BSTIM32_IER_UIE_Msk); +} + +/** + * @brief Get update event interrupt flag + * @rmtoll ISR UIF FL_BSTIM32_IsActiveFlag_Update + * @param BSTIM32x BSTIM32 instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_BSTIM32_IsActiveFlag_Update(BSTIM32_Type *BSTIM32x) +{ + return (uint32_t)(READ_BIT(BSTIM32x->ISR, BSTIM32_ISR_UIF_Msk) == (BSTIM32_ISR_UIF_Msk)); +} + +/** + * @brief Clear update event interrupt flag + * @rmtoll ISR UIF FL_BSTIM32_ClearFlag_Update + * @param BSTIM32x BSTIM32 instance + * @retval None + */ +__STATIC_INLINE void FL_BSTIM32_ClearFlag_Update(BSTIM32_Type *BSTIM32x) +{ + WRITE_REG(BSTIM32x->ISR, BSTIM32_ISR_UIF_Msk); +} + +/** + * @brief Software update event enable + * @rmtoll EGR UG FL_BSTIM32_GenerateUpdateEvent + * @param BSTIM32x BSTIM32 instance + * @retval None + */ +__STATIC_INLINE void FL_BSTIM32_GenerateUpdateEvent(BSTIM32_Type *BSTIM32x) +{ + SET_BIT(BSTIM32x->EGR, BSTIM32_EGR_UG_Msk); +} + +/** + * @brief Set counter value + * @rmtoll CNT FL_BSTIM32_WriteCounter + * @param BSTIM32x BSTIM32 instance + * @param count + * @retval None + */ +__STATIC_INLINE void FL_BSTIM32_WriteCounter(BSTIM32_Type *BSTIM32x, uint32_t count) +{ + MODIFY_REG(BSTIM32x->CNT, (0xffffffffU << 0U), (count << 0U)); +} + +/** + * @brief Get counter value + * @rmtoll CNT FL_BSTIM32_ReadCounter + * @param BSTIM32x BSTIM32 instance + * @retval + */ +__STATIC_INLINE uint32_t FL_BSTIM32_ReadCounter(BSTIM32_Type *BSTIM32x) +{ + return (uint32_t)(READ_BIT(BSTIM32x->CNT, 0xffffffffU) >> 0U); +} + +/** + * @brief Set counter Clock prescaler value + * @rmtoll PSC FL_BSTIM32_WritePrescaler + * @param BSTIM32x BSTIM32 instance + * @param psc + * @retval None + */ +__STATIC_INLINE void FL_BSTIM32_WritePrescaler(BSTIM32_Type *BSTIM32x, uint32_t psc) +{ + MODIFY_REG(BSTIM32x->PSC, (0xffffffffU << 0U), (psc << 0U)); +} + +/** + * @brief Get counter Clock prescaler value + * @rmtoll PSC FL_BSTIM32_ReadPrescaler + * @param BSTIM32x BSTIM32 instance + * @retval + */ +__STATIC_INLINE uint32_t FL_BSTIM32_ReadPrescaler(BSTIM32_Type *BSTIM32x) +{ + return (uint32_t)(READ_BIT(BSTIM32x->PSC, 0xffffffffU) >> 0U); +} + +/** + * @brief Set Auto-Reload register value + * @rmtoll ARR FL_BSTIM32_WriteAutoReload + * @param BSTIM32x BSTIM32 instance + * @param value + * @retval None + */ +__STATIC_INLINE void FL_BSTIM32_WriteAutoReload(BSTIM32_Type *BSTIM32x, uint32_t value) +{ + MODIFY_REG(BSTIM32x->ARR, (0xffffffffU << 0U), (value << 0U)); +} + +/** + * @brief Get Auto-Reload register value + * @rmtoll ARR FL_BSTIM32_ReadAutoReload + * @param BSTIM32x BSTIM32 instance + * @retval + */ +__STATIC_INLINE uint32_t FL_BSTIM32_ReadAutoReload(BSTIM32_Type *BSTIM32x) +{ + return (uint32_t)(READ_BIT(BSTIM32x->ARR, 0xffffffffU) >> 0U); +} + +/** + * @} + */ + +/** @defgroup BSTIM32_FL_EF_Init Initialization and de-initialization functions + * @{ + */ + +FL_ErrorStatus FL_BSTIM32_DeInit(BSTIM32_Type *BSTIM32x); +FL_ErrorStatus FL_BSTIM32_Init(BSTIM32_Type *BSTIM32x, FL_BSTIM32_InitTypeDef *init); +void FL_BSTIM32_StructInit(FL_BSTIM32_InitTypeDef *init); + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif /* __FM33LG0XX_FL_BSTIM32_H*/ + +/*************************Py_Code_Generator Version: 0.1-0.11-0.1 @ 2020-09-12*************************/ +/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/ diff --git a/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_can.h b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_can.h new file mode 100644 index 0000000..70e8e7f --- /dev/null +++ b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_can.h @@ -0,0 +1,2240 @@ + /** + ******************************************************************************************************* + * @file fm33lg0xx_fl_can.h + * @author FMSH Application Team + * @brief Head file of CAN FL Module + ******************************************************************************************************* + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + + + +/* Define to prevent recursive inclusion---------------------------------------------------------------*/ +#ifndef __FM33LG0XX_FL_CAN_H +#define __FM33LG0XX_FL_CAN_H + +#ifdef __cplusplus +extern "C" { +#endif +/* Includes -------------------------------------------------------------------------------------------*/ +#include "fm33lg0xx_fl_def.h" +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @defgroup CAN CAN + * @brief CAN FL driver + * @{ + */ + +/* Exported types -------------------------------------------------------------------------------------*/ +/** @defgroup CAN_FL_ES_INIT CAN Exported Init structures + * @{ + */ + +/** + * @brief FL CAN Init Sturcture definition + */ +typedef struct +{ + /*工作模式*/ + uint8_t mode; + /*同步段长度*/ + uint8_t SJW; + /*时间段1*/ + uint8_t TS1; + /*时间段2*/ + uint8_t TS2; + /*波特率预分频*/ + uint8_t BRP; + /*时钟源选择*/ + uint8_t clockSource; + +} FL_CAN_InitTypeDef; + +/** + * @brief CAN filter init structure definition + */ +typedef struct +{ + + /*滤波器SRR位*/ + uint32_t filterIdSRR; + /*滤波器IDE位*/ + uint32_t filterIdIDE; + /*滤波器RTR位*/ + uint32_t filterIdRTR; + /*滤波器使能*/ + uint32_t filterEn; + /*滤波器标准ID*/ + uint32_t filterIdStandard; + /*滤波器扩展ID*/ + uint32_t filterIdExtend; + /*滤波器ID高11位掩码*/ + uint32_t filterMaskIdHigh; + /*滤波器SRR位掩码*/ + uint32_t filterMaskIdSRR; + /*滤波器IDE位掩码*/ + uint32_t filterMaskIdIDE; + /*滤波器ID低18位掩码*/ + uint32_t filterMaskIdLow; + /*滤波器RTR位掩码*/ + uint32_t filterMaskIdRTR; + +} FL_CAN_FilterInitTypeDef; + + +/** + * @} + */ +/* Exported constants ---------------------------------------------------------------------------------*/ +/** @defgroup CAN_FL_Exported_Constants CAN Exported Constants + * @{ + */ + +#define CAN_CR_CEN_Pos (1U) +#define CAN_CR_CEN_Msk (0x1U << CAN_CR_CEN_Pos) +#define CAN_CR_CEN CAN_CR_CEN_Msk + +#define CAN_CR_SRST_Pos (0U) +#define CAN_CR_SRST_Msk (0x1U << CAN_CR_SRST_Pos) +#define CAN_CR_SRST CAN_CR_SRST_Msk + +#define CAN_MSR_LPBACK_Pos (1U) +#define CAN_MSR_LPBACK_Msk (0x1U << CAN_MSR_LPBACK_Pos) +#define CAN_MSR_LPBACK CAN_MSR_LPBACK_Msk + +#define CAN_BRPR_BRP_Pos (0U) +#define CAN_BRPR_BRP_Msk (0xffU << CAN_BRPR_BRP_Pos) +#define CAN_BRPR_BRP CAN_BRPR_BRP_Msk + +#define CAN_BTR_SJW_Pos (7U) +#define CAN_BTR_SJW_Msk (0x3U << CAN_BTR_SJW_Pos) +#define CAN_BTR_SJW CAN_BTR_SJW_Msk + +#define CAN_BTR_TS2_Pos (4U) +#define CAN_BTR_TS2_Msk (0x7U << CAN_BTR_TS2_Pos) +#define CAN_BTR_TS2 CAN_BTR_TS2_Msk + +#define CAN_BTR_TS1_Pos (0U) +#define CAN_BTR_TS1_Msk (0xfU << CAN_BTR_TS1_Pos) +#define CAN_BTR_TS1 CAN_BTR_TS1_Msk + +#define CAN_ECR_REC_Pos (8U) +#define CAN_ECR_REC_Msk (0xffU << CAN_ECR_REC_Pos) +#define CAN_ECR_REC CAN_ECR_REC_Msk + +#define CAN_ECR_TEC_Pos (0U) +#define CAN_ECR_TEC_Msk (0xffU << CAN_ECR_TEC_Pos) +#define CAN_ECR_TEC CAN_ECR_TEC_Msk + +#define CAN_ESR_ACKER_Pos (4U) +#define CAN_ESR_ACKER_Msk (0x1U << CAN_ESR_ACKER_Pos) +#define CAN_ESR_ACKER CAN_ESR_ACKER_Msk + +#define CAN_ESR_BERR_Pos (3U) +#define CAN_ESR_BERR_Msk (0x1U << CAN_ESR_BERR_Pos) +#define CAN_ESR_BERR CAN_ESR_BERR_Msk + +#define CAN_ESR_STER_Pos (2U) +#define CAN_ESR_STER_Msk (0x1U << CAN_ESR_STER_Pos) +#define CAN_ESR_STER CAN_ESR_STER_Msk + +#define CAN_ESR_FMER_Pos (1U) +#define CAN_ESR_FMER_Msk (0x1U << CAN_ESR_FMER_Pos) +#define CAN_ESR_FMER CAN_ESR_FMER_Msk + +#define CAN_ESR_CRCER_Pos (0U) +#define CAN_ESR_CRCER_Msk (0x1U << CAN_ESR_CRCER_Pos) +#define CAN_ESR_CRCER CAN_ESR_CRCER_Msk + +#define CAN_SR_ACFBSY_Pos (11U) +#define CAN_SR_ACFBSY_Msk (0x1U << CAN_SR_ACFBSY_Pos) +#define CAN_SR_ACFBSY CAN_SR_ACFBSY_Msk + +#define CAN_SR_TXFLL_Pos (10U) +#define CAN_SR_TXFLL_Msk (0x1U << CAN_SR_TXFLL_Pos) +#define CAN_SR_TXFLL CAN_SR_TXFLL_Msk + +#define CAN_SR_TXBFLL_Pos (9U) +#define CAN_SR_TXBFLL_Msk (0x1U << CAN_SR_TXBFLL_Pos) +#define CAN_SR_TXBFLL CAN_SR_TXBFLL_Msk + +#define CAN_SR_ESTAT_Pos (7U) +#define CAN_SR_ESTAT_Msk (0x3U << CAN_SR_ESTAT_Pos) +#define CAN_SR_ESTAT CAN_SR_ESTAT_Msk + +#define CAN_SR_ERRWRN_Pos (6U) +#define CAN_SR_ERRWRN_Msk (0x1U << CAN_SR_ERRWRN_Pos) +#define CAN_SR_ERRWRN CAN_SR_ERRWRN_Msk + +#define CAN_SR_BBSY_Pos (5U) +#define CAN_SR_BBSY_Msk (0x1U << CAN_SR_BBSY_Pos) +#define CAN_SR_BBSY CAN_SR_BBSY_Msk + +#define CAN_SR_BIDLE_Pos (4U) +#define CAN_SR_BIDLE_Msk (0x1U << CAN_SR_BIDLE_Pos) +#define CAN_SR_BIDLE CAN_SR_BIDLE_Msk + +#define CAN_SR_NORMAL_Pos (3U) +#define CAN_SR_NORMAL_Msk (0x1U << CAN_SR_NORMAL_Pos) +#define CAN_SR_NORMAL CAN_SR_NORMAL_Msk + +#define CAN_SR_LBACK_Pos (1U) +#define CAN_SR_LBACK_Msk (0x1U << CAN_SR_LBACK_Pos) +#define CAN_SR_LBACK CAN_SR_LBACK_Msk + +#define CAN_SR_CONFIG_Pos (0U) +#define CAN_SR_CONFIG_Msk (0x1U << CAN_SR_CONFIG_Pos) +#define CAN_SR_CONFIG CAN_SR_CONFIG_Msk + +#define CAN_ISR_BSOFF_Pos (9U) +#define CAN_ISR_BSOFF_Msk (0x1U << CAN_ISR_BSOFF_Pos) +#define CAN_ISR_BSOFF CAN_ISR_BSOFF_Msk + +#define CAN_ISR_ERROR_Pos (8U) +#define CAN_ISR_ERROR_Msk (0x1U << CAN_ISR_ERROR_Pos) +#define CAN_ISR_ERROR CAN_ISR_ERROR_Msk + +#define CAN_ISR_RXNEMP_Pos (7U) +#define CAN_ISR_RXNEMP_Msk (0x1U << CAN_ISR_RXNEMP_Pos) +#define CAN_ISR_RXNEMP CAN_ISR_RXNEMP_Msk + +#define CAN_ISR_RXOFLW_Pos (6U) +#define CAN_ISR_RXOFLW_Msk (0x1U << CAN_ISR_RXOFLW_Pos) +#define CAN_ISR_RXOFLW CAN_ISR_RXOFLW_Msk + +#define CAN_ISR_RXUFLW_Pos (5U) +#define CAN_ISR_RXUFLW_Msk (0x1U << CAN_ISR_RXUFLW_Pos) +#define CAN_ISR_RXUFLW CAN_ISR_RXUFLW_Msk + +#define CAN_ISR_RXOK_Pos (4U) +#define CAN_ISR_RXOK_Msk (0x1U << CAN_ISR_RXOK_Pos) +#define CAN_ISR_RXOK CAN_ISR_RXOK_Msk + +#define CAN_ISR_TXBFLL_Pos (3U) +#define CAN_ISR_TXBFLL_Msk (0x1U << CAN_ISR_TXBFLL_Pos) +#define CAN_ISR_TXBFLL CAN_ISR_TXBFLL_Msk + +#define CAN_ISR_TXFLL_Pos (2U) +#define CAN_ISR_TXFLL_Msk (0x1U << CAN_ISR_TXFLL_Pos) +#define CAN_ISR_TXFLL CAN_ISR_TXFLL_Msk + +#define CAN_ISR_TXOK_Pos (1U) +#define CAN_ISR_TXOK_Msk (0x1U << CAN_ISR_TXOK_Pos) +#define CAN_ISR_TXOK CAN_ISR_TXOK_Msk + +#define CAN_ISR_ARBLST_Pos (0U) +#define CAN_ISR_ARBLST_Msk (0x1U << CAN_ISR_ARBLST_Pos) +#define CAN_ISR_ARBLST CAN_ISR_ARBLST_Msk + +#define CAN_IER_BSOFFIE_Pos (9U) +#define CAN_IER_BSOFFIE_Msk (0x1U << CAN_IER_BSOFFIE_Pos) +#define CAN_IER_BSOFFIE CAN_IER_BSOFFIE_Msk + +#define CAN_IER_ERRORIE_Pos (8U) +#define CAN_IER_ERRORIE_Msk (0x1U << CAN_IER_ERRORIE_Pos) +#define CAN_IER_ERRORIE CAN_IER_ERRORIE_Msk + +#define CAN_IER_RXNEMPIE_Pos (7U) +#define CAN_IER_RXNEMPIE_Msk (0x1U << CAN_IER_RXNEMPIE_Pos) +#define CAN_IER_RXNEMPIE CAN_IER_RXNEMPIE_Msk + +#define CAN_IER_RXOFLWIE_Pos (6U) +#define CAN_IER_RXOFLWIE_Msk (0x1U << CAN_IER_RXOFLWIE_Pos) +#define CAN_IER_RXOFLWIE CAN_IER_RXOFLWIE_Msk + +#define CAN_IER_RXUFLWIE_Pos (5U) +#define CAN_IER_RXUFLWIE_Msk (0x1U << CAN_IER_RXUFLWIE_Pos) +#define CAN_IER_RXUFLWIE CAN_IER_RXUFLWIE_Msk + +#define CAN_IER_RXOKIE_Pos (4U) +#define CAN_IER_RXOKIE_Msk (0x1U << CAN_IER_RXOKIE_Pos) +#define CAN_IER_RXOKIE CAN_IER_RXOKIE_Msk + +#define CAN_IER_TXBFLLIE_Pos (3U) +#define CAN_IER_TXBFLLIE_Msk (0x1U << CAN_IER_TXBFLLIE_Pos) +#define CAN_IER_TXBFLLIE CAN_IER_TXBFLLIE_Msk + +#define CAN_IER_TXFLLIE_Pos (2U) +#define CAN_IER_TXFLLIE_Msk (0x1U << CAN_IER_TXFLLIE_Pos) +#define CAN_IER_TXFLLIE CAN_IER_TXFLLIE_Msk + +#define CAN_IER_TXOKIE_Pos (1U) +#define CAN_IER_TXOKIE_Msk (0x1U << CAN_IER_TXOKIE_Pos) +#define CAN_IER_TXOKIE CAN_IER_TXOKIE_Msk + +#define CAN_IER_ARBLSTIE_Pos (0U) +#define CAN_IER_ARBLSTIE_Msk (0x1U << CAN_IER_ARBLSTIE_Pos) +#define CAN_IER_ARBLSTIE CAN_IER_ARBLSTIE_Msk + +#define CAN_ICR_CBSOFF_Pos (9U) +#define CAN_ICR_CBSOFF_Msk (0x1U << CAN_ICR_CBSOFF_Pos) +#define CAN_ICR_CBSOFF CAN_ICR_CBSOFF_Msk + +#define CAN_ICR_CERROR_Pos (8U) +#define CAN_ICR_CERROR_Msk (0x1U << CAN_ICR_CERROR_Pos) +#define CAN_ICR_CERROR CAN_ICR_CERROR_Msk + +#define CAN_ICR_CRXNEMP_Pos (7U) +#define CAN_ICR_CRXNEMP_Msk (0x1U << CAN_ICR_CRXNEMP_Pos) +#define CAN_ICR_CRXNEMP CAN_ICR_CRXNEMP_Msk + +#define CAN_ICR_CRXOFLW_Pos (6U) +#define CAN_ICR_CRXOFLW_Msk (0x1U << CAN_ICR_CRXOFLW_Pos) +#define CAN_ICR_CRXOFLW CAN_ICR_CRXOFLW_Msk + +#define CAN_ICR_CRXUFLW_Pos (5U) +#define CAN_ICR_CRXUFLW_Msk (0x1U << CAN_ICR_CRXUFLW_Pos) +#define CAN_ICR_CRXUFLW CAN_ICR_CRXUFLW_Msk + +#define CAN_ICR_CRXOK_Pos (4U) +#define CAN_ICR_CRXOK_Msk (0x1U << CAN_ICR_CRXOK_Pos) +#define CAN_ICR_CRXOK CAN_ICR_CRXOK_Msk + +#define CAN_ICR_CTXBFLL_Pos (3U) +#define CAN_ICR_CTXBFLL_Msk (0x1U << CAN_ICR_CTXBFLL_Pos) +#define CAN_ICR_CTXBFLL CAN_ICR_CTXBFLL_Msk + +#define CAN_ICR_CTXFLL_Pos (2U) +#define CAN_ICR_CTXFLL_Msk (0x1U << CAN_ICR_CTXFLL_Pos) +#define CAN_ICR_CTXFLL CAN_ICR_CTXFLL_Msk + +#define CAN_ICR_CTXOK_Pos (1U) +#define CAN_ICR_CTXOK_Msk (0x1U << CAN_ICR_CTXOK_Pos) +#define CAN_ICR_CTXOK CAN_ICR_CTXOK_Msk + +#define CAN_ICR_CARBLST_Pos (0U) +#define CAN_ICR_CARBLST_Msk (0x1U << CAN_ICR_CARBLST_Pos) +#define CAN_ICR_CARBLST CAN_ICR_CARBLST_Msk + +#define CAN_TXFIDR_IDR_Pos (0U) +#define CAN_TXFIDR_IDR_Msk (0xffffffffU << CAN_TXFIDR_IDR_Pos) +#define CAN_TXFIDR_IDR CAN_TXFIDR_IDR_Msk + +#define CAN_TXFDLCR_DLC_Pos (0U) +#define CAN_TXFDLCR_DLC_Msk (0xfU << CAN_TXFDLCR_DLC_Pos) +#define CAN_TXFDLCR_DLC CAN_TXFDLCR_DLC_Msk + +#define CAN_TXFDW1R_DB_Pos (0U) +#define CAN_TXFDW1R_DB_Msk (0xffffffffU << CAN_TXFDW1R_DB_Pos) +#define CAN_TXFDW1R_DB CAN_TXFDW1R_DB_Msk + +#define CAN_TXFDW2R_DB_Pos (0U) +#define CAN_TXFDW2R_DB_Msk (0xffffffffU << CAN_TXFDW2R_DB_Pos) +#define CAN_TXFDW2R_DB CAN_TXFDW2R_DB_Msk + +#define CAN_HPBIDR_IDR_Pos (0U) +#define CAN_HPBIDR_IDR_Msk (0xffffffffU << CAN_HPBIDR_IDR_Pos) +#define CAN_HPBIDR_IDR CAN_HPBIDR_IDR_Msk + +#define CAN_HPBDLCR_DLC_Pos (0U) +#define CAN_HPBDLCR_DLC_Msk (0xfU << CAN_HPBDLCR_DLC_Pos) +#define CAN_HPBDLCR_DLC CAN_HPBDLCR_DLC_Msk + +#define CAN_HPBDW1R_DB_Pos (0U) +#define CAN_HPBDW1R_DB_Msk (0xffffffffU << CAN_HPBDW1R_DB_Pos) +#define CAN_HPBDW1R_DB CAN_HPBDW1R_DB_Msk + +#define CAN_HPBDW2R_DB_Pos (0U) +#define CAN_HPBDW2R_DB_Msk (0xffffffffU << CAN_HPBDW2R_DB_Pos) +#define CAN_HPBDW2R_DB CAN_HPBDW2R_DB_Msk + +#define CAN_RXFIDR_IDR_Pos (0U) +#define CAN_RXFIDR_IDR_Msk (0xffffffffU << CAN_RXFIDR_IDR_Pos) +#define CAN_RXFIDR_IDR CAN_RXFIDR_IDR_Msk + +#define CAN_RXFDLCR_DLC_Pos (0U) +#define CAN_RXFDLCR_DLC_Msk (0xfU << CAN_RXFDLCR_DLC_Pos) +#define CAN_RXFDLCR_DLC CAN_RXFDLCR_DLC_Msk + +#define CAN_RXFDW1R_DB_Pos (0U) +#define CAN_RXFDW1R_DB_Msk (0xffffffffU << CAN_RXFDW1R_DB_Pos) +#define CAN_RXFDW1R_DB CAN_RXFDW1R_DB_Msk + +#define CAN_RXFDW2R_DB_Pos (0U) +#define CAN_RXFDW2R_DB_Msk (0xffffffffU << CAN_RXFDW2R_DB_Pos) +#define CAN_RXFDW2R_DB CAN_RXFDW2R_DB_Msk + +#define CAN_AFR_UAF_Pos (0U) +#define CAN_AFR_UAF_Msk (0xfU << CAN_AFR_UAF_Pos) +#define CAN_AFR_UAF CAN_AFR_UAF_Msk + +#define CAN_AFMR_AMRTR_Pos (31U) +#define CAN_AFMR_AMRTR_Msk (0x1U << CAN_AFMR_AMRTR_Pos) +#define CAN_AFMR_AMRTR CAN_AFMR_AMRTR_Msk + +#define CAN_AFMR_AMID18_Pos (13U) +#define CAN_AFMR_AMID18_Msk (0x3ffffU << CAN_AFMR_AMID18_Pos) +#define CAN_AFMR_AMID18 CAN_AFMR_AMID18_Msk + +#define CAN_AFMR_AMIDE_Pos (12U) +#define CAN_AFMR_AMIDE_Msk (0x1U << CAN_AFMR_AMIDE_Pos) +#define CAN_AFMR_AMIDE CAN_AFMR_AMIDE_Msk + +#define CAN_AFMR_AMSRR_Pos (11U) +#define CAN_AFMR_AMSRR_Msk (0x1U << CAN_AFMR_AMSRR_Pos) +#define CAN_AFMR_AMSRR CAN_AFMR_AMSRR_Msk + +#define CAN_AFMR_AMID11_Pos (0U) +#define CAN_AFMR_AMID11_Msk (0x7ffU << CAN_AFMR_AMID11_Pos) +#define CAN_AFMR_AMID11 CAN_AFMR_AMID11_Msk + +#define CAN_AFIR_AIRTR_Pos (31U) +#define CAN_AFIR_AIRTR_Msk (0x1U << CAN_AFIR_AIRTR_Pos) +#define CAN_AFIR_AIRTR CAN_AFIR_AIRTR_Msk + +#define CAN_AFIR_AIID18_Pos (13U) +#define CAN_AFIR_AIID18_Msk (0x3ffffU << CAN_AFIR_AIID18_Pos) +#define CAN_AFIR_AIID18 CAN_AFIR_AIID18_Msk + +#define CAN_AFIR_AIIDE_Pos (12U) +#define CAN_AFIR_AIIDE_Msk (0x1U << CAN_AFIR_AIIDE_Pos) +#define CAN_AFIR_AIIDE CAN_AFIR_AIIDE_Msk + +#define CAN_AFIR_AISRR_Pos (11U) +#define CAN_AFIR_AISRR_Msk (0x1U << CAN_AFIR_AISRR_Pos) +#define CAN_AFIR_AISRR CAN_AFIR_AISRR_Msk + +#define CAN_AFIR_AIID11_Pos (0U) +#define CAN_AFIR_AIID11_Msk (0x7ffU << CAN_AFIR_AIID11_Pos) +#define CAN_AFIR_AIID11 CAN_AFIR_AIID11_Msk + + + +#define FL_CAN_ERROR_STATUS_CONFIG (0x0U << CAN_SR_ESTAT_Pos) +#define FL_CAN_ERROR_STATUS_ACTIVE (0x1U << CAN_SR_ESTAT_Pos) +#define FL_CAN_ERROR_STATUS_BUSOFF (0x2U << CAN_SR_ESTAT_Pos) +#define FL_CAN_ERROR_STATUS_PASSIVE (0x3U << CAN_SR_ESTAT_Pos) + + +#define FL_CAN_RTR_BIT_LOW (0x0U << CAN_AFIR_AIRTR_Pos) +#define FL_CAN_RTR_BIT_HIGH (0x1U << CAN_AFIR_AIRTR_Pos) + + +#define FL_CAN_IDE_BIT_LOW (0x0U << CAN_AFIR_AIIDE_Pos) +#define FL_CAN_IDE_BIT_HIGH (0x1U << CAN_AFIR_AIIDE_Pos) + +#define FL_CAN_SRR_BIT_LOW (0x0U << CAN_AFIR_AISRR_Pos) +#define FL_CAN_SRR_BIT_HIGH (0x1U << CAN_AFIR_AISRR_Pos) + + +#define FL_CAN_SOFTWARE_NO_RESET (0x0U << CAN_CR_SRST_Pos) +#define FL_CAN_SOFTWARE_RESET (0x1U << CAN_CR_SRST_Pos) + + + +#define FL_CAN_TS1_1Tq (0U) +#define FL_CAN_TS1_2Tq (1U) +#define FL_CAN_TS1_3Tq (2U) +#define FL_CAN_TS1_4Tq (3U) +#define FL_CAN_TS1_5Tq (4U) +#define FL_CAN_TS1_6Tq (5U) +#define FL_CAN_TS1_7Tq (6U) +#define FL_CAN_TS1_8Tq (7U) +#define FL_CAN_TS1_9Tq (8U) +#define FL_CAN_TS1_10Tq (9U) +#define FL_CAN_TS1_11Tq (10U) +#define FL_CAN_TS1_12Tq (11U) +#define FL_CAN_TS1_13Tq (12U) +#define FL_CAN_TS1_14Tq (13U) +#define FL_CAN_TS1_15Tq (14U) +#define FL_CAN_TS1_16Tq (15U) + +#define FL_CAN_TS2_1Tq (0U) +#define FL_CAN_TS2_2Tq (1U) +#define FL_CAN_TS2_3Tq (2U) +#define FL_CAN_TS2_4Tq (3U) +#define FL_CAN_TS2_5Tq (4U) +#define FL_CAN_TS2_6Tq (5U) +#define FL_CAN_TS2_7Tq (6U) +#define FL_CAN_TS2_8Tq (7U) + + +#define FL_CAN_SJW_1Tq (0U) +#define FL_CAN_SJW_2Tq (1U) +#define FL_CAN_SJW_3Tq (2U) +#define FL_CAN_SJW_4Tq (3U) + +#define FL_CAN_MODE_NORMAL (0U) +#define FL_CAN_MODE_LOOPBACK (1U) +#define FL_CAN_MODE_CONFIG (2U) + +#define FL_CAN_FIL1_EN (1U << 0U) +#define FL_CAN_FIL2_EN (1U << 1U) +#define FL_CAN_FIL3_EN (1U << 2U) +#define FL_CAN_FIL4_EN (1U << 3U) + +#define FL_CAN_FIL1_MSK (1U << 0U) +#define FL_CAN_FIL2_MSK (1U << 1U) +#define FL_CAN_FIL3_MSK (1U << 2U) +#define FL_CAN_FIL4_MSK (1U << 3U) + + +#define FL_CAN_FILTER1 (0x0U << 0U) +#define FL_CAN_FILTER2 (0x1U << 0U) +#define FL_CAN_FILTER3 (0x2U << 0U) +#define FL_CAN_FILTER4 (0x3U << 0U) + + + +#define FL_CAN_FORMAT_STANDARD_DATA (0U) +#define FL_CAN_FORMAT_STANDARD_REMOTE (1U) +#define FL_CAN_FORMAT_EXTEND_DATA (2U) +#define FL_CAN_FORMAT_EXTEND_REMOTE (3U) + + +#define CAN_TIMEOUT 0xFFFFFU + +/** + * @} + */ +/* Exported functions ---------------------------------------------------------------------------------*/ +/** @defgroup CAN_FL_Exported_Functions CAN Exported Functions + * @{ + */ + +/** + * @brief CAN enable + * @rmtoll CR CEN FL_CAN_Enable + * @param CANx CAN instance + * @retval None + */ +__STATIC_INLINE void FL_CAN_Enable(CAN_Type *CANx) +{ + SET_BIT(CANx->CR, CAN_CR_CEN_Msk); +} + +/** + * @brief Get CAN enable status + * @rmtoll CR CEN FL_CAN_IsEnabled + * @param CANx CAN instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CAN_IsEnabled(CAN_Type *CANx) +{ + return (uint32_t)(READ_BIT(CANx->CR, CAN_CR_CEN_Msk) == CAN_CR_CEN_Msk); +} + +/** + * @brief CAN disable + * @rmtoll CR CEN FL_CAN_Disable + * @param CANx CAN instance + * @retval None + */ +__STATIC_INLINE void FL_CAN_Disable(CAN_Type *CANx) +{ + CLEAR_BIT(CANx->CR, CAN_CR_CEN_Msk); +} + +/** + * @brief Set CAN software reset + * @rmtoll CR SRST FL_CAN_SetSoftwareReset + * @param CANx CAN instance + * @param reset This parameter can be one of the following values: + * @arg @ref FL_CAN_SOFTWARE_NO_RESET + * @arg @ref FL_CAN_SOFTWARE_RESET + * @retval None + */ +__STATIC_INLINE void FL_CAN_SetSoftwareReset(CAN_Type *CANx, uint32_t reset) +{ + MODIFY_REG(CANx->CR, CAN_CR_SRST_Msk, reset); +} + +/** + * @brief Get CAN software reset + * @rmtoll CR SRST FL_CAN_GetSoftwareReset + * @param CANx CAN instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_CAN_SOFTWARE_NO_RESET + * @arg @ref FL_CAN_SOFTWARE_RESET + */ +__STATIC_INLINE uint32_t FL_CAN_GetSoftwareReset(CAN_Type *CANx) +{ + return (uint32_t)(READ_BIT(CANx->CR, CAN_CR_SRST_Msk)); +} + +/** + * @brief Enable loop back mode + * @rmtoll MSR LPBACK FL_CAN_EnableLoopBackMode + * @param CANx CAN instance + * @retval None + */ +__STATIC_INLINE void FL_CAN_EnableLoopBackMode(CAN_Type *CANx) +{ + SET_BIT(CANx->MSR, CAN_MSR_LPBACK_Msk); +} +/** + * @brief CAN disable + * @rmtoll CR CEN FL_CAN_Disable + * @param CANx CAN instance + * @retval None + */ +__STATIC_INLINE void FL_CAN_DisableLoopBackMode(CAN_Type *CANx) +{ + CLEAR_BIT(CANx->MSR, CAN_MSR_LPBACK_Msk); +} +/** + * @brief Get loop back mode Enable Status + * @rmtoll MSR LPBACK FL_CAN_IsEnabledLoopBackMode + * @param CANx CAN instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CAN_IsEnabledLoopBackMode(CAN_Type *CANx) +{ + return (uint32_t)(READ_BIT(CANx->MSR, CAN_MSR_LPBACK_Msk) == CAN_MSR_LPBACK_Msk); +} + +/** + * @brief Set baud rate prescaler + * @rmtoll BRPR BRP FL_CAN_WriteBaudRatePrescaler + * @param CANx CAN instance + * @param psc + * @retval None + */ +__STATIC_INLINE void FL_CAN_WriteBaudRatePrescaler(CAN_Type *CANx, uint32_t psc) +{ + MODIFY_REG(CANx->BRPR, CAN_BRPR_BRP_Msk, (psc << CAN_BRPR_BRP_Pos)); +} + +/** + * @brief Get baud rate prescaler + * @rmtoll BRPR BRP FL_CAN_ReadBaudRatePrescaler + * @param CANx CAN instance + * @retval + */ +__STATIC_INLINE uint32_t FL_CAN_ReadBaudRatePrescaler(CAN_Type *CANx) +{ + return (uint32_t)(READ_BIT(CANx->BRPR, CAN_BRPR_BRP_Msk) >> CAN_BRPR_BRP_Pos); +} + +/** + * @brief Set synchronization jump width + * @rmtoll BTR SJW FL_CAN_WriteSyncJumpWidth + * @param CANx CAN instance + * @param width + * @retval None + */ +__STATIC_INLINE void FL_CAN_WriteSyncJumpWidth(CAN_Type *CANx, uint32_t width) +{ + MODIFY_REG(CANx->BTR, CAN_BTR_SJW_Msk, (width << CAN_BTR_SJW_Pos)); +} + +/** + * @brief Get synchronization jump width + * @rmtoll BTR SJW FL_CAN_ReadSyncJumpWidth + * @param CANx CAN instance + * @retval + */ +__STATIC_INLINE uint32_t FL_CAN_ReadSyncJumpWidth(CAN_Type *CANx) +{ + return (uint32_t)(READ_BIT(CANx->BTR, CAN_BTR_SJW_Msk) >> CAN_BTR_SJW_Pos); +} + +/** + * @brief Set time segment2 length + * @rmtoll BTR TS2 FL_CAN_WriteTimeSegment2Length + * @param CANx CAN instance + * @param length + * @retval None + */ +__STATIC_INLINE void FL_CAN_WriteTimeSegment2Length(CAN_Type *CANx, uint32_t length) +{ + MODIFY_REG(CANx->BTR, CAN_BTR_TS2_Msk, (length << CAN_BTR_TS2_Pos)); +} + +/** + * @brief Get time segment2 length + * @rmtoll BTR TS2 FL_CAN_ReadTimeSegment2Length + * @param CANx CAN instance + * @retval + */ +__STATIC_INLINE uint32_t FL_CAN_ReadTimeSegment2Length(CAN_Type *CANx) +{ + return (uint32_t)(READ_BIT(CANx->BTR, CAN_BTR_TS2_Msk) >> CAN_BTR_TS2_Pos); +} + +/** + * @brief Set time segment2 length + * @rmtoll BTR TS1 FL_CAN_WriteTimeSegment1Length + * @param CANx CAN instance + * @param length + * @retval None + */ +__STATIC_INLINE void FL_CAN_WriteTimeSegment1Length(CAN_Type *CANx, uint32_t length) +{ + MODIFY_REG(CANx->BTR, CAN_BTR_TS1_Msk, (length << CAN_BTR_TS1_Pos)); +} + +/** + * @brief Get time segment2 length + * @rmtoll BTR TS1 FL_CAN_ReadTimeSegment1Length + * @param CANx CAN instance + * @retval + */ +__STATIC_INLINE uint32_t FL_CAN_ReadTimeSegment1Length(CAN_Type *CANx) +{ + return (uint32_t)(READ_BIT(CANx->BTR, CAN_BTR_TS1_Msk) >> CAN_BTR_TS1_Pos); +} + +/** + * @brief Get receive error number + * @rmtoll ECR REC FL_CAN_ReadRXErrorCount + * @param CANx CAN instance + * @retval + */ +__STATIC_INLINE uint32_t FL_CAN_ReadRXErrorCount(CAN_Type *CANx) +{ + return (uint32_t)(READ_BIT(CANx->ECR, CAN_ECR_REC_Msk) >> CAN_ECR_REC_Pos); +} + +/** + * @brief Get transmit error number + * @rmtoll ECR TEC FL_CAN_ReadTXErrorCount + * @param CANx CAN instance + * @retval + */ +__STATIC_INLINE uint32_t FL_CAN_ReadTXErrorCount(CAN_Type *CANx) +{ + return (uint32_t)(READ_BIT(CANx->ECR, CAN_ECR_TEC_Msk) >> CAN_ECR_TEC_Pos); +} + +/** + * @brief Get ACK error flag + * @rmtoll ESR ACKER FL_CAN_IsActiveFlag_AckError + * @param CANx CAN instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CAN_IsActiveFlag_AckError(CAN_Type *CANx) +{ + return (uint32_t)(READ_BIT(CANx->ESR, CAN_ESR_ACKER_Msk) == (CAN_ESR_ACKER_Msk)); +} + +/** + * @brief Clear ACK error flag + * @rmtoll ESR ACKER FL_CAN_ClearFlag_AckError + * @param CANx CAN instance + * @retval None + */ +__STATIC_INLINE void FL_CAN_ClearFlag_AckError(CAN_Type *CANx) +{ + WRITE_REG(CANx->ESR, CAN_ESR_ACKER_Msk); +} + +/** + * @brief Get receive bit error flag + * @rmtoll ESR BERR FL_CAN_IsActiveFlag_BitError + * @param CANx CAN instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CAN_IsActiveFlag_BitError(CAN_Type *CANx) +{ + return (uint32_t)(READ_BIT(CANx->ESR, CAN_ESR_BERR_Msk) == (CAN_ESR_BERR_Msk)); +} + +/** + * @brief Clear receive bit error flag + * @rmtoll ESR BERR FL_CAN_ClearFlag_BitError + * @param CANx CAN instance + * @retval None + */ +__STATIC_INLINE void FL_CAN_ClearFlag_BitError(CAN_Type *CANx) +{ + WRITE_REG(CANx->ESR, CAN_ESR_BERR_Msk); +} + +/** + * @brief Get stuffing error flag + * @rmtoll ESR STER FL_CAN_IsActiveFlag_StuffError + * @param CANx CAN instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CAN_IsActiveFlag_StuffError(CAN_Type *CANx) +{ + return (uint32_t)(READ_BIT(CANx->ESR, CAN_ESR_STER_Msk) == (CAN_ESR_STER_Msk)); +} + +/** + * @brief Clear stuffing error flag + * @rmtoll ESR STER FL_CAN_ClearFlag_StuffError + * @param CANx CAN instance + * @retval None + */ +__STATIC_INLINE void FL_CAN_ClearFlag_StuffError(CAN_Type *CANx) +{ + WRITE_REG(CANx->ESR, CAN_ESR_STER_Msk); +} + +/** + * @brief Get form error flag + * @rmtoll ESR FMER FL_CAN_IsActiveFlag_FormatError + * @param CANx CAN instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CAN_IsActiveFlag_FormatError(CAN_Type *CANx) +{ + return (uint32_t)(READ_BIT(CANx->ESR, CAN_ESR_FMER_Msk) == (CAN_ESR_FMER_Msk)); +} + +/** + * @brief Clear form error flag + * @rmtoll ESR FMER FL_CAN_ClearFlag_FormatError + * @param CANx CAN instance + * @retval None + */ +__STATIC_INLINE void FL_CAN_ClearFlag_FormatError(CAN_Type *CANx) +{ + WRITE_REG(CANx->ESR, CAN_ESR_FMER_Msk); +} + +/** + * @brief Get CRC error fiag + * @rmtoll ESR CRCER FL_CAN_IsActiveFlag_CRCError + * @param CANx CAN instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CAN_IsActiveFlag_CRCError(CAN_Type *CANx) +{ + return (uint32_t)(READ_BIT(CANx->ESR, CAN_ESR_CRCER_Msk) == (CAN_ESR_CRCER_Msk)); +} + +/** + * @brief Clear CRC error flag + * @rmtoll ESR CRCER FL_CAN_ClearFlag_CRCError + * @param CANx CAN instance + * @retval None + */ +__STATIC_INLINE void FL_CAN_ClearFlag_CRCError(CAN_Type *CANx) +{ + WRITE_REG(CANx->ESR, CAN_ESR_CRCER_Msk); +} + +/** + * @brief Get acceptance filter busy flag + * @rmtoll SR ACFBSY FL_CAN_IsActiveFlag_FilterBusy + * @param CANx CAN instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CAN_IsActiveFlag_FilterBusy(CAN_Type *CANx) +{ + return (uint32_t)(READ_BIT(CANx->SR, CAN_SR_ACFBSY_Msk) == (CAN_SR_ACFBSY_Msk)); +} + +/** + * @brief Get transmit FIFO FULL interrupt flag + * @rmtoll SR TXFLL FL_CAN_IsActiveFlag_TXBuffFullSignal + * @param CANx CAN instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CAN_IsActiveFlag_TXBuffFullSignal(CAN_Type* CANx) +{ + return (uint32_t)(READ_BIT(CANx->SR, CAN_SR_TXFLL_Msk) == (CAN_SR_TXFLL_Msk)); +} + +/** + * @brief Get high priority transmit buffer FULL interrupt flag + * @rmtoll SR TXBFLL FL_CAN_IsActiveFlag_TXHighPriorBuffFullSignal + * @param CANx CAN instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CAN_IsActiveFlag_TXHighPriorBuffFullSignal(CAN_Type* CANx) +{ + return (uint32_t)(READ_BIT(CANx->SR, CAN_SR_TXBFLL_Msk) == (CAN_SR_TXBFLL_Msk)); +} + +/** + * @brief Get error status flag + * @rmtoll SR ESTAT FL_CAN_GetErrorStatus + * @param CANx CAN instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_CAN_ERROR_STATUS_CONFIG + * @arg @ref FL_CAN_ERROR_STATUS_ACTIVE + * @arg @ref FL_CAN_ERROR_STATUS_BUSOFF + * @arg @ref FL_CAN_ERROR_STATUS_PASSIVE + */ +__STATIC_INLINE uint32_t FL_CAN_GetErrorStatus(CAN_Type *CANx) +{ + return (uint32_t)(READ_BIT(CANx->SR, CAN_SR_ESTAT_Msk)); +} + +/** + * @brief Get error warning + * @rmtoll SR ERRWRN FL_CAN_IsActiveFlag_ErrorWarning + * @param CANx CAN instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CAN_IsActiveFlag_ErrorWarning(CAN_Type *CANx) +{ + return (uint32_t)(READ_BIT(CANx->SR, CAN_SR_ERRWRN_Msk) == (CAN_SR_ERRWRN_Msk)); +} + +/** + * @brief Get bus busy flag + * @rmtoll SR BBSY FL_CAN_IsActiveFlag_BusBusy + * @param CANx CAN instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CAN_IsActiveFlag_BusBusy(CAN_Type *CANx) +{ + return (uint32_t)(READ_BIT(CANx->SR, CAN_SR_BBSY_Msk) == (CAN_SR_BBSY_Msk)); +} + +/** + * @brief Get bus IDLE flag + * @rmtoll SR BIDLE FL_CAN_IsActiveFlag_BusIdle + * @param CANx CAN instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CAN_IsActiveFlag_BusIdle(CAN_Type *CANx) +{ + return (uint32_t)(READ_BIT(CANx->SR, CAN_SR_BIDLE_Msk) == (CAN_SR_BIDLE_Msk)); +} + +/** + * @brief Get normal mode flag + * @rmtoll SR NORMAL FL_CAN_IsActiveFlag_NormalMode + * @param CANx CAN instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CAN_IsActiveFlag_NormalMode(CAN_Type *CANx) +{ + return (uint32_t)(READ_BIT(CANx->SR, CAN_SR_NORMAL_Msk) == (CAN_SR_NORMAL_Msk)); +} + +/** + * @brief Get loop back mode flag + * @rmtoll SR LBACK FL_CAN_IsActiveFlag_LoopbackMode + * @param CANx CAN instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CAN_IsActiveFlag_LoopbackMode(CAN_Type *CANx) +{ + return (uint32_t)(READ_BIT(CANx->SR, CAN_SR_LBACK_Msk) == (CAN_SR_LBACK_Msk)); +} + +/** + * @brief Get configuration mode flag + * @rmtoll SR CONFIG FL_CAN_IsActiveFlag_ConfigMode + * @param CANx CAN instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CAN_IsActiveFlag_ConfigMode(CAN_Type *CANx) +{ + return (uint32_t)(READ_BIT(CANx->SR, CAN_SR_CONFIG_Msk) == (CAN_SR_CONFIG_Msk)); +} + +/** + * @brief Get bus off interrupt flag + * @rmtoll ISR BSOFF FL_CAN_IsActiveFlag_BusOff + * @param CANx CAN instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CAN_IsActiveFlag_BusOff(CAN_Type *CANx) +{ + return (uint32_t)(READ_BIT(CANx->ISR, CAN_ISR_BSOFF_Msk) == (CAN_ISR_BSOFF_Msk)); +} + +/** + * @brief Get error interrupt flag + * @rmtoll ISR ERROR FL_CAN_IsActiveFlag_Error + * @param CANx CAN instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CAN_IsActiveFlag_Error(CAN_Type *CANx) +{ + return (uint32_t)(READ_BIT(CANx->ISR, CAN_ISR_ERROR_Msk) == (CAN_ISR_ERROR_Msk)); +} + +/** + * @brief Get receive FIFO not empty interrupt flag + * @rmtoll ISR RXNEMP FL_CAN_IsActiveFlag_RXNotEmpty + * @param CANx CAN instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CAN_IsActiveFlag_RXNotEmpty(CAN_Type *CANx) +{ + return (uint32_t)(READ_BIT(CANx->ISR, CAN_ISR_RXNEMP_Msk) == (CAN_ISR_RXNEMP_Msk)); +} + +/** + * @brief Get receive FIFO overflow interrupt flag + * @rmtoll ISR RXOFLW FL_CAN_IsActiveFlag_RXOverflow + * @param CANx CAN instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CAN_IsActiveFlag_RXOverflow(CAN_Type *CANx) +{ + return (uint32_t)(READ_BIT(CANx->ISR, CAN_ISR_RXOFLW_Msk) == (CAN_ISR_RXOFLW_Msk)); +} + +/** + * @brief Get receive FIFO empty interrupt flag + * @rmtoll ISR RXUFLW FL_CAN_IsActiveFlag_RXEmpty + * @param CANx CAN instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CAN_IsActiveFlag_RXEmpty(CAN_Type *CANx) +{ + return (uint32_t)(READ_BIT(CANx->ISR, CAN_ISR_RXUFLW_Msk) == (CAN_ISR_RXUFLW_Msk)); +} + +/** + * @brief Get receive Ok interrupt flag + * @rmtoll ISR RXOK FL_CAN_IsActiveFlag_RXOK + * @param CANx CAN instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CAN_IsActiveFlag_RXOK(CAN_Type *CANx) +{ + return (uint32_t)(READ_BIT(CANx->ISR, CAN_ISR_RXOK_Msk) == (CAN_ISR_RXOK_Msk)); +} + +/** + * @brief Get high priority transmit buffer FULL interrupt flag + * @rmtoll ISR TXBFLL FL_CAN_IsActiveFlag_TXHighPriorBuffFull + * @param CANx CAN instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CAN_IsActiveFlag_TXHighPriorBuffFull(CAN_Type *CANx) +{ + return (uint32_t)(READ_BIT(CANx->ISR, CAN_ISR_TXBFLL_Msk) == (CAN_ISR_TXBFLL_Msk)); +} + +/** + * @brief Get transmit FIFO FULL interrupt flag + * @rmtoll ISR TXFLL FL_CAN_IsActiveFlag_TXBuffFull + * @param CANx CAN instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CAN_IsActiveFlag_TXBuffFull(CAN_Type *CANx) +{ + return (uint32_t)(READ_BIT(CANx->ISR, CAN_ISR_TXFLL_Msk) == (CAN_ISR_TXFLL_Msk)); +} + +/** + * @brief Get transmission OK interrupt flag + * @rmtoll ISR TXOK FL_CAN_IsActiveFlag_TXOK + * @param CANx CAN instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CAN_IsActiveFlag_TXOK(CAN_Type *CANx) +{ + return (uint32_t)(READ_BIT(CANx->ISR, CAN_ISR_TXOK_Msk) == (CAN_ISR_TXOK_Msk)); +} + +/** + * @brief Get arbitration lost interrupt flag + * @rmtoll ISR ARBLST FL_CAN_IsActiveFlag_ArbitrationLost + * @param CANx CAN instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CAN_IsActiveFlag_ArbitrationLost(CAN_Type *CANx) +{ + return (uint32_t)(READ_BIT(CANx->ISR, CAN_ISR_ARBLST_Msk) == (CAN_ISR_ARBLST_Msk)); +} + +/** + * @brief Bus OFF interrupt enable + * @rmtoll IER BSOFFIE FL_CAN_EnableIT_BusOff + * @param CANx CAN instance + * @retval None + */ +__STATIC_INLINE void FL_CAN_EnableIT_BusOff(CAN_Type *CANx) +{ + SET_BIT(CANx->IER, CAN_IER_BSOFFIE_Msk); +} + +/** + * @brief Get bus OFF interrupt enable status + * @rmtoll IER BSOFFIE FL_CAN_IsEnabledIT_BusOff + * @param CANx CAN instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CAN_IsEnabledIT_BusOff(CAN_Type *CANx) +{ + return (uint32_t)(READ_BIT(CANx->IER, CAN_IER_BSOFFIE_Msk) == CAN_IER_BSOFFIE_Msk); +} + +/** + * @brief Bus OFF interrupt disable + * @rmtoll IER BSOFFIE FL_CAN_DisableIT_BusOff + * @param CANx CAN instance + * @retval None + */ +__STATIC_INLINE void FL_CAN_DisableIT_BusOff(CAN_Type *CANx) +{ + CLEAR_BIT(CANx->IER, CAN_IER_BSOFFIE_Msk); +} + +/** + * @brief Error interrupt enable + * @rmtoll IER ERRORIE FL_CAN_EnableIT_Error + * @param CANx CAN instance + * @retval None + */ +__STATIC_INLINE void FL_CAN_EnableIT_Error(CAN_Type *CANx) +{ + SET_BIT(CANx->IER, CAN_IER_ERRORIE_Msk); +} + +/** + * @brief Get error interrupt enable status + * @rmtoll IER ERRORIE FL_CAN_IsEnabledIT_Error + * @param CANx CAN instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CAN_IsEnabledIT_Error(CAN_Type *CANx) +{ + return (uint32_t)(READ_BIT(CANx->IER, CAN_IER_ERRORIE_Msk) == CAN_IER_ERRORIE_Msk); +} + +/** + * @brief Error interrupt disable + * @rmtoll IER ERRORIE FL_CAN_DisableIT_Error + * @param CANx CAN instance + * @retval None + */ +__STATIC_INLINE void FL_CAN_DisableIT_Error(CAN_Type *CANx) +{ + CLEAR_BIT(CANx->IER, CAN_IER_ERRORIE_Msk); +} + +/** + * @brief Receive FIFO not empty interrupt enable + * @rmtoll IER RXNEMPIE FL_CAN_EnableIT_RXNotEmpty + * @param CANx CAN instance + * @retval None + */ +__STATIC_INLINE void FL_CAN_EnableIT_RXNotEmpty(CAN_Type *CANx) +{ + SET_BIT(CANx->IER, CAN_IER_RXNEMPIE_Msk); +} + +/** + * @brief Get receive FIFO not empty interrupt enable status + * @rmtoll IER RXNEMPIE FL_CAN_IsEnabledIT_RXNotEmpty + * @param CANx CAN instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CAN_IsEnabledIT_RXNotEmpty(CAN_Type *CANx) +{ + return (uint32_t)(READ_BIT(CANx->IER, CAN_IER_RXNEMPIE_Msk) == CAN_IER_RXNEMPIE_Msk); +} + +/** + * @brief Receive FIFO not empty interrupt disable + * @rmtoll IER RXNEMPIE FL_CAN_DisableIT_RXNotEmpty + * @param CANx CAN instance + * @retval None + */ +__STATIC_INLINE void FL_CAN_DisableIT_RXNotEmpty(CAN_Type *CANx) +{ + CLEAR_BIT(CANx->IER, CAN_IER_RXNEMPIE_Msk); +} + +/** + * @brief Receive FIFO overflow interrupt ennable + * @rmtoll IER RXOFLWIE FL_CAN_EnableIT_RXOverflow + * @param CANx CAN instance + * @retval None + */ +__STATIC_INLINE void FL_CAN_EnableIT_RXOverflow(CAN_Type *CANx) +{ + SET_BIT(CANx->IER, CAN_IER_RXOFLWIE_Msk); +} + +/** + * @brief Get receive FIFO overflow interrupt enable status + * @rmtoll IER RXOFLWIE FL_CAN_IsEnabledIT_RXOverflow + * @param CANx CAN instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CAN_IsEnabledIT_RXOverflow(CAN_Type *CANx) +{ + return (uint32_t)(READ_BIT(CANx->IER, CAN_IER_RXOFLWIE_Msk) == CAN_IER_RXOFLWIE_Msk); +} + +/** + * @brief Receive FIFO overflow interrupt disable + * @rmtoll IER RXOFLWIE FL_CAN_DisableIT_RXOverflow + * @param CANx CAN instance + * @retval None + */ +__STATIC_INLINE void FL_CAN_DisableIT_RXOverflow(CAN_Type *CANx) +{ + CLEAR_BIT(CANx->IER, CAN_IER_RXOFLWIE_Msk); +} + +/** + * @brief Receive FIFO empty interrupt enable + * @rmtoll IER RXUFLWIE FL_CAN_EnableIT_RXEmpty + * @param CANx CAN instance + * @retval None + */ +__STATIC_INLINE void FL_CAN_EnableIT_RXEmpty(CAN_Type *CANx) +{ + SET_BIT(CANx->IER, CAN_IER_RXUFLWIE_Msk); +} + +/** + * @brief Get receive FIFO empty interrupt enable status + * @rmtoll IER RXUFLWIE FL_CAN_IsEnabledIT_RXEmpty + * @param CANx CAN instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CAN_IsEnabledIT_RXEmpty(CAN_Type *CANx) +{ + return (uint32_t)(READ_BIT(CANx->IER, CAN_IER_RXUFLWIE_Msk) == CAN_IER_RXUFLWIE_Msk); +} + +/** + * @brief Receive FIFO empty interrupt disable + * @rmtoll IER RXUFLWIE FL_CAN_DisableIT_RXEmpty + * @param CANx CAN instance + * @retval None + */ +__STATIC_INLINE void FL_CAN_DisableIT_RXEmpty(CAN_Type *CANx) +{ + CLEAR_BIT(CANx->IER, CAN_IER_RXUFLWIE_Msk); +} + +/** + * @brief Receive OK interrupt enable + * @rmtoll IER RXOKIE FL_CAN_EnableIT_RXOK + * @param CANx CAN instance + * @retval None + */ +__STATIC_INLINE void FL_CAN_EnableIT_RXOK(CAN_Type *CANx) +{ + SET_BIT(CANx->IER, CAN_IER_RXOKIE_Msk); +} + +/** + * @brief Get receive OK interrupt enable + * @rmtoll IER RXOKIE FL_CAN_IsEnabledIT_RXOK + * @param CANx CAN instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CAN_IsEnabledIT_RXOK(CAN_Type *CANx) +{ + return (uint32_t)(READ_BIT(CANx->IER, CAN_IER_RXOKIE_Msk) == CAN_IER_RXOKIE_Msk); +} + +/** + * @brief Receive OK interrupt disable + * @rmtoll IER RXOKIE FL_CAN_DisableIT_RXOK + * @param CANx CAN instance + * @retval None + */ +__STATIC_INLINE void FL_CAN_DisableIT_RXOK(CAN_Type *CANx) +{ + CLEAR_BIT(CANx->IER, CAN_IER_RXOKIE_Msk); +} + +/** + * @brief High priority transmit buffer FULL interrupt enable + * @rmtoll IER TXBFLLIE FL_CAN_EnableIT_TXHighPriorBuffFull + * @param CANx CAN instance + * @retval None + */ +__STATIC_INLINE void FL_CAN_EnableIT_TXHighPriorBuffFull(CAN_Type *CANx) +{ + SET_BIT(CANx->IER, CAN_IER_TXBFLLIE_Msk); +} + +/** + * @brief Get high priority transmit buffer FULL interrupt enable status + * @rmtoll IER TXBFLLIE FL_CAN_IsEnabledIT_TXHighPriorBuffFull + * @param CANx CAN instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CAN_IsEnabledIT_TXHighPriorBuffFull(CAN_Type *CANx) +{ + return (uint32_t)(READ_BIT(CANx->IER, CAN_IER_TXBFLLIE_Msk) == CAN_IER_TXBFLLIE_Msk); +} + +/** + * @brief High priority transmit buffer FULL interrupt disable + * @rmtoll IER TXBFLLIE FL_CAN_DisableIT_TXHighPriorBuffFull + * @param CANx CAN instance + * @retval None + */ +__STATIC_INLINE void FL_CAN_DisableIT_TXHighPriorBuffFull(CAN_Type *CANx) +{ + CLEAR_BIT(CANx->IER, CAN_IER_TXBFLLIE_Msk); +} + +/** + * @brief Transmit FIFO FULL interrupt enable + * @rmtoll IER TXFLLIE FL_CAN_EnableIT_TXBuffFull + * @param CANx CAN instance + * @retval None + */ +__STATIC_INLINE void FL_CAN_EnableIT_TXBuffFull(CAN_Type *CANx) +{ + SET_BIT(CANx->IER, CAN_IER_TXFLLIE_Msk); +} + +/** + * @brief Get transmit FIFO FULL interrupt enable + * @rmtoll IER TXFLLIE FL_CAN_IsEnabledIT_TXBuffFull + * @param CANx CAN instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CAN_IsEnabledIT_TXBuffFull(CAN_Type *CANx) +{ + return (uint32_t)(READ_BIT(CANx->IER, CAN_IER_TXFLLIE_Msk) == CAN_IER_TXFLLIE_Msk); +} + +/** + * @brief Transmit FIFO FULL interrupt disable + * @rmtoll IER TXFLLIE FL_CAN_DisableIT_TXBuffFull + * @param CANx CAN instance + * @retval None + */ +__STATIC_INLINE void FL_CAN_DisableIT_TXBuffFull(CAN_Type *CANx) +{ + CLEAR_BIT(CANx->IER, CAN_IER_TXFLLIE_Msk); +} + +/** + * @brief Transmission OK interrupt enable + * @rmtoll IER TXOKIE FL_CAN_EnableIT_TXOK + * @param CANx CAN instance + * @retval None + */ +__STATIC_INLINE void FL_CAN_EnableIT_TXOK(CAN_Type *CANx) +{ + SET_BIT(CANx->IER, CAN_IER_TXOKIE_Msk); +} + +/** + * @brief Get transmission OK interrupt enable status + * @rmtoll IER TXOKIE FL_CAN_IsEnabledIT_TXOK + * @param CANx CAN instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CAN_IsEnabledIT_TXOK(CAN_Type *CANx) +{ + return (uint32_t)(READ_BIT(CANx->IER, CAN_IER_TXOKIE_Msk) == CAN_IER_TXOKIE_Msk); +} + +/** + * @brief Transmission OK interrupt disable + * @rmtoll IER TXOKIE FL_CAN_DisableIT_TXOK + * @param CANx CAN instance + * @retval None + */ +__STATIC_INLINE void FL_CAN_DisableIT_TXOK(CAN_Type *CANx) +{ + CLEAR_BIT(CANx->IER, CAN_IER_TXOKIE_Msk); +} + +/** + * @brief Arbitration lost interrupt enable + * @rmtoll IER ARBLSTIE FL_CAN_EnableIT_ArbitrationLost + * @param CANx CAN instance + * @retval None + */ +__STATIC_INLINE void FL_CAN_EnableIT_ArbitrationLost(CAN_Type *CANx) +{ + SET_BIT(CANx->IER, CAN_IER_ARBLSTIE_Msk); +} + +/** + * @brief Get arbitration lost interrupt enable + * @rmtoll IER ARBLSTIE FL_CAN_IsEnabledIT_ArbitrationLost + * @param CANx CAN instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CAN_IsEnabledIT_ArbitrationLost(CAN_Type *CANx) +{ + return (uint32_t)(READ_BIT(CANx->IER, CAN_IER_ARBLSTIE_Msk) == CAN_IER_ARBLSTIE_Msk); +} + +/** + * @brief Arbitration lost interrupt disable + * @rmtoll IER ARBLSTIE FL_CAN_DisableIT_ArbitrationLost + * @param CANx CAN instance + * @retval None + */ +__STATIC_INLINE void FL_CAN_DisableIT_ArbitrationLost(CAN_Type *CANx) +{ + CLEAR_BIT(CANx->IER, CAN_IER_ARBLSTIE_Msk); +} + +/** + * @brief Clear bus off interrupt flag + * @rmtoll ICR CBSOFF FL_CAN_ClearFlag_BusOff + * @param CANx CAN instance + * @retval None + */ +__STATIC_INLINE void FL_CAN_ClearFlag_BusOff(CAN_Type *CANx) +{ + WRITE_REG(CANx->ICR, CAN_ICR_CBSOFF_Msk); +} + +/** + * @brief Clear error interrupt flag + * @rmtoll ICR CERROR FL_CAN_ClearFlag_Error + * @param CANx CAN instance + * @retval None + */ +__STATIC_INLINE void FL_CAN_ClearFlag_Error(CAN_Type *CANx) +{ + WRITE_REG(CANx->ICR, CAN_ICR_CERROR_Msk); +} + +/** + * @brief Clear receive FIFO not empty interrupt flag + * @rmtoll ICR CRXNEMP FL_CAN_ClearFlag_RXNotEmpty + * @param CANx CAN instance + * @retval None + */ +__STATIC_INLINE void FL_CAN_ClearFlag_RXNotEmpty(CAN_Type *CANx) +{ + WRITE_REG(CANx->ICR, CAN_ICR_CRXNEMP_Msk); +} + +/** + * @brief Clear receive FIFO overflow interrupt flag + * @rmtoll ICR CRXOFLW FL_CAN_ClearFlag_RXOverflow + * @param CANx CAN instance + * @retval None + */ +__STATIC_INLINE void FL_CAN_ClearFlag_RXOverflow(CAN_Type *CANx) +{ + WRITE_REG(CANx->ICR, CAN_ICR_CRXOFLW_Msk); +} + +/** + * @brief Clear receive FIFO underflow interrupt flag + * @rmtoll ICR CRXUFLW FL_CAN_ClearFlag_RXEmpty + * @param CANx CAN instance + * @retval None + */ +__STATIC_INLINE void FL_CAN_ClearFlag_RXEmpty(CAN_Type *CANx) +{ + WRITE_REG(CANx->ICR, CAN_ICR_CRXUFLW_Msk); +} + +/** + * @brief Clear receive OK interrupt flag + * @rmtoll ICR CRXOK FL_CAN_ClearFlag_RXOK + * @param CANx CAN instance + * @retval None + */ +__STATIC_INLINE void FL_CAN_ClearFlag_RXOK(CAN_Type* CANx) +{ + WRITE_REG(CANx->ICR, CAN_ICR_CRXOK_Msk); +} + +/** + * @brief Clear high priority transmit buffer FULL interrupt flag + * @rmtoll ICR CTXBFLL FL_CAN_ClearFlag_TXHighPriorBuffFull + * @param CANx CAN instance + * @retval None + */ +__STATIC_INLINE void FL_CAN_ClearFlag_TXHighPriorBuffFull(CAN_Type *CANx) +{ + WRITE_REG(CANx->ICR, CAN_ICR_CTXBFLL_Msk); +} + +/** + * @brief Clear transmit FIFO FULL interrupt flag + * @rmtoll ICR CTXFLL FL_CAN_ClearFlag_TXBuffFull + * @param CANx CAN instance + * @retval None + */ +__STATIC_INLINE void FL_CAN_ClearFlag_TXBuffFull(CAN_Type *CANx) +{ + WRITE_REG(CANx->ICR, CAN_ICR_CTXFLL_Msk); +} + +/** + * @brief Clear transmission OK interrupt flag + * @rmtoll ICR CTXOK FL_CAN_ClearFlag_TXOK + * @param CANx CAN instance + * @retval None + */ +__STATIC_INLINE void FL_CAN_ClearFlag_TXOK(CAN_Type *CANx) +{ + WRITE_REG(CANx->ICR, CAN_ICR_CTXOK_Msk); +} + +/** + * @brief Clear arbitration lost interrupt flag + * @rmtoll ICR CARBLST FL_CAN_ClearFlag_ArbitrationLost + * @param CANx CAN instance + * @retval None + */ +__STATIC_INLINE void FL_CAN_ClearFlag_ArbitrationLost(CAN_Type *CANx) +{ + WRITE_REG(CANx->ICR, CAN_ICR_CARBLST_Msk); +} + +/** + * @brief Set TXFIFO message identifier code + * @rmtoll TXFIDR IDR FL_CAN_WriteTXMessageID + * @param CANx CAN instance + * @param id + * @retval None + */ +__STATIC_INLINE void FL_CAN_WriteTXMessageID(CAN_Type *CANx, uint32_t id) +{ + MODIFY_REG(CANx->TXFIDR, (0xffffffffU << 0U), (id << 0U)); +} + +/** + * @brief Get TXFIFO message identifier code + * @rmtoll TXFIDR IDR FL_CAN_ReadTXMessageID + * @param CANx CAN instance + * @retval + */ +__STATIC_INLINE uint32_t FL_CAN_ReadTXMessageID(CAN_Type *CANx) +{ + return (uint32_t)(READ_BIT(CANx->TXFIDR, 0xffffffffU) >> 0U); +} + +/** + * @brief Set TXFIFO data length code + * @rmtoll TXFDLCR DLC FL_CAN_WriteTXMessageLength + * @param CANx CAN instance + * @param length + * @retval None + */ +__STATIC_INLINE void FL_CAN_WriteTXMessageLength(CAN_Type *CANx, uint32_t length) +{ + MODIFY_REG(CANx->TXFDLCR, (0xfU << 0U), (length << 0U)); +} + +/** + * @brief Get TXFIFO data length code + * @rmtoll TXFDLCR DLC FL_CAN_ReadTXMessageLength + * @param CANx CAN instance + * @retval + */ +__STATIC_INLINE uint32_t FL_CAN_ReadTXMessageLength(CAN_Type *CANx) +{ + return (uint32_t)(READ_BIT(CANx->TXFDLCR, 0xfU) >> 0U); +} + +/** + * @brief Set TXFIFO data word1 + * @rmtoll TXFDW1R DB FL_CAN_WriteTXMessageWord1 + * @param CANx CAN instance + * @param word + * @retval None + */ +__STATIC_INLINE void FL_CAN_WriteTXMessageWord1(CAN_Type *CANx, uint32_t word) +{ + MODIFY_REG(CANx->TXFDW1R, (0xffffffffU << 0U), (word << 0U)); +} + +/** + * @brief Get TXFIFO data word1 + * @rmtoll TXFDW1R DB FL_CAN_ReadTXMessageWord1 + * @param CANx CAN instance + * @retval + */ +__STATIC_INLINE uint32_t FL_CAN_ReadTXMessageWord1(CAN_Type *CANx) +{ + return (uint32_t)(READ_BIT(CANx->TXFDW1R, 0xffffffffU) >> 0U); +} + +/** + * @brief Set TXFIFO data word2 + * @rmtoll TXFDW2R DB FL_CAN_WriteTXMessageWord2 + * @param CANx CAN instance + * @param word + * @retval None + */ +__STATIC_INLINE void FL_CAN_WriteTXMessageWord2(CAN_Type *CANx, uint32_t word) +{ + MODIFY_REG(CANx->TXFDW2R, (0xffffffffU << 0U), (word << 0U)); +} + +/** + * @brief Get TXFIFO data word2 + * @rmtoll TXFDW2R DB FL_CAN_ReadTXMessageWord2 + * @param CANx CAN instance + * @retval + */ +__STATIC_INLINE uint32_t FL_CAN_ReadTXMessageWord2(CAN_Type *CANx) +{ + return (uint32_t)(READ_BIT(CANx->TXFDW2R, 0xffffffffU) >> 0U); +} + +/** + * @brief Set HPB identifier code + * @rmtoll HPBIDR IDR FL_CAN_WriteHighPriorTXMessageID + * @param CANx CAN instance + * @param id + * @retval None + */ +__STATIC_INLINE void FL_CAN_WriteHighPriorTXMessageID(CAN_Type *CANx, uint32_t id) +{ + MODIFY_REG(CANx->HPBIDR, (0xffffffffU << 0U), (id << 0U)); +} + +/** + * @brief Get HPB identifier code + * @rmtoll HPBIDR IDR FL_CAN_ReadHighPriorTXMessageID + * @param CANx CAN instance + * @retval + */ +__STATIC_INLINE uint32_t FL_CAN_ReadHighPriorTXMessageID(CAN_Type *CANx) +{ + return (uint32_t)(READ_BIT(CANx->HPBIDR, 0xffffffffU) >> 0U); +} + +/** + * @brief Set HPB data length code + * @rmtoll HPBDLCR DLC FL_CAN_WriteHighPriorMessageLength + * @param CANx CAN instance + * @param length + * @retval None + */ +__STATIC_INLINE void FL_CAN_WriteHighPriorMessageLength(CAN_Type *CANx, uint32_t length) +{ + MODIFY_REG(CANx->HPBDLCR, (0xfU << 0U), (length << 0U)); +} + +/** + * @brief Get HPB data length code + * @rmtoll HPBDLCR DLC FL_CAN_ReadHighPriorMessageLength + * @param CANx CAN instance + * @retval + */ +__STATIC_INLINE uint32_t FL_CAN_ReadHighPriorMessageLength(CAN_Type *CANx) +{ + return (uint32_t)(READ_BIT(CANx->HPBDLCR, 0xfU) >> 0U); +} + +/** + * @brief Set HPB data word1 + * @rmtoll HPBDW1R DB FL_CAN_WriteHighPriorMessageWord1 + * @param CANx CAN instance + * @param word + * @retval None + */ +__STATIC_INLINE void FL_CAN_WriteHighPriorMessageWord1(CAN_Type *CANx, uint32_t word) +{ + MODIFY_REG(CANx->HPBDW1R, (0xffffffffU << 0U), (word << 0U)); +} + +/** + * @brief Get HPB data word1 + * @rmtoll HPBDW1R DB FL_CAN_ReadHighPriorMessageWord1 + * @param CANx CAN instance + * @retval + */ +__STATIC_INLINE uint32_t FL_CAN_ReadHighPriorMessageWord1(CAN_Type *CANx) +{ + return (uint32_t)(READ_BIT(CANx->HPBDW1R, 0xffffffffU) >> 0U); +} + +/** + * @brief Set HPB data word2 + * @rmtoll HPBDW2R DB FL_CAN_WriteHighPriorMessageWord2 + * @param CANx CAN instance + * @param word + * @retval None + */ +__STATIC_INLINE void FL_CAN_WriteHighPriorMessageWord2(CAN_Type *CANx, uint32_t word) +{ + MODIFY_REG(CANx->HPBDW2R, (0xffffffffU << 0U), (word << 0U)); +} + +/** + * @brief Get HPB data word2 + * @rmtoll HPBDW2R DB FL_CAN_ReadHighPriorMessageWord2 + * @param CANx CAN instance + * @retval + */ +__STATIC_INLINE uint32_t FL_CAN_ReadHighPriorMessageWord2(CAN_Type *CANx) +{ + return (uint32_t)(READ_BIT(CANx->HPBDW2R, 0xffffffffU) >> 0U); +} + +/** + * @brief Set RXFIFO message identifier code + * @rmtoll RXFIDR IDR FL_CAN_WriteRXMessageID + * @param CANx CAN instance + * @param id + * @retval None + */ +__STATIC_INLINE void FL_CAN_WriteRXMessageID(CAN_Type *CANx, uint32_t id) +{ + MODIFY_REG(CANx->RXFIDR, (0xffffffffU << 0U), (id << 0U)); +} + +/** + * @brief Get RXFIFO message identifier code + * @rmtoll RXFIDR IDR FL_CAN_ReadRXMessageID + * @param CANx CAN instance + * @retval + */ +__STATIC_INLINE uint32_t FL_CAN_ReadRXMessageID(CAN_Type *CANx) +{ + return (uint32_t)(READ_BIT(CANx->RXFIDR, 0xffffffffU) >> 0U); +} + +/** + * @brief Set RXFIFO data length code + * @rmtoll RXFDLCR DLC FL_CAN_WriteRXMessageLength + * @param CANx CAN instance + * @param length + * @retval None + */ +__STATIC_INLINE void FL_CAN_WriteRXMessageLength(CAN_Type *CANx, uint32_t length) +{ + MODIFY_REG(CANx->RXFDLCR, (0xfU << 0U), (length << 0U)); +} + +/** + * @brief Get RXFIFO data length code + * @rmtoll RXFDLCR DLC FL_CAN_ReadRXMessageLength + * @param CANx CAN instance + * @retval + */ +__STATIC_INLINE uint32_t FL_CAN_ReadRXMessageLength(CAN_Type *CANx) +{ + return (uint32_t)(READ_BIT(CANx->RXFDLCR, 0xfU) >> 0U); +} + +/** + * @brief Set RXFIFO data word1 + * @rmtoll RXFDW1R DB FL_CAN_WriteRXMessageWord1 + * @param CANx CAN instance + * @param word + * @retval None + */ +__STATIC_INLINE void FL_CAN_WriteRXMessageWord1(CAN_Type *CANx, uint32_t word) +{ + MODIFY_REG(CANx->RXFDW1R, (0xffffffffU << 0U), (word << 0U)); +} + +/** + * @brief Get RXFIFO data word1 + * @rmtoll RXFDW1R DB FL_CAN_ReadRXMessageWord1 + * @param CANx CAN instance + * @retval + */ +__STATIC_INLINE uint32_t FL_CAN_ReadRXMessageWord1(CAN_Type *CANx) +{ + return (uint32_t)(READ_BIT(CANx->RXFDW1R, 0xffffffffU) >> 0U); +} + +/** + * @brief Set RXFIFO data word2 + * @rmtoll RXFDW2R DB FL_CAN_WriteRXMessageWord2 + * @param CANx CAN instance + * @param word + * @retval None + */ +__STATIC_INLINE void FL_CAN_WriteRXMessageWord2(CAN_Type *CANx, uint32_t word) +{ + MODIFY_REG(CANx->RXFDW2R, (0xffffffffU << 0U), (word << 0U)); +} + +/** + * @brief Get RXFIFO data word2 + * @rmtoll RXFDW2R DB FL_CAN_ReadRXMessageWord2 + * @param CANx CAN instance + * @retval + */ +__STATIC_INLINE uint32_t FL_CAN_ReadRXMessageWord2(CAN_Type *CANx) +{ + return (uint32_t)(READ_BIT(CANx->RXFDW2R, 0xffffffffU) >> 0U); +} + +/** + * @brief Acceptance filter 4 enable + * @rmtoll AFR UAF FL_CAN_Filter_Enable + * @param CANx CAN instance + * @param filterX This parameter can be one of the following values: + * @arg @ref FL_CAN_FILTER1 + * @arg @ref FL_CAN_FILTER2 + * @arg @ref FL_CAN_FILTER3 + * @arg @ref FL_CAN_FILTER4 + * @retval None + */ +__STATIC_INLINE void FL_CAN_Filter_Enable(CAN_Type *CANx, uint32_t filterX) +{ + SET_BIT(CANx->AFR, 0x1U << filterX); +} + +/** + * @brief Get acceptance filter 4 enable status + * @rmtoll AFR UAF FL_CAN_Filter_IsEnabled + * @param CANx CAN instance + * @param filterX This parameter can be one of the following values: + * @arg @ref FL_CAN_FILTER1 + * @arg @ref FL_CAN_FILTER2 + * @arg @ref FL_CAN_FILTER3 + * @arg @ref FL_CAN_FILTER4 + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CAN_Filter_IsEnabled(CAN_Type *CANx, uint32_t filterX) +{ + return (uint32_t)(READ_BIT(CANx->AFR, (((0x1U << filterX) & 0xf) << CAN_AFR_UAF_Pos)) == (((0x1U << filterX) & 0xf) << CAN_AFR_UAF_Pos)); +} + +/** + * @brief Acceptance filter 4 disable + * @rmtoll AFR UAF FL_CAN_Filter_Disable + * @param CANx CAN instance + * @param filterX This parameter can be one of the following values: + * @arg @ref FL_CAN_FILTER1 + * @arg @ref FL_CAN_FILTER2 + * @arg @ref FL_CAN_FILTER3 + * @arg @ref FL_CAN_FILTER4 + * @retval None + */ +__STATIC_INLINE void FL_CAN_Filter_Disable(CAN_Type *CANx, uint32_t filterX) +{ + CLEAR_BIT(CANx->AFR, (((0x1U << filterX) & 0xf) << CAN_AFR_UAF_Pos)); +} + +/** + * @brief Enable RTR participate filter compare + * @rmtoll AFMR AMRTR FL_CAN_Filter_EnableRTRCompare + * @param CANx CAN instance + * @param filterX This parameter can be one of the following values: + * @arg @ref FL_CAN_FILTER1 + * @arg @ref FL_CAN_FILTER2 + * @arg @ref FL_CAN_FILTER3 + * @arg @ref FL_CAN_FILTER4 + * @retval None + */ +__STATIC_INLINE void FL_CAN_Filter_EnableRTRCompare(CAN_Type *CANx, uint32_t filterX) +{ + SET_BIT(*(&(CANx->AFMR0) + 2 * filterX), CAN_AFMR_AMRTR_Msk); +} + +/** + * @brief Disable RTR participate filter compare + * @rmtoll AFMR AMRTR FL_CAN_Filter_DisableRTRCompare + * @param CANx CAN instance + * @param filterX This parameter can be one of the following values: + * @arg @ref FL_CAN_FILTER1 + * @arg @ref FL_CAN_FILTER2 + * @arg @ref FL_CAN_FILTER3 + * @arg @ref FL_CAN_FILTER4 + * @retval Returned value can be one of the following values: + */ +__STATIC_INLINE void FL_CAN_Filter_DisableRTRCompare(CAN_Type *CANx, uint32_t filterX) +{ + CLEAR_BIT(*(&(CANx->AFMR0) + 2 * filterX), CAN_AFMR_AMRTR_Msk); +} + +/** + * @brief Get RTR participate filter compare Enable Status + * @rmtoll AFMR AMRTR FL_CAN_Filter_IsEnabledRTRCompare + * @param CANx CAN instance + * @param filterX This parameter can be one of the following values: + * @arg @ref FL_CAN_FILTER1 + * @arg @ref FL_CAN_FILTER2 + * @arg @ref FL_CAN_FILTER3 + * @arg @ref FL_CAN_FILTER4 + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CAN_Filter_IsEnabledRTRCompare(CAN_Type *CANx, uint32_t filterX) +{ + return (uint32_t)(READ_BIT(*(&(CANx->AFMR0) + 2 * filterX), CAN_AFMR_AMRTR_Msk) == CAN_AFMR_AMRTR_Msk); +} + +/** + * @brief Set ID low 18bit participate filter compare + * @rmtoll AFMR AMID18 FL_CAN_Filter_WriteEXTIDCompareMask + * @param CANx CAN instance + * @param filterX This parameter can be one of the following values: + * @arg @ref FL_CAN_FILTER1 + * @arg @ref FL_CAN_FILTER2 + * @arg @ref FL_CAN_FILTER3 + * @arg @ref FL_CAN_FILTER4 + * @retval None + */ +__STATIC_INLINE void FL_CAN_Filter_WriteEXTIDCompareMask(CAN_Type *CANx, uint32_t filterX, uint32_t id18) +{ + MODIFY_REG(*(&(CANx->AFMR0) + 2 * filterX), (0x3ffffU << CAN_AFMR_AMID18_Pos), (id18 << CAN_AFMR_AMID18_Pos)); +} + +/** + * @brief Get ID low 18bit participate filter compare + * @rmtoll AFMR AMID18 FL_CAN_Filter_ReadEXTIDCompareMask + * @param CANx CAN instance + * @param filterX This parameter can be one of the following values: + * @arg @ref FL_CAN_FILTER1 + * @arg @ref FL_CAN_FILTER2 + * @arg @ref FL_CAN_FILTER3 + * @arg @ref FL_CAN_FILTER4 + * @retval None + */ +__STATIC_INLINE uint32_t FL_CAN_Filter_ReadEXTIDCompareMask(CAN_Type *CANx, uint32_t filterX) +{ + return (uint32_t)(READ_BIT(*(&(CANx->AFMR0) + 2 * filterX), (0x3ffffU << CAN_AFMR_AMID18_Pos)) >> CAN_AFMR_AMID18_Pos); +} + +/** + * @brief Enable IDE participate filter compare + * @rmtoll AFMR AMIDE FL_CAN_Filter_EnableIDECompare + * @param CANx CAN instance + * @param filterX This parameter can be one of the following values: + * @arg @ref FL_CAN_FILTER1 + * @arg @ref FL_CAN_FILTER2 + * @arg @ref FL_CAN_FILTER3 + * @arg @ref FL_CAN_FILTER4 + * @retval None + */ +__STATIC_INLINE void FL_CAN_Filter_EnableIDECompare(CAN_Type *CANx, uint32_t filterX) +{ + SET_BIT(*(&(CANx->AFMR0) + 2 * filterX), CAN_AFMR_AMIDE_Msk); +} + +/** + * @brief Disable IDE participate filter compare + * @rmtoll AFMR AMIDE FL_CAN_Filter_DisableIDECompare + * @param CANx CAN instance + * @param filterX This parameter can be one of the following values: + * @arg @ref FL_CAN_FILTER1 + * @arg @ref FL_CAN_FILTER2 + * @arg @ref FL_CAN_FILTER3 + * @arg @ref FL_CAN_FILTER4 + * @retval Returned value can be one of the following values: + */ +__STATIC_INLINE void FL_CAN_Filter_DisableIDECompare(CAN_Type *CANx, uint32_t filterX) +{ + CLEAR_BIT(*(&(CANx->AFMR0) + 2 * filterX), CAN_AFMR_AMIDE_Msk); +} + +/** + * @brief Get IDE participate filter compare Enable Status + * @rmtoll AFMR AMIDE FL_CAN_Filter_IsEnabledIDECompare + * @param CANx CAN instance + * @param filterX This parameter can be one of the following values: + * @arg @ref FL_CAN_FILTER1 + * @arg @ref FL_CAN_FILTER2 + * @arg @ref FL_CAN_FILTER3 + * @arg @ref FL_CAN_FILTER4 + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CAN_Filter_IsEnabledIDECompare(CAN_Type *CANx, uint32_t filterX) +{ + return (uint32_t)(READ_BIT(*(&(CANx->AFMR0) + 2 * filterX), CAN_AFMR_AMIDE_Msk) == CAN_AFMR_AMIDE_Msk); +} + +/** + * @brief Enable SRR participate filter compare + * @rmtoll AFMR AMSRR FL_CAN_Filter_EnableSRRCompare + * @param CANx CAN instance + * @param filterX This parameter can be one of the following values: + * @arg @ref FL_CAN_FILTER1 + * @arg @ref FL_CAN_FILTER2 + * @arg @ref FL_CAN_FILTER3 + * @arg @ref FL_CAN_FILTER4 + * @retval None + */ +__STATIC_INLINE void FL_CAN_Filter_EnableSRRCompare(CAN_Type *CANx, uint32_t filterX) +{ + SET_BIT(*(&(CANx->AFMR0) + 2 * filterX), CAN_AFMR_AMSRR_Msk); +} + +/** + * @brief Disable SRR participate filter compare + * @rmtoll AFMR AMSRR FL_CAN_Filter_DisableSRRCompare + * @param CANx CAN instance + * @param filterX This parameter can be one of the following values: + * @arg @ref FL_CAN_FILTER1 + * @arg @ref FL_CAN_FILTER2 + * @arg @ref FL_CAN_FILTER3 + * @arg @ref FL_CAN_FILTER4 + * @retval Returned value can be one of the following values: + */ +__STATIC_INLINE void FL_CAN_Filter_DisableSRRCompare(CAN_Type *CANx, uint32_t filterX) +{ + CLEAR_BIT(*(&(CANx->AFMR0) + 2 * filterX), CAN_AFMR_AMSRR_Msk); +} + +/** + * @brief Get SRR participate filter compare Enable Status + * @rmtoll AFMR AMSRR FL_CAN_Filter_IsEnabledSRRCompare + * @param CANx CAN instance + * @param filterX This parameter can be one of the following values: + * @arg @ref FL_CAN_FILTER1 + * @arg @ref FL_CAN_FILTER2 + * @arg @ref FL_CAN_FILTER3 + * @arg @ref FL_CAN_FILTER4 + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CAN_Filter_IsEnabledSRRCompare(CAN_Type *CANx, uint32_t filterX) +{ + return (uint32_t)(READ_BIT(*(&(CANx->AFMR0) + 2 * filterX), CAN_AFMR_AMSRR_Msk) == CAN_AFMR_AMSRR_Msk); +} + +/** + * @brief Set ID high 11bit participate filter compare + * @rmtoll AFMR AMID11 FL_CAN_Filter_WriteIDCompareMask + * @param CANx CAN instance + * @param filterX + * @param id11 + * @retval None + */ +__STATIC_INLINE void FL_CAN_Filter_WriteIDCompareMask(CAN_Type *CANx, uint32_t filterX, uint32_t id11) +{ + MODIFY_REG(*((&(CANx->AFMR0)) + 2 * filterX), (0x7ffU << CAN_AFMR_AMID11_Pos), id11 << CAN_AFMR_AMID11_Pos); +} + +/** + * @brief Get ID high 11bit participate filter compare + * @rmtoll AFMR AMID11 FL_CAN_Filter_ReadIDCompareMask + * @param CANx CAN instance + * @param filterX This parameter can be one of the following values: + * @arg @ref FL_CAN_FILTER1 + * @arg @ref FL_CAN_FILTER2 + * @arg @ref FL_CAN_FILTER3 + * @arg @ref FL_CAN_FILTER4 + * @retval + */ +__STATIC_INLINE uint32_t FL_CAN_Filter_ReadIDCompareMask(CAN_Type *CANx, uint32_t filterX) +{ + return (uint32_t)(READ_BIT(*((&(CANx->AFMR0)) + 2 * filterX), (0x7ffU << CAN_AFMR_AMID11_Pos)) >> CAN_AFMR_AMID11_Pos); +} + +/** + * @brief Set filter RTR + * @rmtoll AFIR AIRTR FL_CAN_Filter_SetRTRCompare + * @param CANx CAN instance + * @param filterX This parameter can be one of the following values: + * @arg @ref FL_CAN_FILTER1 + * @arg @ref FL_CAN_FILTER2 + * @arg @ref FL_CAN_FILTER3 + * @arg @ref FL_CAN_FILTER4 + * @param rtr This parameter can be one of the following values: + * @arg @ref FL_CAN_RTR_BIT_LOW + * @arg @ref FL_CAN_RTR_BIT_HIGH + * @retval None + */ +__STATIC_INLINE void FL_CAN_Filter_SetRTRCompare(CAN_Type *CANx, uint32_t filterX, uint32_t rtr) +{ + MODIFY_REG(*((&(CANx->AFIR0)) + 2 * filterX), CAN_AFIR_AIRTR_Msk, rtr ); +} + +/** + * @brief Get filter RTR + * @rmtoll AFIR AIRTR FL_CAN_Filter_GetRTRCompare + * @param CANx CAN instance + * @param filterX This parameter can be one of the following values: + * @arg @ref FL_CAN_FILTER1 + * @arg @ref FL_CAN_FILTER2 + * @arg @ref FL_CAN_FILTER3 + * @arg @ref FL_CAN_FILTER4 + * @retval Returned value can be one of the following values: + * @arg @ref FL_CAN_RTR_BIT_LOW + * @arg @ref FL_CAN_RTR_BIT_HIGH + */ +__STATIC_INLINE uint32_t FL_CAN_Filter_GetRTRCompare(CAN_Type *CANx, uint32_t filterX) +{ + return (uint32_t)(READ_BIT(*((&(CANx->AFIR0)) + 2 * filterX), CAN_AFIR_AIRTR_Msk)); +} + +/** + * @brief Set filter ID[17:0] + * @rmtoll AFIR AIID18 FL_CAN_Filter_WriteEXTIDCompare + * @param CANx CAN instance + * @param filterX + * @param id18 + * @retval None + */ +__STATIC_INLINE void FL_CAN_Filter_WriteEXTIDCompare(CAN_Type *CANx, uint32_t filterX, uint32_t id18) +{ + MODIFY_REG(*(&(CANx->AFIR0) + 2 * filterX), (0x3ffffU << CAN_AFIR_AIID18_Pos), (id18 << CAN_AFIR_AIID18_Pos)); +} + +/** + * @brief Get filter ID[17:0] + * @rmtoll AFIR AIID18 FL_CAN_Filter_ReadEXTIDCompare + * @param CANx CAN instance + * @param filterX This parameter can be one of the following values: + * @arg @ref FL_CAN_FILTER1 + * @arg @ref FL_CAN_FILTER2 + * @arg @ref FL_CAN_FILTER3 + * @arg @ref FL_CAN_FILTER4 + * @retval + */ +__STATIC_INLINE uint32_t FL_CAN_Filter_ReadEXTIDCompare(CAN_Type *CANx, uint32_t filterX) +{ + return (uint32_t)(READ_BIT(*(&(CANx->AFIR0) + 2 * filterX), (0x3ffffU << CAN_AFIR_AIID18_Pos)) >> CAN_AFIR_AIID18_Pos); +} + +/** + * @brief Set filter IDE + * @rmtoll AFIR AIIDE FL_CAN_Filter_SetIDECompare + * @param CANx CAN instance + * @param filterX This parameter can be one of the following values: + * @arg @ref FL_CAN_FILTER1 + * @arg @ref FL_CAN_FILTER2 + * @arg @ref FL_CAN_FILTER3 + * @arg @ref FL_CAN_FILTER4 + * @param ide This parameter can be one of the following values: + * @arg @ref FL_CAN_IDE_BIT_LOW + * @arg @ref FL_CAN_IDE_BIT_HIGH + * @retval None + */ +__STATIC_INLINE void FL_CAN_Filter_SetIDECompare(CAN_Type *CANx, uint32_t filterX, uint32_t ide) +{ + MODIFY_REG(*((&(CANx->AFIR0)) + 2 * filterX), CAN_AFIR_AIIDE_Msk, ide); +} + +/** + * @brief Get filter IDE + * @rmtoll AFIR AIIDE FL_CAN_Filter_GetIDECompare + * @param CANx CAN instance + * @param filterX This parameter can be one of the following values: + * @arg @ref FL_CAN_FILTER1 + * @arg @ref FL_CAN_FILTER2 + * @arg @ref FL_CAN_FILTER3 + * @arg @ref FL_CAN_FILTER4 + * @retval Returned value can be one of the following values: + * @arg @ref FL_CAN_IDE_BIT_LOW + * @arg @ref FL_CAN_IDE_BIT_HIGH + */ +__STATIC_INLINE uint32_t FL_CAN_Filter_GetIDECompare(CAN_Type *CANx, uint32_t filterX) +{ + return (uint32_t)(READ_BIT(*((&(CANx->AFIR0)) + 2 * filterX), CAN_AFIR_AIIDE_Msk)); +} + +/** + * @brief Set filter SRR + * @rmtoll AFIR AISRR FL_CAN_Filter_SetSRRCompare + * @param CANx CAN instance + * @param filterX This parameter can be one of the following values: + * @arg @ref FL_CAN_FILTER1 + * @arg @ref FL_CAN_FILTER2 + * @arg @ref FL_CAN_FILTER3 + * @arg @ref FL_CAN_FILTER4 + * @param srr This parameter can be one of the following values: + * @arg @ref FL_CAN_SRR_BIT_LOW + * @arg @ref FL_CAN_SRR_BIT_HIGH + * @retval None + */ +__STATIC_INLINE void FL_CAN_Filter_SetSRRCompare(CAN_Type *CANx, uint32_t filterX, uint32_t srr) +{ + MODIFY_REG(*((&(CANx->AFIR0)) + 2 * filterX), CAN_AFIR_AISRR_Msk, srr); +} + +/** + * @brief Get filter SRR + * @rmtoll AFIR AISRR FL_CAN_Filter_GetSRRCompare + * @param CANx CAN instance + * @param filterX This parameter can be one of the following values: + * @arg @ref FL_CAN_FILTER1 + * @arg @ref FL_CAN_FILTER2 + * @arg @ref FL_CAN_FILTER3 + * @arg @ref FL_CAN_FILTER4 + * @retval Returned value can be one of the following values: + * @arg @ref FL_CAN_SRR_BIT_LOW + * @arg @ref FL_CAN_SRR_BIT_HIGH + */ +__STATIC_INLINE uint32_t FL_CAN_Filter_GetSRRCompare(CAN_Type *CANx, uint32_t filterX) +{ + return (uint32_t)(READ_BIT(*((&(CANx->AFIR0)) + 2 * filterX), CAN_AFIR_AISRR_Msk)); +} + +/** + * @brief Set filterID[28:18] + * @rmtoll AFIR AIID11 FL_CAN_Filter_WriteIDCompare + * @param CANx CAN instance + * @param filterX + * @param id11 + * @retval None + */ +__STATIC_INLINE void FL_CAN_Filter_WriteIDCompare(CAN_Type *CANx, uint32_t filterX, uint32_t id11) +{ + MODIFY_REG(*((&(CANx->AFIR0)) + 2 * filterX), (0x7ffU << CAN_AFIR_AIID11_Pos), id11 << CAN_AFIR_AIID11_Pos); +} + +/** + * @brief Get filter ID[28:18] + * @rmtoll AFIR AIID11 FL_CAN_Filter_ReadIDCompare + * @param CANx CAN instance + * @param filterX This parameter can be one of the following values: + * @arg @ref FL_CAN_FILTER1 + * @arg @ref FL_CAN_FILTER2 + * @arg @ref FL_CAN_FILTER3 + * @arg @ref FL_CAN_FILTER4 + * @retval + */ +__STATIC_INLINE uint32_t FL_CAN_Filter_ReadIDCompare(CAN_Type *CANx, uint32_t filterX) +{ + return (uint32_t)(READ_BIT(*((&(CANx->AFIR0)) + 2 * filterX), 0x7ffU) >> CAN_AFIR_AIID11_Pos); +} + +/** + * @} + */ + +/** @defgroup CAN_FL_EF_Init Initialization and de-initialization functions + * @{ + */ +FL_ErrorStatus FL_CAN_Init(CAN_Type *CANx, FL_CAN_InitTypeDef *CAN_InitStructure); +FL_ErrorStatus FL_CAN_FilterInit(CAN_Type *CANx, FL_CAN_FilterInitTypeDef *CAN_FilterInitStructure, uint32_t filterX); +void FL_CAN_StructInit(FL_CAN_InitTypeDef *CAN_InitStruct); +void FL_CAN_StructFilterInit(FL_CAN_FilterInitTypeDef *CAN_FilterInitStruct); +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif /* __FM33LG0XX_FL_CAN_H*/ + +/*************************Py_Code_Generator Version: 0.1-0.11-0.1 @ 2020-09-12*************************/ +/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/ diff --git a/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_cdif.h b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_cdif.h new file mode 100644 index 0000000..ce7823b --- /dev/null +++ b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_cdif.h @@ -0,0 +1,247 @@ + /** + ******************************************************************************************************* + * @file fm33lg0xx_fl_cdif.h + * @author FMSH Application Team + * @brief Head file of CDIF FL Module + ******************************************************************************************************* + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + + + +/* Define to prevent recursive inclusion---------------------------------------------------------------*/ +#ifndef __FM33LG0XX_FL_CDIF_H +#define __FM33LG0XX_FL_CDIF_H + +#ifdef __cplusplus +extern "C" { +#endif +/* Includes -------------------------------------------------------------------------------------------*/ +#include "fm33lg0xx_fl_def.h" +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @defgroup CDIF CDIF + * @brief CDIF FL driver + * @{ + */ + +/* Exported types -------------------------------------------------------------------------------------*/ +/** @defgroup CDIF_FL_ES_INIT CDIF Exported Init structures + * @{ + */ + +/** + * @brief FL CDIF Init Sturcture definition + */ + +/** + * @} + */ +/* Exported constants ---------------------------------------------------------------------------------*/ +/** @defgroup CDIF_FL_Exported_Constants CDIF Exported Constants + * @{ + */ + +#define CDIF_CR_INTF_IEN_Pos (1U) +#define CDIF_CR_INTF_IEN_Msk (0x1U << CDIF_CR_INTF_IEN_Pos) +#define CDIF_CR_INTF_IEN CDIF_CR_INTF_IEN_Msk + +#define CDIF_CR_INTF_OEN_Pos (0U) +#define CDIF_CR_INTF_OEN_Msk (0x1U << CDIF_CR_INTF_OEN_Pos) +#define CDIF_CR_INTF_OEN CDIF_CR_INTF_OEN_Msk + +#define CDIF_PRSC_PRSC_Pos (0U) +#define CDIF_PRSC_PRSC_Msk (0x7U << CDIF_PRSC_PRSC_Pos) +#define CDIF_PRSC_PRSC CDIF_PRSC_PRSC_Msk + + + +#define FL_CDIF_PSC_DIV1 (0x0U << CDIF_PRSC_PRSC_Pos) +#define FL_CDIF_PSC_DIV2 (0x1U << CDIF_PRSC_PRSC_Pos) +#define FL_CDIF_PSC_DIV4 (0x2U << CDIF_PRSC_PRSC_Pos) +#define FL_CDIF_PSC_DIV8 (0x3U << CDIF_PRSC_PRSC_Pos) +#define FL_CDIF_PSC_DIV16 (0x4U << CDIF_PRSC_PRSC_Pos) +#define FL_CDIF_PSC_DIV32 (0x5U << CDIF_PRSC_PRSC_Pos) +#define FL_CDIF_PSC_DIV64 (0x6U << CDIF_PRSC_PRSC_Pos) +#define FL_CDIF_PSC_DIV128 (0x7U << CDIF_PRSC_PRSC_Pos) + + +/** + * @} + */ +/* Exported functions ---------------------------------------------------------------------------------*/ +/** @defgroup CDIF_FL_Exported_Functions CDIF Exported Functions + * @{ + */ + +/** + * @brief VAO To CPU input enable + * @rmtoll CR INTF_IEN FL_CDIF_EnableVAOToCPU + * @param CDIFx CDIF instance + * @retval None + */ +__STATIC_INLINE void FL_CDIF_EnableVAOToCPU(CDIF_Type *CDIFx) +{ + SET_BIT(CDIFx->CR, CDIF_CR_INTF_IEN_Msk); +} + +/** + * @brief Get VAO To CPU input enable status + * @rmtoll CR INTF_IEN FL_CDIF_IsEnabledVAOToCPU + * @param CDIFx CDIF instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CDIF_IsEnabledVAOToCPU(CDIF_Type *CDIFx) +{ + return (uint32_t)(READ_BIT(CDIFx->CR, CDIF_CR_INTF_IEN_Msk) == CDIF_CR_INTF_IEN_Msk); +} + +/** + * @brief VAO To CPU input disable + * @rmtoll CR INTF_IEN FL_CDIF_DisableVAOToCPU + * @param CDIFx CDIF instance + * @retval None + */ +__STATIC_INLINE void FL_CDIF_DisableVAOToCPU(CDIF_Type *CDIFx) +{ + CLEAR_BIT(CDIFx->CR, CDIF_CR_INTF_IEN_Msk); +} + +/** + * @brief CPU To VAO enable + * @rmtoll CR INTF_OEN FL_CDIF_EnableCPUToVAO + * @param CDIFx CDIF instance + * @retval None + */ +__STATIC_INLINE void FL_CDIF_EnableCPUToVAO(CDIF_Type *CDIFx) +{ + SET_BIT(CDIFx->CR, CDIF_CR_INTF_OEN_Msk); +} + +/** + * @brief Get CPU To VAO output enable status + * @rmtoll CR INTF_OEN FL_CDIF_IsEnabledCPUToVAO + * @param CDIFx CDIF instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CDIF_IsEnabledCPUToVAO(CDIF_Type *CDIFx) +{ + return (uint32_t)(READ_BIT(CDIFx->CR, CDIF_CR_INTF_OEN_Msk) == CDIF_CR_INTF_OEN_Msk); +} + +/** + * @brief CPU To VAO output disable + * @rmtoll CR INTF_OEN FL_CDIF_DisableCPUToVAO + * @param CDIFx CDIF instance + * @retval None + */ +__STATIC_INLINE void FL_CDIF_DisableCPUToVAO(CDIF_Type *CDIFx) +{ + CLEAR_BIT(CDIFx->CR, CDIF_CR_INTF_OEN_Msk); +} + +/** + * @brief Set CDIF prescaler + * @rmtoll PRSC PRSC FL_CDIF_SetPrescaler + * @param CDIFx CDIF instance + * @param psc This parameter can be one of the following values: + * @arg @ref FL_CDIF_PSC_DIV1 + * @arg @ref FL_CDIF_PSC_DIV2 + * @arg @ref FL_CDIF_PSC_DIV4 + * @arg @ref FL_CDIF_PSC_DIV8 + * @arg @ref FL_CDIF_PSC_DIV16 + * @arg @ref FL_CDIF_PSC_DIV32 + * @arg @ref FL_CDIF_PSC_DIV64 + * @arg @ref FL_CDIF_PSC_DIV128 + * @retval None + */ +__STATIC_INLINE void FL_CDIF_SetPrescaler(CDIF_Type *CDIFx, uint32_t psc) +{ + MODIFY_REG(CDIFx->PRSC, CDIF_PRSC_PRSC_Msk, psc); +} + +/** + * @brief Get CDIF prescaler + * @rmtoll PRSC PRSC FL_CDIF_GetPrescaler + * @param CDIFx CDIF instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_CDIF_PSC_DIV1 + * @arg @ref FL_CDIF_PSC_DIV2 + * @arg @ref FL_CDIF_PSC_DIV4 + * @arg @ref FL_CDIF_PSC_DIV8 + * @arg @ref FL_CDIF_PSC_DIV16 + * @arg @ref FL_CDIF_PSC_DIV32 + * @arg @ref FL_CDIF_PSC_DIV64 + * @arg @ref FL_CDIF_PSC_DIV128 + */ +__STATIC_INLINE uint32_t FL_CDIF_GetPrescaler(CDIF_Type *CDIFx) +{ + return (uint32_t)(READ_BIT(CDIFx->PRSC, CDIF_PRSC_PRSC_Msk)); +} + +/** + * @} + */ + +/** @defgroup CDIF_FL_EF_Init Initialization and de-initialization functions + * @{ + */ + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif /* __FM33LG0XX_FL_CDIF_H*/ + +/*************************Py_Code_Generator Version: 0.1-0.11-0.1 @ 2020-09-11*************************/ +/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/ diff --git a/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_cmu.h b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_cmu.h new file mode 100644 index 0000000..6666dff --- /dev/null +++ b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_cmu.h @@ -0,0 +1,2310 @@ + /** + ******************************************************************************************************* + * @file fm33lg0xx_fl_cmu.h + * @author FMSH Application Team + * @brief Head file of CMU FL Module + ******************************************************************************************************* + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + + + +/* Define to prevent recursive inclusion---------------------------------------------------------------*/ +#ifndef __FM33LG0XX_FL_CMU_H +#define __FM33LG0XX_FL_CMU_H + +#ifdef __cplusplus +extern "C" { +#endif +/* Includes -------------------------------------------------------------------------------------------*/ +#include "fm33lg0xx_fl_def.h" +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @defgroup CMU CMU + * @brief CMU FL driver + * @{ + */ + +/* Exported types -------------------------------------------------------------------------------------*/ +/** @defgroup CMU_FL_ES_INIT CMU Exported Init structures + * @{ + */ + +/** + * @brief FL CMU Init Sturcture definition + */ + +typedef enum +{ + FL_SYSTEM_CLOCK_RCHF_8M = 0, + FL_SYSTEM_CLOCK_RCHF_16M, + FL_SYSTEM_CLOCK_RCHF_24M, + FL_SYSTEM_CLOCK_PLL_RCHF_32M, + FL_SYSTEM_CLOCK_PLL_RCHF_48M, + FL_SYSTEM_CLOCK_PLL_RCHF_64M, + FL_SYSTEM_CLOCK_RCLP, + FL_SYSTEM_CLOCK_RCLF, + FL_SYSTEM_CLOCK_XTLF, + FL_SYSTEM_CLOCK_XTHF, +} FL_SystemClock; + +/** + * @} + */ +/* Exported constants ---------------------------------------------------------------------------------*/ +/** @defgroup CMU_FL_Exported_Constants CMU Exported Constants + * @{ + */ + +#define CMU_IER_HFDET_IE_Pos (1U) +#define CMU_IER_HFDET_IE_Msk (0x1U << CMU_IER_HFDET_IE_Pos) +#define CMU_IER_HFDET_IE CMU_IER_HFDET_IE_Msk + +#define CMU_ISR_HFDETO_Pos (9U) +#define CMU_ISR_HFDETO_Msk (0x1U << CMU_ISR_HFDETO_Pos) +#define CMU_ISR_HFDETO CMU_ISR_HFDETO_Msk + +#define CMU_ISR_HFDET_IF_Pos (1U) +#define CMU_ISR_HFDET_IF_Msk (0x1U << CMU_ISR_HFDET_IF_Pos) +#define CMU_ISR_HFDET_IF CMU_ISR_HFDET_IF_Msk + +#define CMU_IER_SYSCES_IE_Pos (2U) +#define CMU_IER_SYSCES_IE_Msk (0x1U << CMU_IER_SYSCES_IE_Pos) +#define CMU_IER_SYSCES_IE CMU_IER_SYSCES_IE_Msk + +#define CMU_ISR_SYSCES_IF_Pos (2U) +#define CMU_ISR_SYSCES_IF_Msk (0x1U << CMU_ISR_SYSCES_IF_Pos) +#define CMU_ISR_SYSCES_IF CMU_ISR_SYSCES_IF_Msk + +#define CMU_SYSCLKCR_LSCATS_Pos (27U) +#define CMU_SYSCLKCR_LSCATS_Msk (0x1U << CMU_SYSCLKCR_LSCATS_Pos) +#define CMU_SYSCLKCR_LSCATS CMU_SYSCLKCR_LSCATS_Msk + +#define CMU_SYSCLKCR_SLP_ENEXTI_Pos (25U) +#define CMU_SYSCLKCR_SLP_ENEXTI_Msk (0x1U << CMU_SYSCLKCR_SLP_ENEXTI_Pos) +#define CMU_SYSCLKCR_SLP_ENEXTI CMU_SYSCLKCR_SLP_ENEXTI_Msk + +#define CMU_SYSCLKCR_APBPRES_Pos (16U) +#define CMU_SYSCLKCR_APBPRES_Msk (0x7U << CMU_SYSCLKCR_APBPRES_Pos) +#define CMU_SYSCLKCR_APBPRES CMU_SYSCLKCR_APBPRES_Msk + +#define CMU_SYSCLKCR_AHBPRES_Pos (8U) +#define CMU_SYSCLKCR_AHBPRES_Msk (0x7U << CMU_SYSCLKCR_AHBPRES_Pos) +#define CMU_SYSCLKCR_AHBPRES CMU_SYSCLKCR_AHBPRES_Msk + +#define CMU_SYSCLKCR_STCLKSEL_Pos (6U) +#define CMU_SYSCLKCR_STCLKSEL_Msk (0x3U << CMU_SYSCLKCR_STCLKSEL_Pos) +#define CMU_SYSCLKCR_STCLKSEL CMU_SYSCLKCR_STCLKSEL_Msk + +#define CMU_SYSCLKCR_SYSCLKSEL_Pos (0U) +#define CMU_SYSCLKCR_SYSCLKSEL_Msk (0x7U << CMU_SYSCLKCR_SYSCLKSEL_Pos) +#define CMU_SYSCLKCR_SYSCLKSEL CMU_SYSCLKCR_SYSCLKSEL_Msk + +#define CMU_RCHFCR_FSEL_Pos (16U) +#define CMU_RCHFCR_FSEL_Msk (0xfU << CMU_RCHFCR_FSEL_Pos) +#define CMU_RCHFCR_FSEL CMU_RCHFCR_FSEL_Msk + +#define CMU_RCHFCR_EN_Pos (0U) +#define CMU_RCHFCR_EN_Msk (0x1U << CMU_RCHFCR_EN_Pos) +#define CMU_RCHFCR_EN CMU_RCHFCR_EN_Msk + +#define CMU_RCHFTR_TRIM_Pos (0U) +#define CMU_RCHFTR_TRIM_Msk (0xffU << CMU_RCHFTR_TRIM_Pos) +#define CMU_RCHFTR_TRIM CMU_RCHFTR_TRIM_Msk + +#define CMU_PLLCR_EN_Pos (0U) +#define CMU_PLLCR_EN_Msk (0x1U << CMU_PLLCR_EN_Pos) +#define CMU_PLLCR_EN CMU_PLLCR_EN_Msk + +#define CMU_PLLCR_LOCKED_Pos (7U) +#define CMU_PLLCR_LOCKED_Msk (0x1U << CMU_PLLCR_LOCKED_Pos) +#define CMU_PLLCR_LOCKED CMU_PLLCR_LOCKED_Msk + +#define CMU_PLLCR_INSEL_Pos (1U) +#define CMU_PLLCR_INSEL_Msk (0x1U << CMU_PLLCR_INSEL_Pos) +#define CMU_PLLCR_INSEL CMU_PLLCR_INSEL_Msk + +#define CMU_PLLCR_DB_Pos (16U) +#define CMU_PLLCR_DB_Msk (0x7fU << CMU_PLLCR_DB_Pos) +#define CMU_PLLCR_DB CMU_PLLCR_DB_Msk + +#define CMU_PLLCR_REFPRSC_Pos (4U) +#define CMU_PLLCR_REFPRSC_Msk (0x7U << CMU_PLLCR_REFPRSC_Pos) +#define CMU_PLLCR_REFPRSC CMU_PLLCR_REFPRSC_Msk + +#define CMU_PLLCR_OSEL_Pos (3U) +#define CMU_PLLCR_OSEL_Msk (0x1U << CMU_PLLCR_OSEL_Pos) +#define CMU_PLLCR_OSEL CMU_PLLCR_OSEL_Msk + +#define CMU_RCLPCR_ENB_Pos (0U) +#define CMU_RCLPCR_ENB_Msk (0x1U << CMU_RCLPCR_ENB_Pos) +#define CMU_RCLPCR_ENB CMU_RCLPCR_ENB_Msk + +#define CMU_RCLPTR_TRIM_Pos (0U) +#define CMU_RCLPTR_TRIM_Msk (0xffU << CMU_RCLPTR_TRIM_Pos) +#define CMU_RCLPTR_TRIM CMU_RCLPTR_TRIM_Msk + +#define CMU_LSCLKSEL_SEL_Pos (0U) +#define CMU_LSCLKSEL_SEL_Msk (0xffU << CMU_LSCLKSEL_SEL_Pos) +#define CMU_LSCLKSEL_SEL CMU_LSCLKSEL_SEL_Msk + +#define CMU_XTHFCR_CFG_Pos (8U) +#define CMU_XTHFCR_CFG_Msk (0x1fU << CMU_XTHFCR_CFG_Pos) +#define CMU_XTHFCR_CFG CMU_XTHFCR_CFG_Msk + +#define CMU_XTHFCR_EN_Pos (0U) +#define CMU_XTHFCR_EN_Msk (0x1U << CMU_XTHFCR_EN_Pos) +#define CMU_XTHFCR_EN CMU_XTHFCR_EN_Msk + +#define CMU_RCLFCR_PSC_Pos (16U) +#define CMU_RCLFCR_PSC_Msk (0x3U << CMU_RCLFCR_PSC_Pos) +#define CMU_RCLFCR_PSC CMU_RCLFCR_PSC_Msk + +#define CMU_RCLFCR_EN_Pos (0U) +#define CMU_RCLFCR_EN_Msk (0x1U << CMU_RCLFCR_EN_Pos) +#define CMU_RCLFCR_EN CMU_RCLFCR_EN_Msk + +#define CMU_RCLFTR_TRIM_Pos (0U) +#define CMU_RCLFTR_TRIM_Msk (0xffU << CMU_RCLFTR_TRIM_Pos) +#define CMU_RCLFTR_TRIM CMU_RCLFTR_TRIM_Msk + +#define CMU_OPCCR1_EXTICKS_Pos (30U) +#define CMU_OPCCR1_EXTICKS_Msk (0x1U << CMU_OPCCR1_EXTICKS_Pos) +#define CMU_OPCCR1_EXTICKS CMU_OPCCR1_EXTICKS_Msk + +#define CMU_OPCCR1_LPUART1CKS_Pos (26U) +#define CMU_OPCCR1_LPUART1CKS_Msk (0x3U << CMU_OPCCR1_LPUART1CKS_Pos) +#define CMU_OPCCR1_LPUART1CKS CMU_OPCCR1_LPUART1CKS_Msk + +#define CMU_OPCCR1_LPUART0CKS_Pos (24U) +#define CMU_OPCCR1_LPUART0CKS_Msk (0x3U << CMU_OPCCR1_LPUART0CKS_Pos) +#define CMU_OPCCR1_LPUART0CKS CMU_OPCCR1_LPUART0CKS_Msk + +#define CMU_OPCCR1_LPUART2CKS_Pos (22U) +#define CMU_OPCCR1_LPUART2CKS_Msk (0x3U << CMU_OPCCR1_LPUART2CKS_Pos) +#define CMU_OPCCR1_LPUART2CKS CMU_OPCCR1_LPUART2CKS_Msk + +#define CMU_OPCCR1_I2CCKS_Pos (16U) +#define CMU_OPCCR1_I2CCKS_Msk (0x3U << CMU_OPCCR1_I2CCKS_Pos) +#define CMU_OPCCR1_I2CCKS CMU_OPCCR1_I2CCKS_Msk + +#define CMU_OPCCR1_BT16CKS_Pos (14U) +#define CMU_OPCCR1_BT16CKS_Msk (0x3U << CMU_OPCCR1_BT16CKS_Pos) +#define CMU_OPCCR1_BT16CKS CMU_OPCCR1_BT16CKS_Msk + +#define CMU_OPCCR1_BT32CKS_Pos (12U) +#define CMU_OPCCR1_BT32CKS_Msk (0x3U << CMU_OPCCR1_BT32CKS_Pos) +#define CMU_OPCCR1_BT32CKS CMU_OPCCR1_BT32CKS_Msk + +#define CMU_OPCCR1_LPT16CKS_Pos (10U) +#define CMU_OPCCR1_LPT16CKS_Msk (0x3U << CMU_OPCCR1_LPT16CKS_Pos) +#define CMU_OPCCR1_LPT16CKS CMU_OPCCR1_LPT16CKS_Msk + +#define CMU_OPCCR1_LPT32CKS_Pos (8U) +#define CMU_OPCCR1_LPT32CKS_Msk (0x3U << CMU_OPCCR1_LPT32CKS_Pos) +#define CMU_OPCCR1_LPT32CKS CMU_OPCCR1_LPT32CKS_Msk + +#define CMU_OPCCR1_ATCKS_Pos (7U) +#define CMU_OPCCR1_ATCKS_Msk (0x1U << CMU_OPCCR1_ATCKS_Pos) +#define CMU_OPCCR1_ATCKS CMU_OPCCR1_ATCKS_Msk + +#define CMU_OPCCR1_CANCKS_Pos (4U) +#define CMU_OPCCR1_CANCKS_Msk (0x3U << CMU_OPCCR1_CANCKS_Pos) +#define CMU_OPCCR1_CANCKS CMU_OPCCR1_CANCKS_Msk + +#define CMU_OPCCR1_UART1CKS_Pos (2U) +#define CMU_OPCCR1_UART1CKS_Msk (0x3U << CMU_OPCCR1_UART1CKS_Pos) +#define CMU_OPCCR1_UART1CKS CMU_OPCCR1_UART1CKS_Msk + +#define CMU_OPCCR1_UART0CKS_Pos (0U) +#define CMU_OPCCR1_UART0CKS_Msk (0x3U << CMU_OPCCR1_UART0CKS_Pos) +#define CMU_OPCCR1_UART0CKS CMU_OPCCR1_UART0CKS_Msk + +#define CMU_OPCCR2_RNGPRSC_Pos (10U) +#define CMU_OPCCR2_RNGPRSC_Msk (0x7U << CMU_OPCCR2_RNGPRSC_Pos) +#define CMU_OPCCR2_RNGPRSC CMU_OPCCR2_RNGPRSC_Msk + +#define CMU_OPCCR2_ADCPRSC_Pos (2U) +#define CMU_OPCCR2_ADCPRSC_Msk (0x7U << CMU_OPCCR2_ADCPRSC_Pos) +#define CMU_OPCCR2_ADCPRSC CMU_OPCCR2_ADCPRSC_Msk + +#define CMU_OPCCR2_ADCCKS_Pos (0U) +#define CMU_OPCCR2_ADCCKS_Msk (0x3U << CMU_OPCCR2_ADCCKS_Pos) +#define CMU_OPCCR2_ADCCKS CMU_OPCCR2_ADCCKS_Msk + +#define CMU_CCCR_CCLIE_Pos (1U) +#define CMU_CCCR_CCLIE_Msk (0x1U << CMU_CCCR_CCLIE_Pos) +#define CMU_CCCR_CCLIE CMU_CCCR_CCLIE_Msk + +#define CMU_CCCR_EN_Pos (0U) +#define CMU_CCCR_EN_Msk (0x1U << CMU_CCCR_EN_Pos) +#define CMU_CCCR_EN CMU_CCCR_EN_Msk + +#define CMU_CCFR_CALPSC_Pos (10U) +#define CMU_CCFR_CALPSC_Msk (0x3U << CMU_CCFR_CALPSC_Pos) +#define CMU_CCFR_CALPSC CMU_CCFR_CALPSC_Msk + +#define CMU_CCFR_REFPSC_Pos (8U) +#define CMU_CCFR_REFPSC_Msk (0x3U << CMU_CCFR_REFPSC_Pos) +#define CMU_CCFR_REFPSC CMU_CCFR_REFPSC_Msk + +#define CMU_CCFR_CALSEL_Pos (1U) +#define CMU_CCFR_CALSEL_Msk (0x3U << CMU_CCFR_CALSEL_Pos) +#define CMU_CCFR_CALSEL CMU_CCFR_CALSEL_Msk + +#define CMU_CCFR_REFSEL_Pos (0U) +#define CMU_CCFR_REFSEL_Msk (0x1U << CMU_CCFR_REFSEL_Pos) +#define CMU_CCFR_REFSEL CMU_CCFR_REFSEL_Msk + +#define CMU_CCNR_CCNT_Pos (0U) +#define CMU_CCNR_CCNT_Msk (0xffffU << CMU_CCNR_CCNT_Pos) +#define CMU_CCNR_CCNT CMU_CCNR_CCNT_Msk + +#define CMU_CCISR_CCLIF_Pos (0U) +#define CMU_CCISR_CCLIF_Msk (0x1U << CMU_CCISR_CCLIF_Pos) +#define CMU_CCISR_CCLIF CMU_CCISR_CCLIF_Msk + + + +#define FL_CMU_GROUP1_BUSCLK_LPTIM32 (0x1U << 0U) +#define FL_CMU_GROUP1_BUSCLK_LPTIM16 (0x1U << 1U) +#define FL_CMU_GROUP1_BUSCLK_RTCA (0x1U << 2U) +#define FL_CMU_GROUP1_BUSCLK_PMU (0x1U << 3U) +#define FL_CMU_GROUP1_BUSCLK_SCU (0x1U << 4U) +#define FL_CMU_GROUP1_BUSCLK_IWDT (0x1U << 5U) +#define FL_CMU_GROUP1_BUSCLK_ANAC (0x1U << 6U) +#define FL_CMU_GROUP1_BUSCLK_PAD (0x1U << 7U) +#define FL_CMU_GROUP1_BUSCLK_SVD (0x1U << 8U) +#define FL_CMU_GROUP1_BUSCLK_COMP (0x1U << 9U) +#define FL_CMU_GROUP1_BUSCLK_ATT (0x1U << 10U) +#define FL_CMU_GROUP1_BUSCLK_VREF1P2 (0x1U << 12U) +#define FL_CMU_GROUP2_BUSCLK_CRC (0x1U << 0U) +#define FL_CMU_GROUP2_BUSCLK_RNG (0x1U << 1U) +#define FL_CMU_GROUP2_BUSCLK_AES (0x1U << 2U) +#define FL_CMU_GROUP2_BUSCLK_LCD (0x1U << 3U) +#define FL_CMU_GROUP2_BUSCLK_DMA (0x1U << 4U) +#define FL_CMU_GROUP2_BUSCLK_FLASH (0x1U << 5U) +#define FL_CMU_GROUP2_BUSCLK_RAMBIST (0x1U << 6U) +#define FL_CMU_GROUP2_BUSCLK_WWDT (0x1U << 7U) +#define FL_CMU_GROUP2_BUSCLK_ADC (0x1U << 8U) +#define FL_CMU_GROUP2_BUSCLK_DIVAS (0x1U << 9U) +#define FL_CMU_GROUP2_BUSCLK_DAC (0x1U << 10U) +#define FL_CMU_GROUP3_BUSCLK_SPI0 (0x1U << 0U) +#define FL_CMU_GROUP3_BUSCLK_SPI1 (0x1U << 1U) +#define FL_CMU_GROUP3_BUSCLK_SPI2 (0x1U << 2U) +#define FL_CMU_GROUP3_BUSCLK_UART0 (0x1U << 8U) +#define FL_CMU_GROUP3_BUSCLK_UART1 (0x1U << 9U) +#define FL_CMU_GROUP3_BUSCLK_UART3 (0x1U << 11U) +#define FL_CMU_GROUP3_BUSCLK_UART4 (0x1U << 12U) +#define FL_CMU_GROUP3_BUSCLK_UART5 (0x1U << 13U) +#define FL_CMU_GROUP3_BUSCLK_UARTIR (0x1U << 14U) +#define FL_CMU_GROUP3_BUSCLK_LPUART0 (0x1U << 16U) +#define FL_CMU_GROUP3_BUSCLK_LPUART1 (0x1U << 17U) +#define FL_CMU_GROUP3_BUSCLK_LPUART2 (0x1U << 18U) +#define FL_CMU_GROUP3_BUSCLK_CAN (0x1U << 19U) +#define FL_CMU_GROUP3_BUSCLK_I2C (0x1U << 24U) +#define FL_CMU_GROUP4_BUSCLK_BSTIM32 (0x1U << 0U) +#define FL_CMU_GROUP4_BUSCLK_GPTIM0 (0x1U << 1U) +#define FL_CMU_GROUP4_BUSCLK_GPTIM1 (0x1U << 2U) +#define FL_CMU_GROUP4_BUSCLK_GPTIM2 (0x1U << 3U) +#define FL_CMU_GROUP4_BUSCLK_ATIM (0x1U << 4U) +#define FL_CMU_GROUP4_BUSCLK_BSTIM16 (0x1U << 8U) +#define FL_CMU_GROUP3_OPCLK_EXTI (0x1U << 31U) +#define FL_CMU_GROUP3_OPCLK_FLASH (0x1U << 30U) +#define FL_CMU_GROUP3_OPCLK_LPUART1 (0x1U << 29U) +#define FL_CMU_GROUP3_OPCLK_LPUART0 (0x1U << 28U) +#define FL_CMU_GROUP3_OPCLK_RNG (0x1U << 24U) +#define FL_CMU_GROUP3_OPCLK_LPUART2 (0x1U << 21U) +#define FL_CMU_GROUP3_OPCLK_I2C (0x1U << 20U) +#define FL_CMU_GROUP3_OPCLK_ADC (0x1U << 16U) +#define FL_CMU_GROUP3_OPCLK_ATIM (0x1U << 15U) +#define FL_CMU_GROUP3_OPCLK_CAN (0x1U << 14U) +#define FL_CMU_GROUP3_OPCLK_UART1 (0x1U << 9U) +#define FL_CMU_GROUP3_OPCLK_UART0 (0x1U << 8U) +#define FL_CMU_GROUP3_OPCLK_BSTIM16 (0x1U << 3U) +#define FL_CMU_GROUP3_OPCLK_BSTIM32 (0x1U << 2U) +#define FL_CMU_GROUP3_OPCLK_LPTIM16 (0x1U << 1U) +#define FL_CMU_GROUP3_OPCLK_LPTIM32 (0x1U << 0U) + + + +#define FL_CMU_APBCLK_PSC_DIV1 (0x0U << CMU_SYSCLKCR_APBPRES_Pos) +#define FL_CMU_APBCLK_PSC_DIV2 (0x4U << CMU_SYSCLKCR_APBPRES_Pos) +#define FL_CMU_APBCLK_PSC_DIV4 (0x5U << CMU_SYSCLKCR_APBPRES_Pos) +#define FL_CMU_APBCLK_PSC_DIV8 (0x6U << CMU_SYSCLKCR_APBPRES_Pos) +#define FL_CMU_APBCLK_PSC_DIV16 (0x7U << CMU_SYSCLKCR_APBPRES_Pos) + + +#define FL_CMU_AHBCLK_PSC_DIV1 (0x0U << CMU_SYSCLKCR_AHBPRES_Pos) +#define FL_CMU_AHBCLK_PSC_DIV2 (0x4U << CMU_SYSCLKCR_AHBPRES_Pos) +#define FL_CMU_AHBCLK_PSC_DIV4 (0x5U << CMU_SYSCLKCR_AHBPRES_Pos) +#define FL_CMU_AHBCLK_PSC_DIV8 (0x6U << CMU_SYSCLKCR_AHBPRES_Pos) +#define FL_CMU_AHBCLK_PSC_DIV16 (0x7U << CMU_SYSCLKCR_AHBPRES_Pos) + + +#define FL_CMU_SYSTICK_CLK_SOURCE_SCLK (0x0U << CMU_SYSCLKCR_STCLKSEL_Pos) +#define FL_CMU_SYSTICK_CLK_SOURCE_LSCLK (0x1U << CMU_SYSCLKCR_STCLKSEL_Pos) +#define FL_CMU_SYSTICK_CLK_SOURCE_RCLF (0x2U << CMU_SYSCLKCR_STCLKSEL_Pos) +#define FL_CMU_SYSTICK_CLK_SOURCE_SYSCLK (0x3U << CMU_SYSCLKCR_STCLKSEL_Pos) + + +#define FL_CMU_SYSTEM_CLK_SOURCE_RCHF (0x0U << CMU_SYSCLKCR_SYSCLKSEL_Pos) +#define FL_CMU_SYSTEM_CLK_SOURCE_XTHF (0x1U << CMU_SYSCLKCR_SYSCLKSEL_Pos) +#define FL_CMU_SYSTEM_CLK_SOURCE_PLL (0x2U << CMU_SYSCLKCR_SYSCLKSEL_Pos) +#define FL_CMU_SYSTEM_CLK_SOURCE_RCLF (0x4U << CMU_SYSCLKCR_SYSCLKSEL_Pos) +#define FL_CMU_SYSTEM_CLK_SOURCE_XTLF (0x5U << CMU_SYSCLKCR_SYSCLKSEL_Pos) +#define FL_CMU_SYSTEM_CLK_SOURCE_RCLP (0x6U << CMU_SYSCLKCR_SYSCLKSEL_Pos) + + +#define FL_CMU_RCHF_FREQUENCY_8MHZ (0x0U << CMU_RCHFCR_FSEL_Pos) +#define FL_CMU_RCHF_FREQUENCY_16MHZ (0x1U << CMU_RCHFCR_FSEL_Pos) +#define FL_CMU_RCHF_FREQUENCY_24MHZ (0x2U << CMU_RCHFCR_FSEL_Pos) +#define FL_CMU_RCHF_FREQUENCY_32MHZ (0x3U << CMU_RCHFCR_FSEL_Pos) + + +#define FL_CMU_PLL_CLK_SOURCE_RCHF (0x0U << CMU_PLLCR_INSEL_Pos) +#define FL_CMU_PLL_CLK_SOURCE_XTHF (0x1U << CMU_PLLCR_INSEL_Pos) + + +#define FL_CMU_PLL_PSC_DIV1 (0x0U << CMU_PLLCR_REFPRSC_Pos) +#define FL_CMU_PLL_PSC_DIV2 (0x1U << CMU_PLLCR_REFPRSC_Pos) +#define FL_CMU_PLL_PSC_DIV4 (0x2U << CMU_PLLCR_REFPRSC_Pos) +#define FL_CMU_PLL_PSC_DIV8 (0x3U << CMU_PLLCR_REFPRSC_Pos) +#define FL_CMU_PLL_PSC_DIV12 (0x4U << CMU_PLLCR_REFPRSC_Pos) +#define FL_CMU_PLL_PSC_DIV16 (0x5U << CMU_PLLCR_REFPRSC_Pos) +#define FL_CMU_PLL_PSC_DIV24 (0x6U << CMU_PLLCR_REFPRSC_Pos) +#define FL_CMU_PLL_PSC_DIV32 (0x7U << CMU_PLLCR_REFPRSC_Pos) + + +#define FL_CMU_PLL_OUTPUT_X1 (0x0U << CMU_PLLCR_OSEL_Pos) +#define FL_CMU_PLL_OUTPUT_X2 (0x1U << CMU_PLLCR_OSEL_Pos) + + +#define FL_CMU_LSCLK_CLK_SOURCE_RCLP (0x55U << CMU_LSCLKSEL_SEL_Pos) +#define FL_CMU_LSCLK_CLK_SOURCE_XTLF (0xAAU << CMU_LSCLKSEL_SEL_Pos) + +#define FL_CMU_RCLF_PSC_DIV1 (0x0U << CMU_RCLFCR_PSC_Pos) +#define FL_CMU_RCLF_PSC_DIV4 (0x1U << CMU_RCLFCR_PSC_Pos) +#define FL_CMU_RCLF_PSC_DIV8 (0x2U << CMU_RCLFCR_PSC_Pos) +#define FL_CMU_RCLF_PSC_DIV16 (0x3U << CMU_RCLFCR_PSC_Pos) + + +#define FL_CMU_EXTI_CLK_SOURCE_LSCLK (0x1U << CMU_OPCCR1_EXTICKS_Pos) +#define FL_CMU_EXTI_CLK_SOURCE_HCLK (0x0U << CMU_OPCCR1_EXTICKS_Pos) + + +#define FL_CMU_LPUART1_CLK_SOURCE_LSCLK (0x0U << CMU_OPCCR1_LPUART1CKS_Pos) +#define FL_CMU_LPUART1_CLK_SOURCE_RCHF (0x1U << CMU_OPCCR1_LPUART1CKS_Pos) +#define FL_CMU_LPUART1_CLK_SOURCE_RCLF (0x2U << CMU_OPCCR1_LPUART1CKS_Pos) + + +#define FL_CMU_LPUART0_CLK_SOURCE_LSCLK (0x0U << CMU_OPCCR1_LPUART0CKS_Pos) +#define FL_CMU_LPUART0_CLK_SOURCE_RCHF (0x1U << CMU_OPCCR1_LPUART0CKS_Pos) +#define FL_CMU_LPUART0_CLK_SOURCE_RCLF (0x2U << CMU_OPCCR1_LPUART0CKS_Pos) + + +#define FL_CMU_LPUART2_CLK_SOURCE_LSCLK (0x0U << CMU_OPCCR1_LPUART2CKS_Pos) +#define FL_CMU_LPUART2_CLK_SOURCE_RCHF (0x1U << CMU_OPCCR1_LPUART2CKS_Pos) +#define FL_CMU_LPUART2_CLK_SOURCE_RCLF (0x2U << CMU_OPCCR1_LPUART2CKS_Pos) + +#define FL_CMU_LPUART_CLK_SOURCE_LSCLK (0x0U) +#define FL_CMU_LPUART_CLK_SOURCE_RCHF (0x1U) +#define FL_CMU_LPUART_CLK_SOURCE_RCLF (0x2U) + + +#define FL_CMU_I2C_CLK_SOURCE_APBCLK (0x0U << CMU_OPCCR1_I2CCKS_Pos) +#define FL_CMU_I2C_CLK_SOURCE_RCHF (0x1U << CMU_OPCCR1_I2CCKS_Pos) +#define FL_CMU_I2C_CLK_SOURCE_SYSCLK (0x2U << CMU_OPCCR1_I2CCKS_Pos) +#define FL_CMU_I2C_CLK_SOURCE_RCLF (0x3U << CMU_OPCCR1_I2CCKS_Pos) + + +#define FL_CMU_BSTIM16_CLK_SOURCE_APBCLK (0x0U << CMU_OPCCR1_BT16CKS_Pos) +#define FL_CMU_BSTIM16_CLK_SOURCE_LSCLK (0x1U << CMU_OPCCR1_BT16CKS_Pos) +#define FL_CMU_BSTIM16_CLK_SOURCE_RCLP (0x2U << CMU_OPCCR1_BT16CKS_Pos) +#define FL_CMU_BSTIM16_CLK_SOURCE_RCLF (0x3U << CMU_OPCCR1_BT16CKS_Pos) + + +#define FL_CMU_BSTIM32_CLK_SOURCE_APBCLK (0x0U << CMU_OPCCR1_BT32CKS_Pos) +#define FL_CMU_BSTIM32_CLK_SOURCE_LSCLK (0x1U << CMU_OPCCR1_BT32CKS_Pos) +#define FL_CMU_BSTIM32_CLK_SOURCE_RCLP (0x2U << CMU_OPCCR1_BT32CKS_Pos) +#define FL_CMU_BSTIM32_CLK_SOURCE_RCLF (0x3U << CMU_OPCCR1_BT32CKS_Pos) + + +#define FL_CMU_LPTIM16_CLK_SOURCE_APBCLK (0x0U << CMU_OPCCR1_LPT16CKS_Pos) +#define FL_CMU_LPTIM16_CLK_SOURCE_LSCLK (0x1U << CMU_OPCCR1_LPT16CKS_Pos) +#define FL_CMU_LPTIM16_CLK_SOURCE_RCLP (0x2U << CMU_OPCCR1_LPT16CKS_Pos) +#define FL_CMU_LPTIM16_CLK_SOURCE_RCLF (0x3U << CMU_OPCCR1_LPT16CKS_Pos) + + +#define FL_CMU_LPTIM32_CLK_SOURCE_APBCLK (0x0U << CMU_OPCCR1_LPT32CKS_Pos) +#define FL_CMU_LPTIM32_CLK_SOURCE_LSCLK (0x1U << CMU_OPCCR1_LPT32CKS_Pos) +#define FL_CMU_LPTIM32_CLK_SOURCE_RCLP (0x2U << CMU_OPCCR1_LPT32CKS_Pos) +#define FL_CMU_LPTIM32_CLK_SOURCE_RCLF (0x3U << CMU_OPCCR1_LPT32CKS_Pos) + + +#define FL_CMU_ATIM_CLK_SOURCE_APBCLK (0x0U << CMU_OPCCR1_ATCKS_Pos) +#define FL_CMU_ATIM_CLK_SOURCE_PLL_X2 (0x1U << CMU_OPCCR1_ATCKS_Pos) + + +#define FL_CMU_CAN_CLK_SOURCE_RCHF (0x0U << CMU_OPCCR1_CANCKS_Pos) +#define FL_CMU_CAN_CLK_SOURCE_XTHF (0x1U << CMU_OPCCR1_CANCKS_Pos) +#define FL_CMU_CAN_CLK_SOURCE_PLL (0x2U << CMU_OPCCR1_CANCKS_Pos) +#define FL_CMU_CAN_CLK_SOURCE_APBCLK (0x3U << CMU_OPCCR1_CANCKS_Pos) + + +#define FL_CMU_UART1_CLK_SOURCE_APBCLK (0x0U << CMU_OPCCR1_UART1CKS_Pos) +#define FL_CMU_UART1_CLK_SOURCE_RCHF (0x1U << CMU_OPCCR1_UART1CKS_Pos) +#define FL_CMU_UART1_CLK_SOURCE_SYSCLK (0x2U << CMU_OPCCR1_UART1CKS_Pos) +#define FL_CMU_UART1_CLK_SOURCE_XTHF (0x3U << CMU_OPCCR1_UART1CKS_Pos) + + +#define FL_CMU_UART0_CLK_SOURCE_APBCLK (0x0U << CMU_OPCCR1_UART0CKS_Pos) +#define FL_CMU_UART0_CLK_SOURCE_RCHF (0x1U << CMU_OPCCR1_UART0CKS_Pos) +#define FL_CMU_UART0_CLK_SOURCE_SYSCLK (0x2U << CMU_OPCCR1_UART0CKS_Pos) +#define FL_CMU_UART0_CLK_SOURCE_XTHF (0x3U << CMU_OPCCR1_UART0CKS_Pos) + + +#define FL_CMU_RNG_PSC_DIV1 (0x0U << CMU_OPCCR2_RNGPRSC_Pos) +#define FL_CMU_RNG_PSC_DIV2 (0x1U << CMU_OPCCR2_RNGPRSC_Pos) +#define FL_CMU_RNG_PSC_DIV4 (0x2U << CMU_OPCCR2_RNGPRSC_Pos) +#define FL_CMU_RNG_PSC_DIV8 (0x3U << CMU_OPCCR2_RNGPRSC_Pos) +#define FL_CMU_RNG_PSC_DIV16 (0x4U << CMU_OPCCR2_RNGPRSC_Pos) +#define FL_CMU_RNG_PSC_DIV32 (0x5U << CMU_OPCCR2_RNGPRSC_Pos) + + +#define FL_CMU_ADC_PSC_DIV1 (0x0U << CMU_OPCCR2_ADCPRSC_Pos) +#define FL_CMU_ADC_PSC_DIV2 (0x1U << CMU_OPCCR2_ADCPRSC_Pos) +#define FL_CMU_ADC_PSC_DIV4 (0x2U << CMU_OPCCR2_ADCPRSC_Pos) +#define FL_CMU_ADC_PSC_DIV8 (0x3U << CMU_OPCCR2_ADCPRSC_Pos) +#define FL_CMU_ADC_PSC_DIV16 (0x4U << CMU_OPCCR2_ADCPRSC_Pos) +#define FL_CMU_ADC_PSC_DIV32 (0x5U << CMU_OPCCR2_ADCPRSC_Pos) + + +#define FL_CMU_ADC_CLK_SOURCE_RCLF (0x0U << CMU_OPCCR2_ADCCKS_Pos) +#define FL_CMU_ADC_CLK_SOURCE_RCHF (0x1U << CMU_OPCCR2_ADCCKS_Pos) +#define FL_CMU_ADC_CLK_SOURCE_XTHF (0x2U << CMU_OPCCR2_ADCCKS_Pos) +#define FL_CMU_ADC_CLK_SOURCE_PLL (0x3U << CMU_OPCCR2_ADCCKS_Pos) + + +#define FL_CMU_CCL_CALCLK_PSC_DIV1 (0x0U << CMU_CCFR_CALPSC_Pos) +#define FL_CMU_CCL_CALCLK_PSC_DIV2 (0x1U << CMU_CCFR_CALPSC_Pos) +#define FL_CMU_CCL_CALCLK_PSC_DIV4 (0x2U << CMU_CCFR_CALPSC_Pos) +#define FL_CMU_CCL_CALCLK_PSC_DIV8 (0x3U << CMU_CCFR_CALPSC_Pos) + + +#define FL_CMU_CCL_REFCLK_PSC_DIV8 (0x0U << CMU_CCFR_REFPSC_Pos) +#define FL_CMU_CCL_REFCLK_PSC_DIV16 (0x1U << CMU_CCFR_REFPSC_Pos) +#define FL_CMU_CCL_REFCLK_PSC_DIV32 (0x2U << CMU_CCFR_REFPSC_Pos) +#define FL_CMU_CCL_REFCLK_PSC_DIV64 (0x3U << CMU_CCFR_REFPSC_Pos) + + +#define FL_CMU_CCL_CALCLK_SOURCE_RCHF (0x1U << CMU_CCFR_CALSEL_Pos) +#define FL_CMU_CCL_CALCLK_SOURCE_RCLF (0x2U << CMU_CCFR_CALSEL_Pos) +#define FL_CMU_CCL_CALCLK_SOURCE_XTHF (0x3U << CMU_CCFR_CALSEL_Pos) + + +#define FL_CMU_CCL_REFCLK_SOURCE_XTLF (0x0U << CMU_CCFR_REFSEL_Pos) +#define FL_CMU_CCL_REFCLK_SOURCE_RCLP (0x1U << CMU_CCFR_REFSEL_Pos) + + +/** + * @} + */ +/* Exported functions ---------------------------------------------------------------------------------*/ +/** @defgroup CMU_FL_Exported_Functions CMU Exported Functions + * @{ + */ + +/** + * @brief Enable XTHF Fail Interrupt + * @rmtoll IER HFDET_IE FL_CMU_EnableIT_XTHFFail + * @retval None + */ +__STATIC_INLINE void FL_CMU_EnableIT_XTHFFail(void) +{ + SET_BIT(CMU->IER, CMU_IER_HFDET_IE_Msk); +} + +/** + * @brief Get XTHF Fail Interrupt Enable Status + * @rmtoll IER HFDET_IE FL_CMU_IsEnabledIT_XTHFFail + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CMU_IsEnabledIT_XTHFFail(void) +{ + return (uint32_t)(READ_BIT(CMU->IER, CMU_IER_HFDET_IE_Msk) == CMU_IER_HFDET_IE_Msk); +} + +/** + * @brief Disable XTHF Fail Interrupt + * @rmtoll IER HFDET_IE FL_CMU_DisableIT_XTHFFail + * @retval None + */ +__STATIC_INLINE void FL_CMU_DisableIT_XTHFFail(void) +{ + CLEAR_BIT(CMU->IER, CMU_IER_HFDET_IE_Msk); +} + +/** + * @brief Get XTHF Vibrating Output + * @rmtoll ISR HFDETO FL_CMU_IsActiveFlag_XTHFFailOutput + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CMU_IsActiveFlag_XTHFFailOutput(void) +{ + return (uint32_t)(READ_BIT(CMU->ISR, CMU_ISR_HFDETO_Msk) == (CMU_ISR_HFDETO_Msk)); +} + +/** + * @brief Get XTHF Vibrating Flag + * @rmtoll ISR HFDET_IF FL_CMU_IsActiveFlag_XTHFFail + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CMU_IsActiveFlag_XTHFFail(void) +{ + return (uint32_t)(READ_BIT(CMU->ISR, CMU_ISR_HFDET_IF_Msk) == (CMU_ISR_HFDET_IF_Msk)); +} + +/** + * @brief Clear XTHF Vibrating Flag + * @rmtoll ISR HFDET_IF FL_CMU_ClearFlag_XTHFFail + * @retval None + */ +__STATIC_INLINE void FL_CMU_ClearFlag_XTHFFail(void) +{ + WRITE_REG(CMU->ISR, CMU_ISR_HFDET_IF_Msk); +} + +/** + * @brief Enable SYSCLK select Fail Interrupt + * @rmtoll IER SYSCES_IE FL_CMU_EnableIT_SYSCLKSELError + * @retval None + */ +__STATIC_INLINE void FL_CMU_EnableIT_SYSCLKSELError(void) +{ + SET_BIT(CMU->IER, CMU_IER_SYSCES_IE_Msk); +} + +/** + * @brief Get SYSCLK select Fail Interrupt Enable Status + * @rmtoll IER SYSCES_IE FL_CMU_IsEnabledIT_SYSCLKSELError + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CMU_IsEnabledIT_SYSCLKSELError(void) +{ + return (uint32_t)(READ_BIT(CMU->IER, CMU_IER_SYSCES_IE_Msk) == CMU_IER_SYSCES_IE_Msk); +} + +/** + * @brief Disable SYSCLK select Fail Interrupt + * @rmtoll IER SYSCES_IE FL_CMU_DisableIT_SYSCLKSELError + * @retval None + */ +__STATIC_INLINE void FL_CMU_DisableIT_SYSCLKSELError(void) +{ + CLEAR_BIT(CMU->IER, CMU_IER_SYSCES_IE_Msk); +} + +/** + * @brief Get SYSCLK select Vibrating Flag + * @rmtoll ISR SYSCES_IF FL_CMU_IsActiveFlag_SYSCLKSELError + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CMU_IsActiveFlag_SYSCLKSELError(void) +{ + return (uint32_t)(READ_BIT(CMU->ISR, CMU_ISR_SYSCES_IF_Msk) == (CMU_ISR_SYSCES_IF_Msk)); +} + +/** + * @brief Clear SYSCLK select Vibrating Flag + * @rmtoll ISR SYSCES_IF FL_CMU_ClearFlag_SYSCLKSELError + * @retval None + */ +__STATIC_INLINE void FL_CMU_ClearFlag_SYSCLKSELError(void) +{ + WRITE_REG(CMU->ISR, CMU_ISR_SYSCES_IF_Msk); +} + +/** + * @brief Enable LSCLK Auto Switch + * @rmtoll SYSCLKCR LSCATS FL_CMU_EnableLSCLKAutoSwitch + * @retval None + */ +__STATIC_INLINE void FL_CMU_EnableLSCLKAutoSwitch(void) +{ + SET_BIT(CMU->SYSCLKCR, CMU_SYSCLKCR_LSCATS_Msk); +} + +/** + * @brief Get LSCLK Auto Switch Enable Status + * @rmtoll SYSCLKCR LSCATS FL_CMU_IsEnabledLSCLKAutoSwitch + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CMU_IsEnabledLSCLKAutoSwitch(void) +{ + return (uint32_t)(READ_BIT(CMU->SYSCLKCR, CMU_SYSCLKCR_LSCATS_Msk) == CMU_SYSCLKCR_LSCATS_Msk); +} + +/** + * @brief Disable LSCLK Auto Switch + * @rmtoll SYSCLKCR LSCATS FL_CMU_DisableLSCLKAutoSwitch + * @retval None + */ +__STATIC_INLINE void FL_CMU_DisableLSCLKAutoSwitch(void) +{ + CLEAR_BIT(CMU->SYSCLKCR, CMU_SYSCLKCR_LSCATS_Msk); +} + +/** + * @brief Enable Sleep/DeepSleep Mode External Interrupt + * @rmtoll SYSCLKCR SLP_ENEXTI FL_CMU_EnableEXTIOnSleep + * @retval None + */ +__STATIC_INLINE void FL_CMU_EnableEXTIOnSleep(void) +{ + SET_BIT(CMU->SYSCLKCR, CMU_SYSCLKCR_SLP_ENEXTI_Msk); +} + +/** + * @brief Get Sleep/DeepSleep Mode External Interrupt Enable Status + * @rmtoll SYSCLKCR SLP_ENEXTI FL_CMU_IsEnabledEXTIOnSleep + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CMU_IsEnabledEXTIOnSleep(void) +{ + return (uint32_t)(READ_BIT(CMU->SYSCLKCR, CMU_SYSCLKCR_SLP_ENEXTI_Msk) == CMU_SYSCLKCR_SLP_ENEXTI_Msk); +} + +/** + * @brief Disable Sleep/DeepSleep Mode External Interrupt + * @rmtoll SYSCLKCR SLP_ENEXTI FL_CMU_DisableEXTIOnSleep + * @retval None + */ +__STATIC_INLINE void FL_CMU_DisableEXTIOnSleep(void) +{ + CLEAR_BIT(CMU->SYSCLKCR, CMU_SYSCLKCR_SLP_ENEXTI_Msk); +} + +/** + * @brief Set APB Prescaler + * @rmtoll SYSCLKCR APBPRES FL_CMU_SetAPBPrescaler + * @param prescaler This parameter can be one of the following values: + * @arg @ref FL_CMU_APBCLK_PSC_DIV1 + * @arg @ref FL_CMU_APBCLK_PSC_DIV2 + * @arg @ref FL_CMU_APBCLK_PSC_DIV4 + * @arg @ref FL_CMU_APBCLK_PSC_DIV8 + * @arg @ref FL_CMU_APBCLK_PSC_DIV16 + * @retval None + */ +__STATIC_INLINE void FL_CMU_SetAPBPrescaler(uint32_t prescaler) +{ + MODIFY_REG(CMU->SYSCLKCR, CMU_SYSCLKCR_APBPRES_Msk, prescaler); +} + +/** + * @brief Get APB Prescaler + * @rmtoll SYSCLKCR APBPRES FL_CMU_GetAPBPrescaler + * @retval Returned value can be one of the following values: + * @arg @ref FL_CMU_APBCLK_PSC_DIV1 + * @arg @ref FL_CMU_APBCLK_PSC_DIV2 + * @arg @ref FL_CMU_APBCLK_PSC_DIV4 + * @arg @ref FL_CMU_APBCLK_PSC_DIV8 + * @arg @ref FL_CMU_APBCLK_PSC_DIV16 + */ +__STATIC_INLINE uint32_t FL_CMU_GetAPBPrescaler(void) +{ + return (uint32_t)(READ_BIT(CMU->SYSCLKCR, CMU_SYSCLKCR_APBPRES_Msk)); +} + +/** + * @brief Set AHB Prescaler + * @rmtoll SYSCLKCR AHBPRES FL_CMU_SetAHBPrescaler + * @param prescaler This parameter can be one of the following values: + * @arg @ref FL_CMU_AHBCLK_PSC_DIV1 + * @arg @ref FL_CMU_AHBCLK_PSC_DIV2 + * @arg @ref FL_CMU_AHBCLK_PSC_DIV4 + * @arg @ref FL_CMU_AHBCLK_PSC_DIV8 + * @arg @ref FL_CMU_AHBCLK_PSC_DIV16 + * @retval None + */ +__STATIC_INLINE void FL_CMU_SetAHBPrescaler(uint32_t prescaler) +{ + MODIFY_REG(CMU->SYSCLKCR, CMU_SYSCLKCR_AHBPRES_Msk, prescaler); +} + +/** + * @brief Get AHB Prescaler + * @rmtoll SYSCLKCR AHBPRES FL_CMU_GetAHBPrescaler + * @retval Returned value can be one of the following values: + * @arg @ref FL_CMU_AHBCLK_PSC_DIV1 + * @arg @ref FL_CMU_AHBCLK_PSC_DIV2 + * @arg @ref FL_CMU_AHBCLK_PSC_DIV4 + * @arg @ref FL_CMU_AHBCLK_PSC_DIV8 + * @arg @ref FL_CMU_AHBCLK_PSC_DIV16 + */ +__STATIC_INLINE uint32_t FL_CMU_GetAHBPrescaler(void) +{ + return (uint32_t)(READ_BIT(CMU->SYSCLKCR, CMU_SYSCLKCR_AHBPRES_Msk)); +} + +/** + * @brief Set SysTick Clock Source + * @rmtoll SYSCLKCR STCLKSEL FL_CMU_SetSysTickClockSource + * @param clock This parameter can be one of the following values: + * @arg @ref FL_CMU_SYSTICK_CLK_SOURCE_SCLK + * @arg @ref FL_CMU_SYSTICK_CLK_SOURCE_LSCLK + * @arg @ref FL_CMU_SYSTICK_CLK_SOURCE_RCLF + * @arg @ref FL_CMU_SYSTICK_CLK_SOURCE_SYSCLK + * @retval None + */ +__STATIC_INLINE void FL_CMU_SetSysTickClockSource(uint32_t clock) +{ + MODIFY_REG(CMU->SYSCLKCR, CMU_SYSCLKCR_STCLKSEL_Msk, clock); +} + +/** + * @brief Get SysTick Clock Source + * @rmtoll SYSCLKCR STCLKSEL FL_CMU_GetSysTickClockSource + * @retval Returned value can be one of the following values: + * @arg @ref FL_CMU_SYSTICK_CLK_SOURCE_SCLK + * @arg @ref FL_CMU_SYSTICK_CLK_SOURCE_LSCLK + * @arg @ref FL_CMU_SYSTICK_CLK_SOURCE_RCLF + * @arg @ref FL_CMU_SYSTICK_CLK_SOURCE_SYSCLK + */ +__STATIC_INLINE uint32_t FL_CMU_GetSysTickClockSource(void) +{ + return (uint32_t)(READ_BIT(CMU->SYSCLKCR, CMU_SYSCLKCR_STCLKSEL_Msk)); +} + +/** + * @brief Set System Clock Source + * @rmtoll SYSCLKCR SYSCLKSEL FL_CMU_SetSystemClockSource + * @param clock This parameter can be one of the following values: + * @arg @ref FL_CMU_SYSTEM_CLK_SOURCE_RCHF + * @arg @ref FL_CMU_SYSTEM_CLK_SOURCE_XTHF + * @arg @ref FL_CMU_SYSTEM_CLK_SOURCE_PLL + * @arg @ref FL_CMU_SYSTEM_CLK_SOURCE_RCLF + * @arg @ref FL_CMU_SYSTEM_CLK_SOURCE_XTLF + * @arg @ref FL_CMU_SYSTEM_CLK_SOURCE_RCLP + * @retval None + */ +__STATIC_INLINE void FL_CMU_SetSystemClockSource(uint32_t clock) +{ + MODIFY_REG(CMU->SYSCLKCR, CMU_SYSCLKCR_SYSCLKSEL_Msk, clock); +} + +/** + * @brief Set System Clock Source Setting + * @rmtoll SYSCLKCR SYSCLKSEL FL_CMU_GetSystemClockSource + * @retval Returned value can be one of the following values: + * @arg @ref FL_CMU_SYSTEM_CLK_SOURCE_RCHF + * @arg @ref FL_CMU_SYSTEM_CLK_SOURCE_XTHF + * @arg @ref FL_CMU_SYSTEM_CLK_SOURCE_PLL + * @arg @ref FL_CMU_SYSTEM_CLK_SOURCE_RCLF + * @arg @ref FL_CMU_SYSTEM_CLK_SOURCE_XTLF + * @arg @ref FL_CMU_SYSTEM_CLK_SOURCE_RCLP + */ +__STATIC_INLINE uint32_t FL_CMU_GetSystemClockSource(void) +{ + return (uint32_t)(READ_BIT(CMU->SYSCLKCR, CMU_SYSCLKCR_SYSCLKSEL_Msk)); +} + +/** + * @brief Set RCHF Frequency + * @rmtoll RCHFCR FSEL FL_CMU_RCHF_SetFrequency + * @param frequency This parameter can be one of the following values: + * @arg @ref FL_CMU_RCHF_FREQUENCY_8MHZ + * @arg @ref FL_CMU_RCHF_FREQUENCY_16MHZ + * @arg @ref FL_CMU_RCHF_FREQUENCY_24MHZ + * @arg @ref FL_CMU_RCHF_FREQUENCY_32MHZ + * @retval None + */ +__STATIC_INLINE void FL_CMU_RCHF_SetFrequency(uint32_t frequency) +{ + MODIFY_REG(CMU->RCHFCR, CMU_RCHFCR_FSEL_Msk, frequency); +} + +/** + * @brief Get RCHF Frequency Setting + * @rmtoll RCHFCR FSEL FL_CMU_RCHF_GetFrequency + * @retval Returned value can be one of the following values: + * @arg @ref FL_CMU_RCHF_FREQUENCY_8MHZ + * @arg @ref FL_CMU_RCHF_FREQUENCY_16MHZ + * @arg @ref FL_CMU_RCHF_FREQUENCY_24MHZ + * @arg @ref FL_CMU_RCHF_FREQUENCY_32MHZ + */ +__STATIC_INLINE uint32_t FL_CMU_RCHF_GetFrequency(void) +{ + return (uint32_t)(READ_BIT(CMU->RCHFCR, CMU_RCHFCR_FSEL_Msk)); +} + +/** + * @brief Enable RCHF + * @rmtoll RCHFCR EN FL_CMU_RCHF_Enable + * @retval None + */ +__STATIC_INLINE void FL_CMU_RCHF_Enable(void) +{ + SET_BIT(CMU->RCHFCR, CMU_RCHFCR_EN_Msk); +} + +/** + * @brief Get RCHF Enable Status + * @rmtoll RCHFCR EN FL_CMU_RCHF_IsEnabled + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CMU_RCHF_IsEnabled(void) +{ + return (uint32_t)(READ_BIT(CMU->RCHFCR, CMU_RCHFCR_EN_Msk) == CMU_RCHFCR_EN_Msk); +} + +/** + * @brief Disable RCHF + * @rmtoll RCHFCR EN FL_CMU_RCHF_Disable + * @retval None + */ +__STATIC_INLINE void FL_CMU_RCHF_Disable(void) +{ + CLEAR_BIT(CMU->RCHFCR, CMU_RCHFCR_EN_Msk); +} + +/** + * @brief Set RCHF Freqency Trim Value + * @rmtoll RCHFTR TRIM FL_CMU_RCHF_WriteTrimValue + * @param value TrimValue The value of RCHF trim + * @retval None + */ +__STATIC_INLINE void FL_CMU_RCHF_WriteTrimValue(uint32_t value) +{ + MODIFY_REG(CMU->RCHFTR, (0xffU << 0U), (value << 0U)); +} + +/** + * @brief Get RCHF Freqency Trim Value + * @rmtoll RCHFTR TRIM FL_CMU_RCHF_ReadTrimValue + * @retval The value of RCHF trim + */ +__STATIC_INLINE uint32_t FL_CMU_RCHF_ReadTrimValue(void) +{ + return (uint32_t)(READ_BIT(CMU->RCHFTR, (0xffU << 0U)) >> 0U); +} + +/** + * @brief Enable PLL + * @rmtoll PLLCR EN FL_CMU_PLL_Enable + * @retval None + */ +__STATIC_INLINE void FL_CMU_PLL_Enable(void) +{ + SET_BIT(CMU->PLLCR, CMU_PLLCR_EN_Msk); +} + +/** + * @brief Get PLL Enable Status + * @rmtoll PLLCR EN FL_CMU_PLL_Disable + * @retval None + */ +__STATIC_INLINE void FL_CMU_PLL_Disable(void) +{ + CLEAR_BIT(CMU->PLLCR, CMU_PLLCR_EN_Msk); +} + +/** + * @brief Disable PLL + * @rmtoll PLLCR EN FL_CMU_PLL_IsEnabled + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CMU_PLL_IsEnabled(void) +{ + return (uint32_t)(READ_BIT(CMU->PLLCR, CMU_PLLCR_EN_Msk) == CMU_PLLCR_EN_Msk); +} + +/** + * @brief Get PLL Ready Status + * @rmtoll PLLCR LOCKED FL_CMU_IsActiveFlag_PLLReady + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CMU_IsActiveFlag_PLLReady(void) +{ + return (uint32_t)(READ_BIT(CMU->PLLCR, CMU_PLLCR_LOCKED_Msk) == (CMU_PLLCR_LOCKED_Msk)); +} + +/** + * @brief Set PLL Input Source + * @rmtoll PLLCR INSEL FL_CMU_PLL_SetClockSource + * @param clock This parameter can be one of the following values: + * @arg @ref FL_CMU_PLL_CLK_SOURCE_RCHF + * @arg @ref FL_CMU_PLL_CLK_SOURCE_XTHF + * @retval None + */ +__STATIC_INLINE void FL_CMU_PLL_SetClockSource(uint32_t clock) +{ + MODIFY_REG(CMU->PLLCR, CMU_PLLCR_INSEL_Msk, clock); +} + +/** + * @brief Get PLL Input Source Setting + * @rmtoll PLLCR INSEL FL_CMU_PLL_GetClockSource + * @retval Returned value can be one of the following values: + * @arg @ref FL_CMU_PLL_CLK_SOURCE_RCHF + * @arg @ref FL_CMU_PLL_CLK_SOURCE_XTHF + */ +__STATIC_INLINE uint32_t FL_CMU_PLL_GetClockSource(void) +{ + return (uint32_t)(READ_BIT(CMU->PLLCR, CMU_PLLCR_INSEL_Msk)); +} + +/** + * @brief Set PLL Multiplier + * @rmtoll PLLCR DB FL_CMU_PLL_WriteMultiplier + * @param multiplier + * @retval None + */ +__STATIC_INLINE void FL_CMU_PLL_WriteMultiplier(uint32_t multiplier) +{ + MODIFY_REG(CMU->PLLCR, (0x7fU << 16U), (multiplier << 16U)); +} + +/** + * @brief Get PLL Multiplier Setting + * @rmtoll PLLCR DB FL_CMU_PLL_ReadMultiplier + * @retval + */ +__STATIC_INLINE uint32_t FL_CMU_PLL_ReadMultiplier(void) +{ + return (uint32_t)(READ_BIT(CMU->PLLCR, (0x7fU << 16U)) >> 16U); +} + +/** + * @brief Set PLL Prescaler + * @rmtoll PLLCR REFPRSC FL_CMU_PLL_SetPrescaler + * @param prescaler This parameter can be one of the following values: + * @arg @ref FL_CMU_PLL_PSC_DIV1 + * @arg @ref FL_CMU_PLL_PSC_DIV2 + * @arg @ref FL_CMU_PLL_PSC_DIV4 + * @arg @ref FL_CMU_PLL_PSC_DIV8 + * @arg @ref FL_CMU_PLL_PSC_DIV12 + * @arg @ref FL_CMU_PLL_PSC_DIV16 + * @arg @ref FL_CMU_PLL_PSC_DIV24 + * @arg @ref FL_CMU_PLL_PSC_DIV32 + * @retval None + */ +__STATIC_INLINE void FL_CMU_PLL_SetPrescaler(uint32_t prescaler) +{ + MODIFY_REG(CMU->PLLCR, CMU_PLLCR_REFPRSC_Msk, prescaler); +} + +/** + * @brief Get PLL Prescaler Setting + * @rmtoll PLLCR REFPRSC FL_CMU_PLL_GetPrescaler + * @retval Returned value can be one of the following values: + * @arg @ref FL_CMU_PLL_PSC_DIV1 + * @arg @ref FL_CMU_PLL_PSC_DIV2 + * @arg @ref FL_CMU_PLL_PSC_DIV4 + * @arg @ref FL_CMU_PLL_PSC_DIV8 + * @arg @ref FL_CMU_PLL_PSC_DIV12 + * @arg @ref FL_CMU_PLL_PSC_DIV16 + * @arg @ref FL_CMU_PLL_PSC_DIV24 + * @arg @ref FL_CMU_PLL_PSC_DIV32 + */ +__STATIC_INLINE uint32_t FL_CMU_PLL_GetPrescaler(void) +{ + return (uint32_t)(READ_BIT(CMU->PLLCR, CMU_PLLCR_REFPRSC_Msk)); +} + +/** + * @brief Set PLL Digital Domain Output + * @rmtoll PLLCR OSEL FL_CMU_PLL_SetOutputMultiplier + * @param multiplier This parameter can be one of the following values: + * @arg @ref FL_CMU_PLL_OUTPUT_X1 + * @arg @ref FL_CMU_PLL_OUTPUT_X2 + * @retval None + */ +__STATIC_INLINE void FL_CMU_PLL_SetOutputMultiplier(uint32_t multiplier) +{ + MODIFY_REG(CMU->PLLCR, CMU_PLLCR_OSEL_Msk, multiplier); +} + +/** + * @brief Get PLL Digital Domain Output Setting + * @rmtoll PLLCR OSEL FL_CMU_PLL_GetOutputMultiplier + * @retval Returned value can be one of the following values: + * @arg @ref FL_CMU_PLL_OUTPUT_X1 + * @arg @ref FL_CMU_PLL_OUTPUT_X2 + */ +__STATIC_INLINE uint32_t FL_CMU_PLL_GetOutputMultiplier(void) +{ + return (uint32_t)(READ_BIT(CMU->PLLCR, CMU_PLLCR_OSEL_Msk)); +} + +/** + * @brief Set RCLP Enable + * @rmtoll RCLPCR ENB FL_CMU_RCLP_Enable + * @retval None + */ +__STATIC_INLINE void FL_CMU_RCLP_Enable(void) +{ + CLEAR_BIT(CMU->RCLPCR, CMU_RCLPCR_ENB_Msk); +} + +/** + * @brief Get RCLP Enable Flag + * @rmtoll RCLPCR ENB FL_CMU_RCLP_IsEnabled + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CMU_RCLP_IsEnabled(void) +{ + return (uint32_t)!(READ_BIT(CMU->RCLPCR, CMU_RCLPCR_ENB_Msk) == CMU_RCLPCR_ENB_Msk); +} + +/** + * @brief Set RCLP Disable + * @rmtoll RCLPCR ENB FL_CMU_RCLP_Disable + * @retval None + */ +__STATIC_INLINE void FL_CMU_RCLP_Disable(void) +{ + SET_BIT(CMU->RCLPCR, CMU_RCLPCR_ENB_Msk); +} + +/** + * @brief Set RCLP Frequency Trim Value + * @rmtoll RCLPTR TRIM FL_CMU_RCLP_WriteTrimValue + * @param value TrimValue The value of RCLP trim + * @retval None + */ +__STATIC_INLINE void FL_CMU_RCLP_WriteTrimValue(uint32_t value) +{ + MODIFY_REG(CMU->RCLPTR, (0xffU << 0U), (value << 0U)); +} + +/** + * @brief Get RCLP Frequency Trim Value + * @rmtoll RCLPTR TRIM FL_CMU_RCLP_ReadTrimValue + * @retval The Value of RCLP trim + */ +__STATIC_INLINE uint32_t FL_CMU_RCLP_ReadTrimValue(void) +{ + return (uint32_t)(READ_BIT(CMU->RCLPTR, (0xffU << 0U)) >> 0U); +} + +/** + * @brief Set LSCLK Clock Source + * @rmtoll LSCLKSEL SEL FL_CMU_SetLSCLKClockSource + * @param clock This parameter can be one of the following values: + * @arg @ref FL_CMU_LSCLK_CLK_SOURCE_RCLP + * @arg @ref FL_CMU_LSCLK_CLK_SOURCE_XTLF + * @retval None + */ +__STATIC_INLINE void FL_CMU_SetLSCLKClockSource(uint32_t clock) +{ + MODIFY_REG(CMU->LSCLKSEL, CMU_LSCLKSEL_SEL_Msk, clock); +} + +/** + * @brief Set XTHF Oscillation Strength + * @rmtoll XTHFCR CFG FL_CMU_XTHF_WriteDriverStrength + * @param strength + * @retval None + */ +__STATIC_INLINE void FL_CMU_XTHF_WriteDriverStrength(uint32_t strength) +{ + MODIFY_REG(CMU->XTHFCR, (0x1fU << 8U), (strength << 8U)); +} + +/** + * @brief Get XTHF Oscillation Strength Setting + * @rmtoll XTHFCR CFG FL_CMU_XTHF_ReadDriverStrength + * @retval + */ +__STATIC_INLINE uint32_t FL_CMU_XTHF_ReadDriverStrength(void) +{ + return (uint32_t)(READ_BIT(CMU->XTHFCR, (0x1fU << 8U)) >> 8U); +} + +/** + * @brief Enable XTHF + * @rmtoll XTHFCR EN FL_CMU_XTHF_Enable + * @retval None + */ +__STATIC_INLINE void FL_CMU_XTHF_Enable(void) +{ + SET_BIT(CMU->XTHFCR, CMU_XTHFCR_EN_Msk); +} + +/** + * @brief Get XTHF Enable Status + * @rmtoll XTHFCR EN FL_CMU_XTHF_IsEnabled + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CMU_XTHF_IsEnabled(void) +{ + return (uint32_t)(READ_BIT(CMU->XTHFCR, CMU_XTHFCR_EN_Msk) == CMU_XTHFCR_EN_Msk); +} + +/** + * @brief Disable XTHF + * @rmtoll XTHFCR EN FL_CMU_XTHF_Disable + * @retval None + */ +__STATIC_INLINE void FL_CMU_XTHF_Disable(void) +{ + CLEAR_BIT(CMU->XTHFCR, CMU_XTHFCR_EN_Msk); +} + +/** + * @brief Set RCLF Output Prescaler + * @rmtoll RCLFCR PSC FL_CMU_RCLF_SetPrescaler + * @param prescaler This parameter can be one of the following values: + * @arg @ref FL_CMU_RCLF_PSC_DIV1 + * @arg @ref FL_CMU_RCLF_PSC_DIV4 + * @arg @ref FL_CMU_RCLF_PSC_DIV8 + * @arg @ref FL_CMU_RCLF_PSC_DIV16 + * @retval None + */ +__STATIC_INLINE void FL_CMU_RCLF_SetPrescaler(uint32_t prescaler) +{ + MODIFY_REG(CMU->RCLFCR, CMU_RCLFCR_PSC_Msk, prescaler); +} + +/** + * @brief Get RCLF Output Prescaler Setting + * @rmtoll RCLFCR PSC FL_CMU_RCLF_GetPrescaler + * @retval Returned value can be one of the following values: + * @arg @ref FL_CMU_RCLF_PSC_DIV1 + * @arg @ref FL_CMU_RCLF_PSC_DIV4 + * @arg @ref FL_CMU_RCLF_PSC_DIV8 + * @arg @ref FL_CMU_RCLF_PSC_DIV16 + */ +__STATIC_INLINE uint32_t FL_CMU_RCLF_GetPrescaler(void) +{ + return (uint32_t)(READ_BIT(CMU->RCLFCR, CMU_RCLFCR_PSC_Msk)); +} + +/** + * @brief Enable RCLF + * @rmtoll RCLFCR EN FL_CMU_RCLF_Enable + * @retval None + */ +__STATIC_INLINE void FL_CMU_RCLF_Enable(void) +{ + SET_BIT(CMU->RCLFCR, CMU_RCLFCR_EN_Msk); +} + +/** + * @brief Get RCLF Enable Status + * @rmtoll RCLFCR EN FL_CMU_RCLF_IsEnabled + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CMU_RCLF_IsEnabled(void) +{ + return (uint32_t)(READ_BIT(CMU->RCLFCR, CMU_RCLFCR_EN_Msk) == CMU_RCLFCR_EN_Msk); +} + +/** + * @brief Disable RCLF + * @rmtoll RCLFCR EN FL_CMU_RCLF_Disable + * @retval None + */ +__STATIC_INLINE void FL_CMU_RCLF_Disable(void) +{ + CLEAR_BIT(CMU->RCLFCR, CMU_RCLFCR_EN_Msk); +} + +/** + * @brief Set RCLF Frequency Trim Value + * @rmtoll RCLFTR TRIM FL_CMU_RCLF_WriteTrimValue + * @param value TrimValue The value of RCLF trim + * @retval None + */ +__STATIC_INLINE void FL_CMU_RCLF_WriteTrimValue(uint32_t value) +{ + MODIFY_REG(CMU->RCLFTR, (0xffU << 0U), (value << 0U)); +} + +/** + * @brief Get RCLF Frequency Trim Value + * @rmtoll RCLFTR TRIM FL_CMU_RCLF_ReadTrimValue + * @retval The Value of RCLF trim + */ +__STATIC_INLINE uint32_t FL_CMU_RCLF_ReadTrimValue(void) +{ + return (uint32_t)(READ_BIT(CMU->RCLFTR, (0xffU << 0U)) >> 0U); +} + +/** + * @brief Enable Group1 Periph Bus Clock + * @rmtoll PCLKCR1 FL_CMU_EnableGroup1BusClock + * @param peripheral This parameter can be one of the following values: + * @arg @ref FL_CMU_GROUP1_BUSCLK_LPTIM32 + * @arg @ref FL_CMU_GROUP1_BUSCLK_LPTIM16 + * @arg @ref FL_CMU_GROUP1_BUSCLK_RTCA + * @arg @ref FL_CMU_GROUP1_BUSCLK_PMU + * @arg @ref FL_CMU_GROUP1_BUSCLK_SCU + * @arg @ref FL_CMU_GROUP1_BUSCLK_IWDT + * @arg @ref FL_CMU_GROUP1_BUSCLK_ANAC + * @arg @ref FL_CMU_GROUP1_BUSCLK_PAD + * @arg @ref FL_CMU_GROUP1_BUSCLK_SVD + * @arg @ref FL_CMU_GROUP1_BUSCLK_COMP + * @arg @ref FL_CMU_GROUP1_BUSCLK_ATT + * @arg @ref FL_CMU_GROUP1_BUSCLK_VREF1P2 + * @retval None + */ +__STATIC_INLINE void FL_CMU_EnableGroup1BusClock(uint32_t peripheral) +{ + SET_BIT(CMU->PCLKCR1, ((peripheral & 0xffffffff) << 0x0U)); +} + +/** + * @brief Enable Group2 Periph Bus Clock + * @rmtoll PCLKCR2 FL_CMU_EnableGroup2BusClock + * @param peripheral This parameter can be one of the following values: + * @arg @ref FL_CMU_GROUP2_BUSCLK_CRC + * @arg @ref FL_CMU_GROUP2_BUSCLK_RNG + * @arg @ref FL_CMU_GROUP2_BUSCLK_AES + * @arg @ref FL_CMU_GROUP2_BUSCLK_LCD + * @arg @ref FL_CMU_GROUP2_BUSCLK_DMA + * @arg @ref FL_CMU_GROUP2_BUSCLK_FLASH + * @arg @ref FL_CMU_GROUP2_BUSCLK_RAMBIST + * @arg @ref FL_CMU_GROUP2_BUSCLK_WWDT + * @arg @ref FL_CMU_GROUP2_BUSCLK_ADC + * @arg @ref FL_CMU_GROUP2_BUSCLK_DIVAS + * @arg @ref FL_CMU_GROUP2_BUSCLK_DAC + * @retval None + */ +__STATIC_INLINE void FL_CMU_EnableGroup2BusClock(uint32_t peripheral) +{ + SET_BIT(CMU->PCLKCR2, ((peripheral & 0xffffffff) << 0x0U)); +} + +/** + * @brief Enable Group3 Periph Bus Clock + * @rmtoll PCLKCR3 FL_CMU_EnableGroup3BusClock + * @param peripheral This parameter can be one of the following values: + * @arg @ref FL_CMU_GROUP3_BUSCLK_SPI0 + * @arg @ref FL_CMU_GROUP3_BUSCLK_SPI1 + * @arg @ref FL_CMU_GROUP3_BUSCLK_SPI2 + * @arg @ref FL_CMU_GROUP3_BUSCLK_UART0 + * @arg @ref FL_CMU_GROUP3_BUSCLK_UART1 + * @arg @ref FL_CMU_GROUP3_BUSCLK_UART3 + * @arg @ref FL_CMU_GROUP3_BUSCLK_UART4 + * @arg @ref FL_CMU_GROUP3_BUSCLK_UART5 + * @arg @ref FL_CMU_GROUP3_BUSCLK_UARTIR + * @arg @ref FL_CMU_GROUP3_BUSCLK_LPUART0 + * @arg @ref FL_CMU_GROUP3_BUSCLK_LPUART1 + * @arg @ref FL_CMU_GROUP3_BUSCLK_LPUART2 + * @arg @ref FL_CMU_GROUP3_BUSCLK_CAN + * @arg @ref FL_CMU_GROUP3_BUSCLK_I2C + * @retval None + */ +__STATIC_INLINE void FL_CMU_EnableGroup3BusClock(uint32_t peripheral) +{ + SET_BIT(CMU->PCLKCR3, ((peripheral & 0xffffffff) << 0x0U)); +} + +/** + * @brief Enable Group4 Periph Bus Clock + * @rmtoll PCLKCR4 FL_CMU_EnableGroup4BusClock + * @param peripheral This parameter can be one of the following values: + * @arg @ref FL_CMU_GROUP4_BUSCLK_BSTIM32 + * @arg @ref FL_CMU_GROUP4_BUSCLK_GPTIM0 + * @arg @ref FL_CMU_GROUP4_BUSCLK_GPTIM1 + * @arg @ref FL_CMU_GROUP4_BUSCLK_GPTIM2 + * @arg @ref FL_CMU_GROUP4_BUSCLK_ATIM + * @arg @ref FL_CMU_GROUP4_BUSCLK_BSTIM16 + * @retval None + */ +__STATIC_INLINE void FL_CMU_EnableGroup4BusClock(uint32_t peripheral) +{ + SET_BIT(CMU->PCLKCR4, ((peripheral & 0xffffffff) << 0x0U)); +} + +/** + * @brief Disable Group1 Periph Bus Clock + * @rmtoll PCLKCR1 FL_CMU_DisableGroup1BusClock + * @param peripheral This parameter can be one of the following values: + * @arg @ref FL_CMU_GROUP1_BUSCLK_LPTIM32 + * @arg @ref FL_CMU_GROUP1_BUSCLK_LPTIM16 + * @arg @ref FL_CMU_GROUP1_BUSCLK_RTCA + * @arg @ref FL_CMU_GROUP1_BUSCLK_PMU + * @arg @ref FL_CMU_GROUP1_BUSCLK_SCU + * @arg @ref FL_CMU_GROUP1_BUSCLK_IWDT + * @arg @ref FL_CMU_GROUP1_BUSCLK_ANAC + * @arg @ref FL_CMU_GROUP1_BUSCLK_PAD + * @arg @ref FL_CMU_GROUP1_BUSCLK_SVD + * @arg @ref FL_CMU_GROUP1_BUSCLK_COMP + * @arg @ref FL_CMU_GROUP1_BUSCLK_ATT + * @arg @ref FL_CMU_GROUP1_BUSCLK_VREF1P2 + * @retval None + */ +__STATIC_INLINE void FL_CMU_DisableGroup1BusClock(uint32_t peripheral) +{ + CLEAR_BIT(CMU->PCLKCR1, ((peripheral & 0xffffffff) << 0x0U)); +} + +/** + * @brief Disable Group2 Periph Bus Clock + * @rmtoll PCLKCR2 FL_CMU_DisableGroup2BusClock + * @param peripheral This parameter can be one of the following values: + * @arg @ref FL_CMU_GROUP2_BUSCLK_CRC + * @arg @ref FL_CMU_GROUP2_BUSCLK_RNG + * @arg @ref FL_CMU_GROUP2_BUSCLK_AES + * @arg @ref FL_CMU_GROUP2_BUSCLK_LCD + * @arg @ref FL_CMU_GROUP2_BUSCLK_DMA + * @arg @ref FL_CMU_GROUP2_BUSCLK_FLASH + * @arg @ref FL_CMU_GROUP2_BUSCLK_RAMBIST + * @arg @ref FL_CMU_GROUP2_BUSCLK_WWDT + * @arg @ref FL_CMU_GROUP2_BUSCLK_ADC + * @arg @ref FL_CMU_GROUP2_BUSCLK_DIVAS + * @arg @ref FL_CMU_GROUP2_BUSCLK_DAC + * @retval None + */ +__STATIC_INLINE void FL_CMU_DisableGroup2BusClock(uint32_t peripheral) +{ + CLEAR_BIT(CMU->PCLKCR2, ((peripheral & 0xffffffff) << 0x0U)); +} + +/** + * @brief Disable Group3 Periph Bus Clock + * @rmtoll PCLKCR3 FL_CMU_DisableGroup3BusClock + * @param peripheral This parameter can be one of the following values: + * @arg @ref FL_CMU_GROUP3_BUSCLK_SPI0 + * @arg @ref FL_CMU_GROUP3_BUSCLK_SPI1 + * @arg @ref FL_CMU_GROUP3_BUSCLK_SPI2 + * @arg @ref FL_CMU_GROUP3_BUSCLK_UART0 + * @arg @ref FL_CMU_GROUP3_BUSCLK_UART1 + * @arg @ref FL_CMU_GROUP3_BUSCLK_UART3 + * @arg @ref FL_CMU_GROUP3_BUSCLK_UART4 + * @arg @ref FL_CMU_GROUP3_BUSCLK_UART5 + * @arg @ref FL_CMU_GROUP3_BUSCLK_UARTIR + * @arg @ref FL_CMU_GROUP3_BUSCLK_LPUART0 + * @arg @ref FL_CMU_GROUP3_BUSCLK_LPUART1 + * @arg @ref FL_CMU_GROUP3_BUSCLK_LPUART2 + * @arg @ref FL_CMU_GROUP3_BUSCLK_CAN + * @arg @ref FL_CMU_GROUP3_BUSCLK_I2C + * @retval None + */ +__STATIC_INLINE void FL_CMU_DisableGroup3BusClock(uint32_t peripheral) +{ + CLEAR_BIT(CMU->PCLKCR3, ((peripheral & 0xffffffff) << 0x0U)); +} + +/** + * @brief Disable Group4 Periph Bus Clock + * @rmtoll PCLKCR4 FL_CMU_DisableGroup4BusClock + * @param peripheral This parameter can be one of the following values: + * @arg @ref FL_CMU_GROUP4_BUSCLK_BSTIM32 + * @arg @ref FL_CMU_GROUP4_BUSCLK_GPTIM0 + * @arg @ref FL_CMU_GROUP4_BUSCLK_GPTIM1 + * @arg @ref FL_CMU_GROUP4_BUSCLK_GPTIM2 + * @arg @ref FL_CMU_GROUP4_BUSCLK_ATIM + * @arg @ref FL_CMU_GROUP4_BUSCLK_BSTIM16 + * @retval None + */ +__STATIC_INLINE void FL_CMU_DisableGroup4BusClock(uint32_t peripheral) +{ + CLEAR_BIT(CMU->PCLKCR4, ((peripheral & 0xffffffff) << 0x0U)); +} + +/** + * @brief Get Group1 Periph Bus Clock Enable Status + * @rmtoll PCLKCR1 FL_CMU_IsEnabledGroup1BusClock + * @param peripheral This parameter can be one of the following values: + * @arg @ref FL_CMU_GROUP1_BUSCLK_LPTIM32 + * @arg @ref FL_CMU_GROUP1_BUSCLK_LPTIM16 + * @arg @ref FL_CMU_GROUP1_BUSCLK_RTCA + * @arg @ref FL_CMU_GROUP1_BUSCLK_PMU + * @arg @ref FL_CMU_GROUP1_BUSCLK_SCU + * @arg @ref FL_CMU_GROUP1_BUSCLK_IWDT + * @arg @ref FL_CMU_GROUP1_BUSCLK_ANAC + * @arg @ref FL_CMU_GROUP1_BUSCLK_PAD + * @arg @ref FL_CMU_GROUP1_BUSCLK_SVD + * @arg @ref FL_CMU_GROUP1_BUSCLK_COMP + * @arg @ref FL_CMU_GROUP1_BUSCLK_ATT + * @arg @ref FL_CMU_GROUP1_BUSCLK_VREF1P2 + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CMU_IsEnabledGroup1BusClock(uint32_t peripheral) +{ + return (uint32_t)(READ_BIT(CMU->PCLKCR1, ((peripheral & 0xffffffff) << 0x0U)) == ((peripheral & 0xffffffff) << 0x0U)); +} + +/** + * @brief Get Group2 Periph Bus Clock Enable Status + * @rmtoll PCLKCR2 FL_CMU_IsEnabledGroup2BusClock + * @param peripheral This parameter can be one of the following values: + * @arg @ref FL_CMU_GROUP2_BUSCLK_CRC + * @arg @ref FL_CMU_GROUP2_BUSCLK_RNG + * @arg @ref FL_CMU_GROUP2_BUSCLK_AES + * @arg @ref FL_CMU_GROUP2_BUSCLK_LCD + * @arg @ref FL_CMU_GROUP2_BUSCLK_DMA + * @arg @ref FL_CMU_GROUP2_BUSCLK_FLASH + * @arg @ref FL_CMU_GROUP2_BUSCLK_RAMBIST + * @arg @ref FL_CMU_GROUP2_BUSCLK_WWDT + * @arg @ref FL_CMU_GROUP2_BUSCLK_ADC + * @arg @ref FL_CMU_GROUP2_BUSCLK_DIVAS + * @arg @ref FL_CMU_GROUP2_BUSCLK_DAC + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CMU_IsEnabledGroup2BusClock(uint32_t peripheral) +{ + return (uint32_t)(READ_BIT(CMU->PCLKCR2, ((peripheral & 0xffffffff) << 0x0U)) == ((peripheral & 0xffffffff) << 0x0U)); +} + +/** + * @brief Get Group3 Periph Bus Clock Enable Status + * @rmtoll PCLKCR3 FL_CMU_IsEnabledGroup3BusClock + * @param peripheral This parameter can be one of the following values: + * @arg @ref FL_CMU_GROUP3_BUSCLK_SPI0 + * @arg @ref FL_CMU_GROUP3_BUSCLK_SPI1 + * @arg @ref FL_CMU_GROUP3_BUSCLK_SPI2 + * @arg @ref FL_CMU_GROUP3_BUSCLK_UART0 + * @arg @ref FL_CMU_GROUP3_BUSCLK_UART1 + * @arg @ref FL_CMU_GROUP3_BUSCLK_UART3 + * @arg @ref FL_CMU_GROUP3_BUSCLK_UART4 + * @arg @ref FL_CMU_GROUP3_BUSCLK_UART5 + * @arg @ref FL_CMU_GROUP3_BUSCLK_UARTIR + * @arg @ref FL_CMU_GROUP3_BUSCLK_LPUART0 + * @arg @ref FL_CMU_GROUP3_BUSCLK_LPUART1 + * @arg @ref FL_CMU_GROUP3_BUSCLK_LPUART2 + * @arg @ref FL_CMU_GROUP3_BUSCLK_CAN + * @arg @ref FL_CMU_GROUP3_BUSCLK_I2C + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CMU_IsEnabledGroup3BusClock(uint32_t peripheral) +{ + return (uint32_t)(READ_BIT(CMU->PCLKCR3, ((peripheral & 0xffffffff) << 0x0U)) == ((peripheral & 0xffffffff) << 0x0U)); +} + +/** + * @brief Get Group4 Periph Bus Clock Enable Status + * @rmtoll PCLKCR4 FL_CMU_IsEnabledGroup4BusClock + * @param peripheral This parameter can be one of the following values: + * @arg @ref FL_CMU_GROUP4_BUSCLK_BSTIM32 + * @arg @ref FL_CMU_GROUP4_BUSCLK_GPTIM0 + * @arg @ref FL_CMU_GROUP4_BUSCLK_GPTIM1 + * @arg @ref FL_CMU_GROUP4_BUSCLK_GPTIM2 + * @arg @ref FL_CMU_GROUP4_BUSCLK_ATIM + * @arg @ref FL_CMU_GROUP4_BUSCLK_BSTIM16 + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CMU_IsEnabledGroup4BusClock(uint32_t peripheral) +{ + return (uint32_t)(READ_BIT(CMU->PCLKCR4, ((peripheral & 0xffffffff) << 0x0U)) == ((peripheral & 0xffffffff) << 0x0U)); +} + +/** + * @brief Enable Group3 Periph Operation Clock + * @rmtoll OPCCR3 FL_CMU_EnableGroup3OperationClock + * @param peripheral This parameter can be one of the following values: + * @arg @ref FL_CMU_GROUP3_OPCLK_EXTI + * @arg @ref FL_CMU_GROUP3_OPCLK_FLASH + * @arg @ref FL_CMU_GROUP3_OPCLK_LPUART1 + * @arg @ref FL_CMU_GROUP3_OPCLK_LPUART0 + * @arg @ref FL_CMU_GROUP3_OPCLK_RNG + * @arg @ref FL_CMU_GROUP3_OPCLK_LPUART2 + * @arg @ref FL_CMU_GROUP3_OPCLK_I2C + * @arg @ref FL_CMU_GROUP3_OPCLK_ADC + * @arg @ref FL_CMU_GROUP3_OPCLK_ATIM + * @arg @ref FL_CMU_GROUP3_OPCLK_CAN + * @arg @ref FL_CMU_GROUP3_OPCLK_UART1 + * @arg @ref FL_CMU_GROUP3_OPCLK_UART0 + * @arg @ref FL_CMU_GROUP3_OPCLK_BSTIM16 + * @arg @ref FL_CMU_GROUP3_OPCLK_BSTIM32 + * @arg @ref FL_CMU_GROUP3_OPCLK_LPTIM16 + * @arg @ref FL_CMU_GROUP3_OPCLK_LPTIM32 + * @retval None + */ +__STATIC_INLINE void FL_CMU_EnableGroup3OperationClock(uint32_t peripheral) +{ + SET_BIT(CMU->OPCCR3, ((peripheral & 0xffffffff) << 0x0U)); +} + +/** + * @brief Disable Group3 Periph Operation Clock + * @rmtoll OPCCR3 FL_CMU_DisableGroup3OperationClock + * @param peripheral This parameter can be one of the following values: + * @arg @ref FL_CMU_GROUP3_OPCLK_EXTI + * @arg @ref FL_CMU_GROUP3_OPCLK_FLASH + * @arg @ref FL_CMU_GROUP3_OPCLK_LPUART1 + * @arg @ref FL_CMU_GROUP3_OPCLK_LPUART0 + * @arg @ref FL_CMU_GROUP3_OPCLK_RNG + * @arg @ref FL_CMU_GROUP3_OPCLK_LPUART2 + * @arg @ref FL_CMU_GROUP3_OPCLK_I2C + * @arg @ref FL_CMU_GROUP3_OPCLK_ADC + * @arg @ref FL_CMU_GROUP3_OPCLK_ATIM + * @arg @ref FL_CMU_GROUP3_OPCLK_CAN + * @arg @ref FL_CMU_GROUP3_OPCLK_UART1 + * @arg @ref FL_CMU_GROUP3_OPCLK_UART0 + * @arg @ref FL_CMU_GROUP3_OPCLK_BSTIM16 + * @arg @ref FL_CMU_GROUP3_OPCLK_BSTIM32 + * @arg @ref FL_CMU_GROUP3_OPCLK_LPTIM16 + * @arg @ref FL_CMU_GROUP3_OPCLK_LPTIM32 + * @retval None + */ +__STATIC_INLINE void FL_CMU_DisableGroup3OperationClock(uint32_t peripheral) +{ + CLEAR_BIT(CMU->OPCCR3, ((peripheral & 0xffffffff) << 0x0U)); +} + +/** + * @brief Get Group3 Periph Operation Clock Enable Status + * @rmtoll OPCCR3 FL_CMU_IsEnabledGroup3OperationClock + * @param peripheral This parameter can be one of the following values: + * @arg @ref FL_CMU_GROUP3_OPCLK_EXTI + * @arg @ref FL_CMU_GROUP3_OPCLK_FLASH + * @arg @ref FL_CMU_GROUP3_OPCLK_LPUART1 + * @arg @ref FL_CMU_GROUP3_OPCLK_LPUART0 + * @arg @ref FL_CMU_GROUP3_OPCLK_RNG + * @arg @ref FL_CMU_GROUP3_OPCLK_LPUART2 + * @arg @ref FL_CMU_GROUP3_OPCLK_I2C + * @arg @ref FL_CMU_GROUP3_OPCLK_ADC + * @arg @ref FL_CMU_GROUP3_OPCLK_ATIM + * @arg @ref FL_CMU_GROUP3_OPCLK_CAN + * @arg @ref FL_CMU_GROUP3_OPCLK_UART1 + * @arg @ref FL_CMU_GROUP3_OPCLK_UART0 + * @arg @ref FL_CMU_GROUP3_OPCLK_BSTIM16 + * @arg @ref FL_CMU_GROUP3_OPCLK_BSTIM32 + * @arg @ref FL_CMU_GROUP3_OPCLK_LPTIM16 + * @arg @ref FL_CMU_GROUP3_OPCLK_LPTIM32 + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CMU_IsEnabledGroup3OperationClock(uint32_t peripheral) +{ + return (uint32_t)(READ_BIT(CMU->OPCCR3, ((peripheral & 0xffffffff) << 0x0U)) == ((peripheral & 0xffffffff) << 0x0U)); +} + +/** + * @brief Set EXTI Clock Source + * @rmtoll OPCCR1 EXTICKS FL_CMU_SetEXTIClockSource + * @param clock This parameter can be one of the following values: + * @arg @ref FL_CMU_EXTI_CLK_SOURCE_LSCLK + * @arg @ref FL_CMU_EXTI_CLK_SOURCE_HCLK + * @retval None + */ +__STATIC_INLINE void FL_CMU_SetEXTIClockSource(uint32_t clock) +{ + MODIFY_REG(CMU->OPCCR1, CMU_OPCCR1_EXTICKS_Msk, clock); +} + +/** + * @brief Get EXTI Clock Source Setting + * @rmtoll OPCCR1 EXTICKS FL_CMU_GetEXTIClockSource + * @retval Returned value can be one of the following values: + * @arg @ref FL_CMU_EXTI_CLK_SOURCE_LSCLK + * @arg @ref FL_CMU_EXTI_CLK_SOURCE_HCLK + */ +__STATIC_INLINE uint32_t FL_CMU_GetEXTIClockSource(void) +{ + return (uint32_t)(READ_BIT(CMU->OPCCR1, CMU_OPCCR1_EXTICKS_Msk)); +} + +/** + * @brief Set LPUART1 Clock Source + * @rmtoll OPCCR1 LPUART1CKS FL_CMU_SetLPUART1ClockSource + * @param clock This parameter can be one of the following values: + * @arg @ref FL_CMU_LPUART1_CLK_SOURCE_LSCLK + * @arg @ref FL_CMU_LPUART1_CLK_SOURCE_RCHF + * @arg @ref FL_CMU_LPUART1_CLK_SOURCE_RCLF + * @retval None + */ +__STATIC_INLINE void FL_CMU_SetLPUART1ClockSource(uint32_t clock) +{ + MODIFY_REG(CMU->OPCCR1, CMU_OPCCR1_LPUART1CKS_Msk, clock); +} + +/** + * @brief Get LPUART1 Clock Source Setting + * @rmtoll OPCCR1 LPUART1CKS FL_CMU_GetLPUART1ClockSource + * @retval Returned value can be one of the following values: + * @arg @ref FL_CMU_LPUART1_CLK_SOURCE_LSCLK + * @arg @ref FL_CMU_LPUART1_CLK_SOURCE_RCHF + * @arg @ref FL_CMU_LPUART1_CLK_SOURCE_RCLF + */ +__STATIC_INLINE uint32_t FL_CMU_GetLPUART1ClockSource(void) +{ + return (uint32_t)(READ_BIT(CMU->OPCCR1, CMU_OPCCR1_LPUART1CKS_Msk)); +} + +/** + * @brief Set LPUART0 Clock Source + * @rmtoll OPCCR1 LPUART0CKS FL_CMU_SetLPUART0ClockSource + * @param clock This parameter can be one of the following values: + * @arg @ref FL_CMU_LPUART0_CLK_SOURCE_LSCLK + * @arg @ref FL_CMU_LPUART0_CLK_SOURCE_RCHF + * @arg @ref FL_CMU_LPUART0_CLK_SOURCE_RCLF + * @retval None + */ +__STATIC_INLINE void FL_CMU_SetLPUART0ClockSource(uint32_t clock) +{ + MODIFY_REG(CMU->OPCCR1, CMU_OPCCR1_LPUART0CKS_Msk, clock); +} + +/** + * @brief Get LPUART0 Clock Source Setting + * @rmtoll OPCCR1 LPUART0CKS FL_CMU_GetLPUART0ClockSource + * @retval Returned value can be one of the following values: + * @arg @ref FL_CMU_LPUART0_CLK_SOURCE_LSCLK + * @arg @ref FL_CMU_LPUART0_CLK_SOURCE_RCHF + * @arg @ref FL_CMU_LPUART0_CLK_SOURCE_RCLF + */ +__STATIC_INLINE uint32_t FL_CMU_GetLPUART0ClockSource(void) +{ + return (uint32_t)(READ_BIT(CMU->OPCCR1, CMU_OPCCR1_LPUART0CKS_Msk)); +} + +/** + * @brief Set LPUART2 Clock Source + * @rmtoll OPCCR1 LPUART2CKS FL_CMU_SetLPUART2ClockSource + * @param clock This parameter can be one of the following values: + * @arg @ref FL_CMU_LPUART2_CLK_SOURCE_LSCLK + * @arg @ref FL_CMU_LPUART2_CLK_SOURCE_RCHF + * @arg @ref FL_CMU_LPUART2_CLK_SOURCE_RCLF + * @retval None + */ +__STATIC_INLINE void FL_CMU_SetLPUART2ClockSource(uint32_t clock) +{ + MODIFY_REG(CMU->OPCCR1, CMU_OPCCR1_LPUART2CKS_Msk, clock); +} + +/** + * @brief Get LPUART2 Clock Source Setting + * @rmtoll OPCCR1 LPUART2CKS FL_CMU_GetLPUART2ClockSource + * @retval Returned value can be one of the following values: + * @arg @ref FL_CMU_LPUART2_CLK_SOURCE_LSCLK + * @arg @ref FL_CMU_LPUART2_CLK_SOURCE_RCHF + * @arg @ref FL_CMU_LPUART2_CLK_SOURCE_RCLF + */ +__STATIC_INLINE uint32_t FL_CMU_GetLPUART2ClockSource(void) +{ + return (uint32_t)(READ_BIT(CMU->OPCCR1, CMU_OPCCR1_LPUART2CKS_Msk)); +} + +/** + * @brief Set I2C Clock Source + * @rmtoll OPCCR1 I2CCKS FL_CMU_SetI2CClockSource + * @param clock This parameter can be one of the following values: + * @arg @ref FL_CMU_I2C_CLK_SOURCE_APBCLK + * @arg @ref FL_CMU_I2C_CLK_SOURCE_RCHF + * @arg @ref FL_CMU_I2C_CLK_SOURCE_SYSCLK + * @arg @ref FL_CMU_I2C_CLK_SOURCE_RCLF + * @retval None + */ +__STATIC_INLINE void FL_CMU_SetI2CClockSource(uint32_t clock) +{ + MODIFY_REG(CMU->OPCCR1, CMU_OPCCR1_I2CCKS_Msk, clock); +} + +/** + * @brief Get I2C Clock Source Setting + * @rmtoll OPCCR1 I2CCKS FL_CMU_GetI2CClockSource + * @retval Returned value can be one of the following values: + * @arg @ref FL_CMU_I2C_CLK_SOURCE_APBCLK + * @arg @ref FL_CMU_I2C_CLK_SOURCE_RCHF + * @arg @ref FL_CMU_I2C_CLK_SOURCE_SYSCLK + * @arg @ref FL_CMU_I2C_CLK_SOURCE_RCLF + */ +__STATIC_INLINE uint32_t FL_CMU_GetI2CClockSource(void) +{ + return (uint32_t)(READ_BIT(CMU->OPCCR1, CMU_OPCCR1_I2CCKS_Msk)); +} + +/** + * @brief Set BSTIM16 Clock Source + * @rmtoll OPCCR1 BT16CKS FL_CMU_SetBSTIM16ClockSource + * @param clock This parameter can be one of the following values: + * @arg @ref FL_CMU_BSTIM16_CLK_SOURCE_APBCLK + * @arg @ref FL_CMU_BSTIM16_CLK_SOURCE_LSCLK + * @arg @ref FL_CMU_BSTIM16_CLK_SOURCE_RCLP + * @arg @ref FL_CMU_BSTIM16_CLK_SOURCE_RCLF + * @retval None + */ +__STATIC_INLINE void FL_CMU_SetBSTIM16ClockSource(uint32_t clock) +{ + MODIFY_REG(CMU->OPCCR1, CMU_OPCCR1_BT16CKS_Msk, clock); +} + +/** + * @brief Get BSTIM16 Clock Source Setting + * @rmtoll OPCCR1 BT16CKS FL_CMU_GetBSTIM16ClockSource + * @retval Returned value can be one of the following values: + * @arg @ref FL_CMU_BSTIM16_CLK_SOURCE_APBCLK + * @arg @ref FL_CMU_BSTIM16_CLK_SOURCE_LSCLK + * @arg @ref FL_CMU_BSTIM16_CLK_SOURCE_RCLP + * @arg @ref FL_CMU_BSTIM16_CLK_SOURCE_RCLF + */ +__STATIC_INLINE uint32_t FL_CMU_GetBSTIM16ClockSource(void) +{ + return (uint32_t)(READ_BIT(CMU->OPCCR1, CMU_OPCCR1_BT16CKS_Msk)); +} + +/** + * @brief Set BSTIM32 Clock Source + * @rmtoll OPCCR1 BT32CKS FL_CMU_SetBSTIM32ClockSource + * @param clock This parameter can be one of the following values: + * @arg @ref FL_CMU_BSTIM32_CLK_SOURCE_APBCLK + * @arg @ref FL_CMU_BSTIM32_CLK_SOURCE_LSCLK + * @arg @ref FL_CMU_BSTIM32_CLK_SOURCE_RCLP + * @arg @ref FL_CMU_BSTIM32_CLK_SOURCE_RCLF + * @retval None + */ +__STATIC_INLINE void FL_CMU_SetBSTIM32ClockSource(uint32_t clock) +{ + MODIFY_REG(CMU->OPCCR1, CMU_OPCCR1_BT32CKS_Msk, clock); +} + +/** + * @brief Get BSTIM32 Clock Source Setting + * @rmtoll OPCCR1 BT32CKS FL_CMU_GetBSTIM32ClockSource + * @retval Returned value can be one of the following values: + * @arg @ref FL_CMU_BSTIM32_CLK_SOURCE_APBCLK + * @arg @ref FL_CMU_BSTIM32_CLK_SOURCE_LSCLK + * @arg @ref FL_CMU_BSTIM32_CLK_SOURCE_RCLP + * @arg @ref FL_CMU_BSTIM32_CLK_SOURCE_RCLF + */ +__STATIC_INLINE uint32_t FL_CMU_GetBSTIM32ClockSource(void) +{ + return (uint32_t)(READ_BIT(CMU->OPCCR1, CMU_OPCCR1_BT32CKS_Msk)); +} + +/** + * @brief Set LPTIM16 Clock Source + * @rmtoll OPCCR1 LPT16CKS FL_CMU_SetLPTIM16ClockSource + * @param clock This parameter can be one of the following values: + * @arg @ref FL_CMU_LPTIM16_CLK_SOURCE_APBCLK + * @arg @ref FL_CMU_LPTIM16_CLK_SOURCE_LSCLK + * @arg @ref FL_CMU_LPTIM16_CLK_SOURCE_RCLP + * @arg @ref FL_CMU_LPTIM16_CLK_SOURCE_RCLF + * @retval None + */ +__STATIC_INLINE void FL_CMU_SetLPTIM16ClockSource(uint32_t clock) +{ + MODIFY_REG(CMU->OPCCR1, CMU_OPCCR1_LPT16CKS_Msk, clock); +} + +/** + * @brief Get LPTIM16 Clock Source Setting + * @rmtoll OPCCR1 LPT16CKS FL_CMU_GetLPTIM16ClockSource + * @retval Returned value can be one of the following values: + * @arg @ref FL_CMU_LPTIM16_CLK_SOURCE_APBCLK + * @arg @ref FL_CMU_LPTIM16_CLK_SOURCE_LSCLK + * @arg @ref FL_CMU_LPTIM16_CLK_SOURCE_RCLP + * @arg @ref FL_CMU_LPTIM16_CLK_SOURCE_RCLF + */ +__STATIC_INLINE uint32_t FL_CMU_GetLPTIM16ClockSource(void) +{ + return (uint32_t)(READ_BIT(CMU->OPCCR1, CMU_OPCCR1_LPT16CKS_Msk)); +} + +/** + * @brief Set LPTIM32 Clock Source + * @rmtoll OPCCR1 LPT32CKS FL_CMU_SetLPTIM32ClockSource + * @param clock This parameter can be one of the following values: + * @arg @ref FL_CMU_LPTIM32_CLK_SOURCE_APBCLK + * @arg @ref FL_CMU_LPTIM32_CLK_SOURCE_LSCLK + * @arg @ref FL_CMU_LPTIM32_CLK_SOURCE_RCLP + * @arg @ref FL_CMU_LPTIM32_CLK_SOURCE_RCLF + * @retval None + */ +__STATIC_INLINE void FL_CMU_SetLPTIM32ClockSource(uint32_t clock) +{ + MODIFY_REG(CMU->OPCCR1, CMU_OPCCR1_LPT32CKS_Msk, clock); +} + +/** + * @brief Get LPTIM32 Clock Source Setting + * @rmtoll OPCCR1 LPT32CKS FL_CMU_GetLPTIM32ClockSource + * @retval Returned value can be one of the following values: + * @arg @ref FL_CMU_LPTIM32_CLK_SOURCE_APBCLK + * @arg @ref FL_CMU_LPTIM32_CLK_SOURCE_LSCLK + * @arg @ref FL_CMU_LPTIM32_CLK_SOURCE_RCLP + * @arg @ref FL_CMU_LPTIM32_CLK_SOURCE_RCLF + */ +__STATIC_INLINE uint32_t FL_CMU_GetLPTIM32ClockSource(void) +{ + return (uint32_t)(READ_BIT(CMU->OPCCR1, CMU_OPCCR1_LPT32CKS_Msk)); +} + +/** + * @brief Set ATIM Clock Source + * @rmtoll OPCCR1 ATCKS FL_CMU_SetATIMClockSource + * @param clock This parameter can be one of the following values: + * @arg @ref FL_CMU_ATIM_CLK_SOURCE_APBCLK + * @arg @ref FL_CMU_ATIM_CLK_SOURCE_PLL_X2 + * @retval None + */ +__STATIC_INLINE void FL_CMU_SetATIMClockSource(uint32_t clock) +{ + MODIFY_REG(CMU->OPCCR1, CMU_OPCCR1_ATCKS_Msk, clock); +} + +/** + * @brief Get ATIM Clock Source Setting + * @rmtoll OPCCR1 ATCKS FL_CMU_GetATIMClockSource + * @param clock This parameter can be one of the following values: + * @arg @ref FL_CMU_ATIM_CLK_SOURCE_APBCLK + * @arg @ref FL_CMU_ATIM_CLK_SOURCE_PLL_X2 + * @retval Returned value can be one of the following values: + * @arg @ref FL_CMU_ATIM_CLK_SOURCE_APBCLK + * @arg @ref FL_CMU_ATIM_CLK_SOURCE_PLL_X2 + */ +__STATIC_INLINE uint32_t FL_CMU_GetATIMClockSource(void) +{ + return (uint32_t)(READ_BIT(CMU->OPCCR1, CMU_OPCCR1_ATCKS_Msk)); +} + +/** + * @brief Set CAN Clock Source + * @rmtoll OPCCR1 CANCKS FL_CMU_SetCANClockSource + * @param clock This parameter can be one of the following values: + * @arg @ref FL_CMU_CAN_CLK_SOURCE_RCHF + * @arg @ref FL_CMU_CAN_CLK_SOURCE_XTHF + * @arg @ref FL_CMU_CAN_CLK_SOURCE_PLL + * @arg @ref FL_CMU_CAN_CLK_SOURCE_APBCLK + * @retval None + */ +__STATIC_INLINE void FL_CMU_SetCANClockSource(uint32_t clock) +{ + MODIFY_REG(CMU->OPCCR1, CMU_OPCCR1_CANCKS_Msk, clock); +} + +/** + * @brief Get CAN Clock Source Setting + * @rmtoll OPCCR1 CANCKS FL_CMU_GetCANClockSource + * @retval Returned value can be one of the following values: + * @arg @ref FL_CMU_CAN_CLK_SOURCE_RCHF + * @arg @ref FL_CMU_CAN_CLK_SOURCE_XTHF + * @arg @ref FL_CMU_CAN_CLK_SOURCE_PLL + * @arg @ref FL_CMU_CAN_CLK_SOURCE_APBCLK + */ +__STATIC_INLINE uint32_t FL_CMU_GetCANClockSource(void) +{ + return (uint32_t)(READ_BIT(CMU->OPCCR1, CMU_OPCCR1_CANCKS_Msk)); +} + +/** + * @brief Set UART1 Clock Source + * @rmtoll OPCCR1 UART1CKS FL_CMU_SetUART1ClockSource + * @param clock This parameter can be one of the following values: + * @arg @ref FL_CMU_UART1_CLK_SOURCE_APBCLK + * @arg @ref FL_CMU_UART1_CLK_SOURCE_RCHF + * @arg @ref FL_CMU_UART1_CLK_SOURCE_SYSCLK + * @arg @ref FL_CMU_UART1_CLK_SOURCE_XTHF + * @retval None + */ +__STATIC_INLINE void FL_CMU_SetUART1ClockSource(uint32_t clock) +{ + MODIFY_REG(CMU->OPCCR1, CMU_OPCCR1_UART1CKS_Msk, clock); +} + +/** + * @brief Get UART1 Clock Source Setting + * @rmtoll OPCCR1 UART1CKS FL_CMU_GetUART1ClockSource + * @retval Returned value can be one of the following values: + * @arg @ref FL_CMU_UART1_CLK_SOURCE_APBCLK + * @arg @ref FL_CMU_UART1_CLK_SOURCE_RCHF + * @arg @ref FL_CMU_UART1_CLK_SOURCE_SYSCLK + * @arg @ref FL_CMU_UART1_CLK_SOURCE_XTHF + */ +__STATIC_INLINE uint32_t FL_CMU_GetUART1ClockSource(void) +{ + return (uint32_t)(READ_BIT(CMU->OPCCR1, CMU_OPCCR1_UART1CKS_Msk)); +} + +/** + * @brief Set UART0 Clock Source + * @rmtoll OPCCR1 UART0CKS FL_CMU_SetUART0ClockSource + * @param clock This parameter can be one of the following values: + * @arg @ref FL_CMU_UART0_CLK_SOURCE_APBCLK + * @arg @ref FL_CMU_UART0_CLK_SOURCE_RCHF + * @arg @ref FL_CMU_UART0_CLK_SOURCE_SYSCLK + * @arg @ref FL_CMU_UART0_CLK_SOURCE_XTHF + * @retval None + */ +__STATIC_INLINE void FL_CMU_SetUART0ClockSource(uint32_t clock) +{ + MODIFY_REG(CMU->OPCCR1, CMU_OPCCR1_UART0CKS_Msk, clock); +} + +/** + * @brief Get UART0 Clock Source Setting + * @rmtoll OPCCR1 UART0CKS FL_CMU_GetUART0ClockSource + * @retval Returned value can be one of the following values: + * @arg @ref FL_CMU_UART0_CLK_SOURCE_APBCLK + * @arg @ref FL_CMU_UART0_CLK_SOURCE_RCHF + * @arg @ref FL_CMU_UART0_CLK_SOURCE_SYSCLK + * @arg @ref FL_CMU_UART0_CLK_SOURCE_XTHF + */ +__STATIC_INLINE uint32_t FL_CMU_GetUART0ClockSource(void) +{ + return (uint32_t)(READ_BIT(CMU->OPCCR1, CMU_OPCCR1_UART0CKS_Msk)); +} + +/** + * @brief Set RNG Prescaler + * @rmtoll OPCCR2 RNGPRSC FL_CMU_SetRNGPrescaler + * @param prescaler This parameter can be one of the following values: + * @arg @ref FL_CMU_RNG_PSC_DIV1 + * @arg @ref FL_CMU_RNG_PSC_DIV2 + * @arg @ref FL_CMU_RNG_PSC_DIV4 + * @arg @ref FL_CMU_RNG_PSC_DIV8 + * @arg @ref FL_CMU_RNG_PSC_DIV16 + * @arg @ref FL_CMU_RNG_PSC_DIV32 + * @retval None + */ +__STATIC_INLINE void FL_CMU_SetRNGPrescaler(uint32_t prescaler) +{ + MODIFY_REG(CMU->OPCCR2, CMU_OPCCR2_RNGPRSC_Msk, prescaler); +} + +/** + * @brief Get RNG Prescaler Setting + * @rmtoll OPCCR2 RNGPRSC FL_CMU_GetRNGPrescaler + * @retval Returned value can be one of the following values: + * @arg @ref FL_CMU_RNG_PSC_DIV1 + * @arg @ref FL_CMU_RNG_PSC_DIV2 + * @arg @ref FL_CMU_RNG_PSC_DIV4 + * @arg @ref FL_CMU_RNG_PSC_DIV8 + * @arg @ref FL_CMU_RNG_PSC_DIV16 + * @arg @ref FL_CMU_RNG_PSC_DIV32 + */ +__STATIC_INLINE uint32_t FL_CMU_GetRNGPrescaler(void) +{ + return (uint32_t)(READ_BIT(CMU->OPCCR2, CMU_OPCCR2_RNGPRSC_Msk)); +} + +/** + * @brief Set ADC Prescaler + * @rmtoll OPCCR2 ADCPRSC FL_CMU_SetADCPrescaler + * @param prescaler This parameter can be one of the following values: + * @arg @ref FL_CMU_ADC_PSC_DIV1 + * @arg @ref FL_CMU_ADC_PSC_DIV2 + * @arg @ref FL_CMU_ADC_PSC_DIV4 + * @arg @ref FL_CMU_ADC_PSC_DIV8 + * @arg @ref FL_CMU_ADC_PSC_DIV16 + * @arg @ref FL_CMU_ADC_PSC_DIV32 + * @retval None + */ +__STATIC_INLINE void FL_CMU_SetADCPrescaler(uint32_t prescaler) +{ + MODIFY_REG(CMU->OPCCR2, CMU_OPCCR2_ADCPRSC_Msk, prescaler); +} + +/** + * @brief Get ADC Prescaler Setting + * @rmtoll OPCCR2 ADCPRSC FL_CMU_GetADCPrescaler + * @retval Returned value can be one of the following values: + * @arg @ref FL_CMU_ADC_PSC_DIV1 + * @arg @ref FL_CMU_ADC_PSC_DIV2 + * @arg @ref FL_CMU_ADC_PSC_DIV4 + * @arg @ref FL_CMU_ADC_PSC_DIV8 + * @arg @ref FL_CMU_ADC_PSC_DIV16 + * @arg @ref FL_CMU_ADC_PSC_DIV32 + */ +__STATIC_INLINE uint32_t FL_CMU_GetADCPrescaler(void) +{ + return (uint32_t)(READ_BIT(CMU->OPCCR2, CMU_OPCCR2_ADCPRSC_Msk)); +} + +/** + * @brief Set ADC Clock Source + * @rmtoll OPCCR2 ADCCKS FL_CMU_SetADCClockSource + * @param clock This parameter can be one of the following values: + * @arg @ref FL_CMU_ADC_CLK_SOURCE_RCLF + * @arg @ref FL_CMU_ADC_CLK_SOURCE_RCHF + * @arg @ref FL_CMU_ADC_CLK_SOURCE_XTHF + * @arg @ref FL_CMU_ADC_CLK_SOURCE_PLL + * @retval None + */ +__STATIC_INLINE void FL_CMU_SetADCClockSource(uint32_t clock) +{ + MODIFY_REG(CMU->OPCCR2, CMU_OPCCR2_ADCCKS_Msk, clock); +} + +/** + * @brief Get ADC Clock Source Setting + * @rmtoll OPCCR2 ADCCKS FL_CMU_GetADCClockSource + * @retval Returned value can be one of the following values: + * @arg @ref FL_CMU_ADC_CLK_SOURCE_RCLF + * @arg @ref FL_CMU_ADC_CLK_SOURCE_RCHF + * @arg @ref FL_CMU_ADC_CLK_SOURCE_XTHF + * @arg @ref FL_CMU_ADC_CLK_SOURCE_PLL + */ +__STATIC_INLINE uint32_t FL_CMU_GetADCClockSource(void) +{ + return (uint32_t)(READ_BIT(CMU->OPCCR2, CMU_OPCCR2_ADCCKS_Msk)); +} + +/** + * @brief Disable CCL Interrupt + * @rmtoll CCCR CCLIE FL_CMU_CCL_DisableIT + * @retval None + */ +__STATIC_INLINE void FL_CMU_CCL_DisableIT(void) +{ + CLEAR_BIT(CMU->CCCR, CMU_CCCR_CCLIE_Msk); +} + +/** + * @brief Enable CCL Interrupt + * @rmtoll CCCR CCLIE FL_CMU_CCL_EnableIT + * @retval None + */ +__STATIC_INLINE void FL_CMU_CCL_EnableIT(void) +{ + SET_BIT(CMU->CCCR, CMU_CCCR_CCLIE_Msk); +} + +/** + * @brief Get CCL Interrupt Enable Status + * @rmtoll CCCR CCLIE FL_CMU_CCL_IsEnabledIT + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CMU_CCL_IsEnabledIT(void) +{ + return (uint32_t)(READ_BIT(CMU->CCCR, CMU_CCCR_CCLIE_Msk) == CMU_CCCR_CCLIE_Msk); +} + +/** + * @brief Enable CCL + * @rmtoll CCCR EN FL_CMU_CCL_Enable + * @retval None + */ +__STATIC_INLINE void FL_CMU_CCL_Enable(void) +{ + SET_BIT(CMU->CCCR, CMU_CCCR_EN_Msk); +} + +/** + * @brief Get CCL Enable Status + * @rmtoll CCCR EN FL_CMU_CCL_IsEnabled + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CMU_CCL_IsEnabled(void) +{ + return (uint32_t)(READ_BIT(CMU->CCCR, CMU_CCCR_EN_Msk) == CMU_CCCR_EN_Msk); +} + +/** + * @brief Disable CCL + * @rmtoll CCCR EN FL_CMU_CCL_Disable + * @retval None + */ +__STATIC_INLINE void FL_CMU_CCL_Disable(void) +{ + CLEAR_BIT(CMU->CCCR, CMU_CCCR_EN_Msk); +} + +/** + * @brief Set CCL Calibration Clock Prescaler + * @rmtoll CCFR CALPSC FL_CMU_CCL_SetCalibrationClockPrescaler + * @param prescaler This parameter can be one of the following values: + * @arg @ref FL_CMU_CCL_CALCLK_PSC_DIV1 + * @arg @ref FL_CMU_CCL_CALCLK_PSC_DIV2 + * @arg @ref FL_CMU_CCL_CALCLK_PSC_DIV4 + * @arg @ref FL_CMU_CCL_CALCLK_PSC_DIV8 + * @retval None + */ +__STATIC_INLINE void FL_CMU_CCL_SetCalibrationClockPrescaler(uint32_t prescaler) +{ + MODIFY_REG(CMU->CCFR, CMU_CCFR_CALPSC_Msk, prescaler); +} + +/** + * @brief Get CCL Calibration Clock Prescaler + * @rmtoll CCFR CALPSC FL_CMU_CCL_GetCalibrationClockPrescaler + * @retval Returned value can be one of the following values: + * @arg @ref FL_CMU_CCL_CALCLK_PSC_DIV1 + * @arg @ref FL_CMU_CCL_CALCLK_PSC_DIV2 + * @arg @ref FL_CMU_CCL_CALCLK_PSC_DIV4 + * @arg @ref FL_CMU_CCL_CALCLK_PSC_DIV8 + */ +__STATIC_INLINE uint32_t FL_CMU_CCL_GetCalibrationClockPrescaler(void) +{ + return (uint32_t)(READ_BIT(CMU->CCFR, CMU_CCFR_CALPSC_Msk)); +} + +/** + * @brief Set CCL Reference Clock Prescaler + * @rmtoll CCFR REFPSC FL_CMU_CCL_SetReferenceClockPrescaler + * @param prescaler This parameter can be one of the following values: + * @arg @ref FL_CMU_CCL_REFCLK_PSC_DIV8 + * @arg @ref FL_CMU_CCL_REFCLK_PSC_DIV16 + * @arg @ref FL_CMU_CCL_REFCLK_PSC_DIV32 + * @arg @ref FL_CMU_CCL_REFCLK_PSC_DIV64 + * @retval None + */ +__STATIC_INLINE void FL_CMU_CCL_SetReferenceClockPrescaler(uint32_t prescaler) +{ + MODIFY_REG(CMU->CCFR, CMU_CCFR_REFPSC_Msk, prescaler); +} + +/** + * @brief Get CCL Reference Clock Prescaler + * @rmtoll CCFR REFPSC FL_CMU_CCL_GetReferenceClockPrescaler + * @retval Returned value can be one of the following values: + * @arg @ref FL_CMU_CCL_REFCLK_PSC_DIV8 + * @arg @ref FL_CMU_CCL_REFCLK_PSC_DIV16 + * @arg @ref FL_CMU_CCL_REFCLK_PSC_DIV32 + * @arg @ref FL_CMU_CCL_REFCLK_PSC_DIV64 + */ +__STATIC_INLINE uint32_t FL_CMU_CCL_GetReferenceClockPrescaler(void) +{ + return (uint32_t)(READ_BIT(CMU->CCFR, CMU_CCFR_REFPSC_Msk)); +} + +/** + * @brief Set CCL Calibration Clock Source + * @rmtoll CCFR CALSEL FL_CMU_CCL_SetCalibrationClockSource + * @param clock This parameter can be one of the following values: + * @arg @ref FL_CMU_CCL_CALCLK_SOURCE_RCHF + * @arg @ref FL_CMU_CCL_CALCLK_SOURCE_RCLF + * @arg @ref FL_CMU_CCL_CALCLK_SOURCE_XTHF + * @retval None + */ +__STATIC_INLINE void FL_CMU_CCL_SetCalibrationClockSource(uint32_t clock) +{ + MODIFY_REG(CMU->CCFR, CMU_CCFR_CALSEL_Msk, clock); +} + +/** + * @brief Get CCL Calibration Clock Source Setting + * @rmtoll CCFR CALSEL FL_CMU_CCL_GetCalibrationClockSource + * @retval Returned value can be one of the following values: + * @arg @ref FL_CMU_CCL_CALCLK_SOURCE_RCHF + * @arg @ref FL_CMU_CCL_CALCLK_SOURCE_RCLF + * @arg @ref FL_CMU_CCL_CALCLK_SOURCE_XTHF + */ +__STATIC_INLINE uint32_t FL_CMU_CCL_GetCalibrationClockSource(void) +{ + return (uint32_t)(READ_BIT(CMU->CCFR, CMU_CCFR_CALSEL_Msk)); +} + +/** + * @brief Set CCL Reference Clock Source + * @rmtoll CCFR REFSEL FL_CMU_CCL_SetReferenceClockSource + * @param clock This parameter can be one of the following values: + * @arg @ref FL_CMU_CCL_REFCLK_SOURCE_XTLF + * @arg @ref FL_CMU_CCL_REFCLK_SOURCE_RCLP + * @retval None + */ +__STATIC_INLINE void FL_CMU_CCL_SetReferenceClockSource(uint32_t clock) +{ + MODIFY_REG(CMU->CCFR, CMU_CCFR_REFSEL_Msk, clock); +} + +/** + * @brief Get CCL Reference Clock Source Setting + * @rmtoll CCFR REFSEL FL_CMU_CCL_GetReferenceClockSource + * @retval Returned value can be one of the following values: + * @arg @ref FL_CMU_CCL_REFCLK_SOURCE_XTLF + * @arg @ref FL_CMU_CCL_REFCLK_SOURCE_RCLP + */ +__STATIC_INLINE uint32_t FL_CMU_CCL_GetReferenceClockSource(void) +{ + return (uint32_t)(READ_BIT(CMU->CCFR, CMU_CCFR_REFSEL_Msk)); +} + +/** + * @brief Get CCL Counter value + * @rmtoll CCNR CCNT FL_CMU_CCL_ReadCounter + * @retval + */ +__STATIC_INLINE uint32_t FL_CMU_CCL_ReadCounter(void) +{ + return (uint32_t)(READ_BIT(CMU->CCNR, (0xffffU << 0U)) >> 0U); +} + +/** + * @brief Get CCL interrupt flag + * @rmtoll CCISR CCLIF FL_CMU_IsActiveFlag_CCLComplete + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CMU_IsActiveFlag_CCLComplete(void) +{ + return (uint32_t)(READ_BIT(CMU->CCISR, CMU_CCISR_CCLIF_Msk) == (CMU_CCISR_CCLIF_Msk)); +} + +/** + * @brief Clear CCL interrupt flag + * @rmtoll CCISR CCLIF FL_CMU_ClearFlag_CCLComplete + * @retval None + */ +__STATIC_INLINE void FL_CMU_ClearFlag_CCLComplete(void) +{ + WRITE_REG(CMU->CCISR, CMU_CCISR_CCLIF_Msk); +} + +/** + * @} + */ + +/** @defgroup CMU_FL_EF_QUERY Clock frequency query functions + * @{ + */ + +uint32_t FL_CMU_GetPLLClockFreq(void); +uint32_t FL_CMU_GetRCHFClockFreq(void); +uint32_t FL_CMU_GetRCLFClockFreq(void); +uint32_t FL_CMU_GetSystemClockFreq(void); +uint32_t FL_CMU_GetAPBClockFreq(void); +uint32_t FL_CMU_GetAHBClockFreq(void); + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif /* __FM33LG0XX_FL_CMU_H*/ + +/*************************Py_Code_Generator Version: 0.1-0.14-0.1 @ 2020-10-20*************************/ +/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/ diff --git a/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_comp.h b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_comp.h new file mode 100644 index 0000000..f08eca9 --- /dev/null +++ b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_comp.h @@ -0,0 +1,1135 @@ + /** + ******************************************************************************************************* + * @file fm33lg0xx_fl_comp.h + * @author FMSH Application Team + * @brief Head file of COMP FL Module + ******************************************************************************************************* + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + + + +/* Define to prevent recursive inclusion---------------------------------------------------------------*/ +#ifndef __FM33LG0XX_FL_COMP_H +#define __FM33LG0XX_FL_COMP_H + +#ifdef __cplusplus +extern "C" { +#endif +/* Includes -------------------------------------------------------------------------------------------*/ +#include "fm33lg0xx_fl_def.h" +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @defgroup COMP COMP + * @brief COMP FL driver + * @{ + */ + +/* Exported types -------------------------------------------------------------------------------------*/ +/** @defgroup COMP_FL_ES_INIT COMP Exported Init structures + * @{ + */ + +/** + * @brief FL COMP Init Sturcture definition + */ +typedef struct +{ + /** 比较器正向输入选择 */ + uint32_t positiveInput; + /** 比较器反向输入选择 */ + uint32_t negativeInput; + /** 结果输出极性 */ + uint32_t polarity; + /** 中断触发边沿选择 */ + uint32_t edge; + /** 数字滤波器使能 */ + uint32_t digitalFilter; + /** 数字滤波器长度 */ + uint32_t digitalFilterLen; +} FL_COMP_InitTypeDef; +/** + * @} + */ +/* Exported constants ---------------------------------------------------------------------------------*/ +/** @defgroup COMP_FL_Exported_Constants COMP Exported Constants + * @{ + */ + +#define COMP_CR_TRGOEN_Pos (24U) +#define COMP_CR_TRGOEN_Msk (0x1U << COMP_CR_TRGOEN_Pos) +#define COMP_CR_TRGOEN COMP_CR_TRGOEN_Msk + +#define COMP_CR_DFLEN_Pos (19U) +#define COMP_CR_DFLEN_Msk (0x1fU << COMP_CR_DFLEN_Pos) +#define COMP_CR_DFLEN COMP_CR_DFLEN_Msk + +#define COMP_CR_WINMODE_Pos (18U) +#define COMP_CR_WINMODE_Msk (0x1U << COMP_CR_WINMODE_Pos) +#define COMP_CR_WINMODE COMP_CR_WINMODE_Msk + +#define COMP_CR_POLAR_Pos (17U) +#define COMP_CR_POLAR_Msk (0x1U << COMP_CR_POLAR_Pos) +#define COMP_CR_POLAR COMP_CR_POLAR_Msk + +#define COMP_CR_DFEN_Pos (16U) +#define COMP_CR_DFEN_Msk (0x1U << COMP_CR_DFEN_Pos) +#define COMP_CR_DFEN COMP_CR_DFEN_Msk + +#define COMP_CR_MODE_Pos (14U) +#define COMP_CR_MODE_Msk (0x3U << COMP_CR_MODE_Pos) +#define COMP_CR_MODE COMP_CR_MODE_Msk + +#define COMP_CR_CMPO_Pos (8U) +#define COMP_CR_CMPO_Msk (0x1U << COMP_CR_CMPO_Pos) +#define COMP_CR_CMPO COMP_CR_CMPO_Msk + +#define COMP_CR_VPSEL_Pos (4U) +#define COMP_CR_VPSEL_Msk (0x7U << COMP_CR_VPSEL_Pos) +#define COMP_CR_VPSEL COMP_CR_VPSEL_Msk + +#define COMP_CR_VNSEL_Pos (1U) +#define COMP_CR_VNSEL_Msk (0x7U << COMP_CR_VNSEL_Pos) +#define COMP_CR_VNSEL COMP_CR_VNSEL_Msk + +#define COMP_CR_CMPEN_Pos (0U) +#define COMP_CR_CMPEN_Msk (0x1U << COMP_CR_CMPEN_Pos) +#define COMP_CR_CMPEN COMP_CR_CMPEN_Msk + +#define COMP_ICR_OWW_IE_Pos (25U) +#define COMP_ICR_OWW_IE_Msk (0x1U << COMP_ICR_OWW_IE_Pos) +#define COMP_ICR_OWW_IE COMP_ICR_OWW_IE_Msk + +#define COMP_ICR_WIN_IE_Pos (24U) +#define COMP_ICR_WIN_IE_Msk (0x1U << COMP_ICR_WIN_IE_Pos) +#define COMP_ICR_WIN_IE COMP_ICR_WIN_IE_Msk + +#define COMP_ICR_CMP3SEL_Pos (18U) +#define COMP_ICR_CMP3SEL_Msk (0x3U << COMP_ICR_CMP3SEL_Pos) +#define COMP_ICR_CMP3SEL COMP_ICR_CMP3SEL_Msk + +#define COMP_ICR_CMP3IE_Pos (16U) +#define COMP_ICR_CMP3IE_Msk (0x1U << COMP_ICR_CMP3IE_Pos) +#define COMP_ICR_CMP3IE COMP_ICR_CMP3IE_Msk + +#define COMP_ICR_CMP2SEL_Pos (10U) +#define COMP_ICR_CMP2SEL_Msk (0x3U << COMP_ICR_CMP2SEL_Pos) +#define COMP_ICR_CMP2SEL COMP_ICR_CMP2SEL_Msk + +#define COMP_ICR_CMP2IE_Pos (8U) +#define COMP_ICR_CMP2IE_Msk (0x1U << COMP_ICR_CMP2IE_Pos) +#define COMP_ICR_CMP2IE COMP_ICR_CMP2IE_Msk + +#define COMP_ICR_CMP1SEL_Pos (2U) +#define COMP_ICR_CMP1SEL_Msk (0x3U << COMP_ICR_CMP1SEL_Pos) +#define COMP_ICR_CMP1SEL COMP_ICR_CMP1SEL_Msk + +#define COMP_ICR_CMP1IE_Pos (0U) +#define COMP_ICR_CMP1IE_Msk (0x1U << COMP_ICR_CMP1IE_Pos) +#define COMP_ICR_CMP1IE COMP_ICR_CMP1IE_Msk + +#define COMP_ISR_OOW_IF_Pos (4U) +#define COMP_ISR_OOW_IF_Msk (0x1U << COMP_ISR_OOW_IF_Pos) +#define COMP_ISR_OOW_IF COMP_ISR_OOW_IF_Msk + +#define COMP_ISR_WIN_IF_Pos (3U) +#define COMP_ISR_WIN_IF_Msk (0x1U << COMP_ISR_WIN_IF_Pos) +#define COMP_ISR_WIN_IF COMP_ISR_WIN_IF_Msk + +#define COMP_ISR_CMP3IF_Pos (2U) +#define COMP_ISR_CMP3IF_Msk (0x1U << COMP_ISR_CMP3IF_Pos) +#define COMP_ISR_CMP3IF COMP_ISR_CMP3IF_Msk + +#define COMP_ISR_CMP2IF_Pos (1U) +#define COMP_ISR_CMP2IF_Msk (0x1U << COMP_ISR_CMP2IF_Pos) +#define COMP_ISR_CMP2IF COMP_ISR_CMP2IF_Msk + +#define COMP_ISR_CMP1IF_Pos (0U) +#define COMP_ISR_CMP1IF_Msk (0x1U << COMP_ISR_CMP1IF_Pos) +#define COMP_ISR_CMP1IF COMP_ISR_CMP1IF_Msk + +#define COMP_BUFCR_BUFBYP_Pos (2U) +#define COMP_BUFCR_BUFBYP_Msk (0x1U << COMP_BUFCR_BUFBYP_Pos) +#define COMP_BUFCR_BUFBYP COMP_BUFCR_BUFBYP_Msk + +#define COMP_BUFCR_BUFSEL_Pos (1U) +#define COMP_BUFCR_BUFSEL_Msk (0x1U << COMP_BUFCR_BUFSEL_Pos) +#define COMP_BUFCR_BUFSEL COMP_BUFCR_BUFSEL_Msk + +#define COMP_BUFCR_BUFENB_Pos (0U) +#define COMP_BUFCR_BUFENB_Msk (0x1U << COMP_BUFCR_BUFENB_Pos) +#define COMP_BUFCR_BUFENB COMP_BUFCR_BUFENB_Msk + + + + + + +#define FL_COMP_OUTPUT_FILTER_WINDOW_3APBCLK (0x0U << COMP_CR_DFLEN_Pos) +#define FL_COMP_OUTPUT_FILTER_WINDOW_4APBCLK (0x3U << COMP_CR_DFLEN_Pos) +#define FL_COMP_OUTPUT_FILTER_WINDOW_5APBCLK (0x4U << COMP_CR_DFLEN_Pos) +#define FL_COMP_OUTPUT_FILTER_WINDOW_6APBCLK (0x5U << COMP_CR_DFLEN_Pos) +#define FL_COMP_OUTPUT_FILTER_WINDOW_7APBCLK (0x6U << COMP_CR_DFLEN_Pos) +#define FL_COMP_OUTPUT_FILTER_WINDOW_8APBCLK (0x7U << COMP_CR_DFLEN_Pos) +#define FL_COMP_OUTPUT_FILTER_WINDOW_9APBCLK (0x8U << COMP_CR_DFLEN_Pos) +#define FL_COMP_OUTPUT_FILTER_WINDOW_10APBCLK (0x9U << COMP_CR_DFLEN_Pos) +#define FL_COMP_OUTPUT_FILTER_WINDOW_11APBCLK (0xaU << COMP_CR_DFLEN_Pos) +#define FL_COMP_OUTPUT_FILTER_WINDOW_12APBCLK (0xbU << COMP_CR_DFLEN_Pos) +#define FL_COMP_OUTPUT_FILTER_WINDOW_13APBCLK (0xcU << COMP_CR_DFLEN_Pos) +#define FL_COMP_OUTPUT_FILTER_WINDOW_14APBCLK (0xdU << COMP_CR_DFLEN_Pos) +#define FL_COMP_OUTPUT_FILTER_WINDOW_15APBCLK (0xeU << COMP_CR_DFLEN_Pos) +#define FL_COMP_OUTPUT_FILTER_WINDOW_16APBCLK (0xfU << COMP_CR_DFLEN_Pos) +#define FL_COMP_OUTPUT_FILTER_WINDOW_17APBCLK (0x10U << COMP_CR_DFLEN_Pos) +#define FL_COMP_OUTPUT_FILTER_WINDOW_18APBCLK (0x11U << COMP_CR_DFLEN_Pos) +#define FL_COMP_OUTPUT_FILTER_WINDOW_19APBCLK (0x12U << COMP_CR_DFLEN_Pos) +#define FL_COMP_OUTPUT_FILTER_WINDOW_20APBCLK (0x13U << COMP_CR_DFLEN_Pos) +#define FL_COMP_OUTPUT_FILTER_WINDOW_21APBCLK (0x14U << COMP_CR_DFLEN_Pos) +#define FL_COMP_OUTPUT_FILTER_WINDOW_22APBCLK (0x15U << COMP_CR_DFLEN_Pos) +#define FL_COMP_OUTPUT_FILTER_WINDOW_23APBCLK (0x16U << COMP_CR_DFLEN_Pos) +#define FL_COMP_OUTPUT_FILTER_WINDOW_24APBCLK (0x17U << COMP_CR_DFLEN_Pos) +#define FL_COMP_OUTPUT_FILTER_WINDOW_25APBCLK (0x18U << COMP_CR_DFLEN_Pos) +#define FL_COMP_OUTPUT_FILTER_WINDOW_26APBCLK (0x19U << COMP_CR_DFLEN_Pos) +#define FL_COMP_OUTPUT_FILTER_WINDOW_27APBCLK (0x1aU << COMP_CR_DFLEN_Pos) +#define FL_COMP_OUTPUT_FILTER_WINDOW_28APBCLK (0x1bU << COMP_CR_DFLEN_Pos) +#define FL_COMP_OUTPUT_FILTER_WINDOW_29APBCLK (0x1cU << COMP_CR_DFLEN_Pos) +#define FL_COMP_OUTPUT_FILTER_WINDOW_30APBCLK (0x1dU << COMP_CR_DFLEN_Pos) +#define FL_COMP_OUTPUT_FILTER_WINDOW_31APBCLK (0x1eU << COMP_CR_DFLEN_Pos) +#define FL_COMP_OUTPUT_FILTER_WINDOW_32APBCLK (0x1fU << COMP_CR_DFLEN_Pos) + + +#define FL_COMP_OUTPUT_POLARITY_NORMAL (0x0U << COMP_CR_POLAR_Pos) +#define FL_COMP_OUTPUT_POLARITY_INVERT (0x1U << COMP_CR_POLAR_Pos) + + +#define FL_COMP_POWER_MODE_LOW (0x0U << COMP_CR_MODE_Pos) +#define FL_COMP_POWER_MODE_MEDIUM (0x1U << COMP_CR_MODE_Pos) +#define FL_COMP_POWER_MODE_HIGH (0x2U << COMP_CR_MODE_Pos) + + +#define FL_COMP_OUTPUT_LOW (0x0U << COMP_CR_CMPO_Pos) +#define FL_COMP_OUTPUT_HIGH (0x1U << COMP_CR_CMPO_Pos) + +#define FL_COMP_INP_SOURCE_INP1 (0x0U << COMP_CR_VPSEL_Pos) +#define FL_COMP_INP_SOURCE_INP2 (0x1U << COMP_CR_VPSEL_Pos) +#define FL_COMP_INP_SOURCE_AVREF (0x2U << COMP_CR_VPSEL_Pos) +#define FL_COMP_INP_SOURCE_ULPBG_REF (0x3U << COMP_CR_VPSEL_Pos) +#define FL_COMP_INP_SOURCE_VDD15 (0x4U << COMP_CR_VPSEL_Pos) +#define FL_COMP_INP_SOURCE_VREFP (0x5U << COMP_CR_VPSEL_Pos) + + +#define FL_COMP_INN_SOURCE_INN1 (0x0U << COMP_CR_VNSEL_Pos) +#define FL_COMP_INN_SOURCE_INN2 (0x1U << COMP_CR_VNSEL_Pos) +#define FL_COMP_INN_SOURCE_VREF (0x2U << COMP_CR_VNSEL_Pos) +#define FL_COMP_INN_SOURCE_VREF_DIV_2 (0x3U << COMP_CR_VNSEL_Pos) +#define FL_COMP_INN_SOURCE_VREFP (0x4U << COMP_CR_VNSEL_Pos) +#define FL_COMP_INN_SOURCE_DAC (0x5U << COMP_CR_VNSEL_Pos) + + +#define FL_COMP_COMP3_INTERRUPT_EDGE_BOTH (0x0U << COMP_ICR_CMP3SEL_Pos) +#define FL_COMP_COMP3_INTERRUPT_EDGE_RISING (0x1U << COMP_ICR_CMP3SEL_Pos) +#define FL_COMP_COMP3_INTERRUPT_EDGE_FALLING (0x2U << COMP_ICR_CMP3SEL_Pos) + + +#define FL_COMP_COMP2_INTERRUPT_EDGE_BOTH (0x0U << COMP_ICR_CMP2SEL_Pos) +#define FL_COMP_COMP2_INTERRUPT_EDGE_RISING (0x1U << COMP_ICR_CMP2SEL_Pos) +#define FL_COMP_COMP2_INTERRUPT_EDGE_FALLING (0x2U << COMP_ICR_CMP2SEL_Pos) + + +#define FL_COMP_COMP1_INTERRUPT_EDGE_BOTH (0x0U << COMP_ICR_CMP1SEL_Pos) +#define FL_COMP_COMP1_INTERRUPT_EDGE_RISING (0x1U << COMP_ICR_CMP1SEL_Pos) +#define FL_COMP_COMP1_INTERRUPT_EDGE_FALLING (0x2U << COMP_ICR_CMP1SEL_Pos) + +#define FL_COMP_INTERRUPT_EDGE_BOTH (0x0U) +#define FL_COMP_INTERRUPT_EDGE_RISING (0x1U) +#define FL_COMP_INTERRUPT_EDGE_FALLING (0x2U) + +#define FL_COMP_BUFF_REFERENCE_AVREF (0x0U << COMP_BUFCR_BUFSEL_Pos) +#define FL_COMP_BUFF_REFERENCE_VREF1P2 (0x1U << COMP_BUFCR_BUFSEL_Pos) + + +/** + * @} + */ +/* Exported functions ---------------------------------------------------------------------------------*/ +/** @defgroup COMP_FL_Exported_Functions COMP Exported Functions + * @{ + */ + +/** + * @brief COMPx trigger output enable + * @rmtoll CR TRGOEN FL_COMP_EnableTriggerOutput + * @param COMPx COMP instance + * @retval None + */ +__STATIC_INLINE void FL_COMP_EnableTriggerOutput(COMP_Type *COMPx) +{ + SET_BIT(COMPx->CR, COMP_CR_TRGOEN_Msk); +} + +/** + * @brief Get COMPx trigger output enable status + * @rmtoll CR TRGOEN FL_COMP_IsEnabledTriggerOutput + * @param COMPx COMP instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_COMP_IsEnabledTriggerOutput(COMP_Type *COMPx) +{ + return (uint32_t)(READ_BIT(COMPx->CR, COMP_CR_TRGOEN_Msk) == COMP_CR_TRGOEN_Msk); +} + +/** + * @brief COMPx trigger output disable + * @rmtoll CR TRGOEN FL_COMP_DisableTriggerOutput + * @param COMPx COMP instance + * @retval None + */ +__STATIC_INLINE void FL_COMP_DisableTriggerOutput(COMP_Type *COMPx) +{ + CLEAR_BIT(COMPx->CR, COMP_CR_TRGOEN_Msk); +} + +/** + * @brief Set COMPx Output Digital Filter Length + * @rmtoll CR DFLEN FL_COMP_SetOutputFilterWindow + * @param COMPx COMP instance + * @param length This parameter can be one of the following values: + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_3APBCLK + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_4APBCLK + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_5APBCLK + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_6APBCLK + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_7APBCLK + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_8APBCLK + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_9APBCLK + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_10APBCLK + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_11APBCLK + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_12APBCLK + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_13APBCLK + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_14APBCLK + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_15APBCLK + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_16APBCLK + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_17APBCLK + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_18APBCLK + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_19APBCLK + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_20APBCLK + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_21APBCLK + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_22APBCLK + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_23APBCLK + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_24APBCLK + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_25APBCLK + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_26APBCLK + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_27APBCLK + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_28APBCLK + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_29APBCLK + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_30APBCLK + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_31APBCLK + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_32APBCLK + * @retval None + */ +__STATIC_INLINE void FL_COMP_SetOutputFilterWindow(COMP_Type *COMPx, uint32_t length) +{ + MODIFY_REG(COMPx->CR, COMP_CR_DFLEN_Msk, length); +} + +/** + * @brief Get COMPx Output Digital Filter Length + * @rmtoll CR DFLEN FL_COMP_GetOutputFilterWindow + * @param COMPx COMP instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_3APBCLK + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_4APBCLK + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_5APBCLK + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_6APBCLK + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_7APBCLK + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_8APBCLK + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_9APBCLK + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_10APBCLK + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_11APBCLK + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_12APBCLK + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_13APBCLK + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_14APBCLK + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_15APBCLK + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_16APBCLK + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_17APBCLK + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_18APBCLK + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_19APBCLK + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_20APBCLK + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_21APBCLK + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_22APBCLK + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_23APBCLK + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_24APBCLK + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_25APBCLK + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_26APBCLK + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_27APBCLK + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_28APBCLK + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_29APBCLK + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_30APBCLK + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_31APBCLK + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_32APBCLK + */ +__STATIC_INLINE uint32_t FL_COMP_GetOutputFilterWindow(COMP_Type *COMPx) +{ + return (uint32_t)(READ_BIT(COMPx->CR, COMP_CR_DFLEN_Msk)); +} + +/** + * @brief COMPx Window Mode enable + * @rmtoll CR WINMODE FL_COMP_EnableWindowMode + * @param COMPx COMP instance + * @retval None + */ +__STATIC_INLINE void FL_COMP_EnableWindowMode(COMP_Type *COMPx) +{ + SET_BIT(COMPx->CR, COMP_CR_WINMODE_Msk); +} + +/** + * @brief Get COMPx Window Mode enable status + * @rmtoll CR WINMODE FL_COMP_IsEnabledWindowMode + * @param COMPx COMP instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_COMP_IsEnabledWindowMode(COMP_Type *COMPx) +{ + return (uint32_t)(READ_BIT(COMPx->CR, COMP_CR_WINMODE_Msk) == COMP_CR_WINMODE_Msk); +} + +/** + * @brief COMPx Window Mode disable + * @rmtoll CR WINMODE FL_COMP_DisableWindowMode + * @param COMPx COMP instance + * @retval None + */ +__STATIC_INLINE void FL_COMP_DisableWindowMode(COMP_Type *COMPx) +{ + CLEAR_BIT(COMPx->CR, COMP_CR_WINMODE_Msk); +} + +/** + * @brief Set COMPx output polarity + * @rmtoll CR POLAR FL_COMP_SetOutputPolarity + * @param COMPx COMP instance + * @param polarity This parameter can be one of the following values: + * @arg @ref FL_COMP_OUTPUT_POLARITY_NORMAL + * @arg @ref FL_COMP_OUTPUT_POLARITY_INVERT + * @retval None + */ +__STATIC_INLINE void FL_COMP_SetOutputPolarity(COMP_Type *COMPx, uint32_t polarity) +{ + MODIFY_REG(COMPx->CR, COMP_CR_POLAR_Msk, polarity); +} + +/** + * @brief Get COMPx output polarity + * @rmtoll CR POLAR FL_COMP_GetOutputPolarity + * @param COMPx COMP instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_COMP_OUTPUT_POLARITY_NORMAL + * @arg @ref FL_COMP_OUTPUT_POLARITY_INVERT + */ +__STATIC_INLINE uint32_t FL_COMP_GetOutputPolarity(COMP_Type *COMPx) +{ + return (uint32_t)(READ_BIT(COMPx->CR, COMP_CR_POLAR_Msk)); +} + +/** + * @brief COMPx DigitalFilter enable + * @rmtoll CR DFEN FL_COMP_EnableOutputFilter + * @param COMPx COMP instance + * @retval None + */ +__STATIC_INLINE void FL_COMP_EnableOutputFilter(COMP_Type *COMPx) +{ + SET_BIT(COMPx->CR, COMP_CR_DFEN_Msk); +} + +/** + * @brief Get COMPx DigitalFilter enable status + * @rmtoll CR DFEN FL_COMP_IsEnabledOutputFilter + * @param COMPx COMP instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_COMP_IsEnabledOutputFilter(COMP_Type *COMPx) +{ + return (uint32_t)(READ_BIT(COMPx->CR, COMP_CR_DFEN_Msk) == COMP_CR_DFEN_Msk); +} + +/** + * @brief COMPx DigitalFilter disable + * @rmtoll CR DFEN FL_COMP_DisableOutputFilter + * @param COMPx COMP instance + * @retval None + */ +__STATIC_INLINE void FL_COMP_DisableOutputFilter(COMP_Type *COMPx) +{ + CLEAR_BIT(COMPx->CR, COMP_CR_DFEN_Msk); +} + +/** + * @brief Set COMPx Power mode + * @rmtoll CR MODE FL_COMP_SetPowerMode + * @param COMPx COMP instance + * @param mode This parameter can be one of the following values: + * @arg @ref FL_COMP_POWER_MODE_LOW + * @arg @ref FL_COMP_POWER_MODE_MEDIUM + * @arg @ref FL_COMP_POWER_MODE_HIGH + * @retval None + */ +__STATIC_INLINE void FL_COMP_SetPowerMode(COMP_Type *COMPx, uint32_t mode) +{ + MODIFY_REG(COMPx->CR, COMP_CR_MODE_Msk, mode); +} + +/** + * @brief Get COMPx Power mode + * @rmtoll CR MODE FL_COMP_GetPowerMode + * @param COMPx COMP instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_COMP_POWER_MODE_LOW + * @arg @ref FL_COMP_POWER_MODE_MEDIUM + * @arg @ref FL_COMP_POWER_MODE_HIGH + */ +__STATIC_INLINE uint32_t FL_COMP_GetPowerMode(COMP_Type *COMPx) +{ + return (uint32_t)(READ_BIT(COMPx->CR, COMP_CR_MODE_Msk)); +} + +/** + * @brief Get comparator output channel + * @rmtoll CR CMPO FL_COMP_GetOutput + * @param COMPx COMP instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_COMP_OUTPUT_LOW + * @arg @ref FL_COMP_OUTPUT_HIGH + */ +__STATIC_INLINE uint32_t FL_COMP_GetOutput(COMP_Type *COMPx) +{ + return (uint32_t)(READ_BIT(COMPx->CR, COMP_CR_CMPO_Msk)); +} + +/** + * @brief Set COMPx positive input + * @rmtoll CR VPSEL FL_COMP_SetINPSource + * @param COMPx COMP instance + * @param source This parameter can be one of the following values: + * @arg @ref FL_COMP_INP_SOURCE_INP1 + * @arg @ref FL_COMP_INP_SOURCE_INP2 + * @arg @ref FL_COMP_INP_SOURCE_AVREF + * @arg @ref FL_COMP_INP_SOURCE_ULPBG_AREF + * @arg @ref FL_COMP_INP_SOURCE_VDD15 + * @arg @ref FL_COMP_INP_SOURCE_VREFP + * @retval None + */ +__STATIC_INLINE void FL_COMP_SetINPSource(COMP_Type *COMPx, uint32_t source) +{ + MODIFY_REG(COMPx->CR, COMP_CR_VPSEL_Msk, source); +} + +/** + * @brief Get COMPx positive input status + * @rmtoll CR VPSEL FL_COMP_GetINPSource + * @param COMPx COMP instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_COMP_INP_SOURCE_INP1 + * @arg @ref FL_COMP_INP_SOURCE_INP2 + * @arg @ref FL_COMP_INP_SOURCE_AVREF + * @arg @ref FL_COMP_INP_SOURCE_ULPBG_AREF + * @arg @ref FL_COMP_INP_SOURCE_VDD15 + * @arg @ref FL_COMP_INP_SOURCE_VREFP + */ +__STATIC_INLINE uint32_t FL_COMP_GetINPSource(COMP_Type *COMPx) +{ + return (uint32_t)(READ_BIT(COMPx->CR, COMP_CR_VPSEL_Msk)); +} + +/** + * @brief Set COMPx negative input + * @rmtoll CR VNSEL FL_COMP_SetINNSource + * @param COMPx COMP instance + * @param source This parameter can be one of the following values: + * @arg @ref FL_COMP_INN_SOURCE_INN1 + * @arg @ref FL_COMP_INN_SOURCE_INN2 + * @arg @ref FL_COMP_INN_SOURCE_VREF + * @arg @ref FL_COMP_INN_SOURCE_VREF_DIV_2 + * @arg @ref FL_COMP_INN_SOURCE_VREFP + * @arg @ref FL_COMP_INN_SOURCE_DAC + * @retval None + */ +__STATIC_INLINE void FL_COMP_SetINNSource(COMP_Type *COMPx, uint32_t source) +{ + MODIFY_REG(COMPx->CR, COMP_CR_VNSEL_Msk, source); +} + +/** + * @brief Get COMPx negative input status + * @rmtoll CR VNSEL FL_COMP_GetINNSource + * @param COMPx COMP instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_COMP_INN_SOURCE_INN1 + * @arg @ref FL_COMP_INN_SOURCE_INN2 + * @arg @ref FL_COMP_INN_SOURCE_VREF + * @arg @ref FL_COMP_INN_SOURCE_VREF_DIV_2 + * @arg @ref FL_COMP_INN_SOURCE_VREFP + * @arg @ref FL_COMP_INN_SOURCE_DAC + */ +__STATIC_INLINE uint32_t FL_COMP_GetINNSource(COMP_Type *COMPx) +{ + return (uint32_t)(READ_BIT(COMPx->CR, COMP_CR_VNSEL_Msk)); +} + +/** + * @brief COMPx enable + * @rmtoll CR CMPEN FL_COMP_Enable + * @param COMPx COMP instance + * @retval None + */ +__STATIC_INLINE void FL_COMP_Enable(COMP_Type *COMPx) +{ + SET_BIT(COMPx->CR, COMP_CR_CMPEN_Msk); +} + +/** + * @brief Get COMPx enable status + * @rmtoll CR CMPEN FL_COMP_IsEnabled + * @param COMPx COMP instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_COMP_IsEnabled(COMP_Type *COMPx) +{ + return (uint32_t)(READ_BIT(COMPx->CR, COMP_CR_CMPEN_Msk) == COMP_CR_CMPEN_Msk); +} + +/** + * @brief COMPx disable + * @rmtoll CR CMPEN FL_COMP_Disable + * @param COMPx COMP instance + * @retval None + */ +__STATIC_INLINE void FL_COMP_Disable(COMP_Type *COMPx) +{ + CLEAR_BIT(COMPx->CR, COMP_CR_CMPEN_Msk); +} + +/** + * @brief Comparator Out Of Window interrupt enable + * @rmtoll ICR OWW_IE FL_COMP_EnableIT_OutOfWindow + * @param COMPx COMP instance + * @retval None + */ +__STATIC_INLINE void FL_COMP_EnableIT_OutOfWindow(COMP_COMMON_Type *COMPx) +{ + SET_BIT(COMPx->ICR, COMP_ICR_OWW_IE_Msk); +} + +/** + * @brief Get Comparator Out Of Window interrupt enable status + * @rmtoll ICR OWW_IE FL_COMP_IsEnabledIT_OutOfWindow + * @param COMPx COMP instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_COMP_IsEnabledIT_OutOfWindow(COMP_COMMON_Type *COMPx) +{ + return (uint32_t)(READ_BIT(COMPx->ICR, COMP_ICR_OWW_IE_Msk) == COMP_ICR_OWW_IE_Msk); +} + +/** + * @brief Comparator Out Of Window interrupt disable + * @rmtoll ICR OWW_IE FL_COMP_DisableIT_OutOfWindow + * @param COMPx COMP instance + * @retval None + */ +__STATIC_INLINE void FL_COMP_DisableIT_OutOfWindow(COMP_COMMON_Type *COMPx) +{ + CLEAR_BIT(COMPx->ICR, COMP_ICR_OWW_IE_Msk); +} + +/** + * @brief Comparator Across Window interrupt enable + * @rmtoll ICR WIN_IE FL_COMP_EnableIT_AcrossWindowThreshold + * @param COMPx COMP instance + * @retval None + */ +__STATIC_INLINE void FL_COMP_EnableIT_AcrossWindowThreshold(COMP_COMMON_Type *COMPx) +{ + SET_BIT(COMPx->ICR, COMP_ICR_WIN_IE_Msk); +} + +/** + * @brief Get comparator Across Window interrupt enable status + * @rmtoll ICR WIN_IE FL_COMP_IsEnabledIT_AcrossWindowThreshold + * @param COMPx COMP instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_COMP_IsEnabledIT_AcrossWindowThreshold(COMP_COMMON_Type *COMPx) +{ + return (uint32_t)(READ_BIT(COMPx->ICR, COMP_ICR_WIN_IE_Msk) == COMP_ICR_WIN_IE_Msk); +} + +/** + * @brief Comparator Across Window interrupt disable + * @rmtoll ICR WIN_IE FL_COMP_DisableIT_AcrossWindowThreshold + * @param COMPx COMP instance + * @retval None + */ +__STATIC_INLINE void FL_COMP_DisableIT_AcrossWindowThreshold(COMP_COMMON_Type *COMPx) +{ + CLEAR_BIT(COMPx->ICR, COMP_ICR_WIN_IE_Msk); +} + +/** + * @brief Set comparator3 interrupt edge + * @rmtoll ICR CMP3SEL FL_COMP_SetComparator3InterruptEdge + * @param COMPx COMP instance + * @param edge This parameter can be one of the following values: + * @arg @ref FL_COMP_COMP3_INTERRUPT_EDGE_BOTH + * @arg @ref FL_COMP_COMP3_INTERRUPT_EDGE_RISING + * @arg @ref FL_COMP_COMP3_INTERRUPT_EDGE_FALLING + * @retval None + */ +__STATIC_INLINE void FL_COMP_SetComparator3InterruptEdge(COMP_COMMON_Type *COMPx, uint32_t edge) +{ + MODIFY_REG(COMPx->ICR, COMP_ICR_CMP3SEL_Msk, edge); +} + +/** + * @brief Get comparator3 interrupt edge + * @rmtoll ICR CMP3SEL FL_COMP_GetComparator3InterruptEdge + * @param COMPx COMP instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_COMP_COMP3_INTERRUPT_EDGE_BOTH + * @arg @ref FL_COMP_COMP3_INTERRUPT_EDGE_RISING + * @arg @ref FL_COMP_COMP3_INTERRUPT_EDGE_FALLING + */ +__STATIC_INLINE uint32_t FL_COMP_GetComparator3InterruptEdge(COMP_COMMON_Type *COMPx) +{ + return (uint32_t)(READ_BIT(COMPx->ICR, COMP_ICR_CMP3SEL_Msk)); +} + +/** + * @brief Comparator3 interrupt enable + * @rmtoll ICR CMP3IE FL_COMP_EnableIT_Comparator3 + * @param COMPx COMP instance + * @retval None + */ +__STATIC_INLINE void FL_COMP_EnableIT_Comparator3(COMP_COMMON_Type *COMPx) +{ + SET_BIT(COMPx->ICR, COMP_ICR_CMP3IE_Msk); +} + +/** + * @brief Get comparator3 interrupt enable status + * @rmtoll ICR CMP3IE FL_COMP_IsEnabledIT_Comparator3 + * @param COMPx COMP instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_COMP_IsEnabledIT_Comparator3(COMP_COMMON_Type *COMPx) +{ + return (uint32_t)(READ_BIT(COMPx->ICR, COMP_ICR_CMP3IE_Msk) == COMP_ICR_CMP3IE_Msk); +} + +/** + * @brief Comparator3 interrupt disable + * @rmtoll ICR CMP3IE FL_COMP_DisableIT_Comparator3 + * @param COMPx COMP instance + * @retval None + */ +__STATIC_INLINE void FL_COMP_DisableIT_Comparator3(COMP_COMMON_Type *COMPx) +{ + CLEAR_BIT(COMPx->ICR, COMP_ICR_CMP3IE_Msk); +} + +/** + * @brief Set comparator2 interrupt edge + * @rmtoll ICR CMP2SEL FL_COMP_SetComparator2InterruptEdge + * @param COMPx COMP instance + * @param edge This parameter can be one of the following values: + * @arg @ref FL_COMP_COMP2_INTERRUPT_EDGE_BOTH + * @arg @ref FL_COMP_COMP2_INTERRUPT_EDGE_RISING + * @arg @ref FL_COMP_COMP2_INTERRUPT_EDGE_FALLING + * @retval None + */ +__STATIC_INLINE void FL_COMP_SetComparator2InterruptEdge(COMP_COMMON_Type *COMPx, uint32_t edge) +{ + MODIFY_REG(COMPx->ICR, COMP_ICR_CMP2SEL_Msk, edge); +} + +/** + * @brief Get comparator2 interrupt edge + * @rmtoll ICR CMP2SEL FL_COMP_GetComparator2InterruptEdge + * @param COMPx COMP instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_COMP_COMP2_INTERRUPT_EDGE_BOTH + * @arg @ref FL_COMP_COMP2_INTERRUPT_EDGE_RISING + * @arg @ref FL_COMP_COMP2_INTERRUPT_EDGE_FALLING + */ +__STATIC_INLINE uint32_t FL_COMP_GetComparator2InterruptEdge(COMP_COMMON_Type *COMPx) +{ + return (uint32_t)(READ_BIT(COMPx->ICR, COMP_ICR_CMP2SEL_Msk)); +} + +/** + * @brief Comparator2 interrupt enable + * @rmtoll ICR CMP2IE FL_COMP_EnableIT_Comparator2 + * @param COMPx COMP instance + * @retval None + */ +__STATIC_INLINE void FL_COMP_EnableIT_Comparator2(COMP_COMMON_Type *COMPx) +{ + SET_BIT(COMPx->ICR, COMP_ICR_CMP2IE_Msk); +} + +/** + * @brief Get comparator2 interrupt enable status + * @rmtoll ICR CMP2IE FL_COMP_IsEnabledIT_Comparator2 + * @param COMPx COMP instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_COMP_IsEnabledIT_Comparator2(COMP_COMMON_Type *COMPx) +{ + return (uint32_t)(READ_BIT(COMPx->ICR, COMP_ICR_CMP2IE_Msk) == COMP_ICR_CMP2IE_Msk); +} + +/** + * @brief Comparator2 interrupt disable + * @rmtoll ICR CMP2IE FL_COMP_DisableIT_Comparator2 + * @param COMPx COMP instance + * @retval None + */ +__STATIC_INLINE void FL_COMP_DisableIT_Comparator2(COMP_COMMON_Type *COMPx) +{ + CLEAR_BIT(COMPx->ICR, COMP_ICR_CMP2IE_Msk); +} + +/** + * @brief Set comparator1 interrupt edge + * @rmtoll ICR CMP1SEL FL_COMP_SetComparator1InterruptEdge + * @param COMPx COMP instance + * @param edge This parameter can be one of the following values: + * @arg @ref FL_COMP_COMP1_INTERRUPT_EDGE_BOTH + * @arg @ref FL_COMP_COMP1_INTERRUPT_EDGE_RISING + * @arg @ref FL_COMP_COMP1_INTERRUPT_EDGE_FALLING + * @retval None + */ +__STATIC_INLINE void FL_COMP_SetComparator1InterruptEdge(COMP_COMMON_Type *COMPx, uint32_t edge) +{ + MODIFY_REG(COMPx->ICR, COMP_ICR_CMP1SEL_Msk, edge); +} + +/** + * @brief Get comparator1 interrupt edge + * @rmtoll ICR CMP1SEL FL_COMP_GetComparator1InterruptEdge + * @param COMPx COMP instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_COMP_COMP1_INTERRUPT_EDGE_BOTH + * @arg @ref FL_COMP_COMP1_INTERRUPT_EDGE_RISING + * @arg @ref FL_COMP_COMP1_INTERRUPT_EDGE_FALLING + */ +__STATIC_INLINE uint32_t FL_COMP_GetComparator1InterruptEdge(COMP_COMMON_Type *COMPx) +{ + return (uint32_t)(READ_BIT(COMPx->ICR, COMP_ICR_CMP1SEL_Msk)); +} + +/** + * @brief Comparator1 interrupt enable + * @rmtoll ICR CMP1IE FL_COMP_EnableIT_Comparator1 + * @param COMPx COMP instance + * @retval None + */ +__STATIC_INLINE void FL_COMP_EnableIT_Comparator1(COMP_COMMON_Type *COMPx) +{ + SET_BIT(COMPx->ICR, COMP_ICR_CMP1IE_Msk); +} + +/** + * @brief Get comparator1 interrupt enable status + * @rmtoll ICR CMP1IE FL_COMP_IsEnabledIT_Comparator1 + * @param COMPx COMP instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_COMP_IsEnabledIT_Comparator1(COMP_COMMON_Type *COMPx) +{ + return (uint32_t)(READ_BIT(COMPx->ICR, COMP_ICR_CMP1IE_Msk) == COMP_ICR_CMP1IE_Msk); +} + +/** + * @brief Comparator1 interrupt disable + * @rmtoll ICR CMP1IE FL_COMP_DisableIT_Comparator1 + * @param COMPx COMP instance + * @retval None + */ +__STATIC_INLINE void FL_COMP_DisableIT_Comparator1(COMP_COMMON_Type *COMPx) +{ + CLEAR_BIT(COMPx->ICR, COMP_ICR_CMP1IE_Msk); +} + +/** + * @brief Get outof window interrupt flag + * @rmtoll ISR OOW_IF FL_COMP_IsActiveFlag_OutOfWindow + * @param COMPx COMP instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_COMP_IsActiveFlag_OutOfWindow(COMP_COMMON_Type *COMPx) +{ + return (uint32_t)(READ_BIT(COMPx->ISR, COMP_ISR_OOW_IF_Msk) == (COMP_ISR_OOW_IF_Msk)); +} + +/** + * @brief Clear outof window interrupt flag + * @rmtoll ISR OOW_IF FL_COMP_ClearFlag_OutOfWindow + * @param COMPx COMP instance + * @retval None + */ +__STATIC_INLINE void FL_COMP_ClearFlag_OutOfWindow(COMP_COMMON_Type *COMPx) +{ + WRITE_REG(COMPx->ISR, COMP_ISR_OOW_IF_Msk); +} + +/** + * @brief Get across window interrupt flag + * @rmtoll ISR WIN_IF FL_COMP_IsActiveFlag_AcrossWindowThreshold + * @param COMPx COMP instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_COMP_IsActiveFlag_AcrossWindowThreshold(COMP_COMMON_Type *COMPx) +{ + return (uint32_t)(READ_BIT(COMPx->ISR, COMP_ISR_WIN_IF_Msk) == (COMP_ISR_WIN_IF_Msk)); +} + +/** + * @brief Clear across window interrupt flag + * @rmtoll ISR WIN_IF FL_COMP_ClearFlag_AcrossWindowThreshold + * @param COMPx COMP instance + * @retval None + */ +__STATIC_INLINE void FL_COMP_ClearFlag_AcrossWindowThreshold(COMP_COMMON_Type *COMPx) +{ + WRITE_REG(COMPx->ISR, COMP_ISR_WIN_IF_Msk); +} + +/** + * @brief Get comparator3 interrupt flag + * @rmtoll ISR CMP3IF FL_COMP_IsActiveFlag_Comparator3 + * @param COMPx COMP instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_COMP_IsActiveFlag_Comparator3(COMP_COMMON_Type *COMPx) +{ + return (uint32_t)(READ_BIT(COMPx->ISR, COMP_ISR_CMP3IF_Msk) == (COMP_ISR_CMP3IF_Msk)); +} + +/** + * @brief Clear comparator3 interrupt flag + * @rmtoll ISR CMP3IF FL_COMP_ClearFlag_Comparator3 + * @param COMPx COMP instance + * @retval None + */ +__STATIC_INLINE void FL_COMP_ClearFlag_Comparator3(COMP_COMMON_Type *COMPx) +{ + WRITE_REG(COMPx->ISR, COMP_ISR_CMP3IF_Msk); +} + +/** + * @brief Get comparator2 interrupt flag + * @rmtoll ISR CMP2IF FL_COMP_IsActiveFlag_Comparator2 + * @param COMPx COMP instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_COMP_IsActiveFlag_Comparator2(COMP_COMMON_Type *COMPx) +{ + return (uint32_t)(READ_BIT(COMPx->ISR, COMP_ISR_CMP2IF_Msk) == (COMP_ISR_CMP2IF_Msk)); +} + +/** + * @brief Clear comparator2 interrupt flag + * @rmtoll ISR CMP2IF FL_COMP_ClearFlag_Comparator2 + * @param COMPx COMP instance + * @retval None + */ +__STATIC_INLINE void FL_COMP_ClearFlag_Comparator2(COMP_COMMON_Type *COMPx) +{ + WRITE_REG(COMPx->ISR, COMP_ISR_CMP2IF_Msk); +} + +/** + * @brief Get comparator1 interrupt flag + * @rmtoll ISR CMP1IF FL_COMP_IsActiveFlag_Comparator1 + * @param COMPx COMP instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_COMP_IsActiveFlag_Comparator1(COMP_COMMON_Type *COMPx) +{ + return (uint32_t)(READ_BIT(COMPx->ISR, COMP_ISR_CMP1IF_Msk) == (COMP_ISR_CMP1IF_Msk)); +} + +/** + * @brief Clear comparator1 interrupt flag + * @rmtoll ISR CMP1IF FL_COMP_ClearFlag_Comparator1 + * @param COMPx COMP instance + * @retval None + */ +__STATIC_INLINE void FL_COMP_ClearFlag_Comparator1(COMP_COMMON_Type *COMPx) +{ + WRITE_REG(COMPx->ISR, COMP_ISR_CMP1IF_Msk); +} + +/** + * @brief COMPx bypass buffer enable + * @rmtoll BUFCR BUFBYP FL_COMP_EnableBufferBypass + * @param COMPx COMP instance + * @retval None + */ +__STATIC_INLINE void FL_COMP_EnableBufferBypass(COMP_COMMON_Type *COMPx) +{ + SET_BIT(COMPx->BUFCR, COMP_BUFCR_BUFBYP_Msk); +} + +/** + * @brief Get COMPx bypass buffer enable status + * @rmtoll BUFCR BUFBYP FL_COMP_IsEnabledBufferBypass + * @param COMPx COMP instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_COMP_IsEnabledBufferBypass(COMP_COMMON_Type *COMPx) +{ + return (uint32_t)(READ_BIT(COMPx->BUFCR, COMP_BUFCR_BUFBYP_Msk) == COMP_BUFCR_BUFBYP_Msk); +} + +/** + * @brief COMPx bypass buffer disable + * @rmtoll BUFCR BUFBYP FL_COMP_DisableBufferBypass + * @param COMPx COMP instance + * @retval None + */ +__STATIC_INLINE void FL_COMP_DisableBufferBypass(COMP_COMMON_Type *COMPx) +{ + CLEAR_BIT(COMPx->BUFCR, COMP_BUFCR_BUFBYP_Msk); +} + +/** + * @brief Set COMPx buffer select + * @rmtoll BUFCR BUFSEL FL_COMP_SetBufferReference + * @param COMPx COMP instance + * @param select This parameter can be one of the following values: + * @arg @ref FL_COMP_BUFF_REFERENCE_VREF1P2 + * @arg @ref FL_COMP_BUFF_REFERENCE_AVREF + * @retval None + */ +__STATIC_INLINE void FL_COMP_SetBufferReference(COMP_COMMON_Type *COMPx, uint32_t select) +{ + MODIFY_REG(COMPx->BUFCR, COMP_BUFCR_BUFSEL_Msk, select); +} + +/** + * @brief Get COMPx buffer select + * @rmtoll BUFCR BUFSEL FL_COMP_GetBufferReference + * @param COMPx COMP instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_COMP_BUFF_REFERENCE_VREF1P2 + * @arg @ref FL_COMP_BUFF_REFERENCE_AVREF + */ +__STATIC_INLINE uint32_t FL_COMP_GetBufferReference(COMP_COMMON_Type *COMPx) +{ + return (uint32_t)(READ_BIT(COMPx->BUFCR, COMP_BUFCR_BUFSEL_Msk)); +} + +/** + * @brief COMPx close buffer enable + * @rmtoll BUFCR BUFENB FL_COMP_EnableBuffer + * @param COMPx COMP instance + * @retval None + */ +__STATIC_INLINE void FL_COMP_EnableBuffer(COMP_COMMON_Type *COMPx) +{ + CLEAR_BIT(COMPx->BUFCR, COMP_BUFCR_BUFENB_Msk); +} + +/** + * @brief Get COMPx close buffer enable status + * @rmtoll BUFCR BUFENB FL_COMP_IsEnabledBuffer + * @param COMPx COMP instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_COMP_IsEnabledBuffer(COMP_COMMON_Type *COMPx) +{ + return (uint32_t)(READ_BIT(COMPx->BUFCR, COMP_BUFCR_BUFENB_Msk) == COMP_BUFCR_BUFENB_Msk); +} + +/** + * @brief COMPx close buffer disable + * @rmtoll BUFCR BUFENB FL_COMP_DisableBuffer + * @param COMPx COMP instance + * @retval None + */ +__STATIC_INLINE void FL_COMP_DisableBuffer(COMP_COMMON_Type *COMPx) +{ + SET_BIT(COMPx->BUFCR, COMP_BUFCR_BUFENB_Msk); +} + +/** + * @} + */ + +/** @defgroup COMP_FL_EF_Init Initialization and de-initialization functions + * @{ + */ +FL_ErrorStatus FL_COMP_DeInit(COMP_Type *COMPx); +void FL_COMP_StructInit(FL_COMP_InitTypeDef *initStruct); +FL_ErrorStatus FL_COMP_Init(COMP_Type *COMPx, FL_COMP_InitTypeDef *initStruct); + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif /* __FM33LG0XX_FL_COMP_H*/ + +/*************************Py_Code_Generator Version: 0.1-0.11-0.1 @ 2020-09-14*************************/ +/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/ diff --git a/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_conf.h b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_conf.h new file mode 100644 index 0000000..5240497 --- /dev/null +++ b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_conf.h @@ -0,0 +1,245 @@ + /** + ******************************************************************************************************* + * @file fm33lg0xx_fl_conf.h + * @author FMSH Application Team + * @brief Header file of FL Driver Library Configurations + ******************************************************************************************************* + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + + +/* Define to prevent recursive inclusion --------------------------------------------------------------*/ +#ifndef __FM33LG0XX_FL_CONF_H +#define __FM33LG0XX_FL_CONF_H + +#ifdef __cplusplus +extern "C" { +#endif + +/* Defines -------------------------------------------------------------------------------------------*/ + +/** + * @brief List of drivers to be used. + * + * @note Uncomment following lines to disable specified driver. + */ +#define FL_ADC_DRIVER_ENABLED +#define FL_AES_DRIVER_ENABLED +#define FL_ATIM_DRIVER_ENABLED +#define FL_BSTIM16_DRIVER_ENABLED +#define FL_BSTIM32_DRIVER_ENABLED +#define FL_CAN_DRIVER_ENABLED +#define FL_CDIF_DRIVER_ENABLED +#define FL_CMU_DRIVER_ENABLED +#define FL_COMP_DRIVER_ENABLED +#define FL_CRC_DRIVER_ENABLED +#define FL_DAC_DRIVER_ENABLED +#define FL_DIVAS_DRIVER_ENABLED +#define FL_DMA_DRIVER_ENABLED +#define FL_EXTI_DRIVER_ENABLED +#define FL_FLASH_DRIVER_ENABLED +#define FL_GPIO_DRIVER_ENABLED +#define FL_GPTIM_DRIVER_ENABLED +#define FL_I2C_DRIVER_ENABLED +#define FL_IWDT_DRIVER_ENABLED +#define FL_LCD_DRIVER_ENABLED +#define FL_LPTIM16_DRIVER_ENABLED +#define FL_LPTIM32_DRIVER_ENABLED +#define FL_LPUART_DRIVER_ENABLED +#define FL_PMU_DRIVER_ENABLED +#define FL_RMU_DRIVER_ENABLED +#define FL_RNG_DRIVER_ENABLED +#define FL_RTCA_DRIVER_ENABLED +#define FL_SPI_DRIVER_ENABLED +#define FL_SVD_DRIVER_ENABLED +#define FL_UART_DRIVER_ENABLED +#define FL_VAO_DRIVER_ENABLED +#define FL_VREF_DRIVER_ENABLED +#define FL_VREFP_DRIVER_ENABLED +#define FL_WWDT_DRIVER_ENABLED + +/* Device Includes ------------------------------------------------------------------------------------*/ +/** + * @brief Include peripheral's header file + */ + +#if defined(FL_ADC_DRIVER_ENABLED) +#include "fm33lg0xx_fl_adc.h" +#endif /* FL_ADC_DRIVER_ENABLED */ + +#if defined(FL_AES_DRIVER_ENABLED) +#include "fm33lg0xx_fl_aes.h" +#endif /* FL_AES_DRIVER_ENABLED */ + +#if defined(FL_ATIM_DRIVER_ENABLED) +#include "fm33lg0xx_fl_atim.h" +#endif /* FL_ATIM_DRIVER_ENABLED */ + +#if defined(FL_BSTIM16_DRIVER_ENABLED) +#include "fm33lg0xx_fl_bstim16.h" +#endif /* FL_BSTIM16_DRIVER_ENABLED */ + +#if defined(FL_BSTIM32_DRIVER_ENABLED) +#include "fm33lg0xx_fl_bstim32.h" +#endif /* FL_BSTIM32_DRIVER_ENABLED */ + +#if defined(FL_CAN_DRIVER_ENABLED) +#include "fm33lg0xx_fl_can.h" +#endif /* FL_CAN_DRIVER_ENABLED */ + +#if defined(FL_CDIF_DRIVER_ENABLED) +#include "fm33lg0xx_fl_cdif.h" +#endif /* FL_CDIF_DRIVER_ENABLED */ + +#if defined(FL_CMU_DRIVER_ENABLED) +#include "fm33lg0xx_fl_cmu.h" +#endif /* FL_CMU_DRIVER_ENABLED */ + +#if defined(FL_COMP_DRIVER_ENABLED) +#include "fm33lg0xx_fl_comp.h" +#endif /* FL_COMP_DRIVER_ENABLED */ + +#if defined(FL_CRC_DRIVER_ENABLED) +#include "fm33lg0xx_fl_crc.h" +#endif /* FL_CRC_DRIVER_ENABLED */ + +#if defined(FL_DAC_DRIVER_ENABLED) +#include "fm33lg0xx_fl_dac.h" +#endif /* FL_DAC_DRIVER_ENABLED */ + +#if defined(FL_DIVAS_DRIVER_ENABLED) +#include "fm33lg0xx_fl_divas.h" +#endif /* FL_DIVAS_DRIVER_ENABLED */ + +#if defined(FL_DMA_DRIVER_ENABLED) +#include "fm33lg0xx_fl_dma.h" +#endif /* FL_DMA_DRIVER_ENABLED */ + +#if defined(FL_EXTI_DRIVER_ENABLED) +#include "fm33lg0xx_fl_exti.h" +#endif /* FL_EXTI_DRIVER_ENABLED */ + +#if defined(FL_FLASH_DRIVER_ENABLED) +#include "fm33lg0xx_fl_flash.h" +#endif /* FL_FLASH_DRIVER_ENABLED */ + +#if defined(FL_GPIO_DRIVER_ENABLED) +#include "fm33lg0xx_fl_gpio.h" +#endif /* FL_GPIO_DRIVER_ENABLED */ + +#if defined(FL_GPTIM_DRIVER_ENABLED) +#include "fm33lg0xx_fl_gptim.h" +#endif /* FL_GPTIM_DRIVER_ENABLED */ + +#if defined(FL_I2C_DRIVER_ENABLED) +#include "fm33lg0xx_fl_i2c.h" +#endif /* FL_I2C_DRIVER_ENABLED */ + +#if defined(FL_IWDT_DRIVER_ENABLED) +#include "fm33lg0xx_fl_iwdt.h" +#endif /* FL_IWDT_DRIVER_ENABLED */ + +#if defined(FL_LCD_DRIVER_ENABLED) +#include "fm33lg0xx_fl_lcd.h" +#endif /* FL_LCD_DRIVER_ENABLED */ + +#if defined(FL_LPTIM16_DRIVER_ENABLED) +#include "fm33lg0xx_fl_lptim16.h" +#endif /* FL_LPTIM16_DRIVER_ENABLED */ + +#if defined(FL_LPTIM32_DRIVER_ENABLED) +#include "fm33lg0xx_fl_lptim32.h" +#endif /* FL_LPTIM32_DRIVER_ENABLED */ + +#if defined(FL_LPUART_DRIVER_ENABLED) +#include "fm33lg0xx_fl_lpuart.h" +#endif /* FL_LPUART_DRIVER_ENABLED */ + + +#if defined(FL_PMU_DRIVER_ENABLED) +#include "fm33lg0xx_fl_pmu.h" +#endif /* FL_PMU_DRIVER_ENABLED */ + +#if defined(FL_RMU_DRIVER_ENABLED) +#include "fm33lg0xx_fl_rmu.h" +#endif /* FL_RMU_DRIVER_ENABLED */ + +#if defined(FL_RNG_DRIVER_ENABLED) +#include "fm33lg0xx_fl_rng.h" +#endif /* FL_RNG_DRIVER_ENABLED */ + +#if defined(FL_RTCA_DRIVER_ENABLED) +#include "fm33lg0xx_fl_rtca.h" +#endif /* FL_RTCA_DRIVER_ENABLED */ + +#if defined(FL_SPI_DRIVER_ENABLED) +#include "fm33lg0xx_fl_spi.h" +#endif /* FL_SPI_DRIVER_ENABLED */ + +#if defined(FL_SVD_DRIVER_ENABLED) +#include "fm33lg0xx_fl_svd.h" +#endif /* FL_SVD_DRIVER_ENABLED */ + +#if defined(FL_UART_DRIVER_ENABLED) +#include "fm33lg0xx_fl_uart.h" +#endif /* FL_UART_DRIVER_ENABLED */ + +#if defined(FL_VAO_DRIVER_ENABLED) +#include "fm33lg0xx_fl_vao.h" +#endif /* FL_VAO_DRIVER_ENABLED */ + +#if defined(FL_VREF_DRIVER_ENABLED) +#include "fm33lg0xx_fl_vref.h" +#endif /* FL_VREF_DRIVER_ENABLED */ + +#if defined(FL_VREFP_DRIVER_ENABLED) +#include "fm33lg0xx_fl_vrefp.h" +#endif /* FL_VREFP_DRIVER_ENABLED */ + +#if defined(FL_WWDT_DRIVER_ENABLED) +#include "fm33lg0xx_fl_wwdt.h" +#endif /* FL_WWDT_DRIVER_ENABLED */ + +#ifdef __cplusplus +} +#endif + +#endif /* __FM33LG0XX_FL_CONF_H */ + +/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/ diff --git a/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_crc.h b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_crc.h new file mode 100644 index 0000000..3743afc --- /dev/null +++ b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_crc.h @@ -0,0 +1,494 @@ + /** + ******************************************************************************************************* + * @file fm33lg0xx_fl_crc.h + * @author FMSH Application Team + * @brief Head file of CRC FL Module + ******************************************************************************************************* + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + + + +/* Define to prevent recursive inclusion---------------------------------------------------------------*/ +#ifndef __FM33LG0XX_FL_CRC_H +#define __FM33LG0XX_FL_CRC_H + +#ifdef __cplusplus +extern "C" { +#endif +/* Includes -------------------------------------------------------------------------------------------*/ +#include "fm33lg0xx_fl_def.h" +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @defgroup CRC CRC + * @brief CRC FL driver + * @{ + */ + +/* Exported types -------------------------------------------------------------------------------------*/ +/** @defgroup CRC_FL_ES_INIT CRC Exported Init structures + * @{ + */ + +/** + * @brief FL CRC Init Sturcture definition + */ +typedef struct +{ + /*! CRC初值 */ + uint32_t initVal; + /*! 计算数据宽度 */ + uint32_t dataWidth; + /*! 输入数据翻转 */ + uint32_t reflectIn; + /*! 输出数据翻转 */ + uint32_t reflectOut; + /*! 输出结果异或寄存器 */ + uint32_t xorReg; + /*! 输出结果异或使能 */ + uint32_t xorRegState; + /*! CRC多项式宽 */ + uint32_t polynomialWidth; + /*! CRC多项式 */ + uint32_t polynomial; + /*! 计算模式 串行或并行 */ + uint32_t calculatMode; + +} FL_CRC_InitTypeDef; + +/** + * @} + */ +/* Exported constants ---------------------------------------------------------------------------------*/ +/** @defgroup CRC_FL_Exported_Constants CRC Exported Constants + * @{ + */ + +#define CRC_CR_OPWD_Pos (9U) +#define CRC_CR_OPWD_Msk (0x1U << CRC_CR_OPWD_Pos) +#define CRC_CR_OPWD CRC_CR_OPWD_Msk + +#define CRC_CR_PARA_Pos (8U) +#define CRC_CR_PARA_Msk (0x1U << CRC_CR_PARA_Pos) +#define CRC_CR_PARA CRC_CR_PARA_Msk + +#define CRC_CR_RFLTIN_Pos (6U) +#define CRC_CR_RFLTIN_Msk (0x3U << CRC_CR_RFLTIN_Pos) +#define CRC_CR_RFLTIN CRC_CR_RFLTIN_Msk + +#define CRC_CR_RFLTO_Pos (5U) +#define CRC_CR_RFLTO_Msk (0x1U << CRC_CR_RFLTO_Pos) +#define CRC_CR_RFLTO CRC_CR_RFLTO_Msk + +#define CRC_CR_RES_Pos (4U) +#define CRC_CR_RES_Msk (0x1U << CRC_CR_RES_Pos) +#define CRC_CR_RES CRC_CR_RES_Msk + +#define CRC_CR_BUSY_Pos (3U) +#define CRC_CR_BUSY_Msk (0x1U << CRC_CR_BUSY_Pos) +#define CRC_CR_BUSY CRC_CR_BUSY_Msk + +#define CRC_CR_XOR_Pos (2U) +#define CRC_CR_XOR_Msk (0x1U << CRC_CR_XOR_Pos) +#define CRC_CR_XOR CRC_CR_XOR_Msk + +#define CRC_CR_SEL_Pos (0U) +#define CRC_CR_SEL_Msk (0x3U << CRC_CR_SEL_Pos) +#define CRC_CR_SEL CRC_CR_SEL_Msk + + + + + + +#define FL_CRC_DATA_WIDTH_8B (0x0U << CRC_CR_OPWD_Pos) +#define FL_CRC_DATA_WIDTH_32B (0x1U << CRC_CR_OPWD_Pos) + + +#define FL_CRC_CALCULATE_SERIAL (0x0U << CRC_CR_PARA_Pos) +#define FL_CRC_CALCULATE_PARALLEL (0x1U << CRC_CR_PARA_Pos) + + +#define FL_CRC_INPUT_INVERT_NONE (0x0U << CRC_CR_RFLTIN_Pos) +#define FL_CRC_INPUT_INVERT_BYTE (0x1U << CRC_CR_RFLTIN_Pos) +#define FL_CRC_INPUT_INVERT_HALF_WORD (0x2U << CRC_CR_RFLTIN_Pos) +#define FL_CRC_INPUT_INVERT_WORD (0x3U << CRC_CR_RFLTIN_Pos) + + +#define FL_CRC_OUPUT_INVERT_NONE (0x0U << CRC_CR_RFLTO_Pos) +#define FL_CRC_OUPUT_INVERT_BYTE (0x1U << CRC_CR_RFLTO_Pos) + + +#define FL_CRC_POLYNOMIAL_32B (0x0U << CRC_CR_SEL_Pos) +#define FL_CRC_POLYNOMIAL_16B (0x1U << CRC_CR_SEL_Pos) +#define FL_CRC_POLYNOMIAL_8B (0x2U << CRC_CR_SEL_Pos) +#define FL_CRC_POLYNOMIAL_7B (0x3U << CRC_CR_SEL_Pos) + + +/** + * @} + */ +/* Exported functions ---------------------------------------------------------------------------------*/ +/** @defgroup CRC_FL_Exported_Functions CRC Exported Functions + * @{ + */ + +/** + * @brief Set CRC data register + * @rmtoll DR FL_CRC_WriteData + * @param CRCx CRC instance + * @param data + * @retval None + */ +__STATIC_INLINE void FL_CRC_WriteData(CRC_Type *CRCx, uint32_t data) +{ + MODIFY_REG(CRCx->DR, (0xffffffffU << 0U), (data << 0U)); +} + +/** + * @brief Get CRC data register value + * @rmtoll DR FL_CRC_ReadData + * @param CRCx CRC instance + * @retval + */ +__STATIC_INLINE uint32_t FL_CRC_ReadData(CRC_Type *CRCx) +{ + return (uint32_t)(READ_BIT(CRCx->DR, (0xffffffffU << 0U)) >> 0U); +} + +/** + * @brief Set CRC calculate operation width + * @rmtoll CR OPWD FL_CRC_SetDataWidth + * @param CRCx CRC instance + * @param dataWidth This parameter can be one of the following values: + * @arg @ref FL_CRC_DATA_WIDTH_8B + * @arg @ref FL_CRC_DATA_WIDTH_32B + * @retval None + */ +__STATIC_INLINE void FL_CRC_SetDataWidth(CRC_Type *CRCx, uint32_t dataWidth) +{ + MODIFY_REG(CRCx->CR, CRC_CR_OPWD_Msk, dataWidth); +} + +/** + * @brief Get CRC calculate operation width + * @rmtoll CR OPWD FL_CRC_GetDataWidth + * @param CRCx CRC instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_CRC_DATA_WIDTH_8B + * @arg @ref FL_CRC_DATA_WIDTH_32B + */ +__STATIC_INLINE uint32_t FL_CRC_GetDataWidth(CRC_Type *CRCx) +{ + return (uint32_t)(READ_BIT(CRCx->CR, CRC_CR_OPWD_Msk)); +} + +/** + * @brief Set CRC parallel calculation mode + * @rmtoll CR PARA FL_CRC_SetCalculateMode + * @param CRCx CRC instance + * @param mode This parameter can be one of the following values: + * @arg @ref FL_CRC_CALCULATE_SERIAL + * @arg @ref FL_CRC_CALCULATE_PARALLEL + * @retval None + */ +__STATIC_INLINE void FL_CRC_SetCalculateMode(CRC_Type *CRCx, uint32_t mode) +{ + MODIFY_REG(CRCx->CR, CRC_CR_PARA_Msk, mode); +} + +/** + * @brief Get CRC parallel calculation mode + * @rmtoll CR PARA FL_CRC_GetCalculateMode + * @param CRCx CRC instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_CRC_CALCULATE_SERIAL + * @arg @ref FL_CRC_CALCULATE_PARALLEL + */ +__STATIC_INLINE uint32_t FL_CRC_GetCalculateMode(CRC_Type *CRCx) +{ + return (uint32_t)(READ_BIT(CRCx->CR, CRC_CR_PARA_Msk)); +} + +/** + * @brief Set CRC reflected input + * @rmtoll CR RFLTIN FL_CRC_SetInputInvertMode + * @param CRCx CRC instance + * @param mode This parameter can be one of the following values: + * @arg @ref FL_CRC_INPUT_INVERT_NONE + * @arg @ref FL_CRC_INPUT_INVERT_BYTE + * @arg @ref FL_CRC_INPUT_INVERT_HALF_WORD + * @arg @ref FL_CRC_INPUT_INVERT_WORD + * @retval None + */ +__STATIC_INLINE void FL_CRC_SetInputInvertMode(CRC_Type *CRCx, uint32_t mode) +{ + MODIFY_REG(CRCx->CR, CRC_CR_RFLTIN_Msk, mode); +} + +/** + * @brief Get CRC reflected input status + * @rmtoll CR RFLTIN FL_CRC_GetInputInvertMode + * @param CRCx CRC instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_CRC_INPUT_INVERT_NONE + * @arg @ref FL_CRC_INPUT_INVERT_BYTE + * @arg @ref FL_CRC_INPUT_INVERT_HALF_WORD + * @arg @ref FL_CRC_INPUT_INVERT_WORD + */ +__STATIC_INLINE uint32_t FL_CRC_GetInputInvertMode(CRC_Type *CRCx) +{ + return (uint32_t)(READ_BIT(CRCx->CR, CRC_CR_RFLTIN_Msk)); +} + +/** + * @brief Set CRC reflected output + * @rmtoll CR RFLTO FL_CRC_SetOutputInvertMode + * @param CRCx CRC instance + * @param mode This parameter can be one of the following values: + * @arg @ref FL_CRC_OUPUT_INVERT_NONE + * @arg @ref FL_CRC_OUPUT_INVERT_BYTE + * @retval None + */ +__STATIC_INLINE void FL_CRC_SetOutputInvertMode(CRC_Type *CRCx, uint32_t mode) +{ + MODIFY_REG(CRCx->CR, CRC_CR_RFLTO_Msk, mode); +} + +/** + * @brief Get CRC feflected output status + * @rmtoll CR RFLTO FL_CRC_GetOutputInvertMode + * @param CRCx CRC instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_CRC_OUPUT_INVERT_NONE + * @arg @ref FL_CRC_OUPUT_INVERT_BYTE + */ +__STATIC_INLINE uint32_t FL_CRC_GetOutputInvertMode(CRC_Type *CRCx) +{ + return (uint32_t)(READ_BIT(CRCx->CR, CRC_CR_RFLTO_Msk)); +} + +/** + * @brief Get CRC result flag + * @rmtoll CR RES FL_CRC_IsActiveFlag_Zero + * @param CRCx CRC instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CRC_IsActiveFlag_Zero(CRC_Type *CRCx) +{ + return (uint32_t)(READ_BIT(CRCx->CR, CRC_CR_RES_Msk) == (CRC_CR_RES_Msk)); +} + +/** + * @brief Get CRC operational flag + * @rmtoll CR BUSY FL_CRC_IsActiveFlag_Busy + * @param CRCx CRC instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CRC_IsActiveFlag_Busy(CRC_Type *CRCx) +{ + return (uint32_t)(READ_BIT(CRCx->CR, CRC_CR_BUSY_Msk) == (CRC_CR_BUSY_Msk)); +} + +/** + * @brief Output XORed with CRC_XOR register enable + * @rmtoll CR XOR FL_CRC_EnableOutputXOR + * @param CRCx CRC instance + * @retval None + */ +__STATIC_INLINE void FL_CRC_EnableOutputXOR(CRC_Type *CRCx) +{ + SET_BIT(CRCx->CR, CRC_CR_XOR_Msk); +} + +/** + * @brief Get output XORed with CRC_XOR register enable status + * @rmtoll CR XOR FL_CRC_IsEnabledOutputXOR + * @param CRCx CRC instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CRC_IsEnabledOutputXOR(CRC_Type *CRCx) +{ + return (uint32_t)(READ_BIT(CRCx->CR, CRC_CR_XOR_Msk) == CRC_CR_XOR_Msk); +} + +/** + * @brief Output XORed with CRC_XOR register disable + * @rmtoll CR XOR FL_CRC_DisableOutputXOR + * @param CRCx CRC instance + * @retval None + */ +__STATIC_INLINE void FL_CRC_DisableOutputXOR(CRC_Type *CRCx) +{ + CLEAR_BIT(CRCx->CR, CRC_CR_XOR_Msk); +} + +/** + * @brief Polynomial width selection + * @rmtoll CR SEL FL_CRC_SetPolynomialWidth + * @param CRCx CRC instance + * @param width This parameter can be one of the following values: + * @arg @ref FL_CRC_POLYNOMIAL_32B + * @arg @ref FL_CRC_POLYNOMIAL_16B + * @arg @ref FL_CRC_POLYNOMIAL_8B + * @arg @ref FL_CRC_POLYNOMIAL_7B + * @retval None + */ +__STATIC_INLINE void FL_CRC_SetPolynomialWidth(CRC_Type *CRCx, uint32_t width) +{ + MODIFY_REG(CRCx->CR, CRC_CR_SEL_Msk, width); +} + +/** + * @brief Get Polynomial width Selection status + * @rmtoll CR SEL FL_CRC_GetPolynomialWidth + * @param CRCx CRC instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_CRC_POLYNOMIAL_32B + * @arg @ref FL_CRC_POLYNOMIAL_16B + * @arg @ref FL_CRC_POLYNOMIAL_8B + * @arg @ref FL_CRC_POLYNOMIAL_7B + */ +__STATIC_INLINE uint32_t FL_CRC_GetPolynomialWidth(CRC_Type *CRCx) +{ + return (uint32_t)(READ_BIT(CRCx->CR, CRC_CR_SEL_Msk)); +} + +/** + * @brief Set linear feedback shift register + * @rmtoll LFSR FL_CRC_WriteInitialValue + * @param CRCx CRC instance + * @param data + * @retval None + */ +__STATIC_INLINE void FL_CRC_WriteInitialValue(CRC_Type *CRCx, uint32_t data) +{ + MODIFY_REG(CRCx->LFSR, (0xffffffffU << 0U), (data << 0U)); +} + +/** + * @brief Get linear feedback shift register value + * @rmtoll LFSR FL_CRC_ReadInitialValue + * @param CRCx CRC instance + * @retval + */ +__STATIC_INLINE uint32_t FL_CRC_ReadInitialValue(CRC_Type *CRCx) +{ + return (uint32_t)(READ_BIT(CRCx->LFSR, (0xffffffffU << 0U)) >> 0U); +} + +/** + * @brief Set eXclusive XOR register + * @rmtoll XOR FL_CRC_WriteXORValue + * @param CRCx CRC instance + * @param data + * @retval None + */ +__STATIC_INLINE void FL_CRC_WriteXORValue(CRC_Type *CRCx, uint32_t data) +{ + MODIFY_REG(CRCx->XOR, (0xffffffffU << 0U), (data << 0U)); +} + +/** + * @brief Get eXclusive XOR register value + * @rmtoll XOR FL_CRC_ReadXORValue + * @param CRCx CRC instance + * @retval + */ +__STATIC_INLINE uint32_t FL_CRC_ReadXORValue(CRC_Type *CRCx) +{ + return (uint32_t)(READ_BIT(CRCx->XOR, (0xffffffffU << 0U)) >> 0U); +} + +/** + * @brief Set CRC Polynominals + * @rmtoll POLY FL_CRC_WritePolynominalParam + * @param CRCx CRC instance + * @param data + * @retval None + */ +__STATIC_INLINE void FL_CRC_WritePolynominalParam(CRC_Type *CRCx, uint32_t data) +{ + MODIFY_REG(CRCx->POLY, (0xffffffffU << 0U), (data << 0U)); +} + +/** + * @brief Get CRC Polynominals + * @rmtoll POLY FL_CRC_ReadPolynominalParam + * @param CRCx CRC instance + * @retval + */ +__STATIC_INLINE uint32_t FL_CRC_ReadPolynominalParam(CRC_Type *CRCx) +{ + return (uint32_t)(READ_BIT(CRCx->POLY, (0xffffffffU << 0U)) >> 0U); +} + +/** + * @} + */ + +/** @defgroup CRC_FL_EF_Init Initialization and de-initialization functions + * @{ + */ +FL_ErrorStatus FL_CRC_DeInit(CRC_Type *CRCx); +void FL_CRC_StructInit(FL_CRC_InitTypeDef *CRC_InitStruct); +FL_ErrorStatus FL_CRC_Init(CRC_Type *CRCx, FL_CRC_InitTypeDef *CRC_InitStruct); + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif /* __FM33LG0XX_FL_CRC_H*/ + +/*************************Py_Code_Generator Version: 0.1-0.11-0.1 @ 2020-09-14*************************/ +/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/ diff --git a/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_dac.h b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_dac.h new file mode 100644 index 0000000..746ee10 --- /dev/null +++ b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_dac.h @@ -0,0 +1,777 @@ + /** + ******************************************************************************************************* + * @file fm33lg0xx_fl_dac.h + * @author FMSH Application Team + * @brief Head file of DAC FL Module + ******************************************************************************************************* + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + + + +/* Define to prevent recursive inclusion---------------------------------------------------------------*/ +#ifndef __FM33LG0XX_FL_DAC_H +#define __FM33LG0XX_FL_DAC_H + +#ifdef __cplusplus +extern "C" { +#endif +/* Includes -------------------------------------------------------------------------------------------*/ +#include "fm33lg0xx_fl_def.h" +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @defgroup DAC DAC + * @brief DAC FL driver + * @{ + */ + +/* Exported types -------------------------------------------------------------------------------------*/ +/** @defgroup DAC_FL_ES_INIT DAC Exported Init structures + * @{ + */ + +/** + * @brief FL DAC Init Sturcture definition + */ +typedef struct +{ + /*DAC触发模式使能配置*/ + uint32_t triggerMode; + /*DAC触发源配置*/ + uint32_t triggerSource; + /*DAC采样保持模式配置*/ + uint32_t sampleHoldMode; + /*DAC保持时间配置*/ + uint32_t holdTime; + /*DAC采样时间配置*/ + uint32_t sampleTime; + /*DAC_Buffer模式配置*/ + uint32_t bufferMode; + /*DAC反馈开关配置*/ + uint32_t switchMode; + + +} FL_DAC_InitTypeDef; +/** + * @} + */ +/* Exported constants ---------------------------------------------------------------------------------*/ +/** @defgroup DAC_FL_Exported_Constants DAC Exported Constants + * @{ + */ + +#define DAC_CR1_EN_Pos (0U) +#define DAC_CR1_EN_Msk (0x1U << DAC_CR1_EN_Pos) +#define DAC_CR1_EN DAC_CR1_EN_Msk + +#define DAC_CR2_DMAEN_Pos (1U) +#define DAC_CR2_DMAEN_Msk (0x1U << DAC_CR2_DMAEN_Pos) +#define DAC_CR2_DMAEN DAC_CR2_DMAEN_Msk + +#define DAC_CR2_TRGEN_Pos (0U) +#define DAC_CR2_TRGEN_Msk (0x1U << DAC_CR2_TRGEN_Pos) +#define DAC_CR2_TRGEN DAC_CR2_TRGEN_Msk + +#define DAC_CFGR_SHEN_Pos (8U) +#define DAC_CFGR_SHEN_Msk (0x1U << DAC_CFGR_SHEN_Pos) +#define DAC_CFGR_SHEN DAC_CFGR_SHEN_Msk + +#define DAC_CFGR_BUFEN_Pos (7U) +#define DAC_CFGR_BUFEN_Msk (0x1U << DAC_CFGR_BUFEN_Pos) +#define DAC_CFGR_BUFEN DAC_CFGR_BUFEN_Msk + +#define DAC_CFGR_TRGSEL_Pos (2U) +#define DAC_CFGR_TRGSEL_Msk (0xfU << DAC_CFGR_TRGSEL_Pos) +#define DAC_CFGR_TRGSEL DAC_CFGR_TRGSEL_Msk + +#define DAC_CFGR_SWIEN_Pos (0U) +#define DAC_CFGR_SWIEN_Msk (0x1U << DAC_CFGR_SWIEN_Pos) +#define DAC_CFGR_SWIEN DAC_CFGR_SWIEN_Msk + +#define DAC_SWTRGR_SWTRIG_Pos (0U) +#define DAC_SWTRGR_SWTRIG_Msk (0x1U << DAC_SWTRGR_SWTRIG_Pos) +#define DAC_SWTRGR_SWTRIG DAC_SWTRGR_SWTRIG_Msk + +#define DAC_DHR_DHR_Pos (0U) +#define DAC_DHR_DHR_Msk (0xfffU << DAC_DHR_DHR_Pos) +#define DAC_DHR_DHR DAC_DHR_DHR_Msk + +#define DAC_IER_DMAE_IE_Pos (3U) +#define DAC_IER_DMAE_IE_Msk (0x1U << DAC_IER_DMAE_IE_Pos) +#define DAC_IER_DMAE_IE DAC_IER_DMAE_IE_Msk + +#define DAC_IER_EOH_IE_Pos (2U) +#define DAC_IER_EOH_IE_Msk (0x1U << DAC_IER_EOH_IE_Pos) +#define DAC_IER_EOH_IE DAC_IER_EOH_IE_Msk + +#define DAC_IER_EOS_IE_Pos (1U) +#define DAC_IER_EOS_IE_Msk (0x1U << DAC_IER_EOS_IE_Pos) +#define DAC_IER_EOS_IE DAC_IER_EOS_IE_Msk + +#define DAC_IER_DOU_IE_Pos (0U) +#define DAC_IER_DOU_IE_Msk (0x1U << DAC_IER_DOU_IE_Pos) +#define DAC_IER_DOU_IE DAC_IER_DOU_IE_Msk + +#define DAC_ISR_DMAERR_Pos (3U) +#define DAC_ISR_DMAERR_Msk (0x1U << DAC_ISR_DMAERR_Pos) +#define DAC_ISR_DMAERR DAC_ISR_DMAERR_Msk + +#define DAC_ISR_EOH_Pos (2U) +#define DAC_ISR_EOH_Msk (0x1U << DAC_ISR_EOH_Pos) +#define DAC_ISR_EOH DAC_ISR_EOH_Msk + +#define DAC_ISR_EOS_Pos (1U) +#define DAC_ISR_EOS_Msk (0x1U << DAC_ISR_EOS_Pos) +#define DAC_ISR_EOS DAC_ISR_EOS_Msk + +#define DAC_ISR_DOU_Pos (0U) +#define DAC_ISR_DOU_Msk (0x1U << DAC_ISR_DOU_Pos) +#define DAC_ISR_DOU DAC_ISR_DOU_Msk + +#define DAC_SHTR_THLD_Pos (8U) +#define DAC_SHTR_THLD_Msk (0xffffU << DAC_SHTR_THLD_Pos) +#define DAC_SHTR_THLD DAC_SHTR_THLD_Msk + +#define DAC_SHTR_TSMPL_Pos (0U) +#define DAC_SHTR_TSMPL_Msk (0xffU << DAC_SHTR_TSMPL_Pos) +#define DAC_SHTR_TSMPL DAC_SHTR_TSMPL_Msk + + + + + + +#define FL_DAC_TRGI_SOFTWARE (0x0U << DAC_CFGR_TRGSEL_Pos) +#define FL_DAC_TRGI_ATIM (0x1U << DAC_CFGR_TRGSEL_Pos) +#define FL_DAC_TRGI_GPTIM1 (0x2U << DAC_CFGR_TRGSEL_Pos) +#define FL_DAC_TRGI_GPTIM2 (0x3U << DAC_CFGR_TRGSEL_Pos) +#define FL_DAC_TRGI_BSTIM16 (0x4U << DAC_CFGR_TRGSEL_Pos) +#define FL_DAC_TRGI_LPTIM16 (0x5U << DAC_CFGR_TRGSEL_Pos) +#define FL_DAC_TRGI_EXTI0 (0xcU << DAC_CFGR_TRGSEL_Pos) +#define FL_DAC_TRGI_EXTI4 (0xdU << DAC_CFGR_TRGSEL_Pos) +#define FL_DAC_TRGI_EXTI8 (0xeU << DAC_CFGR_TRGSEL_Pos) +#define FL_DAC_TRGI_EXTI12 (0xfU << DAC_CFGR_TRGSEL_Pos) + + +/** + * @} + */ +/* Exported functions ---------------------------------------------------------------------------------*/ +/** @defgroup DAC_FL_Exported_Functions DAC Exported Functions + * @{ + */ + +/** + * @brief Enable DAC + * @rmtoll CR1 EN FL_DAC_Enable + * @param DACx DAC instance + * @retval None + */ +__STATIC_INLINE void FL_DAC_Enable(DAC_Type *DACx) +{ + SET_BIT(DACx->CR1, DAC_CR1_EN_Msk); +} + +/** + * @brief Disable DAC + * @rmtoll CR1 EN FL_DAC_Disable + * @param DACx DAC instance + * @retval None + */ +__STATIC_INLINE void FL_DAC_Disable(DAC_Type *DACx) +{ + CLEAR_BIT(DACx->CR1, DAC_CR1_EN_Msk); +} + +/** + * @brief Get DAC Enable Status + * @rmtoll CR1 EN FL_DAC_IsEnabled + * @param DACx DAC instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_DAC_IsEnabled(DAC_Type *DACx) +{ + return (uint32_t)(READ_BIT(DACx->CR1, DAC_CR1_EN_Msk) == DAC_CR1_EN_Msk); +} + +/** + * @brief Enable DAC DMA + * @rmtoll CR2 DMAEN FL_DAC_EnableDMAReq + * @param DACx DAC instance + * @retval None + */ +__STATIC_INLINE void FL_DAC_EnableDMAReq(DAC_Type *DACx) +{ + SET_BIT(DACx->CR2, DAC_CR2_DMAEN_Msk); +} + +/** + * @brief Disable DAC DMA + * @rmtoll CR2 DMAEN FL_DAC_DisableDMAReq + * @param DACx DAC instance + * @retval None + */ +__STATIC_INLINE void FL_DAC_DisableDMAReq(DAC_Type *DACx) +{ + CLEAR_BIT(DACx->CR2, DAC_CR2_DMAEN_Msk); +} + +/** + * @brief Get DAC DMA Enable Status + * @rmtoll CR2 DMAEN FL_DAC_IsEnabledDMAReq + * @param DACx DAC instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_DAC_IsEnabledDMAReq(DAC_Type *DACx) +{ + return (uint32_t)(READ_BIT(DACx->CR2, DAC_CR2_DMAEN_Msk) == DAC_CR2_DMAEN_Msk); +} + +/** + * @brief Enable DAC Trigger + * @rmtoll CR2 TRGEN FL_DAC_EnableTriggerMode + * @param DACx DAC instance + * @retval None + */ +__STATIC_INLINE void FL_DAC_EnableTriggerMode(DAC_Type *DACx) +{ + SET_BIT(DACx->CR2, DAC_CR2_TRGEN_Msk); +} + +/** + * @brief Disable DAC Trigger + * @rmtoll CR2 TRGEN FL_DAC_DisableTriggerMode + * @param DACx DAC instance + * @retval None + */ +__STATIC_INLINE void FL_DAC_DisableTriggerMode(DAC_Type *DACx) +{ + CLEAR_BIT(DACx->CR2, DAC_CR2_TRGEN_Msk); +} + +/** + * @brief Get DAC Trigger Enable Status + * @rmtoll CR2 TRGEN FL_DAC_IsEnabledTriggerMode + * @param DACx DAC instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_DAC_IsEnabledTriggerMode(DAC_Type *DACx) +{ + return (uint32_t)(READ_BIT(DACx->CR2, DAC_CR2_TRGEN_Msk) == DAC_CR2_TRGEN_Msk); +} + +/** + * @brief Enable DAC Sample Hold + * @rmtoll CFGR SHEN FL_DAC_EnableSampleHoldMode + * @param DACx DAC instance + * @retval None + */ +__STATIC_INLINE void FL_DAC_EnableSampleHoldMode(DAC_Type *DACx) +{ + SET_BIT(DACx->CFGR, DAC_CFGR_SHEN_Msk); +} + +/** + * @brief Disable DAC Sample Hold + * @rmtoll CFGR SHEN FL_DAC_DisableSampleHoldMode + * @param DACx DAC instance + * @retval None + */ +__STATIC_INLINE void FL_DAC_DisableSampleHoldMode(DAC_Type *DACx) +{ + CLEAR_BIT(DACx->CFGR, DAC_CFGR_SHEN_Msk); +} + +/** + * @brief Get DAC Sample Hold Enable Status + * @rmtoll CFGR SHEN FL_DAC_IsEnabledSampleHoldMode + * @param DACx DAC instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_DAC_IsEnabledSampleHoldMode(DAC_Type *DACx) +{ + return (uint32_t)(READ_BIT(DACx->CFGR, DAC_CFGR_SHEN_Msk) == DAC_CFGR_SHEN_Msk); +} + +/** + * @brief Enable DAC Output Buffer + * @rmtoll CFGR BUFEN FL_DAC_EnableOutputBuffer + * @param DACx DAC instance + * @retval None + */ +__STATIC_INLINE void FL_DAC_EnableOutputBuffer(DAC_Type *DACx) +{ + SET_BIT(DACx->CFGR, DAC_CFGR_BUFEN_Msk); +} + +/** + * @brief Disable DAC Output Buffer + * @rmtoll CFGR BUFEN FL_DAC_DisableOutputBuffer + * @param DACx DAC instance + * @retval None + */ +__STATIC_INLINE void FL_DAC_DisableOutputBuffer(DAC_Type *DACx) +{ + CLEAR_BIT(DACx->CFGR, DAC_CFGR_BUFEN_Msk); +} + +/** + * @brief Get DAC Output Buffer Status + * @rmtoll CFGR BUFEN FL_DAC_IsEnabledOutputBuffer + * @param DACx DAC instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_DAC_IsEnabledOutputBuffer(DAC_Type *DACx) +{ + return (uint32_t)(READ_BIT(DACx->CFGR, DAC_CFGR_BUFEN_Msk) == DAC_CFGR_BUFEN_Msk); +} + +/** + * @brief Set DAC Trigger Source + * @note Can Only Be Modified When TRGEN=0 + * @rmtoll CFGR TRGSEL FL_DAC_SetTriggerSource + * @param DACx DAC instance + * @param source This parameter can be one of the following values: + * @arg @ref FL_DAC_TRGI_SOFTWARE + * @arg @ref FL_DAC_TRGI_ATIM + * @arg @ref FL_DAC_TRGI_GPTIM1 + * @arg @ref FL_DAC_TRGI_GPTIM2 + * @arg @ref FL_DAC_TRGI_BSTIM16 + * @arg @ref FL_DAC_TRGI_LPTIM16 + * @arg @ref FL_DAC_TRGI_EXTI0 + * @arg @ref FL_DAC_TRGI_EXTI4 + * @arg @ref FL_DAC_TRGI_EXTI8 + * @arg @ref FL_DAC_TRGI_EXTI12 + * @retval None + */ +__STATIC_INLINE void FL_DAC_SetTriggerSource(DAC_Type *DACx, uint32_t source) +{ + MODIFY_REG(DACx->CFGR, DAC_CFGR_TRGSEL_Msk, source); +} + +/** + * @brief Get DAC Trigger Source + * @rmtoll CFGR TRGSEL FL_DAC_GetTriggerSource + * @param DACx DAC instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_DAC_TRGI_SOFTWARE + * @arg @ref FL_DAC_TRGI_ATIM + * @arg @ref FL_DAC_TRGI_GPTIM1 + * @arg @ref FL_DAC_TRGI_GPTIM2 + * @arg @ref FL_DAC_TRGI_BSTIM16 + * @arg @ref FL_DAC_TRGI_LPTIM16 + * @arg @ref FL_DAC_TRGI_EXTI0 + * @arg @ref FL_DAC_TRGI_EXTI4 + * @arg @ref FL_DAC_TRGI_EXTI8 + * @arg @ref FL_DAC_TRGI_EXTI12 + */ +__STATIC_INLINE uint32_t FL_DAC_GetTriggerSource(DAC_Type *DACx) +{ + return (uint32_t)(READ_BIT(DACx->CFGR, DAC_CFGR_TRGSEL_Msk)); +} + +/** + * @brief Enable DAC DAC Feedback Switch + * @rmtoll CFGR SWIEN FL_DAC_EnableFeedbackSwitch + * @param DACx DAC instance + * @retval None + */ +__STATIC_INLINE void FL_DAC_EnableFeedbackSwitch(DAC_Type *DACx) +{ + SET_BIT(DACx->CFGR, DAC_CFGR_SWIEN_Msk); +} + +/** + * @brief Disable DAC DAC Feedback Switch + * @rmtoll CFGR SWIEN FL_DAC_DisableFeedbackSwitch + * @param DACx DAC instance + * @retval None + */ +__STATIC_INLINE void FL_DAC_DisableFeedbackSwitch(DAC_Type *DACx) +{ + CLEAR_BIT(DACx->CFGR, DAC_CFGR_SWIEN_Msk); +} + +/** + * @brief Get DAC Feedback Switch + * @rmtoll CFGR SWIEN FL_DAC_IsEnabledFeedbackSwitch + * @param DACx DAC instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_DAC_IsEnabledFeedbackSwitch(DAC_Type *DACx) +{ + return (uint32_t)(READ_BIT(DACx->CFGR, DAC_CFGR_SWIEN_Msk) == DAC_CFGR_SWIEN_Msk); +} + +/** + * @brief Trigger DAC + * @rmtoll SWTRGR SWTRIG FL_DAC_EnableSoftwareTrigger + * @param DACx DAC instance + * @retval None + */ +__STATIC_INLINE void FL_DAC_EnableSoftwareTrigger(DAC_Type *DACx) +{ + SET_BIT(DACx->SWTRGR, DAC_SWTRGR_SWTRIG_Msk); +} + +/** + * @brief Write DAC Data + * @rmtoll DHR DHR FL_DAC_WriteData + * @param DACx DAC instance + * @param data + * @retval None + */ +__STATIC_INLINE void FL_DAC_WriteData(DAC_Type *DACx, uint32_t data) +{ + MODIFY_REG(DACx->DHR, (0xfffU << 0U), (data << 0U)); +} + +/** + * @brief Read DAC Data + * @rmtoll DHR DHR FL_DAC_ReadData + * @param DACx DAC instance + * @retval + */ +__STATIC_INLINE uint32_t FL_DAC_ReadData(DAC_Type *DACx) +{ + return (uint32_t)(READ_BIT(DACx->DHR, 0xfffU) >> 0U); +} + +/** + * @brief Enable DAC DMA Error interrupt + * @rmtoll IER DMAE_IE FL_DAC_EnableIT_DMAError + * @param DACx DAC instance + * @retval None + */ +__STATIC_INLINE void FL_DAC_EnableIT_DMAError(DAC_Type *DACx) +{ + SET_BIT(DACx->IER, DAC_IER_DMAE_IE_Msk); +} + +/** + * @brief Disable DAC DMA Error interrupt + * @rmtoll IER DMAE_IE FL_DAC_DisableIT_DMAError + * @param DACx DAC instance + * @retval None + */ +__STATIC_INLINE void FL_DAC_DisableIT_DMAError(DAC_Type *DACx) +{ + CLEAR_BIT(DACx->IER, DAC_IER_DMAE_IE_Msk); +} + +/** + * @brief Get DAC DMA Error interrupt Enable Status + * @rmtoll IER DMAE_IE FL_DAC_IsEnabledIT_DMAError + * @param DACx DAC instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_DAC_IsEnabledIT_DMAError(DAC_Type *DACx) +{ + return (uint32_t)(READ_BIT(DACx->IER, DAC_IER_DMAE_IE_Msk) == DAC_IER_DMAE_IE_Msk); +} + +/** + * @brief Enable DAC End Of Holding Phase Interrupt + * @rmtoll IER EOH_IE FL_DAC_EnableIT_EndOfHolding + * @param DACx DAC instance + * @retval None + */ +__STATIC_INLINE void FL_DAC_EnableIT_EndOfHolding(DAC_Type *DACx) +{ + SET_BIT(DACx->IER, DAC_IER_EOH_IE_Msk); +} + +/** + * @brief Disable DAC End Of Holding Phase Interrupt + * @rmtoll IER EOH_IE FL_DAC_DisableIT_EndOfHolding + * @param DACx DAC instance + * @retval None + */ +__STATIC_INLINE void FL_DAC_DisableIT_EndOfHolding(DAC_Type *DACx) +{ + CLEAR_BIT(DACx->IER, DAC_IER_EOH_IE_Msk); +} + +/** + * @brief Get DAC End Of Holding Phase Interrupt Enable Status + * @rmtoll IER EOH_IE FL_DAC_IsEnabledIT_EndOfHolding + * @param DACx DAC instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_DAC_IsEnabledIT_EndOfHolding(DAC_Type *DACx) +{ + return (uint32_t)(READ_BIT(DACx->IER, DAC_IER_EOH_IE_Msk) == DAC_IER_EOH_IE_Msk); +} + +/** + * @brief Enable DAC End Of Sampling Phase Interrupt + * @rmtoll IER EOS_IE FL_DAC_EnableIT_EndOfSampling + * @param DACx DAC instance + * @retval None + */ +__STATIC_INLINE void FL_DAC_EnableIT_EndOfSampling(DAC_Type *DACx) +{ + SET_BIT(DACx->IER, DAC_IER_EOS_IE_Msk); +} + +/** + * @brief Disable DAC End Of Sampling Phase Interrupt + * @rmtoll IER EOS_IE FL_DAC_DisableIT_EndOfSampling + * @param DACx DAC instance + * @retval None + */ +__STATIC_INLINE void FL_DAC_DisableIT_EndOfSampling(DAC_Type *DACx) +{ + CLEAR_BIT(DACx->IER, DAC_IER_EOS_IE_Msk); +} + +/** + * @brief Get DAC End Of Sampling Phase Interrupt Enable Status + * @rmtoll IER EOS_IE FL_DAC_IsEnabledIT_EndOfSampling + * @param DACx DAC instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_DAC_IsEnabledIT_EndOfSampling(DAC_Type *DACx) +{ + return (uint32_t)(READ_BIT(DACx->IER, DAC_IER_EOS_IE_Msk) == DAC_IER_EOS_IE_Msk); +} + +/** + * @brief Enable DAC Data Output Updated Interrupt + * @rmtoll IER DOU_IE FL_DAC_EnableIT_DataOutputUpdate + * @param DACx DAC instance + * @retval None + */ +__STATIC_INLINE void FL_DAC_EnableIT_DataOutputUpdate(DAC_Type *DACx) +{ + SET_BIT(DACx->IER, DAC_IER_DOU_IE_Msk); +} + +/** + * @brief Disable DAC Data Output Updated Interrupt + * @rmtoll IER DOU_IE FL_DAC_DisableIT_DataOutputUpdate + * @param DACx DAC instance + * @retval None + */ +__STATIC_INLINE void FL_DAC_DisableIT_DataOutputUpdate(DAC_Type *DACx) +{ + CLEAR_BIT(DACx->IER, DAC_IER_DOU_IE_Msk); +} + +/** + * @brief Get DAC Data Output Updated Interrupt Enable Status + * @rmtoll IER DOU_IE FL_DAC_IsEnabledIT_DataOutputUpdate + * @param DACx DAC instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_DAC_IsEnabledIT_DataOutputUpdate(DAC_Type *DACx) +{ + return (uint32_t)(READ_BIT(DACx->IER, DAC_IER_DOU_IE_Msk) == DAC_IER_DOU_IE_Msk); +} + +/** + * @brief Get DAC DMA Error Flag + * @rmtoll ISR DMAERR FL_DAC_IsActiveFlag_DMAError + * @param DACx DAC instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_DAC_IsActiveFlag_DMAError(DAC_Type *DACx) +{ + return (uint32_t)(READ_BIT(DACx->ISR, DAC_ISR_DMAERR_Msk) == (DAC_ISR_DMAERR_Msk)); +} + +/** + * @brief Clear DAC DMA Error Flag + * @rmtoll ISR DMAERR FL_DAC_ClearFlag_DMAError + * @param DACx DAC instance + * @retval None + */ +__STATIC_INLINE void FL_DAC_ClearFlag_DMAError(DAC_Type *DACx) +{ + WRITE_REG(DACx->ISR, DAC_ISR_DMAERR_Msk); +} + +/** + * @brief Get DAC End Of Holding Phase Flag + * @rmtoll ISR EOH FL_DAC_IsActiveFlag_EndOfHolding + * @param DACx DAC instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_DAC_IsActiveFlag_EndOfHolding(DAC_Type *DACx) +{ + return (uint32_t)(READ_BIT(DACx->ISR, DAC_ISR_EOH_Msk) == (DAC_ISR_EOH_Msk)); +} + +/** + * @brief Clear DAC End Of Holding Phase Flag + * @rmtoll ISR EOH FL_DAC_ClearFlag_EndOfHolding + * @param DACx DAC instance + * @retval None + */ +__STATIC_INLINE void FL_DAC_ClearFlag_EndOfHolding(DAC_Type *DACx) +{ + WRITE_REG(DACx->ISR, DAC_ISR_EOH_Msk); +} + +/** + * @brief Get DAC End Of Sampling Phase Flag + * @rmtoll ISR EOS FL_DAC_IsActiveFlag_EndOfSampling + * @param DACx DAC instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_DAC_IsActiveFlag_EndOfSampling(DAC_Type *DACx) +{ + return (uint32_t)(READ_BIT(DACx->ISR, DAC_ISR_EOS_Msk) == (DAC_ISR_EOS_Msk)); +} + +/** + * @brief Clear DAC End Of Sampling Phase Flag + * @rmtoll ISR EOS FL_DAC_ClearFlag_EndOfSampling + * @param DACx DAC instance + * @retval None + */ +__STATIC_INLINE void FL_DAC_ClearFlag_EndOfSampling(DAC_Type *DACx) +{ + WRITE_REG(DACx->ISR, DAC_ISR_EOS_Msk); +} + +/** + * @brief Get DAC Data Output Updated Flag + * @rmtoll ISR DOU FL_DAC_IsActiveFlag_DataOutputUpdate + * @param DACx DAC instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_DAC_IsActiveFlag_DataOutputUpdate(DAC_Type *DACx) +{ + return (uint32_t)(READ_BIT(DACx->ISR, DAC_ISR_DOU_Msk) == (DAC_ISR_DOU_Msk)); +} + +/** + * @brief Clear DAC Data Output Updated Flag + * @rmtoll ISR DOU FL_DAC_ClearFlag_DataOutputUpdate + * @param DACx DAC instance + * @retval None + */ +__STATIC_INLINE void FL_DAC_ClearFlag_DataOutputUpdate(DAC_Type *DACx) +{ + WRITE_REG(DACx->ISR, DAC_ISR_DOU_Msk); +} + +/** + * @brief Set DAC Holding Time + * @note Modification IS NOT ALLOWED When SHEN=1 + * @rmtoll SHTR THLD FL_DAC_WriteHoldingTime + * @param DACx DAC instance + * @param time + * @retval None + */ +__STATIC_INLINE void FL_DAC_WriteHoldingTime(DAC_Type *DACx, uint32_t time) +{ + MODIFY_REG(DACx->SHTR, (0xffffU << 8U), (time << 8U)); +} + +/** + * @brief Read DAC Holding Time + * @rmtoll SHTR THLD FL_DAC_ReadHoldingTime + * @param DACx DAC instance + * @retval + */ +__STATIC_INLINE uint32_t FL_DAC_ReadHoldingTime(DAC_Type *DACx) +{ + return (uint32_t)(READ_BIT(DACx->SHTR, 0xffffU) >> 8U); +} + +/** + * @brief Set DAC Sampling Time Under Sample&Hold Mode + * @note Modification IS NOT ALLOWED When SHEN=1 + * @rmtoll SHTR TSMPL FL_DAC_WriteSamplingTime + * @param DACx DAC instance + * @param time + * @retval None + */ +__STATIC_INLINE void FL_DAC_WriteSamplingTime(DAC_Type *DACx, uint32_t time) +{ + MODIFY_REG(DACx->SHTR, (0xffU << 0U), (time << 0U)); +} + +/** + * @brief Read DAC Sampling Time Under Sample&Hold Mode + * @rmtoll SHTR TSMPL FL_DAC_ReadSamplingTime + * @param DACx DAC instance + * @retval + */ +__STATIC_INLINE uint32_t FL_DAC_ReadSamplingTime(DAC_Type *DACx) +{ + return (uint32_t)(READ_BIT(DACx->SHTR, 0xffU) >> 0U); +} + + +/** + * @} + */ + +/** @defgroup DAC_FL_EF_Init Initialization and de-initialization functions + * @{ + */ +FL_ErrorStatus FL_DAC_DeInit(DAC_Type *DACx); +FL_ErrorStatus FL_DAC_Init(DAC_Type *DACx, FL_DAC_InitTypeDef *DAC_InitStruct); +void FL_DAC_StructInit(FL_DAC_InitTypeDef *DAC_InitStruct); + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif /* __FM33LG0XX_FL_DAC_H*/ + +/*************************Py_Code_Generator Version: 0.1-0.11-0.1 @ 2020-09-12*************************/ +/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/ diff --git a/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_def.h b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_def.h new file mode 100644 index 0000000..2e70a23 --- /dev/null +++ b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_def.h @@ -0,0 +1,117 @@ + /** + ******************************************************************************************************* + * @file fm33lg0xx_fl_def.h + * @author FMSH Application Team + * @brief Header file of FL Driver Library Defines + ******************************************************************************************************* + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + + + +/* Define to prevent recursive inclusion --------------------------------------------------------------*/ +#ifndef __FM33LG0XX_FL_DEF_H +#define __FM33LG0XX_FL_DEF_H + +#ifdef __cplusplus +extern "C" { +#endif + +/* Includes -------------------------------------------------------------------------------------------*/ +#include "fm33lg0xx.h" +#include "fm33_assert.h" +#include +#include +#include + +/* Macros ---------------------------------------------------------------------------------------------*/ +/** @defgroup FL_Exported_Macros FL Driver Library Private Macros + * @{ + */ + +/** + * @brief Bit-wise operation macros used by FL driver library functions + */ +#define SET_BIT(REG, BIT) ((REG) |= (BIT)) +#define CLEAR_BIT(REG, BIT) ((REG) &= ~(BIT)) +#define READ_BIT(REG, BIT) ((REG) & (BIT)) +#define CLEAR_REG(REG) ((REG) = (0x0)) +#define WRITE_REG(REG, VAL) ((REG) = (VAL)) +#define READ_REG(REG) ((REG)) +#define MODIFY_REG(REG, CLEARMASK, SETMASK) WRITE_REG((REG), (((READ_REG(REG)) & (~(CLEARMASK))) | (SETMASK))) + +/** + * @} + */ + +/* Types ----------------------------------------------------------------------------------------------*/ +/** @defgroup FL_PT_Return FL Driver Library Private Return Type Defines + * @{ + */ + +typedef enum +{ + FL_RESET = 0U, + FL_SET = !FL_RESET +} FL_FlagStatus, FL_ITStatus; + +typedef enum +{ + FL_DISABLE = 0U, + FL_ENABLE = !FL_DISABLE +} FL_FunState; +#define IS_FUNCTIONAL_STATE(STATE) (((STATE) == FL_DISABLE) || ((STATE) == FL_ENABLE)) + +typedef enum +{ + FL_FAIL = 0U, + FL_PASS = !FL_FAIL +} FL_ErrorStatus; + +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif /* __FM33LG0XX_FL_DEF_H */ + +/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/ diff --git a/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_divas.h b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_divas.h new file mode 100644 index 0000000..aea240c --- /dev/null +++ b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_divas.h @@ -0,0 +1,272 @@ + /** + ******************************************************************************************************* + * @file fm33lg0xx_fl_divas.h + * @author FMSH Application Team + * @brief Head file of DIVAS FL Module + ******************************************************************************************************* + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + + + +/* Define to prevent recursive inclusion---------------------------------------------------------------*/ +#ifndef __FM33LG0XX_FL_DIVAS_H +#define __FM33LG0XX_FL_DIVAS_H + +#ifdef __cplusplus +extern "C" { +#endif +/* Includes -------------------------------------------------------------------------------------------*/ +#include "fm33lg0xx_fl_def.h" +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @defgroup DIVAS DIVAS + * @brief DIVAS FL driver + * @{ + */ + +/* Exported types -------------------------------------------------------------------------------------*/ +/** @defgroup DIVAS_FL_ES_INIT DIVAS Exported Init structures + * @{ + */ + +/** + * @brief FL DIVAS Init Sturcture definition + */ + +/** + * @} + */ +/* Exported constants ---------------------------------------------------------------------------------*/ +/** @defgroup DIVAS_FL_Exported_Constants DIVAS Exported Constants + * @{ + */ +#define FL_DIVAS_SR_BUSY_TIMEOUT (0xFFFU) + +#define DIVAS_SR_DIV0_Pos (1U) +#define DIVAS_SR_DIV0_Msk (0x1U << DIVAS_SR_DIV0_Pos) +#define DIVAS_SR_DIV0 DIVAS_SR_DIV0_Msk + +#define DIVAS_SR_BUSY_Pos (0U) +#define DIVAS_SR_BUSY_Msk (0x1U << DIVAS_SR_BUSY_Pos) +#define DIVAS_SR_BUSY DIVAS_SR_BUSY_Msk + +#define DIVAS_CR_MODE_Pos (0U) +#define DIVAS_CR_MODE_Msk (0x1U << DIVAS_CR_MODE_Pos) +#define DIVAS_CR_MODE DIVAS_CR_MODE_Msk + + + + + + +#define FL_DIVAS_MODE_DIV (0x0U << DIVAS_CR_MODE_Pos) +#define FL_DIVAS_MODE_ROOT (0x1U << DIVAS_CR_MODE_Pos) + + +/** + * @} + */ +/* Exported functions ---------------------------------------------------------------------------------*/ +/** @defgroup DIVAS_FL_Exported_Functions DIVAS Exported Functions + * @{ + */ + +/** + * @brief Write Operator Register + * @rmtoll OPRD FL_DIVAS_WriteOperand + * @param DIVASx DIVAS instance + * @param number + * @retval None + */ +__STATIC_INLINE void FL_DIVAS_WriteOperand(DIVAS_Type *DIVASx, uint32_t number) +{ + WRITE_REG(DIVASx->OPRD,(number << 0U)); +} + +/** + * @brief Read Operator Register + * @rmtoll OPRD FL_DIVAS_ReadOperand + * @param DIVASx DIVAS instance + * @retval + */ +__STATIC_INLINE int32_t FL_DIVAS_ReadOperand(DIVAS_Type *DIVASx) +{ + return (int32_t)(READ_REG(DIVASx->OPRD)); +} + +/** + * @brief Write 16bit Signed Dividend + * @rmtoll DIVSOR FL_DIVAS_WriteDivisor + * @param DIVASx DIVAS instance + * @param number + * @retval None + */ +__STATIC_INLINE void FL_DIVAS_WriteDivisor(DIVAS_Type *DIVASx, uint32_t number) +{ + MODIFY_REG(DIVASx->DIVSOR, (0xffffU << 0U), (number << 0U)); +} + +/** + * @brief Read 16bit Signed Dividend + * @rmtoll DIVSOR FL_DIVAS_ReadDivisor + * @param DIVASx DIVAS instance + * @retval + */ +__STATIC_INLINE int32_t FL_DIVAS_ReadDivisor(DIVAS_Type *DIVASx) +{ + return (int32_t)(READ_BIT(DIVASx->DIVSOR, 0xffffU) >> 0U); +} + +/** + * @brief Read 32bit Signed QUTO + * @rmtoll QUOT FL_DIVAS_ReadQuotient + * @param DIVASx DIVAS instance + * @retval + */ +__STATIC_INLINE int32_t FL_DIVAS_ReadQuotient(DIVAS_Type *DIVASx) +{ + return (int32_t)(READ_REG(DIVASx->QUOT)); +} + +/** + * @brief Read 16bit Signed Reminder + * @rmtoll REMD FL_DIVAS_ReadResidue + * @param DIVASx DIVAS instance + * @retval + */ +__STATIC_INLINE int16_t FL_DIVAS_ReadResidue(DIVAS_Type *DIVASx) +{ + return (int16_t)(READ_BIT(DIVASx->REMD, 0xffffU) >> 0U); +} + +/** + * @brief Read 16bit Unsigned Square Root + * @rmtoll ROOT FL_DIVAS_ReadRoot + * @param DIVASx DIVAS instance + * @retval + */ +__STATIC_INLINE uint16_t FL_DIVAS_ReadRoot(DIVAS_Type *DIVASx) +{ + return (uint16_t)(READ_BIT(DIVASx->ROOT, 0xffffU) >> 0U); +} + +/** + * @brief Get divided by 0 flag + * @rmtoll SR DIV0 FL_DIVAS_IsActiveFlag_DividedZero + * @param DIVASx DIVAS instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_DIVAS_IsActiveFlag_DividedZero(DIVAS_Type *DIVASx) +{ + return (uint32_t)(READ_BIT(DIVASx->SR, DIVAS_SR_DIV0_Msk) == (DIVAS_SR_DIV0_Msk)); +} + +/** + * @brief Get Busy flag + * @rmtoll SR BUSY FL_DIVAS_IsActiveFlag_Busy + * @param DIVASx DIVAS instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_DIVAS_IsActiveFlag_Busy(DIVAS_Type *DIVASx) +{ + return (uint32_t)(READ_BIT(DIVASx->SR, DIVAS_SR_BUSY_Msk) == (DIVAS_SR_BUSY_Msk)); +} + +/** + * @brief Set Work Mode + * @rmtoll CR MODE FL_DIVAS_SetMode + * @param DIVASx DIVAS instance + * @param mode This parameter can be one of the following values: + * @arg @ref FL_DIVAS_MODE_DIV + * @arg @ref FL_DIVAS_MODE_ROOT + * @retval None + */ +__STATIC_INLINE void FL_DIVAS_SetMode(DIVAS_Type *DIVASx, uint32_t mode) +{ + MODIFY_REG(DIVASx->CR, DIVAS_CR_MODE_Msk, mode); +} + +/** + * @brief Get Work Mode + * @rmtoll CR MODE FL_DIVAS_GetMode + * @param DIVASx DIVAS instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_DIVAS_MODE_DIV + * @arg @ref FL_DIVAS_MODE_ROOT + */ +__STATIC_INLINE uint32_t FL_DIVAS_GetMode(DIVAS_Type *DIVASx) +{ + return (uint32_t)(READ_BIT(DIVASx->CR, DIVAS_CR_MODE_Msk)); +} + +/** + * @} + */ + +/** @defgroup DIVAS_FL_EF_Init Initialization and de-initialization functions + * @{ + */ +FL_ErrorStatus FL_DIVAS_DeInit(DIVAS_Type *DIVASx); +FL_ErrorStatus FL_DIVAS_Init(DIVAS_Type *DIVASx); +uint32_t FL_DIVAS_Hdiv_Calculation(DIVAS_Type *DIVASx, int32_t DivisorEnd, int16_t Divisor, int32_t *Quotient, int16_t *Residue); +uint32_t FL_DIVAS_Root_Calculation(DIVAS_Type *DIVASx, uint32_t Root, uint16_t *Result); + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif /* __FM33LG0XX_FL_DIVAS_H*/ + +/*************************Py_Code_Generator Version: 0.1-0.11-0.1 @ 2020-09-14*************************/ +/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/ diff --git a/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_dma.h b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_dma.h new file mode 100644 index 0000000..ecd0236 --- /dev/null +++ b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_dma.h @@ -0,0 +1,1282 @@ + /** + ******************************************************************************************************* + * @file fm33lg0xx_fl_dma.h + * @author FMSH Application Team + * @brief Head file of DMA FL Module + ******************************************************************************************************* + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + + + +/* Define to prevent recursive inclusion---------------------------------------------------------------*/ +#ifndef __FM33LG0XX_FL_DMA_H +#define __FM33LG0XX_FL_DMA_H + +#ifdef __cplusplus +extern "C" { +#endif +/* Includes -------------------------------------------------------------------------------------------*/ +#include "fm33lg0xx_fl_def.h" +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @defgroup DMA DMA + * @brief DMA FL driver + * @{ + */ + +/* Exported types -------------------------------------------------------------------------------------*/ +/** @defgroup DMA_FL_ES_INIT DMA Exported Init structures + * @{ + */ + +/** + * @brief FL DMA Init Sturcture definition + */ +typedef struct +{ + /*! DMA外设映射地址 */ + uint32_t periphAddress; + /*! DMA传输方向 */ + uint32_t direction; + /*! RAM地址增长方向 */ + uint32_t memoryAddressIncMode; + /*! RAM地址增长方向 */ + uint32_t flashAddressIncMode; + /*! DAM传输通道数据位宽 */ + uint32_t dataSize; + /*! DMA通道优先级 */ + uint32_t priority; + /*! 循环模式使能 */ + uint32_t circMode; + +} FL_DMA_InitTypeDef; + +/** + * @brief FL DMA Config Sturcture definition + */ +typedef struct +{ + /*! RAM地址 */ + uint32_t memoryAddress; + /*! DMA传输数据字节个数 */ + uint32_t transmissionCount; + +} FL_DMA_ConfigTypeDef; + +/** + * @brief Configuration with temporary structure variable users will not be used directly + */ +typedef struct +{ + __IO uint32_t CHCR; + __IO uint32_t CHMAD; +} CHANNEL; + +/** + * @brief Configuration with temporary structure variable users will not be used directly + */ +typedef struct +{ + __IO uint32_t RESV; + __IO CHANNEL Channel[7]; + __IO uint32_t CH7CR; + __IO uint32_t CH7FLSAD; + __IO uint32_t CH7MAD; +} DMA_ADDR; + +/** + * @} + */ +/* Exported constants ---------------------------------------------------------------------------------*/ +/** @defgroup DMA_FL_Exported_Constants DMA Exported Constants + * @{ + */ + +#define DMA_GCR_ADDRERR_IE_Pos (1U) +#define DMA_GCR_ADDRERR_IE_Msk (0x1U << DMA_GCR_ADDRERR_IE_Pos) +#define DMA_GCR_ADDRERR_IE DMA_GCR_ADDRERR_IE_Msk + +#define DMA_GCR_EN_Pos (0U) +#define DMA_GCR_EN_Msk (0x1U << DMA_GCR_EN_Pos) +#define DMA_GCR_EN DMA_GCR_EN_Msk + +#define DMA_CHCR_TSIZE_Pos (16U) +#define DMA_CHCR_TSIZE_Msk (0xffffU << DMA_CHCR_TSIZE_Pos) +#define DMA_CHCR_TSIZE DMA_CHCR_TSIZE_Msk + +#define DMA_CHCR_PRI_Pos (12U) +#define DMA_CHCR_PRI_Msk (0x3U << DMA_CHCR_PRI_Pos) +#define DMA_CHCR_PRI DMA_CHCR_PRI_Msk + +#define DMA_CHCR_INC_Pos (11U) +#define DMA_CHCR_INC_Msk (0x1U << DMA_CHCR_INC_Pos) +#define DMA_CHCR_INC DMA_CHCR_INC_Msk + +#define DMA_CH7CR_RAM_INC_Pos (9U) +#define DMA_CH7CR_RAM_INC_Msk (0x1UL << DMA_CH7CR_RAM_INC_Pos) +#define DMA_CH7CR_RAM_INC DMA_CH7CR_RAM_INC_Msk + +#define DMA_CH7CR_FLASH_INC_Pos (8U) +#define DMA_CH7CR_FLASH_INC_Msk (0x1UL << DMA_CH7CR_FLASH_INC_Pos) +#define DMA_CH7CR_INC DMA_CH7CR_FLASH_INC_Msk + +#define DMA_CHCR_SSEL_Pos (8U) +#define DMA_CHCR_SSEL_Msk (0x7U << DMA_CHCR_SSEL_Pos) +#define DMA_CHCR_SSEL DMA_CHCR_SSEL_Msk + +#define DMA_CHCR_DIR_Pos (6U) +#define DMA_CHCR_DIR_Msk (0x1U << DMA_CHCR_DIR_Pos) +#define DMA_CHCR_DIR DMA_CHCR_DIR_Msk + +#define DMA_CH7CR_DIR_Pos (10U) +#define DMA_CH7CR_DIR_Msk (0x1UL << DMA_CH7CR_DIR_Pos) +#define DMA_CH7CR_DIR DMA_CH7CR_DIR_Msk + +#define DMA_CHCR_BDW_Pos (4U) +#define DMA_CHCR_BDW_Msk (0x3U << DMA_CHCR_BDW_Pos) +#define DMA_CHCR_BDW DMA_CHCR_BDW_Msk + +#define DMA_CHCR_CIRC_Pos (3U) +#define DMA_CHCR_CIRC_Msk (0x1U << DMA_CHCR_CIRC_Pos) +#define DMA_CHCR_CIRC DMA_CHCR_CIRC_Msk + +#define DMA_CHCR_FTIE_Pos (2U) +#define DMA_CHCR_FTIE_Msk (0x1U << DMA_CHCR_FTIE_Pos) +#define DMA_CHCR_FTIE DMA_CHCR_FTIE_Msk + +#define DMA_CHCR_HTIE_Pos (1U) +#define DMA_CHCR_HTIE_Msk (0x1U << DMA_CHCR_HTIE_Pos) +#define DMA_CHCR_HTIE DMA_CHCR_HTIE_Msk + +#define DMA_CHCR_EN_Pos (0U) +#define DMA_CHCR_EN_Msk (0x1U << DMA_CHCR_EN_Pos) +#define DMA_CHCR_EN DMA_CHCR_EN_Msk + +#define DMA_ISR_ADDRERR_Pos (16U) +#define DMA_ISR_ADDRERR_Msk (0x1U << DMA_ISR_ADDRERR_Pos) +#define DMA_ISR_ADDRERR DMA_ISR_ADDRERR_Msk + +#define DMA_ISR_CHFT_Pos (8U) +#define DMA_ISR_CHFT_Msk (0x1U << DMA_ISR_CHFT_Pos) +#define DMA_ISR_CHFT DMA_ISR_CHFT_Msk + +#define DMA_ISR_CHHT_Pos (0U) +#define DMA_ISR_CHHT_Msk (0x1U << DMA_ISR_CHHT_Pos) +#define DMA_ISR_CHHT DMA_ISR_CHHT_Msk + + + +#define FL_DMA_CHANNEL_0 (0x0U << 0U) +#define FL_DMA_CHANNEL_1 (0x1U << 0U) +#define FL_DMA_CHANNEL_2 (0x2U << 0U) +#define FL_DMA_CHANNEL_3 (0x3U << 0U) +#define FL_DMA_CHANNEL_4 (0x4U << 0U) +#define FL_DMA_CHANNEL_5 (0x5U << 0U) +#define FL_DMA_CHANNEL_6 (0x6U << 0U) +#define FL_DMA_CHANNEL_7 (0x7U << 0U) + + + +#define FL_DMA_PRIORITY_LOW (0x0U << DMA_CHCR_PRI_Pos) +#define FL_DMA_PRIORITY_MEDIUM (0x1U << DMA_CHCR_PRI_Pos) +#define FL_DMA_PRIORITY_HIGH (0x2U << DMA_CHCR_PRI_Pos) +#define FL_DMA_PRIORITY_VERYHIGH (0x3U << DMA_CHCR_PRI_Pos) + + +#define FL_DMA_MEMORY_INC_MODE_INCREASE (0x1U << DMA_CHCR_INC_Pos) +#define FL_DMA_MEMORY_INC_MODE_DECREASE (0x0U << DMA_CHCR_INC_Pos) +#define FL_DMA_CH7_RAM_INC_MODE_INCREASE (0x1U << DMA_CH7CR_RAM_INC_Pos) +#define FL_DMA_CH7_RAM_INC_MODE_DECREASE (0x0U << DMA_CH7CR_RAM_INC_Pos) +#define FL_DMA_CH7_FLASH_INC_MODE_INCREASE (0x1U << DMA_CH7CR_FLASH_INC_Pos) +#define FL_DMA_CH7_FLASH_INC_MODE_DECREASE (0x0U << DMA_CH7CR_FLASH_INC_Pos) + + +#define FL_DMA_PERIPHERAL_FUNCTION1 (0x0U << DMA_CHCR_SSEL_Pos) +#define FL_DMA_PERIPHERAL_FUNCTION2 (0x1U << DMA_CHCR_SSEL_Pos) +#define FL_DMA_PERIPHERAL_FUNCTION3 (0x2U << DMA_CHCR_SSEL_Pos) +#define FL_DMA_PERIPHERAL_FUNCTION4 (0x3U << DMA_CHCR_SSEL_Pos) +#define FL_DMA_PERIPHERAL_FUNCTION5 (0x4U << DMA_CHCR_SSEL_Pos) +#define FL_DMA_PERIPHERAL_FUNCTION6 (0x5U << DMA_CHCR_SSEL_Pos) +#define FL_DMA_PERIPHERAL_FUNCTION7 (0x6U << DMA_CHCR_SSEL_Pos) +#define FL_DMA_PERIPHERAL_FUNCTION8 (0x7U << DMA_CHCR_SSEL_Pos) + + +#define FL_DMA_DIR_PERIPHERAL_TO_RAM (0x0U << DMA_CHCR_DIR_Pos) +#define FL_DMA_DIR_RAM_TO_PERIPHERAL (0x1U << DMA_CHCR_DIR_Pos) +#define FL_DMA_DIR_FLASH_TO_RAM (0x1U << DMA_CH7CR_DIR_Pos) +#define FL_DMA_DIR_RAM_TO_FLASH (0x0U << DMA_CH7CR_DIR_Pos) + + +#define FL_DMA_BANDWIDTH_8B (0x0U << DMA_CHCR_BDW_Pos) +#define FL_DMA_BANDWIDTH_16B (0x1U << DMA_CHCR_BDW_Pos) +#define FL_DMA_BANDWIDTH_32B (0x2U << DMA_CHCR_BDW_Pos) + + +/** + * @} + */ +/* Exported functions ---------------------------------------------------------------------------------*/ +/** @defgroup DMA_FL_Exported_Functions DMA Exported Functions + * @{ + */ + +/** + * @brief DMA address error interrupt enable + * @rmtoll GCR ADDRERR_IE FL_DMA_EnableIT_AddressError + * @param DMAx DMA instance + * @retval None + */ +__STATIC_INLINE void FL_DMA_EnableIT_AddressError(DMA_Type *DMAx) +{ + SET_BIT(DMAx->GCR, DMA_GCR_ADDRERR_IE_Msk); +} + +/** + * @brief Get DMA address error interrupt enable status + * @rmtoll GCR ADDRERR_IE FL_DMA_IsEnabledIT_AddressError + * @param DMAx DMA instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_DMA_IsEnabledIT_AddressError(DMA_Type *DMAx) +{ + return (uint32_t)(READ_BIT(DMAx->GCR, DMA_GCR_ADDRERR_IE_Msk) == DMA_GCR_ADDRERR_IE_Msk); +} + +/** + * @brief DMA address error interrupt disable + * @rmtoll GCR ADDRERR_IE FL_DMA_DisableIT_AddressError + * @param DMAx DMA instance + * @retval None + */ +__STATIC_INLINE void FL_DMA_DisableIT_AddressError(DMA_Type *DMAx) +{ + CLEAR_BIT(DMAx->GCR, DMA_GCR_ADDRERR_IE_Msk); +} + +/** + * @brief DMA enable + * @rmtoll GCR EN FL_DMA_Enable + * @param DMAx DMA instance + * @retval None + */ +__STATIC_INLINE void FL_DMA_Enable(DMA_Type *DMAx) +{ + SET_BIT(DMAx->GCR, DMA_GCR_EN_Msk); +} + +/** + * @brief Get DMA enable status + * @rmtoll GCR EN FL_DMA_IsEnabled + * @param DMAx DMA instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_DMA_IsEnabled(DMA_Type *DMAx) +{ + return (uint32_t)(READ_BIT(DMAx->GCR, DMA_GCR_EN_Msk) == DMA_GCR_EN_Msk); +} + +/** + * @brief DMA disable + * @rmtoll GCR EN FL_DMA_Disable + * @param DMAx DMA instance + * @retval None + */ +__STATIC_INLINE void FL_DMA_Disable(DMA_Type *DMAx) +{ + CLEAR_BIT(DMAx->GCR, DMA_GCR_EN_Msk); +} + +/** + * @brief Set channelx transmission length + * @rmtoll CHCR TSIZE FL_DMA_WriteTransmissionSize + * @param DMAx DMA instance + * @param size + * @param channel This parameter can be one of the following values: + * @arg @ref FL_DMA_CHANNEL_0 + * @arg @ref FL_DMA_CHANNEL_1 + * @arg @ref FL_DMA_CHANNEL_2 + * @arg @ref FL_DMA_CHANNEL_3 + * @arg @ref FL_DMA_CHANNEL_4 + * @arg @ref FL_DMA_CHANNEL_5 + * @arg @ref FL_DMA_CHANNEL_6 + * @arg @ref FL_DMA_CHANNEL_7 + * @retval None + */ +__STATIC_INLINE void FL_DMA_WriteTransmissionSize(DMA_Type *DMAx, uint32_t size, uint32_t channel) +{ + DMA_ADDR *Temp = (DMA_ADDR *)DMAx; + if(channel <= FL_DMA_CHANNEL_6) + { + MODIFY_REG(Temp->Channel[channel].CHCR, (0xffffU << 16U), (size << 16U)); + } + else + { + MODIFY_REG(Temp->CH7CR, (0xfffU << 16U), (size << 16U)); + } +} + +/** + * @brief Get channelx transmission length + * @rmtoll CHCR TSIZE FL_DMA_ReadTransmissionSize + * @param DMAx DMA instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_DMA_CHANNEL_0 + * @arg @ref FL_DMA_CHANNEL_1 + * @arg @ref FL_DMA_CHANNEL_2 + * @arg @ref FL_DMA_CHANNEL_3 + * @arg @ref FL_DMA_CHANNEL_4 + * @arg @ref FL_DMA_CHANNEL_5 + * @arg @ref FL_DMA_CHANNEL_6 + * @arg @ref FL_DMA_CHANNEL_7 + * @retval + */ +__STATIC_INLINE uint32_t FL_DMA_ReadTransmissionSize(DMA_Type *DMAx, uint32_t channel) +{ + DMA_ADDR *Temp = (DMA_ADDR *)DMAx; + if(channel <= FL_DMA_CHANNEL_6) + { + return (uint32_t)(READ_BIT(Temp->Channel[channel].CHCR, (0xffffU << 16)) >> 16U); + } + else + { + return (uint32_t)(READ_BIT(Temp->CH7CR, (0xffffU << 16)) >> 16U); + } +} + +/** + * @brief Set channelx priority + * @rmtoll CHCR PRI FL_DMA_SetPriority + * @param DMAx DMA instance + * @param priority This parameter can be one of the following values: + * @arg @ref FL_DMA_PRIORITY_LOW + * @arg @ref FL_DMA_PRIORITY_MEDIUM + * @arg @ref FL_DMA_PRIORITY_HIGH + * @arg @ref FL_DMA_PRIORITY_VERYHIGH + * @param channel This parameter can be one of the following values: + * @arg @ref FL_DMA_CHANNEL_0 + * @arg @ref FL_DMA_CHANNEL_1 + * @arg @ref FL_DMA_CHANNEL_2 + * @arg @ref FL_DMA_CHANNEL_3 + * @arg @ref FL_DMA_CHANNEL_4 + * @arg @ref FL_DMA_CHANNEL_5 + * @arg @ref FL_DMA_CHANNEL_6 + * @arg @ref FL_DMA_CHANNEL_7 + * @retval None + */ +__STATIC_INLINE void FL_DMA_SetPriority(DMA_Type *DMAx, uint32_t priority, uint32_t channel) +{ + DMA_ADDR *Temp = (DMA_ADDR *)DMAx; + if(channel <= FL_DMA_CHANNEL_6) + { + MODIFY_REG(Temp->Channel[channel].CHCR, DMA_CHCR_PRI_Msk, priority); + } + else + { + MODIFY_REG(Temp->CH7CR, DMA_CHCR_PRI_Msk, priority); + } +} + +/** + * @brief Get channelx priority + * @rmtoll CHCR PRI FL_DMA_GetPriority + * @param DMAx DMA instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_DMA_CHANNEL_0 + * @arg @ref FL_DMA_CHANNEL_1 + * @arg @ref FL_DMA_CHANNEL_2 + * @arg @ref FL_DMA_CHANNEL_3 + * @arg @ref FL_DMA_CHANNEL_4 + * @arg @ref FL_DMA_CHANNEL_5 + * @arg @ref FL_DMA_CHANNEL_6 + * @arg @ref FL_DMA_CHANNEL_7 + * @retval Returned value can be one of the following values: + * @arg @ref FL_DMA_PRIORITY_LOW + * @arg @ref FL_DMA_PRIORITY_MEDIUM + * @arg @ref FL_DMA_PRIORITY_HIGH + * @arg @ref FL_DMA_PRIORITY_VERYHIGH + */ +__STATIC_INLINE uint32_t FL_DMA_GetPriority(DMA_Type *DMAx, uint32_t channel) +{ + DMA_ADDR *Temp = (DMA_ADDR *)DMAx; + if(channel <= FL_DMA_CHANNEL_6) + { + return (uint32_t)(READ_BIT(Temp->Channel[channel].CHCR, DMA_CHCR_PRI_Msk)); + } + else + { + return (uint32_t)(READ_BIT(Temp->CH7CR, DMA_CHCR_PRI_Msk)); + } +} + +/** + * @brief Set channelx RAM address incremental + * @rmtoll CHCR INC FL_DMA_SetMemoryIncrementMode + + * @param DMAx DMA instance + * @param mode This parameter can be one of the following values: + * @arg @ref FL_DMA_MEMORY_INC_MODE_INCREASE + * @arg @ref FL_DMA_MEMORY_INC_MODE_DECREASE + * @param channel This parameter can be one of the following values: + * @arg @ref FL_DMA_CHANNEL_0 + * @arg @ref FL_DMA_CHANNEL_1 + * @arg @ref FL_DMA_CHANNEL_2 + * @arg @ref FL_DMA_CHANNEL_3 + * @arg @ref FL_DMA_CHANNEL_4 + * @arg @ref FL_DMA_CHANNEL_5 + * @arg @ref FL_DMA_CHANNEL_6 + * @arg @ref FL_DMA_CHANNEL_7 + * @retval None + */ +__STATIC_INLINE void FL_DMA_SetMemoryIncrementMode(DMA_Type *DMAx, uint32_t mode, uint32_t channel) +{ + DMA_ADDR *Temp = (DMA_ADDR *)DMAx; + if(channel <= FL_DMA_CHANNEL_6) + { + MODIFY_REG(Temp->Channel[channel].CHCR, DMA_CHCR_INC_Msk, mode); + } + else + { + MODIFY_REG(Temp->CH7CR, DMA_CH7CR_RAM_INC_Msk, mode); + } +} + +/** + * @brief Get channelx RAM address incremental status + * @rmtoll CHCR INC FL_DMA_GetMemoryIncrementMode + * @param DMAx DMA instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_DMA_CHANNEL_0 + * @arg @ref FL_DMA_CHANNEL_1 + * @arg @ref FL_DMA_CHANNEL_2 + * @arg @ref FL_DMA_CHANNEL_3 + * @arg @ref FL_DMA_CHANNEL_4 + * @arg @ref FL_DMA_CHANNEL_5 + * @arg @ref FL_DMA_CHANNEL_6 + * @arg @ref FL_DMA_CHANNEL_7 + * @retval Returned value can be one of the following values: + * @arg @ref FL_DMA_MEMORY_INC_MODE_INCREASE + * @arg @ref FL_DMA_MEMORY_INC_MODE_DECREASE + * @arg @ref FL_DMA_CH7_RAM_INC_MODE_INCREASE + * @arg @ref FL_DMA_CH7_RAM_INC_MODE_REDUCE + */ +__STATIC_INLINE uint32_t FL_DMA_GetMemoryIncrementMode(DMA_Type *DMAx, uint32_t channel) +{ + DMA_ADDR *Temp = (DMA_ADDR *)DMAx; + if(channel <= FL_DMA_CHANNEL_6) + { + return (uint32_t)(READ_BIT(Temp->Channel[channel].CHCR, DMA_CHCR_INC_Msk)); + } + else + { + return (uint32_t)(READ_BIT(Temp->CH7CR, DMA_CH7CR_RAM_INC_Msk)); + } +} + +/** + * @brief + * @rmtoll CH7CR INC FL_DMA_SetFlashAddrIncremental + * @param DMAx DMA instance + * @param Incremental This parameter can be one of the following values: + * @arg @ref FL_DMA_CH7_FLASH_INC_MODE_INCREASE + * @arg @ref FL_DMA_CH7_FLASH_INC_MODE_REDUCE + * @retval None + */ +__STATIC_INLINE void FL_DMA_SetFlashAddrIncremental(DMA_Type *DMAx, uint32_t Incremental) +{ + DMA_ADDR *Temp = (DMA_ADDR *)DMAx; + MODIFY_REG(Temp->CH7CR, DMA_CH7CR_FLASH_INC_Msk, Incremental); +} + +/** + * @brief + * @rmtoll CHCR INC FL_DMA_GetFlashAddrIncremental + * @param DMAx DMA instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_DMA_CH7_FLASH_ADDR_INCREASE + * @arg @ref FL_DMA_CH7_FLASH_ADDR_REDUCE + */ +__STATIC_INLINE uint32_t FL_DMA_GetFlashAddrIncremental(DMA_Type *DMAx) +{ + DMA_ADDR *Temp = (DMA_ADDR *)DMAx; + return (uint32_t)(READ_BIT(Temp->CH7CR, DMA_CH7CR_FLASH_INC_Msk)); +} + +/** + * @brief Channelx request source select + * @rmtoll CHCR SSEL FL_DMA_SetPeripheralMap + * @param DMAx DMA instance + * @param peripheral This parameter can be one of the following values: + * @arg @ref FL_DMA_PERIPHERAL_FUNCTION1 + * @arg @ref FL_DMA_PERIPHERAL_FUNCTION2 + * @arg @ref FL_DMA_PERIPHERAL_FUNCTION3 + * @arg @ref FL_DMA_PERIPHERAL_FUNCTION4 + * @arg @ref FL_DMA_PERIPHERAL_FUNCTION5 + * @arg @ref FL_DMA_PERIPHERAL_FUNCTION6 + * @arg @ref FL_DMA_PERIPHERAL_FUNCTION7 + * @arg @ref FL_DMA_PERIPHERAL_FUNCTION8 + * @param channel This parameter can be one of the following values: + * @arg @ref FL_DMA_CHANNEL_0 + * @arg @ref FL_DMA_CHANNEL_1 + * @arg @ref FL_DMA_CHANNEL_2 + * @arg @ref FL_DMA_CHANNEL_3 + * @arg @ref FL_DMA_CHANNEL_4 + * @arg @ref FL_DMA_CHANNEL_5 + * @arg @ref FL_DMA_CHANNEL_6 + * @arg @ref FL_DMA_CHANNEL_7 + * @retval None + */ +__STATIC_INLINE void FL_DMA_SetPeripheralMap(DMA_Type *DMAx, uint32_t peripheral, uint32_t channel) +{ + DMA_ADDR *Temp = (DMA_ADDR *)DMAx; + if(channel <= FL_DMA_CHANNEL_6) + { + MODIFY_REG(Temp->Channel[channel].CHCR, DMA_CHCR_SSEL_Msk, peripheral); + } +} + +/** + * @brief Get Channelx request source select status + * @rmtoll CHCR SSEL FL_DMA_GetPeripheralMap + * @param DMAx DMA instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_DMA_CHANNEL_0 + * @arg @ref FL_DMA_CHANNEL_1 + * @arg @ref FL_DMA_CHANNEL_2 + * @arg @ref FL_DMA_CHANNEL_3 + * @arg @ref FL_DMA_CHANNEL_4 + * @arg @ref FL_DMA_CHANNEL_5 + * @arg @ref FL_DMA_CHANNEL_6 + * @arg @ref FL_DMA_CHANNEL_7 + * @retval Returned value can be one of the following values: + * @arg @ref FL_DMA_PERIPHERAL_FUNCTION1 + * @arg @ref FL_DMA_PERIPHERAL_FUNCTION2 + * @arg @ref FL_DMA_PERIPHERAL_FUNCTION3 + * @arg @ref FL_DMA_PERIPHERAL_FUNCTION4 + * @arg @ref FL_DMA_PERIPHERAL_FUNCTION5 + * @arg @ref FL_DMA_PERIPHERAL_FUNCTION6 + * @arg @ref FL_DMA_PERIPHERAL_FUNCTION7 + * @arg @ref FL_DMA_PERIPHERAL_FUNCTION8 + */ +__STATIC_INLINE uint32_t FL_DMA_GetPeripheralMap(DMA_Type *DMAx, uint32_t channel) +{ + DMA_ADDR *Temp = (DMA_ADDR *)DMAx; + if(channel <= FL_DMA_CHANNEL_6) + { + return (uint32_t)(READ_BIT(Temp->Channel[channel].CHCR, DMA_CHCR_SSEL_Msk)); + } + return 0; +} + +/** + * @brief Set channelx transmit direction + * @rmtoll CHCR DIR FL_DMA_SetTransmissionDirection + * @param DMAx DMA instance + * @param direction This parameter can be one of the following values: + * @arg @ref FL_DMA_DIR_PERIPHERAL_TO_RAM + * @arg @ref FL_DMA_DIR_RAM_TO_PERIPHERAL + * @param channel This parameter can be one of the following values: + * @arg @ref FL_DMA_CHANNEL_0 + * @arg @ref FL_DMA_CHANNEL_1 + * @arg @ref FL_DMA_CHANNEL_2 + * @arg @ref FL_DMA_CHANNEL_3 + * @arg @ref FL_DMA_CHANNEL_4 + * @arg @ref FL_DMA_CHANNEL_5 + * @arg @ref FL_DMA_CHANNEL_6 + * @arg @ref FL_DMA_CHANNEL_7 + * @retval None + */ +__STATIC_INLINE void FL_DMA_SetTransmissionDirection(DMA_Type *DMAx, uint32_t direction, uint32_t channel) +{ + DMA_ADDR *Temp = (DMA_ADDR *)DMAx; + if(channel <= FL_DMA_CHANNEL_6) + { + MODIFY_REG(Temp->Channel[channel].CHCR, DMA_CHCR_DIR_Msk, direction); + } + else + { + MODIFY_REG(Temp->CH7CR, DMA_CH7CR_DIR_Msk, direction); + } +} + +/** + * @brief Get channelx transmit direction + * @rmtoll CHCR DIR FL_DMA_GetTransmissionDirection + * @param DMAx DMA instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_DMA_CHANNEL_0 + * @arg @ref FL_DMA_CHANNEL_1 + * @arg @ref FL_DMA_CHANNEL_2 + * @arg @ref FL_DMA_CHANNEL_3 + * @arg @ref FL_DMA_CHANNEL_4 + * @arg @ref FL_DMA_CHANNEL_5 + * @arg @ref FL_DMA_CHANNEL_6 + * @arg @ref FL_DMA_CHANNEL_7 + * @retval Returned value can be one of the following values: + * @arg @ref FL_DMA_DIR_PERIPHERAL_TO_RAM + * @arg @ref FL_DMA_DIR_RAM_TO_PERIPHERAL + */ +__STATIC_INLINE uint32_t FL_DMA_GetTransmissionDirection(DMA_Type *DMAx, uint32_t channel) +{ + DMA_ADDR *Temp = (DMA_ADDR *)DMAx; + if(channel <= FL_DMA_CHANNEL_6) + { + return (uint32_t)(READ_BIT(Temp->Channel[channel].CHCR, DMA_CHCR_DIR_Msk)); + } + else + { + return (uint32_t)(READ_BIT(Temp->CH7CR, DMA_CH7CR_DIR_Msk)); + } +} + +/** + * @brief Set transmit bandwidth + * @rmtoll CHCR BDW FL_DMA_SetBandwidth + * @param DMAx DMA instance + * @param bandwidth This parameter can be one of the following values: + * @arg @ref FL_DMA_BANDWIDTH_8B + * @arg @ref FL_DMA_BANDWIDTH_16B + * @arg @ref FL_DMA_BANDWIDTH_32B + * @param channel This parameter can be one of the following values: + * @arg @ref FL_DMA_CHANNEL_0 + * @arg @ref FL_DMA_CHANNEL_1 + * @arg @ref FL_DMA_CHANNEL_2 + * @arg @ref FL_DMA_CHANNEL_3 + * @arg @ref FL_DMA_CHANNEL_4 + * @arg @ref FL_DMA_CHANNEL_5 + * @arg @ref FL_DMA_CHANNEL_6 + * @arg @ref FL_DMA_CHANNEL_7 + * @retval None + */ +__STATIC_INLINE void FL_DMA_SetBandwidth(DMA_Type *DMAx, uint32_t bandwidth, uint32_t channel) +{ + DMA_ADDR *Temp = (DMA_ADDR *)DMAx; + if(channel <= FL_DMA_CHANNEL_6) + { + MODIFY_REG(Temp->Channel[channel].CHCR, DMA_CHCR_BDW_Msk, bandwidth); + } +} + +/** + * @brief Get transmit bandwidth + * @rmtoll CHCR BDW FL_DMA_GetBandwidth + * @param DMAx DMA instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_DMA_CHANNEL_0 + * @arg @ref FL_DMA_CHANNEL_1 + * @arg @ref FL_DMA_CHANNEL_2 + * @arg @ref FL_DMA_CHANNEL_3 + * @arg @ref FL_DMA_CHANNEL_4 + * @arg @ref FL_DMA_CHANNEL_5 + * @arg @ref FL_DMA_CHANNEL_6 + * @arg @ref FL_DMA_CHANNEL_7 + * @retval Returned value can be one of the following values: + * @arg @ref FL_DMA_BANDWIDTH_8B + * @arg @ref FL_DMA_BANDWIDTH_16B + * @arg @ref FL_DMA_BANDWIDTH_32B + */ +__STATIC_INLINE uint32_t FL_DMA_GetBandwidth(DMA_Type *DMAx, uint32_t channel) +{ + DMA_ADDR *Temp = (DMA_ADDR *)DMAx; + if(channel <= FL_DMA_CHANNEL_6) + { + return (uint32_t)(READ_BIT(Temp->Channel[channel].CHCR, DMA_CHCR_BDW_Msk)); + } + else + { + /* FLASH 通道 默认位宽32Bit */ + return FL_DMA_BANDWIDTH_32B; + } +} + +/** + * @brief Circular mode enable + * @rmtoll CHCR CIRC FL_DMA_EnableCircularMode + * @param DMAx DMA instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_DMA_CHANNEL_0 + * @arg @ref FL_DMA_CHANNEL_1 + * @arg @ref FL_DMA_CHANNEL_2 + * @arg @ref FL_DMA_CHANNEL_3 + * @arg @ref FL_DMA_CHANNEL_4 + * @arg @ref FL_DMA_CHANNEL_5 + * @arg @ref FL_DMA_CHANNEL_6 + * @arg @ref FL_DMA_CHANNEL_7 + * @retval None + */ +__STATIC_INLINE void FL_DMA_EnableCircularMode(DMA_Type *DMAx, uint32_t channel) +{ + DMA_ADDR *Temp = (DMA_ADDR *)DMAx; + if(channel <= FL_DMA_CHANNEL_6) + { + SET_BIT(Temp->Channel[channel].CHCR, DMA_CHCR_CIRC_Msk); + } + else + { + SET_BIT(Temp->CH7CR, DMA_CHCR_CIRC_Msk); + } +} + +/** + * @brief Get circular mode enable status + * @rmtoll CHCR CIRC FL_DMA_IsEnabledCircularMode + * @param DMAx DMA instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_DMA_CHANNEL_0 + * @arg @ref FL_DMA_CHANNEL_1 + * @arg @ref FL_DMA_CHANNEL_2 + * @arg @ref FL_DMA_CHANNEL_3 + * @arg @ref FL_DMA_CHANNEL_4 + * @arg @ref FL_DMA_CHANNEL_5 + * @arg @ref FL_DMA_CHANNEL_6 + * @arg @ref FL_DMA_CHANNEL_7 + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_DMA_IsEnabledCircularMode(DMA_Type *DMAx, uint32_t channel) +{ + DMA_ADDR *Temp = (DMA_ADDR *)DMAx; + if(channel <= FL_DMA_CHANNEL_6) + { + return (uint32_t)(READ_BIT(Temp->Channel[channel].CHCR, DMA_CHCR_CIRC_Msk) == DMA_CHCR_CIRC_Msk); + } + else + { + return (uint32_t)(READ_BIT(Temp->CH7CR, DMA_CHCR_CIRC_Msk) == DMA_CHCR_CIRC_Msk); + } +} + +/** + * @brief Circular mode disable + * @rmtoll CHCR CIRC FL_DMA_DisableCircularMode + * @param DMAx DMA instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_DMA_CHANNEL_0 + * @arg @ref FL_DMA_CHANNEL_1 + * @arg @ref FL_DMA_CHANNEL_2 + * @arg @ref FL_DMA_CHANNEL_3 + * @arg @ref FL_DMA_CHANNEL_4 + * @arg @ref FL_DMA_CHANNEL_5 + * @arg @ref FL_DMA_CHANNEL_6 + * @arg @ref FL_DMA_CHANNEL_7 + * @retval None + */ +__STATIC_INLINE void FL_DMA_DisableCircularMode(DMA_Type *DMAx, uint32_t channel) +{ + DMA_ADDR *Temp = (DMA_ADDR *)DMAx; + if(channel <= FL_DMA_CHANNEL_6) + { + CLEAR_BIT(Temp->Channel[channel].CHCR, DMA_CHCR_CIRC_Msk); + } + else + { + CLEAR_BIT(Temp->CH7CR, DMA_CHCR_CIRC_Msk); + } +} + +/** + * @brief channelx transmit finished interrupt enable + * @rmtoll CHCR FTIE FL_DMA_EnableIT_TransferComplete + * @param DMAx DMA instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_DMA_CHANNEL_0 + * @arg @ref FL_DMA_CHANNEL_1 + * @arg @ref FL_DMA_CHANNEL_2 + * @arg @ref FL_DMA_CHANNEL_3 + * @arg @ref FL_DMA_CHANNEL_4 + * @arg @ref FL_DMA_CHANNEL_5 + * @arg @ref FL_DMA_CHANNEL_6 + * @arg @ref FL_DMA_CHANNEL_7 + * @retval None + */ +__STATIC_INLINE void FL_DMA_EnableIT_TransferComplete(DMA_Type *DMAx, uint32_t channel) +{ + DMA_ADDR *Temp = (DMA_ADDR *)DMAx; + if(channel <= FL_DMA_CHANNEL_6) + { + SET_BIT(Temp->Channel[channel].CHCR, DMA_CHCR_FTIE_Msk); + } + else + { + SET_BIT(Temp->CH7CR, DMA_CHCR_FTIE_Msk); + } +} + +/** + * @brief Get channelx transmit finished interrupt enable status + * @rmtoll CHCR FTIE FL_DMA_IsEnabledIT_TransferComplete + * @param DMAx DMA instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_DMA_CHANNEL_0 + * @arg @ref FL_DMA_CHANNEL_1 + * @arg @ref FL_DMA_CHANNEL_2 + * @arg @ref FL_DMA_CHANNEL_3 + * @arg @ref FL_DMA_CHANNEL_4 + * @arg @ref FL_DMA_CHANNEL_5 + * @arg @ref FL_DMA_CHANNEL_6 + * @arg @ref FL_DMA_CHANNEL_7 + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_DMA_IsEnabledIT_TransferComplete(DMA_Type *DMAx, uint32_t channel) +{ + DMA_ADDR *Temp = (DMA_ADDR *)DMAx; + if(channel <= FL_DMA_CHANNEL_6) + { + return (uint32_t)(READ_BIT(Temp->Channel[channel].CHCR, DMA_CHCR_FTIE_Msk) == DMA_CHCR_FTIE_Msk); + } + else + { + return (uint32_t)(READ_BIT(Temp->CH7CR, DMA_CHCR_FTIE_Msk) == DMA_CHCR_FTIE_Msk); + } +} + +/** + * @brief channelx transmit finished interrupt disable + * @rmtoll CHCR FTIE FL_DMA_DisableIT_TransferComplete + * @param DMAx DMA instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_DMA_CHANNEL_0 + * @arg @ref FL_DMA_CHANNEL_1 + * @arg @ref FL_DMA_CHANNEL_2 + * @arg @ref FL_DMA_CHANNEL_3 + * @arg @ref FL_DMA_CHANNEL_4 + * @arg @ref FL_DMA_CHANNEL_5 + * @arg @ref FL_DMA_CHANNEL_6 + * @arg @ref FL_DMA_CHANNEL_7 + * @retval None + */ +__STATIC_INLINE void FL_DMA_DisableIT_TransferComplete(DMA_Type *DMAx, uint32_t channel) +{ + DMA_ADDR *Temp = (DMA_ADDR *)DMAx; + if(channel <= FL_DMA_CHANNEL_6) + { + CLEAR_BIT(Temp->Channel[channel].CHCR, DMA_CHCR_FTIE_Msk); + } + else + { + CLEAR_BIT(Temp->CH7CR, DMA_CHCR_FTIE_Msk); + } +} + +/** + * @brief Channelx Half-transfer interrupt enable + * @rmtoll CHCR HTIE FL_DMA_EnableIT_TransferHalfComplete + * @param DMAx DMA instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_DMA_CHANNEL_0 + * @arg @ref FL_DMA_CHANNEL_1 + * @arg @ref FL_DMA_CHANNEL_2 + * @arg @ref FL_DMA_CHANNEL_3 + * @arg @ref FL_DMA_CHANNEL_4 + * @arg @ref FL_DMA_CHANNEL_5 + * @arg @ref FL_DMA_CHANNEL_6 + * @arg @ref FL_DMA_CHANNEL_7 + * @retval None + */ +__STATIC_INLINE void FL_DMA_EnableIT_TransferHalfComplete(DMA_Type *DMAx, uint32_t channel) +{ + DMA_ADDR *Temp = (DMA_ADDR *)DMAx; + if(channel <= FL_DMA_CHANNEL_6) + { + SET_BIT(Temp->Channel[channel].CHCR, DMA_CHCR_HTIE_Msk); + } + else + { + SET_BIT(Temp->CH7CR, DMA_CHCR_HTIE_Msk); + } +} + +/** + * @brief Get Channelx Half-transfer interrupt enable status + * @rmtoll CHCR HTIE FL_DMA_IsEnabledIT_TransferHalfComplete + * @param DMAx DMA instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_DMA_CHANNEL_0 + * @arg @ref FL_DMA_CHANNEL_1 + * @arg @ref FL_DMA_CHANNEL_2 + * @arg @ref FL_DMA_CHANNEL_3 + * @arg @ref FL_DMA_CHANNEL_4 + * @arg @ref FL_DMA_CHANNEL_5 + * @arg @ref FL_DMA_CHANNEL_6 + * @arg @ref FL_DMA_CHANNEL_7 + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_DMA_IsEnabledIT_TransferHalfComplete(DMA_Type *DMAx, uint32_t channel) +{ + DMA_ADDR *Temp = (DMA_ADDR *)DMAx; + if(channel <= FL_DMA_CHANNEL_6) + { + return (uint32_t)(READ_BIT(Temp->Channel[channel].CHCR, DMA_CHCR_HTIE_Msk) == DMA_CHCR_HTIE_Msk); + } + else + { + return (uint32_t)(READ_BIT(Temp->CH7CR, DMA_CHCR_HTIE_Msk) == DMA_CHCR_HTIE_Msk); + } +} + +/** + * @brief Channelx Half-transfer interrupt disable + * @rmtoll CHCR HTIE FL_DMA_DisableIT_TransferHalfComplete + * @param DMAx DMA instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_DMA_CHANNEL_0 + * @arg @ref FL_DMA_CHANNEL_1 + * @arg @ref FL_DMA_CHANNEL_2 + * @arg @ref FL_DMA_CHANNEL_3 + * @arg @ref FL_DMA_CHANNEL_4 + * @arg @ref FL_DMA_CHANNEL_5 + * @arg @ref FL_DMA_CHANNEL_6 + * @arg @ref FL_DMA_CHANNEL_7 + * @retval None + */ +__STATIC_INLINE void FL_DMA_DisableIT_TransferHalfComplete(DMA_Type *DMAx, uint32_t channel) +{ + DMA_ADDR *Temp = (DMA_ADDR *)DMAx; + if(channel <= FL_DMA_CHANNEL_6) + { + CLEAR_BIT(Temp->Channel[channel].CHCR, DMA_CHCR_HTIE_Msk); + } + else + { + CLEAR_BIT(Temp->CH7CR, DMA_CHCR_HTIE_Msk); + } +} + +/** + * @brief Channelx enable + * @rmtoll CHCR EN FL_DMA_EnableChannel + * @param DMAx DMA instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_DMA_CHANNEL_0 + * @arg @ref FL_DMA_CHANNEL_1 + * @arg @ref FL_DMA_CHANNEL_2 + * @arg @ref FL_DMA_CHANNEL_3 + * @arg @ref FL_DMA_CHANNEL_4 + * @arg @ref FL_DMA_CHANNEL_5 + * @arg @ref FL_DMA_CHANNEL_6 + * @arg @ref FL_DMA_CHANNEL_7 + * @retval None + */ +__STATIC_INLINE void FL_DMA_EnableChannel(DMA_Type *DMAx, uint32_t channel) +{ + DMA_ADDR *Temp = (DMA_ADDR *)DMAx; + if(channel <= FL_DMA_CHANNEL_6) + { + SET_BIT(Temp->Channel[channel].CHCR, DMA_CHCR_EN_Msk); + } + else + { + SET_BIT(Temp->CH7CR, DMA_CHCR_EN_Msk); + } +} + +/** + * @brief Get channelx enable status + * @rmtoll CHCR EN FL_DMA_IsEnabledChannel + * @param DMAx DMA instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_DMA_CHANNEL_0 + * @arg @ref FL_DMA_CHANNEL_1 + * @arg @ref FL_DMA_CHANNEL_2 + * @arg @ref FL_DMA_CHANNEL_3 + * @arg @ref FL_DMA_CHANNEL_4 + * @arg @ref FL_DMA_CHANNEL_5 + * @arg @ref FL_DMA_CHANNEL_6 + * @arg @ref FL_DMA_CHANNEL_7 + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_DMA_IsEnabledChannel(DMA_Type *DMAx, uint32_t channel) +{ + DMA_ADDR *Temp = (DMA_ADDR *)DMAx; + if(channel <= FL_DMA_CHANNEL_6) + { + return (uint32_t)(READ_BIT(Temp->Channel[channel].CHCR, DMA_CHCR_EN_Msk) == DMA_CHCR_EN_Msk); + } + else + { + return (uint32_t)(READ_BIT(Temp->CH7CR, DMA_CHCR_CIRC_Msk) == DMA_CHCR_EN_Msk); + } +} + +/** + * @brief Channelx disable + * @rmtoll CHCR EN FL_DMA_DisableChannel + * @param DMAx DMA instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_DMA_CHANNEL_0 + * @arg @ref FL_DMA_CHANNEL_1 + * @arg @ref FL_DMA_CHANNEL_2 + * @arg @ref FL_DMA_CHANNEL_3 + * @arg @ref FL_DMA_CHANNEL_4 + * @arg @ref FL_DMA_CHANNEL_5 + * @arg @ref FL_DMA_CHANNEL_6 + * @arg @ref FL_DMA_CHANNEL_7 + * @retval None + */ +__STATIC_INLINE void FL_DMA_DisableChannel(DMA_Type *DMAx, uint32_t channel) +{ + DMA_ADDR *Temp = (DMA_ADDR *)DMAx; + if(channel <= FL_DMA_CHANNEL_6) + { + CLEAR_BIT(Temp->Channel[channel].CHCR, DMA_CHCR_EN_Msk); + } + else + { + CLEAR_BIT(Temp->CH7CR, DMA_CHCR_EN_Msk); + } +} + +/** + * @brief Set channelx memory pointer address + * @rmtoll MEMAD FL_DMA_WriteMemoryAddress + * @param DMAx DMA instance + * @param data + * @param channel This parameter can be one of the following values: + * @arg @ref FL_DMA_CHANNEL_0 + * @arg @ref FL_DMA_CHANNEL_1 + * @arg @ref FL_DMA_CHANNEL_2 + * @arg @ref FL_DMA_CHANNEL_3 + * @arg @ref FL_DMA_CHANNEL_4 + * @arg @ref FL_DMA_CHANNEL_5 + * @arg @ref FL_DMA_CHANNEL_6 + * @arg @ref FL_DMA_CHANNEL_7 + * @retval None + */ +__STATIC_INLINE void FL_DMA_WriteMemoryAddress(DMA_Type *DMAx, uint32_t data, uint32_t channel) +{ + DMA_ADDR *Temp = (DMA_ADDR *)DMAx; + if(channel <= FL_DMA_CHANNEL_6) + { + MODIFY_REG(Temp->Channel[channel].CHMAD, (0xffffffffU), (data)); + } + else + { + MODIFY_REG(Temp->CH7MAD, (0xfffU), (data)); + } +} + +/** + * @brief Get channelx memory pointer address + * @rmtoll MEMAD FL_DMA_ReadMemoryAddress + * @param DMAx DMA instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_DMA_CHANNEL_0 + * @arg @ref FL_DMA_CHANNEL_1 + * @arg @ref FL_DMA_CHANNEL_2 + * @arg @ref FL_DMA_CHANNEL_3 + * @arg @ref FL_DMA_CHANNEL_4 + * @arg @ref FL_DMA_CHANNEL_5 + * @arg @ref FL_DMA_CHANNEL_6 + * @arg @ref FL_DMA_CHANNEL_7 + * @retval + */ +__STATIC_INLINE uint32_t FL_DMA_ReadMemoryAddress(DMA_Type *DMAx, uint32_t channel) +{ + DMA_ADDR *Temp = (DMA_ADDR *)DMAx; + if(channel <= FL_DMA_CHANNEL_6) + { + return (uint32_t)(READ_BIT(Temp->Channel[channel].CHMAD, (0xffffffffU))); + } + else + { + return (uint32_t)(READ_BIT(Temp->CH7MAD, (0xfffU))); + } +} + +/** + * @brief Set channel7 flash pointer address + * @rmtoll CH7FLSAD FL_DMA_WriteFlashAddress + * @param DMAx DMA instance + * @param data + * @retval None + */ +__STATIC_INLINE void FL_DMA_WriteFlashAddress(DMA_Type *DMAx, uint32_t data) +{ + MODIFY_REG(DMAx->CH7FLSAD, (0x7fffU << 0U), (data << 0U)); +} + +/** + * @brief Get channel7 flash pointer address + * @rmtoll CH7FLSAD FL_DMA_ReadFlashAddress + * @param DMAx DMA instance + * @retval + */ +__STATIC_INLINE uint32_t FL_DMA_ReadFlashAddress(DMA_Type *DMAx) +{ + return (uint32_t)(READ_BIT(DMAx->CH7FLSAD, (0x7fffU << 0U)) >> 0U); +} + +/** + * @brief Get DMA address error flag + * @rmtoll ISR ADDRERR FL_DMA_IsActiveFlag_AddressError + * @param DMAx DMA instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_DMA_IsActiveFlag_AddressError(DMA_Type *DMAx) +{ + return (uint32_t)(READ_BIT(DMAx->ISR, DMA_ISR_ADDRERR_Msk) == (DMA_ISR_ADDRERR_Msk)); +} + +/** + * @brief Clear DMA address error flag + * @rmtoll ISR ADDRERR FL_DMA_ClearFlag_AddressError + * @param DMAx DMA instance + * @retval None + */ +__STATIC_INLINE void FL_DMA_ClearFlag_AddressError(DMA_Type *DMAx) +{ + WRITE_REG(DMAx->ISR, DMA_ISR_ADDRERR_Msk); +} + +/** + * @brief Get DMA channelx finished-transfer flag + * @rmtoll ISR CHFT FL_DMA_IsActiveFlag_TransferComplete + * @param DMAx DMA instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_DMA_CHANNEL_0 + * @arg @ref FL_DMA_CHANNEL_1 + * @arg @ref FL_DMA_CHANNEL_2 + * @arg @ref FL_DMA_CHANNEL_3 + * @arg @ref FL_DMA_CHANNEL_4 + * @arg @ref FL_DMA_CHANNEL_5 + * @arg @ref FL_DMA_CHANNEL_6 + * @arg @ref FL_DMA_CHANNEL_7 + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_DMA_IsActiveFlag_TransferComplete(DMA_Type *DMAx, uint32_t channel) +{ + return (uint32_t)(uint32_t)(READ_BIT(DMAx->ISR, (DMA_ISR_CHFT_Msk << channel)) + == (DMA_ISR_CHFT_Msk << channel)); +} + +/** + * @brief Clear DMA channelx finished-transfer flag + * @rmtoll ISR CHFT FL_DMA_ClearFlag_TransferComplete + * @param DMAx DMA instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_DMA_CHANNEL_0 + * @arg @ref FL_DMA_CHANNEL_1 + * @arg @ref FL_DMA_CHANNEL_2 + * @arg @ref FL_DMA_CHANNEL_3 + * @arg @ref FL_DMA_CHANNEL_4 + * @arg @ref FL_DMA_CHANNEL_5 + * @arg @ref FL_DMA_CHANNEL_6 + * @arg @ref FL_DMA_CHANNEL_7 + * @retval None + */ +__STATIC_INLINE void FL_DMA_ClearFlag_TransferComplete(DMA_Type *DMAx, uint32_t channel) +{ + WRITE_REG(DMAx->ISR, (DMA_ISR_CHFT_Msk << channel)); +} + +/** + * @brief Get DMA channel half-transfer flag + * @rmtoll ISR CHHT FL_DMA_IsActiveFlag_TransferHalfComplete + * @param DMAx DMA instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_DMA_CHANNEL_0 + * @arg @ref FL_DMA_CHANNEL_1 + * @arg @ref FL_DMA_CHANNEL_2 + * @arg @ref FL_DMA_CHANNEL_3 + * @arg @ref FL_DMA_CHANNEL_4 + * @arg @ref FL_DMA_CHANNEL_5 + * @arg @ref FL_DMA_CHANNEL_6 + * @arg @ref FL_DMA_CHANNEL_7 + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_DMA_IsActiveFlag_TransferHalfComplete(DMA_Type *DMAx, uint32_t channel) +{ + return (uint32_t)(uint32_t)(READ_BIT(DMAx->ISR, (DMA_ISR_CHHT_Msk << channel)) + == (DMA_ISR_CHHT_Msk << channel)); +} + +/** + * @brief Clear DMA channel half-transfer flag + * @rmtoll ISR CHHT FL_DMA_ClearFlag_TransferHalfComplete + * @param DMAx DMA instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_DMA_CHANNEL_0 + * @arg @ref FL_DMA_CHANNEL_1 + * @arg @ref FL_DMA_CHANNEL_2 + * @arg @ref FL_DMA_CHANNEL_3 + * @arg @ref FL_DMA_CHANNEL_4 + * @arg @ref FL_DMA_CHANNEL_5 + * @arg @ref FL_DMA_CHANNEL_6 + * @arg @ref FL_DMA_CHANNEL_7 + * @retval None + */ +__STATIC_INLINE void FL_DMA_ClearFlag_TransferHalfComplete(DMA_Type *DMAx, uint32_t channel) +{ + WRITE_REG(DMAx->ISR, (DMA_ISR_CHHT_Msk << channel)); +} + +/** + * @} + */ + +/** @defgroup DMA_FL_EF_Init Initialization and de-initialization functions + * @{ + */ +FL_ErrorStatus FL_DMA_DeInit(DMA_Type *DMAx); +FL_ErrorStatus FL_DMA_Init(DMA_Type *DMAx, FL_DMA_InitTypeDef *initStruct, uint32_t channel); +void FL_DMA_StructInit(FL_DMA_InitTypeDef *InitStruct); + +FL_ErrorStatus FL_DMA_StartTransmission(DMA_Type *DMAx, FL_DMA_ConfigTypeDef *configStruct, uint32_t channel); + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif /* __FM33LG0XX_FL_DMA_H*/ + +/*************************Py_Code_Generator Version: 0.1-0.14-0.1 @ 2020-10-20*************************/ +/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/ diff --git a/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_exti.h b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_exti.h new file mode 100644 index 0000000..d89055c --- /dev/null +++ b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_exti.h @@ -0,0 +1,157 @@ + /** + ******************************************************************************************************* + * @file fm33lg0xx_fl_exti.h + * @author FMSH Application Team + * @brief Head file of EXTI FL Module + ******************************************************************************************************* + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + + + +/* Define to prevent recursive inclusion---------------------------------------------------------------*/ +#ifndef __FM33LG0XX_FL_EXTI_H +#define __FM33LG0XX_FL_EXTI_H + +#ifdef __cplusplus +extern "C" { +#endif +/* Includes -------------------------------------------------------------------------------------------*/ +#include "fm33lg0xx_fl_def.h" +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @defgroup EXTI EXTI + * @brief EXTI FL driver + * @{ + */ + +/* Exported types -------------------------------------------------------------------------------------*/ +/** @defgroup EXTI_FL_ES_INIT EXTI Exported Init structures + * @{ + */ + +/** + * @brief FL EXTI Common Init Sturcture definition + */ +typedef struct +{ + /*! EXTI时钟源配置 */ + uint32_t clockSource; + +} FL_EXTI_CommonInitTypeDef; + +/** + * @brief FL EXTI Init Sturcture definition + */ +typedef struct +{ + /*! EXTI输入配置 */ + uint32_t input; + + /*! EXTI触发边沿配置 */ + uint32_t triggerEdge; + + /*! EXTI数字滤波配置 */ + uint32_t filter; + +} FL_EXTI_InitTypeDef; + +/** + * @} + */ +/* Exported constants ---------------------------------------------------------------------------------*/ +/** @defgroup EXTI_FL_Exported_Constants EXTI Exported Constants + * @{ + */ + + + +#define FL_GPIO_EXTI_INPUT_GROUP0 (0x0U << 0U) +#define FL_GPIO_EXTI_INPUT_GROUP1 (0x1U << 0U) +#define FL_GPIO_EXTI_INPUT_GROUP2 (0x2U << 0U) +#define FL_GPIO_EXTI_INPUT_GROUP3 (0x3U << 0U) + + + +/** + * @} + */ +/* Exported functions ---------------------------------------------------------------------------------*/ +/** @defgroup EXTI_FL_Exported_Functions EXTI Exported Functions + * @{ + */ + +/** + * @} + */ + +/** @defgroup EXTI_FL_EF_Init Initialization and de-initialization functions + * @{ + */ + +FL_ErrorStatus FL_EXTI_CommonInit(FL_EXTI_CommonInitTypeDef *init); +FL_ErrorStatus FL_EXTI_CommonDeinit(void); +void FL_EXTI_CommonStructInit(FL_EXTI_CommonInitTypeDef *init); + +FL_ErrorStatus FL_EXTI_Init(uint32_t extiLineX, FL_EXTI_InitTypeDef *init); +FL_ErrorStatus FL_EXTI_DeInit(uint32_t extiLineX); +void FL_EXTI_StructInit(FL_EXTI_InitTypeDef *init); + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif /* __FM33LG0XX_FL_EXTI_H*/ + +/*************************Py_Code_Generator Version: 0.1-0.14-0.2 @ 2021-03-16*************************/ +/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/ diff --git a/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_flash.h b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_flash.h new file mode 100644 index 0000000..d6d1e67 --- /dev/null +++ b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_flash.h @@ -0,0 +1,1045 @@ + /** + ******************************************************************************************************* + * @file fm33lg0xx_fl_flash.h + * @author FMSH Application Team + * @brief Head file of FLASH FL Module + ******************************************************************************************************* + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + + + +/* Define to prevent recursive inclusion---------------------------------------------------------------*/ +#ifndef __FM33LG0XX_FL_FLASH_H +#define __FM33LG0XX_FL_FLASH_H + +#ifdef __cplusplus +extern "C" { +#endif +/* Includes -------------------------------------------------------------------------------------------*/ +#include "fm33lg0xx_fl_def.h" +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @defgroup FLASH FLASH + * @brief FLASH FL driver + * @{ + */ + +/* Exported types -------------------------------------------------------------------------------------*/ +/** @defgroup FLASH_FL_ES_INIT FLASH Exported Init structures + * @{ + */ + +/** + * @brief FL FLASH Init Sturcture definition + */ + +/** + * @} + */ +/* Exported constants ---------------------------------------------------------------------------------*/ +/** @defgroup FLASH_FL_Exported_Constants FLASH Exported Constants + * @{ + */ + +#define FLASH_RDCR_WAIT_Pos (0U) +#define FLASH_RDCR_WAIT_Msk (0x3U << FLASH_RDCR_WAIT_Pos) +#define FLASH_RDCR_WAIT FLASH_RDCR_WAIT_Msk + +#define FLASH_PFCR_PFTBUF_Pos (1U) +#define FLASH_PFCR_PFTBUF_Msk (0x1U << FLASH_PFCR_PFTBUF_Pos) +#define FLASH_PFCR_PFTBUF FLASH_PFCR_PFTBUF_Msk + +#define FLASH_PFCR_PRFTEN_Pos (0U) +#define FLASH_PFCR_PRFTEN_Msk (0x1U << FLASH_PFCR_PRFTEN_Pos) +#define FLASH_PFCR_PRFTEN FLASH_PFCR_PRFTEN_Msk + +#define FLASH_OPTBR_IWDTSLP_Pos (31U) +#define FLASH_OPTBR_IWDTSLP_Msk (0x1U << FLASH_OPTBR_IWDTSLP_Pos) +#define FLASH_OPTBR_IWDTSLP FLASH_OPTBR_IWDTSLP_Msk + +#define FLASH_OPTBR_IFLOCK_Pos (17U) +#define FLASH_OPTBR_IFLOCK_Msk (0x3U << FLASH_OPTBR_IFLOCK_Pos) +#define FLASH_OPTBR_IFLOCK FLASH_OPTBR_IFLOCK_Msk + +#define FLASH_OPTBR_DFLSEN_Pos (10U) +#define FLASH_OPTBR_DFLSEN_Msk (0x1U << FLASH_OPTBR_DFLSEN_Pos) +#define FLASH_OPTBR_DFLSEN FLASH_OPTBR_DFLSEN_Msk + +#define FLASH_OPTBR_BTSEN_Pos (8U) +#define FLASH_OPTBR_BTSEN_Msk (0x3U << FLASH_OPTBR_BTSEN_Pos) +#define FLASH_OPTBR_BTSEN FLASH_OPTBR_BTSEN_Msk + +#define FLASH_OPTBR_ACLOCKEN_Pos (2U) +#define FLASH_OPTBR_ACLOCKEN_Msk (0x3U << FLASH_OPTBR_ACLOCKEN_Pos) +#define FLASH_OPTBR_ACLOCKEN FLASH_OPTBR_ACLOCKEN_Msk + +#define FLASH_OPTBR_DBRDPEN_Pos (0U) +#define FLASH_OPTBR_DBRDPEN_Msk (0x3U << FLASH_OPTBR_DBRDPEN_Pos) +#define FLASH_OPTBR_DBRDPEN FLASH_OPTBR_DBRDPEN_Msk + +#define FLASH_EPCR_ERTYPE_Pos (8U) +#define FLASH_EPCR_ERTYPE_Msk (0x3U << FLASH_EPCR_ERTYPE_Pos) +#define FLASH_EPCR_ERTYPE FLASH_EPCR_ERTYPE_Msk + +#define FLASH_EPCR_PREQ_Pos (1U) +#define FLASH_EPCR_PREQ_Msk (0x1U << FLASH_EPCR_PREQ_Pos) +#define FLASH_EPCR_PREQ FLASH_EPCR_PREQ_Msk + +#define FLASH_EPCR_EREQ_Pos (0U) +#define FLASH_EPCR_EREQ_Msk (0x1U << FLASH_EPCR_EREQ_Pos) +#define FLASH_EPCR_EREQ FLASH_EPCR_EREQ_Msk + +#define FLASH_IER_OPTIE_Pos (11U) +#define FLASH_IER_OPTIE_Msk (0x1U << FLASH_IER_OPTIE_Pos) +#define FLASH_IER_OPTIE FLASH_IER_OPTIE_Msk + +#define FLASH_IER_AUTHIE_Pos (10U) +#define FLASH_IER_AUTHIE_Msk (0x1U << FLASH_IER_AUTHIE_Pos) +#define FLASH_IER_AUTHIE FLASH_IER_AUTHIE_Msk + +#define FLASH_IER_KEYIE_Pos (9U) +#define FLASH_IER_KEYIE_Msk (0x1U << FLASH_IER_KEYIE_Pos) +#define FLASH_IER_KEYIE FLASH_IER_KEYIE_Msk + +#define FLASH_IER_CKIE_Pos (8U) +#define FLASH_IER_CKIE_Msk (0x1U << FLASH_IER_CKIE_Pos) +#define FLASH_IER_CKIE FLASH_IER_CKIE_Msk + +#define FLASH_IER_PRDIE_Pos (1U) +#define FLASH_IER_PRDIE_Msk (0x1U << FLASH_IER_PRDIE_Pos) +#define FLASH_IER_PRDIE FLASH_IER_PRDIE_Msk + +#define FLASH_IER_ERDIE_Pos (0U) +#define FLASH_IER_ERDIE_Msk (0x1U << FLASH_IER_ERDIE_Pos) +#define FLASH_IER_ERDIE FLASH_IER_ERDIE_Msk + +#define FLASH_ISR_KEYSTA_Pos (17U) +#define FLASH_ISR_KEYSTA_Msk (0x7U << FLASH_ISR_KEYSTA_Pos) +#define FLASH_ISR_KEYSTA FLASH_ISR_KEYSTA_Msk + +#define FLASH_ISR_BTSF_Pos (16U) +#define FLASH_ISR_BTSF_Msk (0x1U << FLASH_ISR_BTSF_Pos) +#define FLASH_ISR_BTSF FLASH_ISR_BTSF_Msk + +#define FLASH_ISR_OPTERR_Pos (11U) +#define FLASH_ISR_OPTERR_Msk (0x1U << FLASH_ISR_OPTERR_Pos) +#define FLASH_ISR_OPTERR FLASH_ISR_OPTERR_Msk + +#define FLASH_ISR_AUTHERR_Pos (10U) +#define FLASH_ISR_AUTHERR_Msk (0x1U << FLASH_ISR_AUTHERR_Pos) +#define FLASH_ISR_AUTHERR FLASH_ISR_AUTHERR_Msk + +#define FLASH_ISR_KEYERR_Pos (9U) +#define FLASH_ISR_KEYERR_Msk (0x1U << FLASH_ISR_KEYERR_Pos) +#define FLASH_ISR_KEYERR FLASH_ISR_KEYERR_Msk + +#define FLASH_ISR_CKERR_Pos (8U) +#define FLASH_ISR_CKERR_Msk (0x1U << FLASH_ISR_CKERR_Pos) +#define FLASH_ISR_CKERR FLASH_ISR_CKERR_Msk + +#define FLASH_ISR_PRD_Pos (1U) +#define FLASH_ISR_PRD_Msk (0x1U << FLASH_ISR_PRD_Pos) +#define FLASH_ISR_PRD FLASH_ISR_PRD_Msk + +#define FLASH_ISR_ERD_Pos (0U) +#define FLASH_ISR_ERD_Msk (0x1U << FLASH_ISR_ERD_Pos) +#define FLASH_ISR_ERD FLASH_ISR_ERD_Msk + + +#define FL_FLASH_ERASE_KEY (0x96969696U) +#define FL_FLASH_CHIP_ERASE_KEY (0x7D7D7D7DU) +#define FL_FLASH_PGAE_ERASE_KEY (0xEAEAEAEAU) +#define FL_FLASH_SECTOR_ERASE_KEY (0x3C3C3C3CU) +#define FL_FLASH_ERASE_REQUEST (0x1234ABCDU) +#define FL_FLASH_PROGRAM_KEY1 (0xA5A5A5A5U) +#define FL_FLASH_PROGRAM_KEY2 (0xF1F1F1F1U) +/*8M*/ +#define FL_FLASH_ERASE_TIMEOUT (0x0000FFFFU) +#define FL_FLASH_ADDRS_ALIGN (0x00000004U) + +#define FL_FLASH_MAX_PAGE_NUM (0x00000200U) +#define FL_FLASH_MAX_SECTOR_NUM (0x00000080U) +#define FL_FLASH_SECTOR_SIZE_BYTE (0x00000800U) +#define FL_FLASH_PGAE_SIZE_BYTE (0x00000200U) +#define FL_FLASH_ADDR_MAXPROGRAM (0x0003FFFFU) + + +#define FL_FLASH_INFORMATION1_REGIN (0x1U << 17U) +#define FL_FLASH_INFORMATION2_REGIN (0x1U << 18U) +#define FL_FLASH_BLOCK_0 (0x1U << 0U) +#define FL_FLASH_BLOCK_1 (0x1U << 1U) +#define FL_FLASH_BLOCK_2 (0x1U << 2U) +#define FL_FLASH_BLOCK_3 (0x1U << 3U) +#define FL_FLASH_BLOCK_4 (0x1U << 4U) +#define FL_FLASH_BLOCK_5 (0x1U << 5U) +#define FL_FLASH_BLOCK_6 (0x1U << 6U) +#define FL_FLASH_BLOCK_7 (0x1U << 7U) +#define FL_FLASH_BLOCK_8 (0x1U << 8U) +#define FL_FLASH_BLOCK_9 (0x1U << 9U) +#define FL_FLASH_BLOCK_10 (0x1U << 10U) +#define FL_FLASH_BLOCK_11 (0x1U << 11U) +#define FL_FLASH_BLOCK_12 (0x1U << 12U) +#define FL_FLASH_BLOCK_13 (0x1U << 13U) +#define FL_FLASH_BLOCK_14 (0x1U << 14U) +#define FL_FLASH_BLOCK_15 (0x1U << 15U) +#define FL_FLASH_LOCK_ALL (0x0U << 0U) +#define FL_FLASH_LOCK_SOFTWARE (0x2U << 0U) +#define FL_FLASH_LOCK_NONE (0x3U << 0U) +#define FL_FLASH_BOOTSWAP_ENABLE (0x2U << 8U) +#define FL_FLASH_BOOTSWAP_DISABLE (0x0U << 8U) +#define FL_FLASH_APPCODE_LOCK_ENABLE (0x2U << 2U) +#define FL_FLASH_APPCODE_LOCK_DISABLE (0x0U << 2U) +#define FL_FLASH_DEBUG_READ_ENABLE (0x2U << 0U) +#define FL_FLASH_DEBUG_READ_DISABLE (0x0U << 0U) + + + +#define FL_FLASH_READ_WAIT_0CYCLE (0x0U << FLASH_RDCR_WAIT_Pos) +#define FL_FLASH_READ_WAIT_1CYCLE (0x1U << FLASH_RDCR_WAIT_Pos) +#define FL_FLASH_READ_WAIT_2CYCLE (0x2U << FLASH_RDCR_WAIT_Pos) + + +#define FL_FLASH_IWDT_STOP_UNDER_SLEEP (0x0U << FLASH_OPTBR_IWDTSLP_Pos) +#define FL_FLASH_IWDT_WORK_UNDER_SLEEP (0x1U << FLASH_OPTBR_IWDTSLP_Pos) + +#define FL_FLASH_IF_UNLOCK (0x0U << FLASH_OPTBR_IFLOCK_Pos) +#define FL_FLASH_IF_LOCK (0x1U << FLASH_OPTBR_IFLOCK_Pos) + +#define FL_FLASH_DATA_FLASH_DISABLE (0x0U << FLASH_OPTBR_DFLSEN_Pos) +#define FL_FLASH_DATA_FLASH_ENABLE (0x1U << FLASH_OPTBR_DFLSEN_Pos) + +#define FL_FLASH_BOOT_SWAP_DISABLE (0x0U << FLASH_OPTBR_BTSEN_Pos) +#define FL_FLASH_BOOT_SWAP_ENABLE (0x1U << FLASH_OPTBR_BTSEN_Pos) + +#define FL_FLASH_FLASH_LOCK_DISABLE (0x0U << FLASH_OPTBR_ACLOCKEN_Pos) +#define FL_FLASH_FLASH_LOCK_ENABLE (0x1U << FLASH_OPTBR_ACLOCKEN_Pos) + +#define FL_FLASH_SWD_READ_PEOTECTION_DISABLE (0x0U << FLASH_OPTBR_DBRDPEN_Pos) +#define FL_FLASH_SWD_READ_PEOTECTION_ENABLE (0x1U << FLASH_OPTBR_DBRDPEN_Pos) + +#define FL_FLASH_ERASE_TYPE_PAGE (0x0U << FLASH_EPCR_ERTYPE_Pos) +#define FL_FLASH_ERASE_TYPE_SECTOR (0x1U << FLASH_EPCR_ERTYPE_Pos) + + +#define FL_FLASH_KEY_STATUS_LOCK (0x0U << FLASH_ISR_KEYSTA_Pos) +#define FL_FLASH_KEY_STATUS_PAGE_ERASE (0x2U << FLASH_ISR_KEYSTA_Pos) +#define FL_FLASH_KEY_STATUS_PROGRAM (0x3U << FLASH_ISR_KEYSTA_Pos) +#define FL_FLASH_KEY_STATUS_ERROR (0x4U << FLASH_ISR_KEYSTA_Pos) +#define FL_FLASH_KEY_STATUS_SECTOR_ERASE (0x5U << FLASH_ISR_KEYSTA_Pos) + +#define FL_FLASH_BOOT_SECTOR_0000H_1FFFH (0x0U << FLASH_ISR_BTSF_Pos) +#define FL_FLASH_BOOT_SECTOR_2000H_3FFFH (0x1U << FLASH_ISR_BTSF_Pos) + +/** + * @} + */ +/* Exported functions ---------------------------------------------------------------------------------*/ +/** @defgroup FLASH_FL_Exported_Functions FLASH Exported Functions + * @{ + */ + +/** + * @brief Flash wait cycles config + * @rmtoll RDCR WAIT FL_FLASH_SetReadWait + * @param FLASHx FLASH instance + * @param wait This parameter can be one of the following values: + * @arg @ref FL_FLASH_READ_WAIT_0CYCLE + * @arg @ref FL_FLASH_READ_WAIT_1CYCLE + * @arg @ref FL_FLASH_READ_WAIT_2CYCLE + * @retval None + */ +__STATIC_INLINE void FL_FLASH_SetReadWait(FLASH_Type *FLASHx, uint32_t wait) +{ + MODIFY_REG(FLASHx->RDCR, FLASH_RDCR_WAIT_Msk, wait); +} + +/** + * @brief Get flash wait cycles config status + * @rmtoll RDCR WAIT FL_FLASH_GetReadWait + * @param FLASHx FLASH instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_FLASH_READ_WAIT_0CYCLE + * @arg @ref FL_FLASH_READ_WAIT_1CYCLE + * @arg @ref FL_FLASH_READ_WAIT_2CYCLE + */ +__STATIC_INLINE uint32_t FL_FLASH_GetReadWait(FLASH_Type *FLASHx) +{ + return (uint32_t)(READ_BIT(FLASHx->RDCR, FLASH_RDCR_WAIT_Msk)); +} + +/** + * @brief Prefetch buffer Enable + * @rmtoll PFCR PFTBUF FL_FLASH_EnablePrefetchBuffer + * @param FLASHx FLASH instance + * @retval None + */ +__STATIC_INLINE void FL_FLASH_EnablePrefetchBuffer(FLASH_Type *FLASHx) +{ + SET_BIT(FLASHx->PFCR, FLASH_PFCR_PFTBUF_Msk); +} + +/** + * @brief Get prefetch buffer enable status + * @rmtoll PFCR PFTBUF FL_FLASH_IsEnabledPrefetchBuffer + * @param FLASHx FLASH instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_FLASH_IsEnabledPrefetchBuffer(FLASH_Type *FLASHx) +{ + return (uint32_t)(READ_BIT(FLASHx->PFCR, FLASH_PFCR_PFTBUF_Msk) == FLASH_PFCR_PFTBUF_Msk); +} + +/** + * @brief Prefetch buffer disable + * @rmtoll PFCR PFTBUF FL_FLASH_DisablePrefetchBuffer + * @param FLASHx FLASH instance + * @retval None + */ +__STATIC_INLINE void FL_FLASH_DisablePrefetchBuffer(FLASH_Type *FLASHx) +{ + CLEAR_BIT(FLASHx->PFCR, FLASH_PFCR_PFTBUF_Msk); +} + +/** + * @brief Prefetch Enable + * @rmtoll PFCR PRFTEN FL_FLASH_EnablePrefetch + * @param FLASHx FLASH instance + * @retval None + */ +__STATIC_INLINE void FL_FLASH_EnablePrefetch(FLASH_Type *FLASHx) +{ + SET_BIT(FLASHx->PFCR, FLASH_PFCR_PRFTEN_Msk); +} + +/** + * @brief Get prefetch enable status + * @rmtoll PFCR PRFTEN FL_FLASH_IsEnabledPrefetch + * @param FLASHx FLASH instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_FLASH_IsEnabledPrefetch(FLASH_Type *FLASHx) +{ + return (uint32_t)(READ_BIT(FLASHx->PFCR, FLASH_PFCR_PRFTEN_Msk) == FLASH_PFCR_PRFTEN_Msk); +} + +/** + * @brief Prefetch disable + * @rmtoll PFCR PRFTEN FL_FLASH_DisablePrefetch + * @param FLASHx FLASH instance + * @retval None + */ +__STATIC_INLINE void FL_FLASH_DisablePrefetch(FLASH_Type *FLASHx) +{ + CLEAR_BIT(FLASHx->PFCR, FLASH_PFCR_PRFTEN_Msk); +} + +/** + * @brief Get IWDT sleep enable status + * @rmtoll OPTBR IWDTSLP FL_FLASH_GetIWDTStateUnderSleep + * @param FLASHx FLASH instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_FLASH_IWDT_STOP_UNDER_SLEEP + * @arg @ref FL_FLASH_IWDT_WORK_UNDER_SLEEP + */ +__STATIC_INLINE uint32_t FL_FLASH_GetIWDTStateUnderSleep(FLASH_Type *FLASHx) +{ + return (uint32_t)(READ_BIT(FLASHx->OPTBR, FLASH_OPTBR_IWDTSLP_Msk)); +} + +/** + * @brief Get information2 lock enable flag + * @rmtoll OPTBR IFLOCK FL_FLASH_IsActiveFlag_IFLockedState + * @param FLASHx FLASH instance + * @param region This parameter can be one of the following values: + * @arg @ref FL_FLASH_INFORMATION1_REGIN + * @arg @ref FL_FLASH_INFORMATION2_REGIN + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_FLASH_IsActiveFlag_IFLockedState(FLASH_Type *FLASHx, uint32_t region) +{ + return (uint32_t)(READ_BIT(FLASHx->OPTBR, FLASH_OPTBR_IFLOCK_Msk) == (region)); +} + +/** + * @brief Get dataflash enable status + * @rmtoll OPTBR DFLSEN FL_FLASH_GetDataFlashState + * @param FLASHx FLASH instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_FLASH_DATA_FLASH_DISABLE + * @arg @ref FL_FLASH_DATA_FLASH_ENABLE + */ +__STATIC_INLINE uint32_t FL_FLASH_GetDataFlashState(FLASH_Type *FLASHx) +{ + return (uint32_t)(READ_BIT(FLASHx->OPTBR, FLASH_OPTBR_DFLSEN_Msk)); +} + +/** + * @brief Get BootSwap enable status + * @rmtoll OPTBR BTSEN FL_FLASH_GetBootSwapState + * @param FLASHx FLASH instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_FLASH_BOOT_SWAP_DISABLE + * @arg @ref FL_FLASH_BOOT_SWAP_ENABLE + */ +__STATIC_INLINE uint32_t FL_FLASH_GetBootSwapState(FLASH_Type *FLASHx) +{ + return (uint32_t)(READ_BIT(FLASHx->OPTBR, FLASH_OPTBR_BTSEN_Msk)); +} + +/** + * @brief Get AppCode lock enable + * @rmtoll OPTBR ACLOCKEN FL_FLASH_GetFlashLockState + * @param FLASHx FLASH instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_FLASH_FLASH_LOCK_DISABLE + * @arg @ref FL_FLASH_FLASH_LOCK_ENABLE + */ +__STATIC_INLINE uint32_t FL_FLASH_GetFlashLockState(FLASH_Type *FLASHx) +{ + return (uint32_t)(READ_BIT(FLASHx->OPTBR, FLASH_OPTBR_ACLOCKEN_Msk)); +} + +/** + * @brief Get debug read protection enable status + * @rmtoll OPTBR DBRDPEN FL_FLASH_GetSWDReadProtectionState + * @param FLASHx FLASH instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_FLASH_SWD_READ_PEOTECTION_DISABLE + * @arg @ref FL_FLASH_SWD_READ_PEOTECTION_ENABLE + */ +__STATIC_INLINE uint32_t FL_FLASH_GetSWDReadProtectionState(FLASH_Type *FLASHx) +{ + return (uint32_t)(READ_BIT(FLASHx->OPTBR, FLASH_OPTBR_DBRDPEN_Msk)); +} + +/** + * @brief Set ACLOCK register low 32 bit + * @rmtoll ACLOCK1 FL_FLASH_SetFlashLowRegionLock + * @param FLASHx FLASH instance + * @param region This parameter can be one of the following values: + * @arg @ref FL_FLASH_BLOCK_0 + * @arg @ref FL_FLASH_BLOCK_1 + * @arg @ref FL_FLASH_BLOCK_2 + * @arg @ref FL_FLASH_BLOCK_3 + * @arg @ref FL_FLASH_BLOCK_4 + * @arg @ref FL_FLASH_BLOCK_5 + * @arg @ref FL_FLASH_BLOCK_6 + * @arg @ref FL_FLASH_BLOCK_7 + * @arg @ref FL_FLASH_BLOCK_8 + * @arg @ref FL_FLASH_BLOCK_9 + * @arg @ref FL_FLASH_BLOCK_10 + * @arg @ref FL_FLASH_BLOCK_11 + * @arg @ref FL_FLASH_BLOCK_12 + * @arg @ref FL_FLASH_BLOCK_13 + * @arg @ref FL_FLASH_BLOCK_14 + * @arg @ref FL_FLASH_BLOCK_15 + * @param mode This parameter can be one of the following values: + * @arg @ref FL_FLASH_LOCK_ALL + * @arg @ref FL_FLASH_LOCK_SOFTWARE + * @arg @ref FL_FLASH_LOCK_NONE + * @retval None + */ +__STATIC_INLINE void FL_FLASH_SetFlashLowRegionLock(FLASH_Type *FLASHx, uint32_t region, uint32_t mode) +{ + CLEAR_BIT(FLASHx->ACLOCK1, ((region * region) * (((mode == 3) ? 0 : (~mode)) & 0x03))); +} + +/** + * @brief Get ACLOCK register low 32 bit status + * @rmtoll ACLOCK1 FL_FLASH_GetFlashLowRegionLock + * @param FLASHx FLASH instance + * @param region This parameter can be one of the following values: + * @arg @ref FL_FLASH_BLOCK_0 + * @arg @ref FL_FLASH_BLOCK_1 + * @arg @ref FL_FLASH_BLOCK_2 + * @arg @ref FL_FLASH_BLOCK_3 + * @arg @ref FL_FLASH_BLOCK_4 + * @arg @ref FL_FLASH_BLOCK_5 + * @arg @ref FL_FLASH_BLOCK_6 + * @arg @ref FL_FLASH_BLOCK_7 + * @arg @ref FL_FLASH_BLOCK_8 + * @arg @ref FL_FLASH_BLOCK_9 + * @arg @ref FL_FLASH_BLOCK_10 + * @arg @ref FL_FLASH_BLOCK_11 + * @arg @ref FL_FLASH_BLOCK_12 + * @arg @ref FL_FLASH_BLOCK_13 + * @arg @ref FL_FLASH_BLOCK_14 + * @arg @ref FL_FLASH_BLOCK_15 + * @retval Returned value can be one of the following values: + */ +__STATIC_INLINE uint32_t FL_FLASH_GetFlashLowRegionLock(FLASH_Type *FLASHx, uint32_t region) +{ + return (uint32_t)(READ_BIT(FLASHx->ACLOCK1, ((region * region) * 0x03)) / (region * region)); +} + +/** + * @brief Set ACLOCK register high 32 bit + * @rmtoll ACLOCK2 FL_FLASH_SetFlashHighRegionLock + * @param FLASHx FLASH instance + * @param region This parameter can be one of the following values: + * @arg @ref FL_FLASH_BLOCK_0 + * @arg @ref FL_FLASH_BLOCK_1 + * @arg @ref FL_FLASH_BLOCK_2 + * @arg @ref FL_FLASH_BLOCK_3 + * @arg @ref FL_FLASH_BLOCK_4 + * @arg @ref FL_FLASH_BLOCK_5 + * @arg @ref FL_FLASH_BLOCK_6 + * @arg @ref FL_FLASH_BLOCK_7 + * @arg @ref FL_FLASH_BLOCK_8 + * @arg @ref FL_FLASH_BLOCK_9 + * @arg @ref FL_FLASH_BLOCK_10 + * @arg @ref FL_FLASH_BLOCK_11 + * @arg @ref FL_FLASH_BLOCK_12 + * @arg @ref FL_FLASH_BLOCK_13 + * @arg @ref FL_FLASH_BLOCK_14 + * @arg @ref FL_FLASH_BLOCK_15 + * @param mode This parameter can be one of the following values: + * @arg @ref FL_FLASH_LOCK_ALL + * @arg @ref FL_FLASH_LOCK_SOFTWARE + * @arg @ref FL_FLASH_LOCK_NONE + * @retval None + */ +__STATIC_INLINE void FL_FLASH_SetFlashHighRegionLock(FLASH_Type *FLASHx, uint32_t region, uint32_t mode) +{ + CLEAR_BIT(FLASHx->ACLOCK2, ((region * region) * (((mode == 3) ? 0 : (~mode)) & 0x03))); +} + +/** + * @brief Get ACLOCK register high 32 bit status + * @rmtoll ACLOCK2 FL_FLASH_GetFlashHighRegionLock + * @param FLASHx FLASH instance + * @param region This parameter can be one of the following values: + * @arg @ref FL_FLASH_BLOCK_0 + * @arg @ref FL_FLASH_BLOCK_1 + * @arg @ref FL_FLASH_BLOCK_2 + * @arg @ref FL_FLASH_BLOCK_3 + * @arg @ref FL_FLASH_BLOCK_4 + * @arg @ref FL_FLASH_BLOCK_5 + * @arg @ref FL_FLASH_BLOCK_6 + * @arg @ref FL_FLASH_BLOCK_7 + * @arg @ref FL_FLASH_BLOCK_8 + * @arg @ref FL_FLASH_BLOCK_9 + * @arg @ref FL_FLASH_BLOCK_10 + * @arg @ref FL_FLASH_BLOCK_11 + * @arg @ref FL_FLASH_BLOCK_12 + * @arg @ref FL_FLASH_BLOCK_13 + * @arg @ref FL_FLASH_BLOCK_14 + * @arg @ref FL_FLASH_BLOCK_15 + * @retval Returned value can be one of the following values: + */ +__STATIC_INLINE uint32_t FL_FLASH_GetFlashHighRegionLock(FLASH_Type *FLASHx, uint32_t region) +{ + return (uint32_t)(READ_BIT(FLASHx->ACLOCK2, ((region * region) * 0x03)) / (region * region)); +} + +/** + * @brief Set flash erase type + * @rmtoll EPCR ERTYPE FL_FLASH_SetFlashEraseType + * @param FLASHx FLASH instance + * @param type This parameter can be one of the following values: + * @arg @ref FL_FLASH_ERASE_TYPE_PAGE + * @arg @ref FL_FLASH_ERASE_TYPE_SECTOR + * @retval None + */ +__STATIC_INLINE void FL_FLASH_SetFlashEraseType(FLASH_Type *FLASHx, uint32_t type) +{ + MODIFY_REG(FLASHx->EPCR, FLASH_EPCR_ERTYPE_Msk, type); +} + +/** + * @brief Get flash erase type + * @rmtoll EPCR ERTYPE FL_FLASH_GetFlashEraseType + * @param FLASHx FLASH instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_FLASH_ERASE_TYPE_PAGE + * @arg @ref FL_FLASH_ERASE_TYPE_SECTOR + */ +__STATIC_INLINE uint32_t FL_FLASH_GetFlashEraseType(FLASH_Type *FLASHx) +{ + return (uint32_t)(READ_BIT(FLASHx->EPCR, FLASH_EPCR_ERTYPE_Msk)); +} + +/** + * @brief Program request enable + * @rmtoll EPCR PREQ FL_FLASH_EnableProgram + * @param FLASHx FLASH instance + * @retval None + */ +__STATIC_INLINE void FL_FLASH_EnableProgram(FLASH_Type *FLASHx) +{ + CLEAR_BIT(FLASHx->EPCR, FLASH_EPCR_EREQ_Msk); + SET_BIT(FLASHx->EPCR, FLASH_EPCR_PREQ_Msk); +} + +/** + * @brief Erase request enable + * @rmtoll EPCR EREQ FL_FLASH_EnableErase + * @param FLASHx FLASH instance + * @retval None + */ +__STATIC_INLINE void FL_FLASH_EnableErase(FLASH_Type *FLASHx) +{ + CLEAR_BIT(FLASHx->EPCR, FLASH_EPCR_PREQ_Msk); + SET_BIT(FLASHx->EPCR, FLASH_EPCR_EREQ_Msk); +} + +/** + * @brief Set flash key + * @rmtoll KEY FL_FLASH_UnlockFlash + * @param FLASHx FLASH instance + * @param key + * @retval None + */ +__STATIC_INLINE void FL_FLASH_UnlockFlash(FLASH_Type *FLASHx, uint32_t key) +{ + WRITE_REG(FLASHx->KEY, key); +} + +/** + * @brief Reset flash key + * @rmtoll KEY FL_FLASH_LockFlash + * @param FLASHx FLASH instance + * @retval None + */ +__STATIC_INLINE void FL_FLASH_LockFlash(FLASH_Type *FLASHx) +{ + WRITE_REG(FLASHx->KEY, 0xFFFFFFFF); +} + +/** + * @brief OTP program error interrupt enable + * @rmtoll IER OPTIE FL_FLASH_EnableIT_OTPProgramError + * @param FLASHx FLASH instance + * @retval None + */ +__STATIC_INLINE void FL_FLASH_EnableIT_OTPProgramError(FLASH_Type *FLASHx) +{ + SET_BIT(FLASHx->IER, FLASH_IER_OPTIE_Msk); +} + +/** + * @brief OTP program error interrupt disable + * @rmtoll IER OPTIE FL_FLASH_DisableIT_OTPProgramError + * @param FLASHx FLASH instance + * @retval None + */ +__STATIC_INLINE void FL_FLASH_DisableIT_OTPProgramError(FLASH_Type *FLASHx) +{ + CLEAR_BIT(FLASHx->IER, FLASH_IER_OPTIE_Msk); +} + +/** + * @brief Get OTP program error interrupt enable status + * @rmtoll IER OPTIE FL_FLASH_IsEnabledIT_OTPProgramError + * @param FLASHx FLASH instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_FLASH_IsEnabledIT_OTPProgramError(FLASH_Type *FLASHx) +{ + return (uint32_t)(READ_BIT(FLASHx->IER, FLASH_IER_OPTIE_Msk) == FLASH_IER_OPTIE_Msk); +} + +/** + * @brief Flash authentication error interrupt enable + * @rmtoll IER AUTHIE FL_FLASH_EnableIT_AuthenticationError + * @param FLASHx FLASH instance + * @retval None + */ +__STATIC_INLINE void FL_FLASH_EnableIT_AuthenticationError(FLASH_Type *FLASHx) +{ + SET_BIT(FLASHx->IER, FLASH_IER_AUTHIE_Msk); +} + +/** + * @brief Flash authentication error interrupt disable + * @rmtoll IER AUTHIE FL_FLASH_DisableIT_AuthenticationError + * @param FLASHx FLASH instance + * @retval None + */ +__STATIC_INLINE void FL_FLASH_DisableIT_AuthenticationError(FLASH_Type *FLASHx) +{ + CLEAR_BIT(FLASHx->IER, FLASH_IER_AUTHIE_Msk); +} + +/** + * @brief Get flash authentication error interrupt enable status + * @rmtoll IER AUTHIE FL_FLASH_IsEnabledIT_AuthenticationError + * @param FLASHx FLASH instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_FLASH_IsEnabledIT_AuthenticationError(FLASH_Type *FLASHx) +{ + return (uint32_t)(READ_BIT(FLASHx->IER, FLASH_IER_AUTHIE_Msk) == FLASH_IER_AUTHIE_Msk); +} + +/** + * @brief Flash key error interrupt enable + * @rmtoll IER KEYIE FL_FLASH_EnableIT_KeyError + * @param FLASHx FLASH instance + * @retval None + */ +__STATIC_INLINE void FL_FLASH_EnableIT_KeyError(FLASH_Type *FLASHx) +{ + SET_BIT(FLASHx->IER, FLASH_IER_KEYIE_Msk); +} + +/** + * @brief Flash key error interrupt disable + * @rmtoll IER KEYIE FL_FLASH_DisableIT_KeyError + * @param FLASHx FLASH instance + * @retval None + */ +__STATIC_INLINE void FL_FLASH_DisableIT_KeyError(FLASH_Type *FLASHx) +{ + CLEAR_BIT(FLASHx->IER, FLASH_IER_KEYIE_Msk); +} + +/** + * @brief Get Flash key error interrupt enable status + * @rmtoll IER KEYIE FL_FLASH_IsEnabledIT_KeyError + * @param FLASHx FLASH instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_FLASH_IsEnabledIT_KeyError(FLASH_Type *FLASHx) +{ + return (uint32_t)(READ_BIT(FLASHx->IER, FLASH_IER_KEYIE_Msk) == FLASH_IER_KEYIE_Msk); +} + +/** + * @brief Erase/Program clock error interrupt enable + * @rmtoll IER CKIE FL_FLASH_EnableIT_ClockError + * @param FLASHx FLASH instance + * @retval None + */ +__STATIC_INLINE void FL_FLASH_EnableIT_ClockError(FLASH_Type *FLASHx) +{ + SET_BIT(FLASHx->IER, FLASH_IER_CKIE_Msk); +} + +/** + * @brief Erase/Program clock error interrupt disable + * @rmtoll IER CKIE FL_FLASH_DisableIT_ClockError + * @param FLASHx FLASH instance + * @retval None + */ +__STATIC_INLINE void FL_FLASH_DisableIT_ClockError(FLASH_Type *FLASHx) +{ + CLEAR_BIT(FLASHx->IER, FLASH_IER_CKIE_Msk); +} + +/** + * @brief Get Erase/Program clock error interrupt enable status + * @rmtoll IER CKIE FL_FLASH_IsEnabledIT_ClockError + * @param FLASHx FLASH instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_FLASH_IsEnabledIT_ClockError(FLASH_Type *FLASHx) +{ + return (uint32_t)(READ_BIT(FLASHx->IER, FLASH_IER_CKIE_Msk) == FLASH_IER_CKIE_Msk); +} + +/** + * @brief Program done interrupt enable + * @rmtoll IER PRDIE FL_FLASH_EnableIT_ProgramComplete + * @param FLASHx FLASH instance + * @retval None + */ +__STATIC_INLINE void FL_FLASH_EnableIT_ProgramComplete(FLASH_Type *FLASHx) +{ + SET_BIT(FLASHx->IER, FLASH_IER_PRDIE_Msk); +} + +/** + * @brief Program done interrupt disable + * @rmtoll IER PRDIE FL_FLASH_DisableIT_ProgramComplete + * @param FLASHx FLASH instance + * @retval None + */ +__STATIC_INLINE void FL_FLASH_DisableIT_ProgramComplete(FLASH_Type *FLASHx) +{ + CLEAR_BIT(FLASHx->IER, FLASH_IER_PRDIE_Msk); +} + +/** + * @brief Get program done interrupt enable status + * @rmtoll IER PRDIE FL_FLASH_IsEnabledIT_ProgramComplete + * @param FLASHx FLASH instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_FLASH_IsEnabledIT_ProgramComplete(FLASH_Type *FLASHx) +{ + return (uint32_t)(READ_BIT(FLASHx->IER, FLASH_IER_PRDIE_Msk) == FLASH_IER_PRDIE_Msk); +} + +/** + * @brief Erase done interrupt enable + * @rmtoll IER ERDIE FL_FLASH_EnableIT_EraseComplete + * @param FLASHx FLASH instance + * @retval None + */ +__STATIC_INLINE void FL_FLASH_EnableIT_EraseComplete(FLASH_Type *FLASHx) +{ + SET_BIT(FLASHx->IER, FLASH_IER_ERDIE_Msk); +} + +/** + * @brief Erase done interrupt disable + * @rmtoll IER ERDIE FL_FLASH_DisableIT_EraseComplete + * @param FLASHx FLASH instance + * @retval None + */ +__STATIC_INLINE void FL_FLASH_DisableIT_EraseComplete(FLASH_Type *FLASHx) +{ + CLEAR_BIT(FLASHx->IER, FLASH_IER_ERDIE_Msk); +} + +/** + * @brief Get erase done interrupt enable status + * @rmtoll IER ERDIE FL_FLASH_IsEnabledIT_EraseComplete + * @param FLASHx FLASH instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_FLASH_IsEnabledIT_EraseComplete(FLASH_Type *FLASHx) +{ + return (uint32_t)(READ_BIT(FLASHx->IER, FLASH_IER_ERDIE_Msk) == FLASH_IER_ERDIE_Msk); +} + +/** + * @brief Get flash key status + * @rmtoll ISR KEYSTA FL_FLASH_GetFlashLockStatus + * @param FLASHx FLASH instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_FLASH_KEY_STATUS_LOCK + * @arg @ref FL_FLASH_KEY_STATUS_PAGE_ERASE + * @arg @ref FL_FLASH_KEY_STATUS_PROGRAM + * @arg @ref FL_FLASH_KEY_STATUS_ERROR + * @arg @ref FL_FLASH_KEY_STATUS_SECTOR_ERASE + */ +__STATIC_INLINE uint32_t FL_FLASH_GetFlashLockStatus(FLASH_Type *FLASHx) +{ + return (uint32_t)(READ_BIT(FLASHx->ISR, FLASH_ISR_KEYSTA_Msk)); +} + +/** + * @brief Get BootSwap +register value + * @rmtoll ISR BTSF FL_FLASH_GetFlashSwapStatus + * @param FLASHx FLASH instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_FLASH_BOOT_SECTOR_0000H_1FFFH + * @arg @ref FL_FLASH_BOOT_SECTOR_2000H_3FFFH + */ +__STATIC_INLINE uint32_t FL_FLASH_GetFlashSwapStatus(FLASH_Type *FLASHx) +{ + return (uint32_t)(READ_BIT(FLASHx->ISR, FLASH_ISR_BTSF_Msk)); +} + +/** + * @brief Get OTP program Error Flag + * @rmtoll ISR OPTERR FL_FLASH_IsActiveFlag_OPTProgramError + * @param FLASHx FLASH instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_FLASH_IsActiveFlag_OPTProgramError(FLASH_Type *FLASHx) +{ + return (uint32_t)(READ_BIT(FLASHx->ISR, FLASH_ISR_OPTERR_Msk) == (FLASH_ISR_OPTERR_Msk)); +} + +/** + * @brief Clear OTP program Error Flag + * @rmtoll ISR OPTERR FL_FLASH_ClearFlag_OPTProgramError + * @param FLASH_Type FLASH instance + * @retval None + */ +__STATIC_INLINE void FL_FLASH_ClearFlag_OPTProgramError(FLASH_Type *FLASHx) +{ + WRITE_REG(FLASHx->ISR, FLASH_ISR_OPTERR_Msk); +} + +/** + * @brief Get Flash Authentication Error Flag + * @rmtoll ISR AUTHERR FL_FLASH_IsActiveFlag_AuthenticationError + * @param FLASHx FLASH instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_FLASH_IsActiveFlag_AuthenticationError(FLASH_Type *FLASHx) +{ + return (uint32_t)(READ_BIT(FLASHx->ISR, FLASH_ISR_AUTHERR_Msk) == (FLASH_ISR_AUTHERR_Msk)); +} + +/** + * @brief ClearFlash Authentication Error Flag + * @rmtoll ISR AUTHERR FL_FLASH_ClearFlag_AuthenticationError + * @param FLASHx FLASH instance + * @retval None + */ +__STATIC_INLINE void FL_FLASH_ClearFlag_AuthenticationError(FLASH_Type *FLASHx) +{ + WRITE_REG(FLASHx->ISR, FLASH_ISR_AUTHERR_Msk); +} + +/** + * @brief Get Flash Key Error Flag + * @rmtoll ISR KEYERR FL_FLASH_IsActiveFlag_KeyError + * @param FLASHx FLASH instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_FLASH_IsActiveFlag_KeyError(FLASH_Type *FLASHx) +{ + return (uint32_t)(READ_BIT(FLASHx->ISR, FLASH_ISR_KEYERR_Msk) == (FLASH_ISR_KEYERR_Msk)); +} + +/** + * @brief Clear Flash Key Error Flag + * @rmtoll ISR KEYERR FL_FLASH_ClearFlag_KeyError + * @param FLASHx FLASH instance + * @retval None + */ +__STATIC_INLINE void FL_FLASH_ClearFlag_KeyError(FLASH_Type *FLASHx) +{ + WRITE_REG(FLASHx->ISR, FLASH_ISR_KEYERR_Msk); +} + +/** + * @brief Get Erase/Program Clock Error Flag + * @rmtoll ISR CKERR FL_FLASH_IsActiveFlag_ClockError + * @param FLASHx FLASH instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_FLASH_IsActiveFlag_ClockError(FLASH_Type *FLASHx) +{ + return (uint32_t)(READ_BIT(FLASHx->ISR, FLASH_ISR_CKERR_Msk) == (FLASH_ISR_CKERR_Msk)); +} + +/** + * @brief Clear Erase/Program Clock Error Flag + * @rmtoll ISR CKERR FL_FLASH_ClearFlag_ClockError + * @param FLASHx FLASH instance + * @retval None + */ +__STATIC_INLINE void FL_FLASH_ClearFlag_ClockError(FLASH_Type *FLASHx) +{ + WRITE_REG(FLASHx->ISR, FLASH_ISR_CKERR_Msk); +} + +/** + * @brief Get Program Done Flag + * @rmtoll ISR PRD FL_FLASH_IsActiveFlag_ProgramComplete + * @param FLASHx FLASH instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_FLASH_IsActiveFlag_ProgramComplete(FLASH_Type *FLASHx) +{ + return (uint32_t)(READ_BIT(FLASHx->ISR, FLASH_ISR_PRD_Msk) == (FLASH_ISR_PRD_Msk)); +} + +/** + * @brief Clear Program Done Flag + * @rmtoll ISR PRD FL_FLASH_ClearFlag_ProgramComplete + * @param FLASHx FLASH instance + * @retval None + */ +__STATIC_INLINE void FL_FLASH_ClearFlag_ProgramComplete(FLASH_Type *FLASHx) +{ + WRITE_REG(FLASHx->ISR, FLASH_ISR_PRD_Msk); +} + +/** + * @brief Get Erase Done Flag + * @rmtoll ISR ERD FL_FLASH_IsActiveFlag_EraseComplete + * @param FLASHx FLASH instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_FLASH_IsActiveFlag_EraseComplete(FLASH_Type *FLASHx) +{ + return (uint32_t)(READ_BIT(FLASHx->ISR, FLASH_ISR_ERD_Msk) == (FLASH_ISR_ERD_Msk)); +} + +/** + * @brief Clear Erase Done Flag + * @rmtoll ISR ERD FL_FLASH_ClearFlag_EraseComplete + * @param FLASHx FLASH instance + * @retval None + */ +__STATIC_INLINE void FL_FLASH_ClearFlag_EraseComplete(FLASH_Type *FLASHx) +{ + WRITE_REG(FLASHx->ISR, FLASH_ISR_ERD_Msk); +} + +/** + * @} + */ + +/** @defgroup FLASH_FL_EF_Init Initialization and de-initialization functions + * @{ + */ +FL_ErrorStatus FL_FLASH_PageErase(FLASH_Type *FLASHx, uint32_t address); +FL_ErrorStatus FL_FLASH_SectorErase(FLASH_Type *FLASHx, uint32_t address); + +FL_ErrorStatus FL_FLASH_Program_Word(FLASH_Type *FLASHx, uint32_t address, uint32_t data); +FL_ErrorStatus FL_FLASH_Program_Page(FLASH_Type *FLASHx, uint32_t pageNum, uint32_t *data); +FL_ErrorStatus FL_FLASH_Program_Sector(FLASH_Type *FLASHx, uint32_t sectorNum, uint32_t *data); + +FL_ErrorStatus FL_FLASH_Write_Dma(FLASH_Type *FLASHx, uint32_t address, uint32_t *data); +FL_ErrorStatus FL_FLASH_Read_Dma(FLASH_Type *FLASHx, uint32_t address, uint32_t *data, uint16_t length); + + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif /* __FM33LG0XX_FL_FLASH_H*/ + +/*************************Py_Code_Generator Version: 0.1-0.14-0.1 @ 2020-12-15*************************/ +/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/ diff --git a/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_gpio.h b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_gpio.h new file mode 100644 index 0000000..619ea5b --- /dev/null +++ b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_gpio.h @@ -0,0 +1,2191 @@ + /** + ******************************************************************************************************* + * @file fm33lg0xx_fl_gpio.h + * @author FMSH Application Team + * @brief Head file of GPIO FL Module + ******************************************************************************************************* + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + + + +/* Define to prevent recursive inclusion---------------------------------------------------------------*/ +#ifndef __FM33LG0XX_FL_GPIO_H +#define __FM33LG0XX_FL_GPIO_H + +#ifdef __cplusplus +extern "C" { +#endif +/* Includes -------------------------------------------------------------------------------------------*/ +#include "fm33lg0xx_fl_def.h" +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @defgroup GPIO GPIO + * @brief GPIO FL driver + * @{ + */ + +/* Exported types -------------------------------------------------------------------------------------*/ +/** @defgroup GPIO_FL_ES_INIT GPIO Exported Init structures + * @{ + */ + +/** + * @brief FL GPIO Init Sturcture definition + */ +typedef struct +{ + /*! PIN */ + uint32_t pin; + /*! 功能模式 */ + uint32_t mode; + /*! 输出类型 */ + uint32_t outputType; + /*! 上拉使能 */ + uint32_t pull; + /*! 数字功能重定向 */ + uint32_t remapPin; + /*! 模拟开关使能 */ + uint32_t analogSwitch; + +} FL_GPIO_InitTypeDef; + +typedef struct +{ + /*! 触发边沿 */ + uint32_t polarity; + +} FL_WKUP_InitTypeDef; + +/** + * @} + */ +/* Exported constants ---------------------------------------------------------------------------------*/ +/** @defgroup GPIO_FL_Exported_Constants GPIO Exported Constants + * @{ + */ + +#define GPIO_FCR_Pos (0U) +#define GPIO_FCR_Msk (0x3U << GPIO_FCR_Pos) +#define GPIO_FCR GPIO_FCR_Msk + +#define GPIO_EXTIEDS0_Pos (0U) +#define GPIO_EXTIEDS0_Msk (0x3U << GPIO_EXTIEDS0_Pos) +#define GPIO_EXTIEDS0 GPIO_EXTIEDS0_Msk + +#define GPIO_EXTIEDS1_Pos (0U) +#define GPIO_EXTIEDS1_Msk (0x3U << GPIO_EXTIEDS1_Pos) +#define GPIO_EXTIEDS1 GPIO_EXTIEDS1_Msk + +#define GPIO_FOUTSEL_FOUT0_Pos (0U) +#define GPIO_FOUTSEL_FOUT0_Msk (0xfU << GPIO_FOUTSEL_FOUT0_Pos) +#define GPIO_FOUTSEL_FOUT0 GPIO_FOUTSEL_FOUT0_Msk + +#define GPIO_FOUTSEL_FOUT1_Pos (4U) +#define GPIO_FOUTSEL_FOUT1_Msk (0xfU << GPIO_FOUTSEL_FOUT1_Pos) +#define GPIO_FOUTSEL_FOUT1 GPIO_FOUTSEL_FOUT1_Msk + +#define GPIO_EXTISEL0_EXTI0_Pos (0U) +#define GPIO_EXTISEL0_EXTI0_Msk (0x3U << GPIO_EXTISEL0_EXTI0_Pos) +#define GPIO_EXTISEL0_EXTI0 GPIO_EXTISEL0_EXTI0_Msk + +#define GPIO_EXTISEL0_EXTI1_Pos (2U) +#define GPIO_EXTISEL0_EXTI1_Msk (0x3U << GPIO_EXTISEL0_EXTI1_Pos) +#define GPIO_EXTISEL0_EXTI1 GPIO_EXTISEL0_EXTI1_Msk + +#define GPIO_EXTISEL0_EXTI2_Pos (4U) +#define GPIO_EXTISEL0_EXTI2_Msk (0x3U << GPIO_EXTISEL0_EXTI2_Pos) +#define GPIO_EXTISEL0_EXTI2 GPIO_EXTISEL0_EXTI2_Msk + +#define GPIO_EXTISEL0_EXTI3_Pos (6U) +#define GPIO_EXTISEL0_EXTI3_Msk (0x3U << GPIO_EXTISEL0_EXTI3_Pos) +#define GPIO_EXTISEL0_EXTI3 GPIO_EXTISEL0_EXTI3_Msk + +#define GPIO_EXTISEL0_EXTI4_Pos (8U) +#define GPIO_EXTISEL0_EXTI4_Msk (0x3U << GPIO_EXTISEL0_EXTI4_Pos) +#define GPIO_EXTISEL0_EXTI4 GPIO_EXTISEL0_EXTI4_Msk + +#define GPIO_EXTISEL0_EXTI5_Pos (10U) +#define GPIO_EXTISEL0_EXTI5_Msk (0x3U << GPIO_EXTISEL0_EXTI5_Pos) +#define GPIO_EXTISEL0_EXTI5 GPIO_EXTISEL0_EXTI5_Msk + +#define GPIO_EXTISEL0_EXTI6_Pos (12U) +#define GPIO_EXTISEL0_EXTI6_Msk (0x3U << GPIO_EXTISEL0_EXTI6_Pos) +#define GPIO_EXTISEL0_EXTI6 GPIO_EXTISEL0_EXTI6_Msk + +#define GPIO_EXTISEL0_EXTI7_Pos (14U) +#define GPIO_EXTISEL0_EXTI7_Msk (0x3U << GPIO_EXTISEL0_EXTI7_Pos) +#define GPIO_EXTISEL0_EXTI7 GPIO_EXTISEL0_EXTI7_Msk + +#define GPIO_EXTISEL0_EXTI8_Pos (16U) +#define GPIO_EXTISEL0_EXTI8_Msk (0x3U << GPIO_EXTISEL0_EXTI8_Pos) +#define GPIO_EXTISEL0_EXTI8 GPIO_EXTISEL0_EXTI8_Msk + +#define GPIO_EXTISEL0_EXTI9_Pos (18U) +#define GPIO_EXTISEL0_EXTI9_Msk (0x3U << GPIO_EXTISEL0_EXTI9_Pos) +#define GPIO_EXTISEL0_EXTI9 GPIO_EXTISEL0_EXTI9_Msk + +#define GPIO_EXTISEL0_EXTI10_Pos (20U) +#define GPIO_EXTISEL0_EXTI10_Msk (0x3U << GPIO_EXTISEL0_EXTI10_Pos) +#define GPIO_EXTISEL0_EXTI10 GPIO_EXTISEL0_EXTI10_Msk + +#define GPIO_EXTISEL0_EXTI11_Pos (22U) +#define GPIO_EXTISEL0_EXTI11_Msk (0x3U << GPIO_EXTISEL0_EXTI11_Pos) +#define GPIO_EXTISEL0_EXTI11 GPIO_EXTISEL0_EXTI11_Msk + +#define GPIO_EXTISEL0_EXTI12_Pos (24U) +#define GPIO_EXTISEL0_EXTI12_Msk (0x3U << GPIO_EXTISEL0_EXTI12_Pos) +#define GPIO_EXTISEL0_EXTI12 GPIO_EXTISEL0_EXTI12_Msk + +#define GPIO_EXTISEL0_EXTI13_Pos (26U) +#define GPIO_EXTISEL0_EXTI13_Msk (0x3U << GPIO_EXTISEL0_EXTI13_Pos) +#define GPIO_EXTISEL0_EXTI13 GPIO_EXTISEL0_EXTI13_Msk + +#define GPIO_EXTISEL0_EXTI14_Pos (28U) +#define GPIO_EXTISEL0_EXTI14_Msk (0x3U << GPIO_EXTISEL0_EXTI14_Pos) +#define GPIO_EXTISEL0_EXTI14 GPIO_EXTISEL0_EXTI14_Msk + +#define GPIO_EXTISEL0_EXTI15_Pos (30U) +#define GPIO_EXTISEL0_EXTI15_Msk (0x3U << GPIO_EXTISEL0_EXTI15_Pos) +#define GPIO_EXTISEL0_EXTI15 GPIO_EXTISEL0_EXTI15_Msk + +#define GPIO_EXTISEL1_EXTI16_Pos (0U) +#define GPIO_EXTISEL1_EXTI16_Msk (0x3U << GPIO_EXTISEL1_EXTI16_Pos) +#define GPIO_EXTISEL1_EXTI16 GPIO_EXTISEL1_EXTI16_Msk + +#define GPIO_EXTISEL1_EXTI17_Pos (2U) +#define GPIO_EXTISEL1_EXTI17_Msk (0x3U << GPIO_EXTISEL1_EXTI17_Pos) +#define GPIO_EXTISEL1_EXTI17 GPIO_EXTISEL1_EXTI17_Msk + +#define GPIO_EXTISEL1_EXTI18_Pos (4U) +#define GPIO_EXTISEL1_EXTI18_Msk (0x3U << GPIO_EXTISEL1_EXTI18_Pos) +#define GPIO_EXTISEL1_EXTI18 GPIO_EXTISEL1_EXTI18_Msk + +#define GPIO_PINWKEN_EN_Pos (0U) +#define GPIO_PINWKEN_EN_Msk (0x3ffU << GPIO_PINWKEN_EN_Pos) +#define GPIO_PINWKEN_EN GPIO_PINWKEN_EN_Msk + +#define GPIO_PINWKEN_WKISEL_Pos (31U) +#define GPIO_PINWKEN_WKISEL_Msk (0x1U << GPIO_PINWKEN_WKISEL_Pos) +#define GPIO_PINWKEN_WKISEL GPIO_PINWKEN_WKISEL_Msk + +#define GPIO_PINWKEN_SEL_Pos (10U) +#define GPIO_PINWKEN_SEL_Msk (0x3U << GPIO_PINWKEN_SEL_Pos) +#define GPIO_PINWKEN_SEL GPIO_PINWKEN_SEL_Msk + + + +#define FL_GPIO_PIN_0 (0x1U << 0U) +#define FL_GPIO_PIN_1 (0x1U << 1U) +#define FL_GPIO_PIN_2 (0x1U << 2U) +#define FL_GPIO_PIN_3 (0x1U << 3U) +#define FL_GPIO_PIN_4 (0x1U << 4U) +#define FL_GPIO_PIN_5 (0x1U << 5U) +#define FL_GPIO_PIN_6 (0x1U << 6U) +#define FL_GPIO_PIN_7 (0x1U << 7U) +#define FL_GPIO_PIN_8 (0x1U << 8U) +#define FL_GPIO_PIN_9 (0x1U << 9U) +#define FL_GPIO_PIN_10 (0x1U << 10U) +#define FL_GPIO_PIN_11 (0x1U << 11U) +#define FL_GPIO_PIN_12 (0x1U << 12U) +#define FL_GPIO_PIN_13 (0x1U << 13U) +#define FL_GPIO_PIN_14 (0x1U << 14U) +#define FL_GPIO_PIN_15 (0x1U << 15U) +#define FL_GPIO_PIN_ALL (0xffffU << 0U) +#define FL_GPIO_EXTI_LINE_0 (0x1U << 0U) +#define FL_GPIO_EXTI_LINE_1 (0x1U << 1U) +#define FL_GPIO_EXTI_LINE_2 (0x1U << 2U) +#define FL_GPIO_EXTI_LINE_3 (0x1U << 3U) +#define FL_GPIO_EXTI_LINE_4 (0x1U << 4U) +#define FL_GPIO_EXTI_LINE_5 (0x1U << 5U) +#define FL_GPIO_EXTI_LINE_6 (0x1U << 6U) +#define FL_GPIO_EXTI_LINE_7 (0x1U << 7U) +#define FL_GPIO_EXTI_LINE_8 (0x1U << 8U) +#define FL_GPIO_EXTI_LINE_9 (0x1U << 9U) +#define FL_GPIO_EXTI_LINE_10 (0x1U << 10U) +#define FL_GPIO_EXTI_LINE_11 (0x1U << 11U) +#define FL_GPIO_EXTI_LINE_12 (0x1U << 12U) +#define FL_GPIO_EXTI_LINE_13 (0x1U << 13U) +#define FL_GPIO_EXTI_LINE_14 (0x1U << 14U) +#define FL_GPIO_EXTI_LINE_15 (0x1U << 15U) +#define FL_GPIO_EXTI_LINE_16 (0x1U << 16U) +#define FL_GPIO_EXTI_LINE_17 (0x1U << 17U) +#define FL_GPIO_EXTI_LINE_18 (0x1U << 18U) +#define FL_GPIO_EXTI_LINE_ALL (0x7ffffU << 0U) +#define FL_GPIO_EXTI_LINE_0_PA0 (0x0U << 0U) +#define FL_GPIO_EXTI_LINE_0_PA1 (0x1U << 0U) +#define FL_GPIO_EXTI_LINE_0_PA2 (0x2U << 0U) +#define FL_GPIO_EXTI_LINE_0_PA3 (0x3U << 0U) +#define FL_GPIO_EXTI_LINE_1_PA4 (0x0U << 2U) +#define FL_GPIO_EXTI_LINE_1_PA5 (0x1U << 2U) +#define FL_GPIO_EXTI_LINE_1_PA6 (0x2U << 2U) +#define FL_GPIO_EXTI_LINE_1_PA7 (0x3U << 2U) +#define FL_GPIO_EXTI_LINE_2_PA8 (0x0U << 4U) +#define FL_GPIO_EXTI_LINE_2_PA9 (0x1U << 4U) +#define FL_GPIO_EXTI_LINE_2_PA10 (0x2U << 4U) +#define FL_GPIO_EXTI_LINE_2_PA11 (0x3U << 4U) +#define FL_GPIO_EXTI_LINE_3_PA12 (0x0U << 6U) +#define FL_GPIO_EXTI_LINE_3_PA13 (0x1U << 6U) +#define FL_GPIO_EXTI_LINE_3_PA14 (0x2U << 6U) +#define FL_GPIO_EXTI_LINE_3_PA15 (0x3U << 6U) +#define FL_GPIO_EXTI_LINE_4_PB0 (0x0U << 8U) +#define FL_GPIO_EXTI_LINE_4_PB1 (0x1U << 8U) +#define FL_GPIO_EXTI_LINE_4_PB2 (0x2U << 8U) +#define FL_GPIO_EXTI_LINE_4_PB3 (0x3U << 8U) +#define FL_GPIO_EXTI_LINE_5_PB4 (0x0U << 10U) +#define FL_GPIO_EXTI_LINE_5_PB5 (0x1U << 10U) +#define FL_GPIO_EXTI_LINE_5_PB6 (0x2U << 10U) +#define FL_GPIO_EXTI_LINE_5_PB7 (0x3U << 10U) +#define FL_GPIO_EXTI_LINE_6_PB8 (0x0U << 12U) +#define FL_GPIO_EXTI_LINE_6_PB9 (0x1U << 12U) +#define FL_GPIO_EXTI_LINE_6_PB10 (0x2U << 12U) +#define FL_GPIO_EXTI_LINE_6_PB11 (0x3U << 12U) +#define FL_GPIO_EXTI_LINE_7_PB12 (0x0U << 14U) +#define FL_GPIO_EXTI_LINE_7_PB13 (0x1U << 14U) +#define FL_GPIO_EXTI_LINE_7_PB14 (0x2U << 14U) +#define FL_GPIO_EXTI_LINE_7_PB15 (0x3U << 14U) +#define FL_GPIO_EXTI_LINE_8_PC0 (0x0U << 16U) +#define FL_GPIO_EXTI_LINE_8_PC1 (0x1U << 16U) +#define FL_GPIO_EXTI_LINE_8_PC2 (0x2U << 16U) +#define FL_GPIO_EXTI_LINE_8_PC3 (0x3U << 16U) +#define FL_GPIO_EXTI_LINE_9_PC4 (0x0U << 18U) +#define FL_GPIO_EXTI_LINE_9_PC5 (0x1U << 18U) +#define FL_GPIO_EXTI_LINE_9_PC6 (0x2U << 18U) +#define FL_GPIO_EXTI_LINE_9_PC7 (0x3U << 18U) +#define FL_GPIO_EXTI_LINE_10_PC8 (0x0U << 20U) +#define FL_GPIO_EXTI_LINE_10_PC9 (0x1U << 20U) +#define FL_GPIO_EXTI_LINE_10_PC10 (0x2U << 20U) +#define FL_GPIO_EXTI_LINE_10_PC11 (0x3U << 20U) +#define FL_GPIO_EXTI_LINE_11_PC12 (0x0U << 22U) +#define FL_GPIO_EXTI_LINE_11_PC13 (0x1U << 22U) +#define FL_GPIO_EXTI_LINE_11_PC14 (0x2U << 22U) +#define FL_GPIO_EXTI_LINE_11_PC15 (0x3U << 22U) +#define FL_GPIO_EXTI_LINE_12_PD0 (0x0U << 24U) +#define FL_GPIO_EXTI_LINE_12_PD1 (0x1U << 24U) +#define FL_GPIO_EXTI_LINE_12_PD2 (0x2U << 24U) +#define FL_GPIO_EXTI_LINE_12_PD3 (0x3U << 24U) +#define FL_GPIO_EXTI_LINE_13_PD4 (0x0U << 26U) +#define FL_GPIO_EXTI_LINE_13_PD5 (0x1U << 26U) +#define FL_GPIO_EXTI_LINE_13_PD6 (0x2U << 26U) +#define FL_GPIO_EXTI_LINE_13_PD7 (0x3U << 26U) +#define FL_GPIO_EXTI_LINE_14_PD8 (0x0U << 28U) +#define FL_GPIO_EXTI_LINE_14_PD9 (0x1U << 28U) +#define FL_GPIO_EXTI_LINE_14_PD10 (0x2U << 28U) +#define FL_GPIO_EXTI_LINE_14_PD11 (0x3U << 28U) +#define FL_GPIO_EXTI_LINE_15_PD12 (0x0U << 30U) +#define FL_GPIO_EXTI_LINE_16_PE0 (0x0U << 0U) +#define FL_GPIO_EXTI_LINE_16_PE1 (0x1U << 0U) +#define FL_GPIO_EXTI_LINE_16_PE2 (0x2U << 0U) +#define FL_GPIO_EXTI_LINE_16_PE3 (0x3U << 0U) +#define FL_GPIO_EXTI_LINE_17_PE5 (0x1U << 2U) +#define FL_GPIO_EXTI_LINE_17_PE6 (0x2U << 2U) +#define FL_GPIO_EXTI_LINE_17_PE7 (0x3U << 2U) +#define FL_GPIO_EXTI_LINE_18_PE8 (0x0U << 4U) +#define FL_GPIO_EXTI_LINE_18_PE9 (0x1U << 4U) +#define FL_GPIO_WAKEUP_0 (0x1U << 0U) +#define FL_GPIO_WAKEUP_1 (0x1U << 1U) +#define FL_GPIO_WAKEUP_2 (0x1U << 2U) +#define FL_GPIO_WAKEUP_3 (0x1U << 3U) +#define FL_GPIO_WAKEUP_4 (0x1U << 4U) +#define FL_GPIO_WAKEUP_5 (0x1U << 5U) +#define FL_GPIO_WAKEUP_6 (0x1U << 6U) +#define FL_GPIO_WAKEUP_7 (0x1U << 7U) +#define FL_GPIO_WAKEUP_8 (0x1U << 8U) +#define FL_GPIO_WAKEUP_9 (0x1U << 9U) + + +#define FL_GPIO_OUTPUT_PUSHPULL (0) +#define FL_GPIO_OUTPUT_OPENDRAIN (1) + + +#define FL_GPIO_MODE_INPUT (0x0U << GPIO_FCR_Pos) +#define FL_GPIO_MODE_OUTPUT (0x1U << GPIO_FCR_Pos) +#define FL_GPIO_MODE_DIGITAL (0x2U << GPIO_FCR_Pos) +#define FL_GPIO_MODE_ANALOG (0x3U << GPIO_FCR_Pos) + + +#define FL_GPIO_EXTI_TRIGGER_EDGE_RISING (0x0U << GPIO_EXTIEDS0_Pos) +#define FL_GPIO_EXTI_TRIGGER_EDGE_FALLING (0x1U << GPIO_EXTIEDS0_Pos) +#define FL_GPIO_EXTI_TRIGGER_EDGE_BOTH (0x2U << GPIO_EXTIEDS0_Pos) +#define FL_GPIO_EXTI_TRIGGER_EDGE_DISABLE (0x3U << GPIO_EXTIEDS0_Pos) + + +#define FL_GPIO_FOUT0_SELECT_XTLF (0x0U << GPIO_FOUTSEL_FOUT0_Pos) +#define FL_GPIO_FOUT0_SELECT_RCLP (0x1U << GPIO_FOUTSEL_FOUT0_Pos) +#define FL_GPIO_FOUT0_SELECT_RCHF_DIV64 (0x2U << GPIO_FOUTSEL_FOUT0_Pos) +#define FL_GPIO_FOUT0_SELECT_LSCLK (0x3U << GPIO_FOUTSEL_FOUT0_Pos) +#define FL_GPIO_FOUT0_SELECT_AHBCLK_DIV64 (0x4U << GPIO_FOUTSEL_FOUT0_Pos) +#define FL_GPIO_FOUT0_SELECT_RTCTM (0x5U << GPIO_FOUTSEL_FOUT0_Pos) +#define FL_GPIO_FOUT0_SELECT_PLLOUTPUT_DIV64 (0x6U << GPIO_FOUTSEL_FOUT0_Pos) +#define FL_GPIO_FOUT0_SELECT_RTCCLK64HZ (0x7U << GPIO_FOUTSEL_FOUT0_Pos) +#define FL_GPIO_FOUT0_SELECT_APBCLK_DIV64 (0x8U << GPIO_FOUTSEL_FOUT0_Pos) +#define FL_GPIO_FOUT0_SELECT_PLLOUTPUT (0x9U << GPIO_FOUTSEL_FOUT0_Pos) +#define FL_GPIO_FOUT0_SELECT_RCLF (0xaU << GPIO_FOUTSEL_FOUT0_Pos) +#define FL_GPIO_FOUT0_SELECT_RCHF (0xbU << GPIO_FOUTSEL_FOUT0_Pos) +#define FL_GPIO_FOUT0_SELECT_XTHF_DIV64 (0xcU << GPIO_FOUTSEL_FOUT0_Pos) +#define FL_GPIO_FOUT0_SELECT_COMP1O (0xdU << GPIO_FOUTSEL_FOUT0_Pos) +#define FL_GPIO_FOUT0_SELECT_CLK_8K (0xeU << GPIO_FOUTSEL_FOUT0_Pos) +#define FL_GPIO_FOUT0_SELECT_ADC_CLK (0xfU << GPIO_FOUTSEL_FOUT0_Pos) + + +#define FL_GPIO_FOUT1_SELECT_XTLF (0x0U << GPIO_FOUTSEL_FOUT1_Pos) +#define FL_GPIO_FOUT1_SELECT_RCLP (0x1U << GPIO_FOUTSEL_FOUT1_Pos) +#define FL_GPIO_FOUT1_SELECT_ADCCLK (0x2U << GPIO_FOUTSEL_FOUT1_Pos) +#define FL_GPIO_FOUT1_SELECT_LSCLK (0x3U << GPIO_FOUTSEL_FOUT1_Pos) +#define FL_GPIO_FOUT1_SELECT_EOC (0x4U << GPIO_FOUTSEL_FOUT1_Pos) +#define FL_GPIO_FOUT1_SELECT_RTCTM (0x5U << GPIO_FOUTSEL_FOUT1_Pos) +#define FL_GPIO_FOUT1_SELECT_PLLOUTPUT_DIV64 (0x6U << GPIO_FOUTSEL_FOUT1_Pos) +#define FL_GPIO_FOUT1_SELECT_EOCAL (0x7U << GPIO_FOUTSEL_FOUT1_Pos) +#define FL_GPIO_FOUT1_SELECT_APBCLK_DIV64 (0x8U << GPIO_FOUTSEL_FOUT1_Pos) +#define FL_GPIO_FOUT1_SELECT_ROSC_TDLV (0x9U << GPIO_FOUTSEL_FOUT1_Pos) +#define FL_GPIO_FOUT1_SELECT_RCLF (0xaU << GPIO_FOUTSEL_FOUT1_Pos) +#define FL_GPIO_FOUT1_SELECT_RCHF (0xbU << GPIO_FOUTSEL_FOUT1_Pos) +#define FL_GPIO_FOUT1_SELECT_XTHF_DIV64 (0xcU << GPIO_FOUTSEL_FOUT1_Pos) +#define FL_GPIO_FOUT1_SELECT_ADCCLK_DIV64 (0xdU << GPIO_FOUTSEL_FOUT1_Pos) +#define FL_GPIO_FOUT1_SELECT_CLK_8K (0xeU << GPIO_FOUTSEL_FOUT1_Pos) +#define FL_GPIO_FOUT1_SELECT_ROSC_TDHV (0xfU << GPIO_FOUTSEL_FOUT1_Pos) + + +#define FL_GPIO_WAKEUP_INT_ENTRY_NMI (0x0U << GPIO_PINWKEN_WKISEL_Pos) +#define FL_GPIO_WAKEUP_INT_ENTRY_38 (0x1U << GPIO_PINWKEN_WKISEL_Pos) + + +#define FL_GPIO_WAKEUP_TRIGGER_RISING (0x1U << GPIO_PINWKEN_SEL_Pos) +#define FL_GPIO_WAKEUP_TRIGGER_FALLING (0x0U << GPIO_PINWKEN_SEL_Pos) +#define FL_GPIO_WAKEUP_TRIGGER_BOTH (0x2U << GPIO_PINWKEN_SEL_Pos) + + +/** + * @} + */ +/* Exported functions ---------------------------------------------------------------------------------*/ +/** @defgroup GPIO_FL_Exported_Functions GPIO Exported Functions + * @{ + */ + +/** + * @brief GPIOx input enable + * @rmtoll INEN FL_GPIO_EnablePinInput + * @param GPIOx GPIO Port + * @param pin This parameter can be one of the following values: + * @arg @ref FL_GPIO_PIN_0 + * @arg @ref FL_GPIO_PIN_1 + * @arg @ref FL_GPIO_PIN_2 + * @arg @ref FL_GPIO_PIN_3 + * @arg @ref FL_GPIO_PIN_4 + * @arg @ref FL_GPIO_PIN_5 + * @arg @ref FL_GPIO_PIN_6 + * @arg @ref FL_GPIO_PIN_7 + * @arg @ref FL_GPIO_PIN_8 + * @arg @ref FL_GPIO_PIN_9 + * @arg @ref FL_GPIO_PIN_10 + * @arg @ref FL_GPIO_PIN_11 + * @arg @ref FL_GPIO_PIN_12 + * @arg @ref FL_GPIO_PIN_13 + * @arg @ref FL_GPIO_PIN_14 + * @arg @ref FL_GPIO_PIN_15 + * @arg @ref FL_GPIO_PIN_ALL + * @retval None + */ +__STATIC_INLINE void FL_GPIO_EnablePinInput(GPIO_Type *GPIOx, uint32_t pin) +{ + SET_BIT(GPIOx->INEN, ((pin & 0xffff) << 0x0U)); +} + +/** + * @brief CPIOx input disable + * @rmtoll INEN FL_GPIO_DisablePinInput + * @param GPIOx GPIO Port + * @param pin This parameter can be one of the following values: + * @arg @ref FL_GPIO_PIN_0 + * @arg @ref FL_GPIO_PIN_1 + * @arg @ref FL_GPIO_PIN_2 + * @arg @ref FL_GPIO_PIN_3 + * @arg @ref FL_GPIO_PIN_4 + * @arg @ref FL_GPIO_PIN_5 + * @arg @ref FL_GPIO_PIN_6 + * @arg @ref FL_GPIO_PIN_7 + * @arg @ref FL_GPIO_PIN_8 + * @arg @ref FL_GPIO_PIN_9 + * @arg @ref FL_GPIO_PIN_10 + * @arg @ref FL_GPIO_PIN_11 + * @arg @ref FL_GPIO_PIN_12 + * @arg @ref FL_GPIO_PIN_13 + * @arg @ref FL_GPIO_PIN_14 + * @arg @ref FL_GPIO_PIN_15 + * @arg @ref FL_GPIO_PIN_ALL + * @retval None + */ +__STATIC_INLINE void FL_GPIO_DisablePinInput(GPIO_Type *GPIOx, uint32_t pin) +{ + CLEAR_BIT(GPIOx->INEN, ((pin & 0xffff) << 0x0U)); +} + +/** + * @brief Get GPIOx input enable status + * @rmtoll INEN FL_GPIO_IsEnabledPinInput + * @param GPIOx GPIO Port + * @param pin This parameter can be one of the following values: + * @arg @ref FL_GPIO_PIN_0 + * @arg @ref FL_GPIO_PIN_1 + * @arg @ref FL_GPIO_PIN_2 + * @arg @ref FL_GPIO_PIN_3 + * @arg @ref FL_GPIO_PIN_4 + * @arg @ref FL_GPIO_PIN_5 + * @arg @ref FL_GPIO_PIN_6 + * @arg @ref FL_GPIO_PIN_7 + * @arg @ref FL_GPIO_PIN_8 + * @arg @ref FL_GPIO_PIN_9 + * @arg @ref FL_GPIO_PIN_10 + * @arg @ref FL_GPIO_PIN_11 + * @arg @ref FL_GPIO_PIN_12 + * @arg @ref FL_GPIO_PIN_13 + * @arg @ref FL_GPIO_PIN_14 + * @arg @ref FL_GPIO_PIN_15 + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_GPIO_IsEnabledPinInput(GPIO_Type *GPIOx, uint32_t pin) +{ + return (uint32_t)(READ_BIT(GPIOx->INEN, ((pin & 0xffff) << 0x0U)) == ((pin & 0xffff) << 0x0U)); +} + +/** + * @brief GPIOx Pull-Up enable + * @rmtoll PUEN FL_GPIO_EnablePinPullup + * @param GPIOx GPIO Port + * @param pin This parameter can be one of the following values: + * @arg @ref FL_GPIO_PIN_0 + * @arg @ref FL_GPIO_PIN_1 + * @arg @ref FL_GPIO_PIN_2 + * @arg @ref FL_GPIO_PIN_3 + * @arg @ref FL_GPIO_PIN_4 + * @arg @ref FL_GPIO_PIN_5 + * @arg @ref FL_GPIO_PIN_6 + * @arg @ref FL_GPIO_PIN_7 + * @arg @ref FL_GPIO_PIN_8 + * @arg @ref FL_GPIO_PIN_9 + * @arg @ref FL_GPIO_PIN_10 + * @arg @ref FL_GPIO_PIN_11 + * @arg @ref FL_GPIO_PIN_12 + * @arg @ref FL_GPIO_PIN_13 + * @arg @ref FL_GPIO_PIN_14 + * @arg @ref FL_GPIO_PIN_15 + * @arg @ref FL_GPIO_PIN_ALL + * @retval None + */ +__STATIC_INLINE void FL_GPIO_EnablePinPullup(GPIO_Type *GPIOx, uint32_t pin) +{ + SET_BIT(GPIOx->PUEN, ((pin & 0xffff) << 0x0U)); +} + +/** + * @brief GPIOx Pull-Up disable + * @rmtoll PUEN FL_GPIO_DisablePinPullup + * @param GPIOx GPIO Port + * @param pin This parameter can be one of the following values: + * @arg @ref FL_GPIO_PIN_0 + * @arg @ref FL_GPIO_PIN_1 + * @arg @ref FL_GPIO_PIN_2 + * @arg @ref FL_GPIO_PIN_3 + * @arg @ref FL_GPIO_PIN_4 + * @arg @ref FL_GPIO_PIN_5 + * @arg @ref FL_GPIO_PIN_6 + * @arg @ref FL_GPIO_PIN_7 + * @arg @ref FL_GPIO_PIN_8 + * @arg @ref FL_GPIO_PIN_9 + * @arg @ref FL_GPIO_PIN_10 + * @arg @ref FL_GPIO_PIN_11 + * @arg @ref FL_GPIO_PIN_12 + * @arg @ref FL_GPIO_PIN_13 + * @arg @ref FL_GPIO_PIN_14 + * @arg @ref FL_GPIO_PIN_15 + * @arg @ref FL_GPIO_PIN_ALL + * @retval None + */ +__STATIC_INLINE void FL_GPIO_DisablePinPullup(GPIO_Type *GPIOx, uint32_t pin) +{ + CLEAR_BIT(GPIOx->PUEN, ((pin & 0xffff) << 0x0U)); +} + +/** + * @brief Get GPIOx Pull-Up enable status + * @rmtoll PUEN FL_GPIO_IsEnabledPinPullup + * @param GPIOx GPIO Port + * @param pin This parameter can be one of the following values: + * @arg @ref FL_GPIO_PIN_0 + * @arg @ref FL_GPIO_PIN_1 + * @arg @ref FL_GPIO_PIN_2 + * @arg @ref FL_GPIO_PIN_3 + * @arg @ref FL_GPIO_PIN_4 + * @arg @ref FL_GPIO_PIN_5 + * @arg @ref FL_GPIO_PIN_6 + * @arg @ref FL_GPIO_PIN_7 + * @arg @ref FL_GPIO_PIN_8 + * @arg @ref FL_GPIO_PIN_9 + * @arg @ref FL_GPIO_PIN_10 + * @arg @ref FL_GPIO_PIN_11 + * @arg @ref FL_GPIO_PIN_12 + * @arg @ref FL_GPIO_PIN_13 + * @arg @ref FL_GPIO_PIN_14 + * @arg @ref FL_GPIO_PIN_15 + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_GPIO_IsEnabledPinPullup(GPIO_Type *GPIOx, uint32_t pin) +{ + return (uint32_t)(READ_BIT(GPIOx->PUEN, ((pin & 0xffff) << 0x0U)) == ((pin & 0xffff) << 0x0U)); +} + +/** + * @brief GPIOx Open-Drain enable + * @rmtoll ODEN FL_GPIO_EnablePinOpenDrain + * @param GPIOx GPIO Port + * @param pin This parameter can be one of the following values: + * @arg @ref FL_GPIO_PIN_0 + * @arg @ref FL_GPIO_PIN_1 + * @arg @ref FL_GPIO_PIN_2 + * @arg @ref FL_GPIO_PIN_3 + * @arg @ref FL_GPIO_PIN_4 + * @arg @ref FL_GPIO_PIN_5 + * @arg @ref FL_GPIO_PIN_6 + * @arg @ref FL_GPIO_PIN_7 + * @arg @ref FL_GPIO_PIN_8 + * @arg @ref FL_GPIO_PIN_9 + * @arg @ref FL_GPIO_PIN_10 + * @arg @ref FL_GPIO_PIN_11 + * @arg @ref FL_GPIO_PIN_12 + * @arg @ref FL_GPIO_PIN_13 + * @arg @ref FL_GPIO_PIN_14 + * @arg @ref FL_GPIO_PIN_15 + * @arg @ref FL_GPIO_PIN_ALL + * @retval None + */ +__STATIC_INLINE void FL_GPIO_EnablePinOpenDrain(GPIO_Type *GPIOx, uint32_t pin) +{ + SET_BIT(GPIOx->ODEN, ((pin & 0xffff) << 0x0U)); +} + +/** + * @brief Open-Drain disable + * @rmtoll ODEN FL_GPIO_DisablePinOpenDrain + * @param GPIOx GPIO Port + * @param pin This parameter can be one of the following values: + * @arg @ref FL_GPIO_PIN_0 + * @arg @ref FL_GPIO_PIN_1 + * @arg @ref FL_GPIO_PIN_2 + * @arg @ref FL_GPIO_PIN_3 + * @arg @ref FL_GPIO_PIN_4 + * @arg @ref FL_GPIO_PIN_5 + * @arg @ref FL_GPIO_PIN_6 + * @arg @ref FL_GPIO_PIN_7 + * @arg @ref FL_GPIO_PIN_8 + * @arg @ref FL_GPIO_PIN_9 + * @arg @ref FL_GPIO_PIN_10 + * @arg @ref FL_GPIO_PIN_11 + * @arg @ref FL_GPIO_PIN_12 + * @arg @ref FL_GPIO_PIN_13 + * @arg @ref FL_GPIO_PIN_14 + * @arg @ref FL_GPIO_PIN_15 + * @arg @ref FL_GPIO_PIN_ALL + * @retval None + */ +__STATIC_INLINE void FL_GPIO_DisablePinOpenDrain(GPIO_Type *GPIOx, uint32_t pin) +{ + CLEAR_BIT(GPIOx->ODEN, ((pin & 0xffff) << 0x0U)); +} + +/** + * @brief Get Open-Drain enable status + * @rmtoll ODEN FL_GPIO_IsEnabledPinOpenDrain + * @param GPIOx GPIO Port + * @param pin This parameter can be one of the following values: + * @arg @ref FL_GPIO_PIN_0 + * @arg @ref FL_GPIO_PIN_1 + * @arg @ref FL_GPIO_PIN_2 + * @arg @ref FL_GPIO_PIN_3 + * @arg @ref FL_GPIO_PIN_4 + * @arg @ref FL_GPIO_PIN_5 + * @arg @ref FL_GPIO_PIN_6 + * @arg @ref FL_GPIO_PIN_7 + * @arg @ref FL_GPIO_PIN_8 + * @arg @ref FL_GPIO_PIN_9 + * @arg @ref FL_GPIO_PIN_10 + * @arg @ref FL_GPIO_PIN_11 + * @arg @ref FL_GPIO_PIN_12 + * @arg @ref FL_GPIO_PIN_13 + * @arg @ref FL_GPIO_PIN_14 + * @arg @ref FL_GPIO_PIN_15 + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_GPIO_IsEnabledPinOpenDrain(GPIO_Type *GPIOx, uint32_t pin) +{ + return (uint32_t)(READ_BIT(GPIOx->ODEN, ((pin & 0xffff) << 0x0U)) == ((pin & 0xffff) << 0x0U)); +} + +/** + * @brief GPIOx digital function enable + * @rmtoll DFS FL_GPIO_EnablePinRemap + * @param GPIOx GPIO Port + * @param pin This parameter can be one of the following values: + * @arg @ref FL_GPIO_PIN_0 + * @arg @ref FL_GPIO_PIN_1 + * @arg @ref FL_GPIO_PIN_2 + * @arg @ref FL_GPIO_PIN_3 + * @arg @ref FL_GPIO_PIN_4 + * @arg @ref FL_GPIO_PIN_5 + * @arg @ref FL_GPIO_PIN_6 + * @arg @ref FL_GPIO_PIN_7 + * @arg @ref FL_GPIO_PIN_8 + * @arg @ref FL_GPIO_PIN_9 + * @arg @ref FL_GPIO_PIN_10 + * @arg @ref FL_GPIO_PIN_11 + * @arg @ref FL_GPIO_PIN_12 + * @arg @ref FL_GPIO_PIN_13 + * @arg @ref FL_GPIO_PIN_14 + * @arg @ref FL_GPIO_PIN_15 + * @arg @ref FL_GPIO_PIN_ALL + * @retval None + */ +__STATIC_INLINE void FL_GPIO_EnablePinRemap(GPIO_Type *GPIOx, uint32_t pin) +{ + SET_BIT(GPIOx->DFS, ((pin & 0xffff) << 0x0U)); +} + +/** + * @brief GPIOx digital function disable + * @rmtoll DFS FL_GPIO_DisablePinRemap + * @param GPIOx GPIO Port + * @param pin This parameter can be one of the following values: + * @arg @ref FL_GPIO_PIN_0 + * @arg @ref FL_GPIO_PIN_1 + * @arg @ref FL_GPIO_PIN_2 + * @arg @ref FL_GPIO_PIN_3 + * @arg @ref FL_GPIO_PIN_4 + * @arg @ref FL_GPIO_PIN_5 + * @arg @ref FL_GPIO_PIN_6 + * @arg @ref FL_GPIO_PIN_7 + * @arg @ref FL_GPIO_PIN_8 + * @arg @ref FL_GPIO_PIN_9 + * @arg @ref FL_GPIO_PIN_10 + * @arg @ref FL_GPIO_PIN_11 + * @arg @ref FL_GPIO_PIN_12 + * @arg @ref FL_GPIO_PIN_13 + * @arg @ref FL_GPIO_PIN_14 + * @arg @ref FL_GPIO_PIN_15 + * @arg @ref FL_GPIO_PIN_ALL + * @retval None + */ +__STATIC_INLINE void FL_GPIO_DisablePinRemap(GPIO_Type *GPIOx, uint32_t pin) +{ + CLEAR_BIT(GPIOx->DFS, ((pin & 0xffff) << 0x0U)); +} + +/** + * @brief Get GPIOx digital function enable status + * @rmtoll DFS FL_GPIO_IsEnabledPinRemap + * @param GPIOx GPIO Port + * @param pin This parameter can be one of the following values: + * @arg @ref FL_GPIO_PIN_0 + * @arg @ref FL_GPIO_PIN_1 + * @arg @ref FL_GPIO_PIN_2 + * @arg @ref FL_GPIO_PIN_3 + * @arg @ref FL_GPIO_PIN_4 + * @arg @ref FL_GPIO_PIN_5 + * @arg @ref FL_GPIO_PIN_6 + * @arg @ref FL_GPIO_PIN_7 + * @arg @ref FL_GPIO_PIN_8 + * @arg @ref FL_GPIO_PIN_9 + * @arg @ref FL_GPIO_PIN_10 + * @arg @ref FL_GPIO_PIN_11 + * @arg @ref FL_GPIO_PIN_12 + * @arg @ref FL_GPIO_PIN_13 + * @arg @ref FL_GPIO_PIN_14 + * @arg @ref FL_GPIO_PIN_15 + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_GPIO_IsEnabledPinRemap(GPIO_Type *GPIOx, uint32_t pin) +{ + return (uint32_t)(READ_BIT(GPIOx->DFS, ((pin & 0xffff) << 0x0U)) == ((pin & 0xffff) << 0x0U)); +} + +/** + * @brief GPIOx analog channel enable + * @rmtoll ANEN FL_GPIO_EnablePinAnalogSwitch + * @param GPIOx GPIO Port + * @param pin This parameter can be one of the following values: + * @arg @ref FL_GPIO_PIN_0 + * @arg @ref FL_GPIO_PIN_1 + * @arg @ref FL_GPIO_PIN_2 + * @arg @ref FL_GPIO_PIN_3 + * @arg @ref FL_GPIO_PIN_4 + * @arg @ref FL_GPIO_PIN_5 + * @arg @ref FL_GPIO_PIN_6 + * @arg @ref FL_GPIO_PIN_7 + * @arg @ref FL_GPIO_PIN_8 + * @arg @ref FL_GPIO_PIN_9 + * @arg @ref FL_GPIO_PIN_10 + * @arg @ref FL_GPIO_PIN_11 + * @arg @ref FL_GPIO_PIN_12 + * @arg @ref FL_GPIO_PIN_13 + * @arg @ref FL_GPIO_PIN_14 + * @arg @ref FL_GPIO_PIN_15 + * @arg @ref FL_GPIO_PIN_ALL + * @retval None + */ +__STATIC_INLINE void FL_GPIO_EnablePinAnalogSwitch(GPIO_Type *GPIOx, uint32_t pin) +{ + SET_BIT(GPIOx->ANEN, ((pin & 0xffff) << 0x0U)); +} + +/** + * @brief GPIOx analog channel disable + * @rmtoll ANEN FL_GPIO_DisablePinAnalogSwitch + * @param GPIOx GPIO Port + * @param pin This parameter can be one of the following values: + * @arg @ref FL_GPIO_PIN_0 + * @arg @ref FL_GPIO_PIN_1 + * @arg @ref FL_GPIO_PIN_2 + * @arg @ref FL_GPIO_PIN_3 + * @arg @ref FL_GPIO_PIN_4 + * @arg @ref FL_GPIO_PIN_5 + * @arg @ref FL_GPIO_PIN_6 + * @arg @ref FL_GPIO_PIN_7 + * @arg @ref FL_GPIO_PIN_8 + * @arg @ref FL_GPIO_PIN_9 + * @arg @ref FL_GPIO_PIN_10 + * @arg @ref FL_GPIO_PIN_11 + * @arg @ref FL_GPIO_PIN_12 + * @arg @ref FL_GPIO_PIN_13 + * @arg @ref FL_GPIO_PIN_14 + * @arg @ref FL_GPIO_PIN_15 + * @arg @ref FL_GPIO_PIN_ALL + * @retval None + */ +__STATIC_INLINE void FL_GPIO_DisablePinAnalogSwitch(GPIO_Type *GPIOx, uint32_t pin) +{ + CLEAR_BIT(GPIOx->ANEN, ((pin & 0xffff) << 0x0U)); +} + +/** + * @brief Get GPIOx analog channel enable status + * @rmtoll ANEN FL_GPIO_IsEnabledPinAnalogSwitch + * @param GPIOx GPIO Port + * @param pin This parameter can be one of the following values: + * @arg @ref FL_GPIO_PIN_0 + * @arg @ref FL_GPIO_PIN_1 + * @arg @ref FL_GPIO_PIN_2 + * @arg @ref FL_GPIO_PIN_3 + * @arg @ref FL_GPIO_PIN_4 + * @arg @ref FL_GPIO_PIN_5 + * @arg @ref FL_GPIO_PIN_6 + * @arg @ref FL_GPIO_PIN_7 + * @arg @ref FL_GPIO_PIN_8 + * @arg @ref FL_GPIO_PIN_9 + * @arg @ref FL_GPIO_PIN_10 + * @arg @ref FL_GPIO_PIN_11 + * @arg @ref FL_GPIO_PIN_12 + * @arg @ref FL_GPIO_PIN_13 + * @arg @ref FL_GPIO_PIN_14 + * @arg @ref FL_GPIO_PIN_15 + * @arg @ref FL_GPIO_PIN_ALL + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_GPIO_IsEnabledPinAnalogSwitch(GPIO_Type *GPIOx, uint32_t pin) +{ + return (uint32_t)(READ_BIT(GPIOx->ANEN, ((pin & 0xffff) << 0x0U)) == ((pin & 0xffff) << 0x0U)); +} + +/** + * @brief Set Portx mode + * @rmtoll FCR FL_GPIO_SetPinMode + * @param GPIOx GPIO Port + * @param pin This parameter can be one of the following values: + * @arg @ref FL_GPIO_PIN_0 + * @arg @ref FL_GPIO_PIN_1 + * @arg @ref FL_GPIO_PIN_2 + * @arg @ref FL_GPIO_PIN_3 + * @arg @ref FL_GPIO_PIN_4 + * @arg @ref FL_GPIO_PIN_5 + * @arg @ref FL_GPIO_PIN_6 + * @arg @ref FL_GPIO_PIN_7 + * @arg @ref FL_GPIO_PIN_8 + * @arg @ref FL_GPIO_PIN_9 + * @arg @ref FL_GPIO_PIN_10 + * @arg @ref FL_GPIO_PIN_11 + * @arg @ref FL_GPIO_PIN_12 + * @arg @ref FL_GPIO_PIN_13 + * @arg @ref FL_GPIO_PIN_14 + * @arg @ref FL_GPIO_PIN_15 + * @param mode This parameter can be one of the following values: + * @arg @ref FL_GPIO_MODE_INPUT + * @arg @ref FL_GPIO_MODE_OUTPUT + * @arg @ref FL_GPIO_MODE_DIGITAL + * @arg @ref FL_GPIO_MODE_ANALOG + * @retval None + */ +__STATIC_INLINE void FL_GPIO_SetPinMode(GPIO_Type *GPIOx, uint32_t pin, uint32_t mode) +{ + MODIFY_REG(GPIOx->FCR, ((pin * pin) * GPIO_FCR), ((pin * pin) * mode)); +} + +/** + * @brief Get Portx mode + * @rmtoll FCR FL_GPIO_GetPinMode + * @param GPIOx GPIO Port + * @param Pin This parameter can be one of the following values: + * @arg @ref FL_GPIO_PIN_0 + * @arg @ref FL_GPIO_PIN_1 + * @arg @ref FL_GPIO_PIN_2 + * @arg @ref FL_GPIO_PIN_3 + * @arg @ref FL_GPIO_PIN_4 + * @arg @ref FL_GPIO_PIN_5 + * @arg @ref FL_GPIO_PIN_6 + * @arg @ref FL_GPIO_PIN_7 + * @arg @ref FL_GPIO_PIN_8 + * @arg @ref FL_GPIO_PIN_9 + * @arg @ref FL_GPIO_PIN_10 + * @arg @ref FL_GPIO_PIN_11 + * @arg @ref FL_GPIO_PIN_12 + * @arg @ref FL_GPIO_PIN_13 + * @arg @ref FL_GPIO_PIN_14 + * @arg @ref FL_GPIO_PIN_15 + * @retval Returned value can be one of the following values: + * @arg @ref FL_GPIO_MODE_INPUT + * @arg @ref FL_GPIO_MODE_OUTPUT + * @arg @ref FL_GPIO_MODE_DIGITAL + * @arg @ref FL_GPIO_MODE_ANALOG + */ +__STATIC_INLINE uint32_t FL_GPIO_GetPinMode(GPIO_Type *GPIOx, uint32_t Pin) +{ + return (uint32_t)(READ_BIT(GPIOx->FCR, ((Pin * Pin) * GPIO_FCR)) / (Pin * Pin)); +} + +/** + * @brief Set GPIO output data + * @rmtoll DO FL_GPIO_WriteOutputPort + * @param GPIOx GPIO Port + * @param output Level value for each pin of the port + * @retval None + */ +__STATIC_INLINE void FL_GPIO_WriteOutputPort(GPIO_Type *GPIOx, uint32_t output) +{ + MODIFY_REG(GPIOx->DO, (0xffffU << 0U), (output << 0U)); +} + +/** + * @brief Get GPIO output data + * @rmtoll DO FL_GPIO_ReadOutputPort + * @param GPIOx GPIO Port + * @retval Output data register value of port + */ +__STATIC_INLINE uint32_t FL_GPIO_ReadOutputPort(GPIO_Type *GPIOx) +{ + return (uint32_t)(READ_BIT(GPIOx->DO, (0xffffU << 0U)) >> 0U); +} + +/** + * @brief Get GPIO output pin status + * @rmtoll DO FL_GPIO_GetOutputPin + * @param GPIOx GPIO Port + * @param pin This parameter can be one of the following values: + * @arg @ref FL_GPIO_PIN_0 + * @arg @ref FL_GPIO_PIN_1 + * @arg @ref FL_GPIO_PIN_2 + * @arg @ref FL_GPIO_PIN_3 + * @arg @ref FL_GPIO_PIN_4 + * @arg @ref FL_GPIO_PIN_5 + * @arg @ref FL_GPIO_PIN_6 + * @arg @ref FL_GPIO_PIN_7 + * @arg @ref FL_GPIO_PIN_8 + * @arg @ref FL_GPIO_PIN_9 + * @arg @ref FL_GPIO_PIN_10 + * @arg @ref FL_GPIO_PIN_11 + * @arg @ref FL_GPIO_PIN_12 + * @arg @ref FL_GPIO_PIN_13 + * @arg @ref FL_GPIO_PIN_14 + * @arg @ref FL_GPIO_PIN_15 + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_GPIO_GetOutputPin(GPIO_Type *GPIOx, uint32_t pin) +{ + return (uint32_t)(READ_BIT(GPIOx->DO, ((pin & 0xffff) << 0x0U)) == ((pin & 0xffff) << 0x0U)); +} + +/** + * @brief Toggle output pin + * @rmtoll DO FL_GPIO_ToggleOutputPin + * @param GPIOx GPIO Port + * @param pin This parameter can be one of the following values: + * @arg @ref FL_GPIO_PIN_0 + * @arg @ref FL_GPIO_PIN_1 + * @arg @ref FL_GPIO_PIN_2 + * @arg @ref FL_GPIO_PIN_3 + * @arg @ref FL_GPIO_PIN_4 + * @arg @ref FL_GPIO_PIN_5 + * @arg @ref FL_GPIO_PIN_6 + * @arg @ref FL_GPIO_PIN_7 + * @arg @ref FL_GPIO_PIN_8 + * @arg @ref FL_GPIO_PIN_9 + * @arg @ref FL_GPIO_PIN_10 + * @arg @ref FL_GPIO_PIN_11 + * @arg @ref FL_GPIO_PIN_12 + * @arg @ref FL_GPIO_PIN_13 + * @arg @ref FL_GPIO_PIN_14 + * @arg @ref FL_GPIO_PIN_15 + * @arg @ref FL_GPIO_PIN_ALL + * @retval None + */ +__STATIC_INLINE void FL_GPIO_ToggleOutputPin(GPIO_Type *GPIOx, uint32_t pin) +{ + if(pin&GPIOx->DO) + { + WRITE_REG(GPIOx->DRST, pin); + } + else + { + WRITE_REG(GPIOx->DSET, pin); + } +} + +/** + * @brief Get input data + * @rmtoll DIN FL_GPIO_ReadInputPort + * @param GPIOx GPIO Port + * @retval Input data register value of port + */ +__STATIC_INLINE uint32_t FL_GPIO_ReadInputPort(GPIO_Type *GPIOx) +{ + return (uint32_t)(READ_BIT(GPIOx->DIN, (0xffffU << 0U)) >> 0U); +} + +/** + * @brief Get GPIO input set status + * @rmtoll DIN FL_GPIO_GetInputPin + * @param GPIOx GPIO Port + * @param pin This parameter can be one of the following values: + * @arg @ref FL_GPIO_PIN_0 + * @arg @ref FL_GPIO_PIN_1 + * @arg @ref FL_GPIO_PIN_2 + * @arg @ref FL_GPIO_PIN_3 + * @arg @ref FL_GPIO_PIN_4 + * @arg @ref FL_GPIO_PIN_5 + * @arg @ref FL_GPIO_PIN_6 + * @arg @ref FL_GPIO_PIN_7 + * @arg @ref FL_GPIO_PIN_8 + * @arg @ref FL_GPIO_PIN_9 + * @arg @ref FL_GPIO_PIN_10 + * @arg @ref FL_GPIO_PIN_11 + * @arg @ref FL_GPIO_PIN_12 + * @arg @ref FL_GPIO_PIN_13 + * @arg @ref FL_GPIO_PIN_14 + * @arg @ref FL_GPIO_PIN_15 + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_GPIO_GetInputPin(GPIO_Type *GPIOx, uint32_t pin) +{ + return (uint32_t)(READ_BIT(GPIOx->DIN, ((pin & 0xffff) << 0x0U)) == ((pin & 0xffff) << 0x0U)); +} + +/** + * @brief Set pin output 1 + * @rmtoll DSET FL_GPIO_SetOutputPin + * @param GPIOx GPIO Port + * @param pin This parameter can be one of the following values: + * @arg @ref FL_GPIO_PIN_0 + * @arg @ref FL_GPIO_PIN_1 + * @arg @ref FL_GPIO_PIN_2 + * @arg @ref FL_GPIO_PIN_3 + * @arg @ref FL_GPIO_PIN_4 + * @arg @ref FL_GPIO_PIN_5 + * @arg @ref FL_GPIO_PIN_6 + * @arg @ref FL_GPIO_PIN_7 + * @arg @ref FL_GPIO_PIN_8 + * @arg @ref FL_GPIO_PIN_9 + * @arg @ref FL_GPIO_PIN_10 + * @arg @ref FL_GPIO_PIN_11 + * @arg @ref FL_GPIO_PIN_12 + * @arg @ref FL_GPIO_PIN_13 + * @arg @ref FL_GPIO_PIN_14 + * @arg @ref FL_GPIO_PIN_15 + * @arg @ref FL_GPIO_PIN_ALL + * @retval None + */ +__STATIC_INLINE void FL_GPIO_SetOutputPin(GPIO_Type *GPIOx, uint32_t pin) +{ + SET_BIT(GPIOx->DSET, ((pin & 0xffff) << 0x0U)); +} + +/** + * @brief Set pin output 0 + * @rmtoll DRST FL_GPIO_ResetOutputPin + * @param GPIOx GPIO Port + * @param pin This parameter can be one of the following values: + * @arg @ref FL_GPIO_PIN_0 + * @arg @ref FL_GPIO_PIN_1 + * @arg @ref FL_GPIO_PIN_2 + * @arg @ref FL_GPIO_PIN_3 + * @arg @ref FL_GPIO_PIN_4 + * @arg @ref FL_GPIO_PIN_5 + * @arg @ref FL_GPIO_PIN_6 + * @arg @ref FL_GPIO_PIN_7 + * @arg @ref FL_GPIO_PIN_8 + * @arg @ref FL_GPIO_PIN_9 + * @arg @ref FL_GPIO_PIN_10 + * @arg @ref FL_GPIO_PIN_11 + * @arg @ref FL_GPIO_PIN_12 + * @arg @ref FL_GPIO_PIN_13 + * @arg @ref FL_GPIO_PIN_14 + * @arg @ref FL_GPIO_PIN_15 + * @arg @ref FL_GPIO_PIN_ALL + * @retval None + */ +__STATIC_INLINE void FL_GPIO_ResetOutputPin(GPIO_Type *GPIOx, uint32_t pin) +{ + SET_BIT(GPIOx->DRST, ((pin & 0xffff) << 0x0U)); +} + +/** + * @brief EXTI edge0 select + * @rmtoll EXTIEDS0 FL_GPIO_SetTriggerEdge0 + * @param GPIOx GPIO Port + * @param line This parameter can be one of the following values: + * @arg @ref FL_GPIO_EXTI_LINE_0 + * @arg @ref FL_GPIO_EXTI_LINE_1 + * @arg @ref FL_GPIO_EXTI_LINE_2 + * @arg @ref FL_GPIO_EXTI_LINE_3 + * @arg @ref FL_GPIO_EXTI_LINE_4 + * @arg @ref FL_GPIO_EXTI_LINE_5 + * @arg @ref FL_GPIO_EXTI_LINE_6 + * @arg @ref FL_GPIO_EXTI_LINE_7 + * @arg @ref FL_GPIO_EXTI_LINE_8 + * @arg @ref FL_GPIO_EXTI_LINE_9 + * @arg @ref FL_GPIO_EXTI_LINE_10 + * @arg @ref FL_GPIO_EXTI_LINE_11 + * @arg @ref FL_GPIO_EXTI_LINE_12 + * @arg @ref FL_GPIO_EXTI_LINE_13 + * @arg @ref FL_GPIO_EXTI_LINE_14 + * @arg @ref FL_GPIO_EXTI_LINE_15 + * @param edge This parameter can be one of the following values: + * @arg @ref FL_GPIO_EXTI_TRIGGER_EDGE_RISING + * @arg @ref FL_GPIO_EXTI_TRIGGER_EDGE_FALLING + * @arg @ref FL_GPIO_EXTI_TRIGGER_EDGE_BOTH + * @arg @ref FL_GPIO_EXTI_TRIGGER_EDGE_DISABLE + * @retval None + */ +__STATIC_INLINE void FL_GPIO_SetTriggerEdge0(GPIO_COMMON_Type *GPIOx, uint32_t line, uint32_t edge) +{ + MODIFY_REG(GPIOx->EXTIEDS0, ((line * line) * GPIO_EXTIEDS0), ((line * line) * edge)); +} + +/** + * @brief Get EXTI edge0 select + * @rmtoll EXTIEDS0 FL_GPIO_GetTriggerEdge0 + * @param GPIOx GPIO Port + * @param line This parameter can be one of the following values: + * @arg @ref FL_GPIO_EXTI_LINE_0 + * @arg @ref FL_GPIO_EXTI_LINE_1 + * @arg @ref FL_GPIO_EXTI_LINE_2 + * @arg @ref FL_GPIO_EXTI_LINE_3 + * @arg @ref FL_GPIO_EXTI_LINE_4 + * @arg @ref FL_GPIO_EXTI_LINE_5 + * @arg @ref FL_GPIO_EXTI_LINE_6 + * @arg @ref FL_GPIO_EXTI_LINE_7 + * @arg @ref FL_GPIO_EXTI_LINE_8 + * @arg @ref FL_GPIO_EXTI_LINE_9 + * @arg @ref FL_GPIO_EXTI_LINE_10 + * @arg @ref FL_GPIO_EXTI_LINE_11 + * @arg @ref FL_GPIO_EXTI_LINE_12 + * @arg @ref FL_GPIO_EXTI_LINE_13 + * @arg @ref FL_GPIO_EXTI_LINE_14 + * @arg @ref FL_GPIO_EXTI_LINE_15 + * @retval Returned value can be one of the following values: + * @arg @ref FL_GPIO_EXTI_TRIGGER_EDGE_RISING + * @arg @ref FL_GPIO_EXTI_TRIGGER_EDGE_FALLING + * @arg @ref FL_GPIO_EXTI_TRIGGER_EDGE_BOTH + * @arg @ref FL_GPIO_EXTI_TRIGGER_EDGE_DISABLE + */ +__STATIC_INLINE uint32_t FL_GPIO_GetTriggerEdge0(GPIO_COMMON_Type *GPIOx, uint32_t line) +{ + return (uint32_t)(READ_BIT(GPIOx->EXTIEDS0, ((line * line) * GPIO_EXTIEDS0)) / (line * line)); +} + +/** + * @brief EXTI edge1 select + * @rmtoll EXTIEDS1 FL_GPIO_SetTriggerEdge1 + * @param GPIOx GPIO Port + * @param line This parameter can be one of the following values: + * @arg @ref FL_GPIO_EXTI_LINE_16 + * @arg @ref FL_GPIO_EXTI_LINE_17 + * @arg @ref FL_GPIO_EXTI_LINE_18 + * @param edge This parameter can be one of the following values: + * @arg @ref FL_GPIO_EXTI_TRIGGER_EDGE_RISING + * @arg @ref FL_GPIO_EXTI_TRIGGER_EDGE_FALLING + * @arg @ref FL_GPIO_EXTI_TRIGGER_EDGE_BOTH + * @arg @ref FL_GPIO_EXTI_TRIGGER_EDGE_DISABLE + * @retval None + */ +__STATIC_INLINE void FL_GPIO_SetTriggerEdge1(GPIO_COMMON_Type *GPIOx, uint32_t line, uint32_t edge) +{ + MODIFY_REG(GPIOx->EXTIEDS1, (((line >> 16) * (line >> 16)) * GPIO_EXTIEDS1), + (((line >> 16) * (line >> 16)) * edge)); +} + +/** + * @brief Get EXTI edge1 select + * @rmtoll EXTIEDS1 FL_GPIO_GetTriggerEdge1 + * @param GPIOx GPIO Port + * @param line This parameter can be one of the following values: + * @arg @ref FL_GPIO_EXTI_LINE_16 + * @arg @ref FL_GPIO_EXTI_LINE_17 + * @arg @ref FL_GPIO_EXTI_LINE_18 + * @retval Returned value can be one of the following values: + * @arg @ref FL_GPIO_EXTI_TRIGGER_EDGE_RISING + * @arg @ref FL_GPIO_EXTI_TRIGGER_EDGE_FALLING + * @arg @ref FL_GPIO_EXTI_TRIGGER_EDGE_BOTH + * @arg @ref FL_GPIO_EXTI_TRIGGER_EDGE_DISABLE + */ +__STATIC_INLINE uint32_t FL_GPIO_GetTriggerEdge1(GPIO_COMMON_Type *GPIOx, uint32_t line) +{ + return (uint32_t)(READ_BIT(GPIOx->EXTIEDS1, + (((line>>16) * (line>>16)) * GPIO_EXTIEDS1)) / ((line>>16) * (line>>16))); +} + +/** + * @brief EXTI digital filter enable + * @rmtoll EXTIDF FL_GPIO_EnableDigitalFilter + * @param GPIOx GPIO Port + * @param line This parameter can be one of the following values: + * @arg @ref FL_GPIO_EXTI_LINE_0 + * @arg @ref FL_GPIO_EXTI_LINE_1 + * @arg @ref FL_GPIO_EXTI_LINE_2 + * @arg @ref FL_GPIO_EXTI_LINE_3 + * @arg @ref FL_GPIO_EXTI_LINE_4 + * @arg @ref FL_GPIO_EXTI_LINE_5 + * @arg @ref FL_GPIO_EXTI_LINE_6 + * @arg @ref FL_GPIO_EXTI_LINE_7 + * @arg @ref FL_GPIO_EXTI_LINE_8 + * @arg @ref FL_GPIO_EXTI_LINE_9 + * @arg @ref FL_GPIO_EXTI_LINE_10 + * @arg @ref FL_GPIO_EXTI_LINE_11 + * @arg @ref FL_GPIO_EXTI_LINE_12 + * @arg @ref FL_GPIO_EXTI_LINE_13 + * @arg @ref FL_GPIO_EXTI_LINE_14 + * @arg @ref FL_GPIO_EXTI_LINE_15 + * @arg @ref FL_GPIO_EXTI_LINE_16 + * @arg @ref FL_GPIO_EXTI_LINE_17 + * @arg @ref FL_GPIO_EXTI_LINE_18 + * @arg @ref FL_GPIO_EXTI_LINE_ALL + * @retval None + */ +__STATIC_INLINE void FL_GPIO_EnableDigitalFilter(GPIO_COMMON_Type *GPIOx, uint32_t line) +{ + SET_BIT(GPIOx->EXTIDF, ((line & 0x7ffff) << 0x0U)); +} + +/** + * @brief EXTI digital filter disable + * @rmtoll EXTIDF FL_GPIO_DisableDigitalFilter + * @param GPIOx GPIO Port + * @param line This parameter can be one of the following values: + * @arg @ref FL_GPIO_EXTI_LINE_0 + * @arg @ref FL_GPIO_EXTI_LINE_1 + * @arg @ref FL_GPIO_EXTI_LINE_2 + * @arg @ref FL_GPIO_EXTI_LINE_3 + * @arg @ref FL_GPIO_EXTI_LINE_4 + * @arg @ref FL_GPIO_EXTI_LINE_5 + * @arg @ref FL_GPIO_EXTI_LINE_6 + * @arg @ref FL_GPIO_EXTI_LINE_7 + * @arg @ref FL_GPIO_EXTI_LINE_8 + * @arg @ref FL_GPIO_EXTI_LINE_9 + * @arg @ref FL_GPIO_EXTI_LINE_10 + * @arg @ref FL_GPIO_EXTI_LINE_11 + * @arg @ref FL_GPIO_EXTI_LINE_12 + * @arg @ref FL_GPIO_EXTI_LINE_13 + * @arg @ref FL_GPIO_EXTI_LINE_14 + * @arg @ref FL_GPIO_EXTI_LINE_15 + * @arg @ref FL_GPIO_EXTI_LINE_16 + * @arg @ref FL_GPIO_EXTI_LINE_17 + * @arg @ref FL_GPIO_EXTI_LINE_18 + * @arg @ref FL_GPIO_EXTI_LINE_ALL + * @retval None + */ +__STATIC_INLINE void FL_GPIO_DisableDigitalFilter(GPIO_COMMON_Type *GPIOx, uint32_t line) +{ + CLEAR_BIT(GPIOx->EXTIDF, ((line & 0x7ffff) << 0x0U)); +} + +/** + * @brief Get EXTI digital filter enable status + * @rmtoll EXTIDF FL_GPIO_IsEnabledDigitalFilter + * @param GPIOx GPIO Port + * @param line This parameter can be one of the following values: + * @arg @ref FL_GPIO_EXTI_LINE_0 + * @arg @ref FL_GPIO_EXTI_LINE_1 + * @arg @ref FL_GPIO_EXTI_LINE_2 + * @arg @ref FL_GPIO_EXTI_LINE_3 + * @arg @ref FL_GPIO_EXTI_LINE_4 + * @arg @ref FL_GPIO_EXTI_LINE_5 + * @arg @ref FL_GPIO_EXTI_LINE_6 + * @arg @ref FL_GPIO_EXTI_LINE_7 + * @arg @ref FL_GPIO_EXTI_LINE_8 + * @arg @ref FL_GPIO_EXTI_LINE_9 + * @arg @ref FL_GPIO_EXTI_LINE_10 + * @arg @ref FL_GPIO_EXTI_LINE_11 + * @arg @ref FL_GPIO_EXTI_LINE_12 + * @arg @ref FL_GPIO_EXTI_LINE_13 + * @arg @ref FL_GPIO_EXTI_LINE_14 + * @arg @ref FL_GPIO_EXTI_LINE_15 + * @arg @ref FL_GPIO_EXTI_LINE_16 + * @arg @ref FL_GPIO_EXTI_LINE_17 + * @arg @ref FL_GPIO_EXTI_LINE_18 + * @arg @ref FL_GPIO_EXTI_LINE_ALL + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_GPIO_IsEnabledDigitalFilter(GPIO_COMMON_Type *GPIOx, uint32_t line) +{ + return (uint32_t)(READ_BIT(GPIOx->EXTIDF, ((line & 0x7ffff) << 0x0U)) == ((line & 0x7ffff) << 0x0U)); +} + +/** + * @brief Get external interrupt flag status + * @rmtoll EXTIISR FL_GPIO_IsActiveFlag_EXTI + * @param GPIOx GPIO Port + * @param line This parameter can be one of the following values: + * @arg @ref FL_GPIO_EXTI_LINE_0 + * @arg @ref FL_GPIO_EXTI_LINE_1 + * @arg @ref FL_GPIO_EXTI_LINE_2 + * @arg @ref FL_GPIO_EXTI_LINE_3 + * @arg @ref FL_GPIO_EXTI_LINE_4 + * @arg @ref FL_GPIO_EXTI_LINE_5 + * @arg @ref FL_GPIO_EXTI_LINE_6 + * @arg @ref FL_GPIO_EXTI_LINE_7 + * @arg @ref FL_GPIO_EXTI_LINE_8 + * @arg @ref FL_GPIO_EXTI_LINE_9 + * @arg @ref FL_GPIO_EXTI_LINE_10 + * @arg @ref FL_GPIO_EXTI_LINE_11 + * @arg @ref FL_GPIO_EXTI_LINE_12 + * @arg @ref FL_GPIO_EXTI_LINE_13 + * @arg @ref FL_GPIO_EXTI_LINE_14 + * @arg @ref FL_GPIO_EXTI_LINE_15 + * @arg @ref FL_GPIO_EXTI_LINE_16 + * @arg @ref FL_GPIO_EXTI_LINE_17 + * @arg @ref FL_GPIO_EXTI_LINE_18 + * @arg @ref FL_GPIO_EXTI_LINE_ALL + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_GPIO_IsActiveFlag_EXTI(GPIO_COMMON_Type *GPIOx, uint32_t line) +{ + return (uint32_t)(READ_BIT(GPIOx->EXTIISR, ((line & 0x7ffff) << 0x0U)) == ((line & 0x7ffff) << 0x0U)); +} + +/** + * @brief Clear external interrupt flag + * @rmtoll EXTIISR FL_GPIO_ClearFlag_EXTI + * @param GPIOx GPIO Port + * @param line This parameter can be one of the following values: + * @arg @ref FL_GPIO_EXTI_LINE_0 + * @arg @ref FL_GPIO_EXTI_LINE_1 + * @arg @ref FL_GPIO_EXTI_LINE_2 + * @arg @ref FL_GPIO_EXTI_LINE_3 + * @arg @ref FL_GPIO_EXTI_LINE_4 + * @arg @ref FL_GPIO_EXTI_LINE_5 + * @arg @ref FL_GPIO_EXTI_LINE_6 + * @arg @ref FL_GPIO_EXTI_LINE_7 + * @arg @ref FL_GPIO_EXTI_LINE_8 + * @arg @ref FL_GPIO_EXTI_LINE_9 + * @arg @ref FL_GPIO_EXTI_LINE_10 + * @arg @ref FL_GPIO_EXTI_LINE_11 + * @arg @ref FL_GPIO_EXTI_LINE_12 + * @arg @ref FL_GPIO_EXTI_LINE_13 + * @arg @ref FL_GPIO_EXTI_LINE_14 + * @arg @ref FL_GPIO_EXTI_LINE_15 + * @arg @ref FL_GPIO_EXTI_LINE_16 + * @arg @ref FL_GPIO_EXTI_LINE_17 + * @arg @ref FL_GPIO_EXTI_LINE_18 + * @arg @ref FL_GPIO_EXTI_LINE_ALL + * @retval None + */ +__STATIC_INLINE void FL_GPIO_ClearFlag_EXTI(GPIO_COMMON_Type *GPIOx, uint32_t line) +{ + WRITE_REG(GPIOx->EXTIISR, ((line & 0x7ffff) << 0x0U)); +} + +/** + * @brief Get EXTI input set status + * @rmtoll EXTIDI FL_GPIO_GetEXTILine + * @param GPIOx GPIO Port + * @param line This parameter can be one of the following values: + * @arg @ref FL_GPIO_EXTI_LINE_0 + * @arg @ref FL_GPIO_EXTI_LINE_1 + * @arg @ref FL_GPIO_EXTI_LINE_2 + * @arg @ref FL_GPIO_EXTI_LINE_3 + * @arg @ref FL_GPIO_EXTI_LINE_4 + * @arg @ref FL_GPIO_EXTI_LINE_5 + * @arg @ref FL_GPIO_EXTI_LINE_6 + * @arg @ref FL_GPIO_EXTI_LINE_7 + * @arg @ref FL_GPIO_EXTI_LINE_8 + * @arg @ref FL_GPIO_EXTI_LINE_9 + * @arg @ref FL_GPIO_EXTI_LINE_10 + * @arg @ref FL_GPIO_EXTI_LINE_11 + * @arg @ref FL_GPIO_EXTI_LINE_12 + * @arg @ref FL_GPIO_EXTI_LINE_13 + * @arg @ref FL_GPIO_EXTI_LINE_14 + * @arg @ref FL_GPIO_EXTI_LINE_15 + * @arg @ref FL_GPIO_EXTI_LINE_16 + * @arg @ref FL_GPIO_EXTI_LINE_17 + * @arg @ref FL_GPIO_EXTI_LINE_18 + * @arg @ref FL_GPIO_EXTI_LINE_ALL + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_GPIO_GetEXTILine(GPIO_COMMON_Type *GPIOx, uint32_t line) +{ + return (uint32_t)(READ_BIT(GPIOx->EXTIDI, ((line & 0x7ffff) << 0x0U)) == ((line & 0x7ffff) << 0x0U)); +} + +/** + * @brief Get EXTI input status + * @rmtoll EXTIDI FL_GPIO_ReadEXTILines + * @param GPIOx GPIO Port + * @retval EXTI data register value of port + */ +__STATIC_INLINE uint32_t FL_GPIO_ReadEXTILines(GPIO_COMMON_Type *GPIOx) +{ + return (uint32_t)(READ_BIT(GPIOx->EXTIDI, (0x7ffffU << 0U)) >> 0U); +} + +/** + * @brief Set FOUT0 frequency output + * @rmtoll FOUTSEL FOUT0 FL_GPIO_SetFOUT0 + * @param GPIOx GPIO Port + * @param select This parameter can be one of the following values: + * @arg @ref FL_GPIO_FOUT0_SELECT_XTLF + * @arg @ref FL_GPIO_FOUT0_SELECT_RCLP + * @arg @ref FL_GPIO_FOUT0_SELECT_RCHF_DIV64 + * @arg @ref FL_GPIO_FOUT0_SELECT_LSCLK + * @arg @ref FL_GPIO_FOUT0_SELECT_AHBCLK_DIV64 + * @arg @ref FL_GPIO_FOUT0_SELECT_RTCTM + * @arg @ref FL_GPIO_FOUT0_SELECT_PLLOUTPUT_DIV64 + * @arg @ref FL_GPIO_FOUT0_SELECT_RTCCLK64HZ + * @arg @ref FL_GPIO_FOUT0_SELECT_APBCLK_DIV64 + * @arg @ref FL_GPIO_FOUT0_SELECT_PLLOUTPUT + * @arg @ref FL_GPIO_FOUT0_SELECT_RCLF + * @arg @ref FL_GPIO_FOUT0_SELECT_RCHF + * @arg @ref FL_GPIO_FOUT0_SELECT_XTHF_DIV64 + * @arg @ref FL_GPIO_FOUT0_SELECT_COMP1O + * @arg @ref FL_GPIO_FOUT0_SELECT_CLK_8K + * @arg @ref FL_GPIO_FOUT0_SELECT_ADC_CLK + * @retval None + */ +__STATIC_INLINE void FL_GPIO_SetFOUT0(GPIO_COMMON_Type *GPIOx, uint32_t select) +{ + MODIFY_REG(GPIOx->FOUTSEL, GPIO_FOUTSEL_FOUT0_Msk, select); +} + +/** + * @brief Get FOUT0 frequency output + * @rmtoll FOUTSEL FOUT0 FL_GPIO_GetFOUT0 + * @param GPIOx GPIO Port + * @retval Returned value can be one of the following values: + * @arg @ref FL_GPIO_FOUT0_SELECT_XTLF + * @arg @ref FL_GPIO_FOUT0_SELECT_RCLP + * @arg @ref FL_GPIO_FOUT0_SELECT_RCHF_DIV64 + * @arg @ref FL_GPIO_FOUT0_SELECT_LSCLK + * @arg @ref FL_GPIO_FOUT0_SELECT_AHBCLK_DIV64 + * @arg @ref FL_GPIO_FOUT0_SELECT_RTCTM + * @arg @ref FL_GPIO_FOUT0_SELECT_PLLOUTPUT_DIV64 + * @arg @ref FL_GPIO_FOUT0_SELECT_RTCCLK64HZ + * @arg @ref FL_GPIO_FOUT0_SELECT_APBCLK_DIV64 + * @arg @ref FL_GPIO_FOUT0_SELECT_PLLOUTPUT + * @arg @ref FL_GPIO_FOUT0_SELECT_RCLF + * @arg @ref FL_GPIO_FOUT0_SELECT_RCHF + * @arg @ref FL_GPIO_FOUT0_SELECT_XTHF_DIV64 + * @arg @ref FL_GPIO_FOUT0_SELECT_COMP1O + * @arg @ref FL_GPIO_FOUT0_SELECT_CLK_8K + * @arg @ref FL_GPIO_FOUT0_SELECT_ADC_CLK + */ +__STATIC_INLINE uint32_t FL_GPIO_GetFOUT0(GPIO_COMMON_Type *GPIOx) +{ + return (uint32_t)(READ_BIT(GPIOx->FOUTSEL, GPIO_FOUTSEL_FOUT0_Msk)); +} + +/** + * @brief Set FOUT1 frequency output + * @rmtoll FOUTSEL FOUT1 FL_GPIO_SetFOUT1 + * @param GPIOx GPIO Port + * @param select This parameter can be one of the following values: + * @arg @ref FL_GPIO_FOUT1_SELECT_XTLF + * @arg @ref FL_GPIO_FOUT1_SELECT_RCLP + * @arg @ref FL_GPIO_FOUT1_SELECT_ADCCLK + * @arg @ref FL_GPIO_FOUT1_SELECT_LSCLK + * @arg @ref FL_GPIO_FOUT1_SELECT_EOC + * @arg @ref FL_GPIO_FOUT1_SELECT_RTCTM + * @arg @ref FL_GPIO_FOUT1_SELECT_PLLOUTPUT_DIV64 + * @arg @ref FL_GPIO_FOUT1_SELECT_EOCAL + * @arg @ref FL_GPIO_FOUT1_SELECT_APBCLK_DIV64 + * @arg @ref FL_GPIO_FOUT1_SELECT_ROSC_TDLV + * @arg @ref FL_GPIO_FOUT1_SELECT_RCLF + * @arg @ref FL_GPIO_FOUT1_SELECT_RCHF + * @arg @ref FL_GPIO_FOUT1_SELECT_XTHF_DIV64 + * @arg @ref FL_GPIO_FOUT1_SELECT_ADCCLK_DIV64 + * @arg @ref FL_GPIO_FOUT1_SELECT_CLK_8K + * @arg @ref FL_GPIO_FOUT1_SELECT_ROSC_TDHV + * @retval None + */ +__STATIC_INLINE void FL_GPIO_SetFOUT1(GPIO_COMMON_Type *GPIOx, uint32_t select) +{ + MODIFY_REG(GPIOx->FOUTSEL, GPIO_FOUTSEL_FOUT1_Msk, select); +} + +/** + * @brief Get FOUT1 frequency output + * @rmtoll FOUTSEL FOUT1 FL_GPIO_GetFOUT1 + * @param GPIOx GPIO Port + * @retval Returned value can be one of the following values: + * @arg @ref FL_GPIO_FOUT1_SELECT_XTLF + * @arg @ref FL_GPIO_FOUT1_SELECT_RCLP + * @arg @ref FL_GPIO_FOUT1_SELECT_ADCCLK + * @arg @ref FL_GPIO_FOUT1_SELECT_LSCLK + * @arg @ref FL_GPIO_FOUT1_SELECT_EOC + * @arg @ref FL_GPIO_FOUT1_SELECT_RTCTM + * @arg @ref FL_GPIO_FOUT1_SELECT_PLLOUTPUT_DIV64 + * @arg @ref FL_GPIO_FOUT1_SELECT_EOCAL + * @arg @ref FL_GPIO_FOUT1_SELECT_APBCLK_DIV64 + * @arg @ref FL_GPIO_FOUT1_SELECT_ROSC_TDLV + * @arg @ref FL_GPIO_FOUT1_SELECT_RCLF + * @arg @ref FL_GPIO_FOUT1_SELECT_RCHF + * @arg @ref FL_GPIO_FOUT1_SELECT_XTHF_DIV64 + * @arg @ref FL_GPIO_FOUT1_SELECT_ADCCLK_DIV64 + * @arg @ref FL_GPIO_FOUT1_SELECT_CLK_8K + * @arg @ref FL_GPIO_FOUT1_SELECT_ROSC_TDHV + */ +__STATIC_INLINE uint32_t FL_GPIO_GetFOUT1(GPIO_COMMON_Type *GPIOx) +{ + return (uint32_t)(READ_BIT(GPIOx->FOUTSEL, GPIO_FOUTSEL_FOUT1_Msk)); +} + +/** + * @brief Set EXTI0 interrupt input + * @rmtoll EXTISEL0 EXTI0 FL_GPIO_SetExtiLine0 + * @param GPIOx GPIO Port + * @param EXTIPin This parameter can be one of the following values: + * @arg @ref FL_GPIO_EXTI_LINE_0_PA0 + * @arg @ref FL_GPIO_EXTI_LINE_0_PA1 + * @arg @ref FL_GPIO_EXTI_LINE_0_PA2 + * @arg @ref FL_GPIO_EXTI_LINE_0_PA3 + * @retval None + */ +__STATIC_INLINE void FL_GPIO_SetExtiLine0(GPIO_COMMON_Type *GPIOx, uint32_t EXTIPin) +{ + MODIFY_REG(GPIOx->EXTISEL0, GPIO_EXTISEL0_EXTI0_Msk, EXTIPin); +} + +/** + * @brief Get EXTI0 interrupt input + * @rmtoll EXTISEL0 EXTI0 FL_GPIO_GetExtiLine0 + * @param GPIOx GPIO Port + * @retval Returned value can be one of the following values: + */ +__STATIC_INLINE uint32_t FL_GPIO_GetExtiLine0(GPIO_COMMON_Type *GPIOx) +{ + return (uint32_t)(READ_BIT(GPIOx->EXTISEL0, GPIO_EXTISEL0_EXTI0_Msk)); +} + +/** + * @brief Set EXTI1 interrupt input + * @rmtoll EXTISEL0 EXTI1 FL_GPIO_SetExtiLine1 + * @param GPIOx GPIO Port + * @param EXTIPin This parameter can be one of the following values: + * @arg @ref FL_GPIO_EXTI_LINE_1_PA4 + * @arg @ref FL_GPIO_EXTI_LINE_1_PA5 + * @arg @ref FL_GPIO_EXTI_LINE_1_PA6 + * @arg @ref FL_GPIO_EXTI_LINE_1_PA7 + * @retval None + */ +__STATIC_INLINE void FL_GPIO_SetExtiLine1(GPIO_COMMON_Type *GPIOx, uint32_t EXTIPin) +{ + MODIFY_REG(GPIOx->EXTISEL0, GPIO_EXTISEL0_EXTI1_Msk, EXTIPin); +} + +/** + * @brief Get EXTI1 interrupt input + * @rmtoll EXTISEL0 EXTI1 FL_GPIO_GetExtiLine1 + * @param GPIOx GPIO Port + * @retval Returned value can be one of the following values: + */ +__STATIC_INLINE uint32_t FL_GPIO_GetExtiLine1(GPIO_COMMON_Type *GPIOx) +{ + return (uint32_t)(READ_BIT(GPIOx->EXTISEL0, GPIO_EXTISEL0_EXTI1_Msk)); +} + +/** + * @brief Set EXTI2 interrupt input + * @rmtoll EXTISEL0 EXTI2 FL_GPIO_SetExtiLine2 + * @param GPIOx GPIO Port + * @param EXTIPin This parameter can be one of the following values: + * @arg @ref FL_GPIO_EXTI_LINE_2_PA8 + * @arg @ref FL_GPIO_EXTI_LINE_2_PA9 + * @arg @ref FL_GPIO_EXTI_LINE_2_PA10 + * @arg @ref FL_GPIO_EXTI_LINE_2_PA11 + * @retval None + */ +__STATIC_INLINE void FL_GPIO_SetExtiLine2(GPIO_COMMON_Type *GPIOx, uint32_t EXTIPin) +{ + MODIFY_REG(GPIOx->EXTISEL0, GPIO_EXTISEL0_EXTI2_Msk, EXTIPin); +} + +/** + * @brief Get EXTI2 interrupt input + * @rmtoll EXTISEL0 EXTI2 FL_GPIO_GetExtiLine2 + * @param GPIOx GPIO Port + * @retval Returned value can be one of the following values: + */ +__STATIC_INLINE uint32_t FL_GPIO_GetExtiLine2(GPIO_COMMON_Type *GPIOx) +{ + return (uint32_t)(READ_BIT(GPIOx->EXTISEL0, GPIO_EXTISEL0_EXTI2_Msk)); +} + +/** + * @brief Set EXTI3 interrupt input + * @rmtoll EXTISEL0 EXTI3 FL_GPIO_SetExtiLine3 + * @param GPIOx GPIO Port + * @param EXTIPin This parameter can be one of the following values: + * @arg @ref FL_GPIO_EXTI_LINE_3_PA12 + * @arg @ref FL_GPIO_EXTI_LINE_3_PA13 + * @arg @ref FL_GPIO_EXTI_LINE_3_PA14 + * @arg @ref FL_GPIO_EXTI_LINE_3_PA15 + * @retval None + */ +__STATIC_INLINE void FL_GPIO_SetExtiLine3(GPIO_COMMON_Type *GPIOx, uint32_t EXTIPin) +{ + MODIFY_REG(GPIOx->EXTISEL0, GPIO_EXTISEL0_EXTI3_Msk, EXTIPin); +} + +/** + * @brief Get EXTI3 interrupt input + * @rmtoll EXTISEL0 EXTI3 FL_GPIO_GetExtiLine3 + * @param GPIOx GPIO Port + * @retval Returned value can be one of the following values: + */ +__STATIC_INLINE uint32_t FL_GPIO_GetExtiLine3(GPIO_COMMON_Type *GPIOx) +{ + return (uint32_t)(READ_BIT(GPIOx->EXTISEL0, GPIO_EXTISEL0_EXTI3_Msk)); +} + +/** + * @brief Set EXTI4 interrupt input + * @rmtoll EXTISEL0 EXTI4 FL_GPIO_SetExtiLine4 + * @param GPIOx GPIO Port + * @param EXTIPin This parameter can be one of the following values: + * @arg @ref FL_GPIO_EXTI_LINE_4_PB0 + * @arg @ref FL_GPIO_EXTI_LINE_4_PB1 + * @arg @ref FL_GPIO_EXTI_LINE_4_PB2 + * @arg @ref FL_GPIO_EXTI_LINE_4_PB3 + * @retval None + */ +__STATIC_INLINE void FL_GPIO_SetExtiLine4(GPIO_COMMON_Type *GPIOx, uint32_t EXTIPin) +{ + MODIFY_REG(GPIOx->EXTISEL0, GPIO_EXTISEL0_EXTI4_Msk, EXTIPin); +} + +/** + * @brief Get EXTI4 interrupt input + * @rmtoll EXTISEL0 EXTI4 FL_GPIO_GetExtiLine4 + * @param GPIOx GPIO Port + * @retval Returned value can be one of the following values: + */ +__STATIC_INLINE uint32_t FL_GPIO_GetExtiLine4(GPIO_COMMON_Type *GPIOx) +{ + return (uint32_t)(READ_BIT(GPIOx->EXTISEL0, GPIO_EXTISEL0_EXTI4_Msk)); +} + +/** + * @brief Set EXTI5 interrupt input + * @rmtoll EXTISEL0 EXTI5 FL_GPIO_SetExtiLine5 + * @param GPIOx GPIO Port + * @param EXTIPin This parameter can be one of the following values: + * @arg @ref FL_GPIO_EXTI_LINE_5_PB4 + * @arg @ref FL_GPIO_EXTI_LINE_5_PB5 + * @arg @ref FL_GPIO_EXTI_LINE_5_PB6 + * @arg @ref FL_GPIO_EXTI_LINE_5_PB7 + * @retval None + */ +__STATIC_INLINE void FL_GPIO_SetExtiLine5(GPIO_COMMON_Type *GPIOx, uint32_t EXTIPin) +{ + MODIFY_REG(GPIOx->EXTISEL0, GPIO_EXTISEL0_EXTI5_Msk, EXTIPin); +} + +/** + * @brief Get EXTI5 interrupt input + * @rmtoll EXTISEL0 EXTI5 FL_GPIO_GetExtiLine5 + * @param GPIOx GPIO Port + * @retval Returned value can be one of the following values: + */ +__STATIC_INLINE uint32_t FL_GPIO_GetExtiLine5(GPIO_COMMON_Type *GPIOx) +{ + return (uint32_t)(READ_BIT(GPIOx->EXTISEL0, GPIO_EXTISEL0_EXTI5_Msk)); +} + +/** + * @brief Set EXTI6 interrupt input + * @rmtoll EXTISEL0 EXTI6 FL_GPIO_SetExtiLine6 + * @param GPIOx GPIO Port + * @param EXTIPin This parameter can be one of the following values: + * @arg @ref FL_GPIO_EXTI_LINE_6_PB8 + * @arg @ref FL_GPIO_EXTI_LINE_6_PB9 + * @arg @ref FL_GPIO_EXTI_LINE_6_PB10 + * @arg @ref FL_GPIO_EXTI_LINE_6_PB11 + * @retval None + */ +__STATIC_INLINE void FL_GPIO_SetExtiLine6(GPIO_COMMON_Type *GPIOx, uint32_t EXTIPin) +{ + MODIFY_REG(GPIOx->EXTISEL0, GPIO_EXTISEL0_EXTI6_Msk, EXTIPin); +} + +/** + * @brief Get EXTI6 interrupt input + * @rmtoll EXTISEL0 EXTI6 FL_GPIO_GetExtiLine6 + * @param GPIOx GPIO Port + * @retval Returned value can be one of the following values: + */ +__STATIC_INLINE uint32_t FL_GPIO_GetExtiLine6(GPIO_COMMON_Type *GPIOx) +{ + return (uint32_t)(READ_BIT(GPIOx->EXTISEL0, GPIO_EXTISEL0_EXTI6_Msk)); +} + +/** + * @brief Set EXTI7 interrupt input + * @rmtoll EXTISEL0 EXTI7 FL_GPIO_SetExtiLine7 + * @param GPIOx GPIO Port + * @param EXTIPin This parameter can be one of the following values: + * @arg @ref FL_GPIO_EXTI_LINE_7_PB12 + * @arg @ref FL_GPIO_EXTI_LINE_7_PB13 + * @arg @ref FL_GPIO_EXTI_LINE_7_PB14 + * @arg @ref FL_GPIO_EXTI_LINE_7_PB15 + * @retval None + */ +__STATIC_INLINE void FL_GPIO_SetExtiLine7(GPIO_COMMON_Type *GPIOx, uint32_t EXTIPin) +{ + MODIFY_REG(GPIOx->EXTISEL0, GPIO_EXTISEL0_EXTI7_Msk, EXTIPin); +} + +/** + * @brief Get EXTI7 interrupt input + * @rmtoll EXTISEL0 EXTI7 FL_GPIO_GetExtiLine7 + * @param GPIOx GPIO Port + * @retval Returned value can be one of the following values: + */ +__STATIC_INLINE uint32_t FL_GPIO_GetExtiLine7(GPIO_COMMON_Type *GPIOx) +{ + return (uint32_t)(READ_BIT(GPIOx->EXTISEL0, GPIO_EXTISEL0_EXTI7_Msk)); +} + +/** + * @brief Set EXTI8 interrupt input + * @rmtoll EXTISEL0 EXTI8 FL_GPIO_SetExtiLine8 + * @param GPIOx GPIO Port + * @param EXTIPin This parameter can be one of the following values: + * @arg @ref FL_GPIO_EXTI_LINE_8_PC0 + * @arg @ref FL_GPIO_EXTI_LINE_8_PC1 + * @arg @ref FL_GPIO_EXTI_LINE_8_PC2 + * @arg @ref FL_GPIO_EXTI_LINE_8_PC3 + * @retval None + */ +__STATIC_INLINE void FL_GPIO_SetExtiLine8(GPIO_COMMON_Type *GPIOx, uint32_t EXTIPin) +{ + MODIFY_REG(GPIOx->EXTISEL0, GPIO_EXTISEL0_EXTI8_Msk, EXTIPin); +} + +/** + * @brief Get EXTI8 interrupt input + * @rmtoll EXTISEL0 EXTI8 FL_GPIO_GetExtiLine8 + * @param GPIOx GPIO Port + * @retval Returned value can be one of the following values: + */ +__STATIC_INLINE uint32_t FL_GPIO_GetExtiLine8(GPIO_COMMON_Type *GPIOx) +{ + return (uint32_t)(READ_BIT(GPIOx->EXTISEL0, GPIO_EXTISEL0_EXTI8_Msk)); +} + +/** + * @brief Set EXTI9 interrupt input + * @rmtoll EXTISEL0 EXTI9 FL_GPIO_SetExtiLine9 + * @param GPIOx GPIO Port + * @param EXTIPin This parameter can be one of the following values: + * @arg @ref FL_GPIO_EXTI_LINE_9_PC4 + * @arg @ref FL_GPIO_EXTI_LINE_9_PC5 + * @arg @ref FL_GPIO_EXTI_LINE_9_PC6 + * @arg @ref FL_GPIO_EXTI_LINE_9_PC7 + * @retval None + */ +__STATIC_INLINE void FL_GPIO_SetExtiLine9(GPIO_COMMON_Type *GPIOx, uint32_t EXTIPin) +{ + MODIFY_REG(GPIOx->EXTISEL0, GPIO_EXTISEL0_EXTI9_Msk, EXTIPin); +} + +/** + * @brief Get EXTI9 interrupt input + * @rmtoll EXTISEL0 EXTI9 FL_GPIO_GetExtiLine9 + * @param GPIOx GPIO Port + * @retval Returned value can be one of the following values: + */ +__STATIC_INLINE uint32_t FL_GPIO_GetExtiLine9(GPIO_COMMON_Type *GPIOx) +{ + return (uint32_t)(READ_BIT(GPIOx->EXTISEL0, GPIO_EXTISEL0_EXTI9_Msk)); +} + +/** + * @brief Set EXTI10 interrupt input + * @rmtoll EXTISEL0 EXTI10 FL_GPIO_SetExtiLine10 + * @param GPIOx GPIO Port + * @param EXTIPin This parameter can be one of the following values: + * @arg @ref FL_GPIO_EXTI_LINE_10_PC8 + * @arg @ref FL_GPIO_EXTI_LINE_10_PC9 + * @arg @ref FL_GPIO_EXTI_LINE_10_PC10 + * @arg @ref FL_GPIO_EXTI_LINE_10_PC11 + * @retval None + */ +__STATIC_INLINE void FL_GPIO_SetExtiLine10(GPIO_COMMON_Type *GPIOx, uint32_t EXTIPin) +{ + MODIFY_REG(GPIOx->EXTISEL0, GPIO_EXTISEL0_EXTI10_Msk, EXTIPin); +} + +/** + * @brief Get EXTI10 interrupt input + * @rmtoll EXTISEL0 EXTI10 FL_GPIO_GetExtiLine10 + * @param GPIOx GPIO Port + * @retval Returned value can be one of the following values: + */ +__STATIC_INLINE uint32_t FL_GPIO_GetExtiLine10(GPIO_COMMON_Type *GPIOx) +{ + return (uint32_t)(READ_BIT(GPIOx->EXTISEL0, GPIO_EXTISEL0_EXTI10_Msk)); +} + +/** + * @brief Set EXTI11 interrupt input + * @rmtoll EXTISEL0 EXTI11 FL_GPIO_SetExtiLine11 + * @param GPIOx GPIO Port + * @param EXTIPin This parameter can be one of the following values: + * @arg @ref FL_GPIO_EXTI_LINE_11_PC12 + * @arg @ref FL_GPIO_EXTI_LINE_11_PC13 + * @arg @ref FL_GPIO_EXTI_LINE_11_PC14 + * @arg @ref FL_GPIO_EXTI_LINE_11_PC15 + * @retval None + */ +__STATIC_INLINE void FL_GPIO_SetExtiLine11(GPIO_COMMON_Type *GPIOx, uint32_t EXTIPin) +{ + MODIFY_REG(GPIOx->EXTISEL0, GPIO_EXTISEL0_EXTI11_Msk, EXTIPin); +} + +/** + * @brief Get EXTI11 interrupt input + * @rmtoll EXTISEL0 EXTI11 FL_GPIO_GetExtiLine11 + * @param GPIOx GPIO Port + * @retval Returned value can be one of the following values: + */ +__STATIC_INLINE uint32_t FL_GPIO_GetExtiLine11(GPIO_COMMON_Type *GPIOx) +{ + return (uint32_t)(READ_BIT(GPIOx->EXTISEL0, GPIO_EXTISEL0_EXTI11_Msk)); +} + +/** + * @brief Set EXTI12 interrupt input + * @rmtoll EXTISEL0 EXTI12 FL_GPIO_SetExtiLine12 + * @param GPIOx GPIO Port + * @param EXTIPin This parameter can be one of the following values: + * @arg @ref FL_GPIO_EXTI_LINE_12_PD0 + * @arg @ref FL_GPIO_EXTI_LINE_12_PD1 + * @arg @ref FL_GPIO_EXTI_LINE_12_PD2 + * @arg @ref FL_GPIO_EXTI_LINE_12_PD3 + * @retval None + */ +__STATIC_INLINE void FL_GPIO_SetExtiLine12(GPIO_COMMON_Type *GPIOx, uint32_t EXTIPin) +{ + MODIFY_REG(GPIOx->EXTISEL0, GPIO_EXTISEL0_EXTI12_Msk, EXTIPin); +} + +/** + * @brief Get EXTI12 interrupt input + * @rmtoll EXTISEL0 EXTI12 FL_GPIO_GetExtiLine12 + * @param GPIOx GPIO Port + * @retval Returned value can be one of the following values: + */ +__STATIC_INLINE uint32_t FL_GPIO_GetExtiLine12(GPIO_COMMON_Type *GPIOx) +{ + return (uint32_t)(READ_BIT(GPIOx->EXTISEL0, GPIO_EXTISEL0_EXTI12_Msk)); +} + +/** + * @brief Set EXTI13 interrupt input + * @rmtoll EXTISEL0 EXTI13 FL_GPIO_SetExtiLine13 + * @param GPIOx GPIO Port + * @param EXTIPin This parameter can be one of the following values: + * @arg @ref FL_GPIO_EXTI_LINE_13_PD4 + * @arg @ref FL_GPIO_EXTI_LINE_13_PD5 + * @arg @ref FL_GPIO_EXTI_LINE_13_PD6 + * @arg @ref FL_GPIO_EXTI_LINE_13_PD7 + * @retval None + */ +__STATIC_INLINE void FL_GPIO_SetExtiLine13(GPIO_COMMON_Type *GPIOx, uint32_t EXTIPin) +{ + MODIFY_REG(GPIOx->EXTISEL0, GPIO_EXTISEL0_EXTI13_Msk, EXTIPin); +} + +/** + * @brief Get EXTI13 interrupt input + * @rmtoll EXTISEL0 EXTI13 FL_GPIO_GetExtiLine13 + * @param GPIOx GPIO Port + * @retval Returned value can be one of the following values: + */ +__STATIC_INLINE uint32_t FL_GPIO_GetExtiLine13(GPIO_COMMON_Type *GPIOx) +{ + return (uint32_t)(READ_BIT(GPIOx->EXTISEL0, GPIO_EXTISEL0_EXTI13_Msk)); +} + +/** + * @brief Set EXTI14 interrupt input + * @rmtoll EXTISEL0 EXTI14 FL_GPIO_SetExtiLine14 + * @param GPIOx GPIO Port + * @param EXTIPin This parameter can be one of the following values: + * @arg @ref FL_GPIO_EXTI_LINE_14_PD8 + * @retval None + */ +__STATIC_INLINE void FL_GPIO_SetExtiLine14(GPIO_COMMON_Type *GPIOx, uint32_t EXTIPin) +{ + MODIFY_REG(GPIOx->EXTISEL0, GPIO_EXTISEL0_EXTI14_Msk, EXTIPin); +} + +/** + * @brief Get EXTI14 interrupt input + * @rmtoll EXTISEL0 EXTI14 FL_GPIO_GetExtiLine14 + * @param GPIOx GPIO Port + * @retval Returned value can be one of the following values: + */ +__STATIC_INLINE uint32_t FL_GPIO_GetExtiLine14(GPIO_COMMON_Type *GPIOx) +{ + return (uint32_t)(READ_BIT(GPIOx->EXTISEL0, GPIO_EXTISEL0_EXTI14_Msk)); +} + +/** + * @brief Set EXTI15 interrupt input + * @rmtoll EXTISEL0 EXTI15 FL_GPIO_SetExtiLine15 + * @param GPIOx GPIO Port + * @param EXTIPin This parameter can be one of the following values: + * @arg @ref FL_GPIO_EXTI_LINE_14_PD9 + * @arg @ref FL_GPIO_EXTI_LINE_14_PD10 + * @arg @ref FL_GPIO_EXTI_LINE_14_PD11 + * @arg @ref FL_GPIO_EXTI_LINE_15_PD12 + * @retval None + */ +__STATIC_INLINE void FL_GPIO_SetExtiLine15(GPIO_COMMON_Type *GPIOx, uint32_t EXTIPin) +{ + MODIFY_REG(GPIOx->EXTISEL0, GPIO_EXTISEL0_EXTI15_Msk, EXTIPin); +} + +/** + * @brief Get EXTI15 interrupt input + * @rmtoll EXTISEL0 EXTI15 FL_GPIO_GetExtiLine15 + * @param GPIOx GPIO Port + * @retval Returned value can be one of the following values: + */ +__STATIC_INLINE uint32_t FL_GPIO_GetExtiLine15(GPIO_COMMON_Type *GPIOx) +{ + return (uint32_t)(READ_BIT(GPIOx->EXTISEL0, GPIO_EXTISEL0_EXTI15_Msk)); +} + +/** + * @brief Set EXTI16 interrupt input + * @rmtoll EXTISEL1 EXTI16 FL_GPIO_SetExtiLine16 + * @param GPIOx GPIO Port + * @param EXTIPin This parameter can be one of the following values: + * @arg @ref FL_GPIO_EXTI_LINE_16_PE0 + * @arg @ref FL_GPIO_EXTI_LINE_16_PE1 + * @arg @ref FL_GPIO_EXTI_LINE_16_PE2 + * @arg @ref FL_GPIO_EXTI_LINE_16_PE3 + * @retval None + */ +__STATIC_INLINE void FL_GPIO_SetExtiLine16(GPIO_COMMON_Type *GPIOx, uint32_t EXTIPin) +{ + MODIFY_REG(GPIOx->EXTISEL1, GPIO_EXTISEL1_EXTI16_Msk, EXTIPin); +} + +/** + * @brief Get EXTI16 interrupt input + * @rmtoll EXTISEL1 EXTI16 FL_GPIO_GetExtiLine16 + * @param GPIOx GPIO Port + * @retval Returned value can be one of the following values: + */ +__STATIC_INLINE uint32_t FL_GPIO_GetExtiLine16(GPIO_COMMON_Type *GPIOx) +{ + return (uint32_t)(READ_BIT(GPIOx->EXTISEL1, GPIO_EXTISEL1_EXTI16_Msk)); +} + +/** + * @brief Set EXTI17 interrupt input + * @rmtoll EXTISEL1 EXTI17 FL_GPIO_SetExtiLine17 + * @param GPIOx GPIO Port + * @param EXTIPin This parameter can be one of the following values: + * @arg @ref FL_GPIO_EXTI_LINE_17_PE4 + * @arg @ref FL_GPIO_EXTI_LINE_17_PE5 + * @arg @ref FL_GPIO_EXTI_LINE_17_PE6 + * @arg @ref FL_GPIO_EXTI_LINE_17_PE7 + * @retval None + */ +__STATIC_INLINE void FL_GPIO_SetExtiLine17(GPIO_COMMON_Type *GPIOx, uint32_t EXTIPin) +{ + MODIFY_REG(GPIOx->EXTISEL1, GPIO_EXTISEL1_EXTI17_Msk, EXTIPin); +} + +/** + * @brief Get EXTI17 interrupt input + * @rmtoll EXTISEL1 EXTI17 FL_GPIO_GetExtiLine17 + * @param GPIOx GPIO Port + * @retval Returned value can be one of the following values: + */ +__STATIC_INLINE uint32_t FL_GPIO_GetExtiLine17(GPIO_COMMON_Type *GPIOx) +{ + return (uint32_t)(READ_BIT(GPIOx->EXTISEL1, GPIO_EXTISEL1_EXTI17_Msk)); +} + +/** + * @brief Set EXTI18 interrupt input + * @rmtoll EXTISEL1 EXTI18 FL_GPIO_SetExtiLine18 + * @param GPIOx GPIO Port + * @param EXTIPin This parameter can be one of the following values: + * @arg @ref FL_GPIO_EXTI_LINE_18_PE8 + * @arg @ref FL_GPIO_EXTI_LINE_18_PE9 + * @retval None + */ +__STATIC_INLINE void FL_GPIO_SetExtiLine18(GPIO_COMMON_Type *GPIOx, uint32_t EXTIPin) +{ + MODIFY_REG(GPIOx->EXTISEL1, GPIO_EXTISEL1_EXTI18_Msk, EXTIPin); +} + +/** + * @brief Get EXTI18 interrupt input + * @rmtoll EXTISEL1 EXTI18 FL_GPIO_GetExtiLine18 + * @param GPIOx GPIO Port + * @retval Returned value can be one of the following values: + */ +__STATIC_INLINE uint32_t FL_GPIO_GetExtiLine18(GPIO_COMMON_Type *GPIOx) +{ + return (uint32_t)(READ_BIT(GPIOx->EXTISEL1, GPIO_EXTISEL1_EXTI18_Msk)); +} + +/** + * @brief Get WKUP enable status + * @rmtoll PINWKEN EN FL_GPIO_IsEnabledWakeup + * @param GPIOx GPIO Port + * @param wakeup This parameter can be one of the following values: + * @arg @ref FL_GPIO_WAKEUP_0 + * @arg @ref FL_GPIO_WAKEUP_1 + * @arg @ref FL_GPIO_WAKEUP_2 + * @arg @ref FL_GPIO_WAKEUP_3 + * @arg @ref FL_GPIO_WAKEUP_4 + * @arg @ref FL_GPIO_WAKEUP_5 + * @arg @ref FL_GPIO_WAKEUP_6 + * @arg @ref FL_GPIO_WAKEUP_7 + * @arg @ref FL_GPIO_WAKEUP_8 + * @arg @ref FL_GPIO_WAKEUP_9 + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_GPIO_IsEnabledWakeup(GPIO_COMMON_Type *GPIOx, uint32_t wakeup) +{ + return (uint32_t)(READ_BIT(GPIOx->PINWKEN, ((wakeup & 0x3ff) << 0x0U)) == ((wakeup & 0x3ff) << 0x0U)); +} + +/** + * @brief WKUP enable + * @rmtoll PINWKEN EN FL_GPIO_EnableWakeup + * @param GPIOx GPIO Port + * @param wakeup This parameter can be one of the following values: + * @arg @ref FL_GPIO_WAKEUP_0 + * @arg @ref FL_GPIO_WAKEUP_1 + * @arg @ref FL_GPIO_WAKEUP_2 + * @arg @ref FL_GPIO_WAKEUP_3 + * @arg @ref FL_GPIO_WAKEUP_4 + * @arg @ref FL_GPIO_WAKEUP_5 + * @arg @ref FL_GPIO_WAKEUP_6 + * @arg @ref FL_GPIO_WAKEUP_7 + * @arg @ref FL_GPIO_WAKEUP_8 + * @arg @ref FL_GPIO_WAKEUP_9 + * @retval None + */ +__STATIC_INLINE void FL_GPIO_EnableWakeup(GPIO_COMMON_Type *GPIOx, uint32_t wakeup) +{ + SET_BIT(GPIOx->PINWKEN, ((wakeup & 0x3ff) << 0x0U)); +} + +/** + * @brief WKUP disable + * @rmtoll PINWKEN EN FL_GPIO_DisableWakeup + * @param GPIOx GPIO Port + * @param wakeup This parameter can be one of the following values: + * @arg @ref FL_GPIO_WAKEUP_0 + * @arg @ref FL_GPIO_WAKEUP_1 + * @arg @ref FL_GPIO_WAKEUP_2 + * @arg @ref FL_GPIO_WAKEUP_3 + * @arg @ref FL_GPIO_WAKEUP_4 + * @arg @ref FL_GPIO_WAKEUP_5 + * @arg @ref FL_GPIO_WAKEUP_6 + * @arg @ref FL_GPIO_WAKEUP_7 + * @arg @ref FL_GPIO_WAKEUP_8 + * @arg @ref FL_GPIO_WAKEUP_9 + * @retval None + */ +__STATIC_INLINE void FL_GPIO_DisableWakeup(GPIO_COMMON_Type *GPIOx, uint32_t wakeup) +{ + CLEAR_BIT(GPIOx->PINWKEN, ((wakeup & 0x3ff) << 0x0U)); +} + +/** + * @brief Get WKUP interrupt entry + * @rmtoll PINWKEN WKISEL FL_GPIO_GetWakeupInterruptEntry + * @param GPIOx GPIO Port + * @retval Returned value can be one of the following values: + * @arg @ref FL_GPIO_WAKEUP_INT_ENTRY_NMI + * @arg @ref FL_GPIO_WAKEUP_INT_ENTRY_38 + */ +__STATIC_INLINE uint32_t FL_GPIO_GetWakeupInterruptEntry(GPIO_COMMON_Type *GPIOx) +{ + return (uint32_t)(READ_BIT(GPIOx->PINWKEN, GPIO_PINWKEN_WKISEL_Msk)); +} + +/** + * @brief Set wkup interrupt entry + * @rmtoll PINWKEN WKISEL FL_GPIO_SetWakeupInterruptEntry + * @param GPIOx GPIO Port + * @param wakeup This parameter can be one of the following values: + * @arg @ref FL_GPIO_WAKEUP_INT_ENTRY_NMI + * @arg @ref FL_GPIO_WAKEUP_INT_ENTRY_38 + * @retval None + */ +__STATIC_INLINE void FL_GPIO_SetWakeupInterruptEntry(GPIO_COMMON_Type *GPIOx, uint32_t wakeup) +{ + MODIFY_REG(GPIOx->PINWKEN, GPIO_PINWKEN_WKISEL_Msk, wakeup); +} + +/** + * @brief Set WKUP edge polarity + * @rmtoll PINWKEN SEL FL_GPIO_SetWakeupEdge + * @param GPIOx GPIO Port + * @param wakeup This parameter can be one of the following values: + * @arg @ref FL_GPIO_WAKEUP_0 + * @arg @ref FL_GPIO_WAKEUP_1 + * @arg @ref FL_GPIO_WAKEUP_2 + * @arg @ref FL_GPIO_WAKEUP_3 + * @arg @ref FL_GPIO_WAKEUP_4 + * @arg @ref FL_GPIO_WAKEUP_5 + * @arg @ref FL_GPIO_WAKEUP_6 + * @arg @ref FL_GPIO_WAKEUP_7 + * @arg @ref FL_GPIO_WAKEUP_8 + * @arg @ref FL_GPIO_WAKEUP_9 + * @param mode This parameter can be one of the following values: + * @arg @ref FL_GPIO_WAKEUP_TRIGGER_RISING + * @arg @ref FL_GPIO_WAKEUP_TRIGGER_FALLING + * @arg @ref FL_GPIO_WAKEUP_TRIGGER_BOTH + * @retval None + */ +__STATIC_INLINE void FL_GPIO_SetWakeupEdge(GPIO_COMMON_Type *GPIOx, uint32_t wakeup, uint32_t mode) +{ + MODIFY_REG(GPIOx->PINWKEN, ((wakeup * wakeup) * GPIO_PINWKEN_SEL), ((wakeup * wakeup) * mode)); +} + +/** + * @brief Get WKUP edge polarity + * @rmtoll PINWKEN SEL FL_GPIO_GetWakeupEdge + * @param GPIOx GPIO Port + * @param wakeup This parameter can be one of the following values: + * @arg @ref FL_GPIO_WAKEUP_0 + * @arg @ref FL_GPIO_WAKEUP_1 + * @arg @ref FL_GPIO_WAKEUP_2 + * @arg @ref FL_GPIO_WAKEUP_3 + * @arg @ref FL_GPIO_WAKEUP_4 + * @arg @ref FL_GPIO_WAKEUP_5 + * @arg @ref FL_GPIO_WAKEUP_6 + * @arg @ref FL_GPIO_WAKEUP_7 + * @arg @ref FL_GPIO_WAKEUP_8 + * @arg @ref FL_GPIO_WAKEUP_9 + * @retval Returned value can be one of the following values: + * @arg @ref FL_GPIO_WAKEUP_TRIGGER_RISING + * @arg @ref FL_GPIO_WAKEUP_TRIGGER_FALLING + * @arg @ref FL_GPIO_WAKEUP_TRIGGER_BOTH + */ +__STATIC_INLINE uint32_t FL_GPIO_GetWakeupEdge(GPIO_COMMON_Type *GPIOx, uint32_t wakeup) +{ + return (uint32_t)(READ_BIT(GPIOx->PINWKEN, ((wakeup * wakeup) * GPIO_PINWKEN_SEL)) / (wakeup * wakeup)); +} + +/** + * @} + */ + +/** @defgroup GPIO_FL_EF_Init Initialization and de-initialization functions + * @{ + */ +FL_ErrorStatus FL_GPIO_Init(GPIO_Type *GPIOx, FL_GPIO_InitTypeDef *initStruct); +FL_ErrorStatus FL_GPIO_DeInit(GPIO_Type *GPIOx, uint32_t pin); +void FL_GPIO_StructInit(FL_GPIO_InitTypeDef *initStruct); + +FL_ErrorStatus FL_WKUP_Init(FL_WKUP_InitTypeDef *initStruct, uint32_t wakeup); +FL_ErrorStatus FL_WKUP_DeInit(uint32_t wakeup); +void FL_WKUP_StructInit(FL_WKUP_InitTypeDef *initStruct); + +void FL_GPIO_ALLPIN_LPM_MODE(void); + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif /* __FM33LG0XX_FL_GPIO_H*/ + +/*************************Py_Code_Generator Version: 0.1-0.14-0.1 @ 2020-10-20*************************/ +/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/ diff --git a/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_gptim.h b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_gptim.h new file mode 100644 index 0000000..2b4e401 --- /dev/null +++ b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_gptim.h @@ -0,0 +1,2988 @@ + /** + ******************************************************************************************************* + * @file fm33lg0xx_fl_gptim.h + * @author FMSH Application Team + * @brief Head file of GPTIM FL Module + ******************************************************************************************************* + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + + + +/* Define to prevent recursive inclusion---------------------------------------------------------------*/ +#ifndef __FM33LG0XX_FL_GPTIM_H +#define __FM33LG0XX_FL_GPTIM_H + +#ifdef __cplusplus +extern "C" { +#endif +/* Includes -------------------------------------------------------------------------------------------*/ +#include "fm33lg0xx_fl_def.h" +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @defgroup GPTIM GPTIM + * @brief GPTIM FL driver + * @{ + */ + +/* Exported types -------------------------------------------------------------------------------------*/ +/** @defgroup GPTIM_FL_ES_INIT GPTIM Exported Init structures + * @{ + */ + +/** + * @brief FL GPTIM Init Sturcture definition + */ +typedef struct +{ + /*! 预分频系数 */ + uint32_t prescaler; + /*! 计数模式 */ + uint32_t counterMode; + /*! 自动重装载值 */ + uint32_t autoReload; + /*! 预装载使能 */ + uint32_t autoReloadState; + /*!定时器分频系数与数字滤波器所使用的采样时钟分频比*/ + uint32_t clockDivision; + +} FL_GPTIM_InitTypeDef; +/** + * @brief GTIM SlaveMode Init Sturcture definition + */ +typedef struct +{ + /*! ITRx 源*/ + uint32_t ITRSourceGroup; + /*! 外部时钟源模式 */ + uint32_t slaveMode; + /*! 输入触发信号选择 */ + uint32_t triggerSrc; + /*! Trigger 延迟*/ + uint32_t triggerDelay; + +} FL_GPTIM_SlaveInitTypeDef; +/** + * @brief TIM Input Capture configuration structure definition. + */ + +typedef struct +{ + /*! 输入捕获使能 */ + uint32_t captureState; + /*! 输入捕获极性 */ + uint32_t ICPolarity; + /*! 通道映射激活的输入选择 */ + uint32_t ICActiveInput; + /*! 输入分频 */ + uint32_t ICPrescaler; + /*! 输入滤波 */ + uint32_t ICFilter; + +} FL_GPTIM_IC_InitTypeDef; +/** + * @brief TIM ETR configuration structure definition. + */ + +typedef struct +{ + /*! 外部触发使能 */ + uint32_t useExternalTrigger; + /*! 外部时钟滤波 */ + uint32_t ETRFilter; + /*! 外部时钟分频 */ + uint32_t ETRClockDivision; + /*! 外部时钟触发极性 */ + uint32_t ETRPolarity; + +} FL_GPTIM_ETR_InitTypeDef; + +/** + * @brief TIM Output Compare configuration structure definition. + */ +typedef struct +{ + /*! 比较输出模式 */ + uint32_t OCMode; + /*! 比较输出通道快速模式使能 */ + uint32_t OCFastMode; + /*! 输出比较预装载 */ + uint32_t OCPreload; + /*! 通道比较值 */ + uint32_t compareValue; + /*! 比较输出极性 */ + uint32_t OCPolarity; + /*! ETR清0使能 */ + uint32_t OCETRFStatus; + +} FL_GPTIM_OC_InitTypeDef; + +/** + * @} + */ + +/** + * GPTIM0~GPTIM2 ITRSEL_Group 映射表 + * + * ===================== GPTIM0 ====================== + * --------------------------------------------------- + * ITRx | Group | Function Name | Function Type + * --------------------------------------------------- + * ITR0 | 0 | ATIM_TRGO | 计数触发 + * | 1 | UART0_RX | 宽度捕捉 + * | 2 | UART1_RX | 宽度捕捉 + * | 3 | UART3_RX | 宽度捕捉 + * --------------------------------------------------- + * ITR1 | 0 | GPTIM2_TRGO | 计数触发 + * | 1 | XTHF | 周期捕捉 + * | 2 | RCHF | 周期捕捉 + * | 3 | LPUART1_RX | 周期捕捉 + * --------------------------------------------------- + * ITR2 | 0 | BSTIM32_TRGO | 计数触发 + * | 1 | LPUART2_RX | 宽度捕捉 + * | 2 | RCLP | 周期捕捉 + * | 3 | XTLF | 周期捕捉 + * --------------------------------------------------- + * ITR3 | 0 | COMP1_TRGO | 计数触发 + * | 1 | RCLF | 周期捕捉 + * | 2 | COMP2_TRGO | 计数触发 + * | 3 | LPT32_TRGO | 计数触发 + * --------------------------------------------------- + * + * ===================== GPTIM1 ====================== + * --------------------------------------------------- + * ITRx | Group | Function Name | Function Type + * --------------------------------------------------- + * ITR0 | 0 | ATIM_TRGO | 计数触发 + * | 1 | UART0_RX | 宽度捕捉 + * | 2 | UART1_RX | 宽度捕捉 + * | 3 | UART3_RX | 宽度捕捉 + * --------------------------------------------------- + * ITR1 | 0 | GPTIM0_TRGO | 计数触发 + * | 1 | LUT1_TRGO | 周期捕捉 + * | 2 | RCHF | 周期捕捉 + * | 3 | ADC_EOC_TRGO | 计数触发 + * --------------------------------------------------- + * ITR2 | 0 | BSTIM32_TRGO | 计数触发 + * | 1 | LSCLK | 周期捕捉 + * | 2 | RCLP | 周期捕捉 + * | 3 | XTLF | 周期捕捉 + * --------------------------------------------------- + * ITR3 | 0 | COMP1_TRGO | 计数触发 + * | 1 | LUT3_TRGO | 周期捕捉 + * | 2 | COMP2_TRGO | 计数触发 + * | 3 | LPT32_TRGO | 计数触发 + * --------------------------------------------------- + * + * ===================== GPTIM2 ====================== + * --------------------------------------------------- + * ITRx | Group | Function Name | Function Type + * --------------------------------------------------- + * ITR0 | 0 | ATIM_TRGO | 计数触发 + * | 1 | UART3_RX | 宽度捕捉 + * | 2 | UART4_RX | 宽度捕捉 + * | 3 | LUT0_TRGO | 宽度捕捉 + * --------------------------------------------------- + * ITR1 | 0 | GPTIM1_TRGO | 计数触发 + * | 1 | XTHF | 周期捕捉 + * | 2 | RCHF | 周期捕捉 + * | 3 | ADC_EOC_TRGO | 计数触发 + * --------------------------------------------------- + * ITR2 | 0 | BSTIM16_TRGO | 计数触发 + * | 1 | LSCLK | 周期捕捉 + * | 2 | RCLP | 周期捕捉 + * | 3 | XTLF | 周期捕捉 + * --------------------------------------------------- + * ITR3 | 0 | COMP1_TRGO | 计数触发 + * | 1 | LUT2_TRGO | 周期捕捉 + * | 2 | COMP2_TRGO | 计数触发 + * | 3 | LPT16_TRGO | 计数触发 + * --------------------------------------------------- + * + */ + +/* Exported constants ---------------------------------------------------------------------------------*/ +/** @defgroup GPTIM_FL_Exported_Constants GPTIM Exported Constants + * @{ + */ + +#define GPTIM_CR1_CKD_Pos (8U) +#define GPTIM_CR1_CKD_Msk (0x3U << GPTIM_CR1_CKD_Pos) +#define GPTIM_CR1_CKD GPTIM_CR1_CKD_Msk + +#define GPTIM_CR1_ARPE_Pos (7U) +#define GPTIM_CR1_ARPE_Msk (0x1U << GPTIM_CR1_ARPE_Pos) +#define GPTIM_CR1_ARPE GPTIM_CR1_ARPE_Msk + +#define GPTIM_CR1_CMS_Pos (5U) +#define GPTIM_CR1_CMS_Msk (0x3U << GPTIM_CR1_CMS_Pos) +#define GPTIM_CR1_CMS GPTIM_CR1_CMS_Msk + +#define GPTIM_CR1_DIR_Pos (4U) +#define GPTIM_CR1_DIR_Msk (0x1U << GPTIM_CR1_DIR_Pos) +#define GPTIM_CR1_DIR GPTIM_CR1_DIR_Msk + +#define GPTIM_CR1_OPM_Pos (3U) +#define GPTIM_CR1_OPM_Msk (0x1U << GPTIM_CR1_OPM_Pos) +#define GPTIM_CR1_OPM GPTIM_CR1_OPM_Msk + +#define GPTIM_CR1_URS_Pos (2U) +#define GPTIM_CR1_URS_Msk (0x1U << GPTIM_CR1_URS_Pos) +#define GPTIM_CR1_URS GPTIM_CR1_URS_Msk + +#define GPTIM_CR1_UDIS_Pos (1U) +#define GPTIM_CR1_UDIS_Msk (0x1U << GPTIM_CR1_UDIS_Pos) +#define GPTIM_CR1_UDIS GPTIM_CR1_UDIS_Msk + +#define GPTIM_CR1_CEN_Pos (0U) +#define GPTIM_CR1_CEN_Msk (0x1U << GPTIM_CR1_CEN_Pos) +#define GPTIM_CR1_CEN GPTIM_CR1_CEN_Msk + +#define GPTIM_CR2_TI1S_Pos (7U) +#define GPTIM_CR2_TI1S_Msk (0x1U << GPTIM_CR2_TI1S_Pos) +#define GPTIM_CR2_TI1S GPTIM_CR2_TI1S_Msk + +#define GPTIM_CR2_MMS_Pos (4U) +#define GPTIM_CR2_MMS_Msk (0x7U << GPTIM_CR2_MMS_Pos) +#define GPTIM_CR2_MMS GPTIM_CR2_MMS_Msk + +#define GPTIM_CR2_CCDS_Pos (3U) +#define GPTIM_CR2_CCDS_Msk (0x1U << GPTIM_CR2_CCDS_Pos) +#define GPTIM_CR2_CCDS GPTIM_CR2_CCDS_Msk + +#define GPTIM_SMCR_ETP_Pos (15U) +#define GPTIM_SMCR_ETP_Msk (0x1U << GPTIM_SMCR_ETP_Pos) +#define GPTIM_SMCR_ETP GPTIM_SMCR_ETP_Msk + +#define GPTIM_SMCR_ECE_Pos (14U) +#define GPTIM_SMCR_ECE_Msk (0x1U << GPTIM_SMCR_ECE_Pos) +#define GPTIM_SMCR_ECE GPTIM_SMCR_ECE_Msk + +#define GPTIM_SMCR_ETPS_Pos (12U) +#define GPTIM_SMCR_ETPS_Msk (0x3U << GPTIM_SMCR_ETPS_Pos) +#define GPTIM_SMCR_ETPS GPTIM_SMCR_ETPS_Msk + +#define GPTIM_SMCR_ETF_Pos (8U) +#define GPTIM_SMCR_ETF_Msk (0xfU << GPTIM_SMCR_ETF_Pos) +#define GPTIM_SMCR_ETF GPTIM_SMCR_ETF_Msk + +#define GPTIM_SMCR_MSM_Pos (7U) +#define GPTIM_SMCR_MSM_Msk (0x1U << GPTIM_SMCR_MSM_Pos) +#define GPTIM_SMCR_MSM GPTIM_SMCR_MSM_Msk + +#define GPTIM_SMCR_TS_Pos (4U) +#define GPTIM_SMCR_TS_Msk (0x7U << GPTIM_SMCR_TS_Pos) +#define GPTIM_SMCR_TS GPTIM_SMCR_TS_Msk + +#define GPTIM_SMCR_SMS_Pos (0U) +#define GPTIM_SMCR_SMS_Msk (0x7U << GPTIM_SMCR_SMS_Pos) +#define GPTIM_SMCR_SMS GPTIM_SMCR_SMS_Msk + +#define GPTIM_DIER_CC1BURSTEN_Pos (16U) +#define GPTIM_DIER_CC1BURSTEN_Msk (0x1U << GPTIM_DIER_CC1BURSTEN_Pos) +#define GPTIM_DIER_CC1BURSTEN GPTIM_DIER_CC1BURSTEN_Msk + +#define GPTIM_DIER_CC2BURSTEN_Pos (17U) +#define GPTIM_DIER_CC2BURSTEN_Msk (0x1U << GPTIM_DIER_CC2BURSTEN_Pos) +#define GPTIM_DIER_CC2BURSTEN GPTIM_DIER_CC2BURSTEN_Msk + +#define GPTIM_DIER_CC3BURSTEN_Pos (18U) +#define GPTIM_DIER_CC3BURSTEN_Msk (0x1U << GPTIM_DIER_CC3BURSTEN_Pos) +#define GPTIM_DIER_CC3BURSTEN GPTIM_DIER_CC3BURSTEN_Msk + +#define GPTIM_DIER_CC4BURSTEN_Pos (19U) +#define GPTIM_DIER_CC4BURSTEN_Msk (0x1U << GPTIM_DIER_CC4BURSTEN_Pos) +#define GPTIM_DIER_CC4BURSTEN GPTIM_DIER_CC4BURSTEN_Msk + +#define GPTIM_DIER_TDE_Pos (14U) +#define GPTIM_DIER_TDE_Msk (0x1U << GPTIM_DIER_TDE_Pos) +#define GPTIM_DIER_TDE GPTIM_DIER_TDE_Msk + +#define GPTIM_DIER_CCDE_Pos (9U) +#define GPTIM_DIER_CCDE_Msk (0xfU << GPTIM_DIER_CCDE_Pos) +#define GPTIM_DIER_CCDE GPTIM_DIER_CCDE_Msk + +#define GPTIM_DIER_UDE_Pos (8U) +#define GPTIM_DIER_UDE_Msk (0x1U << GPTIM_DIER_UDE_Pos) +#define GPTIM_DIER_UDE GPTIM_DIER_UDE_Msk + +#define GPTIM_DIER_TIE_Pos (6U) +#define GPTIM_DIER_TIE_Msk (0x1U << GPTIM_DIER_TIE_Pos) +#define GPTIM_DIER_TIE GPTIM_DIER_TIE_Msk + +#define GPTIM_DIER_CCIE_Pos (1U) +#define GPTIM_DIER_CCIE_Msk (0xfU << GPTIM_DIER_CCIE_Pos) +#define GPTIM_DIER_CCIE GPTIM_DIER_CCIE_Msk + +#define GPTIM_DIER_UIE_Pos (0U) +#define GPTIM_DIER_UIE_Msk (0x1U << GPTIM_DIER_UIE_Pos) +#define GPTIM_DIER_UIE GPTIM_DIER_UIE_Msk + +#define GPTIM_ISR_CCOF_Pos (9U) +#define GPTIM_ISR_CCOF_Msk (0xfU << GPTIM_ISR_CCOF_Pos) +#define GPTIM_ISR_CCOF GPTIM_ISR_CCOF_Msk + +#define GPTIM_ISR_TIF_Pos (6U) +#define GPTIM_ISR_TIF_Msk (0x1U << GPTIM_ISR_TIF_Pos) +#define GPTIM_ISR_TIF GPTIM_ISR_TIF_Msk + +#define GPTIM_ISR_CCIF_Pos (1U) +#define GPTIM_ISR_CCIF_Msk (0xfU << GPTIM_ISR_CCIF_Pos) +#define GPTIM_ISR_CCIF GPTIM_ISR_CCIF_Msk + +#define GPTIM_ISR_UIF_Pos (0U) +#define GPTIM_ISR_UIF_Msk (0x1U << GPTIM_ISR_UIF_Pos) +#define GPTIM_ISR_UIF GPTIM_ISR_UIF_Msk + +#define GPTIM_EGR_TG_Pos (6U) +#define GPTIM_EGR_TG_Msk (0x1U << GPTIM_EGR_TG_Pos) +#define GPTIM_EGR_TG GPTIM_EGR_TG_Msk + +#define GPTIM_EGR_CCG_Pos (1U) +#define GPTIM_EGR_CCG_Msk (0x3U << GPTIM_EGR_CCG_Pos) +#define GPTIM_EGR_CCG GPTIM_EGR_CCG_Msk + +#define GPTIM_EGR_UG_Pos (0U) +#define GPTIM_EGR_UG_Msk (0x1U << GPTIM_EGR_UG_Pos) +#define GPTIM_EGR_UG GPTIM_EGR_UG_Msk + +#define GPTIM_DCR_DBL_Pos (8U) +#define GPTIM_DCR_DBL_Msk (0x1fU << GPTIM_DCR_DBL_Pos) +#define GPTIM_DCR_DBL GPTIM_DCR_DBL_Msk + +#define GPTIM_DCR_DBA_Pos (0U) +#define GPTIM_DCR_DBA_Msk (0x1fU << GPTIM_DCR_DBA_Pos) +#define GPTIM_DCR_DBA GPTIM_DCR_DBA_Msk + +#define GPTIM_ITRSEL_Pos (0U) +#define GPTIM_ITRSEL_Msk (0x3U << GPTIM_ITRSEL_Pos) +#define GPTIM_ITRSEL GPTIM_ITRSEL_Msk + +#define GPTIM_CCMR_OCCE_Pos (7U) +#define GPTIM_CCMR_OCCE_Msk (0x1U << GPTIM_CCMR_OCCE_Pos) +#define GPTIM_CCMR_OCCE GPTIM_CCMR_OCCE_Msk + +#define GPTIM_CCMR_OCM_Pos (4U) +#define GPTIM_CCMR_OCM_Msk (0x7U << GPTIM_CCMR_OCM_Pos) +#define GPTIM_CCMR_OCM GPTIM_CCMR_OCM_Msk + +#define GPTIM_CCMR_OCPE_Pos (3U) +#define GPTIM_CCMR_OCPE_Msk (0x1U << GPTIM_CCMR_OCPE_Pos) +#define GPTIM_CCMR_OCPE GPTIM_CCMR_OCPE_Msk + +#define GPTIM_CCMR_OCFE_Pos (2U) +#define GPTIM_CCMR_OCFE_Msk (0x1U << GPTIM_CCMR_OCFE_Pos) +#define GPTIM_CCMR_OCFE GPTIM_CCMR_OCFE_Msk + +#define GPTIM_CCMR_ICF_Pos (4U) +#define GPTIM_CCMR_ICF_Msk (0xfU << GPTIM_CCMR_ICF_Pos) +#define GPTIM_CCMR_ICF GPTIM_CCMR_ICF_Msk + +#define GPTIM_CCMR_ICPSC_Pos (2U) +#define GPTIM_CCMR_ICPSC_Msk (0x3U << GPTIM_CCMR_ICPSC_Pos) +#define GPTIM_CCMR_ICPSC GPTIM_CCMR_ICPSC_Msk + +#define GPTIM_CCMR_CCS_Pos (0U) +#define GPTIM_CCMR_CCS_Msk (0x3U << GPTIM_CCMR_CCS_Pos) +#define GPTIM_CCMR_CCS GPTIM_CCMR_CCS_Msk + +#define GPTIM_CCER_CCOP_Pos (1U) +#define GPTIM_CCER_CCOP_Msk (0x1U << GPTIM_CCER_CCOP_Pos) +#define GPTIM_CCER_CCOP GPTIM_CCER_CCOP_Msk + +#define GPTIM_CCER_CCIP_Pos (1U) +#define GPTIM_CCER_CCIP_Msk (0x1U << GPTIM_CCER_CCIP_Pos) +#define GPTIM_CCER_CCIP GPTIM_CCER_CCIP_Msk + +#define GPTIM_CCER_CCE_Pos (0U) +#define GPTIM_CCER_CCE_Msk (0x1U << GPTIM_CCER_CCE_Pos) +#define GPTIM_CCER_CCE GPTIM_CCER_CCE_Msk + + + +#define FL_GPTIM_CHANNEL_1 (0x1U << 0U) +#define FL_GPTIM_CHANNEL_2 (0x1U << 1U) +#define FL_GPTIM_CHANNEL_3 (0x1U << 2U) +#define FL_GPTIM_CHANNEL_4 (0x1U << 3U) +#define FL_GPTIM_ITR0 (0x1U << 0U) +#define FL_GPTIM_ITR1 (0x1U << 1U) +#define FL_GPTIM_ITR2 (0x1U << 2U) +#define FL_GPTIM_ITR3 (0x1U << 3U) + + + +#define FL_GPTIM_CLK_DIVISION_DIV1 (0x0U << GPTIM_CR1_CKD_Pos) +#define FL_GPTIM_CLK_DIVISION_DIV2 (0x1U << GPTIM_CR1_CKD_Pos) +#define FL_GPTIM_CLK_DIVISION_DIV4 (0x2U << GPTIM_CR1_CKD_Pos) + + +#define FL_GPTIM_COUNTER_ALIGNED_EDGE (0x0U << GPTIM_CR1_CMS_Pos) +#define FL_GPTIM_COUNTER_ALIGNED_CENTER_DOWN (0x1U << GPTIM_CR1_CMS_Pos) +#define FL_GPTIM_COUNTER_ALIGNED_CENTER_UP (0x2U << GPTIM_CR1_CMS_Pos) +#define FL_GPTIM_COUNTER_ALIGNED_CENTER_UP_DOWN (0x3U << GPTIM_CR1_CMS_Pos) + + +#define FL_GPTIM_COUNTER_DIR_UP (0x0U << GPTIM_CR1_DIR_Pos) +#define FL_GPTIM_COUNTER_DIR_DOWN (0x1U << GPTIM_CR1_DIR_Pos) + + +#define FL_GPTIM_ONE_PULSE_MODE_CONTINUOUS (0x0U << GPTIM_CR1_OPM_Pos) +#define FL_GPTIM_ONE_PULSE_MODE_SINGLE (0x1U << GPTIM_CR1_OPM_Pos) + + +#define FL_GPTIM_UPDATE_SOURCE_REGULAR (0x0U << GPTIM_CR1_URS_Pos) +#define FL_GPTIM_UPDATE_SOURCE_COUNTER (0x1U << GPTIM_CR1_URS_Pos) + + +#define FL_GPTIM_TRGO_RESET (0x0U << GPTIM_CR2_MMS_Pos) +#define FL_GPTIM_TRGO_ENABLE (0x1U << GPTIM_CR2_MMS_Pos) +#define FL_GPTIM_TRGO_UPDATE (0x2U << GPTIM_CR2_MMS_Pos) +#define FL_GPTIM_TRGO_CC1IF (0x3U << GPTIM_CR2_MMS_Pos) +#define FL_GPTIM_TRGO_OC1REF (0x4U << GPTIM_CR2_MMS_Pos) +#define FL_GPTIM_TRGO_OC2REF (0x5U << GPTIM_CR2_MMS_Pos) +#define FL_GPTIM_TRGO_OC3REF (0x6U << GPTIM_CR2_MMS_Pos) +#define FL_GPTIM_TRGO_OC4REF (0x7U << GPTIM_CR2_MMS_Pos) + + +#define FL_GPTIM_DMA_REQ_CC (0x0U << GPTIM_CR2_CCDS_Pos) +#define FL_GPTIM_DMA_REQ_UPDATE (0x1U << GPTIM_CR2_CCDS_Pos) + + +#define FL_GPTIM_ETR_POLARITY_NORMAL (0x0U << GPTIM_SMCR_ETP_Pos) +#define FL_GPTIM_ETR_POLARITY_INVERT (0x1U << GPTIM_SMCR_ETP_Pos) + + +#define FL_GPTIM_ETR_PSC_DIV1 (0x0U << GPTIM_SMCR_ETPS_Pos) +#define FL_GPTIM_ETR_PSC_DIV2 (0x1U << GPTIM_SMCR_ETPS_Pos) +#define FL_GPTIM_ETR_PSC_DIV4 (0x2U << GPTIM_SMCR_ETPS_Pos) +#define FL_GPTIM_ETR_PSC_DIV8 (0x3U << GPTIM_SMCR_ETPS_Pos) + + +#define FL_GPTIM_ETR_FILTER_DIV1 (0x0U << GPTIM_SMCR_ETF_Pos) +#define FL_GPTIM_ETR_FILTER_DIV1_N2 (0x1U << GPTIM_SMCR_ETF_Pos) +#define FL_GPTIM_ETR_FILTER_DIV1_N4 (0x2U << GPTIM_SMCR_ETF_Pos) +#define FL_GPTIM_ETR_FILTER_DIV1_N8 (0x3U << GPTIM_SMCR_ETF_Pos) +#define FL_GPTIM_ETR_FILTER_DIV2_N6 (0x4U << GPTIM_SMCR_ETF_Pos) +#define FL_GPTIM_ETR_FILTER_DIV2_N8 (0x5U << GPTIM_SMCR_ETF_Pos) +#define FL_GPTIM_ETR_FILTER_DIV4_N6 (0x6U << GPTIM_SMCR_ETF_Pos) +#define FL_GPTIM_ETR_FILTER_DIV4_N8 (0x7U << GPTIM_SMCR_ETF_Pos) +#define FL_GPTIM_ETR_FILTER_DIV8_N6 (0x8U << GPTIM_SMCR_ETF_Pos) +#define FL_GPTIM_ETR_FILTER_DIV8_N8 (0x9U << GPTIM_SMCR_ETF_Pos) +#define FL_GPTIM_ETR_FILTER_DIV16_N5 (0xaU << GPTIM_SMCR_ETF_Pos) +#define FL_GPTIM_ETR_FILTER_DIV16_N6 (0xbU << GPTIM_SMCR_ETF_Pos) +#define FL_GPTIM_ETR_FILTER_DIV16_N8 (0xcU << GPTIM_SMCR_ETF_Pos) +#define FL_GPTIM_ETR_FILTER_DIV32_N5 (0xdU << GPTIM_SMCR_ETF_Pos) +#define FL_GPTIM_ETR_FILTER_DIV32_N6 (0xeU << GPTIM_SMCR_ETF_Pos) +#define FL_GPTIM_ETR_FILTER_DIV32_N8 (0xfU << GPTIM_SMCR_ETF_Pos) + + +#define FL_GPTIM_TIM_TS_ITR0 (0x0U << GPTIM_SMCR_TS_Pos) +#define FL_GPTIM_TIM_TS_ITR1 (0x1U << GPTIM_SMCR_TS_Pos) +#define FL_GPTIM_TIM_TS_ITR2 (0x2U << GPTIM_SMCR_TS_Pos) +#define FL_GPTIM_TIM_TS_ITR3 (0x3U << GPTIM_SMCR_TS_Pos) +#define FL_GPTIM_TIM_TS_TI1F_ED (0x4U << GPTIM_SMCR_TS_Pos) +#define FL_GPTIM_TIM_TS_TI1FP1 (0x5U << GPTIM_SMCR_TS_Pos) +#define FL_GPTIM_TIM_TS_TI2FP2 (0x6U << GPTIM_SMCR_TS_Pos) +#define FL_GPTIM_TIM_TS_ETRF (0x7U << GPTIM_SMCR_TS_Pos) + + +#define FL_GPTIM_SLAVE_MODE_PROHIBITED (0x0U << GPTIM_SMCR_SMS_Pos) +#define FL_GPTIM_SLAVE_MODE_ENCODER_X2_TI1 (0x1U << GPTIM_SMCR_SMS_Pos) +#define FL_GPTIM_SLAVE_MODE_ENCODER_X2_TI2 (0x2U << GPTIM_SMCR_SMS_Pos) +#define FL_GPTIM_SLAVE_MODE_ENCODER_X4_TI1TI2 (0x3U << GPTIM_SMCR_SMS_Pos) +#define FL_GPTIM_SLAVE_MODE_TRGI_RISE_RST (0x4U << GPTIM_SMCR_SMS_Pos) +#define FL_GPTIM_SLAVE_MODE_TRGI_HIGH_RUN (0x5U << GPTIM_SMCR_SMS_Pos) +#define FL_GPTIM_SLAVE_MODE_TRGI_RISE_RUN (0x6U << GPTIM_SMCR_SMS_Pos) +#define FL_GPTIM_SLAVE_MODE_TRGI_CLK (0x7U << GPTIM_SMCR_SMS_Pos) + + +#define FL_GPTIM_DMA_BURST_LENGTH_1 (0x0U << GPTIM_DCR_DBL_Pos) +#define FL_GPTIM_DMA_BURST_LENGTH_2 (0x1U << GPTIM_DCR_DBL_Pos) +#define FL_GPTIM_DMA_BURST_LENGTH_3 (0x2U << GPTIM_DCR_DBL_Pos) +#define FL_GPTIM_DMA_BURST_LENGTH_4 (0x3U << GPTIM_DCR_DBL_Pos) +#define FL_GPTIM_DMA_BURST_LENGTH_5 (0x4U << GPTIM_DCR_DBL_Pos) +#define FL_GPTIM_DMA_BURST_LENGTH_6 (0x5U << GPTIM_DCR_DBL_Pos) +#define FL_GPTIM_DMA_BURST_LENGTH_7 (0x6U << GPTIM_DCR_DBL_Pos) +#define FL_GPTIM_DMA_BURST_LENGTH_8 (0x7U << GPTIM_DCR_DBL_Pos) +#define FL_GPTIM_DMA_BURST_LENGTH_9 (0x8U << GPTIM_DCR_DBL_Pos) +#define FL_GPTIM_DMA_BURST_LENGTH_10 (0x9U << GPTIM_DCR_DBL_Pos) +#define FL_GPTIM_DMA_BURST_LENGTH_11 (0xaU << GPTIM_DCR_DBL_Pos) +#define FL_GPTIM_DMA_BURST_LENGTH_12 (0xbU << GPTIM_DCR_DBL_Pos) +#define FL_GPTIM_DMA_BURST_LENGTH_13 (0xcU << GPTIM_DCR_DBL_Pos) +#define FL_GPTIM_DMA_BURST_LENGTH_14 (0xdU << GPTIM_DCR_DBL_Pos) +#define FL_GPTIM_DMA_BURST_LENGTH_15 (0xeU << GPTIM_DCR_DBL_Pos) +#define FL_GPTIM_DMA_BURST_LENGTH_16 (0xfU << GPTIM_DCR_DBL_Pos) +#define FL_GPTIM_DMA_BURST_LENGTH_17 (0x10U << GPTIM_DCR_DBL_Pos) +#define FL_GPTIM_DMA_BURST_LENGTH_18 (0x11U << GPTIM_DCR_DBL_Pos) + + +#define FL_GPTIM_DMA_BURST_ADDR_CR1 (0x0U << GPTIM_DCR_DBA_Pos) +#define FL_GPTIM_DMA_BURST_ADDR_CR2 (0x1U << GPTIM_DCR_DBA_Pos) +#define FL_GPTIM_DMA_BURST_ADDR_SMCR (0x2U << GPTIM_DCR_DBA_Pos) +#define FL_GPTIM_DMA_BURST_ADDR_DIER (0x3U << GPTIM_DCR_DBA_Pos) +#define FL_GPTIM_DMA_BURST_ADDR_SR (0x4U << GPTIM_DCR_DBA_Pos) +#define FL_GPTIM_DMA_BURST_ADDR_EGR (0x5U << GPTIM_DCR_DBA_Pos) +#define FL_GPTIM_DMA_BURST_ADDR_CCMR1 (0x6U << GPTIM_DCR_DBA_Pos) +#define FL_GPTIM_DMA_BURST_ADDR_CCMR2 (0x7U << GPTIM_DCR_DBA_Pos) +#define FL_GPTIM_DMA_BURST_ADDR_CCER (0x8U << GPTIM_DCR_DBA_Pos) +#define FL_GPTIM_DMA_BURST_ADDR_CNT (0x9U << GPTIM_DCR_DBA_Pos) +#define FL_GPTIM_DMA_BURST_ADDR_PSC (0xaU << GPTIM_DCR_DBA_Pos) +#define FL_GPTIM_DMA_BURST_ADDR_ARR (0xbU << GPTIM_DCR_DBA_Pos) +#define FL_GPTIM_DMA_BURST_ADDR_RCR (0xcU << GPTIM_DCR_DBA_Pos) +#define FL_GPTIM_DMA_BURST_ADDR_CCR1 (0xdU << GPTIM_DCR_DBA_Pos) +#define FL_GPTIM_DMA_BURST_ADDR_CCR2 (0xeU << GPTIM_DCR_DBA_Pos) +#define FL_GPTIM_DMA_BURST_ADDR_CCR3 (0xfU << GPTIM_DCR_DBA_Pos) +#define FL_GPTIM_DMA_BURST_ADDR_CCR4 (0x10U << GPTIM_DCR_DBA_Pos) +#define FL_GPTIM_DMA_BURST_ADDR_BDTR (0x11U << GPTIM_DCR_DBA_Pos) + + +#define FL_GPTIM_ITRSEL_GROUP0 (0x0U << GPTIM_ITRSEL_Pos) +#define FL_GPTIM_ITRSEL_GROUP1 (0x1U << GPTIM_ITRSEL_Pos) +#define FL_GPTIM_ITRSEL_GROUP2 (0x2U << GPTIM_ITRSEL_Pos) +#define FL_GPTIM_ITRSEL_GROUP3 (0x3U << GPTIM_ITRSEL_Pos) + + +#define FL_GPTIM_OC_MODE_FROZEN (0x0U << GPTIM_CCMR_OCM_Pos) +#define FL_GPTIM_OC_MODE_ACTIVE (0x1U << GPTIM_CCMR_OCM_Pos) +#define FL_GPTIM_OC_MODE_INACTIVE (0x2U << GPTIM_CCMR_OCM_Pos) +#define FL_GPTIM_OC_MODE_TOGGLE (0x3U << GPTIM_CCMR_OCM_Pos) +#define FL_GPTIM_OC_MODE_FORCED_INACTIVE (0x4U << GPTIM_CCMR_OCM_Pos) +#define FL_GPTIM_OC_MODE_FORCED_ACTIVE (0x5U << GPTIM_CCMR_OCM_Pos) +#define FL_GPTIM_OC_MODE_PWM1 (0x6U << GPTIM_CCMR_OCM_Pos) +#define FL_GPTIM_OC_MODE_PWM2 (0x7U << GPTIM_CCMR_OCM_Pos) + + +#define FL_GPTIM_IC_FILTER_DIV1 (0x0U << GPTIM_CCMR_ICF_Pos) +#define FL_GPTIM_IC_FILTER_DIV1_N2 (0x1U << GPTIM_CCMR_ICF_Pos) +#define FL_GPTIM_IC_FILTER_DIV1_N4 (0x2U << GPTIM_CCMR_ICF_Pos) +#define FL_GPTIM_IC_FILTER_DIV1_N8 (0x3U << GPTIM_CCMR_ICF_Pos) +#define FL_GPTIM_IC_FILTER_DIV2_N6 (0x4U << GPTIM_CCMR_ICF_Pos) +#define FL_GPTIM_IC_FILTER_DIV2_N8 (0x5U << GPTIM_CCMR_ICF_Pos) +#define FL_GPTIM_IC_FILTER_DIV4_N6 (0x6U << GPTIM_CCMR_ICF_Pos) +#define FL_GPTIM_IC_FILTER_DIV4_N8 (0x7U << GPTIM_CCMR_ICF_Pos) +#define FL_GPTIM_IC_FILTER_DIV8_N6 (0x8U << GPTIM_CCMR_ICF_Pos) +#define FL_GPTIM_IC_FILTER_DIV8_N8 (0x9U << GPTIM_CCMR_ICF_Pos) +#define FL_GPTIM_IC_FILTER_DIV16_N5 (0xaU << GPTIM_CCMR_ICF_Pos) +#define FL_GPTIM_IC_FILTER_DIV16_N6 (0xbU << GPTIM_CCMR_ICF_Pos) +#define FL_GPTIM_IC_FILTER_DIV16_N8 (0xcU << GPTIM_CCMR_ICF_Pos) +#define FL_GPTIM_IC_FILTER_DIV32_N5 (0xdU << GPTIM_CCMR_ICF_Pos) +#define FL_GPTIM_IC_FILTER_DIV32_N6 (0xeU << GPTIM_CCMR_ICF_Pos) +#define FL_GPTIM_IC_FILTER_DIV32_N8 (0xfU << GPTIM_CCMR_ICF_Pos) + + +#define FL_GPTIM_IC_PSC_DIV1 (0x0U << GPTIM_CCMR_ICPSC_Pos) +#define FL_GPTIM_IC_PSC_DIV2 (0x1U << GPTIM_CCMR_ICPSC_Pos) +#define FL_GPTIM_IC_PSC_DIV4 (0x2U << GPTIM_CCMR_ICPSC_Pos) +#define FL_GPTIM_IC_PSC_DIV8 (0x3U << GPTIM_CCMR_ICPSC_Pos) + + +#define FL_GPTIM_CHANNEL_MODE_OUTPUT (0x0U << GPTIM_CCMR_CCS_Pos) +#define FL_GPTIM_CHANNEL_MODE_INPUT_NORMAL (0x1U << GPTIM_CCMR_CCS_Pos) +#define FL_GPTIM_CHANNEL_MODE_INPUT_CROSSOVER (0x2U << GPTIM_CCMR_CCS_Pos) +#define FL_GPTIM_CHANNEL_MODE_INPUT_TRC (0x3U << GPTIM_CCMR_CCS_Pos) + + +#define FL_GPTIM_OC_POLARITY_NORMAL (0x0U << GPTIM_CCER_CCOP_Pos) +#define FL_GPTIM_OC_POLARITY_INVERT (0x1U << GPTIM_CCER_CCOP_Pos) + + +#define FL_GPTIM_IC_POLARITY_NORMAL (0x0U << GPTIM_CCER_CCIP_Pos) +#define FL_GPTIM_IC_POLARITY_INVERT (0x1U << GPTIM_CCER_CCIP_Pos) + + +/** + * @} + */ +/* Exported functions ---------------------------------------------------------------------------------*/ +/** @defgroup GPTIM_FL_Exported_Functions GPTIM Exported Functions + * @{ + */ + +/** + * @brief + * @rmtoll CR1 CKD FL_GPTIM_SetClockDivision + * @param TIMx TIM instance + * @param div This parameter can be one of the following values: + * @arg @ref FL_GPTIM_CLK_DIVISION_DIV1 + * @arg @ref FL_GPTIM_CLK_DIVISION_DIV2 + * @arg @ref FL_GPTIM_CLK_DIVISION_DIV4 + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_SetClockDivision(GPTIM_Type *TIMx, uint32_t div) +{ + MODIFY_REG(TIMx->CR1, GPTIM_CR1_CKD_Msk, div); +} + +/** + * @brief + * @rmtoll CR1 CKD FL_GPTIM_GetClockDivision + * @param TIMx TIM instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_GPTIM_CLK_DIVISION_DIV1 + * @arg @ref FL_GPTIM_CLK_DIVISION_DIV2 + * @arg @ref FL_GPTIM_CLK_DIVISION_DIV4 + */ +__STATIC_INLINE uint32_t FL_GPTIM_GetClockDivision(GPTIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->CR1, GPTIM_CR1_CKD_Msk)); +} + +/** + * @brief + * @rmtoll CR1 ARPE FL_GPTIM_EnableARRPreload + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_EnableARRPreload(GPTIM_Type *TIMx) +{ + SET_BIT(TIMx->CR1, GPTIM_CR1_ARPE_Msk); +} + +/** + * @brief + * @rmtoll CR1 ARPE FL_GPTIM_IsEnabledARRPreload + * @param TIMx TIM instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_GPTIM_IsEnabledARRPreload(GPTIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->CR1, GPTIM_CR1_ARPE_Msk) == GPTIM_CR1_ARPE_Msk); +} + +/** + * @brief + * @rmtoll CR1 ARPE FL_GPTIM_DisableARRPreload + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_DisableARRPreload(GPTIM_Type *TIMx) +{ + CLEAR_BIT(TIMx->CR1, GPTIM_CR1_ARPE_Msk); +} + +/** + * @brief + * @rmtoll CR1 CMS FL_GPTIM_SetCounterAlignedMode + * @param TIMx TIM instance + * @param mode This parameter can be one of the following values: + * @arg @ref FL_GPTIM_COUNTER_ALIGNED_EDGE + * @arg @ref FL_GPTIM_COUNTER_ALIGNED_CENTER_DOWN + * @arg @ref FL_GPTIM_COUNTER_ALIGNED_CENTER_UP + * @arg @ref FL_GPTIM_COUNTER_ALIGNED_CENTER_UP_DOWN + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_SetCounterAlignedMode(GPTIM_Type *TIMx, uint32_t mode) +{ + MODIFY_REG(TIMx->CR1, GPTIM_CR1_CMS_Msk, mode); +} + +/** + * @brief + * @rmtoll CR1 CMS FL_GPTIM_GetCounterAlignedMode + * @param TIMx TIM instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_GPTIM_COUNTER_ALIGNED_EDGE + * @arg @ref FL_GPTIM_COUNTER_ALIGNED_CENTER_DOWN + * @arg @ref FL_GPTIM_COUNTER_ALIGNED_CENTER_UP + * @arg @ref FL_GPTIM_COUNTER_ALIGNED_CENTER_UP_DOWN + */ +__STATIC_INLINE uint32_t FL_GPTIM_GetCounterAlignedMode(GPTIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->CR1, GPTIM_CR1_CMS_Msk)); +} + +/** + * @brief + * @rmtoll CR1 DIR FL_GPTIM_SetCounterDirection + * @param TIMx TIM instance + * @param dir This parameter can be one of the following values: + * @arg @ref FL_GPTIM_COUNTER_DIR_UP + * @arg @ref FL_GPTIM_COUNTER_DIR_DOWN + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_SetCounterDirection(GPTIM_Type *TIMx, uint32_t dir) +{ + MODIFY_REG(TIMx->CR1, GPTIM_CR1_DIR_Msk, dir); +} + +/** + * @brief + * @rmtoll CR1 DIR FL_GPTIM_GetCounterDirection + * @param TIMx TIM instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_GPTIM_COUNTER_DIR_UP + * @arg @ref FL_GPTIM_COUNTER_DIR_DOWN + */ +__STATIC_INLINE uint32_t FL_GPTIM_GetCounterDirection(GPTIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->CR1, GPTIM_CR1_DIR_Msk)); +} + +/** + * @brief + * @rmtoll CR1 OPM FL_GPTIM_SetOnePulseMode + * @param TIMx TIM instance + * @param mode This parameter can be one of the following values: + * @arg @ref FL_GPTIM_ONE_PULSE_MODE_CONTINUOUS + * @arg @ref FL_GPTIM_ONE_PULSE_MODE_SINGLE + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_SetOnePulseMode(GPTIM_Type *TIMx, uint32_t mode) +{ + MODIFY_REG(TIMx->CR1, GPTIM_CR1_OPM_Msk, mode); +} + +/** + * @brief + * @rmtoll CR1 OPM FL_GPTIM_GetOnePulseMode + * @param TIMx TIM instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_GPTIM_ONE_PULSE_MODE_CONTINUOUS + * @arg @ref FL_GPTIM_ONE_PULSE_MODE_SINGLE + */ +__STATIC_INLINE uint32_t FL_GPTIM_GetOnePulseMode(GPTIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->CR1, GPTIM_CR1_OPM_Msk)); +} + +/** + * @brief + * @rmtoll CR1 URS FL_GPTIM_SetUpdateSource + * @param TIMx TIM instance + * @param source This parameter can be one of the following values: + * @arg @ref FL_GPTIM_UPDATE_SOURCE_REGULAR + * @arg @ref FL_GPTIM_UPDATE_SOURCE_COUNTER + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_SetUpdateSource(GPTIM_Type *TIMx, uint32_t source) +{ + MODIFY_REG(TIMx->CR1, GPTIM_CR1_URS_Msk, source); +} + +/** + * @brief + * @rmtoll CR1 URS FL_GPTIM_GetUpdateSource + * @param TIMx TIM instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_GPTIM_UPDATE_SOURCE_REGULAR + * @arg @ref FL_GPTIM_UPDATE_SOURCE_COUNTER + */ +__STATIC_INLINE uint32_t FL_GPTIM_GetUpdateSource(GPTIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->CR1, GPTIM_CR1_URS_Msk)); +} + +/** + * @brief + * @rmtoll CR1 UDIS FL_GPTIM_EnableUpdateEvent + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_EnableUpdateEvent(GPTIM_Type *TIMx) +{ + CLEAR_BIT(TIMx->CR1, GPTIM_CR1_UDIS_Msk); +} + +/** + * @brief + * @rmtoll CR1 UDIS FL_GPTIM_IsEnabledUpdateEvent + * @param TIMx TIM instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_GPTIM_IsEnabledUpdateEvent(GPTIM_Type *TIMx) +{ + return (uint32_t)!(READ_BIT(TIMx->CR1, GPTIM_CR1_UDIS_Msk) == GPTIM_CR1_UDIS_Msk); +} + +/** + * @brief + * @rmtoll CR1 UDIS FL_GPTIM_DisableUpdateEvent + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_DisableUpdateEvent(GPTIM_Type *TIMx) +{ + SET_BIT(TIMx->CR1, GPTIM_CR1_UDIS_Msk); +} + +/** + * @brief + * @rmtoll CR1 CEN FL_GPTIM_Enable + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_Enable(GPTIM_Type *TIMx) +{ + SET_BIT(TIMx->CR1, GPTIM_CR1_CEN_Msk); +} + +/** + * @brief + * @rmtoll CR1 CEN FL_GPTIM_IsEnabled + * @param TIMx TIM instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_GPTIM_IsEnabled(GPTIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->CR1, GPTIM_CR1_CEN_Msk) == GPTIM_CR1_CEN_Msk); +} + +/** + * @brief + * @rmtoll CR1 CEN FL_GPTIM_Disable + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_Disable(GPTIM_Type *TIMx) +{ + CLEAR_BIT(TIMx->CR1, GPTIM_CR1_CEN_Msk); +} + +/** + * @brief + * @rmtoll CR2 TI1S FL_GPTIM_IC_EnableXORCombination + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_IC_EnableXORCombination(GPTIM_Type *TIMx) +{ + SET_BIT(TIMx->CR2, GPTIM_CR2_TI1S_Msk); +} + +/** + * @brief + * @rmtoll CR2 TI1S FL_GPTIM_IC_IsEnabledXORCombination + * @param TIMx TIM instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_GPTIM_IC_IsEnabledXORCombination(GPTIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->CR2, GPTIM_CR2_TI1S_Msk) == GPTIM_CR2_TI1S_Msk); +} + +/** + * @brief + * @rmtoll CR2 TI1S FL_GPTIM_IC_DisableXORCombination + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_IC_DisableXORCombination(GPTIM_Type *TIMx) +{ + CLEAR_BIT(TIMx->CR2, GPTIM_CR2_TI1S_Msk); +} + +/** + * @brief + * @rmtoll CR2 MMS FL_GPTIM_SetTriggerOutput + * @param TIMx TIM instance + * @param triggerOutput This parameter can be one of the following values: + * @arg @ref FL_GPTIM_TRGO_RESET + * @arg @ref FL_GPTIM_TRGO_ENABLE + * @arg @ref FL_GPTIM_TRGO_UPDATE + * @arg @ref FL_GPTIM_TRGO_CC1IF + * @arg @ref FL_GPTIM_TRGO_OC1REF + * @arg @ref FL_GPTIM_TRGO_OC2REF + * @arg @ref FL_GPTIM_TRGO_OC3REF + * @arg @ref FL_GPTIM_TRGO_OC4REF + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_SetTriggerOutput(GPTIM_Type *TIMx, uint32_t triggerOutput) +{ + MODIFY_REG(TIMx->CR2, GPTIM_CR2_MMS_Msk, triggerOutput); +} + +/** + * @brief + * @rmtoll CR2 MMS FL_GPTIM_GetTriggerOutput + * @param TIMx TIM instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_GPTIM_TRGO_RESET + * @arg @ref FL_GPTIM_TRGO_ENABLE + * @arg @ref FL_GPTIM_TRGO_UPDATE + * @arg @ref FL_GPTIM_TRGO_CC1IF + * @arg @ref FL_GPTIM_TRGO_OC1REF + * @arg @ref FL_GPTIM_TRGO_OC2REF + * @arg @ref FL_GPTIM_TRGO_OC3REF + * @arg @ref FL_GPTIM_TRGO_OC4REF + */ +__STATIC_INLINE uint32_t FL_GPTIM_GetTriggerOutput(GPTIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->CR2, GPTIM_CR2_MMS_Msk)); +} + +/** + * @brief + * @rmtoll CR2 CCDS FL_GPTIM_CC_SetDMAReqTrigger + * @param TIMx TIM instance + * @param trigger This parameter can be one of the following values: + * @arg @ref FL_GPTIM_DMA_REQ_CC + * @arg @ref FL_GPTIM_DMA_REQ_UPDATE + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_CC_SetDMAReqTrigger(GPTIM_Type *TIMx, uint32_t trigger) +{ + MODIFY_REG(TIMx->CR2, GPTIM_CR2_CCDS_Msk, trigger); +} + +/** + * @brief + * @rmtoll CR2 CCDS FL_GPTIM_CC_GetDMAReqTrigger + * @param TIMx TIM instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_GPTIM_DMA_REQ_CC + * @arg @ref FL_GPTIM_DMA_REQ_UPDATE + */ +__STATIC_INLINE uint32_t FL_GPTIM_CC_GetDMAReqTrigger(GPTIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->CR2, GPTIM_CR2_CCDS_Msk)); +} + +/** + * @brief + * @rmtoll SMCR ETP FL_GPTIM_SetETRPolarity + * @param TIMx TIM instance + * @param polarity This parameter can be one of the following values: + * @arg @ref FL_GPTIM_ETR_POLARITY_NORMAL + * @arg @ref FL_GPTIM_ETR_POLARITY_INVERT + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_SetETRPolarity(GPTIM_Type *TIMx, uint32_t polarity) +{ + MODIFY_REG(TIMx->SMCR, GPTIM_SMCR_ETP_Msk, polarity); +} + +/** + * @brief + * @rmtoll SMCR ETP FL_GPTIM_GetETRPolarity + * @param TIMx TIM instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_GPTIM_ETR_POLARITY_NORMAL + * @arg @ref FL_GPTIM_ETR_POLARITY_INVERT + */ +__STATIC_INLINE uint32_t FL_GPTIM_GetETRPolarity(GPTIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->SMCR, GPTIM_SMCR_ETP_Msk)); +} + +/** + * @brief + * @rmtoll SMCR ECE FL_GPTIM_EnableExternalClock + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_EnableExternalClock(GPTIM_Type *TIMx) +{ + SET_BIT(TIMx->SMCR, GPTIM_SMCR_ECE_Msk); +} + +/** + * @brief + * @rmtoll SMCR ECE FL_GPTIM_IsEnabledExternalClock + * @param TIMx TIM instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_GPTIM_IsEnabledExternalClock(GPTIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->SMCR, GPTIM_SMCR_ECE_Msk) == GPTIM_SMCR_ECE_Msk); +} + +/** + * @brief + * @rmtoll SMCR ECE FL_GPTIM_DisableExternalClock + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_DisableExternalClock(GPTIM_Type *TIMx) +{ + CLEAR_BIT(TIMx->SMCR, GPTIM_SMCR_ECE_Msk); +} + +/** + * @brief + * @rmtoll SMCR ETPS FL_GPTIM_SetETRPrescaler + * @param TIMx TIM instance + * @param psc This parameter can be one of the following values: + * @arg @ref FL_GPTIM_ETR_PSC_DIV1 + * @arg @ref FL_GPTIM_ETR_PSC_DIV2 + * @arg @ref FL_GPTIM_ETR_PSC_DIV4 + * @arg @ref FL_GPTIM_ETR_PSC_DIV8 + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_SetETRPrescaler(GPTIM_Type *TIMx, uint32_t psc) +{ + MODIFY_REG(TIMx->SMCR, GPTIM_SMCR_ETPS_Msk, psc); +} + +/** + * @brief + * @rmtoll SMCR ETPS FL_GPTIM_GetETRPrescaler + * @param TIMx TIM instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_GPTIM_ETR_PSC_DIV1 + * @arg @ref FL_GPTIM_ETR_PSC_DIV2 + * @arg @ref FL_GPTIM_ETR_PSC_DIV4 + * @arg @ref FL_GPTIM_ETR_PSC_DIV8 + */ +__STATIC_INLINE uint32_t FL_GPTIM_GetETRPrescaler(GPTIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->SMCR, GPTIM_SMCR_ETPS_Msk)); +} + +/** + * @brief + * @rmtoll SMCR ETF FL_GPTIM_SetETRFilter + * @param TIMx TIM instance + * @param filter This parameter can be one of the following values: + * @arg @ref FL_GPTIM_ETR_FILTER_DIV1 + * @arg @ref FL_GPTIM_ETR_FILTER_DIV1_N2 + * @arg @ref FL_GPTIM_ETR_FILTER_DIV1_N4 + * @arg @ref FL_GPTIM_ETR_FILTER_DIV1_N8 + * @arg @ref FL_GPTIM_ETR_FILTER_DIV2_N6 + * @arg @ref FL_GPTIM_ETR_FILTER_DIV2_N8 + * @arg @ref FL_GPTIM_ETR_FILTER_DIV4_N6 + * @arg @ref FL_GPTIM_ETR_FILTER_DIV4_N8 + * @arg @ref FL_GPTIM_ETR_FILTER_DIV8_N6 + * @arg @ref FL_GPTIM_ETR_FILTER_DIV8_N8 + * @arg @ref FL_GPTIM_ETR_FILTER_DIV16_N5 + * @arg @ref FL_GPTIM_ETR_FILTER_DIV16_N6 + * @arg @ref FL_GPTIM_ETR_FILTER_DIV16_N8 + * @arg @ref FL_GPTIM_ETR_FILTER_DIV32_N5 + * @arg @ref FL_GPTIM_ETR_FILTER_DIV32_N6 + * @arg @ref FL_GPTIM_ETR_FILTER_DIV32_N8 + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_SetETRFilter(GPTIM_Type *TIMx, uint32_t filter) +{ + MODIFY_REG(TIMx->SMCR, GPTIM_SMCR_ETF_Msk, filter); +} + +/** + * @brief + * @rmtoll SMCR ETF FL_GPTIM_GetETRFilter + * @param TIMx TIM instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_GPTIM_ETR_FILTER_DIV1 + * @arg @ref FL_GPTIM_ETR_FILTER_DIV1_N2 + * @arg @ref FL_GPTIM_ETR_FILTER_DIV1_N4 + * @arg @ref FL_GPTIM_ETR_FILTER_DIV1_N8 + * @arg @ref FL_GPTIM_ETR_FILTER_DIV2_N6 + * @arg @ref FL_GPTIM_ETR_FILTER_DIV2_N8 + * @arg @ref FL_GPTIM_ETR_FILTER_DIV4_N6 + * @arg @ref FL_GPTIM_ETR_FILTER_DIV4_N8 + * @arg @ref FL_GPTIM_ETR_FILTER_DIV8_N6 + * @arg @ref FL_GPTIM_ETR_FILTER_DIV8_N8 + * @arg @ref FL_GPTIM_ETR_FILTER_DIV16_N5 + * @arg @ref FL_GPTIM_ETR_FILTER_DIV16_N6 + * @arg @ref FL_GPTIM_ETR_FILTER_DIV16_N8 + * @arg @ref FL_GPTIM_ETR_FILTER_DIV32_N5 + * @arg @ref FL_GPTIM_ETR_FILTER_DIV32_N6 + * @arg @ref FL_GPTIM_ETR_FILTER_DIV32_N8 + */ +__STATIC_INLINE uint32_t FL_GPTIM_GetETRFilter(GPTIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->SMCR, GPTIM_SMCR_ETF_Msk)); +} + +/** + * @brief + * @rmtoll SMCR MSM FL_GPTIM_EnableMasterSlaveMode + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_EnableMasterSlaveMode(GPTIM_Type *TIMx) +{ + SET_BIT(TIMx->SMCR, GPTIM_SMCR_MSM_Msk); +} + +/** + * @brief + * @rmtoll SMCR MSM FL_GPTIM_IsEnabledMasterSlaveMode + * @param TIMx TIM instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_GPTIM_IsEnabledMasterSlaveMode(GPTIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->SMCR, GPTIM_SMCR_MSM_Msk) == GPTIM_SMCR_MSM_Msk); +} + +/** + * @brief + * @rmtoll SMCR MSM FL_GPTIM_DisableMasterSlaveMode + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_DisableMasterSlaveMode(GPTIM_Type *TIMx) +{ + CLEAR_BIT(TIMx->SMCR, GPTIM_SMCR_MSM_Msk); +} + +/** + * @brief + * @rmtoll SMCR TS FL_GPTIM_SetTriggerInput + * @param TIMx TIM instance + * @param triggerInput This parameter can be one of the following values: + * @arg @ref FL_GPTIM_TIM_TS_ITR0 + * @arg @ref FL_GPTIM_TIM_TS_ITR1 + * @arg @ref FL_GPTIM_TIM_TS_ITR2 + * @arg @ref FL_GPTIM_TIM_TS_ITR3 + * @arg @ref FL_GPTIM_TIM_TS_TI1F_ED + * @arg @ref FL_GPTIM_TIM_TS_TI1FP1 + * @arg @ref FL_GPTIM_TIM_TS_TI2FP2 + * @arg @ref FL_GPTIM_TIM_TS_ETRF + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_SetTriggerInput(GPTIM_Type *TIMx, uint32_t triggerInput) +{ + MODIFY_REG(TIMx->SMCR, GPTIM_SMCR_TS_Msk, triggerInput); +} + +/** + * @brief + * @rmtoll SMCR TS FL_GPTIM_GetTriggerInput + * @param TIMx TIM instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_GPTIM_TIM_TS_ITR0 + * @arg @ref FL_GPTIM_TIM_TS_ITR1 + * @arg @ref FL_GPTIM_TIM_TS_ITR2 + * @arg @ref FL_GPTIM_TIM_TS_ITR3 + * @arg @ref FL_GPTIM_TIM_TS_TI1F_ED + * @arg @ref FL_GPTIM_TIM_TS_TI1FP1 + * @arg @ref FL_GPTIM_TIM_TS_TI2FP2 + * @arg @ref FL_GPTIM_TIM_TS_ETRF + */ +__STATIC_INLINE uint32_t FL_GPTIM_GetTriggerInput(GPTIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->SMCR, GPTIM_SMCR_TS_Msk)); +} + +/** + * @brief + * @rmtoll SMCR SMS FL_GPTIM_SetSlaveMode + * @param TIMx TIM instance + * @param encoderMode This parameter can be one of the following values: + * @arg @ref FL_GPTIM_SLAVE_MODE_PROHIBITED + * @arg @ref FL_GPTIM_SLAVE_MODE_ENCODER_X2_TI1 + * @arg @ref FL_GPTIM_SLAVE_MODE_ENCODER_X2_TI2 + * @arg @ref FL_GPTIM_SLAVE_MODE_ENCODER_X4_TI1TI2 + * @arg @ref FL_GPTIM_SLAVE_MODE_TRGI_RISE_RST + * @arg @ref FL_GPTIM_SLAVE_MODE_TRGI_HIGH_RUN + * @arg @ref FL_GPTIM_SLAVE_MODE_TRGI_RISE_RUN + * @arg @ref FL_GPTIM_SLAVE_MODE_TRGI_CLK + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_SetSlaveMode(GPTIM_Type *TIMx, uint32_t encoderMode) +{ + MODIFY_REG(TIMx->SMCR, GPTIM_SMCR_SMS_Msk, encoderMode); +} + +/** + * @brief + * @rmtoll SMCR SMS FL_GPTIM_GetSlaveMode + * @param TIMx TIM instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_GPTIM_SLAVE_MODE_PROHIBITED + * @arg @ref FL_GPTIM_SLAVE_MODE_ENCODER_X2_TI1 + * @arg @ref FL_GPTIM_SLAVE_MODE_ENCODER_X2_TI2 + * @arg @ref FL_GPTIM_SLAVE_MODE_ENCODER_X4_TI1TI2 + * @arg @ref FL_GPTIM_SLAVE_MODE_TRGI_RISE_RST + * @arg @ref FL_GPTIM_SLAVE_MODE_TRGI_HIGH_RUN + * @arg @ref FL_GPTIM_SLAVE_MODE_TRGI_RISE_RUN + * @arg @ref FL_GPTIM_SLAVE_MODE_TRGI_CLK + */ +__STATIC_INLINE uint32_t FL_GPTIM_GetSlaveMode(GPTIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->SMCR, GPTIM_SMCR_SMS_Msk)); +} + +/** + * @brief + * @rmtoll DIER CC1BURSTEN FL_GPTIM_EnableCC1DMABurstMode + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_EnableCC1DMABurstMode(GPTIM_Type *TIMx) +{ + SET_BIT(TIMx->DIER, GPTIM_DIER_CC1BURSTEN_Msk); +} + +/** + * @brief + * @rmtoll DIER CC1BURSTEN FL_GPTIM_IsEnabledCC1DMABurstMode + * @param TIMx TIM instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_GPTIM_IsEnabledCC1DMABurstMode(GPTIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->DIER, GPTIM_DIER_CC1BURSTEN_Msk) == GPTIM_DIER_CC1BURSTEN_Msk); +} + +/** + * @brief + * @rmtoll DIER CC1BURSTEN FL_GPTIM_DisableCC1DMABurstMode + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_DisableCC1DMABurstMode(GPTIM_Type *TIMx) +{ + CLEAR_BIT(TIMx->DIER, GPTIM_DIER_CC1BURSTEN_Msk); +} + +/** + * @brief + * @rmtoll DIER CC2BURSTEN FL_GPTIM_EnableCC2DMABurstMode + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_EnableCC2DMABurstMode(GPTIM_Type *TIMx) +{ + SET_BIT(TIMx->DIER, GPTIM_DIER_CC2BURSTEN_Msk); +} + +/** + * @brief + * @rmtoll DIER CC2BURSTEN FL_GPTIM_IsEnabledCC2DMABurstMode + * @param TIMx TIM instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_GPTIM_IsEnabledCC2DMABurstMode(GPTIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->DIER, GPTIM_DIER_CC2BURSTEN_Msk) == GPTIM_DIER_CC2BURSTEN_Msk); +} + +/** + * @brief + * @rmtoll DIER CC2BURSTEN FL_GPTIM_DisableCC2DMABurstMode + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_DisableCC2DMABurstMode(GPTIM_Type *TIMx) +{ + CLEAR_BIT(TIMx->DIER, GPTIM_DIER_CC2BURSTEN_Msk); +} + +/** + * @brief + * @rmtoll DIER CC3BURSTEN FL_GPTIM_EnableCC3DMABurstMode + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_EnableCC3DMABurstMode(GPTIM_Type *TIMx) +{ + SET_BIT(TIMx->DIER, GPTIM_DIER_CC3BURSTEN_Msk); +} + +/** + * @brief + * @rmtoll DIER CC3BURSTEN FL_GPTIM_IsEnabledCC3DMABurstMode + * @param TIMx TIM instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_GPTIM_IsEnabledCC3DMABurstMode(GPTIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->DIER, GPTIM_DIER_CC3BURSTEN_Msk) == GPTIM_DIER_CC3BURSTEN_Msk); +} + +/** + * @brief + * @rmtoll DIER CC3BURSTEN FL_GPTIM_DisableCC3DMABurstMode + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_DisableCC3DMABurstMode(GPTIM_Type *TIMx) +{ + CLEAR_BIT(TIMx->DIER, GPTIM_DIER_CC3BURSTEN_Msk); +} + +/** + * @brief + * @rmtoll DIER CC4BURSTEN FL_GPTIM_EnableCC4DMABurstMode + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_EnableCC4DMABurstMode(GPTIM_Type *TIMx) +{ + SET_BIT(TIMx->DIER, GPTIM_DIER_CC4BURSTEN_Msk); +} + +/** + * @brief + * @rmtoll DIER CC4BURSTEN FL_GPTIM_IsEnabledCC4DMABurstMode + * @param TIMx TIM instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_GPTIM_IsEnabledCC4DMABurstMode(GPTIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->DIER, GPTIM_DIER_CC4BURSTEN_Msk) == GPTIM_DIER_CC4BURSTEN_Msk); +} + +/** + * @brief + * @rmtoll DIER CC4BURSTEN FL_GPTIM_DisableCC4DMABurstMode + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_DisableCC4DMABurstMode(GPTIM_Type *TIMx) +{ + CLEAR_BIT(TIMx->DIER, GPTIM_DIER_CC4BURSTEN_Msk); +} + +/** + * @brief + * @rmtoll DIER TDE FL_GPTIM_EnableDMAReq_Trigger + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_EnableDMAReq_Trigger(GPTIM_Type *TIMx) +{ + SET_BIT(TIMx->DIER, GPTIM_DIER_TDE_Msk); +} + +/** + * @brief + * @rmtoll DIER TDE FL_GPTIM_IsEnabledDMAReq_Trigger + * @param TIMx TIM instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_GPTIM_IsEnabledDMAReq_Trigger(GPTIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->DIER, GPTIM_DIER_TDE_Msk) == GPTIM_DIER_TDE_Msk); +} + +/** + * @brief + * @rmtoll DIER TDE FL_GPTIM_DisableDMAReq_Trigger + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_DisableDMAReq_Trigger(GPTIM_Type *TIMx) +{ + CLEAR_BIT(TIMx->DIER, GPTIM_DIER_TDE_Msk); +} + +/** + * @brief + * @rmtoll DIER CCDE FL_GPTIM_EnableDMAReq_CC + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_GPTIM_CHANNEL_1 + * @arg @ref FL_GPTIM_CHANNEL_2 + * @arg @ref FL_GPTIM_CHANNEL_3 + * @arg @ref FL_GPTIM_CHANNEL_4 + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_EnableDMAReq_CC(GPTIM_Type *TIMx, uint32_t channel) +{ + SET_BIT(TIMx->DIER, ((channel & 0xf) << 0x9U)); +} + +/** + * @brief + * @rmtoll DIER CCDE FL_GPTIM_IsEnabledDMAReq_CC + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_GPTIM_CHANNEL_1 + * @arg @ref FL_GPTIM_CHANNEL_2 + * @arg @ref FL_GPTIM_CHANNEL_3 + * @arg @ref FL_GPTIM_CHANNEL_4 + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_GPTIM_IsEnabledDMAReq_CC(GPTIM_Type *TIMx, uint32_t channel) +{ + return (uint32_t)(READ_BIT(TIMx->DIER, ((channel & 0xf) << 0x9U)) == ((channel & 0xf) << 0x9U)); +} + +/** + * @brief + * @rmtoll DIER CCDE FL_GPTIM_DisableDMAReq_CC + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_GPTIM_CHANNEL_1 + * @arg @ref FL_GPTIM_CHANNEL_2 + * @arg @ref FL_GPTIM_CHANNEL_3 + * @arg @ref FL_GPTIM_CHANNEL_4 + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_DisableDMAReq_CC(GPTIM_Type *TIMx, uint32_t channel) +{ + CLEAR_BIT(TIMx->DIER, ((channel & 0xf) << 0x9U)); +} + +/** + * @brief + * @rmtoll DIER UDE FL_GPTIM_EnableDMAReq_Update + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_EnableDMAReq_Update(GPTIM_Type *TIMx) +{ + SET_BIT(TIMx->DIER, GPTIM_DIER_UDE_Msk); +} + +/** + * @brief + * @rmtoll DIER UDE FL_GPTIM_IsEnabledDMAReq_Update + * @param TIMx TIM instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_GPTIM_IsEnabledDMAReq_Update(GPTIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->DIER, GPTIM_DIER_UDE_Msk) == GPTIM_DIER_UDE_Msk); +} + +/** + * @brief + * @rmtoll DIER UDE FL_GPTIM_DisableDMAReq_Update + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_DisableDMAReq_Update(GPTIM_Type *TIMx) +{ + CLEAR_BIT(TIMx->DIER, GPTIM_DIER_UDE_Msk); +} + +/** + * @brief + * @rmtoll DIER TIE FL_GPTIM_EnableIT_Trigger + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_EnableIT_Trigger(GPTIM_Type *TIMx) +{ + SET_BIT(TIMx->DIER, GPTIM_DIER_TIE_Msk); +} + +/** + * @brief + * @rmtoll DIER TIE FL_GPTIM_IsEnabledIT_Trigger + * @param TIMx TIM instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_GPTIM_IsEnabledIT_Trigger(GPTIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->DIER, GPTIM_DIER_TIE_Msk) == GPTIM_DIER_TIE_Msk); +} + +/** + * @brief + * @rmtoll DIER TIE FL_GPTIM_DisableIT_Trigger + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_DisableIT_Trigger(GPTIM_Type *TIMx) +{ + CLEAR_BIT(TIMx->DIER, GPTIM_DIER_TIE_Msk); +} + +/** + * @brief + * @rmtoll DIER CCIE FL_GPTIM_EnableIT_CC + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_GPTIM_CHANNEL_1 + * @arg @ref FL_GPTIM_CHANNEL_2 + * @arg @ref FL_GPTIM_CHANNEL_3 + * @arg @ref FL_GPTIM_CHANNEL_4 + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_EnableIT_CC(GPTIM_Type *TIMx, uint32_t channel) +{ + SET_BIT(TIMx->DIER, ((channel & 0xf) << 0x1U)); +} + +/** + * @brief + * @rmtoll DIER CCIE FL_GPTIM_IsEnabledIT_CC + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_GPTIM_CHANNEL_1 + * @arg @ref FL_GPTIM_CHANNEL_2 + * @arg @ref FL_GPTIM_CHANNEL_3 + * @arg @ref FL_GPTIM_CHANNEL_4 + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_GPTIM_IsEnabledIT_CC(GPTIM_Type *TIMx, uint32_t channel) +{ + return (uint32_t)(READ_BIT(TIMx->DIER, ((channel & 0xf) << 0x1U)) == ((channel & 0xf) << 0x1U)); +} + +/** + * @brief + * @rmtoll DIER CCIE FL_GPTIM_DisableIT_CC + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_GPTIM_CHANNEL_1 + * @arg @ref FL_GPTIM_CHANNEL_2 + * @arg @ref FL_GPTIM_CHANNEL_3 + * @arg @ref FL_GPTIM_CHANNEL_4 + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_DisableIT_CC(GPTIM_Type *TIMx, uint32_t channel) +{ + CLEAR_BIT(TIMx->DIER, ((channel & 0xf) << 0x1U)); +} + +/** + * @brief + * @rmtoll DIER UIE FL_GPTIM_EnableIT_Update + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_EnableIT_Update(GPTIM_Type *TIMx) +{ + SET_BIT(TIMx->DIER, GPTIM_DIER_UIE_Msk); +} + +/** + * @brief + * @rmtoll DIER UIE FL_GPTIM_IsEnabledIT_Update + * @param TIMx TIM instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_GPTIM_IsEnabledIT_Update(GPTIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->DIER, GPTIM_DIER_UIE_Msk) == GPTIM_DIER_UIE_Msk); +} + +/** + * @brief + * @rmtoll DIER UIE FL_GPTIM_DisableIT_Update + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_DisableIT_Update(GPTIM_Type *TIMx) +{ + CLEAR_BIT(TIMx->DIER, GPTIM_DIER_UIE_Msk); +} + +/** + * @brief + * @rmtoll ISR CCOF FL_GPTIM_IsActiveFlag_CCOverflow + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_GPTIM_CHANNEL_1 + * @arg @ref FL_GPTIM_CHANNEL_2 + * @arg @ref FL_GPTIM_CHANNEL_3 + * @arg @ref FL_GPTIM_CHANNEL_4 + * @retval Returned value can be one of the following values: + */ +__STATIC_INLINE uint32_t FL_GPTIM_IsActiveFlag_CCOverflow(GPTIM_Type *TIMx, uint32_t channel) +{ + return (uint32_t)(READ_BIT(TIMx->ISR, ((channel & 0xf) << 0x9U)) == ((channel & 0xf) << 0x9U)); +} + +/** + * @brief + * @rmtoll ISR CCOF FL_GPTIM_ClearFlag_CCOverflow + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_GPTIM_CHANNEL_1 + * @arg @ref FL_GPTIM_CHANNEL_2 + * @arg @ref FL_GPTIM_CHANNEL_3 + * @arg @ref FL_GPTIM_CHANNEL_4 + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_ClearFlag_CCOverflow(GPTIM_Type *TIMx, uint32_t channel) +{ + WRITE_REG(TIMx->ISR, ((channel & 0xf) << 0x9U)); +} + +/** + * @brief + * @rmtoll ISR TIF FL_GPTIM_IsActiveFlag_Trigger + * @param TIMx TIM instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_GPTIM_IsActiveFlag_Trigger(GPTIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->ISR, GPTIM_ISR_TIF_Msk) == (GPTIM_ISR_TIF_Msk)); +} + +/** + * @brief + * @rmtoll ISR TIF FL_GPTIM_ClearFlag_Trigger + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_ClearFlag_Trigger(GPTIM_Type *TIMx) +{ + WRITE_REG(TIMx->ISR, GPTIM_ISR_TIF_Msk); +} + +/** + * @brief + * @rmtoll ISR CCIF FL_GPTIM_IsActiveFlag_CC + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_GPTIM_CHANNEL_1 + * @arg @ref FL_GPTIM_CHANNEL_2 + * @arg @ref FL_GPTIM_CHANNEL_3 + * @arg @ref FL_GPTIM_CHANNEL_4 + * @retval Returned value can be one of the following values: + */ +__STATIC_INLINE uint32_t FL_GPTIM_IsActiveFlag_CC(GPTIM_Type *TIMx, uint32_t channel) +{ + return (uint32_t)(READ_BIT(TIMx->ISR, ((channel & 0xf) << 0x1U)) == ((channel & 0xf) << 0x1U)); +} + +/** + * @brief + * @rmtoll ISR CCIF FL_GPTIM_ClearFlag_CC + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_GPTIM_CHANNEL_1 + * @arg @ref FL_GPTIM_CHANNEL_2 + * @arg @ref FL_GPTIM_CHANNEL_3 + * @arg @ref FL_GPTIM_CHANNEL_4 + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_ClearFlag_CC(GPTIM_Type *TIMx, uint32_t channel) +{ + WRITE_REG(TIMx->ISR, ((channel & 0xf) << 0x1U)); +} + +/** + * @brief + * @rmtoll ISR UIF FL_GPTIM_IsActiveFlag_Update + * @param TIMx TIM instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_GPTIM_IsActiveFlag_Update(GPTIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->ISR, GPTIM_ISR_UIF_Msk) == (GPTIM_ISR_UIF_Msk)); +} + +/** + * @brief + * @rmtoll ISR UIF FL_GPTIM_ClearFlag_Update + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_ClearFlag_Update(GPTIM_Type *TIMx) +{ + WRITE_REG(TIMx->ISR, GPTIM_ISR_UIF_Msk); +} + +/** + * @brief + * @rmtoll EGR TG FL_GPTIM_GenerateTriggerEvent + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_GenerateTriggerEvent(GPTIM_Type *TIMx) +{ + SET_BIT(TIMx->EGR, GPTIM_EGR_TG_Msk); +} + +/** + * @brief + * @rmtoll EGR CCG FL_GPTIM_GenerateCCEvent + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_GPTIM_CHANNEL_1 + * @arg @ref FL_GPTIM_CHANNEL_2 + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_GenerateCCEvent(GPTIM_Type *TIMx, uint32_t channel) +{ + SET_BIT(TIMx->EGR, ((channel & 0x3) << 0x1U)); +} + +/** + * @brief + * @rmtoll EGR UG FL_GPTIM_GenerateUpdateEvent + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_GenerateUpdateEvent(GPTIM_Type *TIMx) +{ + SET_BIT(TIMx->EGR, GPTIM_EGR_UG_Msk); +} + +/** + * @brief + * @rmtoll CNT FL_GPTIM_WriteCounter + * @param TIMx TIM instance + * @param counter + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_WriteCounter(GPTIM_Type *TIMx, uint32_t counter) +{ + MODIFY_REG(TIMx->CNT, (0xffffU << 0U), (counter << 0U)); +} + +/** + * @brief + * @rmtoll CNT FL_GPTIM_ReadCounter + * @param TIMx TIM instance + * @retval + */ +__STATIC_INLINE uint32_t FL_GPTIM_ReadCounter(GPTIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->CNT, 0xffffU) >> 0U); +} + +/** + * @brief + * @rmtoll PSC FL_GPTIM_WritePrescaler + * @param TIMx TIM instance + * @param psc + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_WritePrescaler(GPTIM_Type *TIMx, uint32_t psc) +{ + MODIFY_REG(TIMx->PSC, (0xffffU << 0U), (psc << 0U)); +} + +/** + * @brief + * @rmtoll PSC FL_GPTIM_ReadPrescaler + * @param TIMx TIM instance + * @retval + */ +__STATIC_INLINE uint32_t FL_GPTIM_ReadPrescaler(GPTIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->PSC, 0xffffU) >> 0U); +} + +/** + * @brief + * @rmtoll ARR FL_GPTIM_WriteAutoReload + * @param TIMx TIM instance + * @param autoReload + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_WriteAutoReload(GPTIM_Type *TIMx, uint32_t autoReload) +{ + MODIFY_REG(TIMx->ARR, (0xffffU << 0U), (autoReload << 0U)); +} + +/** + * @brief + * @rmtoll ARR FL_GPTIM_ReadAutoReload + * @param TIMx TIM instance + * @retval + */ +__STATIC_INLINE uint32_t FL_GPTIM_ReadAutoReload(GPTIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->ARR, 0xffffU) >> 0U); +} + +/** + * @brief + * @rmtoll CCR1 FL_GPTIM_WriteCompareCH1 + * @param TIMx TIM instance + * @param compareValue + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_WriteCompareCH1(GPTIM_Type *TIMx, uint32_t compareValue) +{ + MODIFY_REG(TIMx->CCR1, (0xffffU << 0U), (compareValue << 0U)); +} + +/** + * @brief + * @rmtoll CCR1 FL_GPTIM_ReadCompareCH1 + * @param TIMx TIM instance + * @retval + */ +__STATIC_INLINE uint32_t FL_GPTIM_ReadCompareCH1(GPTIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->CCR1, 0xffffU) >> 0U); +} + +/** + * @brief + * @rmtoll CCR2 FL_GPTIM_WriteCompareCH2 + * @param TIMx TIM instance + * @param compareValue + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_WriteCompareCH2(GPTIM_Type *TIMx, uint32_t compareValue) +{ + MODIFY_REG(TIMx->CCR2, (0xffffU << 0U), (compareValue << 0U)); +} + +/** + * @brief + * @rmtoll CCR2 FL_GPTIM_ReadCompareCH2 + * @param TIMx TIM instance + * @retval + */ +__STATIC_INLINE uint32_t FL_GPTIM_ReadCompareCH2(GPTIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->CCR2, 0xffffU) >> 0U); +} + +/** + * @brief + * @rmtoll CCR3 FL_GPTIM_WriteCompareCH3 + * @param TIMx TIM instance + * @param compareValue + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_WriteCompareCH3(GPTIM_Type *TIMx, uint32_t compareValue) +{ + MODIFY_REG(TIMx->CCR3, (0xffffU << 0U), (compareValue << 0U)); +} + +/** + * @brief + * @rmtoll CCR3 FL_GPTIM_ReadCompareCH3 + * @param TIMx TIM instance + * @retval + */ +__STATIC_INLINE uint32_t FL_GPTIM_ReadCompareCH3(GPTIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->CCR3, 0xffffU) >> 0U); +} + +/** + * @brief + * @rmtoll CCR4 FL_GPTIM_WriteCompareCH4 + * @param TIMx TIM instance + * @param compareValue + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_WriteCompareCH4(GPTIM_Type *TIMx, uint32_t compareValue) +{ + MODIFY_REG(TIMx->CCR4, (0xffffU << 0U), (compareValue << 0U)); +} + +/** + * @brief + * @rmtoll CCR4 FL_GPTIM_ReadCompareCH4 + * @param TIMx TIM instance + * @retval + */ +__STATIC_INLINE uint32_t FL_GPTIM_ReadCompareCH4(GPTIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->CCR4, 0xffffU) >> 0U); +} + +/** + * @brief + * @rmtoll DCR DBL FL_GPTIM_SetDMABurstLength + * @param TIMx TIM instance + * @param length This parameter can be one of the following values: + * @arg @ref FL_GPTIM_DMA_BURST_LENGTH_1 + * @arg @ref FL_GPTIM_DMA_BURST_LENGTH_2 + * @arg @ref FL_GPTIM_DMA_BURST_LENGTH_3 + * @arg @ref FL_GPTIM_DMA_BURST_LENGTH_4 + * @arg @ref FL_GPTIM_DMA_BURST_LENGTH_5 + * @arg @ref FL_GPTIM_DMA_BURST_LENGTH_6 + * @arg @ref FL_GPTIM_DMA_BURST_LENGTH_7 + * @arg @ref FL_GPTIM_DMA_BURST_LENGTH_8 + * @arg @ref FL_GPTIM_DMA_BURST_LENGTH_9 + * @arg @ref FL_GPTIM_DMA_BURST_LENGTH_10 + * @arg @ref FL_GPTIM_DMA_BURST_LENGTH_11 + * @arg @ref FL_GPTIM_DMA_BURST_LENGTH_12 + * @arg @ref FL_GPTIM_DMA_BURST_LENGTH_13 + * @arg @ref FL_GPTIM_DMA_BURST_LENGTH_14 + * @arg @ref FL_GPTIM_DMA_BURST_LENGTH_15 + * @arg @ref FL_GPTIM_DMA_BURST_LENGTH_16 + * @arg @ref FL_GPTIM_DMA_BURST_LENGTH_17 + * @arg @ref FL_GPTIM_DMA_BURST_LENGTH_18 + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_SetDMABurstLength(GPTIM_Type *TIMx, uint32_t length) +{ + MODIFY_REG(TIMx->DCR, GPTIM_DCR_DBL_Msk, length); +} + +/** + * @brief + * @rmtoll DCR DBL FL_GPTIM_GetDMABurstLength + * @param TIMx TIM instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_GPTIM_DMA_BURST_LENGTH_1 + * @arg @ref FL_GPTIM_DMA_BURST_LENGTH_2 + * @arg @ref FL_GPTIM_DMA_BURST_LENGTH_3 + * @arg @ref FL_GPTIM_DMA_BURST_LENGTH_4 + * @arg @ref FL_GPTIM_DMA_BURST_LENGTH_5 + * @arg @ref FL_GPTIM_DMA_BURST_LENGTH_6 + * @arg @ref FL_GPTIM_DMA_BURST_LENGTH_7 + * @arg @ref FL_GPTIM_DMA_BURST_LENGTH_8 + * @arg @ref FL_GPTIM_DMA_BURST_LENGTH_9 + * @arg @ref FL_GPTIM_DMA_BURST_LENGTH_10 + * @arg @ref FL_GPTIM_DMA_BURST_LENGTH_11 + * @arg @ref FL_GPTIM_DMA_BURST_LENGTH_12 + * @arg @ref FL_GPTIM_DMA_BURST_LENGTH_13 + * @arg @ref FL_GPTIM_DMA_BURST_LENGTH_14 + * @arg @ref FL_GPTIM_DMA_BURST_LENGTH_15 + * @arg @ref FL_GPTIM_DMA_BURST_LENGTH_16 + * @arg @ref FL_GPTIM_DMA_BURST_LENGTH_17 + * @arg @ref FL_GPTIM_DMA_BURST_LENGTH_18 + */ +__STATIC_INLINE uint32_t FL_GPTIM_GetDMABurstLength(GPTIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->DCR, GPTIM_DCR_DBL_Msk)); +} + +/** + * @brief + * @rmtoll DCR DBA FL_GPTIM_SetDMABurstAddress + * @param TIMx TIM instance + * @param address This parameter can be one of the following values: + * @arg @ref FL_GPTIM_DMA_BURST_ADDR_CR1 + * @arg @ref FL_GPTIM_DMA_BURST_ADDR_CR2 + * @arg @ref FL_GPTIM_DMA_BURST_ADDR_SMCR + * @arg @ref FL_GPTIM_DMA_BURST_ADDR_DIER + * @arg @ref FL_GPTIM_DMA_BURST_ADDR_SR + * @arg @ref FL_GPTIM_DMA_BURST_ADDR_EGR + * @arg @ref FL_GPTIM_DMA_BURST_ADDR_CCMR1 + * @arg @ref FL_GPTIM_DMA_BURST_ADDR_CCMR2 + * @arg @ref FL_GPTIM_DMA_BURST_ADDR_CCER + * @arg @ref FL_GPTIM_DMA_BURST_ADDR_CNT + * @arg @ref FL_GPTIM_DMA_BURST_ADDR_PSC + * @arg @ref FL_GPTIM_DMA_BURST_ADDR_ARR + * @arg @ref FL_GPTIM_DMA_BURST_ADDR_RCR + * @arg @ref FL_GPTIM_DMA_BURST_ADDR_CCR1 + * @arg @ref FL_GPTIM_DMA_BURST_ADDR_CCR2 + * @arg @ref FL_GPTIM_DMA_BURST_ADDR_CCR3 + * @arg @ref FL_GPTIM_DMA_BURST_ADDR_CCR4 + * @arg @ref FL_GPTIM_DMA_BURST_ADDR_BDTR + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_SetDMABurstAddress(GPTIM_Type *TIMx, uint32_t address) +{ + MODIFY_REG(TIMx->DCR, GPTIM_DCR_DBA_Msk, address); +} + +/** + * @brief + * @rmtoll DCR DBA FL_GPTIM_GetDMABurstAddress + * @param TIMx TIM instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_GPTIM_DMA_BURST_ADDR_CR1 + * @arg @ref FL_GPTIM_DMA_BURST_ADDR_CR2 + * @arg @ref FL_GPTIM_DMA_BURST_ADDR_SMCR + * @arg @ref FL_GPTIM_DMA_BURST_ADDR_DIER + * @arg @ref FL_GPTIM_DMA_BURST_ADDR_SR + * @arg @ref FL_GPTIM_DMA_BURST_ADDR_EGR + * @arg @ref FL_GPTIM_DMA_BURST_ADDR_CCMR1 + * @arg @ref FL_GPTIM_DMA_BURST_ADDR_CCMR2 + * @arg @ref FL_GPTIM_DMA_BURST_ADDR_CCER + * @arg @ref FL_GPTIM_DMA_BURST_ADDR_CNT + * @arg @ref FL_GPTIM_DMA_BURST_ADDR_PSC + * @arg @ref FL_GPTIM_DMA_BURST_ADDR_ARR + * @arg @ref FL_GPTIM_DMA_BURST_ADDR_RCR + * @arg @ref FL_GPTIM_DMA_BURST_ADDR_CCR1 + * @arg @ref FL_GPTIM_DMA_BURST_ADDR_CCR2 + * @arg @ref FL_GPTIM_DMA_BURST_ADDR_CCR3 + * @arg @ref FL_GPTIM_DMA_BURST_ADDR_CCR4 + * @arg @ref FL_GPTIM_DMA_BURST_ADDR_BDTR + */ +__STATIC_INLINE uint32_t FL_GPTIM_GetDMABurstAddress(GPTIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->DCR, GPTIM_DCR_DBA_Msk)); +} + +/** + * @brief + * @rmtoll DMAR FL_GPTIM_WriteDMAAddress + * @param TIMx TIM instance + * @param address + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_WriteDMAAddress(GPTIM_Type *TIMx, uint32_t address) +{ + MODIFY_REG(TIMx->DMAR, (0xffffU << 0U), (address << 0U)); +} + +/** + * @brief + * @rmtoll DMAR FL_GPTIM_ReadDMAAddress + * @param TIMx TIM instance + * @retval + */ +__STATIC_INLINE uint32_t FL_GPTIM_ReadDMAAddress(GPTIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->DMAR, 0xffffU) >> 0U); +} + +/** + * @brief + * @rmtoll ITRSEL FL_GPTIM_SetITRInput + * @param TIMx TIM instance + * @param ITRx This parameter can be one of the following values: + * @arg @ref FL_GPTIM_ITR0 + * @arg @ref FL_GPTIM_ITR1 + * @arg @ref FL_GPTIM_ITR2 + * @arg @ref FL_GPTIM_ITR3 + * @param input This parameter can be one of the following values: + * @arg @ref FL_GPTIM_ITRSEL_GROUP0 + * @arg @ref FL_GPTIM_ITRSEL_GROUP1 + * @arg @ref FL_GPTIM_ITRSEL_GROUP2 + * @arg @ref FL_GPTIM_ITRSEL_GROUP3 + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_SetITRInput(GPTIM_Type *TIMx, uint32_t ITRx, uint32_t input) +{ + MODIFY_REG(TIMx->ITRSEL, ((ITRx * ITRx) * GPTIM_ITRSEL), ((ITRx * ITRx) * input)); +} + +/** + * @brief + * @rmtoll ITRSEL FL_GPTIM_GetITRInput + * @param TIMx TIM instance + * @param ITRx This parameter can be one of the following values: + * @arg @ref FL_GPTIM_ITR0 + * @arg @ref FL_GPTIM_ITR1 + * @arg @ref FL_GPTIM_ITR2 + * @arg @ref FL_GPTIM_ITR3 + * @retval Returned value can be one of the following values: + * @arg @ref FL_GPTIM_ITRSEL_GROUP0 + * @arg @ref FL_GPTIM_ITRSEL_GROUP1 + * @arg @ref FL_GPTIM_ITRSEL_GROUP2 + * @arg @ref FL_GPTIM_ITRSEL_GROUP3 + */ +__STATIC_INLINE uint32_t FL_GPTIM_GetITRInput(GPTIM_Type *TIMx, uint32_t ITRx) +{ + return (uint32_t)(READ_BIT(TIMx->ITRSEL, ((ITRx * ITRx) * GPTIM_ITRSEL)) / (ITRx * ITRx)); +} + +/** + * @brief OCx clear enable + * @rmtoll CCMR OCCE FL_GPTIM_OC_EnableClear + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_GPTIM_CHANNEL_1 + * @arg @ref FL_GPTIM_CHANNEL_2 + * @arg @ref FL_GPTIM_CHANNEL_3 + * @arg @ref FL_GPTIM_CHANNEL_4 + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_OC_EnableClear(GPTIM_Type *TIMx, uint32_t channel) +{ + switch(channel) + { + case FL_GPTIM_CHANNEL_1: + MODIFY_REG(TIMx->CCMR1, (0x1U << 7U), (0x1U << 7U)); + break; + case FL_GPTIM_CHANNEL_2: + MODIFY_REG(TIMx->CCMR1, (0x1U << 15U), (0x1U << 15U)); + break; + case FL_GPTIM_CHANNEL_3: + MODIFY_REG(TIMx->CCMR2, (0x1U << 7U), (0x1U << 7U)); + break; + case FL_GPTIM_CHANNEL_4: + MODIFY_REG(TIMx->CCMR2, (0x1U << 15U), (0x1U << 15U)); + break; + } +} + +/** + * @brief Get OCx Clear enable status + * @rmtoll CCMR OCCE FL_GPTIM_OC_IsEnabledClear + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_GPTIM_CHANNEL_1 + * @arg @ref FL_GPTIM_CHANNEL_2 + * @arg @ref FL_GPTIM_CHANNEL_3 + * @arg @ref FL_GPTIM_CHANNEL_4 + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_GPTIM_OC_IsEnabledClear(GPTIM_Type *TIMx, uint32_t channel) +{ + switch(channel) + { + case FL_GPTIM_CHANNEL_1: + return (uint32_t)(READ_BIT(TIMx->CCMR1, (0x1U << 7U)) >> 7U); + case FL_GPTIM_CHANNEL_2: + return (uint32_t)(READ_BIT(TIMx->CCMR1, (0x1U << 15U)) >> 15U); + case FL_GPTIM_CHANNEL_3: + return (uint32_t)(READ_BIT(TIMx->CCMR2, (0x1U << 7U)) >> 7U); + case FL_GPTIM_CHANNEL_4: + return (uint32_t)(READ_BIT(TIMx->CCMR2, (0x1U << 15U)) >> 15U); + default: + return 0; + } +} + +/** + * @brief OCx clear disable + * @rmtoll CCMR OCCE FL_GPTIM_OC_DisableClear + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_GPTIM_CHANNEL_1 + * @arg @ref FL_GPTIM_CHANNEL_2 + * @arg @ref FL_GPTIM_CHANNEL_3 + * @arg @ref FL_GPTIM_CHANNEL_4 + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_OC_DisableClear(GPTIM_Type *TIMx, uint32_t channel) +{ + switch(channel) + { + case FL_GPTIM_CHANNEL_1: + CLEAR_BIT(TIMx->CCMR1, (0x1U << 7U)); + break; + case FL_GPTIM_CHANNEL_2: + CLEAR_BIT(TIMx->CCMR1, (0x1U << 15U)); + break; + case FL_GPTIM_CHANNEL_3: + CLEAR_BIT(TIMx->CCMR2, (0x1U << 7U)); + break; + case FL_GPTIM_CHANNEL_4: + CLEAR_BIT(TIMx->CCMR2, (0x1U << 15U)); + break; + } +} + +/** + * @brief Set OCx mode + * @rmtoll CCMR OCM FL_GPTIM_OC_SetMode + * @param TIMx TIM instance + * @param mode This parameter can be one of the following values: + * @arg @ref FL_GPTIM_OC_MODE_FROZEN + * @arg @ref FL_GPTIM_OC_MODE_ACTIVE + * @arg @ref FL_GPTIM_OC_MODE_INACTIVE + * @arg @ref FL_GPTIM_OC_MODE_TOGGLE + * @arg @ref FL_GPTIM_OC_MODE_FORCED_INACTIVE + * @arg @ref FL_GPTIM_OC_MODE_FORCED_ACTIVE + * @arg @ref FL_GPTIM_OC_MODE_PWM1 + * @arg @ref FL_GPTIM_OC_MODE_PWM2 + * @param channel This parameter can be one of the following values: + * @arg @ref FL_GPTIM_CHANNEL_1 + * @arg @ref FL_GPTIM_CHANNEL_2 + * @arg @ref FL_GPTIM_CHANNEL_3 + * @arg @ref FL_GPTIM_CHANNEL_4 + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_OC_SetMode(GPTIM_Type *TIMx, uint32_t mode, uint32_t channel) +{ + switch(channel) + { + case FL_GPTIM_CHANNEL_1: + MODIFY_REG(TIMx->CCMR1, (0x7U << 4U), (mode)); + break; + case FL_GPTIM_CHANNEL_2: + MODIFY_REG(TIMx->CCMR1, (0x7U << 12U), (mode << 8U)); + break; + case FL_GPTIM_CHANNEL_3: + MODIFY_REG(TIMx->CCMR2, (0x7U << 4U), (mode)); + break; + case FL_GPTIM_CHANNEL_4: + MODIFY_REG(TIMx->CCMR2, (0x7U << 12U), (mode << 8U)); + break; + } +} + +/** + * @brief Get OCx mode value + * @rmtoll CCMR OCM FL_GPTIM_OC_GetMode + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_GPTIM_CHANNEL_1 + * @arg @ref FL_GPTIM_CHANNEL_2 + * @arg @ref FL_GPTIM_CHANNEL_3 + * @arg @ref FL_GPTIM_CHANNEL_4 + * @retval Returned value can be one of the following values: + * @arg @ref FL_GPTIM_OC_MODE_FROZEN + * @arg @ref FL_GPTIM_OC_MODE_ACTIVE + * @arg @ref FL_GPTIM_OC_MODE_INACTIVE + * @arg @ref FL_GPTIM_OC_MODE_TOGGLE + * @arg @ref FL_GPTIM_OC_MODE_FORCED_INACTIVE + * @arg @ref FL_GPTIM_OC_MODE_FORCED_ACTIVE + * @arg @ref FL_GPTIM_OC_MODE_PWM1 + * @arg @ref FL_GPTIM_OC_MODE_PWM2 + */ +__STATIC_INLINE uint32_t FL_GPTIM_OC_GetMode(GPTIM_Type *TIMx, uint32_t channel) +{ + switch(channel) + { + case FL_GPTIM_CHANNEL_1: + return (uint32_t)(READ_BIT(TIMx->CCMR1, (0x7U << 4U)) >> 0U); + case FL_GPTIM_CHANNEL_2: + return (uint32_t)(READ_BIT(TIMx->CCMR1, (0x7U << 12U)) >> 8U); + case FL_GPTIM_CHANNEL_3: + return (uint32_t)(READ_BIT(TIMx->CCMR2, (0x7U << 4U)) >> 0U); + case FL_GPTIM_CHANNEL_4: + return (uint32_t)(READ_BIT(TIMx->CCMR2, (0x7U << 12U)) >> 8U); + default: + return 0; + } +} + +/** + * @brief + * @rmtoll CCMR OCPE FL_GPTIM_OC_EnablePreload + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_GPTIM_CHANNEL_1 + * @arg @ref FL_GPTIM_CHANNEL_2 + * @arg @ref FL_GPTIM_CHANNEL_3 + * @arg @ref FL_GPTIM_CHANNEL_4 + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_OC_EnablePreload(GPTIM_Type *TIMx, uint32_t channel) +{ + switch(channel) + { + case FL_GPTIM_CHANNEL_1: + SET_BIT(TIMx->CCMR1, (0x1U << 3U)); + break; + case FL_GPTIM_CHANNEL_2: + SET_BIT(TIMx->CCMR1, (0x1U << 11U)); + break; + case FL_GPTIM_CHANNEL_3: + SET_BIT(TIMx->CCMR2, (0x1U << 3U)); + break; + case FL_GPTIM_CHANNEL_4: + SET_BIT(TIMx->CCMR2, (0x1U << 11U)); + break; + } +} + +/** + * @brief + * @rmtoll CCMR OCPE FL_GPTIM_OC_IsEnabledPreload + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_GPTIM_CHANNEL_1 + * @arg @ref FL_GPTIM_CHANNEL_2 + * @arg @ref FL_GPTIM_CHANNEL_3 + * @arg @ref FL_GPTIM_CHANNEL_4 + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_GPTIM_OC_IsEnabledPreload(GPTIM_Type *TIMx, uint32_t channel) +{ + switch(channel) + { + case FL_GPTIM_CHANNEL_1: + return (uint32_t)(READ_BIT(TIMx->CCMR1, (0x1U << 3U)) >> 3U); + case FL_GPTIM_CHANNEL_2: + return (uint32_t)(READ_BIT(TIMx->CCMR1, (0x1U << 11U)) >> 11U); + case FL_GPTIM_CHANNEL_3: + return (uint32_t)(READ_BIT(TIMx->CCMR2, (0x1U << 3U)) >> 3U); + case FL_GPTIM_CHANNEL_4: + return (uint32_t)(READ_BIT(TIMx->CCMR2, (0x1U << 11U)) >> 11U); + default: + return 0; + } +} + +/** + * @brief + * @rmtoll CCMR OCPE FL_GPTIM_OC_DisablePreload + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_GPTIM_CHANNEL_1 + * @arg @ref FL_GPTIM_CHANNEL_2 + * @arg @ref FL_GPTIM_CHANNEL_3 + * @arg @ref FL_GPTIM_CHANNEL_4 + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_OC_DisablePreload(GPTIM_Type *TIMx, uint32_t channel) +{ + switch(channel) + { + case FL_GPTIM_CHANNEL_1: + CLEAR_BIT(TIMx->CCMR1, (0x1U << 3U)); + break; + case FL_GPTIM_CHANNEL_2: + CLEAR_BIT(TIMx->CCMR1, (0x1U << 11U)); + break; + case FL_GPTIM_CHANNEL_3: + CLEAR_BIT(TIMx->CCMR2, (0x1U << 3U)); + break; + case FL_GPTIM_CHANNEL_4: + CLEAR_BIT(TIMx->CCMR2, (0x1U << 11U)); + break; + } +} + +/** + * @brief + * @rmtoll CCMR OCFE FL_GPTIM_OC_EnableFastMode + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_GPTIM_CHANNEL_1 + * @arg @ref FL_GPTIM_CHANNEL_2 + * @arg @ref FL_GPTIM_CHANNEL_3 + * @arg @ref FL_GPTIM_CHANNEL_4 + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_OC_EnableFastMode(GPTIM_Type *TIMx, uint32_t channel) +{ + switch(channel) + { + case FL_GPTIM_CHANNEL_1: + SET_BIT(TIMx->CCMR1, (0x1U << 2U)); + break; + case FL_GPTIM_CHANNEL_2: + SET_BIT(TIMx->CCMR1, (0x1U << 10U)); + break; + case FL_GPTIM_CHANNEL_3: + SET_BIT(TIMx->CCMR2, (0x1U << 2U)); + break; + case FL_GPTIM_CHANNEL_4: + SET_BIT(TIMx->CCMR2, (0x1U << 10U)); + break; + } +} + +/** + * @brief + * @rmtoll CCMR OCFE FL_GPTIM_OC_IsEnabledFastMode + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_GPTIM_CHANNEL_1 + * @arg @ref FL_GPTIM_CHANNEL_2 + * @arg @ref FL_GPTIM_CHANNEL_3 + * @arg @ref FL_GPTIM_CHANNEL_4 + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_GPTIM_OC_IsEnabledFastMode(GPTIM_Type *TIMx, uint32_t channel) +{ + switch(channel) + { + case FL_GPTIM_CHANNEL_1: + return (uint32_t)(READ_BIT(TIMx->CCMR1, (0x1U << 2U)) >> 2U); + case FL_GPTIM_CHANNEL_2: + return (uint32_t)(READ_BIT(TIMx->CCMR1, (0x1U << 10U)) >> 10U); + case FL_GPTIM_CHANNEL_3: + return (uint32_t)(READ_BIT(TIMx->CCMR2, (0x1U << 2U)) >> 2U); + case FL_GPTIM_CHANNEL_4: + return (uint32_t)(READ_BIT(TIMx->CCMR2, (0x1U << 10U)) >> 10U); + default: + return 0; + } +} + +/** + * @brief + * @rmtoll CCMR OCFE FL_GPTIM_OC_DisableFastMode + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_GPTIM_CHANNEL_1 + * @arg @ref FL_GPTIM_CHANNEL_2 + * @arg @ref FL_GPTIM_CHANNEL_3 + * @arg @ref FL_GPTIM_CHANNEL_4 + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_OC_DisableFastMode(GPTIM_Type *TIMx, uint32_t channel) +{ + switch(channel) + { + case FL_GPTIM_CHANNEL_1: + CLEAR_BIT(TIMx->CCMR1, (0x1U << 2U)); + break; + case FL_GPTIM_CHANNEL_2: + CLEAR_BIT(TIMx->CCMR1, (0x1U << 10U)); + break; + case FL_GPTIM_CHANNEL_3: + CLEAR_BIT(TIMx->CCMR2, (0x1U << 2U)); + break; + case FL_GPTIM_CHANNEL_4: + CLEAR_BIT(TIMx->CCMR2, (0x1U << 10U)); + break; + } +} + +/** + * @brief + * @rmtoll CCMR ICF FL_GPTIM_IC_SetFilter + * @param TIMx TIM instance + * @param filter This parameter can be one of the following values: + * @arg @ref FL_GPTIM_IC_FILTER_DIV1 + * @arg @ref FL_GPTIM_IC_FILTER_DIV1_N2 + * @arg @ref FL_GPTIM_IC_FILTER_DIV1_N4 + * @arg @ref FL_GPTIM_IC_FILTER_DIV1_N8 + * @arg @ref FL_GPTIM_IC_FILTER_DIV2_N6 + * @arg @ref FL_GPTIM_IC_FILTER_DIV2_N8 + * @arg @ref FL_GPTIM_IC_FILTER_DIV4_N6 + * @arg @ref FL_GPTIM_IC_FILTER_DIV4_N8 + * @arg @ref FL_GPTIM_IC_FILTER_DIV8_N6 + * @arg @ref FL_GPTIM_IC_FILTER_DIV8_N8 + * @arg @ref FL_GPTIM_IC_FILTER_DIV16_N5 + * @arg @ref FL_GPTIM_IC_FILTER_DIV16_N6 + * @arg @ref FL_GPTIM_IC_FILTER_DIV16_N8 + * @arg @ref FL_GPTIM_IC_FILTER_DIV32_N5 + * @arg @ref FL_GPTIM_IC_FILTER_DIV32_N6 + * @arg @ref FL_GPTIM_IC_FILTER_DIV32_N8 + * @param channel This parameter can be one of the following values: + * @arg @ref FL_GPTIM_CHANNEL_1 + * @arg @ref FL_GPTIM_CHANNEL_2 + * @arg @ref FL_GPTIM_CHANNEL_3 + * @arg @ref FL_GPTIM_CHANNEL_4 + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_IC_SetFilter(GPTIM_Type *TIMx, uint32_t filter, uint32_t channel) +{ + switch(channel) + { + case FL_GPTIM_CHANNEL_1: + MODIFY_REG(TIMx->CCMR1, (0xFU << 4U), (filter)); + break; + case FL_GPTIM_CHANNEL_2: + MODIFY_REG(TIMx->CCMR1, (0xFU << 12U), (filter << 8U)); + break; + case FL_GPTIM_CHANNEL_3: + MODIFY_REG(TIMx->CCMR2, (0xFU << 4U), (filter)); + break; + case FL_GPTIM_CHANNEL_4: + MODIFY_REG(TIMx->CCMR2, (0xFU << 12U), (filter << 8U)); + break; + } +} + +/** + * @brief + * @rmtoll CCMR ICF FL_GPTIM_IC_GetFilter + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_GPTIM_CHANNEL_1 + * @arg @ref FL_GPTIM_CHANNEL_2 + * @arg @ref FL_GPTIM_CHANNEL_3 + * @arg @ref FL_GPTIM_CHANNEL_4 + * @retval Returned value can be one of the following values: + * @arg @ref FL_GPTIM_IC_FILTER_DIV1 + * @arg @ref FL_GPTIM_IC_FILTER_DIV1_N2 + * @arg @ref FL_GPTIM_IC_FILTER_DIV1_N4 + * @arg @ref FL_GPTIM_IC_FILTER_DIV1_N8 + * @arg @ref FL_GPTIM_IC_FILTER_DIV2_N6 + * @arg @ref FL_GPTIM_IC_FILTER_DIV2_N8 + * @arg @ref FL_GPTIM_IC_FILTER_DIV4_N6 + * @arg @ref FL_GPTIM_IC_FILTER_DIV4_N8 + * @arg @ref FL_GPTIM_IC_FILTER_DIV8_N6 + * @arg @ref FL_GPTIM_IC_FILTER_DIV8_N8 + * @arg @ref FL_GPTIM_IC_FILTER_DIV16_N5 + * @arg @ref FL_GPTIM_IC_FILTER_DIV16_N6 + * @arg @ref FL_GPTIM_IC_FILTER_DIV16_N8 + * @arg @ref FL_GPTIM_IC_FILTER_DIV32_N5 + * @arg @ref FL_GPTIM_IC_FILTER_DIV32_N6 + * @arg @ref FL_GPTIM_IC_FILTER_DIV32_N8 + */ +__STATIC_INLINE uint32_t FL_GPTIM_IC_GetFilter(GPTIM_Type *TIMx, uint32_t channel) +{ + switch(channel) + { + case FL_GPTIM_CHANNEL_1: + return (uint32_t)(READ_BIT(TIMx->CCMR1, (0xFU << 4U)) >> 0U); + case FL_GPTIM_CHANNEL_2: + return (uint32_t)(READ_BIT(TIMx->CCMR1, (0xFU << 12U)) >> 8U); + case FL_GPTIM_CHANNEL_3: + return (uint32_t)(READ_BIT(TIMx->CCMR2, (0xFU << 4U)) >> 0U); + case FL_GPTIM_CHANNEL_4: + return (uint32_t)(READ_BIT(TIMx->CCMR2, (0xFU << 12U)) >> 8U); + default: + return 0; + } +} + +/** + * @brief + * @rmtoll CCMR ICPSC FL_GPTIM_IC_SetPrescaler + * @param TIMx TIM instance + * @param psc This parameter can be one of the following values: + * @arg @ref FL_GPTIM_IC_PSC_DIV1 + * @arg @ref FL_GPTIM_IC_PSC_DIV2 + * @arg @ref FL_GPTIM_IC_PSC_DIV4 + * @arg @ref FL_GPTIM_IC_PSC_DIV8 + * @param channel This parameter can be one of the following values: + * @arg @ref FL_GPTIM_CHANNEL_1 + * @arg @ref FL_GPTIM_CHANNEL_2 + * @arg @ref FL_GPTIM_CHANNEL_3 + * @arg @ref FL_GPTIM_CHANNEL_4 + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_IC_SetPrescaler(GPTIM_Type *TIMx, uint32_t psc, uint32_t channel) +{ + switch(channel) + { + case FL_GPTIM_CHANNEL_1: + MODIFY_REG(TIMx->CCMR1, (0x3U << 2U), (psc)); + break; + case FL_GPTIM_CHANNEL_2: + MODIFY_REG(TIMx->CCMR1, (0x3U << 10U), (psc << 8U)); + break; + case FL_GPTIM_CHANNEL_3: + MODIFY_REG(TIMx->CCMR2, (0x3U << 2U), (psc)); + break; + case FL_GPTIM_CHANNEL_4: + MODIFY_REG(TIMx->CCMR2, (0x3U << 10U), (psc << 8U)); + break; + } +} + +/** + * @brief + * @rmtoll CCMR ICPSC FL_GPTIM_IC_GetPrescaler + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_GPTIM_CHANNEL_1 + * @arg @ref FL_GPTIM_CHANNEL_2 + * @arg @ref FL_GPTIM_CHANNEL_3 + * @arg @ref FL_GPTIM_CHANNEL_4 + * @retval Returned value can be one of the following values: + * @arg @ref FL_GPTIM_IC_PSC_DIV1 + * @arg @ref FL_GPTIM_IC_PSC_DIV2 + * @arg @ref FL_GPTIM_IC_PSC_DIV4 + * @arg @ref FL_GPTIM_IC_PSC_DIV8 + */ +__STATIC_INLINE uint32_t FL_GPTIM_IC_GetPrescaler(GPTIM_Type *TIMx, uint32_t channel) +{ + switch(channel) + { + case FL_GPTIM_CHANNEL_1: + return (uint32_t)(READ_BIT(TIMx->CCMR1, (0x3U << 2U)) >> 0U); + case FL_GPTIM_CHANNEL_2: + return (uint32_t)(READ_BIT(TIMx->CCMR1, (0x3U << 10U)) >> 8U); + case FL_GPTIM_CHANNEL_3: + return (uint32_t)(READ_BIT(TIMx->CCMR2, (0x3U << 2U)) >> 0U); + case FL_GPTIM_CHANNEL_4: + return (uint32_t)(READ_BIT(TIMx->CCMR2, (0x3U << 10U)) >> 8U); + default: + return 0; + } +} + +/** + * @brief + * @rmtoll CCMR CCS FL_GPTIM_CC_SetChannelMode + * @param TIMx TIM instance + * @param mode This parameter can be one of the following values: + * @arg @ref FL_GPTIM_CHANNEL_MODE_OUTPUT + * @arg @ref FL_GPTIM_CHANNEL_MODE_INPUT_NORMAL + * @arg @ref FL_GPTIM_CHANNEL_MODE_INPUT_CROSSOVER + * @arg @ref FL_GPTIM_CHANNEL_MODE_INPUT_TRC + * @param channel This parameter can be one of the following values: + * @arg @ref FL_GPTIM_CHANNEL_1 + * @arg @ref FL_GPTIM_CHANNEL_2 + * @arg @ref FL_GPTIM_CHANNEL_3 + * @arg @ref FL_GPTIM_CHANNEL_4 + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_CC_SetChannelMode(GPTIM_Type *TIMx, uint32_t mode, uint32_t channel) +{ + switch(channel) + { + case FL_GPTIM_CHANNEL_1: + MODIFY_REG(TIMx->CCMR1, (0x3U << 0U), (mode)); + break; + case FL_GPTIM_CHANNEL_2: + MODIFY_REG(TIMx->CCMR1, (0x3U << 8U), (mode << 8U)); + break; + case FL_GPTIM_CHANNEL_3: + MODIFY_REG(TIMx->CCMR2, (0x3U << 0U), (mode)); + break; + case FL_GPTIM_CHANNEL_4: + MODIFY_REG(TIMx->CCMR2, (0x3U << 8U), (mode << 8U)); + break; + } +} + +/** + * @brief + * @rmtoll CCMR CCS FL_GPTIM_CC_GetChannelMode + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_GPTIM_CHANNEL_1 + * @arg @ref FL_GPTIM_CHANNEL_2 + * @arg @ref FL_GPTIM_CHANNEL_3 + * @arg @ref FL_GPTIM_CHANNEL_4 + * @retval Returned value can be one of the following values: + * @arg @ref FL_GPTIM_CHANNEL_MODE_OUTPUT + * @arg @ref FL_GPTIM_CHANNEL_MODE_INPUT_NORMAL + * @arg @ref FL_GPTIM_CHANNEL_MODE_INPUT_CROSSOVER + * @arg @ref FL_GPTIM_CHANNEL_MODE_INPUT_TRC + */ +__STATIC_INLINE uint32_t FL_GPTIM_CC_GetChannelMode(GPTIM_Type *TIMx, uint32_t channel) +{ + switch(channel) + { + case FL_GPTIM_CHANNEL_1: + return (uint32_t)(READ_BIT(TIMx->CCMR1, (0x3U << 0U)) >> 0U); + case FL_GPTIM_CHANNEL_2: + return (uint32_t)(READ_BIT(TIMx->CCMR1, (0x3U << 8U)) >> 8U); + case FL_GPTIM_CHANNEL_3: + return (uint32_t)(READ_BIT(TIMx->CCMR2, (0x3U << 0U)) >> 0U); + case FL_GPTIM_CHANNEL_4: + return (uint32_t)(READ_BIT(TIMx->CCMR2, (0x3U << 8U)) >> 8U); + default: + return 0; + } +} + +/** + * @brief + * @rmtoll CCER CCOP FL_GPTIM_OC_SetChannelPolarity + * @param TIMx TIM instance + * @param polarity This parameter can be one of the following values: + * @arg @ref FL_GPTIM_OC_POLARITY_NORMAL + * @arg @ref FL_GPTIM_OC_POLARITY_INVERT + * @param channel This parameter can be one of the following values: + * @arg @ref FL_GPTIM_CHANNEL_1 + * @arg @ref FL_GPTIM_CHANNEL_2 + * @arg @ref FL_GPTIM_CHANNEL_3 + * @arg @ref FL_GPTIM_CHANNEL_4 + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_OC_SetChannelPolarity(GPTIM_Type *TIMx, uint32_t polarity, uint32_t channel) +{ + switch(channel) + { + case FL_GPTIM_CHANNEL_1: + MODIFY_REG(TIMx->CCER, (0x1U << 1U), (polarity)); + break; + case FL_GPTIM_CHANNEL_2: + MODIFY_REG(TIMx->CCER, (0x1U << 5U), (polarity << 4U)); + break; + case FL_GPTIM_CHANNEL_3: + MODIFY_REG(TIMx->CCER, (0x1U << 9U), (polarity << 8U)); + break; + case FL_GPTIM_CHANNEL_4: + MODIFY_REG(TIMx->CCER, (0x1U << 13U), (polarity << 12U)); + break; + } +} + +/** + * @brief + * @rmtoll CCER CCOP FL_GPTIM_OC_GetChannelPolarity + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_GPTIM_CHANNEL_1 + * @arg @ref FL_GPTIM_CHANNEL_2 + * @arg @ref FL_GPTIM_CHANNEL_3 + * @arg @ref FL_GPTIM_CHANNEL_4 + * @retval Returned value can be one of the following values: + * @arg @ref FL_GPTIM_OC_POLARITY_NORMAL + * @arg @ref FL_GPTIM_OC_POLARITY_INVERT + */ +__STATIC_INLINE uint32_t FL_GPTIM_OC_GetChannelPolarity(GPTIM_Type *TIMx, uint32_t channel) +{ + switch(channel) + { + case FL_GPTIM_CHANNEL_1: + return (uint32_t)(READ_BIT(TIMx->CCER, (0x1U << 1U)) >> 0U); + case FL_GPTIM_CHANNEL_2: + return (uint32_t)(READ_BIT(TIMx->CCER, (0x1U << 5U)) >> 4U); + case FL_GPTIM_CHANNEL_3: + return (uint32_t)(READ_BIT(TIMx->CCER, (0x1U << 9U)) >> 8U); + case FL_GPTIM_CHANNEL_4: + return (uint32_t)(READ_BIT(TIMx->CCER, (0x1U << 13U)) >> 12U); + default: + return 0; + } +} + +/** + * @brief + * @rmtoll CCER CCIP FL_GPTIM_IC_SetChannelPolarity + * @param TIMx TIM instance + * @param polarity This parameter can be one of the following values: + * @arg @ref FL_GPTIM_IC_POLARITY_NORMAL + * @arg @ref FL_GPTIM_IC_POLARITY_INVERT + * @param channel This parameter can be one of the following values: + * @arg @ref FL_GPTIM_CHANNEL_1 + * @arg @ref FL_GPTIM_CHANNEL_2 + * @arg @ref FL_GPTIM_CHANNEL_3 + * @arg @ref FL_GPTIM_CHANNEL_4 + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_IC_SetChannelPolarity(GPTIM_Type *TIMx, uint32_t polarity, uint32_t channel) +{ + switch(channel) + { + case FL_GPTIM_CHANNEL_1: + MODIFY_REG(TIMx->CCER, (0x1U << 1U), (polarity)); + break; + case FL_GPTIM_CHANNEL_2: + MODIFY_REG(TIMx->CCER, (0x1U << 5U), (polarity << 4U)); + break; + case FL_GPTIM_CHANNEL_3: + MODIFY_REG(TIMx->CCER, (0x1U << 9U), (polarity << 8U)); + break; + case FL_GPTIM_CHANNEL_4: + MODIFY_REG(TIMx->CCER, (0x1U << 13U), (polarity << 12U)); + break; + } +} + +/** + * @brief + * @rmtoll CCER CCIP FL_GPTIM_IC_GetChannelPolarity + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_GPTIM_CHANNEL_1 + * @arg @ref FL_GPTIM_CHANNEL_2 + * @arg @ref FL_GPTIM_CHANNEL_3 + * @arg @ref FL_GPTIM_CHANNEL_4 + * @retval Returned value can be one of the following values: + * @arg @ref FL_GPTIM_IC_POLARITY_NORMAL + * @arg @ref FL_GPTIM_IC_POLARITY_INVERT + */ +__STATIC_INLINE uint32_t FL_GPTIM_IC_GetChannelPolarity(GPTIM_Type *TIMx, uint32_t channel) +{ + switch(channel) + { + case FL_GPTIM_CHANNEL_1: + return (uint32_t)(READ_BIT(TIMx->CCER, (0x1U << 1U)) >> 0U); + case FL_GPTIM_CHANNEL_2: + return (uint32_t)(READ_BIT(TIMx->CCER, (0x1U << 5U)) >> 4U); + case FL_GPTIM_CHANNEL_3: + return (uint32_t)(READ_BIT(TIMx->CCER, (0x1U << 9U)) >> 8U); + case FL_GPTIM_CHANNEL_4: + return (uint32_t)(READ_BIT(TIMx->CCER, (0x1U << 13U)) >> 12U); + default: + return 0; + } +} + +/** + * @brief + * @rmtoll CCER CCE FL_GPTIM_OC_EnableChannel + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_GPTIM_CHANNEL_1 + * @arg @ref FL_GPTIM_CHANNEL_2 + * @arg @ref FL_GPTIM_CHANNEL_3 + * @arg @ref FL_GPTIM_CHANNEL_4 + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_OC_EnableChannel(GPTIM_Type *TIMx, uint32_t channel) +{ + switch(channel) + { + case FL_GPTIM_CHANNEL_1: + SET_BIT(TIMx->CCER, (0x1U << 0U)); + break; + case FL_GPTIM_CHANNEL_2: + SET_BIT(TIMx->CCER, (0x1U << 4U)); + break; + case FL_GPTIM_CHANNEL_3: + SET_BIT(TIMx->CCER, (0x1U << 8U)); + break; + case FL_GPTIM_CHANNEL_4: + SET_BIT(TIMx->CCER, (0x1U << 12U)); + break; + } +} + +/** + * @brief + * @rmtoll CCER CCE FL_GPTIM_OC_IsEnabledChannel + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_GPTIM_CHANNEL_1 + * @arg @ref FL_GPTIM_CHANNEL_2 + * @arg @ref FL_GPTIM_CHANNEL_3 + * @arg @ref FL_GPTIM_CHANNEL_4 + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_GPTIM_OC_IsEnabledChannel(GPTIM_Type *TIMx, uint32_t channel) +{ + switch(channel) + { + case FL_GPTIM_CHANNEL_1: + return (uint32_t)(READ_BIT(TIMx->CCER, (0x1U << 0U)) >> 0U); + case FL_GPTIM_CHANNEL_2: + return (uint32_t)(READ_BIT(TIMx->CCER, (0x1U << 4U)) >> 4U); + case FL_GPTIM_CHANNEL_3: + return (uint32_t)(READ_BIT(TIMx->CCER, (0x1U << 8U)) >> 8U); + case FL_GPTIM_CHANNEL_4: + return (uint32_t)(READ_BIT(TIMx->CCER, (0x1U << 12U)) >> 12U); + default: + return 0; + } +} + +/** + * @brief + * @rmtoll CCER CCE FL_GPTIM_OC_DisableChannel + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_GPTIM_CHANNEL_1 + * @arg @ref FL_GPTIM_CHANNEL_2 + * @arg @ref FL_GPTIM_CHANNEL_3 + * @arg @ref FL_GPTIM_CHANNEL_4 + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_OC_DisableChannel(GPTIM_Type *TIMx, uint32_t channel) +{ + switch(channel) + { + case FL_GPTIM_CHANNEL_1: + CLEAR_BIT(TIMx->CCER, (0x1U << 0U)); + break; + case FL_GPTIM_CHANNEL_2: + CLEAR_BIT(TIMx->CCER, (0x1U << 4U)); + break; + case FL_GPTIM_CHANNEL_3: + CLEAR_BIT(TIMx->CCER, (0x1U << 8U)); + break; + case FL_GPTIM_CHANNEL_4: + CLEAR_BIT(TIMx->CCER, (0x1U << 12U)); + break; + } +} + +/** + * @brief + * @rmtoll CCER CCE FL_GPTIM_IC_EnableChannel + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_GPTIM_CHANNEL_1 + * @arg @ref FL_GPTIM_CHANNEL_2 + * @arg @ref FL_GPTIM_CHANNEL_3 + * @arg @ref FL_GPTIM_CHANNEL_4 + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_IC_EnableChannel(GPTIM_Type *TIMx, uint32_t channel) +{ + switch(channel) + { + case FL_GPTIM_CHANNEL_1: + SET_BIT(TIMx->CCER, (0x1U << 0U)); + break; + case FL_GPTIM_CHANNEL_2: + SET_BIT(TIMx->CCER, (0x1U << 4U)); + break; + case FL_GPTIM_CHANNEL_3: + SET_BIT(TIMx->CCER, (0x1U << 8U)); + break; + case FL_GPTIM_CHANNEL_4: + SET_BIT(TIMx->CCER, (0x1U << 12U)); + break; + } +} + +/** + * @brief + * @rmtoll CCER CCE FL_GPTIM_IC_IsEnabledChannel + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_GPTIM_CHANNEL_1 + * @arg @ref FL_GPTIM_CHANNEL_2 + * @arg @ref FL_GPTIM_CHANNEL_3 + * @arg @ref FL_GPTIM_CHANNEL_4 + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_GPTIM_IC_IsEnabledChannel(GPTIM_Type *TIMx, uint32_t channel) +{ + switch(channel) + { + case FL_GPTIM_CHANNEL_1: + return (uint32_t)(READ_BIT(TIMx->CCER, (0x1U << 0U)) >> 0U); + case FL_GPTIM_CHANNEL_2: + return (uint32_t)(READ_BIT(TIMx->CCER, (0x1U << 4U)) >> 4U); + case FL_GPTIM_CHANNEL_3: + return (uint32_t)(READ_BIT(TIMx->CCER, (0x1U << 8U)) >> 8U); + case FL_GPTIM_CHANNEL_4: + return (uint32_t)(READ_BIT(TIMx->CCER, (0x1U << 12U)) >> 12U); + default: + return 0; + } +} + +/** + * @brief + * @rmtoll CCER CCE FL_GPTIM_IC_DisableChannel + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_GPTIM_CHANNEL_1 + * @arg @ref FL_GPTIM_CHANNEL_2 + * @arg @ref FL_GPTIM_CHANNEL_3 + * @arg @ref FL_GPTIM_CHANNEL_4 + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_IC_DisableChannel(GPTIM_Type *TIMx, uint32_t channel) +{ + switch(channel) + { + case FL_GPTIM_CHANNEL_1: + CLEAR_BIT(TIMx->CCER, (0x1U << 0U)); + break; + case FL_GPTIM_CHANNEL_2: + CLEAR_BIT(TIMx->CCER, (0x1U << 4U)); + break; + case FL_GPTIM_CHANNEL_3: + CLEAR_BIT(TIMx->CCER, (0x1U << 8U)); + break; + case FL_GPTIM_CHANNEL_4: + CLEAR_BIT(TIMx->CCER, (0x1U << 12U)); + break; + } +} + +/** + * @} + */ + +/** @defgroup GPTIM_FL_EF_Init Initialization and de-initialization functions + * @{ + */ +FL_ErrorStatus FL_GPTIM_DeInit(GPTIM_Type *TIMx); + +void FL_GPTIM_StructInit(FL_GPTIM_InitTypeDef *init); +void FL_GPTIM_SlaveMode_StructInit(FL_GPTIM_SlaveInitTypeDef *slave_init); +void FL_GPTIM_OC_StructInit(FL_GPTIM_OC_InitTypeDef *oc_init); +void FL_GPTIM_IC_StructInit(FL_GPTIM_IC_InitTypeDef *ic_init); +void FL_GPTIM_ETR_StructInit(FL_GPTIM_ETR_InitTypeDef *etr_init); + +FL_ErrorStatus FL_GPTIM_Init(GPTIM_Type *TIMx, FL_GPTIM_InitTypeDef *init); +FL_ErrorStatus FL_GPTIM_SlaveMode_Init(GPTIM_Type *TIMx, FL_GPTIM_SlaveInitTypeDef *slave_init); +FL_ErrorStatus FL_GPTIM_OC_Init(GPTIM_Type *TIMx, uint32_t channel, FL_GPTIM_OC_InitTypeDef *oc_init); +FL_ErrorStatus FL_GPTIM_IC_Init(GPTIM_Type *TIMx, uint32_t channel, FL_GPTIM_IC_InitTypeDef *ic_init); +FL_ErrorStatus FL_GPTIM_ETR_Init(GPTIM_Type *TIMx, FL_GPTIM_ETR_InitTypeDef *etr_init); + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif /* __FM33LG0XX_FL_GPTIM_H*/ + +/*************************Py_Code_Generator Version: 0.1-0.11-0.1 @ 2020-09-23*************************/ +/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/ diff --git a/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_i2c.h b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_i2c.h new file mode 100644 index 0000000..65d29e4 --- /dev/null +++ b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_i2c.h @@ -0,0 +1,1886 @@ + /** + ******************************************************************************************************* + * @file fm33lg0xx_fl_i2c.h + * @author FMSH Application Team + * @brief Head file of I2C FL Module + ******************************************************************************************************* + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + + + +/* Define to prevent recursive inclusion---------------------------------------------------------------*/ +#ifndef __FM33LG0XX_FL_I2C_H +#define __FM33LG0XX_FL_I2C_H + +#ifdef __cplusplus +extern "C" { +#endif +/* Includes -------------------------------------------------------------------------------------------*/ +#include "fm33lg0xx_fl_def.h" +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @defgroup I2C I2C + * @brief I2C FL driver + * @{ + */ + +/* Exported types -------------------------------------------------------------------------------------*/ +/** @defgroup I2C_FL_ES_INIT I2C Exported Init structures + * @{ + */ + +/** + * @brief FL I2C Init Sturcture definition + */ +typedef struct +{ + /** 主机时使用的时钟源*/ + uint32_t clockSource; + /** I2C通讯速率*/ + uint32_t baudRate; + +} FL_I2C_MasterMode_InitTypeDef; +/** + * @brief FL I2C Slavemode Init Sturcture definition + */ +typedef struct +{ + /** 从机模式从机地址 */ + uint32_t ownAddr; + /** 从机模式自动回应ACK */ + uint32_t ACK; + /** 从机模式地址位宽 */ + uint32_t ownAddrSize10bit; + /** 从机时钟延展*/ + uint32_t SCLSEN; + +} FL_I2C_SlaveMode_InitTypeDef; +/** + * @} + */ +/* Exported constants ---------------------------------------------------------------------------------*/ +/** @defgroup I2C_FL_Exported_Constants I2C Exported Constants + * @{ + */ + +#define I2C_MSPCFGR_MSPEN_Pos (0U) +#define I2C_MSPCFGR_MSPEN_Msk (0x1U << I2C_MSPCFGR_MSPEN_Pos) +#define I2C_MSPCFGR_MSPEN I2C_MSPCFGR_MSPEN_Msk + +#define I2C_MSPCFGR_TOEN_Pos (1U) +#define I2C_MSPCFGR_TOEN_Msk (0x1U << I2C_MSPCFGR_TOEN_Pos) +#define I2C_MSPCFGR_TOEN I2C_MSPCFGR_TOEN_Msk + +#define I2C_MSPCFGR_DMAEN_Pos (16U) +#define I2C_MSPCFGR_DMAEN_Msk (0x1U << I2C_MSPCFGR_DMAEN_Pos) +#define I2C_MSPCFGR_DMAEN I2C_MSPCFGR_DMAEN_Msk + +#define I2C_MSPCFGR_AUTOEND_Pos (17U) +#define I2C_MSPCFGR_AUTOEND_Msk (0x1U << I2C_MSPCFGR_AUTOEND_Pos) +#define I2C_MSPCFGR_AUTOEND I2C_MSPCFGR_AUTOEND_Msk + +#define I2C_MSPCR_RCEN_Pos (3U) +#define I2C_MSPCR_RCEN_Msk (0x1U << I2C_MSPCR_RCEN_Pos) +#define I2C_MSPCR_RCEN I2C_MSPCR_RCEN_Msk + +#define I2C_MSPCR_PEN_Pos (2U) +#define I2C_MSPCR_PEN_Msk (0x1U << I2C_MSPCR_PEN_Pos) +#define I2C_MSPCR_PEN I2C_MSPCR_PEN_Msk + +#define I2C_MSPCR_RSEN_Pos (1U) +#define I2C_MSPCR_RSEN_Msk (0x1U << I2C_MSPCR_RSEN_Pos) +#define I2C_MSPCR_RSEN I2C_MSPCR_RSEN_Msk + +#define I2C_MSPCR_SEN_Pos (0U) +#define I2C_MSPCR_SEN_Msk (0x1U << I2C_MSPCR_SEN_Pos) +#define I2C_MSPCR_SEN I2C_MSPCR_SEN_Msk + +#define I2C_MSPIER_WCOLIE_Pos (6U) +#define I2C_MSPIER_WCOLIE_Msk (0x1U << I2C_MSPIER_WCOLIE_Pos) +#define I2C_MSPIER_WCOLIE I2C_MSPIER_WCOLIE_Msk + +#define I2C_MSPIER_TOIE_Pos (5U) +#define I2C_MSPIER_TOIE_Msk (0x1U << I2C_MSPIER_TOIE_Pos) +#define I2C_MSPIER_TOIE I2C_MSPIER_TOIE_Msk + +#define I2C_MSPIER_SIE_Pos (4U) +#define I2C_MSPIER_SIE_Msk (0x1U << I2C_MSPIER_SIE_Pos) +#define I2C_MSPIER_SIE I2C_MSPIER_SIE_Msk + +#define I2C_MSPIER_PIE_Pos (3U) +#define I2C_MSPIER_PIE_Msk (0x1U << I2C_MSPIER_PIE_Pos) +#define I2C_MSPIER_PIE I2C_MSPIER_PIE_Msk + +#define I2C_MSPIER_NACKIE_Pos (2U) +#define I2C_MSPIER_NACKIE_Msk (0x1U << I2C_MSPIER_NACKIE_Pos) +#define I2C_MSPIER_NACKIE I2C_MSPIER_NACKIE_Msk + +#define I2C_MSPIER_TXIE_Pos (1U) +#define I2C_MSPIER_TXIE_Msk (0x1U << I2C_MSPIER_TXIE_Pos) +#define I2C_MSPIER_TXIE I2C_MSPIER_TXIE_Msk + +#define I2C_MSPIER_RXIE_Pos (0U) +#define I2C_MSPIER_RXIE_Msk (0x1U << I2C_MSPIER_RXIE_Pos) +#define I2C_MSPIER_RXIE I2C_MSPIER_RXIE_Msk + +#define I2C_MSPISR_WCOL_Pos (6U) +#define I2C_MSPISR_WCOL_Msk (0x1U << I2C_MSPISR_WCOL_Pos) +#define I2C_MSPISR_WCOL I2C_MSPISR_WCOL_Msk + +#define I2C_MSPISR_TO_Pos (5U) +#define I2C_MSPISR_TO_Msk (0x1U << I2C_MSPISR_TO_Pos) +#define I2C_MSPISR_TO I2C_MSPISR_TO_Msk + +#define I2C_MSPISR_S_Pos (4U) +#define I2C_MSPISR_S_Msk (0x1U << I2C_MSPISR_S_Pos) +#define I2C_MSPISR_S I2C_MSPISR_S_Msk + +#define I2C_MSPISR_P_Pos (3U) +#define I2C_MSPISR_P_Msk (0x1U << I2C_MSPISR_P_Pos) +#define I2C_MSPISR_P I2C_MSPISR_P_Msk + +#define I2C_MSPISR_ACKSTA_Pos (2U) +#define I2C_MSPISR_ACKSTA_Msk (0x1U << I2C_MSPISR_ACKSTA_Pos) +#define I2C_MSPISR_ACKSTA I2C_MSPISR_ACKSTA_Msk + +#define I2C_MSPISR_TXIF_Pos (1U) +#define I2C_MSPISR_TXIF_Msk (0x1U << I2C_MSPISR_TXIF_Pos) +#define I2C_MSPISR_TXIF I2C_MSPISR_TXIF_Msk + +#define I2C_MSPISR_RXIF_Pos (0U) +#define I2C_MSPISR_RXIF_Msk (0x1U << I2C_MSPISR_RXIF_Pos) +#define I2C_MSPISR_RXIF I2C_MSPISR_RXIF_Msk + +#define I2C_MSPSR_BUSY_Pos (5U) +#define I2C_MSPSR_BUSY_Msk (0x1U << I2C_MSPSR_BUSY_Pos) +#define I2C_MSPSR_BUSY I2C_MSPSR_BUSY_Msk + +#define I2C_MSPSR_RW_Pos (4U) +#define I2C_MSPSR_RW_Msk (0x1U << I2C_MSPSR_RW_Pos) +#define I2C_MSPSR_RW I2C_MSPSR_RW_Msk + +#define I2C_MSPSR_BF_Pos (2U) +#define I2C_MSPSR_BF_Msk (0x1U << I2C_MSPSR_BF_Pos) +#define I2C_MSPSR_BF I2C_MSPSR_BF_Msk + +#define I2C_MSPSR_ACKMO_Pos (0U) +#define I2C_MSPSR_ACKMO_Msk (0x1U << I2C_MSPSR_ACKMO_Pos) +#define I2C_MSPSR_ACKMO I2C_MSPSR_ACKMO_Msk + +#define I2C_MSPBGR_MSPBGRH_Pos (16U) +#define I2C_MSPBGR_MSPBGRH_Msk (0x1ffU << I2C_MSPBGR_MSPBGRH_Pos) +#define I2C_MSPBGR_MSPBGRH I2C_MSPBGR_MSPBGRH_Msk + +#define I2C_MSPBGR_MSPBGRL_Pos (0U) +#define I2C_MSPBGR_MSPBGRL_Msk (0x1ffU << I2C_MSPBGR_MSPBGRL_Pos) +#define I2C_MSPBGR_MSPBGRL I2C_MSPBGR_MSPBGRL_Msk + +#define I2C_MSPBUF_MSPBUF_Pos (0U) +#define I2C_MSPBUF_MSPBUF_Msk (0xffU << I2C_MSPBUF_MSPBUF_Pos) +#define I2C_MSPBUF_MSPBUF I2C_MSPBUF_MSPBUF_Msk + +#define I2C_MSPTCR_SDAHD_Pos (0U) +#define I2C_MSPTCR_SDAHD_Msk (0x1ffU << I2C_MSPTCR_SDAHD_Pos) +#define I2C_MSPTCR_SDAHD I2C_MSPTCR_SDAHD_Msk + +#define I2C_MSPTOR_TIMEOUT_Pos (0U) +#define I2C_MSPTOR_TIMEOUT_Msk (0xfffU << I2C_MSPTOR_TIMEOUT_Pos) +#define I2C_MSPTOR_TIMEOUT I2C_MSPTOR_TIMEOUT_Msk + +#define I2C_SSPCR_SCLSEN_Pos (9U) +#define I2C_SSPCR_SCLSEN_Msk (0x1U << I2C_SSPCR_SCLSEN_Pos) +#define I2C_SSPCR_SCLSEN I2C_SSPCR_SCLSEN_Msk + +#define I2C_SSPCR_DMAEN_Pos (8U) +#define I2C_SSPCR_DMAEN_Msk (0x1U << I2C_SSPCR_DMAEN_Pos) +#define I2C_SSPCR_DMAEN I2C_SSPCR_DMAEN_Msk + +#define I2C_SSPCR_ACKEN_Pos (4U) +#define I2C_SSPCR_ACKEN_Msk (0x1U << I2C_SSPCR_ACKEN_Pos) +#define I2C_SSPCR_ACKEN I2C_SSPCR_ACKEN_Msk + +#define I2C_SSPCR_SDAO_DLYEN_Pos (3U) +#define I2C_SSPCR_SDAO_DLYEN_Msk (0x1U << I2C_SSPCR_SDAO_DLYEN_Pos) +#define I2C_SSPCR_SDAO_DLYEN I2C_SSPCR_SDAO_DLYEN_Msk + +#define I2C_SSPCR_SCLI_ANFEN_Pos (2U) +#define I2C_SSPCR_SCLI_ANFEN_Msk (0x1U << I2C_SSPCR_SCLI_ANFEN_Pos) +#define I2C_SSPCR_SCLI_ANFEN I2C_SSPCR_SCLI_ANFEN_Msk + +#define I2C_SSPCR_A10EN_Pos (1U) +#define I2C_SSPCR_A10EN_Msk (0x1U << I2C_SSPCR_A10EN_Pos) +#define I2C_SSPCR_A10EN I2C_SSPCR_A10EN_Msk + +#define I2C_SSPCR_SSPEN_Pos (0U) +#define I2C_SSPCR_SSPEN_Msk (0x1U << I2C_SSPCR_SSPEN_Pos) +#define I2C_SSPCR_SSPEN I2C_SSPCR_SSPEN_Msk + +#define I2C_SSPIER_ADEIE_Pos (7U) +#define I2C_SSPIER_ADEIE_Msk (0x1U << I2C_SSPIER_ADEIE_Pos) +#define I2C_SSPIER_ADEIE I2C_SSPIER_ADEIE_Msk + +#define I2C_SSPIER_SIE_Pos (6U) +#define I2C_SSPIER_SIE_Msk (0x1U << I2C_SSPIER_SIE_Pos) +#define I2C_SSPIER_SIE I2C_SSPIER_SIE_Msk + +#define I2C_SSPIER_PIE_Pos (5U) +#define I2C_SSPIER_PIE_Msk (0x1U << I2C_SSPIER_PIE_Pos) +#define I2C_SSPIER_PIE I2C_SSPIER_PIE_Msk + +#define I2C_SSPIER_WCOLIE_Pos (4U) +#define I2C_SSPIER_WCOLIE_Msk (0x1U << I2C_SSPIER_WCOLIE_Pos) +#define I2C_SSPIER_WCOLIE I2C_SSPIER_WCOLIE_Msk + +#define I2C_SSPIER_SSPOVIE_Pos (3U) +#define I2C_SSPIER_SSPOVIE_Msk (0x1U << I2C_SSPIER_SSPOVIE_Pos) +#define I2C_SSPIER_SSPOVIE I2C_SSPIER_SSPOVIE_Msk + +#define I2C_SSPIER_ADMIE_Pos (2U) +#define I2C_SSPIER_ADMIE_Msk (0x1U << I2C_SSPIER_ADMIE_Pos) +#define I2C_SSPIER_ADMIE I2C_SSPIER_ADMIE_Msk + +#define I2C_SSPIER_TXIE_Pos (1U) +#define I2C_SSPIER_TXIE_Msk (0x1U << I2C_SSPIER_TXIE_Pos) +#define I2C_SSPIER_TXIE I2C_SSPIER_TXIE_Msk + +#define I2C_SSPIER_RXIE_Pos (0U) +#define I2C_SSPIER_RXIE_Msk (0x1U << I2C_SSPIER_RXIE_Pos) +#define I2C_SSPIER_RXIE I2C_SSPIER_RXIE_Msk + +#define I2C_SSPISR_ADE_Pos (7U) +#define I2C_SSPISR_ADE_Msk (0x1U << I2C_SSPISR_ADE_Pos) +#define I2C_SSPISR_ADE I2C_SSPISR_ADE_Msk + +#define I2C_SSPISR_S_Pos (6U) +#define I2C_SSPISR_S_Msk (0x1U << I2C_SSPISR_S_Pos) +#define I2C_SSPISR_S I2C_SSPISR_S_Msk + +#define I2C_SSPISR_P_Pos (5U) +#define I2C_SSPISR_P_Msk (0x1U << I2C_SSPISR_P_Pos) +#define I2C_SSPISR_P I2C_SSPISR_P_Msk + +#define I2C_SSPISR_WCOL_Pos (4U) +#define I2C_SSPISR_WCOL_Msk (0x1U << I2C_SSPISR_WCOL_Pos) +#define I2C_SSPISR_WCOL I2C_SSPISR_WCOL_Msk + +#define I2C_SSPISR_SSPOV_Pos (3U) +#define I2C_SSPISR_SSPOV_Msk (0x1U << I2C_SSPISR_SSPOV_Pos) +#define I2C_SSPISR_SSPOV I2C_SSPISR_SSPOV_Msk + +#define I2C_SSPISR_ADM_Pos (2U) +#define I2C_SSPISR_ADM_Msk (0x1U << I2C_SSPISR_ADM_Pos) +#define I2C_SSPISR_ADM I2C_SSPISR_ADM_Msk + +#define I2C_SSPISR_TXIF_Pos (1U) +#define I2C_SSPISR_TXIF_Msk (0x1U << I2C_SSPISR_TXIF_Pos) +#define I2C_SSPISR_TXIF I2C_SSPISR_TXIF_Msk + +#define I2C_SSPISR_RXIF_Pos (0U) +#define I2C_SSPISR_RXIF_Msk (0x1U << I2C_SSPISR_RXIF_Pos) +#define I2C_SSPISR_RXIF I2C_SSPISR_RXIF_Msk + +#define I2C_SSPSR_BUSY_Pos (3U) +#define I2C_SSPSR_BUSY_Msk (0x1U << I2C_SSPSR_BUSY_Pos) +#define I2C_SSPSR_BUSY I2C_SSPSR_BUSY_Msk + +#define I2C_SSPSR_RW_Pos (2U) +#define I2C_SSPSR_RW_Msk (0x1U << I2C_SSPSR_RW_Pos) +#define I2C_SSPSR_RW I2C_SSPSR_RW_Msk + +#define I2C_SSPSR_DA_Pos (1U) +#define I2C_SSPSR_DA_Msk (0x1U << I2C_SSPSR_DA_Pos) +#define I2C_SSPSR_DA I2C_SSPSR_DA_Msk + +#define I2C_SSPSR_BF_Pos (0U) +#define I2C_SSPSR_BF_Msk (0x1U << I2C_SSPSR_BF_Pos) +#define I2C_SSPSR_BF I2C_SSPSR_BF_Msk + + + + + + +#define FL_I2C_MSP_DATA_DIRECTION_SLAVE_TO_MASTER (0x0U << I2C_MSPSR_RW_Pos) +#define FL_I2C_MSP_DATA_DIRECTION_MASTER_TO_SLAVE (0x1U << I2C_MSPSR_RW_Pos) + +#define FL_I2C_MSP_DATA_BUFF_STATUS_FULL (0x0U << I2C_MSPSR_BF_Pos) +#define FL_I2C_MSP_DATA_BUFF_STATUS_EMPTY (0x1U << I2C_MSPSR_BF_Pos) + +#define FL_I2C_MASTER_RESPOND_ACK (0x0U << I2C_MSPSR_ACKMO_Pos) +#define FL_I2C_MASTER_RESPOND_NACK (0x1U << I2C_MSPSR_ACKMO_Pos) + + +#define FL_I2C_SSP_DATA_DIRECTION_SLAVE_TO_MASTER (0x1U << I2C_SSPSR_RW_Pos) +#define FL_I2C_SSP_DATA_DIRECTION_MASTER_TO_SLAVE (0x0U << I2C_SSPSR_RW_Pos) + +#define FL_I2C_SSP_DATA_TYPE_DATA (0x1U << I2C_SSPSR_DA_Pos) +#define FL_I2C_SSP_DATA_TYPE_ADDR (0x0U << I2C_SSPSR_DA_Pos) + +#define FL_I2C_SSP_DATA_BUFF_STATUS_FULL (0x1U << I2C_SSPSR_BF_Pos) +#define FL_I2C_SSP_DATA_BUFF_STATUS_EMPTY (0x0U << I2C_SSPSR_BF_Pos) + +/** + * @} + */ +/* Exported functions ---------------------------------------------------------------------------------*/ +/** @defgroup I2C_FL_Exported_Functions I2C Exported Functions + * @{ + */ + +/** + * @brief + * @rmtoll MSPCFGR MSPEN FL_I2C_Master_Enable + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Master_Enable(I2C_Type *I2Cx) +{ + SET_BIT(I2Cx->MSPCFGR, I2C_MSPCFGR_MSPEN_Msk); +} + +/** + * @brief + * @rmtoll MSPCFGR MSPEN FL_I2C_Master_IsEnabled + * @param I2Cx I2C instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_I2C_Master_IsEnabled(I2C_Type *I2Cx) +{ + return (uint32_t)(READ_BIT(I2Cx->MSPCFGR, I2C_MSPCFGR_MSPEN_Msk) == I2C_MSPCFGR_MSPEN_Msk); +} + +/** + * @brief + * @rmtoll MSPCFGR MSPEN FL_I2C_Master_Disable + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Master_Disable(I2C_Type *I2Cx) +{ + CLEAR_BIT(I2Cx->MSPCFGR, I2C_MSPCFGR_MSPEN_Msk); +} + +/** + * @brief + * @rmtoll MSPCFGR TOEN FL_I2C_Master_EnableTimeout + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Master_EnableTimeout(I2C_Type *I2Cx) +{ + SET_BIT(I2Cx->MSPCFGR, I2C_MSPCFGR_TOEN_Msk); +} + +/** + * @brief + * @rmtoll MSPCFGR TOEN FL_I2C_Master_IsEnabledTimeout + * @param I2Cx I2C instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_I2C_Master_IsEnabledTimeout(I2C_Type *I2Cx) +{ + return (uint32_t)(READ_BIT(I2Cx->MSPCFGR, I2C_MSPCFGR_TOEN_Msk) == I2C_MSPCFGR_TOEN_Msk); +} + +/** + * @brief + * @rmtoll MSPCFGR TOEN FL_I2C_Master_DisableTimeout + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Master_DisableTimeout(I2C_Type *I2Cx) +{ + CLEAR_BIT(I2Cx->MSPCFGR, I2C_MSPCFGR_TOEN_Msk); +} + +/** + * @brief + * @rmtoll MSPCFGR DMAEN FL_I2C_Master_EnableDMAReq + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Master_EnableDMAReq(I2C_Type *I2Cx) +{ + SET_BIT(I2Cx->MSPCFGR, I2C_MSPCFGR_DMAEN_Msk); +} + +/** + * @brief + * @rmtoll MSPCFGR DMAEN FL_I2C_Master_IsEnabledDMAReq + * @param I2Cx I2C instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_I2C_Master_IsEnabledDMAReq(I2C_Type *I2Cx) +{ + return (uint32_t)(READ_BIT(I2Cx->MSPCFGR, I2C_MSPCFGR_DMAEN_Msk) == I2C_MSPCFGR_DMAEN_Msk); +} + +/** + * @brief + * @rmtoll MSPCFGR DMAEN FL_I2C_Master_DisableDMAReq + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Master_DisableDMAReq(I2C_Type *I2Cx) +{ + CLEAR_BIT(I2Cx->MSPCFGR, I2C_MSPCFGR_DMAEN_Msk); +} + +/** + * @brief + * @rmtoll MSPCFGR AUTOEND FL_I2C_Master_EnableAutoStop + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Master_EnableAutoStop(I2C_Type *I2Cx) +{ + SET_BIT(I2Cx->MSPCFGR, I2C_MSPCFGR_AUTOEND_Msk); +} + +/** + * @brief + * @rmtoll MSPCFGR AUTOEND FL_I2C_Master_IsEnabledAutoStop + * @param I2Cx I2C instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_I2C_Master_IsEnabledAutoStop(I2C_Type *I2Cx) +{ + return (uint32_t)(READ_BIT(I2Cx->MSPCFGR, I2C_MSPCFGR_AUTOEND_Msk) == I2C_MSPCFGR_AUTOEND_Msk); +} + +/** + * @brief + * @rmtoll MSPCFGR AUTOEND FL_I2C_Master_DisableAutoStop + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Master_DisableAutoStop(I2C_Type *I2Cx) +{ + CLEAR_BIT(I2Cx->MSPCFGR, I2C_MSPCFGR_AUTOEND_Msk); +} + +/** + * @brief + * @rmtoll MSPCR RCEN FL_I2C_Master_EnableRX + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Master_EnableRX(I2C_Type *I2Cx) +{ + SET_BIT(I2Cx->MSPCR, I2C_MSPCR_RCEN_Msk); +} + +/** + * @brief + * @rmtoll MSPCR RCEN FL_I2C_Master_IsEnabledRX + * @param I2Cx I2C instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_I2C_Master_IsEnabledRX(I2C_Type *I2Cx) +{ + return (uint32_t)(READ_BIT(I2Cx->MSPCR, I2C_MSPCR_RCEN_Msk) == I2C_MSPCR_RCEN_Msk); +} + +/** + * @brief + * @rmtoll MSPCR RCEN FL_I2C_Master_DisableRX + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Master_DisableRX(I2C_Type *I2Cx) +{ + CLEAR_BIT(I2Cx->MSPCR, I2C_MSPCR_RCEN_Msk); +} + +/** + * @brief + * @rmtoll MSPCR PEN FL_I2C_Master_EnableI2CStop + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Master_EnableI2CStop(I2C_Type *I2Cx) +{ + SET_BIT(I2Cx->MSPCR, I2C_MSPCR_PEN_Msk); +} + +/** + * @brief + * @rmtoll MSPCR RSEN FL_I2C_Master_EnableI2CRestart + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Master_EnableI2CRestart(I2C_Type *I2Cx) +{ + SET_BIT(I2Cx->MSPCR, I2C_MSPCR_RSEN_Msk); +} + +/** + * @brief + * @rmtoll MSPCR SEN FL_I2C_Master_EnableI2CStart + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Master_EnableI2CStart(I2C_Type *I2Cx) +{ + SET_BIT(I2Cx->MSPCR, I2C_MSPCR_SEN_Msk); +} + +/** + * @brief + * @rmtoll MSPIER WCOLIE FL_I2C_Master_EnableIT_WriteConflict + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Master_EnableIT_WriteConflict(I2C_Type *I2Cx) +{ + SET_BIT(I2Cx->MSPIER, I2C_MSPIER_WCOLIE_Msk); +} + +/** + * @brief + * @rmtoll MSPIER WCOLIE FL_I2C_Master_IsEnabledIT_WriteConflict + * @param I2Cx I2C instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_I2C_Master_IsEnabledIT_WriteConflict(I2C_Type *I2Cx) +{ + return (uint32_t)(READ_BIT(I2Cx->MSPIER, I2C_MSPIER_WCOLIE_Msk) == I2C_MSPIER_WCOLIE_Msk); +} + +/** + * @brief + * @rmtoll MSPIER WCOLIE FL_I2C_Master_DisableIT_WriteConflict + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Master_DisableIT_WriteConflict(I2C_Type *I2Cx) +{ + CLEAR_BIT(I2Cx->MSPIER, I2C_MSPIER_WCOLIE_Msk); +} + +/** + * @brief + * @rmtoll MSPIER TOIE FL_I2C_Master_EnableIT_Timeout + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Master_EnableIT_Timeout(I2C_Type *I2Cx) +{ + SET_BIT(I2Cx->MSPIER, I2C_MSPIER_TOIE_Msk); +} + +/** + * @brief + * @rmtoll MSPIER TOIE FL_I2C_Master_IsEnabledIT_Timeout + * @param I2Cx I2C instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_I2C_Master_IsEnabledIT_Timeout(I2C_Type *I2Cx) +{ + return (uint32_t)(READ_BIT(I2Cx->MSPIER, I2C_MSPIER_TOIE_Msk) == I2C_MSPIER_TOIE_Msk); +} + +/** + * @brief + * @rmtoll MSPIER TOIE FL_I2C_Master_DisableIT_Timeout + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Master_DisableIT_Timeout(I2C_Type *I2Cx) +{ + CLEAR_BIT(I2Cx->MSPIER, I2C_MSPIER_TOIE_Msk); +} + +/** + * @brief + * @rmtoll MSPIER SIE FL_I2C_Master_EnableIT_Start + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Master_EnableIT_Start(I2C_Type *I2Cx) +{ + SET_BIT(I2Cx->MSPIER, I2C_MSPIER_SIE_Msk); +} + +/** + * @brief + * @rmtoll MSPIER SIE FL_I2C_Master_IsEnabledIT_Start + * @param I2Cx I2C instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_I2C_Master_IsEnabledIT_Start(I2C_Type *I2Cx) +{ + return (uint32_t)(READ_BIT(I2Cx->MSPIER, I2C_MSPIER_SIE_Msk) == I2C_MSPIER_SIE_Msk); +} + +/** + * @brief + * @rmtoll MSPIER SIE FL_I2C_Master_DisableIT_Start + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Master_DisableIT_Start(I2C_Type *I2Cx) +{ + CLEAR_BIT(I2Cx->MSPIER, I2C_MSPIER_SIE_Msk); +} + +/** + * @brief + * @rmtoll MSPIER PIE FL_I2C_Master_EnableIT_Stop + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Master_EnableIT_Stop(I2C_Type *I2Cx) +{ + SET_BIT(I2Cx->MSPIER, I2C_MSPIER_PIE_Msk); +} + +/** + * @brief + * @rmtoll MSPIER PIE FL_I2C_Master_IsEnabledIT_Stop + * @param I2Cx I2C instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_I2C_Master_IsEnabledIT_Stop(I2C_Type *I2Cx) +{ + return (uint32_t)(READ_BIT(I2Cx->MSPIER, I2C_MSPIER_PIE_Msk) == I2C_MSPIER_PIE_Msk); +} + +/** + * @brief + * @rmtoll MSPIER PIE FL_I2C_Master_DisableIT_Stop + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Master_DisableIT_Stop(I2C_Type *I2Cx) +{ + CLEAR_BIT(I2Cx->MSPIER, I2C_MSPIER_PIE_Msk); +} + +/** + * @brief + * @rmtoll MSPIER NACKIE FL_I2C_Master_EnableIT_NACK + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Master_EnableIT_NACK(I2C_Type *I2Cx) +{ + SET_BIT(I2Cx->MSPIER, I2C_MSPIER_NACKIE_Msk); +} + +/** + * @brief + * @rmtoll MSPIER NACKIE FL_I2C_Master_IsEnabledIT_NACK + * @param I2Cx I2C instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_I2C_Master_IsEnabledIT_NACK(I2C_Type *I2Cx) +{ + return (uint32_t)(READ_BIT(I2Cx->MSPIER, I2C_MSPIER_NACKIE_Msk) == I2C_MSPIER_NACKIE_Msk); +} + +/** + * @brief + * @rmtoll MSPIER NACKIE FL_I2C_Master_DisableIT_NACK + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Master_DisableIT_NACK(I2C_Type *I2Cx) +{ + CLEAR_BIT(I2Cx->MSPIER, I2C_MSPIER_NACKIE_Msk); +} + +/** + * @brief + * @rmtoll MSPIER TXIE FL_I2C_Master_EnableIT_TXComplete + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Master_EnableIT_TXComplete(I2C_Type *I2Cx) +{ + SET_BIT(I2Cx->MSPIER, I2C_MSPIER_TXIE_Msk); +} + +/** + * @brief + * @rmtoll MSPIER TXIE FL_I2C_Master_IsEnabledIT_TXComplete + * @param I2Cx I2C instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_I2C_Master_IsEnabledIT_TXComplete(I2C_Type *I2Cx) +{ + return (uint32_t)(READ_BIT(I2Cx->MSPIER, I2C_MSPIER_TXIE_Msk) == I2C_MSPIER_TXIE_Msk); +} + +/** + * @brief + * @rmtoll MSPIER TXIE FL_I2C_Master_DisableIT_TXComplete + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Master_DisableIT_TXComplete(I2C_Type *I2Cx) +{ + CLEAR_BIT(I2Cx->MSPIER, I2C_MSPIER_TXIE_Msk); +} + +/** + * @brief + * @rmtoll MSPIER RXIE FL_I2C_Master_EnableIT_RXComplete + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Master_EnableIT_RXComplete(I2C_Type *I2Cx) +{ + SET_BIT(I2Cx->MSPIER, I2C_MSPIER_RXIE_Msk); +} + +/** + * @brief + * @rmtoll MSPIER RXIE FL_I2C_Master_IsEnabledIT_RXComplete + * @param I2Cx I2C instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_I2C_Master_IsEnabledIT_RXComplete(I2C_Type *I2Cx) +{ + return (uint32_t)(READ_BIT(I2Cx->MSPIER, I2C_MSPIER_RXIE_Msk) == I2C_MSPIER_RXIE_Msk); +} + +/** + * @brief + * @rmtoll MSPIER RXIE FL_I2C_Master_DisableIT_RXComplete + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Master_DisableIT_RXComplete(I2C_Type *I2Cx) +{ + CLEAR_BIT(I2Cx->MSPIER, I2C_MSPIER_RXIE_Msk); +} + +/** + * @brief + * @rmtoll MSPISR WCOL FL_I2C_Master_IsActiveFlag_WriteConflict + * @param I2Cx I2C instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_I2C_Master_IsActiveFlag_WriteConflict(I2C_Type *I2Cx) +{ + return (uint32_t)(READ_BIT(I2Cx->MSPISR, I2C_MSPISR_WCOL_Msk) == (I2C_MSPISR_WCOL_Msk)); +} + +/** + * @brief + * @rmtoll MSPISR WCOL FL_I2C_Master_ClearFlag_WriteConflict + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Master_ClearFlag_WriteConflict(I2C_Type *I2Cx) +{ + WRITE_REG(I2Cx->MSPISR, I2C_MSPISR_WCOL_Msk); +} + +/** + * @brief + * @rmtoll MSPISR TO FL_I2C_Master_IsActiveFlag_Timeout + * @param I2Cx I2C instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_I2C_Master_IsActiveFlag_Timeout(I2C_Type *I2Cx) +{ + return (uint32_t)(READ_BIT(I2Cx->MSPISR, I2C_MSPISR_TO_Msk) == (I2C_MSPISR_TO_Msk)); +} + +/** + * @brief + * @rmtoll MSPISR TO FL_I2C_Master_ClearFlag_Timeout + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Master_ClearFlag_Timeout(I2C_Type *I2Cx) +{ + WRITE_REG(I2Cx->MSPISR, I2C_MSPISR_TO_Msk); +} + +/** + * @brief + * @rmtoll MSPISR S FL_I2C_Master_IsActiveFlag_Start + * @param I2Cx I2C instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_I2C_Master_IsActiveFlag_Start(I2C_Type *I2Cx) +{ + return (uint32_t)(READ_BIT(I2Cx->MSPISR, I2C_MSPISR_S_Msk) == (I2C_MSPISR_S_Msk)); +} + +/** + * @brief + * @rmtoll MSPISR P FL_I2C_Master_IsActiveFlag_Stop + * @param I2Cx I2C instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_I2C_Master_IsActiveFlag_Stop(I2C_Type *I2Cx) +{ + return (uint32_t)(READ_BIT(I2Cx->MSPISR, I2C_MSPISR_P_Msk) == (I2C_MSPISR_P_Msk)); +} + +/** + * @brief + * @rmtoll MSPISR ACKSTA FL_I2C_Master_IsActiveFlag_NACK + * @param I2Cx I2C instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_I2C_Master_IsActiveFlag_NACK(I2C_Type *I2Cx) +{ + return (uint32_t)(READ_BIT(I2Cx->MSPISR, I2C_MSPISR_ACKSTA_Msk) == (I2C_MSPISR_ACKSTA_Msk)); +} + +/** + * @brief + * @rmtoll MSPISR ACKSTA FL_I2C_Master_ClearFlag_NACK + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Master_ClearFlag_NACK(I2C_Type *I2Cx) +{ + WRITE_REG(I2Cx->MSPISR, I2C_MSPISR_ACKSTA_Msk); +} + +/** + * @brief + * @rmtoll MSPISR TXIF FL_I2C_Master_IsActiveFlag_TXComplete + * @param I2Cx I2C instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_I2C_Master_IsActiveFlag_TXComplete(I2C_Type *I2Cx) +{ + return (uint32_t)(READ_BIT(I2Cx->MSPISR, I2C_MSPISR_TXIF_Msk) == (I2C_MSPISR_TXIF_Msk)); +} + +/** + * @brief + * @rmtoll MSPISR TXIF FL_I2C_Master_ClearFlag_TXComplete + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Master_ClearFlag_TXComplete(I2C_Type *I2Cx) +{ + WRITE_REG(I2Cx->MSPISR, I2C_MSPISR_TXIF_Msk); +} + +/** + * @brief + * @rmtoll MSPISR RXIF FL_I2C_Master_IsActiveFlag_RXComplete + * @param I2Cx I2C instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_I2C_Master_IsActiveFlag_RXComplete(I2C_Type *I2Cx) +{ + return (uint32_t)(READ_BIT(I2Cx->MSPISR, I2C_MSPISR_RXIF_Msk) == (I2C_MSPISR_RXIF_Msk)); +} + +/** + * @brief + * @rmtoll MSPISR RXIF FL_I2C_Master_ClearFlag_RXComplete + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Master_ClearFlag_RXComplete(I2C_Type *I2Cx) +{ + WRITE_REG(I2Cx->MSPISR, I2C_MSPISR_RXIF_Msk); +} + +/** + * @brief + * @rmtoll MSPSR BUSY FL_I2C_Master_IsActiveFlag_Busy + * @param I2Cx I2C instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_I2C_Master_IsActiveFlag_Busy(I2C_Type *I2Cx) +{ + return (uint32_t)(READ_BIT(I2Cx->MSPSR, I2C_MSPSR_BUSY_Msk) == (I2C_MSPSR_BUSY_Msk)); +} + +/** + * @brief + * @rmtoll MSPSR RW FL_I2C_Master_GetDirection + * @param I2Cx I2C instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_I2C_MSP_DATA_DIRECTION_SLAVE_TO_MASTER + * @arg @ref FL_I2C_MSP_DATA_DIRECTION_MASTER_TO_SLAVE + */ +__STATIC_INLINE uint32_t FL_I2C_Master_GetDirection(I2C_Type *I2Cx) +{ + return (uint32_t)(READ_BIT(I2Cx->MSPSR, I2C_MSPSR_RW_Msk)); +} + +/** + * @brief + * @rmtoll MSPSR BF FL_I2C_Master_GetBuffStatus + * @param I2Cx I2C instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_I2C_MSP_DATA_BUFF_STATUS_FULL + * @arg @ref FL_I2C_MSP_DATA_BUFF_STATUS_EMPTY + */ +__STATIC_INLINE uint32_t FL_I2C_Master_GetBuffStatus(I2C_Type *I2Cx) +{ + return (uint32_t)(READ_BIT(I2Cx->MSPSR, I2C_MSPSR_BF_Msk)); +} + +/** + * @brief + * @rmtoll MSPSR ACKMO FL_I2C_Master_SetRespond + * @param I2Cx I2C instance + * @param mode This parameter can be one of the following values: + * @arg @ref FL_I2C_MASTER_RESPOND_ACK + * @arg @ref FL_I2C_MASTER_RESPOND_NACK + * @retval None + */ +__STATIC_INLINE void FL_I2C_Master_SetRespond(I2C_Type *I2Cx, uint32_t mode) +{ + MODIFY_REG(I2Cx->MSPSR, I2C_MSPSR_ACKMO_Msk, mode); +} + +/** + * @brief + * @rmtoll MSPSR ACKMO FL_I2C_Master_GetRespond + * @param I2Cx I2C instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_I2C_MASTER_RESPOND_ACK + * @arg @ref FL_I2C_MASTER_RESPOND_NACK + */ +__STATIC_INLINE uint32_t FL_I2C_Master_GetRespond(I2C_Type *I2Cx) +{ + return (uint32_t)(READ_BIT(I2Cx->MSPSR, I2C_MSPSR_ACKMO_Msk)); +} + +/** + * @brief + * @rmtoll MSPBGR MSPBGRH FL_I2C_Master_WriteSCLHighWidth + * @param I2Cx I2C instance + * @param width + * @retval None + */ +__STATIC_INLINE void FL_I2C_Master_WriteSCLHighWidth(I2C_Type *I2Cx, uint32_t width) +{ + MODIFY_REG(I2Cx->MSPBGR, (0x1ffU << 16U), (width << 16U)); +} + +/** + * @brief + * @rmtoll MSPBGR MSPBGRH FL_I2C_Master_ReadSCLHighWidth + * @param I2Cx I2C instance + * @retval + */ +__STATIC_INLINE uint32_t FL_I2C_Master_ReadSCLHighWidth(I2C_Type *I2Cx) +{ + return (uint32_t)(READ_BIT(I2Cx->MSPBGR, (0x1ffU << 16U)) >> 16U); +} + +/** + * @brief + * @rmtoll MSPBGR MSPBGRL FL_I2C_Master_WriteSCLLowWidth + * @param I2Cx I2C instance + * @param width + * @retval None + */ +__STATIC_INLINE void FL_I2C_Master_WriteSCLLowWidth(I2C_Type *I2Cx, uint32_t width) +{ + MODIFY_REG(I2Cx->MSPBGR, (0x1ffU << 0U), (width << 0U)); +} + +/** + * @brief + * @rmtoll MSPBGR MSPBGRL FL_I2C_Master_ReadSCLLowWidth + * @param I2Cx I2C instance + * @retval + */ +__STATIC_INLINE uint32_t FL_I2C_Master_ReadSCLLowWidth(I2C_Type *I2Cx) +{ + return (uint32_t)(READ_BIT(I2Cx->MSPBGR, (0x1ffU << 0U)) >> 0U); +} + +/** + * @brief + * @rmtoll MSPBUF MSPBUF FL_I2C_Master_WriteTXBuff + * @param I2Cx I2C instance + * @param data + * @retval None + */ +__STATIC_INLINE void FL_I2C_Master_WriteTXBuff(I2C_Type *I2Cx, uint32_t data) +{ + MODIFY_REG(I2Cx->MSPBUF, (0xffU << 0U), (data << 0U)); +} + +/** + * @brief + * @rmtoll MSPBUF MSPBUF FL_I2C_Master_ReadRXBuff + * @param I2Cx I2C instance + * @retval + */ +__STATIC_INLINE uint32_t FL_I2C_Master_ReadRXBuff(I2C_Type *I2Cx) +{ + return (uint32_t)(READ_BIT(I2Cx->MSPBUF, 0xffU) >> 0U); +} + +/** + * @brief + * @rmtoll MSPTCR SDAHD FL_I2C_Master_WriteSDAHoldTime + * @param I2Cx I2C instance + * @param time + * @retval None + */ +__STATIC_INLINE void FL_I2C_Master_WriteSDAHoldTime(I2C_Type *I2Cx, uint32_t time) +{ + MODIFY_REG(I2Cx->MSPTCR, (0x1ffU << 0U), (time << 0U)); +} + +/** + * @brief + * @rmtoll MSPTCR SDAHD FL_I2C_Master_ReadSDAHoldTime + * @param I2Cx I2C instance + * @retval + */ +__STATIC_INLINE uint32_t FL_I2C_Master_ReadSDAHoldTime(I2C_Type *I2Cx) +{ + return (uint32_t)(READ_BIT(I2Cx->MSPTCR, 0x1ffU) >> 0U); +} + +/** + * @brief + * @rmtoll MSPTOR TIMEOUT FL_I2C_Master_WriteSlaveSCLTimeout + * @param I2Cx I2C instance + * @param time + * @retval None + */ +__STATIC_INLINE void FL_I2C_Master_WriteSlaveSCLTimeout(I2C_Type *I2Cx, uint32_t time) +{ + MODIFY_REG(I2Cx->MSPTOR, (0xfffU << 0U), (time << 0U)); +} + +/** + * @brief + * @rmtoll MSPTOR TIMEOUT FL_I2C_Master_ReadSlaveSCLTimeout + * @param I2Cx I2C instance + * @retval + */ +__STATIC_INLINE uint32_t FL_I2C_Master_ReadSlaveSCLTimeout(I2C_Type *I2Cx) +{ + return (uint32_t)(READ_BIT(I2Cx->MSPTOR, 0xfffU) >> 0U); +} + +/** + * @brief + * @rmtoll SSPCR SCLSEN FL_I2C_Slave_EnableSCLStretching + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Slave_EnableSCLStretching(I2C_Type *I2Cx) +{ + SET_BIT(I2Cx->SSPCR, I2C_SSPCR_SCLSEN_Msk); +} + +/** + * @brief + * @rmtoll SSPCR SCLSEN FL_I2C_Slave_IsEnabledSCLStretching + * @param I2Cx I2C instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_I2C_Slave_IsEnabledSCLStretching(I2C_Type *I2Cx) +{ + return (uint32_t)(READ_BIT(I2Cx->SSPCR, I2C_SSPCR_SCLSEN_Msk) == I2C_SSPCR_SCLSEN_Msk); +} + +/** + * @brief + * @rmtoll SSPCR SCLSEN FL_I2C_Slave_DisableSCLStretching + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Slave_DisableSCLStretching(I2C_Type *I2Cx) +{ + CLEAR_BIT(I2Cx->SSPCR, I2C_SSPCR_SCLSEN_Msk); +} + +/** + * @brief + * @rmtoll SSPCR DMAEN FL_I2C_Slave_EnableDMAReq + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Slave_EnableDMAReq(I2C_Type *I2Cx) +{ + SET_BIT(I2Cx->SSPCR, I2C_SSPCR_DMAEN_Msk); +} + +/** + * @brief + * @rmtoll SSPCR DMAEN FL_I2C_Slave_IsEnabledDMAReq + * @param I2Cx I2C instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_I2C_Slave_IsEnabledDMAReq(I2C_Type *I2Cx) +{ + return (uint32_t)(READ_BIT(I2Cx->SSPCR, I2C_SSPCR_DMAEN_Msk) == I2C_SSPCR_DMAEN_Msk); +} + +/** + * @brief + * @rmtoll SSPCR DMAEN FL_I2C_Slave_DisableDMAReq + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Slave_DisableDMAReq(I2C_Type *I2Cx) +{ + CLEAR_BIT(I2Cx->SSPCR, I2C_SSPCR_DMAEN_Msk); +} + +/** + * @brief + * @rmtoll SSPCR ACKEN FL_I2C_Slave_EnableACK + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Slave_EnableACK(I2C_Type *I2Cx) +{ + SET_BIT(I2Cx->SSPCR, I2C_SSPCR_ACKEN_Msk); +} + +/** + * @brief + * @rmtoll SSPCR ACKEN FL_I2C_Slave_IsEnabledACK + * @param I2Cx I2C instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_I2C_Slave_IsEnabledACK(I2C_Type *I2Cx) +{ + return (uint32_t)(READ_BIT(I2Cx->SSPCR, I2C_SSPCR_ACKEN_Msk) == I2C_SSPCR_ACKEN_Msk); +} + +/** + * @brief + * @rmtoll SSPCR ACKEN FL_I2C_Slave_DisableACK + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Slave_DisableACK(I2C_Type *I2Cx) +{ + CLEAR_BIT(I2Cx->SSPCR, I2C_SSPCR_ACKEN_Msk); +} + +/** + * @brief + * @rmtoll SSPCR SDAO_DLYEN FL_I2C_Slave_EnableSDAStretching + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Slave_EnableSDAStretching(I2C_Type *I2Cx) +{ + SET_BIT(I2Cx->SSPCR, I2C_SSPCR_SDAO_DLYEN_Msk); +} + +/** + * @brief + * @rmtoll SSPCR SDAO_DLYEN FL_I2C_Slave_IsEnabledSDAStretching + * @param I2Cx I2C instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_I2C_Slave_IsEnabledSDAStretching(I2C_Type *I2Cx) +{ + return (uint32_t)(READ_BIT(I2Cx->SSPCR, I2C_SSPCR_SDAO_DLYEN_Msk) == I2C_SSPCR_SDAO_DLYEN_Msk); +} + +/** + * @brief + * @rmtoll SSPCR SDAO_DLYEN FL_I2C_Slave_DisableSDAStretching + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Slave_DisableSDAStretching(I2C_Type *I2Cx) +{ + CLEAR_BIT(I2Cx->SSPCR, I2C_SSPCR_SDAO_DLYEN_Msk); +} + +/** + * @brief + * @rmtoll SSPCR SCLI_ANFEN FL_I2C_Slave_EnableSCLAnalogFilter + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Slave_EnableSCLAnalogFilter(I2C_Type *I2Cx) +{ + SET_BIT(I2Cx->SSPCR, I2C_SSPCR_SCLI_ANFEN_Msk); +} + +/** + * @brief + * @rmtoll SSPCR SCLI_ANFEN FL_I2C_Slave_IsEnabledSCLAnalogFilter + * @param I2Cx I2C instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_I2C_Slave_IsEnabledSCLAnalogFilter(I2C_Type *I2Cx) +{ + return (uint32_t)(READ_BIT(I2Cx->SSPCR, I2C_SSPCR_SCLI_ANFEN_Msk) == I2C_SSPCR_SCLI_ANFEN_Msk); +} + +/** + * @brief + * @rmtoll SSPCR SCLI_ANFEN FL_I2C_Slave_DisableSCLAnalogFilter + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Slave_DisableSCLAnalogFilter(I2C_Type *I2Cx) +{ + CLEAR_BIT(I2Cx->SSPCR, I2C_SSPCR_SCLI_ANFEN_Msk); +} + +/** + * @brief + * @rmtoll SSPCR A10EN FL_I2C_Slave_Enable10BitAddress + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Slave_Enable10BitAddress(I2C_Type *I2Cx) +{ + SET_BIT(I2Cx->SSPCR, I2C_SSPCR_A10EN_Msk); +} + +/** + * @brief + * @rmtoll SSPCR A10EN FL_I2C_Slave_IsEnabled10BitAddress + * @param I2Cx I2C instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_I2C_Slave_IsEnabled10BitAddress(I2C_Type *I2Cx) +{ + return (uint32_t)(READ_BIT(I2Cx->SSPCR, I2C_SSPCR_A10EN_Msk) == I2C_SSPCR_A10EN_Msk); +} + +/** + * @brief + * @rmtoll SSPCR A10EN FL_I2C_Slave_Disable10BitAddress + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Slave_Disable10BitAddress(I2C_Type *I2Cx) +{ + CLEAR_BIT(I2Cx->SSPCR, I2C_SSPCR_A10EN_Msk); +} + +/** + * @brief + * @rmtoll SSPCR SSPEN FL_I2C_Slave_Enable + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Slave_Enable(I2C_Type *I2Cx) +{ + SET_BIT(I2Cx->SSPCR, I2C_SSPCR_SSPEN_Msk); +} + +/** + * @brief + * @rmtoll SSPCR SSPEN FL_I2C_Slave_IsEnabled + * @param I2Cx I2C instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_I2C_Slave_IsEnabled(I2C_Type *I2Cx) +{ + return (uint32_t)(READ_BIT(I2Cx->SSPCR, I2C_SSPCR_SSPEN_Msk) == I2C_SSPCR_SSPEN_Msk); +} + +/** + * @brief + * @rmtoll SSPCR SSPEN FL_I2C_Slave_Disable + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Slave_Disable(I2C_Type *I2Cx) +{ + CLEAR_BIT(I2Cx->SSPCR, I2C_SSPCR_SSPEN_Msk); +} + +/** + * @brief + * @rmtoll SSPIER ADEIE FL_I2C_Slave_EnableIT_AddressError + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Slave_EnableIT_AddressError(I2C_Type *I2Cx) +{ + SET_BIT(I2Cx->SSPIER, I2C_SSPIER_ADEIE_Msk); +} + +/** + * @brief + * @rmtoll SSPIER ADEIE FL_I2C_Slave_IsEnabledIT_AddressError + * @param I2Cx I2C instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_I2C_Slave_IsEnabledIT_AddressError(I2C_Type *I2Cx) +{ + return (uint32_t)(READ_BIT(I2Cx->SSPIER, I2C_SSPIER_ADEIE_Msk) == I2C_SSPIER_ADEIE_Msk); +} + +/** + * @brief + * @rmtoll SSPIER ADEIE FL_I2C_Slave_DisableIT_AddressError + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Slave_DisableIT_AddressError(I2C_Type *I2Cx) +{ + CLEAR_BIT(I2Cx->SSPIER, I2C_SSPIER_ADEIE_Msk); +} + +/** + * @brief + * @rmtoll SSPIER SIE FL_I2C_Slave_EnableIT_Start + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Slave_EnableIT_Start(I2C_Type *I2Cx) +{ + SET_BIT(I2Cx->SSPIER, I2C_SSPIER_SIE_Msk); +} + +/** + * @brief + * @rmtoll SSPIER SIE FL_I2C_Slave_IsEnabledIT_Start + * @param I2Cx I2C instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_I2C_Slave_IsEnabledIT_Start(I2C_Type *I2Cx) +{ + return (uint32_t)(READ_BIT(I2Cx->SSPIER, I2C_SSPIER_SIE_Msk) == I2C_SSPIER_SIE_Msk); +} + +/** + * @brief + * @rmtoll SSPIER SIE FL_I2C_Slave_DisableIT_Start + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Slave_DisableIT_Start(I2C_Type *I2Cx) +{ + CLEAR_BIT(I2Cx->SSPIER, I2C_SSPIER_SIE_Msk); +} + +/** + * @brief + * @rmtoll SSPIER PIE FL_I2C_Slave_EnableIT_Stop + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Slave_EnableIT_Stop(I2C_Type *I2Cx) +{ + SET_BIT(I2Cx->SSPIER, I2C_SSPIER_PIE_Msk); +} + +/** + * @brief + * @rmtoll SSPIER PIE FL_I2C_Slave_IsEnabledIT_Stop + * @param I2Cx I2C instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_I2C_Slave_IsEnabledIT_Stop(I2C_Type *I2Cx) +{ + return (uint32_t)(READ_BIT(I2Cx->SSPIER, I2C_SSPIER_PIE_Msk) == I2C_SSPIER_PIE_Msk); +} + +/** + * @brief + * @rmtoll SSPIER PIE FL_I2C_Slave_DisableIT_Stop + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Slave_DisableIT_Stop(I2C_Type *I2Cx) +{ + CLEAR_BIT(I2Cx->SSPIER, I2C_SSPIER_PIE_Msk); +} + +/** + * @brief + * @rmtoll SSPIER WCOLIE FL_I2C_Slave_EnableIT_WriteConflict + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Slave_EnableIT_WriteConflict(I2C_Type *I2Cx) +{ + SET_BIT(I2Cx->SSPIER, I2C_SSPIER_WCOLIE_Msk); +} + +/** + * @brief + * @rmtoll SSPIER WCOLIE FL_I2C_Slave_IsEnabledIT_WriteConflict + * @param I2Cx I2C instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_I2C_Slave_IsEnabledIT_WriteConflict(I2C_Type *I2Cx) +{ + return (uint32_t)(READ_BIT(I2Cx->SSPIER, I2C_SSPIER_WCOLIE_Msk) == I2C_SSPIER_WCOLIE_Msk); +} + +/** + * @brief + * @rmtoll SSPIER WCOLIE FL_I2C_Slave_DisableIT_WriteConflict + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Slave_DisableIT_WriteConflict(I2C_Type *I2Cx) +{ + CLEAR_BIT(I2Cx->SSPIER, I2C_SSPIER_WCOLIE_Msk); +} + +/** + * @brief + * @rmtoll SSPIER SSPOVIE FL_I2C_Slave_EnableIT_BuffOverflow + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Slave_EnableIT_BuffOverflow(I2C_Type *I2Cx) +{ + SET_BIT(I2Cx->SSPIER, I2C_SSPIER_SSPOVIE_Msk); +} + +/** + * @brief + * @rmtoll SSPIER SSPOVIE FL_I2C_Slave_IsEnabledIT_BuffOverflow + * @param I2Cx I2C instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_I2C_Slave_IsEnabledIT_BuffOverflow(I2C_Type *I2Cx) +{ + return (uint32_t)(READ_BIT(I2Cx->SSPIER, I2C_SSPIER_SSPOVIE_Msk) == I2C_SSPIER_SSPOVIE_Msk); +} + +/** + * @brief + * @rmtoll SSPIER SSPOVIE FL_I2C_Slave_DisableIT_BuffOverflow + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Slave_DisableIT_BuffOverflow(I2C_Type *I2Cx) +{ + CLEAR_BIT(I2Cx->SSPIER, I2C_SSPIER_SSPOVIE_Msk); +} + +/** + * @brief + * @rmtoll SSPIER ADMIE FL_I2C_Slave_EnableIT_AddressMatch + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Slave_EnableIT_AddressMatch(I2C_Type *I2Cx) +{ + SET_BIT(I2Cx->SSPIER, I2C_SSPIER_ADMIE_Msk); +} + +/** + * @brief + * @rmtoll SSPIER ADMIE FL_I2C_Slave_IsEnabledIT_AddressMatch + * @param I2Cx I2C instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_I2C_Slave_IsEnabledIT_AddressMatch(I2C_Type *I2Cx) +{ + return (uint32_t)(READ_BIT(I2Cx->SSPIER, I2C_SSPIER_ADMIE_Msk) == I2C_SSPIER_ADMIE_Msk); +} + +/** + * @brief + * @rmtoll SSPIER ADMIE FL_I2C_Slave_DisableIT_AddressMatch + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Slave_DisableIT_AddressMatch(I2C_Type *I2Cx) +{ + CLEAR_BIT(I2Cx->SSPIER, I2C_SSPIER_ADMIE_Msk); +} + +/** + * @brief + * @rmtoll SSPIER TXIE FL_I2C_Slave_EnableIT_TXComplete + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Slave_EnableIT_TXComplete(I2C_Type *I2Cx) +{ + SET_BIT(I2Cx->SSPIER, I2C_SSPIER_TXIE_Msk); +} + +/** + * @brief + * @rmtoll SSPIER TXIE FL_I2C_Slave_IsEnabledIT_TXComplete + * @param I2Cx I2C instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_I2C_Slave_IsEnabledIT_TXComplete(I2C_Type *I2Cx) +{ + return (uint32_t)(READ_BIT(I2Cx->SSPIER, I2C_SSPIER_TXIE_Msk) == I2C_SSPIER_TXIE_Msk); +} + +/** + * @brief + * @rmtoll SSPIER TXIE FL_I2C_Slave_DisableIT_TXComplete + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Slave_DisableIT_TXComplete(I2C_Type *I2Cx) +{ + CLEAR_BIT(I2Cx->SSPIER, I2C_SSPIER_TXIE_Msk); +} + +/** + * @brief + * @rmtoll SSPIER RXIE FL_I2C_Slave_EnableIT_RXComplete + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Slave_EnableIT_RXComplete(I2C_Type *I2Cx) +{ + SET_BIT(I2Cx->SSPIER, I2C_SSPIER_RXIE_Msk); +} + +/** + * @brief + * @rmtoll SSPIER RXIE FL_I2C_Slave_IsEnabledIT_RXComplete + * @param I2Cx I2C instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_I2C_Slave_IsEnabledIT_RXComplete(I2C_Type *I2Cx) +{ + return (uint32_t)(READ_BIT(I2Cx->SSPIER, I2C_SSPIER_RXIE_Msk) == I2C_SSPIER_RXIE_Msk); +} + +/** + * @brief + * @rmtoll SSPIER RXIE FL_I2C_Slave_DisableIT_RXComplete + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Slave_DisableIT_RXComplete(I2C_Type *I2Cx) +{ + CLEAR_BIT(I2Cx->SSPIER, I2C_SSPIER_RXIE_Msk); +} + +/** + * @brief + * @rmtoll SSPISR ADE FL_I2C_Slave_IsActiveFlag_AddressError + * @param I2Cx I2C instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_I2C_Slave_IsActiveFlag_AddressError(I2C_Type *I2Cx) +{ + return (uint32_t)(READ_BIT(I2Cx->SSPISR, I2C_SSPISR_ADE_Msk) == (I2C_SSPISR_ADE_Msk)); +} + +/** + * @brief + * @rmtoll SSPISR ADE FL_I2C_Slave_ClearFlag_AddressError + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Slave_ClearFlag_AddressError(I2C_Type *I2Cx) +{ + WRITE_REG(I2Cx->SSPISR, I2C_SSPISR_ADE_Msk); +} + +/** + * @brief + * @rmtoll SSPISR S FL_I2C_Slave_IsActiveFlag_Start + * @param I2Cx I2C instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_I2C_Slave_IsActiveFlag_Start(I2C_Type *I2Cx) +{ + return (uint32_t)(READ_BIT(I2Cx->SSPISR, I2C_SSPISR_S_Msk) == (I2C_SSPISR_S_Msk)); +} + +/** + * @brief + * @rmtoll SSPISR P FL_I2C_Slave_IsActiveFlag_Stop + * @param I2Cx I2C instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_I2C_Slave_IsActiveFlag_Stop(I2C_Type *I2Cx) +{ + return (uint32_t)(READ_BIT(I2Cx->SSPISR, I2C_SSPISR_P_Msk) == (I2C_SSPISR_P_Msk)); +} + +/** + * @brief + * @rmtoll SSPISR WCOL FL_I2C_Slave_IsActiveFlag_WriteConflict + * @param I2Cx I2C instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_I2C_Slave_IsActiveFlag_WriteConflict(I2C_Type *I2Cx) +{ + return (uint32_t)(READ_BIT(I2Cx->SSPISR, I2C_SSPISR_WCOL_Msk) == (I2C_SSPISR_WCOL_Msk)); +} + +/** + * @brief + * @rmtoll SSPISR WCOL FL_I2C_Slave_ClearFlag_WriteConflict + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Slave_ClearFlag_WriteConflict(I2C_Type *I2Cx) +{ + WRITE_REG(I2Cx->SSPISR, I2C_SSPISR_WCOL_Msk); +} + +/** + * @brief + * @rmtoll SSPISR SSPOV FL_I2C_Slave_IsActiveFlag_BuffOverflow + * @param I2Cx I2C instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_I2C_Slave_IsActiveFlag_BuffOverflow(I2C_Type *I2Cx) +{ + return (uint32_t)(READ_BIT(I2Cx->SSPISR, I2C_SSPISR_SSPOV_Msk) == (I2C_SSPISR_SSPOV_Msk)); +} + +/** + * @brief + * @rmtoll SSPISR SSPOV FL_I2C_Slave_ClearFlag_BuffOverflow + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Slave_ClearFlag_BuffOverflow(I2C_Type *I2Cx) +{ + WRITE_REG(I2Cx->SSPISR, I2C_SSPISR_SSPOV_Msk); +} + +/** + * @brief + * @rmtoll SSPISR ADM FL_I2C_Slave_IsActiveFlag_AddressMatch + * @param I2Cx I2C instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_I2C_Slave_IsActiveFlag_AddressMatch(I2C_Type *I2Cx) +{ + return (uint32_t)(READ_BIT(I2Cx->SSPISR, I2C_SSPISR_ADM_Msk) == (I2C_SSPISR_ADM_Msk)); +} + +/** + * @brief + * @rmtoll SSPISR ADM FL_I2C_Slave_ClearFlag_AddressMatch + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Slave_ClearFlag_AddressMatch(I2C_Type *I2Cx) +{ + WRITE_REG(I2Cx->SSPISR, I2C_SSPISR_ADM_Msk); +} + +/** + * @brief + * @rmtoll SSPISR TXIF FL_I2C_Slave_IsActiveFlag_TXComplete + * @param I2Cx I2C instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_I2C_Slave_IsActiveFlag_TXComplete(I2C_Type *I2Cx) +{ + return (uint32_t)(READ_BIT(I2Cx->SSPISR, I2C_SSPISR_TXIF_Msk) == (I2C_SSPISR_TXIF_Msk)); +} + +/** + * @brief + * @rmtoll SSPISR TXIF FL_I2C_Slave_ClearFlag_TXComplete + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Slave_ClearFlag_TXComplete(I2C_Type *I2Cx) +{ + WRITE_REG(I2Cx->SSPISR, I2C_SSPISR_TXIF_Msk); +} + +/** + * @brief + * @rmtoll SSPISR RXIF FL_I2C_Slave_IsActiveFlag_RXComplete + * @param I2Cx I2C instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_I2C_Slave_IsActiveFlag_RXComplete(I2C_Type *I2Cx) +{ + return (uint32_t)(READ_BIT(I2Cx->SSPISR, I2C_SSPISR_RXIF_Msk) == (I2C_SSPISR_RXIF_Msk)); +} + +/** + * @brief + * @rmtoll SSPISR RXIF FL_I2C_Slave_ClearFlag_RXComplete + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Slave_ClearFlag_RXComplete(I2C_Type *I2Cx) +{ + WRITE_REG(I2Cx->SSPISR, I2C_SSPISR_RXIF_Msk); +} + +/** + * @brief + * @rmtoll SSPSR BUSY FL_I2C_Slave_IsActiveFlag_Busy + * @param I2Cx I2C instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_I2C_Slave_IsActiveFlag_Busy(I2C_Type *I2Cx) +{ + return (uint32_t)(READ_BIT(I2Cx->SSPSR, I2C_SSPSR_BUSY_Msk) == (I2C_SSPSR_BUSY_Msk)); +} + +/** + * @brief + * @rmtoll SSPSR RW FL_I2C_Slave_GetDataDirection + * @param I2Cx I2C instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_I2C_SSP_DATA_DIRECTION_SLAVE_TO_MASTER + * @arg @ref FL_I2C_SSP_DATA_DIRECTION_MASTER_TO_SLAVE + */ +__STATIC_INLINE uint32_t FL_I2C_Slave_GetDataDirection(I2C_Type *I2Cx) +{ + return (uint32_t)(READ_BIT(I2Cx->SSPSR, I2C_SSPSR_RW_Msk)); +} + +/** + * @brief + * @rmtoll SSPSR DA FL_I2C_Slave_GetDataType + * @param I2Cx I2C instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_I2C_SSP_DATA_TYPE_DATA + * @arg @ref FL_I2C_SSP_DATA_TYPE_ADDR + */ +__STATIC_INLINE uint32_t FL_I2C_Slave_GetDataType(I2C_Type *I2Cx) +{ + return (uint32_t)(READ_BIT(I2Cx->SSPSR, I2C_SSPSR_DA_Msk)); +} + +/** + * @brief + * @rmtoll SSPSR BF FL_I2C_Slave_GetBuffStatus + * @param I2Cx I2C instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_I2C_SSP_DATA_BUFF_STATUS_FULL + * @arg @ref FL_I2C_SSP_DATA_BUFF_STATUS_EMPTY + */ +__STATIC_INLINE uint32_t FL_I2C_Slave_GetBuffStatus(I2C_Type *I2Cx) +{ + return (uint32_t)(READ_BIT(I2Cx->SSPSR, I2C_SSPSR_BF_Msk)); +} + +/** + * @brief + * @rmtoll SSPBUF FL_I2C_Slave_WriteTXBuff + * @param I2Cx I2C instance + * @param data + * @retval None + */ +__STATIC_INLINE void FL_I2C_Slave_WriteTXBuff(I2C_Type *I2Cx, uint32_t data) +{ + MODIFY_REG(I2Cx->SSPBUF, (0xffU << 0U), (data << 0U)); +} + +/** + * @brief + * @rmtoll SSPBUF FL_I2C_Slave_ReadRXBuff + * @param I2Cx I2C instance + * @retval + */ +__STATIC_INLINE uint32_t FL_I2C_Slave_ReadRXBuff(I2C_Type *I2Cx) +{ + return (uint32_t)(READ_BIT(I2Cx->SSPBUF, 0xffU) >> 0U); +} + +/** + * @brief + * @rmtoll SSPADR FL_I2C_Slave_WriteSlaveAddress + * @param I2Cx I2C instance + * @param address + * @retval None + */ +__STATIC_INLINE void FL_I2C_Slave_WriteSlaveAddress(I2C_Type *I2Cx, uint32_t address) +{ + MODIFY_REG(I2Cx->SSPADR, (0x3ffU << 0U), (address << 0U)); +} + +/** + * @brief + * @rmtoll SSPADR FL_I2C_Slave_ReadSlaveAddress + * @param I2Cx I2C instance + * @retval + */ +__STATIC_INLINE uint32_t FL_I2C_Slave_ReadSlaveAddress(I2C_Type *I2Cx) +{ + return (uint32_t)(READ_BIT(I2Cx->SSPADR, 0x3ffU) >> 0U); +} + +/** + * @} + */ + +/** @defgroup I2C_FL_EF_Init Initialization and de-initialization functions + * @{ + */ +FL_ErrorStatus FL_I2C_DeInit(I2C_Type *I2Cx); +void FL_I2C_SlaveMode_StructInit(FL_I2C_SlaveMode_InitTypeDef *I2C_InitStruct); +void FL_I2C_MasterMode_StructInit(FL_I2C_MasterMode_InitTypeDef *I2C_InitStruct); +FL_ErrorStatus FL_I2C_SlaveMode_Init(I2C_Type *I2cx, FL_I2C_SlaveMode_InitTypeDef *I2C_InitStruct); +FL_ErrorStatus FL_I2C_MasterMode_Init(I2C_Type *I2Cx, FL_I2C_MasterMode_InitTypeDef *I2C_InitStruct); + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif /* __FM33LG0XX_FL_I2C_H*/ + +/*************************Py_Code_Generator Version: 0.1-0.11-0.1 @ 2020-09-27*************************/ +/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/ diff --git a/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_iwdt.h b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_iwdt.h new file mode 100644 index 0000000..3ec94a8 --- /dev/null +++ b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_iwdt.h @@ -0,0 +1,373 @@ + /** + ******************************************************************************************************* + * @file fm33lg0xx_fl_iwdt.h + * @author FMSH Application Team + * @brief Head file of IWDT FL Module + ******************************************************************************************************* + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + + + +/* Define to prevent recursive inclusion---------------------------------------------------------------*/ +#ifndef __FM33LG0XX_FL_IWDT_H +#define __FM33LG0XX_FL_IWDT_H + +#ifdef __cplusplus +extern "C" { +#endif +/* Includes -------------------------------------------------------------------------------------------*/ +#include "fm33lg0xx_fl_def.h" +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @defgroup IWDT IWDT + * @brief IWDT FL driver + * @{ + */ + +/* Exported types -------------------------------------------------------------------------------------*/ +/** @defgroup IWDT_FL_ES_INIT IWDT Exported Init structures + * @{ + */ + +/** + * @brief FL IWDT Init Sturcture definition + */ +typedef struct +{ + /* 看门狗溢出时间 */ + uint32_t overflowPeriod; + /* 清狗窗口 */ + uint32_t iwdtWindows; + +} FL_IWDT_InitTypeDef; +/** + * @} + */ +/* Exported constants ---------------------------------------------------------------------------------*/ +/** @defgroup IWDT_FL_Exported_Constants IWDT Exported Constants + * @{ + */ + +#define IWDT_RELOAD_KEY (0x12345A5AUL) + +#define IWDT_CR_FREEZE_Pos (11U) +#define IWDT_CR_FREEZE_Msk (0x1U << IWDT_CR_FREEZE_Pos) +#define IWDT_CR_FREEZE IWDT_CR_FREEZE_Msk + +#define IWDT_CR_CFG_Pos (0U) +#define IWDT_CR_CFG_Msk (0x7U << IWDT_CR_CFG_Pos) +#define IWDT_CR_CFG IWDT_CR_CFG_Msk + +#define IWDT_IER_IE_Pos (0U) +#define IWDT_IER_IE_Msk (0x1U << IWDT_IER_IE_Pos) +#define IWDT_IER_IE IWDT_IER_IE_Msk + +#define IWDT_ISR_WINF_Pos (0U) +#define IWDT_ISR_WINF_Msk (0x1U << IWDT_ISR_WINF_Pos) +#define IWDT_ISR_WINF IWDT_ISR_WINF_Msk + + + + + + +#define FL_IWDT_PERIOD_125MS (0x0U << IWDT_CR_CFG_Pos) +#define FL_IWDT_PERIOD_250MS (0x1U << IWDT_CR_CFG_Pos) +#define FL_IWDT_PERIOD_500MS (0x2U << IWDT_CR_CFG_Pos) +#define FL_IWDT_PERIOD_1000MS (0x3U << IWDT_CR_CFG_Pos) +#define FL_IWDT_PERIOD_2000MS (0x4U << IWDT_CR_CFG_Pos) +#define FL_IWDT_PERIOD_4000MS (0x5U << IWDT_CR_CFG_Pos) +#define FL_IWDT_PERIOD_8000MS (0x6U << IWDT_CR_CFG_Pos) +#define FL_IWDT_PERIOD_16000MS (0x7U << IWDT_CR_CFG_Pos) + + +/** + * @} + */ +/* Exported functions ---------------------------------------------------------------------------------*/ +/** @defgroup IWDT_FL_Exported_Functions IWDT Exported Functions + * @{ + */ + +/** + * @brief Set IWDT service register + * @rmtoll SERV FL_IWDT_ReloadCounter + * @param IWDTx IWDT instance + * @retval None + */ +__STATIC_INLINE void FL_IWDT_ReloadCounter(IWDT_Type *IWDTx) +{ + volatile uint32_t val = 0; + IWDTx->SERV = IWDT_RELOAD_KEY; + val = READ_REG(IWDTx->SERV); +} + +/** + * @brief Set freeze in sleep enable + * @rmtoll CR FREEZE FL_IWDT_EnableFreezeWhileSleep + * @param IWDTx IWDT instance + * @retval None + */ +__STATIC_INLINE void FL_IWDT_EnableFreezeWhileSleep(IWDT_Type *IWDTx) +{ + volatile uint32_t val = 0; + SET_BIT(IWDTx->CR, IWDT_CR_FREEZE_Msk); + val = READ_REG(IWDTx->SERV); +} + +/** + * @brief Set freeze in sleep disable + * @rmtoll CR FREEZE FL_IWDT_DisableFreezeWhileSleep + * @param IWDTx IWDT instance + * @retval None + */ +__STATIC_INLINE void FL_IWDT_DisableFreezeWhileSleep(IWDT_Type *IWDTx) +{ + volatile uint32_t val = 0; + CLEAR_BIT(IWDTx->CR, IWDT_CR_FREEZE_Msk); + val = READ_REG(IWDTx->SERV); +} + +/** + * @brief Get freeze in sleep enable status + * @rmtoll CR FREEZE FL_IWDT_IsEnabledFreezeWhileSleep + * @param IWDTx IWDT instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_IWDT_IsEnabledFreezeWhileSleep(IWDT_Type *IWDTx) +{ + volatile uint32_t val = 0; + uint32_t temp; + temp = (uint32_t)(READ_BIT(IWDTx->CR, IWDT_CR_FREEZE_Msk) == IWDT_CR_FREEZE_Msk); + val = READ_REG(IWDTx->SERV); + return temp; +} + +/** + * @brief Set IWDT overflow period + * @rmtoll CR CFG FL_IWDT_SetPeriod + * @param IWDTx IWDT instance + * @param period This parameter can be one of the following values: + * @arg @ref FL_IWDT_PERIOD_125MS + * @arg @ref FL_IWDT_PERIOD_250MS + * @arg @ref FL_IWDT_PERIOD_500MS + * @arg @ref FL_IWDT_PERIOD_1000MS + * @arg @ref FL_IWDT_PERIOD_2000MS + * @arg @ref FL_IWDT_PERIOD_4000MS + * @arg @ref FL_IWDT_PERIOD_8000MS + * @arg @ref FL_IWDT_PERIOD_16000MS + * @retval None + */ +__STATIC_INLINE void FL_IWDT_SetPeriod(IWDT_Type *IWDTx, uint32_t period) +{ + volatile uint32_t val = 0; + MODIFY_REG(IWDTx->CR, IWDT_CR_CFG_Msk, period); + val = READ_REG(IWDTx->SERV); +} + +/** + * @brief Get IWDT overflow period + * @rmtoll CR CFG FL_IWDT_GetPeriod + * @param IWDTx IWDT instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_IWDT_PERIOD_125MS + * @arg @ref FL_IWDT_PERIOD_250MS + * @arg @ref FL_IWDT_PERIOD_500MS + * @arg @ref FL_IWDT_PERIOD_1000MS + * @arg @ref FL_IWDT_PERIOD_2000MS + * @arg @ref FL_IWDT_PERIOD_4000MS + * @arg @ref FL_IWDT_PERIOD_8000MS + * @arg @ref FL_IWDT_PERIOD_16000MS + */ +__STATIC_INLINE uint32_t FL_IWDT_GetPeriod(IWDT_Type *IWDTx) +{ + volatile uint32_t val = 0; + uint32_t temp; + temp = (uint32_t)(READ_BIT(IWDTx->CR, IWDT_CR_CFG_Msk)); + val = READ_REG(IWDTx->SERV); + return temp; +} + +/** + * @brief Get IWDT current counter value + * @rmtoll CNT FL_IWDT_ReadCounter + * @param IWDTx IWDT instance + * @retval + */ +__STATIC_INLINE uint32_t FL_IWDT_ReadCounter(IWDT_Type *IWDTx) +{ + volatile uint32_t val = 0; + uint32_t temp; + temp = (uint32_t)(READ_BIT(IWDTx->CNT, (0xfffU << 0U)) >> 0U); + val = READ_REG(IWDTx->SERV); + return temp; +} + +/** + * @brief Set IWDT window register + * @rmtoll WIN FL_IWDT_WriteWindow + * @param IWDTx IWDT instance + * @param value + * @retval None + */ +__STATIC_INLINE void FL_IWDT_WriteWindow(IWDT_Type *IWDTx, uint32_t value) +{ + volatile uint32_t val = 0; + IWDTx->WIN = (value & 0xFFF); + val = READ_REG(IWDTx->SERV); +} + +/** + * @brief Get IWDT window register + * @rmtoll WIN FL_IWDT_ReadWindow + * @param IWDTx IWDT instance + * @retval + */ +__STATIC_INLINE uint32_t FL_IWDT_ReadWindow(IWDT_Type *IWDTx) +{ + volatile uint32_t val = 0; + uint32_t temp; + temp = (uint32_t)(READ_BIT(IWDTx->WIN, (0xfffU << 0U)) >> 0U); + val = READ_REG(IWDTx->SERV); + return temp; +} + +/** + * @brief IWDT interrupt enable + * @rmtoll IER IE FL_IWDT_EnableIT_EnterWindow + * @param IWDTx IWDT instance + * @retval None + */ +__STATIC_INLINE void FL_IWDT_EnableIT_EnterWindow(IWDT_Type *IWDTx) +{ + volatile uint32_t val = 0; + IWDTx->IER = FL_ENABLE; + val = READ_REG(IWDTx->SERV); +} + +/** + * @brief IWDT interrupt disable + * @rmtoll IER IE FL_IWDT_DisableIT_EnterWindow + * @param IWDTx IWDT instance + * @retval None + */ +__STATIC_INLINE void FL_IWDT_DisableIT_EnterWindow(IWDT_Type *IWDTx) +{ + volatile uint32_t val = 0; + IWDTx->IER = FL_DISABLE; + val = READ_REG(IWDTx->SERV); +} + +/** + * @brief Get IWDT interrupt enable status + * @rmtoll IER IE FL_IWDT_IsEnabledIT_EnterWindow + * @param IWDTx IWDT instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_IWDT_IsEnabledIT_EnterWindow(IWDT_Type *IWDTx) +{ + volatile uint32_t val = 0; + uint32_t temp; + temp = (uint32_t)(READ_BIT(IWDTx->IER, IWDT_IER_IE_Msk) == IWDT_IER_IE_Msk); + val = READ_REG(IWDTx->SERV); + return temp; +} + +/** + * @brief Get IWDT window interrupt flag + * @rmtoll ISR WINF FL_IWDT_IsActiveFlag_EnterWindow + * @param IWDTx IWDT instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_IWDT_IsActiveFlag_EnterWindow(IWDT_Type *IWDTx) +{ + volatile uint32_t val = 0; + uint32_t temp; + temp = (uint32_t)(READ_BIT(IWDTx->ISR, IWDT_ISR_WINF_Msk)); + val = READ_REG(IWDTx->SERV); + return temp; +} + +/** + * @brief Clear IWDT window interrupt flag + * @rmtoll ISR WINF FL_IWDT_ClearFlag_EnterWindow + * @param IWDTx IWDT instance + * @retval None + */ +__STATIC_INLINE void FL_IWDT_ClearFlag_EnterWindow(IWDT_Type *IWDTx) +{ + volatile uint32_t val = 0; + IWDTx->ISR = IWDT_ISR_WINF_Msk; + val = READ_REG(IWDTx->SERV); +} + +/** + * @} + */ + +/** @defgroup IWDT_FL_EF_Init Initialization and de-initialization functions + * @{ + */ +FL_ErrorStatus FL_IWDT_DeInit(IWDT_Type *IWDTx); +void FL_IWDT_StructInit(FL_IWDT_InitTypeDef *IWDT_InitStruct); +FL_ErrorStatus FL_IWDT_Init(IWDT_Type *IWDTx, FL_IWDT_InitTypeDef *IWDT_InitStruct); + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif /* __FM33LG0XX_FL_IWDT_H*/ + +/*************************Py_Code_Generator Version: 0.1-0.11-0.1 @ 2020-09-14*************************/ +/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/ diff --git a/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_lcd.h b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_lcd.h new file mode 100644 index 0000000..aef16f3 --- /dev/null +++ b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_lcd.h @@ -0,0 +1,1217 @@ + /** + ******************************************************************************************************* + * @file fm33lg0xx_fl_lcd.h + * @author FMSH Application Team + * @brief Head file of LCD FL Module + ******************************************************************************************************* + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + + + +/* Define to prevent recursive inclusion---------------------------------------------------------------*/ +#ifndef __FM33LG0XX_FL_LCD_H +#define __FM33LG0XX_FL_LCD_H + +#ifdef __cplusplus +extern "C" { +#endif +/* Includes -------------------------------------------------------------------------------------------*/ +#include "fm33lg0xx_fl_def.h" +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @defgroup LCD LCD + * @brief LCD FL driver + * @{ + */ + +/* Exported types -------------------------------------------------------------------------------------*/ +/** @defgroup LCD_FL_ES_INIT LCD Exported Init structures + * @{ + */ + +/** + * @brief FL LCD Init Sturcture definition + */ +typedef struct +{ + /*! 电流源大小控制 */ + uint32_t biasCurrent; + /*! 驱动模式 */ + uint32_t mode; + /*! 偏执电平 */ + uint32_t biasVoltage; + /*! 偏执类型 */ + uint32_t biasMode; + /*! 驱动波形 */ + uint32_t waveform; + /*! COM数目 */ + uint32_t COMxNum; + /*! 显示频率 */ + uint32_t displayFreq; + /*! 显示闪烁点亮时间(ms) */ + uint32_t flickOnTime; + /*! 显示闪烁熄灭时间(ms) */ + uint32_t flickOffTime; +} FL_LCD_InitTypeDef; + +/** + * @} + */ +/* Exported constants ---------------------------------------------------------------------------------*/ +/** @defgroup LCD_FL_Exported_Constants LCD Exported Constants + * @{ + */ + +#define LCD_CR_SCFSEL_Pos (20U) +#define LCD_CR_SCFSEL_Msk (0x7U << LCD_CR_SCFSEL_Pos) +#define LCD_CR_SCFSEL LCD_CR_SCFSEL_Msk + +#define LCD_CR_SC_CTRL_Pos (18U) +#define LCD_CR_SC_CTRL_Msk (0x3U << LCD_CR_SC_CTRL_Pos) +#define LCD_CR_SC_CTRL LCD_CR_SC_CTRL_Msk + +#define LCD_CR_IC_CTRL_Pos (16U) +#define LCD_CR_IC_CTRL_Msk (0x3U << LCD_CR_IC_CTRL_Pos) +#define LCD_CR_IC_CTRL LCD_CR_IC_CTRL_Msk + +#define LCD_CR_ENMODE_Pos (15U) +#define LCD_CR_ENMODE_Msk (0x1U << LCD_CR_ENMODE_Pos) +#define LCD_CR_ENMODE LCD_CR_ENMODE_Msk + +#define LCD_CR_FLICK_Pos (14U) +#define LCD_CR_FLICK_Msk (0x1U << LCD_CR_FLICK_Pos) +#define LCD_CR_FLICK LCD_CR_FLICK_Msk + +#define LCD_CR_BIAS_Pos (8U) +#define LCD_CR_BIAS_Msk (0xfU << LCD_CR_BIAS_Pos) +#define LCD_CR_BIAS LCD_CR_BIAS_Msk + +#define LCD_CR_BIASMD_Pos (5U) +#define LCD_CR_BIASMD_Msk (0x1U << LCD_CR_BIASMD_Pos) +#define LCD_CR_BIASMD LCD_CR_BIASMD_Msk + +#define LCD_CR_ANTIPOLAR_Pos (4U) +#define LCD_CR_ANTIPOLAR_Msk (0x1U << LCD_CR_ANTIPOLAR_Pos) +#define LCD_CR_ANTIPOLAR LCD_CR_ANTIPOLAR_Msk + +#define LCD_CR_WFT_Pos (3U) +#define LCD_CR_WFT_Msk (0x1U << LCD_CR_WFT_Pos) +#define LCD_CR_WFT LCD_CR_WFT_Msk + +#define LCD_CR_LMUX_Pos (1U) +#define LCD_CR_LMUX_Msk (0x3U << LCD_CR_LMUX_Pos) +#define LCD_CR_LMUX LCD_CR_LMUX_Msk + +#define LCD_CR_EN_Pos (0U) +#define LCD_CR_EN_Msk (0x1U << LCD_CR_EN_Pos) +#define LCD_CR_EN LCD_CR_EN_Msk + +#define LCD_FCR_DF_Pos (0U) +#define LCD_FCR_DF_Msk (0xffU << LCD_FCR_DF_Pos) +#define LCD_FCR_DF LCD_FCR_DF_Msk + +#define LCD_FLKT_TOFF_Pos (8U) +#define LCD_FLKT_TOFF_Msk (0xffU << LCD_FLKT_TOFF_Pos) +#define LCD_FLKT_TOFF LCD_FLKT_TOFF_Msk + +#define LCD_FLKT_TON_Pos (0U) +#define LCD_FLKT_TON_Msk (0xffU << LCD_FLKT_TON_Pos) +#define LCD_FLKT_TON LCD_FLKT_TON_Msk + +#define LCD_IER_DONIE_Pos (1U) +#define LCD_IER_DONIE_Msk (0x1U << LCD_IER_DONIE_Pos) +#define LCD_IER_DONIE LCD_IER_DONIE_Msk + +#define LCD_IER_DOFFIE_Pos (0U) +#define LCD_IER_DOFFIE_Msk (0x1U << LCD_IER_DOFFIE_Pos) +#define LCD_IER_DOFFIE LCD_IER_DOFFIE_Msk + +#define LCD_ISR_DONIF_Pos (1U) +#define LCD_ISR_DONIF_Msk (0x1U << LCD_ISR_DONIF_Pos) +#define LCD_ISR_DONIF LCD_ISR_DONIF_Msk + +#define LCD_ISR_DOFFIF_Pos (0U) +#define LCD_ISR_DOFFIF_Msk (0x1U << LCD_ISR_DOFFIF_Pos) +#define LCD_ISR_DOFFIF LCD_ISR_DOFFIF_Msk + +#define LCD_DATA0_DSDA_Pos (0U) +#define LCD_DATA0_DSDA_Msk (0xffffffffU << LCD_DATA0_DSDA_Pos) +#define LCD_DATA0_DSDA LCD_DATA0_DSDA_Msk + + + +#define FL_LCD_DATA_REG0 (0x0U << 0U) +#define FL_LCD_DATA_REG1 (0x1U << 0U) +#define FL_LCD_DATA_REG2 (0x2U << 0U) +#define FL_LCD_DATA_REG3 (0x3U << 0U) +#define FL_LCD_DATA_REG4 (0x4U << 0U) +#define FL_LCD_DATA_REG5 (0x5U << 0U) +#define FL_LCD_DATA_REG6 (0x6U << 0U) +#define FL_LCD_DATA_REG7 (0x7U << 0U) +#define FL_LCD_DATA_REG8 (0x8U << 0U) +#define FL_LCD_DATA_REG9 (0x9U << 0U) +#define FL_LCD_COMEN_COM0 (0x1U << 0U) +#define FL_LCD_COMEN_COM1 (0x1U << 1U) +#define FL_LCD_COMEN_COM2 (0x1U << 2U) +#define FL_LCD_COMEN_COM3 (0x1U << 3U) +#define FL_LCD_COMEN_COM4 (0x1U << 28U) +#define FL_LCD_COMEN_COM5 (0x1U << 29U) +#define FL_LCD_COMEN_COM6 (0x1U << 30U) +#define FL_LCD_COMEN_COM7 (0x1U << 31U) +#define FL_LCD_SEGEN0_SEG0 (0x1U << 0U) +#define FL_LCD_SEGEN0_SEG1 (0x1U << 1U) +#define FL_LCD_SEGEN0_SEG2 (0x1U << 2U) +#define FL_LCD_SEGEN0_SEG3 (0x1U << 3U) +#define FL_LCD_SEGEN0_SEG4 (0x1U << 4U) +#define FL_LCD_SEGEN0_SEG5 (0x1U << 5U) +#define FL_LCD_SEGEN0_SEG6 (0x1U << 6U) +#define FL_LCD_SEGEN0_SEG7 (0x1U << 7U) +#define FL_LCD_SEGEN0_SEG8 (0x1U << 8U) +#define FL_LCD_SEGEN0_SEG9 (0x1U << 9U) +#define FL_LCD_SEGEN0_SEG10 (0x1U << 10U) +#define FL_LCD_SEGEN0_SEG11 (0x1U << 11U) +#define FL_LCD_SEGEN0_SEG12 (0x1U << 12U) +#define FL_LCD_SEGEN0_SEG13 (0x1U << 13U) +#define FL_LCD_SEGEN0_SEG14 (0x1U << 14U) +#define FL_LCD_SEGEN0_SEG15 (0x1U << 15U) +#define FL_LCD_SEGEN0_SEG16 (0x1U << 16U) +#define FL_LCD_SEGEN0_SEG17 (0x1U << 17U) +#define FL_LCD_SEGEN0_SEG18 (0x1U << 18U) +#define FL_LCD_SEGEN0_SEG19 (0x1U << 19U) +#define FL_LCD_SEGEN0_SEG20 (0x1U << 20U) +#define FL_LCD_SEGEN0_SEG21 (0x1U << 21U) +#define FL_LCD_SEGEN0_SEG22 (0x1U << 22U) +#define FL_LCD_SEGEN0_SEG23 (0x1U << 23U) +#define FL_LCD_SEGEN0_SEG24 (0x1U << 24U) +#define FL_LCD_SEGEN0_SEG25 (0x1U << 25U) +#define FL_LCD_SEGEN0_SEG26 (0x1U << 26U) +#define FL_LCD_SEGEN0_SEG27 (0x1U << 27U) +#define FL_LCD_SEGEN0_SEG28 (0x1U << 28U) +#define FL_LCD_SEGEN0_SEG29 (0x1U << 29U) +#define FL_LCD_SEGEN0_SEG30 (0x1U << 30U) +#define FL_LCD_SEGEN0_SEG31 (0x1U << 31U) +#define FL_LCD_SEGEN1_SEG0 (0x1U << 0U) +#define FL_LCD_SEGEN1_SEG1 (0x1U << 1U) +#define FL_LCD_SEGEN1_SEG2 (0x1U << 2U) +#define FL_LCD_SEGEN1_SEG3 (0x1U << 3U) +#define FL_LCD_SEGEN1_SEG4 (0x1U << 4U) +#define FL_LCD_SEGEN1_SEG5 (0x1U << 5U) +#define FL_LCD_SEGEN1_SEG6 (0x1U << 6U) +#define FL_LCD_SEGEN1_SEG7 (0x1U << 7U) +#define FL_LCD_SEGEN1_SEG8 (0x1U << 8U) +#define FL_LCD_SEGEN1_SEG9 (0x1U << 9U) +#define FL_LCD_SEGEN1_SEG10 (0x1U << 10U) +#define FL_LCD_SEGEN1_SEG11 (0x1U << 11U) + + + +#define FL_LCD_CAP_DRIVER_FREQ_FRAME_COM (0x0U << LCD_CR_SCFSEL_Pos) +#define FL_LCD_CAP_DRIVER_FREQ_LSCLK_DIV8 (0x1U << LCD_CR_SCFSEL_Pos) +#define FL_LCD_CAP_DRIVER_FREQ_LSCLK_DIV16 (0x2U << LCD_CR_SCFSEL_Pos) +#define FL_LCD_CAP_DRIVER_FREQ_LSCLK_DIV32 (0x3U << LCD_CR_SCFSEL_Pos) +#define FL_LCD_CAP_DRIVER_FREQ_LSCLK_DIV64 (0x4U << LCD_CR_SCFSEL_Pos) +#define FL_LCD_CAP_DRIVER_FREQ_LSCLK_DIV128 (0x5U << LCD_CR_SCFSEL_Pos) +#define FL_LCD_CAP_DRIVER_FREQ_LSCLK_DIV256 (0x6U << LCD_CR_SCFSEL_Pos) +#define FL_LCD_CAP_DRIVER_FREQ_LSCLK_DIV512 (0x7U << LCD_CR_SCFSEL_Pos) + + +#define FL_LCD_CAP_DRIVER_MODE_ONE (0x0U << LCD_CR_SC_CTRL_Pos) +#define FL_LCD_CAP_DRIVER_MODE_TWO (0x1U << LCD_CR_SC_CTRL_Pos) +#define FL_LCD_CAP_DRIVER_MODE_FOUR (0x2U << LCD_CR_SC_CTRL_Pos) +#define FL_LCD_CAP_DRIVER_MODE_MANY (0x3U << LCD_CR_SC_CTRL_Pos) + + +#define FL_LCD_BIAS_CURRENT_VERYHIGH (0x0U << LCD_CR_IC_CTRL_Pos) +#define FL_LCD_BIAS_CURRENT_HIGH (0x1U << LCD_CR_IC_CTRL_Pos) +#define FL_LCD_BIAS_CURRENT_MEDIUM (0x2U << LCD_CR_IC_CTRL_Pos) +#define FL_LCD_BIAS_CURRENT_LOW (0x3U << LCD_CR_IC_CTRL_Pos) + + +#define FL_LCD_DRIVER_MODE_INNER_RESISTER (0x1U << LCD_CR_ENMODE_Pos) +#define FL_LCD_DRIVER_MODE_OUTER_CAPACITY (0x0U << LCD_CR_ENMODE_Pos) + + +#define FL_LCD_BIAS_VOLTAGE_LEVEL0 (0x0U << LCD_CR_BIAS_Pos) +#define FL_LCD_BIAS_VOLTAGE_LEVEL1 (0x1U << LCD_CR_BIAS_Pos) +#define FL_LCD_BIAS_VOLTAGE_LEVEL2 (0x2U << LCD_CR_BIAS_Pos) +#define FL_LCD_BIAS_VOLTAGE_LEVEL3 (0x3U << LCD_CR_BIAS_Pos) +#define FL_LCD_BIAS_VOLTAGE_LEVEL4 (0x4U << LCD_CR_BIAS_Pos) +#define FL_LCD_BIAS_VOLTAGE_LEVEL5 (0x5U << LCD_CR_BIAS_Pos) +#define FL_LCD_BIAS_VOLTAGE_LEVEL6 (0x6U << LCD_CR_BIAS_Pos) +#define FL_LCD_BIAS_VOLTAGE_LEVEL7 (0x7U << LCD_CR_BIAS_Pos) +#define FL_LCD_BIAS_VOLTAGE_LEVEL8 (0x8U << LCD_CR_BIAS_Pos) +#define FL_LCD_BIAS_VOLTAGE_LEVEL9 (0x9U << LCD_CR_BIAS_Pos) +#define FL_LCD_BIAS_VOLTAGE_LEVEL10 (0xaU << LCD_CR_BIAS_Pos) +#define FL_LCD_BIAS_VOLTAGE_LEVEL11 (0xbU << LCD_CR_BIAS_Pos) +#define FL_LCD_BIAS_VOLTAGE_LEVEL12 (0xcU << LCD_CR_BIAS_Pos) +#define FL_LCD_BIAS_VOLTAGE_LEVEL13 (0xdU << LCD_CR_BIAS_Pos) +#define FL_LCD_BIAS_VOLTAGE_LEVEL14 (0xeU << LCD_CR_BIAS_Pos) +#define FL_LCD_BIAS_VOLTAGE_LEVEL15 (0xfU << LCD_CR_BIAS_Pos) + + +#define FL_LCD_BIAS_MODE_4BIAS (0x0U << LCD_CR_BIASMD_Pos) +#define FL_LCD_BIAS_MODE_3BIAS (0x1U << LCD_CR_BIASMD_Pos) + + +#define FL_LCD_ANTIPOLAR_FLOATING (0x0U << LCD_CR_ANTIPOLAR_Pos) +#define FL_LCD_ANTIPOLAR_GND (0x1U << LCD_CR_ANTIPOLAR_Pos) + +#define FL_LCD_WAVEFORM_TYPEA (0x0U << LCD_CR_WFT_Pos) +#define FL_LCD_WAVEFORM_TYPEB (0x1U << LCD_CR_WFT_Pos) + + +#define FL_LCD_COM_NUM_4COM (0x0U << LCD_CR_LMUX_Pos) +#define FL_LCD_COM_NUM_6COM (0x1U << LCD_CR_LMUX_Pos) +#define FL_LCD_COM_NUM_8COM (0x2U << LCD_CR_LMUX_Pos) + + +/** + * @} + */ +/* Exported functions ---------------------------------------------------------------------------------*/ +/** @defgroup LCD_FL_Exported_Functions LCD Exported Functions + * @{ + */ + +/** + * @brief Set Capacity Driver Freq + * @rmtoll CR SCFSEL FL_LCD_SetCapDriverFreq + * @param LCDx LCD instance + * @param freq This parameter can be one of the following values: + * @arg @ref FL_LCD_CAP_DRIVER_FREQ_FRAME_COM + * @arg @ref FL_LCD_CAP_DRIVER_FREQ_LSCLK_DIV8 + * @arg @ref FL_LCD_CAP_DRIVER_FREQ_LSCLK_DIV16 + * @arg @ref FL_LCD_CAP_DRIVER_FREQ_LSCLK_DIV32 + * @arg @ref FL_LCD_CAP_DRIVER_FREQ_LSCLK_DIV64 + * @arg @ref FL_LCD_CAP_DRIVER_FREQ_LSCLK_DIV128 + * @arg @ref FL_LCD_CAP_DRIVER_FREQ_LSCLK_DIV256 + * @arg @ref FL_LCD_CAP_DRIVER_FREQ_LSCLK_DIV512 + * @retval None + */ +__STATIC_INLINE void FL_LCD_SetCapDriverFreq(LCD_Type *LCDx, uint32_t freq) +{ + MODIFY_REG(LCDx->CR, LCD_CR_SCFSEL_Msk, freq); +} + +/** + * @brief Get Capacity Driver Freq + * @rmtoll CR SCFSEL FL_LCD_GetCapDriverFreq + * @param LCDx LCD instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_LCD_CAP_DRIVER_FREQ_FRAME_COM + * @arg @ref FL_LCD_CAP_DRIVER_FREQ_LSCLK_DIV8 + * @arg @ref FL_LCD_CAP_DRIVER_FREQ_LSCLK_DIV16 + * @arg @ref FL_LCD_CAP_DRIVER_FREQ_LSCLK_DIV32 + * @arg @ref FL_LCD_CAP_DRIVER_FREQ_LSCLK_DIV64 + * @arg @ref FL_LCD_CAP_DRIVER_FREQ_LSCLK_DIV128 + * @arg @ref FL_LCD_CAP_DRIVER_FREQ_LSCLK_DIV256 + * @arg @ref FL_LCD_CAP_DRIVER_FREQ_LSCLK_DIV512 + */ +__STATIC_INLINE uint32_t FL_LCD_GetCapDriverFreq(LCD_Type *LCDx) +{ + return (uint32_t)(READ_BIT(LCDx->CR, LCD_CR_SCFSEL_Msk)); +} + +/** + * @brief Set Capacity Driver Mode + * @rmtoll CR SC_CTRL FL_LCD_SetCapDriverMode + * @param LCDx LCD instance + * @param mode This parameter can be one of the following values: + * @arg @ref FL_LCD_CAP_DRIVER_MODE_ONE + * @arg @ref FL_LCD_CAP_DRIVER_MODE_TWO + * @arg @ref FL_LCD_CAP_DRIVER_MODE_FOUR + * @arg @ref FL_LCD_CAP_DRIVER_MODE_MANY + * @retval None + */ +__STATIC_INLINE void FL_LCD_SetCapDriverMode(LCD_Type *LCDx, uint32_t mode) +{ + MODIFY_REG(LCDx->CR, LCD_CR_SC_CTRL_Msk, mode); +} + +/** + * @brief Get Capacity Driver Mode + * @rmtoll CR SC_CTRL FL_LCD_GetCapDriverMode + * @param LCDx LCD instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_LCD_CAP_DRIVER_MODE_ONE + * @arg @ref FL_LCD_CAP_DRIVER_MODE_TWO + * @arg @ref FL_LCD_CAP_DRIVER_MODE_FOUR + * @arg @ref FL_LCD_CAP_DRIVER_MODE_MANY + */ +__STATIC_INLINE uint32_t FL_LCD_GetCapDriverMode(LCD_Type *LCDx) +{ + return (uint32_t)(READ_BIT(LCDx->CR, LCD_CR_SC_CTRL_Msk)); +} + +/** + * @brief Set Input Bias Current + * @rmtoll CR IC_CTRL FL_LCD_SetBiasCurrent + * @param LCDx LCD instance + * @param current This parameter can be one of the following values: + * @arg @ref FL_LCD_BIAS_CURRENT_VERYHIGH + * @arg @ref FL_LCD_BIAS_CURRENT_HIGH + * @arg @ref FL_LCD_BIAS_CURRENT_MEDIUM + * @arg @ref FL_LCD_BIAS_CURRENT_LOW + * @retval None + */ +__STATIC_INLINE void FL_LCD_SetBiasCurrent(LCD_Type *LCDx, uint32_t current) +{ + MODIFY_REG(LCDx->CR, LCD_CR_IC_CTRL_Msk, current); +} + +/** + * @brief Set Input Bias Current + * @rmtoll CR IC_CTRL FL_LCD_GetBiasCurrent + * @param LCDx LCD instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_LCD_BIAS_CURRENT_VERYHIGH + * @arg @ref FL_LCD_BIAS_CURRENT_HIGH + * @arg @ref FL_LCD_BIAS_CURRENT_MEDIUM + * @arg @ref FL_LCD_BIAS_CURRENT_LOW + */ +__STATIC_INLINE uint32_t FL_LCD_GetBiasCurrent(LCD_Type *LCDx) +{ + return (uint32_t)(READ_BIT(LCDx->CR, LCD_CR_IC_CTRL_Msk)); +} + +/** + * @brief Set LCD Enabling Mode + * @rmtoll CR ENMODE FL_LCD_SetDriverMode + * @param LCDx LCD instance + * @param mode This parameter can be one of the following values: + * @arg @ref FL_LCD_DRIVER_MODE_INNER_RESISTER + * @arg @ref FL_LCD_DRIVER_MODE_OUTER_CAPACITY + * @retval None + */ +__STATIC_INLINE void FL_LCD_SetDriverMode(LCD_Type *LCDx, uint32_t mode) +{ + MODIFY_REG(LCDx->CR, LCD_CR_ENMODE_Msk, mode); +} + +/** + * @brief Get LCD Enabling Mode + * @rmtoll CR ENMODE FL_LCD_GetDriverMode + * @param LCDx LCD instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_LCD_DRIVER_MODE_INNER_RESISTER + * @arg @ref FL_LCD_DRIVER_MODE_OUTER_CAPACITY + */ +__STATIC_INLINE uint32_t FL_LCD_GetDriverMode(LCD_Type *LCDx) +{ + return (uint32_t)(READ_BIT(LCDx->CR, LCD_CR_ENMODE_Msk)); +} + +/** + * @brief Enable LCD Blink + * @rmtoll CR FLICK FL_LCD_EnableDisplayBlink + * @param LCDx LCD instance + * @retval None + */ +__STATIC_INLINE void FL_LCD_EnableDisplayBlink(LCD_Type *LCDx) +{ + SET_BIT(LCDx->CR, LCD_CR_FLICK_Msk); +} + +/** + * @brief Disable LCD Blink + * @rmtoll CR FLICK FL_LCD_DisableDisplayBlink + * @param LCDx LCD instance + * @retval None + */ +__STATIC_INLINE void FL_LCD_DisableDisplayBlink(LCD_Type *LCDx) +{ + CLEAR_BIT(LCDx->CR, LCD_CR_FLICK_Msk); +} + +/** + * @brief Get LCD Blink State + * @rmtoll CR FLICK FL_LCD_IsEnabledDisplayBlink + * @param LCDx LCD instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_LCD_IsEnabledDisplayBlink(LCD_Type *LCDx) +{ + return (uint32_t)(READ_BIT(LCDx->CR, LCD_CR_FLICK_Msk) == LCD_CR_FLICK_Msk); +} + +/** + * @brief Set LCD Bias Voltage Select + * @rmtoll CR BIAS FL_LCD_SetBiasVoltage + * @param LCDx LCD instance + * @param voltage This parameter can be one of the following values: + * @arg @ref FL_LCD_BIAS_VOLTAGE_LEVEL0 + * @arg @ref FL_LCD_BIAS_VOLTAGE_LEVEL1 + * @arg @ref FL_LCD_BIAS_VOLTAGE_LEVEL2 + * @arg @ref FL_LCD_BIAS_VOLTAGE_LEVEL3 + * @arg @ref FL_LCD_BIAS_VOLTAGE_LEVEL4 + * @arg @ref FL_LCD_BIAS_VOLTAGE_LEVEL5 + * @arg @ref FL_LCD_BIAS_VOLTAGE_LEVEL6 + * @arg @ref FL_LCD_BIAS_VOLTAGE_LEVEL7 + * @arg @ref FL_LCD_BIAS_VOLTAGE_LEVEL8 + * @arg @ref FL_LCD_BIAS_VOLTAGE_LEVEL9 + * @arg @ref FL_LCD_BIAS_VOLTAGE_LEVEL10 + * @arg @ref FL_LCD_BIAS_VOLTAGE_LEVEL11 + * @arg @ref FL_LCD_BIAS_VOLTAGE_LEVEL12 + * @arg @ref FL_LCD_BIAS_VOLTAGE_LEVEL13 + * @arg @ref FL_LCD_BIAS_VOLTAGE_LEVEL14 + * @arg @ref FL_LCD_BIAS_VOLTAGE_LEVEL15 + * @retval None + */ +__STATIC_INLINE void FL_LCD_SetBiasVoltage(LCD_Type *LCDx, uint32_t voltage) +{ + MODIFY_REG(LCDx->CR, LCD_CR_BIAS_Msk, voltage); +} + +/** + * @brief Get LCD Bias Voltage Select + * @rmtoll CR BIAS FL_LCD_GetBiasVoltage + * @param LCDx LCD instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_LCD_BIAS_VOLTAGE_LEVEL0 + * @arg @ref FL_LCD_BIAS_VOLTAGE_LEVEL1 + * @arg @ref FL_LCD_BIAS_VOLTAGE_LEVEL2 + * @arg @ref FL_LCD_BIAS_VOLTAGE_LEVEL3 + * @arg @ref FL_LCD_BIAS_VOLTAGE_LEVEL4 + * @arg @ref FL_LCD_BIAS_VOLTAGE_LEVEL5 + * @arg @ref FL_LCD_BIAS_VOLTAGE_LEVEL6 + * @arg @ref FL_LCD_BIAS_VOLTAGE_LEVEL7 + * @arg @ref FL_LCD_BIAS_VOLTAGE_LEVEL8 + * @arg @ref FL_LCD_BIAS_VOLTAGE_LEVEL9 + * @arg @ref FL_LCD_BIAS_VOLTAGE_LEVEL10 + * @arg @ref FL_LCD_BIAS_VOLTAGE_LEVEL11 + * @arg @ref FL_LCD_BIAS_VOLTAGE_LEVEL12 + * @arg @ref FL_LCD_BIAS_VOLTAGE_LEVEL13 + * @arg @ref FL_LCD_BIAS_VOLTAGE_LEVEL14 + * @arg @ref FL_LCD_BIAS_VOLTAGE_LEVEL15 + */ +__STATIC_INLINE uint32_t FL_LCD_GetBiasVoltage(LCD_Type *LCDx) +{ + return (uint32_t)(READ_BIT(LCDx->CR, LCD_CR_BIAS_Msk)); +} + +/** + * @brief Set LCD Bias Mode + * @rmtoll CR BIASMD FL_LCD_SetBiasMode + * @param LCDx LCD instance + * @param mode This parameter can be one of the following values: + * @arg @ref FL_LCD_BIAS_MODE_4BIAS + * @arg @ref FL_LCD_BIAS_MODE_3BIAS + * @retval None + */ +__STATIC_INLINE void FL_LCD_SetBiasMode(LCD_Type *LCDx, uint32_t mode) +{ + MODIFY_REG(LCDx->CR, LCD_CR_BIASMD_Msk, mode); +} + +/** + * @brief Get LCD Bias Mode + * @rmtoll CR BIASMD FL_LCD_GetBiasMode + * @param LCDx LCD instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_LCD_BIAS_MODE_4BIAS + * @arg @ref FL_LCD_BIAS_MODE_3BIAS + */ +__STATIC_INLINE uint32_t FL_LCD_GetBiasMode(LCD_Type *LCDx) +{ + return (uint32_t)(READ_BIT(LCDx->CR, LCD_CR_BIASMD_Msk)); +} + +/** + * @brief Set LCD Anti-Polarization + * @rmtoll CR ANTIPOLAR FL_LCD_SetAntiPolar + * @param LCDx LCD instance + * @param state This parameter can be one of the following values: + * @arg @ref FL_LCD_ANTIPOLAR_FLOATING + * @arg @ref FL_LCD_ANTIPOLAR_GND + * @retval None + */ +__STATIC_INLINE void FL_LCD_SetAntiPolar(LCD_Type *LCDx, uint32_t state) +{ + MODIFY_REG(LCDx->CR, LCD_CR_ANTIPOLAR_Msk, state); +} + +/** + * @brief Get LCD Anti-Polarization + * @rmtoll CR ANTIPOLAR FL_LCD_GetAntiPolar + * @param LCDx LCD instance + * @retval Returned value can be one of the following values: + */ +__STATIC_INLINE uint32_t FL_LCD_GetAntiPolar(LCD_Type *LCDx) +{ + return (uint32_t)(READ_BIT(LCDx->CR, LCD_CR_ANTIPOLAR_Msk)); +} + +/** + * @brief Set LCD Waveform Format + * @rmtoll CR WFT FL_LCD_SetWaveform + * @param LCDx LCD instance + * @param state This parameter can be one of the following values: + * @arg @ref FL_LCD_WAVEFORM_TYPEA + * @arg @ref FL_LCD_WAVEFORM_TYPEB + * @retval None + */ +__STATIC_INLINE void FL_LCD_SetWaveform(LCD_Type *LCDx, uint32_t state) +{ + MODIFY_REG(LCDx->CR, LCD_CR_WFT_Msk, state); +} + +/** + * @brief Get LCD Waveform Format + * @rmtoll CR WFT FL_LCD_GetWaveform + * @param LCDx LCD instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_LCD_WAVEFORM_TYPEA + * @arg @ref FL_LCD_WAVEFORM_TYPEB + */ +__STATIC_INLINE uint32_t FL_LCD_GetWaveform(LCD_Type *LCDx) +{ + return (uint32_t)(READ_BIT(LCDx->CR, LCD_CR_WFT_Msk)); +} + +/** + * @brief Set LCD Segment Line Mux + * @rmtoll CR LMUX FL_LCD_SetCOMNumber + * @param LCDx LCD instance + * @param number This parameter can be one of the following values: + * @arg @ref FL_LCD_COM_NUM_4COM + * @arg @ref FL_LCD_COM_NUM_6COM + * @arg @ref FL_LCD_COM_NUM_8COM + * @retval None + */ +__STATIC_INLINE void FL_LCD_SetCOMNumber(LCD_Type *LCDx, uint32_t number) +{ + MODIFY_REG(LCDx->CR, LCD_CR_LMUX_Msk, number); +} + +/** + * @brief Get LCD Segment Line Mux + * @rmtoll CR LMUX FL_LCD_GetCOMNumber + * @param LCDx LCD instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_LCD_COM_NUM_4COM + * @arg @ref FL_LCD_COM_NUM_6COM + * @arg @ref FL_LCD_COM_NUM_8COM + */ +__STATIC_INLINE uint32_t FL_LCD_GetCOMNumber(LCD_Type *LCDx) +{ + return (uint32_t)(READ_BIT(LCDx->CR, LCD_CR_LMUX_Msk)); +} + +/** + * @brief Enable LCD + * @rmtoll CR EN FL_LCD_Enable + * @param LCDx LCD instance + * @retval None + */ +__STATIC_INLINE void FL_LCD_Enable(LCD_Type *LCDx) +{ + SET_BIT(LCDx->CR, LCD_CR_EN_Msk); +} + +/** + * @brief Get LCD State + * @rmtoll CR EN FL_LCD_IsEnabled + * @param LCDx LCD instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_LCD_IsEnabled(LCD_Type *LCDx) +{ + return (uint32_t)(READ_BIT(LCDx->CR, LCD_CR_EN_Msk) == LCD_CR_EN_Msk); +} + +/** + * @brief Disable LCD + * @rmtoll CR EN FL_LCD_Disable + * @param LCDx LCD instance + * @retval None + */ +__STATIC_INLINE void FL_LCD_Disable(LCD_Type *LCDx) +{ + CLEAR_BIT(LCDx->CR, LCD_CR_EN_Msk); +} + +/** + * @brief Set LCD Display Frequency + * @rmtoll FCR DF FL_LCD_WriteDisplayFrequency + * @param LCDx LCD instance + * @param frequency + * @retval None + */ +__STATIC_INLINE void FL_LCD_WriteDisplayFrequency(LCD_Type *LCDx, uint32_t frequency) +{ + MODIFY_REG(LCDx->FCR, (0xffU << 0U), (frequency << 0U)); +} + +/** + * @brief Get LCD Display Frequency + * @rmtoll FCR DF FL_LCD_ReadDisplayFrequency + * @param LCDx LCD instance + * @retval + */ +__STATIC_INLINE uint32_t FL_LCD_ReadDisplayFrequency(LCD_Type *LCDx) +{ + return (uint32_t)(READ_BIT(LCDx->FCR, (0xffU << 0U)) >> 0U); +} + +/** + * @brief Set LCD Display Off Time + * @rmtoll FLKT TOFF FL_LCD_WriteDisplayOffTime + * @param LCDx LCD instance + * @param time + * @retval None + */ +__STATIC_INLINE void FL_LCD_WriteDisplayOffTime(LCD_Type *LCDx, uint32_t time) +{ + MODIFY_REG(LCDx->FLKT, (0xffU << 8U), (time << 8U)); +} + +/** + * @brief Get LCD Display Off Time + * @rmtoll FLKT TOFF FL_LCD_ReadDisplayOffTime + * @param LCDx LCD instance + * @retval + */ +__STATIC_INLINE uint32_t FL_LCD_ReadDisplayOffTime(LCD_Type *LCDx) +{ + return (uint32_t)(READ_BIT(LCDx->FLKT, (0xffU << 8U)) >> 8U); +} + +/** + * @brief Set LCD Display On Time + * @rmtoll FLKT TON FL_LCD_WriteDisplayOnTime + * @param LCDx LCD instance + * @param time + * @retval None + */ +__STATIC_INLINE void FL_LCD_WriteDisplayOnTime(LCD_Type *LCDx, uint32_t time) +{ + MODIFY_REG(LCDx->FLKT, (0xffU << 0U), (time << 0U)); +} + +/** + * @brief Get LCD Display On Time + * @rmtoll FLKT TON FL_LCD_ReadDisplayOnTime + * @param LCDx LCD instance + * @retval + */ +__STATIC_INLINE uint32_t FL_LCD_ReadDisplayOnTime(LCD_Type *LCDx) +{ + return (uint32_t)(READ_BIT(LCDx->FLKT, (0xffU << 0U)) >> 0U); +} + +/** + * @brief Enable LCD Display OFF IRQ + * @rmtoll IER DONIE FL_LCD_EnableIT_DisplayOff + * @param LCDx LCD instance + * @retval None + */ +__STATIC_INLINE void FL_LCD_EnableIT_DisplayOff(LCD_Type *LCDx) +{ + SET_BIT(LCDx->IER, LCD_IER_DONIE_Msk); +} + +/** + * @brief Disable LCD Display OFF IRQ + * @rmtoll IER DONIE FL_LCD_DisableIT_DisplayOff + * @param LCDx LCD instance + * @retval None + */ +__STATIC_INLINE void FL_LCD_DisableIT_DisplayOff(LCD_Type *LCDx) +{ + CLEAR_BIT(LCDx->IER, LCD_IER_DONIE_Msk); +} + +/** + * @brief Getable LCD Display OFF IRQ + * @rmtoll IER DONIE FL_LCD_IsEnabledIT_DisplayOff + * @param LCDx LCD instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_LCD_IsEnabledIT_DisplayOff(LCD_Type *LCDx) +{ + return (uint32_t)(READ_BIT(LCDx->IER, LCD_IER_DONIE_Msk) == LCD_IER_DONIE_Msk); +} + +/** + * @brief Enable LCD Display ON Interrupt + * @rmtoll IER DOFFIE FL_LCD_EnableIT_DisplayOn + * @param LCDx LCD instance + * @retval None + */ +__STATIC_INLINE void FL_LCD_EnableIT_DisplayOn(LCD_Type *LCDx) +{ + SET_BIT(LCDx->IER, LCD_IER_DOFFIE_Msk); +} + +/** + * @brief Disable LCD Display ON Interrupt + * @rmtoll IER DOFFIE FL_LCD_DisableIT_DisplayOn + * @param LCDx LCD instance + * @retval None + */ +__STATIC_INLINE void FL_LCD_DisableIT_DisplayOn(LCD_Type *LCDx) +{ + CLEAR_BIT(LCDx->IER, LCD_IER_DOFFIE_Msk); +} + +/** + * @brief Getable LCD Display ON Interrupt + * @rmtoll IER DOFFIE FL_LCD_IsEnabledIT_DisplayOn + * @param LCDx LCD instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_LCD_IsEnabledIT_DisplayOn(LCD_Type *LCDx) +{ + return (uint32_t)(READ_BIT(LCDx->IER, LCD_IER_DOFFIE_Msk) == LCD_IER_DOFFIE_Msk); +} + +/** + * @brief Get LCD Display OFF Flag + * @rmtoll ISR DONIF FL_LCD_IsActiveFlag_DisplayOff + * @param LCDx LCD instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_LCD_IsActiveFlag_DisplayOff(LCD_Type *LCDx) +{ + return (uint32_t)(READ_BIT(LCDx->ISR, LCD_ISR_DONIF_Msk) == (LCD_ISR_DONIF_Msk)); +} + +/** + * @brief Clear LCD Display OFF Flag + * @rmtoll ISR DONIF FL_LCD_ClearFlag_DisplayOff + * @param LCDx LCD instance + * @retval None + */ +__STATIC_INLINE void FL_LCD_ClearFlag_DisplayOff(LCD_Type *LCDx) +{ + WRITE_REG(LCDx->ISR, LCD_ISR_DONIF_Msk); +} + +/** + * @brief Get LCD Display On Flag + * @rmtoll ISR DOFFIF FL_LCD_IsActiveFlag_DisplayOn + * @param LCDx LCD instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_LCD_IsActiveFlag_DisplayOn(LCD_Type *LCDx) +{ + return (uint32_t)(READ_BIT(LCDx->ISR, LCD_ISR_DOFFIF_Msk) == (LCD_ISR_DOFFIF_Msk)); +} + +/** + * @brief Clear LCD Display On Flag + * @rmtoll ISR DOFFIF FL_LCD_ClearFlag_DisplayOn + * @param LCDx LCD instance + * @retval None + */ +__STATIC_INLINE void FL_LCD_ClearFlag_DisplayOn(LCD_Type *LCDx) +{ + WRITE_REG(LCDx->ISR, LCD_ISR_DOFFIF_Msk); +} + +/** + * @brief Write LCD Display Data + * @rmtoll DATA0 DSDA FL_LCD_WriteData + * @param LCDx LCD instance + * @param reg This parameter can be one of the following values: + * @arg @ref FL_LCD_DATA_REG0 + * @arg @ref FL_LCD_DATA_REG1 + * @arg @ref FL_LCD_DATA_REG2 + * @arg @ref FL_LCD_DATA_REG3 + * @arg @ref FL_LCD_DATA_REG4 + * @arg @ref FL_LCD_DATA_REG5 + * @arg @ref FL_LCD_DATA_REG6 + * @arg @ref FL_LCD_DATA_REG7 + * @arg @ref FL_LCD_DATA_REG8 + * @arg @ref FL_LCD_DATA_REG9 + * @param data + * @retval None + */ +__STATIC_INLINE void FL_LCD_WriteData(LCD_Type *LCDx, uint32_t reg, uint32_t data) +{ + volatile uint32_t *pData = &(LCDx->DATA0); + MODIFY_REG(pData[reg], LCD_DATA0_DSDA_Msk, data); +} + +/** + * @brief Read LCD Display Data + * @rmtoll DATA0 DSDA FL_LCD_ReadData + * @param LCDx LCD instance + * @param reg This parameter can be one of the following values: + * @arg @ref FL_LCD_DATA_REG0 + * @arg @ref FL_LCD_DATA_REG1 + * @arg @ref FL_LCD_DATA_REG2 + * @arg @ref FL_LCD_DATA_REG3 + * @arg @ref FL_LCD_DATA_REG4 + * @arg @ref FL_LCD_DATA_REG5 + * @arg @ref FL_LCD_DATA_REG6 + * @arg @ref FL_LCD_DATA_REG7 + * @arg @ref FL_LCD_DATA_REG8 + * @arg @ref FL_LCD_DATA_REG9 + * @retval + */ +__STATIC_INLINE uint32_t FL_LCD_ReadData(LCD_Type *LCDx, uint32_t reg) +{ + volatile uint32_t *pData = &(LCDx->DATA0); + return (uint32_t)(READ_BIT(pData[reg], LCD_DATA0_DSDA_Msk)); +} + +/** + * @brief Get LCD COMx State + * @rmtoll COMEN FL_LCD_IsEnabledCOMEN + * @param LCDx LCD instance + * @param COM This parameter can be one of the following values: + * @arg @ref FL_LCD_COMEN_COM0 + * @arg @ref FL_LCD_COMEN_COM1 + * @arg @ref FL_LCD_COMEN_COM2 + * @arg @ref FL_LCD_COMEN_COM3 + * @arg @ref FL_LCD_COMEN_COM4 + * @arg @ref FL_LCD_COMEN_COM5 + * @arg @ref FL_LCD_COMEN_COM6 + * @arg @ref FL_LCD_COMEN_COM7 + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_LCD_IsEnabledCOMEN(LCD_Type *LCDx, uint32_t COM) +{ + if(COM < FL_LCD_COMEN_COM4) + { + return (uint32_t)(READ_BIT(LCDx->COMEN, ((COM & 0xffffffff) << 0x0U)) == ((COM & 0xffffffff) << 0x0U)); + } + else + { + return (uint32_t)(READ_BIT(LCDx->SEGEN0, ((COM & 0xffffffff) << 0x0U)) == ((COM & 0xffffffff) << 0x0U)); + } +} + +/** + * @brief Enable LCD COMx + * @rmtoll COMEN FL_LCD_EnableCOMEN + * @param LCDx LCD instance + * @param COM This parameter can be one of the following values: + * @arg @ref FL_LCD_COMEN_COM0 + * @arg @ref FL_LCD_COMEN_COM1 + * @arg @ref FL_LCD_COMEN_COM2 + * @arg @ref FL_LCD_COMEN_COM3 + * @arg @ref FL_LCD_COMEN_COM4 + * @arg @ref FL_LCD_COMEN_COM5 + * @arg @ref FL_LCD_COMEN_COM6 + * @arg @ref FL_LCD_COMEN_COM7 + * @retval None + */ +__STATIC_INLINE void FL_LCD_EnableCOMEN(LCD_Type *LCDx, uint32_t COM) +{ + if(COM < FL_LCD_COMEN_COM4) + { + SET_BIT(LCDx->COMEN, ((COM & 0xffffffff) << 0x0U)); + } + else + { + SET_BIT(LCDx->SEGEN0, ((COM & 0xffffffff) << 0x0U)); + } +} + +/** + * @brief Disable LCD COMx + * @rmtoll COMEN FL_LCD_DisableCOMEN + * @param LCDx LCD instance + * @param COM This parameter can be one of the following values: + * @arg @ref FL_LCD_COMEN_COM0 + * @arg @ref FL_LCD_COMEN_COM1 + * @arg @ref FL_LCD_COMEN_COM2 + * @arg @ref FL_LCD_COMEN_COM3 + * @arg @ref FL_LCD_COMEN_COM4 + * @arg @ref FL_LCD_COMEN_COM5 + * @arg @ref FL_LCD_COMEN_COM6 + * @arg @ref FL_LCD_COMEN_COM7 + * @retval None + */ +__STATIC_INLINE void FL_LCD_DisableCOMEN(LCD_Type *LCDx, uint32_t COM) +{ + if(COM < FL_LCD_COMEN_COM4) + { + CLEAR_BIT(LCDx->COMEN, ((COM & 0xffffffff) << 0x0U)); + } + else + { + CLEAR_BIT(LCDx->SEGEN0, ((COM & 0xffffffff) << 0x0U)); + } +} + +/** + * @brief Get LCD SEGx State + * @rmtoll SEGEN0 FL_LCD_IsEnabledSEGEN0 + * @param LCDx LCD instance + * @param SEG This parameter can be one of the following values: + * @arg @ref FL_LCD_SEGEN0_SEG0 + * @arg @ref FL_LCD_SEGEN0_SEG1 + * @arg @ref FL_LCD_SEGEN0_SEG2 + * @arg @ref FL_LCD_SEGEN0_SEG3 + * @arg @ref FL_LCD_SEGEN0_SEG4 + * @arg @ref FL_LCD_SEGEN0_SEG5 + * @arg @ref FL_LCD_SEGEN0_SEG6 + * @arg @ref FL_LCD_SEGEN0_SEG7 + * @arg @ref FL_LCD_SEGEN0_SEG8 + * @arg @ref FL_LCD_SEGEN0_SEG9 + * @arg @ref FL_LCD_SEGEN0_SEG10 + * @arg @ref FL_LCD_SEGEN0_SEG11 + * @arg @ref FL_LCD_SEGEN0_SEG12 + * @arg @ref FL_LCD_SEGEN0_SEG13 + * @arg @ref FL_LCD_SEGEN0_SEG14 + * @arg @ref FL_LCD_SEGEN0_SEG15 + * @arg @ref FL_LCD_SEGEN0_SEG16 + * @arg @ref FL_LCD_SEGEN0_SEG17 + * @arg @ref FL_LCD_SEGEN0_SEG18 + * @arg @ref FL_LCD_SEGEN0_SEG19 + * @arg @ref FL_LCD_SEGEN0_SEG20 + * @arg @ref FL_LCD_SEGEN0_SEG21 + * @arg @ref FL_LCD_SEGEN0_SEG22 + * @arg @ref FL_LCD_SEGEN0_SEG23 + * @arg @ref FL_LCD_SEGEN0_SEG24 + * @arg @ref FL_LCD_SEGEN0_SEG25 + * @arg @ref FL_LCD_SEGEN0_SEG26 + * @arg @ref FL_LCD_SEGEN0_SEG27 + * @arg @ref FL_LCD_SEGEN0_SEG28 + * @arg @ref FL_LCD_SEGEN0_SEG29 + * @arg @ref FL_LCD_SEGEN0_SEG30 + * @arg @ref FL_LCD_SEGEN0_SEG31 + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_LCD_IsEnabledSEGEN0(LCD_Type *LCDx, uint32_t SEG) +{ + return (uint32_t)(READ_BIT(LCDx->SEGEN0, ((SEG & 0xffffffff) << 0x0U)) == ((SEG & 0xffffffff) << 0x0U)); +} + +/** + * @brief Enable LCD SEGx + * @rmtoll SEGEN0 FL_LCD_EnableSEGEN0 + * @param LCDx LCD instance + * @param SEG This parameter can be one of the following values: + * @arg @ref FL_LCD_SEGEN0_SEG0 + * @arg @ref FL_LCD_SEGEN0_SEG1 + * @arg @ref FL_LCD_SEGEN0_SEG2 + * @arg @ref FL_LCD_SEGEN0_SEG3 + * @arg @ref FL_LCD_SEGEN0_SEG4 + * @arg @ref FL_LCD_SEGEN0_SEG5 + * @arg @ref FL_LCD_SEGEN0_SEG6 + * @arg @ref FL_LCD_SEGEN0_SEG7 + * @arg @ref FL_LCD_SEGEN0_SEG8 + * @arg @ref FL_LCD_SEGEN0_SEG9 + * @arg @ref FL_LCD_SEGEN0_SEG10 + * @arg @ref FL_LCD_SEGEN0_SEG11 + * @arg @ref FL_LCD_SEGEN0_SEG12 + * @arg @ref FL_LCD_SEGEN0_SEG13 + * @arg @ref FL_LCD_SEGEN0_SEG14 + * @arg @ref FL_LCD_SEGEN0_SEG15 + * @arg @ref FL_LCD_SEGEN0_SEG16 + * @arg @ref FL_LCD_SEGEN0_SEG17 + * @arg @ref FL_LCD_SEGEN0_SEG18 + * @arg @ref FL_LCD_SEGEN0_SEG19 + * @arg @ref FL_LCD_SEGEN0_SEG20 + * @arg @ref FL_LCD_SEGEN0_SEG21 + * @arg @ref FL_LCD_SEGEN0_SEG22 + * @arg @ref FL_LCD_SEGEN0_SEG23 + * @arg @ref FL_LCD_SEGEN0_SEG24 + * @arg @ref FL_LCD_SEGEN0_SEG25 + * @arg @ref FL_LCD_SEGEN0_SEG26 + * @arg @ref FL_LCD_SEGEN0_SEG27 + * @arg @ref FL_LCD_SEGEN0_SEG28 + * @arg @ref FL_LCD_SEGEN0_SEG29 + * @arg @ref FL_LCD_SEGEN0_SEG30 + * @arg @ref FL_LCD_SEGEN0_SEG31 + * @retval None + */ +__STATIC_INLINE void FL_LCD_EnableSEGEN0(LCD_Type *LCDx, uint32_t SEG) +{ + SET_BIT(LCDx->SEGEN0, ((SEG & 0xffffffff) << 0x0U)); +} + +/** + * @brief Disable LCD SEGx + * @rmtoll SEGEN0 FL_LCD_DisableSEGEN0 + * @param LCDx LCD instance + * @param SEG This parameter can be one of the following values: + * @arg @ref FL_LCD_SEGEN0_SEG0 + * @arg @ref FL_LCD_SEGEN0_SEG1 + * @arg @ref FL_LCD_SEGEN0_SEG2 + * @arg @ref FL_LCD_SEGEN0_SEG3 + * @arg @ref FL_LCD_SEGEN0_SEG4 + * @arg @ref FL_LCD_SEGEN0_SEG5 + * @arg @ref FL_LCD_SEGEN0_SEG6 + * @arg @ref FL_LCD_SEGEN0_SEG7 + * @arg @ref FL_LCD_SEGEN0_SEG8 + * @arg @ref FL_LCD_SEGEN0_SEG9 + * @arg @ref FL_LCD_SEGEN0_SEG10 + * @arg @ref FL_LCD_SEGEN0_SEG11 + * @arg @ref FL_LCD_SEGEN0_SEG12 + * @arg @ref FL_LCD_SEGEN0_SEG13 + * @arg @ref FL_LCD_SEGEN0_SEG14 + * @arg @ref FL_LCD_SEGEN0_SEG15 + * @arg @ref FL_LCD_SEGEN0_SEG16 + * @arg @ref FL_LCD_SEGEN0_SEG17 + * @arg @ref FL_LCD_SEGEN0_SEG18 + * @arg @ref FL_LCD_SEGEN0_SEG19 + * @arg @ref FL_LCD_SEGEN0_SEG20 + * @arg @ref FL_LCD_SEGEN0_SEG21 + * @arg @ref FL_LCD_SEGEN0_SEG22 + * @arg @ref FL_LCD_SEGEN0_SEG23 + * @arg @ref FL_LCD_SEGEN0_SEG24 + * @arg @ref FL_LCD_SEGEN0_SEG25 + * @arg @ref FL_LCD_SEGEN0_SEG26 + * @arg @ref FL_LCD_SEGEN0_SEG27 + * @arg @ref FL_LCD_SEGEN0_SEG28 + * @arg @ref FL_LCD_SEGEN0_SEG29 + * @arg @ref FL_LCD_SEGEN0_SEG30 + * @arg @ref FL_LCD_SEGEN0_SEG31 + * @retval None + */ +__STATIC_INLINE void FL_LCD_DisableSEGEN0(LCD_Type *LCDx, uint32_t SEG) +{ + CLEAR_BIT(LCDx->SEGEN0, ((SEG & 0xffffffff) << 0x0U)); +} + +/** + * @brief Get LCD SEGx State + * @rmtoll SEGEN1 FL_LCD_IsEnabledSEGEN1 + * @param LCDx LCD instance + * @param SEG This parameter can be one of the following values: + * @arg @ref FL_LCD_SEGEN1_SEG0 + * @arg @ref FL_LCD_SEGEN1_SEG1 + * @arg @ref FL_LCD_SEGEN1_SEG2 + * @arg @ref FL_LCD_SEGEN1_SEG3 + * @arg @ref FL_LCD_SEGEN1_SEG4 + * @arg @ref FL_LCD_SEGEN1_SEG5 + * @arg @ref FL_LCD_SEGEN1_SEG6 + * @arg @ref FL_LCD_SEGEN1_SEG7 + * @arg @ref FL_LCD_SEGEN1_SEG8 + * @arg @ref FL_LCD_SEGEN1_SEG9 + * @arg @ref FL_LCD_SEGEN1_SEG10 + * @arg @ref FL_LCD_SEGEN1_SEG11 + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_LCD_IsEnabledSEGEN1(LCD_Type *LCDx, uint32_t SEG) +{ + return (uint32_t)(READ_BIT(LCDx->SEGEN1, ((SEG & 0xffffffff) << 0x0U)) == ((SEG & 0xffffffff) << 0x0U)); +} + +/** + * @brief Enable LCD SEGx + * @rmtoll SEGEN1 FL_LCD_EnableSEGEN1 + * @param LCDx LCD instance + * @param SEG This parameter can be one of the following values: + * @arg @ref FL_LCD_SEGEN1_SEG0 + * @arg @ref FL_LCD_SEGEN1_SEG1 + * @arg @ref FL_LCD_SEGEN1_SEG2 + * @arg @ref FL_LCD_SEGEN1_SEG3 + * @arg @ref FL_LCD_SEGEN1_SEG4 + * @arg @ref FL_LCD_SEGEN1_SEG5 + * @arg @ref FL_LCD_SEGEN1_SEG6 + * @arg @ref FL_LCD_SEGEN1_SEG7 + * @arg @ref FL_LCD_SEGEN1_SEG8 + * @arg @ref FL_LCD_SEGEN1_SEG9 + * @arg @ref FL_LCD_SEGEN1_SEG10 + * @arg @ref FL_LCD_SEGEN1_SEG11 + * @retval None + */ +__STATIC_INLINE void FL_LCD_EnableSEGEN1(LCD_Type *LCDx, uint32_t SEG) +{ + SET_BIT(LCDx->SEGEN1, ((SEG & 0xffffffff) << 0x0U)); +} + +/** + * @brief Disable LCD SEGx + * @rmtoll SEGEN1 FL_LCD_DisableSEGEN1 + * @param LCDx LCD instance + * @param SEG This parameter can be one of the following values: + * @arg @ref FL_LCD_SEGEN1_SEG0 + * @arg @ref FL_LCD_SEGEN1_SEG1 + * @arg @ref FL_LCD_SEGEN1_SEG2 + * @arg @ref FL_LCD_SEGEN1_SEG3 + * @arg @ref FL_LCD_SEGEN1_SEG4 + * @arg @ref FL_LCD_SEGEN1_SEG5 + * @arg @ref FL_LCD_SEGEN1_SEG6 + * @arg @ref FL_LCD_SEGEN1_SEG7 + * @arg @ref FL_LCD_SEGEN1_SEG8 + * @arg @ref FL_LCD_SEGEN1_SEG9 + * @arg @ref FL_LCD_SEGEN1_SEG10 + * @arg @ref FL_LCD_SEGEN1_SEG11 + * @retval None + */ +__STATIC_INLINE void FL_LCD_DisableSEGEN1(LCD_Type *LCDx, uint32_t SEG) +{ + CLEAR_BIT(LCDx->SEGEN1, ((SEG & 0xffffffff) << 0x0U)); +} + +/** + * @} + */ + +/** @defgroup LCD_FL_EF_Init Initialization and de-initialization functions + * @{ + */ +FL_ErrorStatus FL_LCD_DeInit(LCD_Type *LCDx); +void FL_LCD_StructInit(FL_LCD_InitTypeDef *initStruct); +FL_ErrorStatus FL_LCD_Init(LCD_Type *LCDx, FL_LCD_InitTypeDef *initStruct); + +void FL_LCD_4COMDisplay(uint32_t *display, uint8_t com, uint8_t seg, uint8_t state); +void FL_LCD_6COMDisplay(uint32_t *display, uint8_t com, uint8_t seg, uint8_t state); +void FL_LCD_8COMDisplay(uint32_t *display, uint8_t com, uint8_t seg, uint8_t state); + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif /* __FM33LG0XX_FL_LCD_H*/ + +/*************************Py_Code_Generator Version: 0.1-0.14-0.1 @ 2021-04-25*************************/ +/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/ diff --git a/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_lptim16.h b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_lptim16.h new file mode 100644 index 0000000..b365a22 --- /dev/null +++ b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_lptim16.h @@ -0,0 +1,1344 @@ + /** + ******************************************************************************************************* + * @file fm33lg0xx_fl_lptim16.h + * @author FMSH Application Team + * @brief Head file of LPTIM16 FL Module + ******************************************************************************************************* + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + + + +/* Define to prevent recursive inclusion---------------------------------------------------------------*/ +#ifndef __FM33LG0XX_FL_LPTIM16_H +#define __FM33LG0XX_FL_LPTIM16_H + +#ifdef __cplusplus +extern "C" { +#endif +/* Includes -------------------------------------------------------------------------------------------*/ +#include "fm33lg0xx_fl_def.h" +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @defgroup LPTIM16 LPTIM16 + * @brief LPTIM16 FL driver + * @{ + */ + +/* Exported types -------------------------------------------------------------------------------------*/ +/** @defgroup LPTIM16_FL_ES_INIT LPTIM16 Exported Init structures + * @{ + */ + +/** + * @brief FL LPTIM16 Init Sturcture definition + */ + +/** + * @brief LPTIM16 Init Sturcture Definition + */ +typedef struct +{ + /* 内部时钟源 */ + uint32_t clockSource; + + /* 预分频器的时钟源 可选择内部时钟, 也可选择外部时钟 */ + uint32_t prescalerClockSource; + + /* 预分频系数 */ + uint32_t prescaler; + + /* 重装值 */ + uint32_t autoReload; + + /* 定时器工作模式选择 */ + uint32_t mode; + + /* 定时器编码器模式 */ + uint32_t encoderMode; + + /* 单次计数使能 */ + uint32_t onePulseMode; + + /* ETR异步计数边沿 */ + uint32_t countEdge; + + /* ETR触发计数边沿 */ + uint32_t triggerEdge; + +} FL_LPTIM16_InitTypeDef; + +/** + * @brief LPTIM16 Output Compare Configuration Structure Definition + */ +typedef struct +{ + uint32_t compareValue; + + uint32_t OCPolarity; + +} FL_LPTIM16_OC_InitTypeDef; + +/** + * @brief LPTIM16 Input Capture Configuration Structure Definition + */ +typedef struct +{ + uint32_t channel1Prescaler; + + uint32_t channel1CaptureSource; + + uint32_t ICInputDigitalFilter; + + uint32_t ICInputPolarity; + + uint32_t ICEdge; + +} FL_LPTIM16_IC_InitTypeDef; +/** + * @} + */ +/* Exported constants ---------------------------------------------------------------------------------*/ +/** @defgroup LPTIM16_FL_Exported_Constants LPTIM16 Exported Constants + * @{ + */ + +#define LPTIM16_CR_EN_Pos (0U) +#define LPTIM16_CR_EN_Msk (0x1U << LPTIM16_CR_EN_Pos) +#define LPTIM16_CR_EN LPTIM16_CR_EN_Msk + +#define LPTIM16_CFGR_ETR_AFEN_Pos (24U) +#define LPTIM16_CFGR_ETR_AFEN_Msk (0x1U << LPTIM16_CFGR_ETR_AFEN_Pos) +#define LPTIM16_CFGR_ETR_AFEN LPTIM16_CFGR_ETR_AFEN_Msk + +#define LPTIM16_CFGR_PSCSEL_Pos (14U) +#define LPTIM16_CFGR_PSCSEL_Msk (0x1U << LPTIM16_CFGR_PSCSEL_Pos) +#define LPTIM16_CFGR_PSCSEL LPTIM16_CFGR_PSCSEL_Msk + +#define LPTIM16_CFGR_DIVSEL_Pos (10U) +#define LPTIM16_CFGR_DIVSEL_Msk (0x7U << LPTIM16_CFGR_DIVSEL_Pos) +#define LPTIM16_CFGR_DIVSEL LPTIM16_CFGR_DIVSEL_Msk + +#define LPTIM16_CFGR_EDGESEL_Pos (7U) +#define LPTIM16_CFGR_EDGESEL_Msk (0x1U << LPTIM16_CFGR_EDGESEL_Pos) +#define LPTIM16_CFGR_EDGESEL LPTIM16_CFGR_EDGESEL_Msk + +#define LPTIM16_CFGR_TRIGCFG_Pos (5U) +#define LPTIM16_CFGR_TRIGCFG_Msk (0x3U << LPTIM16_CFGR_TRIGCFG_Pos) +#define LPTIM16_CFGR_TRIGCFG LPTIM16_CFGR_TRIGCFG_Msk + +#define LPTIM16_CFGR_QEMD_Pos (3U) +#define LPTIM16_CFGR_QEMD_Msk (0x3U << LPTIM16_CFGR_QEMD_Pos) +#define LPTIM16_CFGR_QEMD LPTIM16_CFGR_QEMD_Msk + +#define LPTIM16_CFGR_MMS_Pos (16U) +#define LPTIM16_CFGR_MMS_Msk (0x7U << LPTIM16_CFGR_MMS_Pos) +#define LPTIM16_CFGR_MMS LPTIM16_CFGR_MMS_Msk + +#define LPTIM16_CFGR_ONST_Pos (2U) +#define LPTIM16_CFGR_ONST_Msk (0x1U << LPTIM16_CFGR_ONST_Pos) +#define LPTIM16_CFGR_ONST LPTIM16_CFGR_ONST_Msk + +#define LPTIM16_CFGR_TMODE_Pos (0U) +#define LPTIM16_CFGR_TMODE_Msk (0x3U << LPTIM16_CFGR_TMODE_Pos) +#define LPTIM16_CFGR_TMODE LPTIM16_CFGR_TMODE_Msk + +#define LPTIM16_IER_CCIE_Pos (0U) +#define LPTIM16_IER_CCIE_Msk (0x3U << LPTIM16_IER_CCIE_Pos) +#define LPTIM16_IER_CCIE LPTIM16_IER_CCIE_Msk + +#define LPTIM16_IER_OVIE_Pos (6U) +#define LPTIM16_IER_OVIE_Msk (0x1U << LPTIM16_IER_OVIE_Pos) +#define LPTIM16_IER_OVIE LPTIM16_IER_OVIE_Msk + +#define LPTIM16_IER_TRIGIE_Pos (7U) +#define LPTIM16_IER_TRIGIE_Msk (0x1U << LPTIM16_IER_TRIGIE_Pos) +#define LPTIM16_IER_TRIGIE LPTIM16_IER_TRIGIE_Msk + +#define LPTIM16_IER_OVRIE_Pos (8U) +#define LPTIM16_IER_OVRIE_Msk (0x3U << LPTIM16_IER_OVRIE_Pos) +#define LPTIM16_IER_OVRIE LPTIM16_IER_OVRIE_Msk + +#define LPTIM16_ISR_CCIF_Pos (0U) +#define LPTIM16_ISR_CCIF_Msk (0x3U << LPTIM16_ISR_CCIF_Pos) +#define LPTIM16_ISR_CCIF LPTIM16_ISR_CCIF_Msk + +#define LPTIM16_ISR_OVIF_Pos (6U) +#define LPTIM16_ISR_OVIF_Msk (0x1U << LPTIM16_ISR_OVIF_Pos) +#define LPTIM16_ISR_OVIF LPTIM16_ISR_OVIF_Msk + +#define LPTIM16_ISR_TRIGIF_Pos (7U) +#define LPTIM16_ISR_TRIGIF_Msk (0x1U << LPTIM16_ISR_TRIGIF_Pos) +#define LPTIM16_ISR_TRIGIF LPTIM16_ISR_TRIGIF_Msk + +#define LPTIM16_ISR_OVRIF_Pos (8U) +#define LPTIM16_ISR_OVRIF_Msk (0x3U << LPTIM16_ISR_OVRIF_Pos) +#define LPTIM16_ISR_OVRIF LPTIM16_ISR_OVRIF_Msk + +#define LPTIM16_CCSR_CAPCFG_Pos (8U) +#define LPTIM16_CCSR_CAPCFG_Msk (0x3U << LPTIM16_CCSR_CAPCFG_Pos) +#define LPTIM16_CCSR_CAPCFG LPTIM16_CCSR_CAPCFG_Msk + +#define LPTIM16_CCSR_CCP_Pos (16U) +#define LPTIM16_CCSR_CCP_Msk (0x1U << LPTIM16_CCSR_CCP_Pos) +#define LPTIM16_CCSR_CCP LPTIM16_CCSR_CCP_Msk + +#define LPTIM16_CCSR_CAP1PSC_Pos (26U) +#define LPTIM16_CCSR_CAP1PSC_Msk (0x3fU << LPTIM16_CCSR_CAP1PSC_Pos) +#define LPTIM16_CCSR_CAP1PSC LPTIM16_CCSR_CAP1PSC_Msk + +#define LPTIM16_CCSR_CCS_Pos (0U) +#define LPTIM16_CCSR_CCS_Msk (0x3U << LPTIM16_CCSR_CCS_Pos) +#define LPTIM16_CCSR_CCS LPTIM16_CCSR_CCS_Msk + +#define LPTIM16_CCSR_CAPEDGE_Pos (20U) +#define LPTIM16_CCSR_CAPEDGE_Msk (0x1U << LPTIM16_CCSR_CAPEDGE_Pos) +#define LPTIM16_CCSR_CAPEDGE LPTIM16_CCSR_CAPEDGE_Msk + +#define LPTIM16_CCSR_CAP1SSEL_Pos (24U) +#define LPTIM16_CCSR_CAP1SSEL_Msk (0x3U << LPTIM16_CCSR_CAP1SSEL_Pos) +#define LPTIM16_CCSR_CAP1SSEL LPTIM16_CCSR_CAP1SSEL_Msk + + + +#define FL_LPTIM16_CHANNEL_1 (0x1U << 0U) +#define FL_LPTIM16_CHANNEL_2 (0x1U << 1U) + + + +#define FL_LPTIM16_CLK_SOURCE_INTERNAL (0x0U << LPTIM16_CFGR_PSCSEL_Pos) +#define FL_LPTIM16_CLK_SOURCE_EXTERNAL (0x1U << LPTIM16_CFGR_PSCSEL_Pos) + + +#define FL_LPTIM16_PSC_DIV1 (0x0U << LPTIM16_CFGR_DIVSEL_Pos) +#define FL_LPTIM16_PSC_DIV2 (0x1U << LPTIM16_CFGR_DIVSEL_Pos) +#define FL_LPTIM16_PSC_DIV4 (0x2U << LPTIM16_CFGR_DIVSEL_Pos) +#define FL_LPTIM16_PSC_DIV8 (0x3U << LPTIM16_CFGR_DIVSEL_Pos) +#define FL_LPTIM16_PSC_DIV16 (0x4U << LPTIM16_CFGR_DIVSEL_Pos) +#define FL_LPTIM16_PSC_DIV32 (0x5U << LPTIM16_CFGR_DIVSEL_Pos) +#define FL_LPTIM16_PSC_DIV64 (0x6U << LPTIM16_CFGR_DIVSEL_Pos) +#define FL_LPTIM16_PSC_DIV128 (0x7U << LPTIM16_CFGR_DIVSEL_Pos) + + +#define FL_LPTIM16_ETR_COUNT_EDGE_RISING (0x0U << LPTIM16_CFGR_EDGESEL_Pos) +#define FL_LPTIM16_ETR_COUNT_EDGE_FALLING (0x1U << LPTIM16_CFGR_EDGESEL_Pos) + + +#define FL_LPTIM16_ETR_TRIGGER_EDGE_RISING (0x0U << LPTIM16_CFGR_TRIGCFG_Pos) +#define FL_LPTIM16_ETR_TRIGGER_EDGE_FALLING (0x1U << LPTIM16_CFGR_TRIGCFG_Pos) +#define FL_LPTIM16_ETR_TRIGGER_EDGE_BOTH (0x2U << LPTIM16_CFGR_TRIGCFG_Pos) + + +#define FL_LPTIM16_ENCODER_MODE_DISABLE (0x0U << LPTIM16_CFGR_QEMD_Pos) +#define FL_LPTIM16_ENCODER_MODE_TI1FP1_TI2FP2_CNT (0x1U << LPTIM16_CFGR_QEMD_Pos) +#define FL_LPTIM16_ENCODER_MODE_TI2FP2_TI1FP1_CNT (0x2U << LPTIM16_CFGR_QEMD_Pos) +#define FL_LPTIM16_ENCODER_MODE_TI2FP2_CNT_TI1FP1_CNT (0x3U << LPTIM16_CFGR_QEMD_Pos) + + +#define FL_LPTIM16_TRGO_ENABLE (0x1U << LPTIM16_CFGR_MMS_Pos) +#define FL_LPTIM16_TRGO_UPDATE (0x2U << LPTIM16_CFGR_MMS_Pos) +#define FL_LPTIM16_TRGO_OC1REF (0x3U << LPTIM16_CFGR_MMS_Pos) +#define FL_LPTIM16_TRGO_IC1 (0x4U << LPTIM16_CFGR_MMS_Pos) +#define FL_LPTIM16_TRGO_IC2 (0x5U << LPTIM16_CFGR_MMS_Pos) + + +#define FL_LPTIM16_ONE_PULSE_MODE_CONTINUOUS (0x0U << LPTIM16_CFGR_ONST_Pos) +#define FL_LPTIM16_ONE_PULSE_MODE_SINGLE (0x1U << LPTIM16_CFGR_ONST_Pos) + + +#define FL_LPTIM16_OPERATION_MODE_NORMAL (0x0U << LPTIM16_CFGR_TMODE_Pos) +#define FL_LPTIM16_OPERATION_MODE_EXTERNAL_TRIGGER_CNT (0x1U << LPTIM16_CFGR_TMODE_Pos) +#define FL_LPTIM16_OPERATION_MODE_EXTERNAL_ASYNC_PULSE_CNT (0x2U << LPTIM16_CFGR_TMODE_Pos) +#define FL_LPTIM16_OPERATION_MODE_TIMEOUT (0x3U << LPTIM16_CFGR_TMODE_Pos) + + +#define FL_LPTIM16_IC_EDGE_RISING (0x0U << LPTIM16_CCSR_CAPCFG_Pos) +#define FL_LPTIM16_IC_EDGE_FALLING (0x1U << LPTIM16_CCSR_CAPCFG_Pos) +#define FL_LPTIM16_IC_EDGE_BOTH (0x2U << LPTIM16_CCSR_CAPCFG_Pos) + + +#define FL_LPTIM16_OC_POLARITY_NORMAL (0x0U << LPTIM16_CCSR_CCP_Pos) +#define FL_LPTIM16_OC_POLARITY_INVERT (0x1U << LPTIM16_CCSR_CCP_Pos) + + +#define FL_LPTIM16_IC_POLARITY_NORMAL (0x0U << LPTIM16_CCSR_CCP_Pos) +#define FL_LPTIM16_IC_POLARITY_INVERT (0x1U << LPTIM16_CCSR_CCP_Pos) + + +#define FL_LPTIM16_CHANNEL_MODE_DISABLE (0x0U << LPTIM16_CCSR_CCS_Pos) +#define FL_LPTIM16_CHANNEL_MODE_INPUT (0x1U << LPTIM16_CCSR_CCS_Pos) +#define FL_LPTIM16_CHANNEL_MODE_OUTPUT (0x2U << LPTIM16_CCSR_CCS_Pos) + + +#define FL_LPTIM16_IC_CAPCTURED_EDGE_RISING (0x0U << LPTIM16_CCSR_CAPEDGE_Pos) +#define FL_LPTIM16_IC_CAPCTURED_EDGE_FALLING (0x1U << LPTIM16_CCSR_CAPEDGE_Pos) + +#define FL_LPTIM16_IC1_CAPTURE_SOURCE_GROUP0 (0x0U << LPTIM16_CCSR_CAP1SSEL_Pos) +#define FL_LPTIM16_IC1_CAPTURE_SOURCE_GROUP1 (0x1U << LPTIM16_CCSR_CAP1SSEL_Pos) +#define FL_LPTIM16_IC1_CAPTURE_SOURCE_GROUP2 (0x2U << LPTIM16_CCSR_CAP1SSEL_Pos) +#define FL_LPTIM16_IC1_CAPTURE_SOURCE_GROUP3 (0x3U << LPTIM16_CCSR_CAP1SSEL_Pos) + + +/** + * @} + */ +/* Exported functions ---------------------------------------------------------------------------------*/ +/** @defgroup LPTIM16_FL_Exported_Functions LPTIM16 Exported Functions + * @{ + */ + +/** + * @brief Enable LPTIM16 + * @rmtoll CR EN FL_LPTIM16_Enable + * @param LPTIM16x LPTIM16 instance + * @retval None + */ +__STATIC_INLINE void FL_LPTIM16_Enable(LPTIM16_Type *LPTIM16x) +{ + SET_BIT(LPTIM16x->CR, LPTIM16_CR_EN_Msk); +} + +/** + * @brief Disable LPTIM16 + * @rmtoll CR EN FL_LPTIM16_Disable + * @param LPTIM16x LPTIM16 instance + * @retval None + */ +__STATIC_INLINE void FL_LPTIM16_Disable(LPTIM16_Type *LPTIM16x) +{ + CLEAR_BIT(LPTIM16x->CR, LPTIM16_CR_EN_Msk); +} + +/** + * @brief Get LPTIM16 Enable Status + * @rmtoll CR EN FL_LPTIM16_IsEnabled + * @param LPTIM16x LPTIM16 instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_LPTIM16_IsEnabled(LPTIM16_Type *LPTIM16x) +{ + return (uint32_t)(READ_BIT(LPTIM16x->CR, LPTIM16_CR_EN_Msk) == LPTIM16_CR_EN_Msk); +} + +/** + * @brief Enable External Input Analog Filter + * @rmtoll CFGR ETR_AFEN FL_LPTIM16_EnableETRFilter + * @param LPTIM16x LPTIM16 instance + * @retval None + */ +__STATIC_INLINE void FL_LPTIM16_EnableETRFilter(LPTIM16_Type *LPTIM16x) +{ + SET_BIT(LPTIM16x->CFGR, LPTIM16_CFGR_ETR_AFEN_Msk); +} + +/** + * @brief Disable External Input Analog Filter + * @rmtoll CFGR ETR_AFEN FL_LPTIM16_DisableETRFilter + * @param LPTIM16x LPTIM16 instance + * @retval None + */ +__STATIC_INLINE void FL_LPTIM16_DisableETRFilter(LPTIM16_Type *LPTIM16x) +{ + CLEAR_BIT(LPTIM16x->CFGR, LPTIM16_CFGR_ETR_AFEN_Msk); +} + +/** + * @brief Get External Input Analog Filter Enable Status + * @rmtoll CFGR ETR_AFEN FL_LPTIM16_IsEnabledETRFilter + * @param LPTIM16x LPTIM16 instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_LPTIM16_IsEnabledETRFilter(LPTIM16_Type *LPTIM16x) +{ + return (uint32_t)(READ_BIT(LPTIM16x->CFGR, LPTIM16_CFGR_ETR_AFEN_Msk) == LPTIM16_CFGR_ETR_AFEN_Msk); +} + +/** + * @brief Set Prescaler Input + * @rmtoll CFGR PSCSEL FL_LPTIM16_SetClockSource + * @param LPTIM16x LPTIM16 instance + * @param source This parameter can be one of the following values: + * @arg @ref FL_LPTIM16_CLK_SOURCE_INTERNAL + * @arg @ref FL_LPTIM16_CLK_SOURCE_EXTERNAL + * @retval None + */ +__STATIC_INLINE void FL_LPTIM16_SetClockSource(LPTIM16_Type *LPTIM16x, uint32_t source) +{ + MODIFY_REG(LPTIM16x->CFGR, LPTIM16_CFGR_PSCSEL_Msk, source); +} + +/** + * @brief Get Prescaler Input Setting + * @rmtoll CFGR PSCSEL FL_LPTIM16_GetClockSource + * @param LPTIM16x LPTIM16 instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_LPTIM16_CLK_SOURCE_INTERNAL + * @arg @ref FL_LPTIM16_CLK_SOURCE_EXTERNAL + */ +__STATIC_INLINE uint32_t FL_LPTIM16_GetClockSource(LPTIM16_Type *LPTIM16x) +{ + return (uint32_t)(READ_BIT(LPTIM16x->CFGR, LPTIM16_CFGR_PSCSEL_Msk)); +} + +/** + * @brief Set Counter Clock Division + * @rmtoll CFGR DIVSEL FL_LPTIM16_SetPrescaler + * @param LPTIM16x LPTIM16 instance + * @param psc This parameter can be one of the following values: + * @arg @ref FL_LPTIM16_PSC_DIV1 + * @arg @ref FL_LPTIM16_PSC_DIV2 + * @arg @ref FL_LPTIM16_PSC_DIV4 + * @arg @ref FL_LPTIM16_PSC_DIV8 + * @arg @ref FL_LPTIM16_PSC_DIV16 + * @arg @ref FL_LPTIM16_PSC_DIV32 + * @arg @ref FL_LPTIM16_PSC_DIV64 + * @arg @ref FL_LPTIM16_PSC_DIV128 + * @retval None + */ +__STATIC_INLINE void FL_LPTIM16_SetPrescaler(LPTIM16_Type *LPTIM16x, uint32_t psc) +{ + MODIFY_REG(LPTIM16x->CFGR, LPTIM16_CFGR_DIVSEL_Msk, psc); +} + +/** + * @brief Get Counter Clock Division Setting + * @rmtoll CFGR DIVSEL FL_LPTIM16_GetPrescaler + * @param LPTIM16x LPTIM16 instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_LPTIM16_PSC_DIV1 + * @arg @ref FL_LPTIM16_PSC_DIV2 + * @arg @ref FL_LPTIM16_PSC_DIV4 + * @arg @ref FL_LPTIM16_PSC_DIV8 + * @arg @ref FL_LPTIM16_PSC_DIV16 + * @arg @ref FL_LPTIM16_PSC_DIV32 + * @arg @ref FL_LPTIM16_PSC_DIV64 + * @arg @ref FL_LPTIM16_PSC_DIV128 + */ +__STATIC_INLINE uint32_t FL_LPTIM16_GetPrescaler(LPTIM16_Type *LPTIM16x) +{ + return (uint32_t)(READ_BIT(LPTIM16x->CFGR, LPTIM16_CFGR_DIVSEL_Msk)); +} + +/** + * @brief Set ETR Count Edge + * @rmtoll CFGR EDGESEL FL_LPTIM16_SetETRCountEdge + * @param LPTIM16x LPTIM16 instance + * @param edge This parameter can be one of the following values: + * @arg @ref FL_LPTIM16_ETR_COUNT_EDGE_RISING + * @arg @ref FL_LPTIM16_ETR_COUNT_EDGE_FALLING + * @retval None + */ +__STATIC_INLINE void FL_LPTIM16_SetETRCountEdge(LPTIM16_Type *LPTIM16x, uint32_t edge) +{ + MODIFY_REG(LPTIM16x->CFGR, LPTIM16_CFGR_EDGESEL_Msk, edge); +} + +/** + * @brief Get ETR Count Edge Setting + * @rmtoll CFGR EDGESEL FL_LPTIM16_GetETRCountEdge + * @param LPTIM16x LPTIM16 instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_LPTIM16_ETR_COUNT_EDGE_RISING + * @arg @ref FL_LPTIM16_ETR_COUNT_EDGE_FALLING + */ +__STATIC_INLINE uint32_t FL_LPTIM16_GetETRCountEdge(LPTIM16_Type *LPTIM16x) +{ + return (uint32_t)(READ_BIT(LPTIM16x->CFGR, LPTIM16_CFGR_EDGESEL_Msk)); +} + +/** + * @brief Set ETR Trigger Edge + * @rmtoll CFGR TRIGCFG FL_LPTIM16_SetETRTriggerEdge + * @param LPTIM16x LPTIM16 instance + * @param edge This parameter can be one of the following values: + * @arg @ref FL_LPTIM16_ETR_TRIGGER_EDGE_RISING + * @arg @ref FL_LPTIM16_ETR_TRIGGER_EDGE_FALLING + * @arg @ref FL_LPTIM16_ETR_TRIGGER_EDGE_BOTH + * @retval None + */ +__STATIC_INLINE void FL_LPTIM16_SetETRTriggerEdge(LPTIM16_Type *LPTIM16x, uint32_t edge) +{ + MODIFY_REG(LPTIM16x->CFGR, LPTIM16_CFGR_TRIGCFG_Msk, edge); +} + +/** + * @brief Get ETR Trigger Edge Setting + * @rmtoll CFGR TRIGCFG FL_LPTIM16_GetETRTriggerEdge + * @param LPTIM16x LPTIM16 instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_LPTIM16_ETR_TRIGGER_EDGE_RISING + * @arg @ref FL_LPTIM16_ETR_TRIGGER_EDGE_FALLING + * @arg @ref FL_LPTIM16_ETR_TRIGGER_EDGE_BOTH + */ +__STATIC_INLINE uint32_t FL_LPTIM16_GetETRTriggerEdge(LPTIM16_Type *LPTIM16x) +{ + return (uint32_t)(READ_BIT(LPTIM16x->CFGR, LPTIM16_CFGR_TRIGCFG_Msk)); +} + +/** + * @brief Set Quad Encoder Mode + * @rmtoll CFGR QEMD FL_LPTIM16_SetEncoderMode + * @param LPTIM16x LPTIM16 instance + * @param mode This parameter can be one of the following values: + * @arg @ref FL_LPTIM16_ENCODER_MODE_DISABLE + * @arg @ref FL_LPTIM16_ENCODER_MODE_TI1FP1_TI2FP2_CNT + * @arg @ref FL_LPTIM16_ENCODER_MODE_TI2FP2_TI1FP1_CNT + * @arg @ref FL_LPTIM16_ENCODER_MODE_TI2FP2_CNT_TI1FP1_CNT + * @retval None + */ +__STATIC_INLINE void FL_LPTIM16_SetEncoderMode(LPTIM16_Type *LPTIM16x, uint32_t mode) +{ + MODIFY_REG(LPTIM16x->CFGR, LPTIM16_CFGR_QEMD_Msk, mode); +} + +/** + * @brief Get Quad Encoder Mode Setting + * @rmtoll CFGR QEMD FL_LPTIM16_GetEncoderMode + * @param LPTIM16x LPTIM16 instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_LPTIM16_ENCODER_MODE_DISABLE + * @arg @ref FL_LPTIM16_ENCODER_MODE_TI1FP1_TI2FP2_CNT + * @arg @ref FL_LPTIM16_ENCODER_MODE_TI2FP2_TI1FP1_CNT + * @arg @ref FL_LPTIM16_ENCODER_MODE_TI2FP2_CNT_TI1FP1_CNT + */ +__STATIC_INLINE uint32_t FL_LPTIM16_GetEncoderMode(LPTIM16_Type *LPTIM16x) +{ + return (uint32_t)(READ_BIT(LPTIM16x->CFGR, LPTIM16_CFGR_QEMD_Msk)); +} + +/** + * @brief Set Sync Trigger Signal Output Source + * @rmtoll CFGR MMS FL_LPTIM16_SetTriggerOutput + * @param LPTIM16x LPTIM16 instance + * @param triggerOutput This parameter can be one of the following values: + * @arg @ref FL_LPTIM16_TRGO_ENABLE + * @arg @ref FL_LPTIM16_TRGO_UPDATE + * @arg @ref FL_LPTIM16_TRGO_OC1REF + * @arg @ref FL_LPTIM16_TRGO_IC1 + * @arg @ref FL_LPTIM16_TRGO_IC2 + * @retval None + */ +__STATIC_INLINE void FL_LPTIM16_SetTriggerOutput(LPTIM16_Type *LPTIM16x, uint32_t triggerOutput) +{ + MODIFY_REG(LPTIM16x->CFGR, LPTIM16_CFGR_MMS_Msk, triggerOutput); +} + +/** + * @brief Get Sync Trigger Signal Output Source Setting + * @rmtoll CFGR MMS FL_LPTIM16_GetTriggerOutput + * @param LPTIM16x LPTIM16 instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_LPTIM16_TRGO_ENABLE + * @arg @ref FL_LPTIM16_TRGO_UPDATE + * @arg @ref FL_LPTIM16_TRGO_OC1REF + * @arg @ref FL_LPTIM16_TRGO_IC1 + * @arg @ref FL_LPTIM16_TRGO_IC2 + */ +__STATIC_INLINE uint32_t FL_LPTIM16_GetTriggerOutput(LPTIM16_Type *LPTIM16x) +{ + return (uint32_t)(READ_BIT(LPTIM16x->CFGR, LPTIM16_CFGR_MMS_Msk)); +} + +/** + * @brief Set One Pulse Mode + * @rmtoll CFGR ONST FL_LPTIM16_SetOnePulseMode + * @param LPTIM16x LPTIM16 instance + * @param mode This parameter can be one of the following values: + * @arg @ref FL_LPTIM16_ONE_PULSE_MODE_CONTINUOUS + * @arg @ref FL_LPTIM16_ONE_PULSE_MODE_SINGLE + * @retval None + */ +__STATIC_INLINE void FL_LPTIM16_SetOnePulseMode(LPTIM16_Type *LPTIM16x, uint32_t mode) +{ + MODIFY_REG(LPTIM16x->CFGR, LPTIM16_CFGR_ONST_Msk, mode); +} + +/** + * @brief Get One Pulse Mode Setting + * @rmtoll CFGR ONST FL_LPTIM16_GetOnePulseMode + * @param LPTIM16x LPTIM16 instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_LPTIM16_ONE_PULSE_MODE_CONTINUOUS + * @arg @ref FL_LPTIM16_ONE_PULSE_MODE_SINGLE + */ +__STATIC_INLINE uint32_t FL_LPTIM16_GetOnePulseMode(LPTIM16_Type *LPTIM16x) +{ + return (uint32_t)(READ_BIT(LPTIM16x->CFGR, LPTIM16_CFGR_ONST_Msk)); +} + +/** + * @brief Set Operation Mode + * @rmtoll CFGR TMODE FL_LPTIM16_SetOperationMode + * @param LPTIM16x LPTIM16 instance + * @param mode This parameter can be one of the following values: + * @arg @ref FL_LPTIM16_OPERATION_MODE_NORMAL + * @arg @ref FL_LPTIM16_OPERATION_MODE_EXTERNAL_TRIGGER_CNT + * @arg @ref FL_LPTIM16_OPERATION_MODE_EXTERNAL_ASYNC_PULSE_CNT + * @arg @ref FL_LPTIM16_OPERATION_MODE_TIMEOUT + * @retval None + */ +__STATIC_INLINE void FL_LPTIM16_SetOperationMode(LPTIM16_Type *LPTIM16x, uint32_t mode) +{ + MODIFY_REG(LPTIM16x->CFGR, LPTIM16_CFGR_TMODE_Msk, mode); +} + +/** + * @brief Get Operation Mode Setting + * @rmtoll CFGR TMODE FL_LPTIM16_GetOperationMode + * @param LPTIM16x LPTIM16 instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_LPTIM16_OPERATION_MODE_NORMAL + * @arg @ref FL_LPTIM16_OPERATION_MODE_EXTERNAL_TRIGGER_CNT + * @arg @ref FL_LPTIM16_OPERATION_MODE_EXTERNAL_ASYNC_PULSE_CNT + * @arg @ref FL_LPTIM16_OPERATION_MODE_TIMEOUT + */ +__STATIC_INLINE uint32_t FL_LPTIM16_GetOperationMode(LPTIM16_Type *LPTIM16x) +{ + return (uint32_t)(READ_BIT(LPTIM16x->CFGR, LPTIM16_CFGR_TMODE_Msk)); +} + +/** + * @brief Set Channel 1 Output Compare Value + * @rmtoll CCR1 FL_LPTIM16_WriteCompareCH1 + * @param LPTIM16x LPTIM16 instance + * @param compareValue + * @retval None + */ +__STATIC_INLINE void FL_LPTIM16_WriteCompareCH1(LPTIM16_Type *LPTIM16x, uint32_t compareValue) +{ + MODIFY_REG(LPTIM16x->CCR1, (0xffffU << 0U), (compareValue << 0U)); +} + +/** + * @brief Get Channel 1 Output Compare Value + * @rmtoll CCR1 FL_LPTIM16_ReadCompareCH1 + * @param LPTIM16x LPTIM16 instance + * @retval + */ +__STATIC_INLINE uint32_t FL_LPTIM16_ReadCompareCH1(LPTIM16_Type *LPTIM16x) +{ + return (uint32_t)(READ_BIT(LPTIM16x->CCR1, (0xffffU << 0U)) >> 0U); +} + +/** + * @brief Set Channel 2 Output Compare Value + * @rmtoll CCR2 FL_LPTIM16_WriteCompareCH2 + * @param LPTIM16x LPTIM16 instance + * @param compareValue + * @retval None + */ +__STATIC_INLINE void FL_LPTIM16_WriteCompareCH2(LPTIM16_Type *LPTIM16x, uint32_t compareValue) +{ + MODIFY_REG(LPTIM16x->CCR2, (0xffffU << 0U), (compareValue << 0U)); +} + +/** + * @brief Get Channel 2 Output Compare Value + * @rmtoll CCR2 FL_LPTIM16_ReadCompareCH2 + * @param LPTIM16x LPTIM16 instance + * @retval + */ +__STATIC_INLINE uint32_t FL_LPTIM16_ReadCompareCH2(LPTIM16_Type *LPTIM16x) +{ + return (uint32_t)(READ_BIT(LPTIM16x->CCR2, (0xffffU << 0U)) >> 0U); +} + +/** + * @brief Get Channel 1 Input Capture Value + * @rmtoll CCR1 FL_LPTIM16_ReadCaptureCH1 + * @param LPTIM16x LPTIM16 instance + * @retval + */ +__STATIC_INLINE uint32_t FL_LPTIM16_ReadCaptureCH1(LPTIM16_Type *LPTIM16x) +{ + return (uint32_t)(READ_BIT(LPTIM16x->CCR1, (0xffffU << 0U)) >> 0U); +} + +/** + * @brief Get Channel 2 Input Capture Value + * @rmtoll CCR2 FL_LPTIM16_ReadCaptureCH2 + * @param LPTIM16x LPTIM16 instance + * @retval + */ +__STATIC_INLINE uint32_t FL_LPTIM16_ReadCaptureCH2(LPTIM16_Type *LPTIM16x) +{ + return (uint32_t)(READ_BIT(LPTIM16x->CCR2, (0xffffU << 0U)) >> 0U); +} + +/** + * @brief Enable Channel Capture/Compare Interrupt + * @rmtoll IER CCIE FL_LPTIM16_EnableIT_CC + * @param LPTIM16x LPTIM16 instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_LPTIM16_CHANNEL_1 + * @arg @ref FL_LPTIM16_CHANNEL_2 + * @retval None + */ +__STATIC_INLINE void FL_LPTIM16_EnableIT_CC(LPTIM16_Type *LPTIM16x, uint32_t channel) +{ + SET_BIT(LPTIM16x->IER, ((channel & 0x3) << 0x0U)); +} + +/** + * @brief Enable Update Event Interrupt + * @rmtoll IER OVIE FL_LPTIM16_EnableIT_Update + * @param LPTIM16x LPTIM16 instance + * @retval None + */ +__STATIC_INLINE void FL_LPTIM16_EnableIT_Update(LPTIM16_Type *LPTIM16x) +{ + SET_BIT(LPTIM16x->IER, LPTIM16_IER_OVIE_Msk); +} + +/** + * @brief Enable External Trigger Interrupt + * @rmtoll IER TRIGIE FL_LPTIM16_EnableIT_Trigger + * @param LPTIM16x LPTIM16 instance + * @retval None + */ +__STATIC_INLINE void FL_LPTIM16_EnableIT_Trigger(LPTIM16_Type *LPTIM16x) +{ + SET_BIT(LPTIM16x->IER, LPTIM16_IER_TRIGIE_Msk); +} + +/** + * @brief Enable Channel Capture Overflow Interrupt + * @rmtoll IER OVRIE FL_LPTIM16_EnableIT_CCOverflow + * @param LPTIM16x LPTIM16 instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_LPTIM16_CHANNEL_1 + * @arg @ref FL_LPTIM16_CHANNEL_2 + * @retval None + */ +__STATIC_INLINE void FL_LPTIM16_EnableIT_CCOverflow(LPTIM16_Type *LPTIM16x, uint32_t channel) +{ + SET_BIT(LPTIM16x->IER, ((channel & 0x3) << 0x8U)); +} + +/** + * @brief Disable Channel Capture/Compare Interrupt + * @rmtoll IER CCIE FL_LPTIM16_DisableIT_CC + * @param LPTIM16x LPTIM16 instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_LPTIM16_CHANNEL_1 + * @arg @ref FL_LPTIM16_CHANNEL_2 + * @retval None + */ +__STATIC_INLINE void FL_LPTIM16_DisableIT_CC(LPTIM16_Type *LPTIM16x, uint32_t channel) +{ + CLEAR_BIT(LPTIM16x->IER, ((channel & 0x3) << 0x0U)); +} + +/** + * @brief Disable Update Event Interrupt + * @rmtoll IER OVIE FL_LPTIM16_DisableIT_Update + * @param LPTIM16x LPTIM16 instance + * @retval None + */ +__STATIC_INLINE void FL_LPTIM16_DisableIT_Update(LPTIM16_Type *LPTIM16x) +{ + CLEAR_BIT(LPTIM16x->IER, LPTIM16_IER_OVIE_Msk); +} + +/** + * @brief Disable External Trigger Interrupt + * @rmtoll IER TRIGIE FL_LPTIM16_DisableIT_Trigger + * @param LPTIM16x LPTIM16 instance + * @retval None + */ +__STATIC_INLINE void FL_LPTIM16_DisableIT_Trigger(LPTIM16_Type *LPTIM16x) +{ + CLEAR_BIT(LPTIM16x->IER, LPTIM16_IER_TRIGIE_Msk); +} + +/** + * @brief Disable Channel Capture Overflow Interrupt + * @rmtoll IER OVRIE FL_LPTIM16_DisableIT_CCOverflow + * @param LPTIM16x LPTIM16 instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_LPTIM16_CHANNEL_1 + * @arg @ref FL_LPTIM16_CHANNEL_2 + * @retval None + */ +__STATIC_INLINE void FL_LPTIM16_DisableIT_CCOverflow(LPTIM16_Type *LPTIM16x, uint32_t channel) +{ + CLEAR_BIT(LPTIM16x->IER, ((channel & 0x3) << 0x8U)); +} + +/** + * @brief Get Channel Capture/Compare Interrupt Enable Status + * @rmtoll IER CCIE FL_LPTIM16_IsEnabledIT_CC + * @param LPTIM16x LPTIM16 instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_LPTIM16_CHANNEL_1 + * @arg @ref FL_LPTIM16_CHANNEL_2 + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_LPTIM16_IsEnabledIT_CC(LPTIM16_Type *LPTIM16x, uint32_t channel) +{ + return (uint32_t)(READ_BIT(LPTIM16x->IER, ((channel & 0x3) << 0x0U)) == ((channel & 0x3) << 0x0U)); +} + +/** + * @brief Get Counter Update Event Interrupt Enable Status + * @rmtoll IER OVIE FL_LPTIM16_IsEnabledIT_Update + * @param LPTIM16x LPTIM16 instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_LPTIM16_IsEnabledIT_Update(LPTIM16_Type *LPTIM16x) +{ + return (uint32_t)(READ_BIT(LPTIM16x->IER, LPTIM16_IER_OVIE_Msk) == LPTIM16_IER_OVIE_Msk); +} + +/** + * @brief Get External Trigger Interrupt Enable Status + * @rmtoll IER TRIGIE FL_LPTIM16_IsEnabledIT_Trigger + * @param LPTIM16x LPTIM16 instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_LPTIM16_IsEnabledIT_Trigger(LPTIM16_Type *LPTIM16x) +{ + return (uint32_t)(READ_BIT(LPTIM16x->IER, LPTIM16_IER_TRIGIE_Msk) == LPTIM16_IER_TRIGIE_Msk); +} + +/** + * @brief Get Channel Capture Overflow Interrupt Enable Status + * @rmtoll IER OVRIE FL_LPTIM16_IsEnabledIT_CCOverflow + * @param LPTIM16x LPTIM16 instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_LPTIM16_CHANNEL_1 + * @arg @ref FL_LPTIM16_CHANNEL_2 + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_LPTIM16_IsEnabledIT_CCOverflow(LPTIM16_Type *LPTIM16x, uint32_t channel) +{ + return (uint32_t)(READ_BIT(LPTIM16x->IER, ((channel & 0x3) << 0x8U)) == ((channel & 0x3) << 0x8U)); +} + +/** + * @brief Get Capture/Compare Channel Interrupt Flag + * @rmtoll ISR CCIF FL_LPTIM16_IsActiveFlag_CC + * @param LPTIM16x LPTIM16 instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_LPTIM16_CHANNEL_1 + * @arg @ref FL_LPTIM16_CHANNEL_2 + * @retval Returned value can be one of the following values: + */ +__STATIC_INLINE uint32_t FL_LPTIM16_IsActiveFlag_CC(LPTIM16_Type *LPTIM16x, uint32_t channel) +{ + return (uint32_t)(READ_BIT(LPTIM16x->ISR, ((channel & 0x3) << 0x0U)) == ((channel & 0x3) << 0x0U)); +} + +/** + * @brief Get Update Event Interrupt Flag + * @rmtoll ISR OVIF FL_LPTIM16_IsActiveFlag_Update + * @param LPTIM16x LPTIM16 instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_LPTIM16_IsActiveFlag_Update(LPTIM16_Type *LPTIM16x) +{ + return (uint32_t)(READ_BIT(LPTIM16x->ISR, LPTIM16_ISR_OVIF_Msk) == (LPTIM16_ISR_OVIF_Msk)); +} + +/** + * @brief Get External Trigger Interrupt Flag + * @rmtoll ISR TRIGIF FL_LPTIM16_IsActiveFlag_Trigger + * @param LPTIM16x LPTIM16 instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_LPTIM16_IsActiveFlag_Trigger(LPTIM16_Type *LPTIM16x) +{ + return (uint32_t)(READ_BIT(LPTIM16x->ISR, LPTIM16_ISR_TRIGIF_Msk) == (LPTIM16_ISR_TRIGIF_Msk)); +} + +/** + * @brief Get Channel Capture Overflow Interrupt Flag + * @rmtoll ISR OVRIF FL_LPTIM16_IsActiveFlag_CCOverflow + * @param LPTIM16x LPTIM16 instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_LPTIM16_CHANNEL_1 + * @arg @ref FL_LPTIM16_CHANNEL_2 + * @retval Returned value can be one of the following values: + */ +__STATIC_INLINE uint32_t FL_LPTIM16_IsActiveFlag_CCOverflow(LPTIM16_Type *LPTIM16x, uint32_t channel) +{ + return (uint32_t)(READ_BIT(LPTIM16x->ISR, ((channel & 0x3) << 0x8U)) == ((channel & 0x3) << 0x8U)); +} + +/** + * @brief Clear Capture/Compare Channel Interrupt Flag + * @rmtoll ISR CCIF FL_LPTIM16_ClearFlag_CC + * @param LPTIM16x LPTIM16 instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_LPTIM16_CHANNEL_1 + * @arg @ref FL_LPTIM16_CHANNEL_2 + * @retval None + */ +__STATIC_INLINE void FL_LPTIM16_ClearFlag_CC(LPTIM16_Type *LPTIM16x, uint32_t channel) +{ + WRITE_REG(LPTIM16x->ISR, ((channel & 0x3) << 0x0U)); +} + +/** + * @brief Clear Update Event Interrupt Flag + * @rmtoll ISR OVIF FL_LPTIM16_ClearFlag_Update + * @param LPTIM16x LPTIM16 instance + * @retval None + */ +__STATIC_INLINE void FL_LPTIM16_ClearFlag_Update(LPTIM16_Type *LPTIM16x) +{ + WRITE_REG(LPTIM16x->ISR, LPTIM16_ISR_OVIF_Msk); +} + +/** + * @brief Clear External Trigger Interrupt Flag + * @rmtoll ISR TRIGIF FL_LPTIM16_ClearFlag_Trigger + * @param LPTIM16x LPTIM16 instance + * @retval None + */ +__STATIC_INLINE void FL_LPTIM16_ClearFlag_Trigger(LPTIM16_Type *LPTIM16x) +{ + WRITE_REG(LPTIM16x->ISR, LPTIM16_ISR_TRIGIF_Msk); +} + +/** + * @brief Clear Channel Capture Overflow Interrupt Flag + * @rmtoll ISR OVRIF FL_LPTIM16_ClearFlag_CCOverflow + * @param LPTIM16x LPTIM16 instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_LPTIM16_CHANNEL_1 + * @arg @ref FL_LPTIM16_CHANNEL_2 + * @retval None + */ +__STATIC_INLINE void FL_LPTIM16_ClearFlag_CCOverflow(LPTIM16_Type *LPTIM16x, uint32_t channel) +{ + WRITE_REG(LPTIM16x->ISR, ((channel & 0x3) << 0x8U)); +} + +/** + * @brief Set Auto Reload Value + * @rmtoll ARR FL_LPTIM16_WriteAutoReload + * @param LPTIM16x LPTIM16 instance + * @param autoReload + * @retval None + */ +__STATIC_INLINE void FL_LPTIM16_WriteAutoReload(LPTIM16_Type *LPTIM16x, uint32_t autoReload) +{ + MODIFY_REG(LPTIM16x->ARR, (0xffffU << 0U), (autoReload << 0U)); +} + +/** + * @brief Get Auto Reload Value + * @rmtoll ARR FL_LPTIM16_ReadAutoReload + * @param LPTIM16x LPTIM16 instance + * @retval + */ +__STATIC_INLINE uint32_t FL_LPTIM16_ReadAutoReload(LPTIM16_Type *LPTIM16x) +{ + return (uint32_t)(READ_BIT(LPTIM16x->ARR, (0xffffU << 0U)) >> 0U); +} + +/** + * @brief Set Input Capture Channel Capture Edge + * @rmtoll CCSR CAPCFG FL_LPTIM16_IC_SetCaptureEdge + * @param LPTIM16x LPTIM16 instance + * @param polarity This parameter can be one of the following values: + * @arg @ref FL_LPTIM16_IC_EDGE_RISING + * @arg @ref FL_LPTIM16_IC_EDGE_FALLING + * @arg @ref FL_LPTIM16_IC_EDGE_BOTH + * @param channel This parameter can be one of the following values: + * @arg @ref FL_LPTIM16_CHANNEL_1 + * @arg @ref FL_LPTIM16_CHANNEL_2 + * @retval None + */ +__STATIC_INLINE void FL_LPTIM16_IC_SetCaptureEdge(LPTIM16_Type *LPTIM16x, uint32_t polarity, uint32_t channel) +{ + switch(channel) + { + case FL_LPTIM16_CHANNEL_1: + MODIFY_REG(LPTIM16x->CCSR, (0x3U << 8U), (polarity << 0U)); + break; + case FL_LPTIM16_CHANNEL_2: + MODIFY_REG(LPTIM16x->CCSR, (0x3U << 10U), (polarity << 2U)); + break; + } +} + +/** + * @brief Get Input Capture Channel Capture Edge + * @rmtoll CCSR CAPCFG FL_LPTIM16_IC_GetCaptureEdge + * @param LPTIM16x LPTIM16 instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_LPTIM16_CHANNEL_1 + * @arg @ref FL_LPTIM16_CHANNEL_2 + * @retval Returned value can be one of the following values: + * @arg @ref FL_LPTIM16_IC_EDGE_RISING + * @arg @ref FL_LPTIM16_IC_EDGE_FALLING + * @arg @ref FL_LPTIM16_IC_EDGE_BOTH + */ +__STATIC_INLINE uint32_t FL_LPTIM16_IC_GetCaptureEdge(LPTIM16_Type *LPTIM16x, uint32_t channel) +{ + switch(channel) + { + case FL_LPTIM16_CHANNEL_1: + return (uint32_t)(READ_BIT(LPTIM16x->CCSR, (0x3U << 8U)) >> 0U); + case FL_LPTIM16_CHANNEL_2: + return (uint32_t)(READ_BIT(LPTIM16x->CCSR, (0x3U << 10U)) >> 2U); + default: + return 0; + } +} + +/** + * @brief Set Channel Output Compare Polarity + * @rmtoll CCSR CCP FL_LPTIM16_OC_SetPolarity + * @param LPTIM16x LPTIM16 instance + * @param polarity This parameter can be one of the following values: + * @arg @ref FL_LPTIM16_OC_POLARITY_NORMAL + * @arg @ref FL_LPTIM16_OC_POLARITY_INVERT + * @param channel This parameter can be one of the following values: + * @arg @ref FL_LPTIM16_CHANNEL_1 + * @arg @ref FL_LPTIM16_CHANNEL_2 + * @retval None + */ +__STATIC_INLINE void FL_LPTIM16_OC_SetPolarity(LPTIM16_Type *LPTIM16x, uint32_t polarity, uint32_t channel) +{ + switch(channel) + { + case FL_LPTIM16_CHANNEL_1: + MODIFY_REG(LPTIM16x->CCSR, (0x1U << 16U), (polarity << 0U)); + break; + case FL_LPTIM16_CHANNEL_2: + MODIFY_REG(LPTIM16x->CCSR, (0x1U << 17U), (polarity << 1U)); + break; + } +} + +/** + * @brief Get Channel Output Compare Polarity + * @rmtoll CCSR CCP FL_LPTIM16_OC_GetPolarity + * @param LPTIM16x LPTIM16 instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_LPTIM16_CHANNEL_1 + * @arg @ref FL_LPTIM16_CHANNEL_2 + * @retval Returned value can be one of the following values: + * @arg @ref FL_LPTIM16_OC_POLARITY_NORMAL + * @arg @ref FL_LPTIM16_OC_POLARITY_INVERT + */ +__STATIC_INLINE uint32_t FL_LPTIM16_OC_GetPolarity(LPTIM16_Type *LPTIM16x, uint32_t channel) +{ + switch(channel) + { + case FL_LPTIM16_CHANNEL_1: + return (uint32_t)(READ_BIT(LPTIM16x->CCSR, (0x1U << 16U)) >> 0U); + case FL_LPTIM16_CHANNEL_2: + return (uint32_t)(READ_BIT(LPTIM16x->CCSR, (0x1U << 17U)) >> 1U); + default: + return 0; + } +} + +/** + * @brief Set Input Capture Channel Input Polarity + * @rmtoll CCSR CCP FL_LPTIM16_IC_SetInputPolarity + * @param LPTIM16x LPTIM16 instance + * @param polarity This parameter can be one of the following values: + * @arg @ref FL_LPTIM16_IC_POLARITY_NORMAL + * @arg @ref FL_LPTIM16_IC_POLARITY_INVERT + * @param channel This parameter can be one of the following values: + * @arg @ref FL_LPTIM16_CHANNEL_1 + * @arg @ref FL_LPTIM16_CHANNEL_2 + * @retval None + */ +__STATIC_INLINE void FL_LPTIM16_IC_SetInputPolarity(LPTIM16_Type *LPTIM16x, uint32_t polarity, uint32_t channel) +{ + switch(channel) + { + case FL_LPTIM16_CHANNEL_1: + MODIFY_REG(LPTIM16x->CCSR, (0x1U << 16U), (polarity << 0U)); + break; + case FL_LPTIM16_CHANNEL_2: + MODIFY_REG(LPTIM16x->CCSR, (0x1U << 17U), (polarity << 1U)); + break; + } +} + +/** + * @brief Get Input Capture Channel Input Polarity + * @rmtoll CCSR CCP FL_LPTIM16_IC_GetInputPolarity + * @param LPTIM16x LPTIM16 instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_LPTIM16_CHANNEL_1 + * @arg @ref FL_LPTIM16_CHANNEL_2 + * @retval Returned value can be one of the following values: + * @arg @ref FL_LPTIM16_IC_POLARITY_NORMAL + * @arg @ref FL_LPTIM16_IC_POLARITY_INVERT + */ +__STATIC_INLINE uint32_t FL_LPTIM16_IC_GetInputPolarity(LPTIM16_Type *LPTIM16x, uint32_t channel) +{ + switch(channel) + { + case FL_LPTIM16_CHANNEL_1: + return (uint32_t)(READ_BIT(LPTIM16x->CCSR, (0x1U << 16U)) >> 0U); + case FL_LPTIM16_CHANNEL_2: + return (uint32_t)(READ_BIT(LPTIM16x->CCSR, (0x1U << 17U)) >> 1U); + default: + return 0; + } +} + +/** + * @brief Enable Channel Input Digital Filter + * @rmtoll CCSR FL_LPTIM16_EnableDigitalFilter + * @param LPTIM16x LPTIM16 instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_LPTIM16_CHANNEL_1 + * @arg @ref FL_LPTIM16_CHANNEL_2 + * @retval None + */ +__STATIC_INLINE void FL_LPTIM16_EnableDigitalFilter(LPTIM16_Type *LPTIM16x, uint32_t channel) +{ + SET_BIT(LPTIM16x->CCSR, ((channel & 0x3) << 0xcU)); +} + +/** + * @brief Disable Channel Input Digital Filter + * @rmtoll CCSR FL_LPTIM16_DisableDigitalFilter + * @param LPTIM16x LPTIM16 instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_LPTIM16_CHANNEL_1 + * @arg @ref FL_LPTIM16_CHANNEL_2 + * @retval None + */ +__STATIC_INLINE void FL_LPTIM16_DisableDigitalFilter(LPTIM16_Type *LPTIM16x, uint32_t channel) +{ + CLEAR_BIT(LPTIM16x->CCSR, ((channel & 0x3) << 0xcU)); +} + +/** + * @brief Get Channel Input Digital Filter Enable Status + * @rmtoll CCSR FL_LPTIM16_IsEnabledDigitalFilter + * @param LPTIM16x LPTIM16 instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_LPTIM16_CHANNEL_1 + * @arg @ref FL_LPTIM16_CHANNEL_2 + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_LPTIM16_IsEnabledDigitalFilter(LPTIM16_Type *LPTIM16x, uint32_t channel) +{ + return (uint32_t)(READ_BIT(LPTIM16x->CCSR, ((channel & 0x3) << 0xcU)) == ((channel & 0x3) << 0xcU)); +} + +/** + * @brief Set Channel 1 Input Prescaler + * @rmtoll CCSR CAP1PSC FL_LPTIM16_IC_WriteChannel1Prescaler + * @param LPTIM16x LPTIM16 instance + * @param psc + * @retval None + */ +__STATIC_INLINE void FL_LPTIM16_IC_WriteChannel1Prescaler(LPTIM16_Type *LPTIM16x, uint32_t psc) +{ + MODIFY_REG(LPTIM16x->CCSR, (0x3fU << 26U), (psc << 26U)); +} + +/** + * @brief Get Channel 1 Input Prescaler Setting + * @rmtoll CCSR CAP1PSC FL_LPTIM16_IC_ReadChannel1Prescaler + * @param LPTIM16x LPTIM16 instance + * @retval + */ +__STATIC_INLINE uint32_t FL_LPTIM16_IC_ReadChannel1Prescaler(LPTIM16_Type *LPTIM16x) +{ + return (uint32_t)(READ_BIT(LPTIM16x->CCSR, (0x3fU << 26U)) >> 26U); +} + +/** + * @brief Set Channel Operation Mode + * @rmtoll CCSR CCS FL_LPTIM16_SetChannelMode + * @param LPTIM16x LPTIM16 instance + * @param mode This parameter can be one of the following values: + * @arg @ref FL_LPTIM16_CHANNEL_MODE_DISABLE + * @arg @ref FL_LPTIM16_CHANNEL_MODE_INPUT + * @arg @ref FL_LPTIM16_CHANNEL_MODE_OUTPUT + * @param channel This parameter can be one of the following values: + * @arg @ref FL_LPTIM16_CHANNEL_1 + * @arg @ref FL_LPTIM16_CHANNEL_2 + * @retval None + */ +__STATIC_INLINE void FL_LPTIM16_SetChannelMode(LPTIM16_Type *LPTIM16x, uint32_t mode, uint32_t channel) +{ + switch(channel) + { + case FL_LPTIM16_CHANNEL_1: + MODIFY_REG(LPTIM16x->CCSR, (0x3U << 0U), (mode << 0U)); + break; + case FL_LPTIM16_CHANNEL_2: + MODIFY_REG(LPTIM16x->CCSR, (0x3U << 2U), (mode << 2U)); + break; + } +} + +/** + * @brief Get Channel Operation Mode + * @rmtoll CCSR CCS FL_LPTIM16_GetChannelMode + * @param LPTIM16x LPTIM16 instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_LPTIM16_CHANNEL_1 + * @arg @ref FL_LPTIM16_CHANNEL_2 + * @retval Returned value can be one of the following values: + * @arg @ref FL_LPTIM16_CHANNEL_MODE_DISABLE + * @arg @ref FL_LPTIM16_CHANNEL_MODE_INPUT + * @arg @ref FL_LPTIM16_CHANNEL_MODE_OUTPUT + */ +__STATIC_INLINE uint32_t FL_LPTIM16_GetChannelMode(LPTIM16_Type *LPTIM16x, uint32_t channel) +{ + switch(channel) + { + case FL_LPTIM16_CHANNEL_1: + return (uint32_t)(READ_BIT(LPTIM16x->CCSR, (0x3U << 0U)) >> 0U); + case FL_LPTIM16_CHANNEL_2: + return (uint32_t)(READ_BIT(LPTIM16x->CCSR, (0x3U << 2U)) >> 2U); + default: + return 0; + } +} + +/** + * @brief Get Channel Captured Edge + * @rmtoll CCSR CAPEDGE FL_LPTIM16_IC_GetCapturedEdge + * @param LPTIM16x LPTIM16 instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_LPTIM16_CHANNEL_1 + * @arg @ref FL_LPTIM16_CHANNEL_2 + * @retval Returned value can be one of the following values: + * @arg @ref FL_LPTIM16_IC_CAPCTURED_EDGE_RISING + * @arg @ref FL_LPTIM16_IC_CAPCTURED_EDGE_FALLING + */ +__STATIC_INLINE uint32_t FL_LPTIM16_IC_GetCapturedEdge(LPTIM16_Type *LPTIM16x, uint32_t channel) +{ + switch(channel) + { + case FL_LPTIM16_CHANNEL_1: + return (uint32_t)(READ_BIT(LPTIM16x->CCSR, (0x1U << 20U)) >> 0U); + case FL_LPTIM16_CHANNEL_2: + return (uint32_t)(READ_BIT(LPTIM16x->CCSR, (0x1U << 21U)) >> 1U); + default: + return 0; + } +} + +/** + * @brief Set Channel 1 Capture Source + * @rmtoll CCSR CAP1SSEL FL_LPTIM16_IC_SetChannel1CaptureSource + * @param LPTIM16x LPTIM16 instance + * @param source This parameter can be one of the following values: + * @arg @ref FL_LPTIM16_IC1_CAPTURE_SOURCE_GROUP0 + * @arg @ref FL_LPTIM16_IC1_CAPTURE_SOURCE_GROUP1 + * @arg @ref FL_LPTIM16_IC1_CAPTURE_SOURCE_GROUP2 + * @arg @ref FL_LPTIM16_IC1_CAPTURE_SOURCE_GROUP3 + * @retval None + */ +__STATIC_INLINE void FL_LPTIM16_IC_SetChannel1CaptureSource(LPTIM16_Type *LPTIM16x, uint32_t source) +{ + MODIFY_REG(LPTIM16x->CCSR, LPTIM16_CCSR_CAP1SSEL_Msk, source); +} + +/** + * @brief Get Channel 1 Capture Source Setting + * @rmtoll CCSR CAP1SSEL FL_LPTIM16_IC_GetChannel1CaptureSource + * @param LPTIM16x LPTIM16 instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_LPTIM16_IC1_CAPTURE_SOURCE_GROUP0 + * @arg @ref FL_LPTIM16_IC1_CAPTURE_SOURCE_GROUP1 + * @arg @ref FL_LPTIM16_IC1_CAPTURE_SOURCE_GROUP2 + * @arg @ref FL_LPTIM16_IC1_CAPTURE_SOURCE_GROUP3 + */ +__STATIC_INLINE uint32_t FL_LPTIM16_IC_GetChannel1CaptureSource(LPTIM16_Type *LPTIM16x) +{ + return (uint32_t)(READ_BIT(LPTIM16x->CCSR, LPTIM16_CCSR_CAP1SSEL_Msk)); +} + +/** + * @brief Read LPTIM16 Counter Value + * @rmtoll CNT FL_LPTIM16_ReadCounter + * @param LPTIM16x LPTIM16 instance + * @retval + */ +__STATIC_INLINE uint32_t FL_LPTIM16_ReadCounter(LPTIM16_Type *LPTIM16x) +{ + return (uint32_t)(READ_BIT(LPTIM16x->CNT, (0xffffU << 0U)) >> 0U); +} + +/** + * @} + */ + +/** @defgroup LPTIM16_FL_EF_Init Initialization and de-initialization functions + * @{ + */ +FL_ErrorStatus FL_LPTIM16_DeInit(LPTIM16_Type *LPTIM16x); +FL_ErrorStatus FL_LPTIM16_Init(LPTIM16_Type *LPTIM16x, FL_LPTIM16_InitTypeDef *init); +void FL_LPTIM16_StructInit(FL_LPTIM16_InitTypeDef *init); +FL_ErrorStatus FL_LPTIM16_IC_Init(LPTIM16_Type *LPTIM16x, uint32_t channel, FL_LPTIM16_IC_InitTypeDef *ic_init); +void FL_LPTIM16_IC_StructInit(FL_LPTIM16_IC_InitTypeDef *ic_init); +FL_ErrorStatus FL_LPTIM16_OC_Init(LPTIM16_Type *LPTIM16x, uint32_t channel, FL_LPTIM16_OC_InitTypeDef *oc_init); +void FL_LPTIM16_OC_StructInit(FL_LPTIM16_OC_InitTypeDef *oc_init); + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif /* __FM33LG0XX_FL_LPTIM16_H*/ + +/*************************Py_Code_Generator Version: 0.1-0.14-0.1 @ 2020-12-14*************************/ +/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/ diff --git a/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_lptim32.h b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_lptim32.h new file mode 100644 index 0000000..cf9b9ba --- /dev/null +++ b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_lptim32.h @@ -0,0 +1,1321 @@ + /** + ******************************************************************************************************* + * @file fm33lg0xx_fl_lptim32.h + * @author FMSH Application Team + * @brief Head file of LPTIM32 FL Module + ******************************************************************************************************* + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + + + +/* Define to prevent recursive inclusion---------------------------------------------------------------*/ +#ifndef __FM33LG0XX_FL_LPTIM32_H +#define __FM33LG0XX_FL_LPTIM32_H + +#ifdef __cplusplus +extern "C" { +#endif +/* Includes -------------------------------------------------------------------------------------------*/ +#include "fm33lg0xx_fl_def.h" +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @defgroup LPTIM32 LPTIM32 + * @brief LPTIM32 FL driver + * @{ + */ + +/* Exported types -------------------------------------------------------------------------------------*/ +/** @defgroup LPTIM32_FL_ES_INIT LPTIM32 Exported Init structures + * @{ + */ + +/** + * @brief FL LPTIM32 Init Sturcture definition + */ + +/** + * @brief LPTIM32 Init Sturcture Definition + */ +typedef struct +{ + /* 内部时钟源 */ + uint32_t clockSource; + + /* 预分频器的时钟源 可选择内部时钟, 也可选择外部时钟 */ + uint32_t prescalerClockSource; + + /* 预分频系数 */ + uint32_t prescaler; + + /* 重装值 */ + uint32_t autoReload; + + /* 定时器工作模式选择 */ + uint32_t mode; + + /* 单次计数使能 */ + uint32_t onePulseMode; + + /* ETR异步计数边沿 */ + uint32_t countEdge; + + /* ETR触发计数边沿 */ + uint32_t triggerEdge; + +} FL_LPTIM32_InitTypeDef; + +/** + * @brief LPTIM32 Output Compare Configuration Structure Definition + */ +typedef struct +{ + /* 比较值 */ + uint32_t compareValue; + + /* 比较输出极性 */ + uint32_t OCPolarity; + +} FL_LPTIM32_OC_InitTypeDef; + +/** + * @brief LPTIM32 Input Capture Configuration Structure Definition + */ +typedef struct +{ + /* 通道1捕获源 */ + uint32_t ICSource; + + /* 输入捕获极性 */ + uint32_t ICEdge; + +} FL_LPTIM32_IC_InitTypeDef; + +/** + * @} + */ +/* Exported constants ---------------------------------------------------------------------------------*/ +/** @defgroup LPTIM32_FL_Exported_Constants LPTIM32 Exported Constants + * @{ + */ + +#define LPTIM32_CR_EN_Pos (0U) +#define LPTIM32_CR_EN_Msk (0x1U << LPTIM32_CR_EN_Pos) +#define LPTIM32_CR_EN LPTIM32_CR_EN_Msk + +#define LPTIM32_CFGR_ETR_AFEN_Pos (24U) +#define LPTIM32_CFGR_ETR_AFEN_Msk (0x1U << LPTIM32_CFGR_ETR_AFEN_Pos) +#define LPTIM32_CFGR_ETR_AFEN LPTIM32_CFGR_ETR_AFEN_Msk + +#define LPTIM32_CFGR_PSCSEL_Pos (14U) +#define LPTIM32_CFGR_PSCSEL_Msk (0x1U << LPTIM32_CFGR_PSCSEL_Pos) +#define LPTIM32_CFGR_PSCSEL LPTIM32_CFGR_PSCSEL_Msk + +#define LPTIM32_CFGR_DIVSEL_Pos (10U) +#define LPTIM32_CFGR_DIVSEL_Msk (0x7U << LPTIM32_CFGR_DIVSEL_Pos) +#define LPTIM32_CFGR_DIVSEL LPTIM32_CFGR_DIVSEL_Msk + +#define LPTIM32_CFGR_EDGESEL_Pos (7U) +#define LPTIM32_CFGR_EDGESEL_Msk (0x1U << LPTIM32_CFGR_EDGESEL_Pos) +#define LPTIM32_CFGR_EDGESEL LPTIM32_CFGR_EDGESEL_Msk + +#define LPTIM32_CFGR_TRIGCFG_Pos (5U) +#define LPTIM32_CFGR_TRIGCFG_Msk (0x3U << LPTIM32_CFGR_TRIGCFG_Pos) +#define LPTIM32_CFGR_TRIGCFG LPTIM32_CFGR_TRIGCFG_Msk + +#define LPTIM32_CFGR_ONST_Pos (2U) +#define LPTIM32_CFGR_ONST_Msk (0x1U << LPTIM32_CFGR_ONST_Pos) +#define LPTIM32_CFGR_ONST LPTIM32_CFGR_ONST_Msk + +#define LPTIM32_CFGR_TMOD_Pos (0U) +#define LPTIM32_CFGR_TMOD_Msk (0x3U << LPTIM32_CFGR_TMOD_Pos) +#define LPTIM32_CFGR_TMOD LPTIM32_CFGR_TMOD_Msk + +#define LPTIM32_IER_CCIE_Pos (0U) +#define LPTIM32_IER_CCIE_Msk (0xfU << LPTIM32_IER_CCIE_Pos) +#define LPTIM32_IER_CCIE LPTIM32_IER_CCIE_Msk + +#define LPTIM32_IER_OVIE_Pos (6U) +#define LPTIM32_IER_OVIE_Msk (0x1U << LPTIM32_IER_OVIE_Pos) +#define LPTIM32_IER_OVIE LPTIM32_IER_OVIE_Msk + +#define LPTIM32_IER_TRIGIE_Pos (7U) +#define LPTIM32_IER_TRIGIE_Msk (0x1U << LPTIM32_IER_TRIGIE_Pos) +#define LPTIM32_IER_TRIGIE LPTIM32_IER_TRIGIE_Msk + +#define LPTIM32_IER_OVRIE_Pos (8U) +#define LPTIM32_IER_OVRIE_Msk (0xfU << LPTIM32_IER_OVRIE_Pos) +#define LPTIM32_IER_OVRIE LPTIM32_IER_OVRIE_Msk + +#define LPTIM32_ISR_CCIF_Pos (0U) +#define LPTIM32_ISR_CCIF_Msk (0xfU << LPTIM32_ISR_CCIF_Pos) +#define LPTIM32_ISR_CCIF LPTIM32_ISR_CCIF_Msk + +#define LPTIM32_ISR_OVIF_Pos (6U) +#define LPTIM32_ISR_OVIF_Msk (0x1U << LPTIM32_ISR_OVIF_Pos) +#define LPTIM32_ISR_OVIF LPTIM32_ISR_OVIF_Msk + +#define LPTIM32_ISR_TRIGIF_Pos (7U) +#define LPTIM32_ISR_TRIGIF_Msk (0x1U << LPTIM32_ISR_TRIGIF_Pos) +#define LPTIM32_ISR_TRIGIF LPTIM32_ISR_TRIGIF_Msk + +#define LPTIM32_ISR_OVRIF_Pos (8U) +#define LPTIM32_ISR_OVRIF_Msk (0xfU << LPTIM32_ISR_OVRIF_Pos) +#define LPTIM32_ISR_OVRIF LPTIM32_ISR_OVRIF_Msk + +#define LPTIM32_CCSR_CAPCFG_Pos (8U) +#define LPTIM32_CCSR_CAPCFG_Msk (0x3U << LPTIM32_CCSR_CAPCFG_Pos) +#define LPTIM32_CCSR_CAPCFG LPTIM32_CCSR_CAPCFG_Msk + +#define LPTIM32_CCSR_CCS_Pos (0U) +#define LPTIM32_CCSR_CCS_Msk (0x3U << LPTIM32_CCSR_CCS_Pos) +#define LPTIM32_CCSR_CCS LPTIM32_CCSR_CCS_Msk + +#define LPTIM32_CCSR_CAPEDGE_Pos (20U) +#define LPTIM32_CCSR_CAPEDGE_Msk (0x1U << LPTIM32_CCSR_CAPEDGE_Pos) +#define LPTIM32_CCSR_CAPEDGE LPTIM32_CCSR_CAPEDGE_Msk + +#define LPTIM32_CCSR_CAP1SSEL_Pos (24U) +#define LPTIM32_CCSR_CAP1SSEL_Msk (0x3U << LPTIM32_CCSR_CAP1SSEL_Pos) +#define LPTIM32_CCSR_CAP1SSEL LPTIM32_CCSR_CAP1SSEL_Msk + +#define LPTIM32_CCSR_POLAR_Pos (16U) +#define LPTIM32_CCSR_POLAR_Msk (0x1U << LPTIM32_CCSR_POLAR_Pos) +#define LPTIM32_CCSR_POLAR LPTIM32_CCSR_POLAR_Msk + +#define LPTIM32_CFGR_MMS_Pos (16U) +#define LPTIM32_CFGR_MMS_Msk (0x7U << LPTIM32_CFGR_MMS_Pos) +#define LPTIM32_CFGR_MMS LPTIM32_CFGR_MMS_Msk + + + +#define FL_LPTIM32_CHANNEL_1 (0x1U << 0U) +#define FL_LPTIM32_CHANNEL_2 (0x1U << 1U) +#define FL_LPTIM32_CHANNEL_3 (0x1U << 2U) +#define FL_LPTIM32_CHANNEL_4 (0x1U << 3U) + + + +#define FL_LPTIM32_CLK_SOURCE_INTERNAL (0x0U << LPTIM32_CFGR_PSCSEL_Pos) +#define FL_LPTIM32_CLK_SOURCE_EXTERNAL (0x1U << LPTIM32_CFGR_PSCSEL_Pos) + + +#define FL_LPTIM32_PSC_DIV1 (0x0U << LPTIM32_CFGR_DIVSEL_Pos) +#define FL_LPTIM32_PSC_DIV2 (0x1U << LPTIM32_CFGR_DIVSEL_Pos) +#define FL_LPTIM32_PSC_DIV4 (0x2U << LPTIM32_CFGR_DIVSEL_Pos) +#define FL_LPTIM32_PSC_DIV8 (0x3U << LPTIM32_CFGR_DIVSEL_Pos) +#define FL_LPTIM32_PSC_DIV16 (0x4U << LPTIM32_CFGR_DIVSEL_Pos) +#define FL_LPTIM32_PSC_DIV32 (0x5U << LPTIM32_CFGR_DIVSEL_Pos) +#define FL_LPTIM32_PSC_DIV64 (0x6U << LPTIM32_CFGR_DIVSEL_Pos) +#define FL_LPTIM32_PSC_DIV128 (0x7U << LPTIM32_CFGR_DIVSEL_Pos) + + +#define FL_LPTIM32_ETR_COUNT_EDGE_RISING (0x0U << LPTIM32_CFGR_EDGESEL_Pos) +#define FL_LPTIM32_ETR_COUNT_EDGE_FALLING (0x1U << LPTIM32_CFGR_EDGESEL_Pos) + + +#define FL_LPTIM32_ETR_TRIGGER_EDGE_RISING (0x0U << LPTIM32_CFGR_TRIGCFG_Pos) +#define FL_LPTIM32_ETR_TRIGGER_EDGE_FALLING (0x1U << LPTIM32_CFGR_TRIGCFG_Pos) +#define FL_LPTIM32_ETR_TRIGGER_EDGE_BOTH (0x2U << LPTIM32_CFGR_TRIGCFG_Pos) + + +#define FL_LPTIM32_ONE_PULSE_MODE_CONTINUOUS (0x0U << LPTIM32_CFGR_ONST_Pos) +#define FL_LPTIM32_ONE_PULSE_MODE_SINGLE (0x1U << LPTIM32_CFGR_ONST_Pos) + + +#define FL_LPTIM32_OPERATION_MODE_NORMAL (0x0U << LPTIM32_CFGR_TMOD_Pos) +#define FL_LPTIM32_OPERATION_MODE_EXTERNAL_TRIGGER_CNT (0x1U << LPTIM32_CFGR_TMOD_Pos) +#define FL_LPTIM32_OPERATION_MODE_EXTERNAL_ASYNC_PULSE_CNT (0x2U << LPTIM32_CFGR_TMOD_Pos) +#define FL_LPTIM32_OPERATION_MODE_TIMEOUT (0x3U << LPTIM32_CFGR_TMOD_Pos) + + +#define FL_LPTIM32_IC_EDGE_RISING (0x0U << LPTIM32_CCSR_CAPCFG_Pos) +#define FL_LPTIM32_IC_EDGE_FALLING (0x1U << LPTIM32_CCSR_CAPCFG_Pos) +#define FL_LPTIM32_IC_EDGE_BOTH (0x2U << LPTIM32_CCSR_CAPCFG_Pos) + + +#define FL_LPTIM32_CHANNEL_MODE_DISABLE (0x0U << LPTIM32_CCSR_CCS_Pos) +#define FL_LPTIM32_CHANNEL_MODE_INPUT (0x1U << LPTIM32_CCSR_CCS_Pos) +#define FL_LPTIM32_CHANNEL_MODE_OUTPUT (0x2U << LPTIM32_CCSR_CCS_Pos) + + +#define FL_LPTIM32_IC_CAPTURED_EDGE_RISING (0x0U << LPTIM32_CCSR_CAPEDGE_Pos) +#define FL_LPTIM32_IC_CAPTURED_EDGE_FALLING (0x1U << LPTIM32_CCSR_CAPEDGE_Pos) + +#define FL_LPTIM32_IC1_CAPTURE_SOURCE_GROUP0 (0x0U << LPTIM32_CCSR_CAP1SSEL_Pos) +#define FL_LPTIM32_IC1_CAPTURE_SOURCE_GROUP1 (0x1U << LPTIM32_CCSR_CAP1SSEL_Pos) +#define FL_LPTIM32_IC1_CAPTURE_SOURCE_GROUP2 (0x2U << LPTIM32_CCSR_CAP1SSEL_Pos) +#define FL_LPTIM32_IC1_CAPTURE_SOURCE_GROUP3 (0x3U << LPTIM32_CCSR_CAP1SSEL_Pos) + + +#define FL_LPTIM32_OC_POLARITY_NORMAL (0x0U << LPTIM32_CCSR_POLAR_Pos) +#define FL_LPTIM32_OC_POLARITY_INVERT (0x1U << LPTIM32_CCSR_POLAR_Pos) + + +#define FL_LPTIM32_TRGO_ENABLE (0x1U << LPTIM32_CFGR_MMS_Pos) +#define FL_LPTIM32_TRGO_UPDATE (0x2U << LPTIM32_CFGR_MMS_Pos) +#define FL_LPTIM32_TRGO_OC1REF (0x3U << LPTIM32_CFGR_MMS_Pos) +#define FL_LPTIM32_TRGO_IC1 (0x4U << LPTIM32_CFGR_MMS_Pos) +#define FL_LPTIM32_TRGO_IC2 (0x5U << LPTIM32_CFGR_MMS_Pos) +#define FL_LPTIM32_TRGO_IC3 (0x6U << LPTIM32_CFGR_MMS_Pos) +#define FL_LPTIM32_TRGO_IC4 (0x7U << LPTIM32_CFGR_MMS_Pos) + + +/** + * @} + */ +/* Exported functions ---------------------------------------------------------------------------------*/ +/** @defgroup LPTIM32_FL_Exported_Functions LPTIM32 Exported Functions + * @{ + */ + +/** + * @brief Enable LPTIM32 + * @rmtoll CR EN FL_LPTIM32_Enable + * @param LPTIM32x LPTIM32 instance + * @retval None + */ +__STATIC_INLINE void FL_LPTIM32_Enable(LPTIM32_Type *LPTIM32x) +{ + SET_BIT(LPTIM32x->CR, LPTIM32_CR_EN_Msk); +} + +/** + * @brief Disable LPTIM32 + * @rmtoll CR EN FL_LPTIM32_Disable + * @param LPTIM32x LPTIM32 instance + * @retval None + */ +__STATIC_INLINE void FL_LPTIM32_Disable(LPTIM32_Type *LPTIM32x) +{ + CLEAR_BIT(LPTIM32x->CR, LPTIM32_CR_EN_Msk); +} + +/** + * @brief Get LPTIM32 Enable Status + * @rmtoll CR EN FL_LPTIM32_IsEnabled + * @param LPTIM32x LPTIM32 instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_LPTIM32_IsEnabled(LPTIM32_Type *LPTIM32x) +{ + return (uint32_t)(READ_BIT(LPTIM32x->CR, LPTIM32_CR_EN_Msk) == LPTIM32_CR_EN_Msk); +} + +/** + * @brief Enable External Input Analog Filter + * @rmtoll CFGR ETR_AFEN FL_LPTIM32_EnableETRFilter + * @param LPTIM32x LPTIM32 instance + * @retval None + */ +__STATIC_INLINE void FL_LPTIM32_EnableETRFilter(LPTIM32_Type *LPTIM32x) +{ + SET_BIT(LPTIM32x->CFGR, LPTIM32_CFGR_ETR_AFEN_Msk); +} + +/** + * @brief Disable External Input Analog Filter + * @rmtoll CFGR ETR_AFEN FL_LPTIM32_DisableETRFilter + * @param LPTIM32x LPTIM32 instance + * @retval None + */ +__STATIC_INLINE void FL_LPTIM32_DisableETRFilter(LPTIM32_Type *LPTIM32x) +{ + CLEAR_BIT(LPTIM32x->CFGR, LPTIM32_CFGR_ETR_AFEN_Msk); +} + +/** + * @brief Get External Input Analog Filter Enable Status + * @rmtoll CFGR ETR_AFEN FL_LPTIM32_IsEnabledETRFilter + * @param LPTIM32x LPTIM32 instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_LPTIM32_IsEnabledETRFilter(LPTIM32_Type *LPTIM32x) +{ + return (uint32_t)(READ_BIT(LPTIM32x->CFGR, LPTIM32_CFGR_ETR_AFEN_Msk) == LPTIM32_CFGR_ETR_AFEN_Msk); +} + +/** + * @brief Set Clock Source + * @rmtoll CFGR PSCSEL FL_LPTIM32_SetClockSource + * @param LPTIM32x LPTIM32 instance + * @param source This parameter can be one of the following values: + * @arg @ref FL_LPTIM32_CLK_SOURCE_INTERNAL + * @arg @ref FL_LPTIM32_CLK_SOURCE_EXTERNAL + * @retval None + */ +__STATIC_INLINE void FL_LPTIM32_SetClockSource(LPTIM32_Type *LPTIM32x, uint32_t source) +{ + MODIFY_REG(LPTIM32x->CFGR, LPTIM32_CFGR_PSCSEL_Msk, source); +} + +/** + * @brief Get Clock Source Setting + * @rmtoll CFGR PSCSEL FL_LPTIM32_GetClockSource + * @param LPTIM32x LPTIM32 instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_LPTIM32_CLK_SOURCE_INTERNAL + * @arg @ref FL_LPTIM32_CLK_SOURCE_EXTERNAL + */ +__STATIC_INLINE uint32_t FL_LPTIM32_GetClockSource(LPTIM32_Type *LPTIM32x) +{ + return (uint32_t)(READ_BIT(LPTIM32x->CFGR, LPTIM32_CFGR_PSCSEL_Msk)); +} + +/** + * @brief Set Counter Clock Prescaler + * @rmtoll CFGR DIVSEL FL_LPTIM32_SetPrescaler + * @param LPTIM32x LPTIM32 instance + * @param psc This parameter can be one of the following values: + * @arg @ref FL_LPTIM32_PSC_DIV1 + * @arg @ref FL_LPTIM32_PSC_DIV2 + * @arg @ref FL_LPTIM32_PSC_DIV4 + * @arg @ref FL_LPTIM32_PSC_DIV8 + * @arg @ref FL_LPTIM32_PSC_DIV16 + * @arg @ref FL_LPTIM32_PSC_DIV32 + * @arg @ref FL_LPTIM32_PSC_DIV64 + * @arg @ref FL_LPTIM32_PSC_DIV128 + * @retval None + */ +__STATIC_INLINE void FL_LPTIM32_SetPrescaler(LPTIM32_Type *LPTIM32x, uint32_t psc) +{ + MODIFY_REG(LPTIM32x->CFGR, LPTIM32_CFGR_DIVSEL_Msk, psc); +} + +/** + * @brief Get Counter Clock Prescaler Setting + * @rmtoll CFGR DIVSEL FL_LPTIM32_GetPrescaler + * @param LPTIM32x LPTIM32 instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_LPTIM32_PSC_DIV1 + * @arg @ref FL_LPTIM32_PSC_DIV2 + * @arg @ref FL_LPTIM32_PSC_DIV4 + * @arg @ref FL_LPTIM32_PSC_DIV8 + * @arg @ref FL_LPTIM32_PSC_DIV16 + * @arg @ref FL_LPTIM32_PSC_DIV32 + * @arg @ref FL_LPTIM32_PSC_DIV64 + * @arg @ref FL_LPTIM32_PSC_DIV128 + */ +__STATIC_INLINE uint32_t FL_LPTIM32_GetPrescaler(LPTIM32_Type *LPTIM32x) +{ + return (uint32_t)(READ_BIT(LPTIM32x->CFGR, LPTIM32_CFGR_DIVSEL_Msk)); +} + +/** + * @brief Set ETR Count Edge + * @rmtoll CFGR EDGESEL FL_LPTIM32_SetETRCountEdge + * @param LPTIM32x LPTIM32 instance + * @param edge This parameter can be one of the following values: + * @arg @ref FL_LPTIM32_ETR_COUNT_EDGE_RISING + * @arg @ref FL_LPTIM32_ETR_COUNT_EDGE_FALLING + * @retval None + */ +__STATIC_INLINE void FL_LPTIM32_SetETRCountEdge(LPTIM32_Type *LPTIM32x, uint32_t edge) +{ + MODIFY_REG(LPTIM32x->CFGR, LPTIM32_CFGR_EDGESEL_Msk, edge); +} + +/** + * @brief Get ETR Count Edge Setting + * @rmtoll CFGR EDGESEL FL_LPTIM32_GetETRCountEdge + * @param LPTIM32x LPTIM32 instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_LPTIM32_ETR_COUNT_EDGE_RISING + * @arg @ref FL_LPTIM32_ETR_COUNT_EDGE_FALLING + */ +__STATIC_INLINE uint32_t FL_LPTIM32_GetETRCountEdge(LPTIM32_Type *LPTIM32x) +{ + return (uint32_t)(READ_BIT(LPTIM32x->CFGR, LPTIM32_CFGR_EDGESEL_Msk)); +} + +/** + * @brief Set ETR Trigger Edge + * @rmtoll CFGR TRIGCFG FL_LPTIM32_SetETRTriggerEdge + * @param LPTIM32x LPTIM32 instance + * @param edge This parameter can be one of the following values: + * @arg @ref FL_LPTIM32_ETR_TRIGGER_EDGE_RISING + * @arg @ref FL_LPTIM32_ETR_TRIGGER_EDGE_FALLING + * @arg @ref FL_LPTIM32_ETR_TRIGGER_EDGE_BOTH + * @retval None + */ +__STATIC_INLINE void FL_LPTIM32_SetETRTriggerEdge(LPTIM32_Type *LPTIM32x, uint32_t edge) +{ + MODIFY_REG(LPTIM32x->CFGR, LPTIM32_CFGR_TRIGCFG_Msk, edge); +} + +/** + * @brief Get ETR Trigger Edge Setting + * @rmtoll CFGR TRIGCFG FL_LPTIM32_GetETRTriggerEdge + * @param LPTIM32x LPTIM32 instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_LPTIM32_ETR_TRIGGER_EDGE_RISING + * @arg @ref FL_LPTIM32_ETR_TRIGGER_EDGE_FALLING + * @arg @ref FL_LPTIM32_ETR_TRIGGER_EDGE_BOTH + */ +__STATIC_INLINE uint32_t FL_LPTIM32_GetETRTriggerEdge(LPTIM32_Type *LPTIM32x) +{ + return (uint32_t)(READ_BIT(LPTIM32x->CFGR, LPTIM32_CFGR_TRIGCFG_Msk)); +} + +/** + * @brief Set One Pulse Mode + * @rmtoll CFGR ONST FL_LPTIM32_SetOnePulseMode + * @param LPTIM32x LPTIM32 instance + * @param mode This parameter can be one of the following values: + * @arg @ref FL_LPTIM32_ONE_PULSE_MODE_CONTINUOUS + * @arg @ref FL_LPTIM32_ONE_PULSE_MODE_SINGLE + * @retval None + */ +__STATIC_INLINE void FL_LPTIM32_SetOnePulseMode(LPTIM32_Type *LPTIM32x, uint32_t mode) +{ + MODIFY_REG(LPTIM32x->CFGR, LPTIM32_CFGR_ONST_Msk, mode); +} + +/** + * @brief Get One Pulse Mode Setting + * @rmtoll CFGR ONST FL_LPTIM32_GetOnePulseMode + * @param LPTIM32x LPTIM32 instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_LPTIM32_ONE_PULSE_MODE_CONTINUOUS + * @arg @ref FL_LPTIM32_ONE_PULSE_MODE_SINGLE + */ +__STATIC_INLINE uint32_t FL_LPTIM32_GetOnePulseMode(LPTIM32_Type *LPTIM32x) +{ + return (uint32_t)(READ_BIT(LPTIM32x->CFGR, LPTIM32_CFGR_ONST_Msk)); +} + +/** + * @brief Set Operation Mode + * @rmtoll CFGR TMOD FL_LPTIM32_SetOperationMode + * @param LPTIM32x LPTIM32 instance + * @param mode This parameter can be one of the following values: + * @arg @ref FL_LPTIM32_OPERATION_MODE_NORMAL + * @arg @ref FL_LPTIM32_OPERATION_MODE_EXTERNAL_TRIGGER_CNT + * @arg @ref FL_LPTIM32_OPERATION_MODE_EXTERNAL_ASYNC_PULSE_CNT + * @arg @ref FL_LPTIM32_OPERATION_MODE_TIMEOUT + * @retval None + */ +__STATIC_INLINE void FL_LPTIM32_SetOperationMode(LPTIM32_Type *LPTIM32x, uint32_t mode) +{ + MODIFY_REG(LPTIM32x->CFGR, LPTIM32_CFGR_TMOD_Msk, mode); +} + +/** + * @brief Get Operation Mode Setting + * @rmtoll CFGR TMOD FL_LPTIM32_GetOperationMode + * @param LPTIM32x LPTIM32 instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_LPTIM32_OPERATION_MODE_NORMAL + * @arg @ref FL_LPTIM32_OPERATION_MODE_EXTERNAL_TRIGGER_CNT + * @arg @ref FL_LPTIM32_OPERATION_MODE_EXTERNAL_ASYNC_PULSE_CNT + * @arg @ref FL_LPTIM32_OPERATION_MODE_TIMEOUT + */ +__STATIC_INLINE uint32_t FL_LPTIM32_GetOperationMode(LPTIM32_Type *LPTIM32x) +{ + return (uint32_t)(READ_BIT(LPTIM32x->CFGR, LPTIM32_CFGR_TMOD_Msk)); +} + +/** + * @brief Set Channel 1 Output Compare Value + * @rmtoll CCR1 FL_LPTIM32_WriteCompareCH1 + * @param LPTIM32x LPTIM32 instance + * @param compareVal + * @retval None + */ +__STATIC_INLINE void FL_LPTIM32_WriteCompareCH1(LPTIM32_Type *LPTIM32x, uint32_t compareVal) +{ + MODIFY_REG(LPTIM32x->CCR1, (0xffffffffU << 0U), (compareVal << 0U)); +} + +/** + * @brief Get Channel 1 Output Compare Value + * @rmtoll CCR1 FL_LPTIM32_ReadCompareCH1 + * @param LPTIM32x LPTIM32 instance + * @retval + */ +__STATIC_INLINE uint32_t FL_LPTIM32_ReadCompareCH1(LPTIM32_Type *LPTIM32x) +{ + return (uint32_t)(READ_BIT(LPTIM32x->CCR1, (0xffffffffU << 0U)) >> 0U); +} + +/** + * @brief Set Channel 2 Output Compare Value + * @rmtoll CCR2 FL_LPTIM32_WriteCompareCH2 + * @param LPTIM32x LPTIM32 instance + * @param compareVal + * @retval None + */ +__STATIC_INLINE void FL_LPTIM32_WriteCompareCH2(LPTIM32_Type *LPTIM32x, uint32_t compareVal) +{ + MODIFY_REG(LPTIM32x->CCR2, (0xffffffffU << 0U), (compareVal << 0U)); +} + +/** + * @brief Get Channel 2 Output Compare Value + * @rmtoll CCR2 FL_LPTIM32_ReadCompareCH2 + * @param LPTIM32x LPTIM32 instance + * @retval + */ +__STATIC_INLINE uint32_t FL_LPTIM32_ReadCompareCH2(LPTIM32_Type *LPTIM32x) +{ + return (uint32_t)(READ_BIT(LPTIM32x->CCR2, (0xffffffffU << 0U)) >> 0U); +} + +/** + * @brief Set Channel 3 Output Compare Value + * @rmtoll CCR3 FL_LPTIM32_WriteCompareCH3 + * @param LPTIM32x LPTIM32 instance + * @param compareVal + * @retval None + */ +__STATIC_INLINE void FL_LPTIM32_WriteCompareCH3(LPTIM32_Type *LPTIM32x, uint32_t compareVal) +{ + MODIFY_REG(LPTIM32x->CCR3, (0xffffffffU << 0U), (compareVal << 0U)); +} + +/** + * @brief Get Channel 3 Output Compare Value + * @rmtoll CCR3 FL_LPTIM32_ReadCompareCH3 + * @param LPTIM32x LPTIM32 instance + * @retval + */ +__STATIC_INLINE uint32_t FL_LPTIM32_ReadCompareCH3(LPTIM32_Type *LPTIM32x) +{ + return (uint32_t)(READ_BIT(LPTIM32x->CCR3, (0xffffffffU << 0U)) >> 0U); +} + +/** + * @brief Set Channel 4 Output Compare Value + * @rmtoll CCR4 FL_LPTIM32_WriteCompareCH4 + * @param LPTIM32x LPTIM32 instance + * @param compareVal + * @retval None + */ +__STATIC_INLINE void FL_LPTIM32_WriteCompareCH4(LPTIM32_Type *LPTIM32x, uint32_t compareVal) +{ + MODIFY_REG(LPTIM32x->CCR4, (0xffffffffU << 0U), (compareVal << 0U)); +} + +/** + * @brief Get Channel 4 Output Compare Value + * @rmtoll CCR4 FL_LPTIM32_ReadCompareCH4 + * @param LPTIM32x LPTIM32 instance + * @retval + */ +__STATIC_INLINE uint32_t FL_LPTIM32_ReadCompareCH4(LPTIM32_Type *LPTIM32x) +{ + return (uint32_t)(READ_BIT(LPTIM32x->CCR4, (0xffffffffU << 0U)) >> 0U); +} + +/** + * @brief Get Channel 1 Input Capture Value + * @rmtoll CCR1 FL_LPTIM32_ReadCaptureCH1 + * @param LPTIM32x LPTIM32 instance + * @retval + */ +__STATIC_INLINE uint32_t FL_LPTIM32_ReadCaptureCH1(LPTIM32_Type *LPTIM32x) +{ + return (uint32_t)(READ_BIT(LPTIM32x->CCR1, (0xffffffffU << 0U)) >> 0U); +} + +/** + * @brief Get Channel 2 Input Capture Value + * @rmtoll CCR2 FL_LPTIM32_ReadCaptureCH2 + * @param LPTIM32x LPTIM32 instance + * @retval + */ +__STATIC_INLINE uint32_t FL_LPTIM32_ReadCaptureCH2(LPTIM32_Type *LPTIM32x) +{ + return (uint32_t)(READ_BIT(LPTIM32x->CCR2, (0xffffffffU << 0U)) >> 0U); +} + +/** + * @brief Get Channel 3 Input Capture Value + * @rmtoll CCR3 FL_LPTIM32_ReadCaptureCH3 + * @param LPTIM32x LPTIM32 instance + * @retval + */ +__STATIC_INLINE uint32_t FL_LPTIM32_ReadCaptureCH3(LPTIM32_Type *LPTIM32x) +{ + return (uint32_t)(READ_BIT(LPTIM32x->CCR3, (0xffffffffU << 0U)) >> 0U); +} + +/** + * @brief Get Channel 4 Input Capture Value + * @rmtoll CCR4 FL_LPTIM32_ReadCaptureCH4 + * @param LPTIM32x LPTIM32 instance + * @retval + */ +__STATIC_INLINE uint32_t FL_LPTIM32_ReadCaptureCH4(LPTIM32_Type *LPTIM32x) +{ + return (uint32_t)(READ_BIT(LPTIM32x->CCR4, (0xffffffffU << 0U)) >> 0U); +} + +/** + * @brief Enable Channel Capture/Compare Interrupt + * @rmtoll IER CCIE FL_LPTIM32_EnableIT_CC + * @param LPTIM32x LPTIM32 instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_LPTIM32_CHANNEL_1 + * @arg @ref FL_LPTIM32_CHANNEL_2 + * @arg @ref FL_LPTIM32_CHANNEL_3 + * @arg @ref FL_LPTIM32_CHANNEL_4 + * @retval None + */ +__STATIC_INLINE void FL_LPTIM32_EnableIT_CC(LPTIM32_Type *LPTIM32x, uint32_t channel) +{ + SET_BIT(LPTIM32x->IER, ((channel & 0xf) << 0x0U)); +} + +/** + * @brief Enable Update Event Interrupt + * @rmtoll IER OVIE FL_LPTIM32_EnableIT_Update + * @param LPTIM32x LPTIM32 instance + * @retval None + */ +__STATIC_INLINE void FL_LPTIM32_EnableIT_Update(LPTIM32_Type *LPTIM32x) +{ + SET_BIT(LPTIM32x->IER, LPTIM32_IER_OVIE_Msk); +} + +/** + * @brief Enable External Trigger Interrupt + * @rmtoll IER TRIGIE FL_LPTIM32_EnableIT_Trigger + * @param LPTIM32x LPTIM32 instance + * @retval None + */ +__STATIC_INLINE void FL_LPTIM32_EnableIT_Trigger(LPTIM32_Type *LPTIM32x) +{ + SET_BIT(LPTIM32x->IER, LPTIM32_IER_TRIGIE_Msk); +} + +/** + * @brief Enable Channel Capture Overflow Interrupt + * @rmtoll IER OVRIE FL_LPTIM32_EnableIT_CCOverflow + * @param LPTIM32x LPTIM32 instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_LPTIM32_CHANNEL_1 + * @arg @ref FL_LPTIM32_CHANNEL_2 + * @arg @ref FL_LPTIM32_CHANNEL_3 + * @arg @ref FL_LPTIM32_CHANNEL_4 + * @retval None + */ +__STATIC_INLINE void FL_LPTIM32_EnableIT_CCOverflow(LPTIM32_Type *LPTIM32x, uint32_t channel) +{ + SET_BIT(LPTIM32x->IER, ((channel & 0xf) << 0x8U)); +} + +/** + * @brief Disable Channel Capture/Compare Interrupt + * @rmtoll IER CCIE FL_LPTIM32_DisableIT_CC + * @param LPTIM32x LPTIM32 instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_LPTIM32_CHANNEL_1 + * @arg @ref FL_LPTIM32_CHANNEL_2 + * @arg @ref FL_LPTIM32_CHANNEL_3 + * @arg @ref FL_LPTIM32_CHANNEL_4 + * @retval None + */ +__STATIC_INLINE void FL_LPTIM32_DisableIT_CC(LPTIM32_Type *LPTIM32x, uint32_t channel) +{ + CLEAR_BIT(LPTIM32x->IER, ((channel & 0xf) << 0x0U)); +} + +/** + * @brief Disable Update Event Interrupt + * @rmtoll IER OVIE FL_LPTIM32_DisableIT_Update + * @param LPTIM32x LPTIM32 instance + * @retval None + */ +__STATIC_INLINE void FL_LPTIM32_DisableIT_Update(LPTIM32_Type *LPTIM32x) +{ + CLEAR_BIT(LPTIM32x->IER, LPTIM32_IER_OVIE_Msk); +} + +/** + * @brief Disable External Trigger Interrupt + * @rmtoll IER TRIGIE FL_LPTIM32_DisableIT_Trigger + * @param LPTIM32x LPTIM32 instance + * @retval None + */ +__STATIC_INLINE void FL_LPTIM32_DisableIT_Trigger(LPTIM32_Type *LPTIM32x) +{ + CLEAR_BIT(LPTIM32x->IER, LPTIM32_IER_TRIGIE_Msk); +} + +/** + * @brief Disable Channel Capture Overflow Interrupt + * @rmtoll IER OVRIE FL_LPTIM32_DisableIT_CCOverflow + * @param LPTIM32x LPTIM32 instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_LPTIM32_CHANNEL_1 + * @arg @ref FL_LPTIM32_CHANNEL_2 + * @arg @ref FL_LPTIM32_CHANNEL_3 + * @arg @ref FL_LPTIM32_CHANNEL_4 + * @retval None + */ +__STATIC_INLINE void FL_LPTIM32_DisableIT_CCOverflow(LPTIM32_Type *LPTIM32x, uint32_t channel) +{ + CLEAR_BIT(LPTIM32x->IER, ((channel & 0xf) << 0x8U)); +} + +/** + * @brief Get Channel Capture/Compare Interrupt Enable Status + * @rmtoll IER CCIE FL_LPTIM32_IsEnabledIT_CC + * @param LPTIM32x LPTIM32 instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_LPTIM32_CHANNEL_1 + * @arg @ref FL_LPTIM32_CHANNEL_2 + * @arg @ref FL_LPTIM32_CHANNEL_3 + * @arg @ref FL_LPTIM32_CHANNEL_4 + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_LPTIM32_IsEnabledIT_CC(LPTIM32_Type *LPTIM32x, uint32_t channel) +{ + return (uint32_t)(READ_BIT(LPTIM32x->IER, ((channel & 0xf) << 0x0U)) == ((channel & 0xf) << 0x0U)); +} + +/** + * @brief Get Counter Update Event Interrupt Enable Status + * @rmtoll IER OVIE FL_LPTIM32_IsEnabledIT_Update + * @param LPTIM32x LPTIM32 instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_LPTIM32_IsEnabledIT_Update(LPTIM32_Type *LPTIM32x) +{ + return (uint32_t)(READ_BIT(LPTIM32x->IER, LPTIM32_IER_OVIE_Msk) == LPTIM32_IER_OVIE_Msk); +} + +/** + * @brief Get External Trigger Interrupt Enable Status + * @rmtoll IER TRIGIE FL_LPTIM32_IsEnabledIT_Trigger + * @param LPTIM32x LPTIM32 instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_LPTIM32_IsEnabledIT_Trigger(LPTIM32_Type *LPTIM32x) +{ + return (uint32_t)(READ_BIT(LPTIM32x->IER, LPTIM32_IER_TRIGIE_Msk) == LPTIM32_IER_TRIGIE_Msk); +} + +/** + * @brief Get Channel Capture Overflow Interrupt Enable Status + * @rmtoll IER OVRIE FL_LPTIM32_IsEnabledIT_CCOverflow + * @param LPTIM32x LPTIM32 instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_LPTIM32_CHANNEL_1 + * @arg @ref FL_LPTIM32_CHANNEL_2 + * @arg @ref FL_LPTIM32_CHANNEL_3 + * @arg @ref FL_LPTIM32_CHANNEL_4 + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_LPTIM32_IsEnabledIT_CCOverflow(LPTIM32_Type *LPTIM32x, uint32_t channel) +{ + return (uint32_t)(READ_BIT(LPTIM32x->IER, ((channel & 0xf) << 0x8U)) == ((channel & 0xf) << 0x8U)); +} + +/** + * @brief Get Capture/Compare Channel Interrupt Flag + * @rmtoll ISR CCIF FL_LPTIM32_IsActiveFlag_CC + * @param LPTIM32x LPTIM32 instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_LPTIM32_CHANNEL_1 + * @arg @ref FL_LPTIM32_CHANNEL_2 + * @arg @ref FL_LPTIM32_CHANNEL_3 + * @arg @ref FL_LPTIM32_CHANNEL_4 + * @retval Returned value can be one of the following values: + */ +__STATIC_INLINE uint32_t FL_LPTIM32_IsActiveFlag_CC(LPTIM32_Type *LPTIM32x, uint32_t channel) +{ + return (uint32_t)(READ_BIT(LPTIM32x->ISR, ((channel & 0xf) << 0x0U)) == ((channel & 0xf) << 0x0U)); +} + +/** + * @brief Get Update Event Interrupt Flag + * @rmtoll ISR OVIF FL_LPTIM32_IsActiveFlag_Update + * @param LPTIM32x LPTIM32 instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_LPTIM32_IsActiveFlag_Update(LPTIM32_Type *LPTIM32x) +{ + return (uint32_t)(READ_BIT(LPTIM32x->ISR, LPTIM32_ISR_OVIF_Msk) == (LPTIM32_ISR_OVIF_Msk)); +} + +/** + * @brief Get External Trigger Interrupt Flag + * @rmtoll ISR TRIGIF FL_LPTIM32_IsActiveFlag_Trigger + * @param LPTIM32x LPTIM32 instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_LPTIM32_IsActiveFlag_Trigger(LPTIM32_Type *LPTIM32x) +{ + return (uint32_t)(READ_BIT(LPTIM32x->ISR, LPTIM32_ISR_TRIGIF_Msk) == (LPTIM32_ISR_TRIGIF_Msk)); +} + +/** + * @brief Get Channel Capture Overflow Interrupt Flag + * @rmtoll ISR OVRIF FL_LPTIM32_IsActiveFlag_CCOverflow + * @param LPTIM32x LPTIM32 instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_LPTIM32_CHANNEL_1 + * @arg @ref FL_LPTIM32_CHANNEL_2 + * @arg @ref FL_LPTIM32_CHANNEL_3 + * @arg @ref FL_LPTIM32_CHANNEL_4 + * @retval Returned value can be one of the following values: + */ +__STATIC_INLINE uint32_t FL_LPTIM32_IsActiveFlag_CCOverflow(LPTIM32_Type *LPTIM32x, uint32_t channel) +{ + return (uint32_t)(READ_BIT(LPTIM32x->ISR, ((channel & 0xf) << 0x8U)) == ((channel & 0xf) << 0x8U)); +} + +/** + * @brief Clear Capture/Compare Channel Interrupt Flag + * @rmtoll ISR CCIF FL_LPTIM32_ClearFlag_CC + * @param LPTIM32x LPTIM32 instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_LPTIM32_CHANNEL_1 + * @arg @ref FL_LPTIM32_CHANNEL_2 + * @arg @ref FL_LPTIM32_CHANNEL_3 + * @arg @ref FL_LPTIM32_CHANNEL_4 + * @retval None + */ +__STATIC_INLINE void FL_LPTIM32_ClearFlag_CC(LPTIM32_Type *LPTIM32x, uint32_t channel) +{ + WRITE_REG(LPTIM32x->ISR, ((channel & 0xf) << 0x0U)); +} + +/** + * @brief Clear Update Event Interrupt Flag + * @rmtoll ISR OVIF FL_LPTIM32_ClearFlag_Update + * @param LPTIM32x LPTIM32 instance + * @retval None + */ +__STATIC_INLINE void FL_LPTIM32_ClearFlag_Update(LPTIM32_Type *LPTIM32x) +{ + WRITE_REG(LPTIM32x->ISR, LPTIM32_ISR_OVIF_Msk); +} + +/** + * @brief Clear External Trigger Interrupt Flag + * @rmtoll ISR TRIGIF FL_LPTIM32_ClearFlag_Trigger + * @param LPTIM32x LPTIM32 instance + * @retval None + */ +__STATIC_INLINE void FL_LPTIM32_ClearFlag_Trigger(LPTIM32_Type *LPTIM32x) +{ + WRITE_REG(LPTIM32x->ISR, LPTIM32_ISR_TRIGIF_Msk); +} + +/** + * @brief Clear Channel Capture Overflow Interrupt Flag + * @rmtoll ISR OVRIF FL_LPTIM32_ClearFlag_CCOverflow + * @param LPTIM32x LPTIM32 instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_LPTIM32_CHANNEL_1 + * @arg @ref FL_LPTIM32_CHANNEL_2 + * @arg @ref FL_LPTIM32_CHANNEL_3 + * @arg @ref FL_LPTIM32_CHANNEL_4 + * @retval None + */ +__STATIC_INLINE void FL_LPTIM32_ClearFlag_CCOverflow(LPTIM32_Type *LPTIM32x, uint32_t channel) +{ + WRITE_REG(LPTIM32x->ISR, ((channel & 0xf) << 0x8U)); +} + +/** + * @brief Set Auto Reload Value + * @rmtoll ARR FL_LPTIM32_WriteAutoReload + * @param LPTIM32x LPTIM32 instance + * @param autoReload + * @retval None + */ +__STATIC_INLINE void FL_LPTIM32_WriteAutoReload(LPTIM32_Type *LPTIM32x, uint32_t autoReload) +{ + MODIFY_REG(LPTIM32x->ARR, (0xffffffffU << 0U), (autoReload << 0U)); +} + +/** + * @brief Get Auto Reload Value + * @rmtoll ARR FL_LPTIM32_ReadAutoReload + * @param LPTIM32x LPTIM32 instance + * @retval + */ +__STATIC_INLINE uint32_t FL_LPTIM32_ReadAutoReload(LPTIM32_Type *LPTIM32x) +{ + return (uint32_t)(READ_BIT(LPTIM32x->ARR, (0xffffffffU << 0U)) >> 0U); +} + +/** + * @brief Set Input Capture Channel Capture Edge + * @rmtoll CCSR CAPCFG FL_LPTIM32_IC_SetCaptureEdge + * @param LPTIM32x LPTIM32 instance + * @param polarity This parameter can be one of the following values: + * @arg @ref FL_LPTIM32_IC_EDGE_RISING + * @arg @ref FL_LPTIM32_IC_EDGE_FALLING + * @arg @ref FL_LPTIM32_IC_EDGE_BOTH + * @param channel This parameter can be one of the following values: + * @arg @ref FL_LPTIM32_CHANNEL_1 + * @arg @ref FL_LPTIM32_CHANNEL_2 + * @arg @ref FL_LPTIM32_CHANNEL_3 + * @arg @ref FL_LPTIM32_CHANNEL_4 + * @retval None + */ +__STATIC_INLINE void FL_LPTIM32_IC_SetCaptureEdge(LPTIM32_Type *LPTIM32x, uint32_t polarity, uint32_t channel) +{ + switch(channel) + { + case FL_LPTIM32_CHANNEL_1: + MODIFY_REG(LPTIM32x->CCSR, (0x3U << 8U), (polarity << 0U)); + break; + case FL_LPTIM32_CHANNEL_2: + MODIFY_REG(LPTIM32x->CCSR, (0x3U << 10U), (polarity << 2U)); + break; + case FL_LPTIM32_CHANNEL_3: + MODIFY_REG(LPTIM32x->CCSR, (0x3U << 12U), (polarity << 4U)); + break; + case FL_LPTIM32_CHANNEL_4: + MODIFY_REG(LPTIM32x->CCSR, (0x3U << 14U), (polarity << 6U)); + break; + } +} + +/** + * @brief Get Input Capture Channel Capture Edge + * @rmtoll CCSR CAPCFG FL_LPTIM32_IC_GetCaptureEdge + * @param LPTIM32x LPTIM32 instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_LPTIM32_CHANNEL_1 + * @arg @ref FL_LPTIM32_CHANNEL_2 + * @arg @ref FL_LPTIM32_CHANNEL_3 + * @arg @ref FL_LPTIM32_CHANNEL_4 + * @retval Returned value can be one of the following values: + * @arg @ref FL_LPTIM32_IC_EDGE_RISING + * @arg @ref FL_LPTIM32_IC_EDGE_FALLING + * @arg @ref FL_LPTIM32_IC_EDGE_BOTH + */ +__STATIC_INLINE uint32_t FL_LPTIM32_IC_GetCaptureEdge(LPTIM32_Type *LPTIM32x, uint32_t channel) +{ + switch(channel) + { + case FL_LPTIM32_CHANNEL_1: + return (uint32_t)(READ_BIT(LPTIM32x->CCSR, (0x3U << 8U)) >> 0U); + case FL_LPTIM32_CHANNEL_2: + return (uint32_t)(READ_BIT(LPTIM32x->CCSR, (0x3U << 10U)) >> 2U); + case FL_LPTIM32_CHANNEL_3: + return (uint32_t)(READ_BIT(LPTIM32x->CCSR, (0x3U << 12U)) >> 4U); + case FL_LPTIM32_CHANNEL_4: + return (uint32_t)(READ_BIT(LPTIM32x->CCSR, (0x3U << 14U)) >> 6U); + default: + return 0; + } +} + +/** + * @brief Set Channel Operation Mode + * @rmtoll CCSR CCS FL_LPTIM32_SetChannelMode + * @param LPTIM32x LPTIM32 instance + * @param mode This parameter can be one of the following values: + * @arg @ref FL_LPTIM32_CHANNEL_MODE_DISABLE + * @arg @ref FL_LPTIM32_CHANNEL_MODE_INPUT + * @arg @ref FL_LPTIM32_CHANNEL_MODE_OUTPUT + * @param channel This parameter can be one of the following values: + * @arg @ref FL_LPTIM32_CHANNEL_1 + * @arg @ref FL_LPTIM32_CHANNEL_2 + * @arg @ref FL_LPTIM32_CHANNEL_3 + * @arg @ref FL_LPTIM32_CHANNEL_4 + * @retval None + */ +__STATIC_INLINE void FL_LPTIM32_SetChannelMode(LPTIM32_Type *LPTIM32x, uint32_t mode, uint32_t channel) +{ + switch(channel) + { + case FL_LPTIM32_CHANNEL_1: + MODIFY_REG(LPTIM32x->CCSR, (0x3U << 0U), (mode << 0U)); + break; + case FL_LPTIM32_CHANNEL_2: + MODIFY_REG(LPTIM32x->CCSR, (0x3U << 2U), (mode << 2U)); + break; + case FL_LPTIM32_CHANNEL_3: + MODIFY_REG(LPTIM32x->CCSR, (0x3U << 4U), (mode << 4U)); + break; + case FL_LPTIM32_CHANNEL_4: + MODIFY_REG(LPTIM32x->CCSR, (0x3U << 6U), (mode << 6U)); + break; + } +} + +/** + * @brief Get Channel Operation Mode + * @rmtoll CCSR CCS FL_LPTIM32_GetChannelMode + * @param LPTIM32x LPTIM32 instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_LPTIM32_CHANNEL_1 + * @arg @ref FL_LPTIM32_CHANNEL_2 + * @arg @ref FL_LPTIM32_CHANNEL_3 + * @arg @ref FL_LPTIM32_CHANNEL_4 + * @retval Returned value can be one of the following values: + * @arg @ref FL_LPTIM32_CHANNEL_MODE_DISABLE + * @arg @ref FL_LPTIM32_CHANNEL_MODE_INPUT + * @arg @ref FL_LPTIM32_CHANNEL_MODE_OUTPUT + */ +__STATIC_INLINE uint32_t FL_LPTIM32_GetChannelMode(LPTIM32_Type *LPTIM32x, uint32_t channel) +{ + switch(channel) + { + case FL_LPTIM32_CHANNEL_1: + return (uint32_t)(READ_BIT(LPTIM32x->CCSR, (0x3U << 0U)) >> 0U); + case FL_LPTIM32_CHANNEL_2: + return (uint32_t)(READ_BIT(LPTIM32x->CCSR, (0x3U << 2U)) >> 2U); + case FL_LPTIM32_CHANNEL_3: + return (uint32_t)(READ_BIT(LPTIM32x->CCSR, (0x3U << 4U)) >> 4U); + case FL_LPTIM32_CHANNEL_4: + return (uint32_t)(READ_BIT(LPTIM32x->CCSR, (0x3U << 6U)) >> 6U); + default: + return 0; + } +} + +/** + * @brief Get Channel Captured Edge + * @rmtoll CCSR CAPEDGE FL_LPTIM32_IC_GetCapturedEdge + * @param LPTIM32x LPTIM32 instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_LPTIM32_CHANNEL_1 + * @arg @ref FL_LPTIM32_CHANNEL_2 + * @arg @ref FL_LPTIM32_CHANNEL_3 + * @arg @ref FL_LPTIM32_CHANNEL_4 + * @retval Returned value can be one of the following values: + * @arg @ref FL_LPTIM32_IC_CAPTURED_EDGE_RISING + * @arg @ref FL_LPTIM32_IC_CAPTURED_EDGE_FALLING + */ +__STATIC_INLINE uint32_t FL_LPTIM32_IC_GetCapturedEdge(LPTIM32_Type *LPTIM32x, uint32_t channel) +{ + switch(channel) + { + case FL_LPTIM32_CHANNEL_1: + return (uint32_t)(READ_BIT(LPTIM32x->CCSR, (0x1U << 20U)) >> 0U); + case FL_LPTIM32_CHANNEL_2: + return (uint32_t)(READ_BIT(LPTIM32x->CCSR, (0x1U << 21U)) >> 1U); + case FL_LPTIM32_CHANNEL_3: + return (uint32_t)(READ_BIT(LPTIM32x->CCSR, (0x1U << 22U)) >> 2U); + case FL_LPTIM32_CHANNEL_4: + return (uint32_t)(READ_BIT(LPTIM32x->CCSR, (0x1U << 23U)) >> 3U); + default: + return 0; + } +} + +/** + * @brief Set Channel 1 Capture Source + * @rmtoll CCSR CAP1SSEL FL_LPTIM32_IC_SetChannel1CaptureSource + * @param LPTIM32x LPTIM32 instance + * @param source This parameter can be one of the following values: + * @arg @ref FL_LPTIM32_IC1_CAPTURE_SOURCE_GROUP0 + * @arg @ref FL_LPTIM32_IC1_CAPTURE_SOURCE_GROUP1 + * @arg @ref FL_LPTIM32_IC1_CAPTURE_SOURCE_GROUP2 + * @arg @ref FL_LPTIM32_IC1_CAPTURE_SOURCE_GROUP3 + * @retval None + */ +__STATIC_INLINE void FL_LPTIM32_IC_SetChannel1CaptureSource(LPTIM32_Type *LPTIM32x, uint32_t source) +{ + MODIFY_REG(LPTIM32x->CCSR, LPTIM32_CCSR_CAP1SSEL_Msk, source); +} + +/** + * @brief Get Channel 1 Capture Source Setting + * @rmtoll CCSR CAP1SSEL FL_LPTIM32_IC_GetChannel1CaptureSource + * @param LPTIM32x LPTIM32 instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_LPTIM32_IC1_CAPTURE_SOURCE_GROUP0 + * @arg @ref FL_LPTIM32_IC1_CAPTURE_SOURCE_GROUP1 + * @arg @ref FL_LPTIM32_IC1_CAPTURE_SOURCE_GROUP2 + * @arg @ref FL_LPTIM32_IC1_CAPTURE_SOURCE_GROUP3 + */ +__STATIC_INLINE uint32_t FL_LPTIM32_IC_GetChannel1CaptureSource(LPTIM32_Type *LPTIM32x) +{ + return (uint32_t)(READ_BIT(LPTIM32x->CCSR, LPTIM32_CCSR_CAP1SSEL_Msk)); +} + +/** + * @brief Set Channel Output Compare Polarity + * @rmtoll CCSR POLAR FL_LPTIM32_OC_SetPolarity + * @param LPTIM32x LPTIM32 instance + * @param polarity This parameter can be one of the following values: + * @arg @ref FL_LPTIM32_OC_POLARITY_NORMAL + * @arg @ref FL_LPTIM32_OC_POLARITY_INVERT + * @param channel This parameter can be one of the following values: + * @arg @ref FL_LPTIM32_CHANNEL_1 + * @arg @ref FL_LPTIM32_CHANNEL_2 + * @arg @ref FL_LPTIM32_CHANNEL_3 + * @arg @ref FL_LPTIM32_CHANNEL_4 + * @retval None + */ +__STATIC_INLINE void FL_LPTIM32_OC_SetPolarity(LPTIM32_Type *LPTIM32x, uint32_t polarity, uint32_t channel) +{ + switch(channel) + { + case FL_LPTIM32_CHANNEL_1: + MODIFY_REG(LPTIM32x->CCSR, (0x1U << 16U), (polarity << 0U)); + break; + case FL_LPTIM32_CHANNEL_2: + MODIFY_REG(LPTIM32x->CCSR, (0x1U << 17U), (polarity << 1U)); + break; + case FL_LPTIM32_CHANNEL_3: + MODIFY_REG(LPTIM32x->CCSR, (0x1U << 18U), (polarity << 2U)); + break; + case FL_LPTIM32_CHANNEL_4: + MODIFY_REG(LPTIM32x->CCSR, (0x1U << 19U), (polarity << 3U)); + break; + } +} + +/** + * @brief Get Channel Output Compare Polarity + * @rmtoll CCSR POLAR FL_LPTIM32_OC_GetPolarity + * @param LPTIM32x LPTIM32 instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_LPTIM32_CHANNEL_1 + * @arg @ref FL_LPTIM32_CHANNEL_2 + * @arg @ref FL_LPTIM32_CHANNEL_3 + * @arg @ref FL_LPTIM32_CHANNEL_4 + * @retval Returned value can be one of the following values: + * @arg @ref FL_LPTIM32_OC_POLARITY_NORMAL + * @arg @ref FL_LPTIM32_OC_POLARITY_INVERT + */ +__STATIC_INLINE uint32_t FL_LPTIM32_OC_GetPolarity(LPTIM32_Type *LPTIM32x, uint32_t channel) +{ + switch(channel) + { + case FL_LPTIM32_CHANNEL_1: + return (uint32_t)(READ_BIT(LPTIM32x->CCSR, (0x1U << 16U)) >> 0U); + case FL_LPTIM32_CHANNEL_2: + return (uint32_t)(READ_BIT(LPTIM32x->CCSR, (0x1U << 17U)) >> 1U); + case FL_LPTIM32_CHANNEL_3: + return (uint32_t)(READ_BIT(LPTIM32x->CCSR, (0x1U << 18U)) >> 2U); + case FL_LPTIM32_CHANNEL_4: + return (uint32_t)(READ_BIT(LPTIM32x->CCSR, (0x1U << 19U)) >> 3U); + default: + return 0; + } +} + +/** + * @brief Set Sync Trigger Signal Output Source + * @rmtoll CFGR MMS FL_LPTIM32_SetTriggerOutput + * @param LPTIM32x LPTIM32 instance + * @param triggerOutput This parameter can be one of the following values: + * @arg @ref FL_LPTIM32_TRGO_ENABLE + * @arg @ref FL_LPTIM32_TRGO_UPDATE + * @arg @ref FL_LPTIM32_TRGO_OC1REF + * @arg @ref FL_LPTIM32_TRGO_IC1 + * @arg @ref FL_LPTIM32_TRGO_IC2 + * @arg @ref FL_LPTIM32_TRGO_IC3 + * @arg @ref FL_LPTIM32_TRGO_IC4 + * @retval None + */ +__STATIC_INLINE void FL_LPTIM32_SetTriggerOutput(LPTIM32_Type *LPTIM32x, uint32_t triggerOutput) +{ + MODIFY_REG(LPTIM32x->CFGR, LPTIM32_CFGR_MMS_Msk, triggerOutput); +} + +/** + * @brief Get Sync Trigger Signal Output Source Setting + * @rmtoll CFGR MMS FL_LPTIM32_GetTriggerOutput + * @param LPTIM32x LPTIM32 instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_LPTIM32_TRGO_ENABLE + * @arg @ref FL_LPTIM32_TRGO_UPDATE + * @arg @ref FL_LPTIM32_TRGO_OC1REF + * @arg @ref FL_LPTIM32_TRGO_IC1 + * @arg @ref FL_LPTIM32_TRGO_IC2 + * @arg @ref FL_LPTIM32_TRGO_IC3 + * @arg @ref FL_LPTIM32_TRGO_IC4 + */ +__STATIC_INLINE uint32_t FL_LPTIM32_GetTriggerOutput(LPTIM32_Type *LPTIM32x) +{ + return (uint32_t)(READ_BIT(LPTIM32x->CFGR, LPTIM32_CFGR_MMS_Msk)); +} + +/** + * @brief Read LPTIM32 Counter Value + * @rmtoll CNT FL_LPTIM32_ReadCounter + * @param LPTIM32x LPTIM32 instance + * @retval + */ +__STATIC_INLINE uint32_t FL_LPTIM32_ReadCounter(LPTIM32_Type *LPTIM32x) +{ + return (uint32_t)(READ_BIT(LPTIM32x->CNT, (0xffffffffU << 0U)) >> 0U); +} + +/** + * @} + */ + +/** @defgroup LPTIM32_FL_EF_Init Initialization and de-initialization functions + * @{ + */ +FL_ErrorStatus FL_LPTIM32_DeInit(LPTIM32_Type *LPTIM32x); +FL_ErrorStatus FL_LPTIM32_Init(LPTIM32_Type *LPTIM32x, FL_LPTIM32_InitTypeDef *init); +void FL_LPTIM32_StructInit(FL_LPTIM32_InitTypeDef *init); +FL_ErrorStatus FL_LPTIM32_IC_Init(LPTIM32_Type *LPTIM32x, uint32_t channel, FL_LPTIM32_IC_InitTypeDef *ic_init); +void FL_LPTIM32_IC_StructInit(FL_LPTIM32_IC_InitTypeDef *ic_init); +FL_ErrorStatus FL_LPTIM32_OC_Init(LPTIM32_Type *LPTIM32x, uint32_t channel, FL_LPTIM32_OC_InitTypeDef *oc_init); +void FL_LPTIM32_OC_StructInit(FL_LPTIM32_OC_InitTypeDef *oc_init); + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif /* __FM33LG0XX_FL_LPTIM32_H*/ + +/*************************Py_Code_Generator Version: 0.1-0.14-0.1 @ 2020-12-14*************************/ +/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/ diff --git a/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_lpuart.h b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_lpuart.h new file mode 100644 index 0000000..9c57c8e --- /dev/null +++ b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_lpuart.h @@ -0,0 +1,1153 @@ + /** + ******************************************************************************************************* + * @file fm33lg0xx_fl_lpuart.h + * @author FMSH Application Team + * @brief Head file of LPUART FL Module + ******************************************************************************************************* + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + + + +/* Define to prevent recursive inclusion---------------------------------------------------------------*/ +#ifndef __FM33LG0XX_FL_LPUART_H +#define __FM33LG0XX_FL_LPUART_H + +#ifdef __cplusplus +extern "C" { +#endif +/* Includes -------------------------------------------------------------------------------------------*/ +#include "fm33lg0xx_fl_def.h" +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @defgroup LPUART LPUART + * @brief LPUART FL driver + * @{ + */ + +/* Exported types -------------------------------------------------------------------------------------*/ +/** @defgroup LPUART_FL_ES_INIT LPUART Exported Init structures + * @{ + */ + +/** + * @brief FL LPUART Init Sturcture definition + */ +typedef struct +{ + /** 时钟源选择 */ + uint32_t clockSrc; + /** 通讯波特率*/ + uint32_t baudRate; + /** 数据位宽*/ + uint32_t dataWidth; + /** 停止位 */ + uint32_t stopBits; + /** 奇偶校验 */ + uint32_t parity; + /** 传输方向 */ + uint32_t transferDirection; + +} FL_LPUART_InitTypeDef; + +/** + * @} + */ +/* Exported constants ---------------------------------------------------------------------------------*/ +/** @defgroup LPUART_FL_Exported_Constants LPUART Exported Constants + * @{ + */ + +#define LPUART_CSR_BUSY_Pos (24U) +#define LPUART_CSR_BUSY_Msk (0x1U << LPUART_CSR_BUSY_Pos) +#define LPUART_CSR_BUSY LPUART_CSR_BUSY_Msk + +#define LPUART_CSR_WKBYTE_CFG_Pos (19U) +#define LPUART_CSR_WKBYTE_CFG_Msk (0x1U << LPUART_CSR_WKBYTE_CFG_Pos) +#define LPUART_CSR_WKBYTE_CFG LPUART_CSR_WKBYTE_CFG_Msk + +#define LPUART_CSR_RXEV_Pos (16U) +#define LPUART_CSR_RXEV_Msk (0x3U << LPUART_CSR_RXEV_Pos) +#define LPUART_CSR_RXEV LPUART_CSR_RXEV_Msk + +#define LPUART_CSR_IOSWAP_Pos (11U) +#define LPUART_CSR_IOSWAP_Msk (0x1U << LPUART_CSR_IOSWAP_Pos) +#define LPUART_CSR_IOSWAP LPUART_CSR_IOSWAP_Msk + +#define LPUART_CSR_DMATXIFCFG_Pos (10U) +#define LPUART_CSR_DMATXIFCFG_Msk (0x1U << LPUART_CSR_DMATXIFCFG_Pos) +#define LPUART_CSR_DMATXIFCFG LPUART_CSR_DMATXIFCFG_Msk + +#define LPUART_CSR_BITORD_Pos (9U) +#define LPUART_CSR_BITORD_Msk (0x1U << LPUART_CSR_BITORD_Pos) +#define LPUART_CSR_BITORD LPUART_CSR_BITORD_Msk + +#define LPUART_CSR_STOPCFG_Pos (8U) +#define LPUART_CSR_STOPCFG_Msk (0x1U << LPUART_CSR_STOPCFG_Pos) +#define LPUART_CSR_STOPCFG LPUART_CSR_STOPCFG_Msk + +#define LPUART_CSR_PDSEL_Pos (6U) +#define LPUART_CSR_PDSEL_Msk (0x3U << LPUART_CSR_PDSEL_Pos) +#define LPUART_CSR_PDSEL LPUART_CSR_PDSEL_Msk + +#define LPUART_CSR_PARITY_Pos (4U) +#define LPUART_CSR_PARITY_Msk (0x3U << LPUART_CSR_PARITY_Pos) +#define LPUART_CSR_PARITY LPUART_CSR_PARITY_Msk + +#define LPUART_CSR_RXPOL_Pos (3U) +#define LPUART_CSR_RXPOL_Msk (0x1U << LPUART_CSR_RXPOL_Pos) +#define LPUART_CSR_RXPOL LPUART_CSR_RXPOL_Msk + +#define LPUART_CSR_TXPOL_Pos (2U) +#define LPUART_CSR_TXPOL_Msk (0x1U << LPUART_CSR_TXPOL_Pos) +#define LPUART_CSR_TXPOL LPUART_CSR_TXPOL_Msk + +#define LPUART_CSR_RXEN_Pos (1U) +#define LPUART_CSR_RXEN_Msk (0x1U << LPUART_CSR_RXEN_Pos) +#define LPUART_CSR_RXEN LPUART_CSR_RXEN_Msk + +#define LPUART_CSR_TXEN_Pos (0U) +#define LPUART_CSR_TXEN_Msk (0x1U << LPUART_CSR_TXEN_Pos) +#define LPUART_CSR_TXEN LPUART_CSR_TXEN_Msk + +#define LPUART_IER_RXEV_IE_Pos (12U) +#define LPUART_IER_RXEV_IE_Msk (0x1U << LPUART_IER_RXEV_IE_Pos) +#define LPUART_IER_RXEV_IE LPUART_IER_RXEV_IE_Msk + +#define LPUART_IER_RXERR_IE_Pos (10U) +#define LPUART_IER_RXERR_IE_Msk (0x1U << LPUART_IER_RXERR_IE_Pos) +#define LPUART_IER_RXERR_IE LPUART_IER_RXERR_IE_Msk + +#define LPUART_IER_RXBF_IE_Pos (8U) +#define LPUART_IER_RXBF_IE_Msk (0x1U << LPUART_IER_RXBF_IE_Pos) +#define LPUART_IER_RXBF_IE LPUART_IER_RXBF_IE_Msk + +#define LPUART_IER_TXBE_IE_Pos (1U) +#define LPUART_IER_TXBE_IE_Msk (0x1U << LPUART_IER_TXBE_IE_Pos) +#define LPUART_IER_TXBE_IE LPUART_IER_TXBE_IE_Msk + +#define LPUART_IER_TXSE_IE_Pos (0U) +#define LPUART_IER_TXSE_IE_Msk (0x1U << LPUART_IER_TXSE_IE_Pos) +#define LPUART_IER_TXSE_IE LPUART_IER_TXSE_IE_Msk + +#define LPUART_ISR_RXEVF_Pos (24U) +#define LPUART_ISR_RXEVF_Msk (0x1U << LPUART_ISR_RXEVF_Pos) +#define LPUART_ISR_RXEVF LPUART_ISR_RXEVF_Msk + +#define LPUART_ISR_TXOV_Pos (19U) +#define LPUART_ISR_TXOV_Msk (0x1U << LPUART_ISR_TXOV_Pos) +#define LPUART_ISR_TXOV LPUART_ISR_TXOV_Msk + +#define LPUART_ISR_PERR_Pos (18U) +#define LPUART_ISR_PERR_Msk (0x1U << LPUART_ISR_PERR_Pos) +#define LPUART_ISR_PERR LPUART_ISR_PERR_Msk + +#define LPUART_ISR_FERR_Pos (17U) +#define LPUART_ISR_FERR_Msk (0x1U << LPUART_ISR_FERR_Pos) +#define LPUART_ISR_FERR LPUART_ISR_FERR_Msk + +#define LPUART_ISR_OERR_Pos (16U) +#define LPUART_ISR_OERR_Msk (0x1U << LPUART_ISR_OERR_Pos) +#define LPUART_ISR_OERR LPUART_ISR_OERR_Msk + +#define LPUART_ISR_RXBF_Pos (8U) +#define LPUART_ISR_RXBF_Msk (0x1U << LPUART_ISR_RXBF_Pos) +#define LPUART_ISR_RXBF LPUART_ISR_RXBF_Msk + +#define LPUART_ISR_TXBE_Pos (1U) +#define LPUART_ISR_TXBE_Msk (0x1U << LPUART_ISR_TXBE_Pos) +#define LPUART_ISR_TXBE LPUART_ISR_TXBE_Msk + +#define LPUART_ISR_TXSE_Pos (0U) +#define LPUART_ISR_TXSE_Msk (0x1U << LPUART_ISR_TXSE_Pos) +#define LPUART_ISR_TXSE LPUART_ISR_TXSE_Msk + +#define LPUART_BMR_MCTL_EN_Pos (31U) +#define LPUART_BMR_MCTL_EN_Msk (0x1U << LPUART_BMR_MCTL_EN_Pos) +#define LPUART_BMR_MCTL_EN LPUART_BMR_MCTL_EN_Msk + +#define LPUART_BMR_BAUD_Pos (0U) +#define LPUART_BMR_BAUD_Msk (0x7U << LPUART_BMR_BAUD_Pos) +#define LPUART_BMR_BAUD LPUART_BMR_BAUD_Msk + +#define LPUART_BMR_MCTL_Pos (16U) +#define LPUART_BMR_MCTL_Msk (0x1fffU << LPUART_BMR_MCTL_Pos) +#define LPUART_BMR_MCTL LPUART_BMR_MCTL_Msk + + + + + + +#define FL_LPUART_WAKEUP_NO_CHECK (0x0U << LPUART_CSR_WKBYTE_CFG_Pos) +#define FL_LPUART_WAKEUP_CHECK (0x1U << LPUART_CSR_WKBYTE_CFG_Pos) + + +#define FL_LPUART_WAKEUP_EVENT_START (0x0U << LPUART_CSR_RXEV_Pos) +#define FL_LPUART_WAKEUP_EVENT_RECV_1BYTE (0x1U << LPUART_CSR_RXEV_Pos) +#define FL_LPUART_WAKEUP_EVENT_RECV_MATCH (0x2U << LPUART_CSR_RXEV_Pos) +#define FL_LPUART_WAKEUP_EVENT_RX_FALLING (0x3U << LPUART_CSR_RXEV_Pos) + + +#define FL_LPUART_TXIF_MODE_ALWAYS (0x0U << LPUART_CSR_DMATXIFCFG_Pos) +#define FL_LPUART_TXIF_MODE_AFTER_DMA (0x1U << LPUART_CSR_DMATXIFCFG_Pos) + + +#define FL_LPUART_BIT_ORDER_LSB_FIRST (0x0U << LPUART_CSR_BITORD_Pos) +#define FL_LPUART_BIT_ORDER_MSB_FIRST (0x1U << LPUART_CSR_BITORD_Pos) + + +#define FL_LPUART_STOP_BIT_WIDTH_1B (0x0U << LPUART_CSR_STOPCFG_Pos) +#define FL_LPUART_STOP_BIT_WIDTH_2B (0x1U << LPUART_CSR_STOPCFG_Pos) + + +#define FL_LPUART_DATA_WIDTH_7B (0x0U << LPUART_CSR_PDSEL_Pos) +#define FL_LPUART_DATA_WIDTH_8B (0x1U << LPUART_CSR_PDSEL_Pos) +#define FL_LPUART_DATA_WIDTH_9B (0x2U << LPUART_CSR_PDSEL_Pos) +#define FL_LPUART_DATA_WIDTH_6B (0x3U << LPUART_CSR_PDSEL_Pos) + + +#define FL_LPUART_PARITY_NONE (0x0U << LPUART_CSR_PARITY_Pos) +#define FL_LPUART_PARITY_EVEN (0x1U << LPUART_CSR_PARITY_Pos) +#define FL_LPUART_PARITY_ODD (0x2U << LPUART_CSR_PARITY_Pos) + + +#define FL_LPUART_RX_POLARITY_NORMAL (0x0U << LPUART_CSR_RXPOL_Pos) +#define FL_LPUART_RX_POLARITY_INVERT (0x1U << LPUART_CSR_RXPOL_Pos) + + +#define FL_LPUART_TX_POLARITY_NORMAL (0x0U << LPUART_CSR_TXPOL_Pos) +#define FL_LPUART_TX_POLARITY_INVERT (0x1U << LPUART_CSR_TXPOL_Pos) + + +#define FL_LPUART_BAUDRATE_9600 (0x0U << LPUART_BMR_BAUD_Pos) +#define FL_LPUART_BAUDRATE_4800 (0x1U << LPUART_BMR_BAUD_Pos) +#define FL_LPUART_BAUDRATE_2400 (0x2U << LPUART_BMR_BAUD_Pos) +#define FL_LPUART_BAUDRATE_1200 (0x3U << LPUART_BMR_BAUD_Pos) +#define FL_LPUART_BAUDRATE_600 (0x4U << LPUART_BMR_BAUD_Pos) +#define FL_LPUART_BAUDRATE_300 (0x5U << LPUART_BMR_BAUD_Pos) + + +#define FL_LPUART_DIRECTION_NONE 0x00000000U +#define FL_LPUART_DIRECTION_RX LPUART_CSR_RXEN +#define FL_LPUART_DIRECTION_TX LPUART_CSR_TXEN +#define FL_LPUART_DIRECTION_TX_RX (LPUART_CSR_RXEN|LPUART_CSR_TXEN) +/** + * @} + */ +/* Exported functions ---------------------------------------------------------------------------------*/ +/** @defgroup LPUART_FL_Exported_Functions LPUART Exported Functions + * @{ + */ + +/** + * @brief Get LPUART Busy Flag + * @rmtoll CSR BUSY FL_LPUART_IsActiveFlag_Busy + * @param LPUARTx LPUART instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_LPUART_IsActiveFlag_Busy(LPUART_Type *LPUARTx) +{ + return (uint32_t)(READ_BIT(LPUARTx->CSR, LPUART_CSR_BUSY_Msk) == (LPUART_CSR_BUSY_Msk)); +} + +/** + * @brief Set Data Receive Wakeup Mode + * @rmtoll CSR WKBYTE_CFG FL_LPUART_SetRXWakeupMode + * @param LPUARTx LPUART instance + * @param mode This parameter can be one of the following values: + * @arg @ref FL_LPUART_WAKEUP_NO_CHECK + * @arg @ref FL_LPUART_WAKEUP_CHECK + * @retval None + */ +__STATIC_INLINE void FL_LPUART_SetRXWakeupMode(LPUART_Type *LPUARTx, uint32_t mode) +{ + MODIFY_REG(LPUARTx->CSR, LPUART_CSR_WKBYTE_CFG_Msk, mode); +} + +/** + * @brief Get Data Receive Wakeup Mode Setting + * @rmtoll CSR WKBYTE_CFG FL_LPUART_GetRXWakeupMode + * @param LPUARTx LPUART instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_LPUART_WAKEUP_NO_CHECK + * @arg @ref FL_LPUART_WAKEUP_CHECK + */ +__STATIC_INLINE uint32_t FL_LPUART_GetRXWakeupMode(LPUART_Type *LPUARTx) +{ + return (uint32_t)(READ_BIT(LPUARTx->CSR, LPUART_CSR_WKBYTE_CFG_Msk)); +} + +/** + * @brief Set Receive Wakeup Event + * @rmtoll CSR RXEV FL_LPUART_SetWakeup + * @param LPUARTx LPUART instance + * @param event This parameter can be one of the following values: + * @arg @ref FL_LPUART_WAKEUP_EVENT_START + * @arg @ref FL_LPUART_WAKEUP_EVENT_RECV_1BYTE + * @arg @ref FL_LPUART_WAKEUP_EVENT_RECV_MATCH + * @arg @ref FL_LPUART_WAKEUP_EVENT_RX_FALLING + * @retval None + */ +__STATIC_INLINE void FL_LPUART_SetWakeup(LPUART_Type *LPUARTx, uint32_t event) +{ + MODIFY_REG(LPUARTx->CSR, LPUART_CSR_RXEV_Msk, event); +} + +/** + * @brief Get Receive Wakeup Event Setting + * @rmtoll CSR RXEV FL_LPUART_GetWakeup + * @param LPUARTx LPUART instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_LPUART_WAKEUP_EVENT_START + * @arg @ref FL_LPUART_WAKEUP_EVENT_RECV_1BYTE + * @arg @ref FL_LPUART_WAKEUP_EVENT_RECV_MATCH + * @arg @ref FL_LPUART_WAKEUP_EVENT_RX_FALLING + */ +__STATIC_INLINE uint32_t FL_LPUART_GetWakeup(LPUART_Type *LPUARTx) +{ + return (uint32_t)(READ_BIT(LPUARTx->CSR, LPUART_CSR_RXEV_Msk)); +} + +/** + * @brief Enable LPUART Pin Swap Between TX Pin and RX Pin + * @rmtoll CSR IOSWAP FL_LPUART_EnablePinSwap + * @param LPUARTx LPUART instance + * @retval None + */ +__STATIC_INLINE void FL_LPUART_EnablePinSwap(LPUART_Type *LPUARTx) +{ + SET_BIT(LPUARTx->CSR, LPUART_CSR_IOSWAP_Msk); +} + +/** + * @brief Disable LPUART Pin Swap Between TX Pin and RX Pin + * @rmtoll CSR IOSWAP FL_LPUART_DisablePinSwap + * @param LPUARTx LPUART instance + * @retval None + */ +__STATIC_INLINE void FL_LPUART_DisablePinSwap(LPUART_Type *LPUARTx) +{ + CLEAR_BIT(LPUARTx->CSR, LPUART_CSR_IOSWAP_Msk); +} + +/** + * @brief Get UART Pin Swap Enable Status Between UART TX Pin and RX Pin + + * @rmtoll CSR IOSWAP FL_LPUART_IsEnabledPinSwap + * @param LPUARTx LPUART instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_LPUART_IsEnabledPinSwap(LPUART_Type *LPUARTx) +{ + return (uint32_t)(READ_BIT(LPUARTx->CSR, LPUART_CSR_IOSWAP_Msk) == LPUART_CSR_IOSWAP_Msk); +} + +/** + * @brief Enable DMA TX Complete Interrupt + * @rmtoll CSR DMATXIFCFG FL_LPUART_SetTXIFMode + * @param LPUARTx LPUART instance + * @param txifMode This parameter can be one of the following values: + * @arg @ref FL_LPUART_TXIF_MODE_ALWAYS + * @arg @ref FL_LPUART_TXIF_MODE_AFTER_DMA + * @retval None + */ +__STATIC_INLINE void FL_LPUART_SetTXIFMode(LPUART_Type *LPUARTx, uint32_t txifMode) +{ + MODIFY_REG(LPUARTx->CSR, LPUART_CSR_DMATXIFCFG_Msk, txifMode); +} + +/** + * @brief Disable DMA TX Complete Interrupt + * @rmtoll CSR DMATXIFCFG FL_LPUART_GetTXIFMode + * @param LPUARTx LPUART instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_LPUART_TXIF_MODE_ALWAYS + * @arg @ref FL_LPUART_TXIF_MODE_AFTER_DMA + */ +__STATIC_INLINE uint32_t FL_LPUART_GetTXIFMode(LPUART_Type *LPUARTx) +{ + return (uint32_t)(READ_BIT(LPUARTx->CSR, LPUART_CSR_DMATXIFCFG_Msk)); +} + +/** + * @brief Set LPUART Transfer Bit Order + * @rmtoll CSR BITORD FL_LPUART_SetBitOrder + * @param LPUARTx LPUART instance + * @param bitOrder This parameter can be one of the following values: + * @arg @ref FL_LPUART_BIT_ORDER_LSB_FIRST + * @arg @ref FL_LPUART_BIT_ORDER_MSB_FIRST + * @retval None + */ +__STATIC_INLINE void FL_LPUART_SetBitOrder(LPUART_Type *LPUARTx, uint32_t bitOrder) +{ + MODIFY_REG(LPUARTx->CSR, LPUART_CSR_BITORD_Msk, bitOrder); +} + +/** + * @brief Get LPUART Transfer Bit Order Setting + * @rmtoll CSR BITORD FL_LPUART_GetBitOrder + * @param LPUARTx LPUART instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_LPUART_BIT_ORDER_LSB_FIRST + * @arg @ref FL_LPUART_BIT_ORDER_MSB_FIRST + */ +__STATIC_INLINE uint32_t FL_LPUART_GetBitOrder(LPUART_Type *LPUARTx) +{ + return (uint32_t)(READ_BIT(LPUARTx->CSR, LPUART_CSR_BITORD_Msk)); +} + +/** + * @brief Set LPUART Stop Bits Length + * @rmtoll CSR STOPCFG FL_LPUART_SetStopBitsWidth + * @param LPUARTx LPUART instance + * @param stopBits This parameter can be one of the following values: + * @arg @ref FL_LPUART_STOP_BIT_WIDTH_1B + * @arg @ref FL_LPUART_STOP_BIT_WIDTH_2B + * @retval None + */ +__STATIC_INLINE void FL_LPUART_SetStopBitsWidth(LPUART_Type *LPUARTx, uint32_t stopBits) +{ + MODIFY_REG(LPUARTx->CSR, LPUART_CSR_STOPCFG_Msk, stopBits); +} + +/** + * @brief Get LPUART Stop Bits Length Setting + * @rmtoll CSR STOPCFG FL_LPUART_GetStopBitsWidth + * @param LPUARTx LPUART instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_LPUART_STOP_BIT_WIDTH_1B + * @arg @ref FL_LPUART_STOP_BIT_WIDTH_2B + */ +__STATIC_INLINE uint32_t FL_LPUART_GetStopBitsWidth(LPUART_Type *LPUARTx) +{ + return (uint32_t)(READ_BIT(LPUARTx->CSR, LPUART_CSR_STOPCFG_Msk)); +} + +/** + * @brief Set LPUART Data Width + * @rmtoll CSR PDSEL FL_LPUART_SetDataWidth + * @param LPUARTx LPUART instance + * @param dataWidth This parameter can be one of the following values: + * @arg @ref FL_LPUART_DATA_WIDTH_7B + * @arg @ref FL_LPUART_DATA_WIDTH_8B + * @arg @ref FL_LPUART_DATA_WIDTH_9B + * @arg @ref FL_LPUART_DATA_WIDTH_6B + * @retval None + */ +__STATIC_INLINE void FL_LPUART_SetDataWidth(LPUART_Type *LPUARTx, uint32_t dataWidth) +{ + MODIFY_REG(LPUARTx->CSR, LPUART_CSR_PDSEL_Msk, dataWidth); +} + +/** + * @brief Get LPUART Stop Bits Length Setting + * @rmtoll CSR PDSEL FL_LPUART_GetDataWidth + * @param LPUARTx LPUART instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_LPUART_DATA_WIDTH_7B + * @arg @ref FL_LPUART_DATA_WIDTH_8B + * @arg @ref FL_LPUART_DATA_WIDTH_9B + * @arg @ref FL_LPUART_DATA_WIDTH_6B + */ +__STATIC_INLINE uint32_t FL_LPUART_GetDataWidth(LPUART_Type *LPUARTx) +{ + return (uint32_t)(READ_BIT(LPUARTx->CSR, LPUART_CSR_PDSEL_Msk)); +} + +/** + * @brief Set LPUART Parity + * @rmtoll CSR PARITY FL_LPUART_SetParity + * @param LPUARTx LPUART instance + * @param parity This parameter can be one of the following values: + * @arg @ref FL_LPUART_PARITY_NONE + * @arg @ref FL_LPUART_PARITY_EVEN + * @arg @ref FL_LPUART_PARITY_ODD + * @retval None + */ +__STATIC_INLINE void FL_LPUART_SetParity(LPUART_Type *LPUARTx, uint32_t parity) +{ + MODIFY_REG(LPUARTx->CSR, LPUART_CSR_PARITY_Msk, parity); +} + +/** + * @brief Get LPUART Parity Setting + * @rmtoll CSR PARITY FL_LPUART_GetParity + * @param LPUARTx LPUART instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_LPUART_PARITY_NONE + * @arg @ref FL_LPUART_PARITY_EVEN + * @arg @ref FL_LPUART_PARITY_ODD + */ +__STATIC_INLINE uint32_t FL_LPUART_GetParity(LPUART_Type *LPUARTx) +{ + return (uint32_t)(READ_BIT(LPUARTx->CSR, LPUART_CSR_PARITY_Msk)); +} + +/** + * @brief Set LPUART Receive Polarity + * @rmtoll CSR RXPOL FL_LPUART_SetRXPolarity + * @param LPUARTx LPUART instance + * @param polarity This parameter can be one of the following values: + * @arg @ref FL_LPUART_RX_POLARITY_NORMAL + * @arg @ref FL_LPUART_RX_POLARITY_INVERT + * @retval None + */ +__STATIC_INLINE void FL_LPUART_SetRXPolarity(LPUART_Type *LPUARTx, uint32_t polarity) +{ + MODIFY_REG(LPUARTx->CSR, LPUART_CSR_RXPOL_Msk, polarity); +} + +/** + * @brief Get LPUART Receive Polarity Setting + * @rmtoll CSR RXPOL FL_LPUART_GetRXPolarity + * @param LPUARTx LPUART instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_LPUART_RX_POLARITY_NORMAL + * @arg @ref FL_LPUART_RX_POLARITY_INVERT + */ +__STATIC_INLINE uint32_t FL_LPUART_GetRXPolarity(LPUART_Type *LPUARTx) +{ + return (uint32_t)(READ_BIT(LPUARTx->CSR, LPUART_CSR_RXPOL_Msk)); +} + +/** + * @brief Set LPUART Transmit Polarity + * @rmtoll CSR TXPOL FL_LPUART_SetTXPolarity + * @param LPUARTx LPUART instance + * @param polarity This parameter can be one of the following values: + * @arg @ref FL_LPUART_TX_POLARITY_NORMAL + * @arg @ref FL_LPUART_TX_POLARITY_INVERT + * @retval None + */ +__STATIC_INLINE void FL_LPUART_SetTXPolarity(LPUART_Type *LPUARTx, uint32_t polarity) +{ + MODIFY_REG(LPUARTx->CSR, LPUART_CSR_TXPOL_Msk, polarity); +} + +/** + * @brief Get LPUART Transmit Polarity Setting + * @rmtoll CSR TXPOL FL_LPUART_GetTXPolarity + * @param LPUARTx LPUART instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_LPUART_TX_POLARITY_NORMAL + * @arg @ref FL_LPUART_TX_POLARITY_INVERT + */ +__STATIC_INLINE uint32_t FL_LPUART_GetTXPolarity(LPUART_Type *LPUARTx) +{ + return (uint32_t)(READ_BIT(LPUARTx->CSR, LPUART_CSR_TXPOL_Msk)); +} + +/** + * @brief Enable LPUART Receive + * @rmtoll CSR RXEN FL_LPUART_EnableRX + * @param LPUARTx LPUART instance + * @retval None + */ +__STATIC_INLINE void FL_LPUART_EnableRX(LPUART_Type *LPUARTx) +{ + SET_BIT(LPUARTx->CSR, LPUART_CSR_RXEN_Msk); +} + +/** + * @brief Get LPUART Receive Enable Status + * @rmtoll CSR RXEN FL_LPUART_IsEnabledRX + * @param LPUARTx LPUART instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_LPUART_IsEnabledRX(LPUART_Type *LPUARTx) +{ + return (uint32_t)(READ_BIT(LPUARTx->CSR, LPUART_CSR_RXEN_Msk) == LPUART_CSR_RXEN_Msk); +} + +/** + * @brief Disable LPUART Receive + * @rmtoll CSR RXEN FL_LPUART_DisableRX + * @param LPUARTx LPUART instance + * @retval None + */ +__STATIC_INLINE void FL_LPUART_DisableRX(LPUART_Type *LPUARTx) +{ + CLEAR_BIT(LPUARTx->CSR, LPUART_CSR_RXEN_Msk); +} + +/** + * @brief Enable LPUART Receive + * @rmtoll CSR TXEN FL_LPUART_EnableTX + * @param LPUARTx LPUART instance + * @retval None + */ +__STATIC_INLINE void FL_LPUART_EnableTX(LPUART_Type *LPUARTx) +{ + SET_BIT(LPUARTx->CSR, LPUART_CSR_TXEN_Msk); +} + +/** + * @brief Get LPUART Receive Enable Status + * @rmtoll CSR TXEN FL_LPUART_IsEnabledTX + * @param LPUARTx LPUART instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_LPUART_IsEnabledTX(LPUART_Type *LPUARTx) +{ + return (uint32_t)(READ_BIT(LPUARTx->CSR, LPUART_CSR_TXEN_Msk) == LPUART_CSR_TXEN_Msk); +} + +/** + * @brief Disable LPUART Receive + * @rmtoll CSR TXEN FL_LPUART_DisableTX + * @param LPUARTx LPUART instance + * @retval None + */ +__STATIC_INLINE void FL_LPUART_DisableTX(LPUART_Type *LPUARTx) +{ + CLEAR_BIT(LPUARTx->CSR, LPUART_CSR_TXEN_Msk); +} + +/** + * @brief Enable LPUART Receive Event Interrupt + * @rmtoll IER RXEV_IE FL_LPUART_EnableIT_RXWakeup + * @param LPUARTx LPUART instance + * @retval None + */ +__STATIC_INLINE void FL_LPUART_EnableIT_RXWakeup(LPUART_Type *LPUARTx) +{ + SET_BIT(LPUARTx->IER, LPUART_IER_RXEV_IE_Msk); +} + +/** + * @brief Get LPUART Receive Event Interrupt Enable Status + * @rmtoll IER RXEV_IE FL_LPUART_IsEnabledIT_RXWakeup + * @param LPUARTx LPUART instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_LPUART_IsEnabledIT_RXWakeup(LPUART_Type *LPUARTx) +{ + return (uint32_t)(READ_BIT(LPUARTx->IER, LPUART_IER_RXEV_IE_Msk) == LPUART_IER_RXEV_IE_Msk); +} + +/** + * @brief Disable LPUART Receive Event Interrupt + * @rmtoll IER RXEV_IE FL_LPUART_DisableIT_RXWakeup + * @param LPUARTx LPUART instance + * @retval None + */ +__STATIC_INLINE void FL_LPUART_DisableIT_RXWakeup(LPUART_Type *LPUARTx) +{ + CLEAR_BIT(LPUARTx->IER, LPUART_IER_RXEV_IE_Msk); +} + +/** + * @brief Enable LPUART Receive Error Interrupt + * @rmtoll IER RXERR_IE FL_LPUART_EnableIT_RXError + * @param LPUARTx LPUART instance + * @retval None + */ +__STATIC_INLINE void FL_LPUART_EnableIT_RXError(LPUART_Type *LPUARTx) +{ + SET_BIT(LPUARTx->IER, LPUART_IER_RXERR_IE_Msk); +} + +/** + * @brief Get LPUART Receive Error Interrupt Enable Status + * @rmtoll IER RXERR_IE FL_LPUART_IsEnabledIT_RXError + * @param LPUARTx LPUART instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_LPUART_IsEnabledIT_RXError(LPUART_Type *LPUARTx) +{ + return (uint32_t)(READ_BIT(LPUARTx->IER, LPUART_IER_RXERR_IE_Msk) == LPUART_IER_RXERR_IE_Msk); +} + +/** + * @brief Disable LPUART Receive Error Interrupt + * @rmtoll IER RXERR_IE FL_LPUART_DisableIT_RXError + * @param LPUARTx LPUART instance + * @retval None + */ +__STATIC_INLINE void FL_LPUART_DisableIT_RXError(LPUART_Type *LPUARTx) +{ + CLEAR_BIT(LPUARTx->IER, LPUART_IER_RXERR_IE_Msk); +} + +/** + * @brief Enable LPUART Receive Buffer Full Interrupt + * @rmtoll IER RXBF_IE FL_LPUART_EnableIT_RXBuffFull + * @param LPUARTx LPUART instance + * @retval None + */ +__STATIC_INLINE void FL_LPUART_EnableIT_RXBuffFull(LPUART_Type *LPUARTx) +{ + SET_BIT(LPUARTx->IER, LPUART_IER_RXBF_IE_Msk); +} + +/** + * @brief Get LPUART Receive Buffer Full Interrupt Enable Status + * @rmtoll IER RXBF_IE FL_LPUART_IsEnabledIT_RXBuffFull + * @param LPUARTx LPUART instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_LPUART_IsEnabledIT_RXBuffFull(LPUART_Type *LPUARTx) +{ + return (uint32_t)(READ_BIT(LPUARTx->IER, LPUART_IER_RXBF_IE_Msk) == LPUART_IER_RXBF_IE_Msk); +} + +/** + * @brief Disable LPUART Receive Buffer Full Interrupt + * @rmtoll IER RXBF_IE FL_LPUART_DisableIT_RXBufFull + * @param LPUARTx LPUART instance + * @retval None + */ +__STATIC_INLINE void FL_LPUART_DisableIT_RXBufFull(LPUART_Type *LPUARTx) +{ + CLEAR_BIT(LPUARTx->IER, LPUART_IER_RXBF_IE_Msk); +} + +/** + * @brief Enable LPUART Transmit Buffer Empty Interrupt + * @rmtoll IER TXBE_IE FL_LPUART_EnableIT_TXBuffEmpty + * @param LPUARTx LPUART instance + * @retval None + */ +__STATIC_INLINE void FL_LPUART_EnableIT_TXBuffEmpty(LPUART_Type *LPUARTx) +{ + SET_BIT(LPUARTx->IER, LPUART_IER_TXBE_IE_Msk); +} + +/** + * @brief Get LPUART Transmit Buffer Empty Interrupt Enable Status + * @rmtoll IER TXBE_IE FL_LPUART_IsEnabledIT_TXBuffEmpty + * @param LPUARTx LPUART instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_LPUART_IsEnabledIT_TXBuffEmpty(LPUART_Type *LPUARTx) +{ + return (uint32_t)(READ_BIT(LPUARTx->IER, LPUART_IER_TXBE_IE_Msk) == LPUART_IER_TXBE_IE_Msk); +} + +/** + * @brief Disable LPUART Transmit Buffer Empty Interrupt + * @rmtoll IER TXBE_IE FL_LPUART_DisableIT_TXBuffEmpty + * @param LPUARTx LPUART instance + * @retval None + */ +__STATIC_INLINE void FL_LPUART_DisableIT_TXBuffEmpty(LPUART_Type *LPUARTx) +{ + CLEAR_BIT(LPUARTx->IER, LPUART_IER_TXBE_IE_Msk); +} + +/** + * @brief Enable LPUART Transmit Shift Register Interrupt + * @rmtoll IER TXSE_IE FL_LPUART_EnableIT_TXShiftBuffEmpty + * @param LPUARTx LPUART instance + * @retval None + */ +__STATIC_INLINE void FL_LPUART_EnableIT_TXShiftBuffEmpty(LPUART_Type *LPUARTx) +{ + SET_BIT(LPUARTx->IER, LPUART_IER_TXSE_IE_Msk); +} + +/** + * @brief Get LPUART Transmit Shift Register Interrupt Enable Status + * @rmtoll IER TXSE_IE FL_LPUART_IsEnabledIT_TXShiftBuffEmpty + * @param LPUARTx LPUART instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_LPUART_IsEnabledIT_TXShiftBuffEmpty(LPUART_Type *LPUARTx) +{ + return (uint32_t)(READ_BIT(LPUARTx->IER, LPUART_IER_TXSE_IE_Msk) == LPUART_IER_TXSE_IE_Msk); +} + +/** + * @brief Disable LPUART Transmit Shift Register Interrupt + * @rmtoll IER TXSE_IE FL_LPUART_DisableIT_TXShiftBuffEmpty + * @param LPUARTx LPUART instance + * @retval None + */ +__STATIC_INLINE void FL_LPUART_DisableIT_TXShiftBuffEmpty(LPUART_Type *LPUARTx) +{ + CLEAR_BIT(LPUARTx->IER, LPUART_IER_TXSE_IE_Msk); +} + +/** + * @brief Get LPUART Receive Event Interrupt Flag + * @rmtoll ISR RXEVF FL_LPUART_IsActiveFlag_RXWakeup + * @param LPUARTx LPUART instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_LPUART_IsActiveFlag_RXWakeup(LPUART_Type *LPUARTx) +{ + return (uint32_t)(READ_BIT(LPUARTx->ISR, LPUART_ISR_RXEVF_Msk) == (LPUART_ISR_RXEVF_Msk)); +} + +/** + * @brief Clear LPUART Receive Event Interrupt Flag + * @rmtoll ISR RXEVF FL_LPUART_ClearFlag_RXWakeup + * @param LPUARTx LPUART instance + * @retval None + */ +__STATIC_INLINE void FL_LPUART_ClearFlag_RXWakeup(LPUART_Type *LPUARTx) +{ + WRITE_REG(LPUARTx->ISR, LPUART_ISR_RXEVF_Msk); +} + +/** + * @brief Get LPUART Transmit Overflow Error Flag + * @rmtoll ISR TXOV FL_LPUART_IsActiveFlag_TXBuffOverflow + * @param LPUARTx LPUART instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_LPUART_IsActiveFlag_TXBuffOverflow(LPUART_Type *LPUARTx) +{ + return (uint32_t)(READ_BIT(LPUARTx->ISR, LPUART_ISR_TXOV_Msk) == (LPUART_ISR_TXOV_Msk)); +} + +/** + * @brief Clear LPUART Transmit Overflow Error Flag + * @rmtoll ISR TXOV FL_LPUART_ClearFlag_TXBuffOverflow + * @param LPUARTx LPUART instance + * @retval None + */ +__STATIC_INLINE void FL_LPUART_ClearFlag_TXBuffOverflow(LPUART_Type *LPUARTx) +{ + WRITE_REG(LPUARTx->ISR, LPUART_ISR_TXOV_Msk); +} + +/** + * @brief Get LPUART Parity Error Flag + * @rmtoll ISR PERR FL_LPUART_IsActiveFlag_ParityError + * @param LPUARTx LPUART instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_LPUART_IsActiveFlag_ParityError(LPUART_Type *LPUARTx) +{ + return (uint32_t)(READ_BIT(LPUARTx->ISR, LPUART_ISR_PERR_Msk) == (LPUART_ISR_PERR_Msk)); +} + +/** + * @brief Clear LPUART Parity Error Flag + * @rmtoll ISR PERR FL_LPUART_ClearFlag_ParityError + * @param LPUARTx LPUART instance + * @retval None + */ +__STATIC_INLINE void FL_LPUART_ClearFlag_ParityError(LPUART_Type *LPUARTx) +{ + WRITE_REG(LPUARTx->ISR, LPUART_ISR_PERR_Msk); +} + +/** + * @brief Get LPUART Frame Error Flag + * @rmtoll ISR FERR FL_LPUART_IsActiveFlag_FrameError + * @param LPUARTx LPUART instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_LPUART_IsActiveFlag_FrameError(LPUART_Type *LPUARTx) +{ + return (uint32_t)(READ_BIT(LPUARTx->ISR, LPUART_ISR_FERR_Msk) == (LPUART_ISR_FERR_Msk)); +} + +/** + * @brief Clear LPUART Frame Error Flag + * @rmtoll ISR FERR FL_LPUART_ClearFlag_FrameError + * @param LPUARTx LPUART instance + * @retval None + */ +__STATIC_INLINE void FL_LPUART_ClearFlag_FrameError(LPUART_Type *LPUARTx) +{ + WRITE_REG(LPUARTx->ISR, LPUART_ISR_FERR_Msk); +} + +/** + * @brief Get LPUART Receive Buffer Overflow Error Flag + * @rmtoll ISR OERR FL_LPUART_IsActiveFlag_RXBuffOverflow + * @param LPUARTx LPUART instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_LPUART_IsActiveFlag_RXBuffOverflow(LPUART_Type *LPUARTx) +{ + return (uint32_t)(READ_BIT(LPUARTx->ISR, LPUART_ISR_OERR_Msk) == (LPUART_ISR_OERR_Msk)); +} + +/** + * @brief Clear LPUART Receive Buffer Overflow Error Flag + * @rmtoll ISR OERR FL_LPUART_ClearFlag_RXBuffOverflow + * @param LPUARTx LPUART instance + * @retval None + */ +__STATIC_INLINE void FL_LPUART_ClearFlag_RXBuffOverflow(LPUART_Type *LPUARTx) +{ + WRITE_REG(LPUARTx->ISR, LPUART_ISR_OERR_Msk); +} + +/** + * @brief Get LPUART Receive Buffer Full Flag + * @rmtoll ISR RXBF FL_LPUART_IsActiveFlag_RXBuffFull + * @param LPUARTx LPUART instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_LPUART_IsActiveFlag_RXBuffFull(LPUART_Type *LPUARTx) +{ + return (uint32_t)(READ_BIT(LPUARTx->ISR, LPUART_ISR_RXBF_Msk) == (LPUART_ISR_RXBF_Msk)); +} + +/** + * @brief Clear LPUART Receive Buffer Full Flag + * @rmtoll ISR RXBF FL_LPUART_ClearFlag_RXBuffFull + * @param LPUARTx LPUART instance + * @retval None + */ +__STATIC_INLINE void FL_LPUART_ClearFlag_RXBuffFull(LPUART_Type *LPUARTx) +{ + WRITE_REG(LPUARTx->ISR, LPUART_ISR_RXBF_Msk); +} + +/** + * @brief Get LPUART Transmit Buffer Empty Flag + * @rmtoll ISR TXBE FL_LPUART_IsActiveFlag_TXBuffEmpty + * @param LPUARTx LPUART instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_LPUART_IsActiveFlag_TXBuffEmpty(LPUART_Type *LPUARTx) +{ + return (uint32_t)(READ_BIT(LPUARTx->ISR, LPUART_ISR_TXBE_Msk) == (LPUART_ISR_TXBE_Msk)); +} + +/** + * @brief Clear LPUART Transmit Buffer Empty Flag + * @rmtoll ISR TXBE FL_LPUART_ClearFlag_TXBuffEmpty + * @param LPUARTx LPUART instance + * @retval None + */ +__STATIC_INLINE void FL_LPUART_ClearFlag_TXBuffEmpty(LPUART_Type *LPUARTx) +{ + WRITE_REG(LPUARTx->ISR, LPUART_ISR_TXBE_Msk); +} + +/** + * @brief Get LPUART Transmit Shift register Empty Flag + * @rmtoll ISR TXSE FL_LPUART_IsActiveFlag_TXShiftBuffEmpty + * @param LPUARTx LPUART instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_LPUART_IsActiveFlag_TXShiftBuffEmpty(LPUART_Type *LPUARTx) +{ + return (uint32_t)(READ_BIT(LPUARTx->ISR, LPUART_ISR_TXSE_Msk) == (LPUART_ISR_TXSE_Msk)); +} + +/** + * @brief Clear LPUART Transmit Shift register Empty Flag + * @rmtoll ISR TXSE FL_LPUART_ClearFlag_TXShiftBuffEmpty + * @param LPUARTx LPUART instance + * @retval None + */ +__STATIC_INLINE void FL_LPUART_ClearFlag_TXShiftBuffEmpty(LPUART_Type *LPUARTx) +{ + WRITE_REG(LPUARTx->ISR, LPUART_ISR_TXSE_Msk); +} + +/** + * @brief Enable LPUART BaudRate Modulation + * @rmtoll BMR MCTL_EN FL_LPUART_EnableBaudRateModulation + * @param LPUARTx LPUART instance + * @retval None + */ +__STATIC_INLINE void FL_LPUART_EnableBaudRateModulation(LPUART_Type *LPUARTx) +{ + SET_BIT(LPUARTx->BMR, LPUART_BMR_MCTL_EN_Msk); +} + +/** + * @brief Get LPUART BaudRate Modulation Enable Status + * @rmtoll BMR MCTL_EN FL_LPUART_IsEnabledBaudRateModulation + * @param LPUARTx LPUART instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_LPUART_IsEnabledBaudRateModulation(LPUART_Type *LPUARTx) +{ + return (uint32_t)(READ_BIT(LPUARTx->BMR, LPUART_BMR_MCTL_EN_Msk) == LPUART_BMR_MCTL_EN_Msk); +} + +/** + * @brief Disable LPUART BaudRate Modulation + * @rmtoll BMR MCTL_EN FL_LPUART_DisableBaudRateModulation + * @param LPUARTx LPUART instance + * @retval None + */ +__STATIC_INLINE void FL_LPUART_DisableBaudRateModulation(LPUART_Type *LPUARTx) +{ + CLEAR_BIT(LPUARTx->BMR, LPUART_BMR_MCTL_EN_Msk); +} + +/** + * @brief Set LPUART BaudRate + * @rmtoll BMR BAUD FL_LPUART_SetBaudRate + * @param LPUARTx LPUART instance + * @param baudRate This parameter can be one of the following values: + * @arg @ref FL_LPUART_BAUDRATE_9600 + * @arg @ref FL_LPUART_BAUDRATE_4800 + * @arg @ref FL_LPUART_BAUDRATE_2400 + * @arg @ref FL_LPUART_BAUDRATE_1200 + * @arg @ref FL_LPUART_BAUDRATE_600 + * @arg @ref FL_LPUART_BAUDRATE_300 + * @retval None + */ +__STATIC_INLINE void FL_LPUART_SetBaudRate(LPUART_Type *LPUARTx, uint32_t baudRate) +{ + MODIFY_REG(LPUARTx->BMR, LPUART_BMR_BAUD_Msk, baudRate); +} + +/** + * @brief Get LPUART BaudRate + * @rmtoll BMR BAUD FL_LPUART_GetBaudRate + * @param LPUARTx LPUART instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_LPUART_BAUDRATE_9600 + * @arg @ref FL_LPUART_BAUDRATE_4800 + * @arg @ref FL_LPUART_BAUDRATE_2400 + * @arg @ref FL_LPUART_BAUDRATE_1200 + * @arg @ref FL_LPUART_BAUDRATE_600 + * @arg @ref FL_LPUART_BAUDRATE_300 + */ +__STATIC_INLINE uint32_t FL_LPUART_GetBaudRate(LPUART_Type *LPUARTx) +{ + return (uint32_t)(READ_BIT(LPUARTx->BMR, LPUART_BMR_BAUD_Msk)); +} + +/** + * @brief LPUART Receive 1 byte of data + * @rmtoll RXBUF FL_LPUART_ReadRXBuff + * @param LPUARTx LPUART instance + * @retval The LPUart received data + */ +__STATIC_INLINE uint32_t FL_LPUART_ReadRXBuff(LPUART_Type *LPUARTx) +{ + return (uint32_t)(READ_BIT(LPUARTx->RXBUF, 0x1ffU)); +} + +/** + * @brief LPUART Transmit 1 byte of data + * @rmtoll TXBUF FL_LPUART_WriteTXBuff + * @param LPUARTx LPUART instance + * @param data The data need to transmit through the LPUart + * @retval None + */ +__STATIC_INLINE void FL_LPUART_WriteTXBuff(LPUART_Type *LPUARTx, uint8_t data) +{ + MODIFY_REG(LPUARTx->TXBUF, 0x1ffU, data); +} + +/** + * @brief Set LPUART Matched Data + * @rmtoll DMR FL_LPUART_WriteMatchData + * @param LPUARTx LPUART instance + * @param data The value of match under SLEEP MODE + * @retval None + */ +__STATIC_INLINE void FL_LPUART_WriteMatchData(LPUART_Type *LPUARTx, uint8_t data) +{ + MODIFY_REG(LPUARTx->DMR, 0x1ffU, data); +} + +/** + * @brief Get LPUART Matched Data + * @rmtoll DMR FL_LPUART_ReadMatchData + * @param LPUARTx LPUART instance + * @retval The value of match data under SLEEP MODE + */ +__STATIC_INLINE uint32_t FL_LPUART_ReadMatchData(LPUART_Type *LPUARTx) +{ + return (uint32_t)(READ_BIT(LPUARTx->DMR, 0x1ffU)); +} + +/** + * @brief Set LPUART Bit Modulation + * @rmtoll BMR MCTL FL_LPUART_WriteBitModulation + * @param LPUARTx LPUART instance + * @param bitModulation The value of Bit Modulation Control + * @retval None + */ +__STATIC_INLINE void FL_LPUART_WriteBitModulation(LPUART_Type *LPUARTx, uint32_t bitModulation) +{ + MODIFY_REG(LPUARTx->BMR, (0xfffU << 16U), (bitModulation << 16U)); +} + +/** + * @brief Get LPUART Bit Modulation + * @rmtoll BMR MCTL FL_LPUART_ReadBitModulation + * @param LPUARTx LPUART instance + * @retval The value of Bit Modulation Control + */ +__STATIC_INLINE uint32_t FL_LPUART_ReadBitModulation(LPUART_Type *LPUARTx) +{ + return (uint32_t)(READ_BIT(LPUARTx->BMR, (0xfffU << 16U)) >> 16U); +} + +/** + * @} + */ + +/** @defgroup LPUART_FL_EF_Init Initialization and de-initialization functions + * @{ + */ +FL_ErrorStatus FL_LPUART_DeInit(LPUART_Type *LPUARTx); +void FL_LPUART_StructInit(FL_LPUART_InitTypeDef *initStruct); +FL_ErrorStatus FL_LPUART_Init(LPUART_Type *LPUARTx, FL_LPUART_InitTypeDef *initStruct); + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif /* __FM33LG0XX_FL_LPUART_H*/ + +/*************************Py_Code_Generator Version: 0.1-0.11-0.1 @ 2020-09-14*************************/ +/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/ diff --git a/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_pmu.h b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_pmu.h new file mode 100644 index 0000000..79f2545 --- /dev/null +++ b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_pmu.h @@ -0,0 +1,1042 @@ + /** + ******************************************************************************************************* + * @file fm33lg0xx_fl_pmu.h + * @author FMSH Application Team + * @brief Head file of PMU FL Module + ******************************************************************************************************* + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + + + +/* Define to prevent recursive inclusion---------------------------------------------------------------*/ +#ifndef __FM33LG0XX_FL_PMU_H +#define __FM33LG0XX_FL_PMU_H + +#ifdef __cplusplus +extern "C" { +#endif +/* Includes -------------------------------------------------------------------------------------------*/ +#include "fm33lg0xx_fl_def.h" +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @defgroup PMU PMU + * @brief PMU FL driver + * @{ + */ + +/* Exported types -------------------------------------------------------------------------------------*/ +/** @defgroup PMU_FL_ES_INIT PMU Exported Init structures + * @{ + */ + +/** + * @brief FL PMU Init Sturcture definition + */ +typedef struct +{ + /*! 低功耗模式配置 */ + uint32_t powerMode; + /*! 低功耗模式下内核电压降低与否 */ + FL_FunState coreVoltageScaling; + /*! 睡眠模式配置 */ + uint32_t deepSleep; + /*! 唤醒后的系统频率，仅对RCHF */ + uint32_t wakeupFrequency; + /*! 芯片LDO是否进入低功耗 */ + uint32_t LDOLowPowerMode; + /*! 额外唤醒延迟 */ + uint32_t wakeupDelay; +} FL_PMU_SleepInitTypeDef; + +/** + * @} + */ +/* Exported constants ---------------------------------------------------------------------------------*/ +/** @defgroup PMU_FL_Exported_Constants PMU Exported Constants + * @{ + */ + +#define PMU_CR_LDO_LPM_Pos (18U) +#define PMU_CR_LDO_LPM_Msk (0x3U << PMU_CR_LDO_LPM_Pos) +#define PMU_CR_LDO_LPM PMU_CR_LDO_LPM_Msk + +#define PMU_CR_LDO15EN_Pos (17U) +#define PMU_CR_LDO15EN_Msk (0x1U << PMU_CR_LDO15EN_Pos) +#define PMU_CR_LDO15EN PMU_CR_LDO15EN_Msk + +#define PMU_CR_LDO15EN_B_Pos (16U) +#define PMU_CR_LDO15EN_B_Msk (0x1U << PMU_CR_LDO15EN_B_Pos) +#define PMU_CR_LDO15EN_B PMU_CR_LDO15EN_B_Msk + +#define PMU_CR_WKFSEL_Pos (10U) +#define PMU_CR_WKFSEL_Msk (0x3U << PMU_CR_WKFSEL_Pos) +#define PMU_CR_WKFSEL PMU_CR_WKFSEL_Msk + +#define PMU_CR_SLPDP_Pos (9U) +#define PMU_CR_SLPDP_Msk (0x1U << PMU_CR_SLPDP_Pos) +#define PMU_CR_SLPDP PMU_CR_SLPDP_Msk + +#define PMU_CR_CVS_Pos (8U) +#define PMU_CR_CVS_Msk (0x1U << PMU_CR_CVS_Pos) +#define PMU_CR_CVS PMU_CR_CVS_Msk + +#define PMU_CR_PMOD_Pos (0U) +#define PMU_CR_PMOD_Msk (0x3U << PMU_CR_PMOD_Pos) +#define PMU_CR_PMOD PMU_CR_PMOD_Msk + +#define PMU_WKTR_VREFDLY_Pos (3U) +#define PMU_WKTR_VREFDLY_Msk (0x1U << PMU_WKTR_VREFDLY_Pos) +#define PMU_WKTR_VREFDLY PMU_WKTR_VREFDLY_Msk + +#define PMU_WKTR_STPCLR_Pos (2U) +#define PMU_WKTR_STPCLR_Msk (0x1U << PMU_WKTR_STPCLR_Pos) +#define PMU_WKTR_STPCLR PMU_WKTR_STPCLR_Msk + +#define PMU_WKTR_T1A_Pos (0U) +#define PMU_WKTR_T1A_Msk (0x3U << PMU_WKTR_T1A_Pos) +#define PMU_WKTR_T1A PMU_WKTR_T1A_Msk + +#define PMU_WKFR_ADCWKF_Pos (31U) +#define PMU_WKFR_ADCWKF_Msk (0x1U << PMU_WKFR_ADCWKF_Pos) +#define PMU_WKFR_ADCWKF PMU_WKFR_ADCWKF_Msk + +#define PMU_WKFR_UART1WKF_Pos (30U) +#define PMU_WKFR_UART1WKF_Msk (0x1U << PMU_WKFR_UART1WKF_Pos) +#define PMU_WKFR_UART1WKF PMU_WKFR_UART1WKF_Msk + +#define PMU_WKFR_UART0WKF_Pos (29U) +#define PMU_WKFR_UART0WKF_Msk (0x1U << PMU_WKFR_UART0WKF_Pos) +#define PMU_WKFR_UART0WKF PMU_WKFR_UART0WKF_Msk + +#define PMU_WKFR_RTCWKF_Pos (28U) +#define PMU_WKFR_RTCWKF_Msk (0x1U << PMU_WKFR_RTCWKF_Pos) +#define PMU_WKFR_RTCWKF PMU_WKFR_RTCWKF_Msk + +#define PMU_WKFR_SVDWKF_Pos (27U) +#define PMU_WKFR_SVDWKF_Msk (0x1U << PMU_WKFR_SVDWKF_Pos) +#define PMU_WKFR_SVDWKF PMU_WKFR_SVDWKF_Msk + +#define PMU_WKFR_LFDETWKF_Pos (26U) +#define PMU_WKFR_LFDETWKF_Msk (0x1U << PMU_WKFR_LFDETWKF_Pos) +#define PMU_WKFR_LFDETWKF PMU_WKFR_LFDETWKF_Msk + +#define PMU_WKFR_VREFWKF_Pos (25U) +#define PMU_WKFR_VREFWKF_Msk (0x1U << PMU_WKFR_VREFWKF_Pos) +#define PMU_WKFR_VREFWKF PMU_WKFR_VREFWKF_Msk + +#define PMU_WKFR_IOWKF_Pos (24U) +#define PMU_WKFR_IOWKF_Msk (0x1U << PMU_WKFR_IOWKF_Pos) +#define PMU_WKFR_IOWKF PMU_WKFR_IOWKF_Msk + +#define PMU_WKFR_IICWKF_Pos (23U) +#define PMU_WKFR_IICWKF_Msk (0x1U << PMU_WKFR_IICWKF_Pos) +#define PMU_WKFR_IICWKF PMU_WKFR_IICWKF_Msk + +#define PMU_WKFR_LPU2WKF_Pos (22U) +#define PMU_WKFR_LPU2WKF_Msk (0x1U << PMU_WKFR_LPU2WKF_Pos) +#define PMU_WKFR_LPU2WKF PMU_WKFR_LPU2WKF_Msk + +#define PMU_WKFR_LPU1WKF_Pos (21U) +#define PMU_WKFR_LPU1WKF_Msk (0x1U << PMU_WKFR_LPU1WKF_Pos) +#define PMU_WKFR_LPU1WKF PMU_WKFR_LPU1WKF_Msk + +#define PMU_WKFR_LPU0WKF_Pos (20U) +#define PMU_WKFR_LPU0WKF_Msk (0x1U << PMU_WKFR_LPU0WKF_Pos) +#define PMU_WKFR_LPU0WKF PMU_WKFR_LPU0WKF_Msk + +#define PMU_WKFR_COMP3WKF_Pos (18U) +#define PMU_WKFR_COMP3WKF_Msk (0x1U << PMU_WKFR_COMP3WKF_Pos) +#define PMU_WKFR_COMP3WKF PMU_WKFR_COMP3WKF_Msk + +#define PMU_WKFR_COMP2WKF_Pos (17U) +#define PMU_WKFR_COMP2WKF_Msk (0x1U << PMU_WKFR_COMP2WKF_Pos) +#define PMU_WKFR_COMP2WKF PMU_WKFR_COMP2WKF_Msk + +#define PMU_WKFR_COMP1WKF_Pos (16U) +#define PMU_WKFR_COMP1WKF_Msk (0x1U << PMU_WKFR_COMP1WKF_Pos) +#define PMU_WKFR_COMP1WKF PMU_WKFR_COMP1WKF_Msk + +#define PMU_WKFR_LPT32WKF_Pos (14U) +#define PMU_WKFR_LPT32WKF_Msk (0x1U << PMU_WKFR_LPT32WKF_Pos) +#define PMU_WKFR_LPT32WKF PMU_WKFR_LPT32WKF_Msk + +#define PMU_WKFR_LPT16WKF_Pos (13U) +#define PMU_WKFR_LPT16WKF_Msk (0x1U << PMU_WKFR_LPT16WKF_Pos) +#define PMU_WKFR_LPT16WKF PMU_WKFR_LPT16WKF_Msk + +#define PMU_WKFR_BST32WKF_Pos (12U) +#define PMU_WKFR_BST32WKF_Msk (0x1U << PMU_WKFR_BST32WKF_Pos) +#define PMU_WKFR_BST32WKF PMU_WKFR_BST32WKF_Msk + +#define PMU_WKFR_BST16WKF_Pos (11U) +#define PMU_WKFR_BST16WKF_Msk (0x1U << PMU_WKFR_BST16WKF_Pos) +#define PMU_WKFR_BST16WKF PMU_WKFR_BST16WKF_Msk + +#define PMU_WKFR_DBGWKF_Pos (10U) +#define PMU_WKFR_DBGWKF_Msk (0x1U << PMU_WKFR_DBGWKF_Pos) +#define PMU_WKFR_DBGWKF PMU_WKFR_DBGWKF_Msk + +#define PMU_WKFR_WKPXF_Pos (0U) +#define PMU_WKFR_WKPXF_Msk (0x3ffU << PMU_WKFR_WKPXF_Pos) +#define PMU_WKFR_WKPXF PMU_WKFR_WKPXF_Msk + +#define PMU_IER_LPACTIE_Pos (2U) +#define PMU_IER_LPACTIE_Msk (0x1U << PMU_IER_LPACTIE_Pos) +#define PMU_IER_LPACTIE PMU_IER_LPACTIE_Msk + +#define PMU_IER_SLPEIE_Pos (1U) +#define PMU_IER_SLPEIE_Msk (0x1U << PMU_IER_SLPEIE_Pos) +#define PMU_IER_SLPEIE PMU_IER_SLPEIE_Msk + +#define PMU_IER_LPREIE_Pos (0U) +#define PMU_IER_LPREIE_Msk (0x1U << PMU_IER_LPREIE_Pos) +#define PMU_IER_LPREIE PMU_IER_LPREIE_Msk + +#define PMU_ISR_LPACTIF_Pos (2U) +#define PMU_ISR_LPACTIF_Msk (0x1U << PMU_ISR_LPACTIF_Pos) +#define PMU_ISR_LPACTIF PMU_ISR_LPACTIF_Msk + +#define PMU_ISR_SLPEIF_Pos (1U) +#define PMU_ISR_SLPEIF_Msk (0x1U << PMU_ISR_SLPEIF_Pos) +#define PMU_ISR_SLPEIF PMU_ISR_SLPEIF_Msk + +#define PMU_ISR_LPREIF_Pos (0U) +#define PMU_ISR_LPREIF_Msk (0x1U << PMU_ISR_LPREIF_Pos) +#define PMU_ISR_LPREIF PMU_ISR_LPREIF_Msk + + + +#define FL_PMU_WAKEUP0_PIN (0x1U << 0U) +#define FL_PMU_WAKEUP1_PIN (0x1U << 1U) +#define FL_PMU_WAKEUP2_PIN (0x1U << 2U) +#define FL_PMU_WAKEUP3_PIN (0x1U << 3U) +#define FL_PMU_WAKEUP4_PIN (0x1U << 4U) +#define FL_PMU_WAKEUP5_PIN (0x1U << 5U) +#define FL_PMU_WAKEUP6_PIN (0x1U << 6U) +#define FL_PMU_WAKEUP7_PIN (0x1U << 7U) +#define FL_PMU_WAKEUP8_PIN (0x1U << 8U) +#define FL_PMU_WAKEUP9_PIN (0x1U << 9U) + + + +#define FL_PMU_LDO_LPM_DISABLE (0x0U << PMU_CR_LDO_LPM_Pos) +#define FL_PMU_LDO_LPM_ENABLE (0x2U << PMU_CR_LDO_LPM_Pos) + + +#define FL_PMU_RCHF_WAKEUP_FREQ_8MHZ (0x0U << PMU_CR_WKFSEL_Pos) +#define FL_PMU_RCHF_WAKEUP_FREQ_16MHZ (0x1U << PMU_CR_WKFSEL_Pos) +#define FL_PMU_RCHF_WAKEUP_FREQ_24MHZ (0x2U << PMU_CR_WKFSEL_Pos) + + +#define FL_PMU_SLEEP_MODE_DEEP (0x1U << PMU_CR_SLPDP_Pos) +#define FL_PMU_SLEEP_MODE_NORMAL (0x0U << PMU_CR_SLPDP_Pos) + + +#define FL_PMU_POWER_MODE_ACTIVE_OR_LPACTIVE (0x0U << PMU_CR_PMOD_Pos) +#define FL_PMU_POWER_MODE_LPRUN_ONLY (0x1U << PMU_CR_PMOD_Pos) +#define FL_PMU_POWER_MODE_SLEEP_OR_DEEPSLEEP (0x2U << PMU_CR_PMOD_Pos) + +#define FL_PMU_WAKEUP_DELAY_MODE_IMMEDIATE (0x0U << PMU_WKTR_VREFDLY_Pos) +#define FL_PMU_WAKEUP_DELAY_MODE_WAIT_VREF1P2 (0x1U << PMU_WKTR_VREFDLY_Pos) + + +#define FL_PMU_FLASH_STOP_CLEAR_MODE_SYNCHRONOUS (0x0U << PMU_WKTR_STPCLR_Pos) +#define FL_PMU_FLASH_STOP_CLEAR_MODE_ASYNCHRONOUS (0x1U << PMU_WKTR_STPCLR_Pos) + + +#define FL_PMU_WAKEUP_DELAY_0US (0x0U << PMU_WKTR_T1A_Pos) +#define FL_PMU_WAKEUP_DELAY_2US (0x1U << PMU_WKTR_T1A_Pos) +#define FL_PMU_WAKEUP_DELAY_4US (0x2U << PMU_WKTR_T1A_Pos) +#define FL_PMU_WAKEUP_DELAY_8US (0x3U << PMU_WKTR_T1A_Pos) + + +/** + * @} + */ +/* Exported functions ---------------------------------------------------------------------------------*/ +/** @defgroup PMU_FL_Exported_Functions PMU Exported Functions + * @{ + */ + +/** + * @brief Set LDO Low Power Mode + * @rmtoll CR LDO_LPM FL_PMU_SetLDOLowPowerMode + * @param PMUx PMU instance + * @param mode This parameter can be one of the following values: + * @arg @ref FL_PMU_LDO_LPM_DISABLE + * @arg @ref FL_PMU_LDO_LPM_ENABLE + * @retval None + */ +__STATIC_INLINE void FL_PMU_SetLDOLowPowerMode(PMU_Type *PMUx, uint32_t mode) +{ + MODIFY_REG(PMUx->CR, PMU_CR_LDO_LPM_Msk, mode); +} + +/** + * @brief Get LDO Low Power Mode Setting + * @rmtoll CR LDO_LPM FL_PMU_GetLDOLowPowerMode + * @param PMUx PMU instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_PMU_LDO_LPM_DISABLE + * @arg @ref FL_PMU_LDO_LPM_ENABLE + */ +__STATIC_INLINE uint32_t FL_PMU_GetLDOLowPowerMode(PMU_Type *PMUx) +{ + return (uint32_t)(READ_BIT(PMUx->CR, PMU_CR_LDO_LPM_Msk)); +} + +/** + * @brief Get LDO15 Enable Status + * @rmtoll CR LDO15EN FL_PMU_GetLDO15Status + * @param PMUx PMU instance + * @retval Returned value can be one of the following values: + */ +__STATIC_INLINE uint32_t FL_PMU_GetLDO15Status(PMU_Type *PMUx) +{ + return (uint32_t)(READ_BIT(PMUx->CR, PMU_CR_LDO15EN_Msk)); +} + +/** + * @brief Get LDO15 Inverse check bit + * @rmtoll CR LDO15EN_B FL_PMU_GetLDO15StatusInvert + * @param PMUx PMU instance + * @retval Returned value can be one of the following values: + */ +__STATIC_INLINE uint32_t FL_PMU_GetLDO15StatusInvert(PMU_Type *PMUx) +{ + return (uint32_t)(READ_BIT(PMUx->CR, PMU_CR_LDO15EN_B_Msk)); +} + +/** + * @brief Set RCHF Frequency After Wakeup + * @rmtoll CR WKFSEL FL_PMU_SetRCHFWakeupFrequency + * @param PMUx PMU instance + * @param Freq This parameter can be one of the following values: + * @arg @ref FL_PMU_RCHF_WAKEUP_FREQ_8MHZ + * @arg @ref FL_PMU_RCHF_WAKEUP_FREQ_16MHZ + * @arg @ref FL_PMU_RCHF_WAKEUP_FREQ_24MHZ + * @retval None + */ +__STATIC_INLINE void FL_PMU_SetRCHFWakeupFrequency(PMU_Type *PMUx, uint32_t Freq) +{ + MODIFY_REG(PMUx->CR, PMU_CR_WKFSEL_Msk, Freq); +} + +/** + * @brief Get RCHF Frequency After Wakeup Setting + * @rmtoll CR WKFSEL FL_PMU_GetRCHFWakeupFrequency + * @param PMUx PMU instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_PMU_RCHF_WAKEUP_FREQ_8MHZ + * @arg @ref FL_PMU_RCHF_WAKEUP_FREQ_16MHZ + * @arg @ref FL_PMU_RCHF_WAKEUP_FREQ_24MHZ + */ +__STATIC_INLINE uint32_t FL_PMU_GetRCHFWakeupFrequency(PMU_Type *PMUx) +{ + return (uint32_t)(READ_BIT(PMUx->CR, PMU_CR_WKFSEL_Msk)); +} + +/** + * @brief Set Sleep Mode + * @rmtoll CR SLPDP FL_PMU_SetSleepMode + * @param PMUx PMU instance + * @param mode This parameter can be one of the following values: + * @arg @ref FL_PMU_SLEEP_MODE_DEEP + * @arg @ref FL_PMU_SLEEP_MODE_NORMAL + * @retval None + */ +__STATIC_INLINE void FL_PMU_SetSleepMode(PMU_Type *PMUx, uint32_t mode) +{ + MODIFY_REG(PMUx->CR, PMU_CR_SLPDP_Msk, mode); +} + +/** + * @brief Get Sleep Mode Setting + * @rmtoll CR SLPDP FL_PMU_GetSleepMode + * @param PMUx PMU instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_PMU_SLEEP_MODE_DEEP + * @arg @ref FL_PMU_SLEEP_MODE_NORMAL + */ +__STATIC_INLINE uint32_t FL_PMU_GetSleepMode(PMU_Type *PMUx) +{ + return (uint32_t)(READ_BIT(PMUx->CR, PMU_CR_SLPDP_Msk)); +} + +/** + * @brief Enable Core Voltage Scaling Under Low Power Mode + * @rmtoll CR CVS FL_PMU_EnableCoreVoltageScaling + * @param PMUx PMU instance + * @retval None + */ +__STATIC_INLINE void FL_PMU_EnableCoreVoltageScaling(PMU_Type *PMUx) +{ + SET_BIT(PMUx->CR, PMU_CR_CVS_Msk); +} + +/** + * @brief Get Core Voltage Scaling Under Low Power Mode Enable Status + * @rmtoll CR CVS FL_PMU_IsEnabledCoreVoltageScaling + * @param PMUx PMU instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_PMU_IsEnabledCoreVoltageScaling(PMU_Type *PMUx) +{ + return (uint32_t)(READ_BIT(PMUx->CR, PMU_CR_CVS_Msk) == PMU_CR_CVS_Msk); +} + +/** + * @brief Disable Core Voltage Scaling Under Low Power Mode + * @rmtoll CR CVS FL_PMU_DisableCoreVoltageScaling + * @param PMUx PMU instance + * @retval None + */ +__STATIC_INLINE void FL_PMU_DisableCoreVoltageScaling(PMU_Type *PMUx) +{ + CLEAR_BIT(PMUx->CR, PMU_CR_CVS_Msk); +} + +/** + * @brief Set Low Power Mode + * @rmtoll CR PMOD FL_PMU_SetLowPowerMode + * @param PMUx PMU instance + * @param mode This parameter can be one of the following values: + * @arg @ref FL_PMU_POWER_MODE_ACTIVE_OR_LPACTIVE + * @arg @ref FL_PMU_POWER_MODE_LPRUN_ONLY + * @arg @ref FL_PMU_POWER_MODE_SLEEP_OR_DEEPSLEEP + * @retval None + */ +__STATIC_INLINE void FL_PMU_SetLowPowerMode(PMU_Type *PMUx, uint32_t mode) +{ + MODIFY_REG(PMUx->CR, PMU_CR_PMOD_Msk, mode); +} + +/** + * @brief Get Low Power Mode Setting + * @rmtoll CR PMOD FL_PMU_GetLowPowerMode + * @param PMUx PMU instance + * @retval Returned value can be one of the following values: + */ +__STATIC_INLINE uint32_t FL_PMU_GetLowPowerMode(PMU_Type *PMUx) +{ + return (uint32_t)(READ_BIT(PMUx->CR, PMU_CR_PMOD_Msk)); +} + +/** + * @brief Set VREF delay wakeup mode + * @rmtoll WKTR VREFDLY FL_PMU_SetVREFWakeupDelayMode + * @param PMUx PMU instance + * @param VREFDelay This parameter can be one of the following values: + * @arg @ref FL_PMU_WAKEUP_DELAY_MODE_IMMEDIATE + * @arg @ref FL_PMU_WAKEUP_DELAY_MODE_WAIT_VREF1P2 + * @retval None + */ +__STATIC_INLINE void FL_PMU_SetVREFWakeupDelayMode(PMU_Type *PMUx, uint32_t VREFDelay) +{ + MODIFY_REG(PMUx->WKTR, PMU_WKTR_VREFDLY_Msk, VREFDelay); +} + +/** + * @brief Get VREF delay wakeup status + * @rmtoll WKTR VREFDLY FL_PMU_GetVREFWakeupDelayMode + * @param PMUx PMU instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_PMU_WAKEUP_DELAY_MODE_IMMEDIATE + * @arg @ref FL_PMU_WAKEUP_DELAY_MODE_WAIT_VREF1P2 + */ +__STATIC_INLINE uint32_t FL_PMU_GetVREFWakeupDelayMode(PMU_Type *PMUx) +{ + return (uint32_t)(READ_BIT(PMUx->WKTR, PMU_WKTR_VREFDLY_Msk)); +} + +/** + * @brief Set Flash Stop Signal Clear Way + * @rmtoll WKTR STPCLR FL_PMU_SetFlashStopSignalClearMode + * @param PMUx PMU instance + * @param config This parameter can be one of the following values: + * @arg @ref FL_PMU_FLASH_STOP_CLEAR_MODE_ASYNCHRONOUS + * @arg @ref FL_PMU_FLASH_STOP_CLEAR_MODE_SYNCHRONOUS + * @retval None + */ +__STATIC_INLINE void FL_PMU_SetFlashStopSignalClearMode(PMU_Type *PMUx, uint32_t config) +{ + MODIFY_REG(PMUx->WKTR, PMU_WKTR_STPCLR_Msk, config); +} + +/** + * @brief Get Flash Stop Signal Clear Way Setting + * @rmtoll WKTR STPCLR FL_PMU_GetFlashStopSignalClearMode + * @param PMUx PMU instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_PMU_FLASH_STOP_CLEAR_MODE_ASYNCHRONOUS + * @arg @ref FL_PMU_FLASH_STOP_CLEAR_MODE_SYNCHRONOUS + */ +__STATIC_INLINE uint32_t FL_PMU_GetFlashStopSignalClearMode(PMU_Type *PMUx) +{ + return (uint32_t)(READ_BIT(PMUx->WKTR, PMU_WKTR_STPCLR_Msk)); +} + +/** + * @brief Set Extra Wakeup Delay Under Sleep/DeepSleep Mode + * @rmtoll WKTR T1A FL_PMU_SetWakeupDelay + * @param PMUx PMU instance + * @param time This parameter can be one of the following values: + * @arg @ref FL_PMU_WAKEUP_DELAY_0US + * @arg @ref FL_PMU_WAKEUP_DELAY_2US + * @arg @ref FL_PMU_WAKEUP_DELAY_4US + * @arg @ref FL_PMU_WAKEUP_DELAY_8US + * @retval None + */ +__STATIC_INLINE void FL_PMU_SetWakeupDelay(PMU_Type *PMUx, uint32_t time) +{ + MODIFY_REG(PMUx->WKTR, PMU_WKTR_T1A_Msk, time); +} + +/** + * @brief Get Extra Wakeup Delay Under Sleep/DeepSleep Mode Setting + * @rmtoll WKTR T1A FL_PMU_GetWakeupDelay + * @param PMUx PMU instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_PMU_WAKEUP_DELAY_0US + * @arg @ref FL_PMU_WAKEUP_DELAY_2US + * @arg @ref FL_PMU_WAKEUP_DELAY_4US + * @arg @ref FL_PMU_WAKEUP_DELAY_8US + */ +__STATIC_INLINE uint32_t FL_PMU_GetWakeupDelay(PMU_Type *PMUx) +{ + return (uint32_t)(READ_BIT(PMUx->WKTR, PMU_WKTR_T1A_Msk)); +} + +/** + * @brief Get ADC interrupt wakeup flag + * @rmtoll WKFR ADCWKF FL_PMU_IsActiveFlag_WakeupADC + * @param PMUx PMU instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_PMU_IsActiveFlag_WakeupADC(PMU_Type *PMUx) +{ + return (uint32_t)(READ_BIT(PMUx->WKFR, PMU_WKFR_ADCWKF_Msk) == (PMU_WKFR_ADCWKF_Msk)); +} + +/** + * @brief Get UART1 interrupt wakeup flag + * @rmtoll WKFR UART1WKF FL_PMU_IsActiveFlag_WakeupUART1 + * @param PMUx PMU instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_PMU_IsActiveFlag_WakeupUART1(PMU_Type *PMUx) +{ + return (uint32_t)(READ_BIT(PMUx->WKFR, PMU_WKFR_UART1WKF_Msk) == (PMU_WKFR_UART1WKF_Msk)); +} + +/** + * @brief Get UART0 interrupt wakeup flag + * @rmtoll WKFR UART0WKF FL_PMU_IsActiveFlag_WakeupUART0 + * @param PMUx PMU instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_PMU_IsActiveFlag_WakeupUART0(PMU_Type *PMUx) +{ + return (uint32_t)(READ_BIT(PMUx->WKFR, PMU_WKFR_UART0WKF_Msk) == (PMU_WKFR_UART0WKF_Msk)); +} + +/** + * @brief Get RTC interrupt wakeup flag + * @rmtoll WKFR RTCWKF FL_PMU_IsActiveFlag_WakeupRTC + * @param PMUx PMU instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_PMU_IsActiveFlag_WakeupRTC(PMU_Type *PMUx) +{ + return (uint32_t)(READ_BIT(PMUx->WKFR, PMU_WKFR_RTCWKF_Msk) == (PMU_WKFR_RTCWKF_Msk)); +} + +/** + * @brief Get SVD interrupt wakeup flag + * @rmtoll WKFR SVDWKF FL_PMU_IsActiveFlag_WakeupSVD + * @param PMUx PMU instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_PMU_IsActiveFlag_WakeupSVD(PMU_Type *PMUx) +{ + return (uint32_t)(READ_BIT(PMUx->WKFR, PMU_WKFR_SVDWKF_Msk) == (PMU_WKFR_SVDWKF_Msk)); +} + +/** + * @brief Get LFDET interrupt wakeup flag + * @rmtoll WKFR LFDETWKF FL_PMU_IsActiveFlag_WakeupLFDET + * @param PMUx PMU instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_PMU_IsActiveFlag_WakeupLFDET(PMU_Type *PMUx) +{ + return (uint32_t)(READ_BIT(PMUx->WKFR, PMU_WKFR_LFDETWKF_Msk) == (PMU_WKFR_LFDETWKF_Msk)); +} + +/** + * @brief Get VREF interrupt wakeup flag + * @rmtoll WKFR VREFWKF FL_PMU_IsActiveFlag_WakeupVREF + * @param PMUx PMU instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_PMU_IsActiveFlag_WakeupVREF(PMU_Type *PMUx) +{ + return (uint32_t)(READ_BIT(PMUx->WKFR, PMU_WKFR_VREFWKF_Msk) == (PMU_WKFR_VREFWKF_Msk)); +} + +/** + * @brief Get IO interrupt wakeup flag + * @rmtoll WKFR IOWKF FL_PMU_IsActiveFlag_WakeupEXTI + * @param PMUx PMU instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_PMU_IsActiveFlag_WakeupEXTI(PMU_Type *PMUx) +{ + return (uint32_t)(READ_BIT(PMUx->WKFR, PMU_WKFR_IOWKF_Msk) == (PMU_WKFR_IOWKF_Msk)); +} + +/** + * @brief Get I2C interrupt wakeup flag + * @rmtoll WKFR IICWKF FL_PMU_IsActiveFlag_WakeupI2C + * @param PMUx PMU instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_PMU_IsActiveFlag_WakeupI2C(PMU_Type *PMUx) +{ + return (uint32_t)(READ_BIT(PMUx->WKFR, PMU_WKFR_IICWKF_Msk) == (PMU_WKFR_IICWKF_Msk)); +} + +/** + * @brief Get LPUART2 interrupt wakeup flag + * @rmtoll WKFR LPU2WKF FL_PMU_IsActiveFlag_WakeupLPUART2 + * @param PMUx PMU instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_PMU_IsActiveFlag_WakeupLPUART2(PMU_Type *PMUx) +{ + return (uint32_t)(READ_BIT(PMUx->WKFR, PMU_WKFR_LPU2WKF_Msk) == (PMU_WKFR_LPU2WKF_Msk)); +} + +/** + * @brief Get LPUART1 interrupt wakeup flag + * @rmtoll WKFR LPU1WKF FL_PMU_IsActiveFlag_WakeupLPUART1 + * @param PMUx PMU instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_PMU_IsActiveFlag_WakeupLPUART1(PMU_Type *PMUx) +{ + return (uint32_t)(READ_BIT(PMUx->WKFR, PMU_WKFR_LPU1WKF_Msk) == (PMU_WKFR_LPU1WKF_Msk)); +} + +/** + * @brief Get LPUART0 interrupt wakeup flag + * @rmtoll WKFR LPU0WKF FL_PMU_IsActiveFlag_WakeupLPUART0 + * @param PMUx PMU instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_PMU_IsActiveFlag_WakeupLPUART0(PMU_Type *PMUx) +{ + return (uint32_t)(READ_BIT(PMUx->WKFR, PMU_WKFR_LPU0WKF_Msk) == (PMU_WKFR_LPU0WKF_Msk)); +} + +/** + * @brief Get COMP3 interrrupt wakeup flag + * @rmtoll WKFR COMP3WKF FL_PMU_IsActiveFlag_WakeupCOMP3 + * @param PMUx PMU instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_PMU_IsActiveFlag_WakeupCOMP3(PMU_Type *PMUx) +{ + return (uint32_t)(READ_BIT(PMUx->WKFR, PMU_WKFR_COMP3WKF_Msk) == (PMU_WKFR_COMP3WKF_Msk)); +} + +/** + * @brief Get COMP2 interrrupt wakeup flag + * @rmtoll WKFR COMP2WKF FL_PMU_IsActiveFlag_WakeupCOMP2 + * @param PMUx PMU instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_PMU_IsActiveFlag_WakeupCOMP2(PMU_Type *PMUx) +{ + return (uint32_t)(READ_BIT(PMUx->WKFR, PMU_WKFR_COMP2WKF_Msk) == (PMU_WKFR_COMP2WKF_Msk)); +} + +/** + * @brief Get COMP1 interrrupt wakeup flag + * @rmtoll WKFR COMP1WKF FL_PMU_IsActiveFlag_WakeupCOMP1 + * @param PMUx PMU instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_PMU_IsActiveFlag_WakeupCOMP1(PMU_Type *PMUx) +{ + return (uint32_t)(READ_BIT(PMUx->WKFR, PMU_WKFR_COMP1WKF_Msk) == (PMU_WKFR_COMP1WKF_Msk)); +} + +/** + * @brief Get LPTIM32 interrupt wakeup flag + * @rmtoll WKFR LPT32WKF FL_PMU_IsActiveFlag_WakeupLPTIM32 + * @param PMUx PMU instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_PMU_IsActiveFlag_WakeupLPTIM32(PMU_Type *PMUx) +{ + return (uint32_t)(READ_BIT(PMUx->WKFR, PMU_WKFR_LPT32WKF_Msk) == (PMU_WKFR_LPT32WKF_Msk)); +} + +/** + * @brief Get LPTIM16 interrupt wakeup flag + * @rmtoll WKFR LPT16WKF FL_PMU_IsActiveFlag_WakeupLPTIM16 + * @param PMUx PMU instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_PMU_IsActiveFlag_WakeupLPTIM16(PMU_Type *PMUx) +{ + return (uint32_t)(READ_BIT(PMUx->WKFR, PMU_WKFR_LPT16WKF_Msk) == (PMU_WKFR_LPT16WKF_Msk)); +} + +/** + * @brief Get BSTIM32 interrupt wakeup flag + * @rmtoll WKFR BST32WKF FL_PMU_IsActiveFlag_WakeupBSTIM32 + * @param PMUx PMU instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_PMU_IsActiveFlag_WakeupBSTIM32(PMU_Type *PMUx) +{ + return (uint32_t)(READ_BIT(PMUx->WKFR, PMU_WKFR_BST32WKF_Msk) == (PMU_WKFR_BST32WKF_Msk)); +} + +/** + * @brief Get BSTIM16 interrupt wakeup flag + * @rmtoll WKFR BST16WKF FL_PMU_IsActiveFlag_WakeupBSTIM16 + * @param PMUx PMU instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_PMU_IsActiveFlag_WakeupBSTIM16(PMU_Type *PMUx) +{ + return (uint32_t)(READ_BIT(PMUx->WKFR, PMU_WKFR_BST16WKF_Msk) == (PMU_WKFR_BST16WKF_Msk)); +} + +/** + * @brief Get CPU Debugger wakeup flag + * @rmtoll WKFR DBGWKF FL_PMU_IsActiveFlag_WakeupDBG + * @param PMUx PMU instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_PMU_IsActiveFlag_WakeupDBG(PMU_Type *PMUx) +{ + return (uint32_t)(READ_BIT(PMUx->WKFR, PMU_WKFR_DBGWKF_Msk) == (PMU_WKFR_DBGWKF_Msk)); +} + +/** + * @brief Clear CPU Debugger wakeup flag + * @rmtoll WKFR DBGWKF FL_PMU_ClearFlag_WakeupDBG + * @param PMUx PMU instance + * @retval None + */ +__STATIC_INLINE void FL_PMU_ClearFlag_WakeupDBG(PMU_Type *PMUx) +{ + WRITE_REG(PMUx->WKFR, PMU_WKFR_DBGWKF_Msk); +} + +/** + * @brief Get pinx wakeup flag + * @rmtoll WKFR WKPXF FL_PMU_IsActiveFlag_WakeupPIN + * @param PMUx PMU instance + * @param Pin This parameter can be one of the following values: + * @arg @ref FL_PMU_WAKEUP0_PIN + * @arg @ref FL_PMU_WAKEUP1_PIN + * @arg @ref FL_PMU_WAKEUP2_PIN + * @arg @ref FL_PMU_WAKEUP3_PIN + * @arg @ref FL_PMU_WAKEUP4_PIN + * @arg @ref FL_PMU_WAKEUP5_PIN + * @arg @ref FL_PMU_WAKEUP6_PIN + * @arg @ref FL_PMU_WAKEUP7_PIN + * @arg @ref FL_PMU_WAKEUP8_PIN + * @arg @ref FL_PMU_WAKEUP9_PIN + * @retval Returned value can be one of the following values: + */ +__STATIC_INLINE uint32_t FL_PMU_IsActiveFlag_WakeupPIN(PMU_Type *PMUx, uint32_t Pin) +{ + return (uint32_t)(READ_BIT(PMUx->WKFR, ((Pin & 0x3ff) << 0x0U)) == ((Pin & 0x3ff) << 0x0U)); +} + +/** + * @brief Clear pinx wakeup flag + * @rmtoll WKFR WKPXF FL_PMU_ClearFlag_WakeupPIN + * @param PMUx PMU instance + * @param Pin This parameter can be one of the following values: + * @arg @ref FL_PMU_WAKEUP0_PIN + * @arg @ref FL_PMU_WAKEUP1_PIN + * @arg @ref FL_PMU_WAKEUP2_PIN + * @arg @ref FL_PMU_WAKEUP3_PIN + * @arg @ref FL_PMU_WAKEUP4_PIN + * @arg @ref FL_PMU_WAKEUP5_PIN + * @arg @ref FL_PMU_WAKEUP6_PIN + * @arg @ref FL_PMU_WAKEUP7_PIN + * @arg @ref FL_PMU_WAKEUP8_PIN + * @arg @ref FL_PMU_WAKEUP9_PIN + * @retval None + */ +__STATIC_INLINE void FL_PMU_ClearFlag_WakeupPIN(PMU_Type *PMUx, uint32_t Pin) +{ + WRITE_REG(PMUx->WKFR, ((Pin & 0x3ff) << 0x0U)); +} + +/** + * @brief LPActive error interrupt enable + * @rmtoll IER LPACTIE FL_PMU_EnableIT_LPActiveError + * @param PMUx PMU instance + * @retval None + */ +__STATIC_INLINE void FL_PMU_EnableIT_LPActiveError(PMU_Type *PMUx) +{ + SET_BIT(PMUx->IER, PMU_IER_LPACTIE_Msk); +} + +/** + * @brief Get LPActive error interrupt enable status + * @rmtoll IER LPACTIE FL_PMU_IsEnabledIT_LPActiveError + * @param PMUx PMU instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_PMU_IsEnabledIT_LPActiveError(PMU_Type *PMUx) +{ + return (uint32_t)(READ_BIT(PMUx->IER, PMU_IER_LPACTIE_Msk) == PMU_IER_LPACTIE_Msk); +} + +/** + * @brief LPActive error interrupt disable + * @rmtoll IER LPACTIE FL_PMU_DisableIT_LPActiveError + * @param PMUx PMU instance + * @retval None + */ +__STATIC_INLINE void FL_PMU_DisableIT_LPActiveError(PMU_Type *PMUx) +{ + CLEAR_BIT(PMUx->IER, PMU_IER_LPACTIE_Msk); +} + +/** + * @brief Sleep error interrupt enable + * @rmtoll IER SLPEIE FL_PMU_EnableIT_SleepError + * @param PMUx PMU instance + * @retval None + */ +__STATIC_INLINE void FL_PMU_EnableIT_SleepError(PMU_Type *PMUx) +{ + SET_BIT(PMUx->IER, PMU_IER_SLPEIE_Msk); +} + +/** + * @brief Get sleep error interrupt enable status + * @rmtoll IER SLPEIE FL_PMU_IsEnabledIT_SleepError + * @param PMUx PMU instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_PMU_IsEnabledIT_SleepError(PMU_Type *PMUx) +{ + return (uint32_t)(READ_BIT(PMUx->IER, PMU_IER_SLPEIE_Msk) == PMU_IER_SLPEIE_Msk); +} + +/** + * @brief Sleep error interrupt disable + * @rmtoll IER SLPEIE FL_PMU_DisableIT_SleepError + * @param PMUx PMU instance + * @retval None + */ +__STATIC_INLINE void FL_PMU_DisableIT_SleepError(PMU_Type *PMUx) +{ + CLEAR_BIT(PMUx->IER, PMU_IER_SLPEIE_Msk); +} + +/** + * @brief LPREIE error interrupt enable + * @rmtoll IER LPREIE FL_PMU_EnableIT_LPRunError + * @param PMUx PMU instance + * @retval None + */ +__STATIC_INLINE void FL_PMU_EnableIT_LPRunError(PMU_Type *PMUx) +{ + SET_BIT(PMUx->IER, PMU_IER_LPREIE_Msk); +} + +/** + * @brief Get LPREIE error interrupt enable status + * @rmtoll IER LPREIE FL_PMU_IsEnabledIT_LPRunError + * @param PMUx PMU instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_PMU_IsEnabledIT_LPRunError(PMU_Type *PMUx) +{ + return (uint32_t)(READ_BIT(PMUx->IER, PMU_IER_LPREIE_Msk) == PMU_IER_LPREIE_Msk); +} + +/** + * @brief LPREIE error interrupt disable + * @rmtoll IER LPREIE FL_PMU_DisableIT_LPRunError + * @param PMUx PMU instance + * @retval None + */ +__STATIC_INLINE void FL_PMU_DisableIT_LPRunError(PMU_Type *PMUx) +{ + CLEAR_BIT(PMUx->IER, PMU_IER_LPREIE_Msk); +} + +/** + * @brief Get LPACTIF error interrupt flag + * @rmtoll ISR LPACTIF FL_PMU_IsActiveFlag_LPActiveError + * @param PMUx PMU instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_PMU_IsActiveFlag_LPActiveError(PMU_Type *PMUx) +{ + return (uint32_t)(READ_BIT(PMUx->ISR, PMU_ISR_LPACTIF_Msk) == (PMU_ISR_LPACTIF_Msk)); +} + +/** + * @brief Clear LPACTIF error interrupt flag + * @rmtoll ISR LPACTIF FL_PMU_ClearFlag_LPActiveError + * @param PMUx PMU instance + * @retval None + */ +__STATIC_INLINE void FL_PMU_ClearFlag_LPActiveError(PMU_Type *PMUx) +{ + WRITE_REG(PMUx->ISR, PMU_ISR_LPACTIF_Msk); +} + +/** + * @brief Get SLEEP error interrupt flag + * @rmtoll ISR SLPEIF FL_PMU_IsActiveFlag_SleepError + * @param PMUx PMU instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_PMU_IsActiveFlag_SleepError(PMU_Type *PMUx) +{ + return (uint32_t)(READ_BIT(PMUx->ISR, PMU_ISR_SLPEIF_Msk) == (PMU_ISR_SLPEIF_Msk)); +} + +/** + * @brief Clear SLEEP error interrupt flag + * @rmtoll ISR SLPEIF FL_PMU_ClearFlag_SleepError + * @param PMUx PMU instance + * @retval None + */ +__STATIC_INLINE void FL_PMU_ClearFlag_SleepError(PMU_Type *PMUx) +{ + WRITE_REG(PMUx->ISR, PMU_ISR_SLPEIF_Msk); +} + +/** + * @brief Get LPRUN error interrupt flag + * @rmtoll ISR LPREIF FL_PMU_IsActiveFlag_LPRunError + * @param PMUx PMU instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_PMU_IsActiveFlag_LPRunError(PMU_Type *PMUx) +{ + return (uint32_t)(READ_BIT(PMUx->ISR, PMU_ISR_LPREIF_Msk) == (PMU_ISR_LPREIF_Msk)); +} + +/** + * @brief Clear LPRUN error interrupt flag + * @rmtoll ISR LPREIF FL_PMU_ClearFlag_LPRunError + * @param PMUx PMU instance + * @retval None + */ +__STATIC_INLINE void FL_PMU_ClearFlag_LPRunError(PMU_Type *PMUx) +{ + WRITE_REG(PMUx->ISR, PMU_ISR_LPREIF_Msk); +} + +/** + * @brief Set ULPBG output VREF + * @rmtoll ULPB_TR FL_PMU_WriteULPBGOutputTrim + * @param PMUx PMU instance + * @param trim + * @retval None + */ +__STATIC_INLINE void FL_PMU_WriteULPBGOutputTrim(PMU_Type *PMUx, uint32_t trim) +{ + MODIFY_REG(PMUx->ULPB_TR, (0x1fU << 0U), (trim << 0U)); +} + +/** + * @brief Get ULPBG output VREF + * @rmtoll ULPB_TR FL_PMU_ReadULPBGOutputTrim + * @param PMUx PMU instance + * @retval + */ +__STATIC_INLINE uint32_t FL_PMU_ReadULPBGOutputTrim(PMU_Type *PMUx) +{ + return (uint32_t)(READ_BIT(PMUx->ULPB_TR, (0x1fU << 0U)) >> 0U); +} + +/** + * @} + */ + +/** @defgroup PMU_FL_EF_Init Initialization and de-initialization functions + * @{ + */ +FL_ErrorStatus FL_PMU_Sleep_DeInit(PMU_Type *PMUx); +FL_ErrorStatus FL_PMU_Sleep_Init(PMU_Type *PMUx, FL_PMU_SleepInitTypeDef *LPM_InitStruct); +void FL_PMU_StructInit(FL_PMU_SleepInitTypeDef *LPM_InitStruct); + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif /* __FM33LG0XX_FL_PMU_H*/ + +/*************************Py_Code_Generator Version: 0.1-0.14-0.1 @ 2020-10-20*************************/ +/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/ diff --git a/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_rmu.h b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_rmu.h new file mode 100644 index 0000000..ec669fa --- /dev/null +++ b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_rmu.h @@ -0,0 +1,783 @@ + /** + ******************************************************************************************************* + * @file fm33lg0xx_fl_rmu.h + * @author FMSH Application Team + * @brief Head file of RMU FL Module + ******************************************************************************************************* + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + + + +/* Define to prevent recursive inclusion---------------------------------------------------------------*/ +#ifndef __FM33LG0XX_FL_RMU_H +#define __FM33LG0XX_FL_RMU_H + +#ifdef __cplusplus +extern "C" { +#endif +/* Includes -------------------------------------------------------------------------------------------*/ +#include "fm33lg0xx_fl_def.h" +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @defgroup RMU RMU + * @brief RMU FL driver + * @{ + */ + +/* Exported types -------------------------------------------------------------------------------------*/ +/** @defgroup RMU_FL_ES_INIT RMU Exported Init structures + * @{ + */ + +/** + * @brief FL RMU Init Sturcture definition + */ + +/** + * @} + */ +/* Exported constants ---------------------------------------------------------------------------------*/ +/** @defgroup RMU_FL_Exported_Constants RMU Exported Constants + * @{ + */ + +#define RMU_PDRCR_CFG_Pos (1U) +#define RMU_PDRCR_CFG_Msk (0x3U << RMU_PDRCR_CFG_Pos) +#define RMU_PDRCR_CFG RMU_PDRCR_CFG_Msk + +#define RMU_PDRCR_EN_Pos (0U) +#define RMU_PDRCR_EN_Msk (0x1U << RMU_PDRCR_EN_Pos) +#define RMU_PDRCR_EN RMU_PDRCR_EN_Msk + +#define RMU_BORCR_CFG_Pos (2U) +#define RMU_BORCR_CFG_Msk (0x3U << RMU_BORCR_CFG_Pos) +#define RMU_BORCR_CFG RMU_BORCR_CFG_Msk + +#define RMU_BORCR_ENB_Pos (0U) +#define RMU_BORCR_ENB_Msk (0x1U << RMU_BORCR_ENB_Pos) +#define RMU_BORCR_ENB RMU_BORCR_ENB_Msk + +#define RMU_LKPCR_EN_Pos (1U) +#define RMU_LKPCR_EN_Msk (0x1U << RMU_LKPCR_EN_Pos) +#define RMU_LKPCR_EN RMU_LKPCR_EN_Msk + +#define RMU_RSTFR_MDFN_FLAG_Pos (12U) +#define RMU_RSTFR_MDFN_FLAG_Msk (0x1U << RMU_RSTFR_MDFN_FLAG_Pos) +#define RMU_RSTFR_MDFN_FLAG RMU_RSTFR_MDFN_FLAG_Msk + +#define RMU_RSTFR_NRSTN_FLAG_Pos (11U) +#define RMU_RSTFR_NRSTN_FLAG_Msk (0x1U << RMU_RSTFR_NRSTN_FLAG_Pos) +#define RMU_RSTFR_NRSTN_FLAG RMU_RSTFR_NRSTN_FLAG_Msk + +#define RMU_RSTFR_PRC_FLAG_Pos (10U) +#define RMU_RSTFR_PRC_FLAG_Msk (0x1U << RMU_RSTFR_PRC_FLAG_Pos) +#define RMU_RSTFR_PRC_FLAG RMU_RSTFR_PRC_FLAG_Msk + +#define RMU_RSTFR_PORN_FLAG_Pos (9U) +#define RMU_RSTFR_PORN_FLAG_Msk (0x1U << RMU_RSTFR_PORN_FLAG_Pos) +#define RMU_RSTFR_PORN_FLAG RMU_RSTFR_PORN_FLAG_Msk + +#define RMU_RSTFR_PDRN_FLAG_Pos (8U) +#define RMU_RSTFR_PDRN_FLAG_Msk (0x1U << RMU_RSTFR_PDRN_FLAG_Pos) +#define RMU_RSTFR_PDRN_FLAG RMU_RSTFR_PDRN_FLAG_Msk + +#define RMU_RSTFR_SOFTN_FLAG_Pos (5U) +#define RMU_RSTFR_SOFTN_FLAG_Msk (0x1U << RMU_RSTFR_SOFTN_FLAG_Pos) +#define RMU_RSTFR_SOFTN_FLAG RMU_RSTFR_SOFTN_FLAG_Msk + +#define RMU_RSTFR_IWDTN_FLAG_Pos (4U) +#define RMU_RSTFR_IWDTN_FLAG_Msk (0x1U << RMU_RSTFR_IWDTN_FLAG_Pos) +#define RMU_RSTFR_IWDTN_FLAG RMU_RSTFR_IWDTN_FLAG_Msk + +#define RMU_RSTFR_WWDTN_FLAG_Pos (2U) +#define RMU_RSTFR_WWDTN_FLAG_Msk (0x1U << RMU_RSTFR_WWDTN_FLAG_Pos) +#define RMU_RSTFR_WWDTN_FLAG RMU_RSTFR_WWDTN_FLAG_Msk + +#define RMU_RSTFR_LKUPN_FLAG_Pos (1U) +#define RMU_RSTFR_LKUPN_FLAG_Msk (0x1U << RMU_RSTFR_LKUPN_FLAG_Pos) +#define RMU_RSTFR_LKUPN_FLAG RMU_RSTFR_LKUPN_FLAG_Msk + +#define RMU_RSTFR_NVICN_FLAG_Pos (0U) +#define RMU_RSTFR_NVICN_FLAG_Msk (0x1U << RMU_RSTFR_NVICN_FLAG_Pos) +#define RMU_RSTFR_NVICN_FLAG RMU_RSTFR_NVICN_FLAG_Msk + +#define PERHRSTEN_KEY (0x13579BDFUL) +#define SOFTWARERESET_KEY (0x5C5CAABBUL) + +#define FL_RMU_RSTAHB_DMA (0x1U << 0U) +#define FL_RMU_RSTAPB_UART5 (0x1fU << 0U) +#define FL_RMU_RSTAPB_UART4 (0x1eU << 0U) +#define FL_RMU_RSTAPB_UART3 (0x1dU << 0U) +#define FL_RMU_RSTAPB_UART1 (0x1bU << 0U) +#define FL_RMU_RSTAPB_UART0 (0x1aU << 0U) +#define FL_RMU_RSTAPB_UCIR (0x19U << 0U) +#define FL_RMU_RSTAPB_U7816 (0x18U << 0U) +#define FL_RMU_RSTAPB_GPTIM2 (0x17U << 0U) +#define FL_RMU_RSTAPB_GPTIM1 (0x16U << 0U) +#define FL_RMU_RSTAPB_GPTIM0 (0x15U << 0U) +#define FL_RMU_RSTAPB_ATIM (0x14U << 0U) +#define FL_RMU_RSTAPB_BSTIM32 (0x13U << 0U) +#define FL_RMU_RSTAPB_BSTIM16 (0x12U << 0U) +#define FL_RMU_RSTAPB_SPI2 (0xfU << 0U) +#define FL_RMU_RSTAPB_SPI1 (0xeU << 0U) +#define FL_RMU_RSTAPB_SPI0 (0xdU << 0U) +#define FL_RMU_RSTAPB_I2C (0xbU << 0U) +#define FL_RMU_RSTAPB_LPUART2 (0xaU << 0U) +#define FL_RMU_RSTAPB_LPUART1 (0x9U << 0U) +#define FL_RMU_RSTAPB_LPUART0 (0x8U << 0U) +#define FL_RMU_RSTAPB_VREF (0x6U << 0U) +#define FL_RMU_RSTAPB_PGL (0x5U << 0U) +#define FL_RMU_RSTAPB_LCD (0x4U << 0U) +#define FL_RMU_RSTAPB_DAC (0x3U << 0U) +#define FL_RMU_RSTAPB_OPA (0x2U << 0U) +#define FL_RMU_RSTAPB_LPTIM16 (0x1U << 0U) +#define FL_RMU_RSTAPB_LPTIM32 (0x0U << 0U) +#define FL_RMU_RSTAPB_ADCCR (0x38U << 0U) +#define FL_RMU_RSTAPB_ADC (0x37U << 0U) +#define FL_RMU_RSTAPB_AES (0x32U << 0U) +#define FL_RMU_RSTAPB_CRC (0x31U << 0U) +#define FL_RMU_RSTAPB_RNG (0x30U << 0U) +#define FL_RMU_RSTAPB_DIVAS (0x23U << 0U) +#define FL_RMU_RSTAPB_CAN (0x22U << 0U) +#define FL_RMU_RSTAPB_SVD (0x21U << 0U) +#define FL_RMU_RSTAPB_COMP (0x20U << 0U) + + + +#define FL_RMU_PDR_THRESHOLD_1P40V (0x0U << RMU_PDRCR_CFG_Pos) +#define FL_RMU_PDR_THRESHOLD_1P45V (0x1U << RMU_PDRCR_CFG_Pos) +#define FL_RMU_PDR_THRESHOLD_1P50V (0x2U << RMU_PDRCR_CFG_Pos) +#define FL_RMU_PDR_THRESHOLD_1P55V (0x3U << RMU_PDRCR_CFG_Pos) + + +#define FL_RMU_BOR_THRESHOLD_1P80V (0x0U << RMU_BORCR_CFG_Pos) +#define FL_RMU_BOR_THRESHOLD_2P00V (0x1U << RMU_BORCR_CFG_Pos) +#define FL_RMU_BOR_THRESHOLD_2P20V (0x2U << RMU_BORCR_CFG_Pos) +#define FL_RMU_BOR_THRESHOLD_2P40V (0x3U << RMU_BORCR_CFG_Pos) + + +/** + * @} + */ +/* Exported functions ---------------------------------------------------------------------------------*/ +/** @defgroup RMU_FL_Exported_Functions RMU Exported Functions + * @{ + */ + +/** + * @brief Set Power Down Reset Voltage + * @rmtoll PDRCR CFG FL_RMU_PDR_SetThreshold + * @param RMUx RMU instance + * @param threshold This parameter can be one of the following values: + * @arg @ref FL_RMU_PDR_THRESHOLD_1P40V + * @arg @ref FL_RMU_PDR_THRESHOLD_1P45V + * @arg @ref FL_RMU_PDR_THRESHOLD_1P50V + * @arg @ref FL_RMU_PDR_THRESHOLD_1P55V + * @retval None + */ +__STATIC_INLINE void FL_RMU_PDR_SetThreshold(RMU_Type *RMUx, uint32_t threshold) +{ + MODIFY_REG(RMUx->PDRCR, RMU_PDRCR_CFG_Msk, threshold); +} + +/** + * @brief Get Power Down Reset Voltage Setting + * @rmtoll PDRCR CFG FL_RMU_PDR_GetThreshold + * @param RMUx RMU instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_RMU_PDR_THRESHOLD_1P40V + * @arg @ref FL_RMU_PDR_THRESHOLD_1P45V + * @arg @ref FL_RMU_PDR_THRESHOLD_1P50V + * @arg @ref FL_RMU_PDR_THRESHOLD_1P55V + */ +__STATIC_INLINE uint32_t FL_RMU_PDR_GetThreshold(RMU_Type *RMUx) +{ + return (uint32_t)(READ_BIT(RMUx->PDRCR, RMU_PDRCR_CFG_Msk)); +} + +/** + * @brief Get Power Down Reset Enable Status + * @rmtoll PDRCR EN FL_RMU_PDR_IsEnabled + * @param RMUx RMU instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_RMU_PDR_IsEnabled(RMU_Type *RMUx) +{ + return (uint32_t)(READ_BIT(RMUx->PDRCR, RMU_PDRCR_EN_Msk) == RMU_PDRCR_EN_Msk); +} + +/** + * @brief Disable Power Down Reset + * @rmtoll PDRCR EN FL_RMU_PDR_Disable + * @param RMUx RMU instance + * @retval None + */ +__STATIC_INLINE void FL_RMU_PDR_Disable(RMU_Type *RMUx) +{ + CLEAR_BIT(RMUx->PDRCR, RMU_PDRCR_EN_Msk); +} + +/** + * @brief Enable Power Down Reset + * @rmtoll PDRCR EN FL_RMU_PDR_Enable + * @param RMUx RMU instance + * @retval None + */ +__STATIC_INLINE void FL_RMU_PDR_Enable(RMU_Type *RMUx) +{ + SET_BIT(RMUx->PDRCR, RMU_PDRCR_EN_Msk); +} + +/** + * @brief Set Brown Out Reset Voltage + * @rmtoll BORCR CFG FL_RMU_BOR_SetThreshold + * @param RMUx RMU instance + * @param threshold This parameter can be one of the following values: + * @arg @ref FL_RMU_BOR_THRESHOLD_1P80V + * @arg @ref FL_RMU_BOR_THRESHOLD_2P00V + * @arg @ref FL_RMU_BOR_THRESHOLD_2P20V + * @arg @ref FL_RMU_BOR_THRESHOLD_2P40V + * @retval None + */ +__STATIC_INLINE void FL_RMU_BOR_SetThreshold(RMU_Type *RMUx, uint32_t threshold) +{ + MODIFY_REG(RMUx->BORCR, RMU_BORCR_CFG_Msk, threshold); +} + +/** + * @brief Get Brown Out Reset Setting + * @rmtoll BORCR CFG FL_RMU_BOR_GetThreshold + * @param RMUx RMU instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_RMU_BOR_THRESHOLD_1P80V + * @arg @ref FL_RMU_BOR_THRESHOLD_2P00V + * @arg @ref FL_RMU_BOR_THRESHOLD_2P20V + * @arg @ref FL_RMU_BOR_THRESHOLD_2P40V + */ +__STATIC_INLINE uint32_t FL_RMU_BOR_GetThreshold(RMU_Type *RMUx) +{ + return (uint32_t)(READ_BIT(RMUx->BORCR, RMU_BORCR_CFG_Msk)); +} + +/** + * @brief Get Brown Out Reset Enable Status + * @rmtoll BORCR ENB FL_RMU_BOR_IsEnabled + * @param RMUx RMU instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_RMU_BOR_IsEnabled(RMU_Type *RMUx) +{ + return (uint32_t)!(READ_BIT(RMUx->BORCR, RMU_BORCR_ENB_Msk) == RMU_BORCR_ENB_Msk); +} + +/** + * @brief Disable Brown Out Reset + * @rmtoll BORCR ENB FL_RMU_BOR_Disable + * @param RMUx RMU instance + * @retval None + */ +__STATIC_INLINE void FL_RMU_BOR_Disable(RMU_Type *RMUx) +{ + SET_BIT(RMUx->BORCR, RMU_BORCR_ENB_Msk); +} + +/** + * @brief Enable Brown Out Reset + * @rmtoll BORCR ENB FL_RMU_BOR_Enable + * @param RMUx RMU instance + * @retval None + */ +__STATIC_INLINE void FL_RMU_BOR_Enable(RMU_Type *RMUx) +{ + CLEAR_BIT(RMUx->BORCR, RMU_BORCR_ENB_Msk); +} + +/** + * @brief Get LockUp Reset Enable Status + * @rmtoll LKPCR EN FL_RMU_IsEnabledLockUpReset + * @param RMUx RMU instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_RMU_IsEnabledLockUpReset(RMU_Type *RMUx) +{ + return (uint32_t)(READ_BIT(RMUx->LKPCR, RMU_LKPCR_EN_Msk) == RMU_LKPCR_EN_Msk); +} + +/** + * @brief Disable LockUp Reset + * @rmtoll LKPCR EN FL_RMU_DisableLockUpReset + * @param RMUx RMU instance + * @retval None + */ +__STATIC_INLINE void FL_RMU_DisableLockUpReset(RMU_Type *RMUx) +{ + CLEAR_BIT(RMUx->LKPCR, RMU_LKPCR_EN_Msk); +} + +/** + * @brief Enable LockUp Reset + * @rmtoll LKPCR EN FL_RMU_EnableLockUpReset + * @param RMUx RMU instance + * @retval None + */ +__STATIC_INLINE void FL_RMU_EnableLockUpReset(RMU_Type *RMUx) +{ + SET_BIT(RMUx->LKPCR, RMU_LKPCR_EN_Msk); +} + +/** + * @brief Soft Reset Chip + * @rmtoll SOFTRST FL_RMU_SetSoftReset + * @param RMUx RMU instance + * @retval None + */ +__STATIC_INLINE void FL_RMU_SetSoftReset(RMU_Type *RMUx) +{ + WRITE_REG(RMUx->SOFTRST, SOFTWARERESET_KEY); +} + +/** + * @brief Get MDF Reset Flag + * @rmtoll RSTFR MDFN_FLAG FL_RMU_IsActiveFlag_MDF + * @param RMUx RMU instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_RMU_IsActiveFlag_MDF(RMU_Type *RMUx) +{ + return (uint32_t)(READ_BIT(RMUx->RSTFR, RMU_RSTFR_MDFN_FLAG_Msk) == (RMU_RSTFR_MDFN_FLAG_Msk)); +} + +/** + * @brief Clear MDF Reset Flag + * @rmtoll RSTFR MDFN_FLAG FL_RMU_ClearFlag_MDF + * @param RMUx RMU instance + * @retval None + */ +__STATIC_INLINE void FL_RMU_ClearFlag_MDF(RMU_Type *RMUx) +{ + WRITE_REG(RMUx->RSTFR, RMU_RSTFR_MDFN_FLAG_Msk); +} + +/** + * @brief Get NRST Reset Flag + * @rmtoll RSTFR NRSTN_FLAG FL_RMU_IsActiveFlag_NRSTN + * @param RMUx RMU instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_RMU_IsActiveFlag_NRSTN(RMU_Type *RMUx) +{ + return (uint32_t)(READ_BIT(RMUx->RSTFR, RMU_RSTFR_NRSTN_FLAG_Msk) == (RMU_RSTFR_NRSTN_FLAG_Msk)); +} + +/** + * @brief Clear NRST Reset Flag + * @rmtoll RSTFR NRSTN_FLAG FL_RMU_ClearFlag_NRSTN + * @param RMUx RMU instance + * @retval None + */ +__STATIC_INLINE void FL_RMU_ClearFlag_NRSTN(RMU_Type *RMUx) +{ + WRITE_REG(RMUx->RSTFR, RMU_RSTFR_NRSTN_FLAG_Msk); +} + +/** + * @brief Get PRC Reset Flag + * @rmtoll RSTFR PRC_FLAG FL_RMU_IsActiveFlag_PRCN + * @param RMUx RMU instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_RMU_IsActiveFlag_PRCN(RMU_Type *RMUx) +{ + return (uint32_t)(READ_BIT(RMUx->RSTFR, RMU_RSTFR_PRC_FLAG_Msk) == (RMU_RSTFR_PRC_FLAG_Msk)); +} + +/** + * @brief Clear PRC Reset Flag + * @rmtoll RSTFR PRC_FLAG FL_RMU_ClearFlag_PRCN + * @param RMUx RMU instance + * @retval None + */ +__STATIC_INLINE void FL_RMU_ClearFlag_PRCN(RMU_Type *RMUx) +{ + WRITE_REG(RMUx->RSTFR, RMU_RSTFR_PRC_FLAG_Msk); +} + +/** + * @brief Get Power On Reset Flag + * @rmtoll RSTFR PORN_FLAG FL_RMU_IsActiveFlag_PORN + * @param RMUx RMU instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_RMU_IsActiveFlag_PORN(RMU_Type *RMUx) +{ + return (uint32_t)(READ_BIT(RMUx->RSTFR, RMU_RSTFR_PORN_FLAG_Msk) == (RMU_RSTFR_PORN_FLAG_Msk)); +} + +/** + * @brief Clear Power On Reset Flag + * @rmtoll RSTFR PORN_FLAG FL_RMU_ClearFlag_PORN + * @param RMUx RMU instance + * @retval None + */ +__STATIC_INLINE void FL_RMU_ClearFlag_PORN(RMU_Type *RMUx) +{ + WRITE_REG(RMUx->RSTFR, RMU_RSTFR_PORN_FLAG_Msk); +} + +/** + * @brief Get Power Down Reset Flag + * @rmtoll RSTFR PDRN_FLAG FL_RMU_IsActiveFlag_PDRN + * @param RMUx RMU instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_RMU_IsActiveFlag_PDRN(RMU_Type *RMUx) +{ + return (uint32_t)(READ_BIT(RMUx->RSTFR, RMU_RSTFR_PDRN_FLAG_Msk) == (RMU_RSTFR_PDRN_FLAG_Msk)); +} + +/** + * @brief Clear Power Down Reset Flag + * @rmtoll RSTFR PDRN_FLAG FL_RMU_ClearFlag_PDRN + * @param RMUx RMU instance + * @retval None + */ +__STATIC_INLINE void FL_RMU_ClearFlag_PDRN(RMU_Type *RMUx) +{ + WRITE_REG(RMUx->RSTFR, RMU_RSTFR_PDRN_FLAG_Msk); +} + +/** + * @brief Get Software Reset Flag + * @rmtoll RSTFR SOFTN_FLAG FL_RMU_IsActiveFlag_SOFTN + * @param RMUx RMU instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_RMU_IsActiveFlag_SOFTN(RMU_Type *RMUx) +{ + return (uint32_t)(READ_BIT(RMUx->RSTFR, RMU_RSTFR_SOFTN_FLAG_Msk) == (RMU_RSTFR_SOFTN_FLAG_Msk)); +} + +/** + * @brief Clear Software Reset Flag + * @rmtoll RSTFR SOFTN_FLAG FL_RMU_ClearFlag_SOFTN + * @param RMUx RMU instance + * @retval None + */ +__STATIC_INLINE void FL_RMU_ClearFlag_SOFTN(RMU_Type *RMUx) +{ + WRITE_REG(RMUx->RSTFR, RMU_RSTFR_SOFTN_FLAG_Msk); +} + +/** + * @brief Get IWDT Reset Flag + * @rmtoll RSTFR IWDTN_FLAG FL_RMU_IsActiveFlag_IWDTN + * @param RMUx RMU instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_RMU_IsActiveFlag_IWDTN(RMU_Type *RMUx) +{ + return (uint32_t)(READ_BIT(RMUx->RSTFR, RMU_RSTFR_IWDTN_FLAG_Msk) == (RMU_RSTFR_IWDTN_FLAG_Msk)); +} + +/** + * @brief Clear IWDT Reset Flag + * @rmtoll RSTFR IWDTN_FLAG FL_RMU_ClearFlag_IWDTN + * @param RMUx RMU instance + * @retval None + */ +__STATIC_INLINE void FL_RMU_ClearFlag_IWDTN(RMU_Type *RMUx) +{ + WRITE_REG(RMUx->RSTFR, RMU_RSTFR_IWDTN_FLAG_Msk); +} + +/** + * @brief Get WWDT Reset Flag + * @rmtoll RSTFR WWDTN_FLAG FL_RMU_IsActiveFlag_WWDTN + * @param RMUx RMU instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_RMU_IsActiveFlag_WWDTN(RMU_Type *RMUx) +{ + return (uint32_t)(READ_BIT(RMUx->RSTFR, RMU_RSTFR_WWDTN_FLAG_Msk) == (RMU_RSTFR_WWDTN_FLAG_Msk)); +} + +/** + * @brief Clear WWDT Reset Flag + * @rmtoll RSTFR WWDTN_FLAG FL_RMU_ClearFlag_WWDTN + * @param RMUx RMU instance + * @retval None + */ +__STATIC_INLINE void FL_RMU_ClearFlag_WWDTN(RMU_Type *RMUx) +{ + WRITE_REG(RMUx->RSTFR, RMU_RSTFR_WWDTN_FLAG_Msk); +} + +/** + * @brief Get LockUp Reset Flag + * @rmtoll RSTFR LKUPN_FLAG FL_RMU_IsActiveFlag_LKUPN + * @param RMUx RMU instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_RMU_IsActiveFlag_LKUPN(RMU_Type *RMUx) +{ + return (uint32_t)(READ_BIT(RMUx->RSTFR, RMU_RSTFR_LKUPN_FLAG_Msk) == (RMU_RSTFR_LKUPN_FLAG_Msk)); +} + +/** + * @brief Clear LockUp Reset Flag + * @rmtoll RSTFR LKUPN_FLAG FL_RMU_ClearFlag_LKUPN + * @param RMUx RMU instance + * @retval None + */ +__STATIC_INLINE void FL_RMU_ClearFlag_LKUPN(RMU_Type *RMUx) +{ + WRITE_REG(RMUx->RSTFR, RMU_RSTFR_LKUPN_FLAG_Msk); +} + +/** + * @brief Get NVIC Reset Flag + * @rmtoll RSTFR NVICN_FLAG FL_RMU_IsActiveFlag_NVICN + * @param RMUx RMU instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_RMU_IsActiveFlag_NVICN(RMU_Type *RMUx) +{ + return (uint32_t)(READ_BIT(RMUx->RSTFR, RMU_RSTFR_NVICN_FLAG_Msk) == (RMU_RSTFR_NVICN_FLAG_Msk)); +} + +/** + * @brief Clear NVIC Reset Flag + * @rmtoll RSTFR NVICN_FLAG FL_RMU_ClearFlag_NVICN + * @param RMUx RMU instance + * @retval None + */ +__STATIC_INLINE void FL_RMU_ClearFlag_NVICN(RMU_Type *RMUx) +{ + WRITE_REG(RMUx->RSTFR, RMU_RSTFR_NVICN_FLAG_Msk); +} + +/** + * @brief Disable Peripheral Reset + * @rmtoll PRSTEN FL_RMU_DisablePeripheralReset + * @param RMUx RMU instance + * @retval None + */ +__STATIC_INLINE void FL_RMU_DisablePeripheralReset(RMU_Type *RMUx) +{ + WRITE_REG(RMUx->PRSTEN, (~PERHRSTEN_KEY)); +} + +/** + * @brief Enable Peripheral Reset + * @rmtoll PRSTEN FL_RMU_EnablePeripheralReset + * @param RMUx RMU instance + * @retval None + */ +__STATIC_INLINE void FL_RMU_EnablePeripheralReset(RMU_Type *RMUx) +{ + WRITE_REG(RMUx->PRSTEN, PERHRSTEN_KEY); +} + +/** + * @brief Enable AHB Peripheral Reset + * @rmtoll AHBRSTCR FL_RMU_EnableResetAHBPeripheral + * @param RMUx RMU instance + * @param peripheral This parameter can be one of the following values: + * @arg @ref FL_RMU_RSTAHB_DMA + * @retval None + */ +__STATIC_INLINE void FL_RMU_EnableResetAHBPeripheral(RMU_Type *RMUx, uint32_t peripheral) +{ + SET_BIT(RMUx->AHBRSTCR, ((peripheral & 0xffffffff) << 0x0U)); +} + +/** + * @brief Enable APB Peripheral Reset1 + * @rmtoll APBRSTCR FL_RMU_EnableResetAPBPeripheral + * @param RMUx RMU instance + * @param peripheral This parameter can be one of the following values: + * @arg @ref FL_RMU_RSTAPB_UART5 + * @arg @ref FL_RMU_RSTAPB_UART4 + * @arg @ref FL_RMU_RSTAPB_UART3 + * @arg @ref FL_RMU_RSTAPB_UART1 + * @arg @ref FL_RMU_RSTAPB_UART0 + * @arg @ref FL_RMU_RSTAPB_UCIR + * @arg @ref FL_RMU_RSTAPB_U7816 + * @arg @ref FL_RMU_RSTAPB_GPTIM2 + * @arg @ref FL_RMU_RSTAPB_GPTIM1 + * @arg @ref FL_RMU_RSTAPB_GPTIM0 + * @arg @ref FL_RMU_RSTAPB_ATIM + * @arg @ref FL_RMU_RSTAPB_BSTIM32 + * @arg @ref FL_RMU_RSTAPB_BSTIM16 + * @arg @ref FL_RMU_RSTAPB_SPI2 + * @arg @ref FL_RMU_RSTAPB_SPI1 + * @arg @ref FL_RMU_RSTAPB_SPI0 + * @arg @ref FL_RMU_RSTAPB_I2C + * @arg @ref FL_RMU_RSTAPB_LPUART2 + * @arg @ref FL_RMU_RSTAPB_LPUART1 + * @arg @ref FL_RMU_RSTAPB_LPUART0 + * @arg @ref FL_RMU_RSTAPB_VREF + * @arg @ref FL_RMU_RSTAPB_PGL + * @arg @ref FL_RMU_RSTAPB_LCD + * @arg @ref FL_RMU_RSTAPB_DAC + * @arg @ref FL_RMU_RSTAPB_OPA + * @arg @ref FL_RMU_RSTAPB_LPTIM16 + * @arg @ref FL_RMU_RSTAPB_LPTIM32 + * @arg @ref FL_RMU_RSTAPB_ADCCR + * @arg @ref FL_RMU_RSTAPB_ADC + * @arg @ref FL_RMU_RSTAPB_AES + * @arg @ref FL_RMU_RSTAPB_CRC + * @arg @ref FL_RMU_RSTAPB_RNG + * @arg @ref FL_RMU_RSTAPB_DIVAS + * @arg @ref FL_RMU_RSTAPB_CAN + * @arg @ref FL_RMU_RSTAPB_SVD + * @arg @ref FL_RMU_RSTAPB_COMP + * @retval None + */ +__STATIC_INLINE void FL_RMU_EnableResetAPBPeripheral(RMU_Type *RMUx, uint32_t peripheral) +{ + if(peripheral < FL_RMU_RSTAPB_COMP) + { + SET_BIT(RMUx->APBRSTCR1, (0x1U << peripheral)); + } + else + { + SET_BIT(RMUx->APBRSTCR2, (0x1U << (peripheral - 32))); + } +} + +/** + * @brief Disable AHB Peripheral Reset + * @rmtoll AHBRSTCR FL_RMU_DisableResetAHBPeripheral + * @param RMUx RMU instance + * @param peripheral This parameter can be one of the following values: + * @arg @ref FL_RMU_RSTAHB_DMA + * @retval None + */ +__STATIC_INLINE void FL_RMU_DisableResetAHBPeripheral(RMU_Type *RMUx, uint32_t peripheral) +{ + CLEAR_BIT(RMUx->AHBRSTCR, ((peripheral & 0xffffffff) << 0x0U)); +} + +/** + * @brief Disable APB Peripheral Reset1 + * @rmtoll APBRSTCR FL_RMU_DisableResetAPBPeripheral + * @param RMUx RMU instance + * @param peripheral This parameter can be one of the following values: + * @arg @ref FL_RMU_RSTAPB_UART5 + * @arg @ref FL_RMU_RSTAPB_UART4 + * @arg @ref FL_RMU_RSTAPB_UART3 + * @arg @ref FL_RMU_RSTAPB_UART1 + * @arg @ref FL_RMU_RSTAPB_UART0 + * @arg @ref FL_RMU_RSTAPB_UCIR + * @arg @ref FL_RMU_RSTAPB_U7816 + * @arg @ref FL_RMU_RSTAPB_GPTIM2 + * @arg @ref FL_RMU_RSTAPB_GPTIM1 + * @arg @ref FL_RMU_RSTAPB_GPTIM0 + * @arg @ref FL_RMU_RSTAPB_ATIM + * @arg @ref FL_RMU_RSTAPB_BSTIM32 + * @arg @ref FL_RMU_RSTAPB_BSTIM16 + * @arg @ref FL_RMU_RSTAPB_SPI2 + * @arg @ref FL_RMU_RSTAPB_SPI1 + * @arg @ref FL_RMU_RSTAPB_SPI0 + * @arg @ref FL_RMU_RSTAPB_I2C + * @arg @ref FL_RMU_RSTAPB_LPUART2 + * @arg @ref FL_RMU_RSTAPB_LPUART1 + * @arg @ref FL_RMU_RSTAPB_LPUART0 + * @arg @ref FL_RMU_RSTAPB_VREF + * @arg @ref FL_RMU_RSTAPB_PGL + * @arg @ref FL_RMU_RSTAPB_LCD + * @arg @ref FL_RMU_RSTAPB_DAC + * @arg @ref FL_RMU_RSTAPB_OPA + * @arg @ref FL_RMU_RSTAPB_LPTIM16 + * @arg @ref FL_RMU_RSTAPB_LPTIM32 + * @arg @ref FL_RMU_RSTAPB_ADCCR + * @arg @ref FL_RMU_RSTAPB_ADC + * @arg @ref FL_RMU_RSTAPB_AES + * @arg @ref FL_RMU_RSTAPB_CRC + * @arg @ref FL_RMU_RSTAPB_RNG + * @arg @ref FL_RMU_RSTAPB_DIVAS + * @arg @ref FL_RMU_RSTAPB_CAN + * @arg @ref FL_RMU_RSTAPB_SVD + * @arg @ref FL_RMU_RSTAPB_COMP + * @retval None + */ +__STATIC_INLINE void FL_RMU_DisableResetAPBPeripheral(RMU_Type *RMUx, uint32_t peripheral) +{ + if(peripheral < FL_RMU_RSTAPB_COMP) + { + CLEAR_BIT(RMUx->APBRSTCR1, (0x1U << peripheral)); + } + else + { + CLEAR_BIT(RMUx->APBRSTCR2, (0x1U << (peripheral - 32))); + } +} + +/** + * @} + */ + +/** @defgroup RMU_FL_EF_Init Initialization and de-initialization functions + * @{ + */ + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif /* __FM33LG0XX_FL_RMU_H*/ + +/*************************Py_Code_Generator Version: 0.1-0.14-0.1 @ 2020-10-20*************************/ +/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/ diff --git a/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_rng.h b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_rng.h new file mode 100644 index 0000000..0ea1aa1 --- /dev/null +++ b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_rng.h @@ -0,0 +1,280 @@ + /** + ******************************************************************************************************* + * @file fm33lg0xx_fl_rng.h + * @author FMSH Application Team + * @brief Head file of RNG FL Module + ******************************************************************************************************* + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + + + +/* Define to prevent recursive inclusion---------------------------------------------------------------*/ +#ifndef __FM33LG0XX_FL_RNG_H +#define __FM33LG0XX_FL_RNG_H + +#ifdef __cplusplus +extern "C" { +#endif +/* Includes -------------------------------------------------------------------------------------------*/ +#include "fm33lg0xx_fl_def.h" +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @defgroup RNG RNG + * @brief RNG FL driver + * @{ + */ + +/* Exported types -------------------------------------------------------------------------------------*/ +/** @defgroup RNG_FL_ES_INIT RNG Exported Init structures + * @{ + */ + +/** + * @brief FL RNG Init Sturcture definition + */ + +/** + * @} + */ +/* Exported constants ---------------------------------------------------------------------------------*/ +/** @defgroup RNG_FL_Exported_Constants RNG Exported Constants + * @{ + */ + +#define RNG_CR_EN_Pos (0U) +#define RNG_CR_EN_Msk (0x1U << RNG_CR_EN_Pos) +#define RNG_CR_EN RNG_CR_EN_Msk + +#define RNG_SR_RBUSY_Pos (1U) +#define RNG_SR_RBUSY_Msk (0x1U << RNG_SR_RBUSY_Pos) +#define RNG_SR_RBUSY RNG_SR_RBUSY_Msk + +#define RNG_SR_RNF_Pos (0U) +#define RNG_SR_RNF_Msk (0x1U << RNG_SR_RNF_Pos) +#define RNG_SR_RNF RNG_SR_RNF_Msk + +#define RNG_CRCCR_CRCEN_Pos (0U) +#define RNG_CRCCR_CRCEN_Msk (0x1U << RNG_CRCCR_CRCEN_Pos) +#define RNG_CRCCR_CRCEN RNG_CRCCR_CRCEN_Msk + +#define RNG_CRCSR_CRCDONE_Pos (0U) +#define RNG_CRCSR_CRCDONE_Msk (0x1U << RNG_CRCSR_CRCDONE_Pos) +#define RNG_CRCSR_CRCDONE RNG_CRCSR_CRCDONE_Msk + + + + + + +/** + * @} + */ +/* Exported functions ---------------------------------------------------------------------------------*/ +/** @defgroup RNG_FL_Exported_Functions RNG Exported Functions + * @{ + */ + +/** + * @brief RNG enable + * @rmtoll CR EN FL_RNG_Enable + * @param RNGx RNG instance + * @retval None + */ +__STATIC_INLINE void FL_RNG_Enable(RNG_Type *RNGx) +{ + SET_BIT(RNGx->CR, RNG_CR_EN_Msk); +} + +/** + * @brief RNG enable status + * @rmtoll CR EN FL_RNG_IsEnabled + * @param RNGx RNG instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_RNG_IsEnabled(RNG_Type *RNGx) +{ + return (uint32_t)(READ_BIT(RNGx->CR, RNG_CR_EN_Msk) == RNG_CR_EN_Msk); +} + +/** + * @brief RNG disable + * @rmtoll CR EN FL_RNG_Disable + * @param RNGx RNG instance + * @retval None + */ +__STATIC_INLINE void FL_RNG_Disable(RNG_Type *RNGx) +{ + CLEAR_BIT(RNGx->CR, RNG_CR_EN_Msk); +} + +/** + * @brief Read RNG output data register + * @rmtoll DOR FL_RNG_ReadData + * @param RNGx RNG instance + * @retval + */ +__STATIC_INLINE uint32_t FL_RNG_ReadData(RNG_Type *RNGx) +{ + return (uint32_t)(READ_BIT(RNGx->DOR, (0xffffffffU << 0U)) >> 0U); +} + +/** + * @brief Get LFSR Flag + * @rmtoll SR RBUSY FL_RNG_IsActiveFlag_Busy + * @param RNGx RNG instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_RNG_IsActiveFlag_Busy(RNG_Type *RNGx) +{ + return (uint32_t)(READ_BIT(RNGx->SR, RNG_SR_RBUSY_Msk) == (RNG_SR_RBUSY_Msk)); +} + +/** + * @brief Get random number fail flag + * @rmtoll SR RNF FL_RNG_IsActiveFlag_RandomFail + * @param RNGx RNG instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_RNG_IsActiveFlag_RandomFail(RNG_Type *RNGx) +{ + return (uint32_t)(READ_BIT(RNGx->SR, RNG_SR_RNF_Msk) == (RNG_SR_RNF_Msk)); +} + +/** + * @brief Clear random number fail flag + * @rmtoll SR RNF FL_RNG_ClearFlag_RandomFail + * @param RNGx RNG instance + * @retval None + */ +__STATIC_INLINE void FL_RNG_ClearFlag_RandomFail(RNG_Type *RNGx) +{ + WRITE_REG(RNGx->SR, RNG_SR_RNF_Msk); +} + +/** + * @brief CRC enable + * @rmtoll CRCCR CRCEN FL_RNG_CRC_Enable + * @param RNGx RNG instance + * @retval None + */ +__STATIC_INLINE void FL_RNG_CRC_Enable(RNG_Type *RNGx) +{ + SET_BIT(RNGx->CRCCR, RNG_CRCCR_CRCEN_Msk); +} + +/** + * @brief Get CRC enable status + * @rmtoll CRCCR CRCEN FL_RNG_CRC_IsEnabled + * @param RNGx RNG instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_RNG_CRC_IsEnabled(RNG_Type *RNGx) +{ + return (uint32_t)(READ_BIT(RNGx->CRCCR, RNG_CRCCR_CRCEN_Msk) == RNG_CRCCR_CRCEN_Msk); +} + +/** + * @brief Write CRC data input + * @rmtoll CRCDIR FL_RNG_CRC_WriteData + * @param RNGx RNG instance + * @param data + * @retval None + */ +__STATIC_INLINE void FL_RNG_CRC_WriteData(RNG_Type *RNGx, uint32_t data) +{ + MODIFY_REG(RNGx->CRCDIR, (0xffffffffU << 0U), (data << 0U)); +} + +/** + * @brief Get CRC calculation done Flag + * @rmtoll CRCSR CRCDONE FL_RNG_IsActiveFlag_CRCComplete + * @param RNGx RNG instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_RNG_IsActiveFlag_CRCComplete(RNG_Type *RNGx) +{ + return (uint32_t)(READ_BIT(RNGx->CRCSR, RNG_CRCSR_CRCDONE_Msk) == (RNG_CRCSR_CRCDONE_Msk)); +} + +/** + * @brief Clear CRC calculation done Flag + * @rmtoll CRCSR CRCDONE FL_RNG_ClearFlag_CRCComplete + * @param RNGx RNG instance + * @retval None + */ +__STATIC_INLINE void FL_RNG_ClearFlag_CRCComplete(RNG_Type *RNGx) +{ + CLEAR_BIT(RNGx->CRCSR, RNG_CRCSR_CRCDONE_Msk); +} + +/** + * @} + */ + +/** @defgroup RNG_FL_EF_Init Initialization and de-initialization functions + * @{ + */ +FL_ErrorStatus FL_RNG_DeInit(RNG_Type *RNGx); +FL_ErrorStatus FL_RNG_Init(RNG_Type *RNGx); +uint32_t GetRandomNumber(void); +uint32_t GetCrc32(uint32_t dataIn); + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif /* __FM33LG0XX_FL_RNG_H*/ + +/*************************Py_Code_Generator Version: 0.1-0.11-0.1 @ 2020-09-12*************************/ +/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/ diff --git a/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_rtca.h b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_rtca.h new file mode 100644 index 0000000..60d4c1a --- /dev/null +++ b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_rtca.h @@ -0,0 +1,1399 @@ + /** + ******************************************************************************************************* + * @file fm33lg0xx_fl_rtca.h + * @author FMSH Application Team + * @brief Head file of RTCA FL Module + ******************************************************************************************************* + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + + + +/* Define to prevent recursive inclusion---------------------------------------------------------------*/ +#ifndef __FM33LG0XX_FL_RTCA_H +#define __FM33LG0XX_FL_RTCA_H + +#ifdef __cplusplus +extern "C" { +#endif +/* Includes -------------------------------------------------------------------------------------------*/ +#include "fm33lg0xx_fl_def.h" +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @defgroup RTCA RTCA + * @brief RTCA FL driver + * @{ + */ + +/* Exported types -------------------------------------------------------------------------------------*/ +/** @defgroup RTCA_FL_ES_INIT RTCA Exported Init structures + * @{ + */ + +/** + * @brief FL RTCA Init Sturcture definition + */ +typedef struct +{ + /** 年 */ + uint32_t year; + /** 月 */ + uint32_t month; + /** 日 */ + uint32_t day; + /** 周 */ + uint32_t week; + /** 时 */ + uint32_t hour; + /** 分 */ + uint32_t minute; + /** 秒 */ + uint32_t second; + +} FL_RTCA_InitTypeDef; +/** + * @} + */ +/* Exported constants ---------------------------------------------------------------------------------*/ +/** @defgroup RTCA_FL_Exported_Constants RTCA Exported Constants + * @{ + */ + +#define RTCA_IER_ADJ_IE_Pos (12U) +#define RTCA_IER_ADJ_IE_Msk (0x1U << RTCA_IER_ADJ_IE_Pos) +#define RTCA_IER_ADJ_IE RTCA_IER_ADJ_IE_Msk + +#define RTCA_IER_ALARM_IE_Pos (11U) +#define RTCA_IER_ALARM_IE_Msk (0x1U << RTCA_IER_ALARM_IE_Pos) +#define RTCA_IER_ALARM_IE RTCA_IER_ALARM_IE_Msk + +#define RTCA_IER_1KHZ_IE_Pos (10U) +#define RTCA_IER_1KHZ_IE_Msk (0x1U << RTCA_IER_1KHZ_IE_Pos) +#define RTCA_IER_1KHZ_IE RTCA_IER_1KHZ_IE_Msk + +#define RTCA_IER_256HZ_IE_Pos (9U) +#define RTCA_IER_256HZ_IE_Msk (0x1U << RTCA_IER_256HZ_IE_Pos) +#define RTCA_IER_256HZ_IE RTCA_IER_256HZ_IE_Msk + +#define RTCA_IER_64HZ_IE_Pos (8U) +#define RTCA_IER_64HZ_IE_Msk (0x1U << RTCA_IER_64HZ_IE_Pos) +#define RTCA_IER_64HZ_IE RTCA_IER_64HZ_IE_Msk + +#define RTCA_IER_16HZ_IE_Pos (7U) +#define RTCA_IER_16HZ_IE_Msk (0x1U << RTCA_IER_16HZ_IE_Pos) +#define RTCA_IER_16HZ_IE RTCA_IER_16HZ_IE_Msk + +#define RTCA_IER_8HZ_IE_Pos (6U) +#define RTCA_IER_8HZ_IE_Msk (0x1U << RTCA_IER_8HZ_IE_Pos) +#define RTCA_IER_8HZ_IE RTCA_IER_8HZ_IE_Msk + +#define RTCA_IER_4HZ_IE_Pos (5U) +#define RTCA_IER_4HZ_IE_Msk (0x1U << RTCA_IER_4HZ_IE_Pos) +#define RTCA_IER_4HZ_IE RTCA_IER_4HZ_IE_Msk + +#define RTCA_IER_2HZ_IE_Pos (4U) +#define RTCA_IER_2HZ_IE_Msk (0x1U << RTCA_IER_2HZ_IE_Pos) +#define RTCA_IER_2HZ_IE RTCA_IER_2HZ_IE_Msk + +#define RTCA_IER_SEC_IE_Pos (3U) +#define RTCA_IER_SEC_IE_Msk (0x1U << RTCA_IER_SEC_IE_Pos) +#define RTCA_IER_SEC_IE RTCA_IER_SEC_IE_Msk + +#define RTCA_IER_MIN_IE_Pos (2U) +#define RTCA_IER_MIN_IE_Msk (0x1U << RTCA_IER_MIN_IE_Pos) +#define RTCA_IER_MIN_IE RTCA_IER_MIN_IE_Msk + +#define RTCA_IER_HOUR_IE_Pos (1U) +#define RTCA_IER_HOUR_IE_Msk (0x1U << RTCA_IER_HOUR_IE_Pos) +#define RTCA_IER_HOUR_IE RTCA_IER_HOUR_IE_Msk + +#define RTCA_IER_DAY_IE_Pos (0U) +#define RTCA_IER_DAY_IE_Msk (0x1U << RTCA_IER_DAY_IE_Pos) +#define RTCA_IER_DAY_IE RTCA_IER_DAY_IE_Msk + +#define RTCA_ISR_ADJ_IF_Pos (12U) +#define RTCA_ISR_ADJ_IF_Msk (0x1U << RTCA_ISR_ADJ_IF_Pos) +#define RTCA_ISR_ADJ_IF RTCA_ISR_ADJ_IF_Msk + +#define RTCA_ISR_ALARM_IF_Pos (11U) +#define RTCA_ISR_ALARM_IF_Msk (0x1U << RTCA_ISR_ALARM_IF_Pos) +#define RTCA_ISR_ALARM_IF RTCA_ISR_ALARM_IF_Msk + +#define RTCA_ISR_1KHZ_IF_Pos (10U) +#define RTCA_ISR_1KHZ_IF_Msk (0x1U << RTCA_ISR_1KHZ_IF_Pos) +#define RTCA_ISR_1KHZ_IF RTCA_ISR_1KHZ_IF_Msk + +#define RTCA_ISR_256HZ_IF_Pos (9U) +#define RTCA_ISR_256HZ_IF_Msk (0x1U << RTCA_ISR_256HZ_IF_Pos) +#define RTCA_ISR_256HZ_IF RTCA_ISR_256HZ_IF_Msk + +#define RTCA_ISR_64HZ_IF_Pos (8U) +#define RTCA_ISR_64HZ_IF_Msk (0x1U << RTCA_ISR_64HZ_IF_Pos) +#define RTCA_ISR_64HZ_IF RTCA_ISR_64HZ_IF_Msk + +#define RTCA_ISR_16HZ_IF_Pos (7U) +#define RTCA_ISR_16HZ_IF_Msk (0x1U << RTCA_ISR_16HZ_IF_Pos) +#define RTCA_ISR_16HZ_IF RTCA_ISR_16HZ_IF_Msk + +#define RTCA_ISR_8HZ_IF_Pos (6U) +#define RTCA_ISR_8HZ_IF_Msk (0x1U << RTCA_ISR_8HZ_IF_Pos) +#define RTCA_ISR_8HZ_IF RTCA_ISR_8HZ_IF_Msk + +#define RTCA_ISR_4HZ_IF_Pos (5U) +#define RTCA_ISR_4HZ_IF_Msk (0x1U << RTCA_ISR_4HZ_IF_Pos) +#define RTCA_ISR_4HZ_IF RTCA_ISR_4HZ_IF_Msk + +#define RTCA_ISR_2HZ_IF_Pos (4U) +#define RTCA_ISR_2HZ_IF_Msk (0x1U << RTCA_ISR_2HZ_IF_Pos) +#define RTCA_ISR_2HZ_IF RTCA_ISR_2HZ_IF_Msk + +#define RTCA_ISR_SEC_IF_Pos (3U) +#define RTCA_ISR_SEC_IF_Msk (0x1U << RTCA_ISR_SEC_IF_Pos) +#define RTCA_ISR_SEC_IF RTCA_ISR_SEC_IF_Msk + +#define RTCA_ISR_MIN_IF_Pos (2U) +#define RTCA_ISR_MIN_IF_Msk (0x1U << RTCA_ISR_MIN_IF_Pos) +#define RTCA_ISR_MIN_IF RTCA_ISR_MIN_IF_Msk + +#define RTCA_ISR_HOUR_IF_Pos (1U) +#define RTCA_ISR_HOUR_IF_Msk (0x1U << RTCA_ISR_HOUR_IF_Pos) +#define RTCA_ISR_HOUR_IF RTCA_ISR_HOUR_IF_Msk + +#define RTCA_ISR_DAY_IF_Pos (0U) +#define RTCA_ISR_DAY_IF_Msk (0x1U << RTCA_ISR_DAY_IF_Pos) +#define RTCA_ISR_DAY_IF RTCA_ISR_DAY_IF_Msk + +#define RTCA_TMSEL_TMSEL_Pos (0U) +#define RTCA_TMSEL_TMSEL_Msk (0xfU << RTCA_TMSEL_TMSEL_Pos) +#define RTCA_TMSEL_TMSEL RTCA_TMSEL_TMSEL_Msk + +#define RTCA_ADJUST_ADSIGN_Pos (9U) +#define RTCA_ADJUST_ADSIGN_Msk (0x1U << RTCA_ADJUST_ADSIGN_Pos) +#define RTCA_ADJUST_ADSIGN RTCA_ADJUST_ADSIGN_Msk + +#define RTCA_CR_EN_Pos (0U) +#define RTCA_CR_EN_Msk (0x1U << RTCA_CR_EN_Pos) +#define RTCA_CR_EN RTCA_CR_EN_Msk + + + + + + +#define FL_RTCA_TIME_MARK_SECOND (0x2U << RTCA_TMSEL_TMSEL_Pos) +#define FL_RTCA_TIME_MARK_MINUTE (0x3U << RTCA_TMSEL_TMSEL_Pos) +#define FL_RTCA_TIME_MARK_HOUR (0x4U << RTCA_TMSEL_TMSEL_Pos) +#define FL_RTCA_TIME_MARK_DAY (0x5U << RTCA_TMSEL_TMSEL_Pos) +#define FL_RTCA_TIME_MARK_ALARM (0x6U << RTCA_TMSEL_TMSEL_Pos) +#define FL_RTCA_TIME_MARK_32_SEC (0x7U << RTCA_TMSEL_TMSEL_Pos) +#define FL_RTCA_TIME_MARK_SECOND_REVERSE (0x9U << RTCA_TMSEL_TMSEL_Pos) +#define FL_RTCA_TIME_MARK_MINUTE_REVERSE (0xaU << RTCA_TMSEL_TMSEL_Pos) +#define FL_RTCA_TIME_MARK_HOUR_REVERSE (0xbU << RTCA_TMSEL_TMSEL_Pos) +#define FL_RTCA_TIME_MARK_DAY_REVERSE (0xcU << RTCA_TMSEL_TMSEL_Pos) +#define FL_RTCA_TIME_MARK_ALARM_REVERSE (0xdU << RTCA_TMSEL_TMSEL_Pos) +#define FL_RTCA_TIME_MARK_SEC (0xfU << RTCA_TMSEL_TMSEL_Pos) + + +#define FL_RTCA_ADJUST_DIR_INCREASE (0x0U << RTCA_ADJUST_ADSIGN_Pos) +#define FL_RTCA_ADJUST_DIR_DECREASE (0x1U << RTCA_ADJUST_ADSIGN_Pos) + + +/** + * @} + */ +/* Exported functions ---------------------------------------------------------------------------------*/ +/** @defgroup RTCA_FL_Exported_Functions RTCA Exported Functions + * @{ + */ + +/** + * @brief Enable RTCA Config Time + * @rmtoll WER FL_RTCA_WriteEnable + * @param RTCAx RTCA instance + * @retval None + */ +__STATIC_INLINE void FL_RTCA_WriteEnable(RTCA_Type *RTCAx) +{ + RTCAx->WER = 0xACACACAC; +} + +/** + * @brief Disable RTCA Config Time + * @rmtoll WER FL_RTCA_WriteDisable + * @param RTCAx RTCA instance + * @retval None + */ +__STATIC_INLINE void FL_RTCA_WriteDisable(RTCA_Type *RTCAx) +{ + RTCAx->WER = 0x5A5A5A5A; +} + +/** + * @brief Enable RTCA Time Adjust Interrupt + * @rmtoll IER ADJ_IE FL_RTCA_EnableIT_Adjust + * @param RTCAx RTCA instance + * @retval None + */ +__STATIC_INLINE void FL_RTCA_EnableIT_Adjust(RTCA_Type *RTCAx) +{ + SET_BIT(RTCAx->IER, RTCA_IER_ADJ_IE_Msk); +} + +/** + * @brief Get RTCA Time Adjust Interrupt Enable Status + * @rmtoll IER ADJ_IE FL_RTCA_IsEnabledIT_Adjust + * @param RTCAx RTCA instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_RTCA_IsEnabledIT_Adjust(RTCA_Type *RTCAx) +{ + return (uint32_t)(READ_BIT(RTCAx->IER, RTCA_IER_ADJ_IE_Msk) == RTCA_IER_ADJ_IE_Msk); +} + +/** + * @brief Disable RTCA Time Adjust Interrupt + * @rmtoll IER ADJ_IE FL_RTCA_DisableIT_Adjust + * @param RTCAx RTCA instance + * @retval None + */ +__STATIC_INLINE void FL_RTCA_DisableIT_Adjust(RTCA_Type *RTCAx) +{ + CLEAR_BIT(RTCAx->IER, RTCA_IER_ADJ_IE_Msk); +} + +/** + * @brief Enable RTCA Alarm Interrupt + * @rmtoll IER ALARM_IE FL_RTCA_EnableIT_Alarm + * @param RTCAx RTCA instance + * @retval None + */ +__STATIC_INLINE void FL_RTCA_EnableIT_Alarm(RTCA_Type *RTCAx) +{ + SET_BIT(RTCAx->IER, RTCA_IER_ALARM_IE_Msk); +} + +/** + * @brief Get RTCA Alarm Interrupt Enable Status + * @rmtoll IER ALARM_IE FL_RTCA_IsEnabledIT_Alarm + * @param RTCAx RTCA instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_RTCA_IsEnabledIT_Alarm(RTCA_Type *RTCAx) +{ + return (uint32_t)(READ_BIT(RTCAx->IER, RTCA_IER_ALARM_IE_Msk) == RTCA_IER_ALARM_IE_Msk); +} + +/** + * @brief Disable RTCA Alarm Interrupt + * @rmtoll IER ALARM_IE FL_RTCA_DisableIT_Alarm + * @param RTCAx RTCA instance + * @retval None + */ +__STATIC_INLINE void FL_RTCA_DisableIT_Alarm(RTCA_Type *RTCAx) +{ + CLEAR_BIT(RTCAx->IER, RTCA_IER_ALARM_IE_Msk); +} + +/** + * @brief Enable RTCA 1KHz Interrupt + * @rmtoll IER 1KHZ_IE FL_RTCA_EnableIT_1KHz + * @param RTCAx RTCA instance + * @retval None + */ +__STATIC_INLINE void FL_RTCA_EnableIT_1KHz(RTCA_Type *RTCAx) +{ + SET_BIT(RTCAx->IER, RTCA_IER_1KHZ_IE_Msk); +} + +/** + * @brief Get RTCA 1KHz Interrupt Enable Status + * @rmtoll IER 1KHZ_IE FL_RTCA_IsEnabledIT_1KHz + * @param RTCAx RTCA instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_RTCA_IsEnabledIT_1KHz(RTCA_Type *RTCAx) +{ + return (uint32_t)(READ_BIT(RTCAx->IER, RTCA_IER_1KHZ_IE_Msk) == RTCA_IER_1KHZ_IE_Msk); +} + +/** + * @brief Disable RTCA 1KHz Interrupt + * @rmtoll IER 1KHZ_IE FL_RTCA_DisableIT_1KHz + * @param RTCAx RTCA instance + * @retval None + */ +__STATIC_INLINE void FL_RTCA_DisableIT_1KHz(RTCA_Type *RTCAx) +{ + CLEAR_BIT(RTCAx->IER, RTCA_IER_1KHZ_IE_Msk); +} + +/** + * @brief Enable RTCA 256Hz Interrupt + * @rmtoll IER 256HZ_IE FL_RTCA_EnableIT_256Hz + * @param RTCAx RTCA instance + * @retval None + */ +__STATIC_INLINE void FL_RTCA_EnableIT_256Hz(RTCA_Type *RTCAx) +{ + SET_BIT(RTCAx->IER, RTCA_IER_256HZ_IE_Msk); +} + +/** + * @brief Get RTCA 256Hz Interrupt Enable Status + * @rmtoll IER 256HZ_IE FL_RTCA_IsEnabledIT_256Hz + * @param RTCAx RTCA instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_RTCA_IsEnabledIT_256Hz(RTCA_Type *RTCAx) +{ + return (uint32_t)(READ_BIT(RTCAx->IER, RTCA_IER_256HZ_IE_Msk) == RTCA_IER_256HZ_IE_Msk); +} + +/** + * @brief Disable RTCA 256Hz Interrupt + * @rmtoll IER 256HZ_IE FL_RTCA_DisableIT_256Hz + * @param RTCAx RTCA instance + * @retval None + */ +__STATIC_INLINE void FL_RTCA_DisableIT_256Hz(RTCA_Type *RTCAx) +{ + CLEAR_BIT(RTCAx->IER, RTCA_IER_256HZ_IE_Msk); +} + +/** + * @brief Enable RTCA 64Hz Interrupt + * @rmtoll IER 64HZ_IE FL_RTCA_EnableIT_64Hz + * @param RTCAx RTCA instance + * @retval None + */ +__STATIC_INLINE void FL_RTCA_EnableIT_64Hz(RTCA_Type *RTCAx) +{ + SET_BIT(RTCAx->IER, RTCA_IER_64HZ_IE_Msk); +} + +/** + * @brief Get RTCA 64Hz Interrupt Enable Status + * @rmtoll IER 64HZ_IE FL_RTCA_IsEnabledIT_64Hz + * @param RTCAx RTCA instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_RTCA_IsEnabledIT_64Hz(RTCA_Type *RTCAx) +{ + return (uint32_t)(READ_BIT(RTCAx->IER, RTCA_IER_64HZ_IE_Msk) == RTCA_IER_64HZ_IE_Msk); +} + +/** + * @brief Disable RTCA 64Hz Interrupt + * @rmtoll IER 64HZ_IE FL_RTCA_DisableIT_64Hz + * @param RTCAx RTCA instance + * @retval None + */ +__STATIC_INLINE void FL_RTCA_DisableIT_64Hz(RTCA_Type *RTCAx) +{ + CLEAR_BIT(RTCAx->IER, RTCA_IER_64HZ_IE_Msk); +} + +/** + * @brief Enable RTCA 16Hz Interrupt + * @rmtoll IER 16HZ_IE FL_RTCA_EnableIT_16Hz + * @param RTCAx RTCA instance + * @retval None + */ +__STATIC_INLINE void FL_RTCA_EnableIT_16Hz(RTCA_Type *RTCAx) +{ + SET_BIT(RTCAx->IER, RTCA_IER_16HZ_IE_Msk); +} + +/** + * @brief Get RTCA 16Hz Interrupt Enable Status + * @rmtoll IER 16HZ_IE FL_RTCA_IsEnabledIT_16Hz + * @param RTCAx RTCA instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_RTCA_IsEnabledIT_16Hz(RTCA_Type *RTCAx) +{ + return (uint32_t)(READ_BIT(RTCAx->IER, RTCA_IER_16HZ_IE_Msk) == RTCA_IER_16HZ_IE_Msk); +} + +/** + * @brief Disable RTCA 16Hz Interrupt + * @rmtoll IER 16HZ_IE FL_RTCA_DisableIT_16Hz + * @param RTCAx RTCA instance + * @retval None + */ +__STATIC_INLINE void FL_RTCA_DisableIT_16Hz(RTCA_Type *RTCAx) +{ + CLEAR_BIT(RTCAx->IER, RTCA_IER_16HZ_IE_Msk); +} + +/** + * @brief Enable RTCA 8Hz Interrupt + * @rmtoll IER 8HZ_IE FL_RTCA_EnableIT_8Hz + * @param RTCAx RTCA instance + * @retval None + */ +__STATIC_INLINE void FL_RTCA_EnableIT_8Hz(RTCA_Type *RTCAx) +{ + SET_BIT(RTCAx->IER, RTCA_IER_8HZ_IE_Msk); +} + +/** + * @brief Get RTCA 8Hz Interrupt Enable Status + * @rmtoll IER 8HZ_IE FL_RTCA_IsEnabledIT_8Hz + * @param RTCAx RTCA instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_RTCA_IsEnabledIT_8Hz(RTCA_Type *RTCAx) +{ + return (uint32_t)(READ_BIT(RTCAx->IER, RTCA_IER_8HZ_IE_Msk) == RTCA_IER_8HZ_IE_Msk); +} + +/** + * @brief Disable RTCA 8Hz Interrupt + * @rmtoll IER 8HZ_IE FL_RTCA_DisableIT_8Hz + * @param RTCAx RTCA instance + * @retval None + */ +__STATIC_INLINE void FL_RTCA_DisableIT_8Hz(RTCA_Type *RTCAx) +{ + CLEAR_BIT(RTCAx->IER, RTCA_IER_8HZ_IE_Msk); +} + +/** + * @brief Enable RTCA 4Hz Interrupt + * @rmtoll IER 4HZ_IE FL_RTCA_EnableIT_4Hz + * @param RTCAx RTCA instance + * @retval None + */ +__STATIC_INLINE void FL_RTCA_EnableIT_4Hz(RTCA_Type *RTCAx) +{ + SET_BIT(RTCAx->IER, RTCA_IER_4HZ_IE_Msk); +} + +/** + * @brief Get RTCA 4Hz Interrupt Enable Status + * @rmtoll IER 4HZ_IE FL_RTCA_IsEnabledIT_4Hz + * @param RTCAx RTCA instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_RTCA_IsEnabledIT_4Hz(RTCA_Type *RTCAx) +{ + return (uint32_t)(READ_BIT(RTCAx->IER, RTCA_IER_4HZ_IE_Msk) == RTCA_IER_4HZ_IE_Msk); +} + +/** + * @brief Disable RTCA 4Hz Interrupt + * @rmtoll IER 4HZ_IE FL_RTCA_DisableIT_4Hz + * @param RTCAx RTCA instance + * @retval None + */ +__STATIC_INLINE void FL_RTCA_DisableIT_4Hz(RTCA_Type *RTCAx) +{ + CLEAR_BIT(RTCAx->IER, RTCA_IER_4HZ_IE_Msk); +} + +/** + * @brief Enable RTCA 2Hz Interrupt + * @rmtoll IER 2HZ_IE FL_RTCA_EnableIT_2Hz + * @param RTCAx RTCA instance + * @retval None + */ +__STATIC_INLINE void FL_RTCA_EnableIT_2Hz(RTCA_Type *RTCAx) +{ + SET_BIT(RTCAx->IER, RTCA_IER_2HZ_IE_Msk); +} + +/** + * @brief Get RTCA 2Hz Interrupt Enable Status + * @rmtoll IER 2HZ_IE FL_RTCA_IsEnabledIT_2Hz + * @param RTCAx RTCA instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_RTCA_IsEnabledIT_2Hz(RTCA_Type *RTCAx) +{ + return (uint32_t)(READ_BIT(RTCAx->IER, RTCA_IER_2HZ_IE_Msk) == RTCA_IER_2HZ_IE_Msk); +} + +/** + * @brief Disable RTCA 2Hz Interrupt + * @rmtoll IER 2HZ_IE FL_RTCA_DisableIT_2Hz + * @param RTCAx RTCA instance + * @retval None + */ +__STATIC_INLINE void FL_RTCA_DisableIT_2Hz(RTCA_Type *RTCAx) +{ + CLEAR_BIT(RTCAx->IER, RTCA_IER_2HZ_IE_Msk); +} + +/** + * @brief Enable RTCA Second Interrupt + * @rmtoll IER SEC_IE FL_RTCA_EnableIT_Second + * @param RTCAx RTCA instance + * @retval None + */ +__STATIC_INLINE void FL_RTCA_EnableIT_Second(RTCA_Type *RTCAx) +{ + SET_BIT(RTCAx->IER, RTCA_IER_SEC_IE_Msk); +} + +/** + * @brief Get RTCA Second Interrupt Enable Status + * @rmtoll IER SEC_IE FL_RTCA_IsEnabledIT_Second + * @param RTCAx RTCA instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_RTCA_IsEnabledIT_Second(RTCA_Type *RTCAx) +{ + return (uint32_t)(READ_BIT(RTCAx->IER, RTCA_IER_SEC_IE_Msk) == RTCA_IER_SEC_IE_Msk); +} + +/** + * @brief Disable RTCA Second Interrupt + * @rmtoll IER SEC_IE FL_RTCA_DisableIT_Second + * @param RTCAx RTCA instance + * @retval None + */ +__STATIC_INLINE void FL_RTCA_DisableIT_Second(RTCA_Type *RTCAx) +{ + CLEAR_BIT(RTCAx->IER, RTCA_IER_SEC_IE_Msk); +} + +/** + * @brief Enable RTCA Minute Interrupt + * @rmtoll IER MIN_IE FL_RTCA_EnableIT_Minute + * @param RTCAx RTCA instance + * @retval None + */ +__STATIC_INLINE void FL_RTCA_EnableIT_Minute(RTCA_Type *RTCAx) +{ + SET_BIT(RTCAx->IER, RTCA_IER_MIN_IE_Msk); +} + +/** + * @brief Get RTCA Minute Interrupt Enable Status + * @rmtoll IER MIN_IE FL_RTCA_IsEnabledIT_Minute + * @param RTCAx RTCA instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_RTCA_IsEnabledIT_Minute(RTCA_Type *RTCAx) +{ + return (uint32_t)(READ_BIT(RTCAx->IER, RTCA_IER_MIN_IE_Msk) == RTCA_IER_MIN_IE_Msk); +} + +/** + * @brief Disable RTCA Minute Interrupt + * @rmtoll IER MIN_IE FL_RTCA_DisableIT_Minute + * @param RTCAx RTCA instance + * @retval None + */ +__STATIC_INLINE void FL_RTCA_DisableIT_Minute(RTCA_Type *RTCAx) +{ + CLEAR_BIT(RTCAx->IER, RTCA_IER_MIN_IE_Msk); +} + +/** + * @brief Enable RTCA Hour Interrupt + * @rmtoll IER HOUR_IE FL_RTCA_EnableIT_Hour + * @param RTCAx RTCA instance + * @retval None + */ +__STATIC_INLINE void FL_RTCA_EnableIT_Hour(RTCA_Type *RTCAx) +{ + SET_BIT(RTCAx->IER, RTCA_IER_HOUR_IE_Msk); +} + +/** + * @brief Get RTCA Hour Interrupt Enable Status + * @rmtoll IER HOUR_IE FL_RTCA_IsEnabledIT_Hour + * @param RTCAx RTCA instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_RTCA_IsEnabledIT_Hour(RTCA_Type *RTCAx) +{ + return (uint32_t)(READ_BIT(RTCAx->IER, RTCA_IER_HOUR_IE_Msk) == RTCA_IER_HOUR_IE_Msk); +} + +/** + * @brief Disable RTCA Hour Interrupt + * @rmtoll IER HOUR_IE FL_RTCA_DisableIT_Hour + * @param RTCAx RTCA instance + * @retval None + */ +__STATIC_INLINE void FL_RTCA_DisableIT_Hour(RTCA_Type *RTCAx) +{ + CLEAR_BIT(RTCAx->IER, RTCA_IER_HOUR_IE_Msk); +} + +/** + * @brief Enable RTCA Day Interrupt + * @rmtoll IER DAY_IE FL_RTCA_EnableIT_Day + * @param RTCAx RTCA instance + * @retval None + */ +__STATIC_INLINE void FL_RTCA_EnableIT_Day(RTCA_Type *RTCAx) +{ + SET_BIT(RTCAx->IER, RTCA_IER_DAY_IE_Msk); +} + +/** + * @brief Get RTCA Day Interrupt Enable Status + * @rmtoll IER DAY_IE FL_RTCA_IsEnabledIT_Day + * @param RTCAx RTCA instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_RTCA_IsEnabledIT_Day(RTCA_Type *RTCAx) +{ + return (uint32_t)(READ_BIT(RTCAx->IER, RTCA_IER_DAY_IE_Msk) == RTCA_IER_DAY_IE_Msk); +} + +/** + * @brief Disable RTCA Day Interrupt + * @rmtoll IER DAY_IE FL_RTCA_DisableIT_Day + * @param RTCAx RTCA instance + * @retval None + */ +__STATIC_INLINE void FL_RTCA_DisableIT_Day(RTCA_Type *RTCAx) +{ + CLEAR_BIT(RTCAx->IER, RTCA_IER_DAY_IE_Msk); +} + +/** + * @brief Clear RTCA Time Adjust Interrupt Flag + * @rmtoll ISR ADJ_IF FL_RTCA_ClearFlag_Adjust + * @param RTCAx RTCA instance + * @retval None + */ +__STATIC_INLINE void FL_RTCA_ClearFlag_Adjust(RTCA_Type *RTCAx) +{ + WRITE_REG(RTCAx->ISR, RTCA_ISR_ADJ_IF_Msk); +} + +/** + * @brief Get RTCA Time Adjust Interrupt Flag + * @rmtoll ISR ADJ_IF FL_RTCA_IsActiveFlag_Adjust + * @param RTCAx RTCA instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_RTCA_IsActiveFlag_Adjust(RTCA_Type *RTCAx) +{ + return (uint32_t)(READ_BIT(RTCAx->ISR, RTCA_ISR_ADJ_IF_Msk) == (RTCA_ISR_ADJ_IF_Msk)); +} + +/** + * @brief Clear RTCA Alarm Interrupt Flag + * @rmtoll ISR ALARM_IF FL_RTCA_ClearFlag_Alarm + * @param RTCAx RTCA instance + * @retval None + */ +__STATIC_INLINE void FL_RTCA_ClearFlag_Alarm(RTCA_Type *RTCAx) +{ + WRITE_REG(RTCAx->ISR, RTCA_ISR_ALARM_IF_Msk); +} + +/** + * @brief Get RTCA Alarm Interrupt Flag + * @rmtoll ISR ALARM_IF FL_RTCA_IsActiveFlag_Alarm + * @param RTCAx RTCA instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_RTCA_IsActiveFlag_Alarm(RTCA_Type *RTCAx) +{ + return (uint32_t)(READ_BIT(RTCAx->ISR, RTCA_ISR_ALARM_IF_Msk) == (RTCA_ISR_ALARM_IF_Msk)); +} + +/** + * @brief Clear RTCA 1KHz Interrupt Flag + * @rmtoll ISR 1KHZ_IF FL_RTCA_ClearFlag_1KHz + * @param RTCAx RTCA instance + * @retval None + */ +__STATIC_INLINE void FL_RTCA_ClearFlag_1KHz(RTCA_Type *RTCAx) +{ + WRITE_REG(RTCAx->ISR, RTCA_ISR_1KHZ_IF_Msk); +} + +/** + * @brief Get RTCA 1KHz Interrupt Flag + * @rmtoll ISR 1KHZ_IF FL_RTCA_IsActiveFlag_1KHz + * @param RTCAx RTCA instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_RTCA_IsActiveFlag_1KHz(RTCA_Type *RTCAx) +{ + return (uint32_t)(READ_BIT(RTCAx->ISR, RTCA_ISR_1KHZ_IF_Msk) == (RTCA_ISR_1KHZ_IF_Msk)); +} + +/** + * @brief Clear RTCA 256Hz Interrupt Flag + * @rmtoll ISR 256HZ_IF FL_RTCA_ClearFlag_256Hz + * @param RTCAx RTCA instance + * @retval None + */ +__STATIC_INLINE void FL_RTCA_ClearFlag_256Hz(RTCA_Type *RTCAx) +{ + WRITE_REG(RTCAx->ISR, RTCA_ISR_256HZ_IF_Msk); +} + +/** + * @brief Get RTCA 256Hz Interrupt Flag + * @rmtoll ISR 256HZ_IF FL_RTCA_IsActiveFlag_256Hz + * @param RTCAx RTCA instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_RTCA_IsActiveFlag_256Hz(RTCA_Type *RTCAx) +{ + return (uint32_t)(READ_BIT(RTCAx->ISR, RTCA_ISR_256HZ_IF_Msk) == (RTCA_ISR_256HZ_IF_Msk)); +} + +/** + * @brief Clear RTCA 64Hz Interrupt Flag + * @rmtoll ISR 64HZ_IF FL_RTCA_ClearFlag_64Hz + * @param RTCAx RTCA instance + * @retval None + */ +__STATIC_INLINE void FL_RTCA_ClearFlag_64Hz(RTCA_Type *RTCAx) +{ + WRITE_REG(RTCAx->ISR, RTCA_ISR_64HZ_IF_Msk); +} + +/** + * @brief Get RTCA 64Hz Interrupt Flag + * @rmtoll ISR 64HZ_IF FL_RTCA_IsActiveFlag_64Hz + * @param RTCAx RTCA instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_RTCA_IsActiveFlag_64Hz(RTCA_Type *RTCAx) +{ + return (uint32_t)(READ_BIT(RTCAx->ISR, RTCA_ISR_64HZ_IF_Msk) == (RTCA_ISR_64HZ_IF_Msk)); +} + +/** + * @brief Clear RTCA 16Hz Interrupt Flag + * @rmtoll ISR 16HZ_IF FL_RTCA_ClearFlag_16Hz + * @param RTCAx RTCA instance + * @retval None + */ +__STATIC_INLINE void FL_RTCA_ClearFlag_16Hz(RTCA_Type *RTCAx) +{ + WRITE_REG(RTCAx->ISR, RTCA_ISR_16HZ_IF_Msk); +} + +/** + * @brief Get RTCA 16Hz Interrupt Flag + * @rmtoll ISR 16HZ_IF FL_RTCA_IsActiveFlag_16Hz + * @param RTCAx RTCA instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_RTCA_IsActiveFlag_16Hz(RTCA_Type *RTCAx) +{ + return (uint32_t)(READ_BIT(RTCAx->ISR, RTCA_ISR_16HZ_IF_Msk) == (RTCA_ISR_16HZ_IF_Msk)); +} + +/** + * @brief Clear RTCA 8Hz Interrupt Flag + * @rmtoll ISR 8HZ_IF FL_RTCA_ClearFlag_8Hz + * @param RTCAx RTCA instance + * @retval None + */ +__STATIC_INLINE void FL_RTCA_ClearFlag_8Hz(RTCA_Type *RTCAx) +{ + WRITE_REG(RTCAx->ISR, RTCA_ISR_8HZ_IF_Msk); +} + +/** + * @brief Get RTCA 8Hz Interrupt Flag + * @rmtoll ISR 8HZ_IF FL_RTCA_IsActiveFlag_8Hz + * @param RTCAx RTCA instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_RTCA_IsActiveFlag_8Hz(RTCA_Type *RTCAx) +{ + return (uint32_t)(READ_BIT(RTCAx->ISR, RTCA_ISR_8HZ_IF_Msk) == (RTCA_ISR_8HZ_IF_Msk)); +} + +/** + * @brief Clear RTCA 4Hz Interrupt Flag + * @rmtoll ISR 4HZ_IF FL_RTCA_ClearFlag_4Hz + * @param RTCAx RTCA instance + * @retval None + */ +__STATIC_INLINE void FL_RTCA_ClearFlag_4Hz(RTCA_Type *RTCAx) +{ + WRITE_REG(RTCAx->ISR, RTCA_ISR_4HZ_IF_Msk); +} + +/** + * @brief Get RTCA 4Hz Interrupt Flag + * @rmtoll ISR 4HZ_IF FL_RTCA_IsActiveFlag_4Hz + * @param RTCAx RTCA instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_RTCA_IsActiveFlag_4Hz(RTCA_Type *RTCAx) +{ + return (uint32_t)(READ_BIT(RTCAx->ISR, RTCA_ISR_4HZ_IF_Msk) == (RTCA_ISR_4HZ_IF_Msk)); +} + +/** + * @brief Clear RTCA 2Hz Interrupt Flag + * @rmtoll ISR 2HZ_IF FL_RTCA_ClearFlag_2Hz + * @param RTCAx RTCA instance + * @retval None + */ +__STATIC_INLINE void FL_RTCA_ClearFlag_2Hz(RTCA_Type *RTCAx) +{ + WRITE_REG(RTCAx->ISR, RTCA_ISR_2HZ_IF_Msk); +} + +/** + * @brief Get RTCA 2Hz Interrupt Flag + * @rmtoll ISR 2HZ_IF FL_RTCA_IsActiveFlag_2Hz + * @param RTCAx RTCA instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_RTCA_IsActiveFlag_2Hz(RTCA_Type *RTCAx) +{ + return (uint32_t)(READ_BIT(RTCAx->ISR, RTCA_ISR_2HZ_IF_Msk) == (RTCA_ISR_2HZ_IF_Msk)); +} + +/** + * @brief Clear RTCA Second Interrupt Flag + * @rmtoll ISR SEC_IF FL_RTCA_ClearFlag_Second + * @param RTCAx RTCA instance + * @retval None + */ +__STATIC_INLINE void FL_RTCA_ClearFlag_Second(RTCA_Type *RTCAx) +{ + WRITE_REG(RTCAx->ISR, RTCA_ISR_SEC_IF_Msk); +} + +/** + * @brief Get RTCA Second Interrupt Flag + * @rmtoll ISR SEC_IF FL_RTCA_IsActiveFlag_Second + * @param RTCAx RTCA instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_RTCA_IsActiveFlag_Second(RTCA_Type *RTCAx) +{ + return (uint32_t)(READ_BIT(RTCAx->ISR, RTCA_ISR_SEC_IF_Msk) == (RTCA_ISR_SEC_IF_Msk)); +} + +/** + * @brief Clear RTCA Minute Interrupt Flag + * @rmtoll ISR MIN_IF FL_RTCA_ClearFlag_Minute + * @param RTCAx RTCA instance + * @retval None + */ +__STATIC_INLINE void FL_RTCA_ClearFlag_Minute(RTCA_Type *RTCAx) +{ + WRITE_REG(RTCAx->ISR, RTCA_ISR_MIN_IF_Msk); +} + +/** + * @brief Get RTCA Minute Interrupt Flag + * @rmtoll ISR MIN_IF FL_RTCA_IsActiveFlag_Minute + * @param RTCAx RTCA instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_RTCA_IsActiveFlag_Minute(RTCA_Type *RTCAx) +{ + return (uint32_t)(READ_BIT(RTCAx->ISR, RTCA_ISR_MIN_IF_Msk) == (RTCA_ISR_MIN_IF_Msk)); +} + +/** + * @brief Clear RTCA Hour Interrupt Flag + * @rmtoll ISR HOUR_IF FL_RTCA_ClearFlag_Hour + * @param RTCAx RTCA instance + * @retval None + */ +__STATIC_INLINE void FL_RTCA_ClearFlag_Hour(RTCA_Type *RTCAx) +{ + WRITE_REG(RTCAx->ISR, RTCA_ISR_HOUR_IF_Msk); +} + +/** + * @brief Get RTCA Hour Interrupt Flag + * @rmtoll ISR HOUR_IF FL_RTCA_IsActiveFlag_Hour + * @param RTCAx RTCA instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_RTCA_IsActiveFlag_Hour(RTCA_Type *RTCAx) +{ + return (uint32_t)(READ_BIT(RTCAx->ISR, RTCA_ISR_HOUR_IF_Msk) == (RTCA_ISR_HOUR_IF_Msk)); +} + +/** + * @brief Clear RTCA Day Interrupt Flag + * @rmtoll ISR DAY_IF FL_RTCA_ClearFlag_Day + * @param RTCAx RTCA instance + * @retval None + */ +__STATIC_INLINE void FL_RTCA_ClearFlag_Day(RTCA_Type *RTCAx) +{ + WRITE_REG(RTCAx->ISR, RTCA_ISR_DAY_IF_Msk); +} + +/** + * @brief Get RTCA Day Interrupt Flag + * @rmtoll ISR DAY_IF FL_RTCA_IsActiveFlag_Day + * @param RTCAx RTCA instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_RTCA_IsActiveFlag_Day(RTCA_Type *RTCAx) +{ + return (uint32_t)(READ_BIT(RTCAx->ISR, RTCA_ISR_DAY_IF_Msk) == (RTCA_ISR_DAY_IF_Msk)); +} + +/** + * @brief Get RTCA Second Value + * @rmtoll BCDSEC FL_RTCA_ReadSecond + * @param RTCAx RTCA instance + * @retval + */ +__STATIC_INLINE uint32_t FL_RTCA_ReadSecond(RTCA_Type *RTCAx) +{ + return (uint32_t)(READ_BIT(RTCAx->BCDSEC, (0x7fU << 0U)) >> 0U); +} + +/** + * @brief Set RTCA Second Value + * @rmtoll BCDSEC FL_RTCA_WriteSecond + * @param RTCAx RTCA instance + * @param second + * @retval None + */ +__STATIC_INLINE void FL_RTCA_WriteSecond(RTCA_Type *RTCAx, uint32_t second) +{ + MODIFY_REG(RTCAx->BCDSEC, (0x7fU << 0U), (second << 0U)); +} + +/** + * @brief Get RTCA Minute Value + * @rmtoll BCDMIN FL_RTCA_ReadMinute + * @param RTCAx RTCA instance + * @retval + */ +__STATIC_INLINE uint32_t FL_RTCA_ReadMinute(RTCA_Type *RTCAx) +{ + return (uint32_t)(READ_BIT(RTCAx->BCDMIN, (0x7fU << 0U)) >> 0U); +} + +/** + * @brief Set RTCA Minute Value + * @rmtoll BCDMIN FL_RTCA_WriteMinute + * @param RTCAx RTCA instance + * @param minute + * @retval None + */ +__STATIC_INLINE void FL_RTCA_WriteMinute(RTCA_Type *RTCAx, uint32_t minute) +{ + MODIFY_REG(RTCAx->BCDMIN, (0x7fU << 0U), (minute << 0U)); +} + +/** + * @brief Get RTCA Hour Value + * @rmtoll BCDHOUR FL_RTCA_ReadHour + * @param RTCAx RTCA instance + * @retval + */ +__STATIC_INLINE uint32_t FL_RTCA_ReadHour(RTCA_Type *RTCAx) +{ + return (uint32_t)(READ_BIT(RTCAx->BCDHOUR, (0x3fU << 0U)) >> 0U); +} + +/** + * @brief Set RTCA Hour Value + * @rmtoll BCDHOUR FL_RTCA_WriteHour + * @param RTCAx RTCA instance + * @param hour + * @retval None + */ +__STATIC_INLINE void FL_RTCA_WriteHour(RTCA_Type *RTCAx, uint32_t hour) +{ + MODIFY_REG(RTCAx->BCDHOUR, (0x3fU << 0U), (hour << 0U)); +} + +/** + * @brief Get RTCA Day Value + * @rmtoll BCDDAY FL_RTCA_ReadDay + * @param RTCAx RTCA instance + * @retval + */ +__STATIC_INLINE uint32_t FL_RTCA_ReadDay(RTCA_Type *RTCAx) +{ + return (uint32_t)(READ_BIT(RTCAx->BCDDAY, (0x3fU << 0U)) >> 0U); +} + +/** + * @brief Set RTCA Day Value + * @rmtoll BCDDAY FL_RTCA_WriteDay + * @param RTCAx RTCA instance + * @param day + * @retval None + */ +__STATIC_INLINE void FL_RTCA_WriteDay(RTCA_Type *RTCAx, uint32_t day) +{ + MODIFY_REG(RTCAx->BCDDAY, (0x3fU << 0U), (day << 0U)); +} + +/** + * @brief Get RTCA Week Value + * @rmtoll BCDWEEK FL_RTCA_ReadWeek + * @param RTCAx RTCA instance + * @retval + */ +__STATIC_INLINE uint32_t FL_RTCA_ReadWeek(RTCA_Type *RTCAx) +{ + return (uint32_t)(READ_BIT(RTCAx->BCDWEEK, (0x7U << 0U)) >> 0U); +} + +/** + * @brief Set RTCA Week Value + * @rmtoll BCDWEEK FL_RTCA_WriteWeek + * @param RTCAx RTCA instance + * @param week + * @retval None + */ +__STATIC_INLINE void FL_RTCA_WriteWeek(RTCA_Type *RTCAx, uint32_t week) +{ + MODIFY_REG(RTCAx->BCDWEEK, (0x7U << 0U), (week << 0U)); +} + +/** + * @brief Get RTCA Month Value + * @rmtoll BCDMONTH FL_RTCA_ReadMonth + * @param RTCAx RTCA instance + * @retval + */ +__STATIC_INLINE uint32_t FL_RTCA_ReadMonth(RTCA_Type *RTCAx) +{ + return (uint32_t)(READ_BIT(RTCAx->BCDMONTH, (0x1fU << 0U)) >> 0U); +} + +/** + * @brief Set RTCA Month Value + * @rmtoll BCDMONTH FL_RTCA_WriteMonth + * @param RTCAx RTCA instance + * @param month + * @retval None + */ +__STATIC_INLINE void FL_RTCA_WriteMonth(RTCA_Type *RTCAx, uint32_t month) +{ + MODIFY_REG(RTCAx->BCDMONTH, (0x1fU << 0U), (month << 0U)); +} + +/** + * @brief Get RTCA Year Value + * @rmtoll BCDYEAR FL_RTCA_ReadYear + * @param RTCAx RTCA instance + * @retval + */ +__STATIC_INLINE uint32_t FL_RTCA_ReadYear(RTCA_Type *RTCAx) +{ + return (uint32_t)(READ_BIT(RTCAx->BCDYEAR, (0xffU << 0U)) >> 0U); +} + +/** + * @brief Set RTCA Year Value + * @rmtoll BCDYEAR FL_RTCA_WriteYear + * @param RTCAx RTCA instance + * @param year + * @retval None + */ +__STATIC_INLINE void FL_RTCA_WriteYear(RTCA_Type *RTCAx, uint32_t year) +{ + MODIFY_REG(RTCAx->BCDYEAR, (0xffU << 0U), (year << 0U)); +} + +/** + * @brief Get RTCA Alarm Hour Value + * @rmtoll ALARM FL_RTCA_ReadHourAlarm + * @param RTCAx RTCA instance + * @retval + */ +__STATIC_INLINE uint32_t FL_RTCA_ReadHourAlarm(RTCA_Type *RTCAx) +{ + return (uint32_t)(READ_BIT(RTCAx->ALARM, (0x3fU << 16U)) >> 16U); +} + +/** + * @brief Set RTCA Alarm Hour Value + * @rmtoll ALARM FL_RTCA_WriteHourAlarm + * @param RTCAx RTCA instance + * @param hour + * @retval None + */ +__STATIC_INLINE void FL_RTCA_WriteHourAlarm(RTCA_Type *RTCAx, uint32_t hour) +{ + MODIFY_REG(RTCAx->ALARM, (0x3fU << 16U), (hour << 16U)); +} + +/** + * @brief Get RTCA Alarm Minute Value + * @rmtoll ALARM FL_RTCA_ReadMinuteAlarm + * @param RTCAx RTCA instance + * @retval + */ +__STATIC_INLINE uint32_t FL_RTCA_ReadMinuteAlarm(RTCA_Type *RTCAx) +{ + return (uint32_t)(READ_BIT(RTCAx->ALARM, (0x7fU << 8U)) >> 8U); +} + +/** + * @brief Set RTCA Alarm Minute Value + * @rmtoll ALARM FL_RTCA_WriteMinuteAlarm + * @param RTCAx RTCA instance + * @param minute + * @retval None + */ +__STATIC_INLINE void FL_RTCA_WriteMinuteAlarm(RTCA_Type *RTCAx, uint32_t minute) +{ + MODIFY_REG(RTCAx->ALARM, (0x7fU << 8U), (minute << 8U)); +} + +/** + * @brief Get RTCA Alarm Second Value + * @rmtoll ALARM FL_RTCA_ReadSecondAlarm + * @param RTCAx RTCA instance + * @retval + */ +__STATIC_INLINE uint32_t FL_RTCA_ReadSecondAlarm(RTCA_Type *RTCAx) +{ + return (uint32_t)(READ_BIT(RTCAx->ALARM, (0x7fU << 0U)) >> 0U); +} + +/** + * @brief Set RTCA Alarm Second Value + * @rmtoll ALARM FL_RTCA_WriteSecondAlarm + * @param RTCAx RTCA instance + * @param second + * @retval None + */ +__STATIC_INLINE void FL_RTCA_WriteSecondAlarm(RTCA_Type *RTCAx, uint32_t second) +{ + MODIFY_REG(RTCAx->ALARM, (0x7fU << 0U), (second << 0U)); +} + +/** + * @brief Set RTCA Output Time Mark Signal + * @rmtoll TMSEL TMSEL FL_RTCA_SetTimeMarkOutput + * @param RTCAx RTCA instance + * @param markSelect This parameter can be one of the following values: + * @arg @ref FL_RTCA_TIME_MARK_SECOND + * @arg @ref FL_RTCA_TIME_MARK_MINUTE + * @arg @ref FL_RTCA_TIME_MARK_HOUR + * @arg @ref FL_RTCA_TIME_MARK_DAY + * @arg @ref FL_RTCA_TIME_MARK_ALARM + * @arg @ref FL_RTCA_TIME_MARK_32_SEC + * @arg @ref FL_RTCA_TIME_MARK_SECOND_REVERSE + * @arg @ref FL_RTCA_TIME_MARK_MINUTE_REVERSE + * @arg @ref FL_RTCA_TIME_MARK_HOUR_REVERSE + * @arg @ref FL_RTCA_TIME_MARK_DAY_REVERSE + * @arg @ref FL_RTCA_TIME_MARK_ALARM_REVERSE + * @arg @ref FL_RTCA_TIME_MARK_SEC + * @retval None + */ +__STATIC_INLINE void FL_RTCA_SetTimeMarkOutput(RTCA_Type *RTCAx, uint32_t markSelect) +{ + MODIFY_REG(RTCAx->TMSEL, RTCA_TMSEL_TMSEL_Msk, markSelect); +} + +/** + * @brief Get RTCA Output Time Mark Signal Setting + * @rmtoll TMSEL TMSEL FL_RTCA_GetTimeMarkOutput + * @param RTCAx RTCA instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_RTCA_TIME_MARK_SECOND + * @arg @ref FL_RTCA_TIME_MARK_MINUTE + * @arg @ref FL_RTCA_TIME_MARK_HOUR + * @arg @ref FL_RTCA_TIME_MARK_DAY + * @arg @ref FL_RTCA_TIME_MARK_ALARM + * @arg @ref FL_RTCA_TIME_MARK_32_SEC + * @arg @ref FL_RTCA_TIME_MARK_SECOND_REVERSE + * @arg @ref FL_RTCA_TIME_MARK_MINUTE_REVERSE + * @arg @ref FL_RTCA_TIME_MARK_HOUR_REVERSE + * @arg @ref FL_RTCA_TIME_MARK_DAY_REVERSE + * @arg @ref FL_RTCA_TIME_MARK_ALARM_REVERSE + * @arg @ref FL_RTCA_TIME_MARK_SEC + */ +__STATIC_INLINE uint32_t FL_RTCA_GetTimeMarkOutput(RTCA_Type *RTCAx) +{ + return (uint32_t)(READ_BIT(RTCAx->TMSEL, RTCA_TMSEL_TMSEL_Msk)); +} + +/** + * @brief Get RTCA Adjust Value + * @rmtoll ADJUST FL_RTCA_ReadAdjustValue + * @param RTCAx RTCA instance + * @retval + */ +__STATIC_INLINE uint32_t FL_RTCA_ReadAdjustValue(RTCA_Type *RTCAx) +{ + return (uint32_t)(READ_BIT(RTCAx->ADJUST, (0x1ffU << 0U)) >> 0U); +} + +/** + * @brief Set RTCA Adjust Value + * @rmtoll ADJUST FL_RTCA_WriteAdjustValue + * @param RTCAx RTCA instance + * @param adjustValue + * @retval None + */ +__STATIC_INLINE void FL_RTCA_WriteAdjustValue(RTCA_Type *RTCAx, uint32_t adjustValue) +{ + MODIFY_REG(RTCAx->ADJUST, (0x1ffU << 0U), (adjustValue << 0U)); +} + +/** + * @brief Set RTCA Adjust Direction + * @rmtoll ADJUST ADSIGN FL_RTCA_SetAdjustDirection + * @param RTCAx RTCA instance + * @param adjustDir This parameter can be one of the following values: + * @arg @ref FL_RTCA_ADJUST_DIR_INCREASE + * @arg @ref FL_RTCA_ADJUST_DIR_DECREASE + * @retval None + */ +__STATIC_INLINE void FL_RTCA_SetAdjustDirection(RTCA_Type *RTCAx, uint32_t adjustDir) +{ + MODIFY_REG(RTCAx->ADJUST, RTCA_ADJUST_ADSIGN_Msk, adjustDir); +} + +/** + * @brief Get RTCA Adjust Direction + * @rmtoll ADJUST ADSIGN FL_RTCA_GetAdjustDirection + * @param RTCAx RTCA instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_RTCA_ADJUST_DIR_INCREASE + * @arg @ref FL_RTCA_ADJUST_DIR_DECREASE + */ +__STATIC_INLINE uint32_t FL_RTCA_GetAdjustDirection(RTCA_Type *RTCAx) +{ + return (uint32_t)(READ_BIT(RTCAx->ADJUST, RTCA_ADJUST_ADSIGN_Msk)); +} + +/** + * @brief Get RTCA MilliSecond Counter Value + * @rmtoll SBSCNT FL_RTCA_ReadMilliSecondCounter + * @param RTCAx RTCA instance + * @retval + */ +__STATIC_INLINE uint32_t FL_RTCA_ReadMilliSecondCounter(RTCA_Type *RTCAx) +{ + return (uint32_t)(READ_BIT(RTCAx->SBSCNT, (0xffU << 0U)) >> 0U); +} + +/** + * @brief Set RTCA MilliSecond Counter Value + * @rmtoll SBSCNT FL_RTCA_WriteMilliSecondCounter + * @param RTCAx RTCA instance + * @param milliSecondCount + * @retval None + */ +__STATIC_INLINE void FL_RTCA_WriteMilliSecondCounter(RTCA_Type *RTCAx, uint32_t milliSecondCount) +{ + MODIFY_REG(RTCAx->SBSCNT, (0xffU << 0U), (milliSecondCount << 0U)); +} + +/** + * @brief RTCA enable + * @rmtoll CR EN FL_RTCA_Enable + * @param RTCAx RTCA instance + * @retval None + */ +__STATIC_INLINE void FL_RTCA_Enable(RTCA_Type *RTCAx) +{ + SET_BIT(RTCAx->CR, RTCA_CR_EN_Msk); +} + +/** + * @brief Get RTCA enable status + * @rmtoll CR EN FL_RTCA_IsEnabled + * @param RTCAx RTCA instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_RTCA_IsEnabled(RTCA_Type *RTCAx) +{ + return (uint32_t)(READ_BIT(RTCAx->CR, RTCA_CR_EN_Msk) == RTCA_CR_EN_Msk); +} + +/** + * @brief RTCA disable + * @rmtoll CR EN FL_RTCA_Disable + * @param RTCAx RTCA instance + * @retval None + */ +__STATIC_INLINE void FL_RTCA_Disable(RTCA_Type *RTCAx) +{ + CLEAR_BIT(RTCAx->CR, RTCA_CR_EN_Msk); +} + +/** + * @} + */ + +/** @defgroup RTCA_FL_EF_Init Initialization and de-initialization functions + * @{ + */ +FL_ErrorStatus FL_RTCA_DeInit(RTCA_Type *RTCAx); +void FL_RTCA_StructInit(FL_RTCA_InitTypeDef *initStruct); +FL_ErrorStatus FL_RTCA_GetTime(RTCA_Type *RTCAx, FL_RTCA_InitTypeDef *initStruct); +FL_ErrorStatus FL_RTCA_Init(RTCA_Type *RTCAx, FL_RTCA_InitTypeDef *initStruct); +FL_ErrorStatus FL_RTCA_ConfigTime(RTCA_Type *RTCAx, FL_RTCA_InitTypeDef *initStruct); + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif /* __FM33LG0XX_FL_RTCA_H*/ + +/*************************Py_Code_Generator Version: 0.1-0.11-0.1 @ 2020-09-14*************************/ +/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/ diff --git a/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_spi.h b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_spi.h new file mode 100644 index 0000000..6850b40 --- /dev/null +++ b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_spi.h @@ -0,0 +1,1276 @@ + /** + ******************************************************************************************************* + * @file fm33lg0xx_fl_spi.h + * @author FMSH Application Team + * @brief Head file of SPI FL Module + ******************************************************************************************************* + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + + + +/* Define to prevent recursive inclusion---------------------------------------------------------------*/ +#ifndef __FM33LG0XX_FL_SPI_H +#define __FM33LG0XX_FL_SPI_H + +#ifdef __cplusplus +extern "C" { +#endif +/* Includes -------------------------------------------------------------------------------------------*/ +#include "fm33lg0xx_fl_def.h" +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @defgroup SPI SPI + * @brief SPI FL driver + * @{ + */ + +/* Exported types -------------------------------------------------------------------------------------*/ +/** @defgroup SPI_FL_ES_INIT SPI Exported Init structures + * @{ + */ + +/** + * @brief FL SPI Init Sturcture definition + */ +typedef struct +{ + /*! 传输模式 单双工 */ + uint32_t transferMode; + /*! 主从模式 */ + uint32_t mode; + /*! 数据位宽 */ + uint32_t dataWidth; + /*! 时钟极性 */ + uint32_t clockPolarity; + /*! 时钟相位 */ + uint32_t clockPhase; + /*! NSS 脚使能软件控制 */ + uint32_t softControl; + /*! 通讯速率 */ + uint32_t baudRate; + /*! Bit方向 */ + uint32_t bitOrder; + +} FL_SPI_InitTypeDef; + +/** + * @} + */ +/* Exported constants ---------------------------------------------------------------------------------*/ +/** @defgroup SPI_FL_Exported_Constants SPI Exported Constants + * @{ + */ + +#define SPI_CR1_IOSWAP_Pos (11U) +#define SPI_CR1_IOSWAP_Msk (0x1U << SPI_CR1_IOSWAP_Pos) +#define SPI_CR1_IOSWAP SPI_CR1_IOSWAP_Msk + +#define SPI_CR1_MSPA_Pos (10U) +#define SPI_CR1_MSPA_Msk (0x1U << SPI_CR1_MSPA_Pos) +#define SPI_CR1_MSPA SPI_CR1_MSPA_Msk + +#define SPI_CR1_SSPA_Pos (9U) +#define SPI_CR1_SSPA_Msk (0x1U << SPI_CR1_SSPA_Pos) +#define SPI_CR1_SSPA SPI_CR1_SSPA_Msk + +#define SPI_CR1_MM_Pos (8U) +#define SPI_CR1_MM_Msk (0x1U << SPI_CR1_MM_Pos) +#define SPI_CR1_MM SPI_CR1_MM_Msk + +#define SPI_CR1_WAIT_Pos (6U) +#define SPI_CR1_WAIT_Msk (0x3U << SPI_CR1_WAIT_Pos) +#define SPI_CR1_WAIT SPI_CR1_WAIT_Msk + +#define SPI_CR1_BAUD_Pos (3U) +#define SPI_CR1_BAUD_Msk (0x7U << SPI_CR1_BAUD_Pos) +#define SPI_CR1_BAUD SPI_CR1_BAUD_Msk + +#define SPI_CR1_LSBF_Pos (2U) +#define SPI_CR1_LSBF_Msk (0x1U << SPI_CR1_LSBF_Pos) +#define SPI_CR1_LSBF SPI_CR1_LSBF_Msk + +#define SPI_CR1_CPOL_Pos (1U) +#define SPI_CR1_CPOL_Msk (0x1U << SPI_CR1_CPOL_Pos) +#define SPI_CR1_CPOL SPI_CR1_CPOL_Msk + +#define SPI_CR1_CPHA_Pos (0U) +#define SPI_CR1_CPHA_Msk (0x1U << SPI_CR1_CPHA_Pos) +#define SPI_CR1_CPHA SPI_CR1_CPHA_Msk + +#define SPI_CR2_DUMMY_EN_Pos (15U) +#define SPI_CR2_DUMMY_EN_Msk (0x1U << SPI_CR2_DUMMY_EN_Pos) +#define SPI_CR2_DUMMY_EN SPI_CR2_DUMMY_EN_Msk + +#define SPI_CR2_RXO_Pos (11U) +#define SPI_CR2_RXO_Msk (0x1U << SPI_CR2_RXO_Pos) +#define SPI_CR2_RXO SPI_CR2_RXO_Msk + +#define SPI_CR2_DLEN_Pos (9U) +#define SPI_CR2_DLEN_Msk (0x3U << SPI_CR2_DLEN_Pos) +#define SPI_CR2_DLEN SPI_CR2_DLEN_Msk + +#define SPI_CR2_HALFDUPLEX_Pos (8U) +#define SPI_CR2_HALFDUPLEX_Msk (0x1U << SPI_CR2_HALFDUPLEX_Pos) +#define SPI_CR2_HALFDUPLEX SPI_CR2_HALFDUPLEX_Msk + +#define SPI_CR2_HD_RW_Pos (7U) +#define SPI_CR2_HD_RW_Msk (0x1U << SPI_CR2_HD_RW_Pos) +#define SPI_CR2_HD_RW SPI_CR2_HD_RW_Msk + +#define SPI_CR2_CMD8B_Pos (6U) +#define SPI_CR2_CMD8B_Msk (0x1U << SPI_CR2_CMD8B_Pos) +#define SPI_CR2_CMD8B SPI_CR2_CMD8B_Msk + +#define SPI_CR2_SSNM_Pos (5U) +#define SPI_CR2_SSNM_Msk (0x1U << SPI_CR2_SSNM_Pos) +#define SPI_CR2_SSNM SPI_CR2_SSNM_Msk + +#define SPI_CR2_TXO_AC_Pos (4U) +#define SPI_CR2_TXO_AC_Msk (0x1U << SPI_CR2_TXO_AC_Pos) +#define SPI_CR2_TXO_AC SPI_CR2_TXO_AC_Msk + +#define SPI_CR2_TXO_Pos (3U) +#define SPI_CR2_TXO_Msk (0x1U << SPI_CR2_TXO_Pos) +#define SPI_CR2_TXO SPI_CR2_TXO_Msk + +#define SPI_CR2_SSN_Pos (2U) +#define SPI_CR2_SSN_Msk (0x1U << SPI_CR2_SSN_Pos) +#define SPI_CR2_SSN SPI_CR2_SSN_Msk + +#define SPI_CR2_SSNSEN_Pos (1U) +#define SPI_CR2_SSNSEN_Msk (0x1U << SPI_CR2_SSNSEN_Pos) +#define SPI_CR2_SSNSEN SPI_CR2_SSNSEN_Msk + +#define SPI_CR2_SPIEN_Pos (0U) +#define SPI_CR2_SPIEN_Msk (0x1U << SPI_CR2_SPIEN_Pos) +#define SPI_CR2_SPIEN SPI_CR2_SPIEN_Msk + +#define SPI_CR3_TXBFC_Pos (3U) +#define SPI_CR3_TXBFC_Msk (0x1U << SPI_CR3_TXBFC_Pos) +#define SPI_CR3_TXBFC SPI_CR3_TXBFC_Msk + +#define SPI_CR3_RXBFC_Pos (2U) +#define SPI_CR3_RXBFC_Msk (0x1U << SPI_CR3_RXBFC_Pos) +#define SPI_CR3_RXBFC SPI_CR3_RXBFC_Msk + +#define SPI_CR3_MERRC_Pos (1U) +#define SPI_CR3_MERRC_Msk (0x1U << SPI_CR3_MERRC_Pos) +#define SPI_CR3_MERRC SPI_CR3_MERRC_Msk + +#define SPI_CR3_SERRC_Pos (0U) +#define SPI_CR3_SERRC_Msk (0x1U << SPI_CR3_SERRC_Pos) +#define SPI_CR3_SERRC SPI_CR3_SERRC_Msk + +#define SPI_IER_ERRIE_Pos (2U) +#define SPI_IER_ERRIE_Msk (0x1U << SPI_IER_ERRIE_Pos) +#define SPI_IER_ERRIE SPI_IER_ERRIE_Msk + +#define SPI_IER_TXIE_Pos (1U) +#define SPI_IER_TXIE_Msk (0x1U << SPI_IER_TXIE_Pos) +#define SPI_IER_TXIE SPI_IER_TXIE_Msk + +#define SPI_IER_RXIE_Pos (0U) +#define SPI_IER_RXIE_Msk (0x1U << SPI_IER_RXIE_Pos) +#define SPI_IER_RXIE SPI_IER_RXIE_Msk + +#define SPI_ISR_DCN_TX_Pos (12U) +#define SPI_ISR_DCN_TX_Msk (0x1U << SPI_ISR_DCN_TX_Pos) +#define SPI_ISR_DCN_TX SPI_ISR_DCN_TX_Msk + +#define SPI_ISR_RXCOL_Pos (10U) +#define SPI_ISR_RXCOL_Msk (0x1U << SPI_ISR_RXCOL_Pos) +#define SPI_ISR_RXCOL SPI_ISR_RXCOL_Msk + +#define SPI_ISR_TXCOL_Pos (9U) +#define SPI_ISR_TXCOL_Msk (0x1U << SPI_ISR_TXCOL_Pos) +#define SPI_ISR_TXCOL SPI_ISR_TXCOL_Msk + +#define SPI_ISR_BUSY_Pos (8U) +#define SPI_ISR_BUSY_Msk (0x1U << SPI_ISR_BUSY_Pos) +#define SPI_ISR_BUSY SPI_ISR_BUSY_Msk + +#define SPI_ISR_MERR_Pos (6U) +#define SPI_ISR_MERR_Msk (0x1U << SPI_ISR_MERR_Pos) +#define SPI_ISR_MERR SPI_ISR_MERR_Msk + +#define SPI_ISR_SERR_Pos (5U) +#define SPI_ISR_SERR_Msk (0x1U << SPI_ISR_SERR_Pos) +#define SPI_ISR_SERR SPI_ISR_SERR_Msk + +#define SPI_ISR_TXBE_Pos (1U) +#define SPI_ISR_TXBE_Msk (0x1U << SPI_ISR_TXBE_Pos) +#define SPI_ISR_TXBE SPI_ISR_TXBE_Msk + +#define SPI_ISR_RXBF_Pos (0U) +#define SPI_ISR_RXBF_Msk (0x1U << SPI_ISR_RXBF_Pos) +#define SPI_ISR_RXBF SPI_ISR_RXBF_Msk + + + + + + +#define FL_SPI_MASTER_SAMPLING_NORMAL (0x0U << SPI_CR1_MSPA_Pos) +#define FL_SPI_MASTER_SAMPLING_DELAY_HALFCLK (0x1U << SPI_CR1_MSPA_Pos) + + +#define FL_SPI_SLAVE_SAMPLING_NORMAL (0x0U << SPI_CR1_SSPA_Pos) +#define FL_SPI_SLAVE_SAMPLING_ADVANCE_HALFCLK (0x1U << SPI_CR1_SSPA_Pos) + + +#define FL_SPI_WORK_MODE_SLAVE (0x0U << SPI_CR1_MM_Pos) +#define FL_SPI_WORK_MODE_MASTER (0x1U << SPI_CR1_MM_Pos) + + +#define FL_SPI_SEND_WAIT_1 (0x0U << SPI_CR1_WAIT_Pos) +#define FL_SPI_SEND_WAIT_2 (0x1U << SPI_CR1_WAIT_Pos) +#define FL_SPI_SEND_WAIT_3 (0x2U << SPI_CR1_WAIT_Pos) +#define FL_SPI_SEND_WAIT_4 (0x3U << SPI_CR1_WAIT_Pos) + + +#define FL_SPI_CLK_DIV2 (0x0U << SPI_CR1_BAUD_Pos) +#define FL_SPI_CLK_DIV4 (0x1U << SPI_CR1_BAUD_Pos) +#define FL_SPI_CLK_DIV8 (0x2U << SPI_CR1_BAUD_Pos) +#define FL_SPI_CLK_DIV16 (0x3U << SPI_CR1_BAUD_Pos) +#define FL_SPI_CLK_DIV32 (0x4U << SPI_CR1_BAUD_Pos) +#define FL_SPI_CLK_DIV64 (0x5U << SPI_CR1_BAUD_Pos) +#define FL_SPI_CLK_DIV128 (0x6U << SPI_CR1_BAUD_Pos) +#define FL_SPI_CLK_DIV256 (0x7U << SPI_CR1_BAUD_Pos) + +#define FL_SPI_BAUDRATE_DIV2 (0x0U << SPI_CR1_BAUD_Pos) +#define FL_SPI_BAUDRATE_DIV4 (0x1U << SPI_CR1_BAUD_Pos) +#define FL_SPI_BAUDRATE_DIV8 (0x2U << SPI_CR1_BAUD_Pos) +#define FL_SPI_BAUDRATE_DIV16 (0x3U << SPI_CR1_BAUD_Pos) +#define FL_SPI_BAUDRATE_DIV32 (0x4U << SPI_CR1_BAUD_Pos) +#define FL_SPI_BAUDRATE_DIV64 (0x5U << SPI_CR1_BAUD_Pos) +#define FL_SPI_BAUDRATE_DIV128 (0x6U << SPI_CR1_BAUD_Pos) +#define FL_SPI_BAUDRATE_DIV256 (0x7U << SPI_CR1_BAUD_Pos) + +#define FL_SPI_BIT_ORDER_MSB_FIRST (0x0U << SPI_CR1_LSBF_Pos) +#define FL_SPI_BIT_ORDER_LSB_FIRST (0x1U << SPI_CR1_LSBF_Pos) + + +#define FL_SPI_POLARITY_NORMAL (0x0U << SPI_CR1_CPOL_Pos) +#define FL_SPI_POLARITY_INVERT (0x1U << SPI_CR1_CPOL_Pos) + + +#define FL_SPI_PHASE_EDGE1 (0x0U << SPI_CR1_CPHA_Pos) +#define FL_SPI_PHASE_EDGE2 (0x1U << SPI_CR1_CPHA_Pos) + + +#define FL_SPI_DATA_WIDTH_8B (0x0U << SPI_CR2_DLEN_Pos) +#define FL_SPI_DATA_WIDTH_16B (0x1U << SPI_CR2_DLEN_Pos) +#define FL_SPI_DATA_WIDTH_24B (0x2U << SPI_CR2_DLEN_Pos) +#define FL_SPI_DATA_WIDTH_32B (0x3U << SPI_CR2_DLEN_Pos) + + +#define FL_SPI_TRANSFER_MODE_FULL_DUPLEX (0x0U << SPI_CR2_HALFDUPLEX_Pos) +#define FL_SPI_TRANSFER_MODE_HALF_DUPLEX (0x1U << SPI_CR2_HALFDUPLEX_Pos) + + +#define FL_SPI_HALF_DUPLEX_TX (0x0U << SPI_CR2_HD_RW_Pos) +#define FL_SPI_HALF_DUPLEX_RX (0x1U << SPI_CR2_HD_RW_Pos) + + +#define FL_SPI_HALF_DUPLEX_CMDLEN_DLEN (0x0U << SPI_CR2_CMD8B_Pos) +#define FL_SPI_HALF_DUPLEX_CMDLEN_8B (0x1U << SPI_CR2_CMD8B_Pos) + +#define FL_SPI_HALFDUPLEX_CMDLEN_DLEN (0x0U << SPI_CR2_CMD8B_Pos) +#define FL_SPI_HALFDUPLEX_CMDLEN_8B (0x1U << SPI_CR2_CMD8B_Pos) + +#define FL_SPI_HARDWARE_SSN_AUTO_HIGH (0x0U << SPI_CR2_SSNM_Pos) +#define FL_SPI_HARDWARE_SSN_KEEP_LOW (0x1U << SPI_CR2_SSNM_Pos) + + +#define FL_SPI_SSN_LOW (0x0U << SPI_CR2_SSN_Pos) +#define FL_SPI_SSN_HIGH (0x1U << SPI_CR2_SSN_Pos) + + +#define FL_SPI_FRAME_MODE_CMD (0x0U << SPI_ISR_DCN_TX_Pos) +#define FL_SPI_FRAME_MODE_DATA (0x1U << SPI_ISR_DCN_TX_Pos) + + +/** + * @} + */ +/* Exported functions ---------------------------------------------------------------------------------*/ +/** @defgroup SPI_FL_Exported_Functions SPI Exported Functions + * @{ + */ + +/** + * @brief Enable SPI IO Pin Swap + * @rmtoll CR1 IOSWAP FL_SPI_EnablePinSwap + * @param SPIx SPI instance + * @retval None + */ +__STATIC_INLINE void FL_SPI_EnablePinSwap(SPI_Type *SPIx) +{ + SET_BIT(SPIx->CR1, SPI_CR1_IOSWAP_Msk); +} + +/** + * @brief Get SPI IO Pin Swap State + * @rmtoll CR1 IOSWAP FL_SPI_IsEnabledPinSwap + * @param SPIx SPI instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_SPI_IsEnabledPinSwap(SPI_Type *SPIx) +{ + return (uint32_t)(READ_BIT(SPIx->CR1, SPI_CR1_IOSWAP_Msk) == SPI_CR1_IOSWAP_Msk); +} + +/** + * @brief Disable SPI IO Pin Swap + * @rmtoll CR1 IOSWAP FL_SPI_DisablePinSwap + * @param SPIx SPI instance + * @retval None + */ +__STATIC_INLINE void FL_SPI_DisablePinSwap(SPI_Type *SPIx) +{ + CLEAR_BIT(SPIx->CR1, SPI_CR1_IOSWAP_Msk); +} + +/** + * @brief Set Master Sampling Position Adjustment + * @rmtoll CR1 MSPA FL_SPI_SetMasterSamplingAdjust + * @param SPIx SPI instance + * @param adjust This parameter can be one of the following values: + * @arg @ref FL_SPI_MASTER_SAMPLING_NORMAL + * @arg @ref FL_SPI_MASTER_SAMPLING_DELAY_HALFCLK + * @retval None + */ +__STATIC_INLINE void FL_SPI_SetMasterSamplingAdjust(SPI_Type *SPIx, uint32_t adjust) +{ + MODIFY_REG(SPIx->CR1, SPI_CR1_MSPA_Msk, adjust); +} + +/** + * @brief Get Master Sampling Position Adjustment + * @rmtoll CR1 MSPA FL_SPI_GetMasterSamplingAdjust + * @param SPIx SPI instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_SPI_MASTER_SAMPLING_NORMAL + * @arg @ref FL_SPI_MASTER_SAMPLING_DELAY_HALFCLK + */ +__STATIC_INLINE uint32_t FL_SPI_GetMasterSamplingAdjust(SPI_Type *SPIx) +{ + return (uint32_t)(READ_BIT(SPIx->CR1, SPI_CR1_MSPA_Msk)); +} + +/** + * @brief Set Slave Sending Position Adjustment + * @rmtoll CR1 SSPA FL_SPI_SetSlaveSamplingAdjust + * @param SPIx SPI instance + * @param adjust This parameter can be one of the following values: + * @arg @ref FL_SPI_SLAVE_SAMPLING_NORMAL + * @arg @ref FL_SPI_SLAVE_SAMPLING_ADVANCE_HALFCLK + * @retval None + */ +__STATIC_INLINE void FL_SPI_SetSlaveSamplingAdjust(SPI_Type *SPIx, uint32_t adjust) +{ + MODIFY_REG(SPIx->CR1, SPI_CR1_SSPA_Msk, adjust); +} + +/** + * @brief Get Slave Sending Position Adjustment + * @rmtoll CR1 SSPA FL_SPI_GetSlaveSamplingAdjust + * @param SPIx SPI instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_SPI_SLAVE_SAMPLING_NORMAL + * @arg @ref FL_SPI_SLAVE_SAMPLING_ADVANCE_HALFCLK + */ +__STATIC_INLINE uint32_t FL_SPI_GetSlaveSamplingAdjust(SPI_Type *SPIx) +{ + return (uint32_t)(READ_BIT(SPIx->CR1, SPI_CR1_SSPA_Msk)); +} + +/** + * @brief Set SPI Working Mode + * @rmtoll CR1 MM FL_SPI_SetWorkMode + * @param SPIx SPI instance + * @param mode This parameter can be one of the following values: + * @arg @ref FL_SPI_WORK_MODE_SLAVE + * @arg @ref FL_SPI_WORK_MODE_MASTER + * @retval None + */ +__STATIC_INLINE void FL_SPI_SetWorkMode(SPI_Type *SPIx, uint32_t mode) +{ + MODIFY_REG(SPIx->CR1, SPI_CR1_MM_Msk, mode); +} + +/** + * @brief Get SPI Working Mode + * @rmtoll CR1 MM FL_SPI_GetWorkMode + * @param SPIx SPI instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_SPI_WORK_MODE_SLAVE + * @arg @ref FL_SPI_WORK_MODE_MASTER + */ +__STATIC_INLINE uint32_t FL_SPI_GetWorkMode(SPI_Type *SPIx) +{ + return (uint32_t)(READ_BIT(SPIx->CR1, SPI_CR1_MM_Msk)); +} + +/** + * @brief Set SPI Send Wait Cycle Length in Master Mode + * @rmtoll CR1 WAIT FL_SPI_SetSendWait + * @param SPIx SPI instance + * @param wait This parameter can be one of the following values: + * @arg @ref FL_SPI_SEND_WAIT_1 + * @arg @ref FL_SPI_SEND_WAIT_2 + * @arg @ref FL_SPI_SEND_WAIT_3 + * @arg @ref FL_SPI_SEND_WAIT_4 + * @retval None + */ +__STATIC_INLINE void FL_SPI_SetSendWait(SPI_Type *SPIx, uint32_t wait) +{ + MODIFY_REG(SPIx->CR1, SPI_CR1_WAIT_Msk, wait); +} + +/** + * @brief Get SPI Send Wait Cycle Length in Master Mode + * @rmtoll CR1 WAIT FL_SPI_GetSendWait + * @param SPIx SPI instance + * @retval Returned value can be one of the following values: + */ +__STATIC_INLINE uint32_t FL_SPI_GetSendWait(SPI_Type *SPIx) +{ + return (uint32_t)(READ_BIT(SPIx->CR1, SPI_CR1_WAIT_Msk)); +} + +/** + * @brief Set SPI Baudrate in Master Mode + * @rmtoll CR1 BAUD FL_SPI_SetClockDivision + * @param SPIx SPI instance + * @param clock This parameter can be one of the following values: + * @arg @ref FL_SPI_CLK_DIV2 + * @arg @ref FL_SPI_CLK_DIV4 + * @arg @ref FL_SPI_CLK_DIV8 + * @arg @ref FL_SPI_CLK_DIV16 + * @arg @ref FL_SPI_CLK_DIV32 + * @arg @ref FL_SPI_CLK_DIV64 + * @arg @ref FL_SPI_CLK_DIV128 + * @arg @ref FL_SPI_CLK_DIV256 + * @retval None + */ +__STATIC_INLINE void FL_SPI_SetClockDivision(SPI_Type *SPIx, uint32_t clock) +{ + MODIFY_REG(SPIx->CR1, SPI_CR1_BAUD_Msk, clock); +} + +/** + * @brief Get SPI Baudrate in Master Mode + * @rmtoll CR1 BAUD FL_SPI_GetClockDivision + * @param SPIx SPI instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_SPI_BAUDRATE_DIV2 + * @arg @ref FL_SPI_BAUDRATE_DIV4 + * @arg @ref FL_SPI_BAUDRATE_DIV8 + * @arg @ref FL_SPI_BAUDRATE_DIV16 + * @arg @ref FL_SPI_BAUDRATE_DIV32 + * @arg @ref FL_SPI_BAUDRATE_DIV64 + * @arg @ref FL_SPI_BAUDRATE_DIV128 + * @arg @ref FL_SPI_BAUDRATE_DIV256 + */ +__STATIC_INLINE uint32_t FL_SPI_GetClockDivision(SPI_Type *SPIx) +{ + return (uint32_t)(READ_BIT(SPIx->CR1, SPI_CR1_BAUD_Msk)); +} + +/** + * @brief Set SPI Bit Order + * @rmtoll CR1 LSBF FL_SPI_SetBitOrder + * @param SPIx SPI instance + * @param bitOrder This parameter can be one of the following values: + * @arg @ref FL_SPI_BIT_ORDER_MSB_FIRST + * @arg @ref FL_SPI_BIT_ORDER_LSB_FIRST + * @retval None + */ +__STATIC_INLINE void FL_SPI_SetBitOrder(SPI_Type *SPIx, uint32_t bitOrder) +{ + MODIFY_REG(SPIx->CR1, SPI_CR1_LSBF_Msk, bitOrder); +} + +/** + * @brief Get SPI Bit Order + * @rmtoll CR1 LSBF FL_SPI_GetBitOrder + * @param SPIx SPI instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_SPI_BIT_ORDER_MSB_FIRST + * @arg @ref FL_SPI_BIT_ORDER_LSB_FIRST + */ +__STATIC_INLINE uint32_t FL_SPI_GetBitOrder(SPI_Type *SPIx) +{ + return (uint32_t)(READ_BIT(SPIx->CR1, SPI_CR1_LSBF_Msk)); +} + +/** + * @brief Set SPI Clock Polarity + * @rmtoll CR1 CPOL FL_SPI_SetClockPolarity + * @param SPIx SPI instance + * @param polarity This parameter can be one of the following values: + * @arg @ref FL_SPI_POLARITY_NORMAL + * @arg @ref FL_SPI_POLARITY_INVERT + * @retval None + */ +__STATIC_INLINE void FL_SPI_SetClockPolarity(SPI_Type *SPIx, uint32_t polarity) +{ + MODIFY_REG(SPIx->CR1, SPI_CR1_CPOL_Msk, polarity); +} + +/** + * @brief Get SPI Clock Polarity + * @rmtoll CR1 CPOL FL_SPI_GetClockPolarity + * @param SPIx SPI instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_SPI_POLARITY_NORMAL + * @arg @ref FL_SPI_POLARITY_INVERT + */ +__STATIC_INLINE uint32_t FL_SPI_GetClockPolarity(SPI_Type *SPIx) +{ + return (uint32_t)(READ_BIT(SPIx->CR1, SPI_CR1_CPOL_Msk)); +} + +/** + * @brief Set SPI Clock Phase + * @rmtoll CR1 CPHA FL_SPI_SetClockPhase + * @param SPIx SPI instance + * @param phase This parameter can be one of the following values: + * @arg @ref FL_SPI_PHASE_EDGE1 + * @arg @ref FL_SPI_PHASE_EDGE2 + * @retval None + */ +__STATIC_INLINE void FL_SPI_SetClockPhase(SPI_Type *SPIx, uint32_t phase) +{ + MODIFY_REG(SPIx->CR1, SPI_CR1_CPHA_Msk, phase); +} + +/** + * @brief Get SPI Clock Phase + * @rmtoll CR1 CPHA FL_SPI_GetClockPhase + * @param SPIx SPI instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_SPI_PHASE_EDGE1 + * @arg @ref FL_SPI_PHASE_EDGE2 + */ +__STATIC_INLINE uint32_t FL_SPI_GetClockPhase(SPI_Type *SPIx) +{ + return (uint32_t)(READ_BIT(SPIx->CR1, SPI_CR1_CPHA_Msk)); +} + +/** + * @brief Enable SPI Dummy Cycle Setting Under 4-lines Half Duplex Mode + * @rmtoll CR2 DUMMY_EN FL_SPI_EnableDummyCycle + * @param SPIx SPI instance + * @retval None + */ +__STATIC_INLINE void FL_SPI_EnableDummyCycle(SPI_Type *SPIx) +{ + SET_BIT(SPIx->CR2, SPI_CR2_DUMMY_EN_Msk); +} + +/** + * @brief Disable SPI Dummy Cycle Setting Under 4-lines Half Duplex Mode + * @rmtoll CR2 DUMMY_EN FL_SPI_DisableDummyCycle + * @param SPIx SPI instance + * @retval None + */ +__STATIC_INLINE void FL_SPI_DisableDummyCycle(SPI_Type *SPIx) +{ + CLEAR_BIT(SPIx->CR2, SPI_CR2_DUMMY_EN_Msk); +} + +/** + * @brief Get SPI Dummy Cycle Mode Setting + * @rmtoll CR2 DUMMY_EN FL_SPI_IsEnabledDummyCycle + * @param SPIx SPI instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_SPI_IsEnabledDummyCycle(SPI_Type *SPIx) +{ + return (uint32_t)(READ_BIT(SPIx->CR2, SPI_CR2_DUMMY_EN_Msk) == SPI_CR2_DUMMY_EN_Msk); +} + +/** + * @brief Enable SPI Receive Only Mode + * @rmtoll CR2 RXO FL_SPI_EnableRXOnlyMode + * @param SPIx SPI instance + * @retval None + */ +__STATIC_INLINE void FL_SPI_EnableRXOnlyMode(SPI_Type *SPIx) +{ + SET_BIT(SPIx->CR2, SPI_CR2_RXO_Msk); +} + +/** + * @brief Disable SPI Receive Only Mode Setting + * @rmtoll CR2 RXO FL_SPI_DisableRXOnlyMode + * @param SPIx SPI instance + * @retval None + */ +__STATIC_INLINE void FL_SPI_DisableRXOnlyMode(SPI_Type *SPIx) +{ + CLEAR_BIT(SPIx->CR2, SPI_CR2_RXO_Msk); +} + +/** + * @brief Get SPI Receive Only Mode state + * @rmtoll CR2 RXO FL_SPI_IsEnabledRXOnlyMode + * @param SPIx SPI instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_SPI_IsEnabledRXOnlyMode(SPI_Type *SPIx) +{ + return (uint32_t)(READ_BIT(SPIx->CR2, SPI_CR2_RXO_Msk) == SPI_CR2_RXO_Msk); +} + +/** + * @brief Set SPI Data Width + * @rmtoll CR2 DLEN FL_SPI_SetDataWidth + * @param SPIx SPI instance + * @param width This parameter can be one of the following values: + * @arg @ref FL_SPI_DATA_WIDTH_8B + * @arg @ref FL_SPI_DATA_WIDTH_16B + * @arg @ref FL_SPI_DATA_WIDTH_24B + * @arg @ref FL_SPI_DATA_WIDTH_32B + * @retval None + */ +__STATIC_INLINE void FL_SPI_SetDataWidth(SPI_Type *SPIx, uint32_t width) +{ + MODIFY_REG(SPIx->CR2, SPI_CR2_DLEN_Msk, width); +} + +/** + * @brief Get SPI Data Width + * @rmtoll CR2 DLEN FL_SPI_GetDataWidth + * @param SPIx SPI instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_SPI_DATA_WIDTH_8B + * @arg @ref FL_SPI_DATA_WIDTH_16B + * @arg @ref FL_SPI_DATA_WIDTH_24B + * @arg @ref FL_SPI_DATA_WIDTH_32B + */ +__STATIC_INLINE uint32_t FL_SPI_GetDataWidth(SPI_Type *SPIx) +{ + return (uint32_t)(READ_BIT(SPIx->CR2, SPI_CR2_DLEN_Msk)); +} + +/** + * @brief Set SPI Transfer Mode + * @rmtoll CR2 HALFDUPLEX FL_SPI_SetTransferMode + * @param SPIx SPI instance + * @param mode This parameter can be one of the following values: + * @arg @ref FL_SPI_TRANSFER_MODE_FULL_DUPLEX + * @arg @ref FL_SPI_TRANSFER_MODE_HALF_DUPLEX + * @retval None + */ +__STATIC_INLINE void FL_SPI_SetTransferMode(SPI_Type *SPIx, uint32_t mode) +{ + MODIFY_REG(SPIx->CR2, SPI_CR2_HALFDUPLEX_Msk, mode); +} + +/** + * @brief Get SPI Transfer Mode + * @rmtoll CR2 HALFDUPLEX FL_SPI_GetTransferMode + * @param SPIx SPI instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_SPI_TRANSFER_MODE_FULL_DUPLEX + * @arg @ref FL_SPI_TRANSFER_MODE_HALF_DUPLEX + */ +__STATIC_INLINE uint32_t FL_SPI_GetTransferMode(SPI_Type *SPIx) +{ + return (uint32_t)(READ_BIT(SPIx->CR2, SPI_CR2_HALFDUPLEX_Msk)); +} + +/** + * @brief Set SPI Transfer Direction Under Half-Duplex Mode + * @rmtoll CR2 HD_RW FL_SPI_SetTransferDirection + * @param SPIx SPI instance + * @param direction This parameter can be one of the following values: + * @arg @ref FL_SPI_HALF_DUPLEX_TX + * @arg @ref FL_SPI_HALF_DUPLEX_RX + * @retval None + */ +__STATIC_INLINE void FL_SPI_SetTransferDirection(SPI_Type *SPIx, uint32_t direction) +{ + MODIFY_REG(SPIx->CR2, SPI_CR2_HD_RW_Msk, direction); +} + +/** + * @brief Get SPI Transfer Direction Under Half-Duplex Mode + * @rmtoll CR2 HD_RW FL_SPI_GetTransferDirection + * @param SPIx SPI instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_SPI_HALF_DUPLEX_TX + * @arg @ref FL_SPI_HALF_DUPLEX_RX + */ +__STATIC_INLINE uint32_t FL_SPI_GetTransferDirection(SPI_Type *SPIx) +{ + return (uint32_t)(READ_BIT(SPIx->CR2, SPI_CR2_HD_RW_Msk)); +} + +/** + * @brief Set Command Frame Length Under Half-Duplex Mode + * @rmtoll CR2 CMD8B FL_SPI_SetHalfDuplexCommandLength + * @param SPIx SPI instance + * @param mode This parameter can be one of the following values: + * @arg @ref FL_SPI_HALF_DUPLEX_CMDLEN_DLEN + * @arg @ref FL_SPI_HALF_DUPLEX_CMDLEN_8B + * @retval None + */ +__STATIC_INLINE void FL_SPI_SetHalfDuplexCommandLength(SPI_Type *SPIx, uint32_t mode) +{ + MODIFY_REG(SPIx->CR2, SPI_CR2_CMD8B_Msk, mode); +} + +/** + * @brief Get Command Frame Length Under Half-Duplex Mode + * @rmtoll CR2 CMD8B FL_SPI_GetHalfDuplexCommandLength + * @param SPIx SPI instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_SPI_HALFDUPLEX_CMDLEN_DLEN + * @arg @ref FL_SPI_HALFDUPLEX_CMDLEN_8B + */ +__STATIC_INLINE uint32_t FL_SPI_GetHalfDuplexCommandLength(SPI_Type *SPIx) +{ + return (uint32_t)(READ_BIT(SPIx->CR2, SPI_CR2_CMD8B_Msk)); +} + +/** + * @brief Set SPI SSN Hard Pin Mode + * @rmtoll CR2 SSNM FL_SPI_SetHardwareSSNMode + * @param SPIx SPI instance + * @param mode This parameter can be one of the following values: + * @arg @ref FL_SPI_HARDWARE_SSN_AUTO_HIGH + * @arg @ref FL_SPI_HARDWARE_SSN_KEEP_LOW + * @retval None + */ +__STATIC_INLINE void FL_SPI_SetHardwareSSNMode(SPI_Type *SPIx, uint32_t mode) +{ + MODIFY_REG(SPIx->CR2, SPI_CR2_SSNM_Msk, mode); +} + +/** + * @brief Get SPI SSN Hard Pin Mode + * @rmtoll CR2 SSNM FL_SPI_GetHardwareSSNMode + * @param SPIx SPI instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_SPI_HARDWARE_SSN_AUTO_HIGH + * @arg @ref FL_SPI_HARDWARE_SSN_KEEP_LOW + */ +__STATIC_INLINE uint32_t FL_SPI_GetHardwareSSNMode(SPI_Type *SPIx) +{ + return (uint32_t)(READ_BIT(SPIx->CR2, SPI_CR2_SSNM_Msk)); +} + +/** + * @brief Enabel TX Only Mode Auto Disable + * @rmtoll CR2 TXO_AC FL_SPI_EnableTXOnlyModeAutoDisable + * @param SPIx SPI instance + * @retval None + */ +__STATIC_INLINE void FL_SPI_EnableTXOnlyModeAutoDisable(SPI_Type *SPIx) +{ + SET_BIT(SPIx->CR2, SPI_CR2_TXO_AC_Msk); +} + +/** + * @brief Disable TX Only Mode Auto Disable + * @rmtoll CR2 TXO_AC FL_SPI_DisableTXOnlyModeAutoDisable + * @param SPIx SPI instance + * @retval None + */ +__STATIC_INLINE void FL_SPI_DisableTXOnlyModeAutoDisable(SPI_Type *SPIx) +{ + CLEAR_BIT(SPIx->CR2, SPI_CR2_TXO_AC_Msk); +} + +/** + * @brief Get TX Only Mode Auto Disable Setting + * @rmtoll CR2 TXO_AC FL_SPI_IsEnabledTXOnlyModeAutoDisable + * @param SPIx SPI instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_SPI_IsEnabledTXOnlyModeAutoDisable(SPI_Type *SPIx) +{ + return (uint32_t)(READ_BIT(SPIx->CR2, SPI_CR2_TXO_AC_Msk) == SPI_CR2_TXO_AC_Msk); +} + +/** + * @brief EnableSPI TX Only Mode + * @rmtoll CR2 TXO FL_SPI_EnableTXOnlyMode + * @param SPIx SPI instance + * @retval None + */ +__STATIC_INLINE void FL_SPI_EnableTXOnlyMode(SPI_Type *SPIx) +{ + SET_BIT(SPIx->CR2, SPI_CR2_TXO_Msk); +} + +/** + * @brief Get SPI TX Only Mode Setting State + * @rmtoll CR2 TXO FL_SPI_IsEnabledTXOnlyMode + * @param SPIx SPI instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_SPI_IsEnabledTXOnlyMode(SPI_Type *SPIx) +{ + return (uint32_t)(READ_BIT(SPIx->CR2, SPI_CR2_TXO_Msk) == SPI_CR2_TXO_Msk); +} + +/** + * @brief Set SSN Pin + * @rmtoll CR2 SSN FL_SPI_SetSSNPin + * @param SPIx SPI instance + * @param state This parameter can be one of the following values: + * @arg @ref FL_SPI_SSN_LOW + * @arg @ref FL_SPI_SSN_HIGH + * @retval None + */ +__STATIC_INLINE void FL_SPI_SetSSNPin(SPI_Type *SPIx, uint32_t state) +{ + MODIFY_REG(SPIx->CR2, SPI_CR2_SSN_Msk, state); +} + +/** + * @brief Reset SSN Pin + * @rmtoll CR2 SSN FL_SPI_GetSSNPin + * @param SPIx SPI instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_SPI_SSN_LOW + * @arg @ref FL_SPI_SSN_HIGH + */ +__STATIC_INLINE uint32_t FL_SPI_GetSSNPin(SPI_Type *SPIx) +{ + return (uint32_t)(READ_BIT(SPIx->CR2, SPI_CR2_SSN_Msk)); +} + +/** + * @brief Enable SNN Sofe Control Under Master Mode + * @rmtoll CR2 SSNSEN FL_SPI_EnableSSNSoftControl + * @param SPIx SPI instance + * @retval None + */ +__STATIC_INLINE void FL_SPI_EnableSSNSoftControl(SPI_Type *SPIx) +{ + SET_BIT(SPIx->CR2, SPI_CR2_SSNSEN_Msk); +} + +/** + * @brief Get SNN Sofe Control State Under Master Mode + * @rmtoll CR2 SSNSEN FL_SPI_IsEnabledSSNSoftControl + * @param SPIx SPI instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_SPI_IsEnabledSSNSoftControl(SPI_Type *SPIx) +{ + return (uint32_t)(READ_BIT(SPIx->CR2, SPI_CR2_SSNSEN_Msk) == SPI_CR2_SSNSEN_Msk); +} + +/** + * @brief Disable SNN Sofe Control Under Master Mode + * @rmtoll CR2 SSNSEN FL_SPI_DisableSSNSoftControl + * @param SPIx SPI instance + * @retval None + */ +__STATIC_INLINE void FL_SPI_DisableSSNSoftControl(SPI_Type *SPIx) +{ + CLEAR_BIT(SPIx->CR2, SPI_CR2_SSNSEN_Msk); +} + +/** + * @brief Enable SPI + * @rmtoll CR2 SPIEN FL_SPI_Enable + * @param SPIx SPI instance + * @retval None + */ +__STATIC_INLINE void FL_SPI_Enable(SPI_Type *SPIx) +{ + SET_BIT(SPIx->CR2, SPI_CR2_SPIEN_Msk); +} + +/** + * @brief Get SPI Enable Status + * @rmtoll CR2 SPIEN FL_SPI_IsEnabled + * @param SPIx SPI instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_SPI_IsEnabled(SPI_Type *SPIx) +{ + return (uint32_t)(READ_BIT(SPIx->CR2, SPI_CR2_SPIEN_Msk) == SPI_CR2_SPIEN_Msk); +} + +/** + * @brief Disable SPI + * @rmtoll CR2 SPIEN FL_SPI_Disable + * @param SPIx SPI instance + * @retval None + */ +__STATIC_INLINE void FL_SPI_Disable(SPI_Type *SPIx) +{ + CLEAR_BIT(SPIx->CR2, SPI_CR2_SPIEN_Msk); +} + +/** + * @brief Clear SPI TX Buffer + * @rmtoll CR3 TXBFC FL_SPI_ClearTXBuff + * @param SPIx SPI instance + * @retval None + */ +__STATIC_INLINE void FL_SPI_ClearTXBuff(SPI_Type *SPIx) +{ + WRITE_REG(SPIx->CR3, SPI_CR3_TXBFC_Msk); +} + +/** + * @brief Clear SPI RX Buffer + * @rmtoll CR3 RXBFC FL_SPI_ClearRXBuff + * @param SPIx SPI instance + * @retval None + */ +__STATIC_INLINE void FL_SPI_ClearRXBuff(SPI_Type *SPIx) +{ + WRITE_REG(SPIx->CR3, SPI_CR3_RXBFC_Msk); +} + +/** + * @brief Clear SPI Master Error Flag + * @rmtoll CR3 MERRC FL_SPI_ClearFlag_MasterError + * @param SPIx SPI instance + * @retval None + */ +__STATIC_INLINE void FL_SPI_ClearFlag_MasterError(SPI_Type *SPIx) +{ + WRITE_REG(SPIx->CR3, SPI_CR3_MERRC_Msk); +} + +/** + * @brief Clear SPI Slave Error Flag + * @rmtoll CR3 SERRC FL_SPI_ClearFlag_SlaveError + * @param SPIx SPI instance + * @retval None + */ +__STATIC_INLINE void FL_SPI_ClearFlag_SlaveError(SPI_Type *SPIx) +{ + WRITE_REG(SPIx->CR3, SPI_CR3_SERRC_Msk); +} + +/** + * @brief Disable SPI Error Interrupt + * @rmtoll IER ERRIE FL_SPI_DisableIT_Error + * @param SPIx SPI instance + * @retval None + */ +__STATIC_INLINE void FL_SPI_DisableIT_Error(SPI_Type *SPIx) +{ + CLEAR_BIT(SPIx->IER, SPI_IER_ERRIE_Msk); +} + +/** + * @brief Enable SPI Error Interrupt + * @rmtoll IER ERRIE FL_SPI_EnableIT_Error + * @param SPIx SPI instance + * @retval None + */ +__STATIC_INLINE void FL_SPI_EnableIT_Error(SPI_Type *SPIx) +{ + SET_BIT(SPIx->IER, SPI_IER_ERRIE_Msk); +} + +/** + * @brief Get SPI Error Interrupt Enable Status + * @rmtoll IER ERRIE FL_SPI_IsEnabledIT_Error + * @param SPIx SPI instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_SPI_IsEnabledIT_Error(SPI_Type *SPIx) +{ + return (uint32_t)(READ_BIT(SPIx->IER, SPI_IER_ERRIE_Msk) == SPI_IER_ERRIE_Msk); +} + +/** + * @brief Disable SPI Transmit Complete Interrupt + * @rmtoll IER TXIE FL_SPI_DisableIT_TXComplete + * @param SPIx SPI instance + * @retval None + */ +__STATIC_INLINE void FL_SPI_DisableIT_TXComplete(SPI_Type *SPIx) +{ + CLEAR_BIT(SPIx->IER, SPI_IER_TXIE_Msk); +} + +/** + * @brief Enable SPI Transmit Complete Interrupt + * @rmtoll IER TXIE FL_SPI_EnableIT_TXComplete + * @param SPIx SPI instance + * @retval None + */ +__STATIC_INLINE void FL_SPI_EnableIT_TXComplete(SPI_Type *SPIx) +{ + SET_BIT(SPIx->IER, SPI_IER_TXIE_Msk); +} + +/** + * @brief Get SPI Transmit Complete Interrupt Enable Status + * @rmtoll IER TXIE FL_SPI_IsEnabledIT_TXComplete + * @param SPIx SPI instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_SPI_IsEnabledIT_TXComplete(SPI_Type *SPIx) +{ + return (uint32_t)(READ_BIT(SPIx->IER, SPI_IER_TXIE_Msk) == SPI_IER_TXIE_Msk); +} + +/** + * @brief Disable SPI Receive Complete Interrupt + * @rmtoll IER RXIE FL_SPI_DisableIT_RXComplete + * @param SPIx SPI instance + * @retval None + */ +__STATIC_INLINE void FL_SPI_DisableIT_RXComplete(SPI_Type *SPIx) +{ + CLEAR_BIT(SPIx->IER, SPI_IER_RXIE_Msk); +} + +/** + * @brief Enable SPI Receive Complete Interrupt + * @rmtoll IER RXIE FL_SPI_EnableIT_RXComplete + * @param SPIx SPI instance + * @retval None + */ +__STATIC_INLINE void FL_SPI_EnableIT_RXComplete(SPI_Type *SPIx) +{ + SET_BIT(SPIx->IER, SPI_IER_RXIE_Msk); +} + +/** + * @brief Get SPI Receive Complete Interrupt Enable Status + * @rmtoll IER RXIE FL_SPI_IsEnabledIT_RXComplete + * @param SPIx SPI instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_SPI_IsEnabledIT_RXComplete(SPI_Type *SPIx) +{ + return (uint32_t)(READ_BIT(SPIx->IER, SPI_IER_RXIE_Msk) == SPI_IER_RXIE_Msk); +} + +/** + * @brief Set SPI Output Data/Command Under Half-Duplex Mode + * @rmtoll ISR DCN_TX FL_SPI_SetFrameMode + * @param SPIx SPI instance + * @param mode This parameter can be one of the following values: + * @arg @ref FL_SPI_FRAME_MODE_CMD + * @arg @ref FL_SPI_FRAME_MODE_DATA + * @retval None + */ +__STATIC_INLINE void FL_SPI_SetFrameMode(SPI_Type *SPIx, uint32_t mode) +{ + MODIFY_REG(SPIx->ISR, SPI_ISR_DCN_TX_Msk, mode); +} + +/** + * @brief Get SPI Output Data/Command Under Half-Duplex Mode Setting + * @rmtoll ISR DCN_TX FL_SPI_GetFrameMode + * @param SPIx SPI instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_SPI_FRAME_MODE_CMD + * @arg @ref FL_SPI_FRAME_MODE_DATA + */ +__STATIC_INLINE uint32_t FL_SPI_GetFrameMode(SPI_Type *SPIx) +{ + return (uint32_t)(READ_BIT(SPIx->ISR, SPI_ISR_DCN_TX_Msk)); +} + +/** + * @brief Get SPI Receive Collision Flag + * @rmtoll ISR RXCOL FL_SPI_IsActiveFlag_RXBuffOverflow + * @param SPIx SPI instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_SPI_IsActiveFlag_RXBuffOverflow(SPI_Type *SPIx) +{ + return (uint32_t)(READ_BIT(SPIx->ISR, SPI_ISR_RXCOL_Msk) == (SPI_ISR_RXCOL_Msk)); +} + +/** + * @brief Clear SPI Receive Collision Flag + * @rmtoll ISR RXCOL FL_SPI_ClearFlag_RXBuffOverflow + * @param SPIx SPI instance + * @retval None + */ +__STATIC_INLINE void FL_SPI_ClearFlag_RXBuffOverflow(SPI_Type *SPIx) +{ + WRITE_REG(SPIx->ISR, SPI_ISR_RXCOL_Msk); +} + +/** + * @brief Get SPI Transmit Collision Flag + * @rmtoll ISR TXCOL FL_SPI_IsActiveFlag_TXBuffOverflow + * @param SPIx SPI instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_SPI_IsActiveFlag_TXBuffOverflow(SPI_Type *SPIx) +{ + return (uint32_t)(READ_BIT(SPIx->ISR, SPI_ISR_TXCOL_Msk) == (SPI_ISR_TXCOL_Msk)); +} + +/** + * @brief Clear SPI Transmit Collision Flag + * @rmtoll ISR TXCOL FL_SPI_ClearFlag_TXBuffOverflow + * @param SPIx SPI instance + * @retval None + */ +__STATIC_INLINE void FL_SPI_ClearFlag_TXBuffOverflow(SPI_Type *SPIx) +{ + WRITE_REG(SPIx->ISR, SPI_ISR_TXCOL_Msk); +} + +/** + * @brief Get SPI Busy Flag + * @rmtoll ISR BUSY FL_SPI_IsActiveFlag_Busy + * @param SPIx SPI instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_SPI_IsActiveFlag_Busy(SPI_Type *SPIx) +{ + return (uint32_t)(READ_BIT(SPIx->ISR, SPI_ISR_BUSY_Msk) == (SPI_ISR_BUSY_Msk)); +} + +/** + * @brief Get SPI Master Error Flag + * @rmtoll ISR MERR FL_SPI_IsActiveFlag_MasterError + * @param SPIx SPI instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_SPI_IsActiveFlag_MasterError(SPI_Type *SPIx) +{ + return (uint32_t)(READ_BIT(SPIx->ISR, SPI_ISR_MERR_Msk) == (SPI_ISR_MERR_Msk)); +} + +/** + * @brief Get SPI Slave Error Flag + * @rmtoll ISR SERR FL_SPI_IsActiveFlag_SlaveError + * @param SPIx SPI instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_SPI_IsActiveFlag_SlaveError(SPI_Type *SPIx) +{ + return (uint32_t)(READ_BIT(SPIx->ISR, SPI_ISR_SERR_Msk) == (SPI_ISR_SERR_Msk)); +} + +/** + * @brief Get SPI TX Buffer Empty Flag + * @rmtoll ISR TXBE FL_SPI_IsActiveFlag_TXBuffEmpty + * @param SPIx SPI instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_SPI_IsActiveFlag_TXBuffEmpty(SPI_Type *SPIx) +{ + return (uint32_t)(READ_BIT(SPIx->ISR, SPI_ISR_TXBE_Msk) == (SPI_ISR_TXBE_Msk)); +} + +/** + * @brief Get SPI RX Buffer Full Flag + * @rmtoll ISR RXBF FL_SPI_IsActiveFlag_RXBuffFull + * @param SPIx SPI instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_SPI_IsActiveFlag_RXBuffFull(SPI_Type *SPIx) +{ + return (uint32_t)(READ_BIT(SPIx->ISR, SPI_ISR_RXBF_Msk) == (SPI_ISR_RXBF_Msk)); +} + +/** + * @brief Write SPI TX Buffer + * @rmtoll TXBUF FL_SPI_WriteTXBuff + * @param SPIx SPI instance + * @param data + * @retval None + */ +__STATIC_INLINE void FL_SPI_WriteTXBuff(SPI_Type *SPIx, uint32_t data) +{ + MODIFY_REG(SPIx->TXBUF, (0xffffffffU << 0U), (data << 0U)); +} + +/** + * @brief Read SPI TX Buffer + * @rmtoll RXBUF FL_SPI_ReadRXBuff + * @param SPIx SPI instance + * @retval + */ +__STATIC_INLINE uint32_t FL_SPI_ReadRXBuff(SPI_Type *SPIx) +{ + return (uint32_t)(READ_BIT(SPIx->RXBUF, (0xffffffffU << 0U)) >> 0U); +} + +/** + * @} + */ + +/** @defgroup SPI_FL_EF_Init Initialization and de-initialization functions + * @{ + */ +FL_ErrorStatus FL_SPI_DeInit(SPI_Type *SPIx); +FL_ErrorStatus FL_SPI_Init(SPI_Type *SPIx, FL_SPI_InitTypeDef *initStruct); +void FL_SPI_StructInit(FL_SPI_InitTypeDef *initStruct); + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif /* __FM33LG0XX_FL_SPI_H*/ + +/*************************Py_Code_Generator Version: 0.1-0.14-0.1 @ 2020-10-20*************************/ +/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/ diff --git a/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_svd.h b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_svd.h new file mode 100644 index 0000000..b10fd7d --- /dev/null +++ b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_svd.h @@ -0,0 +1,631 @@ + /** + ******************************************************************************************************* + * @file fm33lg0xx_fl_svd.h + * @author FMSH Application Team + * @brief Head file of SVD FL Module + ******************************************************************************************************* + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + + + +/* Define to prevent recursive inclusion---------------------------------------------------------------*/ +#ifndef __FM33LG0XX_FL_SVD_H +#define __FM33LG0XX_FL_SVD_H + +#ifdef __cplusplus +extern "C" { +#endif +/* Includes -------------------------------------------------------------------------------------------*/ +#include "fm33lg0xx_fl_def.h" +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @defgroup SVD SVD + * @brief SVD FL driver + * @{ + */ + +/* Exported types -------------------------------------------------------------------------------------*/ +/** @defgroup SVD_FL_ES_INIT SVD Exported Init structures + * @{ + */ + +/** + * @brief FL SVD Init Sturcture definition + */ + +typedef struct +{ + /* 参考电压 */ + uint32_t referenceVoltage; + + /* 报警阈值 */ + uint32_t warningThreshold; + + /* 数字滤波 */ + uint32_t digitalFilter; + + /* 工作模式 */ + uint32_t workMode; + + /* 间歇使能间隔 */ + uint32_t enablePeriod; + + /* SVS通道选择 */ + uint32_t SVSChannel; + +} FL_SVD_InitTypeDef; + +/** + * @} + */ +/* Exported constants ---------------------------------------------------------------------------------*/ +/** @defgroup SVD_FL_Exported_Constants SVD Exported Constants + * @{ + */ + +#define SVD_CFGR_LVL_Pos (4U) +#define SVD_CFGR_LVL_Msk (0xfU << SVD_CFGR_LVL_Pos) +#define SVD_CFGR_LVL SVD_CFGR_LVL_Msk + +#define SVD_CFGR_DFEN_Pos (3U) +#define SVD_CFGR_DFEN_Msk (0x1U << SVD_CFGR_DFEN_Pos) +#define SVD_CFGR_DFEN SVD_CFGR_DFEN_Msk + +#define SVD_CFGR_MOD_Pos (2U) +#define SVD_CFGR_MOD_Msk (0x1U << SVD_CFGR_MOD_Pos) +#define SVD_CFGR_MOD SVD_CFGR_MOD_Msk + +#define SVD_CFGR_ITVL_Pos (0U) +#define SVD_CFGR_ITVL_Msk (0x3U << SVD_CFGR_ITVL_Pos) +#define SVD_CFGR_ITVL SVD_CFGR_ITVL_Msk + +#define SVD_CR_SVS0EN_Pos (1U) +#define SVD_CR_SVS0EN_Msk (0x1U << SVD_CR_SVS0EN_Pos) +#define SVD_CR_SVS0EN SVD_CR_SVS0EN_Msk + +#define SVD_CR_EN_Pos (0U) +#define SVD_CR_EN_Msk (0x1U << SVD_CR_EN_Pos) +#define SVD_CR_EN SVD_CR_EN_Msk + +#define SVD_IER_PFIE_Pos (1U) +#define SVD_IER_PFIE_Msk (0x1U << SVD_IER_PFIE_Pos) +#define SVD_IER_PFIE SVD_IER_PFIE_Msk + +#define SVD_IER_PRIE_Pos (0U) +#define SVD_IER_PRIE_Msk (0x1U << SVD_IER_PRIE_Pos) +#define SVD_IER_PRIE SVD_IER_PRIE_Msk + +#define SVD_ISR_SVDO_Pos (8U) +#define SVD_ISR_SVDO_Msk (0x1U << SVD_ISR_SVDO_Pos) +#define SVD_ISR_SVDO SVD_ISR_SVDO_Msk + +#define SVD_ISR_SVDR_Pos (7U) +#define SVD_ISR_SVDR_Msk (0x1U << SVD_ISR_SVDR_Pos) +#define SVD_ISR_SVDR SVD_ISR_SVDR_Msk + +#define SVD_ISR_PFF_Pos (1U) +#define SVD_ISR_PFF_Msk (0x1U << SVD_ISR_PFF_Pos) +#define SVD_ISR_PFF SVD_ISR_PFF_Msk + +#define SVD_ISR_PRF_Pos (0U) +#define SVD_ISR_PRF_Msk (0x1U << SVD_ISR_PRF_Pos) +#define SVD_ISR_PRF SVD_ISR_PRF_Msk + +#define SVD_VSR_EN_Pos (0U) +#define SVD_VSR_EN_Msk (0x7U << SVD_VSR_EN_Pos) +#define SVD_VSR_EN SVD_VSR_EN_Msk + + + +#define FL_SVD_REFERENCE_1P0V (0x1U << 2U) +#define FL_SVD_REFERENCE_0P95V (0x1U << 1U) +#define FL_SVD_REFERENCE_0P9V (0x1U << 0U) + + + +#define FL_SVD_WARNING_THRESHOLD_GROUP0 (0x0U << SVD_CFGR_LVL_Pos) +#define FL_SVD_WARNING_THRESHOLD_GROUP1 (0x1U << SVD_CFGR_LVL_Pos) +#define FL_SVD_WARNING_THRESHOLD_GROUP2 (0x2U << SVD_CFGR_LVL_Pos) +#define FL_SVD_WARNING_THRESHOLD_GROUP3 (0x3U << SVD_CFGR_LVL_Pos) +#define FL_SVD_WARNING_THRESHOLD_GROUP4 (0x4U << SVD_CFGR_LVL_Pos) +#define FL_SVD_WARNING_THRESHOLD_GROUP5 (0x5U << SVD_CFGR_LVL_Pos) +#define FL_SVD_WARNING_THRESHOLD_GROUP6 (0x6U << SVD_CFGR_LVL_Pos) +#define FL_SVD_WARNING_THRESHOLD_GROUP7 (0x7U << SVD_CFGR_LVL_Pos) +#define FL_SVD_WARNING_THRESHOLD_GROUP8 (0x8U << SVD_CFGR_LVL_Pos) +#define FL_SVD_WARNING_THRESHOLD_GROUP9 (0x9U << SVD_CFGR_LVL_Pos) +#define FL_SVD_WARNING_THRESHOLD_GROUP10 (0xaU << SVD_CFGR_LVL_Pos) +#define FL_SVD_WARNING_THRESHOLD_GROUP11 (0xbU << SVD_CFGR_LVL_Pos) +#define FL_SVD_WARNING_THRESHOLD_GROUP12 (0xcU << SVD_CFGR_LVL_Pos) +#define FL_SVD_WARNING_THRESHOLD_GROUP13 (0xdU << SVD_CFGR_LVL_Pos) +#define FL_SVD_WARNING_THRESHOLD_GROUP14 (0xeU << SVD_CFGR_LVL_Pos) +#define FL_SVD_WARNING_THRESHOLD_GROUP15 (0xfU << SVD_CFGR_LVL_Pos) + + +#define FL_SVD_WORK_MODE_CONTINUOUS (0x0U << SVD_CFGR_MOD_Pos) +#define FL_SVD_WORK_MODE_PERIODIC (0x1U << SVD_CFGR_MOD_Pos) + + +#define FL_SVD_ENABLE_PERIOD_62P5MS (0x0U << SVD_CFGR_ITVL_Pos) +#define FL_SVD_ENABLE_PERIOD_256MS (0x1U << SVD_CFGR_ITVL_Pos) +#define FL_SVD_ENABLE_PERIOD_1000MS (0x2U << SVD_CFGR_ITVL_Pos) +#define FL_SVD_ENABLE_PERIOD_4000MS (0x3U << SVD_CFGR_ITVL_Pos) + + +#define FL_SVD_POWER_STATUS_FALLING (0x0U << SVD_ISR_SVDO_Pos) +#define FL_SVD_POWER_STATUS_RISING (0x1U << SVD_ISR_SVDO_Pos) + +#define FL_SVD_LATCHED_POWER_STATUS_FALLING (0x0U << SVD_ISR_SVDR_Pos) +#define FL_SVD_LATCHED_POWER_STATUS_RISING (0x1U << SVD_ISR_SVDR_Pos) + +/** + * @} + */ +/* Exported functions ---------------------------------------------------------------------------------*/ +/** @defgroup SVD_FL_Exported_Functions SVD Exported Functions + * @{ + */ + +/** + * @brief Set SVD Threshold Warning Level + * @rmtoll CFGR LVL FL_SVD_SetWarningThreshold + * @param SVDx SVD instance + * @param level This parameter can be one of the following values: + * @arg @ref FL_SVD_WARNING_THRESHOLD_GROUP0 + * @arg @ref FL_SVD_WARNING_THRESHOLD_GROUP1 + * @arg @ref FL_SVD_WARNING_THRESHOLD_GROUP2 + * @arg @ref FL_SVD_WARNING_THRESHOLD_GROUP3 + * @arg @ref FL_SVD_WARNING_THRESHOLD_GROUP4 + * @arg @ref FL_SVD_WARNING_THRESHOLD_GROUP5 + * @arg @ref FL_SVD_WARNING_THRESHOLD_GROUP6 + * @arg @ref FL_SVD_WARNING_THRESHOLD_GROUP7 + * @arg @ref FL_SVD_WARNING_THRESHOLD_GROUP8 + * @arg @ref FL_SVD_WARNING_THRESHOLD_GROUP9 + * @arg @ref FL_SVD_WARNING_THRESHOLD_GROUP10 + * @arg @ref FL_SVD_WARNING_THRESHOLD_GROUP11 + * @arg @ref FL_SVD_WARNING_THRESHOLD_GROUP12 + * @arg @ref FL_SVD_WARNING_THRESHOLD_GROUP13 + * @arg @ref FL_SVD_WARNING_THRESHOLD_GROUP14 + * @arg @ref FL_SVD_WARNING_THRESHOLD_GROUP15 + * @retval None + */ +__STATIC_INLINE void FL_SVD_SetWarningThreshold(SVD_Type *SVDx, uint32_t level) +{ + MODIFY_REG(SVDx->CFGR, SVD_CFGR_LVL_Msk, level); +} + +/** + * @brief Get SVD Warning Threshold Level + * @rmtoll CFGR LVL FL_SVD_GetWarningThreshold + * @param SVDx SVD instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_SVD_WARNING_THRESHOLD_GROUP0 + * @arg @ref FL_SVD_WARNING_THRESHOLD_GROUP1 + * @arg @ref FL_SVD_WARNING_THRESHOLD_GROUP2 + * @arg @ref FL_SVD_WARNING_THRESHOLD_GROUP3 + * @arg @ref FL_SVD_WARNING_THRESHOLD_GROUP4 + * @arg @ref FL_SVD_WARNING_THRESHOLD_GROUP5 + * @arg @ref FL_SVD_WARNING_THRESHOLD_GROUP6 + * @arg @ref FL_SVD_WARNING_THRESHOLD_GROUP7 + * @arg @ref FL_SVD_WARNING_THRESHOLD_GROUP8 + * @arg @ref FL_SVD_WARNING_THRESHOLD_GROUP9 + * @arg @ref FL_SVD_WARNING_THRESHOLD_GROUP10 + * @arg @ref FL_SVD_WARNING_THRESHOLD_GROUP11 + * @arg @ref FL_SVD_WARNING_THRESHOLD_GROUP12 + * @arg @ref FL_SVD_WARNING_THRESHOLD_GROUP13 + * @arg @ref FL_SVD_WARNING_THRESHOLD_GROUP14 + * @arg @ref FL_SVD_WARNING_THRESHOLD_GROUP15 + */ +__STATIC_INLINE uint32_t FL_SVD_GetWarningThreshold(SVD_Type *SVDx) +{ + return (uint32_t)(READ_BIT(SVDx->CFGR, SVD_CFGR_LVL_Msk)); +} + +/** + * @brief Enable SVD Digital Filter + * @rmtoll CFGR DFEN FL_SVD_EnableDigitalFilter + * @param SVDx SVD instance + * @retval None + */ +__STATIC_INLINE void FL_SVD_EnableDigitalFilter(SVD_Type *SVDx) +{ + SET_BIT(SVDx->CFGR, SVD_CFGR_DFEN_Msk); +} + +/** + * @brief Get SVD Digital Filter Enable Status + * @rmtoll CFGR DFEN FL_SVD_IsEnabledDigitalFilter + * @param SVDx SVD instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_SVD_IsEnabledDigitalFilter(SVD_Type *SVDx) +{ + return (uint32_t)(READ_BIT(SVDx->CFGR, SVD_CFGR_DFEN_Msk) == SVD_CFGR_DFEN_Msk); +} + +/** + * @brief Disable SVD Digital Filter + * @rmtoll CFGR DFEN FL_SVD_DisableDigitalFilter + * @param SVDx SVD instance + * @retval None + */ +__STATIC_INLINE void FL_SVD_DisableDigitalFilter(SVD_Type *SVDx) +{ + CLEAR_BIT(SVDx->CFGR, SVD_CFGR_DFEN_Msk); +} + +/** + * @brief Set SVD Work Mode + * @rmtoll CFGR MOD FL_SVD_SetWorkMode + * @param SVDx SVD instance + * @param mode This parameter can be one of the following values: + * @arg @ref FL_SVD_WORK_MODE_CONTINUOUS + * @arg @ref FL_SVD_WORK_MODE_PERIODIC + * @retval None + */ +__STATIC_INLINE void FL_SVD_SetWorkMode(SVD_Type *SVDx, uint32_t mode) +{ + MODIFY_REG(SVDx->CFGR, SVD_CFGR_MOD_Msk, mode); +} + +/** + * @brief Get SVD Work Mode + * @rmtoll CFGR MOD FL_SVD_GetWorkMode + * @param SVDx SVD instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_SVD_WORK_MODE_CONTINUOUS + * @arg @ref FL_SVD_WORK_MODE_PERIODIC + */ +__STATIC_INLINE uint32_t FL_SVD_GetWorkMode(SVD_Type *SVDx) +{ + return (uint32_t)(READ_BIT(SVDx->CFGR, SVD_CFGR_MOD_Msk)); +} + +/** + * @brief Set SVD Enable Period + * @rmtoll CFGR ITVL FL_SVD_SetEnablePeriod + * @param SVDx SVD instance + * @param period This parameter can be one of the following values: + * @arg @ref FL_SVD_ENABLE_PERIOD_62P5MS + * @arg @ref FL_SVD_ENABLE_PERIOD_256MS + * @arg @ref FL_SVD_ENABLE_PERIOD_1000MS + * @arg @ref FL_SVD_ENABLE_PERIOD_4000MS + * @retval None + */ +__STATIC_INLINE void FL_SVD_SetEnablePeriod(SVD_Type *SVDx, uint32_t period) +{ + MODIFY_REG(SVDx->CFGR, SVD_CFGR_ITVL_Msk, period); +} + +/** + * @brief Get SVD Work Interval + * @rmtoll CFGR ITVL FL_SVD_GetEnablePeriod + * @param SVDx SVD instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_SVD_ENABLE_PERIOD_62P5MS + * @arg @ref FL_SVD_ENABLE_PERIOD_256MS + * @arg @ref FL_SVD_ENABLE_PERIOD_1000MS + * @arg @ref FL_SVD_ENABLE_PERIOD_4000MS + */ +__STATIC_INLINE uint32_t FL_SVD_GetEnablePeriod(SVD_Type *SVDx) +{ + return (uint32_t)(READ_BIT(SVDx->CFGR, SVD_CFGR_ITVL_Msk)); +} + +/** + * @brief Enable External SVS Channel + * @rmtoll CR SVS0EN FL_SVD_EnableSVSChannel + * @param SVDx SVD instance + * @retval None + */ +__STATIC_INLINE void FL_SVD_EnableSVSChannel(SVD_Type *SVDx) +{ + SET_BIT(SVDx->CR, SVD_CR_SVS0EN_Msk); +} + +/** + * @brief Get External SVS Channel Enable Status + * @rmtoll CR SVS0EN FL_SVD_IsEnabledSVSChannel + * @param SVDx SVD instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_SVD_IsEnabledSVSChannel(SVD_Type *SVDx) +{ + return (uint32_t)(READ_BIT(SVDx->CR, SVD_CR_SVS0EN_Msk) == SVD_CR_SVS0EN_Msk); +} + +/** + * @brief Disable External SVS Channel + * @rmtoll CR SVS0EN FL_SVD_DisableSVSChannel + * @param SVDx SVD instance + * @retval None + */ +__STATIC_INLINE void FL_SVD_DisableSVSChannel(SVD_Type *SVDx) +{ + CLEAR_BIT(SVDx->CR, SVD_CR_SVS0EN_Msk); +} + +/** + * @brief Enable SVD + * @rmtoll CR EN FL_SVD_Enable + * @param SVDx SVD instance + * @retval None + */ +__STATIC_INLINE void FL_SVD_Enable(SVD_Type *SVDx) +{ + SET_BIT(SVDx->CR, SVD_CR_EN_Msk); +} + +/** + * @brief Get SVD Enable Status + * @rmtoll CR EN FL_SVD_IsEnabled + * @param SVDx SVD instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_SVD_IsEnabled(SVD_Type *SVDx) +{ + return (uint32_t)(READ_BIT(SVDx->CR, SVD_CR_EN_Msk) == SVD_CR_EN_Msk); +} + +/** + * @brief Disable SVD + * @rmtoll CR EN FL_SVD_Disable + * @param SVDx SVD instance + * @retval None + */ +__STATIC_INLINE void FL_SVD_Disable(SVD_Type *SVDx) +{ + CLEAR_BIT(SVDx->CR, SVD_CR_EN_Msk); +} + +/** + * @brief Enable Power Fall Interrupt + * @rmtoll IER PFIE FL_SVD_EnableIT_PowerFall + * @param SVDx SVD instance + * @retval None + */ +__STATIC_INLINE void FL_SVD_EnableIT_PowerFall(SVD_Type *SVDx) +{ + SET_BIT(SVDx->IER, SVD_IER_PFIE_Msk); +} + +/** + * @brief Get Power Fall Interrupt Status + * @rmtoll IER PFIE FL_SVD_IsEnabledIT_PowerFall + * @param SVDx SVD instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_SVD_IsEnabledIT_PowerFall(SVD_Type *SVDx) +{ + return (uint32_t)(READ_BIT(SVDx->IER, SVD_IER_PFIE_Msk) == SVD_IER_PFIE_Msk); +} + +/** + * @brief Disable Power Fall Interrupt + * @rmtoll IER PFIE FL_SVD_DisableIT_PowerFall + * @param SVDx SVD instance + * @retval None + */ +__STATIC_INLINE void FL_SVD_DisableIT_PowerFall(SVD_Type *SVDx) +{ + CLEAR_BIT(SVDx->IER, SVD_IER_PFIE_Msk); +} + +/** + * @brief Enable Power Rise Interrupt + * @rmtoll IER PRIE FL_SVD_EnableIT_PowerRise + * @param SVDx SVD instance + * @retval None + */ +__STATIC_INLINE void FL_SVD_EnableIT_PowerRise(SVD_Type *SVDx) +{ + SET_BIT(SVDx->IER, SVD_IER_PRIE_Msk); +} + +/** + * @brief Get Power Rise Interrupt Status + * @rmtoll IER PRIE FL_SVD_IsEnabledIT_PowerRise + * @param SVDx SVD instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_SVD_IsEnabledIT_PowerRise(SVD_Type *SVDx) +{ + return (uint32_t)(READ_BIT(SVDx->IER, SVD_IER_PRIE_Msk) == SVD_IER_PRIE_Msk); +} + +/** + * @brief Disable Power Rise Interrupt + * @rmtoll IER PRIE FL_SVD_DisableIT_PowerRise + * @param SVDx SVD instance + * @retval None + */ +__STATIC_INLINE void FL_SVD_DisableIT_PowerRise(SVD_Type *SVDx) +{ + CLEAR_BIT(SVDx->IER, SVD_IER_PRIE_Msk); +} + +/** + * @brief Get SVD Current Power Status + * @rmtoll ISR SVDO FL_SVD_GetCurrentPowerStatus + * @param SVDx SVD instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_SVD_POWER_STATUS_FALLING + * @arg @ref FL_SVD_POWER_STATUS_RISING + */ +__STATIC_INLINE uint32_t FL_SVD_GetCurrentPowerStatus(SVD_Type *SVDx) +{ + return (uint32_t)(READ_BIT(SVDx->ISR, SVD_ISR_SVDO_Msk)); +} + +/** + * @brief Get SVD Latched Power Status + * @rmtoll ISR SVDR FL_SVD_GetLatchedPowerStatus + * @param SVDx SVD instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_SVD_LATCHED_POWER_STATUS_FALLING + * @arg @ref FL_SVD_LATCHED_POWER_STATUS_RISING + */ +__STATIC_INLINE uint32_t FL_SVD_GetLatchedPowerStatus(SVD_Type *SVDx) +{ + return (uint32_t)(READ_BIT(SVDx->ISR, SVD_ISR_SVDR_Msk)); +} + +/** + * @brief Get SVD Power Fall Flag + * @rmtoll ISR PFF FL_SVD_IsActiveFlag_PowerFall + * @param SVDx SVD instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_SVD_IsActiveFlag_PowerFall(SVD_Type *SVDx) +{ + return (uint32_t)(READ_BIT(SVDx->ISR, SVD_ISR_PFF_Msk) == (SVD_ISR_PFF_Msk)); +} + +/** + * @brief Clear SVD Power Fall Flag + * @rmtoll ISR PFF FL_SVD_ClearFlag_PowerFall + * @param SVDx SVD instance + * @retval None + */ +__STATIC_INLINE void FL_SVD_ClearFlag_PowerFall(SVD_Type *SVDx) +{ + WRITE_REG(SVDx->ISR, SVD_ISR_PFF_Msk); +} + +/** + * @brief Get SVD Power Rise Flag + * @rmtoll ISR PRF FL_SVD_IsActiveFlag_PowerRise + * @param SVDx SVD instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_SVD_IsActiveFlag_PowerRise(SVD_Type *SVDx) +{ + return (uint32_t)(READ_BIT(SVDx->ISR, SVD_ISR_PRF_Msk) == (SVD_ISR_PRF_Msk)); +} + +/** + * @brief Clear SVD Power Rise Flag + * @rmtoll ISR PRF FL_SVD_ClearFlag_PowerRise + * @param SVDx SVD instance + * @retval None + */ +__STATIC_INLINE void FL_SVD_ClearFlag_PowerRise(SVD_Type *SVDx) +{ + WRITE_REG(SVDx->ISR, SVD_ISR_PRF_Msk); +} + +/** + * @brief Enable SVD Reference + * @rmtoll VSR EN FL_SVD_EnableReference + * @param SVDx SVD instance + * @param ref This parameter can be one of the following values: + * @arg @ref FL_SVD_REFERENCE_1P0V + * @arg @ref FL_SVD_REFERENCE_0P95V + * @arg @ref FL_SVD_REFERENCE_0P9V + * @retval None + */ +__STATIC_INLINE void FL_SVD_EnableReference(SVD_Type *SVDx, uint32_t ref) +{ + WRITE_REG(SVDx->VSR, ((ref & 0x7) << 0x0U)); +} + +/** + * @brief Get SVD Reference Enable Status + * @rmtoll VSR EN FL_SVD_IsEnabledReference + * @param SVDx SVD instance + * @param ref This parameter can be one of the following values: + * @arg @ref FL_SVD_REFERENCE_1P0V + * @arg @ref FL_SVD_REFERENCE_0P95V + * @arg @ref FL_SVD_REFERENCE_0P9V + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_SVD_IsEnabledReference(SVD_Type *SVDx, uint32_t ref) +{ + return (uint32_t)(READ_BIT(SVDx->VSR, ((ref & 0x7) << 0x0U)) == ((ref & 0x7) << 0x0U)); +} + +/** + * @brief Disable SVD Reference + * @rmtoll VSR EN FL_SVD_DisableReference + * @param SVDx SVD instance + * @param ref This parameter can be one of the following values: + * @arg @ref FL_SVD_REFERENCE_1P0V + * @arg @ref FL_SVD_REFERENCE_0P95V + * @arg @ref FL_SVD_REFERENCE_0P9V + * @retval None + */ +__STATIC_INLINE void FL_SVD_DisableReference(SVD_Type *SVDx, uint32_t ref) +{ + CLEAR_BIT(SVDx->VSR, ((ref & 0x7) << 0x0U)); +} + +/** + * @} + */ + +/** @defgroup SVD_FL_EF_Init Initialization and de-initialization functions + * @{ + */ + +FL_ErrorStatus FL_SVD_DeInit(SVD_Type *SVDx); +FL_ErrorStatus FL_SVD_Init(SVD_Type *SVDx, FL_SVD_InitTypeDef *init); +void FL_SVD_StructInit(FL_SVD_InitTypeDef *init); + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif /* __FM33LG0XX_FL_SVD_H*/ + +/*************************Py_Code_Generator Version: 0.1-0.11-0.1 @ 2020-09-22*************************/ +/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/ diff --git a/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_uart.h b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_uart.h new file mode 100644 index 0000000..ab1e1e1 --- /dev/null +++ b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_uart.h @@ -0,0 +1,1316 @@ + /** + ******************************************************************************************************* + * @file fm33lg0xx_fl_uart.h + * @author FMSH Application Team + * @brief Head file of UART FL Module + ******************************************************************************************************* + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + + + +/* Define to prevent recursive inclusion---------------------------------------------------------------*/ +#ifndef __FM33LG0XX_FL_UART_H +#define __FM33LG0XX_FL_UART_H + +#ifdef __cplusplus +extern "C" { +#endif +/* Includes -------------------------------------------------------------------------------------------*/ +#include "fm33lg0xx_fl_def.h" +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @defgroup UART UART + * @brief UART FL driver + * @{ + */ + +/* Exported types -------------------------------------------------------------------------------------*/ +/** @defgroup UART_FL_ES_INIT UART Exported Init structures + * @{ + */ + +/** + * @brief FL UART Init Sturcture definition + */ +typedef struct +{ + /*! 时钟源选择 */ + uint32_t clockSrc; + /*! 通信波特率 */ + uint32_t baudRate; + /*! 数据宽度 */ + uint32_t dataWidth; + /*! 停止位 */ + uint32_t stopBits; + /*! 奇偶校验位 */ + uint32_t parity; + /*! 传输反向 */ + uint32_t transferDirection; + +} FL_UART_InitTypeDef; + +typedef struct +{ + /*! 调制极性默认bit1调制 */ + uint32_t polarity; + /*! 红外调制占空比 */ + uint32_t modulationDuty; + /*! 红外调制频率*/ + uint32_t modulationFrequency; + +} FL_UART_InfraRed_InitTypeDef; + +#define FL_UART_DIRECTION_NONE 0x00000000U +#define FL_UART_DIRECTION_RX UART_CSR_RXEN +#define FL_UART_DIRECTION_TX UART_CSR_TXEN +#define FL_UART_DIRECTION_TX_RX (UART_CSR_RXEN | UART_CSR_TXEN) +/** + * @} + */ +/* Exported constants ---------------------------------------------------------------------------------*/ +/** @defgroup UART_FL_Exported_Constants UART Exported Constants + * @{ + */ + +#define UART_IRCR_IRFLAG_Pos (15U) +#define UART_IRCR_IRFLAG_Msk (0x1U << UART_IRCR_IRFLAG_Pos) +#define UART_IRCR_IRFLAG UART_IRCR_IRFLAG_Msk + +#define UART_IRCR_TH_Pos (11U) +#define UART_IRCR_TH_Msk (0xfU << UART_IRCR_TH_Pos) +#define UART_IRCR_TH UART_IRCR_TH_Msk + +#define UART_IRCR_TZBRG_Pos (0U) +#define UART_IRCR_TZBRG_Msk (0x7ffU << UART_IRCR_TZBRG_Pos) +#define UART_IRCR_TZBRG UART_IRCR_TZBRG_Msk + +#define UART_CSR_BUSY_Pos (24U) +#define UART_CSR_BUSY_Msk (0x1U << UART_CSR_BUSY_Pos) +#define UART_CSR_BUSY UART_CSR_BUSY_Msk + +#define UART_CSR_TXIREN_Pos (17U) +#define UART_CSR_TXIREN_Msk (0x1U << UART_CSR_TXIREN_Pos) +#define UART_CSR_TXIREN UART_CSR_TXIREN_Msk + +#define UART_CSR_RXTOEN_Pos (16U) +#define UART_CSR_RXTOEN_Msk (0x1U << UART_CSR_RXTOEN_Pos) +#define UART_CSR_RXTOEN UART_CSR_RXTOEN_Msk + +#define UART_CSR_OVSM_Pos (13U) +#define UART_CSR_OVSM_Msk (0x1U << UART_CSR_OVSM_Pos) +#define UART_CSR_OVSM UART_CSR_OVSM_Msk + +#define UART_CSR_IOSWAP_Pos (12U) +#define UART_CSR_IOSWAP_Msk (0x1U << UART_CSR_IOSWAP_Pos) +#define UART_CSR_IOSWAP UART_CSR_IOSWAP_Msk + +#define UART_CSR_NEWUP_Pos (11U) +#define UART_CSR_NEWUP_Msk (0x1U << UART_CSR_NEWUP_Pos) +#define UART_CSR_NEWUP UART_CSR_NEWUP_Msk + +#define UART_CSR_DMATXIFCFG_Pos (10U) +#define UART_CSR_DMATXIFCFG_Msk (0x1U << UART_CSR_DMATXIFCFG_Pos) +#define UART_CSR_DMATXIFCFG UART_CSR_DMATXIFCFG_Msk + +#define UART_CSR_BITORD_Pos (9U) +#define UART_CSR_BITORD_Msk (0x1U << UART_CSR_BITORD_Pos) +#define UART_CSR_BITORD UART_CSR_BITORD_Msk + +#define UART_CSR_STOPCFG_Pos (8U) +#define UART_CSR_STOPCFG_Msk (0x1U << UART_CSR_STOPCFG_Pos) +#define UART_CSR_STOPCFG UART_CSR_STOPCFG_Msk + +#define UART_CSR_PDSEL_Pos (6U) +#define UART_CSR_PDSEL_Msk (0x3U << UART_CSR_PDSEL_Pos) +#define UART_CSR_PDSEL UART_CSR_PDSEL_Msk + +#define UART_CSR_PARITY_Pos (4U) +#define UART_CSR_PARITY_Msk (0x3U << UART_CSR_PARITY_Pos) +#define UART_CSR_PARITY UART_CSR_PARITY_Msk + +#define UART_CSR_RXPOL_Pos (3U) +#define UART_CSR_RXPOL_Msk (0x1U << UART_CSR_RXPOL_Pos) +#define UART_CSR_RXPOL UART_CSR_RXPOL_Msk + +#define UART_CSR_TXPOL_Pos (2U) +#define UART_CSR_TXPOL_Msk (0x1U << UART_CSR_TXPOL_Pos) +#define UART_CSR_TXPOL UART_CSR_TXPOL_Msk + +#define UART_CSR_RXEN_Pos (1U) +#define UART_CSR_RXEN_Msk (0x1U << UART_CSR_RXEN_Pos) +#define UART_CSR_RXEN UART_CSR_RXEN_Msk + +#define UART_CSR_TXEN_Pos (0U) +#define UART_CSR_TXEN_Msk (0x1U << UART_CSR_TXEN_Pos) +#define UART_CSR_TXEN UART_CSR_TXEN_Msk + +#define UART_IER_RXTOIE_Pos (11U) +#define UART_IER_RXTOIE_Msk (0x1U << UART_IER_RXTOIE_Pos) +#define UART_IER_RXTOIE UART_IER_RXTOIE_Msk + +#define UART_IER_RXERRIE_Pos (10U) +#define UART_IER_RXERRIE_Msk (0x1U << UART_IER_RXERRIE_Pos) +#define UART_IER_RXERRIE UART_IER_RXERRIE_Msk + +#define UART_IER_RXBFIE_Pos (8U) +#define UART_IER_RXBFIE_Msk (0x1U << UART_IER_RXBFIE_Pos) +#define UART_IER_RXBFIE UART_IER_RXBFIE_Msk + +#define UART_IER_NEWUPIE_Pos (7U) +#define UART_IER_NEWUPIE_Msk (0x1U << UART_IER_NEWUPIE_Pos) +#define UART_IER_NEWUPIE UART_IER_NEWUPIE_Msk + +#define UART_IER_TXBEIE_Pos (1U) +#define UART_IER_TXBEIE_Msk (0x1U << UART_IER_TXBEIE_Pos) +#define UART_IER_TXBEIE UART_IER_TXBEIE_Msk + +#define UART_IER_TXSEIE_Pos (0U) +#define UART_IER_TXSEIE_Msk (0x1U << UART_IER_TXSEIE_Pos) +#define UART_IER_TXSEIE UART_IER_TXSEIE_Msk + +#define UART_ISR_PERR_Pos (18U) +#define UART_ISR_PERR_Msk (0x1U << UART_ISR_PERR_Pos) +#define UART_ISR_PERR UART_ISR_PERR_Msk + +#define UART_ISR_FERR_Pos (17U) +#define UART_ISR_FERR_Msk (0x1U << UART_ISR_FERR_Pos) +#define UART_ISR_FERR UART_ISR_FERR_Msk + +#define UART_ISR_OERR_Pos (16U) +#define UART_ISR_OERR_Msk (0x1U << UART_ISR_OERR_Pos) +#define UART_ISR_OERR UART_ISR_OERR_Msk + +#define UART_ISR_RXTO_Pos (11U) +#define UART_ISR_RXTO_Msk (0x1U << UART_ISR_RXTO_Pos) +#define UART_ISR_RXTO UART_ISR_RXTO_Msk + +#define UART_ISR_RXBF_Pos (8U) +#define UART_ISR_RXBF_Msk (0x1U << UART_ISR_RXBF_Pos) +#define UART_ISR_RXBF UART_ISR_RXBF_Msk + +#define UART_ISR_NEWKF_Pos (7U) +#define UART_ISR_NEWKF_Msk (0x1U << UART_ISR_NEWKF_Pos) +#define UART_ISR_NEWKF UART_ISR_NEWKF_Msk + +#define UART_ISR_TXOERR_Pos (2U) +#define UART_ISR_TXOERR_Msk (0x1U << UART_ISR_TXOERR_Pos) +#define UART_ISR_TXOERR UART_ISR_TXOERR_Msk + +#define UART_ISR_TXBE_Pos (1U) +#define UART_ISR_TXBE_Msk (0x1U << UART_ISR_TXBE_Pos) +#define UART_ISR_TXBE UART_ISR_TXBE_Msk + +#define UART_ISR_TXSE_Pos (0U) +#define UART_ISR_TXSE_Msk (0x1U << UART_ISR_TXSE_Pos) +#define UART_ISR_TXSE UART_ISR_TXSE_Msk + +#define UART_TODR_TXDLY_LEN_Pos (8U) +#define UART_TODR_TXDLY_LEN_Msk (0xffU << UART_TODR_TXDLY_LEN_Pos) +#define UART_TODR_TXDLY_LEN UART_TODR_TXDLY_LEN_Msk + +#define UART_TODR_RXTO_LEN_Pos (0U) +#define UART_TODR_RXTO_LEN_Msk (0xffU << UART_TODR_RXTO_LEN_Pos) +#define UART_TODR_RXTO_LEN UART_TODR_RXTO_LEN_Msk + + +#define FL_UART_INFRARED_POLARITY_NORMAL (0x0U << UART_IRCR_IRFLAG_Pos) +#define FL_UART_INFRARED_POLARITY_INVERT (0x1U << UART_IRCR_IRFLAG_Pos) + + +#define FL_UART_OVERSAMPLING_16 (0x0U << UART_CSR_OVSM_Pos) +#define FL_UART_OVERSAMPLING_8 (0x1U << UART_CSR_OVSM_Pos) + + +#define FL_UART_TXIF_MODE_ALWAYS (0x0U << UART_CSR_DMATXIFCFG_Pos) +#define FL_UART_TXIF_MODE_AFTER_DMA (0x1U << UART_CSR_DMATXIFCFG_Pos) + + +#define FL_UART_BIT_ORDER_LSB_FIRST (0x0U << UART_CSR_BITORD_Pos) +#define FL_UART_BIT_ORDER_MSB_FIRST (0x1U << UART_CSR_BITORD_Pos) + + +#define FL_UART_STOP_BIT_WIDTH_1B (0x0U << UART_CSR_STOPCFG_Pos) +#define FL_UART_STOP_BIT_WIDTH_2B (0x1U << UART_CSR_STOPCFG_Pos) + + +#define FL_UART_DATA_WIDTH_7B (0x0U << UART_CSR_PDSEL_Pos) +#define FL_UART_DATA_WIDTH_8B (0x1U << UART_CSR_PDSEL_Pos) +#define FL_UART_DATA_WIDTH_9B (0x2U << UART_CSR_PDSEL_Pos) +#define FL_UART_DATA_WIDTH_6B (0x3U << UART_CSR_PDSEL_Pos) + + +#define FL_UART_PARITY_NONE (0x0U << UART_CSR_PARITY_Pos) +#define FL_UART_PARITY_EVEN (0x1U << UART_CSR_PARITY_Pos) +#define FL_UART_PARITY_ODD (0x2U << UART_CSR_PARITY_Pos) + + +#define FL_UART_RX_POLARITY_NORMAL (0x0U << UART_CSR_RXPOL_Pos) +#define FL_UART_RX_POLARITY_INVERT (0x1U << UART_CSR_RXPOL_Pos) + + +#define FL_UART_TX_POLARITY_NORMAL (0x0U << UART_CSR_TXPOL_Pos) +#define FL_UART_TX_POLARITY_INVERT (0x1U << UART_CSR_TXPOL_Pos) + + +/** + * @} + */ +/* Exported functions ---------------------------------------------------------------------------------*/ +/** @defgroup UART_FL_Exported_Functions UART Exported Functions + * @{ + */ + +/** + * @brief Set Infrared Polarity + * @rmtoll IRCR IRFLAG FL_UART_SetIRPolarity + * @param UART_Common UART_Common instance + * @param polarity This parameter can be one of the following values: + * @arg @ref FL_UART_INFRARED_POLARITY_NORMAL + * @arg @ref FL_UART_INFRARED_POLARITY_INVERT + * @retval None + */ +__STATIC_INLINE void FL_UART_SetIRPolarity(UART_COMMON_Type *UART_Common, uint32_t polarity) +{ + MODIFY_REG(UART_Common->IRCR, UART_IRCR_IRFLAG_Msk, polarity); +} + +/** + * @brief Get Infrared Polarity + * @rmtoll IRCR IRFLAG FL_UART_GetIRPolarity + * @param UART_Common UART_Common instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_UART_INFRARED_POLARITY_NORMAL + * @arg @ref FL_UART_INFRARED_POLARITY_INVERT + */ +__STATIC_INLINE uint32_t FL_UART_GetIRPolarity(UART_COMMON_Type *UART_Common) +{ + return (uint32_t)(READ_BIT(UART_Common->IRCR, UART_IRCR_IRFLAG_Msk)); +} + +/** + * @brief Set Infrared Modulation Duty + * @rmtoll IRCR TH FL_UART_WriteIRModulationDuty + * @param UART_Common UART_Common instance + * @param duty + * @retval None + */ +__STATIC_INLINE void FL_UART_WriteIRModulationDuty(UART_COMMON_Type *UART_Common, uint32_t duty) +{ + MODIFY_REG(UART_Common->IRCR, (0xfU << 11U), (duty << 11U)); +} + +/** + * @brief Get Infrared Modulation Duty + * @rmtoll IRCR TH FL_UART_ReadIRModulationDuty + * @param UART_Common UART_Common instance + * @retval + */ +__STATIC_INLINE uint32_t FL_UART_ReadIRModulationDuty(UART_COMMON_Type *UART_Common) +{ + return (uint32_t)(READ_BIT(UART_Common->IRCR, (0xfU << 11U)) >> 11U); +} + +/** + * @brief Set Infrared Modulation Frequency + * @rmtoll IRCR TZBRG FL_UART_WriteIRModulationFrequency + * @param UART_Common UART_Common instance + * @param freq + * @retval None + */ +__STATIC_INLINE void FL_UART_WriteIRModulationFrequency(UART_COMMON_Type *UART_Common, uint32_t freq) +{ + MODIFY_REG(UART_Common->IRCR, (0x7ffU << 0U), (freq << 0U)); +} + +/** + * @brief Get Infrared Modulation Frequency + * @rmtoll IRCR TZBRG FL_UART_ReadIRModulationFrequency + * @param UART_Common UART_Common instance + * @retval + */ +__STATIC_INLINE uint32_t FL_UART_ReadIRModulationFrequency(UART_COMMON_Type *UART_Common) +{ + return (uint32_t)(READ_BIT(UART_Common->IRCR, (0x7ffU << 0U)) >> 0U); +} + +/** + * @brief Get UART Busy Flag + * @rmtoll CSR BUSY FL_UART_IsActiveFlag_Busy + * @param UARTx UART instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_UART_IsActiveFlag_Busy(UART_Type *UARTx) +{ + return (uint32_t)(READ_BIT(UARTx->CSR, UART_CSR_BUSY_Msk) == (UART_CSR_BUSY_Msk)); +} + +/** + * @brief Enable UART Infrared Modulation + * @rmtoll CSR TXIREN FL_UART_EnableIRModulation + * @param UARTx UART instance + * @retval None + */ +__STATIC_INLINE void FL_UART_EnableIRModulation(UART_Type *UARTx) +{ + SET_BIT(UARTx->CSR, UART_CSR_TXIREN_Msk); +} + +/** + * @brief Disable UART Infrared Modulation + * @rmtoll CSR TXIREN FL_UART_DisableIRModulation + * @param UARTx UART instance + * @retval None + */ +__STATIC_INLINE void FL_UART_DisableIRModulation(UART_Type *UARTx) +{ + CLEAR_BIT(UARTx->CSR, UART_CSR_TXIREN_Msk); +} + +/** + * @brief Get UART Infrared Modulation Enable Status + * @rmtoll CSR TXIREN FL_UART_IsEnabledIRModulation + * @param UARTx UART instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_UART_IsEnabledIRModulation(UART_Type *UARTx) +{ + return (uint32_t)(READ_BIT(UARTx->CSR, UART_CSR_TXIREN_Msk) == UART_CSR_TXIREN_Msk); +} + +/** + * @brief Enable UART Receive Time-Out Function + * @rmtoll CSR RXTOEN FL_UART_EnableRXTimeout + * @param UARTx UART instance + * @retval None + */ +__STATIC_INLINE void FL_UART_EnableRXTimeout(UART_Type *UARTx) +{ + SET_BIT(UARTx->CSR, UART_CSR_RXTOEN_Msk); +} + +/** + * @brief Disable UART Receive Time-Out Function + * @rmtoll CSR RXTOEN FL_UART_DisableRXTimeout + * @param UARTx UART instance + * @retval None + */ +__STATIC_INLINE void FL_UART_DisableRXTimeout(UART_Type *UARTx) +{ + CLEAR_BIT(UARTx->CSR, UART_CSR_RXTOEN_Msk); +} + +/** + * @brief Get UART Receive Time-Out Function Enable Status + * @rmtoll CSR RXTOEN FL_UART_IsEnabledRXTimeout + * @param UARTx UART instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_UART_IsEnabledRXTimeout(UART_Type *UARTx) +{ + return (uint32_t)(READ_BIT(UARTx->CSR, UART_CSR_RXTOEN_Msk) == UART_CSR_RXTOEN_Msk); +} + +/** + * @brief Set Oversampling Mode + * @rmtoll CSR OVSM FL_UART_SetOverSampling + * @param UARTx UART instance + * @param mode This parameter can be one of the following values: + * @arg @ref FL_UART_OVERSAMPLING_16 + * @arg @ref FL_UART_OVERSAMPLING_8 + * @retval None + */ +__STATIC_INLINE void FL_UART_SetOverSampling(UART_Type *UARTx, uint32_t mode) +{ + MODIFY_REG(UARTx->CSR, UART_CSR_OVSM_Msk, mode); +} + +/** + * @brief Get Oversampling Mode + * @rmtoll CSR OVSM FL_UART_GetOverSampling + * @param UARTx UART instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_UART_OVERSAMPLING_16 + * @arg @ref FL_UART_OVERSAMPLING_8 + */ +__STATIC_INLINE uint32_t FL_UART_GetOverSampling(UART_Type *UARTx) +{ + return (uint32_t)(READ_BIT(UARTx->CSR, UART_CSR_OVSM_Msk)); +} + +/** + * @brief Enable UART Pin Swap Between UART TX Pin and RX Pin + * @rmtoll CSR IOSWAP FL_UART_EnablePinSwap + * @param UARTx UART instance + * @retval None + */ +__STATIC_INLINE void FL_UART_EnablePinSwap(UART_Type *UARTx) +{ + SET_BIT(UARTx->CSR, UART_CSR_IOSWAP_Msk); +} + +/** + * @brief Disable UART Pin Swap Between UART TX Pin and RX Pin + * @rmtoll CSR IOSWAP FL_UART_DisablePinSwap + * @param UARTx UART instance + * @retval None + */ +__STATIC_INLINE void FL_UART_DisablePinSwap(UART_Type *UARTx) +{ + CLEAR_BIT(UARTx->CSR, UART_CSR_IOSWAP_Msk); +} + +/** + * @brief Get UART Pin Swap Enable Status Between UART TX Pin and RX Pin + * @rmtoll CSR IOSWAP FL_UART_IsEnabledPinSwap + * @param UARTx UART instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_UART_IsEnabledPinSwap(UART_Type *UARTx) +{ + return (uint32_t)(READ_BIT(UARTx->CSR, UART_CSR_IOSWAP_Msk) == UART_CSR_IOSWAP_Msk); +} + +/** + * @brief Enable UART Negtive Edge Wakeup Function + * @rmtoll CSR NEWUP FL_UART_EnableFallingEdgeWakeup + * @param UARTx UART instance + * @retval None + */ +__STATIC_INLINE void FL_UART_EnableFallingEdgeWakeup(UART_Type *UARTx) +{ + SET_BIT(UARTx->CSR, UART_CSR_NEWUP_Msk); +} + +/** + * @brief Disable UART Negtive Edge Wakeup Function + * @rmtoll CSR NEWUP FL_UART_DisableFallingEdgeWakeup + * @param UARTx UART instance + * @retval None + */ +__STATIC_INLINE void FL_UART_DisableFallingEdgeWakeup(UART_Type *UARTx) +{ + CLEAR_BIT(UARTx->CSR, UART_CSR_NEWUP_Msk); +} + +/** + * @brief Get UART Negtive Edge Wakeup Function Enable Status + * @rmtoll CSR NEWUP FL_UART_IsEnabledFallingEdgeWakeup + * @param UARTx UART instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_UART_IsEnabledFallingEdgeWakeup(UART_Type *UARTx) +{ + return (uint32_t)(READ_BIT(UARTx->CSR, UART_CSR_NEWUP_Msk) == UART_CSR_NEWUP_Msk); +} + +/** + * @brief Enable UART DMA Transmit Finish Interrupt + * @rmtoll CSR DMATXIFCFG FL_UART_SetTXIFMode + * @param UARTx UART instance + * @param mode This parameter can be one of the following values: + * @arg @ref FL_UART_TXIF_MODE_ALWAYS + * @arg @ref FL_UART_TXIF_MODE_AFTER_DMA + * @retval None + */ +__STATIC_INLINE void FL_UART_SetTXIFMode(UART_Type *UARTx, uint32_t mode) +{ + MODIFY_REG(UARTx->CSR, UART_CSR_DMATXIFCFG_Msk, mode); +} + +/** + * @brief Disable UART DMA Transmit Finish Interrupt + * @rmtoll CSR DMATXIFCFG FL_UART_GetTXIFMode + * @param UARTx UART instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_UART_TXIF_MODE_ALWAYS + * @arg @ref FL_UART_TXIF_MODE_AFTER_DMA + */ +__STATIC_INLINE uint32_t FL_UART_GetTXIFMode(UART_Type *UARTx) +{ + return (uint32_t)(READ_BIT(UARTx->CSR, UART_CSR_DMATXIFCFG_Msk)); +} + +/** + * @brief Set UART Transfer Bit Order + * @rmtoll CSR BITORD FL_UART_SetBitOrder + * @param UARTx UART instance + * @param order This parameter can be one of the following values: + * @arg @ref FL_UART_BIT_ORDER_LSB_FIRST + * @arg @ref FL_UART_BIT_ORDER_MSB_FIRST + * @retval None + */ +__STATIC_INLINE void FL_UART_SetBitOrder(UART_Type *UARTx, uint32_t order) +{ + MODIFY_REG(UARTx->CSR, UART_CSR_BITORD_Msk, order); +} + +/** + * @brief Get UART Transfer Bit Order + * @rmtoll CSR BITORD FL_UART_GetBitOrder + * @param UARTx UART instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_UART_BIT_ORDER_LSB_FIRST + * @arg @ref FL_UART_BIT_ORDER_MSB_FIRST + */ +__STATIC_INLINE uint32_t FL_UART_GetBitOrder(UART_Type *UARTx) +{ + return (uint32_t)(READ_BIT(UARTx->CSR, UART_CSR_BITORD_Msk)); +} + +/** + * @brief Set UART Stop Bits Length + * @rmtoll CSR STOPCFG FL_UART_SetStopBitsWidth + * @param UARTx UART instance + * @param length This parameter can be one of the following values: + * @arg @ref FL_UART_STOP_BIT_WIDTH_1B + * @arg @ref FL_UART_STOP_BIT_WIDTH_2B + * @retval None + */ +__STATIC_INLINE void FL_UART_SetStopBitsWidth(UART_Type *UARTx, uint32_t length) +{ + MODIFY_REG(UARTx->CSR, UART_CSR_STOPCFG_Msk, length); +} + +/** + * @brief Get UART Stop Bits Length + * @rmtoll CSR STOPCFG FL_UART_GetStopBitsWidth + * @param UARTx UART instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_UART_STOP_BIT_WIDTH_1B + * @arg @ref FL_UART_STOP_BIT_WIDTH_2B + */ +__STATIC_INLINE uint32_t FL_UART_GetStopBitsWidth(UART_Type *UARTx) +{ + return (uint32_t)(READ_BIT(UARTx->CSR, UART_CSR_STOPCFG_Msk)); +} + +/** + * @brief Set UART Data Width + * @rmtoll CSR PDSEL FL_UART_SetDataWidth + * @param UARTx UART instance + * @param dataWidth This parameter can be one of the following values: + * @arg @ref FL_UART_DATA_WIDTH_7B + * @arg @ref FL_UART_DATA_WIDTH_8B + * @arg @ref FL_UART_DATA_WIDTH_9B + * @arg @ref FL_UART_DATA_WIDTH_6B + * @retval None + */ +__STATIC_INLINE void FL_UART_SetDataWidth(UART_Type *UARTx, uint32_t dataWidth) +{ + MODIFY_REG(UARTx->CSR, UART_CSR_PDSEL_Msk, dataWidth); +} + +/** + * @brief Get UART Data Width + * @rmtoll CSR PDSEL FL_UART_GetDataWidth + * @param UARTx UART instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_UART_DATA_WIDTH_7B + * @arg @ref FL_UART_DATA_WIDTH_8B + * @arg @ref FL_UART_DATA_WIDTH_9B + * @arg @ref FL_UART_DATA_WIDTH_6B + */ +__STATIC_INLINE uint32_t FL_UART_GetDataWidth(UART_Type *UARTx) +{ + return (uint32_t)(READ_BIT(UARTx->CSR, UART_CSR_PDSEL_Msk)); +} + +/** + * @brief Set UART Parity + * @rmtoll CSR PARITY FL_UART_SetParity + * @param UARTx UART instance + * @param parity This parameter can be one of the following values: + * @arg @ref FL_UART_PARITY_NONE + * @arg @ref FL_UART_PARITY_EVEN + * @arg @ref FL_UART_PARITY_ODD + * @retval None + */ +__STATIC_INLINE void FL_UART_SetParity(UART_Type *UARTx, uint32_t parity) +{ + MODIFY_REG(UARTx->CSR, UART_CSR_PARITY_Msk, parity); +} + +/** + * @brief Get UART Parity + * @rmtoll CSR PARITY FL_UART_GetParity + * @param UARTx UART instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_UART_PARITY_NONE + * @arg @ref FL_UART_PARITY_EVEN + * @arg @ref FL_UART_PARITY_ODD + */ +__STATIC_INLINE uint32_t FL_UART_GetParity(UART_Type *UARTx) +{ + return (uint32_t)(READ_BIT(UARTx->CSR, UART_CSR_PARITY_Msk)); +} + +/** + * @brief Set UART Receive Polarity + * @rmtoll CSR RXPOL FL_UART_SetRXPolarity + * @param UARTx UART instance + * @param polarity This parameter can be one of the following values: + * @arg @ref FL_UART_RX_POLARITY_NORMAL + * @arg @ref FL_UART_RX_POLARITY_INVERT + * @retval None + */ +__STATIC_INLINE void FL_UART_SetRXPolarity(UART_Type *UARTx, uint32_t polarity) +{ + MODIFY_REG(UARTx->CSR, UART_CSR_RXPOL_Msk, polarity); +} + +/** + * @brief Get UART Receive Polarity + * @rmtoll CSR RXPOL FL_UART_GetRXPolarity + * @param UARTx UART instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_UART_RX_POLARITY_NORMAL + * @arg @ref FL_UART_RX_POLARITY_INVERT + */ +__STATIC_INLINE uint32_t FL_UART_GetRXPolarity(UART_Type *UARTx) +{ + return (uint32_t)(READ_BIT(UARTx->CSR, UART_CSR_RXPOL_Msk)); +} + +/** + * @brief Set UART Transmit Polarity + * @rmtoll CSR TXPOL FL_UART_SetTXPolarity + * @param UARTx UART instance + * @param polarity This parameter can be one of the following values: + * @arg @ref FL_UART_TX_POLARITY_NORMAL + * @arg @ref FL_UART_TX_POLARITY_INVERT + * @retval None + */ +__STATIC_INLINE void FL_UART_SetTXPolarity(UART_Type *UARTx, uint32_t polarity) +{ + MODIFY_REG(UARTx->CSR, UART_CSR_TXPOL_Msk, polarity); +} + +/** + * @brief Get UART Transmit Polarity + * @rmtoll CSR TXPOL FL_UART_GetTXPolarity + * @param UARTx UART instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_UART_TX_POLARITY_NORMAL + * @arg @ref FL_UART_TX_POLARITY_INVERT + */ +__STATIC_INLINE uint32_t FL_UART_GetTXPolarity(UART_Type *UARTx) +{ + return (uint32_t)(READ_BIT(UARTx->CSR, UART_CSR_TXPOL_Msk)); +} + +/** + * @brief Enable UART Receive + * @rmtoll CSR RXEN FL_UART_EnableRX + * @param UARTx UART instance + * @retval None + */ +__STATIC_INLINE void FL_UART_EnableRX(UART_Type *UARTx) +{ + SET_BIT(UARTx->CSR, UART_CSR_RXEN_Msk); +} + +/** + * @brief Disable UART Receive + * @rmtoll CSR RXEN FL_UART_DisableRX + * @param UARTx UART instance + * @retval None + */ +__STATIC_INLINE void FL_UART_DisableRX(UART_Type *UARTx) +{ + CLEAR_BIT(UARTx->CSR, UART_CSR_RXEN_Msk); +} + +/** + * @brief Get UART Receive Enable Status + * @rmtoll CSR RXEN FL_UART_IsEnabledRX + * @param UARTx UART instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_UART_IsEnabledRX(UART_Type *UARTx) +{ + return (uint32_t)(READ_BIT(UARTx->CSR, UART_CSR_RXEN_Msk) == UART_CSR_RXEN_Msk); +} + +/** + * @brief Enable UART Transmit + * @rmtoll CSR TXEN FL_UART_EnableTX + * @param UARTx UART instance + * @retval None + */ +__STATIC_INLINE void FL_UART_EnableTX(UART_Type *UARTx) +{ + SET_BIT(UARTx->CSR, UART_CSR_TXEN_Msk); +} + +/** + * @brief Disable UART Receive + * @rmtoll CSR TXEN FL_UART_DisableTX + * @param UARTx UART instance + * @retval None + */ +__STATIC_INLINE void FL_UART_DisableTX(UART_Type *UARTx) +{ + CLEAR_BIT(UARTx->CSR, UART_CSR_TXEN_Msk); +} + +/** + * @brief Get UART Receive Enable Status + * @rmtoll CSR TXEN FL_UART_IsEnabledTX + * @param UARTx UART instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_UART_IsEnabledTX(UART_Type *UARTx) +{ + return (uint32_t)(READ_BIT(UARTx->CSR, UART_CSR_TXEN_Msk) == UART_CSR_TXEN_Msk); +} + +/** + * @brief Enable UART Receive Time-Out Interrupt + * @rmtoll IER RXTOIE FL_UART_EnableIT_RXTimeout + * @param UARTx UART instance + * @retval None + */ +__STATIC_INLINE void FL_UART_EnableIT_RXTimeout(UART_Type *UARTx) +{ + SET_BIT(UARTx->IER, UART_IER_RXTOIE_Msk); +} + +/** + * @brief Disable UART Receive Time-Out Interrupt + * @rmtoll IER RXTOIE FL_UART_DisableIT_RXTimeout + * @param UARTx UART instance + * @retval None + */ +__STATIC_INLINE void FL_UART_DisableIT_RXTimeout(UART_Type *UARTx) +{ + CLEAR_BIT(UARTx->IER, UART_IER_RXTOIE_Msk); +} + +/** + * @brief Get UART Receive Time-Out Interrupt Enable Status + * @rmtoll IER RXTOIE FL_UART_IsEnabledIT_RXTimeout + * @param UARTx UART instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_UART_IsEnabledIT_RXTimeout(UART_Type *UARTx) +{ + return (uint32_t)(READ_BIT(UARTx->IER, UART_IER_RXTOIE_Msk) == UART_IER_RXTOIE_Msk); +} + +/** + * @brief Enable UART Receive Error Interrupt + * @rmtoll IER RXERRIE FL_UART_EnableIT_RXError + * @param UARTx UART instance + * @retval None + */ +__STATIC_INLINE void FL_UART_EnableIT_RXError(UART_Type *UARTx) +{ + SET_BIT(UARTx->IER, UART_IER_RXERRIE_Msk); +} + +/** + * @brief Disable UART Receive Error Interrupt + * @rmtoll IER RXERRIE FL_UART_DisableIT_RXError + * @param UARTx UART instance + * @retval None + */ +__STATIC_INLINE void FL_UART_DisableIT_RXError(UART_Type *UARTx) +{ + CLEAR_BIT(UARTx->IER, UART_IER_RXERRIE_Msk); +} + +/** + * @brief Get UART Receive Error Interrupt Enable Status + * @rmtoll IER RXERRIE FL_UART_IsEnabledIT_RXError + * @param UARTx UART instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_UART_IsEnabledIT_RXError(UART_Type *UARTx) +{ + return (uint32_t)(READ_BIT(UARTx->IER, UART_IER_RXERRIE_Msk) == UART_IER_RXERRIE_Msk); +} + +/** + * @brief Enable UART Receive Buffer Full Interrupt + * @rmtoll IER RXBFIE FL_UART_EnableIT_RXBuffFull + * @param UARTx UART instance + * @retval None + */ +__STATIC_INLINE void FL_UART_EnableIT_RXBuffFull(UART_Type *UARTx) +{ + SET_BIT(UARTx->IER, UART_IER_RXBFIE_Msk); +} + +/** + * @brief Disable UART Receive Buffer Full Interrupt + * @rmtoll IER RXBFIE FL_UART_DisableIT_RXBuffFull + * @param UARTx UART instance + * @retval None + */ +__STATIC_INLINE void FL_UART_DisableIT_RXBuffFull(UART_Type *UARTx) +{ + CLEAR_BIT(UARTx->IER, UART_IER_RXBFIE_Msk); +} + +/** + * @brief Get UART Receive Buffer Full Interrupt Enable Status + * @rmtoll IER RXBFIE FL_UART_IsEnabledIT_RXBuffFull + * @param UARTx UART instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_UART_IsEnabledIT_RXBuffFull(UART_Type *UARTx) +{ + return (uint32_t)(READ_BIT(UARTx->IER, UART_IER_RXBFIE_Msk) == UART_IER_RXBFIE_Msk); +} + +/** + * @brief Enable UART Negedge Wakeup Interrupt + * @rmtoll IER NEWUPIE FL_UART_EnableIT_FallingEdgeWakeup + * @param UARTx UART instance + * @retval None + */ +__STATIC_INLINE void FL_UART_EnableIT_FallingEdgeWakeup(UART_Type *UARTx) +{ + SET_BIT(UARTx->IER, UART_IER_NEWUPIE_Msk); +} + +/** + * @brief Disable UART Negedge Wakeup Interrupt + * @rmtoll IER NEWUPIE FL_UART_DisableIT_FallingEdgeWakeup + * @param UARTx UART instance + * @retval None + */ +__STATIC_INLINE void FL_UART_DisableIT_FallingEdgeWakeup(UART_Type *UARTx) +{ + CLEAR_BIT(UARTx->IER, UART_IER_NEWUPIE_Msk); +} + +/** + * @brief Get UART Negedge Wakeup Interrupt Enable Status + * @rmtoll IER NEWUPIE FL_UART_IsEnabledIT_FallingEdgeWakeup + * @param UARTx UART instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_UART_IsEnabledIT_FallingEdgeWakeup(UART_Type *UARTx) +{ + return (uint32_t)(READ_BIT(UARTx->IER, UART_IER_NEWUPIE_Msk) == UART_IER_NEWUPIE_Msk); +} + +/** + * @brief Enable UART Transmit Buffer Empty Interrupt + * @rmtoll IER TXBEIE FL_UART_EnableIT_TXBuffEmpty + * @param UARTx UART instance + * @retval None + */ +__STATIC_INLINE void FL_UART_EnableIT_TXBuffEmpty(UART_Type *UARTx) +{ + SET_BIT(UARTx->IER, UART_IER_TXBEIE_Msk); +} + +/** + * @brief Disable UART Transmit Buffer Empty Interrupt + * @rmtoll IER TXBEIE FL_UART_DisableIT_TXBuffEmpty + * @param UARTx UART instance + * @retval None + */ +__STATIC_INLINE void FL_UART_DisableIT_TXBuffEmpty(UART_Type *UARTx) +{ + CLEAR_BIT(UARTx->IER, UART_IER_TXBEIE_Msk); +} + +/** + * @brief Get UART Transmit Buffer Empty Interrupt Enable Status + * @rmtoll IER TXBEIE FL_UART_IsEnabledIT_TXBuffEmpty + * @param UARTx UART instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_UART_IsEnabledIT_TXBuffEmpty(UART_Type *UARTx) +{ + return (uint32_t)(READ_BIT(UARTx->IER, UART_IER_TXBEIE_Msk) == UART_IER_TXBEIE_Msk); +} + +/** + * @brief Enable UART Transmit Shift Register Empty Interrupt + * @rmtoll IER TXSEIE FL_UART_EnableIT_TXShiftBuffEmpty + * @param UARTx UART instance + * @retval None + */ +__STATIC_INLINE void FL_UART_EnableIT_TXShiftBuffEmpty(UART_Type *UARTx) +{ + SET_BIT(UARTx->IER, UART_IER_TXSEIE_Msk); +} + +/** + * @brief Disable UART Transmit Shift Register Empty Interrupt + * @rmtoll IER TXSEIE FL_UART_DisableIT_TXShiftBuffEmpty + * @param UARTx UART instance + * @retval None + */ +__STATIC_INLINE void FL_UART_DisableIT_TXShiftBuffEmpty(UART_Type *UARTx) +{ + CLEAR_BIT(UARTx->IER, UART_IER_TXSEIE_Msk); +} + +/** + * @brief Get UART Transmit Shift Register Empty Interrupt Enable Status + * @rmtoll IER TXSEIE FL_UART_IsEnabledIT_TXShiftBuffEmpty + * @param UARTx UART instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_UART_IsEnabledIT_TXShiftBuffEmpty(UART_Type *UARTx) +{ + return (uint32_t)(READ_BIT(UARTx->IER, UART_IER_TXSEIE_Msk) == UART_IER_TXSEIE_Msk); +} + +/** + * @brief Get UART Parity Error Flag + * @rmtoll ISR PERR FL_UART_IsActiveFlag_ParityError + * @param UARTx UART instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_UART_IsActiveFlag_ParityError(UART_Type *UARTx) +{ + return (uint32_t)(READ_BIT(UARTx->ISR, UART_ISR_PERR_Msk) == (UART_ISR_PERR_Msk)); +} + +/** + * @brief Clear UART Parity Error Flag + * @rmtoll ISR PERR FL_UART_ClearFlag_ParityError + * @param UARTx UART instance + * @retval None + */ +__STATIC_INLINE void FL_UART_ClearFlag_ParityError(UART_Type *UARTx) +{ + WRITE_REG(UARTx->ISR, UART_ISR_PERR_Msk); +} + +/** + * @brief Get UART Frame Error Flag + * @rmtoll ISR FERR FL_UART_IsActiveFlag_FrameError + * @param UARTx UART instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_UART_IsActiveFlag_FrameError(UART_Type *UARTx) +{ + return (uint32_t)(READ_BIT(UARTx->ISR, UART_ISR_FERR_Msk) == (UART_ISR_FERR_Msk)); +} + +/** + * @brief Clear UART Frame Error Flag + * @rmtoll ISR FERR FL_UART_ClearFlag_FrameError + * @param UARTx UART instance + * @retval None + */ +__STATIC_INLINE void FL_UART_ClearFlag_FrameError(UART_Type *UARTx) +{ + WRITE_REG(UARTx->ISR, UART_ISR_FERR_Msk); +} + +/** + * @brief Get UART RX buffer Overflow Error Flag + * @rmtoll ISR OERR FL_UART_IsActiveFlag_RXBuffOverflowError + * @param UARTx UART instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_UART_IsActiveFlag_RXBuffOverflowError(UART_Type *UARTx) +{ + return (uint32_t)(READ_BIT(UARTx->ISR, UART_ISR_OERR_Msk) == (UART_ISR_OERR_Msk)); +} + +/** + * @brief Clear UART RX buffer Overflow Error Flag + * @rmtoll ISR OERR FL_UART_ClearFlag_RXBuffOverflowError + * @param UARTx UART instance + * @retval None + */ +__STATIC_INLINE void FL_UART_ClearFlag_RXBuffOverflowError(UART_Type *UARTx) +{ + WRITE_REG(UARTx->ISR, UART_ISR_OERR_Msk); +} + +/** + * @brief Get UART Receive Time-Out Flag + * @rmtoll ISR RXTO FL_UART_IsActiveFlag_RXBuffTimeout + * @param UARTx UART instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_UART_IsActiveFlag_RXBuffTimeout(UART_Type *UARTx) +{ + return (uint32_t)(READ_BIT(UARTx->ISR, UART_ISR_RXTO_Msk) == (UART_ISR_RXTO_Msk)); +} + +/** + * @brief Clear UART Receive Time-Out Flag + * @rmtoll ISR RXTO FL_UART_ClearFlag_RXBuffTimeout + * @param UARTx UART instance + * @retval None + */ +__STATIC_INLINE void FL_UART_ClearFlag_RXBuffTimeout(UART_Type *UARTx) +{ + WRITE_REG(UARTx->ISR, UART_ISR_RXTO_Msk); +} + +/** + * @brief Get UART Receive Buffer Full Flag + * @rmtoll ISR RXBF FL_UART_IsActiveFlag_RXBuffFull + * @param UARTx UART instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_UART_IsActiveFlag_RXBuffFull(UART_Type *UARTx) +{ + return (uint32_t)(READ_BIT(UARTx->ISR, UART_ISR_RXBF_Msk) == (UART_ISR_RXBF_Msk)); +} + +/** + * @brief Clear UART Receive Buffer Full Flag + * @rmtoll ISR RXBF FL_UART_ClearFlag_RXBuffFull + * @param UARTx UART instance + * @retval None + */ +__STATIC_INLINE void FL_UART_ClearFlag_RXBuffFull(UART_Type *UARTx) +{ + WRITE_REG(UARTx->ISR, UART_ISR_RXBF_Msk); +} + +/** + * @brief Get UART Negedge Wakeup Flag + * @rmtoll ISR NEWKF FL_UART_IsActiveFlag_FallingEdgeWakeup + * @param UARTx UART instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_UART_IsActiveFlag_FallingEdgeWakeup(UART_Type *UARTx) +{ + return (uint32_t)(READ_BIT(UARTx->ISR, UART_ISR_NEWKF_Msk) == (UART_ISR_NEWKF_Msk)); +} + +/** + * @brief Clear UART Negedge Wakeup Flag + * @rmtoll ISR NEWKF FL_UART_ClearFlag_FallingEdgeWakeup + * @param UARTx UART instance + * @retval None + */ +__STATIC_INLINE void FL_UART_ClearFlag_FallingEdgeWakeup(UART_Type *UARTx) +{ + WRITE_REG(UARTx->ISR, UART_ISR_NEWKF_Msk); +} + +/** + * @brief Get UART TX Overflow Error Flag + * @rmtoll ISR TXOERR FL_UART_IsActiveFlag_TXBuffOverflow + * @param UARTx UART instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_UART_IsActiveFlag_TXBuffOverflow(UART_Type *UARTx) +{ + return (uint32_t)(READ_BIT(UARTx->ISR, UART_ISR_TXOERR_Msk) == (UART_ISR_TXOERR_Msk)); +} + +/** + * @brief Clear UART TX Overflow Error Flag + * @rmtoll ISR TXOERR FL_UART_ClearFlag_TXBuffOverflow + * @param UARTx UART instance + * @retval None + */ +__STATIC_INLINE void FL_UART_ClearFlag_TXBuffOverflow(UART_Type *UARTx) +{ + WRITE_REG(UARTx->ISR, UART_ISR_TXOERR_Msk); +} + +/** + * @brief Get UART Transmit Buffer Empty Flag + * @rmtoll ISR TXBE FL_UART_IsActiveFlag_TXBuffEmpty + * @param UARTx UART instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_UART_IsActiveFlag_TXBuffEmpty(UART_Type *UARTx) +{ + return (uint32_t)(READ_BIT(UARTx->ISR, UART_ISR_TXBE_Msk) == (UART_ISR_TXBE_Msk)); +} + +/** + * @brief Get UART Transmit Shift register Empty Flag + * @rmtoll ISR TXSE FL_UART_IsActiveFlag_TXShiftBuffEmpty + * @param UARTx UART instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_UART_IsActiveFlag_TXShiftBuffEmpty(UART_Type *UARTx) +{ + return (uint32_t)(READ_BIT(UARTx->ISR, UART_ISR_TXSE_Msk) == (UART_ISR_TXSE_Msk)); +} + +/** + * @brief Clear UART Transmit Shift register Empty Flag + * @rmtoll ISR TXSE FL_UART_ClearFlag_TXShiftBuffEmpty + * @param UARTx UART instance + * @retval None + */ +__STATIC_INLINE void FL_UART_ClearFlag_TXShiftBuffEmpty(UART_Type *UARTx) +{ + WRITE_REG(UARTx->ISR, UART_ISR_TXSE_Msk); +} + +/** + * @brief Set UART Transmit Delay Length + * @rmtoll TODR TXDLY_LEN FL_UART_WriteTXDelay + * @param UARTx UART instance + * @param time + * @retval None + */ +__STATIC_INLINE void FL_UART_WriteTXDelay(UART_Type *UARTx, uint32_t time) +{ + MODIFY_REG(UARTx->TODR, (0xffU << 8U), (time << 8U)); +} + +/** + * @brief Get UART Transmit Delay Length + * @rmtoll TODR TXDLY_LEN FL_UART_ReadTXDelay + * @param UARTx UART instance + * @retval + */ +__STATIC_INLINE uint32_t FL_UART_ReadTXDelay(UART_Type *UARTx) +{ + return (uint32_t)(READ_BIT(UARTx->TODR, (0xffU << 8U)) >> 8U); +} + +/** + * @brief Set UART Receive Time-Out Length + * @rmtoll TODR RXTO_LEN FL_UART_WriteRXTimeout + * @param UARTx UART instance + * @param time + * @retval None + */ +__STATIC_INLINE void FL_UART_WriteRXTimeout(UART_Type *UARTx, uint32_t time) +{ + MODIFY_REG(UARTx->TODR, (0xffU << 0U), (time << 0U)); +} + +/** + * @brief Get UART Receive Time-Out Length + * @rmtoll TODR RXTO_LEN FL_UART_ReadRXTimeout + * @param UARTx UART instance + * @retval + */ +__STATIC_INLINE uint32_t FL_UART_ReadRXTimeout(UART_Type *UARTx) +{ + return (uint32_t)(READ_BIT(UARTx->TODR, (0xffU << 0U)) >> 0U); +} + +/** + * @brief UART Receive 1 byte of data + * @rmtoll RXBUF FL_UART_ReadRXBuff + * @param UARTx UART instance + * @retval + */ +__STATIC_INLINE uint32_t FL_UART_ReadRXBuff(UART_Type *UARTx) +{ + return (uint32_t)(READ_BIT(UARTx->RXBUF, 0x1ffU)); +} + +/** + * @brief UART Transmit 1 byte of data + * @rmtoll TXBUF FL_UART_WriteTXBuff + * @param UARTx UART instance + * @param data + * @retval None + */ +__STATIC_INLINE void FL_UART_WriteTXBuff(UART_Type *UARTx, uint32_t data) +{ + MODIFY_REG(UARTx->TXBUF, 0x1ffU, data); +} + +/** + * @brief Set UART BaudRate + * @rmtoll BGR FL_UART_WriteBaudRate + * @param UARTx UART instance + * @param baudRate + * @retval None + */ +__STATIC_INLINE void FL_UART_WriteBaudRate(UART_Type *UARTx, uint32_t baudRate) +{ + MODIFY_REG(UARTx->BGR, (0xffffU << 0U), (baudRate << 0U)); +} + +/** + * @brief Get UART BaudRate + * @rmtoll BGR FL_UART_ReadBaudRate + * @param UARTx UART instance + * @retval + */ +__STATIC_INLINE uint32_t FL_UART_ReadBaudRate(UART_Type *UARTx) +{ + return (uint32_t)(READ_BIT(UARTx->BGR, (0xffffU << 0U)) >> 0U); +} + +/** + * @} + */ + +/** @defgroup UART_FL_EF_Init Initialization and de-initialization functions + * @{ + */ +FL_ErrorStatus FL_UART_DeInit(UART_Type *UARTx); +FL_ErrorStatus FL_UART_Init(UART_Type *UARTx, FL_UART_InitTypeDef *initStruct); +FL_ErrorStatus FL_UART_InfraRed_Init(UART_Type *UARTx, FL_UART_InfraRed_InitTypeDef *initStruct); +void FL_UART_InfraRed_StructInit(FL_UART_InfraRed_InitTypeDef *initStruct); +void FL_UART_StructInit(FL_UART_InitTypeDef *initStruct); + + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif /* __FM33LG0XX_FL_UART_H*/ + +/*************************Py_Code_Generator Version: 0.1-0.11-0.1 @ 2020-09-22*************************/ +/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/ diff --git a/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_vao.h b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_vao.h new file mode 100644 index 0000000..e1186c6 --- /dev/null +++ b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_vao.h @@ -0,0 +1,670 @@ + /** + ******************************************************************************************************* + * @file fm33lg0xx_fl_vao.h + * @author FMSH Application Team + * @brief Head file of VAO FL Module + ******************************************************************************************************* + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + + + +/* Define to prevent recursive inclusion---------------------------------------------------------------*/ +#ifndef __FM33LG0XX_FL_VAO_H +#define __FM33LG0XX_FL_VAO_H + +#ifdef __cplusplus +extern "C" { +#endif +/* Includes -------------------------------------------------------------------------------------------*/ +#include "fm33lg0xx_fl_def.h" +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @defgroup VAO VAO + * @brief VAO FL driver + * @{ + */ + +/* Exported types -------------------------------------------------------------------------------------*/ +/** @defgroup VAO_FL_ES_INIT VAO Exported Init structures + * @{ + */ + +/** + * @brief FL VAO Init Sturcture definition + */ + +/** +* @brief FL VAO Init Sturcture definition +*/ +typedef struct +{ + /*! PH15输入使能 */ + uint32_t input; + /*! PH15上拉使能 */ + uint32_t pullup; + /*! PH15开漏输出使能 */ + uint32_t opendrainOutput; + /*! PH15功能选择 */ + uint32_t mode; + +} FL_VAO_IO_InitTypeDef; +typedef struct +{ + /*! 驱动能力配置 */ + uint32_t driveMode; + /*! 工作电流大小*/ + uint32_t workingCurrentMode; + +} FL_VAO_XTLF_InitTypeDef; +/** + * @} + */ +/* Exported constants ---------------------------------------------------------------------------------*/ +/** @defgroup VAO_FL_Exported_Constants VAO Exported Constants + * @{ + */ + +#define VAO_RSTCR_VBAT_RST_Pos (0U) +#define VAO_RSTCR_VBAT_RST_Msk (0x1U << VAO_RSTCR_VBAT_RST_Pos) +#define VAO_RSTCR_VBAT_RST VAO_RSTCR_VBAT_RST_Msk + +#define VAO_XTLFCR_XTLFEN_Pos (0U) +#define VAO_XTLFCR_XTLFEN_Msk (0xfU << VAO_XTLFCR_XTLFEN_Pos) +#define VAO_XTLFCR_XTLFEN VAO_XTLFCR_XTLFEN_Msk + +#define VAO_XTLFPR_DRVCFG_Pos (4U) +#define VAO_XTLFPR_DRVCFG_Msk (0x7U << VAO_XTLFPR_DRVCFG_Pos) +#define VAO_XTLFPR_DRVCFG VAO_XTLFPR_DRVCFG_Msk + +#define VAO_XTLFPR_XTLFIPW_Pos (0U) +#define VAO_XTLFPR_XTLFIPW_Msk (0xfU << VAO_XTLFPR_XTLFIPW_Pos) +#define VAO_XTLFPR_XTLFIPW VAO_XTLFPR_XTLFIPW_Msk + +#define VAO_FDIER_LFDET_IE_Pos (0U) +#define VAO_FDIER_LFDET_IE_Msk (0x1U << VAO_FDIER_LFDET_IE_Pos) +#define VAO_FDIER_LFDET_IE VAO_FDIER_LFDET_IE_Msk + +#define VAO_FDISR_LFDETO_Pos (1U) +#define VAO_FDISR_LFDETO_Msk (0x1U << VAO_FDISR_LFDETO_Pos) +#define VAO_FDISR_LFDETO VAO_FDISR_LFDETO_Msk + +#define VAO_FDISR_LFDETIF_Pos (0U) +#define VAO_FDISR_LFDETIF_Msk (0x1U << VAO_FDISR_LFDETIF_Pos) +#define VAO_FDISR_LFDETIF VAO_FDISR_LFDETIF_Msk + +#define VAO_INEN_PHINEN_Pos (15U) +#define VAO_INEN_PHINEN_Msk (0x1U << VAO_INEN_PHINEN_Pos) +#define VAO_INEN_PHINEN VAO_INEN_PHINEN_Msk + +#define VAO_PUEN_PHPUEN_Pos (15U) +#define VAO_PUEN_PHPUEN_Msk (0x1U << VAO_PUEN_PHPUEN_Pos) +#define VAO_PUEN_PHPUEN VAO_PUEN_PHPUEN_Msk + +#define VAO_ODEN_PHODEN_Pos (15U) +#define VAO_ODEN_PHODEN_Msk (0x1U << VAO_ODEN_PHODEN_Pos) +#define VAO_ODEN_PHODEN VAO_ODEN_PHODEN_Msk + +#define VAO_FCR_PH15FCR_Pos (30U) +#define VAO_FCR_PH15FCR_Msk (0x3U << VAO_FCR_PH15FCR_Pos) +#define VAO_FCR_PH15FCR VAO_FCR_PH15FCR_Msk + +#define VAO_DOR_PHDO_Pos (15U) +#define VAO_DOR_PHDO_Msk (0x1U << VAO_DOR_PHDO_Pos) +#define VAO_DOR_PHDO VAO_DOR_PHDO_Msk + +#define VAO_DIR_PHDIN_Pos (15U) +#define VAO_DIR_PHDIN_Msk (0x1U << VAO_DIR_PHDIN_Pos) +#define VAO_DIR_PHDIN VAO_DIR_PHDIN_Msk + +#define VAO_VILR_PHVIL15_Pos (15U) +#define VAO_VILR_PHVIL15_Msk (0x1U << VAO_VILR_PHVIL15_Pos) +#define VAO_VILR_PHVIL15 VAO_VILR_PHVIL15_Msk + + + + + + +#define FL_VAO_XTLF_ENABLE (0x5U << VAO_XTLFCR_XTLFEN_Pos) +#define FL_VAO_XTLF_DISABLE (0xaU << VAO_XTLFCR_XTLFEN_Pos) + +#define FL_VAO_XTLF_DRIVE_LEVEL_NONE (0x0U << VAO_XTLFPR_DRVCFG_Pos) +#define FL_VAO_XTLF_DRIVE_LEVEL_1 (0x1U << VAO_XTLFPR_DRVCFG_Pos) +#define FL_VAO_XTLF_DRIVE_LEVEL_2 (0x2U << VAO_XTLFPR_DRVCFG_Pos) +#define FL_VAO_XTLF_DRIVE_LEVEL_3 (0x3U << VAO_XTLFPR_DRVCFG_Pos) +#define FL_VAO_XTLF_DRIVE_LEVEL_4 (0x4U << VAO_XTLFPR_DRVCFG_Pos) +#define FL_VAO_XTLF_DRIVE_LEVEL_5 (0x5U << VAO_XTLFPR_DRVCFG_Pos) +#define FL_VAO_XTLF_DRIVE_LEVEL_6 (0x6U << VAO_XTLFPR_DRVCFG_Pos) +#define FL_VAO_XTLF_DRIVE_LEVEL_7 (0x7U << VAO_XTLFPR_DRVCFG_Pos) + +#define FL_VAO_XTLF_OUTPUT_LEVEL_NONE (0x0U << VAO_XTLFPR_DRVCFG_Pos) +#define FL_VAO_XTLF_OUTPUT_LEVEL_1 (0x1U << VAO_XTLFPR_DRVCFG_Pos) +#define FL_VAO_XTLF_OUTPUT_LEVEL_2 (0x2U << VAO_XTLFPR_DRVCFG_Pos) +#define FL_VAO_XTLF_OUTPUT_LEVEL_3 (0x3U << VAO_XTLFPR_DRVCFG_Pos) +#define FL_VAO_XTLF_OUTPUT_LEVEL_4 (0x4U << VAO_XTLFPR_DRVCFG_Pos) +#define FL_VAO_XTLF_OUTPUT_LEVEL_5 (0x5U << VAO_XTLFPR_DRVCFG_Pos) +#define FL_VAO_XTLF_OUTPUT_LEVEL_6 (0x6U << VAO_XTLFPR_DRVCFG_Pos) +#define FL_VAO_XTLF_OUTPUT_LEVEL_7 (0x7U << VAO_XTLFPR_DRVCFG_Pos) + +#define FL_VAO_XTLF_WORK_CURRENT_850NA (0x0U << VAO_XTLFPR_XTLFIPW_Pos) +#define FL_VAO_XTLF_WORK_CURRENT_800NA (0x1U << VAO_XTLFPR_XTLFIPW_Pos) +#define FL_VAO_XTLF_WORK_CURRENT_750NA (0x2U << VAO_XTLFPR_XTLFIPW_Pos) +#define FL_VAO_XTLF_WORK_CURRENT_700NA (0x3U << VAO_XTLFPR_XTLFIPW_Pos) +#define FL_VAO_XTLF_WORK_CURRENT_650NA (0x4U << VAO_XTLFPR_XTLFIPW_Pos) +#define FL_VAO_XTLF_WORK_CURRENT_600NA (0x5U << VAO_XTLFPR_XTLFIPW_Pos) +#define FL_VAO_XTLF_WORK_CURRENT_550NA (0x6U << VAO_XTLFPR_XTLFIPW_Pos) +#define FL_VAO_XTLF_WORK_CURRENT_500NA (0x7U << VAO_XTLFPR_XTLFIPW_Pos) +#define FL_VAO_XTLF_WORK_CURRENT_450NA (0x8U << VAO_XTLFPR_XTLFIPW_Pos) +#define FL_VAO_XTLF_WORK_CURRENT_400NA (0x9U << VAO_XTLFPR_XTLFIPW_Pos) +#define FL_VAO_XTLF_WORK_CURRENT_350NA (0xaU << VAO_XTLFPR_XTLFIPW_Pos) +#define FL_VAO_XTLF_WORK_CURRENT_300NA (0xbU << VAO_XTLFPR_XTLFIPW_Pos) +#define FL_VAO_XTLF_WORK_CURRENT_250NA (0xcU << VAO_XTLFPR_XTLFIPW_Pos) +#define FL_VAO_XTLF_WORK_CURRENT_200NA (0xdU << VAO_XTLFPR_XTLFIPW_Pos) +#define FL_VAO_XTLF_WORK_CURRENT_150NA (0xeU << VAO_XTLFPR_XTLFIPW_Pos) +#define FL_VAO_XTLF_WORK_CURRENT_100NA (0xfU << VAO_XTLFPR_XTLFIPW_Pos) + + +#define FL_VAO_PH15_MODE_INPUT (0x0U << VAO_FCR_PH15FCR_Pos) +#define FL_VAO_PH15_MODE_OUTPUT (0x1U << VAO_FCR_PH15FCR_Pos) +#define FL_VAO_PH15_MODE_RTCOUT (0x2U << VAO_FCR_PH15FCR_Pos) + + +#define FL_VAO_PH15_THRESHOLD_NORMAL (0x0U << VAO_VILR_PHVIL15_Pos) +#define FL_VAO_PH15_THRESHOLD_LOW (0x1U << VAO_VILR_PHVIL15_Pos) + + +/** + * @} + */ +/* Exported functions ---------------------------------------------------------------------------------*/ +/** @defgroup VAO_FL_Exported_Functions VAO Exported Functions + * @{ + */ + +/** + * @brief VBAT电源域寄存器复位使能 + * @rmtoll RSTCR VBAT_RST FL_VAO_EnableReset + * @param VAOx VAO instance + * @retval None + */ +__STATIC_INLINE void FL_VAO_EnableReset(VAO_Type *VAOx) +{ + SET_BIT(VAOx->RSTCR, VAO_RSTCR_VBAT_RST_Msk); +} + +/** + * @brief 获取VBAT电源域寄存器复位控制状态 + * @rmtoll RSTCR VBAT_RST FL_VAO_IsEnabledReset + * @param VAOx VAO instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_VAO_IsEnabledReset(VAO_Type *VAOx) +{ + return (uint32_t)(READ_BIT(VAOx->RSTCR, VAO_RSTCR_VBAT_RST_Msk) == VAO_RSTCR_VBAT_RST_Msk); +} + +/** + * @brief VBAT电源域寄存器复位撤销 + * @rmtoll RSTCR VBAT_RST FL_VAO_DisableReset + * @param VAOx VAO instance + * @retval None + */ +__STATIC_INLINE void FL_VAO_DisableReset(VAO_Type *VAOx) +{ + CLEAR_BIT(VAOx->RSTCR, VAO_RSTCR_VBAT_RST_Msk); +} + +/** + * @brief 使能XTLF + * @rmtoll XTLFCR XTLFEN FL_VAO_XTLF_Enable + * @param VAOx VAO instance + * @retval None + */ +__STATIC_INLINE void FL_VAO_XTLF_Enable(VAO_Type *VAOx) +{ + WRITE_REG(VAOx->XTLFCR, FL_VAO_XTLF_ENABLE); +} + +/** + * @brief 获取XTLF状态 + * @rmtoll XTLFCR XTLFEN FL_VAO_XTLF_IsEnabled + * @param VAOx VAO instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_VAO_XTLF_IsEnabled(VAO_Type *VAOx) +{ + return (uint32_t)(READ_REG(VAOx->XTLFCR)); +} + +/** + * @brief 禁止XTLF + * @rmtoll XTLFCR XTLFEN FL_VAO_XTLF_Disable + * @param VAOx VAO instance + * @retval None + */ +__STATIC_INLINE void FL_VAO_XTLF_Disable(VAO_Type *VAOx) +{ + WRITE_REG(VAOx->XTLFCR, FL_VAO_XTLF_DISABLE); +} + +/** + * @brief 设置输出级驱动等级 + * @rmtoll XTLFPR DRVCFG FL_VAO_XTLF_SetDriveLevel + * @param VAOx VAO instance + * @param level This parameter can be one of the following values: + * @arg @ref FL_VAO_XTLF_DRIVE_LEVEL_NONE + * @arg @ref FL_VAO_XTLF_DRIVE_LEVEL_1 + * @arg @ref FL_VAO_XTLF_DRIVE_LEVEL_2 + * @arg @ref FL_VAO_XTLF_DRIVE_LEVEL_3 + * @arg @ref FL_VAO_XTLF_DRIVE_LEVEL_4 + * @arg @ref FL_VAO_XTLF_DRIVE_LEVEL_5 + * @arg @ref FL_VAO_XTLF_DRIVE_LEVEL_6 + * @arg @ref FL_VAO_XTLF_DRIVE_LEVEL_7 + * @retval None + */ +__STATIC_INLINE void FL_VAO_XTLF_SetDriveLevel(VAO_Type *VAOx, uint32_t level) +{ + MODIFY_REG(VAOx->XTLFPR, VAO_XTLFPR_DRVCFG_Msk, level); +} + +/** + * @brief Get output drive Level + * @rmtoll XTLFPR DRVCFG FL_VAO_XTLF_GetDriveLevel + * @param VAOx VAO instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_VAO_XTLF_OUTPUT_LEVEL_NONE + * @arg @ref FL_VAO_XTLF_OUTPUT_LEVEL_1 + * @arg @ref FL_VAO_XTLF_OUTPUT_LEVEL_2 + * @arg @ref FL_VAO_XTLF_OUTPUT_LEVEL_3 + * @arg @ref FL_VAO_XTLF_OUTPUT_LEVEL_4 + * @arg @ref FL_VAO_XTLF_OUTPUT_LEVEL_5 + * @arg @ref FL_VAO_XTLF_OUTPUT_LEVEL_6 + * @arg @ref FL_VAO_XTLF_OUTPUT_LEVEL_7 + */ +__STATIC_INLINE uint32_t FL_VAO_XTLF_GetDriveLevel(VAO_Type *VAOx) +{ + return (uint32_t)(READ_BIT(VAOx->XTLFPR, VAO_XTLFPR_DRVCFG_Msk)); +} + +/** + * @brief Set XTLF working current + * @rmtoll XTLFPR XTLFIPW FL_VAO_XTLF_SetWorkCurrent + * @param VAOx VAO instance + * @param current This parameter can be one of the following values: + * @arg @ref FL_VAO_XTLF_WORK_CURRENT_850NA + * @arg @ref FL_VAO_XTLF_WORK_CURRENT_800NA + * @arg @ref FL_VAO_XTLF_WORK_CURRENT_750NA + * @arg @ref FL_VAO_XTLF_WORK_CURRENT_700NA + * @arg @ref FL_VAO_XTLF_WORK_CURRENT_650NA + * @arg @ref FL_VAO_XTLF_WORK_CURRENT_600NA + * @arg @ref FL_VAO_XTLF_WORK_CURRENT_550NA + * @arg @ref FL_VAO_XTLF_WORK_CURRENT_500NA + * @arg @ref FL_VAO_XTLF_WORK_CURRENT_450NA + * @arg @ref FL_VAO_XTLF_WORK_CURRENT_400NA + * @arg @ref FL_VAO_XTLF_WORK_CURRENT_350NA + * @arg @ref FL_VAO_XTLF_WORK_CURRENT_300NA + * @arg @ref FL_VAO_XTLF_WORK_CURRENT_250NA + * @arg @ref FL_VAO_XTLF_WORK_CURRENT_200NA + * @arg @ref FL_VAO_XTLF_WORK_CURRENT_150NA + * @arg @ref FL_VAO_XTLF_WORK_CURRENT_100NA + * @retval None + */ +__STATIC_INLINE void FL_VAO_XTLF_SetWorkCurrent(VAO_Type *VAOx, uint32_t current) +{ + MODIFY_REG(VAOx->XTLFPR, VAO_XTLFPR_XTLFIPW_Msk, current); +} + +/** + * @brief Get XTLF working current + * @rmtoll XTLFPR XTLFIPW FL_VAO_XTLF_GetWorkCurrent + * @param VAOx VAO instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_VAO_XTLF_WORK_CURRENT_850NA + * @arg @ref FL_VAO_XTLF_WORK_CURRENT_800NA + * @arg @ref FL_VAO_XTLF_WORK_CURRENT_750NA + * @arg @ref FL_VAO_XTLF_WORK_CURRENT_700NA + * @arg @ref FL_VAO_XTLF_WORK_CURRENT_650NA + * @arg @ref FL_VAO_XTLF_WORK_CURRENT_600NA + * @arg @ref FL_VAO_XTLF_WORK_CURRENT_550NA + * @arg @ref FL_VAO_XTLF_WORK_CURRENT_500NA + * @arg @ref FL_VAO_XTLF_WORK_CURRENT_450NA + * @arg @ref FL_VAO_XTLF_WORK_CURRENT_400NA + * @arg @ref FL_VAO_XTLF_WORK_CURRENT_350NA + * @arg @ref FL_VAO_XTLF_WORK_CURRENT_300NA + * @arg @ref FL_VAO_XTLF_WORK_CURRENT_250NA + * @arg @ref FL_VAO_XTLF_WORK_CURRENT_200NA + * @arg @ref FL_VAO_XTLF_WORK_CURRENT_150NA + * @arg @ref FL_VAO_XTLF_WORK_CURRENT_100NA + */ +__STATIC_INLINE uint32_t FL_VAO_XTLF_GetWorkCurrent(VAO_Type *VAOx) +{ + return (uint32_t)(READ_BIT(VAOx->XTLFPR, VAO_XTLFPR_XTLFIPW_Msk)); +} + +/** + * @brief XTLF detect interrupt enable + * @rmtoll FDIER LFDET_IE FL_VAO_EnableIT_XTLFFail + * @param VAOx VAO instance + * @retval None + */ +__STATIC_INLINE void FL_VAO_EnableIT_XTLFFail(VAO_Type *VAOx) +{ + SET_BIT(VAOx->FDIER, VAO_FDIER_LFDET_IE_Msk); +} + +/** + * @brief Get XTLF detect interrupt enable status + * @rmtoll FDIER LFDET_IE FL_VAO_IsEnabledIT_XTLFFail + * @param VAOx VAO instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_VAO_IsEnabledIT_XTLFFail(VAO_Type *VAOx) +{ + return (uint32_t)(READ_BIT(VAOx->FDIER, VAO_FDIER_LFDET_IE_Msk) == VAO_FDIER_LFDET_IE_Msk); +} + +/** + * @brief XTLF detect interrupt disable + * @rmtoll FDIER LFDET_IE FL_VAO_DisableIT_XTLFFail + * @param VAOx VAO instance + * @retval None + */ +__STATIC_INLINE void FL_VAO_DisableIT_XTLFFail(VAO_Type *VAOx) +{ + CLEAR_BIT(VAOx->FDIER, VAO_FDIER_LFDET_IE_Msk); +} + +/** + * @brief Get XTLF detect output + * @rmtoll FDISR LFDETO FL_VAO_GetXTLFFailOutput + * @param VAOx VAO instance + * @retval Returned value can be one of the following values: + */ +__STATIC_INLINE uint32_t FL_VAO_GetXTLFFailOutput(VAO_Type *VAOx) +{ + return (uint32_t)(READ_BIT(VAOx->FDISR, VAO_FDISR_LFDETO_Msk) >> VAO_FDISR_LFDETO_Pos); +} + +/** + * @brief Get XTLF detect interrupt flag + * @rmtoll FDISR LFDETIF FL_VAO_IsActiveFlag_XTLFFail + * @param VAOx VAO instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_VAO_IsActiveFlag_XTLFFail(VAO_Type *VAOx) +{ + return (uint32_t)(READ_BIT(VAOx->FDISR, VAO_FDISR_LFDETIF_Msk) == (VAO_FDISR_LFDETIF_Msk)); +} + +/** + * @brief Clear XTLF detect interrupt flag + * @rmtoll FDISR LFDETIF FL_VAO_ClearFlag_XTLFFail + * @param VAOx VAO instance + * @retval None + */ +__STATIC_INLINE void FL_VAO_ClearFlag_XTLFFail(VAO_Type *VAOx) +{ + WRITE_REG(VAOx->FDISR, VAO_FDISR_LFDETIF_Msk); +} + +/** + * @brief PH15 input enable + * @rmtoll INEN PHINEN FL_VAO_GPIO_EnablePH15Input + * @param VAOx VAO instance + * @retval None + */ +__STATIC_INLINE void FL_VAO_GPIO_EnablePH15Input(VAO_Type *VAOx) +{ + SET_BIT(VAOx->INEN, VAO_INEN_PHINEN_Msk); +} + +/** + * @brief Get PH15 input enable status + * @rmtoll INEN PHINEN FL_VAO_GPIO_IsEnabledPH15Input + * @param VAOx VAO instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_VAO_GPIO_IsEnabledPH15Input(VAO_Type *VAOx) +{ + return (uint32_t)(READ_BIT(VAOx->INEN, VAO_INEN_PHINEN_Msk) == VAO_INEN_PHINEN_Msk); +} + +/** + * @brief PH15 input disable + * @rmtoll INEN PHINEN FL_VAO_GPIO_DisablePH15Input + * @param VAOx VAO instance + * @retval None + */ +__STATIC_INLINE void FL_VAO_GPIO_DisablePH15Input(VAO_Type *VAOx) +{ + CLEAR_BIT(VAOx->INEN, VAO_INEN_PHINEN_Msk); +} + +/** + * @brief PH15 pullup enable + * @rmtoll PUEN PHPUEN FL_VAO_GPIO_EnablePH15Pullup + * @param VAOx VAO instance + * @retval None + */ +__STATIC_INLINE void FL_VAO_GPIO_EnablePH15Pullup(VAO_Type *VAOx) +{ + SET_BIT(VAOx->PUEN, VAO_PUEN_PHPUEN_Msk); +} + +/** + * @brief Get PH15 pullup enable status + * @rmtoll PUEN PHPUEN FL_VAO_GPIO_IsEnabledPH15Pullup + * @param VAOx VAO instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_VAO_GPIO_IsEnabledPH15Pullup(VAO_Type *VAOx) +{ + return (uint32_t)(READ_BIT(VAOx->PUEN, VAO_PUEN_PHPUEN_Msk) == VAO_PUEN_PHPUEN_Msk); +} + +/** + * @brief PH15 pullup disable + * @rmtoll PUEN PHPUEN FL_VAO_GPIO_DisablePH15Pullup + * @param VAOx VAO instance + * @retval None + */ +__STATIC_INLINE void FL_VAO_GPIO_DisablePH15Pullup(VAO_Type *VAOx) +{ + CLEAR_BIT(VAOx->PUEN, VAO_PUEN_PHPUEN_Msk); +} + +/** + * @brief PH15 pullup enable + * @rmtoll ODEN PHODEN FL_VAO_GPIO_EnablePH15OpenDrain + * @param VAOx VAO instance + * @retval None + */ +__STATIC_INLINE void FL_VAO_GPIO_EnablePH15OpenDrain(VAO_Type *VAOx) +{ + SET_BIT(VAOx->ODEN, VAO_ODEN_PHODEN_Msk); +} + +/** + * @brief Get PH15 pullup enable status + * @rmtoll ODEN PHODEN FL_VAO_GPIO_IsEnabledPH15OpenDrain + * @param VAOx VAO instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_VAO_GPIO_IsEnabledPH15OpenDrain(VAO_Type *VAOx) +{ + return (uint32_t)(READ_BIT(VAOx->ODEN, VAO_ODEN_PHODEN_Msk) == VAO_ODEN_PHODEN_Msk); +} + +/** + * @brief PH15 pullup disable + * @rmtoll ODEN PHODEN FL_VAO_GPIO_DisablePH15OpenDrain + * @param VAOx VAO instance + * @retval None + */ +__STATIC_INLINE void FL_VAO_GPIO_DisablePH15OpenDrain(VAO_Type *VAOx) +{ + CLEAR_BIT(VAOx->ODEN, VAO_ODEN_PHODEN_Msk); +} + +/** + * @brief Set PH15 mode + * @rmtoll FCR PH15FCR FL_VAO_GPIO_SetPH15Mode + * @param VAOx VAO instance + * @param mode This parameter can be one of the following values: + * @arg @ref FL_VAO_PH15_MODE_INPUT + * @arg @ref FL_VAO_PH15_MODE_OUTPUT + * @arg @ref FL_VAO_PH15_MODE_RTCOUT + * @retval None + */ +__STATIC_INLINE void FL_VAO_GPIO_SetPH15Mode(VAO_Type *VAOx, uint32_t mode) +{ + MODIFY_REG(VAOx->FCR, VAO_FCR_PH15FCR_Msk, mode); +} + +/** + * @brief Get PH15 mode + * @rmtoll FCR PH15FCR FL_VAO_GPIO_GetPH15Mode + * @param VAOx VAO instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_VAO_PH15_MODE_INPUT + * @arg @ref FL_VAO_PH15_MODE_OUTPUT + * @arg @ref FL_VAO_PH15_MODE_RTCOUT + */ +__STATIC_INLINE uint32_t FL_VAO_GPIO_GetPH15Mode(VAO_Type *VAOx) +{ + return (uint32_t)(READ_BIT(VAOx->FCR, VAO_FCR_PH15FCR_Msk)); +} + +/** + * @brief Set PH15 output data register + * @rmtoll DOR PHDO FL_VAO_GPIO_WritePH15Output + * @param VAOx VAO instance + * @param data + * @retval None + */ +__STATIC_INLINE void FL_VAO_GPIO_WritePH15Output(VAO_Type *VAOx, uint32_t data) +{ + MODIFY_REG(VAOx->DOR, (0x1U << 15U), (data << 15U)); +} + +/** + * @brief Get PH15 output data + * @rmtoll DOR PHDO FL_VAO_GPIO_ReadPH15Output + * @param VAOx VAO instance + * @retval + */ +__STATIC_INLINE uint32_t FL_VAO_GPIO_ReadPH15Output(VAO_Type *VAOx) +{ + return (uint32_t)(READ_BIT(VAOx->DOR, (0x1U << 15U)) >> 15U); +} + +/** + * @brief Get PH15 input data + * @rmtoll DIR PHDIN FL_VAO_GPIO_ReadPH15Input + * @param VAOx VAO instance + * @retval + */ +__STATIC_INLINE uint32_t FL_VAO_GPIO_ReadPH15Input(VAO_Type *VAOx) +{ + return (uint32_t)(READ_BIT(VAOx->DIR, (0x1U << 15U)) >> 15U); +} + +/** + * @brief Set PH15 input low threshold value + * @rmtoll VILR PHVIL15 FL_VAO_GPIO_SetPH15Threshold + * @param VAOx VAO instance + * @param value This parameter can be one of the following values: + * @arg @ref FL_VAO_PH15_THRESHOLD_NORMAL + * @arg @ref FL_VAO_PH15_THRESHOLD_LOW + * @retval None + */ +__STATIC_INLINE void FL_VAO_GPIO_SetPH15Threshold(VAO_Type *VAOx, uint32_t value) +{ + MODIFY_REG(VAOx->VILR, VAO_VILR_PHVIL15_Msk, value); +} + +/** + * @brief Get PH15 input low threshold value + * @rmtoll VILR PHVIL15 FL_VAO_GPIO_GetPH15Threshold + * @param VAOx VAO instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_VAO_PH15_THRESHOLD_NORMAL + * @arg @ref FL_VAO_PH15_THRESHOLD_LOW + */ +__STATIC_INLINE uint32_t FL_VAO_GPIO_GetPH15Threshold(VAO_Type *VAOx) +{ + return (uint32_t)(READ_BIT(VAOx->VILR, VAO_VILR_PHVIL15_Msk)); +} + +/** + * @} + */ + +/** @defgroup VAO_FL_EF_Init Initialization and de-initialization functions + * @{ + */ +//#warning "PLEASE ANNOUCE THE INIT AND DEINIT FUNCTIONS HERE!!!" +FL_ErrorStatus FL_VAO_DeInit(VAO_Type *VAOx); +FL_ErrorStatus FL_VAO_IO_Init(VAO_Type *VAOx, FL_VAO_IO_InitTypeDef *VAO_InitStruct); +FL_ErrorStatus FL_VAO_XTLF_Init(VAO_Type *VAOx, FL_VAO_XTLF_InitTypeDef *VAO_XTLF_InitStruct); +void FL_VAO_IO_StructInit(FL_VAO_IO_InitTypeDef *VAO_InitStruct); +void FL_VAO_XTLF_StructInit(FL_VAO_XTLF_InitTypeDef *VAO_XTLF_InitStruct); +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif /* __FM33LG0XX_FL_VAO_H*/ + +/*************************Py_Code_Generator Version: 0.1-0.11-0.1 @ 2020-09-14*************************/ +/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/ diff --git a/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_vref.h b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_vref.h new file mode 100644 index 0000000..4244aa6 --- /dev/null +++ b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_vref.h @@ -0,0 +1,513 @@ + /** + ******************************************************************************************************* + * @file fm33lg0xx_fl_vref.h + * @author FMSH Application Team + * @brief Head file of VREF FL Module + ******************************************************************************************************* + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + + + +/* Define to prevent recursive inclusion---------------------------------------------------------------*/ +#ifndef __FM33LG0XX_FL_VREF_H +#define __FM33LG0XX_FL_VREF_H + +#ifdef __cplusplus +extern "C" { +#endif +/* Includes -------------------------------------------------------------------------------------------*/ +#include "fm33lg0xx_fl_def.h" +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @defgroup VREF VREF + * @brief VREF FL driver + * @{ + */ + +/* Exported types -------------------------------------------------------------------------------------*/ +/** @defgroup VREF_FL_ES_INIT VREF Exported Init structures + * @{ + */ + +/** + * @brief FL VREF Init Sturcture definition + */ + +/** + * @} + */ +/* Exported constants ---------------------------------------------------------------------------------*/ +/** @defgroup VREF_FL_Exported_Constants VREF Exported Constants + * @{ + */ + +#define VREF_CR_VREF_EN_Pos (0U) +#define VREF_CR_VREF_EN_Msk (0x1U << VREF_CR_VREF_EN_Pos) +#define VREF_CR_VREF_EN VREF_CR_VREF_EN_Msk + +#define VREF_CR_PTAT_EN_Pos (1U) +#define VREF_CR_PTAT_EN_Msk (0x1U << VREF_CR_PTAT_EN_Pos) +#define VREF_CR_PTAT_EN VREF_CR_PTAT_EN_Msk + +#define VREF_ISR_FLAG_Pos (8U) +#define VREF_ISR_FLAG_Msk (0x1U << VREF_ISR_FLAG_Pos) +#define VREF_ISR_FLAG VREF_ISR_FLAG_Msk + +#define VREF_ISR_RDY_Pos (1U) +#define VREF_ISR_RDY_Msk (0x1U << VREF_ISR_RDY_Pos) +#define VREF_ISR_RDY VREF_ISR_RDY_Msk + +#define VREF_ISR_IF_Pos (0U) +#define VREF_ISR_IF_Msk (0x1U << VREF_ISR_IF_Pos) +#define VREF_ISR_IF VREF_ISR_IF_Msk + +#define VREF_IER_IE_Pos (0U) +#define VREF_IER_IE_Msk (0x1U << VREF_IER_IE_Pos) +#define VREF_IER_IE VREF_IER_IE_Msk + +#define VREF_BUFCR_AVREFBUF_OUTEN_Pos (5U) +#define VREF_BUFCR_AVREFBUF_OUTEN_Msk (0x1U << VREF_BUFCR_AVREFBUF_OUTEN_Pos) +#define VREF_BUFCR_AVREFBUF_OUTEN VREF_BUFCR_AVREFBUF_OUTEN_Msk + +#define VREF_BUFCR_AVREFBUF_EN_Pos (4U) +#define VREF_BUFCR_AVREFBUF_EN_Msk (0x1U << VREF_BUFCR_AVREFBUF_EN_Pos) +#define VREF_BUFCR_AVREFBUF_EN VREF_BUFCR_AVREFBUF_EN_Msk + +#define VREF_BUFCR_VPTATBUFFER_OUTEN_Pos (3U) +#define VREF_BUFCR_VPTATBUFFER_OUTEN_Msk (0x1U << VREF_BUFCR_VPTATBUFFER_OUTEN_Pos) +#define VREF_BUFCR_VPTATBUFFER_OUTEN VREF_BUFCR_VPTATBUFFER_OUTEN_Msk + +#define VREF_BUFCR_VPTATBUFFER_EN_Pos (2U) +#define VREF_BUFCR_VPTATBUFFER_EN_Msk (0x1U << VREF_BUFCR_VPTATBUFFER_EN_Pos) +#define VREF_BUFCR_VPTATBUFFER_EN VREF_BUFCR_VPTATBUFFER_EN_Msk + +#define VREF_BUFCR_VREFBUFFER_OUTEN_Pos (1U) +#define VREF_BUFCR_VREFBUFFER_OUTEN_Msk (0x1U << VREF_BUFCR_VREFBUFFER_OUTEN_Pos) +#define VREF_BUFCR_VREFBUFFER_OUTEN VREF_BUFCR_VREFBUFFER_OUTEN_Msk + +#define VREF_BUFCR_VREFBUFFER_EN_Pos (0U) +#define VREF_BUFCR_VREFBUFFER_EN_Msk (0x1U << VREF_BUFCR_VREFBUFFER_EN_Pos) +#define VREF_BUFCR_VREFBUFFER_EN VREF_BUFCR_VREFBUFFER_EN_Msk + + + + + + +/** + * @} + */ +/* Exported functions ---------------------------------------------------------------------------------*/ +/** @defgroup VREF_FL_Exported_Functions VREF Exported Functions + * @{ + */ + +/** + * @brief Enable VREF + * @rmtoll CR VREF_EN FL_VREF_Enable + * @param VREFx VREF instance + * @retval None + */ +__STATIC_INLINE void FL_VREF_Enable(VREF_Type *VREFx) +{ + SET_BIT(VREFx->CR, VREF_CR_VREF_EN_Msk); +} + +/** + * @brief Get VREF Enable Status + * @rmtoll CR VREF_EN FL_VREF_IsEnabled + * @param VREFx VREF instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_VREF_IsEnabled(VREF_Type *VREFx) +{ + return (uint32_t)(READ_BIT(VREFx->CR, VREF_CR_VREF_EN_Msk) == VREF_CR_VREF_EN_Msk); +} + +/** + * @brief Disable VREF + * @rmtoll CR VREF_EN FL_VREF_Disable + * @param VREFx VREF instance + * @retval None + */ +__STATIC_INLINE void FL_VREF_Disable(VREF_Type *VREFx) +{ + CLEAR_BIT(VREFx->CR, VREF_CR_VREF_EN_Msk); +} + +/** + * @brief Enable Temperatue Sensor + * @rmtoll CR PTAT_EN FL_VREF_EnableTemperatureSensor + * @param VREFx VREF instance + * @retval None + */ +__STATIC_INLINE void FL_VREF_EnableTemperatureSensor(VREF_Type *VREFx) +{ + SET_BIT(VREFx->CR, VREF_CR_PTAT_EN_Msk); +} + +/** + * @brief Get Temperatue Sensor Enable Status + * @rmtoll CR PTAT_EN FL_VREF_IsEnabledTemperatureSensor + * @param VREFx VREF instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_VREF_IsEnabledTemperatureSensor(VREF_Type *VREFx) +{ + return (uint32_t)(READ_BIT(VREFx->CR, VREF_CR_PTAT_EN_Msk) == VREF_CR_PTAT_EN_Msk); +} + +/** + * @brief Disable Temperatue Sensor + * @rmtoll CR PTAT_EN FL_VREF_DisableTemperatureSensor + * @param VREFx VREF instance + * @retval None + */ +__STATIC_INLINE void FL_VREF_DisableTemperatureSensor(VREF_Type *VREFx) +{ + CLEAR_BIT(VREFx->CR, VREF_CR_PTAT_EN_Msk); +} + +/** + * @brief Get VREF Setable Flag From Analog + * @rmtoll ISR FLAG FL_VREF_IsActiveFlag_AnalogReady + * @param VREFx VREF instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_VREF_IsActiveFlag_AnalogReady(VREF_Type *VREFx) +{ + return (uint32_t)(READ_BIT(VREFx->ISR, VREF_ISR_FLAG_Msk) == (VREF_ISR_FLAG_Msk)); +} + +/** + * @brief Get VREF Ready Flag + * @rmtoll ISR RDY FL_VREF_IsActiveFlag_DigitalReady + * @param VREFx VREF instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_VREF_IsActiveFlag_DigitalReady(VREF_Type *VREFx) +{ + return (uint32_t)(READ_BIT(VREFx->ISR, VREF_ISR_RDY_Msk) == (VREF_ISR_RDY_Msk)); +} + +/** + * @brief Get VREF Ready Interrupt Flag + * @rmtoll ISR IF FL_VREF_IsActiveFlag_Ready + * @param VREFx VREF instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_VREF_IsActiveFlag_Ready(VREF_Type *VREFx) +{ + return (uint32_t)(READ_BIT(VREFx->ISR, VREF_ISR_IF_Msk) == (VREF_ISR_IF_Msk)); +} + +/** + * @brief Clear VREF Ready Interrupt Flag + * @rmtoll ISR IF FL_VREF_ClearFlag_Ready + * @param VREFx VREF instance + * @retval None + */ +__STATIC_INLINE void FL_VREF_ClearFlag_Ready(VREF_Type *VREFx) +{ + WRITE_REG(VREFx->ISR, VREF_ISR_IF_Msk); +} + +/** + * @brief Enable VREF Ready Interrupt + * @rmtoll IER IE FL_VREF_EnableIT_Ready + * @param VREFx VREF instance + * @retval None + */ +__STATIC_INLINE void FL_VREF_EnableIT_Ready(VREF_Type *VREFx) +{ + SET_BIT(VREFx->IER, VREF_IER_IE_Msk); +} + +/** + * @brief Get VREF Ready Interrupt Enable Status + * @rmtoll IER IE FL_VREF_IsEnabledIT_Ready + * @param VREFx VREF instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_VREF_IsEnabledIT_Ready(VREF_Type *VREFx) +{ + return (uint32_t)(READ_BIT(VREFx->IER, VREF_IER_IE_Msk) == VREF_IER_IE_Msk); +} + +/** + * @brief Disable VREF Ready Interrupt + * @rmtoll IER IE FL_VREF_DisableIT_Ready + * @param VREFx VREF instance + * @retval None + */ +__STATIC_INLINE void FL_VREF_DisableIT_Ready(VREF_Type *VREFx) +{ + CLEAR_BIT(VREFx->IER, VREF_IER_IE_Msk); +} + +/** + * @brief Enable AVREF Buffer Output + * @rmtoll BUFCR AVREFBUF_OUTEN FL_VREF_EnableAVREFBufferOutput + * @param VREFx VREF instance + * @retval None + */ +__STATIC_INLINE void FL_VREF_EnableAVREFBufferOutput(VREF_Type *VREFx) +{ + SET_BIT(VREFx->BUFCR, VREF_BUFCR_AVREFBUF_OUTEN_Msk); +} + +/** + * @brief Get AVREF Buffer Output Enable Status + * @rmtoll BUFCR AVREFBUF_OUTEN FL_VREF_IsEnabledAVREFBufferOutput + * @param VREFx VREF instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_VREF_IsEnabledAVREFBufferOutput(VREF_Type *VREFx) +{ + return (uint32_t)(READ_BIT(VREFx->BUFCR, VREF_BUFCR_AVREFBUF_OUTEN_Msk) == VREF_BUFCR_AVREFBUF_OUTEN_Msk); +} + +/** + * @brief Disable AVREF Buffer Output + * @rmtoll BUFCR AVREFBUF_OUTEN FL_VREF_DisableAVREFBufferOutput + * @param VREFx VREF instance + * @retval None + */ +__STATIC_INLINE void FL_VREF_DisableAVREFBufferOutput(VREF_Type *VREFx) +{ + CLEAR_BIT(VREFx->BUFCR, VREF_BUFCR_AVREFBUF_OUTEN_Msk); +} + +/** + * @brief Enable AVREF Buffer + * @rmtoll BUFCR AVREFBUF_EN FL_VREF_EnableAVREFBuffer + * @param VREFx VREF instance + * @retval None + */ +__STATIC_INLINE void FL_VREF_EnableAVREFBuffer(VREF_Type *VREFx) +{ + SET_BIT(VREFx->BUFCR, VREF_BUFCR_AVREFBUF_EN_Msk); +} + +/** + * @brief Get AVREF Buffer Enable Status + * @rmtoll BUFCR AVREFBUF_EN FL_VREF_IsEnabledAVREFBuffer + * @param VREFx VREF instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_VREF_IsEnabledAVREFBuffer(VREF_Type *VREFx) +{ + return (uint32_t)(READ_BIT(VREFx->BUFCR, VREF_BUFCR_AVREFBUF_EN_Msk) == VREF_BUFCR_AVREFBUF_EN_Msk); +} + +/** + * @brief Disable AVREF Buffer + * @rmtoll BUFCR AVREFBUF_EN FL_VREF_DisableAVREFBuffer + * @param VREFx VREF instance + * @retval None + */ +__STATIC_INLINE void FL_VREF_DisableAVREFBuffer(VREF_Type *VREFx) +{ + CLEAR_BIT(VREFx->BUFCR, VREF_BUFCR_AVREFBUF_EN_Msk); +} + +/** + * @brief Enable VPTAT Buffer Output + * @rmtoll BUFCR VPTATBUFFER_OUTEN FL_VREF_EnableVPTATBufferOutput + * @param VREFx VREF instance + * @retval None + */ +__STATIC_INLINE void FL_VREF_EnableVPTATBufferOutput(VREF_Type *VREFx) +{ + SET_BIT(VREFx->BUFCR, VREF_BUFCR_VPTATBUFFER_OUTEN_Msk); +} + +/** + * @brief Get VPTAT Buffer Output Enable Status + * @rmtoll BUFCR VPTATBUFFER_OUTEN FL_VREF_IsEnabledVPTATBufferOutput + * @param VREFx VREF instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_VREF_IsEnabledVPTATBufferOutput(VREF_Type *VREFx) +{ + return (uint32_t)(READ_BIT(VREFx->BUFCR, VREF_BUFCR_VPTATBUFFER_OUTEN_Msk) == VREF_BUFCR_VPTATBUFFER_OUTEN_Msk); +} + +/** + * @brief Disable VPTAT Buffer Output + * @rmtoll BUFCR VPTATBUFFER_OUTEN FL_VREF_DisableVPTATBufferOutput + * @param VREFx VREF instance + * @retval None + */ +__STATIC_INLINE void FL_VREF_DisableVPTATBufferOutput(VREF_Type *VREFx) +{ + CLEAR_BIT(VREFx->BUFCR, VREF_BUFCR_VPTATBUFFER_OUTEN_Msk); +} + +/** + * @brief Enable VPTAT Buffer + * @rmtoll BUFCR VPTATBUFFER_EN FL_VREF_EnableVPTATBuffer + * @param VREFx VREF instance + * @retval None + */ +__STATIC_INLINE void FL_VREF_EnableVPTATBuffer(VREF_Type *VREFx) +{ + SET_BIT(VREFx->BUFCR, VREF_BUFCR_VPTATBUFFER_EN_Msk); +} + +/** + * @brief Get VPTAT Buffer Enable Status + * @rmtoll BUFCR VPTATBUFFER_EN FL_VREF_IsEnabledVPTATBuffer + * @param VREFx VREF instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_VREF_IsEnabledVPTATBuffer(VREF_Type *VREFx) +{ + return (uint32_t)(READ_BIT(VREFx->BUFCR, VREF_BUFCR_VPTATBUFFER_EN_Msk) == VREF_BUFCR_VPTATBUFFER_EN_Msk); +} + +/** + * @brief Disable VPTAT Buffer + * @rmtoll BUFCR VPTATBUFFER_EN FL_VREF_DisableVPTATBuffer + * @param VREFx VREF instance + * @retval None + */ +__STATIC_INLINE void FL_VREF_DisableVPTATBuffer(VREF_Type *VREFx) +{ + CLEAR_BIT(VREFx->BUFCR, VREF_BUFCR_VPTATBUFFER_EN_Msk); +} + +/** + * @brief Enable VREF Buffer Output + * @rmtoll BUFCR VREFBUFFER_OUTEN FL_VREF_EnableVREFBufferOutput + * @param VREFx VREF instance + * @retval None + */ +__STATIC_INLINE void FL_VREF_EnableVREFBufferOutput(VREF_Type *VREFx) +{ + SET_BIT(VREFx->BUFCR, VREF_BUFCR_VREFBUFFER_OUTEN_Msk); +} + +/** + * @brief Get VREF Buffer Output Enable Status + * @rmtoll BUFCR VREFBUFFER_OUTEN FL_VREF_IsEnabledVREFBufferOutput + * @param VREFx VREF instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_VREF_IsEnabledVREFBufferOutput(VREF_Type *VREFx) +{ + return (uint32_t)(READ_BIT(VREFx->BUFCR, VREF_BUFCR_VREFBUFFER_OUTEN_Msk) == VREF_BUFCR_VREFBUFFER_OUTEN_Msk); +} + +/** + * @brief Disable VREF Buffer Output + * @rmtoll BUFCR VREFBUFFER_OUTEN FL_VREF_DisableVREFBufferOutput + * @param VREFx VREF instance + * @retval None + */ +__STATIC_INLINE void FL_VREF_DisableVREFBufferOutput(VREF_Type *VREFx) +{ + CLEAR_BIT(VREFx->BUFCR, VREF_BUFCR_VREFBUFFER_OUTEN_Msk); +} + +/** + * @brief Enable VREF Buffer + * @rmtoll BUFCR VREFBUFFER_EN FL_VREF_EnableVREFBuffer + * @param VREFx VREF instance + * @retval None + */ +__STATIC_INLINE void FL_VREF_EnableVREFBuffer(VREF_Type *VREFx) +{ + SET_BIT(VREFx->BUFCR, VREF_BUFCR_VREFBUFFER_EN_Msk); +} + +/** + * @brief Get VREF Buffer Enable Status + * @rmtoll BUFCR VREFBUFFER_EN FL_VREF_IsEnabledVREFBuffer + * @param VREFx VREF instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_VREF_IsEnabledVREFBuffer(VREF_Type *VREFx) +{ + return (uint32_t)(READ_BIT(VREFx->BUFCR, VREF_BUFCR_VREFBUFFER_EN_Msk) == VREF_BUFCR_VREFBUFFER_EN_Msk); +} + +/** + * @brief Disable VREF Buffer + * @rmtoll BUFCR VREFBUFFER_EN FL_VREF_DisableVREFBuffer + * @param VREFx VREF instance + * @retval None + */ +__STATIC_INLINE void FL_VREF_DisableVREFBuffer(VREF_Type *VREFx) +{ + CLEAR_BIT(VREFx->BUFCR, VREF_BUFCR_VREFBUFFER_EN_Msk); +} + +/** + * @} + */ + +/** @defgroup VREF_FL_EF_Init Initialization and de-initialization functions + * @{ + */ + + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif /* __FM33LG0XX_FL_VREF_H*/ + +/*************************Py_Code_Generator Version: 0.1-0.11-0.1 @ 2020-09-12*************************/ +/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/ diff --git a/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_vrefp.h b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_vrefp.h new file mode 100644 index 0000000..a16cb8e --- /dev/null +++ b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_vrefp.h @@ -0,0 +1,546 @@ + /** + ******************************************************************************************************* + * @file fm33lg0xx_fl_vrefp.h + * @author FMSH Application Team + * @brief Head file of VREFP FL Module + ******************************************************************************************************* + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + + + +/* Define to prevent recursive inclusion---------------------------------------------------------------*/ +#ifndef __FM33LG0XX_FL_VREFP_H +#define __FM33LG0XX_FL_VREFP_H + +#ifdef __cplusplus +extern "C" { +#endif +/* Includes -------------------------------------------------------------------------------------------*/ +#include "fm33lg0xx_fl_def.h" +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @defgroup VREFP VREFP + * @brief VREFP FL driver + * @{ + */ + +/* Exported types -------------------------------------------------------------------------------------*/ +/** @defgroup VREFP_FL_ES_INIT VREFP Exported Init structures + * @{ + */ + +/** + * @brief FL VREFP Init Sturcture definition + */ +typedef struct +{ + /* 输出电压的TRIM值 */ + uint32_t voltageTrim; + /* 输出电压值 */ + uint32_t outputVoltage; + /* VREFP输出模式 */ + uint32_t mode; + /* 间歇模式下单次驱动时间 */ + uint32_t timeOfDriving; + /* 间歇模式下使能周期 */ + uint32_t timeOfPeriod; + +} FL_VREFP_InitTypeDef; +/** + * @} + */ +/* Exported constants ---------------------------------------------------------------------------------*/ +/** @defgroup VREFP_FL_Exported_Constants VREFP Exported Constants + * @{ + */ + +#define VREFP_CR_DENDIE_Pos (2U) +#define VREFP_CR_DENDIE_Msk (0x1U << VREFP_CR_DENDIE_Pos) +#define VREFP_CR_DENDIE VREFP_CR_DENDIE_Msk + +#define VREFP_CR_POVIE_Pos (1U) +#define VREFP_CR_POVIE_Msk (0x1U << VREFP_CR_POVIE_Pos) +#define VREFP_CR_POVIE VREFP_CR_POVIE_Msk + +#define VREFP_CR_EN_Pos (0U) +#define VREFP_CR_EN_Msk (0x1U << VREFP_CR_EN_Pos) +#define VREFP_CR_EN VREFP_CR_EN_Msk + +#define VREFP_CFGR_VRS_Pos (8U) +#define VREFP_CFGR_VRS_Msk (0x7U << VREFP_CFGR_VRS_Pos) +#define VREFP_CFGR_VRS VREFP_CFGR_VRS_Msk + +#define VREFP_CFGR_TPERIOD_Pos (5U) +#define VREFP_CFGR_TPERIOD_Msk (0x7U << VREFP_CFGR_TPERIOD_Pos) +#define VREFP_CFGR_TPERIOD VREFP_CFGR_TPERIOD_Msk + +#define VREFP_CFGR_TDRV_Pos (2U) +#define VREFP_CFGR_TDRV_Msk (0x7U << VREFP_CFGR_TDRV_Pos) +#define VREFP_CFGR_TDRV VREFP_CFGR_TDRV_Msk + +#define VREFP_CFGR_LPM_Pos (1U) +#define VREFP_CFGR_LPM_Msk (0x1U << VREFP_CFGR_LPM_Pos) +#define VREFP_CFGR_LPM VREFP_CFGR_LPM_Msk + +#define VREFP_ISR_BUSY_Pos (2U) +#define VREFP_ISR_BUSY_Msk (0x1U << VREFP_ISR_BUSY_Pos) +#define VREFP_ISR_BUSY VREFP_ISR_BUSY_Msk + +#define VREFP_ISR_DEND_Pos (1U) +#define VREFP_ISR_DEND_Msk (0x1U << VREFP_ISR_DEND_Pos) +#define VREFP_ISR_DEND VREFP_ISR_DEND_Msk + +#define VREFP_ISR_POV_Pos (0U) +#define VREFP_ISR_POV_Msk (0x1U << VREFP_ISR_POV_Pos) +#define VREFP_ISR_POV VREFP_ISR_POV_Msk + + + + + + +#define FL_VREFP_OUTPUT_VOLTAGE_2P0V (0x0U << VREFP_CFGR_VRS_Pos) +#define FL_VREFP_OUTPUT_VOLTAGE_2P5V (0x1U << VREFP_CFGR_VRS_Pos) +#define FL_VREFP_OUTPUT_VOLTAGE_3P0V (0x2U << VREFP_CFGR_VRS_Pos) +#define FL_VREFP_OUTPUT_VOLTAGE_4P5V (0x3U << VREFP_CFGR_VRS_Pos) +#define FL_VREFP_OUTPUT_VOLTAGE_1P5V (0x4U << VREFP_CFGR_VRS_Pos) + + +#define FL_VREFP_ENABLE_PERIOD_1MS (0x0U << VREFP_CFGR_TPERIOD_Pos) +#define FL_VREFP_ENABLE_PERIOD_4MS (0x1U << VREFP_CFGR_TPERIOD_Pos) +#define FL_VREFP_ENABLE_PERIOD_16MS (0x2U << VREFP_CFGR_TPERIOD_Pos) +#define FL_VREFP_ENABLE_PERIOD_32MS (0x3U << VREFP_CFGR_TPERIOD_Pos) +#define FL_VREFP_ENABLE_PERIOD_64MS (0x4U << VREFP_CFGR_TPERIOD_Pos) +#define FL_VREFP_ENABLE_PERIOD_256MS (0x5U << VREFP_CFGR_TPERIOD_Pos) +#define FL_VREFP_ENABLE_PERIOD_1000MS (0x6U << VREFP_CFGR_TPERIOD_Pos) +#define FL_VREFP_ENABLE_PERIOD_4000MS (0x7U << VREFP_CFGR_TPERIOD_Pos) + + +#define FL_VREFP_DRIVING_TIME_4LSCLK (0x0U << VREFP_CFGR_TDRV_Pos) +#define FL_VREFP_DRIVING_TIME_8LSCLK (0x1U << VREFP_CFGR_TDRV_Pos) +#define FL_VREFP_DRIVING_TIME_16LSCLK (0x2U << VREFP_CFGR_TDRV_Pos) +#define FL_VREFP_DRIVING_TIME_32LSCLK (0x3U << VREFP_CFGR_TDRV_Pos) +#define FL_VREFP_DRIVING_TIME_64LSCLK (0x4U << VREFP_CFGR_TDRV_Pos) +#define FL_VREFP_DRIVING_TIME_128LSCLK (0x5U << VREFP_CFGR_TDRV_Pos) +#define FL_VREFP_DRIVING_TIME_256LSCLK (0x6U << VREFP_CFGR_TDRV_Pos) +#define FL_VREFP_DRIVING_TIME_512LSCLK (0x7U << VREFP_CFGR_TDRV_Pos) + + +#define FL_VREFP_WORK_MODE_CONTINUOUS (0x0U << VREFP_CFGR_LPM_Pos) +#define FL_VREFP_WORK_MODE_PERIODIC (0x1U << VREFP_CFGR_LPM_Pos) + + +/* 原始值 */ +#define VREFP_OUTPUT_VOLTAGE_2P0V_TRIM (*(uint32_t*)0x1FFFFA90) +#define VREFP_OUTPUT_VOLTAGE_2P5V_TRIM (*(uint32_t*)0x1FFFFA8C) +#define VREFP_OUTPUT_VOLTAGE_3P0V_TRIM (*(uint32_t*)0x1FFFFA88) +#define VREFP_OUTPUT_VOLTAGE_4P5V_TRIM (*(uint32_t*)0x1FFFFA84) +#define VREFP_OUTPUT_VOLTAGE_1P5V_TRIM (*(uint32_t*)0x1FFFFA94) + +/* 备份值 */ +#define VREFP_OUTPUT_VOLTAGE_2P0V_TRIM_BKP (*(uint16_t*)0x1FFFFBA6) +#define VREFP_OUTPUT_VOLTAGE_2P5V_TRIM_BKP (*(uint16_t*)0x1FFFFBA4) +#define VREFP_OUTPUT_VOLTAGE_3P0V_TRIM_BKP (*(uint16_t*)0x1FFFFBA2) +#define VREFP_OUTPUT_VOLTAGE_4P5V_TRIM_BKP (*(uint16_t*)0x1FFFFBA0) +#define VREFP_OUTPUT_VOLTAGE_1P5V_TRIM_BKP (*(uint16_t*)0x1FFFFBA8) + +/* 最终值 */ +#define FL_VREFP_OUTPUT_VOLTAGE_2P0V_TRIM (LDT_CHECK(VREFP_OUTPUT_VOLTAGE_2P0V_TRIM, VREFP_OUTPUT_VOLTAGE_2P0V_TRIM_BKP) & 0xff) +#define FL_VREFP_OUTPUT_VOLTAGE_2P5V_TRIM (LDT_CHECK(VREFP_OUTPUT_VOLTAGE_2P5V_TRIM, VREFP_OUTPUT_VOLTAGE_2P5V_TRIM_BKP) & 0xff) +#define FL_VREFP_OUTPUT_VOLTAGE_3P0V_TRIM (LDT_CHECK(VREFP_OUTPUT_VOLTAGE_3P0V_TRIM, VREFP_OUTPUT_VOLTAGE_3P0V_TRIM_BKP) & 0xff) +#define FL_VREFP_OUTPUT_VOLTAGE_4P5V_TRIM (LDT_CHECK(VREFP_OUTPUT_VOLTAGE_4P5V_TRIM, VREFP_OUTPUT_VOLTAGE_4P5V_TRIM_BKP) & 0xff) +#define FL_VREFP_OUTPUT_VOLTAGE_1P5V_TRIM (LDT_CHECK(VREFP_OUTPUT_VOLTAGE_1P5V_TRIM, VREFP_OUTPUT_VOLTAGE_1P5V_TRIM_BKP) & 0xff) + +/** + * @} + */ +/* Exported functions ---------------------------------------------------------------------------------*/ +/** @defgroup VREFP_FL_Exported_Functions VREFP Exported Functions + * @{ + */ + +/** + * @brief Driving end interrupt enable + * @rmtoll CR DENDIE FL_VREFP_EnableIT_DrivingEnd + * @param VREFPx VREFP instance + * @retval None + */ +__STATIC_INLINE void FL_VREFP_EnableIT_DrivingEnd(VREFP_Type *VREFPx) +{ + SET_BIT(VREFPx->CR, VREFP_CR_DENDIE_Msk); +} + +/** + * @brief Get Driving end interrupt enable status + * @rmtoll CR DENDIE FL_VREFP_IsEnabledIT_DrivingEnd + * @param VREFPx VREFP instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_VREFP_IsEnabledIT_DrivingEnd(VREFP_Type *VREFPx) +{ + return (uint32_t)(READ_BIT(VREFPx->CR, VREFP_CR_DENDIE_Msk) == VREFP_CR_DENDIE_Msk); +} + +/** + * @brief Driving end interrupt disable + * @rmtoll CR DENDIE FL_VREFP_DisableIT_DrivingEnd + * @param VREFPx VREFP instance + * @retval None + */ +__STATIC_INLINE void FL_VREFP_DisableIT_DrivingEnd(VREFP_Type *VREFPx) +{ + CLEAR_BIT(VREFPx->CR, VREFP_CR_DENDIE_Msk); +} + +/** + * @brief Periodic overflow interrupt enable + * @rmtoll CR POVIE FL_VREFP_EnableIT_EndOfPeriod + * @param VREFPx VREFP instance + * @retval None + */ +__STATIC_INLINE void FL_VREFP_EnableIT_EndOfPeriod(VREFP_Type *VREFPx) +{ + SET_BIT(VREFPx->CR, VREFP_CR_POVIE_Msk); +} + +/** + * @brief Get Periodic overflow interrupt enable status + * @rmtoll CR POVIE FL_VREFP_IsEnabledIT_EndOfPeriod + * @param VREFPx VREFP instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_VREFP_IsEnabledIT_EndOfPeriod(VREFP_Type *VREFPx) +{ + return (uint32_t)(READ_BIT(VREFPx->CR, VREFP_CR_POVIE_Msk) == VREFP_CR_POVIE_Msk); +} + +/** + * @brief Periodic overflow interrupt disable + * @rmtoll CR POVIE FL_VREFP_DisableIT_EndOfPeriod + * @param VREFPx VREFP instance + * @retval None + */ +__STATIC_INLINE void FL_VREFP_DisableIT_EndOfPeriod(VREFP_Type *VREFPx) +{ + CLEAR_BIT(VREFPx->CR, VREFP_CR_POVIE_Msk); +} + +/** + * @brief VREFP_VREG enable + * @rmtoll CR EN FL_VREFP_Enable + * @param VREFPx VREFP instance + * @retval None + */ +__STATIC_INLINE void FL_VREFP_Enable(VREFP_Type *VREFPx) +{ + SET_BIT(VREFPx->CR, VREFP_CR_EN_Msk); +} + +/** + * @brief Get VREFP_VREG enable status + * @rmtoll CR EN FL_VREFP_IsEnabled + * @param VREFPx VREFP instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_VREFP_IsEnabled(VREFP_Type *VREFPx) +{ + return (uint32_t)(READ_BIT(VREFPx->CR, VREFP_CR_EN_Msk) == VREFP_CR_EN_Msk); +} + +/** + * @brief VREFP_VREG disable + * @rmtoll CR EN FL_VREFP_Disable + * @param VREFPx VREFP instance + * @retval None + */ +__STATIC_INLINE void FL_VREFP_Disable(VREFP_Type *VREFPx) +{ + CLEAR_BIT(VREFPx->CR, VREFP_CR_EN_Msk); +} + +/** + * @brief Set output voltage + * @rmtoll CFGR VRS FL_VREFP_SetOutputVoltage + * @param VREFPx VREFP instance + * @param voltage This parameter can be one of the following values: + * @arg @ref FL_VREFP_OUTPUT_VOLTAGE_2P0V + * @arg @ref FL_VREFP_OUTPUT_VOLTAGE_2P5V + * @arg @ref FL_VREFP_OUTPUT_VOLTAGE_3P0V + * @arg @ref FL_VREFP_OUTPUT_VOLTAGE_4P5V + * @arg @ref FL_VREFP_OUTPUT_VOLTAGE_1P5V + * @retval None + */ +__STATIC_INLINE void FL_VREFP_SetOutputVoltage(VREFP_Type *VREFPx, uint32_t voltage) +{ + MODIFY_REG(VREFPx->CFGR, VREFP_CFGR_VRS_Msk, voltage); +} + +/** + * @brief Get output voltage + * @rmtoll CFGR VRS FL_VREFP_GetOutputVoltage + * @param VREFPx VREFP instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_VREFP_OUTPUT_VOLTAGE_2P0V + * @arg @ref FL_VREFP_OUTPUT_VOLTAGE_2P5V + * @arg @ref FL_VREFP_OUTPUT_VOLTAGE_3P0V + * @arg @ref FL_VREFP_OUTPUT_VOLTAGE_4P5V + * @arg @ref FL_VREFP_OUTPUT_VOLTAGE_1P5V + */ +__STATIC_INLINE uint32_t FL_VREFP_GetOutputVoltage(VREFP_Type *VREFPx) +{ + return (uint32_t)(READ_BIT(VREFPx->CFGR, VREFP_CFGR_VRS_Msk)); +} + +/** + * @brief Set period time on low power mode + * @rmtoll CFGR TPERIOD FL_VREFP_SetEnablePeriod + * @param VREFPx VREFP instance + * @param period This parameter can be one of the following values: + * @arg @ref FL_VREFP_ENABLE_PERIOD_1MS + * @arg @ref FL_VREFP_ENABLE_PERIOD_4MS + * @arg @ref FL_VREFP_ENABLE_PERIOD_16MS + * @arg @ref FL_VREFP_ENABLE_PERIOD_32MS + * @arg @ref FL_VREFP_ENABLE_PERIOD_64MS + * @arg @ref FL_VREFP_ENABLE_PERIOD_256MS + * @arg @ref FL_VREFP_ENABLE_PERIOD_1000MS + * @arg @ref FL_VREFP_ENABLE_PERIOD_4000MS + * @retval None + */ +__STATIC_INLINE void FL_VREFP_SetEnablePeriod(VREFP_Type *VREFPx, uint32_t period) +{ + MODIFY_REG(VREFPx->CFGR, VREFP_CFGR_TPERIOD_Msk, period); +} + +/** + * @brief Get period time on low power mode + * @rmtoll CFGR TPERIOD FL_VREFP_GetEnablePeriod + * @param VREFPx VREFP instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_VREFP_ENABLE_PERIOD_1MS + * @arg @ref FL_VREFP_ENABLE_PERIOD_4MS + * @arg @ref FL_VREFP_ENABLE_PERIOD_16MS + * @arg @ref FL_VREFP_ENABLE_PERIOD_32MS + * @arg @ref FL_VREFP_ENABLE_PERIOD_64MS + * @arg @ref FL_VREFP_ENABLE_PERIOD_256MS + * @arg @ref FL_VREFP_ENABLE_PERIOD_1000MS + * @arg @ref FL_VREFP_ENABLE_PERIOD_4000MS + */ +__STATIC_INLINE uint32_t FL_VREFP_GetEnablePeriod(VREFP_Type *VREFPx) +{ + return (uint32_t)(READ_BIT(VREFPx->CFGR, VREFP_CFGR_TPERIOD_Msk)); +} + +/** + * @brief Set driving time on low power mode + * @rmtoll CFGR TDRV FL_VREFP_SetDrivingTime + * @param VREFPx VREFP instance + * @param time This parameter can be one of the following values: + * @arg @ref FL_VREFP_DRIVING_TIME_4LSCLK + * @arg @ref FL_VREFP_DRIVING_TIME_8LSCLK + * @arg @ref FL_VREFP_DRIVING_TIME_16LSCLK + * @arg @ref FL_VREFP_DRIVING_TIME_32LSCLK + * @arg @ref FL_VREFP_DRIVING_TIME_64LSCLK + * @arg @ref FL_VREFP_DRIVING_TIME_128LSCLK + * @arg @ref FL_VREFP_DRIVING_TIME_256LSCLK + * @arg @ref FL_VREFP_DRIVING_TIME_512LSCLK + * @retval None + */ +__STATIC_INLINE void FL_VREFP_SetDrivingTime(VREFP_Type *VREFPx, uint32_t time) +{ + MODIFY_REG(VREFPx->CFGR, VREFP_CFGR_TDRV_Msk, time); +} + +/** + * @brief Get driving time on low power mode + * @rmtoll CFGR TDRV FL_VREFP_GetDrivingTime + * @param VREFPx VREFP instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_VREFP_DRIVING_TIME_4LSCLK + * @arg @ref FL_VREFP_DRIVING_TIME_8LSCLK + * @arg @ref FL_VREFP_DRIVING_TIME_16LSCLK + * @arg @ref FL_VREFP_DRIVING_TIME_32LSCLK + * @arg @ref FL_VREFP_DRIVING_TIME_64LSCLK + * @arg @ref FL_VREFP_DRIVING_TIME_128LSCLK + * @arg @ref FL_VREFP_DRIVING_TIME_256LSCLK + * @arg @ref FL_VREFP_DRIVING_TIME_512LSCLK + */ +__STATIC_INLINE uint32_t FL_VREFP_GetDrivingTime(VREFP_Type *VREFPx) +{ + return (uint32_t)(READ_BIT(VREFPx->CFGR, VREFP_CFGR_TDRV_Msk)); +} + +/** + * @brief Low power mode enable + * @rmtoll CFGR LPM FL_VREFP_SetWorkMode + * @param VREFPx VREFP instance + * @param mode This parameter can be one of the following values: + * @arg @ref FL_VREFP_WORK_MODE_CONTINUOUS + * @arg @ref FL_VREFP_WORK_MODE_PERIODIC + * @retval None + */ +__STATIC_INLINE void FL_VREFP_SetWorkMode(VREFP_Type *VREFPx, uint32_t mode) +{ + MODIFY_REG(VREFPx->CFGR, VREFP_CFGR_LPM_Msk, mode); +} + +/** + * @brief Get low power mode enablestatus + * @rmtoll CFGR LPM FL_VREFP_GetWorkMode + * @param VREFPx VREFP instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_VREFP_WORK_MODE_CONTINUOUS + * @arg @ref FL_VREFP_WORK_MODE_PERIODIC + */ +__STATIC_INLINE uint32_t FL_VREFP_GetWorkMode(VREFP_Type *VREFPx) +{ + return (uint32_t)(READ_BIT(VREFPx->CFGR, VREFP_CFGR_LPM_Msk)); +} + +/** + * @brief Get Driving busy flag + * @rmtoll ISR BUSY FL_VREFP_IsActiveFlag_DrivingBusy + * @param VREFPx VREFP instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_VREFP_IsActiveFlag_DrivingBusy(VREFP_Type *VREFPx) +{ + return (uint32_t)(READ_BIT(VREFPx->ISR, VREFP_ISR_BUSY_Msk) == (VREFP_ISR_BUSY_Msk)); +} + +/** + * @brief Get Driving end flag + * @rmtoll ISR DEND FL_VREFP_IsActiveFlag_DrivingEnd + * @param VREFPx VREFP instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_VREFP_IsActiveFlag_DrivingEnd(VREFP_Type *VREFPx) +{ + return (uint32_t)(READ_BIT(VREFPx->ISR, VREFP_ISR_DEND_Msk) == (VREFP_ISR_DEND_Msk)); +} + +/** + * @brief Clear Driving end flag + * @rmtoll ISR DEND FL_VREFP_ClearFlag_DrivingEnd + * @param VREFPx VREFP instance + * @retval None + */ +__STATIC_INLINE void FL_VREFP_ClearFlag_DrivingEnd(VREFP_Type *VREFPx) +{ + WRITE_REG(VREFPx->ISR, VREFP_ISR_DEND_Msk); +} + +/** + * @brief Get periodic overflow flag + * @rmtoll ISR POV FL_VREFP_IsActiveFlag_EndOfPeriod + * @param VREFPx VREFP instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_VREFP_IsActiveFlag_EndOfPeriod(VREFP_Type *VREFPx) +{ + return (uint32_t)(READ_BIT(VREFPx->ISR, VREFP_ISR_POV_Msk) == (VREFP_ISR_POV_Msk)); +} + +/** + * @brief Clear periodic overflow flag + * @rmtoll ISR POV FL_VREFP_ClearFlag_EndOfPeriod + * @param VREFPx VREFP instance + * @retval None + */ +__STATIC_INLINE void FL_VREFP_ClearFlag_EndOfPeriod(VREFP_Type *VREFPx) +{ + WRITE_REG(VREFPx->ISR, VREFP_ISR_POV_Msk); +} + +/** + * @brief Set VREFP output voltage + * @rmtoll TR FL_VREFP_WriteOutputVoltageTrim + * @param VREFPx VREFP instance + * @param voltage + * @retval None + */ +__STATIC_INLINE void FL_VREFP_WriteOutputVoltageTrim(VREFP_Type *VREFPx, uint32_t voltage) +{ + MODIFY_REG(VREFPx->TR, (0xffU << 0U), (voltage << 0U)); +} + +/** + * @brief Get VREFP output voltage + * @rmtoll TR FL_VREFP_ReadOutputVoltageTrim + * @param VREFPx VREFP instance + * @retval + */ +__STATIC_INLINE uint32_t FL_VREFP_ReadOutputVoltageTrim(VREFP_Type *VREFPx) +{ + return (uint32_t)(READ_BIT(VREFPx->TR, (0xffU << 0U)) >> 0U); +} + +/** + * @} + */ + +/** @defgroup VREFP_FL_EF_Init Initialization and de-initialization functions + * @{ + */ +FL_ErrorStatus FL_VREFP_Init(VREFP_Type *VREFPx, FL_VREFP_InitTypeDef *VREFP_InitStruct); +void FL_VREFP_StructInit(FL_VREFP_InitTypeDef *VREFP_InitStruct); +FL_ErrorStatus FL_VREFP_DeInit(VREFP_Type *VREFPx); + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif /* __FM33LG0XX_FL_VREFP_H*/ + +/*************************Py_Code_Generator Version: 0.1-0.14-0.1 @ 2021-06-25*************************/ +/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/ diff --git a/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_wwdt.h b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_wwdt.h new file mode 100644 index 0000000..4929a33 --- /dev/null +++ b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_wwdt.h @@ -0,0 +1,288 @@ + /** + ******************************************************************************************************* + * @file fm33lg0xx_fl_wwdt.h + * @author FMSH Application Team + * @brief Head file of WWDT FL Module + ******************************************************************************************************* + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + + + +/* Define to prevent recursive inclusion---------------------------------------------------------------*/ +#ifndef __FM33LG0XX_FL_WWDT_H +#define __FM33LG0XX_FL_WWDT_H + +#ifdef __cplusplus +extern "C" { +#endif +/* Includes -------------------------------------------------------------------------------------------*/ +#include "fm33lg0xx_fl_def.h" +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @defgroup WWDT WWDT + * @brief WWDT FL driver + * @{ + */ + +/* Exported types -------------------------------------------------------------------------------------*/ +/** @defgroup WWDT_FL_ES_INIT WWDT Exported Init structures + * @{ + */ + +/** + * @brief FL WWDT Init Sturcture definition + */ +typedef struct +{ + /* 看门狗溢出周期 */ + uint32_t overflowPeriod; + +} FL_WWDT_InitTypeDef; +/** + * @} + */ +/* Exported constants ---------------------------------------------------------------------------------*/ +/** @defgroup WWDT_FL_Exported_Constants WWDT Exported Constants + * @{ + */ + +#define WWDT_CR_CON_Pos (0U) +#define WWDT_CR_CON_Msk (0xffU << WWDT_CR_CON_Pos) +#define WWDT_CR_CON WWDT_CR_CON_Msk + +#define WWDT_CFGR_CFG_Pos (0U) +#define WWDT_CFGR_CFG_Msk (0x7U << WWDT_CFGR_CFG_Pos) +#define WWDT_CFGR_CFG WWDT_CFGR_CFG_Msk + +#define WWDT_IER_IE_Pos (0U) +#define WWDT_IER_IE_Msk (0x1U << WWDT_IER_IE_Pos) +#define WWDT_IER_IE WWDT_IER_IE_Msk + +#define WWDT_ISR_IF_Pos (0U) +#define WWDT_ISR_IF_Msk (0x1U << WWDT_ISR_IF_Pos) +#define WWDT_ISR_IF WWDT_ISR_IF_Msk + + + + + + +#define FL_WWDT_KEY_ENABLE (0x5AU << WWDT_CR_CON_Pos) + +#define FL_WWDT_RELOAD_ENABLE (0xACU << WWDT_CR_CON_Pos) + +#define FL_WWDT_PERIOD_1CNT (0x0U << WWDT_CFGR_CFG_Pos) +#define FL_WWDT_PERIOD_4CNT (0x1U << WWDT_CFGR_CFG_Pos) +#define FL_WWDT_PERIOD_16CNT (0x2U << WWDT_CFGR_CFG_Pos) +#define FL_WWDT_PERIOD_64CNT (0x3U << WWDT_CFGR_CFG_Pos) +#define FL_WWDT_PERIOD_128CNT (0x4U << WWDT_CFGR_CFG_Pos) +#define FL_WWDT_PERIOD_256CNT (0x5U << WWDT_CFGR_CFG_Pos) +#define FL_WWDT_PERIOD_512CNT (0x6U << WWDT_CFGR_CFG_Pos) +#define FL_WWDT_PERIOD_1024CNT (0x7U << WWDT_CFGR_CFG_Pos) + + +/** + * @} + */ +/* Exported functions ---------------------------------------------------------------------------------*/ +/** @defgroup WWDT_FL_Exported_Functions WWDT Exported Functions + * @{ + */ + +/** + * @brief WWDT enable counter + * @rmtoll CR CON FL_WWDT_Enable + * @param WWDTx WWDT instance + * @retval None + */ +__STATIC_INLINE void FL_WWDT_Enable(WWDT_Type *WWDTx) +{ + WRITE_REG(WWDTx->CR, FL_WWDT_KEY_ENABLE); +} + +/** + * @brief WWDT reset counter + * @rmtoll CR CON FL_WWDT_ReloadCounter + * @param WWDTx WWDT instance + * @retval None + */ +__STATIC_INLINE void FL_WWDT_ReloadCounter(WWDT_Type *WWDTx) +{ + WRITE_REG(WWDTx->CR, FL_WWDT_RELOAD_ENABLE); +} + +/** + * @brief Set WWDT overflow period + * @rmtoll CFGR CFG FL_WWDT_SetPeriod + * @param WWDTx WWDT instance + * @param period This parameter can be one of the following values: + * @arg @ref FL_WWDT_PERIOD_1CNT + * @arg @ref FL_WWDT_PERIOD_4CNT + * @arg @ref FL_WWDT_PERIOD_16CNT + * @arg @ref FL_WWDT_PERIOD_64CNT + * @arg @ref FL_WWDT_PERIOD_128CNT + * @arg @ref FL_WWDT_PERIOD_256CNT + * @arg @ref FL_WWDT_PERIOD_512CNT + * @arg @ref FL_WWDT_PERIOD_1024CNT + * @retval None + */ +__STATIC_INLINE void FL_WWDT_SetPeriod(WWDT_Type *WWDTx, uint32_t period) +{ + MODIFY_REG(WWDTx->CFGR, WWDT_CFGR_CFG_Msk, period); +} + +/** + * @brief Get WWDT overflow period + * @rmtoll CFGR CFG FL_WWDT_GetPeriod + * @param WWDTx WWDT instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_WWDT_PERIOD_1CNT + * @arg @ref FL_WWDT_PERIOD_4CNT + * @arg @ref FL_WWDT_PERIOD_16CNT + * @arg @ref FL_WWDT_PERIOD_64CNT + * @arg @ref FL_WWDT_PERIOD_128CNT + * @arg @ref FL_WWDT_PERIOD_256CNT + * @arg @ref FL_WWDT_PERIOD_512CNT + * @arg @ref FL_WWDT_PERIOD_1024CNT + */ +__STATIC_INLINE uint32_t FL_WWDT_GetPeriod(WWDT_Type *WWDTx) +{ + return (uint32_t)(READ_BIT(WWDTx->CFGR, WWDT_CFGR_CFG_Msk)); +} + +/** + * @brief Get WWDT Counter value + * @rmtoll CNT FL_WWDT_ReadCounter + * @param WWDTx WWDT instance + * @retval + */ +__STATIC_INLINE uint32_t FL_WWDT_ReadCounter(WWDT_Type *WWDTx) +{ + return (uint32_t)(READ_BIT(WWDTx->CNT, (0x3ffU << 0U)) >> 0U); +} + +/** + * @brief WWDT interrupt enable + * @rmtoll IER IE FL_WWDT_EnableIT_NearOverflow + * @param WWDTx WWDT instance + * @retval None + */ +__STATIC_INLINE void FL_WWDT_EnableIT_NearOverflow(WWDT_Type *WWDTx) +{ + SET_BIT(WWDTx->IER, WWDT_IER_IE_Msk); +} + +/** + * @brief WWDT interrupt enable status + * @rmtoll IER IE FL_WWDT_IsEnabledIT_NearOverflow + * @param WWDTx WWDT instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_WWDT_IsEnabledIT_NearOverflow(WWDT_Type *WWDTx) +{ + return (uint32_t)(READ_BIT(WWDTx->IER, WWDT_IER_IE_Msk) == WWDT_IER_IE_Msk); +} + +/** + * @brief WWDT interrupt disable + * @rmtoll IER IE FL_WWDT_DisableIT_NearOverflow + * @param WWDTx WWDT instance + * @retval None + */ +__STATIC_INLINE void FL_WWDT_DisableIT_NearOverflow(WWDT_Type *WWDTx) +{ + CLEAR_BIT(WWDTx->IER, WWDT_IER_IE_Msk); +} + +/** + * @brief Get WWDT 75% overflow flag + * @rmtoll ISR IF FL_WWDT_IsActiveFlag_NearOverflow + * @param WWDTx WWDT instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_WWDT_IsActiveFlag_NearOverflow(WWDT_Type *WWDTx) +{ + return (uint32_t)(READ_BIT(WWDTx->ISR, WWDT_ISR_IF_Msk) == (WWDT_ISR_IF_Msk)); +} + +/** + * @brief Clear WWDT 75% overflow flag + * @rmtoll ISR IF FL_WWDT_ClearFlag_NearOverflow + * @param WWDTx WWDT instance + * @retval None + */ +__STATIC_INLINE void FL_WWDT_ClearFlag_NearOverflow(WWDT_Type *WWDTx) +{ + WRITE_REG(WWDTx->ISR, WWDT_ISR_IF_Msk); +} + +/** + * @} + */ + +/** @defgroup WWDT_FL_EF_Init Initialization and de-initialization functions + * @{ + */ +FL_ErrorStatus FL_WWDT_DeInit(WWDT_Type *WWDTx); +FL_ErrorStatus FL_WWDT_Init(WWDT_Type *WWDTx, FL_WWDT_InitTypeDef *WWDT_InitStruct); +void FL_WWDT_StructInit(FL_WWDT_InitTypeDef *WWDT_InitStruct); + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif /* __FM33LG0XX_FL_WWDT_H*/ + +/*************************Py_Code_Generator Version: 0.1-0.11-0.1 @ 2020-09-14*************************/ +/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/ diff --git a/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl.c b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl.c new file mode 100644 index 0000000..6ec7c90 --- /dev/null +++ b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl.c @@ -0,0 +1,188 @@ + /** + **************************************************************************************************** + * @file fm33lg0xx_fl.c + * @author FMSH Application Team + * @brief Source file of FL Driver Library + **************************************************************************************************** + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + + +/* Includes -------------------------------------------------------------------------------------------*/ +#include "fm33lg0xx_fl.h" + +/** @addtogroup FL_EF_DELAY + * @{ + */ + +/** + * @brief Initialize the timer(default is Systick) used as delay timer. + * @note The function is declared as __WEAK to be overwritten in case of other + * implementation in user file. + * @param None + * @retval None + */ +__WEAK void FL_DelayInit(void) +{ + SysTick->CTRL |= SysTick_CTRL_CLKSOURCE_Msk; + SysTick->CTRL |= SysTick_CTRL_ENABLE_Msk; +} + +/** + * @brief Provide block delay in microseconds. + * @note The function is declared as __WEAK to be overwritten in case of other + * implementation in user file. + * @param count specifies the delay count in microseconds. + * @retval None + */ +__WEAK void FL_DelayUs(uint32_t count) +{ + count = FL_DELAY_US * count; + count = count > 16777216 ? 16777216 : count; + SysTick->LOAD = count - 1; + SysTick->VAL = 0; + while(!((SysTick->CTRL >> 16) & 0x1)); +} + +/** + * @brief Provide blocking delay in milliseconds. + * @note The function is declared as __WEAK to be overwritten in case of other + * implementation in user file. + * @param count specifies the delay count in milliseconds. + * @retval None + */ +__WEAK void FL_DelayMs(uint32_t count) +{ + while(count--) + { + FL_DelayUs(1000); + } +} + +/** + * @brief Provide no-blocking delay initialization in microseconds. + * @note Should be follow By while(!FL_DelayEnd()){ ** user code ** } immediately. + The function is declared as __WEAK to be overwritten in case of other + * implementation in user file. + * @param count specifies the delay count in microseconds. + * @retval None + */ +__WEAK void FL_DelayUsStart(uint32_t count) +{ + count = FL_DELAY_US * count; + count = count > 16777216 ? 16777216 : count; + SysTick->LOAD = count - 1; + SysTick->VAL = 0; +} + +/** + * @brief Provide no-blocking delay initialization in milliseconds. + * @note Should be followed By while(!FL_DelayEnd()){ ** user code ** }. + * The function is declared as __WEAK to be overwritten in case of other + * implementation in user file. + * @param count specifies the delay count in milliseconds. + * @retval None + */ +__WEAK void FL_DelayMsStart(uint32_t count) +{ + FL_DelayUsStart(1000 * count); +} + +/** + * @brief Showing if the no-blocking delay has ended. + * @note Should be used with FL_DelayMs/UsStart() function. + The function is declared as __WEAK to be overwritten in case of other + * implementation in user file. + * @param count specifies the delay count in milliseconds. + * @retval true - delay has ended + * false - delay is in progress + */ +__WEAK bool FL_DelayEnd(void) +{ + return (((SysTick->CTRL >> 16) & 0x1) == 0x1); +} + +/** + *@} + */ + +/** @addtogroup FL_EF_DELAY + * @{ + */ + +void FL_Init(void) +{ + /* Init delay support function */ + FL_DelayInit(); +} + +/** + *@} + */ + +/** @addtogroup FL_EF_NVIC + * @{ + */ + +/** + * @brief Configure NVIC for specified Interrupt. + * @param configStruct NVIC configuration. + * @param irq Interrupt number. + * @retval None + */ +void FL_NVIC_Init(FL_NVIC_ConfigTypeDef *configStruct, IRQn_Type irq) +{ + /* Check parameter */ + if(configStruct->preemptPriority > 3) + { + configStruct->preemptPriority = 3; + } + NVIC_DisableIRQ(irq); + NVIC_SetPriority(irq, configStruct->preemptPriority); + NVIC_EnableIRQ(irq); +} + +/** + * @} + */ + +/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/ + + + diff --git a/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_adc.c b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_adc.c new file mode 100644 index 0000000..bc354a4 --- /dev/null +++ b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_adc.c @@ -0,0 +1,457 @@ + /** + **************************************************************************************************** + * @file fm33lg0xx_fl_adc.c + * @author FMSH Application Team + * @brief Src file of ADC FL Module + **************************************************************************************************** + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + + + +/* Includes ------------------------------------------------------------------*/ +#include "fm33lg0xx_fl.h" + +/** @addtogroup FM33LG0xx_FL_Driver + * @{ + */ + +/** @addtogroup ADC + * @{ + */ + +#ifdef FL_ADC_DRIVER_ENABLED + +/* Private macros ------------------------------------------------------------*/ +/** @addtogroup ADC_FL_Private_Macros + * @{ + */ + +#define IS_FL_ADC_INSTANCE(INSTANCE) ((INSTANCE) == ADC) + +#define IS_FL_ADC_CLK_SOURCE(__VALUE__) (((__VALUE__) == FL_CMU_ADC_CLK_SOURCE_RCLF)||\ + ((__VALUE__) == FL_CMU_ADC_CLK_SOURCE_RCHF)||\ + ((__VALUE__) == FL_CMU_ADC_CLK_SOURCE_XTHF)||\ + ((__VALUE__) == FL_CMU_ADC_CLK_SOURCE_PLL)||\ + ((__VALUE__) == FL_ADC_CLK_SOURCE_APBCLK)) + +#define IS_FL_ADC_CMUCLK_PRESCALER(__VALUE__) (((__VALUE__) == FL_ADC_CLK_PSC_DIV1)||\ + ((__VALUE__) == FL_ADC_CLK_PSC_DIV2)||\ + ((__VALUE__) == FL_ADC_CLK_PSC_DIV4)||\ + ((__VALUE__) == FL_ADC_CLK_PSC_DIV8)||\ + ((__VALUE__) == FL_ADC_CLK_PSC_DIV16)||\ + ((__VALUE__) == FL_ADC_CLK_PSC_DIV32)) + +#define IS_FL_ADC_APBCLK_PRESCALER(__VALUE__) (((__VALUE__) == FL_ADC_CLK_PSC_DIV1)||\ + ((__VALUE__) == FL_ADC_CLK_PSC_DIV2)||\ + ((__VALUE__) == FL_ADC_CLK_PSC_DIV4)||\ + ((__VALUE__) == FL_ADC_CLK_PSC_DIV8)) + +#define IS_FL_ADC_REFERENCE_SOURCE(__VALUE__) (((__VALUE__) == FL_ADC_REF_SOURCE_VDDA)||\ + ((__VALUE__) == FL_ADC_REF_SOURCE_VREFP)) + +#define IS_FL_ADC_BITWIDTH(__VALUE__) (((__VALUE__) == FL_ADC_BIT_WIDTH_12B)||\ + ((__VALUE__) == FL_ADC_BIT_WIDTH_10B)||\ + ((__VALUE__) == FL_ADC_BIT_WIDTH_8B)||\ + ((__VALUE__) == FL_ADC_BIT_WIDTH_6B)) + +#define IS_FL_ADC_CONTINUOUSCONVMODE(__VALUE__) (((__VALUE__) == FL_ADC_CONV_MODE_SINGLE)||\ + ((__VALUE__) == FL_ADC_CONV_MODE_CONTINUOUS)) + +#define IS_FL_ADC_AUTO_MODE(__VALUE__) (((__VALUE__) == FL_ADC_SINGLE_CONV_MODE_AUTO)||\ + ((__VALUE__) == FL_ADC_SINGLE_CONV_MODE_SEMIAUTO)) + + +#define IS_FL_ADC_SCANDIRECTION(__VALUE__) (((__VALUE__) == FL_ADC_SEQ_SCAN_DIR_FORWARD)||\ + ((__VALUE__) == FL_ADC_SEQ_SCAN_DIR_BACKWARD)) + + +#define IS_FL_ADC_EXTERNALTRIGCONV(__VALUE__) (((__VALUE__) == FL_ADC_TRIGGER_EDGE_NONE)||\ + ((__VALUE__) == FL_ADC_TRIGGER_EDGE_RISING)||\ + ((__VALUE__) == FL_ADC_TRIGGER_EDGE_FALLING)||\ + ((__VALUE__) == FL_ADC_TRIGGER_EDGE_BOTH)) + +#define IS_FL_ADC_EXTERNALTRIGSOURCE(__VALUE__) (((__VALUE__) == FL_ADC_TRGI_LUT0)||\ + ((__VALUE__) == FL_ADC_TRGI_LUT1)||\ + ((__VALUE__) == FL_ADC_TRGI_LUT2)||\ + ((__VALUE__) == FL_ADC_TRGI_ATIM)||\ + ((__VALUE__) == FL_ADC_TRGI_GPTIM1)||\ + ((__VALUE__) == FL_ADC_TRGI_GPTIM2)||\ + ((__VALUE__) == FL_ADC_TRGI_BSTIM16)||\ + ((__VALUE__) == FL_ADC_TRGI_LPTIM12)||\ + ((__VALUE__) == FL_ADC_TRGI_COMP1)||\ + ((__VALUE__) == FL_ADC_TRGI_COMP2)||\ + ((__VALUE__) == FL_ADC_TRGI_RTCA)||\ + ((__VALUE__) == FL_ADC_TRGI_LUT3)||\ + ((__VALUE__) == FL_ADC_TRGI_GPTIM0)||\ + ((__VALUE__) == FL_ADC_TRGI_COMP3)) + +#define IS_FL_ADC_CHANNEL_FAST_TIME(__VALUE__) (((__VALUE__) == FL_ADC_FAST_CH_SAMPLING_TIME_2_ADCCLK)||\ + ((__VALUE__) == FL_ADC_FAST_CH_SAMPLING_TIME_4_ADCCLK)||\ + ((__VALUE__) == FL_ADC_FAST_CH_SAMPLING_TIME_8_ADCCLK)||\ + ((__VALUE__) == FL_ADC_FAST_CH_SAMPLING_TIME_16_ADCCLK)||\ + ((__VALUE__) == FL_ADC_FAST_CH_SAMPLING_TIME_32_ADCCLK)||\ + ((__VALUE__) == FL_ADC_FAST_CH_SAMPLING_TIME_64_ADCCLK)||\ + ((__VALUE__) == FL_ADC_FAST_CH_SAMPLING_TIME_80_ADCCLK)||\ + ((__VALUE__) == FL_ADC_FAST_CH_SAMPLING_TIME_96_ADCCLK)||\ + ((__VALUE__) == FL_ADC_FAST_CH_SAMPLING_TIME_128_ADCCLK)||\ + ((__VALUE__) == FL_ADC_FAST_CH_SAMPLING_TIME_160_ADCCLK)||\ + ((__VALUE__) == FL_ADC_FAST_CH_SAMPLING_TIME_192_ADCCLK)||\ + ((__VALUE__) == FL_ADC_FAST_CH_SAMPLING_TIME_256_ADCCLK)||\ + ((__VALUE__) == FL_ADC_FAST_CH_SAMPLING_TIME_320_ADCCLK)||\ + ((__VALUE__) == FL_ADC_FAST_CH_SAMPLING_TIME_384_ADCCLK)||\ + ((__VALUE__) == FL_ADC_FAST_CH_SAMPLING_TIME_512_ADCCLK)) + +#define IS_FL_ADC_CHANNEL_SLOW_TIME(__VALUE__) (((__VALUE__) == FL_ADC_SLOW_CH_SAMPLING_TIME_2_ADCCLK)||\ + ((__VALUE__) == FL_ADC_SLOW_CH_SAMPLING_TIME_4_ADCCLK)||\ + ((__VALUE__) == FL_ADC_SLOW_CH_SAMPLING_TIME_8_ADCCLK)||\ + ((__VALUE__) == FL_ADC_SLOW_CH_SAMPLING_TIME_16_ADCCLK)||\ + ((__VALUE__) == FL_ADC_SLOW_CH_SAMPLING_TIME_32_ADCCLK)||\ + ((__VALUE__) == FL_ADC_SLOW_CH_SAMPLING_TIME_64_ADCCLK)||\ + ((__VALUE__) == FL_ADC_SLOW_CH_SAMPLING_TIME_80_ADCCLK)||\ + ((__VALUE__) == FL_ADC_SLOW_CH_SAMPLING_TIME_96_ADCCLK)||\ + ((__VALUE__) == FL_ADC_SLOW_CH_SAMPLING_TIME_128_ADCCLK)||\ + ((__VALUE__) == FL_ADC_SLOW_CH_SAMPLING_TIME_160_ADCCLK)||\ + ((__VALUE__) == FL_ADC_SLOW_CH_SAMPLING_TIME_192_ADCCLK)||\ + ((__VALUE__) == FL_ADC_SLOW_CH_SAMPLING_TIME_256_ADCCLK)||\ + ((__VALUE__) == FL_ADC_SLOW_CH_SAMPLING_TIME_320_ADCCLK)||\ + ((__VALUE__) == FL_ADC_SLOW_CH_SAMPLING_TIME_384_ADCCLK)||\ + ((__VALUE__) == FL_ADC_SLOW_CH_SAMPLING_TIME_512_ADCCLK)) + +#define IS_FL_ADC_OVERSAMPCOFIG(__VALUE__) (((__VALUE__) == FL_DISABLE)||\ + ((__VALUE__) == FL_ENABLE)) + +#define IS_FL_ADC_OVERSAMPINGRATIO(__VALUE__) (((__VALUE__) == FL_ADC_OVERSAMPLING_MUL_2X)||\ + ((__VALUE__) == FL_ADC_OVERSAMPLING_MUL_4X)||\ + ((__VALUE__) == FL_ADC_OVERSAMPLING_MUL_8X)||\ + ((__VALUE__) == FL_ADC_OVERSAMPLING_MUL_16X)||\ + ((__VALUE__) == FL_ADC_OVERSAMPLING_MUL_32X)||\ + ((__VALUE__) == FL_ADC_OVERSAMPLING_MUL_64X)||\ + ((__VALUE__) == FL_ADC_OVERSAMPLING_MUL_128X)||\ + ((__VALUE__) == FL_ADC_OVERSAMPLING_MUL_256X)) + +#define IS_FL_ADC_OVERSAMPINGSHIFT(__VALUE__) (((__VALUE__) == FL_ADC_OVERSAMPLING_SHIFT_0B)||\ + ((__VALUE__) == FL_ADC_OVERSAMPLING_SHIFT_1B)||\ + ((__VALUE__) == FL_ADC_OVERSAMPLING_SHIFT_2B)||\ + ((__VALUE__) == FL_ADC_OVERSAMPLING_SHIFT_3B)||\ + ((__VALUE__) == FL_ADC_OVERSAMPLING_SHIFT_4B)||\ + ((__VALUE__) == FL_ADC_OVERSAMPLING_SHIFT_5B)||\ + ((__VALUE__) == FL_ADC_OVERSAMPLING_SHIFT_6B)||\ + ((__VALUE__) == FL_ADC_OVERSAMPLING_SHIFT_7B)||\ + ((__VALUE__) == FL_ADC_OVERSAMPLING_SHIFT_8B)) + +#define ADC_CALIBRATIN_TIME_OUT (500000) + +/** + * @} + */ + +/* Exported functions --------------------------------------------------------*/ +/** @addtogroup ADC_FL_EF_Init + * @{ + */ + +/** + * @brief ADC外设寄存器值为复位值 + * @param 外设入口地址 + * @retval 返回错误状态，可能值： + * -FL_PASS 外设寄存器值恢复复位值 + * -FL_FAIL 未成功执行 + */ +FL_ErrorStatus FL_ADC_CommonDeInit(void) +{ + /* 关闭总线时钟 */ + FL_CMU_DisableGroup2BusClock(FL_CMU_GROUP2_BUSCLK_ADC); + /* 关闭操作时钟 */ + FL_CMU_DisableGroup3OperationClock(FL_CMU_GROUP3_OPCLK_ADC); + return FL_PASS; +} +/** + * @brief ADC共用寄存器设置以配置外设工作时钟 + * + * @note 其中FL_LPTIM_OPERATION_MODE_EXTERNAL_ASYN_PAUSE_CNT 模式需要外部脉冲提供给LPTIM模块作为工作时钟，此时 + * LPTIM完全工作在异步模式下。 + * @param LPTIM 外设入口地址 + * @param LPTIM_InitStruct指向FL_LPTIM_TimeInitTypeDef类的结构体，它包含指定LPTIM外设的配置信息 + * + * @retval ErrorStatus枚举值 + * -FL_FAIL 配置过程发生错误 + * -FL_PASS ADC配置成功 + */ +FL_ErrorStatus FL_ADC_CommonInit(FL_ADC_CommonInitTypeDef *ADC_CommonInitStruct) +{ + FL_ErrorStatus status = FL_PASS; + /* 入口参数检查 */ + assert_param(IS_FL_ADC_CLK_SOURCE(ADC_CommonInitStruct->clockSource)); + assert_param(IS_FL_ADC_REFERENCE_SOURCE(ADC_CommonInitStruct->referenceSource)); + assert_param(IS_FL_ADC_BITWIDTH(ADC_CommonInitStruct->bitWidth)); + if(ADC_CommonInitStruct->clockSource == FL_ADC_CLK_SOURCE_APBCLK) + { + assert_param(IS_FL_ADC_APBCLK_PRESCALER(ADC_CommonInitStruct->clockPrescaler)); + } + else + { + assert_param(IS_FL_ADC_CMUCLK_PRESCALER(ADC_CommonInitStruct->clockPrescaler)); + } + + /* 开启总线时钟 */ + FL_CMU_EnableGroup2BusClock(FL_CMU_GROUP2_BUSCLK_ADC); + /* 配置ADC时钟 */ + if(ADC_CommonInitStruct->clockSource == FL_ADC_CLK_SOURCE_APBCLK) + { + /* 设置ADC时钟来源于APBCLK */ + FL_ADC_SetClockSource(ADC, FL_ADC_CLK_SOURCE_APBCLK); + + /* 配置APBCLOCK时钟预分频 */ + FL_ADC_SetAPBPrescaler(ADC, ADC_CommonInitStruct->clockPrescaler << ADC_CFGR1_APBCLK_PSC_Pos); + } + else + { + /* 设置ADC时钟来源于ADCCLK */ + FL_ADC_SetClockSource(ADC, FL_ADC_CLK_SOURCE_ADCCLK); + + /* 设置ADCCLK时钟源 */ + FL_CMU_SetADCClockSource(ADC_CommonInitStruct->clockSource); + + /* 配置ADCCLK时钟预分频 */ + FL_CMU_SetADCPrescaler(ADC_CommonInitStruct->clockPrescaler << CMU_OPCCR2_ADCPRSC_Pos); + + /* 开启操作时钟 */ + FL_CMU_EnableGroup3OperationClock(FL_CMU_GROUP3_OPCLK_ADC); + } + /* 配置ADC基准电压*/ + FL_ADC_SetReferenceSource(ADC, ADC_CommonInitStruct->referenceSource); + /* 配置ADC输出位数*/ + FL_ADC_SetBitWidth(ADC, ADC_CommonInitStruct->bitWidth); + return status; +} +/** + * @brief 设置 ADC_CommonInitStruct 为默认配置 + * @param ADC_CommonInitStruct 指向需要将值设置为默认配置的结构体 @ref FL_ADC_CommonInitTypeDef 结构体 + * + * @retval None + */ +void FL_ADC_CommonStructInit(FL_ADC_CommonInitTypeDef *ADC_CommonInitStruct) +{ + /* 默认使用RCHF作为ADC时钟模块时钟源，预分频系数16 */ + ADC_CommonInitStruct->clockSource = FL_CMU_ADC_CLK_SOURCE_RCHF; + ADC_CommonInitStruct->clockPrescaler = FL_CMU_ADC_PSC_DIV16; + ADC_CommonInitStruct->referenceSource = FL_ADC_REF_SOURCE_VDDA; + ADC_CommonInitStruct->bitWidth = FL_ADC_BIT_WIDTH_12B; +} +/** + * @brief 恢复对应的ADC入口地址寄存器为默认值 + * + * @param ADCx 外设入口地址 + * + * @retval ErrorStatus枚举值 + * -FL_FAIL 配置过程发生错误 + * -FL_PASS ADC配置成功 + */ +FL_ErrorStatus FL_ADC_DeInit(ADC_Type *ADCx) +{ + FL_ErrorStatus status = FL_PASS; + /* 入口合法性检查 */ + assert_param(IS_FL_ADC_INSTANCE(ADCx)); + /* 外设复位使能 */ + FL_RMU_EnablePeripheralReset(RMU); + FL_RMU_EnableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_ADC); + FL_RMU_DisableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_ADC); + FL_RMU_EnableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_ADCCR); + FL_RMU_DisableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_ADCCR); + FL_RMU_DisablePeripheralReset(RMU); + return status; +} +/** + * @brief 初始化ADCx指定的入口地址的外设寄存器 + * + * @note 用户必须检查此函数的返回值，以确保自校准完成，否则转换结果精度无法保证，除此之外ADC使能过采样实际不会增加ADC的 + * 转换精度只会提高转换结果的稳定性（同时配置移位寄存器的情况下），同时过采样会降低转换速度。 + * @param ADCx 外设入口地址 + * @param ADC_InitStruct 指向一 @ref FL_ADC_InitTypeDef 结构体，它包含指定ADC外设的配置信息 + * + * @retval ErrorStatus枚举值 + * -FL_FAIL 配置过程发生错误 + * -FL_PASS ADC配置成功 + */ +FL_ErrorStatus FL_ADC_Init(ADC_Type *ADCx, FL_ADC_InitTypeDef *ADC_InitStruct) +{ + FL_ErrorStatus status = FL_PASS; + uint32_t i = 0,Calibration_Flag; + /* 入口合法性检查 */ + assert_param(IS_FL_ADC_INSTANCE(ADCx)); + assert_param(IS_FL_ADC_CONTINUOUSCONVMODE(ADC_InitStruct->conversionMode)); + assert_param(IS_FL_ADC_AUTO_MODE(ADC_InitStruct->autoMode)); + assert_param(IS_FL_ADC_SCANDIRECTION(ADC_InitStruct->scanDirection)); + assert_param(IS_FL_ADC_EXTERNALTRIGCONV(ADC_InitStruct->externalTrigConv)); + assert_param(IS_FL_ADC_OVERSAMPCOFIG(ADC_InitStruct->oversamplingMode)); + assert_param(IS_FL_ADC_OVERSAMPINGRATIO(ADC_InitStruct->overSampingMultiplier)); + assert_param(IS_FL_ADC_OVERSAMPINGSHIFT(ADC_InitStruct->oversamplingShift)); + FL_CMU_EnableGroup1BusClock(FL_CMU_GROUP1_BUSCLK_VREF1P2); + if(!FL_VREF_IsEnabled(VREF)) + { + FL_VREF_ClearFlag_Ready(VREF); + FL_VREF_Enable(VREF);//置位VREF_EN寄存器，使能VREF1p2模块 + } + FL_VREF_EnableTemperatureSensor(VREF);//置位PTAT_EN寄存器 + while(FL_VREF_IsActiveFlag_Ready(VREF) == 0) /* 等待VREF建立 */ + { + if(i >= 128000) + { + break; + } + i++; + } + FL_ADC_Disable(ADCx); + FL_ADC_DisableOverSampling(ADCx); + FL_ADC_Enable(ADCx); + FL_ADC_EnableCalibration(ADC); + + i = 0; + do + { + Calibration_Flag = FL_ADC_IsActiveFlag_EndOfCalibration(ADC); + i++; + }while((i != 0xFFFFFFFFU) && (Calibration_Flag == 0U)); //等待转换完成 + + if(Calibration_Flag == 0x01) + { + FL_ADC_ClearFlag_EndOfCalibration(ADC); + /* 关闭ADC，关闭后ADC自校准值依然保持 */ + FL_ADC_Disable(ADCx); + if(FL_ADC_IsEnabled(ADCx) == 0U) + { + /* 连续转换模式 */ + FL_ADC_SetConversionMode(ADCx, ADC_InitStruct->conversionMode); + /* 自动转换模式 */ + FL_ADC_SetSingleConversionAutoMode(ADCx, ADC_InitStruct->autoMode); + /* 通道等待使能 */ + if(ADC_InitStruct->waitMode) + { + FL_ADC_EnableWaitMode(ADCx); + } + else + { + FL_ADC_DisableWaitMode(ADCx); + } + /*数据冲突模式设置*/ + if(ADC_InitStruct->overrunMode) + { + FL_ADC_EnableOverrunMode(ADCx); + } + else + { + FL_ADC_DisableOverrunMode(ADCx); + } + /* 多通道扫描方向 */ + FL_ADC_SetSequenceScanDirection(ADCx, ADC_InitStruct->scanDirection); + /* 外部引脚触发 */ + FL_ADC_DisableExternalConversion(ADCx); + /* 触发模式 */ + FL_ADC_SetTriggerEdge(ADCx, ADC_InitStruct->externalTrigConv); + /* 触发源 */ + FL_ADC_SetTriggerSource(ADCx, ADC_InitStruct->triggerSource); + /*通道采样时间设置*/ + FL_ADC_SetFastChannelSamplingTime(ADCx, ADC_InitStruct->fastChannelTime); + FL_ADC_SetSlowChannelSamplingTime(ADCx, ADC_InitStruct->lowChannelTime); + if(ADC_InitStruct->oversamplingMode) + { + /*使能过采样倍数后，需要配置移位寄存器进行移位，这一过程是硬件自动完成的最终最大 + 可输出16位的结果值（即256被采样得到的结果是20bit的，右移4bit结果就是16bit的）*/ + FL_ADC_SetOverSamplingMultiplier(ADCx, ADC_InitStruct->overSampingMultiplier); + FL_ADC_SetOverSamplingShift(ADCx, ADC_InitStruct->oversamplingShift); + /* 过采样使能 */ + FL_ADC_EnableOverSampling(ADCx); + } + else + { + /* 关闭过采样 */ + FL_ADC_DisableOverSampling(ADCx); + } + } + else + { + status = FL_FAIL; + } + } + else + { + status = FL_FAIL; + } + return status; +} + +/** + * @brief 设置 ADC_InitStruct 为默认配置 + * @param ADC_InitStruct 指向需要将值设置为默认配置的结构体 @ref FL_ADC_InitTypeDef 结构体 + * + * @retval None + */ +void FL_ADC_StructInit(FL_ADC_InitTypeDef *ADC_InitStruct) +{ + ADC_InitStruct->conversionMode = FL_ADC_CONV_MODE_SINGLE; + ADC_InitStruct->autoMode = FL_ADC_SINGLE_CONV_MODE_AUTO; + ADC_InitStruct->scanDirection = FL_ADC_SEQ_SCAN_DIR_FORWARD; + ADC_InitStruct->externalTrigConv = FL_ADC_TRIGGER_EDGE_NONE; + ADC_InitStruct->overrunMode = FL_ENABLE; + ADC_InitStruct->waitMode = FL_ENABLE; + ADC_InitStruct->fastChannelTime = FL_ADC_FAST_CH_SAMPLING_TIME_2_ADCCLK; + ADC_InitStruct->lowChannelTime = FL_ADC_SLOW_CH_SAMPLING_TIME_512_ADCCLK; + ADC_InitStruct->oversamplingMode = FL_ENABLE; + ADC_InitStruct->overSampingMultiplier = FL_ADC_OVERSAMPLING_MUL_16X; + ADC_InitStruct->oversamplingShift = FL_ADC_OVERSAMPLING_SHIFT_4B; +} + +/** + * @} + */ + +#endif /* FL_ADC_DRIVER_ENABLED */ + +/** + * @} + */ + +/** + * @} + */ + +/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/ + + diff --git a/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_aes.c b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_aes.c new file mode 100644 index 0000000..47c3ffe --- /dev/null +++ b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_aes.c @@ -0,0 +1,180 @@ + /** + **************************************************************************************************** + * @file fm33lg0xx_fl_aes.c + * @author FMSH Application Team + * @brief Src file of AES FL Module + **************************************************************************************************** + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + +/* Includes ------------------------------------------------------------------*/ +#include "fm33lg0xx_fl.h" + +/** @addtogroup FM33LG0xx_FL_Driver + * @{ + */ + +/** @addtogroup AES + * @{ + */ + +#ifdef FL_AES_DRIVER_ENABLED + +/* Private macros ------------------------------------------------------------*/ +/** @addtogroup AES_FL_Private_Macros + * @{ + */ +#define IS_FL_AES_INSTANCE(INSTANCE) (((INSTANCE) == AES)) + +#define IS_FL_AES_KEYLENTH(__VALUE__) (((__VALUE__) == FL_AES_KEY_LENGTH_128B)||\ + ((__VALUE__) == FL_AES_KEY_LENGTH_192B)||\ + ((__VALUE__) == FL_AES_KEY_LENGTH_256B)) + +#define IS_FL_AES_CIPHERMODE(__VALUE__) (((__VALUE__) == FL_AES_CIPHER_ECB)||\ + ((__VALUE__) == FL_AES_CIPHER_CBC)||\ + ((__VALUE__) == FL_AES_CIPHER_CTR)||\ + ((__VALUE__) == FL_AES_CIPHER_MULTH)) + +#define IS_FL_AES_OPERATIONMODE(__VALUE__) (((__VALUE__) == FL_AES_OPERATION_MODE_ENCRYPTION)||\ + ((__VALUE__) == FL_AES_OPERATION_MODE_KEYDERIVATION)||\ + ((__VALUE__) == FL_AES_OPERATION_MODE_DECRYPTION)||\ + ((__VALUE__) == FL_AES_OPERATION_MODE_KEYDERIVATION_DECRYPTION)) + +#define IS_FL_AES_DATATYPE(__VALUE__) (((__VALUE__) == FL_AES_DATA_TYPE_32B)||\ + ((__VALUE__) == FL_AES_DATA_TYPE_16B)||\ + ((__VALUE__) == FL_AES_DATA_TYPE_8B)||\ + ((__VALUE__) == FL_AES_DATA_TYPE_1B)) +/** + *@} + */ + +/* Exported functions --------------------------------------------------------*/ +/** @addtogroup AES_FL_EF_Init + * @{ + */ + +/** + * @brief 复位AES 外设寄存器值为复位值 + * + * @param None + * + * @retval FL_ErrorStatus枚举值 + * -FL_PASS 配置成功 + * -FL_FAIL 配置过程发生错误 + */ +FL_ErrorStatus FL_AES_DeInit(void) +{ + /* 外设复位使能 */ + FL_RMU_EnablePeripheralReset(RMU); + /* 复位AES */ + FL_RMU_EnableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_AES); + FL_RMU_DisableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_AES); + /* 关闭总线时钟 */ + FL_CMU_DisableGroup2BusClock(FL_CMU_GROUP2_BUSCLK_AES); + /* 锁定外设复位功能 */ + FL_RMU_DisablePeripheralReset(RMU); + return FL_PASS; +} +/** + * @brief 根据 AES_InitStructer初始化对应外设入口地址的寄存器值. + * + * @param AESx 外设入口地址 + * @param AES_InitStructer 指向 @ref FL_AES_InitTypeDef 结构体的指针 + * + * @retval FL_ErrorStatus枚举值 + * -FL_PASS 配置成功 + * -FL_FAIL 配置过程发生错误 + */ +FL_ErrorStatus FL_AES_Init(AES_Type *AESx, FL_AES_InitTypeDef *AES_InitStructer) +{ + /* 入口合法性检查 */ + assert_param(IS_FL_AES_INSTANCE(AESx)); + assert_param(IS_FL_AES_KEYLENTH(AES_InitStructer->keyLength)); + assert_param(IS_FL_AES_CIPHERMODE(AES_InitStructer->cipherMode)); + assert_param(IS_FL_AES_OPERATIONMODE(AES_InitStructer->operationMode)); + assert_param(IS_FL_AES_DATATYPE(AES_InitStructer->dataType)); + if(FL_AES_IsEnabled(AESx) == 0) + { + /* 开启总线时钟 */ + FL_CMU_EnableGroup2BusClock(FL_CMU_GROUP2_BUSCLK_AES); + /* key长度 */ + FL_AES_SetKeySize(AESx, AES_InitStructer->keyLength); + /* 数据流处理模式 */ + FL_AES_SetCipherMode(AESx, AES_InitStructer->cipherMode); + /* 操作模式 */ + FL_AES_SetOperationMode(AESx, AES_InitStructer->operationMode); + /* 数据类型 */ + FL_AES_SetDataType(AESx, AES_InitStructer->dataType); + } + else + { + return FL_FAIL; + } + return FL_PASS; +} +/** + * @brief 设置 AES_InitStruct 为默认配置 + * + * @param AES_InitStruct 指向需要将值设置为默认配置的结构体 @ref FL_AES_InitTypeDef 结构体 + * + * @retval None + */ +void FL_AES_StructInit(FL_AES_InitTypeDef *AES_InitStructer) +{ + AES_InitStructer->keyLength = FL_AES_KEY_LENGTH_128B; + AES_InitStructer->cipherMode = FL_AES_CIPHER_ECB; + AES_InitStructer->operationMode = FL_AES_OPERATION_MODE_ENCRYPTION; + AES_InitStructer->dataType = FL_AES_DATA_TYPE_32B; +} + +/** + *@} + */ + +#endif /* FL_AES_DRIVER_ENABLED */ + +/** + *@} + */ + +/** + *@} + */ + +/*********************** (C) COPYRIGHT Fudan Microelectronics *****END OF FILE************************/ diff --git a/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_atim.c b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_atim.c new file mode 100644 index 0000000..578cb2a --- /dev/null +++ b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_atim.c @@ -0,0 +1,804 @@ + /** + ******************************************************************************************************* + * @file fm33lg0xx_fl_atim.c + * @author FMSH Application Team + * @brief Src file of ATIM FL Module + ******************************************************************************************************* + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ +/** + ******************************************************************************************************* + * @file fm33lg0xx_fl_atim.c + * @author FMSH Application Team + * @brief Src file of ATIM FL Module + ******************************************************************************************************* + * @attention + * + * Copyright (c) [2021] [Fudan Microelectronics] + * THIS SOFTWARE is licensed under Mulan PSL v2. + * You can use this software according to the terms and conditions of the Mulan PSL v2. + * You may obtain a copy of Mulan PSL v2 at: + * http://license.coscl.org.cn/MulanPSL2 + * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, + * EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, + * MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE. + * See the Mulan PSL v2 for more details. + * + ******************************************************************************************************* + */ +/* Includes ------------------------------------------------------------------*/ +#include "fm33lg0xx_fl.h" + +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @addtogroup ATIM + * @{ + */ + +#ifdef FL_ATIM_DRIVER_ENABLED + +/* Private macros ------------------------------------------------------------*/ +/** @addtogroup ATIM_FL_Private_Macros + * @{ + */ + + +#define IS_ATIM_INSTANCE(TIMx) ((TIMx) == ATIM) + +#define IS_ATIM_CLKSRC(__VALUE__) (((__VALUE__) == FL_CMU_ATIM_CLK_SOURCE_APBCLK) \ + || ((__VALUE__) == FL_CMU_ATIM_CLK_SOURCE_PLL_X2)) + + +#define IS_FL_ATIM_COUNTERMODE(__VALUE__) (((__VALUE__) == FL_ATIM_COUNTER_DIR_UP) \ + || ((__VALUE__) == FL_ATIM_COUNTER_DIR_DOWN) \ + || ((__VALUE__) == FL_ATIM_COUNTER_ALIGNED_CENTER_DOWN ) \ + || ((__VALUE__) == FL_ATIM_COUNTER_ALIGNED_CENTER_UP ) \ + || ((__VALUE__) == FL_ATIM_COUNTER_ALIGNED_CENTER_UP_DOWN)) + +#define IS_FL_ATIM_CLOCKDIVISION(__VALUE__) (((__VALUE__) == FL_ATIM_CLK_DIVISION_DIV1) \ + || ((__VALUE__) == FL_ATIM_CLK_DIVISION_DIV2) \ + || ((__VALUE__) == FL_ATIM_CLK_DIVISION_DIV4)) + + +#define IS_FL_ATIM_CC_MODE(__VALUE__) (((__VALUE__) == FL_ATIM_CHANNEL_MODE_OUTPUT) \ + || ((__VALUE__) == FL_ATIM_CHANNEL_MODE_INPUT_NORMAL) \ + || ((__VALUE__) == FL_ATIM_CHANNEL_MODE_INPUT_CROSSOVER) \ + || ((__VALUE__) == FL_ATIM_CHANNEL_MODE_INPUT_TRC)) + +#define IS_FL_ATIM_IC_FILTER(__VALUE__) (((__VALUE__) == FL_ATIM_IC_FILTER_DIV1 ) \ + || ((__VALUE__) ==FL_ATIM_IC_FILTER_DIV1_N2) \ + || ((__VALUE__) == FL_ATIM_IC_FILTER_DIV1_N4) \ + || ((__VALUE__) == FL_ATIM_IC_FILTER_DIV1_N8) \ + || ((__VALUE__) == FL_ATIM_IC_FILTER_DIV2_N6) \ + || ((__VALUE__) == FL_ATIM_IC_FILTER_DIV2_N8) \ + || ((__VALUE__) == FL_ATIM_IC_FILTER_DIV4_N6) \ + || ((__VALUE__) == FL_ATIM_IC_FILTER_DIV4_N8) \ + || ((__VALUE__) == FL_ATIM_IC_FILTER_DIV8_N6) \ + || ((__VALUE__) == FL_ATIM_IC_FILTER_DIV8_N8) \ + || ((__VALUE__) == FL_ATIM_IC_FILTER_DIV16_N5) \ + || ((__VALUE__) == FL_ATIM_IC_FILTER_DIV16_N6) \ + || ((__VALUE__) == FL_ATIM_IC_FILTER_DIV16_N8) \ + || ((__VALUE__) == FL_ATIM_IC_FILTER_DIV32_N5) \ + || ((__VALUE__) == FL_ATIM_IC_FILTER_DIV32_N6) \ + || ((__VALUE__) == FL_ATIM_IC_FILTER_DIV32_N8)) + +#define IS_FL_ATIM_CHANNEL(__VALUE__) (((__VALUE__) == FL_ATIM_CHANNEL_1)\ + || ((__VALUE__) == FL_ATIM_CHANNEL_2)\ + || ((__VALUE__) == FL_ATIM_CHANNEL_3)\ + || ((__VALUE__) == FL_ATIM_CHANNEL_4)) + + + +#define IS_FL_ATIM_SLAVE_MODE(__VALUE__) (((__VALUE__) == FL_ATIM_SLAVE_MODE_PROHIBITED)\ + || ((__VALUE__) == FL_ATIM_SLAVE_MODE_ENCODER_X2_TI1)\ + || ((__VALUE__) == FL_ATIM_SLAVE_MODE_ENCODER_X2_TI2)\ + || ((__VALUE__) == FL_ATIM_SLAVE_MODE_ENCODER_X4_TI1TI2)\ + || ((__VALUE__) == FL_ATIM_SLAVE_MODE_TRGI_RISE_RST)\ + || ((__VALUE__) == FL_ATIM_SLAVE_MODE_TRGI_HIGH_RUN)\ + || ((__VALUE__) == FL_ATIM_SLAVE_MODE_TRGI_RISE_RUN)\ + || ((__VALUE__) == FL_ATIM_SLAVE_MODE_TRGI_CLK)) + + +#define IS_FL_ATIM_TRIGGER_SRC(__VALUE__) (((__VALUE__) == FL_ATIM_TRGI_ITR0 )\ + ||((__VALUE__) ==FL_ATIM_TRGI_ITR1 )\ + ||((__VALUE__) ==FL_ATIM_TRGI_ITR2)\ + ||((__VALUE__) ==FL_ATIM_TRGI_ITR3)\ + ||((__VALUE__) ==FL_ATIM_TRGI_TI1F_EDGE)\ + ||((__VALUE__) ==FL_ATIM_TRGI_TI1FP1)\ + ||((__VALUE__) ==FL_ATIM_TRGI_TI2FP2)\ + ||((__VALUE__) ==FL_ATIM_TRGI_ETRF)) + + + +#define IS_FL_ATIM_ETP_FILTER(__VALUE__) (((__VALUE__) == FL_ATIM_ETR_FILTER_DIV1) \ + || ((__VALUE__) == FL_ATIM_ETR_FILTER_DIV1_N2) \ + || ((__VALUE__) == FL_ATIM_ETR_FILTER_DIV1_N4) \ + || ((__VALUE__) == FL_ATIM_ETR_FILTER_DIV1_N8) \ + || ((__VALUE__) == FL_ATIM_ETR_FILTER_DIV2_N6) \ + || ((__VALUE__) == FL_ATIM_ETR_FILTER_DIV2_N8) \ + || ((__VALUE__) == FL_ATIM_ETR_FILTER_DIV4_N6) \ + || ((__VALUE__) == FL_ATIM_ETR_FILTER_DIV4_N8) \ + || ((__VALUE__) == FL_ATIM_ETR_FILTER_DIV8_N6) \ + || ((__VALUE__) == FL_ATIM_ETR_FILTER_DIV8_N8) \ + || ((__VALUE__) == FL_ATIM_ETR_FILTER_DIV16_N5) \ + || ((__VALUE__) == FL_ATIM_ETR_FILTER_DIV16_N6) \ + || ((__VALUE__) == FL_ATIM_ETR_FILTER_DIV16_N8) \ + || ((__VALUE__) == FL_ATIM_ETR_FILTER_DIV32_N5) \ + || ((__VALUE__) == FL_ATIM_ETR_FILTER_DIV32_N6) \ + || ((__VALUE__) == FL_ATIM_ETR_FILTER_DIV32_N8)) + + +#define IS_FL_ATIM_ETR_PSC(__VALUE__) (((__VALUE__) == FL_ATIM_ETR_PSC_DIV1) \ + || ((__VALUE__) == FL_ATIM_ETR_PSC_DIV2) \ + || ((__VALUE__) == FL_ATIM_ETR_PSC_DIV4) \ + || ((__VALUE__) == FL_ATIM_ETR_PSC_DIV8)) + + + +#define IS_FL_ATIM_ETR_POLARITY(__VALUE__) (((__VALUE__) == FL_ATIM_ETR_POLARITY_NORMAL) \ + || ((__VALUE__) == FL_ATIM_ETR_POLARITY_INVERT)) + + + +#define IS_FL_ATIM_IC_POLARITY(__VALUE__) (((__VALUE__) == FL_ATIM_IC_POLARITY_NORMAL) \ + || ((__VALUE__) == FL_ATIM_IC_POLARITY_INVERT)) + + + +#define IS_FL_ATIM_IC_ACTIVEINPUT(__VALUE__) (((__VALUE__) == FL_ATIM_CHANNEL_MODE_INPUT_NORMAL) \ + || ((__VALUE__) == FL_ATIM_CHANNEL_MODE_INPUT_CROSSOVER) \ + || ((__VALUE__) == FL_ATIM_CHANNEL_MODE_INPUT_TRC)) + + +#define IS_FL_ATIM_IC_PRESCALER(__VALUE__) (((__VALUE__) == FL_ATIM_IC_PSC_DIV1) \ + || ((__VALUE__) == FL_ATIM_IC_PSC_DIV2) \ + || ((__VALUE__) == FL_ATIM_IC_PSC_DIV4) \ + || ((__VALUE__) == FL_ATIM_IC_PSC_DIV8)) + + + +#define IS_FL_ATIM_OC_POLARITY(__VALUE__) (((__VALUE__) == FL_ATIM_OC_POLARITY_NORMAL) \ + || ((__VALUE__) == FL_ATIM_OC_POLARITY_INVERT)) + + + +#define IS_FL_ATIM_OC_MODE(__VALUE__) (((__VALUE__) == FL_ATIM_OC_MODE_FROZEN) \ + || ((__VALUE__) == FL_ATIM_OC_MODE_ACTIVE) \ + || ((__VALUE__) == FL_ATIM_OC_MODE_INACTIVE) \ + || ((__VALUE__) == FL_ATIM_OC_MODE_TOGGLE) \ + || ((__VALUE__) == FL_ATIM_OC_MODE_FORCED_INACTIVE) \ + || ((__VALUE__) == FL_ATIM_OC_MODE_FORCED_ACTIVE) \ + || ((__VALUE__) == FL_ATIM_OC_MODE_PWM1) \ + || ((__VALUE__) == FL_ATIM_OC_MODE_PWM2)) + +#define IS_FL_ATIM_AUTORELOAB_STATE(__VALUE__) (((__VALUE__) == FL_ENABLE) \ + || ((__VALUE__) == FL_DISABLE)) + +#define IS_FL_ATIM_OC_FASTMODE(__VALUE__) (((__VALUE__) == FL_ENABLE) \ + || ((__VALUE__) == FL_DISABLE)) + +#define IS_FL_ATIM_OC_PRELOAD(__VALUE__) (((__VALUE__) == FL_ENABLE) \ + || ((__VALUE__) == FL_DISABLE)) + +#define IS_FL_ATIM_OC_ETR_CLEARN(__VALUE__) (((__VALUE__) == FL_ENABLE) \ + || ((__VALUE__) == FL_DISABLE)) + +#define IS_FL_ATIM_OCN_STATE(__VALUE__) (((__VALUE__) == FL_ENABLE)\ + || ((__VALUE__) == FL_DISABLE)) + +#define IS_FL_ATIM_OC_STATE(__VALUE__) (((__VALUE__) == FL_ENABLE)\ + || ((__VALUE__) == FL_DISABLE)) + +#define IS_FL_ATIM_OC_IDLESTATE(__VALUE__) (((__VALUE__) == FL_ATIM_OC_IDLE_STATE_LOW) \ + || ((__VALUE__) == FL_ATIM_OC_IDLE_STATE_HIGH)) + +#define IS_FL_ATIM_OC_NIDLESTATE(__VALUE__) (((__VALUE__) == FL_ATIM_OCN_IDLE_STATE_LOW) \ + || ((__VALUE__) == FL_ATIM_OCN_IDLE_STATE_HIGH)) + + +#define IS_FL_ATIM_OC_NPOLARITY(__VALUE__) (((__VALUE__) == FL_ATIM_OCN_POLARITY_NORMAL) \ + || ((__VALUE__) == FL_ATIM_OCN_POLARITY_INVERT)) + + + +#define IS_FL_ATIM_BDTR_FILTER(__VALUE__) (((__VALUE__) == FL_ATIM_BREAK_FILTER_DIV1) \ + || ((__VALUE__) == FL_ATIM_BREAK_FILTER_DIV1_N2) \ + || ((__VALUE__) == FL_ATIM_BREAK_FILTER_DIV1_N4) \ + || ((__VALUE__) == FL_ATIM_BREAK_FILTER_DIV1_N8) \ + || ((__VALUE__) == FL_ATIM_BREAK_FILTER_DIV2_N6) \ + || ((__VALUE__) == FL_ATIM_BREAK_FILTER_DIV2_N8) \ + || ((__VALUE__) == FL_ATIM_BREAK_FILTER_DIV4_N6) \ + || ((__VALUE__) == FL_ATIM_BREAK_FILTER_DIV4_N8) \ + || ((__VALUE__) == FL_ATIM_BREAK_FILTER_DIV8_N6) \ + || ((__VALUE__) == FL_ATIM_BREAK_FILTER_DIV8_N8) \ + || ((__VALUE__) == FL_ATIM_BREAK_FILTER_DIV16_N5) \ + || ((__VALUE__) == FL_ATIM_BREAK_FILTER_DIV16_N6) \ + || ((__VALUE__) == FL_ATIM_BREAK_FILTER_DIV16_N8) \ + || ((__VALUE__) == FL_ATIM_BREAK_FILTER_DIV32_N5) \ + || ((__VALUE__) == FL_ATIM_BREAK_FILTER_DIV32_N6) \ + || ((__VALUE__) == FL_ATIM_BREAK_FILTER_DIV32_N8)) + +#define IS_FL_ATIM_OSSR_STATE(__VALUE__) (((__VALUE__) == FL_ATIM_OSSR_DISABLE) \ + || ((__VALUE__) == FL_ATIM_OSSR_ENABLE)) + +#define IS_FL_ATIM_OSSI_STATE(__VALUE__) (((__VALUE__) == FL_ATIM_OSSI_DISABLE) \ + || ((__VALUE__) == FL_ATIM_OSSI_ENABLE)) + +#define IS_FL_ATIM_LOCK_LEVEL(__VALUE__) (((__VALUE__) == FL_ATIM_LOCK_LEVEL_OFF) \ + || ((__VALUE__) == FL_ATIM_LOCK_LEVEL_1) \ + || ((__VALUE__) == FL_ATIM_LOCK_LEVEL_2) \ + || ((__VALUE__) == FL_ATIM_LOCK_LEVEL_3)) + +#define IS_FL_ATIM_BREAK_POLARITY(__VALUE__) (((__VALUE__) == FL_ATIM_BREAK_POLARITY_LOW) \ + || ((__VALUE__) == FL_ATIM_BREAK_POLARITY_HIGH)) + +#define IS_FL_ATIM_AUTOMATIC_OUTPUT_STATE(__VALUE__) (((__VALUE__) == FL_DISABLE) \ + || ((__VALUE__) == FL_ENABLE)) + +#define IS_FL_ATIM_TRIGGER_DELAY(__VALUE__) (((__VALUE__) == FL_DISABLE) \ + || ((__VALUE__) == FL_ENABLE)) + +#define IS_FL_ATIM_IC_CAPTURE_STATE(__VALUE__) (((__VALUE__) == FL_DISABLE) \ + || ((__VALUE__) == FL_ENABLE)) + +/** + * @} + */ + +/* Private function prototypes -----------------------------------------------*/ +/** @defgroup TIM_FL_Private_Functions TIM Private Functions + * @{ + */ +static FL_ErrorStatus OCConfig(ATIM_Type *TIMx, uint32_t Channel, FL_ATIM_OC_InitTypeDef *TIM_OC_InitStruct); +/** + * @} + */ + +/* Exported functions --------------------------------------------------------*/ +/** @addtogroup TIM_FL_EF_Init + * @{ + */ + +/** + * @brief 复位对应ATIMx寄存器. + * @param ATIMx + * @retval ErrorStatus枚举值: + * -FL_PASS 外设寄存器值恢复复位值 + * -FL_FAIL 未成功执行 + */ +FL_ErrorStatus FL_ATIM_DeInit(ATIM_Type *TIMx) +{ + FL_ErrorStatus result = FL_PASS; + /* Check the parameters */ + assert_param(IS_ATIM_INSTANCE(TIMx)); + /* 使能外设复位 */ + FL_RMU_EnablePeripheralReset(RMU); + /* 复位ATIM外设寄存器 */ + FL_RMU_EnableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_ATIM); + FL_RMU_DisableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_ATIM); + /* 关闭外设总线始时钟和工作时钟 */ + FL_CMU_DisableGroup4BusClock(FL_CMU_GROUP4_BUSCLK_ATIM); + FL_CMU_DisableGroup3OperationClock(FL_CMU_GROUP3_OPCLK_ATIM); + /* 锁定外设复位 */ + FL_RMU_DisablePeripheralReset(RMU); + return result; +} +/** + * @brief 配置基本定时器时基单元（内部时钟源）. + * @param TIMx Timer Instance + * @param TIM_InitStruct 指向一个 @ref FL_ATIM_InitTypeDef(时基配置结构体) + * @retval ErrorStatus枚举值 + * -FL_FAIL 配置过程发生错误 + * -FL_PASS 成功 + */ + +FL_ErrorStatus FL_ATIM_Init(ATIM_Type *TIMx, FL_ATIM_InitTypeDef *TIM_InitStruct) +{ + uint32_t i = 5; + /* 参数检查 */ + assert_param(IS_ATIM_INSTANCE(TIMx)); + assert_param(IS_FL_ATIM_COUNTERMODE(TIM_InitStruct->counterMode)); + assert_param(IS_FL_ATIM_CLOCKDIVISION(TIM_InitStruct->clockDivision)); + assert_param(IS_FL_ATIM_AUTORELOAB_STATE(TIM_InitStruct->autoReloadState)); + assert_param(IS_ATIM_CLKSRC(TIM_InitStruct->clockSource)); + /* 时钟总线使能配置 */ + FL_CMU_SetATIMClockSource(TIM_InitStruct->clockSource); + FL_CMU_EnableGroup4BusClock(FL_CMU_GROUP4_BUSCLK_ATIM); + FL_CMU_EnableGroup3OperationClock(FL_CMU_GROUP3_OPCLK_ATIM); + /* 设置重复计数值 */ + FL_ATIM_WriteRepetitionCounter(TIMx, TIM_InitStruct->repetitionCounter); + /* 计数器计数模式配置 */ + switch(TIM_InitStruct->counterMode) + { + /* 中心对称模式 */ + case FL_ATIM_COUNTER_ALIGNED_CENTER_DOWN : + case FL_ATIM_COUNTER_ALIGNED_CENTER_UP : + case FL_ATIM_COUNTER_ALIGNED_CENTER_UP_DOWN: + FL_ATIM_SetCounterDirection(TIMx,FL_ATIM_COUNTER_DIR_UP); + FL_ATIM_SetCounterAlignedMode(TIMx, TIM_InitStruct->counterMode); + break; + default: + /* 边沿模式 */ + FL_ATIM_SetCounterDirection(TIMx, TIM_InitStruct->counterMode); + FL_ATIM_SetCounterAlignedMode(TIMx, FL_ATIM_COUNTER_ALIGNED_EDGE); + break; + } + /* 自动重装载值 */ + FL_ATIM_WriteAutoReload(TIMx, TIM_InitStruct->autoReload); + /* 定时器分频系数与数字滤波器所使用的采样时钟分频比 */ + FL_ATIM_SetClockDivision(TIMx, TIM_InitStruct->clockDivision); + /* 时钟分频 */ + FL_ATIM_WritePrescaler(TIMx, TIM_InitStruct->prescaler); + /* 预装载配置 */ + if(TIM_InitStruct->autoReloadState == FL_ENABLE) + { + FL_ATIM_EnableARRPreload(TIMx); + } + else + { + FL_ATIM_DisableARRPreload(TIMx); + } + /* 手动触发更新事件，将配置值写入 */ + FL_ATIM_GenerateUpdateEvent(TIMx); + while((!FL_ATIM_IsActiveFlag_Update(ATIM))&&i) + { + i--; + } + /*清除UIF标志，防止产生UG事件中断*/ + FL_ATIM_ClearFlag_Update(ATIM); + return FL_PASS; +} + +/** + * @brief 设置 FL_ATIM_InitTypeDef 为默认配置 + * @param TIM_InitStruct 指向需要将值设置为默认配置的结构体 @ref FL_ATIM_InitTypeDef 结构体 + * + * @retval None + */ +void FL_ATIM_StructInit(FL_ATIM_InitTypeDef *TIM_InitStruct) +{ + /* Set the default configuration */ + TIM_InitStruct->clockSource = FL_CMU_ATIM_CLK_SOURCE_APBCLK; + TIM_InitStruct->prescaler = (uint16_t)0x0000; + TIM_InitStruct->counterMode = FL_ATIM_COUNTER_DIR_UP; + TIM_InitStruct->autoReload = 0xFFFFU; + TIM_InitStruct->clockDivision = FL_ATIM_CLK_DIVISION_DIV1; + TIM_InitStruct->repetitionCounter = 0; + TIM_InitStruct->autoReloadState = FL_DISABLE; +} + +/** + * @brief 配置基本定时器从模式，包括编码器模式. + * @param TIMx Timer Instance + * @param TIM_InitStruct 指向一个 @ref FL_ATIM_SlaveInitTypeDef 结构体 + * @retval ErrorStatus枚举值 + * -FL_FAIL 配置过程发生错误 + * -FL_PASS 成功 + */ +FL_ErrorStatus FL_ATIM_SlaveMode_Init(ATIM_Type *TIMx, FL_ATIM_SlaveInitTypeDef *TIM_InitStruct) +{ + /* 参数检查 */ + assert_param(IS_ATIM_INSTANCE(TIMx)); + assert_param(IS_FL_ATIM_TRIGGER_DELAY(TIM_InitStruct->triggerDelay)); + assert_param(IS_FL_ATIM_TRIGGER_SRC(TIM_InitStruct->triggerSrc)); + assert_param(IS_FL_ATIM_SLAVE_MODE(TIM_InitStruct->slaveMode)); + /* 时钟总线使能配置 */ + FL_CMU_EnableGroup4BusClock(FL_CMU_GROUP4_BUSCLK_ATIM); + FL_CMU_EnableGroup3OperationClock(FL_CMU_GROUP3_OPCLK_ATIM); + /* 触发延迟默认关闭 */ + FL_ATIM_DisableMasterSlaveMode(TIMx); + /* 关闭从模式以能写入TS */ + FL_ATIM_SetSlaveMode(TIMx, 0); + /* 从模式输入源选择 */ + FL_ATIM_SetTriggerInput(TIMx, TIM_InitStruct->triggerSrc); + /* 从模式选择 */ + FL_ATIM_SetSlaveMode(TIMx, TIM_InitStruct->slaveMode); + /* 触发延迟默认关闭 */ + if(TIM_InitStruct->triggerDelay == FL_ENABLE) + { + FL_ATIM_EnableMasterSlaveMode(TIMx); + } + return FL_PASS; +} +/** + * @brief 设置 FL_ATIM_SlaveInitTypeDef 为默认配置 + * @param TIM_InitStruct 指向需要将值设置为默认配置的结构体 @ref FL_ATIM_SlaveInitTypeDef 结构体 + * + * @retval None + */ +void FL_ATIM_SlaveModeStructInit(FL_ATIM_SlaveInitTypeDef *TIM_InitStruct) +{ + TIM_InitStruct->slaveMode = FL_ATIM_SLAVE_MODE_PROHIBITED; + TIM_InitStruct->triggerSrc = FL_ATIM_TRGI_TI1FP1; + TIM_InitStruct->triggerDelay = FL_DISABLE; +} + +/** + * @brief 配置TIM的输入捕获通道. + * @param TIMx Timer Instance + * @param Channel This parameter can be one of the following values: + * @arg @ref FL_ATIM_CHANNEL_0 + * @arg @ref FL_ATIM_CHANNEL_1 + * @arg @ref FL_ATIM_CHANNEL_2 + * @arg @ref FL_ATIM_CHANNEL_3 + * @param TIM_IC_InitStruct 指向一个 @ref FL_ATIM_IC_InitTypeDef 结构体 + * @retval TIM_OC_InitStruct pointer to a @ref FL_ATIM_OC_InitTypeDef structure + * -FL_FAIL 配置过程发生错误 + * -FL_PASS 成功 + */ +FL_ErrorStatus FL_ATIM_IC_Init(ATIM_Type *TIMx, uint32_t channel, FL_ATIM_IC_InitTypeDef *IC_InitStruct) +{ + /* 参数检查 */ + assert_param(IS_FL_ATIM_CHANNEL(channel)); + assert_param(IS_FL_ATIM_IC_CAPTURE_STATE(IC_InitStruct->captureState)); + assert_param(IS_FL_ATIM_IC_POLARITY(IC_InitStruct->ICPolarity)); + assert_param(IS_FL_ATIM_IC_ACTIVEINPUT(IC_InitStruct->ICActiveInput)); + assert_param(IS_FL_ATIM_IC_PRESCALER(IC_InitStruct->ICPrescaler)); + assert_param(IS_FL_ATIM_IC_FILTER(IC_InitStruct->ICFilter)); + /* 时钟总线使能配置 */ + FL_CMU_EnableGroup4BusClock(FL_CMU_GROUP4_BUSCLK_ATIM); + FL_CMU_EnableGroup3OperationClock(FL_CMU_GROUP3_OPCLK_ATIM); + /* 通道关闭 */ + FL_ATIM_OC_DisableChannel(TIMx, channel); + /*捕获极性 */ + FL_ATIM_IC_SetChannelPolarity(TIMx, IC_InitStruct->ICPolarity, channel); + /* 捕获映射通道 */ + FL_ATIM_CC_SetChannelMode(TIMx, IC_InitStruct->ICActiveInput, channel); + /* 捕获预分频 */ + FL_ATIM_IC_SetPrescaler(TIMx, IC_InitStruct->ICPrescaler, channel); + /* 捕获滤波器 */ + FL_ATIM_IC_SetFilter(TIMx, IC_InitStruct->ICFilter, channel); + if(IC_InitStruct->captureState == FL_ENABLE) + { + FL_ATIM_IC_EnableChannel(TIMx, channel); + } + return FL_PASS; +} +/** + * @brief 设置 FL_ATIM_IC_InitTypeDef 为默认配置 + * @param TIM_ICInitStruct 指向需要将值设置为默认配置的结构体 @ref FL_ATIM_IC_InitTypeDef 结构体 + * + * @retval None + */ +void FL_ATIM_IC_StructInit(FL_ATIM_IC_InitTypeDef *TIM_ICInitStruct) +{ + /* 默认配置 */ + TIM_ICInitStruct->ICPolarity = FL_ATIM_IC_POLARITY_NORMAL; + TIM_ICInitStruct->ICActiveInput = FL_ATIM_CHANNEL_MODE_INPUT_NORMAL; + TIM_ICInitStruct->ICPrescaler = FL_ATIM_IC_PSC_DIV1; + TIM_ICInitStruct->ICFilter = FL_ATIM_IC_FILTER_DIV1; + TIM_ICInitStruct->captureState = FL_DISABLE; +} +/** + * @brief 配置TIM触发输入捕获通道ETR. + * @param TIMx Timer Instance + * @param ETPolarity 极性 + * @param ETPrescaler 分频 + * @param ETR_Filter 滤波 + * @param TIM_IC_InitStruct 指向一个 @ref FL_ATIM_IC_InitTypeDef 结构体 + * @retval TIM_OC_InitStruct pointer to a @ref FL_ATIM_OC_InitTypeDef structure + * -FL_FAIL 配置过程发生错误 + * -FL_PASS 成功 + */ +FL_ErrorStatus FL_ATIM_ETR_Init(ATIM_Type *TIMx, FL_ATIM_ETR_InitTypeDef *TIM_InitStruct) +{ + assert_param(IS_FL_ATIM_ETP_FILTER(TIM_InitStruct->ETRFilter)); + assert_param(IS_FL_ATIM_ETR_PSC(TIM_InitStruct->ETRClockDivision)); + assert_param(IS_FL_ATIM_ETR_POLARITY(TIM_InitStruct->ETRPolarity)); + /* 时钟总线使能配置 */ + FL_CMU_EnableGroup4BusClock(FL_CMU_GROUP4_BUSCLK_ATIM); + FL_CMU_EnableGroup3OperationClock(FL_CMU_GROUP3_OPCLK_ATIM); + /* 外部时钟极性 */ + FL_ATIM_SetETRPolarity(TIMx, TIM_InitStruct->ETRPolarity); + /* 外部时钟滤波 */ + FL_ATIM_SetETRFilter(TIMx, TIM_InitStruct->ETRFilter); + /* 外部时钟分频 */ + FL_ATIM_SetETRPrescaler(TIMx, TIM_InitStruct->ETRClockDivision); + if(TIM_InitStruct->useExternalTrigger == FL_ENABLE) + { + FL_ATIM_EnableExternalClock(TIMx); + } + else + { + FL_ATIM_DisableExternalClock(TIMx); + } + return FL_PASS; +} + +void FL_ATIM_ETRStructInit(FL_ATIM_ETR_InitTypeDef *TIM_InitStruct) +{ + TIM_InitStruct->useExternalTrigger = FL_DISABLE; + TIM_InitStruct->ETRFilter = FL_ATIM_ETR_FILTER_DIV1; + TIM_InitStruct->ETRPolarity = FL_ATIM_ETR_POLARITY_NORMAL; + TIM_InitStruct->ETRClockDivision = FL_ATIM_ETR_PSC_DIV1; +} +/** + * @brief 配置 + * @param TIMx Timer Instance + * @param Channel This parameter can be one of the following values: + * @arg @ref FL_ATIM_CHANNEL_1 + * @arg @ref FL_ATIM_CHANNEL_2 + * @arg @ref FL_ATIM_CHANNEL_3 + * @arg @ref FL_ATIM_CHANNEL_4 + * @param TIM_ICInitStruct 指向需要将值设置为默认配置的结构体 @ref FL_ATIM_IC_InitTypeDef 结构体包含配置参数. + * @retval None + * -FL_FAIL 配置过程发生错误 + * -FL_PASS 成功 + */ +static FL_ErrorStatus OCConfig(ATIM_Type *TIMx, uint32_t channel, FL_ATIM_OC_InitTypeDef *TIM_OC_InitStruct) +{ + FL_ErrorStatus result = FL_PASS; + /* 配置比较输出通道模式 */ + FL_ATIM_OC_SetMode(TIMx, TIM_OC_InitStruct->OCMode, channel); + /* 配置TRF清零使能 */ + if(TIM_OC_InitStruct->OCETRFStatus == FL_ENABLE) + { + FL_ATIM_OC_EnableClear(TIMx, channel); + } + else + { + FL_ATIM_OC_DisableClear(TIMx, channel); + } + /* 比较输出通道快速模式 */ + if(TIM_OC_InitStruct->OCFastMode == FL_ENABLE) + { + FL_ATIM_OC_EnableFastMode(TIMx, channel); + } + else + { + FL_ATIM_OC_DisableFastMode(TIMx, channel); + } + /* 比较输出通道缓冲模式 */ + if(TIM_OC_InitStruct->OCPreload == FL_ENABLE) + { + FL_ATIM_OC_EnablePreload(TIMx, channel); + } + else + { + FL_ATIM_OC_DisablePreload(TIMx, channel); + } + if(TIM_OC_InitStruct->OCNState == FL_ENABLE) + { + FL_ATIM_OC_EnableReverseChannel(TIMx, channel); + } + else + { + FL_ATIM_OC_DisableReverseChannel(TIMx, channel); + } + if(TIM_OC_InitStruct->OCState == FL_ENABLE) + { + /* 通道使能 */ + FL_ATIM_OC_EnableChannel(TIMx, channel); + } + else + { + FL_ATIM_OC_DisableChannel(TIMx, channel); + } + /* 设置比较值 */ + switch(channel) + { + case FL_ATIM_CHANNEL_1: + FL_ATIM_WriteCompareCH1(TIMx, TIM_OC_InitStruct->compareValue); + break; + case FL_ATIM_CHANNEL_2: + FL_ATIM_WriteCompareCH2(TIMx, TIM_OC_InitStruct->compareValue); + break; + case FL_ATIM_CHANNEL_3: + FL_ATIM_WriteCompareCH3(TIMx, TIM_OC_InitStruct->compareValue); + break; + case FL_ATIM_CHANNEL_4: + FL_ATIM_WriteCompareCH4(TIMx, TIM_OC_InitStruct->compareValue); + break; + default : + result = FL_FAIL; + break; + } + return result; +} +/** + * @brief 配置TIM的比较输出通道. + * @param TIMx Timer Instance + * @param Channel This parameter can be one of the following values: + * @arg @ref FL_ATIM_CHANNEL_1 + * @arg @ref FL_ATIM_CHANNEL_2 + * @arg @ref FL_ATIM_CHANNEL_3 + * @arg @ref FL_ATIM_CHANNEL_4 + * @retval TIM_OC_InitStruct pointer to a @ref FL_ATIM_OC_InitTypeDef structure + * -FL_FAIL 配置过程发生错误 + * -FL_PASS 成功 + */ +FL_ErrorStatus FL_ATIM_OC_Init(ATIM_Type *TIMx, uint32_t channel, FL_ATIM_OC_InitTypeDef *TIM_OC_InitStruct) +{ + uint32_t i = 5; + FL_ErrorStatus result = FL_PASS; + /* 参数检查 */ + assert_param(IS_ATIM_INSTANCE(TIMx)); + assert_param(IS_FL_ATIM_OC_MODE(TIM_OC_InitStruct->OCMode)); + assert_param(IS_FL_ATIM_OC_PRELOAD(TIM_OC_InitStruct->OCPreload)); + assert_param(IS_FL_ATIM_OC_POLARITY(TIM_OC_InitStruct->OCPolarity)); + assert_param(IS_FL_ATIM_OC_FASTMODE(TIM_OC_InitStruct->OCFastMode)); + assert_param(IS_FL_ATIM_OC_ETR_CLEARN(TIM_OC_InitStruct->OCETRFStatus)); + assert_param(IS_FL_ATIM_OCN_STATE(TIM_OC_InitStruct->OCNState)); + assert_param(IS_FL_ATIM_OC_STATE(TIM_OC_InitStruct->OCState)); + assert_param(IS_FL_ATIM_OC_IDLESTATE(TIM_OC_InitStruct->OCIdleState)); + assert_param(IS_FL_ATIM_OC_NIDLESTATE(TIM_OC_InitStruct->OCNIdleState)); + assert_param(IS_FL_ATIM_OC_NPOLARITY(TIM_OC_InitStruct->OCNPolarity)); + /* 通道关闭 */ + FL_ATIM_OC_DisableChannel(TIMx, channel); + FL_ATIM_OC_DisableReverseChannel(TIMx, channel); + /* 通道极性 */ + FL_ATIM_OC_SetChannelPolarity(TIMx, TIM_OC_InitStruct->OCPolarity, channel); + /* 通道空闲电平 */ + FL_ATIM_OC_SetChannelIdleState(TIMx, TIM_OC_InitStruct->OCIdleState, channel); + /* 互补通道空闲电平 */ + FL_ATIM_OC_SetReverseChannelIdleState(TIMx, TIM_OC_InitStruct->OCNIdleState, channel); + /* 互补通道极性 */ + FL_ATIM_OC_SetReverseChannelPolarity(TIMx, TIM_OC_InitStruct->OCNPolarity, channel); + /* 捕获映射到输出通道 */ + FL_ATIM_CC_SetChannelMode(TIMx, FL_ATIM_CHANNEL_MODE_OUTPUT, channel); + /* 输出比较模式寄存器配置 */ + OCConfig(TIMx, channel, TIM_OC_InitStruct); + /* 手动触发更新事件，将配置值写入 */ + FL_ATIM_GenerateUpdateEvent(TIMx); + while((!FL_ATIM_IsActiveFlag_Update(ATIM))&&i) + { + i--; + } + /*清除UIF标志，防止产生UG事件中断*/ + FL_ATIM_ClearFlag_Update(ATIM); + return result; +} +/** + * @brief 设置 FL_ATIM_OC_InitTypeDef 为默认配置 + * @param TIM_OC_InitStruct 指向需要将值设置为默认配置的结构体 @ref FL_ATIM_OC_InitTypeDef 结构体 + * + * @retval None + */ +void FL_ATIM_OC_StructInit(FL_ATIM_OC_InitTypeDef *TIM_OC_InitStruct) +{ + /* Set the default configuration */ + TIM_OC_InitStruct->OCMode = FL_ATIM_OC_MODE_FROZEN; + TIM_OC_InitStruct->OCETRFStatus = FL_DISABLE; + TIM_OC_InitStruct->OCFastMode = FL_DISABLE; + TIM_OC_InitStruct->compareValue = 0x00000000U; + TIM_OC_InitStruct->OCPolarity = FL_ATIM_OC_POLARITY_NORMAL; + TIM_OC_InitStruct->OCPreload = FL_DISABLE; + TIM_OC_InitStruct->OCIdleState = FL_ATIM_OC_IDLE_STATE_LOW; + TIM_OC_InitStruct->OCNIdleState = FL_ATIM_OCN_IDLE_STATE_LOW; + TIM_OC_InitStruct->OCNPolarity = FL_ATIM_OCN_POLARITY_NORMAL; + TIM_OC_InitStruct->OCNState = FL_DISABLE; +} + +/** + * @brief 配置TIM的输入捕获通道. + * @param TIMx Timer Instance + * @param TIM_IC_InitStruct 指向一个 @ref FL_ATIM_IC_InitTypeDef 结构体 + * @retval TIM_OC_InitStruct pointer to a @ref FL_ATIM_OC_InitTypeDef structure + * -FL_FAIL 配置过程发生错误 + * -FL_PASS 成功 + */ +FL_ErrorStatus FL_ATIM_BDTR_Init(ATIM_Type *TIMx, FL_ATIM_BDTR_InitTypeDef *TIM_BDTR_InitStruct) +{ + FL_ErrorStatus result = FL_PASS; + /* 参数检查 */ + assert_param(IS_ATIM_INSTANCE(TIMx)); + assert_param(IS_FL_ATIM_OSSR_STATE(TIM_BDTR_InitStruct->OSSRState)); + assert_param(IS_FL_ATIM_OSSI_STATE(TIM_BDTR_InitStruct->OSSIState)); + assert_param(IS_FL_ATIM_LOCK_LEVEL(TIM_BDTR_InitStruct->lockLevel)); + assert_param(IS_FL_ATIM_BREAK_POLARITY(TIM_BDTR_InitStruct->breakPolarity)); + assert_param(IS_FL_ATIM_AUTOMATIC_OUTPUT_STATE(TIM_BDTR_InitStruct->automaticOutput)); + assert_param(IS_FL_ATIM_BDTR_FILTER(TIM_BDTR_InitStruct->breakFilter)); + /* 关闭所有输出 */ + FL_ATIM_DisableALLOutput(TIMx); + /* 设置死区时间 */ + FL_ATIM_WriteDeadTime(TIMx, TIM_BDTR_InitStruct->deadTime); + /* 设置寄存器锁定等级 */ + FL_ATIM_SetLockLevel(TIMx, TIM_BDTR_InitStruct->lockLevel); + /* Idle状态下关闭状态 */ + FL_ATIM_SetOffStateIdle(TIMx, TIM_BDTR_InitStruct->OSSIState); + /* run状态下关闭状态 */ + FL_ATIM_SetOffStateRun(TIMx, TIM_BDTR_InitStruct->OSSRState); + /* 门控1刹车信号 */ + FL_ATIM_SetBreak1GateState(TIMx, TIM_BDTR_InitStruct->gatedBrakeSignal_1); + /* 门控2刹车信号 */ + FL_ATIM_SetBreak2GateState(TIMx, TIM_BDTR_InitStruct->gatedBrakeSignal_2); + /* 门控刹车信号组合方式设置 */ + FL_ATIM_SetBreakSignalCombination(TIMx, TIM_BDTR_InitStruct->brakeSignalCombined); + /* 刹车极性设置 */ + FL_ATIM_SetBreakPolarity(TIMx, TIM_BDTR_InitStruct->breakPolarity); + /* 更新时间自动设置输出配置，如果刹车事件发生过并且当前功能使能，则下一个更新事件将重新自动输出 */ + if(TIM_BDTR_InitStruct->automaticOutput == FL_ENABLE) + { + FL_ATIM_EnableAutomaticOutput(TIMx); + } + else + { + FL_ATIM_DisableAutomaticOutput(TIMx); + } + /* 刹车功能开关配置 */ + if(TIM_BDTR_InitStruct->breakState == FL_ENABLE) + { + FL_ATIM_EnableBreak(TIMx); + } + else + { + FL_ATIM_DisableBreak(TIMx); + } + /* 使能全部输出 */ + FL_ATIM_EnableALLOutput(TIMx); + return result; +} +/** + * @brief 设置 FL_ATIM_IC_InitTypeDef 为默认配置 + * @param TIM_ICInitStruct 指向需要将值设置为默认配置的结构体 @ref FL_ATIM_IC_InitTypeDef 结构体 + * + * @retval None + */ +void FL_ATIM_BDTR_StructInit(FL_ATIM_BDTR_InitTypeDef *TIM_BDTR_InitStruct) +{ + TIM_BDTR_InitStruct->deadTime = 0x00; + TIM_BDTR_InitStruct->lockLevel = FL_ATIM_LOCK_LEVEL_OFF; + TIM_BDTR_InitStruct->OSSRState = FL_ATIM_OSSR_DISABLE; + TIM_BDTR_InitStruct->OSSIState = FL_ATIM_OSSI_DISABLE; + TIM_BDTR_InitStruct->breakFilter = FL_ATIM_BREAK_FILTER_DIV1; + TIM_BDTR_InitStruct->breakPolarity = FL_ATIM_BREAK_POLARITY_LOW; + TIM_BDTR_InitStruct->automaticOutput = FL_DISABLE; + TIM_BDTR_InitStruct->gatedBrakeSignal_1 = FL_ATIM_BREAK1_GATE_AUTO; + TIM_BDTR_InitStruct->gatedBrakeSignal_2 = FL_ATIM_BREAK2_GATE_AUTO; + TIM_BDTR_InitStruct->breakState = FL_DISABLE; + TIM_BDTR_InitStruct->brakeSignalCombined = FL_ATIM_BREAK_COMBINATION_OR; +} + +/** + * @} + */ + +#endif /* FL_ATIM_DRIVER_ENABLED */ + +/** + * @} + */ + +/** + * @} + */ + +/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/ diff --git a/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_bstim16.c b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_bstim16.c new file mode 100644 index 0000000..8fd7602 --- /dev/null +++ b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_bstim16.c @@ -0,0 +1,182 @@ + /** + ******************************************************************************************************* + * @file fm33lg0xx_fl_bstim16.c + * @author FMSH Application Team + * @brief Src file of BSTIM FL Module + ******************************************************************************************************* + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + +/* Includes ------------------------------------------------------------------*/ +#include "fm33lg0xx_fl.h" + +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @addtogroup BSTIM16 + * @{ + */ + +#ifdef FL_BSTIM16_DRIVER_ENABLED + +/* Private macros ------------------------------------------------------------*/ +/** @addtogroup BSTIM16_FL_Private_Macros + * @{ + */ +#define IS_FL_BSTIM16_INSTANCE(INTANCE) ((INTANCE) == BSTIM16) + +#define IS_FL_BSTIM16_PSC(__VALUE__) ((__VALUE__) <= 0x0000FFFF) + +#define IS_FL_BSTIM16_AUTORELOAD(__VALUE__) ((__VALUE__) <= 0x0000FFFF) + + +#define IS_FL_BSTIM16_AUTORELOAD_MODE(__VALUE__) (((__VALUE__) == FL_ENABLE)||\ + ((__VALUE__) == FL_DISABLE)) + +#define IS_FL_BSTIM16_CLOCK_SRC(__VALUE__) (((__VALUE__) == FL_CMU_BSTIM16_CLK_SOURCE_APBCLK)||\ + ((__VALUE__) == FL_CMU_BSTIM16_CLK_SOURCE_RCLP)||\ + ((__VALUE__) == FL_CMU_BSTIM16_CLK_SOURCE_RCLF)||\ + ((__VALUE__) == FL_CMU_BSTIM16_CLK_SOURCE_LSCLK)) + +/** + * @} + */ + +/* Exported functions --------------------------------------------------------*/ +/** @addtogroup BSTIM16_FL_EF_Init + * @{ + */ + +/** + * @brief 复位对应BSTIM16寄存器. + * @param BSTIMx + * @retval ErrorStatus枚举值: + * -FL_PASS 外设寄存器值恢复复位值 + * -FL_FAIL 未成功执行 + */ +FL_ErrorStatus FL_BSTIM16_DeInit(BSTIM16_Type *BSTIM16x) +{ + assert_param(IS_FL_BSTIM16_INSTANCE(BSTIM16x)); + /* 使能外设复位 */ + FL_RMU_EnablePeripheralReset(RMU); + /* 复位IIC外设寄存器 */ + FL_RMU_EnableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_BSTIM16); + FL_RMU_DisableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_BSTIM16); + /* 关闭外设总线始时钟和工作时钟 */ + FL_CMU_DisableGroup4BusClock(FL_CMU_GROUP4_BUSCLK_BSTIM16); + FL_CMU_DisableGroup3OperationClock(FL_CMU_GROUP3_OPCLK_BSTIM16); + /* 锁定外设复位 */ + FL_RMU_DisablePeripheralReset(RMU); + return FL_PASS; +} +/** + * @brief 根据 BSTIM16_InitStruct 的配置信息初始化对应外设入口地址的寄存器值. + * @param BSTIMx BSTIMx + * @param BSTIM16_InitStruct 指向一个 @ref FL_BSTIM16_InitTypeDef 结构体 + * 其中包含了外设的相关配置信息. + * @retval ErrorStatus枚举值 + * -FL_FAIL 配置过程发生错误 + * -FL_PASS 配置成功 + */ +FL_ErrorStatus FL_BSTIM16_Init(BSTIM16_Type *BSTIM16x, FL_BSTIM16_InitTypeDef *init) +{ + uint32_t i = 5; + /* 参数检查 */ + assert_param(IS_FL_BSTIM16_INSTANCE(BSTIM16x)); + assert_param(IS_FL_BSTIM16_CLOCK_SRC(init->clockSource)); + assert_param(IS_FL_BSTIM16_PSC(init->prescaler)); + assert_param(IS_FL_BSTIM16_AUTORELOAD(init->autoReload)); + assert_param(IS_FL_BSTIM16_AUTORELOAD_MODE(init->autoReloadState)); + /* 时钟使能 */ + FL_CMU_EnableGroup4BusClock(FL_CMU_GROUP4_BUSCLK_BSTIM16); + /* 选择时钟源 */ + FL_CMU_SetBSTIM16ClockSource(init->clockSource); + FL_CMU_EnableGroup3OperationClock(FL_CMU_GROUP3_OPCLK_BSTIM16); + /* 分频系数 */ + FL_BSTIM16_WritePrescaler(BSTIM16x, init->prescaler); + /* 自动重装载值 */ + FL_BSTIM16_EnableUpdateEvent(BSTIM16x); + FL_BSTIM16_WriteAutoReload(BSTIM16x, init->autoReload); + if(init->autoReloadState == FL_ENABLE) + { + FL_BSTIM16_EnableARRPreload(BSTIM16x); + } + else + { + FL_BSTIM16_DisableARRPreload(BSTIM16x); + } + FL_BSTIM16_GenerateUpdateEvent(BSTIM16x); + while((!FL_BSTIM16_IsActiveFlag_Update(BSTIM16x))&&i) + { + i--; + } + return FL_PASS; +} +/** + * @brief 设置 BSTIM16_InitStruct 为默认配置 + * @param BSTIM16_InitStruct 指向需要将值设置为默认配置的结构体 @ref FL_BSTIM16_InitTypeDef 结构体 + * + * @retval None + */ + +void FL_BSTIM16_StructInit(FL_BSTIM16_InitTypeDef *init) +{ + init->prescaler = 0; + init->autoReload = 0xFFFFFFFF; + init->autoReloadState = FL_ENABLE; + init->clockSource = FL_CMU_BSTIM16_CLK_SOURCE_APBCLK; +} + +/** + * @} + */ + +#endif /* FL_BSTIM16_DRIVER_ENABLED */ + +/** + * @} + */ + +/** + * @} + */ + + +/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/ diff --git a/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_bstim32.c b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_bstim32.c new file mode 100644 index 0000000..adb8411 --- /dev/null +++ b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_bstim32.c @@ -0,0 +1,176 @@ + /** + ******************************************************************************************************* + * @file fm33lg0xx_fl_bstim32.c + * @author FMSH Application Team + * @brief Src file of BSTIM FL Module + ******************************************************************************************************* + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + +/* Includes ------------------------------------------------------------------*/ +#include "fm33lg0xx_fl.h" + +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @addtogroup BSTIM32 + * @{ + */ + +#ifdef FL_BSTIM32_DRIVER_ENABLED + +/* Private macros ------------------------------------------------------------*/ +/** @addtogroup BSTIM32_FL_Private_Macros + * @{ + */ +#define IS_FL_BSTIM32_INSTANCE(INTANCE) ((INTANCE) == BSTIM32) + + +#define IS_FL_BSTIM32_AUTORELOAD_MODE(__VALUE__) (((__VALUE__) == FL_ENABLE)||\ + ((__VALUE__) == FL_DISABLE)) + +#define IS_FL_BSTIM32_CLOCK_SRC(__VALUE__) (((__VALUE__) == FL_CMU_BSTIM32_CLK_SOURCE_APBCLK)||\ + ((__VALUE__) == FL_CMU_BSTIM32_CLK_SOURCE_RCLP)||\ + ((__VALUE__) == FL_CMU_BSTIM32_CLK_SOURCE_RCLF)||\ + ((__VALUE__) == FL_CMU_BSTIM32_CLK_SOURCE_LSCLK)) + +/** + * @} + */ + +/* Exported functions --------------------------------------------------------*/ +/** @addtogroup BSTIM_FL_EF_Init + * @{ + */ + +/** + * @brief 复位对应BSTIM寄存器. + * @param BSTIMx + * @retval ErrorStatus枚举值: + * -FL_PASS 外设寄存器值恢复复位值 + * -FL_FAIL 未成功执行 + */ +FL_ErrorStatus FL_BSTIM32_DeInit(BSTIM32_Type *BSTIM32x) +{ + assert_param(IS_FL_BSTIM32_INSTANCE(BSTIM32x)); + /* 使能外设复位 */ + FL_RMU_EnablePeripheralReset(RMU); + /* 复位外设寄存器 */ + FL_RMU_EnableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_BSTIM32); + FL_RMU_DisableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_BSTIM32); + /* 关闭外设总线始时钟和工作时钟 */ + FL_CMU_DisableGroup4BusClock(FL_CMU_GROUP4_BUSCLK_BSTIM32); + FL_CMU_DisableGroup3OperationClock(FL_CMU_GROUP3_OPCLK_BSTIM32); + /* 锁定外设复位 */ + FL_RMU_DisablePeripheralReset(RMU); + return FL_PASS; +} +/** + * @brief 根据 BSTIM32_InitStruct 的配置信息初始化对应外设入口地址的寄存器值. + * @param BSTIMx BSTIMx + * @param BSTIM32_InitStruct 指向一个 @ref FL_BSTIM32_InitTypeDef 结构体 + * 其中包含了外设的相关配置信息. + * @retval ErrorStatus枚举值 + * -FL_FAIL 配置过程发生错误 + * -FL_PASS 配置成功 + */ +FL_ErrorStatus FL_BSTIM32_Init(BSTIM32_Type *BSTIM32x, FL_BSTIM32_InitTypeDef *init) +{ + uint32_t i = 5; + /* 参数检查 */ + assert_param(IS_FL_BSTIM32_INSTANCE(BSTIM32x)); + assert_param(IS_FL_BSTIM32_CLOCK_SRC(init->clockSource)); + assert_param(IS_FL_BSTIM32_AUTORELOAD_MODE(init->autoReloadState)); + /* 时钟使能 */ + FL_CMU_EnableGroup4BusClock(FL_CMU_GROUP4_BUSCLK_BSTIM32); + /* 选择时钟源 */ + FL_CMU_SetBSTIM32ClockSource(init->clockSource); + FL_CMU_EnableGroup3OperationClock(FL_CMU_GROUP3_OPCLK_BSTIM32); + /* 分频系数 */ + FL_BSTIM32_WritePrescaler(BSTIM32x, init->prescaler); + /* 自动重装载值 */ + FL_BSTIM32_EnableUpdateEvent(BSTIM32x); + FL_BSTIM32_WriteAutoReload(BSTIM32x, init->autoReload); + if(init->autoReloadState == FL_ENABLE) + { + FL_BSTIM32_EnableARRPreload(BSTIM32x); + } + else + { + FL_BSTIM32_DisableARRPreload(BSTIM32x); + } + FL_BSTIM32_GenerateUpdateEvent(BSTIM32x); + while((!FL_BSTIM32_IsActiveFlag_Update(BSTIM32x))&&i) + { + i--; + } + return FL_PASS; +} + +/** + * @brief 设置 BSTIM32_InitStruct 为默认配置 + * @param BSTIM32_InitStruct 指向需要将值设置为默认配置的结构体 @ref FL_BSTIM_InitTypeDef 结构体 + * + * @retval None + */ +void FL_BSTIM32_StructInit(FL_BSTIM32_InitTypeDef *init) +{ + init->prescaler = 0; + init->autoReload = 0xFFFFFFFF; + init->autoReloadState = FL_ENABLE; + init->clockSource = FL_CMU_BSTIM32_CLK_SOURCE_APBCLK; +} + +/** + * @} + */ + +#endif /* FL_BSTIM32_DRIVER_ENABLED */ + +/** + * @} + */ + +/** + * @} + */ + + +/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/ diff --git a/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_can.c b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_can.c new file mode 100644 index 0000000..c47f87b --- /dev/null +++ b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_can.c @@ -0,0 +1,326 @@ + /** + ******************************************************************************************************* + * @file fm33lg0xx_fl_can.c + * @author FMSH Application Team + * @brief Src file of VAN fL Module + ******************************************************************************************************* + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + +/* Includes ------------------------------------------------------------------*/ +#include "fm33lg0xx_fl.h" + +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @addtogroup CAN + * @{ + */ + +#ifdef FL_CAN_DRIVER_ENABLED + +/* Private macros ------------------------------------------------------------*/ +/** @addtogroup CAN_FL_Private_Macros + * @{ + */ +#define IS_CAN_SJW(__VALUE__) (((__VALUE__) == FL_CAN_SJW_1Tq) \ + || ((__VALUE__) == FL_CAN_SJW_2Tq) \ + || ((__VALUE__) == FL_CAN_SJW_3Tq) \ + || ((__VALUE__) == FL_CAN_SJW_4Tq)) + + +#define IS_CAN_TS1(__VALUE__) (((__VALUE__) == FL_CAN_TS1_1Tq) \ + || ((__VALUE__) == FL_CAN_TS1_2Tq) \ + || ((__VALUE__) == FL_CAN_TS1_3Tq) \ + || ((__VALUE__) == FL_CAN_TS1_4Tq) \ + || ((__VALUE__) == FL_CAN_TS1_5Tq) \ + || ((__VALUE__) == FL_CAN_TS1_6Tq) \ + || ((__VALUE__) == FL_CAN_TS1_7Tq) \ + || ((__VALUE__) == FL_CAN_TS1_8Tq) \ + || ((__VALUE__) == FL_CAN_TS1_9Tq) \ + || ((__VALUE__) == FL_CAN_TS1_10Tq) \ + || ((__VALUE__) == FL_CAN_TS1_11Tq) \ + || ((__VALUE__) == FL_CAN_TS1_12Tq) \ + || ((__VALUE__) == FL_CAN_TS1_13Tq) \ + || ((__VALUE__) == FL_CAN_TS1_14Tq) \ + || ((__VALUE__) == FL_CAN_TS1_15Tq) \ + || ((__VALUE__) == FL_CAN_TS1_16Tq)) + + + +#define IS_CAN_TS2(__VALUE__) (((__VALUE__) == FL_CAN_TS2_1Tq) \ + || ((__VALUE__) == FL_CAN_TS2_2Tq) \ + || ((__VALUE__) == FL_CAN_TS2_3Tq) \ + || ((__VALUE__) == FL_CAN_TS2_4Tq) \ + || ((__VALUE__) == FL_CAN_TS2_5Tq) \ + || ((__VALUE__) == FL_CAN_TS2_6Tq) \ + || ((__VALUE__) == FL_CAN_TS2_7Tq) \ + || ((__VALUE__) == FL_CAN_TS2_8Tq)) + + +#define IS_CAN_FILTER_EN(__VALUE__) (((__VALUE__) == FL_ENABLE) \ + || ((__VALUE__) == FL_DISABLE)) + + +#define IS_CAN_AFx(__VALUE__) (((__VALUE__) == FL_CAN_FILTER1) \ + || ((__VALUE__) == FL_CAN_FILTER2) \ + || ((__VALUE__) == FL_CAN_FILTER3) \ + || ((__VALUE__) == FL_CAN_FILTER4)) + + +#define IS_CAN_MODE(__VALUE__) (((__VALUE__) == FL_CAN_MODE_NORMAL) \ + || ((__VALUE__) == FL_CAN_MODE_LOOPBACK) \ + || ((__VALUE__) == FL_CAN_MODE_CONFIG)) + + +#define IS_CAN_CLK(__VALUE__) (((__VALUE__) == FL_CMU_CAN_CLK_SOURCE_RCHF) \ + || ((__VALUE__) == FL_CMU_CAN_CLK_SOURCE_XTHF) \ + || ((__VALUE__) == FL_CMU_CAN_CLK_SOURCE_PLL) \ + || ((__VALUE__) == FL_CMU_CAN_CLK_SOURCE_APBCLK)) + + + + + + +#define IS_CAN_SRR(__VALUE__) (((__VALUE__)==FL_CAN_SRR_BIT_LOW) ||((__VALUE__)==FL_CAN_SRR_BIT_HIGH)) +#define IS_CAN_IDE(__VALUE__) (((__VALUE__)==FL_CAN_IDE_BIT_LOW) ||((__VALUE__)==FL_CAN_IDE_BIT_HIGH)) +#define IS_CAN_RTR(__VALUE__) (((__VALUE__)==FL_CAN_RTR_BIT_LOW) ||((__VALUE__)==FL_CAN_RTR_BIT_HIGH)) + +#define IS_CAN_ID18_MASK(__VALUE__) (__VALUE__<=262143U) +#define IS_CAN_ID11_MASK(__VALUE__) (__VALUE__<=2047U) + +#define IS_CAN_SRR_MASK(__VALUE__) (((__VALUE__) == FL_ENABLE) \ + || ((__VALUE__) == FL_DISABLE)) + +#define IS_CAN_IDE_MASK(__VALUE__) (((__VALUE__) == FL_ENABLE) \ + || ((__VALUE__) == FL_DISABLE)) + +#define IS_CAN_RTR_MASK(__VALUE__) (((__VALUE__) == FL_ENABLE) \ + || ((__VALUE__) == FL_DISABLE)) +/** + * @} + */ + +/* Exported functions --------------------------------------------------------*/ +/** @addtogroup CAN_FL_EF_Init + * @{ + */ + +/** + * @brief CAN初始化 + * @param CANx外设入口地址 + * @param CAN_InitStruct 指向一个@ref FL_CAN_InitTypeDef 结构体的指针 + * @retval 错误状态可能值 + * -FL_FAIL 配置过程发生错误 + * -FL_PASS 配置成功 + */ +FL_ErrorStatus FL_CAN_Init(CAN_Type *CANx, FL_CAN_InitTypeDef *CAN_InitStruct) +{ + /*参数检查*/ + assert_param(IS_CAN_SJW(CAN_InitStruct->SJW)); + assert_param(IS_CAN_TS1(CAN_InitStruct->TS1)); + assert_param(IS_CAN_TS2(CAN_InitStruct->TS2)); + assert_param(IS_CAN_CLK(CAN_InitStruct->clockSource)); + /*时钟总线配置*/ + FL_CMU_EnableGroup3BusClock(FL_CMU_GROUP3_BUSCLK_CAN); + FL_CMU_EnableGroup3OperationClock(FL_CMU_GROUP3_OPCLK_CAN); + /*CAN时钟源选择*/ + FL_CMU_SetCANClockSource(CAN_InitStruct->clockSource); + /*复位CAN模块*/ + FL_CAN_SetSoftwareReset(CANx, FL_CAN_SOFTWARE_RESET); + /*设置同步段*/ + FL_CAN_WriteSyncJumpWidth(CANx, CAN_InitStruct->SJW); + /*设置时间段1*/ + FL_CAN_WriteTimeSegment1Length(CANx, CAN_InitStruct->TS1); + /*设置时间段2*/ + FL_CAN_WriteTimeSegment2Length(CANx, CAN_InitStruct->TS2); + /*设置波特率*/ + FL_CAN_WriteBaudRatePrescaler(CANx, CAN_InitStruct->BRP); + if(CAN_InitStruct->mode == FL_CAN_MODE_NORMAL) + { + FL_CAN_DisableLoopBackMode(CANx); /* Normal模式 */ + FL_CAN_Enable(CANx); + } + else + if(CAN_InitStruct->mode == FL_CAN_MODE_LOOPBACK) + { + FL_CAN_EnableLoopBackMode(CANx); /* Loop Back模式 */ + FL_CAN_Enable(CANx); + } + else + { + FL_CAN_Disable(CANx); /* Configuration模式 */ + } + return FL_PASS; +} + +/** + * @brief 设置 CAN_InitStruct 为默认配置 + * @param CAN_InitStruct 指向需要将值设置为默认配置的结构体 @ref FL_CAN_InitTypeDef 结构体 + * + * @retval None + */ +void FL_CAN_StructInit(FL_CAN_InitTypeDef *CAN_InitStruct) +{ + CAN_InitStruct->mode = FL_CAN_MODE_NORMAL; + CAN_InitStruct->BRP = 0; + CAN_InitStruct->clockSource = FL_CMU_CAN_CLK_SOURCE_RCHF; + CAN_InitStruct->SJW = FL_CAN_SJW_1Tq; + CAN_InitStruct->TS1 = FL_CAN_TS1_5Tq; + CAN_InitStruct->TS2 = FL_CAN_TS2_4Tq; +} + +/** + * @brief CAN滤波器初始化 + * @param CANx外设入口地址 + * @param filterX This parameter can be one of the following values: + * @arg @ref FL_CAN_FILTER1 + * @arg @ref FL_CAN_FILTER2 + * @arg @ref FL_CAN_FILTER3 + * @arg @ref FL_CAN_FILTER4 + * @param CAN_InitFilterStruct 指向一个@ref FL_CAN_FilterInitTypeDef 结构体的指针 + * @retval 错误状态可能值 + * -FL_FAIL 配置过程发生错误 + * -FL_PASS 配置成功 + */ +FL_ErrorStatus FL_CAN_FilterInit(CAN_Type *CANx, FL_CAN_FilterInitTypeDef *CAN_FilterInitStruct, uint32_t filterX) +{ + uint32_t counter =0; + uint32_t filterstatus; + assert_param(IS_CAN_SRR(CAN_FilterInitStruct->filterIdSRR)); + assert_param(IS_CAN_IDE(CAN_FilterInitStruct->filterIdIDE)); + assert_param(IS_CAN_RTR(CAN_FilterInitStruct->filterIdRTR)); + assert_param(IS_CAN_FILTER_EN(CAN_FilterInitStruct->filterEn)); + assert_param(IS_CAN_ID18_MASK(CAN_FilterInitStruct->filterMaskIdLow)); + assert_param(IS_CAN_ID11_MASK(CAN_FilterInitStruct->filterMaskIdHigh)); + assert_param(IS_CAN_SRR_MASK(CAN_FilterInitStruct->filterMaskIdSRR)); + assert_param(IS_CAN_IDE_MASK(CAN_FilterInitStruct->filterMaskIdIDE)); + assert_param(IS_CAN_RTR_MASK(CAN_FilterInitStruct->filterMaskIdRTR)); + assert_param(IS_CAN_AFx(filterX)); + do + { + filterstatus = FL_CAN_IsActiveFlag_FilterBusy(CANx); + counter++; + }while((filterstatus != 0U) && (counter != CAN_TIMEOUT)); + if(CAN_FilterInitStruct->filterIdIDE == FL_CAN_IDE_BIT_HIGH) + { + FL_CAN_Filter_WriteIDCompare(CANx, filterX, ((CAN_FilterInitStruct->filterIdExtend) >> 18) & 0X7FF); + FL_CAN_Filter_WriteEXTIDCompare(CANx, filterX, (CAN_FilterInitStruct->filterIdExtend) & 0X3FFFF); + } + else + { + FL_CAN_Filter_WriteIDCompare(CANx, filterX, (CAN_FilterInitStruct->filterIdStandard) & 0X7FF); + } + if((CAN_FilterInitStruct->filterMaskIdSRR) == FL_ENABLE) /* SRR参与滤波器比较 */ + { + FL_CAN_Filter_EnableSRRCompare(CANx, filterX); + } + else + { + FL_CAN_Filter_DisableSRRCompare(CANx, filterX); + } + if((CAN_FilterInitStruct->filterMaskIdIDE) == FL_ENABLE) /* IDE位参与滤波器比较 */ + { + FL_CAN_Filter_EnableIDECompare(CANx, filterX); + } + else + { + FL_CAN_Filter_DisableIDECompare(CANx, filterX); + } + if((CAN_FilterInitStruct->filterMaskIdRTR) == FL_ENABLE) /* RTR位参与滤波器比较 */ + { + FL_CAN_Filter_EnableRTRCompare(CANx, filterX); + } + else + { + FL_CAN_Filter_DisableRTRCompare(CANx, filterX); + } + FL_CAN_Filter_WriteIDCompareMask(CANx, filterX, CAN_FilterInitStruct->filterMaskIdHigh); /* 滤波器掩码配置 */ + FL_CAN_Filter_WriteEXTIDCompareMask(CANx, filterX, CAN_FilterInitStruct->filterMaskIdLow); + FL_CAN_Filter_SetSRRCompare(CANx, filterX, CAN_FilterInitStruct->filterIdSRR); + FL_CAN_Filter_SetIDECompare(CANx, filterX, CAN_FilterInitStruct->filterIdIDE); /* 滤波器ID配置 */ + FL_CAN_Filter_SetRTRCompare(CANx, filterX, CAN_FilterInitStruct->filterIdRTR); + if((CAN_FilterInitStruct->filterEn) == FL_ENABLE) /* 滤波器使能 */ + { + FL_CAN_Filter_Enable(CANx, filterX); + } + else + { + FL_CAN_Filter_Disable(CANx, filterX); + } + return FL_PASS; +} +/** + * @brief 设置 CAN_FilterInitStruct 为默认配置 + * @param CAN_FilterInitStruct 指向需要将值设置为默认配置的结构体 @ref FL_CAN_FilterInitTypeDef 结构体 + * + * @retval None + */ +void FL_CAN_StructFilterInit(FL_CAN_FilterInitTypeDef *CAN_FilterInitStruct) +{ + CAN_FilterInitStruct->filterEn = FL_DISABLE; + CAN_FilterInitStruct->filterIdExtend = 0; + CAN_FilterInitStruct->filterMaskIdHigh = 0x7FF; + CAN_FilterInitStruct->filterIdIDE = FL_CAN_IDE_BIT_LOW; + CAN_FilterInitStruct->filterMaskIdIDE = FL_DISABLE; + CAN_FilterInitStruct->filterMaskIdLow = 0X3FFFF; + CAN_FilterInitStruct->filterIdRTR = FL_CAN_RTR_BIT_LOW; + CAN_FilterInitStruct->filterMaskIdRTR = FL_DISABLE; + CAN_FilterInitStruct->filterIdSRR = FL_CAN_SRR_BIT_LOW; + CAN_FilterInitStruct->filterMaskIdSRR = FL_DISABLE; + CAN_FilterInitStruct->filterIdStandard = 0; +} + +/** + * @} + */ + +#endif /* FL_CAN_DRIVER_ENABLED */ + +/** + * @} + */ + +/** + * @} + */ + +/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/ diff --git a/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_cmu.c b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_cmu.c new file mode 100644 index 0000000..d7678ee --- /dev/null +++ b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_cmu.c @@ -0,0 +1,314 @@ + /** + **************************************************************************************************** + * @file fm33lg0xx_fl_cmu.c + * @author FMSH Application Team + * @brief Src file of CMU FL Module + **************************************************************************************************** + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + +/* Includes ------------------------------------------------------------------*/ +#include "fm33lg0xx_fl.h" + +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @addtogroup CMU + * @{ + */ + +#ifdef FL_CMU_DRIVER_ENABLED + +/* Exported functions --------------------------------------------------------*/ +/** @addtogroup CMU_FL_EF_QUERY + * @{ + */ + +/** + * @brief 获取系统当前工作时钟SYSCLK。 + * @param None + * @note 函数中用到了XTHF_VALUE 宏，这个宏应该被定义为外部晶振的输入频率值。 + * + * @retval 系统时钟频率 (Hz)。 + * + */ +uint32_t FL_CMU_GetSystemClockFreq(void) +{ + uint32_t frequency = 0; + /* 获取系统时钟源 */ + switch(FL_CMU_GetSystemClockSource()) + { + /* 系统时钟源为内部RCHF */ + case FL_CMU_SYSTEM_CLK_SOURCE_RCHF: + /* 内部RCHF默认为8MHz ,可以配置为16或24M */ + frequency = FL_CMU_GetRCHFClockFreq(); + break; + /* 系统时钟源为XTHF */ + case FL_CMU_SYSTEM_CLK_SOURCE_XTHF: + frequency = XTHFClock; + break; + /* 系统时钟源为PLL */ + case FL_CMU_SYSTEM_CLK_SOURCE_PLL: + frequency = FL_CMU_GetPLLClockFreq(); + break; + /* 系统时钟源为内部RCLF */ + case FL_CMU_SYSTEM_CLK_SOURCE_RCLF: + /* 根据RC4M的分频配置得出系统时钟 */ + frequency = FL_CMU_GetRCLFClockFreq(); + break; + /* 系统时钟源为XTLF */ + case FL_CMU_SYSTEM_CLK_SOURCE_XTLF: + /* 根据外部晶振的频率得出系统时钟 */ + frequency = XTLFClock; + break; + /* 系统时钟源为RCLP */ + case FL_CMU_SYSTEM_CLK_SOURCE_RCLP: + frequency = 32768; + break; + default: + frequency = FL_CMU_GetRCHFClockFreq(); + break; + } + return frequency; +} +/** + * @brief 获取 AHB 总线时钟频率。 + * + * @param SYSCLK_Frequency 系统主时钟频率SYSCLK + * + * @retval AHB 总线时钟频率(Hz) + * + */ +uint32_t FL_CMU_GetAHBClockFreq(void) +{ + uint32_t frequency = 0; + /* 获取AHB分频系数，AHB源自系统主时钟 */ + switch(FL_CMU_GetAHBPrescaler()) + { + case FL_CMU_AHBCLK_PSC_DIV1: + frequency = FL_CMU_GetSystemClockFreq(); + break; + case FL_CMU_AHBCLK_PSC_DIV2: + frequency = FL_CMU_GetSystemClockFreq() / 2; + break; + case FL_CMU_AHBCLK_PSC_DIV4: + frequency = FL_CMU_GetSystemClockFreq() / 4; + break; + case FL_CMU_AHBCLK_PSC_DIV8: + frequency = FL_CMU_GetSystemClockFreq() / 8; + break; + case FL_CMU_AHBCLK_PSC_DIV16: + frequency = FL_CMU_GetSystemClockFreq() / 16; + break; + default: + frequency = FL_CMU_GetSystemClockFreq(); + break; + } + return frequency; +} + +/** + * @brief 获取当前系统的APB总线时钟 + * @param APB_Frequency APB总线的时钟频率 + * + * @retval APB clock frequency (in Hz) + * + */ +uint32_t FL_CMU_GetAPBClockFreq(void) +{ + uint32_t frequency = 0; + /* 获取APB1分频系数，APB源自AHB */ + switch(FL_CMU_GetAPBPrescaler()) + { + case FL_CMU_APBCLK_PSC_DIV1: + frequency = FL_CMU_GetAHBClockFreq(); + break; + case FL_CMU_APBCLK_PSC_DIV2: + frequency = FL_CMU_GetAHBClockFreq() / 2; + break; + case FL_CMU_APBCLK_PSC_DIV4: + frequency = FL_CMU_GetAHBClockFreq() / 4; + break; + case FL_CMU_APBCLK_PSC_DIV8: + frequency = FL_CMU_GetAHBClockFreq() / 8; + break; + case FL_CMU_APBCLK_PSC_DIV16: + frequency = FL_CMU_GetAHBClockFreq() / 16; + break; + default: + frequency = FL_CMU_GetAHBClockFreq(); + break; + } + return frequency; +} +/** + * @brief 获取RCLF输出时钟频率 + * @param None + * + * @retval 返回RCLF输出时钟频率(Hz) + * + */ +uint32_t FL_CMU_GetRCLFClockFreq(void) +{ + uint32_t frequency = 0; + switch(FL_CMU_RCLF_GetPrescaler()) + { + case FL_CMU_RCLF_PSC_DIV1: + frequency = 614400; + break; + case FL_CMU_RCLF_PSC_DIV4: + frequency = 153600; + break; + case FL_CMU_RCLF_PSC_DIV8: + frequency = 76800; + break; + case FL_CMU_RCLF_PSC_DIV16: + frequency = 38400; + break; + default: + frequency = 614400; + break; + } + return frequency; +} +/** + * @brief 获取RCHF输出时钟频率 + * @param None + * + * @retval 返回RCHF输出时钟频率(Hz) + * + */ +uint32_t FL_CMU_GetRCHFClockFreq(void) +{ + uint32_t frequency = 0; + switch(FL_CMU_RCHF_GetFrequency()) + { + case FL_CMU_RCHF_FREQUENCY_8MHZ: + frequency = 8000000; + break; + case FL_CMU_RCHF_FREQUENCY_16MHZ: + frequency = 16000000; + break; + case FL_CMU_RCHF_FREQUENCY_24MHZ: + frequency = 24000000; + break; + case FL_CMU_RCHF_FREQUENCY_32MHZ: + frequency = 32000000; + break; + default: + frequency = 8000000; + break; + } + return frequency; +} +/** + * @brief 获取PLL输出时钟频率 + * @param None + * + * @retval 返回PLL输出时钟频率(Hz) + * + */ +uint32_t FL_CMU_GetPLLClockFreq(void) +{ + uint32_t frequency = 0; + uint32_t multiplier = 0; + /* 获取PLL时钟源 */ + switch(FL_CMU_PLL_GetClockSource()) + { + case FL_CMU_PLL_CLK_SOURCE_RCHF: + /* 获取RCHF配置主频 */ + frequency = FL_CMU_GetRCHFClockFreq(); + break; + case FL_CMU_PLL_CLK_SOURCE_XTHF: + frequency = XTHFClock; + break; + default: + frequency = FL_CMU_GetRCHFClockFreq(); + break; + } + /* 获取PLL时钟分频系数 */ + switch(FL_CMU_PLL_GetPrescaler()) + { + case FL_CMU_PLL_PSC_DIV1: + break; + case FL_CMU_PLL_PSC_DIV2: + frequency /= 2; + break; + case FL_CMU_PLL_PSC_DIV4: + frequency /= 4; + break; + case FL_CMU_PLL_PSC_DIV8: + frequency /= 8; + break; + case FL_CMU_PLL_PSC_DIV12: + frequency /= 12; + break; + case FL_CMU_PLL_PSC_DIV16: + frequency /= 16; + break; + case FL_CMU_PLL_PSC_DIV24: + frequency /= 24; + break; + case FL_CMU_PLL_PSC_DIV32: + frequency /= 32; + break; + default: + break; + } + multiplier = FL_CMU_PLL_ReadMultiplier() + 1; + frequency *= multiplier; + return frequency; +} + +/** + * @} + */ + +#endif /* FL_CMU_DRIVER_ENABLED */ + +/** + * @} + */ + +/** + * @} + */ + +/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/ diff --git a/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_comp.c b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_comp.c new file mode 100644 index 0000000..b01067a --- /dev/null +++ b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_comp.c @@ -0,0 +1,244 @@ + /** + **************************************************************************************************** + * @file fm33lg0xx_fl_comp.c + * @author FMSH Application Team + * @brief Src file of COMP FL Module + **************************************************************************************************** + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + +/* Includes ------------------------------------------------------------------*/ +#include "fm33lg0xx_fl.h" + + +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @addtogroup COMP + * @{ + */ + +#ifdef FL_COMP_DRIVER_ENABLED + +/* Private macros ------------------------------------------------------------*/ +/** @addtogroup COMP_FL_Private_Macros + * @{ + */ +#define IS_COMP_ALL_INSTANCE(INTENCE) (((INTENCE) == COMP1)||\ + ((INTENCE) == COMP2)||\ + ((INTENCE) == COMP3)) + +#define IS_FL_COMP_POSITIVEINPUT(__VALUE__) (((__VALUE__) == FL_COMP_INP_SOURCE_INP1)||\ + ((__VALUE__) == FL_COMP_INP_SOURCE_INP2)||\ + ((__VALUE__) == FL_COMP_INP_SOURCE_AVREF)||\ + ((__VALUE__) == FL_COMP_INP_SOURCE_ULPBG_REF)||\ + ((__VALUE__) == FL_COMP_INP_SOURCE_VDD15)||\ + ((__VALUE__) == FL_COMP_INP_SOURCE_VREFP)) + +#define IS_FL_COMP_NEGATIVEINPUT(__VALUE__) (((__VALUE__) == FL_COMP_INN_SOURCE_INN1)||\ + ((__VALUE__) == FL_COMP_INN_SOURCE_INN2)||\ + ((__VALUE__) == FL_COMP_INN_SOURCE_VREF)||\ + ((__VALUE__) == FL_COMP_INN_SOURCE_VREF_DIV_2)||\ + ((__VALUE__) == FL_COMP_INN_SOURCE_VREFP)||\ + ((__VALUE__) == FL_COMP_INN_SOURCE_DAC)) + +#define IS_FL_COMP_POLARITY(__VALUE__) (((__VALUE__) == FL_COMP_OUTPUT_POLARITY_NORMAL)||\ + ((__VALUE__) == FL_COMP_OUTPUT_POLARITY_INVERT)) + +#define IS_FL_COMP_EDGE(__VALUE__) (((__VALUE__) == FL_COMP_INTERRUPT_EDGE_BOTH)||\ + ((__VALUE__) == FL_COMP_INTERRUPT_EDGE_RISING )||\ + ((__VALUE__) == FL_COMP_INTERRUPT_EDGE_FALLING)) + +#define IS_FL_COMP_DIGITAL_FILTER(__VALUE__) (((__VALUE__) == FL_DISABLE)||\ + ((__VALUE__) == FL_ENABLE)) + +#define IS_FL_COMP_DIGITAL_FILTER_LEN(__VALUE__) (((__VALUE__) == FL_COMP_OUTPUT_FILTER_WINDOW_3APBCLK)||\ + ((__VALUE__) == FL_COMP_OUTPUT_FILTER_WINDOW_4APBCLK )||\ + ((__VALUE__) == FL_COMP_OUTPUT_FILTER_WINDOW_5APBCLK )||\ + ((__VALUE__) == FL_COMP_OUTPUT_FILTER_WINDOW_6APBCLK )||\ + ((__VALUE__) == FL_COMP_OUTPUT_FILTER_WINDOW_7APBCLK )||\ + ((__VALUE__) == FL_COMP_OUTPUT_FILTER_WINDOW_8APBCLK )||\ + ((__VALUE__) == FL_COMP_OUTPUT_FILTER_WINDOW_9APBCLK )||\ + ((__VALUE__) == FL_COMP_OUTPUT_FILTER_WINDOW_10APBCLK )||\ + ((__VALUE__) == FL_COMP_OUTPUT_FILTER_WINDOW_11APBCLK )||\ + ((__VALUE__) == FL_COMP_OUTPUT_FILTER_WINDOW_12APBCLK )||\ + ((__VALUE__) == FL_COMP_OUTPUT_FILTER_WINDOW_13APBCLK )||\ + ((__VALUE__) == FL_COMP_OUTPUT_FILTER_WINDOW_14APBCLK )||\ + ((__VALUE__) == FL_COMP_OUTPUT_FILTER_WINDOW_15APBCLK )||\ + ((__VALUE__) == FL_COMP_OUTPUT_FILTER_WINDOW_16APBCLK )||\ + ((__VALUE__) == FL_COMP_OUTPUT_FILTER_WINDOW_17APBCLK )||\ + ((__VALUE__) == FL_COMP_OUTPUT_FILTER_WINDOW_18APBCLK )||\ + ((__VALUE__) == FL_COMP_OUTPUT_FILTER_WINDOW_19APBCLK )||\ + ((__VALUE__) == FL_COMP_OUTPUT_FILTER_WINDOW_20APBCLK )||\ + ((__VALUE__) == FL_COMP_OUTPUT_FILTER_WINDOW_21APBCLK )||\ + ((__VALUE__) == FL_COMP_OUTPUT_FILTER_WINDOW_22APBCLK )||\ + ((__VALUE__) == FL_COMP_OUTPUT_FILTER_WINDOW_23APBCLK )||\ + ((__VALUE__) == FL_COMP_OUTPUT_FILTER_WINDOW_24APBCLK )||\ + ((__VALUE__) == FL_COMP_OUTPUT_FILTER_WINDOW_25APBCLK )||\ + ((__VALUE__) == FL_COMP_OUTPUT_FILTER_WINDOW_26APBCLK )||\ + ((__VALUE__) == FL_COMP_OUTPUT_FILTER_WINDOW_27APBCLK )||\ + ((__VALUE__) == FL_COMP_OUTPUT_FILTER_WINDOW_28APBCLK )||\ + ((__VALUE__) == FL_COMP_OUTPUT_FILTER_WINDOW_29APBCLK )||\ + ((__VALUE__) == FL_COMP_OUTPUT_FILTER_WINDOW_30APBCLK )||\ + ((__VALUE__) == FL_COMP_OUTPUT_FILTER_WINDOW_31APBCLK )||\ + ((__VALUE__) == FL_COMP_OUTPUT_FILTER_WINDOW_32APBCLK)) +/** + * @} + */ + +/* Exported functions --------------------------------------------------------*/ +/** @addtogroup COMP_FL_EF_Init + * @{ + */ + +/** + * @brief 复位对应COMP控制寄存器. + * @param COMPx COMP Port + * @retval ErrorStatus枚举值: + * -FL_PASS 外设寄存器值恢复复位值 + * -FL_FAIL 未成功执行 + */ +FL_ErrorStatus FL_COMP_DeInit(COMP_Type *COMPx) +{ + /* 入口参数检查 */ + assert_param(IS_COMP_ALL_INSTANCE(COMPx)); + /* 恢复寄存器值为默认值 */ + COMPx->CR = 0x00000000U; + return FL_PASS; +} + +/** + * @brief 根据 COMP_InitStruct的配置信息初始化对应外设. + * @param COMPx COMP Port + * @param initStruct 指向一个 @ref FL_COMP_InitTypeDef 结构体 + * 其中包含了外设的相关配置信息. + * @param Serial 比较器序号可取值： + * 1 配置比较器1 + * 2 配置比较器2 + * @retval ErrorStatus枚举值 + * -FL_FAIL 配置过程发生错误 + * -FL_PASS COMP配置成功 + */ +FL_ErrorStatus FL_COMP_Init(COMP_Type *COMPx, FL_COMP_InitTypeDef *initStruct) +{ + /* 入口参数检查 */ + assert_param(IS_COMP_ALL_INSTANCE(COMPx)); + assert_param(IS_FL_COMP_EDGE(initStruct->edge)); + assert_param(IS_FL_COMP_POLARITY(initStruct->polarity)); + assert_param(IS_FL_COMP_POSITIVEINPUT(initStruct->positiveInput)); + assert_param(IS_FL_COMP_NEGATIVEINPUT(initStruct->negativeInput)); + assert_param(IS_FL_COMP_DIGITAL_FILTER(initStruct->digitalFilter)); + assert_param(IS_FL_COMP_DIGITAL_FILTER_LEN(initStruct->digitalFilterLen)); + /* 使能时钟总线 */ + FL_CMU_EnableGroup1BusClock(FL_CMU_GROUP1_BUSCLK_COMP); + /* 比较器输出极性选择 */ + FL_COMP_SetOutputPolarity(COMPx, initStruct->polarity); + /* 比较器正向输入选择 */ + FL_COMP_SetINPSource(COMPx, initStruct->positiveInput); + /* 比较器反向输入选择 */ + FL_COMP_SetINNSource(COMPx, initStruct->negativeInput); + /* 比较器使用1/2(internal reference) 打开buffer */ + if(initStruct->negativeInput == FL_COMP_INN_SOURCE_VREF_DIV_2) + { + FL_COMP_EnableBuffer(COMP); /* buffer使能 */ + FL_COMP_DisableBufferBypass(COMP); /* 不bypass buffer */ + } + /* 比较器数字滤波 */ + if(COMPx == COMP1) + { + /* 比较器中断边沿选择 */ + FL_COMP_SetComparator1InterruptEdge(COMP, ((initStruct->edge)<edge)<edge)<digitalFilter) + { + FL_COMP_EnableOutputFilter(COMPx); + } + else + { + FL_COMP_DisableOutputFilter(COMPx); + } + /* 滤波长度 */ + FL_COMP_SetOutputFilterWindow(COMPx, initStruct->digitalFilterLen); + return FL_PASS; +} +/** + * @brief 设置 initStruct 为默认配置 + * @param initStruct 指向需要将值设置为默认配置的结构体 @ref FL_COMP_InitTypeDef 结构体 + * + * @retval None + */ +void FL_COMP_StructInit(FL_COMP_InitTypeDef *initStruct) +{ + /* 复位配置信息 */ + initStruct->edge = FL_COMP_INTERRUPT_EDGE_BOTH; + initStruct->polarity = FL_COMP_OUTPUT_POLARITY_NORMAL; + initStruct->negativeInput = FL_COMP_INN_SOURCE_INN1; + initStruct->positiveInput = FL_COMP_INP_SOURCE_INP1; + initStruct->digitalFilter = FL_ENABLE; + initStruct->digitalFilterLen = FL_COMP_OUTPUT_FILTER_WINDOW_3APBCLK; +} + +/** + * @} + */ + +#endif /* FL_COMP_DRIVER_ENABLED */ + +/** + * @} + */ + +/** + * @} + */ + +/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/ diff --git a/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_crc.c b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_crc.c new file mode 100644 index 0000000..c8114bc --- /dev/null +++ b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_crc.c @@ -0,0 +1,192 @@ + /** + ******************************************************************************************************* + * @file fm33lg0xx_fl_crc.c + * @author FMSH Application Team + * @brief Src file of CRC FL Module + ******************************************************************************************************* + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + +/* Includes ------------------------------------------------------------------*/ +#include "fm33lg0xx_fl.h" + +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @addtogroup CRC + * @{ + */ + +#ifdef FL_CRC_DRIVER_ENABLED + +/* Private macros ------------------------------------------------------------*/ +/** @addtogroup CRC_FL_Private_Macros + * @{ + */ +#define IS_FL_CRC_INSTANCE(INTANCE) ((INTANCE) == CRC) + +#define IS_FL_CRC_POLYNOMIAL_WIDTH(__VALUE__) (((__VALUE__) == FL_CRC_POLYNOMIAL_16B)||\ + ((__VALUE__) == FL_CRC_POLYNOMIAL_32B)||\ + ((__VALUE__) == FL_CRC_POLYNOMIAL_8B)||\ + ((__VALUE__) == FL_CRC_POLYNOMIAL_7B)) + +#define IS_FL_CRC_DR_WIDTH(__VALUE__) (((__VALUE__) == FL_CRC_DATA_WIDTH_8B)||\ + ((__VALUE__) == FL_CRC_DATA_WIDTH_32B)) + + +#define IS_FL_CRC_OUPUT_REFLECTE_MODE(__VALUE__) (((__VALUE__) == FL_CRC_OUPUT_INVERT_NONE)||\ + ((__VALUE__) == FL_CRC_OUPUT_INVERT_BYTE)) + +#define IS_FL_CRC_INPUT_REFLECTE_MODE(__VALUE__) (((__VALUE__) == FL_CRC_INPUT_INVERT_NONE)||\ + ((__VALUE__) == FL_CRC_INPUT_INVERT_BYTE)||\ + ((__VALUE__) == FL_CRC_INPUT_INVERT_HALF_WORD)||\ + ((__VALUE__) == FL_CRC_INPUT_INVERT_WORD)) + +#define IS_FL_CRC_CALCULA_MODE(__VALUE__) (((__VALUE__) == FL_CRC_CALCULATE_SERIAL)||\ + ((__VALUE__) == FL_CRC_CALCULATE_PARALLEL)) + +/** + * @} + */ + +/* Exported functions --------------------------------------------------------*/ +/** @addtogroup CRC_FL_EF_Init + * @{ + */ + +/** + * @brief 复位对应CRC寄存器. + * + * @param CRCx 外设入口地址 + * + * @retval FL_ErrorStatus枚举值 + * -FL_PASS 配置成功 + * -FL_FAIL 配置过程发生错误 + */ +FL_ErrorStatus FL_CRC_DeInit(CRC_Type *CRCx) +{ + assert_param(IS_FL_CRC_INSTANCE(CRCx)); + /* 外设复位使能 */ + FL_RMU_EnablePeripheralReset(RMU); + /* 复位外设寄存器 */ + FL_RMU_EnableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_CRC); + FL_RMU_DisableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_CRC); + /* 关闭总线时钟 */ + FL_CMU_DisableGroup2BusClock(FL_CMU_GROUP2_BUSCLK_CRC); + /* 锁定外设复位功能 */ + FL_RMU_DisablePeripheralReset(RMU); + return FL_PASS; +} +/** + * @brief 根据 CRC_InitStruct 的配置信息初始化对应外设入口地址的寄存器值. + * + * @param CRCx 外设入口地址 + * @param CRC_InitStruct 指向一个 @ref FL_CRC_InitTypeDef 结构体其中包含了外设的相关配置信息. + * + * @retval FL_ErrorStatus枚举值 + * -FL_FAIL 配置过程发生错误 + * -FL_PASS 配置成功 + */ +FL_ErrorStatus FL_CRC_Init(CRC_Type *CRCx, FL_CRC_InitTypeDef *CRC_InitStruct) +{ + /* 参数检查 */ + assert_param(IS_FL_CRC_INSTANCE(CRCx)); + assert_param(IS_FL_CRC_DR_WIDTH(CRC_InitStruct->dataWidth)); + assert_param(IS_FL_CRC_CALCULA_MODE(CRC_InitStruct->calculatMode)); + assert_param(IS_FL_CRC_POLYNOMIAL_WIDTH(CRC_InitStruct->polynomialWidth)); + assert_param(IS_FL_CRC_INPUT_REFLECTE_MODE(CRC_InitStruct->reflectIn)); + assert_param(IS_FL_CRC_OUPUT_REFLECTE_MODE(CRC_InitStruct->reflectOut)); + FL_CMU_EnableGroup2BusClock(FL_CMU_GROUP2_BUSCLK_CRC); + FL_CRC_SetCalculateMode(CRCx, CRC_InitStruct->calculatMode); + FL_CRC_SetInputInvertMode(CRCx, CRC_InitStruct->reflectIn); + FL_CRC_SetOutputInvertMode(CRCx, CRC_InitStruct->reflectOut); + FL_CRC_SetPolynomialWidth(CRCx, CRC_InitStruct->polynomialWidth); + FL_CRC_WriteXORValue(CRCx, CRC_InitStruct->xorReg); + FL_CRC_WritePolynominalParam(CRCx, CRC_InitStruct->polynomial); + FL_CRC_WriteInitialValue(CRCx, CRC_InitStruct->initVal); + FL_CRC_SetDataWidth(CRCx, CRC_InitStruct->dataWidth); + if(CRC_InitStruct->xorRegState == FL_ENABLE) + { + FL_CRC_EnableOutputXOR(CRCx); + } + else + { + FL_CRC_DisableOutputXOR(CRCx); + } + return FL_PASS; +} + + +/** + * @brief 设置 CRC_InitStruct 为默认配置 + * + * @param CRC_InitStruct 指向需要将值设置为默认配置的结构体 @ref FL_CRC_InitTypeDef 结构体 + * + * @retval None + */ + +void FL_CRC_StructInit(FL_CRC_InitTypeDef *CRC_InitStruct) +{ + CRC_InitStruct->polynomial = 0x00000000; + CRC_InitStruct->polynomialWidth = FL_CRC_POLYNOMIAL_16B; + CRC_InitStruct->dataWidth = FL_CRC_DATA_WIDTH_8B; + CRC_InitStruct->calculatMode = FL_CRC_CALCULATE_SERIAL; + CRC_InitStruct->reflectIn = FL_CRC_INPUT_INVERT_NONE; + CRC_InitStruct->reflectOut = FL_CRC_OUPUT_INVERT_NONE; + CRC_InitStruct->xorReg = 0x00000000; + CRC_InitStruct->xorRegState = FL_DISABLE; +} + + +/** + * @} + */ + +#endif /* FL_CRC_DRIVER_ENABLED */ + +/** + * @} + */ + +/** + * @} + */ + +/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/ diff --git a/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_dac.c b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_dac.c new file mode 100644 index 0000000..3ff09eb --- /dev/null +++ b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_dac.c @@ -0,0 +1,224 @@ + /** + **************************************************************************************************** + * @file fm33lg0xx_fl_dac.c + * @author FMSH Application Team + * @brief Src file of DAC FL Module + **************************************************************************************************** + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + +/* Includes ------------------------------------------------------------------*/ +#include "fm33lg0xx_fl.h" + +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @addtogroup DAC + * @{ + */ + +#ifdef FL_DAC_DRIVER_ENABLED + +/* Private macros ------------------------------------------------------------*/ +/** @addtogroup DAC_FL_Private_Macros + * @{ + */ + +#define IS_FL_DAC_INSTANCE(INSTANCE) ((INSTANCE) == DAC) + +#define IS_FL_DAC_TRIGGERMODE(__VALUE__) (((__VALUE__) == FL_DISABLE)||\ + ((__VALUE__) == FL_ENABLE)) + +#define IS_FL_DAC_TRIGGE_SOURCE(__VALUE__) (((__VALUE__) == FL_DAC_TRGI_SOFTWARE)||\ + ((__VALUE__) == FL_DAC_TRGI_ATIM)||\ + ((__VALUE__) == FL_DAC_TRGI_GPTIM1)||\ + ((__VALUE__) == FL_DAC_TRGI_GPTIM2)||\ + ((__VALUE__) == FL_DAC_TRGI_BSTIM16)||\ + ((__VALUE__) == FL_DAC_TRGI_LPTIM16)||\ + ((__VALUE__) == FL_DAC_TRGI_EXTI0)||\ + ((__VALUE__) == FL_DAC_TRGI_EXTI4)||\ + ((__VALUE__) == FL_DAC_TRGI_EXTI8)||\ + ((__VALUE__) == FL_DAC_TRGI_EXTI12)) + +#define IS_FL_DAC_SAMPLEHOLDMODE(__VALUE__) (((__VALUE__) == FL_DISABLE)||\ + ((__VALUE__) == FL_ENABLE)) + +#define IS_FL_DAC_HOLD_TIME(__VALUE__) (((__VALUE__) <= 0XFFFF)) + +#define IS_FL_DAC_SAMPLE_TIME(__VALUE__) (((__VALUE__) <= 0XFF)) + +#define IS_FL_DAC_BUFFERMODE(__VALUE__) (((__VALUE__) == FL_DISABLE)||\ + ((__VALUE__) == FL_ENABLE)) + +#define IS_FL_DAC_SWITCHMODE(__VALUE__) (((__VALUE__) == FL_DISABLE)||\ + ((__VALUE__) == FL_ENABLE)) + +#define IS_FL_DAC_DMAMODE(__VALUE__) (((__VALUE__) == FL_DISABLE)||\ + ((__VALUE__) == FL_ENABLE)) + +/** + * @} + */ + +/* Exported functions --------------------------------------------------------*/ +/** @addtogroup CRC_FL_EF_Init + * @{ + */ + +/** + * @brief 恢复对应的DAC入口地址寄存器为默认值 + * + * @param DACx 外设入口地址 + * + * @retval ErrorStatus枚举值 + * -FL_FAIL 配置过程发生错误 + * -FL_PASS DAC配置成功 + */ +FL_ErrorStatus FL_DAC_DeInit(DAC_Type *DACx) +{ + FL_ErrorStatus status = FL_PASS; + /* 入口合法性检查 */ + assert_param(IS_FL_DAC_INSTANCE(DACx)); + /* 外设复位使能 */ + FL_RMU_EnablePeripheralReset(RMU); + FL_RMU_EnableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_DAC); + FL_RMU_DisableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_DAC); + FL_RMU_DisablePeripheralReset(RMU); + return status; +} +/** + * @brief 初始化DACx指定的入口地址的外设寄存器 + * @param DACx 外设入口地址 + * @param DAC_InitStruct 向一FL_DAC_InitTypeDef结构体，它包含指定DAC外设的配置信息 + * + * @retval ErrorStatus枚举值 + * -FL_FAIL 配置过程发生错误 + * -FL_PASS DAC配置成功 + */ +FL_ErrorStatus FL_DAC_Init(DAC_Type *DACx, FL_DAC_InitTypeDef *DAC_InitStruct) +{ + FL_ErrorStatus status = FL_PASS; + /* 入口合法性检查 */ + assert_param(IS_FL_DAC_INSTANCE(DACx)); + assert_param(IS_FL_DAC_TRIGGERMODE(DAC_InitStruct->triggerMode)); + assert_param(IS_FL_DAC_TRIGGE_SOURCE(DAC_InitStruct->triggerSource)); + assert_param(IS_FL_DAC_SAMPLEHOLDMODE(DAC_InitStruct->sampleHoldMode)); + assert_param(IS_FL_DAC_HOLD_TIME(DAC_InitStruct->holdTime)); + assert_param(IS_FL_DAC_SAMPLE_TIME(DAC_InitStruct->sampleTime)); + assert_param(IS_FL_DAC_BUFFERMODE(DAC_InitStruct->bufferMode)); + assert_param(IS_FL_DAC_SWITCHMODE(DAC_InitStruct->switchMode)); + FL_RMU_EnablePeripheralReset(RMU); + FL_RMU_EnableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_DAC); + FL_RMU_DisableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_DAC); + FL_RMU_DisablePeripheralReset(RMU); + FL_CMU_EnableGroup2BusClock(FL_CMU_GROUP2_BUSCLK_DAC); + FL_DAC_Disable(DACx); + if(FL_DAC_IsEnabled(DACx) == 0U) + { + /* 采样保持使能配置 */ + if(DAC_InitStruct->sampleHoldMode) + { + FL_DAC_WriteSamplingTime(DACx, DAC_InitStruct->sampleTime); + FL_DAC_WriteHoldingTime(DACx, DAC_InitStruct->holdTime); + FL_DAC_EnableSampleHoldMode(DACx); + } + else + { FL_DAC_DisableSampleHoldMode(DACx); } + /* 触发模式使能配置 */ + if(DAC_InitStruct->triggerMode) + { + FL_DAC_SetTriggerSource(DACx, DAC_InitStruct->triggerSource); + FL_DAC_EnableTriggerMode(DACx); + } + else + { FL_DAC_DisableTriggerMode(DACx); } + /* buffer使能配置 */ + if(DAC_InitStruct->bufferMode) + { FL_DAC_EnableOutputBuffer(DACx); } + else + { FL_DAC_DisableOutputBuffer(DACx); } + /* SWITCH使能配置 */ + if(DAC_InitStruct->switchMode) + { FL_DAC_EnableFeedbackSwitch(DACx); } + else + { FL_DAC_DisableFeedbackSwitch(DACx); } + } + else + { + status = FL_FAIL; + } + return status; +} + + +/** + * @brief 设置 DAC_InitStruct 为默认配置 + * @param DAC_InitStruct 指向需要将值设置为默认配置的结构体 @ref FL_DAC_InitTypeDef 结构体 + * + * @retval None + */ +void FL_DAC_StructInit(FL_DAC_InitTypeDef *DAC_InitStruct) +{ + DAC_InitStruct->bufferMode = FL_ENABLE; + DAC_InitStruct->switchMode = FL_ENABLE; + DAC_InitStruct->triggerMode = FL_DISABLE; + DAC_InitStruct->triggerSource = FL_DAC_TRGI_SOFTWARE; + DAC_InitStruct->sampleHoldMode = FL_DISABLE; + DAC_InitStruct->sampleTime = 0xFF; + DAC_InitStruct->holdTime = 0X0; +} + +/** + * @} + */ + +#endif /* FL_DAC_DRIVER_ENABLED */ + +/** + * @} + */ + +/** + * @} + */ + +/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/ + + diff --git a/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_divas.c b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_divas.c new file mode 100644 index 0000000..4ffee4b --- /dev/null +++ b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_divas.c @@ -0,0 +1,207 @@ + /** + ******************************************************************************************************* + * @file fm33lg0xx_fl_divas.c + * @author FMSH Application Team + * @brief Src file of DIVAS FL Module + ******************************************************************************************************* + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + +/* Includes ------------------------------------------------------------------*/ +#include "fm33lg0xx_fl.h" + +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @addtogroup DIVAS + * @{ + */ + +#ifdef FL_DIVAS_DRIVER_ENABLED + +/* Private macros ------------------------------------------------------------*/ +/** @addtogroup DIVAS_FL_Private_Macros + * @{ + */ +#define IS_DIVAS_ALL_INSTANCE(INTENCE) ((INTENCE) == DIVAS) + +#define IS_FL_DIVAS_DIVISOR(__VALUE__) (((__VALUE__) != 0)) + +/** + * @} + */ + +/* Exported functions --------------------------------------------------------*/ +/** @addtogroup DIVAS_FL_EF_Init + * @{ + */ + +/** + * @brief 复位对应HDIV控制寄存器. + * + * @param DIVASx 外设入口地址 + * + * @retval FL_ErrorStatus枚举值 + * -FL_PASS 配置成功 + * -FL_FAIL 配置过程发生错误 + */ +FL_ErrorStatus FL_DIVAS_DeInit(DIVAS_Type *DIVASx) +{ + /* 入口参数检查 */ + assert_param(IS_DIVAS_ALL_INSTANCE(DIVASx)); + /* 外设复位使能 */ + FL_RMU_EnablePeripheralReset(RMU); + /* 恢复寄存器值为默认值 */ + FL_RMU_EnableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_DIVAS); + FL_RMU_DisableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_DIVAS); + /* 关闭总线时钟 */ + FL_CMU_DisableGroup2BusClock(FL_CMU_GROUP2_BUSCLK_DIVAS); + /* 锁定外设复位功能 */ + FL_RMU_DisablePeripheralReset(RMU); + return FL_PASS; +} + +/** + * @brief 根据 初始化对应外设DIVAS. + * + * @param DIVASx 外设入口地址 + * + * @retval FL_ErrorStatus枚举值 + * -FL_PASS 配置成功 + * -FL_FAIL 配置过程发生错误 + */ +FL_ErrorStatus FL_DIVAS_Init(DIVAS_Type *DIVASx) +{ + /* 入口参数检查 */ + assert_param(IS_DIVAS_ALL_INSTANCE(DIVASx)); + /* 使能时钟总线 */ + FL_CMU_EnableGroup2BusClock(FL_CMU_GROUP2_BUSCLK_DIVAS); + return FL_PASS; +} +/** + * @brief 硬件除法器计算函数 + * + * @param DIVASx 外设入口地址 + * @param DivisorEnd 32位有符号被除数 + * @param Divisor 16位有符号除数，注意不能为0 + * @param Quotient 指向 @ref int32_t 指针 保存商的地址 + * @param Residue 指向 @ref int16_t 指针 保存余数的地址 + * + * @retval 计算正确性与否 + * -0 计算结果正确 + * -非0 计算过程发生错误 + */ +uint32_t FL_DIVAS_Hdiv_Calculation(DIVAS_Type *DIVASx, int32_t DivisorEnd, int16_t Divisor, int32_t *Quotient, int16_t *Residue) +{ + uint32_t TimeOut ; + FL_DIVAS_SetMode(DIVASx, FL_DIVAS_MODE_DIV); + FL_DIVAS_WriteOperand(DIVASx, (uint32_t)DivisorEnd); + FL_DIVAS_WriteDivisor(DIVASx, (uint32_t)Divisor); + if(FL_DIVAS_IsActiveFlag_DividedZero(DIVASx)) + { + /*除数为0 */ + *Quotient = 0; + *Residue = 0; + return 1; + } + TimeOut = FL_DIVAS_SR_BUSY_TIMEOUT; + while(FL_DIVAS_IsActiveFlag_Busy(DIVASx)) + { + TimeOut--; + if(TimeOut == 0) + { + /* 计算超时*/ + *Quotient = 0; + *Residue = 0; + return 3; + } + } + *Quotient = FL_DIVAS_ReadQuotient(DIVASx); + *Residue = FL_DIVAS_ReadResidue(DIVASx); + return 0; +} + +/** + * @brief 硬件开方计算函数 + * + * @param DIVASx 外设入口地址 + * @param Root 32bit被开方数 + * @param Result 指向 @ref int16_t 指针 保存结果开方根 + * + * @retval 计算正确性与否 + * -0 计算结果正确 + * -非0 计算过程发生错误 + */ +uint32_t FL_DIVAS_Root_Calculation(DIVAS_Type *DIVASx, uint32_t Root, uint16_t *Result) +{ + uint32_t TimeOut ; + FL_DIVAS_SetMode(DIVASx, FL_DIVAS_MODE_ROOT); + FL_DIVAS_WriteOperand(DIVASx, Root); + TimeOut = FL_DIVAS_SR_BUSY_TIMEOUT; + while(FL_DIVAS_IsActiveFlag_Busy(DIVASx)) + { + TimeOut --; + if(TimeOut == 0) + { + /* 计算超时*/ + *Result = 0; + return 1; + } + } + *Result = FL_DIVAS_ReadRoot(DIVASx); + return 0; +} + +/** + * @} + */ + +#endif /* FL_DIVAS_DRIVER_ENABLED */ + +/** + * @} + */ + +/** + * @} + */ + +/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/ + diff --git a/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_dma.c b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_dma.c new file mode 100644 index 0000000..2b32536 --- /dev/null +++ b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_dma.c @@ -0,0 +1,254 @@ + /** + ******************************************************************************************************* + * @file fm33lg0xx_fl_dma.c + * @author FMSH Application Team + * @brief Src file of DMA FL Module + ******************************************************************************************************* + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + +/* Includes ------------------------------------------------------------------*/ +#include "fm33lg0xx_fl.h" + +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @addtogroup DMA + * @{ + */ + +#ifdef FL_DMA_DRIVER_ENABLED + +/* Private macros ------------------------------------------------------------*/ +/** @addtogroup DMA_FL_Private_Macros + * @{ + */ +#define IS_FL_DMA_INSTANCE(INTANCE) ((INTANCE) == DMA) + +#define IS_FL_DMA_PRIORITY(__VALUE__) (((__VALUE__) == FL_DMA_PRIORITY_LOW)||\ + ((__VALUE__) == FL_DMA_PRIORITY_MEDIUM)||\ + ((__VALUE__) == FL_DMA_PRIORITY_HIGH)||\ + ((__VALUE__) == FL_DMA_PRIORITY_VERYHIGH)) + +#define IS_FL_DMA_CIRC_MODE(__VALUE__) (((__VALUE__) == FL_DISABLE)||\ + ((__VALUE__) == FL_ENABLE)) + + +#define IS_FL_DMA_DIRECION(__VALUE__) (((__VALUE__) == FL_DMA_DIR_PERIPHERAL_TO_RAM)||\ + ((__VALUE__) == FL_DMA_DIR_RAM_TO_PERIPHERAL)||\ + ((__VALUE__) == FL_DMA_DIR_FLASH_TO_RAM)||\ + ((__VALUE__) == FL_DMA_DIR_RAM_TO_FLASH)) + + +#define IS_FL_DMA_DATA_SIZE(__VALUE__) (((__VALUE__) == FL_DMA_BANDWIDTH_8B)||\ + ((__VALUE__) == FL_DMA_BANDWIDTH_16B)||\ + ((__VALUE__) == FL_DMA_BANDWIDTH_32B)) + +#define IS_FL_DMA_INCMODE(__VALUE__) (((__VALUE__) == FL_DMA_MEMORY_INC_MODE_INCREASE)||\ + ((__VALUE__) == FL_DMA_MEMORY_INC_MODE_DECREASE) ||\ + ((__VALUE__) == FL_DMA_CH7_RAM_INC_MODE_INCREASE)||\ + ((__VALUE__) == FL_DMA_CH7_RAM_INC_MODE_DECREASE)||\ + ((__VALUE__) == FL_DMA_CH7_FLASH_INC_MODE_INCREASE)||\ + ((__VALUE__) == FL_DMA_CH7_FLASH_INC_MODE_DECREASE)) + +#define IS_FL_DMA_PERIPH(__VALUE__) (((__VALUE__) == FL_DMA_PERIPHERAL_FUNCTION1)||\ + ((__VALUE__) == FL_DMA_PERIPHERAL_FUNCTION2)||\ + ((__VALUE__) == FL_DMA_PERIPHERAL_FUNCTION3)||\ + ((__VALUE__) == FL_DMA_PERIPHERAL_FUNCTION4)||\ + ((__VALUE__) == FL_DMA_PERIPHERAL_FUNCTION5)||\ + ((__VALUE__) == FL_DMA_PERIPHERAL_FUNCTION6)||\ + ((__VALUE__) == FL_DMA_PERIPHERAL_FUNCTION7)||\ + ((__VALUE__) == FL_DMA_PERIPHERAL_FUNCTION8)) +/** + * @} + */ + +/* Exported functions --------------------------------------------------------*/ +/** @addtogroup DMA_FL_EF_Init + * @{ + */ + +/** + * @brief 复位对应DMA寄存器. + * @param DMAx + * @retval ErrorStatus枚举值: + * -FL_PASS 外设寄存器值恢复复位值 + * -FL_FAIL 未成功执行 + */ +FL_ErrorStatus FL_DMA_DeInit(DMA_Type *DMAx) +{ + assert_param(IS_FL_DMA_INSTANCE(DMAx)); + /* 使能外设复位 */ + FL_RMU_EnablePeripheralReset(RMU); + /* 复位外设寄存器 */ + FL_RMU_EnableResetAHBPeripheral(RMU, FL_RMU_RSTAHB_DMA); + FL_RMU_DisableResetAHBPeripheral(RMU, FL_RMU_RSTAHB_DMA); + /* 关闭外设总线始时钟和工作时钟 */ + FL_CMU_DisableGroup2BusClock(FL_CMU_GROUP2_BUSCLK_DMA); + /* 锁定外设复位 */ + FL_RMU_DisablePeripheralReset(RMU); + return FL_PASS; +} +/** + * @brief 根据 DMA_InitStruct 的配置信息初始化对应外设入口地址的寄存器值. + * @param DMAx DMAx + * @param DMA_InitStruct 指向一个 @ref FL_DMA_InitTypeDef 结构体 + * 其中包含了外设的相关配置信息. + * @param Channel This parameter can be one of the following values: + * @arg @ref FL_DMA_CHANNEL_0 + * @arg @ref FL_DMA_CHANNEL_1 + * @arg @ref FL_DMA_CHANNEL_2 + * @arg @ref FL_DMA_CHANNEL_3 + * @arg @ref FL_DMA_CHANNEL_4 + * @arg @ref FL_DMA_CHANNEL_5 + * @arg @ref FL_DMA_CHANNEL_6 + * @arg @ref FL_DMA_CHANNEL_7 + * @retval ErrorStatus枚举值 + * -FL_FAIL 配置过程发生错误 + * -FL_PASS 配置成功 + */ +FL_ErrorStatus FL_DMA_Init(DMA_Type *DMAx, FL_DMA_InitTypeDef *initStruct, uint32_t channel) +{ + /* 参数检查 */ + assert_param(IS_FL_DMA_INSTANCE(DMAx)); + assert_param(IS_FL_DMA_PRIORITY(initStruct->priority)); + assert_param(IS_FL_DMA_CIRC_MODE(initStruct->circMode)); + assert_param(IS_FL_DMA_DIRECION(initStruct->direction)); + assert_param(IS_FL_DMA_DATA_SIZE(initStruct->dataSize)); + assert_param(IS_FL_DMA_INCMODE(initStruct->memoryAddressIncMode)); + /* 开启时钟 */ + FL_CMU_EnableGroup2BusClock(FL_CMU_GROUP2_BUSCLK_DMA); + /* 配置通道优先级 */ + FL_DMA_SetPriority(DMAx, initStruct->priority, channel); + /* RAM地址方向 */ + FL_DMA_SetMemoryIncrementMode(DMAx, initStruct->memoryAddressIncMode, channel); + /* 传输方向 */ + FL_DMA_SetTransmissionDirection(DMAx, initStruct->direction, channel); + /* 数据宽度 */ + FL_DMA_SetBandwidth(DMAx, initStruct->dataSize, channel); + /* 循环模式 */ + if(initStruct->circMode == FL_ENABLE) + { + if(channel == FL_DMA_CHANNEL_7) + { + return FL_FAIL; + } + FL_DMA_EnableCircularMode(DMAx, channel); + } + else + { + FL_DMA_DisableCircularMode(DMAx, channel); + } + /* 如果是通道7 外设地址实际就是FLASH地址，因此这里针对通道7做了单独处理 */ + if(channel != FL_DMA_CHANNEL_7) + { + assert_param(IS_FL_DMA_PERIPH(initStruct->periphAddress)); + FL_DMA_SetPeripheralMap(DMAx, initStruct->periphAddress, channel); + } + else + { + FL_DMA_SetFlashAddrIncremental(DMAx, initStruct->flashAddressIncMode); + } + return FL_PASS; +} +/** + * @brief 设置 CRC_InitStruct 为默认配置 + * @param CRC_InitStruct 指向需要将值设置为默认配置的结构体 @ref FL_CRC_InitTypeDef 结构体 + * + * @retval None + */ + +void FL_DMA_StructInit(FL_DMA_InitTypeDef *initStruct) +{ + initStruct->circMode = FL_DISABLE; + initStruct->dataSize = FL_DMA_BANDWIDTH_8B; + initStruct->direction = FL_DMA_DIR_PERIPHERAL_TO_RAM; + initStruct->periphAddress = FL_DMA_PERIPHERAL_FUNCTION1; + initStruct->priority = FL_DMA_PRIORITY_LOW; + initStruct->memoryAddressIncMode = FL_DMA_MEMORY_INC_MODE_INCREASE; +} + +/** + * @brief 启动一次DMA传输. + * @param DMAx DMAx + * @param configStruct 指向一个 @ref FL_DMA_ConfigTypeDef 结构体 + * 其中包含了外设的相关配置信息. + * @param Channel This parameter can be one of the following values: + * @arg @ref FL_DMA_CHANNEL_0 + * @arg @ref FL_DMA_CHANNEL_1 + * @arg @ref FL_DMA_CHANNEL_2 + * @arg @ref FL_DMA_CHANNEL_3 + * @arg @ref FL_DMA_CHANNEL_4 + * @arg @ref FL_DMA_CHANNEL_5 + * @arg @ref FL_DMA_CHANNEL_6 + * @arg @ref FL_DMA_CHANNEL_7 + * @retval ErrorStatus枚举值 + * -FL_FAIL 过程发生错误可能是超时也可能是地址非法 + * -FL_PASS 成功 + */ +FL_ErrorStatus FL_DMA_StartTransmission(DMA_Type *DMAx, FL_DMA_ConfigTypeDef *configStruct, uint32_t channel) +{ + /* 配置传输个数 */ + FL_DMA_WriteTransmissionSize(DMAx, configStruct->transmissionCount, channel); + /* 配置Memory地址 */ + FL_DMA_WriteMemoryAddress(DMAx, configStruct->memoryAddress, channel); + /* 清除通道中断标志位 */ + FL_DMA_ClearFlag_TransferHalfComplete(DMAx, channel); + FL_DMA_ClearFlag_TransferComplete(DMAx, channel); + /* 使能DMA通道使能开关 */ + FL_DMA_EnableChannel(DMAx, channel); + return FL_PASS; +} + +/** + * @} + */ + +#endif /* FL_DIVAS_DRIVER_ENABLED */ + +/** + * @} + */ + +/** + * @} + */ + +/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/ diff --git a/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_exti.c b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_exti.c new file mode 100644 index 0000000..89087c1 --- /dev/null +++ b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_exti.c @@ -0,0 +1,288 @@ + /** + **************************************************************************************************** + * @file fm33lg0xx_fl_exti.c + * @author FMSH Application Team + * @brief Src file of EXTI FL Module + **************************************************************************************************** + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + +/* Includes ------------------------------------------------------------------*/ +#include "fm33lg0xx_fl.h" + +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @addtogroup EXTI + * @{ + */ + +#ifdef FL_EXTI_DRIVER_ENABLED + +/* Private macros ------------------------------------------------------------*/ +/** @addtogroup EXTI_FL_Private_Macros + * @{ + */ + +#define IS_EXTI_ALL_INSTANCE(INSTANCE) (((INSTANCE) == FL_GPIO_EXTI_LINE_0)||\ + ((INSTANCE) == FL_GPIO_EXTI_LINE_1)||\ + ((INSTANCE) == FL_GPIO_EXTI_LINE_2)||\ + ((INSTANCE) == FL_GPIO_EXTI_LINE_3)||\ + ((INSTANCE) == FL_GPIO_EXTI_LINE_4)||\ + ((INSTANCE) == FL_GPIO_EXTI_LINE_5)||\ + ((INSTANCE) == FL_GPIO_EXTI_LINE_6)||\ + ((INSTANCE) == FL_GPIO_EXTI_LINE_7)||\ + ((INSTANCE) == FL_GPIO_EXTI_LINE_8)||\ + ((INSTANCE) == FL_GPIO_EXTI_LINE_9)||\ + ((INSTANCE) == FL_GPIO_EXTI_LINE_10)||\ + ((INSTANCE) == FL_GPIO_EXTI_LINE_11)||\ + ((INSTANCE) == FL_GPIO_EXTI_LINE_12)||\ + ((INSTANCE) == FL_GPIO_EXTI_LINE_13)||\ + ((INSTANCE) == FL_GPIO_EXTI_LINE_14)||\ + ((INSTANCE) == FL_GPIO_EXTI_LINE_15)||\ + ((INSTANCE) == FL_GPIO_EXTI_LINE_16)||\ + ((INSTANCE) == FL_GPIO_EXTI_LINE_17)||\ + ((INSTANCE) == FL_GPIO_EXTI_LINE_18)) + +#define IS_EXTI_CLK_SOURCE(__VALUE__) (((__VALUE__) == FL_CMU_EXTI_CLK_SOURCE_HCLK)||\ + ((__VALUE__) == FL_CMU_EXTI_CLK_SOURCE_LSCLK)) + +#define IS_EXTI_INPUT_GROUP(__VALUE__) (((__VALUE__) == FL_GPIO_EXTI_INPUT_GROUP0)||\ + ((__VALUE__) == FL_GPIO_EXTI_INPUT_GROUP1)||\ + ((__VALUE__) == FL_GPIO_EXTI_INPUT_GROUP2)||\ + ((__VALUE__) == FL_GPIO_EXTI_INPUT_GROUP3)) + +#define IS_EXTI_TRIG_EDGE(__VALUE__) (((__VALUE__) == FL_GPIO_EXTI_TRIGGER_EDGE_RISING)||\ + ((__VALUE__) == FL_GPIO_EXTI_TRIGGER_EDGE_FALLING)||\ + ((__VALUE__) == FL_GPIO_EXTI_TRIGGER_EDGE_BOTH)) + +#define IS_EXTI_FILTER(__VALUE__) (((__VALUE__) == FL_ENABLE)||\ + ((__VALUE__) == FL_DISABLE)) + +/** + * @} + */ + +/* Private consts ------------------------------------------------------------*/ +/** @addtogroup EXTI_FL_Private_Consts + * @{ + */ + +typedef void (*pSetExtiLineFunc)(GPIO_COMMON_Type *, uint32_t); +static const pSetExtiLineFunc setExtiLineFuncs[] = +{ + FL_GPIO_SetExtiLine0, + FL_GPIO_SetExtiLine1, + FL_GPIO_SetExtiLine2, + FL_GPIO_SetExtiLine3, + FL_GPIO_SetExtiLine4, + FL_GPIO_SetExtiLine5, + FL_GPIO_SetExtiLine6, + FL_GPIO_SetExtiLine7, + FL_GPIO_SetExtiLine8, + FL_GPIO_SetExtiLine9, + FL_GPIO_SetExtiLine10, + FL_GPIO_SetExtiLine11, + FL_GPIO_SetExtiLine12, + FL_GPIO_SetExtiLine13, + FL_GPIO_SetExtiLine14, + FL_GPIO_SetExtiLine15, + FL_GPIO_SetExtiLine16, + FL_GPIO_SetExtiLine17, + FL_GPIO_SetExtiLine18, +}; + +typedef void (*pSetTrigEdgeFunc)(GPIO_COMMON_Type *, uint32_t, uint32_t); +static const pSetTrigEdgeFunc setTrigEdgeFuncs[] = +{ + FL_GPIO_SetTriggerEdge0, + FL_GPIO_SetTriggerEdge1, +}; + +/** + * @} + */ + +/* Exported functions --------------------------------------------------------*/ +/** @addtogroup EXTI_FL_EF_Init + * @{ + */ + +/** + * @brief EXTI通用配置设置 + * + * @param EXTI_CommonInitStruct 指向 @ref FL_EXTI_CommonInitTypeDef 类型的结构体，它包含EXTI外设通用配置信息 + * + * @retval ErrorStatus枚举值 + * -FL_FAIL 配置过程发生错误 + * -FL_PASS EXTI配置成功 + */ +FL_ErrorStatus FL_EXTI_CommonInit(FL_EXTI_CommonInitTypeDef *EXTI_CommonInitStruct) +{ + assert_param(IS_EXTI_CLK_SOURCE(EXTI_CommonInitStruct->clockSource)); + /* 使能IO时钟寄存器总线时钟 */ + FL_CMU_EnableGroup1BusClock(FL_CMU_GROUP1_BUSCLK_PAD); + /* 使能并配置外部中断时钟源 */ + FL_CMU_EnableGroup3OperationClock(FL_CMU_GROUP3_OPCLK_EXTI); + FL_CMU_SetEXTIClockSource(EXTI_CommonInitStruct->clockSource); + return FL_PASS; +} + +/** + * @brief 复位EXTI通用配置设置 + * + * @retval ErrorStatus枚举值 + * -FL_FAIL 发生错误 + * -FL_PASS EXTI通用设置复位成功 + */ +FL_ErrorStatus FL_EXTI_CommonDeinit(void) +{ + /* 关闭外部中断时钟源 */ + FL_CMU_DisableGroup3OperationClock(FL_CMU_GROUP3_OPCLK_EXTI); + return FL_PASS; +} + +/** + * @brief 设置 EXTI_CommonInitStruct 为默认配置 + * @param EXTI_CommonInitStruct 指向需要将值设置为默认配置的结构体 @ref FL_EXTI_CommonInitTypeDef 结构体 + * + * @retval None + */ +void FL_EXTI_CommonStructInit(FL_EXTI_CommonInitTypeDef *EXTI_CommonInitStruct) +{ + EXTI_CommonInitStruct->clockSource = FL_CMU_EXTI_CLK_SOURCE_LSCLK; +} + +/** + * @brief EXTI配置设置 + * + * @param extiLineX 外设入口地址 + * @param EXTI_InitStruct 指向 @ref FL_EXTI_InitTypeDef 类型的结构体，它包含EXTI外设配置信息 + * + * @retval ErrorStatus枚举值 + * -FL_FAIL 配置过程发生错误 + * -FL_PASS EXTI配置成功 + */ +FL_ErrorStatus FL_EXTI_Init(uint32_t extiLineX, FL_EXTI_InitTypeDef *EXTI_InitStruct) +{ + uint8_t extiLineId; + uint32_t tmpExtiLineX; + uint32_t i = 0; + /* 通过内核时钟计算200us延时的计数个数 */ + uint32_t temp = SystemCoreClock*2/10000 ; + /* 检查参数合法性 */ + assert_param(IS_EXTI_ALL_INSTANCE(extiLineX)); + assert_param(IS_EXTI_INPUT_GROUP(EXTI_InitStruct->input)); + assert_param(IS_EXTI_TRIG_EDGE(EXTI_InitStruct->triggerEdge)); + assert_param(IS_EXTI_FILTER(EXTI_InitStruct->filter)); + /* 获取EXTI中断线对应id号 */ + tmpExtiLineX = extiLineX; + for(extiLineId = 0; tmpExtiLineX != FL_GPIO_EXTI_LINE_0; tmpExtiLineX >>= 1, extiLineId++); + /* 设置中断线连接的IO */ + setExtiLineFuncs[extiLineId](GPIO, EXTI_InitStruct->input << (2 * (extiLineId % 16))); + /* 设置数字滤波 */ + EXTI_InitStruct->filter == FL_ENABLE ? FL_GPIO_EnableDigitalFilter(GPIO, extiLineX) : FL_GPIO_DisableDigitalFilter(GPIO, extiLineX); + /* 设置中断线触发边沿 */ + setTrigEdgeFuncs[extiLineId / 16](GPIO, extiLineX, EXTI_InitStruct->triggerEdge); + /* 等待至少周期6个LSCLK周期，约200us */ + for(i=0;i>= 1, extiLineId++); + /* 清除外部中断标志 */ + FL_GPIO_ClearFlag_EXTI(GPIO, extiLineX); + /* 中断线触发边沿禁止 */ + setTrigEdgeFuncs[extiLineId / 16](GPIO, extiLineX, FL_GPIO_EXTI_TRIGGER_EDGE_DISABLE); + /* 禁止数字滤波 */ + FL_GPIO_DisableDigitalFilter(GPIO, extiLineX); + return FL_PASS; +} + +/** + * @brief 设置 EXTI_InitStruct 为默认配置 + * @param EXTI_InitStruct 指向需要将值设置为默认配置的结构体 @ref FL_EXTI_InitTypeDef 结构体 + * + * @retval None + */ +void FL_EXTI_StructInit(FL_EXTI_InitTypeDef *EXTI_InitStruct) +{ + EXTI_InitStruct->filter = FL_DISABLE; + EXTI_InitStruct->input = FL_GPIO_EXTI_INPUT_GROUP0; + EXTI_InitStruct->triggerEdge = FL_GPIO_EXTI_TRIGGER_EDGE_RISING; +} + +/** + * @} + */ + +#endif /* FL_EXTI_DRIVER_ENABLED */ + +/** + * @} + */ + +/** + * @} + */ + +/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/ diff --git a/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_flash.c b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_flash.c new file mode 100644 index 0000000..8942958 --- /dev/null +++ b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_flash.c @@ -0,0 +1,593 @@ + /** + **************************************************************************************************** + * @file fm33lg0xx_fl_flash.c + * @author FMSH Application Team + * @brief Src file of FLASH FL Module + **************************************************************************************************** + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + +/* Includes ------------------------------------------------------------------*/ +#include "fm33lg0xx_fl.h" + +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @addtogroup FLASH + * @{ + */ + +#ifdef FL_FLASH_DRIVER_ENABLED + +/* Private macros ------------------------------------------------------------*/ +/** @addtogroup GPIO_FL_Private_Macros + * @{ + */ + +#define IS_FLASH_ALL_INSTANCE(INTENCE) (((INTENCE) == FLASH)) + +#define IS_FL_FLASH_PAGE_NUM(__VALUE__) ((uint32_t)(__VALUE__) < FL_FLASH_MAX_PAGE_NUM) + +#define IS_FL_FLASH_SECTOR_NUM(__VALUE__) ((uint32_t)(__VALUE__) < FL_FLASH_MAX_SECTOR_NUM) + +#define IS_FL_FLASH_MAX_ADDR(__VALUE__) ((uint32_t)(__VALUE__) <= FL_FLASH_ADDR_MAXPROGRAM) + +#define IS_FL_FLASH_MAX_PAGE(__VALUE__) ((uint32_t)(__VALUE__) < FL_FLASH_MAX_PAGE_NUM) + +#define IS_FL_FLASH_MAX_SECTOR(__VALUE__) ((uint32_t)(__VALUE__) < FL_FLASH_MAX_SECTOR_NUM) +/** + * @} + */ + +/* Exported functions --------------------------------------------------------*/ +/** @addtogroup FLASH_FL_EF_Init + * @{ + */ + +/** + * @brief Flash 页擦除函数，一个页为512byte. + * @param FLASHx FLASH Port + * @param address 为需要擦除的页内任意地址，推荐使用页开始的首地址（字对齐） + * . + * @retval ErrorStatus枚举值 + * -FL_FAIL 擦写发生错误 + * -FL_PASS 擦写成功 + */ +FL_ErrorStatus FL_FLASH_PageErase(FLASH_Type *FLASHx, uint32_t address) +{ + uint32_t timeout = 0; + uint32_t primask; + FL_ErrorStatus ret = FL_PASS; + /* 入口参数检查 */ + assert_param(IS_FLASH_ALL_INSTANCE(FLASHx)); + assert_param(IS_FL_FLASH_MAX_ADDR((uint32_t)address)); + /*时钟使能*/ + FL_CMU_EnableGroup2BusClock(FL_CMU_GROUP2_BUSCLK_FLASH); + if((address % FL_FLASH_ADDRS_ALIGN) != 0) + { + /*地址未对齐*/ + return FL_FAIL; + } + if(FL_FLASH_GetFlashLockStatus(FLASHx) == FL_FLASH_KEY_STATUS_ERROR) + { + /*Flash 已经锁定，复位前无法操作*/ + return FL_FAIL; + } + FL_CMU_EnableGroup3OperationClock(FL_CMU_GROUP3_OPCLK_FLASH); + /*配置擦写类型*/ + FL_FLASH_SetFlashEraseType(FLASHx, FL_FLASH_ERASE_TYPE_PAGE); + /* 开始擦除页*/ + FL_FLASH_EnableErase(FLASHx); + /* Key 序列*/ + primask = __get_PRIMASK(); + __disable_irq(); + FL_FLASH_UnlockFlash(FLASHx, FL_FLASH_ERASE_KEY); + FL_FLASH_UnlockFlash(FLASHx, FL_FLASH_PGAE_ERASE_KEY); + __set_PRIMASK(primask); + FL_FLASH_ClearFlag_EraseComplete(FLASHx); + FL_FLASH_ClearFlag_ClockError(FLASHx); + FL_FLASH_ClearFlag_AuthenticationError(FLASHx); + /* 擦请求 */ + *((uint32_t *)address) = FL_FLASH_ERASE_REQUEST; + while(1) + { + timeout++; + if((timeout > FL_FLASH_ERASE_TIMEOUT)\ + || (FL_FLASH_IsActiveFlag_ClockError(FLASHx))\ + || (FL_FLASH_IsActiveFlag_KeyError(FLASHx))\ + || (FL_FLASH_IsActiveFlag_AuthenticationError(FLASHx))) + { + /* 超时或出现错误 */ + ret = FL_FAIL; + break; + } + else + if(FL_FLASH_IsActiveFlag_EraseComplete(FLASHx)) + { + /*编程成功*/ + FL_FLASH_ClearFlag_EraseComplete(FLASHx); + ret = FL_PASS; + break; + } + } + FL_FLASH_LockFlash(FLASHx); + FL_CMU_DisableGroup3OperationClock(FL_CMU_GROUP3_OPCLK_FLASH); + FL_CMU_DisableGroup2BusClock(FL_CMU_GROUP2_BUSCLK_FLASH); + return ret; +} + +/** + * @brief Flash 扇区擦除函数，一个扇区为2k byte. + * @param FLASHx FLASH Port + * @param address 为需要擦除的扇区内任意地址，推荐使用扇区开始的首地址（字对齐） + * . + * @retval ErrorStatus枚举值 + * -FL_FAIL 擦写发生错误 + * -FL_PASS 擦写成功 + */ +FL_ErrorStatus FL_FLASH_SectorErase(FLASH_Type *FLASHx, uint32_t address) +{ + uint32_t timeout = 0; + uint32_t primask; + FL_ErrorStatus ret = FL_PASS; + /* 入口参数检查 */ + assert_param(IS_FLASH_ALL_INSTANCE(FLASHx)); + assert_param(IS_FL_FLASH_MAX_ADDR((uint32_t)address)); + /*时钟使能*/ + FL_CMU_EnableGroup2BusClock(FL_CMU_GROUP2_BUSCLK_FLASH); + if((address % FL_FLASH_ADDRS_ALIGN) != 0) + { + /*地址未对齐*/ + return FL_FAIL; + } + if(FL_FLASH_GetFlashLockStatus(FLASHx) == FL_FLASH_KEY_STATUS_ERROR) + { + /*Flash 已经锁定，复位前无法操作*/ + return FL_FAIL; + } + FL_CMU_EnableGroup3OperationClock(FL_CMU_GROUP3_OPCLK_FLASH); + /*配置擦写类型*/ + FL_FLASH_SetFlashEraseType(FLASHx, FL_FLASH_ERASE_TYPE_SECTOR); + /* 开始擦除扇区*/ + FL_FLASH_EnableErase(FLASHx); + /* Key 序列*/ + primask = __get_PRIMASK(); + __disable_irq(); + FL_FLASH_UnlockFlash(FLASHx, FL_FLASH_ERASE_KEY); + FL_FLASH_UnlockFlash(FLASHx, FL_FLASH_SECTOR_ERASE_KEY); + __set_PRIMASK(primask); + FL_FLASH_ClearFlag_EraseComplete(FLASHx); + FL_FLASH_ClearFlag_ClockError(FLASHx); + FL_FLASH_ClearFlag_AuthenticationError(FLASHx); + /* 擦请求 */ + *((uint32_t *)address) = FL_FLASH_ERASE_REQUEST; + while(1) + { + timeout++; + if((timeout > FL_FLASH_ERASE_TIMEOUT)\ + || (FL_FLASH_IsActiveFlag_ClockError(FLASHx))\ + || (FL_FLASH_IsActiveFlag_KeyError(FLASHx))\ + || (FL_FLASH_IsActiveFlag_AuthenticationError(FLASHx))) + { + /* 超时或出现错误 */ + ret = FL_FAIL; + break; + } + else + if(FL_FLASH_IsActiveFlag_EraseComplete(FLASHx)) + { + /*编程成功*/ + FL_FLASH_ClearFlag_EraseComplete(FLASHx); + ret = FL_PASS; + break; + } + } + FL_FLASH_LockFlash(FLASHx); + FL_CMU_DisableGroup3OperationClock(FL_CMU_GROUP3_OPCLK_FLASH); + FL_CMU_DisableGroup2BusClock(FL_CMU_GROUP2_BUSCLK_FLASH); + return ret; +} + +/** + * @brief 单次编程函数，编程地址必须对齐到Word边界. + * @param FLASHx FLASH Port + * @param address 为需要编程的已经擦除过的扇区内任意地址，非对齐地址编程将触发fault。 + * + * @retval ErrorStatus枚举值 + * -FL_FAIL 擦写发生错误 + * -FL_PASS 擦写成功 + */ +FL_ErrorStatus FL_FLASH_Program_Word(FLASH_Type *FLASHx, uint32_t address, uint32_t data) +{ + uint32_t timeout = 0; + uint32_t primask; + FL_ErrorStatus ret = FL_PASS; + /* 入口参数检查 */ + assert_param(IS_FLASH_ALL_INSTANCE(FLASHx)); + assert_param(IS_FL_FLASH_MAX_ADDR((uint32_t)address)); + /*时钟使能*/ + FL_CMU_EnableGroup2BusClock(FL_CMU_GROUP2_BUSCLK_FLASH); + if((address % FL_FLASH_ADDRS_ALIGN) != 0) + { + /*地址未对齐*/ + return FL_FAIL; + } + if(FL_FLASH_GetFlashLockStatus(FLASHx) == FL_FLASH_KEY_STATUS_ERROR) + { + /*Flash 已经锁定，复位前无法操作*/ + return FL_FAIL; + } + FL_CMU_EnableGroup3OperationClock(FL_CMU_GROUP3_OPCLK_FLASH); + /* 开始编程*/ + FL_FLASH_EnableProgram(FLASHx); + /* Key 序列*/ + primask = __get_PRIMASK(); + __disable_irq(); + FL_FLASH_UnlockFlash(FLASHx, FL_FLASH_PROGRAM_KEY1); + FL_FLASH_UnlockFlash(FLASHx, FL_FLASH_PROGRAM_KEY2); + __set_PRIMASK(primask); + FL_FLASH_ClearFlag_ClockError(FLASHx); + FL_FLASH_ClearFlag_AuthenticationError(FLASHx); + *((uint32_t *)address) = data; + while(1) + { + timeout++; + if((timeout > FL_FLASH_ERASE_TIMEOUT)\ + || (FL_FLASH_IsActiveFlag_ClockError(FLASHx))\ + || (FL_FLASH_IsActiveFlag_KeyError(FLASHx))\ + || (FL_FLASH_IsActiveFlag_AuthenticationError(FLASHx))) + { + /* 超时或出现错误 */ + ret = FL_FAIL; + break; + } + else + if(FL_FLASH_IsActiveFlag_ProgramComplete(FLASHx)) + { + /*编程成功*/ + FL_FLASH_ClearFlag_ProgramComplete(FLASHx); + ret = FL_PASS; + break; + } + } + FL_FLASH_LockFlash(FLASHx); + FL_CMU_DisableGroup3OperationClock(FL_CMU_GROUP3_OPCLK_FLASH); + FL_CMU_DisableGroup2BusClock(FL_CMU_GROUP2_BUSCLK_FLASH); + return ret; +} + +/** + * @brief 页编程函数，编程地址必须对齐到Page边界. + * @param FLASHx FLASH Port + * @param PageNum 为需要编程的已经擦除过的扇区号，FM33LG04最大为256，非对齐地址编程将触发fault。 + * + * @retval ErrorStatus枚举值 + * -FL_FAIL 擦写发生错误 + * -FL_PASS 擦写成功 + */ +FL_ErrorStatus FL_FLASH_Program_Page(FLASH_Type *FLASHx, uint32_t pageNum, uint32_t *data) +{ + uint32_t count; + uint32_t primask; + uint32_t address; + uint32_t timeout; + FL_ErrorStatus ret=FL_PASS; + /* 入口参数检查 */ + assert_param(IS_FLASH_ALL_INSTANCE(FLASHx)); + assert_param(IS_FL_FLASH_MAX_PAGE((uint32_t)pageNum)); + address = pageNum * FL_FLASH_PGAE_SIZE_BYTE; + /* 页对齐*/ + if((address % FL_FLASH_PGAE_SIZE_BYTE) != 0) + { + /*地址未对齐*/ + return FL_FAIL; + } + FL_CMU_EnableGroup2BusClock(FL_CMU_GROUP2_BUSCLK_FLASH); + FL_CMU_EnableGroup3OperationClock(FL_CMU_GROUP3_OPCLK_FLASH); + FL_FLASH_EnableProgram(FLASHx); + /* Key 序列*/ + primask = __get_PRIMASK(); + __disable_irq(); + FL_FLASH_UnlockFlash(FLASHx, FL_FLASH_PROGRAM_KEY1); + FL_FLASH_UnlockFlash(FLASHx, FL_FLASH_PROGRAM_KEY2); + __set_PRIMASK(primask); + FL_FLASH_ClearFlag_ClockError(FLASHx); + FL_FLASH_ClearFlag_AuthenticationError(FLASHx); + for(count = 0; count < FL_FLASH_PGAE_SIZE_BYTE; count += 4) + { + timeout = 0; + FL_FLASH_EnableProgram(FLASHx); + *((uint32_t *)address) = *data; + address += 4; + data++; + while(1) + { + timeout++; + if((timeout > FL_FLASH_ERASE_TIMEOUT)\ + || (FL_FLASH_IsActiveFlag_ClockError(FLASHx))\ + || (FL_FLASH_IsActiveFlag_KeyError(FLASHx))\ + || (FL_FLASH_IsActiveFlag_AuthenticationError(FLASHx))) + { + /* 超时或出现错误 */ + ret = FL_FAIL; + break; + } + if(FL_FLASH_IsActiveFlag_ProgramComplete(FLASHx)) + { + /*编程成功*/ + FL_FLASH_ClearFlag_ProgramComplete(FLASHx); + ret = FL_PASS; + break; + } + } + if(ret == FL_FAIL) + { + break; + } + } + FL_FLASH_LockFlash(FLASHx); + FL_CMU_DisableGroup3OperationClock(FL_CMU_GROUP3_OPCLK_FLASH); + FL_CMU_DisableGroup2BusClock(FL_CMU_GROUP2_BUSCLK_FLASH); + return ret; +} + +/** + * @brief 扇区编程函数，编程地址必须对齐到Sector边界. + * @param FLASHx FLASH Port + * @param sectorNum 为需要编程的已经擦除过的扇区号，最大为128，非对齐地址编程将触发fault。 + * + * @retval ErrorStatus枚举值 + * -FL_FAIL 擦写发生错误 + * -FL_PASS 擦写成功 + */ +FL_ErrorStatus FL_FLASH_Program_Sector(FLASH_Type *FLASHx, uint32_t sectorNum, uint32_t *data) +{ + uint32_t count; + uint32_t primask; + uint32_t address; + uint32_t timeout; + FL_ErrorStatus ret=FL_PASS; + /* 入口参数检查 */ + assert_param(IS_FLASH_ALL_INSTANCE(FLASHx)); + assert_param(IS_FL_FLASH_MAX_SECTOR((uint32_t)sectorNum)); + address = sectorNum * FL_FLASH_SECTOR_SIZE_BYTE; + /* Sector对齐*/ + if((address % FL_FLASH_SECTOR_SIZE_BYTE) != 0) + { + /*地址未对齐*/ + return FL_FAIL; + } + FL_CMU_EnableGroup2BusClock(FL_CMU_GROUP2_BUSCLK_FLASH); + FL_CMU_EnableGroup3OperationClock(FL_CMU_GROUP3_OPCLK_FLASH); + FL_FLASH_EnableProgram(FLASHx); + /* Key 序列*/ + primask = __get_PRIMASK(); + __disable_irq(); + FL_FLASH_UnlockFlash(FLASHx, FL_FLASH_PROGRAM_KEY1); + FL_FLASH_UnlockFlash(FLASHx, FL_FLASH_PROGRAM_KEY2); + __set_PRIMASK(primask); + FL_FLASH_ClearFlag_ClockError(FLASHx); + FL_FLASH_ClearFlag_AuthenticationError(FLASHx); + for(count = 0; count < FL_FLASH_SECTOR_SIZE_BYTE; count += 4) + { + timeout = 0; + FL_FLASH_EnableProgram(FLASHx); + *((uint32_t *)address) = *data; + address += 4; + data++; + while(1) + { + timeout++; + if((timeout > FL_FLASH_ERASE_TIMEOUT)\ + || (FL_FLASH_IsActiveFlag_ClockError(FLASHx))\ + || (FL_FLASH_IsActiveFlag_KeyError(FLASHx))\ + || (FL_FLASH_IsActiveFlag_AuthenticationError(FLASHx))) + { + /* 超时或出现错误 */ + ret = FL_FAIL; + break; + } + if(FL_FLASH_IsActiveFlag_ProgramComplete(FLASHx)) + { + /*编程成功*/ + FL_FLASH_ClearFlag_ProgramComplete(FLASHx); + ret = FL_PASS; + break; + } + } + if(ret == FL_FAIL) + { + break; + } + } + FL_FLASH_LockFlash(FLASHx); + FL_CMU_DisableGroup3OperationClock(FL_CMU_GROUP3_OPCLK_FLASH); + FL_CMU_DisableGroup2BusClock(FL_CMU_GROUP2_BUSCLK_FLASH); + return ret; +} + +/** + * @brief DMA编程函数，编程地址必须对齐到half-page，长度固定为64字. + * @param FLASHx FLASH Port + * @param address 待编程Flash地址 + * @param *data 待写入Flash数据 + * + * @retval ErrorStatus枚举值 + * -FL_FAIL 擦写发生错误 + * -FL_PASS 擦写成功 + */ +FL_ErrorStatus FL_FLASH_Write_Dma(FLASH_Type *FLASHx, uint32_t address, uint32_t *data) +{ + FL_ErrorStatus ret=FL_PASS; + uint32_t primask; + uint32_t timeout; + FL_DMA_InitTypeDef DMA_InitStruct = {0}; + /* 入口参数检查 */ + assert_param(IS_FLASH_ALL_INSTANCE(FLASHx)); + assert_param(IS_FL_FLASH_MAX_ADDR(address)); + /* 半页对齐*/ + if((address % (FL_FLASH_PGAE_SIZE_BYTE / 2)) != 0) + { + /*地址未对齐*/ + return FL_FAIL; + } + FL_CMU_EnableGroup2BusClock(FL_CMU_GROUP2_BUSCLK_FLASH); + FL_CMU_EnableGroup3OperationClock(FL_CMU_GROUP3_OPCLK_FLASH); + FL_FLASH_EnableProgram(FLASHx); + /* Key 序列*/ + primask = __get_PRIMASK(); + __disable_irq(); + FL_FLASH_UnlockFlash(FLASHx, FL_FLASH_PROGRAM_KEY1); + FL_FLASH_UnlockFlash(FLASHx, FL_FLASH_PROGRAM_KEY2); + __set_PRIMASK(primask); + FL_FLASH_EnableProgram(FLASHx); + DMA_InitStruct.circMode = FL_DISABLE; + DMA_InitStruct.direction = FL_DMA_DIR_RAM_TO_FLASH; + DMA_InitStruct.memoryAddressIncMode = FL_DMA_CH7_RAM_INC_MODE_INCREASE; + DMA_InitStruct.flashAddressIncMode = FL_DMA_CH7_FLASH_INC_MODE_INCREASE; + DMA_InitStruct.priority = FL_DMA_PRIORITY_HIGH; + FL_DMA_Init(DMA, &DMA_InitStruct, FL_DMA_CHANNEL_7); + /* Channel7 Flash 指针地址为（word 地址） */ + FL_DMA_WriteFlashAddress(DMA, address >> 2); + /* Channel7 RAM 指针地址为（word 地址）*/ + FL_DMA_WriteMemoryAddress(DMA, (uint32_t)data >> 2, FL_DMA_CHANNEL_7); + FL_DMA_WriteTransmissionSize(DMA, 64 - 1, FL_DMA_CHANNEL_7); + FL_DMA_ClearFlag_TransferComplete(DMA, FL_DMA_CHANNEL_7); + FL_DMA_EnableChannel(DMA, FL_DMA_CHANNEL_7); + timeout = 0; + while(1) + { + timeout++; + if(timeout > FL_FLASH_ERASE_TIMEOUT) + { + ret = FL_FAIL; + break; + } + if(FL_DMA_IsActiveFlag_TransferComplete(DMA, FL_DMA_CHANNEL_7) == FL_SET) + { + ret = FL_PASS; + break; + } + } + FL_FLASH_LockFlash(FLASHx); + FL_CMU_DisableGroup3OperationClock(FL_CMU_GROUP3_OPCLK_FLASH); + FL_CMU_DisableGroup2BusClock(FL_CMU_GROUP2_BUSCLK_FLASH); + return ret; +} + +/** + * @brief DMA读取函数，编程地址必须对齐到Word边界. + * @param FLASHx FLASH Port + * @param address 读取数据Flash地址 + * @param *data 读出数据存储区 + * @param length 读出数据的字长度 + * + * @retval ErrorStatus枚举值 + * -FL_FAIL 擦写发生错误 + * -FL_PASS 擦写成功 + */ +FL_ErrorStatus FL_FLASH_Read_Dma(FLASH_Type *FLASHx, uint32_t address, uint32_t *data, uint16_t length) +{ + FL_ErrorStatus ret=FL_PASS; + uint32_t Timeout; + FL_DMA_InitTypeDef DMA_InitStruct = {0}; + /* 入口参数检查 */ + assert_param(IS_FLASH_ALL_INSTANCE(FLASHx)); + assert_param(IS_FL_FLASH_MAX_ADDR(address)); + /* 字对齐*/ + if((address % FL_FLASH_ADDRS_ALIGN) != 0) + { + /*地址未对齐*/ + return FL_FAIL; + } + DMA_InitStruct.circMode = FL_DISABLE; + DMA_InitStruct.direction = FL_DMA_DIR_FLASH_TO_RAM; + DMA_InitStruct.memoryAddressIncMode = FL_DMA_CH7_RAM_INC_MODE_INCREASE; + DMA_InitStruct.flashAddressIncMode = FL_DMA_CH7_FLASH_INC_MODE_INCREASE; + DMA_InitStruct.priority = FL_DMA_PRIORITY_HIGH; + FL_DMA_Init(DMA, &DMA_InitStruct, FL_DMA_CHANNEL_7); + /* Channel7 Flash 指针地址为（word 地址） */ + FL_DMA_WriteFlashAddress(DMA, address >> 2); + /* Channel7 RAM 指针地址为（word 地址）*/ + FL_DMA_WriteMemoryAddress(DMA, (uint32_t)data >> 2, FL_DMA_CHANNEL_7); + FL_DMA_WriteTransmissionSize(DMA, length - 1, FL_DMA_CHANNEL_7); + FL_DMA_ClearFlag_TransferComplete(DMA, FL_DMA_CHANNEL_7); + FL_DMA_EnableChannel(DMA, FL_DMA_CHANNEL_7); + Timeout = 0; + while(1) + { + Timeout++; + if(Timeout > FL_FLASH_ERASE_TIMEOUT) + { + ret = FL_FAIL; + break; + } + if(FL_DMA_IsActiveFlag_TransferComplete(DMA, FL_DMA_CHANNEL_7) == FL_SET) + { + ret = FL_PASS; + break; + } + } + return ret; +} + +/** + * @} + */ + +#endif /* FL_FLASH_DRIVER_ENABLED */ + +/** + * @} + */ + +/** + * @} + */ + +/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/ + + + + + + + + diff --git a/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_gpio.c b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_gpio.c new file mode 100644 index 0000000..47dde6c --- /dev/null +++ b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_gpio.c @@ -0,0 +1,430 @@ + /** + **************************************************************************************************** + * @file fm33lg0xx_fl_gpio.c + * @author FMSH Application Team + * @brief Src file of GPIO FL Module + **************************************************************************************************** + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + +/* Includes ------------------------------------------------------------------*/ +#include "fm33lg0xx_fl.h" + +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @addtogroup GPIO + * @{ + */ + +#ifdef FL_GPIO_DRIVER_ENABLED + +/* Private macros ------------------------------------------------------------*/ +/** @addtogroup GPIO_FL_Private_Macros + * @{ + */ + +#define IS_GPIO_ALL_INSTANCE(INTENCE) (((INTENCE) == GPIOA)||\ + ((INTENCE) == GPIOB)||\ + ((INTENCE) == GPIOC)||\ + ((INTENCE) == GPIOD)||\ + ((INTENCE) == GPIOE)) + +#define IS_FL_GPIO_PIN(__VALUE__) ((((uint32_t)0x00000000U) < (__VALUE__)) &&\ + ((__VALUE__) <= (FL_GPIO_PIN_ALL))) + +#define IS_FL_GPIO_MODE(__VALUE__) (((__VALUE__) == FL_GPIO_MODE_ANALOG)||\ + ((__VALUE__) == FL_GPIO_MODE_INPUT)||\ + ((__VALUE__) == FL_GPIO_MODE_OUTPUT)||\ + ((__VALUE__) == FL_GPIO_MODE_DIGITAL)) + +#define IS_FL_GPIO_OPENDRAIN(__VALUE__) (((__VALUE__) == FL_GPIO_OUTPUT_OPENDRAIN)||\ + ((__VALUE__) == FL_GPIO_OUTPUT_PUSHPULL)) + +#define IS_FL_GPIO_PULL_UP(__VALUE__) (((__VALUE__) == FL_DISABLE)||\ + ((__VALUE__) == FL_ENABLE)) + +#define IS_FL_GPIO_ANALOG_SWITCH(__VALUE__) (((__VALUE__) == FL_DISABLE)||\ + ((__VALUE__) == FL_ENABLE)) + +#define IS_FL_GPIO_WKUP_ENTRY(__VALUE__) (((__VALUE__) == FL_GPIO_WKUP_INT_ENTRY_NMI)||\ + ((__VALUE__) == FL_GPIO_WKUP_INT_ENTRY_NUM_38)) + +#define IS_FL_GPIO_WKUP_EDGE(__VALUE__) (((__VALUE__) == FL_GPIO_WAKEUP_TRIGGER_RISING)||\ + ((__VALUE__) == FL_GPIO_WAKEUP_TRIGGER_FALLING)||\ + ((__VALUE__) == FL_GPIO_WAKEUP_TRIGGER_BOTH)) + + +#define IS_FL_GPIO_WKUP_NUM(__VALUE__) (((__VALUE__) == FL_GPIO_WAKEUP_0)||\ + ((__VALUE__) == FL_GPIO_WAKEUP_1)||\ + ((__VALUE__) == FL_GPIO_WAKEUP_2)||\ + ((__VALUE__) == FL_GPIO_WAKEUP_3)||\ + ((__VALUE__) == FL_GPIO_WAKEUP_4)||\ + ((__VALUE__) == FL_GPIO_WAKEUP_5)||\ + ((__VALUE__) == FL_GPIO_WAKEUP_6)||\ + ((__VALUE__) == FL_GPIO_WAKEUP_7)||\ + ((__VALUE__) == FL_GPIO_WAKEUP_8)||\ + ((__VALUE__) == FL_GPIO_WAKEUP_9)) + +/** + * @} + */ + +/* Exported functions --------------------------------------------------------*/ +/** @addtogroup GPIO_FL_EF_Init + * @{ + */ + +/** + * @brief 复位对应GPIO控制寄存器. + * @param GPIOx GPIO Port + * @retval ErrorStatus枚举值: + * -FL_PASS 外设寄存器值恢复复位值 + * -FL_FAIL 未成功执行 + */ +FL_ErrorStatus FL_GPIO_DeInit(GPIO_Type *GPIOx, uint32_t pin) +{ + uint32_t pinPos = 0x00000000U; + uint32_t currentPin = 0x00000000U; + /* 入口参数检查 */ + assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); + assert_param(IS_FL_GPIO_PIN(pin)); + /* 恢复寄存器值为默认值 */ + while(((pin) >> pinPos) != 0x00000000U) + { + /* 获取当前遍历到的Pin脚 */ + currentPin = (pin) & (0x00000001U << pinPos); + if(currentPin) + { + FL_GPIO_SetPinMode(GPIOx, currentPin, FL_GPIO_MODE_INPUT); + FL_GPIO_DisablePinInput(GPIOx, currentPin); + FL_GPIO_DisablePinOpenDrain(GPIOx, currentPin); + FL_GPIO_DisablePinPullup(GPIOx, currentPin); + FL_GPIO_DisablePinAnalogSwitch(GPIOx, currentPin); + FL_GPIO_DisablePinRemap(GPIOx, currentPin); + } + pinPos++; + } + return FL_PASS; +} + +#if defined (FM33LG0x3A) /* 仅针对32pin芯片处理 */ +/** +* @brief 复用GPIO数据类型,单个元素为一组复用的GPIO + */ +static const struct MultiplexGpioType +{ + /* 成员元素 */ + const struct + { + GPIO_Type *GPIox; /* 元素信息: GPIO的Port索引 */ + uint32_t Pin; /* 元素信息: GPIO的Pin索引 */ + } MultiplexGpioElement[2]; /* 一组复用关系，无先后顺序 */ + +} MultiplexGpioTable[] = /* 复用GPIO的表格清单 */ +{ + { {{GPIOA, (uint32_t)FL_GPIO_PIN_9 }/*PA9 */, {GPIOA, (uint32_t)FL_GPIO_PIN_11}/*PA11*/} },/* 此为一组复用关系 */ + { {{GPIOB, (uint32_t)FL_GPIO_PIN_0 }/*PB0 */, {GPIOA, (uint32_t)FL_GPIO_PIN_12}/*PA12*/} }, + { {{GPIOB, (uint32_t)FL_GPIO_PIN_7 }/*PB7 */, {GPIOB, (uint32_t)FL_GPIO_PIN_8 }/*PB8 */} }, + { {{GPIOB, (uint32_t)FL_GPIO_PIN_12}/*PB12*/, {GPIOE, (uint32_t)FL_GPIO_PIN_1 }/*PE1 */} }, + { {{GPIOC, (uint32_t)FL_GPIO_PIN_2 }/*PC2 */, {GPIOD, (uint32_t)FL_GPIO_PIN_12}/*PD12*/} }, + { {{GPIOD, (uint32_t)FL_GPIO_PIN_11}/*PD11*/, {GPIOD, (uint32_t)FL_GPIO_PIN_0 }/*PD0 */} }, + { {{GPIOD, (uint32_t)FL_GPIO_PIN_6 }/*PD6 */, {GPIOD, (uint32_t)FL_GPIO_PIN_1 }/*PD1 */} } +}; + +/** +* @brief 复用GPIO的组数 + */ +static const uint32_t u32MultiplexGpioCount =\ + (uint32_t)((sizeof(MultiplexGpioTable)) / (sizeof(MultiplexGpioTable[0]))); + +/** +* @brief 针对复用GPIO，如有一个GPIO使用，则将另一个GPIO配置为高阻抗，避免相互影响 + * @param GPIOx 当前使用的GPIO Port索引 + * @param pin 当前使用的GPIO Pin索引 + * @retval 无 + */ +static void FL_GPIO_Multiplex_DeInit(GPIO_Type *GPIOx, uint32_t pin) +{ + /* 指向复用GPIO表格的指针 */ + const struct MultiplexGpioType *pMultiplexGpio = MultiplexGpioTable; + + /* 入口参数检查 */ + assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); + assert_param(IS_FL_GPIO_PIN(pin)); + + for( ; pMultiplexGpio < (MultiplexGpioTable + u32MultiplexGpioCount); pMultiplexGpio++) + { + if( (pMultiplexGpio->MultiplexGpioElement[0].Pin == pin)\ + && (pMultiplexGpio->MultiplexGpioElement[0].GPIox == GPIOx)) + { + /* 未使用的GPIO执行高阻抗初始化 */ + FL_GPIO_DeInit(pMultiplexGpio->MultiplexGpioElement[1].GPIox,\ + pMultiplexGpio->MultiplexGpioElement[1].Pin ); + break; + } + else if( (pMultiplexGpio->MultiplexGpioElement[1].Pin == pin)\ + && (pMultiplexGpio->MultiplexGpioElement[1].GPIox == GPIOx)) + { + /* 未使用的GPIO执行高阻抗初始化 */ + FL_GPIO_DeInit(pMultiplexGpio->MultiplexGpioElement[0].GPIox,\ + pMultiplexGpio->MultiplexGpioElement[0].Pin ); + break; + } + } +} +#endif /* #if defined (FM33LG0x3A) */ + +/** + * @brief 根据 GPIO_InitStruct的配置信息初始化对应外设. + * @param GPIOx GPIO Port + * @param GPIO_InitStruct 指向一个 @ref FL_GPIO_InitTypeDef 结构体 + * 其中包含了外设的相关配置信息. + * @retval ErrorStatus枚举值 + * -FL_FAIL 配置过程发生错误 + * -FL_PASS 配置成功 + */ +FL_ErrorStatus FL_GPIO_Init(GPIO_Type *GPIOx, FL_GPIO_InitTypeDef *initStruct) +{ + uint32_t pinPos = 0x00000000U; + uint32_t currentPin = 0x00000000U; + /* 入口参数检查 */ + assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); + assert_param(IS_FL_GPIO_PIN(initStruct->pin)); + assert_param(IS_FL_GPIO_MODE(initStruct->mode)); + assert_param(IS_FL_GPIO_OPENDRAIN(initStruct->outputType)); + assert_param(IS_FL_GPIO_PULL_UP(initStruct->pull)); + assert_param(IS_FL_GPIO_ANALOG_SWITCH(initStruct->analogSwitch)); + /* 使能时钟总线 */ + FL_CMU_EnableGroup1BusClock(FL_CMU_GROUP1_BUSCLK_PAD); + /* 这里考虑到PIN有可能不止一个因此需要遍历 */ + while(((initStruct->pin) >> pinPos) != 0x00000000U) + { + /* 获取当前遍历到的Pin脚 */ + currentPin = (initStruct->pin) & (0x00000001U << pinPos); + if(currentPin) + { + #if defined (FM33LG0x3A) /* 仅针对32pin芯片处理 */ + /* 检查复用引脚，并做处理 */ + FL_GPIO_Multiplex_DeInit(GPIOx, currentPin); + #endif /* #if defined (FM33LG0x3A) */ + /* Pin脚模拟模式设置 */ + if(initStruct->mode == FL_GPIO_MODE_ANALOG) + { + FL_GPIO_DisablePinInput(GPIOx, currentPin); + FL_GPIO_DisablePinPullup(GPIOx, currentPin); + FL_GPIO_DisablePinOpenDrain(GPIOx, currentPin); + if(initStruct->analogSwitch == FL_ENABLE) + { + FL_GPIO_EnablePinAnalogSwitch(GPIOx, currentPin); + } + else + { + FL_GPIO_DisablePinAnalogSwitch(GPIOx, currentPin); + } + } + else + { + FL_GPIO_DisablePinAnalogSwitch(GPIOx, currentPin); + /* Pin脚输入使能控制 */ + if(initStruct->mode == FL_GPIO_MODE_INPUT) + { + FL_GPIO_EnablePinInput(GPIOx, currentPin); + } + else + { + FL_GPIO_DisablePinInput(GPIOx, currentPin); + } + /* Pin脚输出模式设置 */ + if(initStruct->outputType == FL_GPIO_OUTPUT_PUSHPULL) + { + FL_GPIO_DisablePinOpenDrain(GPIOx, currentPin); + } + else + { + FL_GPIO_EnablePinOpenDrain(GPIOx, currentPin); + } + /* Pin脚上拉模式设置 */ + if(initStruct->pull) + { + FL_GPIO_EnablePinPullup(GPIOx, currentPin); + } + else + { + FL_GPIO_DisablePinPullup(GPIOx, currentPin); + } + } + /* 数字模式复用功能选择 */ + if(initStruct->mode == FL_GPIO_MODE_DIGITAL) + { + /*重定向*/ + if(initStruct->remapPin == FL_ENABLE) + { + FL_GPIO_EnablePinRemap(GPIOx, currentPin); + } + else + { + FL_GPIO_DisablePinRemap(GPIOx, currentPin); + } + } + /* Pin脚工作模式设置 */ + FL_GPIO_SetPinMode(GPIOx, currentPin, initStruct->mode); + } + pinPos++; + } + return FL_PASS; +} + +/** + * @brief 设置 GPIO_InitStruct 为默认配置 + * @param GPIO_InitStruct 指向需要将值设置为默认配置的结构体 @ref FL_GPIO_InitTypeDef 结构体 + * + * @retval None + */ +void FL_GPIO_StructInit(FL_GPIO_InitTypeDef *initStruct) +{ + /* 复位配置信息 */ + initStruct->pin = FL_GPIO_PIN_ALL; + initStruct->mode = FL_GPIO_MODE_INPUT; + initStruct->outputType = FL_GPIO_OUTPUT_OPENDRAIN; + initStruct->pull = FL_DISABLE; + initStruct->remapPin = FL_DISABLE; + initStruct->analogSwitch = FL_DISABLE; +} + +/** + * @brief 根据 WKUP_InitTypeDef的配置信息初始化对应外设. + * @param WKUP_InitTypeDef 指向一个 @ref FL_WKUP_InitTypeDef 结构体 + * 其中包含了外设的相关配置信息. + * @param Wkupx 唤醒入口 + * FL_GPIO_WKUP_0 + * FL_GPIO_WKUP_1 + * FL_GPIO_WKUP_2 + * FL_GPIO_WKUP_3 + * FL_GPIO_WKUP_4 + * FL_GPIO_WKUP_5 + * FL_GPIO_WKUP_6 + * FL_GPIO_WKUP_7 + * FL_GPIO_WKUP_8 + * FL_GPIO_WKUP_9 + * @retval ErrorStatus枚举值 + * -FL_FAIL 配置过程发生错误 + * -FL_PASS 配置成功 + */ +FL_ErrorStatus FL_WKUP_Init(FL_WKUP_InitTypeDef *initStruct, uint32_t wakeup) +{ + /* 入口参数检查 */ + assert_param(IS_FL_GPIO_WKUP_NUM(wakeup)); + assert_param(IS_FL_GPIO_WKUP_EDGE(initStruct->polarity)); + FL_GPIO_EnableWakeup(GPIO, wakeup); + FL_GPIO_SetWakeupEdge(GPIO, wakeup, initStruct->polarity); + return FL_PASS; +} + +/** + * @brief 去初始化Wakeup设置. + * @param Wkupx 唤醒入口 + * FL_GPIO_WKUP_0 + * FL_GPIO_WKUP_1 + * FL_GPIO_WKUP_2 + * FL_GPIO_WKUP_3 + * FL_GPIO_WKUP_4 + * FL_GPIO_WKUP_5 + * FL_GPIO_WKUP_6 + * FL_GPIO_WKUP_7 + * FL_GPIO_WKUP_8 + * FL_GPIO_WKUP_9 + * @retval ErrorStatus枚举值 + * -FL_FAIL 配置过程发生错误 + * -FL_PASS 配置成功 + */ +FL_ErrorStatus FL_WKUP_DeInit(uint32_t wakeup) +{ + /* 入口参数检查 */ + assert_param(IS_FL_GPIO_WKUP_NUM(wakeup)); + FL_GPIO_DisableWakeup(GPIO, wakeup); + return FL_PASS; +} + +/** + * @brief 设置 GPIO_InitStruct 为默认配置 + * @param GPIO_InitStruct 指向需要将值设置为默认配置的结构体 @ref FL_GPIO_InitTypeDef 结构体 + * + * @retval None + */ +void FL_WKUP_StructInit(FL_WKUP_InitTypeDef *initStruct_Wakeup) +{ + /* 复位配置信息 */ + initStruct_Wakeup->polarity = FL_GPIO_WAKEUP_TRIGGER_FALLING; +} + +/** + * @brief 配置所有IO口为输入模式、输入使能关闭（高阻态），SWD接口除外。 + * @note PD7和PD8为调试接口 + * + * @param None + * + * @retval None + */ +void FL_GPIO_ALLPIN_LPM_MODE(void) +{ + FL_GPIO_DeInit(GPIOA, FL_GPIO_PIN_ALL); + FL_GPIO_DeInit(GPIOB, FL_GPIO_PIN_ALL); + FL_GPIO_DeInit(GPIOC, FL_GPIO_PIN_ALL); + FL_GPIO_DeInit(GPIOD, FL_GPIO_PIN_ALL & + (~FL_GPIO_PIN_7) & (~FL_GPIO_PIN_8)); + FL_GPIO_DeInit(GPIOE, FL_GPIO_PIN_ALL); +} + +/** + * @} + */ + +#endif /* FL_GPIO_DRIVER_ENABLED */ + +/** + * @} + */ + +/** + * @} + */ + +/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/ diff --git a/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_gptim.c b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_gptim.c new file mode 100644 index 0000000..234be65 --- /dev/null +++ b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_gptim.c @@ -0,0 +1,666 @@ + /** + ******************************************************************************************************* + * @file fm33lg0xx_fl_gptim.c + * @author FMSH Application Team + * @brief Src file of GPTIM FL Module + ******************************************************************************************************* + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + +/* Includes ------------------------------------------------------------------*/ +#include "fm33lg0xx_fl.h" + +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @addtogroup GPTIM + * @{ + */ + +#ifdef FL_GPTIM_DRIVER_ENABLED + +/* Private macros ------------------------------------------------------------*/ +/** @addtogroup GPTIM_FL_Private_Macros + * @{ + */ + +#define IS_GPTIM_INSTANCE(TIMx) (((TIMx) == GPTIM0) || \ + ((TIMx) == GPTIM1) || \ + ((TIMx) == GPTIM2)) + +#define IS_FL_GPTIM_COUNTERMODE(__VALUE__) (((__VALUE__) == FL_GPTIM_COUNTER_DIR_UP) || \ + ((__VALUE__) == FL_GPTIM_COUNTER_DIR_DOWN) || \ + ((__VALUE__) == FL_GPTIM_COUNTER_ALIGNED_EDGE) || \ + ((__VALUE__) == FL_GPTIM_COUNTER_ALIGNED_CENTER_UP) || \ + ((__VALUE__) == FL_GPTIM_COUNTER_ALIGNED_CENTER_DOWN) || \ + ((__VALUE__) == FL_GPTIM_COUNTER_ALIGNED_CENTER_UP_DOWN)) + +#define IS_FL_GPTIM_CLOCKDIVISION(__VALUE__) (((__VALUE__) == FL_GPTIM_CLK_DIVISION_DIV1) || \ + ((__VALUE__) == FL_GPTIM_CLK_DIVISION_DIV2) || \ + ((__VALUE__) == FL_GPTIM_CLK_DIVISION_DIV4)) + + +#define IS_FL_GPTIM_CHANNEL_MODE(__VALUE__) (((__VALUE__) == FL_GPTIM_CHANNEL_MODE_OUTPUT) || \ + ((__VALUE__) == FL_GPTIM_CHANNEL_MODE_INPUT_NORMAL) || \ + ((__VALUE__) == FL_GPTIM_CHANNEL_MODE_INPUT_CROSSOVER) || \ + ((__VALUE__) == FL_GPTIM_CHANNEL_MODE_INPUT_TRC)) + +#define IS_FL_GPTIM_IC_FILTER(__VALUE__) (((__VALUE__) == FL_GPTIM_IC_FILTER_DIV1) || \ + ((__VALUE__) == FL_GPTIM_IC_FILTER_DIV1_N2) || \ + ((__VALUE__) == FL_GPTIM_IC_FILTER_DIV1_N4) || \ + ((__VALUE__) == FL_GPTIM_IC_FILTER_DIV1_N8) || \ + ((__VALUE__) == FL_GPTIM_IC_FILTER_DIV2_N6) || \ + ((__VALUE__) == FL_GPTIM_IC_FILTER_DIV2_N8) || \ + ((__VALUE__) == FL_GPTIM_IC_FILTER_DIV4_N6) || \ + ((__VALUE__) == FL_GPTIM_IC_FILTER_DIV4_N8) || \ + ((__VALUE__) == FL_GPTIM_IC_FILTER_DIV8_N6) || \ + ((__VALUE__) == FL_GPTIM_IC_FILTER_DIV8_N8) || \ + ((__VALUE__) == FL_GPTIM_IC_FILTER_DIV16_N5) || \ + ((__VALUE__) == FL_GPTIM_IC_FILTER_DIV16_N6) || \ + ((__VALUE__) == FL_GPTIM_IC_FILTER_DIV16_N8) || \ + ((__VALUE__) == FL_GPTIM_IC_FILTER_DIV32_N5) || \ + ((__VALUE__) == FL_GPTIM_IC_FILTER_DIV32_N6) || \ + ((__VALUE__) == FL_GPTIM_IC_FILTER_DIV32_N8)) + +#define IS_FL_GPTIM_CHANNEL(__VALUE__) (((__VALUE__) == FL_GPTIM_CHANNEL_1)\ + || ((__VALUE__) == FL_GPTIM_CHANNEL_2)\ + || ((__VALUE__) == FL_GPTIM_CHANNEL_3)\ + || ((__VALUE__) == FL_GPTIM_CHANNEL_4)) + + + +#define IS_FL_GPTIM_SLAVE_MODE(__VALUE__) (((__VALUE__) == FL_GPTIM_SLAVE_MODE_PROHIBITED)\ + || ((__VALUE__) == FL_GPTIM_SLAVE_MODE_ENCODER_X2_TI1)\ + || ((__VALUE__) == FL_GPTIM_SLAVE_MODE_ENCODER_X2_TI2)\ + || ((__VALUE__) == FL_GPTIM_SLAVE_MODE_ENCODER_X4_TI1TI2)\ + || ((__VALUE__) == FL_GPTIM_SLAVE_MODE_TRGI_RISE_RST)\ + || ((__VALUE__) == FL_GPTIM_SLAVE_MODE_TRGI_HIGH_RUN)\ + || ((__VALUE__) == FL_GPTIM_SLAVE_MODE_TRGI_RISE_RUN)\ + || ((__VALUE__) == FL_GPTIM_SLAVE_MODE_TRGI_CLK)) + + +#define IS_FL_GPTIM_TRIGGER_SRC(__VALUE__) (((__VALUE__) ==FL_GPTIM_TIM_TS_ITR0 )\ + ||((__VALUE__) ==FL_GPTIM_TIM_TS_ITR1 )\ + ||((__VALUE__) ==FL_GPTIM_TIM_TS_ITR2)\ + ||((__VALUE__) ==FL_GPTIM_TIM_TS_ITR3)\ + ||((__VALUE__) ==FL_GPTIM_TIM_TS_TI1F_ED)\ + ||((__VALUE__) ==FL_GPTIM_TIM_TS_TI1FP1)\ + ||((__VALUE__) ==FL_GPTIM_TIM_TS_TI2FP2)\ + ||((__VALUE__) ==FL_GPTIM_TIM_TS_ETRF)) + + + +#define IS_FL_GPTIM_ETR_FILTER(__VALUE__) (((__VALUE__) == FL_GPTIM_ETR_FILTER_DIV1) || \ + ((__VALUE__) == FL_GPTIM_ETR_FILTER_DIV1_N2) || \ + ((__VALUE__) == FL_GPTIM_ETR_FILTER_DIV1_N4) || \ + ((__VALUE__) == FL_GPTIM_ETR_FILTER_DIV1_N8) || \ + ((__VALUE__) == FL_GPTIM_ETR_FILTER_DIV2_N6) || \ + ((__VALUE__) == FL_GPTIM_ETR_FILTER_DIV2_N8) || \ + ((__VALUE__) == FL_GPTIM_ETR_FILTER_DIV4_N6) || \ + ((__VALUE__) == FL_GPTIM_ETR_FILTER_DIV4_N8) || \ + ((__VALUE__) == FL_GPTIM_ETR_FILTER_DIV8_N6) || \ + ((__VALUE__) == FL_GPTIM_ETR_FILTER_DIV8_N8) || \ + ((__VALUE__) == FL_GPTIM_ETR_FILTER_DIV16_N5) || \ + ((__VALUE__) == FL_GPTIM_ETR_FILTER_DIV16_N6) || \ + ((__VALUE__) == FL_GPTIM_ETR_FILTER_DIV16_N8) || \ + ((__VALUE__) == FL_GPTIM_ETR_FILTER_DIV32_N5) || \ + ((__VALUE__) == FL_GPTIM_ETR_FILTER_DIV32_N6) || \ + ((__VALUE__) == FL_GPTIM_ETR_FILTER_DIV32_N8)) + + +#define IS_FL_GPTIM_ETR_PSC(__VALUE__) (((__VALUE__) == FL_GPTIM_ETR_PSC_DIV1) ||\ + ((__VALUE__) == FL_GPTIM_ETR_PSC_DIV2) ||\ + ((__VALUE__) == FL_GPTIM_ETR_PSC_DIV4) ||\ + ((__VALUE__) == FL_GPTIM_ETR_PSC_DIV8)) + +#define IS_FL_GPTIM_ETR_POLARITY(__VALUE__) (((__VALUE__) == FL_GPTIM_ETR_POLARITY_NORMAL) || \ + ((__VALUE__) == FL_GPTIM_ETR_POLARITY_INVERT)) + + + +#define IS_FL_GPTIM_IC_POLARITY(__VALUE__) (((__VALUE__) == FL_GPTIM_IC_POLARITY_NORMAL) \ + || ((__VALUE__) == FL_GPTIM_IC_POLARITY_INVERT)) + + + +#define IS_FL_GPTIM_IC_PSC(__VALUE__) (((__VALUE__) == FL_GPTIM_IC_PSC_DIV1) \ + || ((__VALUE__) == FL_GPTIM_IC_PSC_DIV2) \ + || ((__VALUE__) == FL_GPTIM_IC_PSC_DIV4) \ + || ((__VALUE__) == FL_GPTIM_IC_PSC_DIV8)) + +#define IS_FL_GPTIM_OC_POLARITY(__VALUE__) (((__VALUE__) == FL_GPTIM_OC_POLARITY_NORMAL) \ + || ((__VALUE__) == FL_GPTIM_OC_POLARITY_INVERT)) + +#define IS_FL_GPTIM_OC_MODE(__VALUE__) (((__VALUE__) == FL_GPTIM_OC_MODE_FROZEN) \ + || ((__VALUE__) == FL_GPTIM_OC_MODE_ACTIVE) \ + || ((__VALUE__) == FL_GPTIM_OC_MODE_INACTIVE) \ + || ((__VALUE__) == FL_GPTIM_OC_MODE_TOGGLE) \ + || ((__VALUE__) == FL_GPTIM_OC_MODE_FORCED_INACTIVE) \ + || ((__VALUE__) == FL_GPTIM_OC_MODE_FORCED_ACTIVE) \ + || ((__VALUE__) == FL_GPTIM_OC_MODE_PWM1) \ + || ((__VALUE__) == FL_GPTIM_OC_MODE_PWM2)) + +#define IS_FL_GPTIM_OC_FASTMODE(__VALUE__) (((__VALUE__) == FL_ENABLE) \ + || ((__VALUE__) == FL_DISABLE)) + +#define IS_FL_GPTIM_OC_PRELOAD(__VALUE__) (((__VALUE__) == FL_ENABLE) \ + || ((__VALUE__) == FL_DISABLE)) + +#define IS_FL_GPTIM_OC_ETR_CLEARN(__VALUE__) (((__VALUE__) == FL_ENABLE) \ + || ((__VALUE__) == FL_DISABLE)) + + +#define IS_FL_GPTIM_TRIGGER_DELAY(__VALUE__) (((__VALUE__) == FL_DISABLE) \ + || ((__VALUE__) == FL_ENABLE)) + + +#define IS_FL_GPTIM_IC_CAPTURE_STATE(__VALUE__) (((__VALUE__) == FL_DISABLE) \ + || ((__VALUE__) == FL_ENABLE)) +/** + * @} + */ + + +/* Private function prototypes -----------------------------------------------*/ +/** @defgroup TIM_FL_Private_Functions TIM Private Functions + * @{ + */ +static FL_ErrorStatus OCConfig(GPTIM_Type *TIMx, uint32_t Channel, FL_GPTIM_OC_InitTypeDef *TIM_OC_InitStruct); + +/** + * @} + */ + +/* Exported functions --------------------------------------------------------*/ +/** @addtogroup TIM_FL_EF_Init + * @{ + */ + +/** + * @brief 复位对应GPTIMx寄存器. + * @param GPTIMx + * @retval ErrorStatus枚举值: + * -FL_PASS 外设寄存器值恢复复位值 + * -FL_FAIL 未成功执行 + */ +FL_ErrorStatus FL_GPTIM_DeInit(GPTIM_Type *TIMx) +{ + FL_ErrorStatus result = FL_PASS; + /* Check the parameters */ + assert_param(IS_GPTIM_INSTANCE(TIMx)); + /* 使能外设复位 */ + FL_RMU_EnablePeripheralReset(RMU); + if(TIMx == GPTIM0) + { + /* 使能外设复位 */ + FL_RMU_EnableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_GPTIM0); + FL_RMU_DisableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_GPTIM0); + /* 关闭外设时钟 */ + FL_CMU_DisableGroup4BusClock(FL_CMU_GROUP4_BUSCLK_GPTIM0); + } + else + if(TIMx == GPTIM1) + { + /* 使能外设复位 */ + FL_RMU_EnableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_GPTIM1); + FL_RMU_DisableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_GPTIM1); + /* 关闭外设时钟 */ + FL_CMU_DisableGroup4BusClock(FL_CMU_GROUP4_BUSCLK_GPTIM1); + } + else + if(TIMx == GPTIM2) + { + /* 使能外设复位 */ + FL_RMU_EnableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_GPTIM2); + FL_RMU_DisableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_GPTIM2); + /* 关闭外设时钟 */ + FL_CMU_DisableGroup4BusClock(FL_CMU_GROUP4_BUSCLK_GPTIM2); + } + else + { + result = FL_FAIL; + } + /* 锁定外设复位 */ + FL_RMU_DisablePeripheralReset(RMU); + return result; +} +/** + * @brief 配置基本定时器时基单元（内部时钟源）. + * @param TIMx Timer Instance + * @param TIM_InitStruct 指向一个 @ref FL_GPTIM_InitTypeDef(时基配置结构体) + * @retval ErrorStatus枚举值 + * -FL_FAIL 配置过程发生错误 + * -FL_PASS 成功 + */ +FL_ErrorStatus FL_GPTIM_Init(GPTIM_Type *TIMx, FL_GPTIM_InitTypeDef *init) +{ + uint32_t i = 5; + /* 参数检查 */ + assert_param(IS_GPTIM_INSTANCE(TIMx)); + assert_param(IS_FL_GPTIM_COUNTERMODE(init->counterMode)); + assert_param(IS_FL_GPTIM_CLOCKDIVISION(init->clockDivision)); + /* 时钟总线使能配置 */ + if(TIMx == GPTIM0) + { + FL_CMU_EnableGroup4BusClock(FL_CMU_GROUP4_BUSCLK_GPTIM0); + } + else + if(TIMx == GPTIM1) + { + FL_CMU_EnableGroup4BusClock(FL_CMU_GROUP4_BUSCLK_GPTIM1); + } + else + { + FL_CMU_EnableGroup4BusClock(FL_CMU_GROUP4_BUSCLK_GPTIM2); + } + /* 计数器计数模式配置 */ + switch(init->counterMode) + { + /* 中心对称模式 */ + case FL_GPTIM_COUNTER_ALIGNED_CENTER_DOWN : + case FL_GPTIM_COUNTER_ALIGNED_CENTER_UP : + case FL_GPTIM_COUNTER_ALIGNED_CENTER_UP_DOWN: + FL_GPTIM_SetCounterAlignedMode(TIMx, init->counterMode); + break; + default: + /* 边沿模式 */ + FL_GPTIM_SetCounterDirection(TIMx, init->counterMode); + FL_GPTIM_SetCounterAlignedMode(TIMx, FL_GPTIM_COUNTER_ALIGNED_EDGE); + break; + } + /* 自动重装载值 */ + FL_GPTIM_WriteAutoReload(TIMx, init->autoReload); + /* 定时器分频系数与数字滤波器所使用的采样时钟分频比 */ + FL_GPTIM_SetClockDivision(TIMx, init->clockDivision); + /* 时钟分频 */ + FL_GPTIM_WritePrescaler(TIMx, init->prescaler); + /* 预装载配置 */ + if(init->autoReloadState == FL_ENABLE) + { + FL_GPTIM_EnableARRPreload(TIMx); + } + else + { + FL_GPTIM_DisableARRPreload(TIMx); + } + /* 手动触发更新事件，将配置值写入 */ + FL_GPTIM_GenerateUpdateEvent(TIMx); + while((!FL_GPTIM_IsActiveFlag_Update(TIMx))&&i) + { + i--; + } + FL_GPTIM_ClearFlag_Update(TIMx); + return FL_PASS; +} + +/** + * @brief 设置 FL_GPTIM_InitTypeDef 为默认配置 + * @param TIM_InitStruct 指向需要将值设置为默认配置的结构体 @ref FL_GPTIM_InitTypeDef 结构体 + * + * @retval None + */ +void FL_GPTIM_StructInit(FL_GPTIM_InitTypeDef *TIM_InitStruct) +{ + /* Set the default configuration */ + TIM_InitStruct->prescaler = (uint16_t)0x0000; + TIM_InitStruct->autoReloadState = FL_DISABLE; + TIM_InitStruct->counterMode = FL_GPTIM_COUNTER_DIR_UP; + TIM_InitStruct->autoReload = 0xFFFFU; + TIM_InitStruct->clockDivision = FL_GPTIM_CLK_DIVISION_DIV1; +} + +/** + * @brief 配置基本定时器外部时钟源模式，包括编码器模式. + * @param TIMx Timer Instance + * @param slave_init 指向一个 @ref FL_GPTIM_SlaveInitTypeDef 结构体 + * @retval ErrorStatus枚举值 + * -FL_FAIL 配置过程发生错误 + * -FL_PASS 成功 + */ +FL_ErrorStatus FL_GPTIM_SlaveMode_Init(GPTIM_Type *TIMx, FL_GPTIM_SlaveInitTypeDef *slave_init) +{ + /* 参数检查 */ + assert_param(IS_GPTIM_INSTANCE(TIMx)); + assert_param(IS_FL_GPTIM_SLAVE_MODE(slave_init->slaveMode)); + assert_param(IS_FL_GPTIM_TRIGGER_SRC(slave_init->triggerSrc)); + assert_param(IS_FL_GPTIM_TRIGGER_DELAY(slave_init->triggerDelay)); + /* 时钟总线使能配置 */ + if(TIMx == GPTIM0) + { + FL_CMU_EnableGroup4BusClock(FL_CMU_GROUP4_BUSCLK_GPTIM0); + } + else + if(TIMx == GPTIM1) + { + FL_CMU_EnableGroup4BusClock(FL_CMU_GROUP4_BUSCLK_GPTIM1); + } + else + { + FL_CMU_EnableGroup4BusClock(FL_CMU_GROUP4_BUSCLK_GPTIM2); + } + /* 触发延迟默认关闭 */ + FL_GPTIM_DisableMasterSlaveMode(TIMx); + /* 关闭从模式以能写入TS */ + FL_GPTIM_SetSlaveMode(TIMx, 0); + /* 从模式输入源选择 */ + FL_GPTIM_SetTriggerInput(TIMx, slave_init->triggerSrc); + /* ITRx 输入源选择 */ + if(slave_init->triggerSrc <= FL_GPTIM_TIM_TS_ITR3) + { + /* 内部触发ITRx源选择 */ + FL_GPTIM_SetITRInput(TIMx, (1U << (slave_init->triggerSrc >> GPTIM_SMCR_TS_Pos)), slave_init->ITRSourceGroup); + } + /* 从模式选择 */ + FL_GPTIM_SetSlaveMode(TIMx, slave_init->slaveMode); + /* 触发延迟默认关闭 */ + if(slave_init->triggerDelay == FL_ENABLE) + { + FL_GPTIM_EnableMasterSlaveMode(TIMx); + } + return FL_PASS; +} + +/** + * @brief 设置 FL_GPTIM_SlaveInitTypeDef 为默认配置 + * @param TIM_InitStruct 指向需要将值设置为默认配置的结构体 @ref FL_GPTIM_SlaveInitTypeDef 结构体 + * + * @retval None + */ +void FL_GPTIM_SlaveMode_StructInit(FL_GPTIM_SlaveInitTypeDef *slave_init) +{ + slave_init->ITRSourceGroup = 0; + slave_init->slaveMode = FL_GPTIM_SLAVE_MODE_PROHIBITED; + slave_init->triggerSrc = FL_GPTIM_TIM_TS_TI1FP1; + slave_init->triggerDelay = FL_DISABLE; +} +/** + * @brief 配置TIM触发输入捕获通道ETR. + * @param TIMx Timer Instance + * @param ETPolarity 极性 + * @param ETPrescaler 分频 + * @param ETR_Filter 滤波 + * @param etr_init 指向一个 @ref FL_GPTIM_ETR_InitTypeDef 结构体 + * @retval ErrorStatus枚举值 + * -FL_FAIL 配置过程发生错误 + * -FL_PASS 成功 + */ +FL_ErrorStatus FL_GPTIM_ETR_Init(GPTIM_Type *TIMx, FL_GPTIM_ETR_InitTypeDef *etr_init) +{ + assert_param(IS_FL_GPTIM_ETR_FILTER(etr_init->ETRFilter)); + assert_param(IS_FL_GPTIM_ETR_PSC(etr_init->ETRClockDivision)); + assert_param(IS_FL_GPTIM_ETR_POLARITY(etr_init->ETRPolarity)); + /* 时钟总线使能配置 */ + if(TIMx == GPTIM0) + { + FL_CMU_EnableGroup4BusClock(FL_CMU_GROUP4_BUSCLK_GPTIM0); + } + else + if(TIMx == GPTIM1) + { + FL_CMU_EnableGroup4BusClock(FL_CMU_GROUP4_BUSCLK_GPTIM1); + } + else + { + FL_CMU_EnableGroup4BusClock(FL_CMU_GROUP4_BUSCLK_GPTIM2); + } + /* 外部时钟极性 */ + FL_GPTIM_SetETRPolarity(TIMx, etr_init->ETRPolarity); + /* 外部时钟滤波 */ + FL_GPTIM_SetETRFilter(TIMx, etr_init->ETRFilter); + /* 外部时钟分频 */ + FL_GPTIM_SetETRPrescaler(TIMx, etr_init->ETRClockDivision); + if(etr_init->useExternalTrigger == FL_ENABLE) + { + FL_GPTIM_EnableExternalClock(TIMx); + } + else + { + FL_GPTIM_DisableExternalClock(TIMx); + } + return FL_PASS; +} + +/** + * @brief 设置 FL_GPTIM_ETRInitTypeDef 为默认配置 + * @param etr_init 指向需要将值设置为默认配置的结构体 @ref FL_GPTIM_ETR_InitTypeDef 结构体 + * + * @retval None + */ +void FL_GPTIM_ETR_StructInit(FL_GPTIM_ETR_InitTypeDef *etr_init) +{ + etr_init->useExternalTrigger = FL_DISABLE; + etr_init->ETRFilter = FL_GPTIM_ETR_FILTER_DIV1; + etr_init->ETRPolarity = FL_GPTIM_ETR_POLARITY_NORMAL; + etr_init->ETRClockDivision = FL_GPTIM_ETR_PSC_DIV1; +} + +/** + * @brief 配置TIM的比较输出通道. + * @param TIMx Timer Instance + * @param Channel This parameter can be one of the following values: + * @arg @ref FL_GPTIM_CHANNEL_0 + * @arg @ref FL_GPTIM_CHANNEL_1 + * @arg @ref FL_GPTIM_CHANNEL_2 + * @arg @ref FL_GPTIM_CHANNEL_3 + * @param oc_init 指向一个 @ref FL_GPTIM_OC_InitTypeDef 结构体 + * @retval ErrorStatus枚举值 + * -FL_FAIL 配置过程发生错误 + * -FL_PASS 成功 + */ +FL_ErrorStatus FL_GPTIM_OC_Init(GPTIM_Type *TIMx, uint32_t channel, FL_GPTIM_OC_InitTypeDef *oc_init) +{ + FL_ErrorStatus result = FL_PASS; + /* 参数检查 */ + assert_param(IS_GPTIM_INSTANCE(TIMx)); + assert_param(IS_FL_GPTIM_OC_MODE(oc_init->OCMode)); + assert_param(IS_FL_GPTIM_OC_PRELOAD(oc_init->OCPreload)); + assert_param(IS_FL_GPTIM_OC_POLARITY(oc_init->OCPolarity)); + assert_param(IS_FL_GPTIM_OC_FASTMODE(oc_init->OCFastMode)); + assert_param(IS_FL_GPTIM_OC_ETR_CLEARN(oc_init->OCETRFStatus)); + /* 通道关闭 */ + FL_GPTIM_OC_DisableChannel(TIMx, channel); + /* 通道极性 */ + FL_GPTIM_OC_SetChannelPolarity(TIMx, oc_init->OCPolarity, channel); + /* 捕获映射到输出通道 */ + FL_GPTIM_CC_SetChannelMode(TIMx, FL_GPTIM_CHANNEL_MODE_OUTPUT, channel); + /* 输出比较模式寄存器配置 */ + OCConfig(TIMx, channel, oc_init); + /* 通道使能 */ + FL_GPTIM_OC_DisableChannel(TIMx, channel); + /* 手动触发更新事件，将配置值写入 */ + FL_GPTIM_GenerateUpdateEvent(TIMx); + FL_GPTIM_ClearFlag_Update(TIMx); + return result; +} +/** + * @brief 配置 + * @param TIMx Timer Instance + * @param Channel This parameter can be one of the following values: + * @arg @ref FL_GPTIM_CHANNEL_0 + * @arg @ref FL_GPTIM_CHANNEL_1 + * @arg @ref FL_GPTIM_CHANNEL_2 + * @arg @ref FL_GPTIM_CHANNEL_3 + * @param oc_init 指向需要将值设置为默认配置的结构体 @ref FL_GPTIM_OC_InitTypeDef 结构体包含配置参数. + * @retval ErrorStatus枚举值 + * -FL_FAIL 配置过程发生错误 + * -FL_PASS 成功 + */ +static FL_ErrorStatus OCConfig(GPTIM_Type *TIMx, uint32_t channel, FL_GPTIM_OC_InitTypeDef *oc_init) +{ + FL_ErrorStatus result = FL_PASS; + /* 配置比较输出通道模式 */ + FL_GPTIM_OC_SetMode(TIMx, oc_init->OCMode, channel); + /* 配置ETRF清零使能 */ + if(oc_init->OCETRFStatus == FL_ENABLE) + { + FL_GPTIM_OC_EnableClear(TIMx, channel); + } + /* 比较输出通道快速模式 */ + if(oc_init->OCFastMode == FL_ENABLE) + { + FL_GPTIM_OC_EnableFastMode(TIMx, channel); + } + /* 比较输出通道缓冲模式 */ + if(oc_init->OCPreload == FL_ENABLE) + { + FL_GPTIM_OC_EnablePreload(TIMx, channel); + } + /* 设置比较值 */ + switch(channel) + { + case FL_GPTIM_CHANNEL_1: + FL_GPTIM_WriteCompareCH1(TIMx, oc_init->compareValue); + break; + case FL_GPTIM_CHANNEL_2: + FL_GPTIM_WriteCompareCH2(TIMx, oc_init->compareValue); + break; + case FL_GPTIM_CHANNEL_3: + FL_GPTIM_WriteCompareCH3(TIMx, oc_init->compareValue); + break; + case FL_GPTIM_CHANNEL_4: + FL_GPTIM_WriteCompareCH4(TIMx, oc_init->compareValue); + break; + default : + result = FL_FAIL; + break; + } + return result; +} +/** + * @brief 设置 FL_GPTIM_OC_InitTypeDef 为默认配置 + * @param oc_init 指向需要将值设置为默认配置的结构体 @ref FL_GPTIM_OC_InitTypeDef 结构体 + * + * @retval None + */ +void FL_GPTIM_OC_StructInit(FL_GPTIM_OC_InitTypeDef *oc_init) +{ + /* Set the default configuration */ + oc_init->OCMode = FL_GPTIM_OC_MODE_FROZEN; + oc_init->OCETRFStatus = FL_DISABLE; + oc_init->OCFastMode = FL_DISABLE; + oc_init->compareValue = 0x00000000U; + oc_init->OCPolarity = FL_GPTIM_OC_POLARITY_NORMAL; + oc_init->OCPreload = FL_DISABLE; +} +/** + * @brief 配置TIM的输入捕获通道. + * @param TIMx Timer Instance + * @param Channel This parameter can be one of the following values: + * @arg @ref FL_GPTIM_CHANNEL_0 + * @arg @ref FL_GPTIM_CHANNEL_1 + * @arg @ref FL_GPTIM_CHANNEL_2 + * @arg @ref FL_GPTIM_CHANNEL_3 + * @param ic_init 指向一个 @ref FL_GPTIM_IC_InitTypeDef 结构体 + * @retval ErrorStatus枚举值 + * -FL_FAIL 配置过程发生错误 + * -FL_PASS 成功 + */ +FL_ErrorStatus FL_GPTIM_IC_Init(GPTIM_Type *TIMx, uint32_t channel, FL_GPTIM_IC_InitTypeDef *ic_init) +{ + FL_ErrorStatus result = FL_PASS; + /* 参数检查 */ + assert_param(IS_FL_GPTIM_CHANNEL(channel)); + assert_param(IS_FL_GPTIM_IC_CAPTURE_STATE(ic_init->captureState)); + assert_param(IS_FL_GPTIM_IC_POLARITY(ic_init->ICPolarity)); + assert_param(IS_FL_GPTIM_CHANNEL_MODE(ic_init->ICActiveInput)); + assert_param(IS_FL_GPTIM_IC_PSC(ic_init->ICPrescaler)); + assert_param(IS_FL_GPTIM_IC_FILTER(ic_init->ICFilter)); + /* 时钟总线使能配置 */ + if(TIMx == GPTIM0) + { + FL_CMU_EnableGroup4BusClock(FL_CMU_GROUP4_BUSCLK_GPTIM0); + } + else + if(TIMx == GPTIM1) + { + FL_CMU_EnableGroup4BusClock(FL_CMU_GROUP4_BUSCLK_GPTIM1); + } + else + { + FL_CMU_EnableGroup4BusClock(FL_CMU_GROUP4_BUSCLK_GPTIM2); + } + /* 通道关闭 */ + FL_GPTIM_IC_DisableChannel(TIMx, channel); + /*捕获极性 */ + FL_GPTIM_IC_SetChannelPolarity(TIMx, ic_init->ICPolarity, channel); + /* 捕获映射通道 */ + FL_GPTIM_CC_SetChannelMode(TIMx, ic_init->ICActiveInput, channel); + /* 捕获预分频 */ + FL_GPTIM_IC_SetPrescaler(TIMx, ic_init->ICPrescaler, channel); + /* 捕获滤波器 */ + FL_GPTIM_IC_SetFilter(TIMx, ic_init->ICFilter, channel); + if(ic_init->captureState == FL_ENABLE) + { + FL_GPTIM_IC_EnableChannel(TIMx, channel); + } + return result; +} + +/** + * @brief 设置 FL_GPTIM_IC_InitTypeDef 为默认配置 + * @param ic_init 指向需要将值设置为默认配置的结构体 @ref FL_GPTIM_IC_InitTypeDef 结构体 + * + * @retval None + */ +void FL_GPTIM_IC_StructInit(FL_GPTIM_IC_InitTypeDef *ic_init) +{ + /* Set the default configuration */ + ic_init->ICPolarity = FL_GPTIM_IC_POLARITY_NORMAL; + ic_init->ICActiveInput = FL_GPTIM_CHANNEL_MODE_INPUT_NORMAL; + ic_init->ICPrescaler = FL_GPTIM_IC_PSC_DIV1; + ic_init->ICFilter = FL_GPTIM_IC_FILTER_DIV1; + ic_init->captureState = FL_DISABLE; +} + +/** + * @} + */ + +#endif /* FL_GPTIM_DRIVER_ENABLED */ + +/** + * @} + */ + +/** + * @} + */ + +/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/ diff --git a/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_i2c.c b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_i2c.c new file mode 100644 index 0000000..b7e1dbd --- /dev/null +++ b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_i2c.c @@ -0,0 +1,274 @@ + /** + ******************************************************************************************************* + * @file fm33lg0xx_fl_i2c.c + * @author FMSH Application Team + * @brief Src file of I2C FL Module + ******************************************************************************************************* + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + + +/* Includes ------------------------------------------------------------------*/ +#include "fm33lg0xx_fl.h" + +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @addtogroup I2C + * @{ + */ + +#ifdef FL_I2C_DRIVER_ENABLED + +/* Private macros ------------------------------------------------------------*/ +/** @addtogroup I2C_FL_Private_Macros + * @{ + */ + +#define IS_FL_I2C_INSTANCE(INSTANCE) ((INSTANCE) == I2C) + +#define IS_FL_I2C_BAUDRATE(__VALUE__) (((__VALUE__) > 0 )&&((__VALUE__) <= 1000000)) + +#define IS_FL_I2C_CLOCKSRC(__VALUE__) (((__VALUE__) == FL_CMU_I2C_CLK_SOURCE_APBCLK )||\ + ((__VALUE__) == FL_CMU_I2C_CLK_SOURCE_RCHF)||\ + ((__VALUE__) == FL_CMU_I2C_CLK_SOURCE_SYSCLK)||\ + ((__VALUE__) == FL_CMU_I2C_CLK_SOURCE_RCLF)) + +#define IS_FL_I2C_MSATER_TIMEOUT(__VALUE__) (((__VALUE__) == FL_IWDT_PERIOD_125MS)||\ + ((__VALUE__) == FL_IWDT_PERIOD_16000MS)) + + +#define IS_FL_I2C_SLAVE_ACK(__VALUE__) (((__VALUE__) == FL_ENABLE)||\ + ((__VALUE__) == FL_DISABLE)) + + + +#define IS_FL_I2C_ANGLOGFILTER(__VALUE__) (((__VALUE__) == FL_ENABLE)||\ + ((__VALUE__) == FL_DISABLE)) + +#define IS_FL_I2C_ADDRSIZE10BIT(__VALUE__) (((__VALUE__) == FL_ENABLE)||\ + ((__VALUE__) == FL_DISABLE)) + +#define IS_FL_I2C_SLAVE_SCLSEN(__VALUE__) (((__VALUE__) == FL_ENABLE)||\ + ((__VALUE__) == FL_DISABLE)) + +/** + * @} + */ + +/* Exported functions --------------------------------------------------------*/ +/** @addtogroup I2C_FL_EF_Init + * @{ + */ + +/** + * @brief 复位I2C外设. + * @param I2Cx 外设入口地址 + * @retval 错误状态，可能值： + * -FL_PASS 外设寄存器值恢复复位值 + * -FL_FAIL 未成功执行 + */ +FL_ErrorStatus FL_I2C_DeInit(I2C_Type *I2Cx) +{ + assert_param(IS_FL_I2C_INSTANCE(I2Cx)); + /* 使能外设复位 */ + FL_RMU_EnablePeripheralReset(RMU); + /* 复位I2C外设寄存器 */ + FL_RMU_EnableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_I2C); + FL_RMU_DisableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_I2C); + /* 关闭外设总线始时钟和工作时钟 */ + FL_CMU_DisableGroup3BusClock(FL_CMU_GROUP3_BUSCLK_I2C); + FL_CMU_DisableGroup3OperationClock(FL_CMU_GROUP3_OPCLK_I2C); + /* 锁定外设复位 */ + FL_RMU_DisablePeripheralReset(RMU); + return FL_PASS; +} + +/** + * @brief 配置I2C主机模式. + * @param I2Cx 外设入口地址 + * @param I2C_InitStruct 指向 @ref FL_I2C_MasterMode_InitTypeDef 结构体的指针 + * @retval 错误状态，可能值： + * -FL_PASS 配置成功 + * -FL_FAIL 配置过程发生错误 + */ +FL_ErrorStatus FL_I2C_MasterMode_Init(I2C_Type *I2Cx, FL_I2C_MasterMode_InitTypeDef *I2C_InitStruct) +{ + uint32_t I2C_Clk_Freq = 0, BRG = 0; + assert_param(IS_FL_I2C_INSTANCE(I2Cx)); + assert_param(IS_FL_I2C_CLOCKSRC(I2C_InitStruct->clockSource)); + assert_param(IS_FL_I2C_BAUDRATE(I2C_InitStruct->baudRate)); + /* 外设总线时钟和工作时钟开启 */ + FL_CMU_EnableGroup3BusClock(FL_CMU_GROUP3_BUSCLK_I2C); + FL_CMU_EnableGroup3OperationClock(FL_CMU_GROUP3_OPCLK_I2C); + /* 选择I2C工作时钟源 */ + FL_CMU_SetI2CClockSource(I2C_InitStruct->clockSource); + /* 获取时钟源速度 */ + switch(I2C_InitStruct->clockSource) + { + case FL_CMU_I2C_CLK_SOURCE_APBCLK: + I2C_Clk_Freq = FL_CMU_GetAPBClockFreq(); + break; + case FL_CMU_I2C_CLK_SOURCE_RCHF: + I2C_Clk_Freq = FL_CMU_GetRCHFClockFreq(); + break; + case FL_CMU_I2C_CLK_SOURCE_SYSCLK: + I2C_Clk_Freq = FL_CMU_GetSystemClockFreq(); + break; + case FL_CMU_I2C_CLK_SOURCE_RCLF: + I2C_Clk_Freq = FL_CMU_GetRCLFClockFreq(); + break; + default: + break; + } + /* 根据不同的时钟源速度计算出配置速率需要的寄存器值并配置相关寄存器 */ + BRG = (uint32_t)(I2C_Clk_Freq / (2 * I2C_InitStruct->baudRate)) - 1; + FL_I2C_Master_WriteSCLHighWidth(I2Cx, BRG); + FL_I2C_Master_WriteSCLLowWidth(I2Cx, BRG); + FL_I2C_Master_WriteSDAHoldTime(I2Cx, (uint32_t)((BRG&0x1FF) / 2.0 + 0.5)); + /* 使能外设 */ + FL_I2C_Master_Enable(I2C); + return FL_PASS; +} + + + +/** + * @brief 将 @ref FL_I2C_MasterMode_InitTypeDef 结构体初始化为默认配置 + * @param I2C_InitStruct 指向 @ref FL_I2C_MasterMode_InitTypeDef 结构体的指针 + * + * @retval None + */ + +void FL_I2C_MasterMode_StructInit(FL_I2C_MasterMode_InitTypeDef *I2C_InitStruct) +{ + I2C_InitStruct->clockSource = FL_CMU_I2C_CLK_SOURCE_RCHF; + I2C_InitStruct->baudRate = 40000; +} + +/** + * @brief 配置I2C从机模式. + * @param I2Cx 外设入口地址 + * @param I2C_InitStruct 指向 @ref FL_I2C_SlaveMode_InitTypeDef 结构体的指针. + * @note 作为从机时的从机地址应参考手册推荐具体设置 + * @retval 错误状态，可能值： + * -FL_PASS 配置成功 + * -FL_FAIL 配置过程发生错误 + */ +FL_ErrorStatus FL_I2C_SlaveMode_Init(I2C_Type *I2Cx, FL_I2C_SlaveMode_InitTypeDef *I2C_InitStruct) +{ + assert_param(IS_FL_I2C_INSTANCE(I2Cx)); + assert_param(IS_FL_I2C_SLAVE_ACK(I2C_InitStruct->ACK)); + assert_param(IS_FL_I2C_ADDRSIZE10BIT(I2C_InitStruct->ownAddrSize10bit)); + assert_param(IS_FL_I2C_SLAVE_SCLSEN(I2C_InitStruct->SCLSEN)); + /* 外设总线时钟开启 注：不需要工作时钟*/ + FL_CMU_EnableGroup3BusClock(FL_CMU_GROUP3_BUSCLK_I2C); + /* 使能SDA输出延迟 注：推荐开启*/ + FL_I2C_Slave_EnableSDAStretching(I2Cx); + /* 使能SCL模拟滤波使能 注：推荐开启*/ + FL_I2C_Slave_EnableSCLAnalogFilter(I2Cx); + /* 从机ACK */ + if(I2C_InitStruct->ACK == FL_ENABLE) + { + FL_I2C_Slave_EnableACK(I2Cx); + } + else + { + FL_I2C_Slave_DisableACK(I2Cx); + } + /* 从机地址宽度 和地址配置 */ + if(I2C_InitStruct->ownAddrSize10bit == FL_ENABLE) + { + FL_I2C_Slave_Enable10BitAddress(I2Cx); + FL_I2C_Slave_WriteSlaveAddress(I2Cx, I2C_InitStruct->ownAddr); + } + else + { + FL_I2C_Slave_Disable10BitAddress(I2Cx); + FL_I2C_Slave_WriteSlaveAddress(I2Cx, I2C_InitStruct->ownAddr & 0x7F); + } + /* 从机时钟延展使能 */ + if(I2C_InitStruct->SCLSEN == FL_ENABLE) + { + FL_I2C_Slave_EnableSCLStretching(I2Cx); + } + else + { + FL_I2C_Slave_DisableSCLStretching(I2Cx); + } + /* 外设开启 */ + FL_I2C_Slave_Enable(I2Cx); + return FL_PASS; +} + +/** + * @brief 将 @ref FL_I2C_SlaveMode_InitTypeDef 结构体初始化为默认配置 + * @param I2C_InitStruct 指向 @ref FL_I2C_SlaveMode_InitTypeDef 结构体的指针 + * + * @retval None + */ + +void FL_I2C_SlaveMode_StructInit(FL_I2C_SlaveMode_InitTypeDef *I2C_InitStruct) +{ + I2C_InitStruct->ACK = FL_ENABLE; + I2C_InitStruct->ownAddr = 0x55; + I2C_InitStruct->ownAddrSize10bit = FL_DISABLE; + I2C_InitStruct->SCLSEN = FL_DISABLE; +} + +/** + * @} + */ + +#endif /* FL_I2C_DRIVER_ENABLED */ + +/** + * @} + */ + +/** + * @} + */ + +/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/ + + + + diff --git a/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_iwdt.c b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_iwdt.c new file mode 100644 index 0000000..e828163 --- /dev/null +++ b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_iwdt.c @@ -0,0 +1,181 @@ + /** + **************************************************************************************************** + * @file fm33lg0xx_fl_iwdt.c + * @author FMSH Application Team + * @brief Src file of IWDT FL Module + **************************************************************************************************** + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + +/* Includes ------------------------------------------------------------------*/ +#include "fm33lg0xx_fl.h" + +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @addtogroup IWDT + * @{ + */ + +#ifdef FL_IWDT_DRIVER_ENABLED + +/* Private macros ------------------------------------------------------------*/ +/** @addtogroup IWDT_FL_Private_Macros + * @{ + */ +#define IS_IWDT_INSTANCE(INTANCE) ((INTANCE) == IWDT) + +#define IS_FL_IWDT_WINDOWSVEL(__VALUE__) ((__VALUE__) < 0xFFF) + +#define IS_FL_IWDT_OVERFLOWPERIOD(__VALUE__) (((__VALUE__) == FL_IWDT_PERIOD_125MS)||\ + ((__VALUE__) == FL_IWDT_PERIOD_250MS)||\ + ((__VALUE__) == FL_IWDT_PERIOD_500MS)||\ + ((__VALUE__) == FL_IWDT_PERIOD_1000MS)||\ + ((__VALUE__) == FL_IWDT_PERIOD_2000MS)||\ + ((__VALUE__) == FL_IWDT_PERIOD_4000MS)||\ + ((__VALUE__) == FL_IWDT_PERIOD_8000MS)||\ + ((__VALUE__) == FL_IWDT_PERIOD_16000MS)) +/** + * @} + */ + +/* Exported functions --------------------------------------------------------*/ +/** @addtogroup IWDT_FL_EF_Init + * @{ + */ + +/** + * @brief 复位IWDT外设 + * + * @note 此函数只能用于配制前复位外设，因为IWDT开启后不可以关闭 + * + * @param IWDTx 外设入口地址 + * + * @retval FL_ErrorStatus枚举值 + * -FL_PASS 配置成功 + * -FL_FAIL 配置过程发生错误 + */ +FL_ErrorStatus FL_IWDT_DeInit(IWDT_Type *IWDTx) +{ + assert_param(IS_IWDT_INSTANCE(IWDTx)); + return FL_PASS; +} +/** + * @brief 根据 IWDT_InitStruct 初始化对应外设的寄存器值. + * + * @note IWTD使能后将无法关闭，直到下一次芯片复位 + * + * @param IWDTx 外设入口地址 + * @param IWDT_InitStruct 是 @ref FL_IWDT_InitTypeDef结构体，它包含指定IWDT外设的配置信息 + * + * @retval ErrorStatus枚举值 + * -FL_PASS 配置成功 + * -FL_FAIL 配置过程发生错误 + */ +FL_ErrorStatus FL_IWDT_Init(IWDT_Type *IWDTx, FL_IWDT_InitTypeDef *IWDT_InitStruct) +{ + uint32_t i = 0; + FL_ErrorStatus status = FL_PASS; + uint32_t iwdtCounter = 0; + /* 入口参数检查 */ + assert_param(IS_IWDT_INSTANCE(IWDTx)); + assert_param(IS_FL_IWDT_WINDOWSVEL(IWDT_InitStruct->iwdtWindows)); + assert_param(IS_FL_IWDT_OVERFLOWPERIOD(IWDT_InitStruct->overflowPeriod)); + /* 开启总线时钟 */ + FL_CMU_EnableGroup1BusClock(FL_CMU_GROUP1_BUSCLK_IWDT); + /* 启动看门狗 */ + FL_IWDT_ReloadCounter(IWDTx); + /* 配置独立看门狗溢出周期 */ + FL_IWDT_SetPeriod(IWDTx, IWDT_InitStruct->overflowPeriod); + + iwdtCounter = FL_IWDT_ReadCounter(IWDTx); + /* 窗口功能延时 */ + if(IWDT_InitStruct->iwdtWindows != 0) + { + if(iwdtCounter == 0) + { + while((FL_IWDT_ReadCounter(IWDTx) != 1) && (i++ < 500)) + { + + } + } + else + { + while((FL_IWDT_ReadCounter(IWDTx) != 0) && (i++ < 500)) + { + + } + } + } + + /* 配置独立看门狗清狗窗口*/ + FL_IWDT_WriteWindow(IWDTx, IWDT_InitStruct->iwdtWindows); + return status; +} +/** + * @brief 设置 IWDT_InitStruct 为默认配置 + * + * @param IWDT_InitStruct 指向需要将值设置为默认配置的结构体 @ref FL_IWDT_InitTypeDef 结构体 + * + * @retval None + */ +void FL_IWDT_StructInit(FL_IWDT_InitTypeDef *IWDT_InitStruct) +{ + /* 默认不使用窗口 */ + IWDT_InitStruct->iwdtWindows = 0; + /*最长溢出时间*/ + IWDT_InitStruct->overflowPeriod = FL_IWDT_PERIOD_500MS; +} + +/** + * @} + */ + +#endif /* FL_IWDT_DRIVER_ENABLED */ + +/** + * @} + */ + +/** + * @} + */ + +/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/ diff --git a/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_lcd.c b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_lcd.c new file mode 100644 index 0000000..0f5af93 --- /dev/null +++ b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_lcd.c @@ -0,0 +1,385 @@ + /** + ******************************************************************************************************* + * @file fm33lg0xx_fl_lcd.c + * @author FMSH Application Team + * @brief Src file of LCD FL Module + ******************************************************************************************************* + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ +/** + ******************************************************************************************************* + * @file fm33lg0xx_fl_lcd.c + * @author FMSH Application Team + * @brief Src file of LCD FL Module + ******************************************************************************************************* + * @attention + * + * Copyright (c) [2021] [Fudan Microelectronics] + * THIS SOFTWARE is licensed under Mulan PSL v2. + * You can use this software according to the terms and conditions of the Mulan PSL v2. + * You may obtain a copy of Mulan PSL v2 at: + * http://license.coscl.org.cn/MulanPSL2 + * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, + * EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, + * MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE. + * See the Mulan PSL v2 for more details. + * + ******************************************************************************************************* + */ +/* Includes ------------------------------------------------------------------*/ +#include "fm33lg0xx_fl.h" + +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @addtogroup LCD + * @{ + */ + +#ifdef FL_LCD_DRIVER_ENABLED + +/* Private macros ------------------------------------------------------------*/ +/** @addtogroup LCD_FL_Private_Macros + * @{ + */ + +#define IS_FL_LCD_INSTANCE(INTENCE) ((INTENCE) == LCD) + +#define IS_FL_LCD_BIASCURRENT(__VALUE__) (((__VALUE__) == (FL_LCD_BIAS_CURRENT_VERYHIGH))||\ + ((__VALUE__) == (FL_LCD_BIAS_CURRENT_HIGH))||\ + ((__VALUE__) == (FL_LCD_BIAS_CURRENT_MEDIUM))||\ + ((__VALUE__) == (FL_LCD_BIAS_CURRENT_LOW))) + +#define IS_FL_LCD_ENMODE(__VALUE__) ((__VALUE__) == (FL_LCD_DRIVER_MODE_INNER_RESISTER)||\ + ((__VALUE__) == (FL_LCD_DRIVER_MODE_OUTER_CAPACITY))) + +#define IS_FL_LCD_BIASVOLTAGE(__VALUE__) (((__VALUE__) == (FL_LCD_BIAS_VOLTAGE_LEVEL0))||\ + ((__VALUE__) == (FL_LCD_BIAS_VOLTAGE_LEVEL1))||\ + ((__VALUE__) == (FL_LCD_BIAS_VOLTAGE_LEVEL2))||\ + ((__VALUE__) == (FL_LCD_BIAS_VOLTAGE_LEVEL3))||\ + ((__VALUE__) == (FL_LCD_BIAS_VOLTAGE_LEVEL4))||\ + ((__VALUE__) == (FL_LCD_BIAS_VOLTAGE_LEVEL5))||\ + ((__VALUE__) == (FL_LCD_BIAS_VOLTAGE_LEVEL6))||\ + ((__VALUE__) == (FL_LCD_BIAS_VOLTAGE_LEVEL7))||\ + ((__VALUE__) == (FL_LCD_BIAS_VOLTAGE_LEVEL8))||\ + ((__VALUE__) == (FL_LCD_BIAS_VOLTAGE_LEVEL9))||\ + ((__VALUE__) == (FL_LCD_BIAS_VOLTAGE_LEVEL10))||\ + ((__VALUE__) == (FL_LCD_BIAS_VOLTAGE_LEVEL11))||\ + ((__VALUE__) == (FL_LCD_BIAS_VOLTAGE_LEVEL12))||\ + ((__VALUE__) == (FL_LCD_BIAS_VOLTAGE_LEVEL13))||\ + ((__VALUE__) == (FL_LCD_BIAS_VOLTAGE_LEVEL14))||\ + ((__VALUE__) == (FL_LCD_BIAS_VOLTAGE_LEVEL15))) + +#define IS_FL_LCD_BIASMD(__VALUE__) (((__VALUE__) == (FL_LCD_BIAS_MODE_4BIAS))||\ + ((__VALUE__) == (FL_LCD_BIAS_MODE_3BIAS))) + +#define IS_FL_LCD_BWFT(__VALUE__) (((__VALUE__) == (FL_LCD_WAVEFORM_TYPEA))||\ + ((__VALUE__) == (FL_LCD_WAVEFORM_TYPEB))) + +#define IS_FL_LCD_LMUX(__VALUE__) (((__VALUE__) == (FL_LCD_COM_NUM_4COM))||\ + ((__VALUE__) == (FL_LCD_COM_NUM_6COM))||\ + ((__VALUE__) == (FL_LCD_COM_NUM_8COM))) + + +/** + * @} + */ + +/* Exported functions --------------------------------------------------------*/ +/** @addtogroup LCD_FL_EF_Init + * @{ + */ + +/** + * @brief 获取LCD工作频率寄存器. + * @param wavetype 波形 + * @param freq 工作频率 + * @retval 工作频率寄存器值 + */ +static uint32_t FL_LCD_DisplayFreq(uint32_t wavetype,uint32_t freq) +{ + uint32_t displayFreq = 32u; + if((freq > 0) && (freq <= 100)) + { + if(wavetype == FL_LCD_WAVEFORM_TYPEA) + { + switch(FL_LCD_GetCOMNumber(LCD)) + { + case FL_LCD_COM_NUM_4COM: + displayFreq = (32768 / (4 * freq * 2) ); + break; + case FL_LCD_COM_NUM_6COM: + displayFreq = (32768 / (6 * freq * 2) ); + break; + case FL_LCD_COM_NUM_8COM: + displayFreq = (32768 / (8 * freq * 2) ); + break; + default: + displayFreq = (32768/ (4 * freq * 2) ); + break; + } + } + else + { + switch(FL_LCD_GetCOMNumber(LCD)) + { + case FL_LCD_COM_NUM_4COM: + displayFreq = (32768 / (4 * freq * 4) ); + break; + case FL_LCD_COM_NUM_6COM: + displayFreq = (32768 / (6 * freq * 4) ); + break; + case FL_LCD_COM_NUM_8COM: + displayFreq = (32768 / (8 * freq * 4) ); + break; + default: + displayFreq = (32768/ (4 * freq * 4) ); + break; + } + } + + } + displayFreq = displayFreq & 0x000000ffu; + return displayFreq; +} + +/** + * @brief 获取LCD闪烁时间寄存器值 + * @param timevalue 闪烁时间 + * @retval 闪烁时间寄存器 + */ +static uint32_t FL_LCD_FlickTime(uint32_t timevalue) +{ + uint32_t stepTime; + uint32_t TimeResult = 0u; + switch(FL_LCD_GetCOMNumber(LCD)) + { + case FL_LCD_COM_NUM_4COM: + stepTime = (4 * FL_LCD_ReadDisplayFrequency(LCD) * 2 * 16 * 1000) / 32768; + break; + case FL_LCD_COM_NUM_6COM: + stepTime = (6 * FL_LCD_ReadDisplayFrequency(LCD) * 2 * 16 * 1000) / 32768; + break; + case FL_LCD_COM_NUM_8COM: + stepTime = (8 * FL_LCD_ReadDisplayFrequency(LCD) * 2 * 16 * 1000) / 32768; + break; + default: + stepTime = (4 * FL_LCD_ReadDisplayFrequency(LCD) * 2 * 16 * 1000) / 32768; + break; + } + TimeResult = timevalue / stepTime; + return TimeResult; +} + +/** + * @brief 复位对应LCD寄存器. + + * @param LCDx + * @retval ErrorStatus枚举值: + * -FL_PASS 外设寄存器值恢复复位值 + * -FL_FAIL 未成功执行 + */ +FL_ErrorStatus FL_LCD_DeInit(LCD_Type *LCDx) +{ + assert_param(IS_FL_LCD_INSTANCE(LCDx)); + /* 使能外设复位 */ + FL_RMU_EnablePeripheralReset(RMU); + /* 复位LCD外设寄存器 */ + FL_RMU_EnableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_LCD); + FL_RMU_DisableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_LCD); + /* 关闭外设总线始时钟和工作时钟 */ + FL_CMU_DisableGroup2BusClock(FL_CMU_GROUP2_BUSCLK_LCD); + /* 锁定外设复位 */ + FL_RMU_DisablePeripheralReset(RMU); + return FL_PASS; +} + +/** + * @brief 根据 LCD_InitStruct 的配置信息初始化对应外设入口地址的寄存器值. + * @param LCDx LCDx + * @param LCD_InitStruct 指向一个 @ref FL_LCD_InitTypeDef 结构体 + * 其中包含了外设的相关配置信息. + * @retval ErrorStatus枚举值 + * -FL_FAIL 配置过程发生错误 + * -FL_PASS LCD配置成功 + */ +FL_ErrorStatus FL_LCD_Init(LCD_Type *LCDx, FL_LCD_InitTypeDef *initStruct) +{ + assert_param(IS_FL_LCD_INSTANCE(LCDx)); + assert_param(IS_FL_LCD_BIASCURRENT(initStruct->biasCurrent)); + assert_param(IS_FL_LCD_ENMODE(initStruct->mode)); + assert_param(IS_FL_LCD_BIASVOLTAGE(initStruct->biasVoltage)); + assert_param(IS_FL_LCD_BIASMD(initStruct->biasMode)); + assert_param(IS_FL_LCD_BWFT(initStruct->waveform)); + assert_param(IS_FL_LCD_LMUX(initStruct->COMxNum)); + /* 外设总线始时钟 */ + FL_CMU_EnableGroup2BusClock(FL_CMU_GROUP2_BUSCLK_LCD); + /* 电流源电流控制 */ + FL_LCD_SetBiasCurrent(LCD, initStruct->biasCurrent); + /* LCD驱动模式 */ + FL_LCD_SetDriverMode(LCD, initStruct->mode); + /* 偏执电压设置 */ + FL_LCD_SetBiasVoltage(LCD, initStruct->biasVoltage); + /* 偏执模式选择 */ + FL_LCD_SetBiasMode(LCD, initStruct->biasMode); + /* 驱动波形设置 */ + FL_LCD_SetWaveform(LCD, initStruct->waveform); + /* COMx口选择 */ + FL_LCD_SetCOMNumber(LCD, initStruct->COMxNum); + /* 设置工作频率 */ + FL_LCD_WriteDisplayFrequency(LCD, FL_LCD_DisplayFreq(initStruct->waveform,initStruct->displayFreq)); + /* 设置闪烁频率 */ + FL_LCD_WriteDisplayOnTime(LCD, FL_LCD_FlickTime(initStruct->flickOnTime)); + FL_LCD_WriteDisplayOffTime(LCD, FL_LCD_FlickTime(initStruct->flickOffTime)); + /* 使能外设 */ + FL_LCD_Enable(LCD); + return FL_PASS; +} + +/** + * @brief 设置 LCD_InitStruct 为默认配置 + * @param LCD_InitStruct 指向需要将值设置为默认配置的结构体 @ref FL_LCD_InitTypeDef 结构体 + * + * @retval None + */ +void FL_LCD_StructInit(FL_LCD_InitTypeDef *initStruct) +{ + initStruct->biasCurrent = FL_LCD_BIAS_CURRENT_HIGH; + initStruct->mode = FL_LCD_DRIVER_MODE_INNER_RESISTER; + initStruct->biasVoltage = FL_LCD_BIAS_VOLTAGE_LEVEL10; + initStruct->biasMode = FL_LCD_BIAS_MODE_3BIAS; + initStruct->waveform = FL_LCD_WAVEFORM_TYPEA; + initStruct->COMxNum = FL_LCD_COM_NUM_6COM; + initStruct->displayFreq = 42; + initStruct->flickOnTime = 0; + initStruct->flickOffTime = 0; +} + +/** + * @brief 设置 LCD 4COM显示字端 + * @param display 指向显示信息的缓存区域，可直接指向LCD的DATAx寄存器。 + * @param com 待显示字段所在COM。范围0-4。 + * @param seg 待显示字段所在SEG。范围0-43。 + * @param state 待显示字段状态。0，熄灭；否则，点亮。 + * + * @retval None + */ +void FL_LCD_4COMDisplay(uint32_t *display, uint8_t com, uint8_t seg, uint8_t state) +{ + uint8_t temp; + if(state != 0) + { + state = 1; + } + if(seg > 31) + { + temp = (seg - 32) + com * 12; + com = 4 + temp / 32; + seg = temp % 32; + } + MODIFY_REG(display[com], (uint32_t)(0x1U << seg), (uint32_t)(state << seg)); +} + +/** + * @brief 设置 LCD 6COM显示字端 + * @param display 指向显示信息的缓存区域，可直接指向LCD的DATAx寄存器。 + * @param com 待显示字段所在COM。范围0-6。 + * @param seg 待显示字段所在SEG。范围0-41。 + * @param state 待显示字段状态。0，熄灭；否则，点亮。 + * + * @retval None + */ +void FL_LCD_6COMDisplay(uint32_t *display, uint8_t com, uint8_t seg, uint8_t state) +{ + uint8_t temp; + if(state != 0) + { + state = 1; + } + if(seg > 31) + { + temp = (seg - 32) + com * 10; + com = 6 + temp / 32; + seg = temp % 32; + } + MODIFY_REG(display[com], (uint32_t)(0x1 << seg), (uint32_t)(state << seg)); +} + +/** + * @brief 设置 LCD 8COM显示字端 + * @param display 指向显示信息的缓存区域，可直接指向LCD的DATAx寄存器。 + * @param com 待显示字段所在COM。范围0-8。 + * @param seg 待显示字段所在SEG。范围0-39。 + * @param state 待显示字段状态。0，熄灭；否则，点亮。 + * + * @retval None + */ +void FL_LCD_8COMDisplay(uint32_t *display, uint8_t com, uint8_t seg, uint8_t state) +{ + uint8_t temp; + if(state != 0) + { + state = 1; + } + if(seg > 31) + { + temp = (seg - 32) + com * 8; + com = 8 + temp / 32; + seg = temp % 32; + } + MODIFY_REG(display[com], (uint32_t)(0x1 << seg), (uint32_t)(state << seg)); +} + +/** + * @} + */ + +#endif /* FL_LCD_DRIVER_ENABLED */ + +/** + * @} + */ + +/** + * @} + */ + +/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/ + diff --git a/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_lptim16.c b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_lptim16.c new file mode 100644 index 0000000..cb77fb2 --- /dev/null +++ b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_lptim16.c @@ -0,0 +1,399 @@ + /** + **************************************************************************************************** + * @file fm33lg0xx_fl_lptim16.c + * @author FMSH Application Team + * @brief Src file of LPTIM16 FL Module + **************************************************************************************************** + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + +/* Includes ------------------------------------------------------------------*/ +#include "fm33lg0xx_fl.h" + +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @addtogroup LPTIM16 + * @{ + */ + +#ifdef FL_LPTIM16_DRIVER_ENABLED + +/* Private macros ------------------------------------------------------------*/ +/** @addtogroup LPTIM16_FL_Private_Macros + * @{ + */ + +#define IS_LPTIM16_INSTANCE(INSTANCE) (((INSTANCE) == LPTIM16)) + +#define IS_FL_LPTIM16_CHANNEL(__VALUE__) (((__VALUE__) == FL_LPTIM16_CHANNEL_1)||\ + ((__VALUE__) == FL_LPTIM16_CHANNEL_2)) + +#define IS_FL_LPTIM16_CMU_CLK_SOURCE(__VALUE__) (((__VALUE__) == FL_CMU_LPTIM16_CLK_SOURCE_RCLF)||\ + ((__VALUE__) == FL_CMU_LPTIM16_CLK_SOURCE_RCLP)||\ + ((__VALUE__) == FL_CMU_LPTIM16_CLK_SOURCE_LSCLK)||\ + ((__VALUE__) == FL_CMU_LPTIM16_CLK_SOURCE_APBCLK)) + +#define IS_FL_LPTIM16_CLK_SOURCE(__VALUE__) (((__VALUE__) == FL_LPTIM16_CLK_SOURCE_INTERNAL)||\ + ((__VALUE__) == FL_LPTIM16_CLK_SOURCE_EXTERNAL)) + +#define IS_FL_LPTIM16_PSC(__VALUE__) (((__VALUE__) == FL_LPTIM16_PSC_DIV1)||\ + ((__VALUE__) == FL_LPTIM16_PSC_DIV2)||\ + ((__VALUE__) == FL_LPTIM16_PSC_DIV4)||\ + ((__VALUE__) == FL_LPTIM16_PSC_DIV8)||\ + ((__VALUE__) == FL_LPTIM16_PSC_DIV16)||\ + ((__VALUE__) == FL_LPTIM16_PSC_DIV32)||\ + ((__VALUE__) == FL_LPTIM16_PSC_DIV64)||\ + ((__VALUE__) == FL_LPTIM16_PSC_DIV128)) + +#define IS_FL_LPTIM16_OPERATION_MODE(__VALUE__) (((__VALUE__) == FL_LPTIM16_OPERATION_MODE_NORMAL)||\ + ((__VALUE__) == FL_LPTIM16_OPERATION_MODE_EXTERNAL_TRIGGER_CNT)||\ + ((__VALUE__) == FL_LPTIM16_OPERATION_MODE_EXTERNAL_ASYNC_PULSE_CNT)||\ + ((__VALUE__) == FL_LPTIM16_OPERATION_MODE_TIMEOUT)) + +#define IS_FL_LPTIM16_ENCODER_MODE(__VALUE__) (((__VALUE__) == FL_LPTIM16_ENCODER_MODE_DISABLE)||\ + ((__VALUE__) == FL_LPTIM16_ENCODER_MODE_TI1FP1_TI2FP2_CNT)||\ + ((__VALUE__) == FL_LPTIM16_ENCODER_MODE_TI2FP2_TI1FP1_CNT)||\ + ((__VALUE__) == FL_LPTIM16_ENCODER_MODE_TI2FP2_CNT_TI1FP1_CNT)) + +#define IS_FL_LPTIM16_ETR_TRIGGER_EDGE(__VALUE__) (((__VALUE__) == FL_LPTIM16_ETR_TRIGGER_EDGE_RISING)||\ + ((__VALUE__) == FL_LPTIM16_ETR_TRIGGER_EDGE_FALLING)||\ + ((__VALUE__) == FL_LPTIM16_ETR_TRIGGER_EDGE_BOTH)) + +#define IS_FL_LPTIM16_ETR_COUNT_EDGE(__VALUE__) (((__VALUE__) == FL_LPTIM16_ETR_COUNT_EDGE_RISING)||\ + ((__VALUE__) == FL_LPTIM16_ETR_COUNT_EDGE_FALLING)) + +#define IS_FL_LPTIM16_ONE_PULSE_MODE(__VALUE__) (((__VALUE__) == FL_LPTIM16_ONE_PULSE_MODE_CONTINUOUS)||\ + ((__VALUE__) == FL_LPTIM16_ONE_PULSE_MODE_SINGLE)) + +#define IS_FL_LPTIM16_IC_EDGE(__VALUE__) (((__VALUE__) == FL_LPTIM16_IC_EDGE_RISING)||\ + ((__VALUE__) == FL_LPTIM16_IC_EDGE_FALLING)||\ + ((__VALUE__) == FL_LPTIM16_IC_EDGE_BOTH)) + +#define IS_FL_LPTIM16_IC_POLARITY(__VALUE__) (((__VALUE__) == FL_LPTIM16_IC_POLARITY_NORMAL)||\ + ((__VALUE__) == FL_LPTIM16_IC_POLARITY_INVERT)) + +#define IS_FL_LPTIM16_OC_POLARITY(__VALUE__) (((__VALUE__) == FL_LPTIM16_OC_POLARITY_NORMAL)||\ + ((__VALUE__) == FL_LPTIM16_OC_POLARITY_INVERT)) + +#define IS_FL_LPTIM16_IC1_CAPTURE_SOURCE(__VALUE__) (((__VALUE__) == FL_LPTIM16_IC1_CAPTURE_SOURCE_GROUP0)||\ + ((__VALUE__) == FL_LPTIM16_IC1_CAPTURE_SOURCE_GROUP1)||\ + ((__VALUE__) == FL_LPTIM16_IC1_CAPTURE_SOURCE_GROUP2)||\ + ((__VALUE__) == FL_LPTIM16_IC1_CAPTURE_SOURCE_GROUP3)) + +#define IS_FL_LPTIM16_TRGO_SOURCE(__VALUE__) (((__VALUE__) == FL_LPTIM16_TRGO_ENABLE)||\ + ((__VALUE__) == FL_LPTIM16_TRGO_UPDATE)||\ + ((__VALUE__) == FL_LPTIM16_TRGO_OC1_CMP_PULSE)||\ + ((__VALUE__) == FL_LPTIM16_TRGO_IC1_EVENT)||\ + ((__VALUE__) == FL_LPTIM16_TRGO_IC2_EVENT)) + +/** + * @} + */ + +/* Exported functions --------------------------------------------------------*/ +/** @addtogroup LPTIM16_FL_EF_Init + * @{ + */ + +/** + * @brief 复位LPTIM16 外设 + * @param 外设入口地址 + * @retval 返回错误状态，可能值： + * -FL_PASS 外设寄存器值恢复复位值 + * -FL_FAIL 未成功执行 + */ +FL_ErrorStatus FL_LPTIM16_DeInit(LPTIM16_Type *LPTIM16x) +{ + /* 参数检查 */ + assert_param(IS_LPTIM16_INSTANCE(LPTIM16x)); + /* 使能外设复位 */ + FL_RMU_EnablePeripheralReset(RMU); + /* 复位外设寄存器 */ + FL_RMU_EnableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_LPTIM16); + FL_RMU_DisableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_LPTIM16); + /* 关闭外设总线时钟和工作时钟 */ + FL_CMU_DisableGroup1BusClock(FL_CMU_GROUP1_BUSCLK_LPTIM16); + FL_CMU_DisableGroup3OperationClock(FL_CMU_GROUP3_OPCLK_LPTIM16); + /* 锁定外设复位 */ + FL_RMU_DisablePeripheralReset(RMU); + return FL_PASS; +} + +/** + * @brief 根据需要功能配置LPTIM16寄存器使之工作在定时器功能模式下 + * + * @note 需要使用ETR作为计数源时，建议根据需求配置为异步脉冲计数模式 + * @ref FL_LPTIM16_OPERATION_MODE_EXTERNAL_ASYNC_PULSE_CNT 或外部触发计数模式 + * @ref FL_LPTIM16_OPERATION_MODE_EXTERNAL_TRIGGER_CNT + * + * @param LPTIM16x 外设入口地址 + * @param init 为 @ref FL_LPTIM16_InitTypeDef类型的结构体 + * + * @retval ErrorStatus枚举值 + * -FL_FAIL 配置过程发生错误 + * -FL_PASS LPTIM16配置成功 + */ +FL_ErrorStatus FL_LPTIM16_Init(LPTIM16_Type *LPTIM16x, FL_LPTIM16_InitTypeDef *init) +{ + /* 参数检查 */ + assert_param(IS_LPTIM16_INSTANCE(LPTIM16x)); + assert_param(IS_FL_LPTIM16_CMU_CLK_SOURCE(init->clockSource)); + assert_param(IS_FL_LPTIM16_CLK_SOURCE(init->prescalerClockSource)); + assert_param(IS_FL_LPTIM16_PSC(init->prescaler)); + assert_param(IS_FL_LPTIM16_OPERATION_MODE(init->mode)); + assert_param(IS_FL_LPTIM16_ENCODER_MODE(init->encoderMode)); + assert_param(IS_FL_LPTIM16_ONE_PULSE_MODE(init->onePulseMode)); + assert_param(IS_FL_LPTIM16_ETR_TRIGGER_EDGE(init->triggerEdge)); + assert_param(IS_FL_LPTIM16_ETR_COUNT_EDGE(init->countEdge)); + /* 时钟配置 */ + if(LPTIM16x == LPTIM16) + { + /* 使能总线时钟 */ + FL_CMU_EnableGroup1BusClock(FL_CMU_GROUP1_BUSCLK_LPTIM16); + /* 除了异步计数模式，其他模式都需要使能工作时钟 */ + if(init->mode != FL_LPTIM16_OPERATION_MODE_EXTERNAL_ASYNC_PULSE_CNT) + { + /* 使能工作时钟 */ + FL_CMU_EnableGroup3OperationClock(FL_CMU_GROUP3_OPCLK_LPTIM16); + /* 设置工作时钟时钟源 */ + FL_CMU_SetLPTIM16ClockSource(init->clockSource); + } + } + else + { + return FL_FAIL; + } + /* 配置分频器的时钟源 */ + FL_LPTIM16_SetClockSource(LPTIM16x, init->prescalerClockSource); + /* 配置时钟分频 */ + FL_LPTIM16_SetPrescaler(LPTIM16x, init->prescaler); + /* 配置重装载值 */ + FL_LPTIM16_WriteAutoReload(LPTIM16x, init->autoReload); + /* 配置定时器工作模式 */ + FL_LPTIM16_SetOperationMode(LPTIM16x, init->mode); + /* 配置编码器模式 */ + if(init->mode == FL_LPTIM16_OPERATION_MODE_NORMAL) + { + FL_LPTIM16_SetEncoderMode(LPTIM16x, init->encoderMode); + } + /* 单次计数模式 */ + FL_LPTIM16_SetOnePulseMode(LPTIM16x, init->onePulseMode); + /* 配置定时器不同模式下的特殊寄存器 */ + switch(init->mode) + { + case FL_LPTIM16_OPERATION_MODE_NORMAL: + { + /* ETR作为时钟时和异步脉冲计数模式信号路径一样，需要使能模拟滤波，并配置边沿 */ + if(init->prescalerClockSource == FL_LPTIM16_CLK_SOURCE_EXTERNAL) + { + /* 配置异步计数边沿 */ + FL_LPTIM16_SetETRCountEdge(LPTIM16x, init->countEdge); + /* 开启外部输入滤波 */ + FL_LPTIM16_EnableETRFilter(LPTIM16x); + } + } + break; + case FL_LPTIM16_OPERATION_MODE_EXTERNAL_TRIGGER_CNT: + { + /* 配置外部输入有效边沿 */ + FL_LPTIM16_SetETRTriggerEdge(LPTIM16x, init->triggerEdge); + } + break; + case FL_LPTIM16_OPERATION_MODE_EXTERNAL_ASYNC_PULSE_CNT: + { + /* 配置异步计数边沿 */ + FL_LPTIM16_SetETRCountEdge(LPTIM16x, init->countEdge); + /* 开启外部输入滤波 */ + FL_LPTIM16_EnableETRFilter(LPTIM16x); + } + break; + case FL_LPTIM16_OPERATION_MODE_TIMEOUT: + { + /* 配置外部输入有效边沿 */ + FL_LPTIM16_SetETRTriggerEdge(LPTIM16x, init->triggerEdge); + } + break; + default: + return FL_FAIL; + } + return FL_PASS; +} + +/** + * @brief 设置 LPTIM16_InitStruct 为默认配置 + * @param init 为 @ref FL_LPTIM16_InitTypeDef类型的结构体 + * + * @retval None + */ +void FL_LPTIM16_StructInit(FL_LPTIM16_InitTypeDef *init) +{ + init->clockSource = FL_CMU_LPTIM16_CLK_SOURCE_APBCLK; + init->prescalerClockSource = FL_LPTIM16_CLK_SOURCE_INTERNAL; + init->prescaler = FL_LPTIM16_PSC_DIV1; + init->autoReload = 0; + init->mode = FL_LPTIM16_OPERATION_MODE_NORMAL; + init->countEdge = FL_LPTIM16_ETR_COUNT_EDGE_RISING; + init->triggerEdge = FL_LPTIM16_ETR_TRIGGER_EDGE_RISING; + init->encoderMode = FL_LPTIM16_ENCODER_MODE_DISABLE; + init->onePulseMode = FL_LPTIM16_ONE_PULSE_MODE_CONTINUOUS; +} + +/** + * @brief 配置LPTIM16工作在输入捕获模式 + * + * @param LPTIM16x 外设入口地址 + * @param ic_init 为 @ref FL_LPTIM16_IC_InitTypeDef类型的结构体 + * @param Channel LPTIM16输入通道 + * + * @retval ErrorStatus枚举值 + * -FL_FAIL 配置过程发生错误 + * -FL_PASS LPTIM16配置成功 + */ +FL_ErrorStatus FL_LPTIM16_IC_Init(LPTIM16_Type *LPTIM16x, uint32_t Channel, FL_LPTIM16_IC_InitTypeDef *ic_init) +{ + /* 参数检查 */ + assert_param(IS_LPTIM16_INSTANCE(LPTIM16x)); + assert_param(IS_FL_LPTIM16_CHANNEL(Channel)); + assert_param(IS_FL_LPTIM16_IC_EDGE(ic_init->ICEdge)); + assert_param(IS_FL_LPTIM16_IC_POLARITY(ic_init->ICInputPolarity)); + assert_param(IS_FL_LPTIM16_IC1_CAPTURE_SOURCE(ic_init->channel1CaptureSource)); + /* 通道1捕获源 & 预分频 */ + if(Channel == FL_LPTIM16_CHANNEL_1) + { + FL_LPTIM16_IC_WriteChannel1Prescaler(LPTIM16x, ic_init->channel1Prescaler); + FL_LPTIM16_IC_SetChannel1CaptureSource(LPTIM16x, ic_init->channel1CaptureSource); + } + if(ic_init->ICInputDigitalFilter == FL_DISABLE) + { + FL_LPTIM16_DisableDigitalFilter(LPTIM16, Channel); + } + else + { + FL_LPTIM16_EnableDigitalFilter(LPTIM16, Channel); + } + /* 捕获通道极性 */ + FL_LPTIM16_IC_SetInputPolarity(LPTIM16x, ic_init->ICInputPolarity, Channel); + /* 配置捕获边沿 */ + FL_LPTIM16_IC_SetCaptureEdge(LPTIM16x, ic_init->ICEdge, Channel); + /* 通道输入捕获使能 */ + FL_LPTIM16_SetChannelMode(LPTIM16x, FL_LPTIM16_CHANNEL_MODE_INPUT, Channel); + return FL_PASS; +} + +/** + * @brief 设置 LPTIM16_IC_InitStruct 为默认配置 + * @param ic_init 为 @ref FL_LPTIM16_IC_InitTypeDef类型的结构体 + * + * @retval None + */ +void FL_LPTIM16_IC_StructInit(FL_LPTIM16_IC_InitTypeDef *ic_init) +{ + ic_init->ICInputPolarity = FL_LPTIM16_IC_POLARITY_NORMAL; + ic_init->ICInputDigitalFilter = FL_DISABLE; + ic_init->ICEdge = FL_LPTIM16_IC_EDGE_RISING; + ic_init->channel1Prescaler = 1 - 1; + ic_init->channel1CaptureSource = FL_LPTIM16_IC1_CAPTURE_SOURCE_GROUP0; +} + +/** + * @brief 根据需要功能配置LPTIM16寄存器工作在输出比较模式 + * + * @param LPTIM16x 外设入口地址 + * @param oc_init 为 @ref FL_LPTIM16_OC_InitTypeDef类型的结构体 + * @param Channel LPTIM16输出通道 + * + * @retval ErrorStatus枚举值 + * -FL_FAIL 配置过程发生错误 + * -FL_PASS LPTIM16配置成功 + */ +FL_ErrorStatus FL_LPTIM16_OC_Init(LPTIM16_Type *LPTIM16x, uint32_t Channel, FL_LPTIM16_OC_InitTypeDef *oc_init) +{ + /* 参数检查 */ + assert_param(IS_LPTIM16_INSTANCE(LPTIM16x)); + assert_param(IS_FL_LPTIM16_CHANNEL(Channel)); + assert_param(IS_FL_LPTIM16_OC_POLARITY(oc_init->OCPolarity)); + /* 比较通道极性 */ + FL_LPTIM16_OC_SetPolarity(LPTIM16x, oc_init->OCPolarity, Channel); + /* 设置比较值 */ + switch(Channel) + { + case FL_LPTIM16_CHANNEL_1: + FL_LPTIM16_WriteCompareCH1(LPTIM16x, oc_init->compareValue); + break; + case FL_LPTIM16_CHANNEL_2: + FL_LPTIM16_WriteCompareCH2(LPTIM16x, oc_init->compareValue); + break; + default : + return FL_FAIL; + } + /* 通道输出比较使能 */ + FL_LPTIM16_SetChannelMode(LPTIM16x, FL_LPTIM16_CHANNEL_MODE_OUTPUT, Channel); + return FL_PASS; +} + +/** + * @brief 设置 LPTIM16_OC_InitStruct 为默认配置 + * @param oc_init 为 @ref FL_LPTIM16_OC_InitTypeDef类型的结构体 + * + * @retval None + */ +void FL_LPTIM16_OC_StructInit(FL_LPTIM16_OC_InitTypeDef *oc_init) +{ + oc_init->compareValue = 0; + oc_init->OCPolarity = FL_LPTIM16_OC_POLARITY_NORMAL; +} + +/** + * @} + */ + +#endif /* FL_LPTIM16_DRIVER_ENABLED */ + +/** + * @} + */ + +/** + * @} + */ + +/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/ + diff --git a/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_lptim32.c b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_lptim32.c new file mode 100644 index 0000000..143c710 --- /dev/null +++ b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_lptim32.c @@ -0,0 +1,373 @@ + /** + **************************************************************************************************** + * @file fm33lg0xx_fl_lptim32.c + * @author FMSH Application Team + * @brief Src file of LPTIM32 FL Module + **************************************************************************************************** + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + +/* Includes ------------------------------------------------------------------*/ +#include "fm33lg0xx_fl.h" + +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @addtogroup LPTIM32 + * @{ + */ + +#ifdef FL_LPTIM32_DRIVER_ENABLED + +/* Private macros ------------------------------------------------------------*/ +/** @addtogroup LPTIM32_FL_Private_Macros + * @{ + */ + +#define IS_LPTIM32_INSTANCE(INSTANCE) ((INSTANCE) == LPTIM32) + +#define IS_FL_LPTIM32_CHANNEL(__VALUE__) (((__VALUE__) == FL_LPTIM32_CHANNEL_1)||\ + ((__VALUE__) == FL_LPTIM32_CHANNEL_2)||\ + ((__VALUE__) == FL_LPTIM32_CHANNEL_3)||\ + ((__VALUE__) == FL_LPTIM32_CHANNEL_4)) + +#define IS_FL_LPTIM32_CMU_CLK_SOURCE(__VALUE__) (((__VALUE__) == FL_CMU_LPTIM32_CLK_SOURCE_RCLF)||\ + ((__VALUE__) == FL_CMU_LPTIM32_CLK_SOURCE_RCLP)||\ + ((__VALUE__) == FL_CMU_LPTIM32_CLK_SOURCE_LSCLK)||\ + ((__VALUE__) == FL_CMU_LPTIM32_CLK_SOURCE_APBCLK)) + +#define IS_FL_LPTIM32_CLK_SOURCE(__VALUE__) (((__VALUE__) == FL_LPTIM32_CLK_SOURCE_INTERNAL)||\ + ((__VALUE__) == FL_LPTIM32_CLK_SOURCE_EXTERNAL)) + +#define IS_FL_LPTIM32_PSC(__VALUE__) (((__VALUE__) == FL_LPTIM32_PSC_DIV1)||\ + ((__VALUE__) == FL_LPTIM32_PSC_DIV2)||\ + ((__VALUE__) == FL_LPTIM32_PSC_DIV4)||\ + ((__VALUE__) == FL_LPTIM32_PSC_DIV8)||\ + ((__VALUE__) == FL_LPTIM32_PSC_DIV16)||\ + ((__VALUE__) == FL_LPTIM32_PSC_DIV32)||\ + ((__VALUE__) == FL_LPTIM32_PSC_DIV64)||\ + ((__VALUE__) == FL_LPTIM32_PSC_DIV128)) + +#define IS_FL_LPTIM32_OPERATION_MODE(__VALUE__) (((__VALUE__) == FL_LPTIM32_OPERATION_MODE_NORMAL)||\ + ((__VALUE__) == FL_LPTIM32_OPERATION_MODE_EXTERNAL_TRIGGER_CNT)||\ + ((__VALUE__) == FL_LPTIM32_OPERATION_MODE_EXTERNAL_ASYNC_PULSE_CNT)||\ + ((__VALUE__) == FL_LPTIM32_OPERATION_MODE_TIMEOUT)) + +#define IS_FL_LPTIM32_ETR_TRIGGER_EDGE(__VALUE__) (((__VALUE__) == FL_LPTIM32_ETR_TRIGGER_EDGE_RISING)||\ + ((__VALUE__) == FL_LPTIM32_ETR_TRIGGER_EDGE_FALLING)||\ + ((__VALUE__) == FL_LPTIM32_ETR_TRIGGER_EDGE_BOTH)) + +#define IS_FL_LPTIM32_ETR_COUNT_EDGE(__VALUE__) (((__VALUE__) == FL_LPTIM32_ETR_COUNT_EDGE_RISING)||\ + ((__VALUE__) == FL_LPTIM32_ETR_COUNT_EDGE_FALLING)) + +#define IS_FL_LPTIM32_ONE_PULSE_MODE(__VALUE__) (((__VALUE__) == FL_LPTIM32_ONE_PULSE_MODE_CONTINUOUS)||\ + ((__VALUE__) == FL_LPTIM32_ONE_PULSE_MODE_SINGLE)) + +#define IS_FL_LPTIM32_IC_EDGE(__VALUE__) (((__VALUE__) == FL_LPTIM32_IC_EDGE_RISING)||\ + ((__VALUE__) == FL_LPTIM32_IC_EDGE_FALLING)||\ + ((__VALUE__) == FL_LPTIM32_IC_EDGE_BOTH)) + +#define IS_FL_LPTIM32_OC_POLARITY(__VALUE__) (((__VALUE__) == FL_LPTIM32_OC_POLARITY_NORMAL)||\ + ((__VALUE__) == FL_LPTIM32_OC_POLARITY_INVERT)) + +#define IS_FL_LPTIM32_IC1_CAPTURE_SOURCE(__VALUE__) (((__VALUE__) == FL_LPTIM32_IC1_CAPTURE_SOURCE_GROUP0)||\ + ((__VALUE__) == FL_LPTIM32_IC1_CAPTURE_SOURCE_GROUP1)||\ + ((__VALUE__) == FL_LPTIM32_IC1_CAPTURE_SOURCE_GROUP2)||\ + ((__VALUE__) == FL_LPTIM32_IC1_CAPTURE_SOURCE_GROUP3)) + +#define IS_FL_LPTIM32_TRGO_SOURCE(__VALUE__) (((__VALUE__) == FL_LPTIM32_TRGO_ENABLE)||\ + ((__VALUE__) == FL_LPTIM32_TRGO_UPDATE)||\ + ((__VALUE__) == FL_LPTIM32_TRGO_OC1_CMP_PULSE)||\ + ((__VALUE__) == FL_LPTIM32_TRGO_IC1_EVENT)||\ + ((__VALUE__) == FL_LPTIM32_TRGO_IC2_EVENT)) + +/** + * @} + */ + +/* Exported functions --------------------------------------------------------*/ +/** @addtogroup LPTIM32_FL_EF_Init + * @{ + */ + +/** + * @brief 复位LPTIM32 外设 + * @param 外设入口地址 + * @retval 返回错误状态，可能值： + * -FL_PASS 外设寄存器值恢复复位值 + * -FL_FAIL 未成功执行 + */ +FL_ErrorStatus FL_LPTIM32_DeInit(LPTIM32_Type *LPTIM32x) +{ + /* 参数检查 */ + assert_param(IS_LPTIM32_INSTANCE(LPTIM32x)); + /* 使能外设复位 */ + FL_RMU_EnablePeripheralReset(RMU); + /* 复位外设寄存器 */ + FL_RMU_EnableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_LPTIM32); + FL_RMU_DisableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_LPTIM32); + /* 关闭外设总线时钟和工作时钟 */ + FL_CMU_DisableGroup1BusClock(FL_CMU_GROUP1_BUSCLK_LPTIM32); + FL_CMU_DisableGroup3OperationClock(FL_CMU_GROUP3_OPCLK_LPTIM32); + /* 锁定外设复位 */ + FL_RMU_DisablePeripheralReset(RMU); + return FL_PASS; +} + +/** + * @brief 根据需要功能配置LPTIM32寄存器使之工作在定时器功能模式下 + * + * @note 需要使用ETR作为计数源时，建议根据需求配置为异步脉冲计数模式 + * @ref FL_LPTIM32_OPERATION_MODE_EXTERNAL_ASYNC_PULSE_CNT 或外部触发计数模式 + * @ref FL_LPTIM32_OPERATION_MODE_EXTERNAL_TRIGGER_CNT + * + * @param LPTIM32x 外设入口地址 + * @param init 为 @ref FL_LPTIM32_InitTypeDef类型的结构体 + * + * @retval ErrorStatus枚举值 + * -FL_FAIL 配置过程发生错误 + * -FL_PASS LPTIM32配置成功 + */ +FL_ErrorStatus FL_LPTIM32_Init(LPTIM32_Type *LPTIM32x, FL_LPTIM32_InitTypeDef *init) +{ + /* 参数检查 */ + assert_param(IS_LPTIM32_INSTANCE(LPTIM32x)); + assert_param(IS_FL_LPTIM32_CMU_CLK_SOURCE(init->clockSource)); + assert_param(IS_FL_LPTIM32_CLK_SOURCE(init->prescalerClockSource)); + assert_param(IS_FL_LPTIM32_PSC(init->prescaler)); + assert_param(IS_FL_LPTIM32_OPERATION_MODE(init->mode)); + assert_param(IS_FL_LPTIM32_ONE_PULSE_MODE(init->onePulseMode)); + assert_param(IS_FL_LPTIM32_ETR_TRIGGER_EDGE(init->triggerEdge)); + assert_param(IS_FL_LPTIM32_ETR_COUNT_EDGE(init->countEdge)); + /* 时钟配置 */ + if(LPTIM32x == LPTIM32) + { + /* 使能总线时钟 */ + FL_CMU_EnableGroup1BusClock(FL_CMU_GROUP1_BUSCLK_LPTIM32); + /* 除了异步计数模式，其他模式都需要使能工作时钟 */ + if(init->mode != FL_LPTIM32_OPERATION_MODE_EXTERNAL_ASYNC_PULSE_CNT) + { + /* 使能工作时钟 */ + FL_CMU_EnableGroup3OperationClock(FL_CMU_GROUP3_OPCLK_LPTIM32); + /* 设置工作时钟时钟源 */ + FL_CMU_SetLPTIM32ClockSource(init->clockSource); + } + } + /* 配置分频器的时钟源 */ + FL_LPTIM32_SetClockSource(LPTIM32x, init->prescalerClockSource); + /* 配置时钟分频 */ + FL_LPTIM32_SetPrescaler(LPTIM32x, init->prescaler); + /* 配置定时器工作模式 */ + FL_LPTIM32_SetOperationMode(LPTIM32x, init->mode); + /* 配置定时器不同模式下的特殊寄存器 */ + switch(init->mode) + { + case FL_LPTIM32_OPERATION_MODE_NORMAL: + { + if(init->prescalerClockSource == FL_LPTIM32_CLK_SOURCE_EXTERNAL) + { + /* 配置外部计数边沿 */ + FL_LPTIM32_SetETRCountEdge(LPTIM32x, init->countEdge); + /* 开启外部输入滤波 */ + FL_LPTIM32_EnableETRFilter(LPTIM32x); + } + } + break; + case FL_LPTIM32_OPERATION_MODE_EXTERNAL_TRIGGER_CNT: + { + /* 配置外部输入有效边沿 */ + FL_LPTIM32_SetETRTriggerEdge(LPTIM32x, init->triggerEdge); + } + break; + case FL_LPTIM32_OPERATION_MODE_EXTERNAL_ASYNC_PULSE_CNT: + { + /* 配置外部计数边沿 */ + FL_LPTIM32_SetETRCountEdge(LPTIM32x, init->countEdge); + /* 开启外部输入滤波 */ + FL_LPTIM32_EnableETRFilter(LPTIM32x); + } + break; + case FL_LPTIM32_OPERATION_MODE_TIMEOUT: + { + /* 配置外部输入有效边沿 */ + FL_LPTIM32_SetETRTriggerEdge(LPTIM32x, init->triggerEdge); + } + break; + } + /* 单次计数模式 */ + FL_LPTIM32_SetOnePulseMode(LPTIM32x, init->onePulseMode); + /* 设置重装载值 */ + FL_LPTIM32_WriteAutoReload(LPTIM32x, init->autoReload); + return FL_PASS; +} + +/** + * @brief 设置 LPTIM32_InitStruct 为默认配置 + * @param init 为 @ref FL_LPTIM32_InitTypeDef类型的结构体 + * + * @retval None + */ +void FL_LPTIM32_StructInit(FL_LPTIM32_InitTypeDef *init) +{ + init->clockSource = FL_CMU_LPTIM32_CLK_SOURCE_APBCLK; + init->prescalerClockSource = FL_LPTIM32_CLK_SOURCE_INTERNAL; + init->prescaler = FL_LPTIM32_PSC_DIV1; + init->autoReload = 0; + init->mode = FL_LPTIM32_OPERATION_MODE_NORMAL; + init->countEdge = FL_LPTIM32_ETR_COUNT_EDGE_RISING; + init->triggerEdge = FL_LPTIM32_ETR_TRIGGER_EDGE_RISING; + init->onePulseMode = FL_LPTIM32_ONE_PULSE_MODE_CONTINUOUS; +} + +/** + * @brief 配置LPTIM32工作在输入捕获模式 + * + * @param LPTIM32x 外设入口地址 + * @param ic_init 为 @ref FL_LPTIM32_IC_InitTypeDef类型的结构体 + * @param Channel LPTIM32输入通道 + * + * @retval ErrorStatus枚举值 + * -FL_FAIL 配置过程发生错误 + * -FL_PASS LPTIM32配置成功 + */ +//输入捕获配置 +FL_ErrorStatus FL_LPTIM32_IC_Init(LPTIM32_Type *LPTIM32x, uint32_t Channel, FL_LPTIM32_IC_InitTypeDef *ic_init) +{ + FL_ErrorStatus result = FL_PASS; + /* 参数检查 */ + assert_param(IS_LPTIM32_INSTANCE(LPTIM32x)); + assert_param(IS_FL_LPTIM32_CHANNEL(Channel)); + assert_param(IS_FL_LPTIM32_IC_EDGE(ic_init->ICEdge)); + assert_param(IS_FL_LPTIM32_IC1_CAPTURE_SOURCE(ic_init->ICSource)); + /* 通道1捕获源 */ + if(Channel == FL_LPTIM32_CHANNEL_1) + { + FL_LPTIM32_IC_SetChannel1CaptureSource(LPTIM32, ic_init->ICSource); + } + /* 捕获通道边沿 */ + FL_LPTIM32_IC_SetCaptureEdge(LPTIM32, ic_init->ICEdge, Channel); + /* 通道输入捕获使能 */ + FL_LPTIM32_SetChannelMode(LPTIM32, FL_LPTIM32_CHANNEL_MODE_INPUT, Channel); + return result; +} + +/** + * @brief 设置 LPTIM32_IC_InitStruct 为默认配置 + * @param ic_init为 @ref FL_LPTIM32_IC_InitTypeDef类型的结构体 + * + * @retval None + */ +void FL_LPTIM32_IC_StructInit(FL_LPTIM32_IC_InitTypeDef *ic_init) +{ + ic_init->ICEdge = FL_LPTIM32_IC_EDGE_RISING; + ic_init->ICSource = FL_LPTIM32_IC1_CAPTURE_SOURCE_GROUP0; +} + +/** + * @brief 根据需要功能配置LPTIM32寄存器工作在输出比较模式 + * + * @param LPTIM32x 外设入口地址 + * @param oc_init 为 @ref FL_LPTIM32_OC_InitTypeDef类型的结构体 + * @param Channel LPTIM32输出通道 + * + * @retval ErrorStatus枚举值 + * -FL_FAIL 配置过程发生错误 + * -FL_PASS LPTIM32配置成功 + */ +FL_ErrorStatus FL_LPTIM32_OC_Init(LPTIM32_Type *LPTIM32x, uint32_t Channel, FL_LPTIM32_OC_InitTypeDef *oc_init) +{ + FL_ErrorStatus result = FL_PASS; + /* 参数检查 */ + assert_param(IS_LPTIM32_INSTANCE(LPTIM32x)); + assert_param(IS_FL_LPTIM32_CHANNEL(Channel)); + assert_param(IS_FL_LPTIM32_OC_POLARITY(oc_init->OCPolarity)); + /* 比较通道极性 */ + FL_LPTIM32_OC_SetPolarity(LPTIM32x, oc_init->OCPolarity, Channel); + /* 设置比较值 */ + switch(Channel) + { + case FL_LPTIM32_CHANNEL_1: + FL_LPTIM32_WriteCompareCH1(LPTIM32x, oc_init->compareValue); + break; + case FL_LPTIM32_CHANNEL_2: + FL_LPTIM32_WriteCompareCH2(LPTIM32x, oc_init->compareValue); + break; + case FL_LPTIM32_CHANNEL_3: + FL_LPTIM32_WriteCompareCH3(LPTIM32x, oc_init->compareValue); + break; + case FL_LPTIM32_CHANNEL_4: + FL_LPTIM32_WriteCompareCH4(LPTIM32x, oc_init->compareValue); + break; + default : + result = FL_FAIL; + break; + } + /* 通道输出比较使能 */ + FL_LPTIM32_SetChannelMode(LPTIM32x, FL_LPTIM32_CHANNEL_MODE_OUTPUT, Channel); + return result; +} + +/** + * @brief 设置 LPTIM32_OC_InitStruct 为默认配置 + * @param oc_init为 @ref FL_LPTIM32_OC_InitTypeDef类型的结构体 + * + * @retval None + */ +void FL_LPTIM32_OC_StructInit(FL_LPTIM32_OC_InitTypeDef *oc_init) +{ + oc_init->compareValue = 0; + oc_init->OCPolarity = FL_LPTIM32_OC_POLARITY_NORMAL; +} + +/** + * @} + */ + +#endif /* FL_LPTIM32_DRIVER_ENABLED */ + +/** + * @} + */ + +/** + * @} + */ + +/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/ diff --git a/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_lpuart.c b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_lpuart.c new file mode 100644 index 0000000..7941aa9 --- /dev/null +++ b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_lpuart.c @@ -0,0 +1,306 @@ + /** + **************************************************************************************************** + * @file fm33lg0xx_fl_lpuart.c + * @author FMSH Application Team + * @brief Src file of LPUART FL Module + **************************************************************************************************** + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + +/* Includes ------------------------------------------------------------------*/ +#include "fm33lg0xx_fl.h" + +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @addtogroup LPUART + * @{ + */ + +#ifdef FL_LPUART_DRIVER_ENABLED + +/* Private macros ------------------------------------------------------------*/ +/** @addtogroup LPUART_FL_Private_Macros + * @{ + */ +#define IS_LPUART_INSTANCE(INSTANCE) (((INSTANCE) == LPUART0)||\ + ((INSTANCE) == LPUART1)||\ + ((INSTANCE) == LPUART2)) + +#define IS_FL_LPUART_CLKSRC(__VALUE__) (((__VALUE__) == FL_CMU_LPUART_CLK_SOURCE_LSCLK)||\ + ((__VALUE__) == FL_CMU_LPUART_CLK_SOURCE_RCHF)||\ + ((__VALUE__) == FL_CMU_LPUART_CLK_SOURCE_RCLF)) + +#define IS_FL_LPUART_BAUDRATE(__VALUE__) (((__VALUE__) == FL_LPUART_BAUDRATE_300)||\ + ((__VALUE__) == FL_LPUART_BAUDRATE_600)||\ + ((__VALUE__) == FL_LPUART_BAUDRATE_1200)||\ + ((__VALUE__) == FL_LPUART_BAUDRATE_2400)||\ + ((__VALUE__) == FL_LPUART_BAUDRATE_4800)||\ + ((__VALUE__) == FL_LPUART_BAUDRATE_9600)) + +#define IS_FL_LPUART_DATAWIDTH(__VALUE__) (((__VALUE__) == FL_LPUART_DATA_WIDTH_6B)||\ + ((__VALUE__) == FL_LPUART_DATA_WIDTH_7B)||\ + ((__VALUE__) == FL_LPUART_DATA_WIDTH_8B)||\ + ((__VALUE__) == FL_LPUART_DATA_WIDTH_9B)) + +#define IS_FL_LPUART_STOPBITS(__VALUE__) (((__VALUE__) == FL_LPUART_STOP_BIT_WIDTH_1B)||\ + ((__VALUE__) == FL_LPUART_STOP_BIT_WIDTH_2B)) + +#define IS_FL_LPUART_PARITY(__VALUE__) (((__VALUE__) == FL_LPUART_PARITY_NONE)||\ + ((__VALUE__) == FL_LPUART_PARITY_EVEN)||\ + ((__VALUE__) == FL_LPUART_PARITY_ODD)) + +#define IS_FL_LPUART_DIRECTION(__VALUE__) (((__VALUE__) == FL_LPUART_DIRECTION_NONE)||\ + ((__VALUE__) == FL_LPUART_DIRECTION_RX)||\ + ((__VALUE__) == FL_LPUART_DIRECTION_TX)||\ + ((__VALUE__) == FL_LPUART_DIRECTION_TX_RX)) + +/** + * @} + */ + +/* Exported functions --------------------------------------------------------*/ +/** @addtogroup LPUART_FL_EF_Init + * @{ + */ + +/** + * @brief 复位LPUART 外设 + * @param 外设入口地址 + * @retval 返回错误状态，可能值： + * -FL_PASS 外设寄存器值恢复复位值 + * -FL_FAIL 未成功执行 + */ +FL_ErrorStatus FL_LPUART_DeInit(LPUART_Type *LPUARTx) +{ + FL_ErrorStatus status = FL_PASS; + /* 入口参数合法性断言 */ + assert_param(IS_LPUART_INSTANCE(LPUARTx)); + /* 外设复位使能 */ + FL_RMU_EnablePeripheralReset(RMU); + if(LPUARTx == LPUART0) + { + /*复位LPUART*/ + FL_RMU_EnableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_LPUART0); + FL_RMU_DisableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_LPUART0); + /* 外设总线时钟关闭 */ + FL_CMU_DisableGroup3BusClock(FL_CMU_GROUP3_BUSCLK_LPUART0); + /* 外设工作时钟关闭 */ + FL_CMU_DisableGroup3OperationClock(FL_CMU_GROUP3_OPCLK_LPUART0); + } + else + if(LPUARTx == LPUART1) + { + /*复位LPUART*/ + FL_RMU_EnableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_LPUART1); + FL_RMU_DisableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_LPUART1); + /* 外设总线时钟关闭 */ + FL_CMU_DisableGroup3BusClock(FL_CMU_GROUP3_BUSCLK_LPUART1); + /* 外设工作时钟关闭 */ + FL_CMU_DisableGroup3OperationClock(FL_CMU_GROUP3_OPCLK_LPUART1); + } + else + if(LPUARTx == LPUART2) + { + /*复位LPUART*/ + FL_RMU_EnableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_LPUART2); + FL_RMU_DisableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_LPUART2); + /* 外设总线时钟关闭 */ + FL_CMU_DisableGroup3BusClock(FL_CMU_GROUP3_BUSCLK_LPUART2); + /* 外设工作时钟关闭 */ + FL_CMU_DisableGroup3OperationClock(FL_CMU_GROUP3_OPCLK_LPUART2); + } + else + { + status = FL_FAIL; + } + /* 锁定外设复位功能 */ + FL_RMU_DisablePeripheralReset(RMU); + return (status); +} + +/** + * @brief 根据需要功能配置LPUART寄存器 + * + * @note 波特率调制寄存器中的MCTL值，默认为工作时钟为32768Hz的频率下的调制值，用户如果外设工作时钟不是此前 + * 提则可能需要手动调整这个寄存器的值，以达到更好的通信效果。 + * @param LPUARTx 外设入口地址 + * @param initStruct 指向一个 @ref FL_LPUART_InitTypeDef类型的结构体，它包含指定LPUART外设的配置信息 + * + * @retval ErrorStatus枚举值 + * -FL_FAIL 配置过程发生错误 + * -FL_PASS LPUART配置成功 + */ +FL_ErrorStatus FL_LPUART_Init(LPUART_Type *LPUARTx, FL_LPUART_InitTypeDef *initStruct) +{ + FL_ErrorStatus status = FL_FAIL; + uint16_t MCTLVel; + /* 参数合法性检查 */ + assert_param(IS_LPUART_INSTANCE(LPUARTx)); + assert_param(IS_FL_LPUART_CLKSRC(initStruct->clockSrc)); + assert_param(IS_FL_LPUART_BAUDRATE(initStruct->baudRate)); + assert_param(IS_FL_LPUART_DATAWIDTH(initStruct->dataWidth)); + assert_param(IS_FL_LPUART_STOPBITS(initStruct->stopBits)); + assert_param(IS_FL_LPUART_PARITY(initStruct->parity)); + assert_param(IS_FL_LPUART_DIRECTION(initStruct->transferDirection)); + if(LPUARTx == LPUART0) + { + /*总线时钟使能*/ + FL_CMU_EnableGroup3BusClock(FL_CMU_GROUP3_BUSCLK_LPUART0); + /*操作时钟使能*/ + FL_CMU_EnableGroup3OperationClock(FL_CMU_GROUP3_OPCLK_LPUART0); + /*时钟源选择*/ + FL_CMU_SetLPUART0ClockSource(initStruct->clockSrc << CMU_OPCCR1_LPUART0CKS_Pos); + } + else + if(LPUARTx == LPUART1) + { + /*总线时钟使能*/ + FL_CMU_EnableGroup3BusClock(FL_CMU_GROUP3_BUSCLK_LPUART1); + /*操作时钟使能*/ + FL_CMU_EnableGroup3OperationClock(FL_CMU_GROUP3_OPCLK_LPUART1); + /*时钟源选择*/ + FL_CMU_SetLPUART1ClockSource(initStruct->clockSrc << CMU_OPCCR1_LPUART1CKS_Pos); + } + else + { + /*总线时钟使能*/ + FL_CMU_EnableGroup3BusClock(FL_CMU_GROUP3_BUSCLK_LPUART2); + /*操作时钟使能*/ + FL_CMU_EnableGroup3OperationClock(FL_CMU_GROUP3_OPCLK_LPUART2); + /*时钟源选择*/ + FL_CMU_SetLPUART2ClockSource(initStruct->clockSrc << CMU_OPCCR1_LPUART2CKS_Pos); + } + if(initStruct->clockSrc == FL_CMU_LPUART_CLK_SOURCE_RCLF)//RCLF时钟 + { + FL_CMU_RCLF_SetPrescaler(FL_CMU_RCLF_PSC_DIV16); + FL_CMU_RCLF_Enable(); + FL_LPUART_DisableBaudRateModulation(LPUARTx); + } + else + { + FL_LPUART_EnableBaudRateModulation(LPUARTx); + } + /*发送接收配置*/ + if(initStruct->transferDirection & FL_LPUART_DIRECTION_TX) + { + do + { + FL_LPUART_EnableTX(LPUARTx); + } while(FL_LPUART_IsEnabledTX(LPUARTx) != FL_SET); + } + if(initStruct->transferDirection & FL_LPUART_DIRECTION_RX) + { + do + { + FL_LPUART_EnableRX(LPUARTx); + } while(FL_LPUART_IsEnabledRX(LPUARTx) != FL_SET); + } + /*配置波特率*/ + FL_LPUART_SetBaudRate(LPUARTx, initStruct->baudRate); + /*配置停止位*/ + FL_LPUART_SetStopBitsWidth(LPUARTx, initStruct->stopBits); + /*配置数据位宽*/ + FL_LPUART_SetDataWidth(LPUARTx, initStruct->dataWidth); + /*配置波特率*/ + FL_LPUART_SetParity(LPUARTx, initStruct->parity); + /*根据波特率配置MCTL值*/ + switch(initStruct->baudRate) + { + case FL_LPUART_BAUDRATE_9600: + MCTLVel = 0x0552; + break; + case FL_LPUART_BAUDRATE_4800: + MCTLVel = 0x1EFB; + break; + case FL_LPUART_BAUDRATE_2400: + MCTLVel = 0x16DB; + break; + case FL_LPUART_BAUDRATE_1200: + MCTLVel = 0x0492; + break; + case FL_LPUART_BAUDRATE_600: + MCTLVel = 0x16D6; + break; + case FL_LPUART_BAUDRATE_300: + MCTLVel = 0x0842; + break; + default: + MCTLVel = 0x0552; + break; + } + FL_LPUART_WriteBitModulation(LPUARTx, MCTLVel); + status = FL_PASS; + return status; +} + +/** + * @brief initStruct 为默认配置 + * @param initStruct 指向需要将值设置为默认配置的结构体 @ref FL_LPUART_InitTypeDef structure + * 结构体 + * @retval None + */ + +void FL_LPUART_StructInit(FL_LPUART_InitTypeDef *initStruct) +{ + initStruct->baudRate = FL_LPUART_BAUDRATE_9600; + initStruct->dataWidth = FL_LPUART_DATA_WIDTH_8B; + initStruct->stopBits = FL_LPUART_STOP_BIT_WIDTH_1B; + initStruct->parity = FL_LPUART_PARITY_NONE ; + initStruct->transferDirection = FL_LPUART_DIRECTION_TX_RX; + initStruct->clockSrc = FL_CMU_LPUART_CLK_SOURCE_LSCLK; +} + +/** + * @} + */ + +#endif /* FL_LPUART_DRIVER_ENABLED */ + +/** + * @} + */ + +/** + * @} + */ + +/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/ + diff --git a/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_pmu.c b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_pmu.c new file mode 100644 index 0000000..0b66181 --- /dev/null +++ b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_pmu.c @@ -0,0 +1,199 @@ + /** + **************************************************************************************************** + * @file fm33lg0xx_fl_pmu.c + * @author FMSH Application Team + * @brief Src file of PMU FL Module + **************************************************************************************************** + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + +/* Includes ------------------------------------------------------------------*/ +#include "fm33lg0xx_fl.h" + +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @addtogroup PMU + * @{ + */ + +#ifdef FL_PMU_DRIVER_ENABLED + +/* Private macros ------------------------------------------------------------*/ +/** @addtogroup UART_FL_Private_Macros + * @{ + */ + + + +#define IS_FL_PMU_INSTANCE(INSTANCE) (((INSTANCE) == PMU)) + +#define IS_FL_PMU_MODE(__VALUE__) (((__VALUE__) == FL_PMU_POWER_MODE_ACTIVE_OR_LPACTIVE)||\ + ((__VALUE__) == FL_PMU_POWER_MODE_LPRUN_ONLY)||\ + ((__VALUE__) == FL_PMU_POWER_MODE_SLEEP_OR_DEEPSLEEP)) + +#define IS_FL_PMU_COREVOLTAGESCALING(__VALUE__) (((__VALUE__) == FL_DISABLE)||\ + ((__VALUE__) == FL_ENABLE)) + +#define IS_FL_PMU_DEEPSLEEP(__VALUE__) (((__VALUE__) == FL_PMU_SLEEP_MODE_DEEP)||\ + ((__VALUE__) == FL_PMU_SLEEP_MODE_NORMAL)) + +#define IS_FL_PMU_WAKEUPFREQUENCY(__VALUE__) (((__VALUE__) == FL_PMU_RCHF_WAKEUP_FREQ_8MHZ)||\ + ((__VALUE__) == FL_PMU_RCHF_WAKEUP_FREQ_16MHZ)||\ + ((__VALUE__) == FL_PMU_RCHF_WAKEUP_FREQ_24MHZ)) + +#define IS_FL_PMU_LDOLOWMODE(__VALUE__) (((__VALUE__) == FL_PMU_LDO_LPM_DISABLE)||\ + ((__VALUE__) == FL_PMU_LDO_LPM_ENABLE)) + +#define IS_FL_PMU_WAKEUPDELAY(__VALUE__) (((__VALUE__) == FL_PMU_WAKEUP_DELAY_0US)||\ + ((__VALUE__) == FL_PMU_WAKEUP_DELAY_2US)||\ + ((__VALUE__) == FL_PMU_WAKEUP_DELAY_4US)||\ + ((__VALUE__) == FL_PMU_WAKEUP_DELAY_8US)) + +/** + *@} + */ + +/* Exported functions --------------------------------------------------------*/ +/** @addtogroup PMU_FL_EF_Init + * @{ + */ + +/** + * @brief 复位pmu外设 + * + * @param 外设入口地址 + * + * @retval 返回错误状态，可能值: + * -FL_PASS 外设寄存器值回复复位值 + * -FL_FAIL 位成功执行 + */ +FL_ErrorStatus FL_PMU_Sleep_DeInit(PMU_Type *PMUx) +{ + FL_ErrorStatus status = FL_FAIL; + /* 参数合法性检测 */ + assert_param(IS_FL_PMU_INSTANCE(PMUx)); + PMUx->CR = 0x00060000U; + PMUx->WKTR = 0xC0000001U; + PMUx->IER = 0x00000000U; + status = FL_PASS; + return status; +} + + +/** + * @brief 根据lpm_initstruct结构体包含的配置信息配置pmu寄存器 + * + * @note 为更好的睡眠功耗用户可能需要根据实际应用，调用 @ref fm33lg0xx_fl_pmu.h中的其他接口 + * 来完成睡眠前的模式配置，包括睡眠行为和唤醒后的行为(注：此函数会关闭BOR) + * @param PMUx 外设入口地址 + * @param LPM_InitStruct 指向一个 @ref FL_PMU_SleepInitTypeDef 类型的结构体，它包含指定PMU外设的配置信息 + * + * @retval ErrorStatus枚举值 + * -FL_FAIL 配置过程发生错误 + * -FL_PASS PMU配置成功 + */ +FL_ErrorStatus FL_PMU_Sleep_Init(PMU_Type *PMUx, FL_PMU_SleepInitTypeDef *LPM_InitStruct) +{ + FL_ErrorStatus status = FL_FAIL; + /* 参数合法性检查 */ + assert_param(IS_FL_PMU_INSTANCE(PMUx)); + assert_param(IS_FL_PMU_MODE(LPM_InitStruct->powerMode)); + assert_param(IS_FL_PMU_COREVOLTAGESCALING(LPM_InitStruct->coreVoltageScaling)); + assert_param(IS_FL_PMU_LDOLOWMODE(LPM_InitStruct->LDOLowPowerMode)); + assert_param(IS_FL_PMU_DEEPSLEEP(LPM_InitStruct->deepSleep)); + assert_param(IS_FL_PMU_WAKEUPFREQUENCY(LPM_InitStruct->wakeupFrequency)); + assert_param(IS_FL_PMU_WAKEUPDELAY(LPM_InitStruct->wakeupDelay)); + /* 唤醒时间 */ + FL_PMU_SetWakeupDelay(PMUx, LPM_InitStruct->wakeupDelay); + /* 唤醒后RCHF的频率 */ + FL_PMU_SetRCHFWakeupFrequency(PMUx, LPM_InitStruct->wakeupFrequency); + /* 睡眠下内核电压配置 */ + if(LPM_InitStruct->coreVoltageScaling == FL_ENABLE) + { + FL_PMU_EnableCoreVoltageScaling(PMUx); + } + else + { + FL_PMU_DisableCoreVoltageScaling(PMUx); + } + /* LDO低功耗配置 */ + FL_PMU_SetLDOLowPowerMode(PMUx,LPM_InitStruct->LDOLowPowerMode); + /* M0系统控制器，一般配置为0即可*/ + SCB->SCR = 0; + /* 睡眠模式 */ + FL_PMU_SetSleepMode(PMUx, LPM_InitStruct->deepSleep); + + status = FL_PASS; + return status; +} + +/** + * @brief LPM_InitStruct 为默认配置 + * @param LPM_InitStruct 指向需要将值设置为默认配置的结构体 @ref FL_PMU_SleepInitTypeDef structure + * 结构体 + * @retval None + */ +void FL_PMU_StructInit(FL_PMU_SleepInitTypeDef *LPM_InitStruct) +{ + LPM_InitStruct->powerMode = FL_PMU_POWER_MODE_SLEEP_OR_DEEPSLEEP; + LPM_InitStruct->deepSleep = FL_PMU_SLEEP_MODE_NORMAL; + LPM_InitStruct->LDOLowPowerMode = FL_PMU_LDO_LPM_DISABLE; + LPM_InitStruct->wakeupFrequency = FL_PMU_RCHF_WAKEUP_FREQ_8MHZ; + LPM_InitStruct->wakeupDelay = FL_PMU_WAKEUP_DELAY_2US; + LPM_InitStruct->coreVoltageScaling = FL_DISABLE; +} + +/** + * @} + */ + +#endif /* FL_PMU_DRIVER_ENABLED */ + +/** + * @} + */ + +/** + * @} + */ + +/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/ + diff --git a/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_rng.c b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_rng.c new file mode 100644 index 0000000..e2bd6db --- /dev/null +++ b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_rng.c @@ -0,0 +1,226 @@ + /** + ******************************************************************************************************* + * @file fm33lg0xx_fl_rng.c + * @author FMSH Application Team + * @brief Src file of RNG FL Module + ******************************************************************************************************* + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + + +/* Includes ------------------------------------------------------------------*/ +#include "fm33lg0xx_fl.h" + +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @addtogroup RNG + * @{ + */ + +#ifdef FL_RNG_DRIVER_ENABLED + +/* Private macros ------------------------------------------------------------*/ +/** @addtogroup RNG_FL_Private_Macros +* @{ +*/ +#define IS_FL_RNG_INSTANCE(INTANCE) ((INTANCE) == RNG) + +#define IS_FL_RNG_CLOCK_PRESCALER(__VALUE__) (((__VALUE__) == FL_CMU_RNG_PSC_DIV1)||\ + ((__VALUE__) == FL_CMU_RNG_PSC_DIV2)||\ + ((__VALUE__) == FL_CMU_RNG_PSC_DIV4)||\ + ((__VALUE__) == FL_CMU_RNG_PSC_DIV8)||\ + ((__VALUE__) == FL_CMU_RNG_PSC_DIV16)||\ + ((__VALUE__) == FL_CMU_RNG_PSC_DIV32)) +/** + *@} + */ + +/* Exported functions --------------------------------------------------------*/ +/** @addtogroup RNG_FL_EF_Init + * @{ + */ +/** + * @brief 复位对应RNG寄存器. + * + * @param RNGx 外设入口地址 + * + * @retval ErrorStatus枚举值 + * -FL_PASS 配置成功 + * -FL_FAIL 配置过程发生错误 + */ +FL_ErrorStatus FL_RNG_DeInit(RNG_Type *RNGx) +{ + assert_param(IS_FL_RNG_INSTANCE(RNGx)); + /* 使能外设复位 */ + FL_RMU_EnablePeripheralReset(RMU); + /* 复位外设寄存器 */ + FL_RMU_EnableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_RNG); + FL_RMU_DisableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_RNG); + /* 关闭外设总线始时钟和工作时钟 */ + FL_CMU_DisableGroup2BusClock(FL_CMU_GROUP2_BUSCLK_RNG); + /* 锁定外设复位 */ + FL_RMU_DisablePeripheralReset(RMU); + return FL_PASS; +} +/** + * @brief 根据 InitStruct 的配置信息初始化对应外设入口地址的寄存器值. + * @param RNGx 外设入口地址 + * + * @param initStruct 指向一个 @ref FL_RNG_InitTypeDef 结构体 其中包含了外设的相关配置信息. + * + * @note RNG使用RCHF默认的8M作为时钟输入，经2分频后4M提供给RNG + * + * @retval ErrorStatus枚举值 + * -FL_PASS 配置成功 + * -FL_FAIL 配置过程发生错误 + */ +FL_ErrorStatus FL_RNG_Init(RNG_Type *RNGx) +{ + assert_param(IS_FL_RNG_INSTANCE(RNGx)); + /* RNG 使用RCHF作为工作时钟因此必须确认RCHF使能*/ + if(FL_CMU_RCHF_IsEnabled() != FL_SET) + { + FL_CMU_RCHF_Enable(); + } + /* RNG 总线时钟使能 */ + FL_CMU_EnableGroup2BusClock(FL_CMU_GROUP2_BUSCLK_RNG); + /* RNG 工作时钟预分频*/ + switch(FL_CMU_GetRCHFClockFreq()) + { + case FL_CMU_RCHF_FREQUENCY_8MHZ: + FL_CMU_SetRNGPrescaler(FL_CMU_RNG_PSC_DIV2); + break; + case FL_CMU_RCHF_FREQUENCY_16MHZ: + FL_CMU_SetRNGPrescaler(FL_CMU_RNG_PSC_DIV4); + break; + case FL_CMU_RCHF_FREQUENCY_24MHZ: + FL_CMU_SetRNGPrescaler(FL_CMU_RNG_PSC_DIV8); + break; + case FL_CMU_RCHF_FREQUENCY_32MHZ: + FL_CMU_SetRNGPrescaler(FL_CMU_RNG_PSC_DIV8); + break; + default: + FL_CMU_SetRNGPrescaler(FL_CMU_RNG_PSC_DIV2); + break; + } + /* RNG 工作时钟使能*/ + FL_CMU_EnableGroup3OperationClock(FL_CMU_GROUP3_OPCLK_RNG); + return FL_PASS; +} + +/** + * @brief 获取一次随机数 + * + * @param None + * + * @note 如果返回值为0xFFFFFFFF 则说明随机数生成失败，请用户检查此函数的返回值，失败时重新生成 + * + * @retval 成功返回随机数，失败返回0xFFFFFFFF + * + */ +uint32_t GetRandomNumber(void) +{ + uint32_t rn32; + FL_RNG_ClearFlag_RandomFail(RNG); + FL_RNG_Enable(RNG); + /* 由于LFSR循环移位周期是32cycle，为保证随机数质量，应用应保证两次读取RNGOUT之间的间隔大于32个TRNG_CLK周期 */ + FL_DelayUs(12); + FL_RNG_Disable(RNG); + rn32 = FL_RNG_ReadData(RNG); + if(FL_RNG_IsActiveFlag_RandomFail(RNG)) + { + FL_RNG_ClearFlag_RandomFail(RNG); + return 0xFFFFFFFF; + } + return rn32; +} + +/** + * @brief 获取CRC32 + * + * @param dataIn 待计算的数据 + * + * @note None + * + * @retval 成功返回CRC32，失败返回0xFFFFFFFF + * + */ +uint32_t GetCrc32(uint32_t dataIn) +{ + uint32_t i = 0; + uint32_t crc32 = 0; + FL_RNG_CRC_WriteData(RNG, dataIn); + FL_RNG_ClearFlag_CRCComplete(RNG); + FL_RNG_CRC_Enable(RNG); + while(0 == FL_RNG_IsActiveFlag_CRCComplete(RNG)) + { + i++; + if(i > 600) + { break; } + } + if(i >= 600) + { + FL_RNG_ClearFlag_CRCComplete(RNG); + FL_RNG_Disable(RNG); + return 0xFFFFFFFF; + } + FL_RNG_ClearFlag_CRCComplete(RNG); + crc32 = FL_RNG_ReadData(RNG); + FL_RNG_Disable(RNG); + return crc32; +} + +/** + * @} + */ + +#endif /* FL_RNG_DRIVER_ENABLED */ + +/** + * @} + */ + +/** + * @} + */ + +/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/ + diff --git a/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_rtca.c b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_rtca.c new file mode 100644 index 0000000..ab4e7e2 --- /dev/null +++ b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_rtca.c @@ -0,0 +1,212 @@ + /** + ******************************************************************************************************* + * @file fm33lg0xx_fl_rtca.c + * @author FMSH Application Team + * @brief Src file of RTCA FL Module + ******************************************************************************************************* + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + +/* Includes ------------------------------------------------------------------*/ +#include "fm33lg0xx_fl.h" + +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @addtogroup RTCA + * @{ + */ + +#ifdef FL_RTCA_DRIVER_ENABLED + +/* Private macros ------------------------------------------------------------*/ +/** @addtogroup RTCA_FL_Private_Macros + * @{ + */ +#define IS_RTCA_INSTANCE(RTCAx) ((RTCAx) == RTCA) + +/** + * @} + */ + +/* Exported functions --------------------------------------------------------*/ +/** @addtogroup RTCA_FL_EF_Init + * @{ + */ +/** + * @brief 复位对应RTCAx寄存器. + * @param RTCAx + * @retval ErrorStatus枚举值: + * -FL_PASS 外设寄存器值恢复复位值 + * -FL_FAIL 未成功执行 + */ +FL_ErrorStatus FL_RTCA_DeInit(RTCA_Type *RTCAx) +{ + FL_ErrorStatus result = FL_PASS; + /* Check the parameters */ + assert_param(IS_RTCA_INSTANCE(RTCAx)); + RTCAx->IER = 0x00000000U; + RTCAx->WER = 0xACACACACU; + RTCAx->ADJUST = 0x00000000U; + RTCAx->ADSIGN = 0x00000000U; + RTCAx->ALARM = 0x00000000U; + RTCAx->BCDDAY = 0x00000000U; + RTCAx->BCDHOUR = 0x00000000U; + RTCAx->BCDMIN = 0x00000000U; + RTCAx->BCDMONTH = 0x00000000U; + RTCAx->BCDSEC = 0x00000000U; + RTCAx->BCDWEEK = 0x00000000U; + RTCAx->BCDYEAR = 0x00000000U; + RTCAx->SBSCNT = 0x00000000U; + RTCAx->TMSEL = 0x00000000U; + RTCAx->CR = 0x00000000U; + RTCAx->WER = 0x00000000U; + return result; +} +/** + * @brief 配置实时时钟相关. + * @param RTCAx Timer Instance + * @param initStruct 指向一个 @ref FL_RTCA_InitTypeDef(时基配置结构体) + * @retval ErrorStatus枚举值 + * -FL_FAIL 配置过程发生错误 + * -FL_PASS 成功 + */ +FL_ErrorStatus FL_RTCA_Init(RTCA_Type *RTCAx, FL_RTCA_InitTypeDef *initStruct) +{ + /* 参数检查 */ + assert_param(IS_RTCA_INSTANCE(RTCAx)); + /* 时钟总线使能配置 */ + FL_CMU_EnableGroup1BusClock(FL_CMU_GROUP1_BUSCLK_RTCA); + /* 配置时间 */ + FL_RTCA_ConfigTime(RTCAx, initStruct); + return FL_PASS; +} + +/** + * @brief 设置实时时钟 + * @param RTCAx Timer Instance + * @param initStruct 指向一个 @ref FL_RTCA_InitTypeDef(时基配置结构体) + * @retval ErrorStatus枚举值 + * -FL_FAIL 配置过程发生错误 + * -FL_PASS 成功 + */ +FL_ErrorStatus FL_RTCA_ConfigTime(RTCA_Type *RTCAx, FL_RTCA_InitTypeDef *initStruct) +{ + /* 使能时间配置 */ + FL_RTCA_WriteEnable(RTCAx); + /* 配置秒 */ + FL_RTCA_WriteSecond(RTCAx, initStruct->second); + /* 配置分钟 */ + FL_RTCA_WriteMinute(RTCAx, initStruct->minute); + /* 配置小时 */ + FL_RTCA_WriteHour(RTCAx, initStruct->hour); + /* 配置日期 */ + FL_RTCA_WriteDay(RTCAx, initStruct->day); + /* 配置周 */ + FL_RTCA_WriteWeek(RTCAx, initStruct->week); + /* 配置月 */ + FL_RTCA_WriteMonth(RTCAx, initStruct->month); + /* 配置年 */ + FL_RTCA_WriteYear(RTCAx, initStruct->year); + /* 锁定时间配置 */ + FL_RTCA_WriteDisable(RTCAx); + return FL_PASS; +} +/** + * @brief 获取实时时间并保存到指定结构体中 + * @param RTCAx Timer Instance + * @param initStruct 指向一个 @ref FL_RTCA_InitTypeDef(时基配置结构体) + * @retval ErrorStatus枚举值 + * -FL_FAIL 配置过程发生错误 + * -FL_PASS 成功 + */ +FL_ErrorStatus FL_RTCA_GetTime(RTCA_Type *RTCAx, FL_RTCA_InitTypeDef *initStruct) +{ + /* 配置秒 */ + initStruct->second = FL_RTCA_ReadSecond(RTCAx); + /* 配置分钟 */ + initStruct->minute = FL_RTCA_ReadMinute(RTCAx); + /* 配置小时 */ + initStruct->hour = FL_RTCA_ReadHour(RTCAx); + /* 配置日期 */ + initStruct->day = FL_RTCA_ReadDay(RTCAx); + /* 配置周 */ + initStruct->week = FL_RTCA_ReadWeek(RTCAx); + /* 配置月 */ + initStruct->month = FL_RTCA_ReadMonth(RTCAx); + /* 配置年 */ + initStruct->year = FL_RTCA_ReadYear(RTCAx); + return FL_PASS; +} +/** + * @brief 设置 initStruct 为默认配置 + * @param initStruct 指向需要将值设置为默认配置的结构体 @ref FL_RTCA_InitTypeDef 结构体 + * + * @retval None + */ + +void FL_RTCA_StructInit(FL_RTCA_InitTypeDef *initStruct) +{ + /* */ + initStruct->year = 0x00; + initStruct->month = 0x00; + initStruct->day = 0x00; + initStruct->week = 0x00; + initStruct->hour = 0x00; + initStruct->minute = 0x00; + initStruct->second = 0x00; +} + +/** + * @} + */ + +#endif /* FL_RTCA_DRIVER_ENABLED */ + +/** + * @} + */ + +/** + * @} + */ + +/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/ + diff --git a/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_spi.c b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_spi.c new file mode 100644 index 0000000..aedb1e8 --- /dev/null +++ b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_spi.c @@ -0,0 +1,254 @@ + /** + ******************************************************************************************************* + * @file fm33lg0xx_fl_spi.c + * @author FMSH Application Team + * @brief Src file of SPI FL Module + ******************************************************************************************************* + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + +/* Includes ------------------------------------------------------------------*/ +#include "fm33lg0xx_fl.h" + +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @addtogroup SPI + * @{ + */ + +#ifdef FL_SPI_DRIVER_ENABLED + +/* Private macros ------------------------------------------------------------*/ +/** @addtogroup SPI_FL_Private_Macros + * @{ + */ +#define IS_FL_SPI_INSTANCE(INTANCE) (((INTANCE) == SPI0)||\ + ((INTANCE) == SPI1)||\ + ((INTANCE) == SPI2)) + +#define IS_FL_SPI_MODE(__VALUE__) (((__VALUE__) == FL_SPI_WORK_MODE_SLAVE)||\ + ((__VALUE__) == FL_SPI_WORK_MODE_MASTER)) + +#define IS_FL_SPI_BITORDER(__VALUE__) (((__VALUE__) == FL_SPI_BIT_ORDER_MSB_FIRST)||\ + ((__VALUE__) == FL_SPI_BIT_ORDER_LSB_FIRST)) + +#define IS_FL_SPI_DATAWIDT(__VALUE__) (((__VALUE__) == FL_SPI_DATA_WIDTH_8B)||\ + ((__VALUE__) == FL_SPI_DATA_WIDTH_16B)||\ + ((__VALUE__) == FL_SPI_DATA_WIDTH_24B)||\ + ((__VALUE__) == FL_SPI_DATA_WIDTH_32B)) + +#define IS_FL_SPI_CLOCK_PHASE(__VALUE__) (((__VALUE__) == FL_SPI_PHASE_EDGE1)||\ + ((__VALUE__) == FL_SPI_PHASE_EDGE2)) + +#define IS_FL_SPI_CLOCK_POLARITY(__VALUE__) (((__VALUE__) == FL_SPI_POLARITY_NORMAL)||\ + ((__VALUE__) == FL_SPI_POLARITY_INVERT)) + +#define IS_FL_SPI_BAUDRATE(__VALUE__) (((__VALUE__) == FL_SPI_BAUDRATE_DIV2)||\ + ((__VALUE__) == FL_SPI_BAUDRATE_DIV4)||\ + ((__VALUE__) == FL_SPI_BAUDRATE_DIV8)||\ + ((__VALUE__) == FL_SPI_BAUDRATE_DIV16)||\ + ((__VALUE__) == FL_SPI_BAUDRATE_DIV32)||\ + ((__VALUE__) == FL_SPI_BAUDRATE_DIV64)||\ + ((__VALUE__) == FL_SPI_BAUDRATE_DIV128)||\ + ((__VALUE__) == FL_SPI_BAUDRATE_DIV256)) + + +#define IS_FL_SPI_TANSFERMODE(__VALUE__) (((__VALUE__) == FL_SPI_TRANSFER_MODE_FULL_DUPLEX)||\ + ((__VALUE__) == FL_SPI_TRANSFER_MODE_HALF_DUPLEX)) + + +/** + * @} + */ + +/* Exported functions --------------------------------------------------------*/ +/** @addtogroup SPI_FL_EF_Init + * @{ + */ + +/** + * @brief 复位对应SPI寄存器. + * @param SPIx + * @retval ErrorStatus枚举值: + * -FL_PASS 外设寄存器值恢复复位值 + * -FL_FAIL 未成功执行 + */ +FL_ErrorStatus FL_SPI_DeInit(SPI_Type *SPIx) +{ + assert_param(IS_FL_SPI_INSTANCE(SPIx)); + /* 使能外设复位 */ + FL_RMU_EnablePeripheralReset(RMU); + if(SPIx == SPI0) + { + /* 复位SPI外设寄存器 */ + FL_RMU_EnableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_SPI0); + FL_RMU_DisableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_SPI0); + /* 关闭外设总线始时钟和工作时钟 */ + FL_CMU_DisableGroup3BusClock(FL_CMU_GROUP3_BUSCLK_SPI0); + } + else + if(SPIx == SPI1) + { + /* 复位SPI外设寄存器 */ + FL_RMU_EnableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_SPI1); + FL_RMU_DisableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_SPI1); + /* 关闭外设总线始时钟和工作时钟 */ + FL_CMU_DisableGroup3BusClock(FL_CMU_GROUP3_BUSCLK_SPI1); + } + else + if(SPIx == SPI2) + { + /* 复位SPI外设寄存器 */ + FL_RMU_EnableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_SPI2); + FL_RMU_DisableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_SPI2); + /* 关闭外设总线始时钟和工作时钟 */ + FL_CMU_DisableGroup3BusClock(FL_CMU_GROUP3_BUSCLK_SPI2); + } + else + { + FL_RMU_DisablePeripheralReset(RMU); + return FL_FAIL; + } + /* 锁定外设复位 */ + FL_RMU_DisablePeripheralReset(RMU); + return FL_PASS; +} +/** + * @brief 根据 SPI_InitStruct 的配置信息初始化对应外设入口地址的寄存器值. + * @param SPIx SPIx + * @param SPI_InitStruct 指向一个 @ref FL_SPI_InitTypeDef 结构体 + * 其中包含了外设的相关配置信息. + * @retval ErrorStatus枚举值 + * -FL_FAIL 配置过程发生错误 + * -FL_PASS SPI配置成功 + */ +FL_ErrorStatus FL_SPI_Init(SPI_Type *SPIx, FL_SPI_InitTypeDef *initStruct) +{ + assert_param(IS_FL_SPI_INSTANCE(SPIx)); + assert_param(IS_FL_SPI_MODE(initStruct->mode)); + assert_param(IS_FL_SPI_BITORDER(initStruct->bitOrder)); + assert_param(IS_FL_SPI_DATAWIDT(initStruct->dataWidth)); + assert_param(IS_FL_SPI_BAUDRATE(initStruct->baudRate)); + assert_param(IS_FL_SPI_CLOCK_PHASE(initStruct->clockPhase)); + assert_param(IS_FL_SPI_CLOCK_POLARITY(initStruct->clockPolarity)); + if(SPIx == SPI0) + { + /* 外设总线始时钟 */ + FL_CMU_EnableGroup3BusClock(FL_CMU_GROUP3_BUSCLK_SPI0); + } + else + if(SPIx == SPI1) + { + /* 外设总线始时钟 */ + FL_CMU_EnableGroup3BusClock(FL_CMU_GROUP3_BUSCLK_SPI1); + } + else + if(SPIx == SPI2) + { + /* 外设总线始时钟 */ + FL_CMU_EnableGroup3BusClock(FL_CMU_GROUP3_BUSCLK_SPI2); + } + else + { + return FL_FAIL; + } + /* 选择NSS脚控制模式 */ + if(initStruct->softControl == FL_ENABLE) + { + FL_SPI_EnableSSNSoftControl(SPIx); + } + else + { + FL_SPI_DisableSSNSoftControl(SPIx); + } + /* 外设工作主从模式 */ + FL_SPI_SetWorkMode(SPIx, initStruct->mode); + /* 总线通讯速率 */ + FL_SPI_SetClockDivision(SPIx, initStruct->baudRate); + /* 数据bit方向 */ + FL_SPI_SetBitOrder(SPIx, initStruct->bitOrder); + /* 总线数据位宽 */ + FL_SPI_SetDataWidth(SPIx, initStruct->dataWidth); + /* 时钟相位 */ + FL_SPI_SetClockPhase(SPIx, initStruct->clockPhase); + /* 传输模式 双工半双工 */ + FL_SPI_SetTransferMode(SPIx, initStruct->transferMode); + /* 时钟极性 */ + FL_SPI_SetClockPolarity(SPIx, initStruct->clockPolarity); + /* 使能 外设*/ + FL_SPI_Enable(SPIx); + return FL_PASS; +} +/** + * @brief 设置 SPI_InitStruct 为默认配置 + * @param SPI_InitStruct 指向需要将值设置为默认配置的结构体 @ref FL_SPI_InitTypeDef 结构体 + * + * @retval None + */ + +void FL_SPI_StructInit(FL_SPI_InitTypeDef *initStruct) +{ + initStruct->softControl = FL_DISABLE; + initStruct->mode = FL_SPI_WORK_MODE_MASTER; + initStruct->baudRate = FL_SPI_CLK_DIV8; + initStruct->bitOrder = FL_SPI_BIT_ORDER_MSB_FIRST; + initStruct->dataWidth = FL_SPI_DATA_WIDTH_8B; + initStruct->clockPolarity = FL_SPI_POLARITY_NORMAL; + initStruct->clockPhase = FL_SPI_PHASE_EDGE1; + initStruct->transferMode = FL_SPI_TRANSFER_MODE_FULL_DUPLEX; +} + +/** + * @} + */ + +#endif /* FL_SPI_DRIVER_ENABLED */ + +/** + * @} + */ + +/** + * @} + */ + +/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/ + diff --git a/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_svd.c b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_svd.c new file mode 100644 index 0000000..cae5be6 --- /dev/null +++ b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_svd.c @@ -0,0 +1,216 @@ + /** + **************************************************************************************************** + * @file fm33lg0xx_fl_svd.c + * @author FMSH Application Team + * @brief Src file of SVD FL Module + **************************************************************************************************** + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + +/* Includes ------------------------------------------------------------------*/ +#include "fm33lg0xx_fl.h" + +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @addtogroup SVD + * @{ + */ + +#ifdef FL_SVD_DRIVER_ENABLED + +/* Private macros ------------------------------------------------------------*/ +/** @addtogroup SVD_FL_Private_Macros + * @{ + */ + +#define IS_SVD_INSTANCE(INSTANCE) (((INSTANCE) == SVD)) + +#define IS_FL_SVD_REFERENCE_VOLTAGE(__VALUE__) (((__VALUE__) == FL_SVD_REFERENCE_1P0V)||\ + ((__VALUE__) == FL_SVD_REFERENCE_0P95V)||\ + ((__VALUE__) == FL_SVD_REFERENCE_0P9V)) + +#define IS_FL_SVD_WARNING_THRESHOLD_LEVEL(__VALUE__) (((__VALUE__) == FL_SVD_WARNING_THRESHOLD_GROUP0)||\ + ((__VALUE__) == FL_SVD_WARNING_THRESHOLD_GROUP1)||\ + ((__VALUE__) == FL_SVD_WARNING_THRESHOLD_GROUP2)||\ + ((__VALUE__) == FL_SVD_WARNING_THRESHOLD_GROUP3)||\ + ((__VALUE__) == FL_SVD_WARNING_THRESHOLD_GROUP4)||\ + ((__VALUE__) == FL_SVD_WARNING_THRESHOLD_GROUP5)||\ + ((__VALUE__) == FL_SVD_WARNING_THRESHOLD_GROUP6)||\ + ((__VALUE__) == FL_SVD_WARNING_THRESHOLD_GROUP7)||\ + ((__VALUE__) == FL_SVD_WARNING_THRESHOLD_GROUP8)||\ + ((__VALUE__) == FL_SVD_WARNING_THRESHOLD_GROUP9)||\ + ((__VALUE__) == FL_SVD_WARNING_THRESHOLD_GROUP10)||\ + ((__VALUE__) == FL_SVD_WARNING_THRESHOLD_GROUP11)||\ + ((__VALUE__) == FL_SVD_WARNING_THRESHOLD_GROUP12)||\ + ((__VALUE__) == FL_SVD_WARNING_THRESHOLD_GROUP13)||\ + ((__VALUE__) == FL_SVD_WARNING_THRESHOLD_GROUP14)||\ + ((__VALUE__) == FL_SVD_WARNING_THRESHOLD_GROUP15)) + +#define IS_FL_SVD_WORK_MODE(__VALUE__) (((__VALUE__) == FL_SVD_WORK_MODE_CONTINUOUS)||\ + ((__VALUE__) == FL_SVD_WORK_MODE_PERIODIC)) + +#define IS_FL_SVD_ENABLE_PERIOD(__VALUE__) (((__VALUE__) == FL_SVD_ENABLE_PERIOD_62P5MS)||\ + ((__VALUE__) == FL_SVD_ENABLE_PERIOD_256MS)||\ + ((__VALUE__) == FL_SVD_ENABLE_PERIOD_1000MS)||\ + ((__VALUE__) == FL_SVD_ENABLE_PERIOD_4000MS)) + +/** + * @} + */ + +/* Exported functions --------------------------------------------------------*/ +/** @addtogroup SVD_FL_EF_Init + * @{ + */ + +/** + * @brief 复位SVD外设 + * @param 外设入口地址 + * @retval 返回错误状态，可能值： + * -FL_PASS 外设寄存器值恢复复位值 + * -FL_FAIL 未成功执行 + */ +FL_ErrorStatus FL_SVD_DeInit(SVD_Type *SVDx) +{ + /* 参数检查 */ + assert_param(IS_SVD_INSTANCE(SVDx)); + /* 使能复位 */ + FL_RMU_EnablePeripheralReset(RMU); + /* 复位外设寄存器 */ + FL_RMU_EnableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_SVD); + FL_RMU_DisableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_SVD); + /* 关闭外设总线时钟 */ + FL_CMU_DisableGroup1BusClock(FL_CMU_GROUP1_BUSCLK_SVD); + /* 关闭复位 */ + FL_RMU_DisablePeripheralReset(RMU); + return FL_PASS; +} + +/** + * @brief 根据需要功能配置SVD寄存器 + * + * @param SVDx 外设入口地址 + * @param init @ref FL_SVD_InitTypeDef类型的结构体 + * + * @retval ErrorStatus枚举值 + * -FL_FAIL 配置过程发生错误 + * -FL_PASS SVD配置成功 + */ +FL_ErrorStatus FL_SVD_Init(SVD_Type *SVDx, FL_SVD_InitTypeDef *init) +{ + /* 参数检查 */ + assert_param(IS_SVD_INSTANCE(SVDx)); + assert_param(IS_FL_SVD_REFERENCE_VOLTAGE(init->referenceVoltage)); + assert_param(IS_FL_SVD_WARNING_THRESHOLD_LEVEL(init->warningThreshold)); + assert_param(IS_FL_SVD_WORK_MODE(init->workMode)); + assert_param(IS_FL_SVD_ENABLE_PERIOD(init->enablePeriod)); + /* 开启SVD时钟 */ + if(SVDx == SVD) + { + FL_CMU_EnableGroup1BusClock(FL_CMU_GROUP1_BUSCLK_SVD); + } + else + { + return FL_FAIL; + } + /* 设置参考基准 */ + FL_SVD_EnableReference(SVDx, init->referenceVoltage); + /* 设置报警阈值 */ + FL_SVD_SetWarningThreshold(SVDx, init->warningThreshold); + /* 数字滤波 */ + if(init->digitalFilter == FL_ENABLE) + { + FL_SVD_EnableDigitalFilter(SVDx); + } + else + { + FL_SVD_DisableDigitalFilter(SVDx); + } + /* 工作模式 */ + FL_SVD_SetWorkMode(SVDx, init->workMode); + if(init->workMode == FL_SVD_WORK_MODE_PERIODIC) + { + /* 间歇使能间隔 */ + FL_SVD_SetEnablePeriod(SVDx, init->enablePeriod); + } + /* SVS通道 */ + if(init->SVSChannel == FL_ENABLE) + { + FL_SVD_EnableSVSChannel(SVDx); + } + else + { + FL_SVD_DisableSVSChannel(SVDx); + } + return FL_PASS; +} + +/** + * @brief 设置 SVD_InitStruct 为默认配置 + * @param init @ref FL_SVD_InitTypeDef类型的结构体 + * + * @retval None + */ +void FL_SVD_StructInit(FL_SVD_InitTypeDef *init) +{ + init->referenceVoltage = FL_SVD_REFERENCE_1P0V; + init->SVSChannel = FL_DISABLE; + init->digitalFilter = FL_DISABLE; + init->workMode = FL_SVD_WORK_MODE_CONTINUOUS; + init->enablePeriod = FL_SVD_ENABLE_PERIOD_62P5MS; + init->warningThreshold = FL_SVD_WARNING_THRESHOLD_GROUP0; +} + +/** + * @} + */ + +#endif /* FL_SVD_DRIVER_ENABLED */ + +/** + * @} + */ + +/** + * @} + */ + +/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/ diff --git a/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_uart.c b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_uart.c new file mode 100644 index 0000000..3010442 --- /dev/null +++ b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_uart.c @@ -0,0 +1,400 @@ + /** + **************************************************************************************************** + * @file fm33lg0xx_fl_uart.c + * @author FMSH Application Team + * @brief Src file of UART FL Module + **************************************************************************************************** + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + +/* Includes ------------------------------------------------------------------*/ +#include "fm33lg0xx_fl.h" + +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @addtogroup UART + * @{ + */ + +#ifdef FL_UART_DRIVER_ENABLED + +/* Private macros ------------------------------------------------------------*/ +/** @addtogroup UART_FL_Private_Macros + * @{ + */ + + +#define IS_UART_INSTANCE(INSTANCE) (((INSTANCE) == UART0)||\ + ((INSTANCE) == UART1)||\ + ((INSTANCE) == UART3)||\ + ((INSTANCE) == UART4)||\ + ((INSTANCE) == UART5)) + +#define IS_FL_UART_CLKSRC(__VALUE__) (((__VALUE__) == FL_CMU_UART0_CLK_SOURCE_APBCLK)||\ + ((__VALUE__) == FL_CMU_UART0_CLK_SOURCE_RCHF)||\ + ((__VALUE__) == FL_CMU_UART0_CLK_SOURCE_SYSCLK)||\ + ((__VALUE__) == FL_CMU_UART0_CLK_SOURCE_XTHF)||\ + ((__VALUE__) == FL_CMU_UART1_CLK_SOURCE_APBCLK)||\ + ((__VALUE__) == FL_CMU_UART1_CLK_SOURCE_RCHF)||\ + ((__VALUE__) == FL_CMU_UART1_CLK_SOURCE_SYSCLK)||\ + ((__VALUE__) == FL_CMU_UART1_CLK_SOURCE_XTHF)) + + +#define IS_FL_UART_DATAWIDTH(__VALUE__) (((__VALUE__) == FL_UART_DATA_WIDTH_6B)||\ + ((__VALUE__) == FL_UART_DATA_WIDTH_7B)||\ + ((__VALUE__) == FL_UART_DATA_WIDTH_8B)||\ + ((__VALUE__) == FL_UART_DATA_WIDTH_9B)) + +#define IS_FL_UART_STOPBITS(__VALUE__) (((__VALUE__) == FL_UART_STOP_BIT_WIDTH_1B)||\ + ((__VALUE__) == FL_UART_STOP_BIT_WIDTH_2B)) + +#define IS_FL_UART_PARITY(__VALUE__) (((__VALUE__) == FL_UART_PARITY_NONE)||\ + ((__VALUE__) == FL_UART_PARITY_EVEN)||\ + ((__VALUE__) == FL_UART_PARITY_ODD)) + +#define IS_FL_UART_DIRECTION(__VALUE__) (((__VALUE__) == FL_UART_DIRECTION_NONE)||\ + ((__VALUE__) == FL_UART_DIRECTION_RX)||\ + ((__VALUE__) == FL_UART_DIRECTION_TX)||\ + ((__VALUE__) == FL_UART_DIRECTION_TX_RX)) + +#define IS_FL_UART_INFRA_MODULATION(__VALUE__) (((__VALUE__) == FL_DISABLE)||\ + ((__VALUE__) == FL_ENABLE)) + + +#define IS_FL_UART_INFRARED_POLARITY(__VALUE__) (((__VALUE__) == FL_UART_INFRARED_POLARITY_NORMAL)||\ + ((__VALUE__) == FL_UART_INFRARED_POLARITY_INVERT)) + +#define IS_FL_UART_INFRARED_MODULATION_DUTY(__VALUE__) (((__VALUE__) <= 100)) + + +/** + * @} + */ + +/* Exported functions --------------------------------------------------------*/ +/** @addtogroup UART_FL_EF_Init + * @{ + */ + +/** + * @brief 复位UART 外设寄存器值为复位值 + * @param 外设入口地址 + * @retval 返回错误状态，可能值: + * -FL_PASS 外设寄存器值恢复复位值 + * -FL_FAIL 复位未成功 + */ +FL_ErrorStatus FL_UART_DeInit(UART_Type *UARTx) +{ + FL_ErrorStatus status = FL_PASS; + /* 参数入口合法性 */ + assert_param(IS_UART_INSTANCE(UARTx)); + /* 外设复位使能 */ + FL_RMU_EnablePeripheralReset(RMU); + if(UARTx == UART0) + { + /*复位UART*/ + FL_RMU_EnableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_UART0); + FL_RMU_DisableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_UART0); + /* 外设总线时钟关闭 */ + FL_CMU_DisableGroup3BusClock(FL_CMU_GROUP3_BUSCLK_UART0); + /* 外设工作时钟关闭 */ + FL_CMU_DisableGroup3OperationClock(FL_CMU_GROUP3_OPCLK_UART0); + } + else + if(UARTx == UART1) + { + /*复位UART*/ + FL_RMU_EnableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_UART1); + FL_RMU_DisableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_UART1); + /* 外设总线时钟关闭 */ + FL_CMU_DisableGroup3BusClock(FL_CMU_GROUP3_BUSCLK_UART1); + /* 外设工作时钟关闭 */ + FL_CMU_DisableGroup3OperationClock(FL_CMU_GROUP3_OPCLK_UART1); + } + else + if(UARTx == UART3) + { + /*复位UART*/ + FL_RMU_EnableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_UART3); + FL_RMU_DisableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_UART3); + /* UART3、4、5为单时钟，关闭总线时钟 */ + FL_CMU_DisableGroup3BusClock(FL_CMU_GROUP3_BUSCLK_UART3); + } + else + if(UARTx == UART4) + { + /*复位UART*/ + FL_RMU_EnableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_UART4); + FL_RMU_DisableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_UART4); + /* 总线、工作时钟关闭 */ + FL_CMU_DisableGroup3BusClock(FL_CMU_GROUP3_BUSCLK_UART4); + } + else + if(UARTx == UART5) + { + /*复位UART*/ + FL_RMU_EnableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_UART5); + FL_RMU_DisableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_UART5); + /* 总线（工作）时钟关闭 */ + FL_CMU_DisableGroup3BusClock(FL_CMU_GROUP3_BUSCLK_UART5); + } + else + { + status = FL_FAIL; + } + /* 锁定外设复位功能 */ + FL_RMU_DisablePeripheralReset(RMU); + return (status); +} + +/** + * @brief 根据需要配置UART + * + * @param UARTx 外设入口地址 + * @param UART_InitStruct指向一个FL_UART_InitTypeDef类型的结构体,它包含外设UART的配置信息 + * + * @retval ErrorStatus枚举值 + * -FL_FAIL 配置过程发生错误 + * -FL_PASS UART配置成功 + */ +FL_ErrorStatus FL_UART_Init(UART_Type *UARTx, FL_UART_InitTypeDef *initStruct) +{ + FL_ErrorStatus status = FL_FAIL; + uint32_t Fclk = 0, BaudRate = 0; + /* 参数合法性检查 */ + assert_param(IS_UART_INSTANCE(UARTx)); + assert_param(IS_FL_UART_CLKSRC(initStruct->clockSrc)); + assert_param(IS_FL_UART_DATAWIDTH(initStruct->dataWidth)); + assert_param(IS_FL_UART_PARITY(initStruct->parity)); + assert_param(IS_FL_UART_STOPBITS(initStruct->stopBits)); + assert_param(IS_FL_UART_DIRECTION(initStruct->transferDirection)); + if(UARTx == UART0) + { + /*时钟源选择*/ + FL_CMU_SetUART0ClockSource(initStruct->clockSrc); + /* 根据不同的时钟源计算baudrate 寄存器值,并配置 */ + switch(initStruct->clockSrc) + { + case FL_CMU_UART0_CLK_SOURCE_APBCLK: + Fclk = FL_CMU_GetAPBClockFreq(); + break; + case FL_CMU_UART0_CLK_SOURCE_RCHF: + Fclk = FL_CMU_GetRCHFClockFreq(); + break; + case FL_CMU_UART0_CLK_SOURCE_SYSCLK: + Fclk = FL_CMU_GetSystemClockFreq(); + break; + case FL_CMU_UART0_CLK_SOURCE_XTHF: + Fclk = XTHFClock; + break; + default: + Fclk = FL_CMU_GetAPBClockFreq(); + break; + } + BaudRate = Fclk / initStruct->baudRate - 1; + } + if(UARTx == UART1) + { + /*时钟源选择*/ + FL_CMU_SetUART1ClockSource(initStruct->clockSrc); + /* 根据不同的时钟源计算baudrate 寄存器值,并配置 */ + switch(initStruct->clockSrc) + { + case FL_CMU_UART1_CLK_SOURCE_APBCLK: + Fclk = FL_CMU_GetAPBClockFreq(); + break; + case FL_CMU_UART1_CLK_SOURCE_RCHF: + Fclk = FL_CMU_GetRCHFClockFreq(); + break; + case FL_CMU_UART1_CLK_SOURCE_SYSCLK : + Fclk = FL_CMU_GetSystemClockFreq(); + break; + case FL_CMU_UART1_CLK_SOURCE_XTHF: + Fclk = XTHFClock; + break; + default: + Fclk = FL_CMU_GetAPBClockFreq(); + break; + } + BaudRate = Fclk / initStruct->baudRate - 1; + } + if(UARTx == UART0) + { + FL_CMU_EnableGroup3BusClock(FL_CMU_GROUP3_BUSCLK_UART0); + FL_CMU_EnableGroup3OperationClock(FL_CMU_GROUP3_OPCLK_UART0); + } + else + if(UARTx == UART1) + { + FL_CMU_EnableGroup3BusClock(FL_CMU_GROUP3_BUSCLK_UART1); + FL_CMU_EnableGroup3OperationClock(FL_CMU_GROUP3_OPCLK_UART1); + } + else + if(UARTx == UART3) + { + FL_CMU_EnableGroup3BusClock(FL_CMU_GROUP3_BUSCLK_UART3); + Fclk = FL_CMU_GetAPBClockFreq(); + BaudRate = Fclk / initStruct->baudRate - 1; + } + else + if(UARTx == UART4) + { + FL_CMU_EnableGroup3BusClock(FL_CMU_GROUP3_BUSCLK_UART4); + Fclk = FL_CMU_GetAPBClockFreq(); + BaudRate = Fclk / initStruct->baudRate - 1; + } + else + if(UARTx == UART5) + { + FL_CMU_EnableGroup3BusClock(FL_CMU_GROUP3_BUSCLK_UART5); + Fclk = FL_CMU_GetAPBClockFreq(); + BaudRate = Fclk / initStruct->baudRate - 1; + } + /*发送接收控制*/ + if(initStruct->transferDirection & FL_UART_DIRECTION_TX) + { + FL_UART_EnableTX(UARTx); + } + if(initStruct->transferDirection & FL_UART_DIRECTION_RX) + { + FL_UART_EnableRX(UARTx); + } + /*配置波特率*/ + FL_UART_WriteBaudRate(UARTx, BaudRate); + /*配置停止位长度*/ + FL_UART_SetStopBitsWidth(UARTx, initStruct->stopBits); + /*数据长度*/ + FL_UART_SetDataWidth(UARTx, initStruct->dataWidth); + /*配置奇偶校验*/ + FL_UART_SetParity(UARTx, initStruct->parity); + status = FL_PASS; + return status; +} +/** + * @brief 根据需要配置红外调制寄存器 + * + * @param UARTx 外设入口地址 + * + * @param initStruct指向FL_UART_InitTypeDef类型的结构体,包含UART外设信息 + * + * @retval ErrorStatus枚举值 + * -FL_FAIL 配置过程出现错误 + * -FL_PASS UART配置成功 + */ +FL_ErrorStatus FL_UART_InfraRed_Init(UART_Type *UARTx, FL_UART_InfraRed_InitTypeDef *initStruct) +{ + FL_ErrorStatus status = FL_FAIL; + uint32_t tempTZBRG = 0, tempTH = 0; + /* 参数合法性检查 */ + assert_param(IS_UART_INSTANCE(UARTx)); + assert_param(IS_FL_UART_INFRARED_POLARITY(initStruct->polarity)); + assert_param(IS_FL_UART_INFRARED_MODULATION_DUTY(initStruct->modulationDuty)); + /*红外发送总线时钟使能*/ + FL_CMU_EnableGroup3BusClock(FL_CMU_GROUP3_BUSCLK_UARTIR); + /*红外发送使能*/ + FL_UART_EnableIRModulation(UARTx); + /*红外调制极性*/ + FL_UART_SetIRPolarity(UART, initStruct->polarity); + /*红外调制频率*/ + tempTZBRG = (uint32_t)((FL_CMU_GetAPBClockFreq() * 1.0) / initStruct->modulationFrequency - 1); + /* 调制占空比 */ + if((tempTZBRG >> 4) != 0) + { + tempTH = (uint32_t)(((float)initStruct->modulationDuty / 100.0f) * ((float)(tempTZBRG + 1) / (float)(tempTZBRG >> 4)) + 0.5f); + } + else + { + tempTH = (uint32_t)(((float)initStruct->modulationDuty / 100.0f) * (float)(tempTZBRG + 1) + 0.5f); + } + /* 占空比限位到小于95%，否则结果会有问题 */ + tempTH = ((float)((tempTZBRG >> 4) * tempTH) / (float)(tempTZBRG + 1)) < 0.95f ? tempTH : tempTH - 1; + /* 占空比和调制频率配置 */ + FL_UART_WriteIRModulationDuty(UART, tempTH); + FL_UART_WriteIRModulationFrequency(UART, tempTZBRG); + status = FL_PASS; + return status; +} + +/** + * @brief UART_InitStruct 为默认配置 + * @param UART_InitStruct 指向需要将值设置为默认配置 的结构体@ref FL_UART_InitTypeDef structure 结构体 + * + * @retval None + */ +void FL_UART_InfraRed_StructInit(FL_UART_InfraRed_InitTypeDef *initStruct) +{ + initStruct->polarity = FL_UART_INFRARED_POLARITY_NORMAL; + initStruct->modulationDuty = 50; + initStruct->modulationFrequency = 38000; +} + +/** + * @brief UART_InitStruct 为默认配置 + * @param UART_InitStruct 指向需要将值设置为默认配置 的结构体@ref FL_UART_InitTypeDef structure 结构体 + * 结构体 + * @retval None + */ +void FL_UART_StructInit(FL_UART_InitTypeDef *initStruct) +{ + initStruct->baudRate = 115200; + initStruct->dataWidth = FL_UART_DATA_WIDTH_8B; + initStruct->stopBits = FL_UART_STOP_BIT_WIDTH_1B; + initStruct->parity = FL_UART_PARITY_EVEN ; + initStruct->transferDirection = FL_UART_DIRECTION_TX_RX; + initStruct->clockSrc = 0; +} + +/** + * @} + */ + +#endif /* FL_UART_DRIVER_ENABLED */ + +/** + * @} + */ + +/** + * @} + */ + +/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/ + diff --git a/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_vao.c b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_vao.c new file mode 100644 index 0000000..eaae999 --- /dev/null +++ b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_vao.c @@ -0,0 +1,251 @@ + /** + ******************************************************************************************************* + * @file fm33lg0xx_fl_vao.c + * @author FMSH Application Team + * @brief Src file of DMA FL Module + ******************************************************************************************************* + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + +/* Includes ------------------------------------------------------------------*/ +#include "fm33lg0xx_fl.h" + +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @addtogroup VAO + * @{ + */ + +#ifdef FL_VAO_DRIVER_ENABLED + +/* Private macros ------------------------------------------------------------*/ +/** @addtogroup VAO_FL_Private_Macros + * @{ + */ +#define IS_FL_VAO_INSTANCE(INTANCE) ((INTANCE) == VAO) + +#define IS_FL_VAO_OUTPUT_DRIVE_ABILITY(__VALUE__) (((__VALUE__) == FL_VAO_XTLF_DRIVE_LEVEL_NONE)||\ + ((__VALUE__) == FL_VAO_XTLF_DRIVE_LEVEL_1)||\ + ((__VALUE__) == FL_VAO_XTLF_DRIVE_LEVEL_2)||\ + ((__VALUE__) == FL_VAO_XTLF_DRIVE_LEVEL_3)||\ + ((__VALUE__) == FL_VAO_XTLF_DRIVE_LEVEL_4)||\ + ((__VALUE__) == FL_VAO_XTLF_DRIVE_LEVEL_5)||\ + ((__VALUE__) == FL_VAO_XTLF_DRIVE_LEVEL_6)||\ + ((__VALUE__) == FL_VAO_XTLF_DRIVE_LEVEL_7)) + +#define IS_FL_VAO_WORKING_CURRENT(__VALUE__) (((__VALUE__) == FL_VAO_XTLF_WORK_CURRENT_850NA)||\ + ((__VALUE__) == FL_VAO_XTLF_WORK_CURRENT_800NA)||\ + ((__VALUE__) == FL_VAO_XTLF_WORK_CURRENT_750NA)||\ + ((__VALUE__) == FL_VAO_XTLF_WORK_CURRENT_700NA)||\ + ((__VALUE__) == FL_VAO_XTLF_WORK_CURRENT_650NA)||\ + ((__VALUE__) == FL_VAO_XTLF_WORK_CURRENT_600NA)||\ + ((__VALUE__) == FL_VAO_XTLF_WORK_CURRENT_550NA)||\ + ((__VALUE__) == FL_VAO_XTLF_WORK_CURRENT_500NA)||\ + ((__VALUE__) == FL_VAO_XTLF_WORK_CURRENT_450NA)||\ + ((__VALUE__) == FL_VAO_XTLF_WORK_CURRENT_400NA)||\ + ((__VALUE__) == FL_VAO_XTLF_WORK_CURRENT_350NA)||\ + ((__VALUE__) == FL_VAO_XTLF_WORK_CURRENT_300NA)||\ + ((__VALUE__) == FL_VAO_XTLF_WORK_CURRENT_250NA)||\ + ((__VALUE__) == FL_VAO_XTLF_WORK_CURRENT_200NA)||\ + ((__VALUE__) == FL_VAO_XTLF_WORK_CURRENT_150NA)||\ + ((__VALUE__) == FL_VAO_XTLF_WORK_CURRENT_100NA)) + +#define IS_FL_VAO_PH15_INPUT(__VALUE__) (((__VALUE__) == FL_DISABLE)||\ + ((__VALUE__) == FL_ENABLE)) + +#define IS_FL_VAO_PH15_PULL_UP(__VALUE__) (((__VALUE__) == FL_DISABLE)||\ + ((__VALUE__) == FL_ENABLE)) + + +#define IS_FL_VAO_PH15_OPENDRAIN_OUTPUT(__VALUE__) (((__VALUE__) == FL_DISABLE)||\ + ((__VALUE__) == FL_ENABLE)) + +#define IS_FL_VAO_PH15_MODE(__VALUE__) (((__VALUE__) == FL_VAO_PH15_MODE_INPUT)||\ + ((__VALUE__) == FL_VAO_PH15_MODE_OUTPUT)||\ + ((__VALUE__) == FL_VAO_PH15_MODE_RTCOUT)) + +/** + * @} + */ + +/* Exported functions --------------------------------------------------------*/ +/** @addtogroup VAO_FL_EF_Init + * @{ + */ + +/** + * @brief 复位对应VAO寄存器 + * @param VAOx VAO Port + * @retval ErrorStatus枚举值: + * -FL_PASS 外设寄存器值恢复复位值 + * -FL_FAIL 未成功执行 + */ +FL_ErrorStatus FL_VAO_DeInit(VAO_Type *VAOx) +{ + /* 入口参数检查 */ + assert_param(IS_FL_VAO_INSTANCE(VAOx)); + /* 使能vao复位 */ + FL_VAO_EnableReset(VAOx); + /*失能CDIF*/ + FL_CDIF_DisableVAOToCPU(CDIF); + FL_CDIF_DisableCPUToVAO(CDIF); + return FL_PASS; +} + +/** + * @brief 根据 VAO_IO_StructInit 的配置信息初始化对应外设入口地址的寄存器值 + * @param VAOx VAOx + * @param VAO_IO_StructInit 指向一个 @ref FL_VAO_IO_InitTypeDef 结构体 + * 其中包含了外设的相关配置信息. + * @retval ErrorStatus枚举值 + * -FL_FAIL 配置过程发生错误 + * -FL_PASS 配置成功 + */ +FL_ErrorStatus FL_VAO_IO_Init(VAO_Type *VAOx, FL_VAO_IO_InitTypeDef *VAO_IO_InitStruct) +{ + /* 参数检查 */ + assert_param(IS_FL_VAO_INSTANCE(VAOx)); + assert_param(IS_FL_VAO_PH15_INPUT(VAO_IO_InitStruct->input)); + assert_param(IS_FL_VAO_PH15_PULL_UP(VAO_IO_InitStruct->pullup)); + assert_param(IS_FL_VAO_PH15_OPENDRAIN_OUTPUT(VAO_IO_InitStruct->opendrainOutput)); + assert_param(IS_FL_VAO_PH15_MODE(VAO_IO_InitStruct->mode)); + /*使能CDIF*/ + FL_CDIF_EnableVAOToCPU(CDIF); + FL_CDIF_EnableCPUToVAO(CDIF); + /*! PH15功能选择 */ + FL_VAO_GPIO_SetPH15Mode(VAOx, VAO_IO_InitStruct->mode); + /*! PH15输入使能 */ + if(VAO_IO_InitStruct->input == FL_ENABLE) + { + FL_VAO_GPIO_EnablePH15Input(VAOx); + } + else + { + FL_VAO_GPIO_DisablePH15Input(VAOx); + } + /*! PH15上拉使能 */ + if(VAO_IO_InitStruct->pullup == FL_ENABLE) + { + FL_VAO_GPIO_EnablePH15Pullup(VAOx); + } + else + { + FL_VAO_GPIO_DisablePH15Pullup(VAOx); + } + /*! PH15开漏输出使能 */ + if(VAO_IO_InitStruct->opendrainOutput == FL_ENABLE) + { + FL_VAO_GPIO_EnablePH15OpenDrain(VAOx); + } + else + { + FL_VAO_GPIO_DisablePH15OpenDrain(VAOx); + } + return FL_PASS; +} + +/** + * @brief 根据 VAO_XTLF_StructInit 的配置信息初始化对应外设入口地址的寄存器值 + * @param VAOx VAOx + * @param VAO_XTLF_StructInit 指向一个 @ref FL_VAO_XTLF_InitTypeDef 结构体 + * 其中包含了外设的相关配置信息. + * @retval ErrorStatus枚举值 + * -FL_FAIL 配置过程发生错误 + * -FL_PASS 配置成功 + */ +FL_ErrorStatus FL_VAO_XTLF_Init(VAO_Type *VAOx, FL_VAO_XTLF_InitTypeDef *VAO_XTLF_InitStruct) +{ + /* 参数检查 */ + assert_param(IS_FL_VAO_INSTANCE(VAOx)); + assert_param(IS_FL_VAO_OUTPUT_DRIVE_ABILITY(VAO_XTLF_InitStruct->driveMode)); + assert_param(IS_FL_VAO_WORKING_CURRENT(VAO_XTLF_InitStruct->workingCurrentMode)); + /*使能CDIF*/ + FL_CDIF_EnableVAOToCPU(CDIF); + FL_CDIF_EnableCPUToVAO(CDIF); + /*! XTLF工作电流选择 */ + FL_VAO_XTLF_SetWorkCurrent(VAOx, VAO_XTLF_InitStruct->workingCurrentMode); + /*! XTLF输出级驱动能力配置 */ + FL_VAO_XTLF_SetDriveLevel(VAOx, VAO_XTLF_InitStruct->driveMode); + return FL_PASS; +} + +/** +* @brief 设置 VAO_IO_StructInit 为默认配置 +* @param VAO_IO_StructInit 指向需要将值设置为默认配置的结构体 @ref FL_VAO_IO_InitTypeDef 结构体 +* +* @retval None +*/ + +void FL_VAO_IO_StructInit(FL_VAO_IO_InitTypeDef *VAO_IO_InitStruct) +{ + VAO_IO_InitStruct->mode = FL_VAO_PH15_MODE_INPUT; + VAO_IO_InitStruct->input = FL_ENABLE; + VAO_IO_InitStruct->pullup = FL_ENABLE; + VAO_IO_InitStruct->opendrainOutput = FL_DISABLE; +} +/** +* @brief 设置 VAO_XTLF_StructInit 为默认配置 +* @param VAO_XTLF_StructInit 指向需要将值设置为默认配置的结构体 @ref FL_VAO_XTLF_InitTypeDef 结构体 +* +* @retval None +*/ + +void FL_VAO_XTLF_StructInit(FL_VAO_XTLF_InitTypeDef *VAO_XTLF_InitStruct) +{ + VAO_XTLF_InitStruct->driveMode = FL_VAO_XTLF_DRIVE_LEVEL_1; + VAO_XTLF_InitStruct->workingCurrentMode = FL_VAO_XTLF_WORK_CURRENT_450NA; +} + +/** + * @} + */ + +#endif /* FL_VAO_DRIVER_ENABLED */ + +/** + * @} + */ + +/** + * @} + */ + +/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/ diff --git a/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_vrefp.c b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_vrefp.c new file mode 100644 index 0000000..033207b --- /dev/null +++ b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_vrefp.c @@ -0,0 +1,192 @@ + /** + **************************************************************************************************** + * @file fm33lg0xx_fl_vrefp.c + * @author FMSH Application Team + * @brief Src file of VREFP FL Module + **************************************************************************************************** + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + +/* Includes ------------------------------------------------------------------*/ +#include "fm33lg0xx_fl.h" + +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @addtogroup VREFP + * @{ + */ + + +#ifdef FL_VREFP_DRIVER_ENABLED + +/* Private macros ------------------------------------------------------------*/ +/** @addtogroup VREFP_FL_Private_Macros + * @{ + */ +#define IS_VREFP_INSTANCE(INTANCE) ((INTANCE) == VREFP) + +#define IS_FL_VREFP_VOLTAGETRIM(__VALUE__) (((__VALUE__) == FL_VREFP_OUTPUT_VOLTAGE_2P0V_TRIM)||\ + ((__VALUE__) == FL_VREFP_OUTPUT_VOLTAGE_2P5V_TRIM)||\ + ((__VALUE__) == FL_VREFP_OUTPUT_VOLTAGE_3P0V_TRIM)||\ + ((__VALUE__) == FL_VREFP_OUTPUT_VOLTAGE_4P5V_TRIM)||\ + ((__VALUE__) == FL_VREFP_OUTPUT_VOLTAGE_1P5V_TRIM)) + +#define IS_FL_VREFP_OUTPUTVOLTAGE(__VALUE__) (((__VALUE__) == FL_VREFP_OUTPUT_VOLTAGE_2P0V)||\ + ((__VALUE__) == FL_VREFP_OUTPUT_VOLTAGE_2P5V)||\ + ((__VALUE__) == FL_VREFP_OUTPUT_VOLTAGE_3P0V)||\ + ((__VALUE__) == FL_VREFP_OUTPUT_VOLTAGE_4P5V)||\ + ((__VALUE__) == FL_VREFP_OUTPUT_VOLTAGE_1P5V)) + +#define IS_FL_VREFP_ENABLEPERIOD(__VALUE__) (((__VALUE__) == FL_VREFP_ENABLE_PERIOD_1MS)||\ + ((__VALUE__) == FL_VREFP_ENABLE_PERIOD_4MS)||\ + ((__VALUE__) == FL_VREFP_ENABLE_PERIOD_16MS)||\ + ((__VALUE__) == FL_VREFP_ENABLE_PERIOD_32MS)||\ + ((__VALUE__) == FL_VREFP_ENABLE_PERIOD_64MS)||\ + ((__VALUE__) == FL_VREFP_ENABLE_PERIOD_256MS)||\ + ((__VALUE__) == FL_VREFP_ENABLE_PERIOD_1000MS)||\ + ((__VALUE__) == FL_VREFP_ENABLE_PERIOD_4000MS)) + +#define IS_FL_VREFP_DRIVINGTIME(__VALUE__) (((__VALUE__) == FL_VREFP_DRIVING_TIME_4LSCLK)||\ + ((__VALUE__) == FL_VREFP_DRIVING_TIME_8LSCLK)||\ + ((__VALUE__) == FL_VREFP_DRIVING_TIME_16LSCLK)||\ + ((__VALUE__) == FL_VREFP_DRIVING_TIME_32LSCLK)||\ + ((__VALUE__) == FL_VREFP_DRIVING_TIME_64LSCLK)||\ + ((__VALUE__) == FL_VREFP_DRIVING_TIME_128LSCLK)||\ + ((__VALUE__) == FL_VREFP_DRIVING_TIME_256LSCLK)||\ + ((__VALUE__) == FL_VREFP_DRIVING_TIME_512LSCLK)) + +#define IS_FL_VREFP_WORKMODE(__VALUE__) (((__VALUE__) == FL_VREFP_WORK_MODE_CONTINUOUS)||\ + ((__VALUE__) == FL_VREFP_WORK_MODE_PERIODIC)) + +/** + * @} + */ + +/* Exported functions --------------------------------------------------------*/ +/** @addtogroup VREFP_FL_EF_Init + * @{ + */ + +/** + * @brief 关闭VREFP外设总线时钟 + * + * @param VREFPx 外设入口地址 + * + * @retval ErrorStatus枚举值 + * -FL_PASS 配置成功 + * -FL_FAIL 配置过程发生错误 + */ +FL_ErrorStatus FL_VREFP_DeInit(VREFP_Type *VREFPx) +{ + assert_param(IS_VREFP_INSTANCE(VREFPx)); + return FL_PASS; +} +/** + * @brief 根据 VREFP_InitStruct初始化对应外设入口地址的寄存器值. + * + * @note WWTD使能后将无法关闭，直到下一次芯片复位 + * + * @param VREFPx 外设入口地址 + * + * @param VREFP_InitStruct 指向 @ref FL_VREFP_InitTypeDef 结构体的指针 + * + * @retval ErrorStatus枚举值 + * -FL_PASS 配置成功 + * -FL_FAIL 配置过程发生错误 + */ +FL_ErrorStatus FL_VREFP_Init(VREFP_Type *VREFPx, FL_VREFP_InitTypeDef *VREFP_InitStruct) +{ + FL_ErrorStatus status = FL_PASS; + /* 入口参数检查 */ + assert_param(IS_VREFP_INSTANCE(VREFPx)); + assert_param(IS_FL_VREFP_VOLTAGETRIM(VREFP_InitStruct->voltageTrim)); + assert_param(IS_FL_VREFP_OUTPUTVOLTAGE(VREFP_InitStruct->outputVoltage)); + assert_param(IS_FL_VREFP_ENABLEPERIOD(VREFP_InitStruct->timeOfPeriod)); + assert_param(IS_FL_VREFP_DRIVINGTIME(VREFP_InitStruct->timeOfDriving)); + assert_param(IS_FL_VREFP_WORKMODE(VREFP_InitStruct->mode)); + /* 开启总线时钟 */ + FL_CMU_EnableGroup1BusClock(FL_CMU_GROUP1_BUSCLK_PMU); + /* 配置VREFP输出电压TRIM值 */ + FL_VREFP_WriteOutputVoltageTrim(VREFPx, VREFP_InitStruct->voltageTrim); + /* 配置VREFP输出电压 */ + FL_VREFP_SetOutputVoltage(VREFPx, VREFP_InitStruct->outputVoltage); + /* 配置输出模式 */ + FL_VREFP_SetWorkMode(VREFPx, VREFP_InitStruct->mode); + /* 间歇模式下使能周期 */ + FL_VREFP_SetEnablePeriod(VREFPx, VREFP_InitStruct->timeOfPeriod); + /* 间歇模式下单次驱动时间 */ + FL_VREFP_SetDrivingTime(VREFPx, VREFP_InitStruct->timeOfDriving); + /* 启动VREFP */ + FL_VREFP_Enable(VREFPx); + return status; +} +/** + * @brief 设置 VREFP_InitStruct 为默认配置 + * + * @param VREFP_InitStruct 指向需要将值设置为默认配置的结构体 @ref FL_VREFP_InitTypeDef 结构体 + * + * @retval None + */ +void FL_VREFP_StructInit(FL_VREFP_InitTypeDef *VREFP_InitStruct) +{ + VREFP_InitStruct->voltageTrim = FL_VREFP_OUTPUT_VOLTAGE_3P0V_TRIM; + VREFP_InitStruct->outputVoltage = FL_VREFP_OUTPUT_VOLTAGE_3P0V; + VREFP_InitStruct->mode = FL_VREFP_WORK_MODE_CONTINUOUS; + VREFP_InitStruct->timeOfPeriod = FL_VREFP_ENABLE_PERIOD_1MS; + VREFP_InitStruct->timeOfDriving = FL_VREFP_DRIVING_TIME_4LSCLK; +} + +/** + * @} + */ + +#endif /* FL_VREFP_DRIVER_ENABLED */ + +/** + * @} + */ + +/** + * @} + */ + +/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/ + diff --git a/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_wwdt.c b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_wwdt.c new file mode 100644 index 0000000..059e055 --- /dev/null +++ b/code_app_out/Source/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_wwdt.c @@ -0,0 +1,153 @@ + /** + **************************************************************************************************** + * @file fm33lg0xx_fl_wwdt.c + * @author FMSH Application Team + * @brief Src file of WWDT FL Module + **************************************************************************************************** + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + +/* Includes ------------------------------------------------------------------*/ +#include "fm33lg0xx_fl.h" + +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @addtogroup WWDT + * @{ + */ + + +#ifdef FL_WWDT_DRIVER_ENABLED + +/* Private macros ------------------------------------------------------------*/ +/** @addtogroup WWDT_FL_Private_Macros + * @{ + */ +#define IS_WWDT_INSTANCE(INTANCE) ((INTANCE) == WWDT) + +#define IS_FL_WWDT_OVERFLOWPERIOD(__VALUE__) (((__VALUE__) == FL_WWDT_PERIOD_1CNT)||\ + ((__VALUE__) == FL_WWDT_PERIOD_4CNT)||\ + ((__VALUE__) == FL_WWDT_PERIOD_16CNT)||\ + ((__VALUE__) == FL_WWDT_PERIOD_64CNT)||\ + ((__VALUE__) == FL_WWDT_PERIOD_128CNT)||\ + ((__VALUE__) == FL_WWDT_PERIOD_256CNT)||\ + ((__VALUE__) == FL_WWDT_PERIOD_512CNT)||\ + ((__VALUE__) == FL_WWDT_PERIOD_1024CNT)) +/** + * @} + */ + +/* Exported functions --------------------------------------------------------*/ +/** @addtogroup WWDT_FL_EF_Init + * @{ + */ + +/** + * @brief 关闭WWDT外设总线时钟 + * + * @note WWDT开启不能再关闭，直到下一次复位。低功耗休眠模式下 WWDT 停止运行 + * + * @param WWDTx 外设入口地址 + * + * @retval FL_ErrorStatus枚举值 + * -FL_PASS 配置成功 + * -FL_FAIL 配置过程发生错误 + */ +FL_ErrorStatus FL_WWDT_DeInit(WWDT_Type *WWDTx) +{ + assert_param(IS_WWDT_INSTANCE(WWDTx)); + return FL_PASS; +} +/** + * @brief 根据 WWDT_InitStruct初始化对应外设入口地址的寄存器值. + * + * @note WWTD使能后将无法关闭，直到下一次芯片复位 + * + * @param WWDTx 外设入口地址 + * + * @param WWDT_InitStruct 指向 @ref FL_WWDT_InitTypeDef 结构体的指针 + * + * @retval FL_ErrorStatus枚举值 + * -FL_PASS 配置成功 + * -FL_FAIL 配置过程发生错误 + */ +FL_ErrorStatus FL_WWDT_Init(WWDT_Type *WWDTx, FL_WWDT_InitTypeDef *WWDT_InitStruct) +{ + FL_ErrorStatus status = FL_PASS; + /* 入口参数检查 */ + assert_param(IS_WWDT_INSTANCE(WWDTx)); + assert_param(IS_FL_WWDT_OVERFLOWPERIOD(WWDT_InitStruct->overflowPeriod)); + /* 开启总线时钟 */ + FL_CMU_EnableGroup2BusClock(FL_CMU_GROUP2_BUSCLK_WWDT); + /* 配置独立看门狗溢出周期 */ + FL_WWDT_SetPeriod(WWDTx, WWDT_InitStruct->overflowPeriod); + /* 启动看门狗 */ + FL_WWDT_Enable(WWDTx); + return status; +} +/** + * @brief 设置 WWDT_InitStruct 为默认配置 + * + * @param WWDT_InitStruct 指向需要将值设置为默认配置的结构体 @ref FL_WWDT_InitTypeDef 结构体 + * + * @retval None + */ +void FL_WWDT_StructInit(FL_WWDT_InitTypeDef *WWDT_InitStruct) +{ + /* 默认最长溢出周期 */ + WWDT_InitStruct->overflowPeriod = FL_WWDT_PERIOD_1024CNT; +} + +/** + * @} + */ + +#endif /* FL_WWDT_DRIVER_ENABLED */ + +/** + * @} + */ + +/** + * @} + */ + +/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/ diff --git a/code_app_out/Source/sdk/MF-config/Inc/mf_config.h b/code_app_out/Source/sdk/MF-config/Inc/mf_config.h new file mode 100644 index 0000000..9dddff3 --- /dev/null +++ b/code_app_out/Source/sdk/MF-config/Inc/mf_config.h @@ -0,0 +1,79 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file : mf_config.h + * @brief : Header for mf_config.c file. + * This file contains the common defines of the application. + ****************************************************************************** + * @attention + * + * Copyright (c) [2019] [Fudan Microelectronics] + * THIS SOFTWARE is licensed under the Mulan PSL v1. + * can use this software according to the terms and conditions of the Mulan PSL v1. + * You may obtain a copy of Mulan PSL v1 at: + * http://license.coscl.org.cn/MulanPSL + * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR FIT FOR A PARTICULAR + * PURPOSE. + * See the Mulan PSL v1 for more details. + * + ****************************************************************************** + */ +/* USER CODE END Header */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __MF_CONFIG_H +#define __MF_CONFIG_H + +#ifdef __cplusplus +extern "C" { +#endif + +/* Exported functions prototypes ---------------------------------------------*/ +void MF_Clock_Init(void); +void MF_SystemClock_Config(void); +void MF_Config_Init(void); +void Error_Handler(void); + +//BIT MAP====================================================== +#define BIT0 0x00000001 +#define BIT1 0x00000002 +#define BIT2 0x00000004 +#define BIT3 0x00000008 +#define BIT4 0x00000010 +#define BIT5 0x00000020 +#define BIT6 0x00000040 +#define BIT7 0x00000080 +#define BIT8 0x00000100 +#define BIT9 0x00000200 +#define BIT10 0x00000400 +#define BIT11 0x00000800 +#define BIT12 0x00001000 +#define BIT13 0x00002000 +#define BIT14 0x00004000 +#define BIT15 0x00008000 +#define BIT16 0x00010000 +#define BIT17 0x00020000 +#define BIT18 0x00040000 +#define BIT19 0x00080000 +#define BIT20 0x00100000 +#define BIT21 0x00200000 +#define BIT22 0x00400000 +#define BIT23 0x00800000 +#define BIT24 0x01000000 +#define BIT25 0x02000000 +#define BIT26 0x04000000 +#define BIT27 0x08000000 +#define BIT28 0x10000000 +#define BIT29 0x20000000 +#define BIT30 0x40000000 +#define BIT31 0x80000000 + + +#ifdef __cplusplus +} +#endif + +#endif /* __MF_CONFIG_H */ + +/************************ (C) COPYRIGHT FMSH *****END OF FILE****/ diff --git a/code_app_out/Source/sdk/MF-config/Src/mf_config.c b/code_app_out/Source/sdk/MF-config/Src/mf_config.c new file mode 100644 index 0000000..51ee0f8 --- /dev/null +++ b/code_app_out/Source/sdk/MF-config/Src/mf_config.c @@ -0,0 +1,88 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file : mf_config.c + * @brief : MCU FUNCTION CONFIG + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2019 FMSH. + * All rights reserved.

+ * + * This software component is licensed by FMSH under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ +/* USER CODE END Header */ + +/* Includes ------------------------------------------------------------------*/ +#include "mf_config.h" +#include "fm33lg0xx_fl.h" + +/* Private function prototypes -----------------------------------------------*/ + +/** + * @brief The application entry point. + * @retval int + */ +void MF_Clock_Init(void) +{ + /* MCU Configuration--------------------------------------------------------*/ + FL_CMU_EnableGroup1BusClock(FL_CMU_GROUP1_BUSCLK_RTCA); + FL_RTCA_WriteAdjustValue (RTCA, 0); + FL_CMU_DisableGroup1BusClock(FL_CMU_GROUP1_BUSCLK_RTCA); + /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ + + /* System interrupt init*/ + + /* Initialize all configured peripherals */ +} + +/** + * @brief System Clock Configuration + * @retval None + */ +void MF_SystemClock_Config(void) +{ + +} + +void MF_Config_Init(void) +{ + +} + + +/** + * @brief This function is executed in case of error occurrence. + * @retval None + */ +void Error_Handler(void) +{ + /* USER CODE BEGIN Error_Handler_Debug */ + /* User can add his own implementation to report the HAL error return state */ + + /* USER CODE END Error_Handler_Debug */ +} + +#ifdef USE_FULL_ASSERT +/** + * @brief Reports the name of the source file and the source line number + * where the assert_param error has occurred. + * @param file: pointer to the source file name + * @param line: assert_param error line source number + * @retval None + */ +void assert_failed(uint8_t *file, uint32_t line) +{ + /* USER CODE BEGIN Assert_Failed */ + /* User can add his own implementation to report the file name and line number, + tex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */ + /* USER CODE END Assert_Failed */ +} +#endif /* USE_FULL_ASSERT */ + +/************************ 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$PROJ_DIR$\..\Source\app\can_app.c + $PROJ_DIR$\..\Source\app\low_power_app.h + $PROJ_DIR$\..\Source\app\key_app.h + $PROJ_DIR$\..\Source\app\user_init.h + $PROJ_DIR$\..\Source\bsp\adc_cfg.h + $PROJ_DIR$\..\Source\bsp\clk_cfg.c + $PROJ_DIR$\..\Source\bsp\Cpu.c + $PROJ_DIR$\..\Source\bsp\Cpu.h + $PROJ_DIR$\..\Source\bsp\dma.c + $PROJ_DIR$\..\Source\bsp\dma.h + $PROJ_DIR$\..\Source\app\demm_app.h + $PROJ_DIR$\..\Source\app\fault_detect.h + $PROJ_DIR$\..\Source\app\led_app.c + $PROJ_DIR$\..\Source\app\demm_app.c + $PROJ_DIR$\..\Source\app\WheelHeat.c + $PROJ_DIR$\..\Source\app\main.h + $PROJ_DIR$\..\Source\app\user_init.c + $PROJ_DIR$\..\Source\app\WheelHeat.h + $PROJ_DIR$\..\Source\bsp\adc.c + $PROJ_DIR$\..\Source\app\led_app.h + $PROJ_DIR$\..\Source\app\system_voltage_app.c + $PROJ_DIR$\..\Source\app\key_app.c + $PROJ_DIR$\..\Source\bsp\adc_cfg.c + $PROJ_DIR$\..\Source\app\fault_detect.c + $PROJ_DIR$\..\Source\app\system_config.h + $PROJ_DIR$\..\Source\app\system_voltage_app.h + $PROJ_DIR$\..\Source\app\can_app.h + $PROJ_DIR$\..\Source\bsp\adc.h + $PROJ_DIR$\..\Source\bsp\clk.c + $PROJ_DIR$\..\Source\bsp\clk.h + $PROJ_DIR$\..\Source\bsp\clk_cfg.h + $PROJ_DIR$\..\Source\app\low_power_app.c + $TOOLKIT_DIR$\inc\c\stdlib.h + $PROJ_DIR$\Example\Obj\nvic.xcl + $PROJ_DIR$\Example\Obj\fm33lg0xx_fl_dma.xcl + $PROJ_DIR$\Example\Obj\Com_Cfg.xcl + $PROJ_DIR$\Example\Obj\pwm_manage.o + $PROJ_DIR$\Example\Obj\fm33lg0xx_fl_exti.o + $PROJ_DIR$\Example\Obj\rmu.xcl + $PROJ_DIR$\Example\Obj\boot_app_cfg.o + $PROJ_DIR$\Example\Obj\stack_check_cfg.xcl + $PROJ_DIR$\Example\Obj\Dcm_Cfg.xcl + $PROJ_DIR$\Example\Obj\led_app.xcl + $PROJ_DIR$\Example\Obj\SimpleOs_CallOut.xcl + $PROJ_DIR$\Example\Obj\Cpu.o + $PROJ_DIR$\Example\Obj\fm33lg0xx_fl_aes.xcl + $TOOLKIT_DIR$\inc\c\stdio.h + $PROJ_DIR$\Example\Obj\svd.xcl + $TOOLKIT_DIR$\inc\c\DLib_Product.h + $PROJ_DIR$\Example\Obj\fm33lg0xx_fl_iwdt.xcl + $PROJ_DIR$\Example\Obj\fm33lg0xx_fl_divas.o + $TOOLKIT_DIR$\inc\c\stddef.h + $PROJ_DIR$\Example\Obj\clk_cfg.xcl + $PROJ_DIR$\Example\Obj\crc.xcl + $PROJ_DIR$\Example\Obj\fm33lg0xx_fl_pmu.o + $PROJ_DIR$\Example\Obj\fm33lg0xx_fl_dac.xcl + $PROJ_DIR$\Example\Obj\key_com_cfg.xcl + $PROJ_DIR$\Example\Obj\Dem_Cfg.o + $PROJ_DIR$\Example\Obj\key_digital_driver.xcl + $PROJ_DIR$\Example\Obj\fm33lg0xx_fl_aes.o + $PROJ_DIR$\Example\Obj\fm33lg0xx_fl_dma.o + $PROJ_DIR$\Example\Obj\nvm_cfg.o + $PROJ_DIR$\Example\Obj\wdog.o + $PROJ_DIR$\Example\Obj\fm33lg0xx_fl_adc.o + $PROJ_DIR$\Example\Obj\CanNm_Callout.xcl + $PROJ_DIR$\Example\Obj\CanNm_PBcfg.o + $PROJ_DIR$\Example\Obj\eeprom_state_machine.o + $PROJ_DIR$\Example\Obj\logic_timer.o + $TOOLKIT_DIR$\lib\dl6M_tln.a + $PROJ_DIR$\Example\Obj\fm33lg0xx_fl_vrefp.o + $PROJ_DIR$\Example\Obj\fm33lg0xx_fl_gpio.o + $PROJ_DIR$\Example\Obj\Cpu.xcl + $PROJ_DIR$\Example\Obj\system_voltage_app.o + $PROJ_DIR$\Example\Obj\system_voltage_manage.xcl + $PROJ_DIR$\Example\Obj\key_digital_driver_cfg.o + $PROJ_DIR$\Example\Obj\calibration.o + $PROJ_DIR$\Example\Obj\eeprom_cfg.o + $PROJ_DIR$\Example\Obj\fm33lg0xx_fl_rtca.xcl + $PROJ_DIR$\Example\Obj\fm33lg0xx_fl_wwdt.o + $PROJ_DIR$\Example\Obj\fm33lg0xx_fl_atim.xcl + $PROJ_DIR$\Example\Obj\Bsw_Common.xcl + $PROJ_DIR$\Example\Obj\fm33lg0xx_fl_can.xcl + $TOOLKIT_DIR$\inc\c\DLib_Defaults.h + $PROJ_DIR$\Example\Obj\SimpleOs.xcl + $PROJ_DIR$\Example\Obj\CanIf_Lcfg.xcl + $PROJ_DIR$\Example\Obj\fm33lg0xx_fl_lpuart.o + $PROJ_DIR$\Example\Obj\system_voltage_manage.o + $PROJ_DIR$\Example\Obj\fm33lg0xx_fl_gpio.xcl + $PROJ_DIR$\Example\Obj\fm33lg0xx_fl_gptim.o + $PROJ_DIR$\Example\Obj\key_adc_mid_cfg.o + $PROJ_DIR$\Example\Obj\Can_BusOff.xcl + $PROJ_DIR$\Example\Obj\logic_timer.xcl + $PROJ_DIR$\Example\Obj\i2c_simu_cfg.xcl + $PROJ_DIR$\Example\Obj\pwm_manage.xcl + $PROJ_DIR$\Example\Obj\tim_cfg.xcl + $TOOLKIT_DIR$\inc\c\iccarm_builtin.h + $TOOLKIT_DIR$\inc\c\stdint.h + $PROJ_DIR$\Example\Obj\i2c_simu.xcl + $PROJ_DIR$\Example\Obj\fm33lg0xx_fl_svd.xcl + $PROJ_DIR$\Example\Obj\nvic_cfg.xcl + $PROJ_DIR$\Example\Obj\stack_check.xcl + $TOOLKIT_DIR$\inc\c\stdbool.h + $PROJ_DIR$\Example\Obj\rmu_cfg.xcl + $PROJ_DIR$\Example\Obj\system_voltage_manage_cfg.o + $PROJ_DIR$\Example\Obj\App_Dcm.o + $PROJ_DIR$\Example\Obj\fm33lg0xx_fl_pmu.xcl + $PROJ_DIR$\Example\Obj\fm33lg0xx_fl_can.o + $PROJ_DIR$\Example\Obj\key_adc_driver.xcl + $PROJ_DIR$\Example\Obj\fm33lg0xx_fl_lpuart.xcl + $PROJ_DIR$\Example\Obj\WheelHeat.xcl + $PROJ_DIR$\Example\Obj\common_memory.o + $PROJ_DIR$\Example\Obj\svd_cfg.o + $PROJ_DIR$\Example\Obj\main.o + $PROJ_DIR$\Example\Obj\fm33lg0xx_fl_rng.xcl + $PROJ_DIR$\Example\Obj\fm33lg0xx_fl_bstim16.xcl + $PROJ_DIR$\Example\Obj\fm33lg0xx_fl_i2c.xcl + $PROJ_DIR$\Example\Obj\random_pseudo.xcl + $PROJ_DIR$\Example\Obj\service_27.xcl + $PROJ_DIR$\Example\Obj\clk.xcl + $PROJ_DIR$\Example\Obj\gpio.xcl + $PROJ_DIR$\Example\Obj\demm_app.xcl + $PROJ_DIR$\Example\Obj\fm33lg0xx_fl_bstim32.xcl + $PROJ_DIR$\Example\Obj\Dcm_Lcfg.xcl + $PROJ_DIR$\Example\Obj\i2c.xcl + $PROJ_DIR$\Example\Obj\App_Dcm.xcl + $PROJ_DIR$\Example\Obj\App_Com.xcl + $PROJ_DIR$\Example\Obj\clk_cfg.o + $PROJ_DIR$\Example\Obj\eeprom_state_machine.xcl + $PROJ_DIR$\Example\Obj\key_adc_driver.o + $PROJ_DIR$\Example\Obj\fm33lg0xx_fl_wwdt.xcl + $TOOLKIT_DIR$\inc\c\ycheck.h + $PROJ_DIR$\Example\Obj\fm33lg0xx_fl_flash.xcl + $PROJ_DIR$\Example\Obj\startup.o + $PROJ_DIR$\Example\Obj\eeprom.o + $PROJ_DIR$\Example\Obj\uart_cfg.xcl + $PROJ_DIR$\Example\Obj\svd_cfg.xcl + $PROJ_DIR$\Example\Obj\app_encoder.o + $PROJ_DIR$\Example\Obj\low_power_app.xcl + $PROJ_DIR$\Example\Obj\SimpleOs_Time.xcl + $PROJ_DIR$\Example\Obj\wdog_cfg.xcl + $PROJ_DIR$\Example\Obj\fm33lg0xx_fl_uart.xcl + $PROJ_DIR$\Example\Obj\rmu_cfg.o + $PROJ_DIR$\Example\Obj\dma_cfg.o + $PROJ_DIR$\Example\Obj\i2c_simu.o + $PROJ_DIR$\Example\Obj\adc.xcl + $PROJ_DIR$\Example\Obj\fm33lg0xx_fl_comp.o + $PROJ_DIR$\Example\Obj\fm33lg0xx_fl_vao.xcl + $PROJ_DIR$\Example\Obj\can_app.o + $PROJ_DIR$\Example\Obj\gpio.o + $PROJ_DIR$\Example\Obj\fm33lg0xx_fl_rtca.o + $PROJ_DIR$\Example\Obj\demm_app.o + $PROJ_DIR$\Example\Obj\dma_cfg.xcl + $PROJ_DIR$\Example\Obj\fm33lg0xx_fl_bstim32.o + $PROJ_DIR$\Example\Obj\fm33lg0xx_fl_atim.o + $PROJ_DIR$\Example\Obj\app_encoder.xcl + $PROJ_DIR$\Example\Obj\dma.o + $PROJ_DIR$\Example\Obj\can_app.xcl + $PROJ_DIR$\Example\Obj\mf_config.o + $PROJ_DIR$\Example\Obj\tim.o + $PROJ_DIR$\Example\Obj\uart_cfg.o + $PROJ_DIR$\Example\Obj\eeprom_seq.xcl + $TOOLKIT_DIR$\inc\c\assert.h + $PROJ_DIR$\Example\Obj\Dcm_Cfg.o + $PROJ_DIR$\Example\Obj\queue_entity_cfg.o + $PROJ_DIR$\Example\Obj\random_pseudo.o + $PROJ_DIR$\Example\Obj\CanNm_Lcfg.xcl + $PROJ_DIR$\Example\Obj\fm33lg0xx_fl_lcd.xcl + $TOOLKIT_DIR$\inc\c\DLib_Product_stdlib.h + $PROJ_DIR$\Example\Obj\eeprom_seq.o + $PROJ_DIR$\Example\Obj\CanNm_PBcfg.xcl + $PROJ_DIR$\Example\Obj\fault_detect.xcl + $PROJ_DIR$\Example\Obj\fm33lg0xx_fl_cmu.o + $PROJ_DIR$\Example\Obj\low_power_app.o + $PROJ_DIR$\Example\Obj\fm33lg0xx_fl_rng.o + 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$PROJ_DIR$\Example\Exe\Example.out + + + OBJCOPY + 511 + + + ILINK + 463 + + + + + ILINK + 351 539 545 502 110 142 503 45 537 81 153 501 521 523 520 514 187 71 183 212 132 196 193 116 50 527 168 222 63 156 161 148 139 82 174 72 491 194 69 65 159 471 158 112 177 151 472 217 56 66 43 205 76 94 182 185 214 190 531 91 60 179 155 221 204 535 188 75 84 154 547 470 548 149 200 134 199 536 95 490 541 462 80 528 207 497 73 178 118 163 532 507 538 67 42 198 169 170 465 147 192 218 219 206 495 202 138 475 517 117 529 78 92 109 164 225 201 165 526 68 494 224 551 542 530 220 74 + + + + + diff --git a/code_app_out/ide_project_iar/Example.ewd b/code_app_out/ide_project_iar/Example.ewd new file mode 100644 index 0000000..433a364 --- /dev/null +++ b/code_app_out/ide_project_iar/Example.ewd @@ -0,0 +1,1489 @@ + + + 3 + + Example + + ARM + + 1 + + C-SPY + 2 + + 32 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ARMSIM_ID + 2 + + 1 + 1 + 1 + + + + + + + + CADI_ID + 2 + + 0 + 1 + 1 + + + + + + + + + CMSISDAP_ID + 2 + + 4 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + GDBSERVER_ID + 2 + + 0 + 1 + 1 + + + + + + + + + + + IJET_ID + 2 + + 8 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + JLINK_ID + 2 + + 16 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + LMIFTDI_ID + 2 + + 2 + 1 + 1 + + + + + + + + + + NULINK_ID + 2 + + 0 + 1 + 1 + + + + + + + PEMICRO_ID + 2 + + 3 + 1 + 1 + + + + + + + + STLINK_ID + 2 + + 6 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + THIRDPARTY_ID + 2 + + 0 + 1 + 1 + + + + + + + + TIFET_ID + 2 + + 1 + 1 + 1 + + + + + + + + + + + + + + + + + + + XDS100_ID + 2 + + 8 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + $TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\FreeRtos\FreeRtosArmPlugin.ENU.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\HWRTOSplugin\HWRTOSplugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin.ENU.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin2.ENU.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\RemedyRtosViewer\RemedyRtosViewer.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\SMX\smxAwareIarArm8.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\SMX\smxAwareIarArm8BE.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin + 0 + + + $EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin + 0 + + + $EW_DIR$\common\plugins\TargetAccessServer\TargetAccessServer.ENU.ewplugin + 0 + + + $EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin + 0 + + + + diff --git a/code_app_out/ide_project_iar/Example.ewp b/code_app_out/ide_project_iar/Example.ewp new file mode 100644 index 0000000..aa8c35c --- /dev/null +++ b/code_app_out/ide_project_iar/Example.ewp @@ -0,0 +1,2190 @@ + + + 3 + + Example + + ARM + + 1 + + General + 3 + + 31 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ICCARM + 2 + + 35 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + AARM + 2 + + 10 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + OBJCOPY + 0 + + 1 + 1 + 1 + + + + + + + + + CUSTOM + 3 + + + + 0 + + + + BICOMP + 0 + + + + BUILDACTION + 1 + + + + + + + ILINK + 0 + + 23 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + IARCHIVE + 0 + + 0 + 1 + 1 + + + + + + + BILINK + 0 + + + + Coder + 0 + + + + + Source + + app + + $PROJ_DIR$\..\Source\app\app_encoder.c + + + $PROJ_DIR$\..\Source\app\app_encoder.h + + + $PROJ_DIR$\..\Source\app\boot_app.c + + + $PROJ_DIR$\..\Source\app\boot_app.h + + + $PROJ_DIR$\..\Source\app\boot_app_cfg.c + + + $PROJ_DIR$\..\Source\app\boot_app_cfg.h + + + $PROJ_DIR$\..\Source\app\can_app.c + + + $PROJ_DIR$\..\Source\app\can_app.h + + + $PROJ_DIR$\..\Source\app\demm_app.c + + + $PROJ_DIR$\..\Source\app\demm_app.h + + + $PROJ_DIR$\..\Source\app\fault_detect.c + + + $PROJ_DIR$\..\Source\app\fault_detect.h + + + $PROJ_DIR$\..\Source\app\key_app.c + + + $PROJ_DIR$\..\Source\app\key_app.h + + + $PROJ_DIR$\..\Source\app\led_app.c + + + $PROJ_DIR$\..\Source\app\led_app.h + + + $PROJ_DIR$\..\Source\app\low_power_app.c + + + $PROJ_DIR$\..\Source\app\low_power_app.h + + + $PROJ_DIR$\..\Source\app\main.h + + + $PROJ_DIR$\..\Source\app\system_config.h + + + $PROJ_DIR$\..\Source\app\system_voltage_app.c + + + $PROJ_DIR$\..\Source\app\system_voltage_app.h + + + $PROJ_DIR$\..\Source\app\user_init.c + + + $PROJ_DIR$\..\Source\app\user_init.h + + + $PROJ_DIR$\..\Source\app\WheelHeat.c + + + $PROJ_DIR$\..\Source\app\WheelHeat.h + + + + bsp + + $PROJ_DIR$\..\Source\bsp\adc.c + + + $PROJ_DIR$\..\Source\bsp\adc.h + + + $PROJ_DIR$\..\Source\bsp\adc_cfg.c + + + $PROJ_DIR$\..\Source\bsp\adc_cfg.h + + + $PROJ_DIR$\..\Source\bsp\clk.c + + + $PROJ_DIR$\..\Source\bsp\clk.h + + + $PROJ_DIR$\..\Source\bsp\clk_cfg.c + + + $PROJ_DIR$\..\Source\bsp\clk_cfg.h + + + $PROJ_DIR$\..\Source\bsp\Cpu.c + + + $PROJ_DIR$\..\Source\bsp\Cpu.h + + + $PROJ_DIR$\..\Source\bsp\dma.c + + + $PROJ_DIR$\..\Source\bsp\dma.h + + + $PROJ_DIR$\..\Source\bsp\dma_cfg.c + + + $PROJ_DIR$\..\Source\bsp\dma_cfg.h + + + $PROJ_DIR$\..\Source\bsp\eeprom.c + + + $PROJ_DIR$\..\Source\bsp\eeprom.h + + + $PROJ_DIR$\..\Source\bsp\eeprom_cfg.c + + + $PROJ_DIR$\..\Source\bsp\eeprom_cfg.h + + + $PROJ_DIR$\..\Source\bsp\eeprom_seq.c + + + $PROJ_DIR$\..\Source\bsp\eeprom_seq.h + + + $PROJ_DIR$\..\Source\bsp\eeprom_state_machine.c + + + $PROJ_DIR$\..\Source\bsp\eeprom_state_machine.h + + + $PROJ_DIR$\..\Source\bsp\gpio.c + + + $PROJ_DIR$\..\Source\bsp\gpio.h + + + $PROJ_DIR$\..\Source\bsp\gpio_cfg.c + + + $PROJ_DIR$\..\Source\bsp\gpio_cfg.h + + + $PROJ_DIR$\..\Source\bsp\i2c.c + + + $PROJ_DIR$\..\Source\bsp\i2c.h + + + $PROJ_DIR$\..\Source\bsp\i2c_cfg.c + + + $PROJ_DIR$\..\Source\bsp\i2c_cfg.h + + + $PROJ_DIR$\..\Source\bsp\nvic.c + + + $PROJ_DIR$\..\Source\bsp\nvic.h + + + $PROJ_DIR$\..\Source\bsp\nvic_cfg.c + + + $PROJ_DIR$\..\Source\bsp\nvic_cfg.h + + + $PROJ_DIR$\..\Source\bsp\rmu.c + + + $PROJ_DIR$\..\Source\bsp\rmu.h + + + $PROJ_DIR$\..\Source\bsp\rmu_cfg.c + + + $PROJ_DIR$\..\Source\bsp\rmu_cfg.h + + + $PROJ_DIR$\..\Source\bsp\stack_check.c + + + $PROJ_DIR$\..\Source\bsp\stack_check.h + + + $PROJ_DIR$\..\Source\bsp\stack_check_cfg.c + + + $PROJ_DIR$\..\Source\bsp\stack_check_cfg.h + + + $PROJ_DIR$\..\Source\bsp\svd.c + + + $PROJ_DIR$\..\Source\bsp\svd.h + + + $PROJ_DIR$\..\Source\bsp\svd_cfg.c + + + $PROJ_DIR$\..\Source\bsp\svd_cfg.h + + + $PROJ_DIR$\..\Source\bsp\tim.c + + + $PROJ_DIR$\..\Source\bsp\tim.h + + + $PROJ_DIR$\..\Source\bsp\tim_cfg.c + + + $PROJ_DIR$\..\Source\bsp\tim_cfg.h + + + $PROJ_DIR$\..\Source\bsp\uart.c + + + $PROJ_DIR$\..\Source\bsp\uart.h + + + $PROJ_DIR$\..\Source\bsp\uart_cfg.c + + + $PROJ_DIR$\..\Source\bsp\uart_cfg.h + + + $PROJ_DIR$\..\Source\bsp\wdog.c + + + $PROJ_DIR$\..\Source\bsp\wdog.h + + + $PROJ_DIR$\..\Source\bsp\wdog_cfg.c + + + $PROJ_DIR$\..\Source\bsp\wdog_cfg.h + + + + common + + $PROJ_DIR$\..\Source\common\common_cfg.h + + + $PROJ_DIR$\..\Source\common\common_memory.c + + + $PROJ_DIR$\..\Source\common\common_memory.h + + + $PROJ_DIR$\..\Source\common\common_types.h + + + $PROJ_DIR$\..\Source\common\error.h + + + $PROJ_DIR$\..\Source\common\logic_timer.c + + + $PROJ_DIR$\..\Source\common\logic_timer.h + + + $PROJ_DIR$\..\Source\common\queue_entity.c + + + $PROJ_DIR$\..\Source\common\queue_entity.h + + + $PROJ_DIR$\..\Source\common\queue_entity_cfg.c + + + $PROJ_DIR$\..\Source\common\queue_entity_cfg.h + + + $PROJ_DIR$\..\Source\common\status.h + + + + ComStack + + Can_Gen + + Can + + $PROJ_DIR$\..\Source\ComStack\Can_Gen\Can\Can_Cfg.h + + + $PROJ_DIR$\..\Source\ComStack\Can_Gen\Can\Can_PBcfg.c + + + + CanIf + + $PROJ_DIR$\..\Source\ComStack\Can_Gen\CanIf\CanIf_Cfg.h + + + $PROJ_DIR$\..\Source\ComStack\Can_Gen\CanIf\CanIf_Lcfg.c + + + + CanTp + + $PROJ_DIR$\..\Source\ComStack\Can_Gen\CanTp\CanTp_Cfg.h + + + $PROJ_DIR$\..\Source\ComStack\Can_Gen\CanTp\CanTp_PBcfg.c + + + + Com + + $PROJ_DIR$\..\Source\ComStack\Can_Gen\Com\App_Com.c + + + $PROJ_DIR$\..\Source\ComStack\Can_Gen\Com\Com_Cfg.c + + + $PROJ_DIR$\..\Source\ComStack\Can_Gen\Com\Com_Cfg.h + + + $PROJ_DIR$\..\Source\ComStack\Can_Gen\Com\Com_Lcfg.c + + + + Dcm + + $PROJ_DIR$\..\Source\ComStack\Can_Gen\Dcm\App_Dcm.c + + + $PROJ_DIR$\..\Source\ComStack\Can_Gen\Dcm\Dcm_Cfg.c + + + $PROJ_DIR$\..\Source\ComStack\Can_Gen\Dcm\Dcm_Cfg.h + + + $PROJ_DIR$\..\Source\ComStack\Can_Gen\Dcm\Dcm_Lcfg.c + + + + + CanDriver + + $PROJ_DIR$\..\Source\ComStack\CanDriver\Can.h + + + $PROJ_DIR$\..\Source\ComStack\CanDriver\Can_Pl.h + + + $PROJ_DIR$\..\Source\ComStack\CanDriver\Can_Type.h + + + + CanInterface + + Dem + + $PROJ_DIR$\..\Source\ComStack\CanInterface\Dem\Dem.h + + + $PROJ_DIR$\..\Source\ComStack\CanInterface\Dem\Dem_Cfg.c + + + $PROJ_DIR$\..\Source\ComStack\CanInterface\Dem\DEM_Cfg.h + + + $PROJ_DIR$\..\Source\ComStack\CanInterface\Dem\Dem_IntErrId.h + + + $PROJ_DIR$\..\Source\ComStack\CanInterface\Dem\Dem_Types.h + + + $PROJ_DIR$\..\Source\ComStack\CanInterface\Dem\Demm.h + + + + Det + + $PROJ_DIR$\..\Source\ComStack\CanInterface\Det\Det.h + + + + $PROJ_DIR$\..\Source\ComStack\CanInterface\CanIf.h + + + $PROJ_DIR$\..\Source\ComStack\CanInterface\CanIf_Cbk.h + + + $PROJ_DIR$\..\Source\ComStack\CanInterface\CanIf_Type.h + + + + CanTp + + $PROJ_DIR$\..\Source\ComStack\CanTp\CanTp.h + + + $PROJ_DIR$\..\Source\ComStack\CanTp\CanTp_Cbk.h + + + + CanTrcv + + $PROJ_DIR$\..\Source\ComStack\CanTrcv\CanTrcv.h + + + + Ccp + + Example + + + $PROJ_DIR$\..\Source\ComStack\Ccp\App_Ccp.c + + + $PROJ_DIR$\..\Source\ComStack\Ccp\Ccp.c + + + $PROJ_DIR$\..\Source\ComStack\Ccp\Ccp.h + + + $PROJ_DIR$\..\Source\ComStack\Ccp\Ccp_Cfg.c + + + $PROJ_DIR$\..\Source\ComStack\Ccp\Ccp_Cfg.h + + + + Com + + $PROJ_DIR$\..\Source\ComStack\Com\Com.h + + + $PROJ_DIR$\..\Source\ComStack\Com\Com_Cbk.h + + + $PROJ_DIR$\..\Source\ComStack\Com\Com_Types.h + + + + Common + + $PROJ_DIR$\..\Source\ComStack\Common\Bsw_Common.c + + + $PROJ_DIR$\..\Source\ComStack\Common\Bsw_Common.h + + + $PROJ_DIR$\..\Source\ComStack\Common\Compiler.h + + + $PROJ_DIR$\..\Source\ComStack\Common\Compiler_Cfg.h + + + $PROJ_DIR$\..\Source\ComStack\Common\ComStack_Types.h + + + $PROJ_DIR$\..\Source\ComStack\Common\MemMap.h + + + $PROJ_DIR$\..\Source\ComStack\Common\Platform_Types.h + + + $PROJ_DIR$\..\Source\ComStack\Common\SchM_CanNm.h + + + $PROJ_DIR$\..\Source\ComStack\Common\Std_Types.h + + + + Dcm + + $PROJ_DIR$\..\Source\ComStack\Dcm\Dcm.h + + + $PROJ_DIR$\..\Source\ComStack\Dcm\Dcm_Cbk.h + + + $PROJ_DIR$\..\Source\ComStack\Dcm\Dcm_Types.h + + + + nm + + CanNm + + $PROJ_DIR$\..\Source\ComStack\AutoSarNm\CanNm\Bsw_Common.c + + Example + + + + $PROJ_DIR$\..\Source\ComStack\AutoSarNm\CanNm\Bsw_Common.h + + Example + + + + $PROJ_DIR$\..\Source\ComStack\AutoSarNm\CanNm\CanNm.h + + + $PROJ_DIR$\..\Source\ComStack\AutoSarNm\CanNm\CanNm_Callout.c + + + $PROJ_DIR$\..\Source\ComStack\AutoSarNm\CanNm\CanNm_Callout.h + + + $PROJ_DIR$\..\Source\ComStack\AutoSarNm\CanNm\CanNm_Cbk.h + + + $PROJ_DIR$\..\Source\ComStack\AutoSarNm\CanNm\CanNm_Types.h + + + $PROJ_DIR$\..\Source\ComStack\AutoSarNm\CanNm\CanNm_Version.h + + + $PROJ_DIR$\..\Source\ComStack\AutoSarNm\CanNm\Nm_Cbk.h + + + $PROJ_DIR$\..\Source\ComStack\AutoSarNm\CanNm\NmStack_Types.h + + + $PROJ_DIR$\..\Source\ComStack\AutoSarNm\CanNm\SchM_CanNm.h + + + + config + + $PROJ_DIR$\..\Source\ComStack\AutoSarNm\CanNm_CFG\CanNm_Cfg.h + + + $PROJ_DIR$\..\Source\ComStack\AutoSarNm\CanNm_CFG\CanNm_Lcfg.c + + + $PROJ_DIR$\..\Source\ComStack\AutoSarNm\CanNm_CFG\CanNm_Lcfg.h + + + $PROJ_DIR$\..\Source\ComStack\AutoSarNm\CanNm_CFG\CanNm_PBcfg.c + + + $PROJ_DIR$\..\Source\ComStack\AutoSarNm\CanNm_CFG\CanNm_PBcfg.h + + + + Nm + + + + PDUR + + $PROJ_DIR$\..\Source\ComStack\PDUR\PduR.h + + + $PROJ_DIR$\..\Source\ComStack\PDUR\PduR_CanTp.h + + + $PROJ_DIR$\..\Source\ComStack\PDUR\PduR_Cfg.h + + + $PROJ_DIR$\..\Source\ComStack\PDUR\PduR_Dcm.h + + + $PROJ_DIR$\..\Source\ComStack\PDUR\PduR_Types.h + + + + $PROJ_DIR$\..\Source\ComStack\error.h + + + $PROJ_DIR$\..\Source\ComStack\os_types.h + + + + module + + busoff + + $PROJ_DIR$\..\Source\module\BusOff\Can_BusOff.c + + + $PROJ_DIR$\..\Source\module\BusOff\Can_BusOff.h + + + $PROJ_DIR$\..\Source\module\BusOff\Can_BusOffCfg.c + + + $PROJ_DIR$\..\Source\module\BusOff\Can_BusOffCfg.h + + + + calibration + + $PROJ_DIR$\..\Source\module\calibration\calibration.c + + + $PROJ_DIR$\..\Source\module\calibration\calibration.h + + + + crc + + $PROJ_DIR$\..\Source\module\crc\crc.c + + + $PROJ_DIR$\..\Source\module\crc\crc.h + + + + i2c_simu + + $PROJ_DIR$\..\Source\module\i2c_simu\i2c_simu.c + + + $PROJ_DIR$\..\Source\module\i2c_simu\i2c_simu.h + + + $PROJ_DIR$\..\Source\module\i2c_simu\i2c_simu_cfg.c + + + $PROJ_DIR$\..\Source\module\i2c_simu\i2c_simu_cfg.h + + + + key_encoder + + $PROJ_DIR$\..\Source\module\key_encoder\key_encoder_driver.c + + + $PROJ_DIR$\..\Source\module\key_encoder\key_encoder_driver.h + + + $PROJ_DIR$\..\Source\module\key_encoder\key_encoder_driver_cfg.c + + + $PROJ_DIR$\..\Source\module\key_encoder\key_encoder_driver_cfg.h + + + + keyboard + + $PROJ_DIR$\..\Source\module\keyboard\key_adc_driver.c + + + $PROJ_DIR$\..\Source\module\keyboard\key_adc_driver.h + + + $PROJ_DIR$\..\Source\module\keyboard\key_adc_driver_cfg.c + + + $PROJ_DIR$\..\Source\module\keyboard\key_adc_driver_cfg.h + + + $PROJ_DIR$\..\Source\module\keyboard\key_adc_mid.c + + + $PROJ_DIR$\..\Source\module\keyboard\key_adc_mid.h + + + $PROJ_DIR$\..\Source\module\keyboard\key_adc_mid_cfg.c + + + $PROJ_DIR$\..\Source\module\keyboard\key_adc_mid_cfg.h + + + $PROJ_DIR$\..\Source\module\keyboard\key_com_cfg.c + + + $PROJ_DIR$\..\Source\module\keyboard\key_com_cfg.h + + + $PROJ_DIR$\..\Source\module\keyboard\key_digital_driver.c + + + $PROJ_DIR$\..\Source\module\keyboard\key_digital_driver.h + + + $PROJ_DIR$\..\Source\module\keyboard\key_digital_driver_cfg.c + + + $PROJ_DIR$\..\Source\module\keyboard\key_digital_driver_cfg.h + + + + nvm + + $PROJ_DIR$\..\Source\module\nvm\nvm.c + + + $PROJ_DIR$\..\Source\module\nvm\nvm.h + + + $PROJ_DIR$\..\Source\module\nvm\nvm_cfg.c + + + $PROJ_DIR$\..\Source\module\nvm\nvm_cfg.h + + + + pwm_manage + + $PROJ_DIR$\..\Source\module\pwm_manage\pwm_manage.c + + + $PROJ_DIR$\..\Source\module\pwm_manage\pwm_manage.h + + + $PROJ_DIR$\..\Source\module\pwm_manage\pwm_manage_cfg.h + + + + random + + $PROJ_DIR$\..\Source\module\random\random_pseudo.c + + + $PROJ_DIR$\..\Source\module\random\random_pseudo.h + + + $PROJ_DIR$\..\Source\module\random\service_27.c + + + $PROJ_DIR$\..\Source\module\random\service_27.h + + + + system_voltage_manage + + $PROJ_DIR$\..\Source\module\system_voltage_manage\system_voltage_manage.c + + + $PROJ_DIR$\..\Source\module\system_voltage_manage\system_voltage_manage.h + + + $PROJ_DIR$\..\Source\module\system_voltage_manage\system_voltage_manage_cfg.c + + + $PROJ_DIR$\..\Source\module\system_voltage_manage\system_voltage_manage_cfg.h + + + + + sdk + + Drivers + + CMSIS + + Device + + FM + + FM33xx + + Include + + $PROJ_DIR$\..\Source\sdk\Drivers\CMSIS\Device\FM\FM33xx\Include\core_cm0plus.h + + + $PROJ_DIR$\..\Source\sdk\Drivers\CMSIS\Device\FM\FM33xx\Include\core_cmfunc.h + + + $PROJ_DIR$\..\Source\sdk\Drivers\CMSIS\Device\FM\FM33xx\Include\core_cminstr.h + + + $PROJ_DIR$\..\Source\sdk\Drivers\CMSIS\Device\FM\FM33xx\Include\fm33lg0xx.h + + + $PROJ_DIR$\..\Source\sdk\Drivers\CMSIS\Device\FM\FM33xx\Include\system_fm33lg0xx.h + + + + Source + + Templates + + iar + + linker + + $PROJ_DIR$\..\Source\sdk\Drivers\CMSIS\Device\FM\FM33xx\Source\Templates\iar\linker\FM33LG04x.icf + + + + $PROJ_DIR$\..\Source\sdk\Drivers\CMSIS\Device\FM\FM33xx\Source\Templates\iar\startup_fm33lg0xx.s + + + + $PROJ_DIR$\..\Source\sdk\Drivers\CMSIS\Device\FM\FM33xx\Source\Templates\startup.c + + + $PROJ_DIR$\..\Source\sdk\Drivers\CMSIS\Device\FM\FM33xx\Source\Templates\startup.h + + + + $PROJ_DIR$\..\Source\sdk\Drivers\CMSIS\Device\FM\FM33xx\Source\system_fm33lg0xx.c + + + + + + + + FM33LG0xx_FL_Driver + + Inc + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Inc\fm33_assert.h + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Inc\fm33lg0xx_fl.h + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Inc\fm33lg0xx_fl_adc.h + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Inc\fm33lg0xx_fl_aes.h + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Inc\fm33lg0xx_fl_atim.h + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Inc\fm33lg0xx_fl_bstim16.h + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Inc\fm33lg0xx_fl_bstim32.h + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Inc\fm33lg0xx_fl_can.h + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Inc\fm33lg0xx_fl_cdif.h + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Inc\fm33lg0xx_fl_cmu.h + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Inc\fm33lg0xx_fl_comp.h + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Inc\fm33lg0xx_fl_conf.h + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Inc\fm33lg0xx_fl_crc.h + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Inc\fm33lg0xx_fl_dac.h + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Inc\fm33lg0xx_fl_def.h + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Inc\fm33lg0xx_fl_divas.h + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Inc\fm33lg0xx_fl_dma.h + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Inc\fm33lg0xx_fl_exti.h + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Inc\fm33lg0xx_fl_flash.h + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Inc\fm33lg0xx_fl_gpio.h + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Inc\fm33lg0xx_fl_gptim.h + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Inc\fm33lg0xx_fl_i2c.h + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Inc\fm33lg0xx_fl_iwdt.h + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Inc\fm33lg0xx_fl_lcd.h + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Inc\fm33lg0xx_fl_lptim16.h + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Inc\fm33lg0xx_fl_lptim32.h + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Inc\fm33lg0xx_fl_lpuart.h + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Inc\fm33lg0xx_fl_pmu.h + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Inc\fm33lg0xx_fl_rmu.h + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Inc\fm33lg0xx_fl_rng.h + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Inc\fm33lg0xx_fl_rtca.h + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Inc\fm33lg0xx_fl_spi.h + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Inc\fm33lg0xx_fl_svd.h + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Inc\fm33lg0xx_fl_uart.h + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Inc\fm33lg0xx_fl_vao.h + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Inc\fm33lg0xx_fl_vref.h + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Inc\fm33lg0xx_fl_vrefp.h + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Inc\fm33lg0xx_fl_wwdt.h + + + + Src + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl.c + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_adc.c + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_aes.c + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_atim.c + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_bstim16.c + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_bstim32.c + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_can.c + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_cmu.c + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_comp.c + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_crc.c + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_dac.c + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_divas.c + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_dma.c + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_exti.c + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_flash.c + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_gpio.c + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_gptim.c + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_i2c.c + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_iwdt.c + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_lcd.c + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_lptim16.c + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_lptim32.c + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_lpuart.c + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_pmu.c + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_rng.c + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_rtca.c + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_spi.c + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_svd.c + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_uart.c + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_vao.c + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_vrefp.c + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_wwdt.c + + + + + + MF-config + + Inc + + $PROJ_DIR$\..\Source\sdk\MF-config\Inc\mf_config.h + + + + Src + + $PROJ_DIR$\..\Source\sdk\MF-config\Src\mf_config.c + + + + + + simpleos + + $PROJ_DIR$\..\Source\SimpleOs\SimpleOs.c + + + $PROJ_DIR$\..\Source\SimpleOs\SimpleOs.h + + + $PROJ_DIR$\..\Source\SimpleOs\SimpleOs_CallOut.c + + + $PROJ_DIR$\..\Source\SimpleOs\SimpleOs_CallOut.h + + + $PROJ_DIR$\..\Source\SimpleOs\SimpleOs_Cfg.h + + + $PROJ_DIR$\..\Source\SimpleOs\SimpleOs_Time.c + + + $PROJ_DIR$\..\Source\SimpleOs\SimpleOs_Time.h + + + $PROJ_DIR$\..\Source\SimpleOs\SimpleOs_TimeCfg.h + + + + $PROJ_DIR$\..\Source\main.c + + + diff --git a/code_app_out/ide_project_iar/Example.ewt b/code_app_out/ide_project_iar/Example.ewt new file mode 100644 index 0000000..608062d --- /dev/null +++ b/code_app_out/ide_project_iar/Example.ewt @@ -0,0 +1,2269 @@ + + + 3 + + Example + + ARM + + 1 + + C-STAT + 262 + + 262 + + 0 + + 1 + 600 + 1 + 2 + 0 + 1 + 100 + + + 1.6.2 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + 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+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + RuntimeChecking + 0 + + 2 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + Source + + app + + $PROJ_DIR$\..\Source\app\app_encoder.c + + + $PROJ_DIR$\..\Source\app\app_encoder.h + + + $PROJ_DIR$\..\Source\app\boot_app.c + + + $PROJ_DIR$\..\Source\app\boot_app.h + + + $PROJ_DIR$\..\Source\app\boot_app_cfg.c + + + $PROJ_DIR$\..\Source\app\boot_app_cfg.h + + + $PROJ_DIR$\..\Source\app\can_app.c + + + $PROJ_DIR$\..\Source\app\can_app.h + + + $PROJ_DIR$\..\Source\app\demm_app.c + + + $PROJ_DIR$\..\Source\app\demm_app.h + + + $PROJ_DIR$\..\Source\app\fault_detect.c + + + $PROJ_DIR$\..\Source\app\fault_detect.h + + + $PROJ_DIR$\..\Source\app\key_app.c + + + $PROJ_DIR$\..\Source\app\key_app.h + + + $PROJ_DIR$\..\Source\app\led_app.c + + + $PROJ_DIR$\..\Source\app\led_app.h + + + $PROJ_DIR$\..\Source\app\low_power_app.c + + + $PROJ_DIR$\..\Source\app\low_power_app.h + + + $PROJ_DIR$\..\Source\app\main.h + + + $PROJ_DIR$\..\Source\app\system_config.h + + + $PROJ_DIR$\..\Source\app\system_voltage_app.c + + + $PROJ_DIR$\..\Source\app\system_voltage_app.h + + + $PROJ_DIR$\..\Source\app\user_init.c + + + $PROJ_DIR$\..\Source\app\user_init.h + + + $PROJ_DIR$\..\Source\app\WheelHeat.c + + + $PROJ_DIR$\..\Source\app\WheelHeat.h + + + + bsp + + $PROJ_DIR$\..\Source\bsp\adc.c + + + $PROJ_DIR$\..\Source\bsp\adc.h + + + $PROJ_DIR$\..\Source\bsp\adc_cfg.c + + + $PROJ_DIR$\..\Source\bsp\adc_cfg.h + + + $PROJ_DIR$\..\Source\bsp\clk.c + + + $PROJ_DIR$\..\Source\bsp\clk.h + + + $PROJ_DIR$\..\Source\bsp\clk_cfg.c + + + $PROJ_DIR$\..\Source\bsp\clk_cfg.h + + + $PROJ_DIR$\..\Source\bsp\Cpu.c + + + $PROJ_DIR$\..\Source\bsp\Cpu.h + + + $PROJ_DIR$\..\Source\bsp\dma.c + + + $PROJ_DIR$\..\Source\bsp\dma.h + + + $PROJ_DIR$\..\Source\bsp\dma_cfg.c + + + $PROJ_DIR$\..\Source\bsp\dma_cfg.h + + + $PROJ_DIR$\..\Source\bsp\eeprom.c + + + $PROJ_DIR$\..\Source\bsp\eeprom.h + + + $PROJ_DIR$\..\Source\bsp\eeprom_cfg.c + + + $PROJ_DIR$\..\Source\bsp\eeprom_cfg.h + + + $PROJ_DIR$\..\Source\bsp\eeprom_seq.c + + + $PROJ_DIR$\..\Source\bsp\eeprom_seq.h + + + $PROJ_DIR$\..\Source\bsp\eeprom_state_machine.c + + + $PROJ_DIR$\..\Source\bsp\eeprom_state_machine.h + + + $PROJ_DIR$\..\Source\bsp\gpio.c + + + $PROJ_DIR$\..\Source\bsp\gpio.h + + + $PROJ_DIR$\..\Source\bsp\gpio_cfg.c + + + $PROJ_DIR$\..\Source\bsp\gpio_cfg.h + + + $PROJ_DIR$\..\Source\bsp\i2c.c + + + $PROJ_DIR$\..\Source\bsp\i2c.h + + + $PROJ_DIR$\..\Source\bsp\i2c_cfg.c + + + $PROJ_DIR$\..\Source\bsp\i2c_cfg.h + + + $PROJ_DIR$\..\Source\bsp\nvic.c + + + $PROJ_DIR$\..\Source\bsp\nvic.h + + + $PROJ_DIR$\..\Source\bsp\nvic_cfg.c + + + $PROJ_DIR$\..\Source\bsp\nvic_cfg.h + + + $PROJ_DIR$\..\Source\bsp\rmu.c + + + $PROJ_DIR$\..\Source\bsp\rmu.h + + + $PROJ_DIR$\..\Source\bsp\rmu_cfg.c + + + $PROJ_DIR$\..\Source\bsp\rmu_cfg.h + + + $PROJ_DIR$\..\Source\bsp\stack_check.c + + + $PROJ_DIR$\..\Source\bsp\stack_check.h + + + $PROJ_DIR$\..\Source\bsp\stack_check_cfg.c + + + $PROJ_DIR$\..\Source\bsp\stack_check_cfg.h + + + $PROJ_DIR$\..\Source\bsp\svd.c + + + $PROJ_DIR$\..\Source\bsp\svd.h + + + $PROJ_DIR$\..\Source\bsp\svd_cfg.c + + + $PROJ_DIR$\..\Source\bsp\svd_cfg.h + + + $PROJ_DIR$\..\Source\bsp\tim.c + + + $PROJ_DIR$\..\Source\bsp\tim.h + + + $PROJ_DIR$\..\Source\bsp\tim_cfg.c + + + $PROJ_DIR$\..\Source\bsp\tim_cfg.h + + + $PROJ_DIR$\..\Source\bsp\uart.c + + + $PROJ_DIR$\..\Source\bsp\uart.h + + + $PROJ_DIR$\..\Source\bsp\uart_cfg.c + + + $PROJ_DIR$\..\Source\bsp\uart_cfg.h + + + $PROJ_DIR$\..\Source\bsp\wdog.c + + + $PROJ_DIR$\..\Source\bsp\wdog.h + + + $PROJ_DIR$\..\Source\bsp\wdog_cfg.c + + + $PROJ_DIR$\..\Source\bsp\wdog_cfg.h + + + + common + + $PROJ_DIR$\..\Source\common\common_cfg.h + + + $PROJ_DIR$\..\Source\common\common_memory.c + + + $PROJ_DIR$\..\Source\common\common_memory.h + + + $PROJ_DIR$\..\Source\common\common_types.h + + + $PROJ_DIR$\..\Source\common\error.h + + + $PROJ_DIR$\..\Source\common\logic_timer.c + + + $PROJ_DIR$\..\Source\common\logic_timer.h + + + $PROJ_DIR$\..\Source\common\queue_entity.c + + + $PROJ_DIR$\..\Source\common\queue_entity.h + + + $PROJ_DIR$\..\Source\common\queue_entity_cfg.c + + + $PROJ_DIR$\..\Source\common\queue_entity_cfg.h + + + $PROJ_DIR$\..\Source\common\status.h + + + + ComStack + + Can_Gen + + Can + + $PROJ_DIR$\..\Source\ComStack\Can_Gen\Can\Can_Cfg.h + + + $PROJ_DIR$\..\Source\ComStack\Can_Gen\Can\Can_PBcfg.c + + + + CanIf + + $PROJ_DIR$\..\Source\ComStack\Can_Gen\CanIf\CanIf_Cfg.h + + + $PROJ_DIR$\..\Source\ComStack\Can_Gen\CanIf\CanIf_Lcfg.c + + + + CanTp + + $PROJ_DIR$\..\Source\ComStack\Can_Gen\CanTp\CanTp_Cfg.h + + + $PROJ_DIR$\..\Source\ComStack\Can_Gen\CanTp\CanTp_PBcfg.c + + + + Com + + $PROJ_DIR$\..\Source\ComStack\Can_Gen\Com\App_Com.c + + + $PROJ_DIR$\..\Source\ComStack\Can_Gen\Com\Com_Cfg.c + + + $PROJ_DIR$\..\Source\ComStack\Can_Gen\Com\Com_Cfg.h + + + $PROJ_DIR$\..\Source\ComStack\Can_Gen\Com\Com_Lcfg.c + + + + Dcm + + $PROJ_DIR$\..\Source\ComStack\Can_Gen\Dcm\App_Dcm.c + + + $PROJ_DIR$\..\Source\ComStack\Can_Gen\Dcm\Dcm_Cfg.c + + + $PROJ_DIR$\..\Source\ComStack\Can_Gen\Dcm\Dcm_Cfg.h + + + $PROJ_DIR$\..\Source\ComStack\Can_Gen\Dcm\Dcm_Lcfg.c + + + + + CanDriver + + $PROJ_DIR$\..\Source\ComStack\CanDriver\Can.h + + + $PROJ_DIR$\..\Source\ComStack\CanDriver\Can_Pl.h + + + $PROJ_DIR$\..\Source\ComStack\CanDriver\Can_Type.h + + + + CanInterface + + Dem + + $PROJ_DIR$\..\Source\ComStack\CanInterface\Dem\Dem.h + + + $PROJ_DIR$\..\Source\ComStack\CanInterface\Dem\Dem_Cfg.c + + + $PROJ_DIR$\..\Source\ComStack\CanInterface\Dem\DEM_Cfg.h + + + $PROJ_DIR$\..\Source\ComStack\CanInterface\Dem\Dem_IntErrId.h + + + $PROJ_DIR$\..\Source\ComStack\CanInterface\Dem\Dem_Types.h + + + $PROJ_DIR$\..\Source\ComStack\CanInterface\Dem\Demm.h + + + + Det + + $PROJ_DIR$\..\Source\ComStack\CanInterface\Det\Det.h + + + + $PROJ_DIR$\..\Source\ComStack\CanInterface\CanIf.h + + + $PROJ_DIR$\..\Source\ComStack\CanInterface\CanIf_Cbk.h + + + $PROJ_DIR$\..\Source\ComStack\CanInterface\CanIf_Type.h + + + + CanTp + + $PROJ_DIR$\..\Source\ComStack\CanTp\CanTp.h + + + $PROJ_DIR$\..\Source\ComStack\CanTp\CanTp_Cbk.h + + + + CanTrcv + + $PROJ_DIR$\..\Source\ComStack\CanTrcv\CanTrcv.h + + + + Ccp + + $PROJ_DIR$\..\Source\ComStack\Ccp\App_Ccp.c + + + $PROJ_DIR$\..\Source\ComStack\Ccp\Ccp.c + + + $PROJ_DIR$\..\Source\ComStack\Ccp\Ccp.h + + + $PROJ_DIR$\..\Source\ComStack\Ccp\Ccp_Cfg.c + + + $PROJ_DIR$\..\Source\ComStack\Ccp\Ccp_Cfg.h + + + + Com + + $PROJ_DIR$\..\Source\ComStack\Com\Com.h + + + $PROJ_DIR$\..\Source\ComStack\Com\Com_Cbk.h + + + $PROJ_DIR$\..\Source\ComStack\Com\Com_Types.h + + + + Common + + $PROJ_DIR$\..\Source\ComStack\Common\Bsw_Common.c + + + $PROJ_DIR$\..\Source\ComStack\Common\Bsw_Common.h + + + $PROJ_DIR$\..\Source\ComStack\Common\Compiler.h + + + $PROJ_DIR$\..\Source\ComStack\Common\Compiler_Cfg.h + + + $PROJ_DIR$\..\Source\ComStack\Common\ComStack_Types.h + + + $PROJ_DIR$\..\Source\ComStack\Common\MemMap.h + + + $PROJ_DIR$\..\Source\ComStack\Common\Platform_Types.h + + + $PROJ_DIR$\..\Source\ComStack\Common\SchM_CanNm.h + + + $PROJ_DIR$\..\Source\ComStack\Common\Std_Types.h + + + + Dcm + + $PROJ_DIR$\..\Source\ComStack\Dcm\Dcm.h + + + $PROJ_DIR$\..\Source\ComStack\Dcm\Dcm_Cbk.h + + + $PROJ_DIR$\..\Source\ComStack\Dcm\Dcm_Types.h + + + + nm + + CanNm + + $PROJ_DIR$\..\Source\ComStack\AutoSarNm\CanNm\Bsw_Common.c + + + $PROJ_DIR$\..\Source\ComStack\AutoSarNm\CanNm\Bsw_Common.h + + + $PROJ_DIR$\..\Source\ComStack\AutoSarNm\CanNm\CanNm.h + + + $PROJ_DIR$\..\Source\ComStack\AutoSarNm\CanNm\CanNm_Callout.c + + + $PROJ_DIR$\..\Source\ComStack\AutoSarNm\CanNm\CanNm_Callout.h + + + $PROJ_DIR$\..\Source\ComStack\AutoSarNm\CanNm\CanNm_Cbk.h + + + $PROJ_DIR$\..\Source\ComStack\AutoSarNm\CanNm\CanNm_Types.h + + + $PROJ_DIR$\..\Source\ComStack\AutoSarNm\CanNm\CanNm_Version.h + + + $PROJ_DIR$\..\Source\ComStack\AutoSarNm\CanNm\Nm_Cbk.h + + + $PROJ_DIR$\..\Source\ComStack\AutoSarNm\CanNm\NmStack_Types.h + + + $PROJ_DIR$\..\Source\ComStack\AutoSarNm\CanNm\SchM_CanNm.h + + + + config + + $PROJ_DIR$\..\Source\ComStack\AutoSarNm\CanNm_CFG\CanNm_Cfg.h + + + $PROJ_DIR$\..\Source\ComStack\AutoSarNm\CanNm_CFG\CanNm_Lcfg.c + + + $PROJ_DIR$\..\Source\ComStack\AutoSarNm\CanNm_CFG\CanNm_Lcfg.h + + + $PROJ_DIR$\..\Source\ComStack\AutoSarNm\CanNm_CFG\CanNm_PBcfg.c + + + $PROJ_DIR$\..\Source\ComStack\AutoSarNm\CanNm_CFG\CanNm_PBcfg.h + + + + Nm + + + + PDUR + + $PROJ_DIR$\..\Source\ComStack\PDUR\PduR.h + + + $PROJ_DIR$\..\Source\ComStack\PDUR\PduR_CanTp.h + + + $PROJ_DIR$\..\Source\ComStack\PDUR\PduR_Cfg.h + + + $PROJ_DIR$\..\Source\ComStack\PDUR\PduR_Dcm.h + + + $PROJ_DIR$\..\Source\ComStack\PDUR\PduR_Types.h + + + + $PROJ_DIR$\..\Source\ComStack\error.h + + + $PROJ_DIR$\..\Source\ComStack\os_types.h + + + + module + + busoff + + $PROJ_DIR$\..\Source\module\BusOff\Can_BusOff.c + + + $PROJ_DIR$\..\Source\module\BusOff\Can_BusOff.h + + + $PROJ_DIR$\..\Source\module\BusOff\Can_BusOffCfg.c + + + $PROJ_DIR$\..\Source\module\BusOff\Can_BusOffCfg.h + + + + calibration + + $PROJ_DIR$\..\Source\module\calibration\calibration.c + + + $PROJ_DIR$\..\Source\module\calibration\calibration.h + + + + crc + + $PROJ_DIR$\..\Source\module\crc\crc.c + + + $PROJ_DIR$\..\Source\module\crc\crc.h + + + + i2c_simu + + $PROJ_DIR$\..\Source\module\i2c_simu\i2c_simu.c + + + $PROJ_DIR$\..\Source\module\i2c_simu\i2c_simu.h + + + $PROJ_DIR$\..\Source\module\i2c_simu\i2c_simu_cfg.c + + + $PROJ_DIR$\..\Source\module\i2c_simu\i2c_simu_cfg.h + + + + key_encoder + + $PROJ_DIR$\..\Source\module\key_encoder\key_encoder_driver.c + + + $PROJ_DIR$\..\Source\module\key_encoder\key_encoder_driver.h + + + $PROJ_DIR$\..\Source\module\key_encoder\key_encoder_driver_cfg.c + + + $PROJ_DIR$\..\Source\module\key_encoder\key_encoder_driver_cfg.h + + + + keyboard + + $PROJ_DIR$\..\Source\module\keyboard\key_adc_driver.c + + + $PROJ_DIR$\..\Source\module\keyboard\key_adc_driver.h + + + $PROJ_DIR$\..\Source\module\keyboard\key_adc_driver_cfg.c + + + $PROJ_DIR$\..\Source\module\keyboard\key_adc_driver_cfg.h + + + $PROJ_DIR$\..\Source\module\keyboard\key_adc_mid.c + + + $PROJ_DIR$\..\Source\module\keyboard\key_adc_mid.h + + + $PROJ_DIR$\..\Source\module\keyboard\key_adc_mid_cfg.c + + + $PROJ_DIR$\..\Source\module\keyboard\key_adc_mid_cfg.h + + + $PROJ_DIR$\..\Source\module\keyboard\key_com_cfg.c + + + $PROJ_DIR$\..\Source\module\keyboard\key_com_cfg.h + + + $PROJ_DIR$\..\Source\module\keyboard\key_digital_driver.c + + + $PROJ_DIR$\..\Source\module\keyboard\key_digital_driver.h + + + $PROJ_DIR$\..\Source\module\keyboard\key_digital_driver_cfg.c + + + $PROJ_DIR$\..\Source\module\keyboard\key_digital_driver_cfg.h + + + + nvm + + $PROJ_DIR$\..\Source\module\nvm\nvm.c + + + $PROJ_DIR$\..\Source\module\nvm\nvm.h + + + $PROJ_DIR$\..\Source\module\nvm\nvm_cfg.c + + + $PROJ_DIR$\..\Source\module\nvm\nvm_cfg.h + + + + pwm_manage + + $PROJ_DIR$\..\Source\module\pwm_manage\pwm_manage.c + + + $PROJ_DIR$\..\Source\module\pwm_manage\pwm_manage.h + + + $PROJ_DIR$\..\Source\module\pwm_manage\pwm_manage_cfg.h + + + + random + + $PROJ_DIR$\..\Source\module\random\random_pseudo.c + + + $PROJ_DIR$\..\Source\module\random\random_pseudo.h + + + $PROJ_DIR$\..\Source\module\random\service_27.c + + + $PROJ_DIR$\..\Source\module\random\service_27.h + + + + system_voltage_manage + + $PROJ_DIR$\..\Source\module\system_voltage_manage\system_voltage_manage.c + + + $PROJ_DIR$\..\Source\module\system_voltage_manage\system_voltage_manage.h + + + $PROJ_DIR$\..\Source\module\system_voltage_manage\system_voltage_manage_cfg.c + + + $PROJ_DIR$\..\Source\module\system_voltage_manage\system_voltage_manage_cfg.h + + + + + sdk + + Drivers + + CMSIS + + Device + + FM + + FM33xx + + Include + + $PROJ_DIR$\..\Source\sdk\Drivers\CMSIS\Device\FM\FM33xx\Include\core_cm0plus.h + + + $PROJ_DIR$\..\Source\sdk\Drivers\CMSIS\Device\FM\FM33xx\Include\core_cmfunc.h + + + $PROJ_DIR$\..\Source\sdk\Drivers\CMSIS\Device\FM\FM33xx\Include\core_cminstr.h + + + $PROJ_DIR$\..\Source\sdk\Drivers\CMSIS\Device\FM\FM33xx\Include\fm33lg0xx.h + + + $PROJ_DIR$\..\Source\sdk\Drivers\CMSIS\Device\FM\FM33xx\Include\system_fm33lg0xx.h + + + + Source + + Templates + + iar + + linker + + $PROJ_DIR$\..\Source\sdk\Drivers\CMSIS\Device\FM\FM33xx\Source\Templates\iar\linker\FM33LG04x.icf + + + + $PROJ_DIR$\..\Source\sdk\Drivers\CMSIS\Device\FM\FM33xx\Source\Templates\iar\startup_fm33lg0xx.s + + + + $PROJ_DIR$\..\Source\sdk\Drivers\CMSIS\Device\FM\FM33xx\Source\Templates\startup.c + + + $PROJ_DIR$\..\Source\sdk\Drivers\CMSIS\Device\FM\FM33xx\Source\Templates\startup.h + + + + $PROJ_DIR$\..\Source\sdk\Drivers\CMSIS\Device\FM\FM33xx\Source\system_fm33lg0xx.c + + + + + + + + FM33LG0xx_FL_Driver + + Inc + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Inc\fm33_assert.h + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Inc\fm33lg0xx_fl.h + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Inc\fm33lg0xx_fl_adc.h + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Inc\fm33lg0xx_fl_aes.h + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Inc\fm33lg0xx_fl_atim.h + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Inc\fm33lg0xx_fl_bstim16.h + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Inc\fm33lg0xx_fl_bstim32.h + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Inc\fm33lg0xx_fl_can.h + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Inc\fm33lg0xx_fl_cdif.h + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Inc\fm33lg0xx_fl_cmu.h + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Inc\fm33lg0xx_fl_comp.h + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Inc\fm33lg0xx_fl_conf.h + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Inc\fm33lg0xx_fl_crc.h + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Inc\fm33lg0xx_fl_dac.h + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Inc\fm33lg0xx_fl_def.h + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Inc\fm33lg0xx_fl_divas.h + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Inc\fm33lg0xx_fl_dma.h + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Inc\fm33lg0xx_fl_exti.h + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Inc\fm33lg0xx_fl_flash.h + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Inc\fm33lg0xx_fl_gpio.h + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Inc\fm33lg0xx_fl_gptim.h + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Inc\fm33lg0xx_fl_i2c.h + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Inc\fm33lg0xx_fl_iwdt.h + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Inc\fm33lg0xx_fl_lcd.h + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Inc\fm33lg0xx_fl_lptim16.h + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Inc\fm33lg0xx_fl_lptim32.h + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Inc\fm33lg0xx_fl_lpuart.h + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Inc\fm33lg0xx_fl_pmu.h + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Inc\fm33lg0xx_fl_rmu.h + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Inc\fm33lg0xx_fl_rng.h + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Inc\fm33lg0xx_fl_rtca.h + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Inc\fm33lg0xx_fl_spi.h + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Inc\fm33lg0xx_fl_svd.h + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Inc\fm33lg0xx_fl_uart.h + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Inc\fm33lg0xx_fl_vao.h + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Inc\fm33lg0xx_fl_vref.h + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Inc\fm33lg0xx_fl_vrefp.h + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Inc\fm33lg0xx_fl_wwdt.h + + + + Src + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl.c + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_adc.c + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_aes.c + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_atim.c + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_bstim16.c + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_bstim32.c + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_can.c + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_cmu.c + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_comp.c + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_crc.c + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_dac.c + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_divas.c + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_dma.c + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_exti.c + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_flash.c + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_gpio.c + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_gptim.c + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_i2c.c + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_iwdt.c + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_lcd.c + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_lptim16.c + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_lptim32.c + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_lpuart.c + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_pmu.c + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_rng.c + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_rtca.c + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_spi.c + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_svd.c + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_uart.c + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_vao.c + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_vrefp.c + + + $PROJ_DIR$\..\Source\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_wwdt.c + + + + + + MF-config + + Inc + + $PROJ_DIR$\..\Source\sdk\MF-config\Inc\mf_config.h + + + + Src + + $PROJ_DIR$\..\Source\sdk\MF-config\Src\mf_config.c + + + + + + simpleos + + $PROJ_DIR$\..\Source\SimpleOs\SimpleOs.c + + + $PROJ_DIR$\..\Source\SimpleOs\SimpleOs.h + + + $PROJ_DIR$\..\Source\SimpleOs\SimpleOs_CallOut.c + + + $PROJ_DIR$\..\Source\SimpleOs\SimpleOs_CallOut.h + + + $PROJ_DIR$\..\Source\SimpleOs\SimpleOs_Cfg.h + + + $PROJ_DIR$\..\Source\SimpleOs\SimpleOs_Time.c + + + $PROJ_DIR$\..\Source\SimpleOs\SimpleOs_Time.h + + + $PROJ_DIR$\..\Source\SimpleOs\SimpleOs_TimeCfg.h + + + + $PROJ_DIR$\..\Source\main.c + + + diff --git a/code_app_out/ide_project_iar/Project.eww b/code_app_out/ide_project_iar/Project.eww new file mode 100644 index 0000000..261504c --- /dev/null +++ b/code_app_out/ide_project_iar/Project.eww @@ -0,0 +1,7 @@ + + + + $WS_DIR$\Example.ewp + + + diff --git a/code_app_out/ide_project_iar/device/FM33LG04x.i79 b/code_app_out/ide_project_iar/device/FM33LG04x.i79 new file mode 100644 index 0000000..cb7c27f --- /dev/null +++ b/code_app_out/ide_project_iar/device/FM33LG04x.i79 @@ -0,0 +1,29 @@ +[FILEFORMAT] +rev=1.6 + +[CHIP] +name=FM33LG04x +endiansupport=le +thumbsupport=true +armsupport=false +fpu=None +SIMD=false + +JTAG=false +SWD=true +SWO_TraceD0=false + +[CORE] +name=SC000 + +[DDF FILE] +name=FMSH\FM33LG04x.ddf + +[LINKER FILE] +name=$TOOLKIT_DIR$\config\linker\FMSH\FM33LG04x.icf + +[FLASH LOADER] + +little=$TOOLKIT_DIR$\config\flashloader\FMSH\FM33LG04x.board + + diff --git a/code_app_out/ide_project_iar/device/FM33LG04x.menu b/code_app_out/ide_project_iar/device/FM33LG04x.menu new file mode 100644 index 0000000..771d6d8 --- /dev/null +++ b/code_app_out/ide_project_iar/device/FM33LG04x.menu @@ -0,0 +1,7 @@ + + + FM33LG04x + FMSH FM33LG04x + $CUR_DIR$\FM33LG04x.i79 + + diff --git a/code_app_out/ide_project_iar/flashloader/FM33LG04x.board b/code_app_out/ide_project_iar/flashloader/FM33LG04x.board new file mode 100644 index 0000000..acc4027 --- /dev/null +++ b/code_app_out/ide_project_iar/flashloader/FM33LG04x.board @@ -0,0 +1,11 @@ + + + + + CODE 0x00000000 0x0003FFFF + $PROJ_DIR$\flashloader\FM33LG04x.flash + + + + + diff --git a/code_app_out/ide_project_iar/flashloader/FM33LG04x.flash b/code_app_out/ide_project_iar/flashloader/FM33LG04x.flash new file mode 100644 index 0000000..a23a209 --- /dev/null +++ b/code_app_out/ide_project_iar/flashloader/FM33LG04x.flash @@ -0,0 +1,10 @@ + + + + $PROJ_DIR$\flashloader\fm33lg0xx.out + 1 + 256 0x400 + 0x00000000 + 1 + 1 + diff --git a/code_app_out/ide_project_iar/flashloader/fm33lg0xx.out b/code_app_out/ide_project_iar/flashloader/fm33lg0xx.out new file mode 100644 index 0000000..cc0ffb3 Binary files /dev/null and b/code_app_out/ide_project_iar/flashloader/fm33lg0xx.out differ diff --git a/code_app_out/ide_project_iar/note.txt b/code_app_out/ide_project_iar/note.txt new file mode 100644 index 0000000..973024d --- /dev/null +++ b/code_app_out/ide_project_iar/note.txt @@ -0,0 +1,14 @@ + +\config\debugger\FMSH\ +復制到 +C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.3 ARM8402\arm\RTOS\SEGGER\ + +\config\devices\FMSH\ +復制到 +C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.3 ARM8402\arm\config\devices\ + +\config\flashloader\ +復制到 +C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.3 ARM8402\arm\src\flashloader\ + + diff --git a/code_boot_out/asil/algorithmic/crc.c b/code_boot_out/asil/algorithmic/crc.c new file mode 100644 index 0000000..759c47e --- /dev/null +++ b/code_boot_out/asil/algorithmic/crc.c @@ -0,0 +1,436 @@ +/** ########################################################################## +** Filename : +** Project : +** Module : +** Processor : +** Version : +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20230602- --V1.0-- --mingyea--- --修改-- + +** #########################################################################*/ + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ +#include "crc.h" +#include "common_types.h" + +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ +#ifdef CRC_USE_TABLE +#define CRC8_BIT(x) (1u << (x)) +#endif + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ +typedef struct +{ + u8 width; + u8 poly; + u8 init; + u8 refin; + u8 refout; + u8 xorout; +}crc8_info_s; + +/*--------------------------------------------------------------------------- +- S T A T I C V A R I A B L E S +----------------------------------------------------------------------------*/ +MEMORY_MAP_RAM_FOR_ASIL ENABLE_STATIC_FOR_ASIL crc8_info_s crc_struct[CRC8_ID_MAX] = +{ + {8, CRC8_L1_POLY_VALUE, CRC8_L1_INIT_VALUE, 0, 0, CRC8_L1_XOR_VALUE}, //CRC8_SAE J1850 + {8, CRC8_L2_POLY_VALUE, CRC8_L2_INIT_VALUE, 0, 0, CRC8_L2_XOR_VALUE}, //CRC8_SAE J1850 +}; + + +/*--------------------------------------------------------------------------- +* G L O B A L V A R I A B L E S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ +#ifdef CRC_USE_TABLE + +#ifdef CRC_TABLE_IS_CONST + +MEMORY_MAP_ROM_DATA_FOR_ASIL const u8 crc8_table[CRC8_ID_MAX][256]= +{ + { //多项式 1D 初始化值 FF 异或值 FF + 0x00, 0x1D, 0x3A, 0x27, 0x74, 0x69, 0x4E, 0x53, 0xE8, 0xF5, 0xD2, 0xCF, 0x9C, 0x81, 0xA6, 0xBB, + 0xCD, 0xD0, 0xF7, 0xEA, 0xB9, 0xA4, 0x83, 0x9E, 0x25, 0x38, 0x1F, 0x02, 0x51, 0x4C, 0x6B, 0x76, + 0x87, 0x9A, 0xBD, 0xA0, 0xF3, 0xEE, 0xC9, 0xD4, 0x6F, 0x72, 0x55, 0x48, 0x1B, 0x06, 0x21, 0x3C, + 0x4A, 0x57, 0x70, 0x6D, 0x3E, 0x23, 0x04, 0x19, 0xA2, 0xBF, 0x98, 0x85, 0xD6, 0xCB, 0xEC, 0xF1, + 0x13, 0x0E, 0x29, 0x34, 0x67, 0x7A, 0x5D, 0x40, 0xFB, 0xE6, 0xC1, 0xDC, 0x8F, 0x92, 0xB5, 0xA8, + 0xDE, 0xC3, 0xE4, 0xF9, 0xAA, 0xB7, 0x90, 0x8D, 0x36, 0x2B, 0x0C, 0x11, 0x42, 0x5F, 0x78, 0x65, + 0x94, 0x89, 0xAE, 0xB3, 0xE0, 0xFD, 0xDA, 0xC7, 0x7C, 0x61, 0x46, 0x5B, 0x08, 0x15, 0x32, 0x2F, + 0x59, 0x44, 0x63, 0x7E, 0x2D, 0x30, 0x17, 0x0A, 0xB1, 0xAC, 0x8B, 0x96, 0xC5, 0xD8, 0xFF, 0xE2, + 0x26, 0x3B, 0x1C, 0x01, 0x52, 0x4F, 0x68, 0x75, 0xCE, 0xD3, 0xF4, 0xE9, 0xBA, 0xA7, 0x80, 0x9D, + 0xEB, 0xF6, 0xD1, 0xCC, 0x9F, 0x82, 0xA5, 0xB8, 0x03, 0x1E, 0x39, 0x24, 0x77, 0x6A, 0x4D, 0x50, + 0xA1, 0xBC, 0x9B, 0x86, 0xD5, 0xC8, 0xEF, 0xF2, 0x49, 0x54, 0x73, 0x6E, 0x3D, 0x20, 0x07, 0x1A, + 0x6C, 0x71, 0x56, 0x4B, 0x18, 0x05, 0x22, 0x3F, 0x84, 0x99, 0xBE, 0xA3, 0xF0, 0xED, 0xCA, 0xD7, + 0x35, 0x28, 0x0F, 0x12, 0x41, 0x5C, 0x7B, 0x66, 0xDD, 0xC0, 0xE7, 0xFA, 0xA9, 0xB4, 0x93, 0x8E, + 0xF8, 0xE5, 0xC2, 0xDF, 0x8C, 0x91, 0xB6, 0xAB, 0x10, 0x0D, 0x2A, 0x37, 0x64, 0x79, 0x5E, 0x43, + 0xB2, 0xAF, 0x88, 0x95, 0xC6, 0xDB, 0xFC, 0xE1, 0x5A, 0x47, 0x60, 0x7D, 0x2E, 0x33, 0x14, 0x09, + 0x7F, 0x62, 0x45, 0x58, 0x0B, 0x16, 0x31, 0x2C, 0x97, 0x8A, 0xAD, 0xB0, 0xE3, 0xFE, 0xD9, 0xC4 + }, + { //多项式 1D 初始化值 00 异或值 00 + 0x00, 0x1D, 0x3A, 0x27, 0x74, 0x69, 0x4E, 0x53, 0xE8, 0xF5, 0xD2, 0xCF, 0x9C, 0x81, 0xA6, 0xBB, + 0xCD, 0xD0, 0xF7, 0xEA, 0xB9, 0xA4, 0x83, 0x9E, 0x25, 0x38, 0x1F, 0x02, 0x51, 0x4C, 0x6B, 0x76, + 0x87, 0x9A, 0xBD, 0xA0, 0xF3, 0xEE, 0xC9, 0xD4, 0x6F, 0x72, 0x55, 0x48, 0x1B, 0x06, 0x21, 0x3C, + 0x4A, 0x57, 0x70, 0x6D, 0x3E, 0x23, 0x04, 0x19, 0xA2, 0xBF, 0x98, 0x85, 0xD6, 0xCB, 0xEC, 0xF1, + 0x13, 0x0E, 0x29, 0x34, 0x67, 0x7A, 0x5D, 0x40, 0xFB, 0xE6, 0xC1, 0xDC, 0x8F, 0x92, 0xB5, 0xA8, + 0xDE, 0xC3, 0xE4, 0xF9, 0xAA, 0xB7, 0x90, 0x8D, 0x36, 0x2B, 0x0C, 0x11, 0x42, 0x5F, 0x78, 0x65, + 0x94, 0x89, 0xAE, 0xB3, 0xE0, 0xFD, 0xDA, 0xC7, 0x7C, 0x61, 0x46, 0x5B, 0x08, 0x15, 0x32, 0x2F, + 0x59, 0x44, 0x63, 0x7E, 0x2D, 0x30, 0x17, 0x0A, 0xB1, 0xAC, 0x8B, 0x96, 0xC5, 0xD8, 0xFF, 0xE2, + 0x26, 0x3B, 0x1C, 0x01, 0x52, 0x4F, 0x68, 0x75, 0xCE, 0xD3, 0xF4, 0xE9, 0xBA, 0xA7, 0x80, 0x9D, + 0xEB, 0xF6, 0xD1, 0xCC, 0x9F, 0x82, 0xA5, 0xB8, 0x03, 0x1E, 0x39, 0x24, 0x77, 0x6A, 0x4D, 0x50, + 0xA1, 0xBC, 0x9B, 0x86, 0xD5, 0xC8, 0xEF, 0xF2, 0x49, 0x54, 0x73, 0x6E, 0x3D, 0x20, 0x07, 0x1A, + 0x6C, 0x71, 0x56, 0x4B, 0x18, 0x05, 0x22, 0x3F, 0x84, 0x99, 0xBE, 0xA3, 0xF0, 0xED, 0xCA, 0xD7, + 0x35, 0x28, 0x0F, 0x12, 0x41, 0x5C, 0x7B, 0x66, 0xDD, 0xC0, 0xE7, 0xFA, 0xA9, 0xB4, 0x93, 0x8E, + 0xF8, 0xE5, 0xC2, 0xDF, 0x8C, 0x91, 0xB6, 0xAB, 0x10, 0x0D, 0x2A, 0x37, 0x64, 0x79, 0x5E, 0x43, + 0xB2, 0xAF, 0x88, 0x95, 0xC6, 0xDB, 0xFC, 0xE1, 0x5A, 0x47, 0x60, 0x7D, 0x2E, 0x33, 0x14, 0x09, + 0x7F, 0x62, 0x45, 0x58, 0x0B, 0x16, 0x31, 0x2C, 0x97, 0x8A, 0xAD, 0xB0, 0xE3, 0xFE, 0xD9, 0xC4 + } +}; + +#else + +MEMORY_MAP_RAM_FOR_ASIL ENABLE_STATIC_FOR_ASIL u8 crc8_table[CRC8_ID_MAX][256] = {0u}; + +#endif + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : 位逆转 +----------------------------------------------------------------------------*/ +MEMORY_MAP_ROM_FOR_ASIL u8 crc8_reflected(u8 input_value, u8 bits) +{ + u8 var = 0u; + u8 l_bits = bits; + while(l_bits) + { + l_bits -= 1u; + var <<= 1; + if (input_value & 0x01u) + { + var |= 1u; + } + input_value >>= 1u; + } + return var; +} + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +----------------------------------------------------------------------------*/ +MEMORY_MAP_ROM_FOR_ASIL void crc8_table_init(u8 id) /*PRQA S 3206*/ /*CRC_TABLE_IS_CONST开着引起的*/ +{ + #ifdef CRC_TABLE_IS_CONST + + #else + + u16 i; + u8 j; + u8 poly, value; + u8 valid_bits; + u8 l_bit ; + + if(id> 1u) ^ poly; + } + else + { + value = (value >> 1u); + } + } + crc8_table[id][i] = value & valid_bits; + } + } + //正序MSB输入 + else + { + //如果位数小于8，poly要左移到最高位 + poly = crc_struct[id].width < 8u ? crc_struct[id].poly << (8u - crc_struct[id].width) : crc_struct[id].poly; + l_bit = crc_struct[id].width > 8u ? CRC8_BIT(crc_struct[id].width - 1u) : 0x80u; + + for (i = 0u; i < 256u; i++) + { + value = crc_struct[id].width > 8u ? i << (crc_struct[id].width - 8u) : i; + for (j = 0u; j < 8u; j++) + { + if (value & l_bit) + { + value = (value << 1) ^ poly; + } + else + { + value = (value << 1); + } + } + //如果width < 8，那么实际上，crc是在高width位的，需要右移 8 - width + //但是为了方便后续异或（还是要移位到最高位与*ptr的bit7对齐），所以不处理 + // if (info->width < 8) + // value >>= 8 - info->width; + // crc8_table[id][i] = value & (2 << (info->width - 1)) - 1); + crc8_table[id][i] = value & (crc_struct[id].width < 8u ? 0xff : valid_bits); + } + } + } + #endif +} + +#if 0 +void crc8_generate_table(void) +{ + crc8_table_init(&crc_struct[0]); +} +#endif + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +----------------------------------------------------------------------------*/ +MEMORY_MAP_ROM_FOR_ASIL u8 crc8_table_set_init_value(u8 id,u8 value) +{ + if(id=CAN_ID_TOTAL) + { + return; + } + g_ls_nm.busoff[phy_id].flag_busoff=1u; +} + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : - +|Input parameters : None +|Output parameters : None +|Return value : None +|Description : 在busoff时重试 +----------------------------------------------------------------------------*/ +static void can_nm_busoff_recovery_op(u8 phy_id) +{ + u8 l_logic_id; + #ifdef CAN_LS_EN + l_logic_id = can_drive_get_logic_id(phy_id); + #else + l_logic_id = CAN_ID_0; + #endif + //wdog_task(); + //__disable_irq(); + LS_NM_TEST_IO_ON(); + CanTrcv_Init(); + //can_de_init(); + //can_init(); + Can_Deinit(); + Can_Init(); + LS_NM_TEST_IO_OFF(); + //__enable_irq(); +} + + +#if 0 //用来测试主动发 +void can_nm_test_tx(void) +{ + bl_u8_t i; + bl_u8_t l_buf[8u]; + + for(i=0;i<8;i++) + { + l_buf[i] = 0x11u; + } + //for(i=8;i=CAN_ID_TOTAL) || (l_logic_id==CAN_ID_NULL) ) + { + return; + } + if(g_ls_nm.busoff[phy_id].state == NM_BUSOFF_RECOVERY_STATE_NULL) + { + g_ls_nm.busoff[phy_id].timecount=0u; + g_ls_nm.busoff[phy_id].try_count=0u; + } + else + { + g_ls_nm.busoff[phy_id].timecount++; + if(g_ls_nm.busoff[phy_id].timecount >=NM_MAIN_BUSOFF_FAST_H) + { + g_ls_nm.busoff[phy_id].timecount=0u; + #ifdef LS_NM_DEBUG_EN + g_ls_nm.test_buf[2]++; + #endif + //g_ls_nm.busoff.sub_state=1u; + can_nm_busoff_recovery_op(phy_id); + } + } +} + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +----------------------------------------------------------------------------*/ +static void can_nm_busoff_recovery_successful(u8 phy_id) +{ + if(phy_id>=CAN_ID_TOTAL) + { + return; + } + if(g_ls_nm.busoff[phy_id].state != NM_BUSOFF_RECOVERY_STATE_NULL) + { + g_ls_nm.busoff[phy_id].timecount =0; + g_ls_nm.busoff[phy_id].try_count =0; + + g_ls_nm.busoff[phy_id].state =NM_BUSOFF_RECOVERY_STATE_NULL; + #ifdef LS_NM_DEBUG_EN + g_ls_nm.test_buf[10]++; + #endif + } +} + + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +----------------------------------------------------------------------------*/ +void ls_nm_Init(void) +{ + common_memory_clear((u8*)&g_ls_nm,sizeof(g_ls_nm)); + #ifdef CAN_LS_EN + CanTrcv_Init(); + #endif +} + + + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +----------------------------------------------------------------------------*/ +void ls_nm_task(void) +{ + NM_CPU_SR_ALLOC(); + + NM_ENTER_CRITICAL(); + + //can_nm_test_tx(); + + if(g_ls_nm.busoff[CAN_ID_0].flag_busoff == 1u) + { + g_ls_nm.busoff[CAN_ID_0].flag_busoff=0u; + // + if(g_ls_nm.busoff[CAN_ID_0].state == NM_BUSOFF_RECOVERY_STATE_NULL) + { + //g_ls_nm.busoff[CAN_ID_0].timecount=0u; + g_ls_nm.busoff[CAN_ID_0].state = NM_BUSOFF_RECOVERY_STATE_QUICK; + } + } + + #ifdef CAN_ID_0_EN + can_nm_busoff_recovery_task(CAN_ID_0); + #endif + + NM_EXIT_CRITICAL(); +} + + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +----------------------------------------------------------------------------*/ +u8 CanNm_PhysErrorInd(u8 phy_id,nm_erro_source_e erro) +{ + u8 retValue; + NM_CPU_SR_ALLOC(); + + //g_nm_test1[1]++; + if( erro == NM_DLL_BUS_OFF) + { + //g_nm_test1[2]++; + NM_ENTER_CRITICAL(); + can_nm_phy_busoff_trig(phy_id); + NM_EXIT_CRITICAL(); + + } + else if( erro == NM_DLL_ERROR_PASSIVE) + { + //g_nm_test1[3]++; + } + else if( erro == NM_DLL_ERROR_ACTIVE) + { + //g_nm_test1[4]++; + } + else if( erro == NM_DLL_BUS_OFF_PRE) + { + can_nm_phy_busoff_pre_trig(phy_id); + } + + return retValue; + +} + + + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +----------------------------------------------------------------------------*/ +u8 CanNm_is_busoff(void) +{ + u8 l_result = LS_NM_IS_NOT_BUSOFF; + + NM_CPU_SR_ALLOC(); + + NM_ENTER_CRITICAL(); + #if 1 + if( g_ls_nm.busoff[CAN_ID_0].state == NM_BUSOFF_RECOVERY_STATE_NULL + ) + { + l_result = LS_NM_IS_NOT_BUSOFF; + } + else + { + l_result = LS_NM_IS_BUSOFF; + } + #else + if( (g_ls_nm.state == NM_MAIN_STATE_ACTIVE) \ + && (g_ls_nm.sub_state != NM_SUB_STATE_ACTIVE_BUSOFF) \ + && (g_ls_nm.busoff[CAN_ID_0].state == NM_BUSOFF_RECOVERY_STATE_NULL) + //&& (g_ls_nm.busoff[CAN_ID_1].state == NM_BUSOFF_RECOVERY_STATE_NULL) + ) + { + l_result = LS_NM_IS_NOT_BUSOFF; + } + else + { + l_result = LS_NM_IS_BUSOFF; + } + #endif + + NM_EXIT_CRITICAL(); + + return l_result; + +} + + + + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +----------------------------------------------------------------------------*/ +void CanNm_TxConfirmation_com(PduIdType canNmPduId,u8 phy_id) +{ + NM_CPU_SR_ALLOC(); + (void)canNmPduId; + + { + //g_nm_test1[8]++; + NM_ENTER_CRITICAL(); + can_nm_busoff_recovery_successful(phy_id); + NM_EXIT_CRITICAL(); + } + +} + + + + + + + + diff --git a/code_boot_out/asil/bsp/Ls_Nm.h b/code_boot_out/asil/bsp/Ls_Nm.h new file mode 100644 index 0000000..b15690b --- /dev/null +++ b/code_boot_out/asil/bsp/Ls_Nm.h @@ -0,0 +1,161 @@ +/** ########################################################################## +** Filename : +** Project : +** Module : +** Processor : +** Version : +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +*** -20230602- --V1.0-- --mingyea--- --修改-- + +** #########################################################################*/ +#ifndef LS_NM_H_ +#define LS_NM_H_ + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ +#include "common_types.h" +//#include "Std_Types.h" +//#include "ComStack_Types.h" +#include "Cpu.h" +#include "can.h" +#include "Ls_Nm_Cfg.h" + + +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ +/*請求命令*/ +typedef enum +{ + NM_REQ_CMD_NULL = 0, + NM_REQ_CMD_GOTO_INACTIVE, + NM_REQ_CMD_GOTO_ACTIVE, + NM_REQ_CMD_POWER_ON, /*第一次上電*/ +}nm_req_cmd_e; + + +/*主狀態*/ +typedef enum +{ + NM_MAIN_STATE_INACTIVE = 0, + NM_MAIN_STATE_ACTIVE, +}nm_main_state_e; + + +/*子狀態*/ +typedef enum +{ + NM_SUB_STATE_INACTIVE_IDLE = 0, + NM_SUB_STATE_ACTIVE_NORMAL , + NM_SUB_STATE_ACTIVE_BUSOFF, +}nm_sub_state_active_e; + + +/*標誌--可預睡眠*/ +typedef enum +{ + NM_FLAG_SHALL_SLEEP = 0, + NM_FLAG_SHALL_WAKE, +}nm_flag_shall_sleep_e; + +typedef enum +{ + NM_DLL_ERROR_ACTIVE = 0, + NM_DLL_ERROR_PASSIVE, + NM_DLL_BUS_OFF_PRE, //预进入busoff + NM_DLL_BUS_OFF, //真正进入busoff +}nm_erro_source_e; + + + +typedef enum +{ + NM_MOTE_STARTED = 0, + NM_MOTE_SLEEP = 1, + NM_MOTE_STOP = 2, +}nmCanModeType; + +typedef enum +{ + NM_REC_SEND = 0, + NM_REC_ONLY = 1, + NM_REC_STOP = 2, +}nmIlReqType; + + +//快慢恢复状态 +typedef enum +{ + NM_BUSOFF_RECOVERY_STATE_NULL = 0u, + NM_BUSOFF_RECOVERY_STATE_QUICK, + NM_BUSOFF_RECOVERY_STATE_SLOW +}nm_busoff_recovery_state_e; + + +//子状态 +typedef enum +{ + NM_BUSOFF_SUBSTATE_NULL = 0u, + NM_BUSOFF_SUBSTATE_TRY, + NM_BUSOFF_SUBSTATE_WAIT +}nm_busoff_sub_state_e; + + +#if 0 +#define NM_CPU_SR_ALLOC() //CPU_SR_ALLOC() +#define NM_ENTER_CRITICAL() INT_SYS_DisableIRQGlobal() +#define NM_EXIT_CRITICAL() INT_SYS_EnableIRQGlobal() +#else +#define NM_CPU_SR_ALLOC() CPU_SR_ALLOC() +#define NM_ENTER_CRITICAL() ENTER_CRITICAL() +#define NM_EXIT_CRITICAL() EXIT_CRITICAL() +#endif + + + +/*--------------------------------------------------------------------------- +- G L O B A L V A R I A B L E S +- only configuration table allowed here,variables are not allowed! +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ +extern void ls_nm_Init(void); +extern void ls_nm_task(void); + +/*END對外接口***********************************************************/ +/***********************************************************************/ +/*CanIf接口宏定義*******************************************************/ +extern u8 CanNm_PhysErrorInd(u8 phy_id,nm_erro_source_e erro); +extern void CanNm_TxConfirmation_com(PduIdType canNmPduId,u8 phy_id); +//extern void ls_nm_TxConfirmation(PduIdType canNmPduId,u8 phy_id); + + +//u8 CanNm_is_busoff(void); + + + + + +#endif diff --git a/code_boot_out/asil/bsp/Ls_Nm_Cfg.h b/code_boot_out/asil/bsp/Ls_Nm_Cfg.h new file mode 100644 index 0000000..6949cd2 --- /dev/null +++ b/code_boot_out/asil/bsp/Ls_Nm_Cfg.h @@ -0,0 +1,90 @@ +/** ########################################################################## +** Filename : +** Project : +** Module : +** Processor : +** Version : 1.0 +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20230602- --V1.0-- --mingyea--- --修改-- + +** #########################################################################*/ +#ifndef LS_NM_CFG_H_ +#define LS_NM_CFG_H_ + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ +#include "common_types.h" +//#include "os_types.h" +//#include "Std_Types.h" +#include "can_cfg.h" +#include "gpio.h" + + +#ifdef CAN_AUTOSAR_EN +#include "Can_Type.h" +#else +typedef u16 PduIdType; +typedef u16 Can_IdType; +typedef u16 PduInfoType; +#endif + +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ +#define LS_NM_MAINFUNCTION_PERIOD (1u) + +#define NM_MAIN_BUSOFF_FAST_H (90u/LS_NM_MAINFUNCTION_PERIOD) +#define NM_MAIN_BUSOFF_FAST_L (10u/LS_NM_MAINFUNCTION_PERIOD) +#define NM_MAIN_BUSOFF_FAST_COUNT (10u) + +#define NM_MAIN_BUSOFF_SLOW_H (990u/LS_NM_MAINFUNCTION_PERIOD) +#define NM_MAIN_BUSOFF_SLOW_L (10u/LS_NM_MAINFUNCTION_PERIOD) + +#define NM_RECV_ONLINE_INVALID 0u +#define NM_RECV_ONLINE_VALID 1u + +#define LS_NM_IS_NOT_BUSOFF 0u +#define LS_NM_IS_BUSOFF 1u + +#define LS_NM_GOTO_SLEEP 0u +#define LS_NM_GOTO_WAKEUP 1u + +#define LS_NM_TEST_IO_ON() //TEST1_ON() +#define LS_NM_TEST_IO_OFF() //TEST1_OFF() + +//#define LS_NM_DEBUG_EN 1 + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- G L O B A L V A R I A B L E S +- only configuration table allowed here,variables are not allowed! +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ + + + + +#endif \ No newline at end of file diff --git a/code_boot_out/asil/bsp/can.c b/code_boot_out/asil/bsp/can.c new file mode 100644 index 0000000..d05d494 --- /dev/null +++ b/code_boot_out/asil/bsp/can.c @@ -0,0 +1,1062 @@ +/** ########################################################################## +** Filename : +** Project : +** Module : +** Processor : +** Version : 1.0 +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20230602- --V1.0-- --mingyea--- --修改-- + +** #########################################################################*/ + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ +#include "common_types.h" +#include "common_memory.h" +#include "queue_entity.h" +#include "can.h" +#include "nvic.h" +#ifdef CAN_LS_NM +#include "Ls_Nm.h" +#endif +#ifdef CAN_AUTOSAR_EN +#include "can_drive.h" +#include "CanIf.h" +#endif +#include "bl_can.h" + +static void can_tx_task(void); + +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- S T A T I C V A R I A B L E S +----------------------------------------------------------------------------*/ +#ifdef CAN_DRIVE_QUEUE_ENABLE +static sequential_queue_s can_tx_queue; +static can_queue_elem_s can_tx_qbuf[CAN_ID_0_TX_QUEUE_DEPTH]; /* 隊列 */ +static sequential_queue_s can_rx_queue; +static can_queue_elem_s can_rx_qbuf[CAN_ID_0_RX_QUEUE_DEPTH]; /* 隊列 */ +#else +#endif + +static can_s g_can[CAN_ID_TOTAL] = {0}; + +//#define CAN_TXMASK(hth) ((bl_u8_t)(0x01<<(hth))) +#define CAN_TXMASK(hth) ((bl_u8_t)(0x02)) + +/*--------------------------------------------------------------------------- +* G L O B A L V A R I A B L E S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : BaudRate CAN总线波特率，单位为bps +|Output parameters : +|Return value : +|Description : 通过波特率的值获取波特率参数表索引值 +----------------------------------------------------------------------------*/ +uint32_t CAN_GetBaudRateNum(uint32_t BaudRate) +{ + switch (BaudRate) + { + case 1000000 : + return 0; + case 900000 : + return 1; + case 800000 : + return 2; + case 666000 : + return 3; + case 600000 : + return 4; + case 500000 : + return 5; + case 400000 : + return 6; + case 300000 : + return 7; + case 250000 : + return 8; + case 225000: + return 9; + case 200000 : + return 10; + case 160000: + return 11; + case 150000 : + return 12; + case 144000: + return 13; + case 125000 : + return 14; + case 120000: + return 15; + case 100000 : + return 16; + case 90000 : + return 17; + case 80000 : + return 18; + case 75000: + return 19; + case 60000 : + return 20; + case 50000 : + return 21; + case 40000 : + return 22; + case 30000 : + return 23; + case 20000 : + return 24; + default: + return 0; + } +} + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : CAN中断服务函数 +----------------------------------------------------------------------------*/ +void CAN_IRQHandler(void) +{ + u8 l_buf_index = 0xffu; + u8 buffIdx =0u; + static uint8_t last_ESTAT = 5; + CanRxMsg tempCanRxMsg = {0u}; + can_queue_elem_s l_rx; + uint32_t data1, data2; + + #if 0 + if ((FL_ENABLE == FL_CAN_IsEnabledIT_RXOK(CAN)) + && (FL_SET == FL_CAN_IsActiveFlag_RXOK(CAN))) + #else //改成 判断非空，更合理 + if((FL_ENABLE == FL_CAN_IsEnabledIT_RXNotEmpty(CAN)) + && (FL_SET == FL_CAN_IsActiveFlag_RXNotEmpty(CAN))) + #endif + { + + while(FL_CAN_IsActiveFlag_RXNotEmpty(CAN) == FL_SET) + { + tempCanRxMsg.ID = FL_CAN_ReadRXMessageID(CAN); + tempCanRxMsg.DLC = FL_CAN_ReadRXMessageLength(CAN); + + data1 = FL_CAN_ReadRXMessageWord1(CAN); + data2 = FL_CAN_ReadRXMessageWord2(CAN); + + tempCanRxMsg.Data[0] = (uint8_t)data1 & 0xff; + tempCanRxMsg.Data[1] = (uint8_t)(data1 >> 8) & 0xff; + tempCanRxMsg.Data[2] = (uint8_t)(data1 >> 16) & 0xff; + tempCanRxMsg.Data[3] = (uint8_t)(data1 >> 24) & 0xff; + tempCanRxMsg.Data[4] = (uint8_t)data2 & 0xff; + tempCanRxMsg.Data[5] = (uint8_t)(data2 >> 8) & 0xff; + tempCanRxMsg.Data[6] = (uint8_t)(data2 >> 16) & 0xff; + tempCanRxMsg.Data[7] = (uint8_t)(data2 >> 24) & 0xff; + + #ifdef CAN_LOGIC_DEBUG + g_can[CAN_ID_0].canid = tempCanRxMsg.ID; + + if( (tempCanRxMsg.ID != CANIF_PHY_RX_CANID) && (tempCanRxMsg.ID != CANIF_FUN_RX_CANID) ) + { + g_can[CAN_ID_0].test[4]++; + } + else + { + g_can[CAN_ID_0].test[5]++; + } + #endif + + #ifdef CAN_LOGIC_DEBUG + g_can[CAN_ID_0].test[0]++; + #endif + + /* 拆分ID */ + if (tempCanRxMsg.ID & (1 << 12)) + { + #ifdef CAN_LOGIC_DEBUG + g_can[CAN_ID_0].test[1]++; + #endif + + /* 扩展ID */ + tempCanRxMsg.IDE = CAN_ID_EXT; + tempCanRxMsg.ID = ((tempCanRxMsg.ID & 0x7FF) << 18) + ((tempCanRxMsg.ID >> 13) & 0x3FFFF); + + if (tempCanRxMsg.ID & 0x80000000) + { + /* 扩展远程帧 */ + tempCanRxMsg.RTR = CAN_RTR_REMOTE; + } + else + { + /* 扩展数据帧 */ + tempCanRxMsg.RTR = CAN_RTR_Data; + } + } + else + { + #ifdef CAN_LOGIC_DEBUG + g_can[CAN_ID_0].test[2]++; + #endif + + /* 标准ID */ + tempCanRxMsg.IDE = CAN_ID_STD; + if (tempCanRxMsg.ID & (1 << 11)) + { + /* 标准远程帧 */ + tempCanRxMsg.RTR = CAN_RTR_REMOTE; + } + else + { + /* 标准数据帧 */ + tempCanRxMsg.RTR = CAN_RTR_Data; + } + tempCanRxMsg.ID = tempCanRxMsg.ID & 0x7FF; + } + /* 默认只有一个FIFO */ + tempCanRxMsg.FMI = 0; + + //加入队列 + common_memory_copys((u8*)&l_rx.msg,(u8*)&tempCanRxMsg,sizeof(CAN_MsgInfoType)); + common_memory_copys((u8*)&l_rx.buf[0],(u8*)&tempCanRxMsg.Data[0],CAN_FRAME_MAX_DLC); + //转成协议栈 + if(l_rx.msg.IDE == CAN_ID_EXT) + { + l_rx.msg.IDE = EXTENDED_CAN; + } + + l_rx.phy_id =INST_CANCOM0; + l_rx.mailbox_id =0u; + l_rx.msg.DLC = tempCanRxMsg.DLC;//can_sw_dlc_to_len(l_rx.msg.DLC); + #ifdef CAN_DRIVE_QUEUE_ENABLE + (void)queue_add_element(&can_rx_queue,(const sequential_queue_elem*)&l_rx);//NOLINT + #endif + l_rx.msg_id = l_rx.msg.ID; + l_rx.len = l_rx.msg.DLC; + l_rx.type = l_rx.msg.IDE; + //#ifdef CAN_AUTOSAR_EN + can_id_phy_rx_irq_task(CAN_ID_0,&l_rx); + //#endif + #if 0 //def CAN_LS_NM + if(CanNm_is_busoff() == TRUE) + { + #ifdef CAN_LS_NM + //Can_SetTxStatus_finish(CAN_ID_0); + CanNm_TxConfirmation_com(0,CAN_ID_0); + #endif + } + #endif + FL_CAN_ClearFlag_RXNotEmpty(CAN); + } + //FL_CAN_ClearFlag_RXOK(CAN); + //FL_CAN_ClearFlag_RXNotEmpty(CAN); + } + #if 1 //把溢出判断也监控 + if((FL_CAN_IsActiveFlag_RXOverflow(CAN)==FL_SET)&&(FL_CAN_IsEnabledIT_RXOverflow(CAN)==FL_ENABLE)) + { + FL_CAN_ClearFlag_RXOverflow(CAN); + //g_can_test[1]++; + } + #endif + if( (FL_ENABLE == FL_CAN_IsEnabledIT_TXOK(CAN) ) && (FL_SET == FL_CAN_IsActiveFlag_TXOK(CAN) ) ) + { + #ifdef CAN_LOGIC_DEBUG + g_can[CAN_ID_0].test[3]++; + #endif + + #ifdef CAN_AUTOSAR_EN + l_buf_index= g_can[CAN_ID_0].mailbox_id; + buffIdx =0u; + can_id_phy_tx_irq_task(CAN_ID_0,l_buf_index,buffIdx); + #else + #ifdef CAN_LS_NM + if(0 != (CAN->ISR & CAN_TXMASK(phyhth))) + { + #ifdef CAN_ENABLE_HIGH_TX + if(buf_index==2u) + { + FL_CAN_DisableIT_TXHighPriorBuffFull(CAN); + } + else + #endif + { + FL_CAN_DisableIT_TXOK(CAN); + } + } + Can_SetTxStatus_finish(CAN_ID_0); + CanNm_TxConfirmation_com(0,CAN_ID_0); + #endif + #endif + FL_CAN_ClearFlag_TXOK(CAN); + } + #ifdef CAN_ENABLE_HIGH_TX + if( (FL_ENABLE == FL_CAN_IsEnabledIT_TXHighPriorBuffFull(CAN)) && (FL_SET == FL_CAN_IsActiveFlag_TXOK(CAN) ) ) + { + #ifdef CAN_LOGIC_DEBUG + g_can[CAN_ID_0].test[4]++; + #endif + + #ifdef CAN_AUTOSAR_EN + l_buf_index= g_can[CAN_ID_0].mailbox_id; + buffIdx =0u; + can_id_phy_tx_irq_task(CAN_ID_0,l_buf_index,buffIdx); + #else + #ifdef CAN_LS_NM + Can_SetTxStatus_finish(CAN_ID_0); + CanNm_TxConfirmation_com(0,CAN_ID_0); + #endif + #endif + FL_CAN_ClearFlag_TXOK(CAN); + FL_CAN_ClearFlag_TXHighPriorBuffFull(CAN); + } + else + { + if( (FL_ENABLE == FL_CAN_IsEnabledIT_TXHighPriorBuffFull(CAN)) && (FL_CAN_IsActiveFlag_TXHighPriorBuffFull(CAN)) ) + { + FL_CAN_ClearFlag_TXHighPriorBuffFull(CAN); + #ifdef CAN_LOGIC_DEBUG + g_can[CAN_ID_0].test[5]++; + #endif + } + } + #endif + #if 0 + if(FL_CAN_IsActiveFlag_TXBuffFull(CAN) != FL_RESET) + { + FL_CAN_ClearFlag_TXBuffFull(CAN); + } + #endif + if (CAN->ISR & CAN_ISR_ERROR_Msk) + { + #if 0 + /* 错误中断 */ + /* 主动错误转换为被动错误时刻检测 */ + if (last_ESTAT == 1) + { + if (((CAN->SR & (3 << 7)) >> 7) == 3) + { + ; + } + } + last_ESTAT = ((CAN->SR & (3 << 7)) >> 7); + #endif + #ifdef CAN_LS_NM + //CanNm_PhysErrorInd(CAN_ID_0,NM_DLL_BUS_OFF_PRE); + #endif + #ifdef CAN_LOGIC_DEBUG + g_can[CAN_ID_0].test[6]++; + #endif + FL_CAN_ClearFlag_Error(CAN); + } + //if (CAN->ISR & CAN_ISR_BSOFF_Msk) + if( (FL_CAN_IsActiveFlag_BusOff(CAN)==TRUE) && (FL_CAN_IsEnabledIT_BusOff(CAN)==TRUE) ) + { + /* busoff中断 */ + /* CEN禁止后再使能即可清除can busoff的状态，在CAN模块稳定后可以立即发送数据 */ + //CAN->CR = 0; + //CAN->CR = 1; + FL_CAN_SetSoftwareReset(CAN,FL_CAN_SOFTWARE_RESET); + //CAN->ICR = CAN_ICR_CBSOFF_Msk; + #if 1 + #ifdef CAN_LS_NM + CanNm_PhysErrorInd(CAN_ID_0,NM_DLL_BUS_OFF); + #endif + #endif + #ifdef CAN_LOGIC_DEBUG + g_can[CAN_ID_0].test[7]++; + #endif + FL_CAN_ClearFlag_BusOff(CAN); + } + #ifdef CAN_LOGIC_DEBUG + g_can[CAN_ID_0].test[8]++; + #endif +} + + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : CAN接收中断配置 +----------------------------------------------------------------------------*/ +void CAN_NVIC_Configuration(void) +{ + FL_CAN_ClearFlag_RXOK(CAN); + // FL_CAN_EnableIT_RXOK(CAN); + + /* NVIC中断配置 */ + NVIC_ClearPendingIRQ(CAN_IRQn); + NVIC_DisableIRQ(CAN_IRQn); + NVIC_SetPriority(CAN_IRQn, NVIC_PRIORITY_CAN); + NVIC_EnableIRQ(CAN_IRQn); +} + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : FilterNumber 过滤器号 ReceiveMsgId 接收数据的ID ReceiveMsgIdType 接收数据的ID类型，0-标准帧，1-扩展帧 +|Output parameters : +|Return value : +|Description : 配置CAN接收滤波器 +----------------------------------------------------------------------------*/ +void CAN_ConfigFilter(uint8_t FilterNumber, uint32_t ReceiveMsgId, uint8_t ReceiveMsgIdType) +{ + FL_CAN_FilterInitTypeDef CAN_FilterInitStructure = {0}; + + if (FilterNumber > FL_CAN_FILTER4) + { + return; + } + if (ReceiveMsgIdType == CAN_Id_Standard) + { + /* 标准帧 */ + CAN_FilterInitStructure.filterIdStandard = ReceiveMsgId; /* 标准ID */ + CAN_FilterInitStructure.filterIdSRR = 0; + CAN_FilterInitStructure.filterIdIDE = 0; + CAN_FilterInitStructure.filterIdRTR = 0; + + CAN_FilterInitStructure.filterMaskIdHigh = 0X7FF; + CAN_FilterInitStructure.filterMaskIdSRR = 0x01; + CAN_FilterInitStructure.filterMaskIdIDE = 0x01; /* 滤波器掩码，1，该位参与滤波器比较，0，不参与 */ + CAN_FilterInitStructure.filterMaskIdRTR = 0x01; + CAN_FilterInitStructure.filterEn = FL_ENABLE; + FL_CAN_FilterInit(CAN, &CAN_FilterInitStructure, FilterNumber); + } + else + { + CAN_FilterInitStructure.filterIdExtend = ReceiveMsgId; /* 扩展ID */ + CAN_FilterInitStructure.filterIdSRR = 0X01; + CAN_FilterInitStructure.filterIdIDE = 0X01; + CAN_FilterInitStructure.filterIdRTR = 0X00; + + CAN_FilterInitStructure.filterMaskIdHigh = 0X7FF; + CAN_FilterInitStructure.filterMaskIdLow = 0X3FFFF; + CAN_FilterInitStructure.filterMaskIdSRR = 0X01; + CAN_FilterInitStructure.filterMaskIdIDE = 0X01; /* 滤波器掩码，1，该位参与滤波器比较，0，不参与 */ + CAN_FilterInitStructure.filterMaskIdRTR = 0x01; + CAN_FilterInitStructure.filterEn = FL_ENABLE; + FL_CAN_FilterInit(CAN, &CAN_FilterInitStructure, FilterNumber); + } +} + + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : 初始化---當使用autosar時，不調用該初始化，一般用於測試時。 +----------------------------------------------------------------------------*/ +void can_init(void) +{ + #ifdef CAN_ID_0_EN + can0_init(); + #endif + #ifdef CAN_ID_1_EN + can1_init(); + #endif +} + + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +----------------------------------------------------------------------------*/ +void can_de_init(void) +{ + #ifdef CAN_ID_0_EN + can0_de_init(); + #endif + #ifdef CAN_ID_1_EN + can1_de_init(); + #endif +} + + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +----------------------------------------------------------------------------*/ +void can_task(void) +{ + can_tx_task(); +} + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +----------------------------------------------------------------------------*/ +void can_phy_drive_init(can_id_e phy_id) +{ + switch(phy_id) + { + case CAN_ID_0: + #ifdef CAN_ID_0_EN + can0_init(); + #endif + break; + case CAN_ID_1: + #ifdef CAN_ID_1_EN + can1_init(); + #endif + break; + + default: + + break; + } + +} + + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : BaudRate CAN总线波特率 +|Output parameters : +|Return value : +|Description : 初始化CAN +----------------------------------------------------------------------------*/ +void CAN_Configuration(uint32_t BaudRate) +{ + FL_CAN_InitTypeDef CAN_InitStructure = {0}; + /* CAN register init */ + //CAN_NVIC_Configuration(); + //CAN_GPIO_Configuration(); + /* CAN cell init */ + #if 0 + CAN_InitStructure.TS1 = CAN_BaudRateInitTab[CAN_GetBaudRateNum(BaudRate)].BS1; + CAN_InitStructure.TS2 = CAN_BaudRateInitTab[CAN_GetBaudRateNum(BaudRate)].BS2; /* 位时序设置 */ + CAN_InitStructure.SJW = CAN_BaudRateInitTab[CAN_GetBaudRateNum(BaudRate)].SJW; + CAN_InitStructure.BRP = CAN_BaudRateInitTab[CAN_GetBaudRateNum(BaudRate)].PreScale; /* 波特率预分频 */ + #else + #if 1 //75 % + CAN_InitStructure.TS1 = CAN_BS1_11tq; + CAN_InitStructure.TS2 = CAN_BS2_4tq; /* 位时序设置 */ + CAN_InitStructure.SJW = CAN_SJW_3tq; + CAN_InitStructure.BRP = 0u; /* 波特率预分频 */ + #else //81 + CAN_InitStructure.TS1 = CAN_BS1_12tq; + CAN_InitStructure.TS2 = CAN_BS2_3tq; /* 位时序设置 */ + CAN_InitStructure.SJW = CAN_SJW_2tq; + CAN_InitStructure.BRP = 0u; /* 波特率预分频 */ + #endif + #endif + CAN_InitStructure.mode = FL_CAN_MODE_NORMAL; /* 工作模式设置 */ + CAN_InitStructure.clockSource = FL_CMU_CAN_CLK_SOURCE_XTHF; /* 时钟源设置 */ + FL_CAN_Init(CAN, &CAN_InitStructure); + +} + + + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +----------------------------------------------------------------------------*/ +void can0_de_init(void) +{ + #if 1 + + //CanTrcv_Disable(); + //FL_CAN_Disable(CAN); + //FL_CMU_DisableGroup1BusClock(FL_CMU_GROUP1_BUSCLK_PAD); + //FL_CMU_DisableGroup4BusClock(FL_CMU_GROUP4_BUSCLK_ATIM); + //FL_CMU_DisableGroup3OperationClock(FL_CMU_GROUP3_OPCLK_ATIM); + //FL_CMU_DisableGroup3BusClock(FL_CMU_GROUP3_BUSCLK_CAN); + //FL_CMU_DisableGroup3OperationClock(FL_CMU_GROUP3_OPCLK_CAN); + + FL_CAN_ClearFlag_RXOverflow(CAN); + FL_CAN_ClearFlag_TXOK(CAN); + FL_CAN_ClearFlag_TXHighPriorBuffFull(CAN); + FL_CAN_ClearFlag_Error(CAN); + FL_CAN_DisableIT_TXOK(CAN); + FL_CAN_Disable(CAN); + NVIC_ClearPendingIRQ(CAN_IRQn); + NVIC_DisableIRQ(CAN_IRQn); + + #else + + /* NVIC DeInit */ + NVIC_DisableIRQ(CAN_IRQn); + NVIC_ClearPendingIRQ(CAN_IRQn); + + /* Enable Peripheral Reset */ + FL_RMU_EnablePeripheralReset(RMU); + FL_RMU_EnableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_CAN); + FL_RMU_DisableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_CAN); + FL_RMU_EnableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_CAN); + FL_RMU_DisableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_CAN); + FL_RMU_DisablePeripheralReset(RMU); + + /* Close CANBUS Clock */ + FL_CMU_DisableGroup3BusClock(FL_CMU_GROUP3_BUSCLK_CAN); + FL_CMU_DisableGroup3OperationClock(FL_CMU_GROUP3_OPCLK_CAN); + + /* GPIO DeInit */ + //FL_GPIO_DeInit(GPIOA,FL_GPIO_PIN_6 | FL_GPIO_PIN_7); + //FL_GPIO_DeInit(GPIOC,FL_GPIO_PIN_6); + + #endif +} + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +----------------------------------------------------------------------------*/ +void can0_init(void) +{ + #ifdef CAN_DRIVE_QUEUE_ENABLE + queue_init(&can_tx_queue,(sequential_queue_elem*)&can_tx_qbuf,CAN_ID_0_TX_QUEUE_DEPTH,sizeof(can_queue_elem_s)); + queue_init(&can_rx_queue,(sequential_queue_elem*)&can_rx_qbuf,CAN_ID_0_RX_QUEUE_DEPTH,sizeof(can_queue_elem_s)); + #endif + + //CAN->CR = 0u; //为了重新初始化，相当于反初始化 + + CAN_Configuration(g_can0_baudrate); + + + /* 设置CAN接收滤波器 */ + CAN_ConfigFilter(0, CANIF_PHY_RX_CANID, MSG_ID_TYPE); + CAN_ConfigFilter(1, CANIF_FUN_RX_CANID, MSG_ID_TYPE); + #if 1 //改成判断非空更合理 + FL_CAN_ClearFlag_RXNotEmpty(CAN); + FL_CAN_EnableIT_RXNotEmpty(CAN); /* 接收中断使能 */ + #else + /* 使能接收中断 */ + FL_CAN_ClearFlag_RXOK(CAN); + FL_CAN_EnableIT_RXOK(CAN); //接收中断使能 + #endif + //FL_CAN_ClearFlag_Error(CAN); + //FL_CAN_EnableIT_Error(CAN); //错误中断使能 + + FL_CAN_ClearFlag_RXOverflow(CAN);//接收溢出中断标志位清除 + FL_CAN_EnableIT_RXOverflow(CAN);//接收溢出中断使能 + + FL_CAN_ClearFlag_BusOff(CAN); //BusOff中断使能 + FL_CAN_EnableIT_BusOff(CAN); + + //FL_CAN_ClearFlag_TXOK(CAN); + //FL_CAN_EnableIT_TXOK(CAN); //发送完成中断使能 + + g_can[CAN_ID_0].state_tx = CAN_TX_STATE_IDLE; + + CAN_NVIC_Configuration(); //调用顺序，会引起busoff不能恢复 + +} + + + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : 通过TX FIFO发送数据 +----------------------------------------------------------------------------*/ +void FL_CAN_FIFO_Write(u8 mailbox_id,uint32_t id, uint32_t len, uint32_t data1, uint32_t data2) +{ + #if 0 + uint32_t i = 5; + + while ((FL_CAN_IsActiveFlag_TXBuffFull(CAN) != FL_RESET)&i) + { + i--; + FL_DelayMs(1); + } + #endif + + if(FL_CAN_IsActiveFlag_TXBuffFullSignal(CAN)==FL_RESET) + + { + g_can[CAN_ID_0].mailbox_id = mailbox_id; + #ifdef CAN_ENABLE_HIGH_TX + if(mailbox_id == 2u) + { + FL_CAN_ClearFlag_TXHighPriorBuffFull(CAN); + FL_CAN_WriteHighPriorTXMessageID(CAN, id); + FL_CAN_WriteHighPriorMessageLength(CAN, len); + FL_CAN_WriteHighPriorMessageWord1(CAN, data1); + FL_CAN_WriteHighPriorMessageWord2(CAN, data2); + FL_CAN_EnableIT_TXHighPriorBuffFull(CAN); + } + else + #endif + { + FL_CAN_ClearFlag_TXOK(CAN); + FL_CAN_ClearFlag_TXBuffFull(CAN); + FL_CAN_WriteTXMessageID(CAN, id); + FL_CAN_WriteTXMessageLength(CAN, len); + FL_CAN_WriteTXMessageWord1(CAN, data1); + FL_CAN_WriteTXMessageWord2(CAN, data2); + FL_CAN_EnableIT_TXOK(CAN); + } + } +} + + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : CANx CAN通道号 TxMessage CAN消息指针 +|Output parameters : +|Return value : +|Description : 发送一帧CAN数据 +----------------------------------------------------------------------------*/ +uint8_t CAN_WriteData(u8 mailbox_id,CanTxMsg *TxMessage) +{ + uint32_t id = 0; + uint32_t len = 0; + uint32_t data1 = 0; + uint32_t data2 = 0; + + if (TxMessage->IDE) + { + /* 扩展 */ + if (TxMessage->RTR) + { + /* 远程帧 */ + id = ((TxMessage->ID & 0x3ffff) << 13) | ((uint32_t)1 << 12) | ((uint32_t)1 << 31) | ((TxMessage->ID & 0x1ffc0000) >> 18); + } + else + { + /* 数据帧 */ + id = ((TxMessage->ID & 0x3ffff) << 13) | ((uint32_t)1 << 12) | ((uint32_t)1 << 11) | ((TxMessage->ID & 0x1ffc0000) >> 18); + } + } + else + { + /* 标准 */ + if (TxMessage->RTR) + { + /* 远程帧 */ + id = (TxMessage->ID & 0x7ff) | (1 << 11); + } + else + { + /* 数据帧 */ + id = TxMessage->ID & 0x7ff; + } + } + len = TxMessage->DLC; + data1 = (((uint32_t)TxMessage->Data[3] << 24) | + ((uint32_t)TxMessage->Data[2] << 16) | + ((uint32_t)TxMessage->Data[1] << 8) | + ((uint32_t)TxMessage->Data[0])); + data2 = (((uint32_t)TxMessage->Data[7] << 24) | + ((uint32_t)TxMessage->Data[6] << 16) | + ((uint32_t)TxMessage->Data[5] << 8) | + ((uint32_t)TxMessage->Data[4])); + + FL_CAN_FIFO_Write(mailbox_id,id, len, data1, data2); + return 0; +} + + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +----------------------------------------------------------------------------*/ +static void can_tx_task(void) +{ + //考虙這里加隊列發送； + #ifdef CAN_DRIVE_QUEUE_ENABLE + //u8 l_buf_index; + can_queue_elem_s l_rx; + can_queue_elem_s l_tx; + //CAN_Type *p_can; + //u8 i; + /*PCLINT_ERROS*/ /*lint --e(928) */ /* 928 11.4（建議）： 不應在某類型對像指針和其他不同類型對像指針之間進行強制轉換。*/ + if( queue_get_head(&can_tx_queue,(sequential_queue_elem*)&l_tx) == QUEUE_OK) + { + /*PCLINT_ERROS*/ /*lint --e(926) */ /* */ + /*PCLINT_ERROS*/ /*lint --e(641) --e(960) --e(923) */ + queue_del_element(&can_tx_queue,(sequential_queue_elem*)&l_tx); + + if(l_tx.phy_id == INST_CANCOM0) + { + //p_can = CAN0; + //common_memory_copys((u8*)&g_can[INST_CANCOM0].tx,(u8*)&l_tx.msg,sizeof(CAN_MsgInfoType)); // + //common_memory_copys((u8*)&g_can[INST_CANCOM0].tx_buf[0],(u8*)&l_tx.buf[0],CAN_FRAME_MAX_DLC); + //g_can[INST_CANCOM0].tx.DATA = &g_can[INST_CANCOM0].tx_buf[0]; + //把dlc转换成寄存器能识别的长度； + //g_can[INST_CANCOM0].tx.DLC = can_sw_len_to_dlc(g_can[INST_CANCOM0].tx.DLC); + CAN_WriteData(l_tx.mailbox_id,&l_tx.msg);//发送数据 + } + } + + /*PCLINT_ERROS*/ /*lint --e(928) */ /* 928 11.4（建議）： 不應在某類型對像指針和其他不同類型對像指針之間進行強制轉換。*/ + if( queue_get_head(&can_rx_queue,(sequential_queue_elem*)&l_rx) == QUEUE_OK) + { + /*PCLINT_ERROS*/ /*lint --e(926) */ /* */ + /*PCLINT_ERROS*/ /*lint --e(641) --e(960) --e(923) */ + queue_del_element(&can_rx_queue,(sequential_queue_elem*)&l_rx); + // + #ifdef CAN_LOGIC_DEBUG + g_can[CAN_ID_0].test[9]++; + #endif + } + #endif +} + + + + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +----------------------------------------------------------------------------*/ +void can_op_tx_task(void) +{ + #if 1 + static u8 g_cc=0; + #ifdef CAN_DRIVE_QUEUE_ENABLE + can_queue_elem_s l_tx; + u8 i; + g_can[CAN_ID_0].count++; + l_tx.phy_id = INST_CANCOM0; + //l_tx.mailbox_id = g_can_id_0_cfg_tx_table[0].mb_fifo_id; + l_tx.msg.ID = 0x228; // + l_tx.msg.IDE = CAN_MSG_ID_STD; // + l_tx.msg.DLC = CAN_FRAME_DLC; + #ifdef CAN_ID_0_FD_EN + l_tx.msg.FDF = CAN_MSG_TYPE_FD; + l_tx.msg.BRS = CAN_MSG_BRS_FAST; + #else + l_tx.msg.FDF = CAN_MSG_TYPE_NORMAL; + l_tx.msg.BRS = CAN_MSG_BRS_NORMAL_LOW; + #endif + l_tx.msg.RTR = CAN_MSG_RTR_DATA; + //l_tx.msg_id = g_can_id_0_cfg_tx_table[0].can_id; + g_cc++; + for(i=0;itype == CAN_MSG_ID_STD) + { + l_tx.msg.IDE = CAN_ID_STD; // + } + else + { + l_tx.msg.IDE = CAN_ID_EXT; // + } + //p_tx->phy_id + //mailbox_id + l_tx.msg.ID = p_tx->msg_id; + l_tx.msg.DLC = p_tx->len; + #ifdef CAN_ID_0_FD_EN + #if 0 + if(p_tx->fd_enable == 0u) + { + l_tx.msg.FDF = CAN_MSG_TYPE_NORMAL; // + l_tx.msg.BRS = CAN_MSG_BRS_NORMAL_LOW; + } + else + { + l_tx.msg.FDF = CAN_MSG_TYPE_FD; // + l_tx.msg.BRS = CAN_MSG_BRS_FAST; + } + #else + l_tx.msg.FDF = p_tx->fd_enable; // + l_tx.msg.BRS = p_tx->enable_brs; + #endif + #else + l_tx.msg.FDF = CAN_MSG_TYPE_NORMAL; // + l_tx.msg.BRS = CAN_MSG_BRS_NORMAL_LOW; + #endif + l_tx.msg.RTR = CAN_MSG_RTR_DATA; + l_tx.msg.ESI = 1u; + l_tx.msg.RTS = 1u; + l_tx.mailbox_id = p_tx->mailbox_id; + #if 1 + //l_tx.msg.DATA = &l_tx.buf[0]; + for(i=0;ibuf[i]; + l_tx.msg.Data[i] = p_tx->buf[i]; + } + #endif + #if 0 + common_memory_copys((u8*)&g_can[INST_CANCOM0].tx,(u8*)&l_tx.msg,sizeof(CAN_MsgInfoType)); // + common_memory_copys((u8*)&g_can[INST_CANCOM0].tx_buf[0],(u8*)&p_tx->buf[0],CAN_FRAME_MAX_DLC); + g_can[INST_CANCOM0].tx.DATA = &g_can[INST_CANCOM0].tx_buf[0]; + //把dlc转换成寄存器能识别的长度； + g_can[INST_CANCOM0].tx.DLC = can_sw_len_to_dlc(g_can[INST_CANCOM0].tx.DLC); + #if 1 + if(l_tx.mailbox_id==2) + { + CAN_TransmitMessage(p_can, &g_can[INST_CANCOM0].tx, CAN_TRANSMIT_PRIMARY);//发送数据 + } + else + { + CAN_TransmitMessage(p_can, &g_can[INST_CANCOM0].tx, CAN_TRANSMIT_SECONDARY);//发送数据 + } + #else + CAN_TransmitMessage(p_can, &g_can[INST_CANCOM0].tx, CAN_TRANSMIT_SECONDARY);//发送数据 + #endif + #else + CAN_WriteData(l_tx.mailbox_id,&l_tx.msg);//发送数据 + #endif +} + + diff --git a/code_boot_out/asil/bsp/can.h b/code_boot_out/asil/bsp/can.h new file mode 100644 index 0000000..51cc5ff --- /dev/null +++ b/code_boot_out/asil/bsp/can.h @@ -0,0 +1,230 @@ +/** ########################################################################## +** Filename : +** Project : +** Module : +** Processor : +** Version : +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20230602- --V1.0-- --mingyea--- --修改-- + +** #########################################################################*/ +#ifndef CAN_H__ +#define CAN_H__ + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ +#include "common_types.h" +#include "can_cfg.h" + +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ +/*#define CAN_ID_NULL 0xffu*/ +/*PCLINT_ERROS*/ /*lint --e(961)*/ /* 961 不要過份依賴運算優重出級 */ +#define IS_CAN_ALL_ID(ID) ( (ID) < CAN_ID_TOTAL) + +//CAN邏輯通道 +#define CAN_LOGIC_ID_0 0 +#define CAN_LOGIC_ID_1 1 +#define CAN_LOGIC_ID_2 2 + +//标准帧 +#define CAN_MSG_ID_STD 0 +#define CAN_MSG_ID_EXT 1 + +//远程帧 +#define CAN_MSG_RTR_DATA 0 +#define CAN_MSG_RTR_REMOTE 1 + +//FD +#define CAN_MSG_TYPE_NORMAL 0 +#define CAN_MSG_TYPE_FD 1 + +//BRS +#define CAN_MSG_BRS_NORMAL_LOW 0 +#define CAN_MSG_BRS_FAST 1 +#define CAN_TypeDef CAN_Type +#define CAN_FilterInitTypeDef FL_CAN_FilterInitTypeDef + +/** @defgroup CAN_identifier_type + * @{ + */ + +#define CAN_Id_Standard ((uint32_t)0x00000000) /*!< Standard Id */ +#define CAN_Id_Extended ((uint32_t)0x00000004) /*!< Extended Id */ +#define IS_CAN_IDTYPE(IDTYPE) (((IDTYPE) == CAN_Id_Standard) || \ + ((IDTYPE) == CAN_Id_Extended)) + +/** @defgroup CAN_remote_transmission_request + * @{ + */ + +#define CAN_RTR_Data ((uint32_t)0x00000000) /*!< Data frame */ +#define CAN_RTR_Remote ((uint32_t)0x00000002) /*!< Remote frame */ +#define IS_CAN_RTR(RTR) (((RTR) == CAN_RTR_Data) || ((RTR) == CAN_RTR_Remote)) + +#define CAN_ID_STD CAN_Id_Standard +#define CAN_ID_EXT CAN_Id_Extended +#define CAN_RTR_DATA CAN_RTR_Data +#define CAN_RTR_REMOTE CAN_RTR_Remote + +/** + * @} + */ + +/** @defgroup CAN_synchronisation_jump_width + * @{ + */ + +#define CAN_SJW_1tq FL_CAN_SJW_1Tq /*!< 1 time quantum */ +#define CAN_SJW_2tq FL_CAN_SJW_2Tq /*!< 2 time quantum */ +#define CAN_SJW_3tq FL_CAN_SJW_3Tq /*!< 3 time quantum */ +#define CAN_SJW_4tq FL_CAN_SJW_4Tq /*!< 4 time quantum */ + +#define IS_CAN_SJW(SJW) (((SJW) == CAN_SJW_1tq) || ((SJW) == CAN_SJW_2tq)|| \ + ((SJW) == CAN_SJW_3tq) || ((SJW) == CAN_SJW_4tq)) +/** + * @} + */ + +/** @defgroup CAN_time_quantum_in_bit_segment_1 + * @{ + */ + +#define CAN_BS1_1tq FL_CAN_TS1_1Tq /*!< 1 time quantum */ +#define CAN_BS1_2tq FL_CAN_TS1_2Tq /*!< 2 time quantum */ +#define CAN_BS1_3tq FL_CAN_TS1_31Tq /*!< 3 time quantum */ +#define CAN_BS1_4tq FL_CAN_TS1_4Tq /*!< 4 time quantum */ +#define CAN_BS1_5tq FL_CAN_TS1_5Tq /*!< 5 time quantum */ +#define CAN_BS1_6tq FL_CAN_TS1_6Tq /*!< 6 time quantum */ +#define CAN_BS1_7tq FL_CAN_TS1_7Tq /*!< 7 time quantum */ +#define CAN_BS1_8tq FL_CAN_TS1_8Tq /*!< 8 time quantum */ +#define CAN_BS1_9tq FL_CAN_TS1_9Tq /*!< 9 time quantum */ +#define CAN_BS1_10tq FL_CAN_TS1_10Tq /*!< 10 time quantum */ +#define CAN_BS1_11tq FL_CAN_TS1_11Tq /*!< 11 time quantum */ +#define CAN_BS1_12tq FL_CAN_TS1_12Tq /*!< 12 time quantum */ +#define CAN_BS1_13tq FL_CAN_TS1_13Tq /*!< 13 time quantum */ +#define CAN_BS1_14tq FL_CAN_TS1_14Tq /*!< 14 time quantum */ +#define CAN_BS1_15tq FL_CAN_TS1_15Tq /*!< 15 time quantum */ +#define CAN_BS1_16tq FL_CAN_TS1_16Tq /*!< 16 time quantum */ + +#define IS_CAN_BS1(BS1) ((BS1) <= CAN_BS1_16tq) +/** + * @} + */ + +/** @defgroup CAN_time_quantum_in_bit_segment_2 + * @{ + */ + +#define CAN_BS2_1tq FL_CAN_TS2_1Tq /*!< 1 time quantum */ +#define CAN_BS2_2tq FL_CAN_TS2_2Tq /*!< 2 time quantum */ +#define CAN_BS2_3tq FL_CAN_TS2_3Tq /*!< 3 time quantum */ +#define CAN_BS2_4tq FL_CAN_TS2_4Tq /*!< 4 time quantum */ +#define CAN_BS2_5tq FL_CAN_TS2_5Tq /*!< 5 time quantum */ +#define CAN_BS2_6tq FL_CAN_TS2_6Tq /*!< 6 time quantum */ +#define CAN_BS2_7tq FL_CAN_TS2_7Tq /*!< 7 time quantum */ +#define CAN_BS2_8tq FL_CAN_TS2_8Tq /*!< 8 time quantum */ + +#define IS_CAN_BS2(BS2) ((BS2) <= CAN_BS2_8tq) + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ +/*can 序號--物理通道*/ +typedef enum +{ + CAN_ID_0 = 0u , + CAN_ID_1 = 1u , + CAN_ID_2 = 2u , + CAN_ID_NULL = 0xffu +}can_id_e; + +/*按鍵命令*/ +typedef struct +{ + flexcan_msgbuff_id_type_t type; + u8 phy_id; //instance 物理CAN通道 + u8 mailbox_id; //郵箱id + u32 msg_id; //CAN ID -- 和 msg中的复用 + u8 len; //len -- 和 msg中的复用 + u8 fd_enable; // 和 msg中的复用 + u8 fd_padding; /*!< Set a value for padding. It will be used when the data length code (DLC) + specifies a bigger payload size than data_length to fill the MB */ + u8 enable_brs; /*!< Enable bit rate switch inside a CAN FD format frame*/ + u8 is_remote; /*!< Specifies if the frame is standard or remote */ + CAN_MsgInfoType msg; + u8 buf[CAN_FRAME_MAX_DLC]; +}can_queue_elem_s; + +typedef struct +{ + u8 phy_id; + CAN_MsgInfoType tx; + CAN_MsgInfoType rx; + u8 tx_buf[CAN_FRAME_MAX_DLC]; //最大64字节 + u8 rx_buf[CAN_FRAME_MAX_DLC]; + u8 result; + u8 count; + u8 state_tx; //状态 + u8 mailbox_id; //發送的郵箱id + #ifdef CAN_LOGIC_DEBUG + u8 test[16]; + u32 canid; + #if 0 + u8 normal_int_event; + u8 normal_int_bufid; + u8 normal_int_count[32][3]; + u8 normal_queue_count[32][3]; + u8 error_int_event; + u8 error_int_count; + u16 count1[2]; + #endif + #endif + +}can_s; +/*--------------------------------------------------------------------------- +- G L O B A L V A R I A B L E S +- only configuration table allowed here,variables are not allowed! +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ +void can_init(void); +void can_de_init(void); +void can_task(void); +void can_tx_start(const can_queue_elem_s *p_tx); +void can_op_tx_task(void); + +void can_phy_drive_init(can_id_e phy_id); + + + +void can0_de_init(void); +void can0_init(void); + +#endif /* __CAN_H__ */ + + + + + + diff --git a/code_boot_out/asil/bsp/can_cfg.c b/code_boot_out/asil/bsp/can_cfg.c new file mode 100644 index 0000000..a54e62f --- /dev/null +++ b/code_boot_out/asil/bsp/can_cfg.c @@ -0,0 +1,109 @@ +/** ########################################################################## +** Filename : +** Project : +** Module : +** Processor : +** Version : 1.0 +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : +** -20230602- --V1.0-- --mingyea--- --修改-- + +** #########################################################################*/ + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ +#include "can.h" + +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ +volatile uint8_t TimeOutFlag; /* 定时器超时标志 */ +#define TQ_x_7 CAN_SJW_1tq,CAN_BS1_5tq,CAN_BS2_1tq +#define TQ_x_8 CAN_SJW_1tq,CAN_BS1_5tq,CAN_BS2_2tq +#define TQ_x_9 CAN_SJW_1tq,CAN_BS1_6tq,CAN_BS2_2tq +#define TQ_x_10 CAN_SJW_1tq,CAN_BS1_7tq,CAN_BS2_2tq +#define TQ_x_12 CAN_SJW_1tq,CAN_BS1_9tq,CAN_BS2_2tq +#define TQ_x_13 CAN_SJW_1tq,CAN_BS1_10tq,CAN_BS2_2tq +#define TQ_x_14 CAN_SJW_1tq,CAN_BS1_11tq,CAN_BS2_2tq +#define TQ_x_15 CAN_SJW_1tq,CAN_BS1_12tq,CAN_BS2_2tq //good timing +#define TQ_x_16 CAN_SJW_1tq,CAN_BS1_13tq,CAN_BS2_2tq //good timing +#define TQ_x_17 CAN_SJW_1tq,CAN_BS1_14tq,CAN_BS2_2tq //good timing +#define TQ_x_18 CAN_SJW_1tq,CAN_BS1_15tq,CAN_BS2_2tq //good timing +#define TQ_x_19 CAN_SJW_1tq,CAN_BS1_16tq,CAN_BS2_2tq //good timing +#define TQ_x_20 CAN_SJW_1tq,CAN_BS1_16tq,CAN_BS2_3tq //good timing +#define TQ_x_21 CAN_SJW_1tq,CAN_BS1_16tq,CAN_BS2_4tq +#define TQ_x_22 CAN_SJW_1tq,CAN_BS1_16tq,CAN_BS2_5tq +#define TQ_x_23 CAN_SJW_1tq,CAN_BS1_16tq,CAN_BS2_6tq +#define TQ_x_24 CAN_SJW_1tq,CAN_BS1_16tq,CAN_BS2_7tq +#define TQ_x_25 CAN_SJW_1tq,CAN_BS1_16tq,CAN_BS2_8tq + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ +volatile uint8_t TimeOutFlag; /* 定时器超时标志 */ + + +/*--------------------------------------------------------------------------- +- S T A T I C V A R I A B L E S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +* G L O B A L V A R I A B L E S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ +const tCAN_BaudRate CAN_BaudRateInitTab[] = // CLK=8MHz +{ + {TQ_x_8, 0}, // 1M + {TQ_x_9, 0}, // 900K + {TQ_x_10, 0}, // 800K + {TQ_x_12, 0}, // 666K + {TQ_x_13, 0}, // 600K + {TQ_x_16, 0}, // 500K + {TQ_x_20, 0}, // 400K + {TQ_x_9, 2}, // 300K + {TQ_x_8, 3}, // 250K + {TQ_x_18, 1}, // 225K + {TQ_x_10, 3}, // 200K + {TQ_x_10, 4}, // 160K + {TQ_x_18, 2}, // 150K + {TQ_x_8, 6}, // 144K + {TQ_x_16, 3}, // 125K + {TQ_x_13, 9}, // 120K + {TQ_x_20, 3}, // 100K + {TQ_x_22, 3}, // 90K + {TQ_x_20, 4}, // 80K + {TQ_x_18, 5}, // 75K + {TQ_x_19, 6}, // 60K + {TQ_x_20, 7}, // 50K + {TQ_x_20, 9}, // 40K + {TQ_x_19, 13}, // 30K + {TQ_x_20, 19}, // 20K +}; + + +const uint32_t g_can0_baudrate = 500000; + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ + + + +/* Private define ------------------------------------------------------------*/ + +/* Private macro -------------------------------------------------------------*/ + + + + + + diff --git a/code_boot_out/asil/bsp/can_cfg.h b/code_boot_out/asil/bsp/can_cfg.h new file mode 100644 index 0000000..2d3d73d --- /dev/null +++ b/code_boot_out/asil/bsp/can_cfg.h @@ -0,0 +1,582 @@ +/** ########################################################################## +** Filename : +** Project : +** Module : +** Processor : +** Version : 1.0 +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : 此文档用于规范代码书写； +* 注意， +* 1.所有文件用UTF-8格式 +* 2.tab键空格4个 +* 3.各模块，都要有 初始化函数 init, 反初始化函数 deinit, +* 周期任务task,进入休眠goto sleep, +* 唤醒后 goto wake ,判断是否可休眠judge_pre_sleep 等主要函数接口 +* 4. +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20191106- --V01-- --LYJ--- --初版-- +** -20230602- --V1.0-- --mingyea--- --修改-- + +** #########################################################################*/ +#ifndef CAN_CFG_H__ +#define CAN_CFG_H__ + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ +#include "common_types.h" +#include "Cpu.h" + +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ +////非常重要的宏；是否用恒潤的can即采購的AUTOSAR +//#define CAN_AUTOSAR_EN 1 +//#define CAN_DRIVE_QUEUE_ENABLE //開啟底層隊列 -- 和宏 CAN_AUTOSAR_EN 相互斥 +#define CAN_LS_NM 1 //和網絡管理相關的底層 + +#define CAN_ID_0_EN //決定通產是否開啟 +//#define CAN_ID_1_EN //決定通產是否開啟 +//#define CAN_ID_2_EN //決定通產是否開啟 + +//#define CAN_ID_0_FD_EN 1 //开启 CANFD功能 +//#define CAN_ID_1_FD_EN 1 //开启 CANFD功能 +//#define CAN_ID_2_FD_EN 1 //开启 CANFD功能 + + +#define CAN_ID_TOTAL 1u //和 CAN_USED_CONTROLLER_NUM 密切相關 +#define CAN_LOGIC_ID_MAX CAN_ID_TOTAL + +//////////////////s32k +#ifdef CAN_ID_0_FD_EN +#else +//#define CAN_ID_0_USE_RX_FIFO 1 //是否啟用；rx fifo 在CANFD模式下，不能使用 +#endif + +#ifdef CAN_ID_1_FD_EN +#else +//#define CAN_ID_1_USE_RX_FIFO 1 //是否啟用；rx fifo 在CANFD模式下，不能使用 +#endif + +#ifdef CAN_ID_2_FD_EN +#else +//#define CAN_ID_2_USE_RX_FIFO 1 //是否啟用；rx fifo 在CANFD模式下，不能使用 +#endif + + +#ifdef CAN_ID_0_USE_RX_FIFO +#define CAN_ID_0_RX_FIFO_EN true +#else +#define CAN_ID_0_RX_FIFO_EN false +#endif + +#ifdef CAN_ID_1_USE_RX_FIFO +#define CAN_ID_1_RX_FIFO_EN true +#else +#define CAN_ID_1_RX_FIFO_EN false +#endif + +#ifdef CAN_ID_2_USE_RX_FIFO +#define CAN_ID_2_RX_FIFO_EN true +#else +#define CAN_ID_2_RX_FIFO_EN false +#endif + +#define FLEXCAN_USE_PAYLOAD_SIZE_8 0u +#define FLEXCAN_USE_PAYLOAD_SIZE_16 1u +#define FLEXCAN_USE_PAYLOAD_SIZE_32 2u +#define FLEXCAN_USE_PAYLOAD_SIZE_64 3u + + +#ifdef CAN_ID_0_FD_EN +#define CAN_ID_0_USER_REG_PAYLOAD_SIZE FLEXCAN_USE_PAYLOAD_SIZE_64 +#define CAN_ID_0_FD_CFG true +#else +#define CAN_ID_0_USER_REG_PAYLOAD_SIZE FLEXCAN_USE_PAYLOAD_SIZE_8 +#define CAN_ID_0_FD_CFG false +#endif + +#ifdef CAN_ID_1_FD_EN +#define CAN_ID_1_USER_REG_PAYLOAD_SIZE FLEXCAN_USE_PAYLOAD_SIZE_64 +#define CAN_ID_1_FD_CFG true +#else +#define CAN_ID_1_USER_REG_PAYLOAD_SIZE FLEXCAN_USE_PAYLOAD_SIZE_8 +#define CAN_ID_1_FD_CFG false +#endif + +#ifdef CAN_ID_2_FD_EN +#define CAN_ID_2_USER_REG_PAYLOAD_SIZE FLEXCAN_USE_PAYLOAD_SIZE_64 +#define CAN_ID_2_FD_CFG true +#else +#define CAN_ID_2_USER_REG_PAYLOAD_SIZE FLEXCAN_USE_PAYLOAD_SIZE_8 +#define CAN_ID_2_FD_CFG false +#endif + + +#define CAN_FRAME_MAX_DLC (u16)8u /* CAN底層的一幀字節數 --最大可能的值*/ //如果CANFD要改成64 +//#define CAN_DATA_DLC ((uint8)CAN_FRAME_MAX_DLC) + +#ifdef CAN_ID_0_FD_EN + #if (CAN_ID_0_USER_REG_PAYLOAD_SIZE == FLEXCAN_USE_PAYLOAD_SIZE_64) + #define CAN_ID_0_REG_PAYLOAD_SIZE FLEXCAN_PAYLOAD_SIZE_64 + //#define CAN_MCR_MAXMB_VALUE 7 //最大組數 + #define CAN_ID_0_FRAME_DLC 64u /* CAN底層的一幀字節數 */ + #elif (CAN_ID_0_USER_REG_PAYLOAD_SIZE == FLEXCAN_USE_PAYLOAD_SIZE_32) + #define CAN_ID_0_REG_PAYLOAD_SIZE FLEXCAN_PAYLOAD_SIZE_32 + //#define CAN_MCR_MAXMB_VALUE 12 //最大組數 + #define CAN_ID_0_FRAME_DLC 32u /* CAN底層的一幀字節數 */ + #elif (CAN_ID_0_USER_REG_PAYLOAD_SIZE == FLEXCAN_USE_PAYLOAD_SIZE_16) + #define CAN_ID_0_REG_PAYLOAD_SIZE FLEXCAN_PAYLOAD_SIZE_16 + //#define CAN_MCR_MAXMB_VALUE 21 //最大組數 + #define CAN_ID_0_FRAME_DLC 16u /* CAN底層的一幀字節數 */ + #elif (CAN_ID_0_USER_REG_PAYLOAD_SIZE == FLEXCAN_USE_PAYLOAD_SIZE_8) + #define CAN_ID_0_REG_PAYLOAD_SIZE FLEXCAN_PAYLOAD_SIZE_8 + //#define CAN_MCR_MAXMB_VALUE 32 //最大組數 + #define CAN_ID_0_FRAME_DLC 8u /* CAN底層的一幀字節數 */ + #endif +#else + #define CAN_ID_0_REG_PAYLOAD_SIZE FLEXCAN_PAYLOAD_SIZE_8 + //#define CAN_MCR_MAXMB_VALUE 32 //最大組數 + #define CAN_ID_0_FRAME_DLC 8u /* CAN底層的一幀字節數 */ +#endif + +#ifdef CAN_ID_1_FD_EN + #if (CAN_ID_1_USER_REG_PAYLOAD_SIZE == FLEXCAN_USE_PAYLOAD_SIZE_64) + #define CAN_ID_1_REG_PAYLOAD_SIZE FLEXCAN_PAYLOAD_SIZE_64 + //#define CAN_MCR_MAXMB_VALUE 7 //最大組數 + #define CAN_ID_1_FRAME_DLC 64u /* CAN底層的一幀字節數 */ + #elif (CAN_ID_1_USER_REG_PAYLOAD_SIZE == FLEXCAN_USE_PAYLOAD_SIZE_32) + #define CAN_ID_1_REG_PAYLOAD_SIZE FLEXCAN_PAYLOAD_SIZE_32 + //#define CAN_MCR_MAXMB_VALUE 12 //最大組數 + #define CAN_ID_1_FRAME_DLC 32u /* CAN底層的一幀字節數 */ + #elif (CAN_ID_1_USER_REG_PAYLOAD_SIZE == FLEXCAN_USE_PAYLOAD_SIZE_16) + #define CAN_ID_1_REG_PAYLOAD_SIZE FLEXCAN_PAYLOAD_SIZE_16 + //#define CAN_MCR_MAXMB_VALUE 21 //最大組數 + #define CAN_ID_1_FRAME_DLC 16u /* CAN底層的一幀字節數 */ + #elif (CAN_ID_1_USER_REG_PAYLOAD_SIZE == FLEXCAN_USE_PAYLOAD_SIZE_8) + #define CAN_ID_1_REG_PAYLOAD_SIZE FLEXCAN_PAYLOAD_SIZE_8 + //#define CAN_MCR_MAXMB_VALUE 32 //最大組數 + #define CAN_ID_1_FRAME_DLC 8u /* CAN底層的一幀字節數 */ + #endif +#else + #define CAN_ID_1_REG_PAYLOAD_SIZE FLEXCAN_PAYLOAD_SIZE_8 + //#define CAN_MCR_MAXMB_VALUE 32 //最大組數 + #define CAN_ID_1_FRAME_DLC 8u /* CAN底層的一幀字節數 */ +#endif + +#ifdef CAN_ID_2_FD_EN + #if (CAN_ID_2_USER_REG_PAYLOAD_SIZE == FLEXCAN_USE_PAYLOAD_SIZE_64) + #define CAN_ID_2_REG_PAYLOAD_SIZE FLEXCAN_PAYLOAD_SIZE_64 + //#define CAN_MCR_MAXMB_VALUE 7 //最大組數 + #define CAN_ID_2_FRAME_DLC 64u /* CAN底層的一幀字節數 */ + #elif (CAN_ID_2_USER_REG_PAYLOAD_SIZE == FLEXCAN_USE_PAYLOAD_SIZE_32) + #define CAN_ID_2_REG_PAYLOAD_SIZE FLEXCAN_PAYLOAD_SIZE_32 + //#define CAN_MCR_MAXMB_VALUE 12 //最大組數 + #define CAN_ID_2_FRAME_DLC 32u /* CAN底層的一幀字節數 */ + #elif (CAN_ID_2_USER_REG_PAYLOAD_SIZE == FLEXCAN_USE_PAYLOAD_SIZE_16) + #define CAN_ID_2_REG_PAYLOAD_SIZE FLEXCAN_PAYLOAD_SIZE_16 + //#define CAN_MCR_MAXMB_VALUE 21 //最大組數 + #define CAN_ID_2_FRAME_DLC 16u /* CAN底層的一幀字節數 */ + #elif (CAN_ID_2_USER_REG_PAYLOAD_SIZE == FLEXCAN_USE_PAYLOAD_SIZE_8) + #define CAN_ID_2_REG_PAYLOAD_SIZE FLEXCAN_PAYLOAD_SIZE_8 + //#define CAN_MCR_MAXMB_VALUE 32 //最大組數 + #define CAN_ID_2_FRAME_DLC 8u /* CAN底層的一幀字節數 */ + #endif +#else + #define CAN_ID_2_REG_PAYLOAD_SIZE FLEXCAN_PAYLOAD_SIZE_8 + //#define CAN_MCR_MAXMB_VALUE 32 //最大組數 + #define CAN_ID_2_FRAME_DLC 8u /* CAN底層的一幀字節數 */ +#endif + +//可以參照 +#define CAN_FRAME_DLC CAN_ID_0_FRAME_DLC //記得修改，for不同的需求 + + +#define CAN_MSG_MAX_FRMAES 4u /*目前一個完整的數據包 最多的幀數 */ +/*數據緩存區大小*/ +#define CAN_MSG_MAX_SIZES (u16)(CAN_MSG_MAX_FRMAES * CAN_FRAME_DLC) /*目前一個完整的數據包 最多的字節數 */ + + +#define CAN_FRAME_COM_DLC CAN_FRAME_DLC +#define CAN_FRAME_TP_DLC CAN_FRAME_DLC//32 //CAN_FRAME_DLC + + +/*********************************************/ + +/*消息隊列的深度*/ +#define CAN_ID_0_TX_QUEUE_DEPTH 8u +#define CAN_ID_0_RX_QUEUE_DEPTH 8u + + +/*測試一次性發送的字節*/ +#define CAN_ID_0_TEST_LENGTH CAN_MSG_MAX_SIZES + + +/*****************以上是CAN 0邏輯相關****************************/ + + + + + +/*********************************************/ + +/*消息隊列的深度*/ +#define CAN_ID_1_TX_QUEUE_DEPTH 8u +#define CAN_ID_1_RX_QUEUE_DEPTH 8u + +/*測試一次性發送的字節*/ +#define CAN_ID_1_TEST_LENGTH CAN_MSG_MAX_SIZES + + +/*****************以上是CAN 1邏輯相關****************************/ + + + +/*********************************************/ + +/*消息隊列的深度*/ +#define CAN_ID_2_TX_QUEUE_DEPTH 8u +#define CAN_ID_2_RX_QUEUE_DEPTH 8u + +/*測試一次性發送的字節*/ +#define CAN_ID_2_TEST_LENGTH CAN_MSG_MAX_SIZES + + +/*****************以上是CAN 2邏輯相關****************************/ +#define CAN_SWITCH_CONTEXT_ENABLE 1u /*r開啟上下文切換*/ + + +#ifdef CAN_SWITCH_CONTEXT_ENABLE +#define CAN_CPU_SR_ALLOC() CPU_SR_ALLOC() +#define CAN_CPU_CRITICAL_ENTER() ENTER_CRITICAL() +#define CAN_CPU_CRITICAL_EXIT() EXIT_CRITICAL() +#else +#define CAN_CPU_SR_ALLOC() +#define CAN_CPU_CRITICAL_ENTER() +#define CAN_CPU_CRITICAL_EXIT() +#endif + + + +/*! @brief Device instance number */ +#define INST_CANCOM0 (0U) +#define INST_CANCOM1 (1U) +#define INST_CANCOM2 (2U) + +#if 0 +/*! @brief Driver state structure which holds driver runtime data */ +//extern flexcan_state_t canCom1_State; +extern const flexcan_user_config_t canCom1_InitConfig0; +extern const flexcan_user_config_t canCom1_InitConfig1; +extern const flexcan_user_config_t canCom1_InitConfig2; +#endif + +#define CAN_ID_0_RX_FIFO_ID_0 0u +#if 0 +#define CAN_LOGIC0_RX_FIFO_ID_1 1 +#define CAN_LOGIC0_RX_FIFO_ID_2 2 +#define CAN_LOGIC0_RX_FIFO_ID_3 3 +#define CAN_LOGIC0_RX_FIFO_ID_4 4 +#define CAN_LOGIC0_RX_FIFO_ID_5 5 +#define CAN_LOGIC0_RX_FIFO_ID_6 6 +#define CAN_LOGIC0_RX_FIFO_ID_7 7 +#endif +#define CAN_ID_0_RX_FIFO_ID_MAX 8u + +#define CAN_ID_0_TX_MAILBOX_ID_0 0u +#define CAN_ID_0_TX_MAILBOX_ID_1 1u +#define CAN_ID_0_TX_MAILBOX_ID_MAX 3u + +//先定義邏輯順序--接收mailbox --fifo 以及 發送的MAILBOX +#define CAN_ID_0_RX_MAILBOX_ID_0 0u +#define CAN_ID_0_RX_MAILBOX_ID_1 1u + +#ifdef CAN_ID_0_FD_EN + #if (CAN_ID_0_USER_REG_PAYLOAD_SIZE == FLEXCAN_USE_PAYLOAD_SIZE_64) + #define CAN_ID_0_RX_MAILBOX_ID_MAX 4 // 不超過 CAN_MCR_MAXMB_VALUE-TX //7-TX + #define CAN_ID_0_MCR_MAXMB_VALUE (CAN_ID_0_RX_MAILBOX_ID_MAX+CAN_ID_0_TX_MAILBOX_ID_MAX) + #elif (CAN_ID_0_USER_REG_PAYLOAD_SIZE == FLEXCAN_USE_PAYLOAD_SIZE_32) + #define CAN_ID_0_RX_MAILBOX_ID_MAX 9 // 不超過 CAN_MCR_MAXMB_VALUE-TX //12-TX + #define CAN_ID_0_MCR_MAXMB_VALUE (CAN_ID_0_RX_MAILBOX_ID_MAX+CAN_ID_0_TX_MAILBOX_ID_MAX) + #elif (CAN_ID_0_USER_REG_PAYLOAD_SIZE == FLEXCAN_USE_PAYLOAD_SIZE_16) + #define CAN_ID_0_RX_MAILBOX_ID_MAX 10 // 不超過 CAN_MCR_MAXMB_VALUE-TX //21-TX + #define CAN_ID_0_MCR_MAXMB_VALUE (CAN_ID_0_RX_MAILBOX_ID_MAX+CAN_ID_0_TX_MAILBOX_ID_MAX) + #elif (CAN_ID_0_USER_REG_PAYLOAD_SIZE == FLEXCAN_USE_PAYLOAD_SIZE_8) + #define CAN_ID_0_RX_MAILBOX_ID_MAX 10 // 不超過 CAN_MCR_MAXMB_VALUE-TX //32-TX + #define CAN_ID_0_MCR_MAXMB_VALUE (CAN_ID_0_RX_MAILBOX_ID_MAX+CAN_ID_0_TX_MAILBOX_ID_MAX) + #endif +#else + #ifdef CAN_ID_0_USE_RX_FIFO + #define CAN_ID_0_RX_MAILBOX_ID_MAX 2u + #define CAN_ID_0_MCR_MAXMB_VALUE (16u) + #else + #define CAN_ID_0_RX_MAILBOX_ID_MAX 10u + #define CAN_ID_0_MCR_MAXMB_VALUE (CAN_ID_0_RX_MAILBOX_ID_MAX+CAN_ID_0_TX_MAILBOX_ID_MAX) + #endif +#endif + +//can1 +#define CAN_ID_1_RX_FIFO_ID_0 0u +#if 0 +#define CAN_LOGIC0_RX_FIFO_ID_1 1 +#define CAN_LOGIC0_RX_FIFO_ID_2 2 +#define CAN_LOGIC0_RX_FIFO_ID_3 3 +#define CAN_LOGIC0_RX_FIFO_ID_4 4 +#define CAN_LOGIC0_RX_FIFO_ID_5 5 +#define CAN_LOGIC0_RX_FIFO_ID_6 6 +#define CAN_LOGIC0_RX_FIFO_ID_7 7 +#endif +#define CAN_ID_1_RX_FIFO_ID_MAX 8u + +#define CAN_ID_1_TX_MAILBOX_ID_0 0u +#define CAN_ID_1_TX_MAILBOX_ID_1 1u +#define CAN_ID_1_TX_MAILBOX_ID_MAX 3u + +//先定義邏輯順序--接收mailbox --fifo 以及 發送的MAILBOX +#define CAN_ID_1_RX_MAILBOX_ID_0 0u +#define CAN_ID_1_RX_MAILBOX_ID_1 1u + +#ifdef CAN_ID_1_FD_EN + #if (CAN_ID_1_USER_REG_PAYLOAD_SIZE == FLEXCAN_USE_PAYLOAD_SIZE_64) + #define CAN_ID_1_RX_MAILBOX_ID_MAX 4 // 不超過 CAN_MCR_MAXMB_VALUE-TX //7-TX + #define CAN_ID_1_MCR_MAXMB_VALUE (CAN_ID_1_RX_MAILBOX_ID_MAX+CAN_ID_1_TX_MAILBOX_ID_MAX) + #elif (CAN_ID_1_USER_REG_PAYLOAD_SIZE == FLEXCAN_USE_PAYLOAD_SIZE_32) + #define CAN_ID_1_RX_MAILBOX_ID_MAX 9 // 不超過 CAN_MCR_MAXMB_VALUE-TX //12-TX + #define CAN_ID_1_MCR_MAXMB_VALUE (CAN_ID_1_RX_MAILBOX_ID_MAX+CAN_ID_1_TX_MAILBOX_ID_MAX) + #elif (CAN_ID_1_USER_REG_PAYLOAD_SIZE == FLEXCAN_USE_PAYLOAD_SIZE_16) + #define CAN_ID_1_RX_MAILBOX_ID_MAX 10 // 不超過 CAN_MCR_MAXMB_VALUE-TX //21-TX + #define CAN_ID_1_MCR_MAXMB_VALUE (CAN_ID_1_RX_MAILBOX_ID_MAX+CAN_ID_1_TX_MAILBOX_ID_MAX) + #elif (CAN_ID_1_USER_REG_PAYLOAD_SIZE == FLEXCAN_USE_PAYLOAD_SIZE_8) + #define CAN_ID_1_RX_MAILBOX_ID_MAX 10 // 不超過 CAN_MCR_MAXMB_VALUE-TX //32-TX + #define CAN_ID_1_MCR_MAXMB_VALUE (CAN_ID_1_RX_MAILBOX_ID_MAX+CAN_ID_1_TX_MAILBOX_ID_MAX) + #endif +#else + #ifdef CAN_ID_1_USE_RX_FIFO + #define CAN_ID_1_RX_MAILBOX_ID_MAX 2u + #define CAN_ID_1_MCR_MAXMB_VALUE (16u) + #else + #define CAN_ID_1_RX_MAILBOX_ID_MAX 10u + #define CAN_ID_1_MCR_MAXMB_VALUE (CAN_ID_1_RX_MAILBOX_ID_MAX+CAN_ID_1_TX_MAILBOX_ID_MAX) + #endif +#endif + +//can2 +#define CAN_ID_2_RX_FIFO_ID_0 0u +#if 0 +#define CAN_LOGIC0_RX_FIFO_ID_1 1 +#define CAN_LOGIC0_RX_FIFO_ID_2 2 +#define CAN_LOGIC0_RX_FIFO_ID_3 3 +#define CAN_LOGIC0_RX_FIFO_ID_4 4 +#define CAN_LOGIC0_RX_FIFO_ID_5 5 +#define CAN_LOGIC0_RX_FIFO_ID_6 6 +#define CAN_LOGIC0_RX_FIFO_ID_7 7 +#endif +#define CAN_ID_2_RX_FIFO_ID_MAX 8u + +#define CAN_ID_2_TX_MAILBOX_ID_0 0u +#define CAN_ID_2_TX_MAILBOX_ID_1 1u +#define CAN_ID_2_TX_MAILBOX_ID_MAX 3u + +//先定義邏輯順序--接收mailbox --fifo 以及 發送的MAILBOX +#define CAN_ID_2_RX_MAILBOX_ID_0 0u +#define CAN_ID_2_RX_MAILBOX_ID_1 1u + +#ifdef CAN_ID_2_FD_EN + #if (CAN_ID_2_USER_REG_PAYLOAD_SIZE == FLEXCAN_USE_PAYLOAD_SIZE_64) + #define CAN_ID_2_RX_MAILBOX_ID_MAX 4 // 不超過 CAN_MCR_MAXMB_VALUE-TX //7-TX + #define CAN_ID_2_MCR_MAXMB_VALUE (CAN_ID_2_RX_MAILBOX_ID_MAX+CAN_ID_2_TX_MAILBOX_ID_MAX) + #elif (CAN_ID_2_USER_REG_PAYLOAD_SIZE == FLEXCAN_USE_PAYLOAD_SIZE_32) + #define CAN_ID_2_RX_MAILBOX_ID_MAX 9 // 不超過 CAN_MCR_MAXMB_VALUE-TX //12-TX + #define CAN_ID_2_MCR_MAXMB_VALUE (CAN_ID_2_RX_MAILBOX_ID_MAX+CAN_ID_2_TX_MAILBOX_ID_MAX) + #elif (CAN_ID_2_USER_REG_PAYLOAD_SIZE == FLEXCAN_USE_PAYLOAD_SIZE_16) + #define CAN_ID_2_RX_MAILBOX_ID_MAX 10 // 不超過 CAN_MCR_MAXMB_VALUE-TX //21-TX + #define CAN_ID_2_MCR_MAXMB_VALUE (CAN_ID_2_RX_MAILBOX_ID_MAX+CAN_ID_2_TX_MAILBOX_ID_MAX) + #elif (CAN_ID_2_USER_REG_PAYLOAD_SIZE == FLEXCAN_USE_PAYLOAD_SIZE_8) + #define CAN_ID_2_RX_MAILBOX_ID_MAX 10 // 不超過 CAN_MCR_MAXMB_VALUE-TX //32-TX + #define CAN_ID_2_MCR_MAXMB_VALUE (CAN_ID_2_RX_MAILBOX_ID_MAX+CAN_ID_2_TX_MAILBOX_ID_MAX) + #endif +#else + #ifdef CAN_ID_2_USE_RX_FIFO + #define CAN_ID_2_RX_MAILBOX_ID_MAX 2u + #define CAN_ID_2_MCR_MAXMB_VALUE (16u) + #else + #define CAN_ID_2_RX_MAILBOX_ID_MAX 10u + #define CAN_ID_2_MCR_MAXMB_VALUE (CAN_ID_2_RX_MAILBOX_ID_MAX+CAN_ID_2_TX_MAILBOX_ID_MAX) + #endif +#endif + +#define CAN_ID_0_ORed_0_15_MB_IRQn CAN0_ORed_0_31_MB_IRQn +#define CAN_ID_0_ORed_16_31_MB_IRQn CAN0_ORed_0_31_MB_IRQn +#define CAN_ID_0_Wake_Up_IRQn CAN0_ORed_Err_Wakeup_IRQn +#define CAN_ID_0_Error_IRQn CAN0_ORed_Err_Wakeup_IRQn +//#define CAN_ID_0_ORed_IRQn CAN0_ORed_IRQn + +#define CAN_ID_1_ORed_0_15_MB_IRQn CAN1_ORed_0_15_MB_IRQn +//#define CAN_ID_1_ORed_16_31_MB_IRQn CAN1_ORed_16_31_MB_IRQn +//#define CAN_ID_1_Wake_Up_IRQn CAN1_Wake_Up_IRQn +#define CAN_ID_1_Error_IRQn CAN1_Error_IRQn +#define CAN_ID_1_ORed_IRQn CAN1_ORed_IRQn + + +#define CAN0 CAN +#define CAN_BASE_PTRS { CAN0 } + +/* 定义数据收发的帧ID，必须跟上位机配置一致 否则无法正常工作 */ +/* 定义数据收发帧ID类型，0-标准帧，1-扩展帧 */ +#define MSG_ID_TYPE 0 +#if (MSG_ID_TYPE == 0) /* 标准帧 */ +/* 对于CAN总线，数据收发ID可以定义为一个ID，也可以定义为不同ID */ + #define MSG_RECEIVE_ID 0x3C + #define MSG_SEND_ID 0x3D +#else /* 扩展帧 */ +/* 对于CAN总线，数据收发ID可以定义为一个ID，也可以定义为不同ID */ + #define MSG_RECEIVE_ID 0x12345 + #define MSG_SEND_ID 0x12346 +#endif + + +#define CAN_TX_STATE_IDLE 0u +#define CAN_TX_STATE_BUSY 1u + +//#define CAN_ENABLE_HIGH_TX // + +//#define CAN_LOGIC_DEBUG //debug宏 + + + + + + + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ +typedef u8 can_ide_t; +typedef u8 can_rtr_t; + + +typedef u8 flexcan_event_type_t ; +typedef u8 flexcan_user_config_t ; +typedef u8 flexcan_msgbuff_id_type_t ; +typedef struct +{ + u8 state; +}FlexCANState; + +/* Private typedef -----------------------------------------------------------*/ +typedef struct +{ + unsigned char SJW; + unsigned char BS1; + unsigned char BS2; + unsigned short PreScale; +} tCAN_BaudRate; + +typedef enum +{ + STANDARD_CAN = 0, + EXTENDED_CAN = 1 +}CanIf_PduCanIdType; + + + +/** + * @brief CAN Tx message structure definition + */ + +typedef struct +{ + #if 0 + uint32_t StdId; /*!< Specifies the standard identifier. + This parameter can be a value between 0 to 0x7FF. */ + + uint32_t ExtId; /*!< Specifies the extended identifier. + This parameter can be a value between 0 to 0x1FFFFFFF. */ + #else + uint32_t ID; /*!< CAN identifier */ + #endif + + uint8_t IDE; /*!< Specifies the type of identifier for the message that + will be transmitted. This parameter can be a value + of @ref CAN_identifier_type */ + + uint8_t RTR; /*!< Specifies the type of frame for the message that will + be transmitted. This parameter can be a value of + @ref CAN_remote_transmission_request */ + + uint8_t DLC; /*!< Specifies the length of the frame that will be + transmitted. This parameter can be a value between + 0 to 8 */ + + uint8_t Data[CAN_FRAME_MAX_DLC]; /*!< Contains the data to be transmitted. It ranges from 0 + to 0xFF. */ + + //以下为预留 + uint32_t RTS; /*!< Receive time stamps */ + uint8_t ESI; /*!< Transmit time-stamp enable or error state indicator */ + uint8_t BRS; /*!< Bit rate switch */ + uint8_t FDF; /*!< FD format indicator */ + + uint8_t FMI; /*!< Specifies the index of the filter the message stored in + the mailbox passes through. This parameter can be a + value between 0 to 0xFF */ +} CAN_MsgInfoType; + +typedef CAN_MsgInfoType CanTxMsg; +typedef CAN_MsgInfoType CanRxMsg ; + +/*--------------------------------------------------------------------------- +- G L O B A L V A R I A B L E S +- only configuration table allowed here,variables are not allowed! +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ +#if 0 +extern const CAN_FilterControlType g_can_filter_table[]; +extern const CAN_BitrateConfigType g_can_bitrate_cfg_table; +extern const CAN_ConfigType g_can_cfg_table; +extern const CAN_BitrateConfigType g_can_data_bitrate_cfg_table; +#endif +extern const tCAN_BaudRate CAN_BaudRateInitTab[] ; // CLK=8MHz +extern const uint32_t g_can0_baudrate ; + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ + +void can_id_0_normal_irq_task(void *device, uint32_t wpara, uint32_t lpara); + + + + + + + + + + + + + + + + +#endif /* __CAN_CFG_H__ */ + + + + + + diff --git a/code_boot_out/asil/bsp/gpio.c b/code_boot_out/asil/bsp/gpio.c new file mode 100644 index 0000000..c0a4d5b --- /dev/null +++ b/code_boot_out/asil/bsp/gpio.c @@ -0,0 +1,100 @@ +/** ########################################################################## +** Filename : +** Project : +** Module : +** Processor : +** Version : +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20230602- --V1.0-- --mingyea--- --修改-- + +** #########################################################################*/ + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ +#include "gpio.h" + + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ +/*PCLINT_ERROS*/ /*lint --e(961) --e(9026)*/ /* 961 不要過份依賴運算優重出級 */ +#define IS_GPIO_ALL_ID(GPIO_ID) (((GPIO_ID) < Port_id_MAX) ) + + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ + + + +/*--------------------------------------------------------------------------- +- S T A T I C V A R I A B L E S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +* G L O B A L V A R I A B L E S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : 初始化 +----------------------------------------------------------------------------*/ +void gpio_init(void) +{ + gpio_cfg_init(); + //gpio_exit_init(); +} + +/** + * @brief + * @param input: + * @param output: +* @return none: + * @calls + * @calls by + * @others + */ +void gpio_task(void) +{ + + CAN0_STB_ON(); +} + + + + + diff --git a/code_boot_out/asil/bsp/gpio.h b/code_boot_out/asil/bsp/gpio.h new file mode 100644 index 0000000..63ff61c --- /dev/null +++ b/code_boot_out/asil/bsp/gpio.h @@ -0,0 +1,234 @@ +/** ########################################################################## +** Filename : +** Project : +** Module : +** Processor : +** Version : +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20230602- --V1.0-- --mingyea--- --修改-- + +** #########################################################################*/ + +#ifndef GPIO_H__ +#define GPIO_H__ + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ +#include "common_types.h" +#include "gpio_cfg.h" + +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ +#define GPIO_READ_ERRO 0XFFu + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ +typedef u32 gpio_io_t; +typedef u16 gpio_id_t; + +/*定義對某一管腳讀時的數據; 電平*/ +typedef enum +{ + GPIO_LEVEL_LOW = 0u, + GPIO_LEVEL_HIGH=1u, +}gpio_output_level_e; + +/*方向*/ +typedef enum +{ + DDR_INPUT = 0u, + DDR_OUTPUT =1, +}gpio_dir_e; + +/*GPIO PORT 的id值*/ +typedef enum +{ + Port_id_00 = 0u, + Port_id_01, + Port_id_02, + Port_id_03, + Port_id_04, + Port_id_05, + Port_id_06, + Port_id_07, + Port_id_08, + Port_id_09, + Port_id_10, + Port_id_11, + Port_id_12, + Port_id_13, + Port_id_14, + Port_id_15 +}gpio_port_id_e; +/*GPIO PORT 的id值在 STM32 芯片中表示的序號*/ +typedef enum +{ + Port_id_A = Port_id_00, + Port_id_B, + Port_id_C, + Port_id_D, + Port_id_E, +}gpio_port_letter_e; + +#define Port_id_MAX 5u + +/*PIN的id值*/ +typedef enum +{ + Pin_id_00 = 0u, + Pin_id_01, + Pin_id_02, + Pin_id_03, + Pin_id_04, + Pin_id_05, + Pin_id_06, + Pin_id_07, + Pin_id_08, + Pin_id_09, + Pin_id_10, + Pin_id_11, + Pin_id_12, + Pin_id_13, + Pin_id_14, + Pin_id_15, + Pin_id_16, + Pin_id_17, + Pin_id_18, + Pin_id_19, + Pin_id_20, + Pin_id_21, + Pin_id_22, + Pin_id_23, + Pin_id_24, + Pin_id_25, + Pin_id_26, + Pin_id_27, + Pin_id_28, + Pin_id_29, + Pin_id_30, + Pin_id_31, +}gpio_pin_id_e; + +/*PIN的id值*/ +typedef enum +{ + Pin_00_mask = ((gpio_io_t)0x00000001), + Pin_01_mask = ((gpio_io_t)0x00000002), + Pin_02_mask = ((gpio_io_t)0x00000004), + Pin_03_mask = ((gpio_io_t)0x00000008), + Pin_04_mask = ((gpio_io_t)0x00000010), + Pin_05_mask = ((gpio_io_t)0x00000020), + Pin_06_mask = ((gpio_io_t)0x00000040), + Pin_07_mask = ((gpio_io_t)0x00000080), + Pin_08_mask = ((gpio_io_t)0x00000100), + Pin_09_mask = ((gpio_io_t)0x00000200), + Pin_10_mask = ((gpio_io_t)0x00000400), + Pin_11_mask = ((gpio_io_t)0x00000800), + Pin_12_mask = ((gpio_io_t)0x00001000), + Pin_13_mask = ((gpio_io_t)0x00002000), + Pin_14_mask = ((gpio_io_t)0x00004000), + Pin_15_mask = ((gpio_io_t)0x00008000), + Pin_16_mask = ((gpio_io_t)0x00010000), + Pin_17_mask = ((gpio_io_t)0x00020000), + Pin_18_mask = ((gpio_io_t)0x00040000), + Pin_19_mask = ((gpio_io_t)0x00080000), + Pin_20_mask = ((gpio_io_t)0x00100000), + Pin_21_mask = ((gpio_io_t)0x00200000), + Pin_22_mask = ((gpio_io_t)0x00400000), + Pin_23_mask = ((gpio_io_t)0x00800000), + Pin_24_mask = ((gpio_io_t)0x01000000), + Pin_25_mask = ((gpio_io_t)0x02000000), + Pin_26_mask = ((gpio_io_t)0x04000000), + Pin_27_mask = ((gpio_io_t)0x08000000), + Pin_28_mask = ((gpio_io_t)0x10000000), + Pin_29_mask = ((gpio_io_t)0x20000000), + Pin_30_mask = ((gpio_io_t)0x40000000), + Pin_31_mask = ((gpio_io_t)0x80000000), + Pin_All = ((gpio_io_t)0xFFFFFFFF) +}gpio_pin_id_mask_e; + + +/*lint -e(849) */ /*枚舉中定義了相同值的成員*/ + +typedef enum +{ + GPIO_OPERATE_FALSE = 0u, + GPIO_OPERATE_TRUE = !GPIO_OPERATE_FALSE +}gpio_operate_flag_e; + + +#define GPIO_PIN0_MASK 0x1ul +#define GPIO_PIN1_MASK 0x2ul +#define GPIO_PIN2_MASK 0x4ul +#define GPIO_PIN3_MASK 0x8ul +#define GPIO_PIN4_MASK 0x10ul +#define GPIO_PIN5_MASK 0x20ul +#define GPIO_PIN6_MASK 0x40ul +#define GPIO_PIN7_MASK 0x80ul +#define GPIO_PIN8_MASK 0x100ul +#define GPIO_PIN9_MASK 0x200ul +#define GPIO_PIN10_MASK 0x400ul +#define GPIO_PIN11_MASK 0x800ul +#define GPIO_PIN12_MASK 0x1000ul +#define GPIO_PIN13_MASK 0x2000ul +#define GPIO_PIN14_MASK 0x4000ul +#define GPIO_PIN15_MASK 0x8000ul +#define GPIO_PIN_ALL_MASK 0xFFFFul + + +typedef enum{ + GPIO_PIN0 = 0, + GPIO_PIN1, + GPIO_PIN2, + GPIO_PIN3, + GPIO_PIN4, + GPIO_PIN5, + GPIO_PIN6, + GPIO_PIN7, + GPIO_PIN8, + GPIO_PIN9, + GPIO_PIN10, + GPIO_PIN11, + GPIO_PIN12, + GPIO_PIN13, + GPIO_PIN14, + GPIO_PIN15, + GPIO_PIN_MAX_ONE_GROUP, +}GPIO_PinType; + /*!< GPIO pin check, should be 0~15 */ +#define IS_GPIO_PIN(PINx) ((PINx) <= GPIO_PIN15) +/*--------------------------------------------------------------------------- +- G L O B A L V A R I A B L E S +- only configuration table allowed here,variables are not allowed! +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ +void gpio_init(void); +void gpio_task(void); + + +#include "gpio_cfg.h" + + +#endif /* __GPIO_H */ diff --git a/code_boot_out/asil/bsp/gpio_cfg.c b/code_boot_out/asil/bsp/gpio_cfg.c new file mode 100644 index 0000000..7379377 --- /dev/null +++ b/code_boot_out/asil/bsp/gpio_cfg.c @@ -0,0 +1,654 @@ +/** ########################################################################## +** Filename : +** Project : +** Module : +** Processor : +** Version : +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20230602- --V1.0-- --mingyea--- --修改-- + +** #########################################################################*/ + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ +#include "gpio.h" +#include "nvic.h" +#include "wdog.h" +//#include "power_manager_app.h" + +static void gpio_ext_interrupt_init(void); +static void gpio_ext_interrupt_de_init(void); +static void gpio_pwm_init(void); +static void gpio_key_init(void); +static void gpio_adc_init(void); +static void gpio_can_init(void); +static void gpio_test_init(void); +static void gpio_idle_init(void); + +typedef struct +{ + u8 state; + u8 test[8]; +}gpio_cfg_s; +static gpio_cfg_s g_gpio_cfg; + +//void gpio_isr_callback(void *device, uint32_t wpara, uint32_t lpara); + +/** + * @brief GPIO中断函数 + * @param void + * @retval void + */ +void GPIO_IRQHandler(void) +{ + g_gpio_cfg.test[0]++; + //can RX 中断 + if(FL_GPIO_IsActiveFlag_EXTI(GPIO, FL_GPIO_EXTI_LINE_1)) + { + g_gpio_cfg.test[1]++; + #ifdef CAN_AUTOSAR_NM_EN + //cannm_app_set_event(CANNM_EVENT_EXT_KEY); + #endif + //power_manage_app_set_wakeup(); //TO MODIFY + FL_GPIO_ClearFlag_EXTI(GPIO, FL_GPIO_EXTI_LINE_1); + } + +} + +#if 0 + +/** +* gpio_led_init +* +* @param[in] none +* @return none +* +* @brief init led control gpio +* +*/ +void gpio_i2c_init(void) +{ + FL_GPIO_InitTypeDef GPIO_InitStruct = {0}; + + GPIO_InitStruct.pin = I2C0_SCL_PIN_MASK; + GPIO_InitStruct.mode = FL_GPIO_MODE_DIGITAL; + GPIO_InitStruct.outputType = FL_GPIO_OUTPUT_OPENDRAIN; //FL_GPIO_OUTPUT_OPENDRAIN + GPIO_InitStruct.pull = FL_DISABLE; + GPIO_InitStruct.remapPin = FL_DISABLE; + GPIO_InitStruct.analogSwitch = FL_DISABLE; + FL_GPIO_Init(I2C0_SCL_GPIO, &GPIO_InitStruct); + GPIO_InitStruct.pin = I2C0_SDA_PIN_MASK; + GPIO_InitStruct.outputType = FL_GPIO_OUTPUT_OPENDRAIN; + FL_GPIO_Init(I2C0_SDA_GPIO, &GPIO_InitStruct); + +} + +/** +* gpio_lin_init +* +* @param[in] none +* @return none +* +* @brief init led control gpio +* +*/ +void gpio_lin_init(void) +{ + #if PROJECT_NAME_CURRENT == PROJECT_NAME_DEMO + + FL_GPIO_InitTypeDef GPIO_InitStruct = {0}; + + LIN_SLP_DISABLE(); + + GPIO_InitStruct.pin = LIN_SLP_PIN_MASK; + GPIO_InitStruct.mode = FL_GPIO_MODE_OUTPUT; + GPIO_InitStruct.outputType = FL_GPIO_OUTPUT_PUSHPULL; + GPIO_InitStruct.pull = FL_DISABLE; + FL_GPIO_Init(LIN_SLP_GPIO, &GPIO_InitStruct); + + /* PA13:UART0-RX PA14:UART0-TX */ + GPIO_InitStruct.pin = LIN_RX_PIN_MASK | LIN_TX_PIN_MASK; + GPIO_InitStruct.mode = FL_GPIO_MODE_DIGITAL; + GPIO_InitStruct.outputType = FL_GPIO_OUTPUT_OPENDRAIN; /* 推挽输出 */ + GPIO_InitStruct.pull = FL_ENABLE; + GPIO_InitStruct.remapPin = FL_DISABLE; + GPIO_InitStruct.analogSwitch = FL_DISABLE; + FL_GPIO_Init(LIN_RX_GPIO, &GPIO_InitStruct); + + #else + + + + #endif +} + +#endif + +//普通输出io的配置 +static void gpio_output_init(void) +{ + FL_GPIO_InitTypeDef GPIO_InitStruct = {0}; + + GPIO_InitStruct.pin = O_MDT_CTR_PIN_MASK; + GPIO_InitStruct.mode = FL_GPIO_MODE_OUTPUT; + GPIO_InitStruct.outputType = FL_GPIO_OUTPUT_PUSHPULL; + GPIO_InitStruct.pull = FL_DISABLE; + GPIO_InitStruct.remapPin = FL_DISABLE; + GPIO_InitStruct.analogSwitch = FL_DISABLE; + FL_GPIO_Init(O_MDT_CTR_GPIO, &GPIO_InitStruct); + GPIO_InitStruct.pin = O_12V_CTR_PIN_MASK ; + FL_GPIO_Init(O_12V_CTR_GPIO, &GPIO_InitStruct); + GPIO_InitStruct.pin = O_5V_CTR_PIN_MASK ; + FL_GPIO_Init(O_5V_CTR_GPIO, &GPIO_InitStruct); + GPIO_InitStruct.pin = O_KIT_CTR_PIN_MASK ; + FL_GPIO_Init(O_KIT_CTR_GPIO, &GPIO_InitStruct); + + + O_MDT_CTR_DISABLE(); + O_12V_CTR_DISABLE(); + O_5V_CTR_DISABLE(); + O_KIT_CTR_DISABLE(); + O_MDT_PWM_DISABLE(); + O_DEN_CTR_DISABLE(); +} + + +/** +* gpio_lin_init +* +* @param[in] none +* @return none +* +* @brief init led control gpio +* +*/ +static void gpio_pwm_init(void) +{ + FL_GPIO_InitTypeDef GPIO_InitStruct = {0}; + + GPIO_InitStruct.pin = PWM_LED_PIN_MASK; + GPIO_InitStruct.mode = FL_GPIO_MODE_DIGITAL; + GPIO_InitStruct.outputType = FL_GPIO_OUTPUT_PUSHPULL; + GPIO_InitStruct.pull = FL_DISABLE; + GPIO_InitStruct.analogSwitch = FL_DISABLE; + + GPIO_InitStruct.remapPin = PWM_LED_REPIN; + FL_GPIO_Init(PWM_LED_GPIO, &GPIO_InitStruct); + GPIO_InitStruct.remapPin = PWM_HS_REPIN; + GPIO_InitStruct.pin = PWM_HS_PIN_MASK ; + FL_GPIO_Init(PWM_HS_GPIO, &GPIO_InitStruct); + + GPIO_InitStruct.remapPin = PWM_L1_REPIN; + GPIO_InitStruct.pin = PWM_L1_PIN_MASK ; + FL_GPIO_Init(PWM_L1_GPIO, &GPIO_InitStruct); + + GPIO_InitStruct.remapPin = PWM_L2_REPIN; + GPIO_InitStruct.pin = PWM_L2_PIN_MASK ; + FL_GPIO_Init(PWM_L2_GPIO, &GPIO_InitStruct); + + GPIO_InitStruct.remapPin = PWM_R1_REPIN; + GPIO_InitStruct.pin = PWM_R1_PIN_MASK ; + FL_GPIO_Init(PWM_R1_GPIO, &GPIO_InitStruct); + + GPIO_InitStruct.remapPin = PWM_R2_REPIN; + GPIO_InitStruct.pin = PWM_R2_PIN_MASK ; + FL_GPIO_Init(PWM_R2_GPIO, &GPIO_InitStruct); + + GPIO_InitStruct.remapPin = PWM_LH_REPIN; + GPIO_InitStruct.pin = PWM_LH_PIN_MASK ; + FL_GPIO_Init(PWM_LH_GPIO, &GPIO_InitStruct); + + GPIO_InitStruct.remapPin = PWM_RH_REPIN; + GPIO_InitStruct.pin = PWM_RH_PIN_MASK ; + FL_GPIO_Init(PWM_RH_GPIO, &GPIO_InitStruct); + + +} + +/** +* GPIO_ADC_Init +* +* @param[in] none +* @return none +* +* @brief init key control gpio +* +*/ +static void gpio_key_init(void) +{ + + FL_GPIO_InitTypeDef GPIO_InitStruct = {0}; + + GPIO_InitStruct.pin = KEY_1_PIN_MASK; + GPIO_InitStruct.mode = FL_GPIO_MODE_INPUT; + GPIO_InitStruct.outputType = FL_GPIO_OUTPUT_PUSHPULL; + GPIO_InitStruct.pull = FL_DISABLE; + GPIO_InitStruct.remapPin = FL_DISABLE; + GPIO_InitStruct.analogSwitch = FL_DISABLE; + FL_GPIO_Init(KEY_1_GPIO, &GPIO_InitStruct); + GPIO_InitStruct.pin = KEY_2_PIN_MASK; + FL_GPIO_Init(KEY_2_GPIO, &GPIO_InitStruct); + GPIO_InitStruct.pin = KEY_3_PIN_MASK; + FL_GPIO_Init(KEY_3_GPIO, &GPIO_InitStruct); + GPIO_InitStruct.pin = KEY_4_PIN_MASK; + FL_GPIO_Init(KEY_4_GPIO, &GPIO_InitStruct); + GPIO_InitStruct.pin = KEY_5_PIN_MASK; + FL_GPIO_Init(KEY_5_GPIO, &GPIO_InitStruct); + GPIO_InitStruct.pin = KEY_6_PIN_MASK; + FL_GPIO_Init(KEY_6_GPIO, &GPIO_InitStruct); + + GPIO_InitStruct.pin = KEY_1_ENCODE_PIN_MASK; + FL_GPIO_Init(KEY_1_ENCODE_GPIO, &GPIO_InitStruct); + + GPIO_InitStruct.pin = KEY_2_ENCODE_PIN_MASK; + FL_GPIO_Init(KEY_2_ENCODE_GPIO, &GPIO_InitStruct); + + +} + + +/** +* GPIO_ADC_Init +* +* @param[in] none +* @return none +* +* @brief init led control gpio +* +*/ +static void gpio_adc_init(void) +{ + + FL_GPIO_InitTypeDef GPIO_InitStruct = {0}; + /* 配置引脚为模拟功能 */ + /* ADC ADC_1 引脚 PD1 */ + GPIO_InitStruct.pin = ADC_CHANNEL_0_PIN_MASK; + GPIO_InitStruct.mode = FL_GPIO_MODE_ANALOG; + GPIO_InitStruct.outputType = FL_GPIO_OUTPUT_PUSHPULL; + GPIO_InitStruct.pull = FL_DISABLE; + GPIO_InitStruct.remapPin = FL_DISABLE; + GPIO_InitStruct.analogSwitch = FL_DISABLE; + FL_GPIO_Init(ADC_CHANNEL_0_GPIO, &GPIO_InitStruct); + + GPIO_InitStruct.pin = ADC_CHANNEL_1_PIN_MASK; + FL_GPIO_Init(ADC_CHANNEL_1_GPIO, &GPIO_InitStruct); + + GPIO_InitStruct.pin = ADC_CHANNEL_2_PIN_MASK; + FL_GPIO_Init(ADC_CHANNEL_2_GPIO, &GPIO_InitStruct); + + #if 0 + GPIO_InitStruct.pin = ADC_CHANNEL_3_PIN_MASK; + FL_GPIO_Init(ADC_CHANNEL_3_GPIO, &GPIO_InitStruct); + + GPIO_InitStruct.pin = ADC_CHANNEL_4_PIN_MASK; + FL_GPIO_Init(ADC_CHANNEL_4_GPIO, &GPIO_InitStruct); + #endif + + GPIO_InitStruct.pin = ADC_CHANNEL_5_PIN_MASK; + FL_GPIO_Init(ADC_CHANNEL_5_GPIO, &GPIO_InitStruct); + + GPIO_InitStruct.pin = ADC_CHANNEL_6_PIN_MASK; + FL_GPIO_Init(ADC_CHANNEL_6_GPIO, &GPIO_InitStruct); + + GPIO_InitStruct.pin = ADC_CHANNEL_7_PIN_MASK; + FL_GPIO_Init(ADC_CHANNEL_7_GPIO, &GPIO_InitStruct); + + GPIO_InitStruct.pin = ADC_CHANNEL_8_PIN_MASK; + FL_GPIO_Init(ADC_CHANNEL_8_GPIO, &GPIO_InitStruct); + +} + + +/** +* GPIO_ADC_Init +* +* @param[in] none +* @return none +* +* @brief init led control gpio +* +*/ +static void gpio_can_init(void) +{ + FL_GPIO_InitTypeDef GPIO_InitStruct = {0}; + /* PC2.3配置成模拟功能，外接XTHF */ + /*-----------------------------------GPIO初始化---------------------------------------*/ + GPIO_InitStruct.pin = CAN0_TX_PIN_MASK; /* 48PIN开发板引脚定义 */ + GPIO_InitStruct.mode = FL_GPIO_MODE_DIGITAL; + GPIO_InitStruct.pull = FL_ENABLE; + GPIO_InitStruct.outputType = FL_GPIO_OUTPUT_PUSHPULL; + GPIO_InitStruct.remapPin = FL_DISABLE; + GPIO_InitStruct.analogSwitch = FL_DISABLE; + FL_GPIO_Init(CAN0_TX_GPIO, &GPIO_InitStruct); /* 48PIN开发板引脚定义 */ + + GPIO_InitStruct.pin = CAN0_RX_PIN_MASK; /* 48PIN开发板引脚定义 */ + GPIO_InitStruct.mode = FL_GPIO_MODE_DIGITAL; + GPIO_InitStruct.pull = FL_ENABLE; + GPIO_InitStruct.outputType = FL_GPIO_OUTPUT_PUSHPULL; + GPIO_InitStruct.remapPin = FL_DISABLE; + GPIO_InitStruct.analogSwitch = FL_DISABLE; + FL_GPIO_Init(CAN0_RX_GPIO, &GPIO_InitStruct); /* 48PIN开发板引脚定义 */ + + /* STB引脚初始化 */ + GPIO_InitStruct.pin = CAN0_STB_PIN_MASK; /* 48PIN开发板引脚定义 */ + GPIO_InitStruct.mode = FL_GPIO_MODE_OUTPUT; + GPIO_InitStruct.pull = FL_ENABLE; + GPIO_InitStruct.outputType = FL_GPIO_OUTPUT_PUSHPULL; + GPIO_InitStruct.remapPin = FL_DISABLE; + GPIO_InitStruct.analogSwitch = FL_DISABLE; + FL_GPIO_Init(CAN0_STB_GPIO, &GPIO_InitStruct); + + CAN0_STB_ON(); +} + + +/** +* gpio_led_init +* +* @param[in] none +* @return none +* +* @brief init led control gpio +* +*/ +static void gpio_test_init(void) +{ + FL_GPIO_InitTypeDef GPIO_InitStruct = {0}; + + GPIO_InitStruct.pin = TEST1_PIN_MASK; + GPIO_InitStruct.mode = FL_GPIO_MODE_OUTPUT; + GPIO_InitStruct.outputType = FL_GPIO_OUTPUT_PUSHPULL; + GPIO_InitStruct.pull = FL_DISABLE; + GPIO_InitStruct.remapPin = FL_DISABLE; + GPIO_InitStruct.analogSwitch = FL_DISABLE; + FL_GPIO_Init(TEST1_GPIO, &GPIO_InitStruct); + GPIO_InitStruct.pin = TEST2_PIN_MASK; + FL_GPIO_Init(TEST2_GPIO, &GPIO_InitStruct); + + //FL_GPIO_SetFOUT0(GPIO, FL_GPIO_FOUT0_SELECT_AHBCLK_DIV64); + //FL_GPIO_SetFOUT0(GPIO, FL_GPIO_FOUT0_SELECT_AHBCLK_DIV64); + /* init gpio as output mode */ + TEST1_OFF(); + TEST2_OFF(); +} + + + +//空闲io的配置 +static void gpio_idle_init(void) +{ + +} + + +/** + * @brief + * @param input: + * @param output: +* @return none: + * @calls + * @calls by + * @others + */ +void gpio_cfg_init(void) +{ + //gpio_output_init(); + //gpio_pwm_init(); + //gpio_key_init(); + //gpio_adc_init(); + gpio_can_init(); + //gpio_idle_init(); + //gpio_test_init(); + //gpio_lin_init(); + //gpio_i2c_init(); + + //gpio_ext_interrupt_init(); +} + + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : None +|Preconditions : None +|Input parameters : None +|Output parameters : None +|Return value : None +|Description : +----------------------------------------------------------------------------*/ +static void gpio_ext_interrupt_init(void) +{ + FL_GPIO_InitTypeDef GPIO_InitStruct = {0}; + FL_EXTI_InitTypeDef extiInitStruct = {0}; + FL_EXTI_CommonInitTypeDef extiCommonInitStruct = {0}; + + FL_CMU_EnableEXTIOnSleep(); /* 休眠使能外部中断采样 */ + + /* EXTI中断采样时钟选择 */ + extiCommonInitStruct.clockSource = FL_CMU_EXTI_CLK_SOURCE_LSCLK; + FL_EXTI_CommonInit(&extiCommonInitStruct); + + /***********************CAN RX**************************/ + GPIO_InitStruct.pin = (uint32_t)CAN0_RX_PIN_MASK; /* 48PIN开发板引脚定义 */ + GPIO_InitStruct.mode = (uint32_t)FL_GPIO_MODE_INPUT; + GPIO_InitStruct.pull = (uint32_t)FL_ENABLE; + GPIO_InitStruct.outputType = (uint32_t)FL_GPIO_OUTPUT_PUSHPULL; + GPIO_InitStruct.remapPin = (uint32_t)FL_DISABLE; + GPIO_InitStruct.analogSwitch = (uint32_t)FL_DISABLE; + FL_GPIO_Init(CAN0_RX_GPIO, &GPIO_InitStruct); /* 48PIN开发板引脚定义 */ + + extiInitStruct.input = (uint32_t)CAN0_RX_EXIT_GROUP; /* 中断线上对应的IO */ + extiInitStruct.filter = (uint32_t)FL_ENABLE; /* 使能数字滤波 */ + extiInitStruct.triggerEdge = (uint32_t)FL_GPIO_EXTI_TRIGGER_EDGE_FALLING; /* 设置触发边沿 */ + FL_EXTI_Init(CAN0_RX_EXIT_LINE,&extiInitStruct); + + + /* NVIC中断配置 */ + NVIC_ClearPendingIRQ(GPIO_IRQn); + NVIC_DisableIRQ(GPIO_IRQn); + NVIC_SetPriority(GPIO_IRQn, NVIC_PRIORITY_GPIO); /* 中断优先级配置 */ + NVIC_EnableIRQ(GPIO_IRQn); +} + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : None +|Preconditions : None +|Input parameters : None +|Output parameters : None +|Return value : None +|Description : +----------------------------------------------------------------------------*/ +static void gpio_ext_interrupt_de_init(void) +{ + FL_GPIO_InitTypeDef GPIO_InitStruct = {0}; + + FL_CMU_DisableEXTIOnSleep(); /* 休眠使能外部中断采样 */ + + /* EXTI中断采样时钟选择 */ + FL_EXTI_CommonDeinit(); + + /***********************FM33LG0X5A 48PIN**************************/ + /* can rx GPIO外设 */ + GPIO_InitStruct.pin = (uint32_t)CAN0_RX_PIN_MASK; /* 48PIN开发板引脚定义 */ + GPIO_InitStruct.mode = (uint32_t)FL_GPIO_MODE_DIGITAL; + GPIO_InitStruct.pull = (uint32_t)FL_ENABLE; + GPIO_InitStruct.outputType = (uint32_t)FL_GPIO_OUTPUT_PUSHPULL; + GPIO_InitStruct.remapPin = (uint32_t)FL_DISABLE; + GPIO_InitStruct.analogSwitch = (uint32_t)FL_DISABLE; + FL_GPIO_Init(CAN0_RX_GPIO, &GPIO_InitStruct); /* 48PIN开发板引脚定义 */ + + FL_EXTI_DeInit(CAN0_RX_EXIT_LINE); + + /* NVIC中断配置 */ + NVIC_DisableIRQ(GPIO_IRQn); + //NVIC_SetPriority(GPIO_IRQn, NVIC_PRIORITY_EXTI0); /* 中断优先级配置 */ + //NVIC_EnableIRQ(GPIO_IRQn); +} + +// +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : None +|Preconditions : None +|Input parameters : None +|Output parameters : None +|Return value : None +|Description : +----------------------------------------------------------------------------*/ +void gpio_goto_sleep(void) +{ + TEST1_OFF(); + TEST2_OFF(); + CAN0_STB_OFF(); + + O_MDT_CTR_DISABLE(); + O_12V_CTR_DISABLE(); + O_5V_CTR_DISABLE(); + O_KIT_CTR_DISABLE(); + O_MDT_PWM_DISABLE(); + O_DEN_CTR_DISABLE(); + //FL_CAN_SetSoftwareReset(CAN,FL_CAN_SOFTWARE_RESET); + gpio_ext_interrupt_init(); +} + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : None +|Preconditions : None +|Input parameters : None +|Output parameters : None +|Return value : None +|Description : +----------------------------------------------------------------------------*/ +void gpio_goto_wakeup(void) +{ + gpio_ext_interrupt_de_init(); + TEST1_ON(); + TEST2_ON(); + CAN0_STB_ON(); + //LIN_SLP_ENABLE(); +} + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : None +|Preconditions : None +|Input parameters : None +|Output parameters : None +|Return value : None +|Description : +----------------------------------------------------------------------------*/ +void gpio_cfg_re_init(void) +{ + gpio_cfg_init(); +} + + + +/*--------------------------------------------------------------------------- +|Prototype : lpt32_ch1_set_gpio +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +----------------------------------------------------------------------------*/ +void lpt32_ch1_set_gpio(void) +{ + FL_GPIO_InitTypeDef GPIO_InitStruct = {0}; + + GPIO_InitStruct.pin = GPIO_PIN8_MASK; + GPIO_InitStruct.mode = FL_GPIO_MODE_OUTPUT; + GPIO_InitStruct.outputType = FL_GPIO_OUTPUT_PUSHPULL; //FL_GPIO_OUTPUT_OPENDRAIN + GPIO_InitStruct.pull = FL_DISABLE; + GPIO_InitStruct.remapPin = FL_DISABLE; //注意 + GPIO_InitStruct.analogSwitch = FL_DISABLE; + FL_GPIO_Init(GPIOA, &GPIO_InitStruct); + FL_GPIO_ResetOutputPin(GPIOB, GPIO_PIN8_MASK); + +} + +/*--------------------------------------------------------------------------- +|Prototype : lpt32_ch1_set_pwm +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +----------------------------------------------------------------------------*/ +void lpt32_ch1_set_pwm(void) +{ + FL_GPIO_InitTypeDef GPIO_InitStruct = {0}; + + GPIO_InitStruct.pin = GPIO_PIN8_MASK; + GPIO_InitStruct.mode = FL_GPIO_MODE_DIGITAL; + GPIO_InitStruct.outputType = FL_GPIO_OUTPUT_PUSHPULL; //FL_GPIO_OUTPUT_OPENDRAIN + GPIO_InitStruct.pull = FL_DISABLE; + GPIO_InitStruct.remapPin = FL_ENABLE; //注意 + GPIO_InitStruct.analogSwitch = FL_DISABLE; + FL_GPIO_Init(GPIOA, &GPIO_InitStruct); +} + + +/*--------------------------------------------------------------------------- +|Prototype : lpt32_ch2_set_gpio +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +----------------------------------------------------------------------------*/ +void lpt32_ch2_set_gpio(void) +{ + FL_GPIO_InitTypeDef GPIO_InitStruct = {0}; + + GPIO_InitStruct.pin = GPIO_PIN9_MASK; + GPIO_InitStruct.mode = FL_GPIO_MODE_OUTPUT; + GPIO_InitStruct.outputType = FL_GPIO_OUTPUT_PUSHPULL; //FL_GPIO_OUTPUT_OPENDRAIN + GPIO_InitStruct.pull = FL_DISABLE; + GPIO_InitStruct.remapPin = FL_DISABLE; //注意 + GPIO_InitStruct.analogSwitch = FL_DISABLE; + FL_GPIO_Init(GPIOA, &GPIO_InitStruct); + FL_GPIO_ResetOutputPin(GPIOB, GPIO_PIN8_MASK); + +} + +/*--------------------------------------------------------------------------- +|Prototype : lpt32_ch2_set_pwm +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +----------------------------------------------------------------------------*/ +void lpt32_ch2_set_pwm(void) +{ + FL_GPIO_InitTypeDef GPIO_InitStruct = {0}; + + GPIO_InitStruct.pin = GPIO_PIN9_MASK; + GPIO_InitStruct.mode = FL_GPIO_MODE_DIGITAL; + GPIO_InitStruct.outputType = FL_GPIO_OUTPUT_PUSHPULL; //FL_GPIO_OUTPUT_OPENDRAIN + GPIO_InitStruct.pull = FL_DISABLE; + GPIO_InitStruct.remapPin = FL_ENABLE; //注意 + GPIO_InitStruct.analogSwitch = FL_DISABLE; + FL_GPIO_Init(GPIOA, &GPIO_InitStruct); +} + + /*end line*/ + diff --git a/code_boot_out/asil/bsp/gpio_cfg.h b/code_boot_out/asil/bsp/gpio_cfg.h new file mode 100644 index 0000000..81d699b --- /dev/null +++ b/code_boot_out/asil/bsp/gpio_cfg.h @@ -0,0 +1,353 @@ +/** ########################################################################## +** Filename : +** Project : +** Module : +** Processor : +** Version : 1.0 +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20191106- --V01-- --LYJ--- --初版-- +** -20230602- --V1.0-- --mingyea--- --修改-- + +** #########################################################################*/ +#ifndef GPIO_CFG_H__ +#define GPIO_CFG_H__ + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ +#include "common_types.h" +#include "common_cfg.h" +#include "cpu.h" + +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ +#define gpio_read_pin_input FL_GPIO_GetInputPin // + + +//NTC AD +#define ADC_CHANNEL_0_PIN_ID GPIO_PIN8 +#define ADC_CHANNEL_0_PIN_MASK GPIO_PIN8_MASK +#define ADC_CHANNEL_0_GPIO GPIOC +#define ADC_CHANNEL_0_PHY_ID FL_ADC_EXTERNAL_CH13 +#define ADC_CHANNEL_0_FUNC_SEL GPIO_FUN2 + +//ad1 +#define ADC_CHANNEL_1_PIN_ID GPIO_PIN1 +#define ADC_CHANNEL_1_PIN_MASK GPIO_PIN1_MASK +#define ADC_CHANNEL_1_GPIO GPIOA +#define ADC_CHANNEL_1_PHY_ID FL_ADC_EXTERNAL_CH12 +#define ADC_CHANNEL_1_FUNC_SEL GPIO_FUN2 + +//ad3 +#define ADC_CHANNEL_2_PIN_ID GPIO_PIN0 +#define ADC_CHANNEL_2_PIN_MASK GPIO_PIN0_MASK +#define ADC_CHANNEL_2_GPIO GPIOA +#define ADC_CHANNEL_2_PHY_ID FL_ADC_EXTERNAL_CH5 +#define ADC_CHANNEL_2_FUNC_SEL GPIO_FUN2 + +#if 0 +//ad3 +#define ADC_CHANNEL_3_PIN_ID GPIO_PIN9 +#define ADC_CHANNEL_3_PIN_MASK GPIO_PIN9_MASK +#define ADC_CHANNEL_3_GPIO GPIOC +#define ADC_CHANNEL_3_PHY_ID FL_ADC_EXTERNAL_CH14 +#define ADC_CHANNEL_3_FUNC_SEL GPIO_FUN2 + +//ad4 +#define ADC_CHANNEL_4_PIN_ID GPIO_PIN10 +#define ADC_CHANNEL_4_PIN_MASK GPIO_PIN10_MASK +#define ADC_CHANNEL_4_GPIO GPIOC +#define ADC_CHANNEL_4_PHY_ID FL_ADC_EXTERNAL_CH15 +#define ADC_CHANNEL_4_FUNC_SEL GPIO_FUN2 +#endif + +//ad2 +#define ADC_CHANNEL_5_PIN_ID GPIO_PIN0 +#define ADC_CHANNEL_5_PIN_MASK GPIO_PIN0_MASK +#define ADC_CHANNEL_5_GPIO GPIOD +#define ADC_CHANNEL_5_PHY_ID FL_ADC_EXTERNAL_CH7 +#define ADC_CHANNEL_5_FUNC_SEL GPIO_FUN2 + +//ad 12v +#define ADC_CHANNEL_6_PIN_ID GPIO_PIN1 +#define ADC_CHANNEL_6_PIN_MASK GPIO_PIN1_MASK +#define ADC_CHANNEL_6_GPIO GPIOD +#define ADC_CHANNEL_6_PHY_ID FL_ADC_EXTERNAL_CH1 +#define ADC_CHANNEL_6_FUNC_SEL GPIO_FUN2 + +//ad rh +#define ADC_CHANNEL_7_PIN_ID GPIO_PIN11 +#define ADC_CHANNEL_7_PIN_MASK GPIO_PIN11_MASK +#define ADC_CHANNEL_7_GPIO GPIOD +#define ADC_CHANNEL_7_PHY_ID FL_ADC_EXTERNAL_CH0 +#define ADC_CHANNEL_7_FUNC_SEL GPIO_FUN2 + +//sns ad +#define ADC_CHANNEL_8_PIN_ID GPIO_PIN7 +#define ADC_CHANNEL_8_PIN_MASK GPIO_PIN7_MASK +#define ADC_CHANNEL_8_GPIO GPIOC +#define ADC_CHANNEL_8_PHY_ID FL_ADC_EXTERNAL_CH6 +#define ADC_CHANNEL_8_FUNC_SEL GPIO_FUN2 + + +#define CAN0_TX_PIN_ID GPIO_PIN7 +#define CAN0_TX_PIN_MASK GPIO_PIN7_MASK +#define CAN0_TX_GPIO GPIOA +#define CAN0_TX_FUNC_SEL GPIO_FUN1 + + +#define CAN0_RX_PIN_ID GPIO_PIN6 +#define CAN0_RX_PIN_MASK GPIO_PIN6_MASK +#define CAN0_RX_GPIO GPIOA +#define CAN0_RX_FUNC_SEL GPIO_FUN1 + + + +#define CAN0_STB_PIN_ID GPIO_PIN2 +#define CAN0_STB_PIN_MASK GPIO_PIN2_MASK +#define CAN0_STB_GPIO GPIOA +#define CAN0_STB_FUNC_SEL GPIO_FUN0 + + +#define CAN0_RX_EXIT_LINE FL_GPIO_EXTI_LINE_1 +#define CAN0_RX_EXIT_GROUP FL_GPIO_EXTI_INPUT_GROUP2 +#define CAN0_RX_PIN_VALID GPIO_LEVEL_LOW + + +#define KEY_1_ENCODE_PIN_ID GPIO_PIN11 +#define KEY_1_ENCODE_PIN_MASK GPIO_PIN11_MASK +#define KEY_1_ENCODE_GPIO GPIOA + +#define KEY_2_ENCODE_PIN_ID GPIO_PIN12 +#define KEY_2_ENCODE_PIN_MASK GPIO_PIN12_MASK +#define KEY_2_ENCODE_GPIO GPIOA + +#define KEY_1_PIN_ID GPIO_PIN3 +#define KEY_1_PIN_MASK GPIO_PIN3_MASK +#define KEY_1_GPIO GPIOB + +#define KEY_2_PIN_ID GPIO_PIN9 +#define KEY_2_PIN_MASK GPIO_PIN9_MASK +#define KEY_2_GPIO GPIOC + +#define KEY_3_PIN_ID GPIO_PIN11 +#define KEY_3_PIN_MASK GPIO_PIN11_MASK +#define KEY_3_GPIO GPIOB + +#define KEY_4_PIN_ID GPIO_PIN2 +#define KEY_4_PIN_MASK GPIO_PIN2_MASK +#define KEY_4_GPIO GPIOB + +#define KEY_5_PIN_ID GPIO_PIN10 +#define KEY_5_PIN_MASK GPIO_PIN10_MASK +#define KEY_5_GPIO GPIOC + +#define KEY_6_PIN_ID GPIO_PIN6 +#define KEY_6_PIN_MASK GPIO_PIN6_MASK +#define KEY_6_GPIO GPIOC + +#define O_MDT_CTR_PIN_ID GPIO_PIN10 +#define O_MDT_CTR_PIN_MASK GPIO_PIN10_MASK +#define O_MDT_CTR_GPIO GPIOB + +#define O_12V_CTR_PIN_ID GPIO_PIN15 +#define O_12V_CTR_PIN_MASK GPIO_PIN15_MASK +#define O_12V_CTR_GPIO GPIOA + +#define O_5V_CTR_PIN_ID GPIO_PIN8 +#define O_5V_CTR_PIN_MASK GPIO_PIN8_MASK +#define O_5V_CTR_GPIO GPIOB + +#define O_DEN_CTR_PIN_ID GPIO_PIN3 +#define O_DEN_CTR_PIN_MASK GPIO_PIN3_MASK +#define O_DEN_CTR_GPIO GPIOA + +#define O_KIT_CTR_PIN_ID GPIO_PIN9 +#define O_KIT_CTR_PIN_MASK GPIO_PIN9_MASK +#define O_KIT_CTR_GPIO GPIOA + +//这个不确定 +#if 0 +#define O_MD_PWM_PIN_ID GPIO_PIN10 +#define O_MD_PWM_PIN_MASK GPIO_PIN10_MASK +#define O_MD_PWM_GPIO GPIOB +//#define O_MD_PWM_CHANNEL FL_GPTIM_CHANNEL_2 +#endif + +//gptim1_ch3 +#define PWM_LED_PIN_ID GPIO_PIN4 +#define PWM_LED_PIN_MASK GPIO_PIN4_MASK +#define PWM_LED_GPIO GPIOA +#define PWM_LED_REPIN FL_DISABLE + +//gptim0_ch1 +#define PWM_HS_PIN_ID GPIO_PIN10 +#define PWM_HS_PIN_MASK GPIO_PIN10_MASK +#define PWM_HS_GPIO GPIOB +#define PWM_HS_REPIN FL_ENABLE + + +//ATIM_ch1 +#define PWM_L1_PIN_ID GPIO_PIN4 +#define PWM_L1_PIN_MASK GPIO_PIN4_MASK +#define PWM_L1_GPIO GPIOB +#define PWM_L1_REPIN FL_ENABLE + +//ATIM_ch2 +#define PWM_L2_PIN_ID GPIO_PIN5 +#define PWM_L2_PIN_MASK GPIO_PIN5_MASK +#define PWM_L2_GPIO GPIOB +#define PWM_L2_REPIN FL_ENABLE + +//ATIM_ch3 +#define PWM_R2_PIN_ID GPIO_PIN6 +#define PWM_R2_PIN_MASK GPIO_PIN6_MASK +#define PWM_R2_GPIO GPIOB +#define PWM_R2_REPIN FL_ENABLE + +//ATIM_ch4 +#define PWM_R1_PIN_ID GPIO_PIN7 +#define PWM_R1_PIN_MASK GPIO_PIN7_MASK +#define PWM_R1_GPIO GPIOB +#define PWM_R1_REPIN FL_ENABLE + + +//gptim1_ch1 +#define PWM_LH_PIN_ID GPIO_PIN0 +#define PWM_LH_PIN_MASK GPIO_PIN0_MASK +#define PWM_LH_GPIO GPIOC +#define PWM_LH_REPIN FL_DISABLE + +//gptim1_ch1 +#define PWM_RH_PIN_ID GPIO_PIN1 +#define PWM_RH_PIN_MASK GPIO_PIN1_MASK +#define PWM_RH_GPIO GPIOC +#define PWM_RH_REPIN FL_DISABLE + + + +#define TEST1_PIN_ID GPIO_PIN8 +#define TEST1_PIN_MASK GPIO_PIN8_MASK +#define TEST1_GPIO GPIOB + +#define TEST2_PIN_ID GPIO_PIN6_MASK +#define TEST2_PIN_MASK GPIO_PIN6_MASK +#define TEST2_GPIO GPIOB + +#if 0 +#define I2C0_SCL_PIN_ID GPIO_PIN11 +#define I2C0_SCL_PIN_MASK GPIO_PIN11_MASK +#define I2C0_SCL_GPIO GPIOA + +#define I2C0_SDA_PIN_ID GPIO_PIN12 +#define I2C0_SDA_PIN_MASK GPIO_PIN12_MASK +#define I2C0_SDA_GPIO GPIOA + +#define LIN_TX_PIN_ID GPIO_PIN1 +#define LIN_TX_PIN_MASK GPIO_PIN1_MASK +#define LIN_TX_GPIO GPIOD + +#define LIN_RX_PIN_ID GPIO_PIN0 +#define LIN_RX_PIN_MASK GPIO_PIN0_MASK +#define LIN_RX_GPIO GPIOD + +#define LIN_SLP_PIN_ID GPIO_PIN4 +#define LIN_SLP_PIN_MASK GPIO_PIN4_MASK +#define LIN_SLP_GPIO GPIOA + +#endif + + + +#define TEST2_ON() //FL_GPIO_SetOutputPin(TEST2_GPIO,TEST2_PIN_MASK) +#define TEST2_OFF() //FL_GPIO_ResetOutputPin(TEST2_GPIO,TEST2_PIN_MASK) +#define TEST2_TOGGLE() //FL_GPIO_ToggleOutputPin(TEST2_GPIO,TEST2_PIN_MASK); + +#define TEST1_ON() //FL_GPIO_SetOutputPin(TEST1_GPIO,TEST1_PIN_MASK) +#define TEST1_OFF() //FL_GPIO_ResetOutputPin(TEST1_GPIO,TEST1_PIN_MASK) +#define TEST1_TOGGLE() //FL_GPIO_ToggleOutputPin(TEST1_GPIO,TEST1_PIN_MASK); + + + +#define CAN0_STB_ON() FL_GPIO_ResetOutputPin(CAN0_STB_GPIO,CAN0_STB_PIN_MASK) +#define CAN0_STB_OFF() FL_GPIO_SetOutputPin(CAN0_STB_GPIO,CAN0_STB_PIN_MASK) + +//#define CAN0_STB_INIT_VALUE GPIO_LEVEL_HIGH +//#define CAN0_STB_EN_VALUE GPIO_LEVEL_LOW + +#define O_MDT_CTR_ENABLE() FL_GPIO_SetOutputPin(O_MDT_CTR_GPIO, O_MDT_CTR_PIN_MASK) +#define O_MDT_CTR_DISABLE() FL_GPIO_ResetOutputPin(O_MDT_CTR_GPIO, O_MDT_CTR_PIN_MASK) + +#define O_12V_CTR_ENABLE() FL_GPIO_SetOutputPin(O_12V_CTR_GPIO, O_12V_CTR_PIN_MASK) +#define O_12V_CTR_DISABLE() FL_GPIO_ResetOutputPin(O_12V_CTR_GPIO, O_12V_CTR_PIN_MASK) + +#define O_5V_CTR_ENABLE() FL_GPIO_SetOutputPin(O_5V_CTR_GPIO, O_5V_CTR_PIN_MASK) +#define O_5V_CTR_DISABLE() FL_GPIO_ResetOutputPin(O_5V_CTR_GPIO, O_5V_CTR_PIN_MASK) + +#define O_KIT_CTR_ENABLE() FL_GPIO_SetOutputPin(O_KIT_CTR_GPIO, O_KIT_CTR_PIN_MASK) +#define O_KIT_CTR_DISABLE() FL_GPIO_ResetOutputPin(O_KIT_CTR_GPIO, O_KIT_CTR_PIN_MASK) + +#define O_DEN_CTR_ENABLE() FL_GPIO_SetOutputPin(O_DEN_CTR_GPIO, O_DEN_CTR_PIN_MASK) +#define O_DEN_CTR_DISABLE() FL_GPIO_ResetOutputPin(O_DEN_CTR_GPIO, O_DEN_CTR_PIN_MASK) + +#define O_MDT_PWM_ENABLE() //FL_GPIO_SetOutputPin(O_MD_PWM_GPIO, O_MD_PWM_PIN_MASK) +#define O_MDT_PWM_DISABLE() //FL_GPIO_ResetOutputPin(O_MD_PWM_GPIO, O_MD_PWM_PIN_MASK) + +#define GPIO_HEAT_IN_EN_INVALID 0u +#define GPIO_HEAT_IN_EN_VALID 1u + +#if 0 +//TJA1027 +#define LIN_SLP_ENABLE() FL_GPIO_SetOutputPin(LIN_SLP_GPIO, LIN_SLP_PIN_MASK) +#define LIN_SLP_DISABLE() FL_GPIO_ResetOutputPin(LIN_SLP_GPIO, LIN_SLP_PIN_MASK) + +#define LIN_SLP_INIT_VALUE GPIO_LEVEL_LOW +#define LIN_SLP_EN_VALUE GPIO_LEVEL_HIGH +#endif + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ + + + +/*--------------------------------------------------------------------------- +- G L O B A L V A R I A B L E S +- only configuration table allowed here,variables are not allowed! +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ +void gpio_cfg_init(void); +void gpio_goto_sleep(void); +void gpio_goto_wakeup(void); +void gpio_cfg_re_init(void); + + + + +void lpt32_ch1_set_gpio(void); +void lpt32_ch1_set_pwm(void); +void lpt32_ch2_set_gpio(void); +void lpt32_ch2_set_pwm(void); + + +#endif /* __CLK_CFG_H__ */ diff --git a/code_boot_out/asil/bsp/rmu.c b/code_boot_out/asil/bsp/rmu.c new file mode 100644 index 0000000..2f4b5db --- /dev/null +++ b/code_boot_out/asil/bsp/rmu.c @@ -0,0 +1,164 @@ +/** ########################################################################## +** Filename : +** Project : +** Module : +** Processor : +** Version : +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20230602- --V1.0-- --mingyea--- --修改-- + +** #########################################################################*/ + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ +#include "rmu.h" +#include "nvm.h" + +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- S T A T I C V A R I A B L E S +----------------------------------------------------------------------------*/ +#if RMU_DEBUG_EN == 1u + u8 g_rmu_flag[4] ={0u}; //MEMORY_MAP_RAM_FLAG_NOINIT +#endif + +/*--------------------------------------------------------------------------- +* G L O B A L V A R I A B L E S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ + + + + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : 初始化 +----------------------------------------------------------------------------*/ +void rmu_init(void) +{ + u8 l_result =0u; + #if 0 + if(FL_RMU_IsActiveFlag_PRCN(RMU) == 1u) + { + FL_RMU_ClearFlag_PRCN(RMU); + g_rmu_flag[0]++; + } + if(FL_RMU_IsActiveFlag_PORN(RMU) == 1u) + { + FL_RMU_ClearFlag_PORN(RMU); + g_rmu_flag[1]++; + } + if(FL_RMU_IsActiveFlag_PDRN(RMU) == 1u) + { + FL_RMU_ClearFlag_PDRN(RMU); + g_rmu_flag[2]++; + } + #else + if(FL_RMU_IsActiveFlag_PRCN(RMU) == 1u) + { + FL_RMU_ClearFlag_PRCN(RMU); + l_result=1u; + #if RMU_DEBUG_EN == 1u + g_rmu_flag[0]++; + #endif + } + if(FL_RMU_IsActiveFlag_PORN(RMU) == 1u) + { + FL_RMU_ClearFlag_PORN(RMU); + l_result=2u; + #if RMU_DEBUG_EN == 1u + g_rmu_flag[1]++; + #endif + } + if(FL_RMU_IsActiveFlag_PDRN(RMU) == 1u) + { + FL_RMU_ClearFlag_PDRN(RMU); + l_result=3u; + #if RMU_DEBUG_EN == 1u + g_rmu_flag[2]++; + #endif + } + if( l_result != 0u ) + { + //can_app_clear_bcml_nm_type_logic(); + //can_nm_dir_clear_flag(); + #ifdef NVM_EEPROM_EXT_EN + eeprom_ext_clear_flag(); + #endif + } + #endif + + //FL_RMU_PDR_Enable(RMU); + //FL_RMU_PDR_Disable(RMU); + + //FL_RMU_BOR_SetThreshold(RMU,FL_RMU_BOR_THRESHOLD_2P40V); + //FL_RMU_BOR_Enable(RMU); +} + +#if RMU_DEBUG_EN == 1u +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +----------------------------------------------------------------------------*/ +u8 rmu_get_value(u8 id) +{ + return g_rmu_flag[id]; +} + +#endif + + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +----------------------------------------------------------------------------*/ +void rmu_task(void) +{ + +} + + diff --git a/code_boot_out/asil/bsp/rmu.h b/code_boot_out/asil/bsp/rmu.h new file mode 100644 index 0000000..ef19b7f --- /dev/null +++ b/code_boot_out/asil/bsp/rmu.h @@ -0,0 +1,59 @@ +/** ########################################################################## +** Filename : +** Project : +** Module : +** Processor : +** Version : +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20230602- --V1.0-- --mingyea--- --޸-- + +** #########################################################################*/ +#ifndef RMU_H__ +#define RMU_H__ + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ +#include "common_types.h" +#include "fm33lg0xx_fl.h" + +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- G L O B A L V A R I A B L E S +- only configuration table allowed here,variables are not allowed! +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ + +void rmu_init(void); +void rmu_task(void); +u8 rmu_get_value(u8 id); + + +#endif diff --git a/code_boot_out/asil/bsp/rmu_cfg.c b/code_boot_out/asil/bsp/rmu_cfg.c new file mode 100644 index 0000000..4b5894a --- /dev/null +++ b/code_boot_out/asil/bsp/rmu_cfg.c @@ -0,0 +1,61 @@ +/** ########################################################################## +** Filename : +** Project : +** Module : +** Processor : +** Version : +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20230602- --V1.0-- --mingyea--- --޸-- + +** #########################################################################*/ + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ +#include "common_types.h" +#include "common_cfg.h" +#include "rmu.h" + +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ + + + +/*--------------------------------------------------------------------------- +- S T A T I C V A R I A B L E S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +* G L O B A L V A R I A B L E S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ + + + diff --git a/code_boot_out/asil/bsp/rmu_cfg.h b/code_boot_out/asil/bsp/rmu_cfg.h new file mode 100644 index 0000000..773afb9 --- /dev/null +++ b/code_boot_out/asil/bsp/rmu_cfg.h @@ -0,0 +1,60 @@ +/** ########################################################################## +** Filename : +** Project : +** Module : +** Processor : +** Version : +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20230602- --V1.0-- --mingyea--- --修改-- + +** #########################################################################*/ +#ifndef RMU_CFG_H__ +#define RMU_CFG_H__ + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ +#include "fm33lg0xx_fl.h" + +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ +#define RMU_DEBUG_EN 0u + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- G L O B A L V A R I A B L E S +- only configuration table allowed here,variables are not allowed! +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ + + + + + + +#endif diff --git a/code_boot_out/asil/bsp/stack_check.c b/code_boot_out/asil/bsp/stack_check.c new file mode 100644 index 0000000..a9088b7 --- /dev/null +++ b/code_boot_out/asil/bsp/stack_check.c @@ -0,0 +1,215 @@ +/** ########################################################################## +** Filename : +** Project : +** Module : +** Processor : +** Version : +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20230602- --V1.0-- --mingyea--- --修改-- + +** #########################################################################*/ + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ +#include "stack_check.h" +#include "common_memory.h" +//#include "rcm_check.h" + +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ +typedef struct +{ + u8 time_count; + #ifdef STACK_CHECK_DEBUG_EN + u8 test[3]; + #endif +}stack_check_s; + + +/*--------------------------------------------------------------------------- +- S T A T I C V A R I A B L E S +----------------------------------------------------------------------------*/ +MEMORY_MAP_RAM_FLAG_NOINIT stack_check_s g_stack_check ={0u}; + + +/*--------------------------------------------------------------------------- +* G L O B A L V A R I A B L E S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ +volatile u8 g_stack_check_addr[RAM_STACK_CHECK_MAX_LEN] __attribute__((section(".STACK_CHECK_ADDR"))) = +{ + RAM_STACK_CHECK_VALUE_BUF0, + RAM_STACK_CHECK_VALUE_BUF1, + RAM_STACK_CHECK_VALUE_BUF2, + RAM_STACK_CHECK_VALUE_BUF3, + RAM_STACK_CHECK_VALUE_BUF0, + RAM_STACK_CHECK_VALUE_BUF1, + RAM_STACK_CHECK_VALUE_BUF2, + RAM_STACK_CHECK_VALUE_BUF3, + RAM_STACK_CHECK_VALUE_BUF0, + RAM_STACK_CHECK_VALUE_BUF1, + RAM_STACK_CHECK_VALUE_BUF2, + RAM_STACK_CHECK_VALUE_BUF3, + RAM_STACK_CHECK_VALUE_BUF0, + RAM_STACK_CHECK_VALUE_BUF1, + RAM_STACK_CHECK_VALUE_BUF2, + RAM_STACK_CHECK_VALUE_BUF3, +}; + + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ + + + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +----------------------------------------------------------------------------*/ +MEMORY_MAP_ROM_FOR_ASIL void stack_check_init(void) +{ + #if 0 + u8 i; + for(i=0;i=STACK_CHECK_TASK_TIME) + { + g_stack_check.time_count=0u; + if( (g_stack_check_addr[0] == RAM_STACK_CHECK_VALUE_BUF0) + && (g_stack_check_addr[1] == RAM_STACK_CHECK_VALUE_BUF1) + && (g_stack_check_addr[2] == RAM_STACK_CHECK_VALUE_BUF2) + && (g_stack_check_addr[3] == RAM_STACK_CHECK_VALUE_BUF3) + && (g_stack_check_addr[4] == RAM_STACK_CHECK_VALUE_BUF0) + && (g_stack_check_addr[5] == RAM_STACK_CHECK_VALUE_BUF1) + && (g_stack_check_addr[6] == RAM_STACK_CHECK_VALUE_BUF2) + && (g_stack_check_addr[7] == RAM_STACK_CHECK_VALUE_BUF3) + && (g_stack_check_addr[8] == RAM_STACK_CHECK_VALUE_BUF0) + && (g_stack_check_addr[9] == RAM_STACK_CHECK_VALUE_BUF1) + && (g_stack_check_addr[10] == RAM_STACK_CHECK_VALUE_BUF2) + && (g_stack_check_addr[11] == RAM_STACK_CHECK_VALUE_BUF3) + && (g_stack_check_addr[12] == RAM_STACK_CHECK_VALUE_BUF0) + && (g_stack_check_addr[13] == RAM_STACK_CHECK_VALUE_BUF1) + && (g_stack_check_addr[14] == RAM_STACK_CHECK_VALUE_BUF2) + && (g_stack_check_addr[15] == RAM_STACK_CHECK_VALUE_BUF3) + ) + { + #ifdef STACK_CHECK_DEBUG_EN + g_stack_check.test[0]++; + #endif + } + else + { + //执行复位 + #ifdef STACK_CHECK_DEBUG_EN + g_stack_check.test[1]++; + #endif + //rcm_check_set_reset_flag(RCM_LOGIC_FLAG_STACK_CHECK); + SystemSoftwareReset(); + } + } + #endif +} + + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +----------------------------------------------------------------------------*/ +MEMORY_MAP_ROM_FOR_ASIL u8 stack_check_get_test_value(u8 id) +{ + u8 l_temp; + if(id < 3u) + { + #ifdef STACK_CHECK_DEBUG_EN + l_temp = g_stack_check.test[id]; + #else + l_temp = 0; + #endif + } + else + { + l_temp = 0; + } + return l_temp; +} + + diff --git a/code_boot_out/asil/bsp/stack_check.h b/code_boot_out/asil/bsp/stack_check.h new file mode 100644 index 0000000..c695c34 --- /dev/null +++ b/code_boot_out/asil/bsp/stack_check.h @@ -0,0 +1,66 @@ +/** ########################################################################## +** Filename : +** Project : +** Module : +** Processor : +** Version : 1.0 +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20230602- --V1.0-- --mingyea--- --修改-- + +** #########################################################################*/ +#ifndef STACK_CHECK_H__ +#define STACK_CHECK_H__ + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ +#include "common_types.h" +#include "stack_check_cfg.h" + +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- G L O B A L V A R I A B L E S +- only configuration table allowed here,variables are not allowed! +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ + +MEMORY_MAP_ROM_FOR_ASIL void stack_check_init(void); +MEMORY_MAP_ROM_FOR_ASIL void stack_check_task(void); +MEMORY_MAP_ROM_FOR_ASIL u8 stack_check_get_test_value(u8 id); + + + +#endif /* __BOOT_APP_H__ */ + + + + + + diff --git a/code_boot_out/asil/bsp/stack_check_cfg.c b/code_boot_out/asil/bsp/stack_check_cfg.c new file mode 100644 index 0000000..361d778 --- /dev/null +++ b/code_boot_out/asil/bsp/stack_check_cfg.c @@ -0,0 +1,77 @@ +/** ########################################################################## +** Filename : +** Project : +** Module : +** Processor : +** Version : +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20230602- --V1.0-- --mingyea--- --修改-- + +** #########################################################################*/ + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ +#include "stack_check.h" + +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- S T A T I C V A R I A B L E S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +* G L O B A L V A R I A B L E S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ +#if 0 +const MEMORY_MAP_ROM_DATA_FOR_ASIL u8 g_stack_check_fix_value[RAM_STACK_CHECK_MAX_LEN] = +{ + RAM_STACK_CHECK_VALUE_BUF0, + RAM_STACK_CHECK_VALUE_BUF1, + RAM_STACK_CHECK_VALUE_BUF2, + RAM_STACK_CHECK_VALUE_BUF3, + RAM_STACK_CHECK_VALUE_BUF0, + RAM_STACK_CHECK_VALUE_BUF1, + RAM_STACK_CHECK_VALUE_BUF2, + RAM_STACK_CHECK_VALUE_BUF3, + RAM_STACK_CHECK_VALUE_BUF0, + RAM_STACK_CHECK_VALUE_BUF1, + RAM_STACK_CHECK_VALUE_BUF2, + RAM_STACK_CHECK_VALUE_BUF3, + RAM_STACK_CHECK_VALUE_BUF0, + RAM_STACK_CHECK_VALUE_BUF1, + RAM_STACK_CHECK_VALUE_BUF2, + RAM_STACK_CHECK_VALUE_BUF3, +}; + +#endif + + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ diff --git a/code_boot_out/asil/bsp/stack_check_cfg.h b/code_boot_out/asil/bsp/stack_check_cfg.h new file mode 100644 index 0000000..6d77fb0 --- /dev/null +++ b/code_boot_out/asil/bsp/stack_check_cfg.h @@ -0,0 +1,89 @@ +/** ########################################################################## +** Filename : +** Project : +** Module : +** Processor : +** Version : 1.0 +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20191106- --V01-- --LYJ--- --初版-- +** -20230602- --V1.0-- --mingyea--- --修改-- + +** #########################################################################*/ +#ifndef STACK_CHECK_CFG_H__ +#define STACK_CHECK_CFG_H__ + + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ +#include "common_types.h" +#include "cpu.h" +#include "common_cfg.h" + +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ +//#define STACK_CHECK_DEBUG_EN 1 + +#define STACK_CHECK_TIME_UNIT 100 //放在100ms 周期裡面 +#define STACK_CHECK_TASK_TIME (200/STACK_CHECK_TIME_UNIT) + +//预留16字节，检测堆栈是否溢出 +//#define RAM_STACK_CHECK_ADDR (0x20001ec0 -16u) //(m_data_end-__size_cstack__+1u - 16u) + +#define RAM_STACK_CHECK_MAX_LEN 16u +#define RAM_STACK_CHECK_VALUE_BUF0 0x55u +#define RAM_STACK_CHECK_VALUE_BUF1 0x5eu +#define RAM_STACK_CHECK_VALUE_BUF2 0x5cu +#define RAM_STACK_CHECK_VALUE_BUF3 0x4eu + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- G L O B A L V A R I A B L E S +- only configuration table allowed here,variables are not allowed! +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ +//extern const MEMORY_MAP_ROM_DATA_FOR_ASIL u8 g_stack_check_fix_value[RAM_STACK_CHECK_MAX_LEN] ; + + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ + + + + + + + + + + + +#endif /* __BOOT_APP_CFG_H__ */ + + + + + + + diff --git a/code_boot_out/asil/bsp/wdog.c b/code_boot_out/asil/bsp/wdog.c new file mode 100644 index 0000000..7c3dc49 --- /dev/null +++ b/code_boot_out/asil/bsp/wdog.c @@ -0,0 +1,286 @@ +/** ########################################################################## +** Filename : +** Project : +** Module : +** Processor : +** Version : 1.0 +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20230602- --V1.0-- --mingyea--- --修改-- + +** #########################################################################*/ + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ +#include "clk.h" +#include "gpio.h" +#include "queue_entity.h" +#include "logic_timer.h" +#include "wdog.h" +//#include "rcm_check.h" + +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ +typedef struct +{ + u8 state; + u16 count; + #ifdef WDOG_DEBUG_EN + u8 test[3]; + #endif +}wdt_s; + +typedef struct +{ + u16 count; + u32 flag_self_check; +}wdt_check_s; +/*--------------------------------------------------------------------------- +- S T A T I C V A R I A B L E S +----------------------------------------------------------------------------*/ +static wdt_s g_wdt; +static wdt_check_s g_wdt_check; + +/*--------------------------------------------------------------------------- +* G L O B A L V A R I A B L E S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ + + + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +----------------------------------------------------------------------------*/ +void WDT_IRQHandler(void) +{ + if(FL_WWDT_IsActiveFlag_NearOverflow(WWDT)) + { + FL_WWDT_ClearFlag_NearOverflow(WWDT); + FL_WWDT_ReloadCounter(WWDT); + /* LED0_TOG(); */ + return; + } + /* 若程序进入此分支，则表示IWDT中断，请自行处理 */ +} + + +#if WDT_OPERATION_MODE == WDT_OPERATION_NORMAL +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +----------------------------------------------------------------------------*/ +static void iwdt_in_init(void) +{ + FL_IWDT_Init(IWDT, (FL_IWDT_InitTypeDef*)&g_IWDT_InitStruct); + //FL_IWDT_EnableFreezeWhileSleep(IWDT); //在休眠时，冻结 + FL_IWDT_DisableFreezeWhileSleep(IWDT); //在休眠时，不冻结 +} +#endif + +#if WDT_OPERATION_MODE == WDT_OPERATION_WINDOWS +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +----------------------------------------------------------------------------*/ +static void wwdt_in_init(void) +{ + FL_WWDT_Init(WWDT, (FL_WWDT_InitTypeDef*)&g_WWDT_InitStruct); + + NVIC_ClearPendingIRQ(WWDT_IRQn); + NVIC_DisableIRQ(WWDT_IRQn); + NVIC_SetPriority(WWDT_IRQn, NVIC_PRIORITY_WDOG); + NVIC_EnableIRQ(WWDT_IRQn); + + FL_WWDT_ClearFlag_NearOverflow(WWDT); + + /* 开中断 */ + FL_WWDT_EnableIT_NearOverflow(WWDT); +} +#endif + +/*--------------------------------------------------------------------------- +|Prototype : 初始化 +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +----------------------------------------------------------------------------*/ +void wdog_init(void) +{ + //TEST1_ON(); + #if WDT_OPERATION_MODE == WDT_OPERATION_NORMAL + iwdt_in_init(); + #endif + + #if WDT_OPERATION_MODE == WDT_OPERATION_WINDOWS + wwdt_in_init(); + #endif + //TEST1_OFF(); +} + + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +----------------------------------------------------------------------------*/ +void wdog_task(void) +{ + #if 1 + + #if WDT_OPERATION_MODE == WDT_OPERATION_NORMAL + + #if 0//def WDOG_DEBUG_EN + TEST1_TOGGLE(); + g_wdt.test[0]++; + TEST1_TOGGLE(); + g_wdt.test[0]++; + TEST1_TOGGLE(); + g_wdt.test[0]++; + TEST1_TOGGLE(); + #endif + + //if(g_wdt.state == 0u) + { + FL_IWDT_ReloadCounter(IWDT); + } + + #endif + + #endif + +} + + + + +/*--------------------------------------------------------------------------- +|Prototype : 当使用窗口看门狗时的喂狗 +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +----------------------------------------------------------------------------*/ +void wdt_feed_windows(void) +{ + #if 1 + #if WDT_OPERATION_MODE == WDT_OPERATION_WINDOWS + + #if 0//def WDOG_DEBUG_EN + TEST1_TOGGLE(); + g_wdt.test[0]++; + TEST1_TOGGLE(); + g_wdt.test[0]++; + TEST1_TOGGLE(); + g_wdt.test[0]++; + TEST1_TOGGLE(); + #endif + g_wdt_check.count++; + g_wdt.count++; + if(g_wdt.count>=WDT_WINDOWS_TIMEOUT) + { + g_wdt.count=0u; + FL_WWDT_ReloadCounter(WWDT); + } + #ifdef WDT_ENABLE_SELF_CHECK + else if(g_wdt.count >= (WDT_WINDOWS_TIMEOUT/2u)) + { + if(g_wdt_check.flag_self_check != WDT_SELF_CHECK_DATA) + { + g_wdt_check.flag_self_check = WDT_SELF_CHECK_DATA; + FL_WWDT_ReloadCounter(WWDT); + } + } + #endif + + #endif + #endif +} + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +----------------------------------------------------------------------------*/ +void wdt_enable(void) +{ + // +}/* End of function wdt_enable*/ + + +/*--------------------------------------------------------------------------- +|Prototype : 禁 +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +----------------------------------------------------------------------------*/ +void wdt_disable(void) +{ + #if WDT_OPERATION_MODE == WDT_OPERATION_NORMAL + FL_IWDT_DeInit(IWDT); + #endif + + #if WDT_OPERATION_MODE == WDT_OPERATION_WINDOWS + FL_WWDT_DeInit(WWDT); + #endif +} + + + +/*end line*/ diff --git a/code_boot_out/asil/bsp/wdog.h b/code_boot_out/asil/bsp/wdog.h new file mode 100644 index 0000000..7573ea3 --- /dev/null +++ b/code_boot_out/asil/bsp/wdog.h @@ -0,0 +1,69 @@ +/** ########################################################################## +** Filename : +** Project : +** Module : +** Processor : +** Version : 1.0 +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20230602- --V1.0-- --mingyea--- --修改-- + +** #########################################################################*/ +#ifndef WDOG_H__ +#define WDOG_H__ + + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ +#include "common_types.h" +#include "wdog_cfg.h" + +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- G L O B A L V A R I A B L E S +- only configuration table allowed here,variables are not allowed! +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ + +void wdog_init(void); +void wdog_task(void); + +void wdt_feed_windows(void); + +void wdt_enable(void); +void wdt_disable(void); + + +#endif /* __WDOG_APP_H__ */ + + + + + + diff --git a/code_boot_out/asil/bsp/wdog_cfg.c b/code_boot_out/asil/bsp/wdog_cfg.c new file mode 100644 index 0000000..953bb9e --- /dev/null +++ b/code_boot_out/asil/bsp/wdog_cfg.c @@ -0,0 +1,103 @@ +/** ########################################################################## +** Filename : +** Project : +** Module : +** Processor : +** Version : 1.0 +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20230602- --V1.0-- --mingyea--- --修改-- + +** #########################################################################*/ + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ +#include "wdog.h" +#include "logic_timer.h" +#include "gpio.h" + +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ +typedef struct +{ + u16 count[6]; +}wdog_cfg_s; + + +/*--------------------------------------------------------------------------- +- S T A T I C V A R I A B L E S +----------------------------------------------------------------------------*/ +static wdog_cfg_s g_wdog_cfg ={0}; + + +/*--------------------------------------------------------------------------- +* G L O B A L V A R I A B L E S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ +#if WDT_OPERATION_MODE == WDT_OPERATION_NORMAL + +/*! watchdog1 configuration structures */ +const FL_IWDT_InitTypeDef g_IWDT_InitStruct = +{ + FL_IWDT_PERIOD_250MS, /* 最长溢出时间 */ + 0u, /* 默认不使用窗口 */ +}; + +#elif WDT_OPERATION_MODE == WDT_OPERATION_WINDOWS + +/*! watchdog1 configuration structures */ +const FL_WWDT_InitTypeDef g_WWDT_InitStruct = +{ + FL_WWDT_PERIOD_1024CNT, /* 最长溢出时间 */ +}; + + +#endif + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ + + + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +----------------------------------------------------------------------------*/ +void wdog_irq_callback(void *device, uint32_t wpara, uint32_t lpara) +{ + g_wdog_cfg.count[0]++; +} + + + + + + +/*end line*/ diff --git a/code_boot_out/asil/bsp/wdog_cfg.h b/code_boot_out/asil/bsp/wdog_cfg.h new file mode 100644 index 0000000..917374b --- /dev/null +++ b/code_boot_out/asil/bsp/wdog_cfg.h @@ -0,0 +1,123 @@ +/** ########################################################################## +** Filename : +** Project : +** Module : +** Processor : +** Version : 1.0 +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20230602- --V1.0-- --mingyea--- --修改-- + +** #########################################################################*/ +#ifndef WDOG_CFG_H__ +#define WDOG_CFG_H__ + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ +#include "cpu.h" + +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ +//#define WDT_ENABLE_SELF_CHECK 1 /*开启自检*/ +#define WDT_SELF_CHECK_DATA 0x5e715896 + + +#define WDT_TIME_UNIT 1 // 1MS任务里跑 + + +#define WDT_OPERATION_NORMAL 0u +#define WDT_OPERATION_WINDOWS 1u +#define WDT_OPERATION_DISABLE 2u +#define WDT_OPERATION_MODE WDT_OPERATION_NORMAL + +#if 0 +#define WDT_PRE_256_EN 1 // 1开启，256分频 0不开启 --切記不能用枚舉 + +#if 0 //在中断时，0.5ms +#define WDT_CR_VALUE 2u +#define WDT_WINDOWS_TIMEOUT 27u //104 +#else +#define WDT_CR_VALUE (1u/WDT_TIME_UNIT) +#define WDT_WINDOWS_TIMEOUT (14u/WDT_TIME_UNIT) +#endif + +#if WDT_PRE_256_EN == 1 +#define WDT_PRE_256_VALUE ENABLE +#define WDG_CLK_S(n) (APB_BUS_FREQ/256u * n -1u) +#define WDG_CLK_MS(n) ( ((APB_BUS_FREQ/1000u) * n)/256u -1u) +#else +#define WDT_PRE_256_VALUE DISABLE +#define WDG_CLK_S(n) (APB_BUS_FREQ * n -1u) +#define WDG_CLK_MS(n) ( (APB_BUS_FREQ/1000u) * n -1u) +#endif + +#endif + +//#define WDOGx_IRQn WDOG_EWM_IRQn + + +/*! @brief Device instance number */ +#define INST_WATCHDOG1 0U + +#if WDT_OPERATION_MODE == WDT_OPERATION_NORMAL + +/*! watchdog1 configuration structures */ +extern const FL_IWDT_InitTypeDef g_IWDT_InitStruct ; + +#elif WDT_OPERATION_MODE == WDT_OPERATION_WINDOWS + +/*! watchdog1 configuration structures */ +extern const FL_WWDT_InitTypeDef g_WWDT_InitStruct ; + +#endif + +/*#define WWDG_INTERRUPT_ENABLE 1 */ /*使能中斷*/ + +//#define WDOG_DEBUG_EN 0u //测试宏 + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ + + + +/*--------------------------------------------------------------------------- +- G L O B A L V A R I A B L E S +- only configuration table allowed here,variables are not allowed! +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ + + +void wdog_irq_task(void); + + + + + +#endif /* __WDOG_APP_CFG_H__ */ + + + + + + diff --git a/code_boot_out/asil/middle/autosar_bl/cfg/bl_adapter_cfg.h b/code_boot_out/asil/middle/autosar_bl/cfg/bl_adapter_cfg.h new file mode 100644 index 0000000..1be4f9c --- /dev/null +++ b/code_boot_out/asil/middle/autosar_bl/cfg/bl_adapter_cfg.h @@ -0,0 +1,80 @@ +/**************************************************************************//** + * + * \copyright This software is the property of Technologies. Any + * information contained in this doc should not be reproduced, + * or used, or disclosed without the written authorization from + * Technologies. + * + * \brief This is the head file to configurate the adapter module. + * + * \file bl_adapter_cfg.h + * \ingroup communication_adapter_module + * \author + * + * \version 5.1.0 + * \date 27/03/2014 + * + * \par Changelist + * Version | Date | Authors | CR# | Descriptions + * -------- | ---------- | ---------------- | --- | ------------ + * 03.00.00 | 12/09/2011 | mingqing.tang | N/A | Boot030001 + * 03.02.00 | 27/09/2011 | mingqing.tang | N/A | Boot030003 + * 03.03.00 | 29/09/2011 | mingqing.tang | N/A | Boot030004 + * 03.05.00 | 12/10/2011 | mingqing.tang | N/A | Boot030006 + * 04.00.00 | 10/07/2012 | mingqing.tang | N/A | Boot040001 + * 04.02.00 | 15/07/2012 | mingqing.tang | N/A | Boot040003 + * 04.04.00 | 18/07/2012 | mingqing.tang | N/A | Boot040005 + * 04.06.00 | 31/07/2012 | mingqing.tang | N/A | Boot040007 + * 04.10.00 | 07/08/2012 | mingqing.tang | N/A | Boot040011 + * 04.11.00 | 15/08/2012 | mingqing.tang | N/A | Boot040012 + * 05.00.00 | 19/06/2013 | heli.zhang | N/A | Boot050001 + * 05.01.00 | 27/03/2014 | mingqing.tang | N/A | Boot050002 + * + *****************************************************************************/ +#ifndef _BL_ADAPTER_CFG_H_ +#define _BL_ADAPTER_CFG_H_ +#include "bl_adapter.h" + +/***************************************************************************** + * QAC Suppression + *****************************************************************************/ +/*PRQA S 3210,3447 EOF*/ +/* + * 3210:The global identifier is declared but is not used. + * The g_SecurityDelayInfo is used in the bl_adapter.c file. + * + * MISRA-C:2004 8.8(3447):The identifier has external linkage but this + * declaration is not in a header file. + * The g_SecurityDelayInfo Declarations are in the header file. + * + * + */ + +/***************************************************************************** + * Macro Definitions + *****************************************************************************/ +/** \brief The delay time when the bootloader is startup.*/ +#define ADPT_SECURITY_DELAY_TIME (10000UL) /*ms*/ +/** \brief The attempt count when the bootloader is startup.*/ +#define ADPT_SECURITY_ATTEMPT_COUNT (3u) +/** \brief The position of the delay flag*/ +#define ADPT_SECURITY_DELAY_FLAG_ID BL_ERROR_ID_16BIT +/** \brief The position of the failed count flag.*/ +#define ADPT_SECURITY_FAILED_COUNT_ID BL_ERROR_ID_16BIT + +/***************************************************************************** + * Type Declarations + *****************************************************************************/ + +/***************************************************************************** + * Structure Definitions + *****************************************************************************/ + +/***************************************************************************** + * External Global Variable Declarations + *****************************************************************************/ +/** \brief The delay info of security access. */ +extern const bl_SecurityDelay_t g_SecurityDelayInfo; + +#endif + diff --git a/code_boot_out/asil/middle/autosar_bl/cfg/bl_adapter_funcfg.h b/code_boot_out/asil/middle/autosar_bl/cfg/bl_adapter_funcfg.h new file mode 100644 index 0000000..e944826 --- /dev/null +++ b/code_boot_out/asil/middle/autosar_bl/cfg/bl_adapter_funcfg.h @@ -0,0 +1,58 @@ +/**************************************************************************//** + * + * \copyright This software is the property of Technologies. Any + * information contained in this doc should not be reproduced, + * or used, or disclosed without the written authorization from + * Technologies. + * + * \brief This is the head file to configurate the adapter module. + * + * \file bl_adapter_funcfg.h + * \ingroup communication_adapter_module + * \author + * + * \version 5.1.0 + * \date 27/03/2014 + * + * \par Changelist + * Version | Date | Authors | CR# | Descriptions + * -------- | ---------- | ---------------- | --- | ------------ + * 05.00.00 | 19/06/2013 | mingqing.tang | N/A | Boot050001 + * 05.01.00 | 27/03/2014 | mingqing.tang | N/A | Boot050002 + * + *****************************************************************************/ +#ifndef _BL_ADAPTER_FUNCFG_H_ +#define _BL_ADAPTER_FUNCFG_H_ + +/***************************************************************************** + * Macro Definitions + *****************************************************************************/ +/** \brief The function is used to save the delay flag to DM module.*/ +#define ADPT_FUN_SAVE_DELAY_FLAG BL_FUN_OFF +/** \brief The function is used to sub access count.*/ +#define ADPT_FUN_DELAY_WITH_CONTINUOUS_SEED BL_FUN_ON +/** \brief The function is used for the future.*/ +#define ADPT_FUN_ADVANCED_ATTEMPT_DELAY BL_FUN_OFF +/** \brief The function is used for the future.*/ +#define ADPT_FUN_SUBTRACT_FAILED_COUNT BL_FUN_OFF +/** \brief Process the data when the data is received first.*/ +#define ADPT_FUN_FIRST_DATA_PREPROCESS BL_FUN_OFF +/** \brief Get the integrality from the App.*/ +#define ADPT_FUN_GET_INTEGRALITY_VALUE BL_FUN_OFF +/** \brief Check the compatibility from the App.*/ +#define ADPT_FUN_CHECK_COMPATIBILITY BL_FUN_OFF + +/***************************************************************************** + * Type Declarations + *****************************************************************************/ + +/***************************************************************************** + * Structure Definitions + *****************************************************************************/ + +/***************************************************************************** + * External Global Variable Declarations + *****************************************************************************/ + +#endif + diff --git a/code_boot_out/asil/middle/autosar_bl/cfg/bl_adpt_uds_platform_cfg.h b/code_boot_out/asil/middle/autosar_bl/cfg/bl_adpt_uds_platform_cfg.h new file mode 100644 index 0000000..46831ae --- /dev/null +++ b/code_boot_out/asil/middle/autosar_bl/cfg/bl_adpt_uds_platform_cfg.h @@ -0,0 +1,72 @@ +/**************************************************************************//** + * + * \copyright This software is the property of Technologies. Any + * information contained in this doc should not be reproduced, + * or used, or disclosed without the written authorization from + * Technologies. + * + * \brief This is the head file to configurate the adapter module based + * on uds platform. + * + * \file bl_adpt_uds_platform_cfg.h + * \ingroup communication_protocol_stack_module + * \author + * + * \version 5.1.0 + * \date 27/03/2018 + * + * \par Changelist + * Version | Date | Authors | CR# | Descriptions + * -------- | ---------- | ---------------- | --- | ------------ + * 01.00.00 | 25/03/2018 | xucong | N/A | Boot010001 + * + *****************************************************************************/ +#ifndef _BL_ADPT_UDS_PLATFORM_CFG_H_ +#define _BL_ADPT_UDS_PLATFORM_CFG_H_ + +#include "nvm.h" + +/***************************************************************************** + * Macro Definitions + *****************************************************************************/ +/** \brief the 11 service save the reset flag.*/ +#if 0 //先注釋 +#define ADPT_RESETBYSERVICE_FLAGID (0x01u) +#define ADPT_FINGERPRINT_FLAGID (0x02) +#define ADPT_PROGRAMMING_APP_VALID_FLAGID (0x01u) +#define ADPT_PROGRAMMING_DATE_FLAGID (0x03u) +#define ADPT_PGM_F_ATMP_CNTID (0x03) +#endif + +#define ADPT_SESSION_RESPONSE_LEN (0x04u) //會話模式應答，後面跟着的時間參數； + +#define ADPT_COMMCONTROLTYPE_DATA (0x01u) + +#define ADPT_MAXNUM_OF_BLOCKLENGTH (FLASH_P_BLOCK_SECTOR_SIZES+2u) //(0x3A2u) //(0x402u) //stm32f103ze +#define ADPT_MAXNUM_OF_TRANS_DATA (ADPT_MAXNUM_OF_BLOCKLENGTH - 2u) + +#define ADPT_UDS_TX_HANDLE (0u) +#define ADPT_UDS_TX_TIMEOUT (200000UL) +#define ADPT_UDS_CANFD_TX_TIMEOUT (ADPT_UDS_TX_TIMEOUT) + +#define ADPT_UDS_COMOPS_HANDLE BL_ERROR_ID_16BIT +#define ADPT_UDS_NUMBER_OF_GATEWAY (0x01u) +#define ADPT_UDS_CONVERSION_DATA_LENGTH (0x02u) + +#define ADPT_STAY_IN_BOOT_RESPONSE_HID (0xF5u) +#define ADPT_STAY_IN_BOOT_RESPONSE_LID (0x18u) + +/***************************************************************************** + * Type Declarations + *****************************************************************************/ + +/***************************************************************************** + * Structure Definitions + *****************************************************************************/ + +/***************************************************************************** + * External Global Variable Declarations + *****************************************************************************/ + +#endif + diff --git a/code_boot_out/asil/middle/autosar_bl/cfg/bl_booting_cfg.h b/code_boot_out/asil/middle/autosar_bl/cfg/bl_booting_cfg.h new file mode 100644 index 0000000..1d7dc29 --- /dev/null +++ b/code_boot_out/asil/middle/autosar_bl/cfg/bl_booting_cfg.h @@ -0,0 +1,82 @@ +/**************************************************************************//** + * + * \copyright This software is the property of Technologies. Any + * information contained in this doc should not be reproduced, + * or used, or disclosed without the written authorization from + * Technologies. + * + * \brief This is a head file to configurate the data of the booting + * manager module. + * + * \file bl_booting_cfg.h + * \ingroup booting_manager_module + * \author + * \version 5.1.0 + * \date 27/03/2014 + * + * \par Changelist + * Version | Date | Authors | CR# | Descriptions + * -------- | ---------- | ---------------- | --- | ------------ + * 01.00.00 | 15/03/2010 | hewei.zhang | N/A | Boot010001 + * 01.02.00 | 16/06/2010 | hewei.zhang | N/A | Boot010003 + * 01.03.00 | 18/08/2010 | hewei.zhang | N/A | Boot010004 + * 02.00.00 | 16/05/2011 | mingqing.tang | N/A | Boot020001 + * 02.05.00 | 25/05/2011 | mingqing.tang | N/A | Boot020006 + * 03.00.00 | 15/09/2011 | mingqing.tang | N/A | Boot030001 + * 03.02.00 | 20/10/2011 | mingqing.tang | N/A | Boot030003 + * 05.00.00 | 19/06/2013 | xin.shang | N/A | Boot050001 + * 05.01.00 | 27/03/2014 | mingqing.tang | N/A | Boot050002 + * + *****************************************************************************/ +#ifndef _BL_BOOTING_CFG_H_ +#define _BL_BOOTING_CFG_H_ +#include "bl_booting.h" + +/***************************************************************************** + * QAC Suppression + *****************************************************************************/ +/*PRQA S 3210,3447 EOF*/ +/* + * 3210:The global identifier is declared but is not used. + * The g_BootingCheckerList is used in the bl_booting.c file. + * + * MISRA-C:2004 8.8(3447):The identifier has external linkage but this + * declaration is not in a header file. + * The g_BootingCheckerList is Declared in the header file. + * + */ + +/***************************************************************************** + * Macro Definitions + *****************************************************************************/ +/*the booting configurations*/ +#define BOOTM_NUMBER_OF_BOOTING_CHECKER (2u) + +#define BOOTM_REPROGRAM_FLAG_DID (0u) // ram上的標志。重編程標志 +#define BOOTM_RESET_FLAG_DID (1u) /* app valid id*/ +#if 0 +#define BOOTM_FP_DID (2u) /* pgm fingerprinter id*/ +#define BOOTM_PROG_ATTEMP_CNT_DID (3u) /* pgm f_attmp, success count and PGM date id*/ +#endif +//#define BOOTM_PROGRAM_CNT_DID (2u) + +/***************************************************************************** + * Type Declarations + *****************************************************************************/ + +/***************************************************************************** + * Structure Definitions + *****************************************************************************/ + +/***************************************************************************** + * External Global Variable Declarations + *****************************************************************************/ +/** \brief The booting checker list.*/ +extern const bl_BootingCheckerList_t g_BootingCheckerList; + +/***************************************************************************** + * External Function Prototype Declarations + *****************************************************************************/ + +#endif + diff --git a/code_boot_out/asil/middle/autosar_bl/cfg/bl_can_if_cfg.h b/code_boot_out/asil/middle/autosar_bl/cfg/bl_can_if_cfg.h new file mode 100644 index 0000000..6157693 --- /dev/null +++ b/code_boot_out/asil/middle/autosar_bl/cfg/bl_can_if_cfg.h @@ -0,0 +1,90 @@ +/**************************************************************************//** + * + * \copyright This software is the property of Technologies. Any + * information contained in this doc should not be reproduced, + * or used, or disclosed without the written authorization from + * Technologies. + * + * \brief This is a head file to configurate the can_if module. + * + * \file bl_can_if_cfg.h + * \ingroup flash_if_manager_module + * \author + * + * \version 5.1.0 + * \date 27/03/2014 + * + * \par Changelist + * Version | Date | Authors | CR# | Descriptions + * -------- | ---------- | ---------------- | --- | ------------ + * 02.00.00 | 20/08/2013 | haiping.wang | N/A | Boot020001 + * 05.01.00 | 27/03/2014 | mingqing.tang | N/A | Boot050002 + * +******************************************************************************/ +#ifndef _BL_CAN_IF_CFG_H_ +#define _BL_CAN_IF_CFG_H_ + +#include "can_cfg.h" +#include "bl_can_if.h" + +/***************************************************************************** + * QAC Suppression + *****************************************************************************/ +/*PRQA S 3210,3447 EOF*/ +/* + * 3210:The global identifier is declared but is not used. + * The functions are used in the bl_security_cfg.c file. + * + * MISRA-C:2004 8.8(3447):The identifier has external linkage but this + * declaration is not in a header file. + * The function Declarations are in the header file. + * + */ + +/***************************************************************************** + * Macro Definitions + *****************************************************************************/ +/* define number of transmit and receive pdu*/ +#define CANIFRX_TOTAL_NUM (2) +#define CANIFTX_TOTAL_NUM (1) + +/* define the handle of can channel*/ +#define HANDLE_CAN0_RX0 (0) +#define HANDLE_CAN1_RX0 (1) +#define HANDLE_CAN2_RX0 (2) + +#define HANDLE_CAN0_TX0 (0) +#define HANDLE_CAN0_TX1 (0) +#define HANDLE_CAN0_TX2 (0) + +#define HANDLE_CAN1_TX0 (1) +#define HANDLE_CAN1_TX1 (1) +#define HANDLE_CAN1_TX2 (1) + +#define HANDLE_CAN2_TX0 (2) +#define HANDLE_CAN2_TX1 (2) +#define HANDLE_CAN2_TX2 (2) + +#ifdef CAN_ID_0_EN +#define HANDLE_CAN_RX0 HANDLE_CAN0_RX0 +#define HANDLE_CAN_TX0 HANDLE_CAN0_TX0 +#endif + +#ifdef CAN_ID_1_EN +#define HANDLE_CAN_RX0 HANDLE_CAN1_RX0 +#define HANDLE_CAN_TX0 HANDLE_CAN1_TX0 +#endif + + + +/***************************************************************************** + * External Global Variable Declarations + *****************************************************************************/ +extern const bl_CanIfRxList_t g_CanIfRxPduCfg; +extern const bl_CanIfTxList_t g_CanIfTxPduCfg; +/***************************************************************************** + * External Function Prototype Declarations + *****************************************************************************/ + +#endif + diff --git a/code_boot_out/asil/middle/autosar_bl/cfg/bl_can_if_funcfg.h b/code_boot_out/asil/middle/autosar_bl/cfg/bl_can_if_funcfg.h new file mode 100644 index 0000000..245a3fe --- /dev/null +++ b/code_boot_out/asil/middle/autosar_bl/cfg/bl_can_if_funcfg.h @@ -0,0 +1,58 @@ +/**************************************************************************//** + * + * \copyright This software is the property of Technologies. Any + * information contained in this doc should not be reproduced, + * or used, or disclosed without the written authorization from + * Technologies. + * + * \brief This is a head file to configurate the can_if module. + * + * \file bl_can_if_cfg.h + * \ingroup flash_if_manager_module + * \author + * + * \version 5.2.1 + * \date 27/03/2014 + * + * \par Changelist + * Version | Date | Authors | CR# | Descriptions + * -------- | ---------- | ---------------- | --- | ------------ + * 02.00.00 | 20/08/2013 | haiping.wang | N/A | Boot020001 + * 05.01.00 | 27/03/2014 | mingqing.tang | N/A | Boot050002 + * 05.02.01 | 21/08/2014 | mingqing.tang | N/A | BootSpec050002 + * +******************************************************************************/ +#ifndef _BL_CAN_IF_FUNCFG_H_ +#define _BL_CAN_IF_FUNCFG_H_ + +/***************************************************************************** + * Macro Definitions + *****************************************************************************/ +/** \brief The canid can be set by other module.*/ +#define CANIF_FUN_DYNAMIC_CANID BL_FUN_OFF +/** \brief The can controller is full can.*/ +#define CANIF_FUN_FULL_CAN_CONTROLLER BL_FUN_OFF +/** \brief The can transeciver whether need be initialized.*/ +#define CANIF_FUN_INIT_TRANSCEIVER BL_FUN_ON // Transceiver 的控制 即 第8腳 sb +/** \brief The can IF whether use 29bits id*/ +#define CANIF_FUN_EXTERNED_ID BL_FUN_OFF +/** \brief The number of controller used by can IF module.*/ +//#define CANIF_USED_CONTROLLER_NUM (0x01u) //好像沒用到 CAN_USED_CONTROLLER_NUMBER + +//目的是為了 動態 修改 CANID +#define CANIF_PHY_RX_HANDLE (0x00u) // 相當於 gs_CanIfPduCfg 數組的 bufid 0-1 +#define CANIF_TX_HANDLE (0x00u) // 相當於 gs_CanIfPduCfg 數組的 bufid 2起始 + +#if 0 +#define CANIF_PHY_RX_CANID (0x750UL) +#define CANIF_PHY_TX_CANID (0x758UL) +#define CANIF_FUN_RX_CANID (0x7DFUL) +#else + +#define CANIF_PHY_RX_CANID (bl_u32_t)(0x711) //注意，標準幀也要定義成U32否則，不正常； +#define CANIF_PHY_TX_CANID (bl_u32_t)(0x719) +#define CANIF_FUN_RX_CANID (bl_u32_t)(0x7DF) +#endif + +#endif + diff --git a/code_boot_out/asil/middle/autosar_bl/cfg/bl_can_tp_cfg.h b/code_boot_out/asil/middle/autosar_bl/cfg/bl_can_tp_cfg.h new file mode 100644 index 0000000..8dc4087 --- /dev/null +++ b/code_boot_out/asil/middle/autosar_bl/cfg/bl_can_tp_cfg.h @@ -0,0 +1,72 @@ +/**************************************************************************//** + * + * \copyright This software is the property of Technologies. Any + * information contained in this doc should not be reproduced, + * or used, or disclosed without the written authorization from + * Technologies. + * + * \brief This is a configuration head file of the CAN Transport Protocol + * module. + * + * \file bl_can_tp_cfg.h + * \ingroup cantp_module + * \author + * + * \version 5.1.0 + * \date 27/03/2014 + * + * \par Changelist + * Version | Date | Authors | CR# | Descriptions + * -------- | ---------- | ---------------- | --- | ------------ + * 01.00.00 | 17/03/2010 | rui.guo | N/A | Boot010001 + * 02.00.00 | 21/02/2011 | rui.guo | N/A | Boot020001 + * 05.00.00 | 19/06/2013 | rui.guo | N/A | Boot050001 + * 05.01.00 | 27/03/2014 | mingqing.tang | N/A | Boot050002 + * + *****************************************************************************/ +#ifndef _BL_CAN_TP_CFG_H_ +#define _BL_CAN_TP_CFG_H_ +#include "bl_can_tp.h" + +/***************************************************************************** + * QAC Suppression + *****************************************************************************/ +/*PRQA S 3210,3447 EOF*/ +/* + * 3210:The global identifier is declared but is not used. + * The functions are used in the bl_security_cfg.c file. + * + * MISRA-C:2004 8.8(3447):The identifier has external linkage but this + * declaration is not in a header file. + * The function Declarations are in the header file. + * + */ + +/***************************************************************************** + * Macro Definitions + *****************************************************************************/ +/** \brief The schedule period of the cantp module.*/ +#define CANTP_SCHEDULE_PERIOD (1u) //原來配置 1ms + +/** \brief The number of rx channels of the cantp module.*/ +#define CANTP_NUMBER_OF_RX_CHANNEL (2u) +/** \brief The number of tx channels of the cantp module.*/ +#define CANTP_NUMBER_OF_TX_CHANNEL (1u) + +/***************************************************************************** + * Structure Definitions + *****************************************************************************/ + +/***************************************************************************** + * External Global Variable Declarations + *****************************************************************************/ +extern const bl_CanTpChannelCfg_t g_CanTpRxChnsCfg[CANTP_NUMBER_OF_RX_CHANNEL]; + +extern const bl_CanTpChannelCfg_t g_CanTpTxChnsCfg[CANTP_NUMBER_OF_TX_CHANNEL]; + +/***************************************************************************** + * External Function Prototype Declarations + *****************************************************************************/ + +#endif + diff --git a/code_boot_out/asil/middle/autosar_bl/cfg/bl_can_tp_funcfg.h b/code_boot_out/asil/middle/autosar_bl/cfg/bl_can_tp_funcfg.h new file mode 100644 index 0000000..94da100 --- /dev/null +++ b/code_boot_out/asil/middle/autosar_bl/cfg/bl_can_tp_funcfg.h @@ -0,0 +1,50 @@ +/**************************************************************************//** + * + * \copyright This software is the property of Technologies. Any + * information contained in this doc should not be reproduced, + * or used, or disclosed without the written authorization from + * Technologies. + * + * \brief This is a functional configuration file of the CAN Transport + * Protocol module. + * + * \file bl_can_tp_funcfg.h + * \ingroup cantp_module + * \author + * + * \version 5.1.0 + * \date 27/03/2014 + * + * \par Changelist + * Version | Date | Authors | CR# | Descriptions + * -------- | ---------- | ---------------- | --- | ------------ + * 05.01.00 | 27/03/2014 | mingqing.tang | N/A | Boot050002 + * + *****************************************************************************/ +#ifndef _BL_CAN_TP_FUNCFG_H_ +#define _BL_CAN_TP_FUNCFG_H_ + +/***************************************************************************** + * Macro Definitions + *****************************************************************************/ +/** \brief The frame padding function.*/ +#define CANTP_FUN_FRAME_PADDING BL_FUN_ON //填充功能，剩余的字節 都填充成 值 CANTP_FRAME_PADDING_VALUE + + +/** \brief The frame padding value.*/ +#define CANTP_FRAME_PADDING_VALUE (0xAAu) // 0xaa only used for GL DMS, (0x55u) only for E31 + +/***************************************************************************** + * Structure Definitions + *****************************************************************************/ + +/***************************************************************************** + * External Global Variable Declarations + *****************************************************************************/ + +/***************************************************************************** + * External Function Prototype Declarations + *****************************************************************************/ + +#endif + diff --git a/code_boot_out/asil/middle/autosar_bl/cfg/bl_data_cfg.h b/code_boot_out/asil/middle/autosar_bl/cfg/bl_data_cfg.h new file mode 100644 index 0000000..167f703 --- /dev/null +++ b/code_boot_out/asil/middle/autosar_bl/cfg/bl_data_cfg.h @@ -0,0 +1,133 @@ +/**************************************************************************//** + * + * \copyright This software is the property of Technologies. Any + * information contained in this doc should not be reproduced, + * or used, or disclosed without the written authorization from + * Technologies. + * + * \brief This is a head file to configurate the data of the data manager + * module. + * + * \file bl_data_cfg.h + * \ingroup data_manager_module + * \author + * + * \version 5.1.0 + * \date 27/03/2014 + * + * \par Changelist + * Version | Date | Authors | CR# | Descriptions + * -------- | ---------- | ---------------- | --- | ------------ + * 04.00.00 | 06/03/2013 | xin.shang | N/A | Boot040001 + * 04.02.00 | 11/03/2013 | xin.shang | N/A | Boot040003 + * 04.03.00 | 11/03/2013 | xin.shang | N/A | Boot040004 + * 04.11.00 | 13/03/2013 | xin.shang | N/A | Boot040012 + * 04.13.00 | 15/03/2013 | xin.shang | N/A | Boot040014 + * 04.14.00 | 20/03/2013 | xin.shang | N/A | Boot040015 + * 04.21.00 | 21/03/2013 | xin.shang | N/A | Boot040022 + * 04.31.00 | 04/04/2013 | xin.shang | N/A | Boot040032 + * 05.00.00 | 19/06/2013 | xin.shang | N/A | Boot050001 + * 05.01.00 | 27/03/2014 | mingqing.tang | N/A | Boot050002 + * + *****************************************************************************/ +#ifndef _BL_DATA_CFG_H_ +#define _BL_DATA_CFG_H_ +#include "bl_data.h" +#include "bl_rte_funcfg.h" +#include "boot_app_cfg.h" + +/***************************************************************************** + * QAC Suppression + *****************************************************************************/ +/*PRQA S 3210,3447 EOF*/ +/* + * 3210:The global identifier is declared but is not used. + * The functions are used in the bl_security_cfg.c file. + * + * MISRA-C:2004 8.8(3447):The identifier has external linkage but this + * declaration is not in a header file. + * The function Declarations are in the header file. + * + */ + +/***************************************************************************** + * Macro Definitions + *****************************************************************************/ +/*the memory configurations*/ +#define DM_NUMBER_OF_MANAGED_DATA (2u) +#define DM_NMBr_OF_MANAGED_Data_ID (5u) + +#define DM_DATA_SIZE_SUM (16u) +extern const bl_Buffer_t gs_defaultDataList[DM_DATA_SIZE_SUM] ; + +/** + * 和bl_booting_cfg.h中的宏 相關 + * BOOTM_REPROGRAM_FLAG_DID + * BOOTM_RESET_FLAG_DID + */ + +/*reprogram requirement flag*/ +#define DM_DATA_0_TYPE DM_DATA_TYPE_READ_AND_WRITE +#define DM_DATA_0_MEMID (0) //ram 在 memory 中 的心確是 id=1 +#define DM_DATA_0_LOCAL_ADDR (FLAG_REPROGRAM_ADDR) //RAM中的 3FF8就是重編程的標志所在 //0x20006ffC +#define DM_DATA_0_SIZE (4UL) +#define DM_DATA_0_DDP (&gs_defaultDataList[0]) //0xA5u,0xA5u,0xE5u,0x34u + +/*application valid flag*/ +#define DM_DATA_1_TYPE DM_DATA_TYPE_READ_AND_WRITE +#define DM_DATA_1_MEMID (1) //flash 在 memory 中 的心確是 id=1 +#define DM_DATA_1_LOCAL_ADDR (APP_VALID_FLAG_ADDR) // stm32k144 //0x0007ff00 +#define DM_DATA_1_SIZE (4UL) +#define DM_DATA_1_DDP (&gs_defaultDataList[4]) //0xAAu,0xAAu,0x04u,0xE5u + +/*application valid flag1*/ +#define DM_DATA_2_TYPE DM_DATA_TYPE_READ_AND_WRITE +#define DM_DATA_2_MEMID (1u) +#define DM_DATA_2_LOCAL_ADDR (APP_VALID_FLAG1_ADDR) // 0xFF9FF0 0xFF9C00UL //(0xFFBDF0UL) // (0x00FFBFF0UL) //(0x0003BFF0UL) 0xFFBFFF -app flagµÄµØÖ· +#define DM_DATA_2_SIZE (4UL) /* App valid flag 4->8bytes */ +#define DM_DATA_2_DDP (&gs_defaultDataList[8]) + + +/*app reprogram requirement flag*/ +#define DM_DATA_3_TYPE DM_DATA_TYPE_READ_AND_WRITE +#define DM_DATA_3_MEMID (0u) +#define DM_DATA_3_LOCAL_ADDR (FLAG_JUMP_TO_BOOT_RESPONSE_ADDR) //(0x00001200UL) // 0x00003FF8UL) --±àÒë±êÖ¾ +#define DM_DATA_3_SIZE (4UL) +#define DM_DATA_3_DDP (&gs_defaultDataList[12]) +#if 0 //可以刪除 +/*program fingerprinter data*/ +#define DM_DATA_2_TYPE DM_DATA_TYPE_READ_AND_WRITE +#define DM_DATA_2_MEMID (2u) +#define DM_DATA_2_LOCAL_ADDR (0x00000BE0UL) //EEPROM +#define DM_DATA_2_SIZE (16UL) +#define DM_DATA_2_DDP //(&gs_defaultDataList[20]) + +/*program attemp counter 编程失败重试计数器, program valid counter 编程成功计数器, program PGM DATE 编程指纹计数器4 BCD */ +#define DM_DATA_3_TYPE DM_DATA_TYPE_READ_AND_WRITE +#define DM_DATA_3_MEMID (3u) +#define DM_DATA_3_LOCAL_ADDR (0x00000BF0UL) // EEPROM +#define DM_DATA_3_SIZE (8UL) +#define DM_DATA_3_DDP //(&gs_defaultDataList[24]) + +#endif +#define DM_MAX_DATA_SIZE DM_DATA_1_SIZE + +/***************************************************************************** + * Type Declarations + *****************************************************************************/ + +/***************************************************************************** + * Structure Definitions + *****************************************************************************/ + +/***************************************************************************** + * External Global Variable Declarations + *****************************************************************************/ +/** \brief The data informations list.*/ +extern const bl_DataInfoList_t g_DataInfoList; +/***************************************************************************** + * External Function Prototype Declarations + *****************************************************************************/ + +#endif + diff --git a/code_boot_out/asil/middle/autosar_bl/cfg/bl_dcm_cfg.h b/code_boot_out/asil/middle/autosar_bl/cfg/bl_dcm_cfg.h new file mode 100644 index 0000000..01f6edd --- /dev/null +++ b/code_boot_out/asil/middle/autosar_bl/cfg/bl_dcm_cfg.h @@ -0,0 +1,232 @@ +/**************************************************************************//** + * + * \copyright This software is the property of Technologies. Any + * information contained in this doc should not be reproduced, + * or used, or disclosed without the written authorization from + * Technologies. + * + * \brief This is the head file to configurate the DCM module. + * + * \file bl_dcm_cfg.h + * \ingroup communication_protocol_stack_module + * \author + * + * \version 5.2.0 + * \date 19/06/2014 + * + * \par Changelist + * Version | Date | Authors | CR# | Descriptions + * -------- | ---------- | ---------------- | --- | ------------ + * 01.00.00 | 08/04/2010 | hewei.zhang | N/A | Boot010001 + * 01.02.00 | 19/04/2010 | hewei.zhang | N/A | Boot010003 + * 01.04.00 | 06/05/2010 | hewei.zhang | N/A | Boot010005 + * 02.00.00 | 18/03/2011 | mingqing.tang | N/A | Boot020001 + * 02.01.00 | 31/03/2011 | mingqing.tang | N/A | Boot020002 + * 02.03.00 | 07/04/2011 | mingqing.tang | N/A | Boot020004 + * 03.00.00 | 12/09/2011 | mingqing.tang | N/A | Boot030001 + * 03.05.00 | 11/10/2011 | mingqing.tang | N/A | Boot030006 + * 03.06.00 | 26/10/2011 | mingqing.tang | N/A | Boot030007 + * 04.00.00 | 02/01/2012 | mingqing.tang | N/A | Boot040001 + * 04.02.00 | 16/01/2012 | mingqing.tang | N/A | Boot040003 + * 04.08.00 | 04/04/2012 | mingqing.tang | N/A | Boot040009 + * 05.00.00 | 19/06/2013 | heli.zhang | N/A | Boot050001 + * 05.01.00 | 27/03/2014 | mingqing.tang | N/A | Boot050002 + * 05.02.00 | 19/06/2014 | mingqing.tang | N/A | BootSpec050001 + * + *****************************************************************************/ +#ifndef _BL_DCM_CFG_H_ +#define _BL_DCM_CFG_H_ +#include "bl_dcm.h" +#include "bl_rte_funcfg.h" +#include "bl_system_cfg.h" + +/***************************************************************************** + * QAC Suppression + *****************************************************************************/ +/*PRQA S 3205,3210,3447,3448 EOF*/ +/* + * 3205:The identifier is not used and could be removed. + * The bl_Adapter_t is used by the specifically adapter such as UDS platform in + * the bl_adpt_uds_platform.c + * + * 3210:The global identifier is declared but is not used. + * The functions are used in the bl_security_cfg.c file. + * + * MISRA-C:2004 8.8(3447):The identifier has external linkage but this + * declaration is not in a header file. + * The function Declarations are in the header file. + * + * MISRA-C:2004 5.3(3448):Declaration of typedef is not in a header file. + * The bl_SecurityDelay_t is declared in the header file. + * + */ + +/***************************************************************************** + * Macro Definitions + *****************************************************************************/ + +#define DCM_SERVICE_NUMBER (12) +#define DCM_SA_SEED_REQ (0X01U) +#define DCM_SA_KEY_RSP (0X02U) +#define DCM_SA_SEED_2_REQ (0X05U) +#define DCM_SA_KEY_2_RSP (0X06U) +#define DCM_2ESUBID_NUMBER (6u) +#define DCM_22SUBID_NUMBER (2u+23u) + + +#define DCM_10SUBID_NUMBER (4u) +#define DCM_11SUBID_NUMBER (2u) +#define DCM_22DID_NUMBER (0u) +#define DCM_27SUBID_NUMBER (6u) +#define DCM_28SUBID_NUMBER (3u) +#define DCM_2EDID_NUMBER (1u) +#define DCM_31SUBID_NUMBER (1u) + + +#define DCM_2E_WR_FP_MINLEN (1u) +#define DCM_2E_WR_FP_FLAG (1u) + +#if(RTE_FUN_STAY_IN_BOOT == BL_FUN_ON) +#define DCM_31DID_NUMBER (5u) +#else +#define DCM_31DID_NUMBER (4u) +#endif + +#define DCM_34SUBID_NUMBER (0u) +#define DCM_36SUBID_NUMBER (0u) +#define DCM_37SUBID_NUMBER (0u) +#define DCM_3ESUBID_NUMBER (1u) +#define DCM_85SUBID_NUMBER (2u) + +#define DCM_10SERVICE_MINLEN (2u) +#define DCM_10SUBID_MINLEN (0u) +#define DCM_11SERVICE_MINLEN (2u) +#define DCM_11SUBID_MINLEN (0u) +#define DCM_22SERVICE_MINLEN (3u) +#define DCM_22DID_MINLEN (0u) + +#define DCM_27SERVICE_MINLEN (2u) +#define DCM_2ESERVICE_MINLEN (3u + 1u) + + +#define DCM_27SEED_MINLEN (2u) +#define DCM_27KEY_MINLEN (4u+2u) +#define DCM_27SEED_MAXLEN (6u) //2 +#define DCM_27KEY_MAXLEN (6u) + +#define DCM_2EFINGERPRINT_MINLEN (3u + 20u) +#define DCM_2EPROGRAMDATE_MINLEN (3u + 4u) +#define DCM_2E_F18C_MINLEN (3u + 15u) +#define DCM_2E_F190_MINLEN (3u + 17u) +#define DCM_2E_01A0_MINLEN (3u + 1u) +#define DCM_2E_FE01_MINLEN (3u + 8u) + +#define DCM_2ESERVICE_MAXLEN (3u+20u) + +#define DCM_28SERVICE_MINLEN (3u) +#define DCM_28SUBID_MINLEN (0u) +#define DCM_31SERVICE_MINLEN (4u) +#define DCM_31SUBID_MINLEN (0u) +#define DCM_31CONDITION_MINLEN (0u) +#define DCM_31ERASE_MINLEN (4u + 9u) + +#define DCM_31CHECKSUM_MINLEN (4u + 4u) + +#define DCM_31COMPAT_MINLEN (0u) +#define DCM_31STAYINBOOT_MINLEN (0u) +#define DCM_34SERVICE_MINLEN (1u + 10u) +#define DCM_36SERVICE_MINLEN (3u) +#define DCM_37SERVICE_MINLEN (1u) +#define DCM_3ESERVICE_MINLEN (2u) +#define DCM_3ESUBID_MINLEN (0u) +#define DCM_85SERVICE_MINLEN (2u) +#define DCM_85SUBID_MINLEN (0u) + +#define DCM_10SERVICE_MAXLEN (2u) +#define DCM_11SERVICE_MAXLEN (2u) +#define DCM_22SERVICE_MAXLEN (3u) +#define DCM_27SERVICE_MAXLEN (0u) //原来等于0 是不用判断 +#define DCM_28SERVICE_MAXLEN (3u) + +#define DCM_31SERVICE_MAXLEN (0u) +#define DCM_34SERVICE_MAXLEN (11u) +#define DCM_36SERVICE_MAXLEN (0u) +#define DCM_37SERVICE_MAXLEN (1u) +#define DCM_3ESERVICE_MAXLEN (2u) +#define DCM_85SERVICE_MAXLEN (2u) + +#define DCM_10SUBID_MAXLEN (2u) +#define DCM_11SUBID_MAXLEN (2u) + +#define DCM_10SERVICE_FLAG (0x00000000UL) +#define DCM_10SUBID01_FLAG DCM_MAKE_FLAG(0x33FUL) // | RTE_USER_FLAG_GROUP_1 +#define DCM_10SUBID02_FLAG DCM_MAKE_FLAG(0x300UL | DCM_STATUS_PHYSICAL_REQUEST |DCM_STATUS_FUNCTION_REQUEST| DCM_STATUS_SESSION_EXTENDED | DCM_STATUS_SESSION_PROGRAMMING | DCM_STATUS_SESSION_SUPPLY) //原316 +#define DCM_10SUBID03_FLAG DCM_MAKE_FLAG(0x300UL | DCM_STATUS_PHYSICAL_REQUEST| DCM_STATUS_FUNCTION_REQUEST|DCM_STATUS_SESSION_EXTENDED|DCM_STATUS_SESSION_SUPPLY|DCM_STATUS_SESSION_DEFAULT|DCM_STATUS_SESSION_PROGRAMMING) //原31d +#define DCM_10SUBID04_FLAG DCM_MAKE_FLAG(0x300UL | DCM_STATUS_PHYSICAL_REQUEST| DCM_STATUS_FUNCTION_REQUEST|DCM_STATUS_SESSION_SUPPLY|DCM_STATUS_SESSION_EXTENDED|DCM_STATUS_SESSION_DEFAULT|DCM_STATUS_SESSION_PROGRAMMING) //原31d +#if 0 +#define DCM_11SERVICE_FLAG DCM_MAKE_FLAG(0x337UL) //原31f +#else +#define DCM_11SERVICE_FLAG DCM_MAKE_FLAG(DCM_STATUS_SECURITY_UNLOCK_1 | DCM_STATUS_PHYSICAL_REQUEST| DCM_STATUS_SESSION_SUPPLY|DCM_STATUS_SESSION_EXTENDED|DCM_STATUS_SESSION_PROGRAMMING) //原31f +#endif +#define DCM_11SUBID_FLAG (0x00000000UL) +#define DCM_22SERVICE_FLAG DCM_MAKE_FLAG(0x32FUL) //原31f--不用支持功能寻址 DCM_USE_FOR_BYD +#define DCM_22DID_FLAG (0x00000000UL) +#define DCM_27SERVICE_FLAG DCM_MAKE_FLAG(0x300UL|DCM_STATUS_PHYSICAL_REQUEST|DCM_STATUS_SESSION_PROGRAMMING| DCM_STATUS_SESSION_EXTENDED |DCM_STATUS_SESSION_SUPPLY) //原312 +#define DCM_27SUBIDSEED_FLAG DCM_MAKE_FLAG(0x300UL|DCM_STATUS_PHYSICAL_REQUEST|DCM_STATUS_SESSION_PROGRAMMING | DCM_STATUS_SESSION_EXTENDED | DCM_STATUS_SESSION_EXTENDED) +#define DCM_27SUBIDKEY_FLAG DCM_MAKE_FLAG(0x300UL|DCM_STATUS_PHYSICAL_REQUEST|DCM_STATUS_SESSION_PROGRAMMING | DCM_STATUS_SESSION_EXTENDED) +#define DCM_27SUBIDSEED_FLAG_TEST DCM_MAKE_FLAG(0x300UL|DCM_STATUS_PHYSICAL_REQUEST|DCM_STATUS_SESSION_SUPPLY) +#define DCM_27SUBIDKEY_FLAG_TEST DCM_MAKE_FLAG(0x300UL|DCM_STATUS_PHYSICAL_REQUEST|DCM_STATUS_SESSION_SUPPLY) +#define DCM_28SERVICE_FLAG DCM_MAKE_FLAG(0x300UL|DCM_STATUS_PHYSICAL_REQUEST|DCM_STATUS_FUNCTION_REQUEST|DCM_STATUS_SESSION_EXTENDED) //原31C +#define DCM_28SUBID03_FLAG (0x00000000UL) +#define DCM_28SUBID01_FLAG (0x00000000UL) +#define DCM_28SUBID00_FLAG (0x00000000UL) +#define DCM_2ESERVICE_FLAG DCM_MAKE_FLAG(0x922eUL) //原1216 +#define DCM_2EDID_FLAG (0x00000000UL) +#define DCM_2EDID_FLAG_TEST DCM_MAKE_FLAG(0x922eUL) //原 0216 +#define DCM_31SERVICE_FLAG (0x00000000UL) +#define DCM_31SUBID_FLAG (0x00000000UL) +#define DCM_31CONDITION_FLAG DCM_MAKE_FLAG(0x336UL) //原31c +#define DCM_31ERASE_FLAG DCM_MAKE_FLAG(0x1226UL) //原1216 +#define DCM_31CHECKSUM_FLAG DCM_MAKE_FLAG(0x1226UL) //原1216 +#define DCM_31COMPAT_FLAG DCM_MAKE_FLAG(0x1226UL) //原1216 +#if(RTE_FUN_STAY_IN_BOOT == BL_FUN_ON) +#define DCM_31STAYINBOOT_FLAG DCM_MAKE_FLAG(0x325UL) //原315 +#endif +#define DCM_34SERVICE_FLAG DCM_MAKE_FLAG(0x1222UL) //原1212 +#define DCM_36SERVICE_FLAG DCM_MAKE_FLAG(0x1222UL) //原1212 +#define DCM_37SERVICE_FLAG DCM_MAKE_FLAG(0x1222UL) //原1212 +#define DCM_3ESERVICE_FLAG DCM_MAKE_FLAG(0x33FUL | DCM_STATUS_SECURITY_LOCK_2|DCM_STATUS_SECURITY_UNLOCK_2) //原31f +#define DCM_3ESUBID_FLAG (0x00000000UL) +#define DCM_85SERVICE_FLAG DCM_MAKE_FLAG(0x33CUL | DCM_STATUS_SECURITY_LOCK_2|DCM_STATUS_SECURITY_UNLOCK_2 ) //原31c +#define DCM_85SUBID_FLAG (0x00000000UL) + + +#define DCM_SESSION_SUPPLY_ID 0x60u + +/***************************************************************************** + * Type Declarations + *****************************************************************************/ + +/***************************************************************************** + * Structure Definitions + *****************************************************************************/ + +/***************************************************************************** + * External Global Variable Declarations + *****************************************************************************/ +/** \brief The dcmbuffer info, including recvLen, sendLen and so on.*/ +extern bl_DcmBuffer_t g_DcmBuffer; + +/** \brief The all service list of dcm mudule.*/ +extern const bl_DcmService_t g_DcmServiceList; + +/***************************************************************************** + * External Function Prototype Declarations + *****************************************************************************/ + +///////修改了源码的宏--适合比亚迪 +#define DCM_USE_FOR_BYD + + +#endif + diff --git a/code_boot_out/asil/middle/autosar_bl/cfg/bl_dcm_funcfg.h b/code_boot_out/asil/middle/autosar_bl/cfg/bl_dcm_funcfg.h new file mode 100644 index 0000000..57bf312 --- /dev/null +++ b/code_boot_out/asil/middle/autosar_bl/cfg/bl_dcm_funcfg.h @@ -0,0 +1,61 @@ +/**************************************************************************//** + * + * \copyright This software is the property of Technologies. Any + * information contained in this doc should not be reproduced, + * or used, or disclosed without the written authorization from + * Technologies. + * + * \brief This is the head file to configurate the DCM module. + * + * \file bl_dcm_funcfg.h + * \ingroup communication_protocol_stack_module + * \author + * + * \version 5.1.0 + * \date 27/03/2014 + * + * \par Changelist + * Version | Date | Authors | CR# | Descriptions + * -------- | ---------- | ---------------- | --- | ------------ + * 05.00.00 | 19/06/2013 | heli.zhang | N/A | Boot050001 + * 05.01.00 | 27/03/2014 | mingqing.tang | N/A | Boot050002 + * + *****************************************************************************/ +#ifndef _BL_DCM_FUNCFG_H_ +#define _BL_DCM_FUNCFG_H_ + +#include "nvm.h" + +/***************************************************************************** + * Macro Definitions + *****************************************************************************/ +#define DCM_FUN_SECURITY_ACCESS BL_FUN_ON //進入編程會話時，是否要用安全算法來解鎖 +/*P2 and S3 timer definition.*/ +#define DCM_P2STARTIMER_DIV (10u) /*ISO15765-3*/ +#define DCM_CALL_CYCLE RTE_SYSTEM_SCHEDULE_PERIOD +#define DCM_P2TIMEVALUE (50u) +#define DCM_P2STARTIMEVALUE (5000U) //(2000u/DCM_CALL_CYCLE) //(5000u/DCM_CALL_CYCLE) +#define DCM_S3TIMERVALUE (5000U) ///(5000u/DCM_CALL_CYCLE) + + +#define DCM_BUFFER_SIZE (FLASH_P_BLOCK_SECTOR_SIZES+0x20) //多幀時 的緩存總數--因為 頁大小有0x800 ;原來fe-5ha的值是0x410,s32k144 0x1000 +#define DCM_TX_HANDLE (0) + +/***************************************************************************** + * Type Declarations + *****************************************************************************/ + +/***************************************************************************** + * Structure Definitions + *****************************************************************************/ + +/***************************************************************************** + * External Global Variable Declarations + *****************************************************************************/ + +/***************************************************************************** + * External Function Prototype Declarations + *****************************************************************************/ + +#endif + diff --git a/code_boot_out/asil/middle/autosar_bl/cfg/bl_flash_if_cfg.h b/code_boot_out/asil/middle/autosar_bl/cfg/bl_flash_if_cfg.h new file mode 100644 index 0000000..d669871 --- /dev/null +++ b/code_boot_out/asil/middle/autosar_bl/cfg/bl_flash_if_cfg.h @@ -0,0 +1,92 @@ +/**************************************************************************//** + * + * \copyright This software is the property of Technologies. Any + * information contained in this doc should not be reproduced, + * or used, or disclosed without the written authorization from + * Technologies. + * + * \brief This is a head file to configurate the flash_if manager module. + * + * \file bl_flash_if_cfg.h + * \ingroup flash_if_manager_module + * \author + * + * \version 5.1.0 + * \date 27/03/2014 + * + * \par Changelist + * Version | Date | Authors | CR# | Descriptions + * -------- | ---------- | ---------------- | --- | ------------ + * 02.00.00 | 19/08/2013 | haiping.wang | N/A | Boot020001 + * 05.01.00 | 27/03/2014 | mingqing.tang | N/A | Boot050002 + * +******************************************************************************/ +#ifndef _BL_FLASH_IF_CFG_H_ +#define _BL_FLASH_IF_CFG_H_ +#include "bl_flash_if.h" +#include "nvm.h" +#include "boot_app_cfg.h" + +/***************************************************************************** + * QAC Suppression + *****************************************************************************/ +/*PRQA S 3210,3447,3453 EOF*/ +/* + * 3210:The global identifier is declared but is not used. + * The g_FlashIfBlockList is used in the bl_flash_if.c file. + * + * MISRA-C:2004 8.8(3447):The identifier has external linkage but this + * declaration is not in a header file. + * The g_FlashIfBlockList is declared in the header file. + * + * MISRA-C:2004 19.7(3453):A function could probably be used instead of this + * function-like macro. + * the FLASHIF_CONVERTADDRESS have no side-effect. + * + */ + +/***************************************************************************** + * Macro Definitions + *****************************************************************************/ +/*If there is a different between the logical address and the physical address, + configurate the below macro. The physical is a pointer.*/ +#define FLASHIF_CONVERTADDRESS(logical,physical) ((void)0) + + +/* publish the erase and write time , + if different sector have different time,publish the max one +*/ +#define FLASHIF_SECTOR_ERASETIME (80u) /*unit ms*/ +#define FLASHIF_PAGE_WRITETIME (4u) /*unit ms*/ +/* the max access time ,when time out the hiboot have to send reponse to pc */ +#define FLASHIF_ACCESS_TIMELIMITE 24000 // (12000UL) /*unit ms*/ + +/* define the physical flash block num*/ +#define FLASHIF_ERASED_VALUE (0xffu) + +/* config order :address low-high*/ +/* config block 0 parameter - 0x10000-0x3FFFF */ +#define FLASHIF_BLOCK0_STARTADDRESS (APP_ADRRESS_START) //s21k144 --0x20000 +#define FLASHIF_BLOCK0_TOTAL_SIZE (FLASH_P_BLOCK_SIZES) //s32k144--0x60000 FLASH_P_BLOCK_SIZES内部己减FLASH_APP_BASE +#define FLASHIF_BLOCK0_SECTOR_SIZE (FLASH_P_BLOCK_SECTOR_SIZES) //s32k 0x1000 +#define FLASHIF_BLOCK0_PAGE_SIZE (FLASH_P_PAGE_SIZES) //s32k 8 + +/***************************************************************************** + * Type Declarations + *****************************************************************************/ + +/***************************************************************************** + * Structure Definitions + *****************************************************************************/ + +/***************************************************************************** + * External Global Variable Declarations + *****************************************************************************/ +extern const bl_FlashIfBlockInfo_t g_FlashIfBlockList[FLASHIF_NUMBER_OF_BLOCK]; + +/***************************************************************************** + * External Function Prototype Declarations + *****************************************************************************/ + +#endif + diff --git a/code_boot_out/asil/middle/autosar_bl/cfg/bl_flash_if_funcfg.h b/code_boot_out/asil/middle/autosar_bl/cfg/bl_flash_if_funcfg.h new file mode 100644 index 0000000..b76fd73 --- /dev/null +++ b/code_boot_out/asil/middle/autosar_bl/cfg/bl_flash_if_funcfg.h @@ -0,0 +1,65 @@ +/**************************************************************************//** + * + * \copyright This software is the property of Technologies. Any + * information contained in this doc should not be reproduced, + * or used, or disclosed without the written authorization from + * Technologies. + * + * \brief This is a head file to configurate the flash_if manager module. + * + * \file bl_flash_if_cfg.h + * \ingroup flash_if_manager_module + * \author + * + * \version 5.1.0 + * \date 27/03/2014 + * + * \par Changelist + * Version | Date | Authors | CR# | Descriptions + * -------- | ---------- | ---------------- | --- | ------------ + * 02.00.00 | 19/08/2013 | haiping.wang | N/A | Boot020001 + * 05.01.00 | 27/03/2014 | mingqing.tang | N/A | Boot050002 + * +******************************************************************************/ +#ifndef _BL_FLASH_IF_FUNCFG_H_ +#define _BL_FLASH_IF_FUNCFG_H_ + +#include "boot_app_cfg.h" + +/***************************************************************************** + * Macro Definitions + *****************************************************************************/ +/** \brief If a flash driver is erased by physical block id, enable it.*/ +#define FLASHIF_FUN_ERASE_BY_BLOCKID BL_FUN_OFF +/** \brief If a flash is not immediately read, enable it.*/ +#define FLASHIF_FUN_SPECIAL_READ BL_FUN_ON +/** \brief If logical and physical address are different, enable it.*/ +#define FLASHIF_FUN_CONVERT_ADDRESS BL_FUN_OFF + +#define FLASHIF_DRIVER_STARTADDRESS (FLAG_RAM_DRIVER_ADDR) //PRM中 將 RAM_FLASH_DRV 定為3E00-3FEF +//#define FLASHIF_DRIVER_MAGIC_VALUE FLASH_DRIVER_VERSION_MAGIC +//#define FLASHIF_DRIVER_VERSION_VALUE FLASH_DRIVER_VERSION_VERSION + +#define FLASHIF_NUMBER_OF_BLOCK (1u) + +#define FLASHIF_DRIVER_FUN_POS +#define FLASHIF_DRIVER_FUNPTR_POS + +/***************************************************************************** + * Type Declarations + *****************************************************************************/ + +/***************************************************************************** + * Structure Definitions + *****************************************************************************/ + +/***************************************************************************** + * External Global Variable Declarations + *****************************************************************************/ + +/***************************************************************************** + * External Function Prototype Declarations + *****************************************************************************/ + +#endif + diff --git a/code_boot_out/asil/middle/autosar_bl/cfg/bl_logical_block_cfg.h b/code_boot_out/asil/middle/autosar_bl/cfg/bl_logical_block_cfg.h new file mode 100644 index 0000000..8a1c6d2 --- /dev/null +++ b/code_boot_out/asil/middle/autosar_bl/cfg/bl_logical_block_cfg.h @@ -0,0 +1,170 @@ +/**************************************************************************//** + * + * \copyright This software is the property of Technologies. Any + * information contained in this doc should not be reproduced, + * or used, or disclosed without the written authorization from + * Technologies. + * + * \brief This is a head file to configurate the date of the logical + * block manager module. + * + * \file bl_logical_block_cfg.h + * \ingroup lb_manager_module + * \author + * \version 5.1.0 + * \date 27/03/2014 + * + * \par Changelist + * Version | Date | Authors | CR# | Descriptions + * -------- | ---------- | ---------------- | --- | ------------ + * 03.00.00 | 12/09/2011 | mingqing.tang | N/A | Boot030001 + * 03.01.00 | 16/09/2011 | mingqing.tang | N/A | Boot030002 + * 03.02.00 | 23/09/2011 | mingqing.tang | N/A | Boot030003 + * 03.11.00 | 15/02/2012 | mingqing.tang | N/A | Boot030012 + * 04.00.00 | 15/07/2012 | mingqing.tang | N/A | Boot040001 + * 04.01.00 | 15/07/2012 | mingqing.tang | N/A | Boot040002 + * 04.03.00 | 15/07/2012 | mingqing.tang | N/A | Boot040004 + * 04.21.00 | 15/07/2012 | mingqing.tang | N/A | Boot040022 + * 04.30.00 | 10/04/2013 | mingqing.tang | N/A | Boot040031 + * 05.00.00 | 19/06/2013 | mingqing.tang | N/A | Boot030001 + * 05.01.00 | 27/03/2014 | mingqing.tang | N/A | Boot050002 + * + *****************************************************************************/ +#ifndef _BL_LOGICAL_BLOCK_CFG_H_ +#define _BL_LOGICAL_BLOCK_CFG_H_ +#include "bl_logical_block.h" +#include "boot_app_cfg.h" + +/***************************************************************************** + * QAC Suppression + *****************************************************************************/ +/*PRQA S 3205,3210,3447,3448 EOF*/ +/* + * 3205:The identifier is not used and could be removed. + * The bl_Adapter_t is used by the specifically adapter such as UDS platform in + * the bl_adpt_uds_platform.c + * + * 3210:The global identifier is declared but is not used. + * The functions are used in the bl_security_cfg.c file. + * + * MISRA-C:2004 8.8(3447):The identifier has external linkage but this + * declaration is not in a header file. + * The function Declarations are in the header file. + * + * MISRA-C:2004 5.3(3448):Declaration of typedef is not in a header file. + * The bl_SecurityDelay_t is declared in the header file. + * + */ + +/***************************************************************************** + * Macro Definitions + *****************************************************************************/ +#define LBM_LOOKFOR_OFFSET (0UL) //雖然有用到，但是還是缺少了理解; +/** + * the size of a buffer is used to calculate the hash value. + * + * \warning The size must be the n-th power of 2. + */ +#define LBM_HASH_CALCULATION_BUFFER_SIZE (512UL) //緩存，用於 安全算法，或者 校驗 數據--如checksum +#define LBM_HASH_CALCULATION_TIME (8UL) //每幀的 計算時間 +#define LBM_HASH_CALCULATION_TIMEOUT (12000UL) /*ms*/ //總超時-hash計算總超時； + +//这两行是添加的--表示bllock的排序 +#define LBM_LB1_ID_APP 0u +#define LBM_LB1_ID_DRV 1u +#define LBM_LB1_ID_CAL 2u + +#define LBM_NUMBER_OF_LOGICAL_BLOCK (3u) +#define LBM_NUMBER_OF_APPLICATION (1u) +#define LBM_NUMBER_OF_CALDATA (0u) +#define LBM_NUMBER_OF_DRIVER (1u) +#define LBM_NUMBER_OF_VIRTUAL (0u) + + +#define LBM_LB1_TYPE LBM_TYPE_APPLICATION +#define LBM_LB1_INDEX (0u) +#define LBM_LB1_STATUS_PTR (&gs_LogicalBlockStatus[0]) +#define LBM_LB1_MEMID (1u) //flash 在memory 排1 +#define LBM_LB1_GETID_MASK (0x00000000UL) +#define LBM_LB1_WRITE_MASK RTE_SYSFLAG_ERASE_BLOCK //這句沒有看懂，0x04 ；需先理解 RTE_SYSFLAG 等宏 +#define LBM_LB1_ERASE_MASK (0x00000000UL) +#define LBM_LB1_VERIFY_MASK (0x00000000UL) +#define LBM_LB1_ADDRESS (APP_ADRRESS_START) //和芯片有關；的flash app 起始地址 +#define LBM_LB1_SIZE (FLASH_ASW_MAX_ADDR-APP_ADRRESS_START) //--STM32F107VC//為什麼只到BFF0? 因為APP程序 PAGE_0E = READ_ONLY 0x0E8000 TO 0x0EBFEF; +#define LBM_LB1_OFFSET_MASK (0x0FFFFFFFUL) +#define LBM_LB1_VALID_FLAG_ID (0x01u) /* pgm app valid flag ID */ //其實就是 bl_data_cfg.h上的 application valid flag +#define LBM_LB1_FILE_HEADER_ID (0x03u) /* used for PGM DATE ID */ +#define LBM_LB1_FINGERPRINT_ID (0x02u) /* PGM FP DID */ +#define LBM_LB1_SUCCESS_COUNT_ID (0x03u) /* PGM SUCCESS COUNTER DID */ +#define LBM_LB1_ATTEMPT_COUNT_ID (0x03u) /* PGM FAILED ATTMP DID */ +#define LBM_LB1_MAX_ATTEMPT_COUNT 0xFFU // 但是D50工程是 LBM_INVALID_ATTEMPT_COUNT +#define LBM_LB1_SEG_NUMBER (0u) +#define LBM_LB1_SEG_PTR BL_NULL_PTR + +#define LBM_LB2_TYPE LBM_TYPE_DRIVER +#define LBM_LB2_INDEX (0u) //為什麼 是0 ？？ +#define LBM_LB2_STATUS_PTR (&gs_LogicalBlockStatus[1]) +#define LBM_LB2_MEMID (0u) //這和 memeory有關 ，有定義，ram相關的排0 +#define LBM_LB2_GETID_MASK (0x00000000UL) +#define LBM_LB2_WRITE_MASK (0x00000000UL) +#define LBM_LB2_ERASE_MASK (0x00000000UL) +#define LBM_LB2_VERIFY_MASK (0x00000000UL) +#define LBM_LB2_ADDRESS (FLAG_RAM_RE_START_ADDR) +#define LBM_LB2_SIZE (0x00000800UL) //RAM_FLASH_DRV = READ_WRITE 0x3E00 TO 0x3FEF; 好像對不上 +#define LBM_LB2_OFFSET_MASK (0xFFFFFFFFUL) +#define LBM_LB2_VALID_FLAG_ID DM_ERROR_DATAID //表示沒有 +#define LBM_LB2_FILE_HEADER_ID DM_ERROR_DATAID +#define LBM_LB2_FINGERPRINT_ID DM_ERROR_DATAID +#define LBM_LB2_SUCCESS_COUNT_ID DM_ERROR_DATAID +#define LBM_LB2_ATTEMPT_COUNT_ID DM_ERROR_DATAID +#define LBM_LB2_MAX_ATTEMPT_COUNT LBM_INVALID_ATTEMPT_COUNT +#define LBM_LB2_SEG_NUMBER (0u) +#define LBM_LB2_SEG_PTR BL_NULL_PTR + + +#define LBM_LB3_TYPE LBM_TYPE_CALDATA +#define LBM_LB3_INDEX (0u) +#define LBM_LB3_STATUS_PTR (&gs_LogicalBlockStatus[2]) +#define LBM_LB3_MEMID (1u) +#define LBM_LB3_GETID_MASK (0x00000000UL) +#define LBM_LB3_WRITE_MASK RTE_SYSFLAG_ERASE_BLOCK //這句沒有看懂，0x04 ；需先理解 RTE_SYSFLAG 等宏 +#define LBM_LB3_ERASE_MASK (0x00000000UL) +#define LBM_LB3_VERIFY_MASK (0x00000000UL) +#define LBM_LB3_ADDRESS (CAL_ADRRESS_START) //和芯片有關；的flash app 起始地址 +#define LBM_LB3_SIZE (CAL_ADRRESS_LEN) //--STM32F107VC//為什麼只到BFF0? 因為APP程序 PAGE_0E = READ_ONLY 0x0E8000 TO 0x0EBFEF; +#define LBM_LB3_OFFSET_MASK (0x00FFFFFFUL) +#define LBM_LB3_VALID_FLAG_ID (DM_ERROR_DATAID) /* pgm app valid flag ID */ //其實就是 bl_data_cfg.h上的 application valid flag +#define LBM_LB3_FILE_HEADER_ID (0x03u) /* used for PGM DATE ID */ +#define LBM_LB3_FINGERPRINT_ID (0x02u) /* PGM FP DID */ +#define LBM_LB3_SUCCESS_COUNT_ID (0x03u) /* PGM SUCCESS COUNTER DID */ +#define LBM_LB3_ATTEMPT_COUNT_ID (0x03u) /* PGM FAILED ATTMP DID */ +#define LBM_LB3_MAX_ATTEMPT_COUNT 0xFFU // 但是D50工程是 LBM_INVALID_ATTEMPT_COUNT +#define LBM_LB3_SEG_NUMBER (0) +#define LBM_LB3_SEG_PTR BL_NULL_PTR + +/***************************************************************************** + * Type Declarations + *****************************************************************************/ + +/***************************************************************************** + * Structure Definitions + *****************************************************************************/ + +/***************************************************************************** + * External Global Variable Declarations + *****************************************************************************/ +/**************************************************************************//** + * \brief A list of logical blocks. + *****************************************************************************/ +extern const bl_LogicalBlockList_t g_LogicalBlockList; + +/**************************************************************************//** + * \brief the buffer is used to calculate the hash. + *****************************************************************************/ +extern bl_Buffer_t g_HashCalculation[LBM_HASH_CALCULATION_BUFFER_SIZE]; +/***************************************************************************** + * External Function Prototype Declarations + *****************************************************************************/ + +#endif + diff --git a/code_boot_out/asil/middle/autosar_bl/cfg/bl_logical_block_funcfg.h b/code_boot_out/asil/middle/autosar_bl/cfg/bl_logical_block_funcfg.h new file mode 100644 index 0000000..8afe065 --- /dev/null +++ b/code_boot_out/asil/middle/autosar_bl/cfg/bl_logical_block_funcfg.h @@ -0,0 +1,87 @@ +/**************************************************************************//** + * + * \copyright This software is the property of Technologies. Any + * information contained in this doc should not be reproduced, + * or used, or disclosed without the written authorization from + * Technologies. + * + * \brief This is a head file to configurate the functions of the logical + * block manager module. + * + * \file bl_logical_block_funcfg.h + * \ingroup lb_manager_module + * \author + * + * \version 5.1.0 + * \date 27/03/2014 + * + * \par Changelist + * Version | Date | Authors | CR# | Descriptions + * -------- | ---------- | ---------------- | --- | ------------ + * 03.00.00 | 12/09/2011 | mingqing.tang | N/A | Boot030001 + * 03.11.00 | 15/02/2012 | mingqing.tang | N/A | Boot030012 + * 05.00.00 | 19/06/2013 | mingqing.tang | N/A | Boot030001 + * 05.01.00 | 27/03/2014 | mingqing.tang | N/A | Boot050002 + * + *****************************************************************************/ +#ifndef _BL_LOGICAL_BLOCK_FUNCFG_H_ +#define _BL_LOGICAL_BLOCK_FUNCFG_H_ +#include "bl_typedefs.h" +#include "bl_rte_funcfg.h" + +/***************************************************************************** + * QAC Suppression + *****************************************************************************/ +/*PRQA S 3205 EOF*/ +/* + * 3205:The identifier is not used and could be removed. + * + */ + +/***************************************************************************** + * Macro Definitions + *****************************************************************************/ +#define LBM_FUN_ATTEMPT_COUNTER BL_FUN_ON ///BL_FUN_ON +/** enable the counter of success download.*/ +#define LBM_FUN_SUCCESS_COUNTER BL_FUN_ON ///BL_FUN_ON +/** save the fingerprint to the logical block.*/ +#define LBM_FUN_SAVE_FINGERPRINT BL_FUN_ON +#define LBM_FUN_SAVE_PROGRAMMING_DATE BL_FUN_ON + +/** + * when a logical block has been download successfully, its external driver + * is deinitialized. + */ +#define LBM_FUN_AUTO_DRIVER_DEINIT BL_FUN_OFF //不能開啟，因為FLASH DRIVER 是通過 傳輸載入的 +/** + * If a logical block is unreadable(its memory is unreadable), its hash is + * calculated during the data transfer. + */ +#define LBM_FUN_AUTO_CALCULATE_HASH BL_FUN_OFF //不自動計算，而是在36傳輸完再計算 + +#define LBM_ATTEMPT_COUNTER_SIZE (2u) +#define LBM_SUCCESS_COUNTER_SIZE (2u) +/***************************************************************************** + * Type Declarations + *****************************************************************************/ +#if (LBM_ATTEMPT_COUNTER_SIZE == 2u) //進入該選項 +typedef bl_u16_t bl_AttemptCounter_t; /**< a counter for attempt download.*/ +typedef bl_u16_t bl_SuccessCounter_t; /**< a counter for success download.*/ +#else +typedef bl_u8_t bl_AttemptCounter_t; /**< a counter for attempt download.*/ +typedef bl_u8_t bl_SuccessCounter_t; /**< a counter for success download.*/ +#endif +/***************************************************************************** + * Structure Definitions + *****************************************************************************/ + +/***************************************************************************** + * External Global Variable Declarations + *****************************************************************************/ + +/***************************************************************************** + * External Function Prototype Declarations + *****************************************************************************/ + +#endif + diff --git a/code_boot_out/asil/middle/autosar_bl/cfg/bl_memory_cfg.h b/code_boot_out/asil/middle/autosar_bl/cfg/bl_memory_cfg.h new file mode 100644 index 0000000..108c1fd --- /dev/null +++ b/code_boot_out/asil/middle/autosar_bl/cfg/bl_memory_cfg.h @@ -0,0 +1,139 @@ +/**************************************************************************//** + * + * \copyright This software is the property of Technologies. Any + * information contained in this doc should not be reproduced, + * or used, or disclosed without the written authorization from + * Technologies. + * + * \brief This is a head file to configurate the date of the memory + * manager module. + * + * \file bl_memory_cfg.h + * \ingroup memory_manager_module + * \author + * + * + * \version 5.1.0 + * \date 27/03/2014 + * + * \par Changelist + * Version | Date | Authors | CR# | Descriptions + * -------- | ---------- | ---------------- | --- | ------------ + * 01.00.00 | 17/03/2010 | hewei.zhang | N/A | Boot010001 + * 01.01.00 | 20/04/2010 | hewei.zhang | N/A | Boot010002 + * 01.04.00 | 26/06/2010 | hewei.zhang | N/A | Boot010005 + * 02.00.00 | 21/02/2011 | mingqing.tang | N/A | Boot020001 + * 02.02.00 | 15/03/2011 | mingqing.tang | N/A | Boot020003 + * 03.00.00 | 12/09/2011 | mingqing.tang | N/A | Boot030001 + * 03.18.00 | 29/05/2012 | mingqing.tang | N/A | Boot030019 + * 05.00.00 | 19/06/2013 | mingqing.tang | N/A | Boot050001 + * 05.01.00 | 27/03/2014 | mingqing.tang | N/A | Boot050002 + * + *****************************************************************************/ +#ifndef _BL_MEMORY_CFG_H_ +#define _BL_MEMORY_CFG_H_ + +#include "nvm_cfg.h" +#include "bl_memory.h" +#include "boot_app_cfg.h" + +/***************************************************************************** + * QAC Suppression + *****************************************************************************/ +/*PRQA S 3205,3210,3447,3448 EOF*/ +/* + * 3205:The identifier is not used and could be removed. + * The bl_Adapter_t is used by the specifically adapter such as UDS platform in + * the bl_adpt_uds_platform.c + * + * 3210:The global identifier is declared but is not used. + * The functions are used in the bl_security_cfg.c file. + * + * MISRA-C:2004 8.8(3447):The identifier has external linkage but this + * declaration is not in a header file. + * The function Declarations are in the header file. + * + * MISRA-C:2004 5.3(3448):Declaration of typedef is not in a header file. + * The bl_SecurityDelay_t is declared in the header file. + * + */ + +/***************************************************************************** + * Macro Definitions + *****************************************************************************/ +//这两行是添加的，--用于排序 +#define MEM_MEMORY_ID_RAM 0u +#define MEM_MEMORY_ID_FLASH 1u +/*the memory configurations*/ +#define MEM_NUMBER_OF_MEMORY (2u) +#define MEM_NUMBER_OF_OPSLIST (2u) + +#define MEM_MEMORY_0_TYPE MEM_MEMORY_TYPE_RAM +#define MEM_MEMORY_0_INDEX (0u) +#define MEM_MEMORY_0_BASE_ADDRESS (0x20000000UL) //這裡起始地址，按最大容量來算 +#define MEM_MEMORY_0_SIZE (RAM_TOTAL_SIZES) //最大至 0x2000FFFF +#define MEM_MEMORY_0_OPS (&gs_MemoryOps[0]) +#define MEM_MEMORY_0_OPS_INIT BL_NULL_PTR +#define MEM_MEMORY_0_OPS_DEINIT BL_NULL_PTR +#define MEM_MEMORY_0_OPS_WRITE (&Ram_Write) +#define MEM_MEMORY_0_OPS_READ (&Ram_Read) +#define MEM_MEMORY_0_OPS_ERASE BL_NULL_PTR + +#define MEM_MEMORY_1_TYPE (MEM_MEMORY_TYPE_EXTERNAL_DRV \ + | MEM_MEMORY_TYPE_FLASH) //這裡為什麼 要或上外部？？？ +#define MEM_MEMORY_1_INDEX (0) //為什麼這個也是0？？？？？ +#define MEM_MEMORY_1_BASE_ADDRESS (APP_ADRRESS_START) //這裡起始地址，按最大容量來算 +#define MEM_MEMORY_1_SIZE (FLASH_P_BLOCK_SIZES) //--stm32f107VC 最大至0x03bfff 因為03C000開始是boot區的 +#define MEM_MEMORY_1_OPS (&gs_MemoryOps[1]) +#define MEM_MEMORY_1_OPS_INIT (&Flsif_Init) +#define MEM_MEMORY_1_OPS_DEINIT (&Flsif_DeInit) +#define MEM_MEMORY_1_OPS_WRITE (&Flsif_Write) +#define MEM_MEMORY_1_OPS_READ (&Flsif_Read) +#define MEM_MEMORY_1_OPS_ERASE (&Flsif_Erase) + +#if 0 //可以先屏蔽掉，好像D50工程也沒有 +#define MEM_MEMORY_2_TYPE (MEM_MEMORY_TYPE_EXTERNAL_DRV \ + | MEM_MEMORY_TYPE_FLASH) +#define MEM_MEMORY_2_INDEX (0) +#define MEM_MEMORY_2_BASE_ADDRESS (0x00010000UL) +#define MEM_MEMORY_2_SIZE (0x0002C000UL) +#define MEM_MEMORY_2_OPS (&gs_MemoryOps[1]) +#define MEM_MEMORY_2_OPS_INIT (&Flsif_Init) +#define MEM_MEMORY_2_OPS_DEINIT (&Flsif_DeInit) +#define MEM_MEMORY_2_OPS_WRITE (&Flsif_Write) +#define MEM_MEMORY_2_OPS_READ (&Flsif_Read) +#define MEM_MEMORY_2_OPS_ERASE (&Flsif_Erase) + +#define MEM_MEMORY_3_TYPE (MEM_MEMORY_TYPE_EXTERNAL_DRV \ + | MEM_MEMORY_TYPE_FLASH) +#define MEM_MEMORY_3_INDEX (0) +#define MEM_MEMORY_3_BASE_ADDRESS (0x00010000UL) +#define MEM_MEMORY_3_SIZE (0x0002C000UL) +#define MEM_MEMORY_3_OPS (&gs_MemoryOps[1]) +#define MEM_MEMORY_3_OPS_INIT (&Flsif_Init) +#define MEM_MEMORY_3_OPS_DEINIT (&Flsif_DeInit) +#define MEM_MEMORY_3_OPS_WRITE (&Flsif_Write) +#define MEM_MEMORY_3_OPS_READ (&Flsif_Read) +#define MEM_MEMORY_3_OPS_ERASE (&Flsif_Erase) +#endif + +/***************************************************************************** + * Type Declarations + *****************************************************************************/ + +/***************************************************************************** + * Structure Definitions + *****************************************************************************/ + +/***************************************************************************** + * External Global Variable Declarations + *****************************************************************************/ +/** \brief The memory informations list.*/ +extern const bl_MemoryInfoList_t g_MemoryInfoList; + +/***************************************************************************** + * External Function Prototype Declarations + *****************************************************************************/ + +#endif + diff --git a/code_boot_out/asil/middle/autosar_bl/cfg/bl_memory_funcfg.h b/code_boot_out/asil/middle/autosar_bl/cfg/bl_memory_funcfg.h new file mode 100644 index 0000000..ab1644c --- /dev/null +++ b/code_boot_out/asil/middle/autosar_bl/cfg/bl_memory_funcfg.h @@ -0,0 +1,57 @@ +/**************************************************************************//** + * + * \copyright This software is the property of Technologies. Any + * information contained in this doc should not be reproduced, + * or used, or disclosed without the written authorization from + * Technologies. + * + * \brief This is a head file to configurate the functions of the memory + * manager module. + * + * \file bl_memory_funcfg.h + * \ingroup memory_manager_module + * \author + * + * \version 5.1.0 + * \date 27/03/2014 + * + * \par Changelist + * Version | Date | Authors | CR# | Descriptions + * -------- | ---------- | ---------------- | --- | ------------ + * 01.00.00 | 17/03/2010 | hewei.zhang | N/A | Boot010001 + * 01.01.00 | 20/04/2010 | hewei.zhang | N/A | Boot010002 + * 01.04.00 | 26/06/2010 | hewei.zhang | N/A | Boot010005 + * 02.00.00 | 21/02/2011 | mingqing.tang | N/A | Boot020001 + * 02.02.00 | 15/03/2011 | mingqing.tang | N/A | Boot020003 + * 03.00.00 | 12/09/2011 | mingqing.tang | N/A | Boot030001 + * 03.18.00 | 29/05/2012 | mingqing.tang | N/A | Boot030019 + * 05.00.00 | 19/06/2013 | mingqing.tang | N/A | Boot050001 + * 05.01.00 | 27/03/2014 | mingqing.tang | N/A | Boot050002 + * + *****************************************************************************/ +#ifndef _BL_MEMORY_FUNCFG_H_ +#define _BL_MEMORY_FUNCFG_H_ + +/***************************************************************************** + * Macro Definitions + *****************************************************************************/ +#define MEM_MAXSIZE_OF_WRITE_PAGE (8u) + +/***************************************************************************** + * Type Declarations + *****************************************************************************/ + +/***************************************************************************** + * Structure Definitions + *****************************************************************************/ + +/***************************************************************************** + * External Global Variable Declarations + *****************************************************************************/ + +/***************************************************************************** + * External Function Prototype Declarations + *****************************************************************************/ + +#endif + diff --git a/code_boot_out/asil/middle/autosar_bl/cfg/bl_process_driver_cfg.h b/code_boot_out/asil/middle/autosar_bl/cfg/bl_process_driver_cfg.h new file mode 100644 index 0000000..76b0d6c --- /dev/null +++ b/code_boot_out/asil/middle/autosar_bl/cfg/bl_process_driver_cfg.h @@ -0,0 +1,78 @@ +/**************************************************************************//** + * + * \copyright This software is the property of Technologies. Any + * information contained in this doc should not be reproduced, + * or used, or disclosed without the written authorization from + * Technologies. + * + * \brief This is the head file to configurate the process driver module. + * + * \file bl_process_driver_cfg.h + * \ingroup process_driver_module + * \author + * + * \version 5.1.0 + * \date 27/03/2014 + * + * \par Changelist + * Version | Date | Authors | CR# | Descriptions + * -------- | ---------- | ---------------- | --- | ------------ + * 04.00.00 | 12/03/2012 | mingqing.tang | N/A | Boot040001 + * 04.03.00 | 22/03/2012 | mingqing.tang | N/A | Boot040004 + * 04.07.00 | 18/04/2012 | mingqing.tang | N/A | Boot040008 + * 05.00.00 | 19/06/2013 | heli.zhang | N/A | Boot050001 + * 05.01.00 | 27/03/2014 | mingqing.tang | N/A | Boot050002 + * + *****************************************************************************/ +#ifndef _BL_PROCESS_DRIVER_CFG_H_ +#define _BL_PROCESS_DRIVER_CFG_H_ +#include "bl_process_driver.h" + +/***************************************************************************** + * QAC Suppression + *****************************************************************************/ +/*PRQA S 3205,3210,3447,3448 EOF*/ +/* + * 3205:The identifier is not used and could be removed. + * The bl_Adapter_t is used by the specifically adapter such as UDS platform in + * the bl_adpt_uds_platform.c + * + * 3210:The global identifier is declared but is not used. + * The functions are used in the bl_security_cfg.c file. + * + * MISRA-C:2004 8.8(3447):The identifier has external linkage but this + * declaration is not in a header file. + * The function Declarations are in the header file. + * + * MISRA-C:2004 5.3(3448):Declaration of typedef is not in a header file. + * The bl_SecurityDelay_t is declared in the header file. + * + */ + +/***************************************************************************** + * Macro Definitions + *****************************************************************************/ +#define PROC_NUMBER_OF_DRIVER (0x01u) +#define PROC_DEFAULT_DRIVER (0x00u) + +#define PROC_DRIVER_0_TYPE PROC_DRIVER_TYPE_PASSIVE //好像目前没有意義 +#define PROC_DRIVER_0_INDEX (0x00u) +#define PROC_DRIVER_0_ADAPTER (&g_UdsPlatformAdapter) +#define PROC_DRIVER_0_SCHEDULER (&Proc_PassiveSchedule) + +/***************************************************************************** + * Type Declarations + *****************************************************************************/ + +/***************************************************************************** + * Structure Definitions + *****************************************************************************/ + +/***************************************************************************** + * External Global Variable Declarations + *****************************************************************************/ +/** \brief The process driver list, including all process driver info.*/ +extern const bl_ProcessDriverList_t g_ProcessDriverList; + +#endif + diff --git a/code_boot_out/asil/middle/autosar_bl/cfg/bl_rte_cfg.h b/code_boot_out/asil/middle/autosar_bl/cfg/bl_rte_cfg.h new file mode 100644 index 0000000..34d33f5 --- /dev/null +++ b/code_boot_out/asil/middle/autosar_bl/cfg/bl_rte_cfg.h @@ -0,0 +1,135 @@ +/**************************************************************************//** + * + * \copyright This software is the property of Technologies. Any + * information contained in this doc should not be reproduced, + * or used, or disclosed without the written authorization from + * Technologies. + * + * \brief This is a head file to configurate the data of the runtime + * environment module. + * + * \file bl_rte_cfg.h + * \ingroup rte_module + * \author + * + * \version 5.1.0 + * \date 27/03/2014 + * + * \par Changelist + * Version | Date | Authors | CR# | Descriptions + * -------- | ---------- | ---------------- | --- | ------------ + * 01.00.00 | 17/03/2010 | hewei.zhang | N/A | Boot010001 + * 01.01.00 | 20/04/2010 | hewei.zhang | N/A | Boot010002 + * 01.03.00 | 28/05/2010 | hewei.zhang | N/A | Boot010004 + * 01.04.00 | 26/06/2010 | hewei.zhang | N/A | Boot010005 + * 01.08.00 | 24/08/2010 | hewei.zhang | N/A | Boot010009 + * 01.11.00 | 07/12/2010 | hewei.zhang | N/A | Boot010012 + * 02.00.00 | 21/02/2011 | mingqing.tang | N/A | Boot020001 + * 02.02.00 | 15/03/2011 | mingqing.tang | N/A | Boot020003 + * 02.07.00 | 14/06/2011 | mingqing.tang | N/A | Boot020008 + * 03.00.00 | 12/09/2011 | mingqing.tang | N/A | Boot030001 + * 03.03.00 | 17/10/2011 | mingqing.tang | N/A | Boot030004 + * 03.04.00 | 24/10/2011 | mingqing.tang | N/A | Boot030005 + * 03.10.00 | 03/01/2012 | mingqing.tang | N/A | Boot030011 + * 03.12.00 | 18/01/2012 | mingqing.tang | N/A | Boot030013 + * 03.18.00 | 29/05/2012 | mingqing.tang | N/A | Boot030019 + * 05.00.00 | 19/06/2013 | mingqing.tang | N/A | Boot050001 + * 05.01.00 | 27/03/2014 | mingqing.tang | N/A | Boot050002 + * + *****************************************************************************/ +#ifndef _BL_RTE_CFG_H_ +#define _BL_RTE_CFG_H_ +#include "bl_rte.h" +#include "can_cfg.h" + +/***************************************************************************** + * QAC Suppression + *****************************************************************************/ +/*PRQA S 3205,3210,3447,3448 EOF*/ +/* + * 3205:The identifier is not used and could be removed. + * The bl_Adapter_t is used by the specifically adapter such as UDS platform in + * the bl_adpt_uds_platform.c + * + * 3210:The global identifier is declared but is not used. + * The functions are used in the bl_security_cfg.c file. + * + * MISRA-C:2004 8.8(3447):The identifier has external linkage but this + * declaration is not in a header file. + * The function Declarations are in the header file. + * + * MISRA-C:2004 5.3(3448):Declaration of typedef is not in a header file. + * The bl_SecurityDelay_t is declared in the header file. + * + */ + +/***************************************************************************** + * Macro Definitions + *****************************************************************************/ +/** */ +#define RTE_NUMBER_OF_DOWN_SEGMENT (30u) // boot時的 seg 總數，不能超過 +/** */ +#define RTE_NUMBER_OF_BOOTING_PROCESSOR (2u) // boot 過程，，0是 prog 1 是 app valid + +/** If the system sleep is enabled, This macro indicates the sleep time of + * the system sleep. The unit is ms.*/ +#define RTE_SYSTEM_SLEEP_TIME (80000UL) // 休眠時間； + +#if defined CAN_ID_0_FD_EN || defined CAN_ID_1_FD_EN +#define RTE_STAY_IN_BOOT_MSG_SIZE (6u) //收到5個；至少；本項目中的值是 (0x04u),(0x31u),(0x01u),(0xF5u),(0x18u) +#define RTE_STAY_IN_BOOT_TIME (80) //在boot保持時，讀取的次數； +#define RTE_STAY_IN_BOOT_HANDLE (0) //目前没用到 +#define RTE_STAY_IN_BOOT_RESET_TIME (20000UL) //20s 復位 +#define RTE_STAY_IN_BOOT_VALUE (0x00u),(0x04u),(0x31u),(0x01u),(0xF5u),(0x18u) // 給 g_StayInBootValue +#else +#define RTE_STAY_IN_BOOT_MSG_SIZE (5u) //收到5個；至少；本項目中的值是 (0x04u),(0x31u),(0x01u),(0xF5u),(0x18u) +#define RTE_STAY_IN_BOOT_TIME (80) //在boot保持時，讀取的次數； +#define RTE_STAY_IN_BOOT_HANDLE (0) //目前没用到 +#define RTE_STAY_IN_BOOT_RESET_TIME (20000UL) //20s 復位 +#define RTE_STAY_IN_BOOT_VALUE (0x04u),(0x31u),(0x01u),(0xF5u),(0x18u) // 給 g_StayInBootValue +#endif + +#define RTE_WATCHDOG_OPS_INIT (&Wdg_Init) +#define RTE_WATCHDOG_OPS_FEED (&Wdg_Feed) +#define RTE_WATCHDOG_OPS_RESET (&Wdg_FastReset) +#define RTE_WATCHDOG_OPS_DEINIT (&Wdg_Deinit) +#define RTE_SYSTEM_OPS_ISSLEEP BL_NULL_PTR +#define RTE_SYSTEM_OPS_SLEEPCALLBACK (&Rte_Dummy) +#define RTE_SYSTEM_OPS_SYSTEMSLEEP (&Sys_Sleep) +#define RTE_SYSTEM_OPS_WAKEUPCALLBACK (&Wdg_FastReset)/*Reset system*/ +#define RTE_TIMER_OPS_INIT (&Tim_Init) +#define RTE_TIMER_OPS_DEINIT (&Tim_Deinit) +#define RTE_TIMER_OPS_TIMEOUT (&Tim_IsTimeout) +#define RTE_COMIF_OPS_INIT (&Canif_Init) +#define RTE_COMIF_OPS_DEINIT (&Canif_DeInit) +#define RTE_COMIF_OPS_READ (&Canif_TryToRead) +#define RTE_COMIF_OPS_WRITE (&Canif_Write) +#define RTE_COMIF_OPS_ISSUCCWRITE (&Canif_IsWritten) +#define RTE_REPROGRAM_PROCESS (&Adpt_ReprogramValidProcess) +#define RTE_RESET_PROCESS (&Adpt_SystemResetProcess) +#define RTE_STAYINBOOT_PROCESS (&Adpt_AppValidProcess) +/***************************************************************************** + * Type Declarations + *****************************************************************************/ + +/***************************************************************************** + * Structure Definitions + *****************************************************************************/ + +/***************************************************************************** + * External Global Variable Declarations + *****************************************************************************/ +extern const bl_ResetProcessList_t g_ResetProcessList; +#if (RTE_FUN_STAY_IN_BOOT == BL_FUN_ON) +extern const bl_Buffer_t g_StayInBootValue[RTE_STAY_IN_BOOT_MSG_SIZE]; +#endif +extern bl_DownSegment_t g_DownSegment[RTE_NUMBER_OF_DOWN_SEGMENT]; + +extern const bl_EventCallback_t g_EventProcessList[RTE_NUMBER_OF_EVENT]; + +/***************************************************************************** + * External Function Prototype Declarations + *****************************************************************************/ + +#endif + diff --git a/code_boot_out/asil/middle/autosar_bl/cfg/bl_rte_funcfg.h b/code_boot_out/asil/middle/autosar_bl/cfg/bl_rte_funcfg.h new file mode 100644 index 0000000..3359a80 --- /dev/null +++ b/code_boot_out/asil/middle/autosar_bl/cfg/bl_rte_funcfg.h @@ -0,0 +1,108 @@ +/**************************************************************************//** + * + * \copyright This software is the property of Technologies. Any + * information contained in this doc should not be reproduced, + * or used, or disclosed without the written authorization from + * Technologies. + * + * \brief This is a functional head file of the runtime environment + * module. + * + * \file bl_rte_funcfg.h + * \ingroup rte_module + * \author + * + * \version 5.1.0 + * \date 27/03/2014 + * + * \par Changelist + * Version | Date | Authors | CR# | Descriptions + * -------- | ---------- | ---------------- | --- | ------------ + * 01.00.00 | 17/03/2010 | hewei.zhang | N/A | Boot010001 + * 01.01.00 | 20/04/2010 | hewei.zhang | N/A | Boot010002 + * 01.03.00 | 28/05/2010 | hewei.zhang | N/A | Boot010004 + * 01.04.00 | 26/06/2010 | hewei.zhang | N/A | Boot010005 + * 01.08.00 | 24/08/2010 | hewei.zhang | N/A | Boot010009 + * 01.11.00 | 07/12/2010 | hewei.zhang | N/A | Boot010012 + * 02.00.00 | 21/02/2011 | mingqing.tang | N/A | Boot020001 + * 02.02.00 | 15/03/2011 | mingqing.tang | N/A | Boot020003 + * 02.07.00 | 14/06/2011 | mingqing.tang | N/A | Boot020008 + * 03.00.00 | 12/09/2011 | mingqing.tang | N/A | Boot030001 + * 03.03.00 | 17/10/2011 | mingqing.tang | N/A | Boot030004 + * 03.04.00 | 24/10/2011 | mingqing.tang | N/A | Boot030005 + * 03.10.00 | 03/01/2012 | mingqing.tang | N/A | Boot030011 + * 03.12.00 | 18/01/2012 | mingqing.tang | N/A | Boot030013 + * 03.18.00 | 29/05/2012 | mingqing.tang | N/A | Boot030019 + * 05.00.00 | 19/06/2013 | mingqing.tang | N/A | Boot050001 + * 05.01.00 | 27/03/2014 | mingqing.tang | N/A | Boot050002 + * + *****************************************************************************/ +#ifndef _BL_RTE_FUNCFG_H_ +#define _BL_RTE_FUNCFG_H_ + +/***************************************************************************** + * Macro Definitions + *****************************************************************************/ +#define GL_DMS_ONLY + +/** \brief */ +#define RTE_SYSTEM_SECURITY_CLASS BL_SECURITY_CLASS_DDD +/** \brief */ +#define RTE_FUN_STAY_IN_BOOT BL_FUN_ON +/** \brief */ +#define RTE_FUN_STAY_IN_BOOT_RESET BL_FUN_ON +/** \brief */ +#define RTE_FUN_WATCHDOG BL_FUN_ON //記得真正運行--要開回去 +/** \brief */ +#define RTE_FUN_COPY_WDG_TO_RAM BL_FUN_OFF //這宏開啟，-表示 Wdg_Feed 函數己真正 復制到RAM中 +/** \brief */ +#define RTE_FUN_PRE_INIT_WDG BL_FUN_OFF //當前是關閉的 ，在post時再開啟 --為了了兼頋，在跳到app時，的wdog重新初始化；所以該宏不能開 +/** \brief */ +#define RTE_FUN_GATEWAY BL_FUN_OFF +/** \brief */ +#define RTE_FUN_GATEWAY_CONVERSION BL_FUN_OFF +/** \brief */ +#define RTE_FUN_SYSTEM_SLEEP BL_FUN_OFF +/** \brief */ +#define RTE_FUN_ADDITIONAL_SLEEP_CONDITION BL_FUN_OFF +/** \brief */ +#define RTE_FUN_FILE_HEADER_PROCESS BL_FUN_OFF +/** \brief */ +#define RTE_FUN_INTEGRALITY_VALUE_IN_HEADER BL_FUN_OFF +/** \brief */ +#define RTE_FUN_COMPATIBILITY_VALUE_IN_HEADER BL_FUN_OFF +/** \brief */ +#define RTE_FUN_FINGERPRINT BL_FUN_ON///BL_FUN_OFF + +/** \brief */ +#define RTE_SYSTEM_VERSION (0x00050100UL) +/** \brief */ +#define RTE_SYSTEM_SCHEDULE_PERIOD (1u) +//以下4項 只在FE-5HA有，原D50沒有 +#define RTE_FINGERPRINT_SIZE (16UL) +#define RTE_PGM_DATE_SIZE (4UL) +#define RTE_ECU_HW_NUMBER_SIZE (16UL) //APP +#define RTE_BOOT_SW_ID_SIZE (16UL) //APP +#define RTE_F190_VIN_SIZE (17U) //APP + +#define RTE_WATCHDOG_FEED_INTERFACE_ADDR (FLAG_RAM_WDOG_ADDR) +#define RTE_WATCHDOG_FEED_INTERFACE_SIZE (8U) //注意 Wdg_Feed 函數留給8字節長度 + +/***************************************************************************** + * Type Declarations + *****************************************************************************/ + +/***************************************************************************** + * Structure Definitions + *****************************************************************************/ + +/***************************************************************************** + * External Global Variable Declarations + *****************************************************************************/ + +/***************************************************************************** + * External Function Prototype Declarations + *****************************************************************************/ + +#endif + diff --git a/code_boot_out/asil/middle/autosar_bl/cfg/bl_security_cfg.h b/code_boot_out/asil/middle/autosar_bl/cfg/bl_security_cfg.h new file mode 100644 index 0000000..2b90da7 --- /dev/null +++ b/code_boot_out/asil/middle/autosar_bl/cfg/bl_security_cfg.h @@ -0,0 +1,88 @@ +/**************************************************************************//** + * + * \copyright This software is the property of Technologies. Any + * information contained in this doc should not be reproduced, + * used, or disclosed without the written authorization from + * Technologies. + * + * \brief This is a head file to configurate the data of the security + * manager module. + * + * \file bl_security_cfg.h + * \ingroup security_manager_module + * \author + * + * \version 5.1.0 + * \date 27/03/2014 + * + * \par Changelist + * Version | Date | Authors | CR# | Descriptions + * -------- | ---------- | ---------------- | --- | ------------ + * 05.00.00 | 19/06/2013 | xin.shang | N/A | Boot050001 + * 05.01.00 | 27/03/2014 | mingqing.tang | N/A | Boot050002 + * + *****************************************************************************/ +#ifndef _BL_SECURITY_CFG_H_ +#define _BL_SECURITY_CFG_H_ +#include "bl_security.h" + +/***************************************************************************** + * QAC Suppression + *****************************************************************************/ +/*PRQA S 3205,3210,3447,3448 EOF*/ +/* + * 3205:The identifier is not used and could be removed. + * The bl_Adapter_t is used by the specifically adapter such as UDS platform in + * the bl_adpt_uds_platform.c + * + * 3210:The global identifier is declared but is not used. + * The functions are used in the bl_security_cfg.c file. + * + * MISRA-C:2004 8.8(3447):The identifier has external linkage but this + * declaration is not in a header file. + * The function Declarations are in the header file. + * + * MISRA-C:2004 5.3(3448):Declaration of typedef is not in a header file. + * The bl_SecurityDelay_t is declared in the header file. + * + */ + +/***************************************************************************** + * Macro Definitions + *****************************************************************************/ +/*the security configurations*/ + +#define SECM_ACCESS_INIT (&Acc_UdsDemoInit) +#define SECM_ACCESS_MAKE_NEWSEED (&Acc_UdsDemoMakeNewSeed) +#define SECM_ACCESS_GET_SEED (&Acc_UdsDemoGetSeed) +#define SECM_ACCESS_VERIFY_KEY (&Acc_UdsDemoVerifyKey) +//#define SECM_ACCESS_CAL_KEY (&bl_Acc_UdsDemoCalculateKey) + +#define SECM_VERIFICATION_INIT (&Bzip2_Init) +#define SECM_VERIFICATION_START (&Bzip2_Start) +#define SECM_VERIFICATION_UPDATE (&Bzip2_Update) +#define SECM_VERIFICATION_VERIFY (&Bzip2_Verify) + +/***************************************************************************** + * Type Declarations + *****************************************************************************/ + +/***************************************************************************** + * Structure Definitions + *****************************************************************************/ + +/***************************************************************************** + * External Global Variable Declarations + *****************************************************************************/ +/** \brief The access interfaces list.*/ +extern const bl_SecurityAccessOps_t g_SecurityAccessOps; + +/** \brief The integrality interfaces list.*/ +extern const bl_VerificationOps_t g_VerificationOps; + +/***************************************************************************** + * External Function Prototype Declarations + *****************************************************************************/ + +#endif + diff --git a/code_boot_out/asil/middle/autosar_bl/cfg/bl_security_funcfg.h b/code_boot_out/asil/middle/autosar_bl/cfg/bl_security_funcfg.h new file mode 100644 index 0000000..942e8f7 --- /dev/null +++ b/code_boot_out/asil/middle/autosar_bl/cfg/bl_security_funcfg.h @@ -0,0 +1,89 @@ +/**************************************************************************//** + * + * \copyright This software is the property of Technologies. Any + * information contained in this doc should not be reproduced, + * or used, or disclosed without the written authorization from + * Technologies. + * + * \brief This is a head file to configurate the data of the security + * manager module. + * + * \file bl_security_funcfg.h + * \ingroup security_manager_module + * \author + * + * \version 5.1.0 + * \date 27/03/2014 + * + * \par Changelist + * Version | Date | Authors | CR# | Descriptions + * -------- | ---------- | ---------------- | --- | ------------ + * 05.00.00 | 19/06/2013 | xin.shang | N/A | Boot050001 + * 05.01.00 | 27/03/2014 | mingqing.tang | N/A | Boot050002 + * + *****************************************************************************/ +#ifndef _BL_SECURITY_FUNCFG_H_ +#define _BL_SECURITY_FUNCFG_H_ +#include "bl_typedefs.h" + + +#include "bl_rte_funcfg.h" + +/***************************************************************************** + * Macro Definitions + *****************************************************************************/ +/** \brief The security class.*/ +#define SECM_SECURITY_CLASS BL_SECURITY_CLASS_DDD +/** \brief The seed size used for the security access.*/ +#define SECM_ACCESS_SEED_SIZE (0x04u) +/** \brief The key size used for the security access.*/ +#define SECM_ACCESS_KEY_SIZE (0x04u) +/** \brief The CRC algorithm used for class DDD.*/ +#define SECM_FUN_CRC_HASH_ENABLE BL_FUN_ON +/** \brief The HMAC algorithm used for class C or CCC.*/ +#define SECM_FUN_HMAC_HASH_ENABLE BL_FUN_OFF +/** \brief The RSA algorithm used for class CCC.*/ +#define SECM_FUN_RSA_HASH_ENABLE BL_FUN_OFF + +#if (SECM_FUN_CRC_HASH_ENABLE == BL_FUN_ON) +/** \brief The name of the crc algorithm.*/ +#define SECM_CRC_NAME "crc32_bzip2" +/** \brief The bit width of a crc algorithm, 32, 16 or 8.*/ +#define SECM_CRC_WIDTH (32u) +/** \brief The result size(bytes) of a crc algorithm, 4, 2 or 1.*/ +#define SECM_CRC_VALUE_SIZE (SECM_CRC_WIDTH >> 3u) +/** \brief The crc algorithm opimite*/ +#define SECM_CRC_OPIMITE_BY_SIZE BL_FUN_OFF + +#endif + +#if (SECM_FUN_HMAC_HASH_ENABLE == BL_FUN_ON) +#define SECM_HMAC_HASH_ALGORITHM SECM_HASH_SHA1 +#define SECM_HMAC_IN_BLOCK_SIZE (20u) +#define SECM_HMAC_KEY_SIZE (16u) +#define SECM_HMAC_HASH_SIZE (20u) +#endif + +#if (SECM_FUN_RSA_HASH_ENABLE == BL_FUN_ON) +#define SECM_RSA_PUBLIC_KEY_SIZE (1024u) +#define SECM_RSA_SIGNATURE_SIZE (20u) +#endif + +/***************************************************************************** + * Type Declarations + *****************************************************************************/ + +/***************************************************************************** + * Structure Definitions + *****************************************************************************/ + +/***************************************************************************** + * External Global Variable Declarations + *****************************************************************************/ + +/***************************************************************************** + * External Function Prototype Declarations + *****************************************************************************/ + +#endif + diff --git a/code_boot_out/asil/middle/autosar_bl/cfg/bl_system_cfg.h b/code_boot_out/asil/middle/autosar_bl/cfg/bl_system_cfg.h new file mode 100644 index 0000000..4c6135f --- /dev/null +++ b/code_boot_out/asil/middle/autosar_bl/cfg/bl_system_cfg.h @@ -0,0 +1,80 @@ +/**************************************************************************//** + * + * \copyright This software is the property of HiRain Technologies. Any + * information contained in this doc should not be reproduced, + * or used, or disclosed without the written authorization from + * HiRain Technologies. + * + * \brief This is a head file to configurate the data of the security + * manager module. + * + * \file bl_security_funcfg.h + * \ingroup security_manager_module + * \author xin.shang + * + * \version 5.1.0 + * \date 27/03/2014 + * + * \par Changelist + * Version | Date | Authors | CR# | Descriptions + * -------- | ---------- | ---------------- | --- | ------------ + * 05.00.00 | 19/06/2013 | xin.shang | N/A | Boot050001 + * 05.01.00 | 27/03/2014 | mingqing.tang | N/A | Boot050002 + * + *****************************************************************************/ +#ifndef _BL_TEST_H_ +#define _BL_TEST_H_ +#include "bl_typedefs.h" + + +//#define MCU_OSC_IS_4 1 + + +//#define TEST_MEMORY_FLASH 1 +//#define TEST_MEMORY_IN 1 +//#define UDS_DEBUG_EN 1 +//#define FLASH_DRIVER_DEBUG_EN 1 +//#define TEST_GPIO_EN 1 + +//#define MEMORY_DEBUG_EN 1 //MEM 模塊加一些變量 +//#define LOGIC_BLOCK_DEBUG_EN 1 // BLOCK ID 模塊加一些變量 + +//#define BOOT_STATE_PROG_DEBUG_EN 1 //保持在boot prog 會話狀態 仿真 + +//#define FALSH_DRIVER_INIT_EN 1 //在main初始化時，就把 flash ram 初始化 + + +//#define FLASH_DRIVER_IS_BY_RAM 1 //FLASH 驅動，的函數 ，都放在 RAM中， + +//#define FLASH_TEST_ERASE_WRITE 1 //測試擦寫 + +//目前以中斷方式。--不能改 +#define CAN_TX_INTERRUPT_EN 1 // CAN發送中断使能；--则要開啟隊列 +#define CAN_RX_INTERRUPT_EN 1 // CAN接收中断使能；--则要開啟隊列 + +//#define BL_EEPROM_EN 1 // + +#define DEFAULT_GOTO_APP_DEFAULT_SEESION_78 //当跳转到APP前，先只发送78,要在app做逻辑 + +#define FLASH_DRIVER_FAILED_RES_NES_FUNC //当flash driver 加载失败时，即校验出错时 + + +/***************************************************************************** + * Type Declarations + *****************************************************************************/ + +/***************************************************************************** + * Structure Definitions + *****************************************************************************/ + +/***************************************************************************** + * External Global Variable Declarations + *****************************************************************************/ + +/***************************************************************************** + * External Function Prototype Declarations + *****************************************************************************/ + + +#endif + diff --git a/code_boot_out/asil/middle/autosar_bl/inc/bl_access_udsdemo.h b/code_boot_out/asil/middle/autosar_bl/inc/bl_access_udsdemo.h new file mode 100644 index 0000000..704515d --- /dev/null +++ b/code_boot_out/asil/middle/autosar_bl/inc/bl_access_udsdemo.h @@ -0,0 +1,79 @@ +/**************************************************************************//** + * + * \copyright This software is the property of Technologies. Any + * information contained in this doc should not be reproduced, + * or used, or disclosed without the written authorization from + * Technologies. + * + * \brief This is a head file to make seed and verify a key. + * + * \file bl_access_udsdemo.h + * \ingroup security_manager_module + * \author + * + * \version 5.1.0 + * \date 27/03/2018 + * + * \par Changelist + * Version | Date | Authors | CR# | Descriptions + * -------- | ---------- | ---------------- | --- | ------------ + * 01.00.00 | 25/03/2018 | xucong | N/A | Boot010001 + * + *****************************************************************************/ +#ifndef _BL_ACC_UDSDEMO_H_ +#define _BL_ACC_UDSDEMO_H_ +#include "bl_typedefs.h" +/***************************************************************************** + * QAC Suppression + *****************************************************************************/ +/*PRQA S 3210,3447 EOF*/ +/* + * MISRA-C:2004 8.8(3447):The identifier has external linkage but this + * declaration is not in a header file. + * The function Declarations are in the header file. + * + * 3210:The global identifier is declared but is not used. + * The functions are used in the bl_security_cfg.c file. + * + */ + +/***************************************************************************** + * Macro Definitions + *****************************************************************************/ + /* Dcm_SecLevelType */ +#define DCM_SEC_LEV_LOCK (0x01u) +#define DCM_SEC_LEV_L1 (0x02u) +#define DCM_SEC_LEV_L2 (0x04u) +#define DCM_SEC_LEV_L3 (0x08u) +#define DCM_SEC_LEV_L4 (0x10u) +#define DCM_SEC_LEV_L5 (0x20u) +#define DCM_SEC_LEV_L6 (0x40u) +#define DCM_SEC_LEV_L7 (0x80u) +#define DCM_SEC_LEV_ALL (0xffu) + +/***************************************************************************** + * Type Declarations + *****************************************************************************/ + +/***************************************************************************** + * Structure Definitions + *****************************************************************************/ + +/***************************************************************************** + * External Global Variable Declarations + *****************************************************************************/ + +/***************************************************************************** + * External Function Prototype Declarations + *****************************************************************************/ +/** \brief Initialize the demo algorithm used by UDS.*/ +extern void Acc_UdsDemoInit(void); +/** \brief Make a new seed.*/ +extern void Acc_UdsDemoMakeNewSeed(void); +/** \brief Get current seed value.*/ +extern void Acc_UdsDemoGetSeed(bl_Buffer_t *seed); +/** \brief Verify the transmitted key whether is right.*/ +extern bl_Return_t Acc_UdsDemoVerifyKey(const bl_Buffer_t *key); + +#endif + diff --git a/code_boot_out/asil/middle/autosar_bl/inc/bl_adapter.h b/code_boot_out/asil/middle/autosar_bl/inc/bl_adapter.h new file mode 100644 index 0000000..9c78e78 --- /dev/null +++ b/code_boot_out/asil/middle/autosar_bl/inc/bl_adapter.h @@ -0,0 +1,131 @@ +/**************************************************************************//** + * + * \copyright This software is the property of Technologies. Any + * information contained in this doc should not be reproduced, + * or used, or disclosed without the written authorization from + * Technologies. + * + * \brief This is the head file of the adapter module. + * + * \file bl_adapter.h + * \ingroup communication_adapter_module + * \author + * + * \version 5.1.0 + * \date 27/03/2018 + * + * \par Changelist + * Version | Date | Authors | CR# | Descriptions + * -------- | ---------- | ---------------- | --- | ------------ + * 01.00.00 | 25/03/2018 | xucong | N/A | Boot010001 + + * + *****************************************************************************/ +#ifndef _BL_ADAPTER_H_ +#define _BL_ADAPTER_H_ +#include "bl_typedefs.h" +#include "bl_rte.h" +#include "bl_adapter_funcfg.h" + +/***************************************************************************** + * QAC Suppression + *****************************************************************************/ +/*PRQA S 3205,3210,3447,3448 EOF*/ +/* + * 3205:The identifier is not used and could be removed. + * The bl_Adapter_t is used by the specifically adapter such as UDS platform in + * the bl_adpt_uds_platform.c + * + * 3210:The global identifier is declared but is not used. + * + * MISRA-C:2004 8.8(3447):The identifier has external linkage but this + * declaration is not in a header file. + * The function Declarations are in the header file. + * + * MISRA-C:2004 5.3(3448):Declaration of typedef is not in a header file. + * The bl_SecurityDelay_t is declared in the header file. + * + */ + +/***************************************************************************** + * Macro Definitions + *****************************************************************************/ +#define ADPT_SYSTEM_STATUS_MASK (RTE_SYSFLAG_ERASE_BLOCK \ + | RTE_SYSFLAG_WRITE_DATA) + +/***************************************************************************** + * Type Declarations + *****************************************************************************/ +/** \brief A alias of struct _tag_SecurityDelay.*/ +typedef struct _tag_SecurityDelay bl_SecurityDelay_t; +/** \brief A alias of struct _tag_Adapter.*/ +typedef struct _tag_Adapter bl_Adapter_t; + +/***************************************************************************** + * Structure Definitions + *****************************************************************************/ +/** + * \brief This is delay information of security access. it includes delaytime, + * attemptCount and so on. + */ +struct _tag_SecurityDelay +{ + bl_u32_t delayTime; /**< remain delay time*/ + bl_u16_t attemptCount; /**< remain attempt count*/ +#if (ADPT_FUN_SAVE_DELAY_FLAG == BL_FUN_ON) + bl_u16_t delayFlagId; /**< position of delay flag*/ +#endif +#if (ADPT_FUN_ADVANCED_ATTEMPT_DELAY == BL_FUN_ON) + bl_u16_t failedCntFlagId; /**< position of failed count flag*/ +#endif +}; + +/** \brief This is a available adapter.*/ +struct _tag_Adapter +{ + bl_u16_t type; /**< the type of adapter*/ + bl_u16_t index; /**< the index*/ + bl_Return_t (*Init)(void); /**< the initialization interface.*/ + void (*Callback)(void); /**< the callback interface.*/ + void (*PeriodCallback)(void); /**< the period callback interface.*/ + void (*Timeout)(void); /**< the timeout callback interface.*/ + void (*Sleep)(void); /**< the sleep callback interface.*/ +}; + +/***************************************************************************** + * External Global Variable Declarations + *****************************************************************************/ + +/***************************************************************************** + * External Function Prototype Declarations + *****************************************************************************/ +/** \brief Initialize the security access delay info.*/ +extern void Adpt_InitDelayInfo(bl_SecurityDelay_t *delay); +/** \brief Activate download.*/ +extern bl_Return_t Adpt_ActivateDownload(bl_DownContext_t *dct, + bl_Address_t address, + bl_Size_t size); +/** \brief Beginning to download data.*/ +extern bl_Return_t Adpt_DownloadData(bl_DownContext_t *dct, + bl_Address_t address, + bl_Size_t size, + const bl_Buffer_t *buffer); +/** \brief Erase a logical block.*/ +extern bl_Return_t Adpt_EraseLB(bl_DownContext_t *dct, + bl_Address_t address, + bl_Size_t size); +/** \brief Verify checksum value of a logical block.*/ +extern bl_Return_t Adpt_VerifyData(bl_DownContext_t *dct, + bl_Size_t size, + bl_Buffer_t *value); +/** \brief Check compatibility of all downloaded logical block.*/ +extern bl_Return_t Adpt_CheckCompatibility(void); +/** \brief Check whether security access is available.*/ +extern bl_Return_t Adpt_IsAccessible(const bl_SecurityDelay_t *delay); +/** \brief Decrease the attemptcount of security access.*/ +extern bl_u16_t Adpt_DecreaseAttemptCount(bl_SecurityDelay_t *delay); +/** \brief Decrease the delaytime of security access.*/ +extern void Adpt_DelayTimeCallback(bl_SecurityDelay_t *delay); + +#endif + diff --git a/code_boot_out/asil/middle/autosar_bl/inc/bl_adpt_uds_platform.h b/code_boot_out/asil/middle/autosar_bl/inc/bl_adpt_uds_platform.h new file mode 100644 index 0000000..fd9c615 --- /dev/null +++ b/code_boot_out/asil/middle/autosar_bl/inc/bl_adpt_uds_platform.h @@ -0,0 +1,331 @@ +/**************************************************************************//** + * + * \copyright This software is the property of Technologies. Any + * information contained in this doc should not be reproduced, + * or used, or disclosed without the written authorization from + * Technologies. + * + * \brief This is the head file of the adapter module based on uds + * platform. + * + * \file bl_adpt_uds_platform.h + * \ingroup communication_adapter_module + * \author + * + * \version 5.1.0 + * \date 27/03/2018 + * + * \par Changelist + * Version | Date | Authors | CR# | Descriptions + * -------- | ---------- | ---------------- | --- | ------------ + * 01.00.00 | 25/03/2018 | xucong | N/A | Boot010001 + * + *****************************************************************************/ +#ifndef _BL_ADPT_UDS_PLATFORM_H_ +#define _BL_ADPT_UDS_PLATFORM_H_ +#include "bl_typedefs.h" +#include "bl_adapter.h" + +/***************************************************************************** + * QAC Suppression + *****************************************************************************/ +/*PRQA S 3210,3447,4152 EOF*/ +/* + * 3210:The global identifier is declared but is not used. + * The functions are used in the bl_dcm_cfg.c file. + * The g_UdsPlatformAdapter is used in the bl_process_driver_cfg.c file. + * + * MISRA-C:2004 8.8(3447):The identifier has external linkage but this + * declaration is not in a header file. + * The function Declarations are in the header file. + * + * 4152:The identifier may cause confusion. + * Adpt_UdsCallbackGetSeedForLevel1 is LEVEL One. + * Adpt_UdsCallbackVerifyKeyForLevel1 is LEVEL One. + * + */ + +/***************************************************************************** + * Macro Definitions + *****************************************************************************/ + +/***************************************************************************** + * Type Declarations + *****************************************************************************/ + +/***************************************************************************** + * Structure Definitions + *****************************************************************************/ + + + +/***************************************************************************** + * External Global Variable Declarations + *****************************************************************************/ +/** \brief A adapter for uds platform spec*/ +extern const bl_Adapter_t g_UdsPlatformAdapter; +/***************************************************************************** + * External Function Prototype Declarations + *****************************************************************************/ +/** \brief Initialize the uds module.*/ +extern bl_Return_t Adpt_UdsInit(void); +/** \brief Periodic callback of the adapter.*/ +extern void Adpt_UdsPeriodicCallback(void); +/** \brief Callback of the adapter.*/ +extern void Adpt_UdsCallback(void); +/** \brief Callback of default session.*/ +extern bl_ResponseCode_t Adpt_UdsCallback1001(bl_BufferSize_t size, + bl_Buffer_t *buffer, + bl_BufferSize_t *respSize); +/** \brief Callback of programming session.*/ +extern bl_ResponseCode_t Adpt_UdsCallback1002(bl_BufferSize_t size, + bl_Buffer_t *buffer, + bl_BufferSize_t *respSize); +/** \brief Callback of extended session.*/ +extern bl_ResponseCode_t Adpt_UdsCallback1003(bl_BufferSize_t size, + bl_Buffer_t *buffer, + bl_BufferSize_t *respSize); +/** \brief Callback of extended session.*/ +extern bl_ResponseCode_t Adpt_UdsCallback1004(bl_BufferSize_t size, + bl_Buffer_t *buffer, + bl_BufferSize_t *respSize); + +/** \brief Callback of reset.*/ +extern bl_ResponseCode_t Adpt_UdsCallback1101(bl_BufferSize_t size, + bl_Buffer_t *buffer, + bl_BufferSize_t *respSize); +extern bl_ResponseCode_t Adpt_UdsCallback1103(bl_BufferSize_t size, + bl_Buffer_t *buffer, + bl_BufferSize_t *respSize); +/* 22 0200 */ +bl_ResponseCode_t Adpt_UdsCallBackReadPgmSuccCounter(bl_BufferSize_t size, + bl_Buffer_t *buffer, + bl_BufferSize_t *respSize); + +/* 22 0201 */ +bl_ResponseCode_t Adpt_UdsCallBackReadPgmAttmpCounter(bl_BufferSize_t size, + bl_Buffer_t *buffer, + bl_BufferSize_t *respSize); + + +/* 22 F1 80 */ +extern bl_ResponseCode_t Adpt_UdsCallBackReadBootSW_ID(bl_BufferSize_t size, + bl_Buffer_t *buffer, + bl_BufferSize_t *respSize); + +/* 22 F181 */ +bl_ResponseCode_t Adpt_UdsCallBackRead_F181_vmapp_softid_ID(bl_BufferSize_t size, + bl_Buffer_t *buffer, + bl_BufferSize_t *respSize); + +/* 22 F182 */ +bl_ResponseCode_t Adpt_UdsCallBackRead_F182_ecu_calnum(bl_BufferSize_t size, + bl_Buffer_t *buffer, + bl_BufferSize_t *respSize); + +/* 22 F1 86 */ +extern bl_ResponseCode_t Adpt_UdsCallBackReadActiveSession(bl_BufferSize_t size, + bl_Buffer_t *buffer, + bl_BufferSize_t *respSize); + +/* 22 F187 */ +bl_ResponseCode_t Adpt_UdsCallBackReadSparaPartNumber(bl_BufferSize_t size, + bl_Buffer_t *buffer, + bl_BufferSize_t *respSize); +/* 22 F188 */ +bl_ResponseCode_t Adpt_UdsCallBackRead_F188_ECU_SW(bl_BufferSize_t size, + bl_Buffer_t *buffer, + bl_BufferSize_t *respSize); +/* 22 F189 */ +bl_ResponseCode_t Adpt_UdsCallBackReadfe02_count(bl_BufferSize_t size, + bl_Buffer_t *buffer, + bl_BufferSize_t *respSize); + +/* 22 F18A */ +bl_ResponseCode_t Adpt_UdsCallBackRead_f18A_supplier(bl_BufferSize_t size, + bl_Buffer_t *buffer, + bl_BufferSize_t *respSize); + +/* 22 F18B */ +bl_ResponseCode_t Adpt_UdsCallBackRead_f18B_ecu_manu_date(bl_BufferSize_t size, + bl_Buffer_t *buffer, + bl_BufferSize_t *respSize); +/* 22 F18C */ +bl_ResponseCode_t Adpt_UdsCallBackRead_f18C_ecu_sn(bl_BufferSize_t size, + bl_Buffer_t *buffer, + bl_BufferSize_t *respSize); + +/* 22 F190 */ +bl_ResponseCode_t Adpt_UdsCallBackRead_f190_vin(bl_BufferSize_t size, + bl_Buffer_t *buffer, + bl_BufferSize_t *respSize); + +/* 22 F191 */ +bl_ResponseCode_t Adpt_UdsCallBackRead_f191_ecu_hw_num(bl_BufferSize_t size, + bl_Buffer_t *buffer, + bl_BufferSize_t *respSize); +/* 22 F192 */ +bl_ResponseCode_t Adpt_UdsCallBackRead_f192_hw_part_num(bl_BufferSize_t size, + bl_Buffer_t *buffer, + bl_BufferSize_t *respSize); + +/* 22 F1 93 */ +extern bl_ResponseCode_t Adpt_UdsCallBackReadECU_HW_Number(bl_BufferSize_t size, + bl_Buffer_t *buffer, + bl_BufferSize_t *respSize); +/* 22 F194 */ +bl_ResponseCode_t Adpt_UdsCallBackRead_f194_ecu_sw_num(bl_BufferSize_t size, + bl_Buffer_t *buffer, + bl_BufferSize_t *respSize); + +/* 22 F195 */ +bl_ResponseCode_t Adpt_UdsCallBackRead_f195_sw_version_num(bl_BufferSize_t size, + bl_Buffer_t *buffer, + bl_BufferSize_t *respSize); + + +/** \brief Callback of reading fingerprint.*/ +extern bl_ResponseCode_t Adpt_UdsCallBackReadFingerprint(bl_BufferSize_t size, + bl_Buffer_t *buffer, + bl_BufferSize_t *respSize); + +/* 22 F199 */ +bl_ResponseCode_t Adpt_UdsCallBackReadProgrammingDate(bl_BufferSize_t size, + bl_Buffer_t *buffer, + bl_BufferSize_t *respSize); + +/* 22 F19E */ +bl_ResponseCode_t Adpt_UdsCallBackRead_f19E_odx_id(bl_BufferSize_t size, + bl_Buffer_t *buffer, + bl_BufferSize_t *respSize); + + +/* 22 F1F1 */ +bl_ResponseCode_t Adpt_UdsCallBackRead_F1F1_ecu_cal_num(bl_BufferSize_t size, + bl_Buffer_t *buffer, + bl_BufferSize_t *respSize); +/* 22 F1F2*/ +bl_ResponseCode_t Adpt_UdsCallBackRead_F1F2_boot_sw_id(bl_BufferSize_t size, + bl_Buffer_t *buffer, + bl_BufferSize_t *respSize); +/* 22 Fe00*/ +bl_ResponseCode_t Adpt_UdsCallBackRead_01a0_manulifecount(bl_BufferSize_t size, + bl_Buffer_t *buffer, + bl_BufferSize_t *respSize); +/* 22 Fe01*/ +bl_ResponseCode_t Adpt_UdsCallBackRead_FE01_device_id(bl_BufferSize_t size, + bl_Buffer_t *buffer, + bl_BufferSize_t *respSize); + +bl_ResponseCode_t Adpt_UdsCallBackWrite_01a0_manulifecount(bl_BufferSize_t size, + bl_Buffer_t *buffer, + bl_BufferSize_t *respSize); +bl_ResponseCode_t Adpt_UdsCallBackWrite_fe01_backdoo_access_key(bl_BufferSize_t size, + bl_Buffer_t *buffer, + bl_BufferSize_t *respSize); +/** \brief Callback of getting seed.*/ +extern bl_ResponseCode_t Adpt_UdsCallbackGetSeedForLevel1(bl_BufferSize_t size, + bl_Buffer_t *buffer, + bl_BufferSize_t *respSize); +/** \brief Callback of verifying key.*/ +extern bl_ResponseCode_t Adpt_UdsCallbackVerifyKeyForLevel1(bl_BufferSize_t size, + bl_Buffer_t *buffer, + bl_BufferSize_t *respSize); +extern bl_ResponseCode_t Adpt_UdsCallbackGetSeedForLevel5(bl_BufferSize_t size, + bl_Buffer_t *buffer, + bl_BufferSize_t *respSize); + +extern bl_ResponseCode_t Adpt_UdsCallbackVerifyKeyForLevel5(bl_BufferSize_t size, + bl_Buffer_t *buffer, + bl_BufferSize_t *respSize); +/** \brief Callback of getting seed.*/ +extern bl_ResponseCode_t Adpt_UdsCallbackGetSeedForLevel23(bl_BufferSize_t size, + bl_Buffer_t *buffer, + bl_BufferSize_t *respSize); +/** \brief Callback of verifying key.*/ +extern bl_ResponseCode_t Adpt_UdsCallbackVerifyKeyForLevel24(bl_BufferSize_t size, + bl_Buffer_t *buffer, + bl_BufferSize_t *respSize); +/** \brief Callback of enable or disable communication.*/ +extern bl_ResponseCode_t Adpt_UdsCallback28(bl_BufferSize_t size, + bl_Buffer_t *buffer, + bl_BufferSize_t *respSize); +/** \brief Callback of writting fingerprint.*/ +extern bl_ResponseCode_t Adpt_UdsCallBackWriteFingerprint(bl_BufferSize_t size, + bl_Buffer_t *buffer, + bl_BufferSize_t *respSize); +/** \brief Callback of writting programming date.*/ +extern bl_ResponseCode_t Adpt_UdsCallBackWriteProgrammingDate(bl_BufferSize_t size, + bl_Buffer_t *buffer, + bl_BufferSize_t *respSize); + +bl_ResponseCode_t Adpt_UdsCallBackWrite_F18C(bl_BufferSize_t size, + bl_Buffer_t *buffer, + bl_BufferSize_t *respSize); + + +bl_ResponseCode_t Adpt_UdsCallBackWrite_F190(bl_BufferSize_t size, + bl_Buffer_t *buffer, + bl_BufferSize_t *respSize); + + +/** \brief Callback of checking programming contiditions.*/ +extern bl_ResponseCode_t Adpt_UdsCallbackCheckProgramCond(bl_BufferSize_t size, + bl_Buffer_t *buffer, + bl_BufferSize_t *respSize); +/** \brief Callback of erasing memory.*/ +extern bl_ResponseCode_t Adpt_UdsCallbackEraseMemory(bl_BufferSize_t size, + bl_Buffer_t *buffer, + bl_BufferSize_t *respSize); +/** \brief Callback of checksum.*/ +extern bl_ResponseCode_t Adpt_UdsCallbackCheckSum(bl_BufferSize_t size, + bl_Buffer_t *buffer, + bl_BufferSize_t *respSize); +/** \brief Callback of checking compatibility.*/ +extern bl_ResponseCode_t Adpt_UdsCallbackCheckCompatibility(bl_BufferSize_t size, + bl_Buffer_t *buffer, + bl_BufferSize_t *respSize); +/** \brief Callback of stayinboot.*/ +extern bl_ResponseCode_t Adpt_UdsCallbackStayInBoot(bl_BufferSize_t size, + bl_Buffer_t *buffer, + bl_BufferSize_t *respSize); +/** \brief Callback of requesting download.*/ +extern bl_ResponseCode_t Adpt_UdsCallback34(bl_BufferSize_t size, + bl_Buffer_t *buffer, + bl_BufferSize_t *respSize); +/** \brief Callback of transferring data.*/ +extern bl_ResponseCode_t Adpt_UdsCallback36(bl_BufferSize_t size, + bl_Buffer_t *buffer, + bl_BufferSize_t *respSize); +/** \brief Callback of requesting transfer exit.*/ +extern bl_ResponseCode_t Adpt_UdsCallback37(bl_BufferSize_t size, + bl_Buffer_t *buffer, + bl_BufferSize_t *respSize); +/** \brief Callback of keeping session.*/ +extern bl_ResponseCode_t Adpt_UdsCallback3E(bl_BufferSize_t size, + bl_Buffer_t *buffer, + bl_BufferSize_t *respSize); +/** \brief Callback of switching on or off dtc.*/ +extern bl_ResponseCode_t Adpt_UdsCallback85(bl_BufferSize_t size, + bl_Buffer_t *buffer, + bl_BufferSize_t *respSize); +/** \brief Callback of timeout.*/ +extern void Adpt_UdsTimeOutCallBack(void); +/** \brief Callback is used when the reprogramming Flag is valid.*/ +extern void Adpt_ReprogramValidProcess(void); +extern void Adpt_Res_default_ValidProcess(void); +/** \brief Callback is used when the reset Flag is valid.*/ +extern void Adpt_SystemResetProcess(void); + +#if (RTE_FUN_STAY_IN_BOOT == BL_FUN_ON) +/** \brief Callback is used when the application is valid.*/ +extern void Adpt_AppValidProcess(void); +#endif + +void Adpt_ReprogramValid_nores_Process(void); + +extern bl_u8_t g_cur_request_level ; //當前請求的等級 + + +#endif + diff --git a/code_boot_out/asil/middle/autosar_bl/inc/bl_app.h b/code_boot_out/asil/middle/autosar_bl/inc/bl_app.h new file mode 100644 index 0000000..e5f7d6d --- /dev/null +++ b/code_boot_out/asil/middle/autosar_bl/inc/bl_app.h @@ -0,0 +1,78 @@ +/**************************************************************************//** + * + * \copyright This software is the property of Technologies. Any + * information contained in this doc should not be reproduced, + * or used, or disclosed without the written authorization from + * Technologies. + * + * \brief This is a head file of the application callback module. + * + * \file bl_app.h + * \ingroup application_callback_module + * \author + * + * \version 5.1.0 + * \date 27/03/2014 + * + * \par Changelist + * Version | Date | Authors | CR# | Descriptions + * -------- | ---------- | ---------------- | --- | ------------ + * 01.00.00 | 15/03/2010 | hewei.zhang | N/A | Boot010001 + * 02.00.00 | 11/05/2011 | mingqing.tang | N/A | Boot020001 + * 02.05.00 | 08/06/2011 | mingqing.tang | N/A | Boot020006 + * 05.00.00 | 19/06/2013 | xin.shang | N/A | Boot050001 + * 05.01.00 | 27/03/2014 | mingqing.tang | N/A | Boot050002 + * + *****************************************************************************/ +#ifndef _BL_APP_H_ +#define _BL_APP_H_ +#include "bl_typedefs.h" +#include "bl_rte.h" + +/***************************************************************************** + * QAC Suppression + *****************************************************************************/ +/*PRQA S 3210,3447 EOF*/ +/* + * 3210:The global identifier is declared but is not used. + * The functions are used in the bl_dcm_cfg.c file. + * The g_UdsPlatformAdapter is used in the bl_process_driver_cfg.c file. + * + * MISRA-C:2004 8.8(3447):The identifier has external linkage but this + * declaration is not in a header file. + * The function Declarations are in the header file. + * + */ + +/***************************************************************************** + * Macro Definitions + *****************************************************************************/ + +/***************************************************************************** + * Type Declarations + *****************************************************************************/ + +/***************************************************************************** + * Structure Definitions + *****************************************************************************/ + +/***************************************************************************** + * External Global Variable Declarations + *****************************************************************************/ + +/***************************************************************************** + * External Function Prototype Declarations + *****************************************************************************/ +/** \brief This function is used to preprocess data.*/ +extern bl_Return_t App_PreprocessData(bl_DownContext_t *dct, + bl_Size_t size, + const bl_Buffer_t *buffer); +/** \brief This function is used to get the integrality value.*/ +extern bl_Return_t App_GetIntegralityValue(bl_DownContext_t *dct, + bl_Size_t *size, + bl_Buffer_t *buffer); +/** \brief This function is used to check the compatibility.*/ +extern bl_Return_t App_CheckCompatibility(void); + +#endif + diff --git a/code_boot_out/asil/middle/autosar_bl/inc/bl_booting.h b/code_boot_out/asil/middle/autosar_bl/inc/bl_booting.h new file mode 100644 index 0000000..78a09f5 --- /dev/null +++ b/code_boot_out/asil/middle/autosar_bl/inc/bl_booting.h @@ -0,0 +1,109 @@ +/**************************************************************************//** + * + * \copyright This software is the property of Technologies. Any + * information contained in this doc should not be reproduced, + * or used, or disclosed without the written authorization from + * Technologies. + * + * \brief This is a head file of the booting manager module. + * + * \file bl_booting.h + * \ingroup booting_manager_module + * \author + * + * \version 5.1.0 + * \date 27/03/2014 + * + * \par Changelist + * Version | Date | Authors | CR# | Descriptions + * -------- | ---------- | ---------------- | --- | ------------ + * 01.00.00 | 15/03/2010 | hewei.zhang | N/A | Boot010001 + * 01.02.00 | 16/06/2010 | hewei.zhang | N/A | Boot010003 + * 01.03.00 | 18/08/2010 | hewei.zhang | N/A | Boot010004 + * 02.00.00 | 16/05/2011 | mingqing.tang | N/A | Boot020001 + * 02.05.00 | 25/05/2011 | mingqing.tang | N/A | Boot020006 + * 03.00.00 | 15/09/2011 | mingqing.tang | N/A | Boot030001 + * 03.02.00 | 20/10/2011 | mingqing.tang | N/A | Boot030003 + * 05.00.00 | 19/06/2013 | xin.shang | N/A | Boot050001 + * 05.01.00 | 27/03/2014 | mingqing.tang | N/A | Boot050002 + * + *****************************************************************************/ +#ifndef _BL_BOOTING_H_ +#define _BL_BOOTING_H_ +#include "bl_typedefs.h" + +/***************************************************************************** + * QAC Suppression + *****************************************************************************/ +/*PRQA S 783,3205,3210,3447,3453 EOF*/ +/* + * 783:A subsequent declaration of the identifier means that it is being used + * both as a structure/union member and also as a label, ordinary identifier. + * The member of the structure is used through the structure object. + * + * 3205:The identifier is not used and could be removed. + * The bl_BootingCheckerList_t is used in the bl_booting.c file. + * + * 3210:The global identifier is declared but is not used. + * The functions are used in the bl_dcm_cfg.c file. + * + * MISRA-C:2004 8.8(3447):The identifier has external linkage but this + * declaration is not in a header file. + * The function Declarations are in the header file. + * + * MISRA-C:2004 19.7(3453):A function could probably be used instead of this + * function-like macro. + * These macros have no side-effect. + * + */ + + +/***************************************************************************** + * Macro Definitions + *****************************************************************************/ +#define BOOTING_FLAG_NULL (0x0000u)/**< flag is null.*/ +#define BOOTING_FLAG_REPROGRAM_VALID (0x0001u)/**< reprogram valid.*/ +#define BOOTING_FLAG_APPLICATION_VALID (0x0002u)/**< application valid.*/ +#define BOOTING_FLAG_SYSTEM_RESET (0x0004u)/**< system reset flag.*/ +#define BOOTING_FLAG_USER_DEFINE (0x8000u)/**< user flag mask.*/ + +#define BOOTING_MAKE_USER_FLAG(flag) (BOOTING_FLAG_USER_DEFINE \ + | (bl_BootingFlag_t)(flag)) +/***************************************************************************** + * Type Declarations + *****************************************************************************/ +/** a type for _tag_BootingCheckerList.*/ +typedef struct _tag_BootingCheckerList bl_BootingCheckerList_t; +/** a function pointer is used to call the checker*/ +typedef bl_Return_t (*bl_BootingChecker_t)(bl_BootingFlag_t *flag); + +/***************************************************************************** + * Structure Definitions + *****************************************************************************/ +/** \brief the list of the booting checkers.*/ +struct _tag_BootingCheckerList +{ + bl_u16_t number; /**< the number of checkers.*/ + const bl_BootingChecker_t *checkerList; /**< the data information list.*/ +}; + +/***************************************************************************** + * External Global Variable Declarations + *****************************************************************************/ + +/***************************************************************************** + * External Function Prototype Declarations + *****************************************************************************/ +/** \brief check the booting flags.*/ +extern bl_BootingFlag_t Bootm_CheckBootingRequirement(void); +/** \brief go to the application.*/ +extern void Bootm_GotoApplication(void); +/** \brief This function is used to check reprogram flag.*/ +extern bl_Return_t Bootm_ReprogramFlagChecker(bl_BootingFlag_t *flag); +/** \brief This function is used to check application valid flag.*/ +extern bl_Return_t Bootm_AppValidFlagChecker(bl_BootingFlag_t *flag); +/** \brief This function is used to check reset flag.*/ +extern bl_Return_t Bootm_ResetFlagChecker(bl_BootingFlag_t *flag); + +#endif + diff --git a/code_boot_out/asil/middle/autosar_bl/inc/bl_can.h b/code_boot_out/asil/middle/autosar_bl/inc/bl_can.h new file mode 100644 index 0000000..28336bb --- /dev/null +++ b/code_boot_out/asil/middle/autosar_bl/inc/bl_can.h @@ -0,0 +1,239 @@ +/**************************************************************************//** + * + * \copyright This software is the property of Technologies. Any + * information contained in this doc should not be reproduced, + * or used, or disclosed without the written authorization from + * Technologies. + * + * \brief This is the header file of the can module. + * + * \file bl_can.h + * \ingroup driver_module + * \author + * + * \version 1.1.0 + * \date 14/05/2014 + * + * \par Changelist + * Version | Date | Authors | CR# | Descriptions + * -------- | ---------- | ---------------- | --- | ------------- + * 01.00.00 | 14/05/2014 | ning.chen | N/A | BootDrv010001 + * 01.01.00 | 21/08/2014 | ning.chen | N/A | BootDrv010002 + * + *****************************************************************************/ +#ifndef _BL_CAN_H_ +#define _BL_CAN_H_ + + +#include "common_types.h" +#include "can.h" +#include "bl_typedefs.h" +#include "bl_can_if.h" + + +/***************************************************************************** + * QAC Suppression + *****************************************************************************/ +/*PRQA S 783,3205,3210,3447 EOF*/ +/* + * 783:A subsequent declaration of the identifier means that it is being used + * both as a structure/union member and also as a label, ordinary identifier. + * The member of the structure is used through the structure object. + * + * 3205:The identifier is not used and could be removed. + * The identifiers are used in the bl_can.c file. + * + * 3210:The global identifier is declared but is not used. + * The functions are used in the bl_can_if.c file. + * + * MISRA-C:2004 8.8(3447):The identifier has external linkage but this + * declaration is not in a header file. + * The function Declarations are in the header file. + * + */ + +/***************************************************************************** + * Macro Definitions + *****************************************************************************/ + +#define MSK_EXT_ID_MSB ((u32)(0x10000000)) /*為什麼人為的定義最高位來判斷PDU 是不是擴展幀*/ + + +#define CAN_STATUS_NOINIT (0u) +#define CAN_STATUS_IDLE (1u) +#define CAN_STATUS_TRANSMITTING (2u) +#define CAN_STATUS_TRANSMIT_FINISH (3u) +#define CAN_STATUS_BUSOFF (4u) + +#define CAN_MAX_SIZE_OF_DATA (CAN_FRAME_MAX_DLC) //要查清楚，该宏的调用 --原来是8 +#define CAN_MAX_NUMBER_OF_CONTROLLER (1u) //目前只支持一個CAN --現在先是兼容兩個，再用宏來屏蔽某路 + +#define CAN_USED_CONTROLLER_NUMBER (1u) //理論上，和 CAN_MAX_NUMBER_OF_CONTROLLER 相同 +#define CAN_USED_CONTROLLER_ID (0u) +#define CAN_USED_CONTROLLER_ID_1 (1u) +#define CAN_USED_CONTROLLER_ISR_ID (36) + + +#if 0 +/***************************************************************************** + * Type Declarations + *****************************************************************************/ +/** \brief A alias of struct _tag_CanControllerRegs.*/ +typedef struct _tag_CanControllerRegs bl_CanControllerRegs_t; +/** \brief A alias of struct _tag_CanController.*/ +typedef struct _tag_CanController bl_CanController_t; +/** \brief A alias of struct _tag_CanControllerBaseRegs.*/ +typedef struct _tag_CanControllerBaseRegs bl_CanControllerBaseRegs_t; +/** \brief A alias of struct _tag_CanControllerCfg.*/ +typedef struct _tag_CanControllerCfg bl_CanControllerCfg_t; +/** \brief A alias of struct _tag_CanFrameBuffer.*/ +typedef struct _tag_CanFrameBuffer bl_CanFrameBuffer_t; + +/***************************************************************************** + * Structure Definitions + *****************************************************************************/ +struct _tag_CanControllerBaseRegs +{ + bl_u8_t ctl0; /**< Control register0*/ + bl_u8_t ctl1; /**< Control register1*/ + bl_u8_t btr0; /**< Baudrate register0*/ + bl_u8_t btr1; /**< Baudrate register1*/ + bl_u8_t rflg; /**< Receive flag register*/ + bl_u8_t rier; /**< Receive interrupt enable register*/ + bl_u8_t tflg; /**< Transmit flag register*/ + bl_u8_t tier; /**< Transmit interrupt enable register*/ + bl_u8_t tarq; /**< Transmit abort request register*/ + bl_u8_t taak; /**< Transmit abort ack register*/ + bl_u8_t tbsel; /**< Transmit box select*/ + bl_u8_t idac; /**< Identifier acceptance control register*/ + bl_u8_t res0; /**< Reserve*/ + bl_u8_t misc; /**< Miscellaneous*/ + bl_u8_t exerr; /**< Rx error counter*/ + bl_u8_t txerr; /**< Tx error counter*/ + bl_u8_t idar0; /**< Identifier acceptance 0*/ + bl_u8_t idar1; /**< Identifier acceptance 1*/ + bl_u8_t idar2; /**< Identifier acceptance 2*/ + bl_u8_t idar3; /**< Identifier acceptance 3*/ + bl_u8_t idmr0; /**< Identifier filter mask 0*/ + bl_u8_t idmr1; /**< Identifier filter mask 1*/ + bl_u8_t idmr2; /**< Identifier filter mask 2*/ + bl_u8_t idmr3; /**< Identifier filter mask 3*/ + bl_u8_t idar4; /**< Identifier acceptance 4*/ + bl_u8_t idar5; /**< Identifier acceptance 5*/ + bl_u8_t idar6; /**< Identifier acceptance 6*/ + bl_u8_t idar7; /**< Identifier acceptance 7*/ + bl_u8_t idmr4; /**< Identifier filter mask 4*/ + bl_u8_t idmr5; /**< Identifier filter mask 5*/ + bl_u8_t idmr6; /**< Identifier filter mask 6*/ + bl_u8_t idmr7; /**< Identifier filter mask 7*/ +}; + +struct _tag_CanFrameBuffer +{ + bl_u32_t id; + bl_Buffer_t data[CAN_MAX_SIZE_OF_DATA]; + bl_u8_t dlc; + bl_u8_t priority; + bl_u16_t timeStamp; +}; + +struct _tag_CanControllerRegs +{ + struct _tag_CanControllerBaseRegs base; + struct _tag_CanFrameBuffer rxBuf; + struct _tag_CanFrameBuffer txBuf; +}; + +struct _tag_CanControllerCfg +{ + bl_u8_t phyId; + const struct _tag_CanControllerBaseRegs *initReg; +}; + +struct _tag_CanController +{ + bl_u8_t status; + volatile struct _tag_CanControllerRegs *regs; +}; + +#else + +/** \brief A alias of struct _tag_CanFrameBuffer.*/ +typedef struct _tag_CanFrameBuffer bl_CanFrameBuffer_t; + +//typedef CAN_Type CAN_TypeDef; +typedef CAN_TypeDef bl_CanControllerBaseRegs_t ; + +typedef struct +{ + bl_CanControllerBaseRegs_t base; + //struct _tag_CanFrameBuffer rxBuf; + //struct _tag_CanFrameBuffer txBuf; +}bl_CanControllerRegs_t; + +typedef struct +{ + bl_u8_t phyId; + const bl_CanControllerBaseRegs_t *initReg; +}bl_CanControllerCfg_t; + +typedef struct _tag_CanController +{ + bl_u8_t status; + bl_CanControllerRegs_t *regs; +}bl_CanController_t; + + +struct _tag_CanFrameBuffer +{ + bl_u32_t id; + bl_Buffer_t data[CAN_MAX_SIZE_OF_DATA]; + bl_u8_t dlc; + bl_u8_t priority; + bl_u16_t timeStamp; +}; + +#endif + + +/***************************************************************************** + * External Function Prototype Declarations + *****************************************************************************/ +/** \brief Initialize the can module.*/ +extern bl_Return_t Can_Init(void); +/** \brief Deinitialize the can module.*/ +extern void Can_Deinit(void); +/** \brief Transmit the data to can bus.*/ +extern bl_Return_t Can_Write(const bl_CanTxPdu_t *pdu); +/** \brief Receive the data from can bus.*/ +extern bl_Return_t Can_Read(bl_CanRxPdu_t *pdu); +/** \brief Check whether can controller is Tx successfully.*/ +extern bl_Return_t Can_CheckTxStatus(bl_ComIfHandle_t handle); +/** \brief Check can controller busoff.*/ +extern void Can_BusOff_Check(void); +/** \brief The can controller into sleep status.*/ +extern void Can_Sleep(void); + + +void Can_Deinit(void); +void can_phy1_busoff_op_task(void); + +void can_id_phy_rx_irq_task(u8 phy_id,const can_queue_elem_s *p_frame_info); +void can_id_phy_wakeup_irq_task(u8 phy_id); + +void can_test_task(void); +//void can_logic0_phy_busoff_irq_task(void); +void can1_busoff_op_task(void); + + + +void Can_SetTxStatus_finish(bl_ComIfHandle_t handle); + +void bl_can_tx_task(void); +void bl_can_rx_task(void); + +u8 can_drive_get_logic_id(u8 phy_id); +u8 can_drive_get_phy_id(u8 logic_id); +bl_Return_t Can_Controller_enable( u8 Controller, u8 state ); + +#endif diff --git a/code_boot_out/asil/middle/autosar_bl/inc/bl_can_if.h b/code_boot_out/asil/middle/autosar_bl/inc/bl_can_if.h new file mode 100644 index 0000000..5aaeb07 --- /dev/null +++ b/code_boot_out/asil/middle/autosar_bl/inc/bl_can_if.h @@ -0,0 +1,169 @@ +/**************************************************************************//** + * + * \copyright This software is the property of Technologies. Any + * information contained in this doc should not be reproduced, + * or used, or disclosed without the written authorization from + * Technologies. + * + * \brief This is a head file of bl_can_if. + * + * \file bl_can_if.h + * \author + * + * \version 5.1.0 + * \date 27/03/2014 + * + * \par Changelist + * Version | Date | Authors | CR# | Descriptions + * -------- | ---------- | ---------------- | --- | ------------ + * 02.00.00 | 20/08/2013 | haiping.wang | N/A | Boot020001 + * 05.01.00 | 27/03/2014 | mingqing.tang | N/A | Boot050002 + * + *****************************************************************************/ +#ifndef _BL_CAN_IF_H_ +#define _BL_CAN_IF_H_ +#include "bl_typedefs.h" +#include "bl_rte.h" +#include "bl_can_if_funcfg.h" +#include "can_cfg.h" + +/***************************************************************************** + * QAC Suppression + *****************************************************************************/ +/*PRQA S 783,3205,3210,3447,3448 EOF*/ +/* + * 783:A subsequent declaration of the identifier means that it is being used + * both as a structure/union member and also as a label, ordinary identifier. + * The member of the structure is used through the structure object. + * + * 3205:The identifier is not used and could be removed. + * The bl_Adapter_t is used by the specifically adapter such as UDS platform in + * the bl_adpt_uds_platform.c + * + * 3210:The global identifier is declared but is not used. + * The functions are used in the bl_security_cfg.c file. + * + * MISRA-C:2004 8.8(3447):The identifier has external linkage but this + * declaration is not in a header file. + * The function Declarations are in the header file. + * + * MISRA-C:2004 5.3(3448):Declaration of typedef is not in a header file. + * The bl_SecurityDelay_t is declared in the header file. + * + */ + +/***************************************************************************** + * Internal Macro Definitions + *****************************************************************************/ +#define CANIF_MAX_CAN_FRAME_SIZE (CAN_FRAME_MAX_DLC) + +/***************************************************************************** + * Type Declarations + *****************************************************************************/ +/** \brief Indication that a can frame is received.*/ +typedef void (*bl_RxIndication_t)(bl_ComIfHandle_t handle, + bl_BufferSize_t size, + const bl_Buffer_t *buffer); +/** \brief Indication that a can frame is transmitted.*/ +typedef void (*bl_TxConfirmation_t)(bl_ComIfHandle_t handle); +/** \brief A alias of struct _tag_CanIfPduCfg.*/ +typedef struct _tag_CanIfPduCfg bl_CanIfPduCfg_t; +/** \brief A alias of struct _tag_CanIfRxList.*/ +typedef struct _tag_CanIfRxList bl_CanIfRxList_t; +/** \brief A alias of struct _tag_CanIfTxList.*/ +typedef struct _tag_CanIfTxList bl_CanIfTxList_t; +/** \brief A alias of struct _tag_CanRxPdu.*/ +typedef struct _tag_CanRxPdu bl_CanRxPdu_t; +/** \brief A alias of struct _tag_CanTxPdu.*/ +typedef struct _tag_CanTxPdu bl_CanTxPdu_t; + +/***************************************************************************** + * Structure Definitions + *****************************************************************************/ +struct _tag_CanRxPdu +{ + bl_ComIfHandle_t handle; //這裡的hander 是指buf 的id ； 即 gs_CanIfPduCfg數據的buf id + bl_BufferSize_t dlc; + bl_u32_t canId; + bl_Buffer_t frame[CANIF_MAX_CAN_FRAME_SIZE]; +}; + +struct _tag_CanTxPdu +{ + bl_ComIfHandle_t handle; + bl_BufferSize_t dlc; + bl_u32_t canId; + bl_u8_t canfd; //增加canfd的標志 + bl_u8_t brs; //速度可变标志 + const bl_Buffer_t *frame; +}; + +struct _tag_CanIfPduCfg +{ + bl_u8_t status; //狀態 CANIF_TRANSMITE 或者 CANIF_RECEIVE + bl_u8_t type; //類型 CANIF_STANDARD 或者 擴展 + bl_ComIfHandle_t handle; //原來hander是 物理層的通道 channel0 HANDLE_CAN0_TX0 HANDLE_CAN0_RX0 + bl_u32_t id; //CAN的id值 + bl_u8_t canfd; //增加canfd的標志 + bl_u8_t brs; //速度可变标志 +}; + +struct _tag_CanIfRxList +{ + bl_u16_t number; +#if (CANIF_FUN_DYNAMIC_CANID == BL_FUN_ON) + struct _tag_CanIfPduCfg *rxList; +#else + const struct _tag_CanIfPduCfg *rxList; +#endif + bl_RxIndication_t RxInd; //接收確認函數 +}; + +struct _tag_CanIfTxList +{ + bl_u16_t number; +#if (CANIF_FUN_DYNAMIC_CANID == BL_FUN_ON) + struct _tag_CanIfPduCfg *txList; +#else + const struct _tag_CanIfPduCfg *txList; +#endif + bl_TxConfirmation_t TxConf; //發送確認函數 +}; + +/***************************************************************************** + * External Global Variable Declarations + *****************************************************************************/ + +/***************************************************************************** + * External Function Prototype Declarations + *****************************************************************************/ +/** \brief Initialize the can IF module*/ +extern bl_Return_t Canif_Init(void); +/** \brief Deinitialize the can IF module*/ +extern void Canif_DeInit(void); +/** \brief Transmit a can frame to can bus.*/ +extern bl_Return_t Canif_Write(bl_ComIfHandle_t handle, + bl_BufferSize_t size, + const bl_Buffer_t *buffer); +/** \brief Try to receive a can frame from can bus.*/ +extern bl_Return_t Canif_TryToRead(bl_ComIfData_t *data); +/** \brief Check whether a can frame is transmitted.*/ +extern bl_Return_t Canif_IsWritten(bl_ComIfHandle_t handle); +/** \brief Main Tx function.*/ +extern void Canif_TxMainFunction(void); +/** \brief Main Rx function.*/ +extern void Canif_RxMainFunction(void); +/** \brief Main bus-off function.*/ +extern void Canif_BusoffMainFunction(void); +/** \brief can IF module into sleep status.*/ +extern void Canif_Sleep(void); + +#if (CANIF_FUN_DYNAMIC_CANID == BL_FUN_ON) +/** \brief Set the Tx can id.*/ +extern void Canif_SetTxCanId(bl_ComIfHandle_t handle, bl_u32_t id); +/** \brief Set the Rx can id.*/ +extern void Canif_SetRxCanId(bl_ComIfHandle_t handle, bl_u32_t id); +#endif + +#endif + diff --git a/code_boot_out/asil/middle/autosar_bl/inc/bl_can_tp.h b/code_boot_out/asil/middle/autosar_bl/inc/bl_can_tp.h new file mode 100644 index 0000000..fad83cf --- /dev/null +++ b/code_boot_out/asil/middle/autosar_bl/inc/bl_can_tp.h @@ -0,0 +1,116 @@ +/**************************************************************************//** + * + * \copyright This software is the property of Technologies. Any + * information contained in this doc should not be reproduced, + * or used, or disclosed without the written authorization from + * Technologies. + * + * \brief This is a head file of the CAN Transport Protocol module. + * + * \file bl_can_tp.h + * \ingroup cantp_module + * \author + * + * + * \version 5.1.0 + * \date 27/03/2014 + * + * \par Changelist + * Version | Date | Authors | CR# | Descriptions + * -------- | ---------- | ---------------- | --- | ------------ + * 01.00.00 | 17/03/2010 | rui.guo | N/A | Boot010001 + * 02.00.00 | 21/02/2011 | rui.guo | N/A | Boot020001 + * 05.00.00 | 19/06/2013 | rui.guo | N/A | Boot050001 + * 05.01.00 | 27/03/2014 | mingqing.tang | N/A | Boot050002 + * + *****************************************************************************/ +#ifndef _BL_CAN_TP_H_ +#define _BL_CAN_TP_H_ +#include "bl_typedefs.h" +#include "bl_can_tp_funcfg.h" + +/***************************************************************************** + * QAC Suppression + *****************************************************************************/ +/*PRQA S 3205,3210,3447,3448 EOF*/ +/* + * 3205:The identifier is not used and could be removed. + * The bl_Adapter_t is used by the specifically adapter such as UDS platform in + * the bl_adpt_uds_platform.c + * + * 3210:The global identifier is declared but is not used. + * The functions are used in the bl_security_cfg.c file. + * + * MISRA-C:2004 8.8(3447):The identifier has external linkage but this + * declaration is not in a header file. + * The function Declarations are in the header file. + * + * MISRA-C:2004 5.3(3448):Declaration of typedef is not in a header file. + * The bl_SecurityDelay_t is declared in the header file. + * + */ + +/***************************************************************************** + * Macro Definitions + *****************************************************************************/ +#define CANTP_TYPE_STANDARD (0u) +#define CANTP_TYPE_EXTENDED (1u) +#define CANTP_TYPE_MIXED (2u) + +#define CANTP_TATYPE_PHYSICAL (0u) +#define CANTP_TATYPE_FUNCTIONAL (1u) + +#define CANTP_MAX_FRAME_SIZE (8u)//(64u) /* CAN frame max size*/ //这个配置，和那个CANFD的长度有关 + +/***************************************************************************** + * Type Declarations + *****************************************************************************/ +/** \brief A alias of the struct _tag_CanTpChannelCfg.*/ +typedef struct _tag_CanTpChannelCfg bl_CanTpChannelCfg_t; +/** \brief The can tp handle.*/ +typedef bl_u16_t bl_CanTpHandle_t; +/** \brief The Result of the Rx or Tx.*/ +typedef bl_Return_t bl_CanTpResult_t; + +/***************************************************************************** + * Structure Definitions + *****************************************************************************/ +/** \brief The channel configuration informations for the CAN TP.*/ +struct _tag_CanTpChannelCfg +{ + bl_u8_t type; /**< The type of a tp channel.*/ + bl_u8_t taType; /**< The TA type of a tp channel.*/ + bl_ComIfHandle_t rxId; /**< RX ID from CanIf.*/ + bl_ComIfHandle_t txId; /**< TX ID to CanIf.*/ + bl_u16_t timerA; /**< The timer A is used to send a can frame.*/ + bl_u16_t timerB; /**< The timer B is used to wait for the FC frame.*/ + bl_u16_t timerC; /**< The timer C is used to wait for the CF frame.*/ + bl_u8_t ta; /**< The TA of a tp channel.*/ + bl_u8_t st; /**< The STmin of a tp channel.*/ + bl_u8_t bs; /**< The block size of a tp channel.*/ + bl_u8_t wft; /**< The max wft of a tp channel.*/ +}; + +/***************************************************************************** + * External Global Variable Declarations + *****************************************************************************/ + +/***************************************************************************** + * External Function Prototype Declarations + *****************************************************************************/ +/** \brief Initialize the can tp module.*/ +extern void Cantp_Init(void); +/** \brief the period function of the can tp module*/ +extern void Cantp_PeriodFunction(void); +/** \brief Transmit a data.*/ +extern bl_Return_t Cantp_Transmit(bl_CanTpHandle_t handle, + bl_BufferSize_t size); +/** \brief Indicate a frame to be received.*/ +extern void Cantp_RxIndication(bl_ComIfHandle_t handle, + bl_BufferSize_t size, + const bl_Buffer_t *buffer); +/** \brief Confire a frame to be transmitted.*/ +extern void Cantp_TxConfirmation(bl_ComIfHandle_t handle); + +#endif + diff --git a/code_boot_out/asil/middle/autosar_bl/inc/bl_can_transceiver.h b/code_boot_out/asil/middle/autosar_bl/inc/bl_can_transceiver.h new file mode 100644 index 0000000..eb9a584 --- /dev/null +++ b/code_boot_out/asil/middle/autosar_bl/inc/bl_can_transceiver.h @@ -0,0 +1,59 @@ +/**************************************************************************//** + * + * \copyright This software is the property of Technologies. Any + * information contained in this doc should not be reproduced, + * or used, or disclosed without the written authorization from + * Technologies. + * + * \brief This is the header file of the can transceiver. + * + * \file bl_can_transceiver.h + * \ingroup driver_module + * \author + * + * \version 1.0.0 + * \date 14/05/2014 + * + * \par Changelist + * Version | Date | Authors | CR# | Descriptions + * -------- | ---------- | ---------------- | --- | ------------- + * 01.00.00 | 14/05/2014 | ning.chen | N/A | BootDrv010001 + *****************************************************************************/ +#ifndef _BL_CAN_TRC_H_ +#define _BL_CAN_TRC_H_ +#include "bl_typedefs.h" + +/***************************************************************************** + * QAC Suppression + *****************************************************************************/ +/*PRQA S 3210,3447 EOF*/ +/* + * 3210:The global identifier is declared but is not used. + * The functions are used in the bl_can_if.c file. + * + * MISRA-C:2004 8.8(3447):The identifier has external linkage but this + * declaration is not in a header file. + * The function Declarations are in the header file. + * + */ + +/***************************************************************************** + * Macro Definitions + *****************************************************************************/ + +/***************************************************************************** + * Type Declarations + *****************************************************************************/ + +/***************************************************************************** + * Structure Definitions + *****************************************************************************/ + +/***************************************************************************** + * External Function Prototype Declarations + *****************************************************************************/ +/** \brief Initialize the can transceiver.*/ +extern void CanTrcv_Init(void); // Cantrc_InitTransceiver +extern void CanTrcv_Disable(void); +#endif + diff --git a/code_boot_out/asil/middle/autosar_bl/inc/bl_common.h b/code_boot_out/asil/middle/autosar_bl/inc/bl_common.h new file mode 100644 index 0000000..da5c217 --- /dev/null +++ b/code_boot_out/asil/middle/autosar_bl/inc/bl_common.h @@ -0,0 +1,88 @@ +/**************************************************************************//** + * + * \copyright This software is the property of Technologies. Any + * information contained in this doc should not be reproduced, + * or used, or disclosed without the written authorization from + * Technologies. + * + * \brief This is a head file of the common module. + * + * \file bl_common.h + * \ingroup common_module + * \author + * + * \version 5.1.0 + * \date 27/03/2014 + * + * \par Changelist + * Version | Date | Authors | CR# | Descriptions + * -------- | ---------- | ---------------- | --- | ------------ + * 01.00.00 | 15/03/2010 | hewei.zhang | N/A | Boot010001 + * 03.00.00 | 15/09/2011 | mingqing.tang | N/A | Boot030001 + * 05.00.00 | 19/06/2013 | mingqing.tang | N/A | Boot050001 + * 05.01.00 | 27/03/2014 | mingqing.tang | N/A | Boot050002 + * + *****************************************************************************/ +#ifndef _BL_COMMON_H_ +#define _BL_COMMON_H_ + +#include "common_types.h" +#include "bl_typedefs.h" + +/***************************************************************************** + * QAC Suppression + *****************************************************************************/ +/*PRQA S 3210,3447 EOF*/ +/* + * 3210:The global identifier is declared but is not used. + * The functions are used in the bl_security_cfg.c file. + * + * MISRA-C:2004 8.8(3447):The identifier has external linkage but this + * declaration is not in a header file. + * The function Declarations are in the header file. + * + */ + +/***************************************************************************** + * Macro Definitions + *****************************************************************************/ + +/***************************************************************************** + * Type Declarations + *****************************************************************************/ + +/***************************************************************************** + * Structure Definitions + *****************************************************************************/ + +/***************************************************************************** + * External Global Variable Declarations + *****************************************************************************/ + +/***************************************************************************** + * External Function Prototype Declarations + *****************************************************************************/ +/** \brief Copy the data from src to des.*/ +extern void Bl_MemCpy(bl_Buffer_t *des,const bl_Buffer_t *src, bl_Size_t size); +/** \brief Set the stuff of the buffer.*/ +extern void Bl_MemSet(bl_Buffer_t *des, bl_Buffer_t src, bl_Size_t size); + +/** \brief Trans the big endian to cpu endain.*/ +extern bl_u16_t Bl_Be16ToMcu(const bl_Buffer_t * buf); +/** \brief This function is used to get memory id.*/ +extern bl_u16_t Bl_Le16ToMcu(const bl_Buffer_t * buf); +/** \brief This function is used to get memory id.*/ +extern bl_u32_t Bl_Be32ToMcu(const bl_Buffer_t * buf); +/** \brief This function is used to get memory id.*/ +extern bl_u32_t Bl_Le32ToMcu(const bl_Buffer_t * buf); + +/** \brief This function is used to get memory id.*/ +extern void Bl_McuToBe16(bl_Buffer_t * buf, bl_u16_t data); +/** \brief This function is used to get memory id.*/ +extern void Bl_McuToLe16(bl_Buffer_t * buf, bl_u16_t data); +/** \brief This function is used to get memory id.*/ +extern void Bl_McuToBe32(bl_Buffer_t * buf, bl_u32_t data); +/** \brief This function is used to get memory id.*/ +extern void Bl_McuToLe32(bl_Buffer_t * buf, bl_u32_t data); +#endif + diff --git a/code_boot_out/asil/middle/autosar_bl/inc/bl_crc32_bzip2.h b/code_boot_out/asil/middle/autosar_bl/inc/bl_crc32_bzip2.h new file mode 100644 index 0000000..39c8813 --- /dev/null +++ b/code_boot_out/asil/middle/autosar_bl/inc/bl_crc32_bzip2.h @@ -0,0 +1,88 @@ +/**************************************************************************//** + * + * \copyright This software is the property of Technologies. Any + * information contained in this doc should not be reproduced, + * or used, or disclosed without the written authorization from + * Technologies. + * + * \brief This is a head file of a crc algorithm, this algorithm is used + * by BZIP2. + * + * \file bl_crc32_bzip2.h + * \ingroup security_manager_module + * \author + * + * \version 5.1.0 + * \date 27/03/2018 + * + * \par Changelist + * Version | Date | Authors | CR# | Descriptions + * -------- | ---------- | ---------------- | --- | ------------ + * 01.00.00 | 25/03/2018 | mingyea | N/A | Boot010001 + * + *****************************************************************************/ +#ifndef _BL_CRC32_BZIP2_H_ +#define _BL_CRC32_BZIP2_H_ +#include "bl_typedefs.h" + +/***************************************************************************** + * QAC Suppression + *****************************************************************************/ +/*PRQA S 3210,3447 EOF*/ +/* + * 3210:The global identifier is declared but is not used. + * The functions are used in the bl_security_cfg.c file. + * + * MISRA-C:2004 8.8(3447):The identifier has external linkage but this + * declaration is not in a header file. + * The function Declarations are in the header file. + * + */ + +/***************************************************************************** + * Macro Definitions + *****************************************************************************/ +#define CRC32_ORG //带反转 ，以前用于吉利FE-5HA + +/** \brief The name of this crc32 algorithm.*/ +#ifdef CRC32_ORG +#define CRC_ALGORITHM_NAME "crc32" +#else +#define CRC_ALGORITHM_NAME "crc32_bzip2" +#endif +/*hc-m85:x32 + x26 + x23 + x22 + x16 + x12 +x11 + x10 +x8 + x7 +x5 +x4 + x2 + x + 1*/ +/** \brief The polynomial of this crc32 algorithm.*/ +#define CRC32_BZIP2_POLYNOMIAL (0x04C11DB7UL) +/** \brief The final xor value of this crc32 algorithm.*/ +#define CRC32_BZIP2_FINAL_XOR_VALUE (0xFFFFFFFFUL) +/** \brief The initialization value of this crc32 algorithm.*/ +#define CRC32_BZIP2_INIT_VALUE (0xFFFFFFFFUL) +/** \brief The check value of this crc32 algorithm.*/ +#define CRC32_BZIP2_CHECK_VALUE (0xFC891918UL) + +/***************************************************************************** + * Type Declarations + *****************************************************************************/ + +/***************************************************************************** + * Structure Definitions + *****************************************************************************/ + +/***************************************************************************** + * External Global Variable Declarations + *****************************************************************************/ + +/***************************************************************************** + * External Function Prototype Declarations + *****************************************************************************/ +/** \brief Initialize the crc32 algorithm.*/ +extern void Bzip2_Init(void); +/** \brief Start the crc32 algorithm.*/ +extern void Bzip2_Start(void); +/** \brief Update the crc value.*/ +extern bl_Return_t Bzip2_Update(bl_Size_t size, const bl_Buffer_t *data); +/** \brief Verify the crc value whether is right.*/ +extern bl_Return_t Bzip2_Verify(bl_Size_t size, const bl_Buffer_t *hash); + +#endif + diff --git a/code_boot_out/asil/middle/autosar_bl/inc/bl_data.h b/code_boot_out/asil/middle/autosar_bl/inc/bl_data.h new file mode 100644 index 0000000..059a09c --- /dev/null +++ b/code_boot_out/asil/middle/autosar_bl/inc/bl_data.h @@ -0,0 +1,125 @@ +/**************************************************************************//** + * + * \copyright This software is the property of Technologies. Any + * information contained in this doc should not be reproduced, + * or used, or disclosed without the written authorization from + * Technologies. + * + * \brief This is a head file of the data manager module. + * + * \file bl_data.h + * \ingroup data_manager_module + * \author + * + * \version 5.1.0 + * \date 27/03/2014 + * + * \par Changelist + * Version | Date | Authors | CR# | Descriptions + * -------- | ---------- | ---------------- | --- | ------------ + * 04.00.00 | 06/03/2013 | xin.shang | N/A | Boot040001 + * 04.02.00 | 11/03/2013 | xin.shang | N/A | Boot040003 + * 04.03.00 | 11/03/2013 | xin.shang | N/A | Boot040004 + * 04.11.00 | 13/03/2013 | xin.shang | N/A | Boot040012 + * 04.13.00 | 15/03/2013 | xin.shang | N/A | Boot040014 + * 04.14.00 | 20/03/2013 | xin.shang | N/A | Boot040015 + * 04.21.00 | 21/03/2013 | xin.shang | N/A | Boot040022 + * 04.31.00 | 04/04/2013 | xin.shang | N/A | Boot040032 + * 05.00.00 | 19/06/2013 | xin.shang | N/A | Boot050001 + * 05.01.00 | 27/03/2014 | mingqing.tang | N/A | Boot050002 + * + *****************************************************************************/ +#ifndef _BL_DATA_H_ +#define _BL_DATA_H_ +#include "bl_typedefs.h" + +/***************************************************************************** + * QAC Suppression + *****************************************************************************/ +/*PRQA S 783,3205,3210,3447,3448 EOF*/ +/* + * 783:A subsequent declaration of the identifier means that it is being used + * both as a structure/union member and also as a label, ordinary identifier. + * The member of the structure is used through the structure object. + * + * 3205:The identifier is not used and could be removed. + * The bl_Adapter_t is used by the specifically adapter such as UDS platform in + * the bl_adpt_uds_platform.c + * + * 3210:The global identifier is declared but is not used. + * The functions are used in the bl_security_cfg.c file. + * + * MISRA-C:2004 8.8(3447):The identifier has external linkage but this + * declaration is not in a header file. + * The function Declarations are in the header file. + * + * MISRA-C:2004 5.3(3448):Declaration of typedef is not in a header file. + * The bl_SecurityDelay_t is declared in the header file. + * + */ + +/***************************************************************************** + * Macro Definitions + *****************************************************************************/ +#define DM_DATA_TYPE_READ_ONLY (0x0001u) /** read-only type.*/ +#define DM_DATA_TYPE_READ_AND_WRITE (0x0002u) /** read-write type.*/ +#define DM_ERROR_DATAID BL_ERROR_ID_16BIT /** invalid data id.*/ + +/***************************************************************************** + * Type Declarations + *****************************************************************************/ +/** \brief A alias of the struct _tag_DataInfo.*/ +typedef struct _tag_DataInfo bl_DataInfo_t; +/** \brief A alias of the struct _tag_DataInfoList.*/ +typedef struct _tag_DataInfoList bl_DataInfoList_t; + +/***************************************************************************** + * Structure Definitions + *****************************************************************************/ +/** \brief the data informations.*/ +struct _tag_DataInfo +{ + bl_u16_t type; /**< the type of data, RO or RW.*/ + bl_u16_t memId; /**< the memory id of data.*/ + bl_Address_t localAddr; /**< the memory local offset of data.*/ + bl_Size_t size; /**< the size of data.*/ + const bl_Buffer_t *defData; /**< the default data.*/ +}; + +/** \brief the list of the data informations.*/ +struct _tag_DataInfoList +{ + bl_u16_t number; /**< the number of data managed by module.*/ + const struct _tag_DataInfo *dataList; /**< the data information list.*/ +}; + +/***************************************************************************** + * External Global Variable Declarations + *****************************************************************************/ + +/***************************************************************************** + * External Function Prototype Declarations + *****************************************************************************/ +/** \brief This function is used to read data from the memory.*/ +extern bl_Return_t Dm_ReadData(bl_u16_t did, + bl_Size_t size, + bl_Buffer_t *buffer); +/** \brief This function is used to write data to the memory.*/ +extern bl_Return_t Dm_WriteData(bl_u16_t did, + bl_Size_t size, + const bl_Buffer_t *buffer); +/** \brief This function is used to write data to default data buffer.*/ +extern bl_Return_t Dm_WriteDefaultData(bl_u16_t did); +/** \brief This function is used to compare data with default data.*/ +extern bl_Return_t Dm_IsDefaultData(bl_u16_t did); +/** \brief Check whether the did is valid.*/ +extern bl_Return_t Dm_IsValidDataId(bl_u16_t did); +/** \brief This function is used to clear default data.*/ +extern bl_Return_t Dm_ClearData(bl_u16_t did); +/** \brief This function is used to get memory id.*/ +extern bl_u16_t Dm_GetMemid(bl_u16_t did); +/** \brief This function is used to get the size of a data.*/ +extern bl_Size_t Dm_GetDataSize(bl_u16_t did); + +#endif + diff --git a/code_boot_out/asil/middle/autosar_bl/inc/bl_dcm.h b/code_boot_out/asil/middle/autosar_bl/inc/bl_dcm.h new file mode 100644 index 0000000..5eef672 --- /dev/null +++ b/code_boot_out/asil/middle/autosar_bl/inc/bl_dcm.h @@ -0,0 +1,249 @@ +/**************************************************************************//** + * + * \copyright This software is the property of Technologies. Any + * information contained in this doc should not be reproduced, + * or used, or disclosed without the written authorization from + * Technologies. + * + * \brief This is the head file of the DCM module. + * + * \file bl_dcm.h + * \ingroup communication_protocol_stack_module + * \author + * + * + * \version 5.1.0 + * \date 27/03/2014 + * + * \par Changelist + * Version | Date | Authors | CR# | Descriptions + * -------- | ---------- | ---------------- | --- | ------------ + * 01.00.00 | 08/04/2010 | hewei.zhang | N/A | Boot010001 + * 01.02.00 | 19/04/2010 | hewei.zhang | N/A | Boot010003 + * 01.04.00 | 06/05/2010 | hewei.zhang | N/A | Boot010005 + * 02.00.00 | 18/03/2011 | mingqing.tang | N/A | Boot020001 + * 02.01.00 | 31/03/2011 | mingqing.tang | N/A | Boot020002 + * 02.03.00 | 07/04/2011 | mingqing.tang | N/A | Boot020004 + * 03.00.00 | 12/09/2011 | mingqing.tang | N/A | Boot030001 + * 03.05.00 | 11/10/2011 | mingqing.tang | N/A | Boot030006 + * 03.06.00 | 26/10/2011 | mingqing.tang | N/A | Boot030007 + * 04.00.00 | 02/01/2012 | mingqing.tang | N/A | Boot040001 + * 04.02.00 | 16/01/2012 | mingqing.tang | N/A | Boot040003 + * 04.08.00 | 04/04/2012 | mingqing.tang | N/A | Boot040009 + * 05.00.00 | 19/06/2013 | heli.zhang | N/A | Boot050001 + * 05.01.00 | 27/03/2014 | mingqing.tang | N/A | Boot050002 + * + *****************************************************************************/ +#ifndef _BL_DCM_H_ +#define _BL_DCM_H_ +#include "bl_typedefs.h" +#include "bl_dcm_funcfg.h" +#include "bl_can_tp.h" + +/***************************************************************************** + * QAC Suppression + *****************************************************************************/ +/*PRQA S 783,3205,3210,3447,3448,3453 EOF*/ +/* + * 783:A subsequent declaration of the identifier means that it is being used + * both as a structure/union member and also as a label, ordinary identifier. + * The member of the structure is used through the structure object. + * + * 3205:The identifier is not used and could be removed. + * The bl_Adapter_t is used by the specifically adapter such as UDS platform in + * the bl_adpt_uds_platform.c + * + * 3210:The global identifier is declared but is not used. + * The functions are used in the bl_security_cfg.c file. + * + * MISRA-C:2004 8.8(3447):The identifier has external linkage but this + * declaration is not in a header file. + * The function Declarations are in the header file. + * + * MISRA-C:2004 5.3(3448):Declaration of typedef is not in a header file. + * The bl_SecurityDelay_t is declared in the header file. + * + * MISRA-C:2004 19.7(3453):A function could probably be used instead of this + * function-like macro. + * These macros have no side-effect. + * + */ + +/***************************************************************************** + * Macro Definitions + *****************************************************************************/ +/** \brief Buffer status.*/ +#define DCM_STATUS_BUFFER_RECV_LOCK (0x0001U) +#define DCM_STATUS_BUFFER_PROC_LOCK (0x0002U) +#define DCM_STATUS_BUFFER_SEND_LOCK (0x0004U) +#define DCM_STATUS_BUFFER_UNLOCK (0x0000U) + +#define DCM_DOWNSTATUS_INDEX (0x01U) + +#define DCM_MAKE_FLAG(flag) (RTE_USER_FLAG_GROUP_1 | (flag)) //0x40000000UL + +#define DCM_DEFAULT_STATUS_MASK DCM_MAKE_FLAG(RTE_DOWN_STATUS_USER_MASK) + +#define DCM_STATUS_SESSION_DEFAULT DCM_MAKE_FLAG(0x01UL) +#define DCM_STATUS_SESSION_PROGRAMMING DCM_MAKE_FLAG(0x02UL) +#define DCM_STATUS_SESSION_EXTENDED DCM_MAKE_FLAG(0x04UL) +#define DCM_STATUS_SESSION_SUPPLY DCM_MAKE_FLAG(0x08UL) + +#define DCM_STATUS_FUNCTION_REQUEST DCM_MAKE_FLAG(0x10UL) //08 +#define DCM_STATUS_PHYSICAL_REQUEST DCM_MAKE_FLAG(0x20UL) //10 + +#define DCM_STATUS_SECURITY_LOCK_1 DCM_MAKE_FLAG(0x100UL) +#define DCM_STATUS_SECURITY_UNLOCK_1 DCM_MAKE_FLAG(0x200UL) +#define DCM_STATUS_SECURITY_WAITKEY_1 DCM_MAKE_FLAG(0x400UL) + +#define DCM_STATUS_SECURITY_LOCK_2 DCM_MAKE_FLAG(0x800UL) +#define DCM_STATUS_SECURITY_UNLOCK_2 DCM_MAKE_FLAG(0x1000UL) +#define DCM_STATUS_SECURITY_WAITKEY_2 DCM_MAKE_FLAG(0x2000UL) + +#define DCM_STATUS_SECURITY_LOCK_3 DCM_MAKE_FLAG(0x4000UL) +#define DCM_STATUS_SECURITY_UNLOCK_3 DCM_MAKE_FLAG(0x8000UL) +#define DCM_STATUS_SECURITY_WAITKEY_3 DCM_MAKE_FLAG(0x10000UL) + +#define DCM_SESSION_MASK (DCM_STATUS_SESSION_DEFAULT \ + | DCM_STATUS_SESSION_PROGRAMMING \ + | DCM_STATUS_SESSION_EXTENDED \ + | DCM_STATUS_SESSION_SUPPLY) +#define DCM_FUNCTIONAL_MASK DCM_STATUS_FUNCTION_REQUEST + +#define DCM_FUNANDPHY_MASK (DCM_STATUS_FUNCTION_REQUEST \ + | DCM_STATUS_PHYSICAL_REQUEST) + +#define DCM_SECURITYACCESS_1_MASK (DCM_STATUS_SECURITY_LOCK_1 \ + | DCM_STATUS_SECURITY_UNLOCK_1 \ + | DCM_STATUS_SECURITY_WAITKEY_1) + +#define DCM_SECURITYACCESS_2_MASK (DCM_STATUS_SECURITY_LOCK_2 \ + | DCM_STATUS_SECURITY_UNLOCK_2 \ + | DCM_STATUS_SECURITY_WAITKEY_2) + +#define DCM_SECURITYACCESS_3_MASK (DCM_STATUS_SECURITY_LOCK_3 \ + | DCM_STATUS_SECURITY_UNLOCK_3 \ + | DCM_STATUS_SECURITY_WAITKEY_3) + +#define DCM_SECURITYACCESS_MASK (DCM_STATUS_SECURITY_LOCK_1 \ + | DCM_STATUS_SECURITY_UNLOCK_1 \ + | DCM_STATUS_SECURITY_LOCK_2 \ + | DCM_STATUS_SECURITY_UNLOCK_2 \ + | DCM_STATUS_SECURITY_LOCK_3 \ + | DCM_STATUS_SECURITY_UNLOCK_3) + +#define DCM_NEGATIVE_RESPONSE_SIZE (0x03u) +#define DCM_NEGATIVE_RESPONSE_CODE (0x7Fu) +#define DCM_NEGATIVE_RESPONSE_ID_POS (1) +#define DCM_NEGATIVE_RESPONSE_NRC_POS (2) + +/*bl_ResponseCode_t.*/ +#define DCM_E_POSITIVERESPONSE (0x00u) +#define DCM_E_GENERALREJECT (0x10u) +#define DCM_E_SERVICENOTSUPPORTED (0x11u) +#define DCM_E_SUBFUNCTIONNOTSUPPORTED (0x12u) +#define DCM_E_INCORRECTMESSAGELENGTHORINVALIDFORMAT (0x13u) +#define DCM_E_CONDITIONSNOTCORRECT (0x22u) +#define DCM_E_REQUESTSEQUENCEERROR (0x24u) +#define DCM_E_REQUESTOUTOFRANGE (0x31u) +#define DCM_E_SECURITYACCESSDENIED (0x33u) +#define DCM_E_INVALIDKEY (0x35u) +#define DCM_E_EXCEEDNUMBEROFATTEMPTS (0x36u) +#define DCM_E_REQUIREDTIMEDELAYNOTEXPIRED (0x37u) +#define DCM_E_UPLOADDOWNLOADNOTACCEPTED (0x70u) +#define DCM_E_TRANSFERDATASUSPENDED (0x71u) +#define DCM_E_GENERALPROGRAMMINGFAILURE (0x72u) +#define DCM_E_WRONGBLOCKSEQUENCECOUNTER (0x73u) +#define DCM_E_REQUESTCORRECTLYRECEIVED_RESPONSEPENDING (0x78u) +#define DCM_E_SUBFUNCTIONNOTSUPPORTEDINACTIVESESSION (0x7Eu) +#define DCM_E_SERVICENOTSUPPORTEDINACTIVESESSION (0x7Fu) + +/***************************************************************************** + * Type Declarations + *****************************************************************************/ +/** \brief A alias of the struct _tag_DcmServiceHeader.*/ +typedef struct _tag_DcmServiceHeader bl_DcmServiceHeader_t; +/** \brief A alias of the struct _tag_DcmService.*/ +typedef struct _tag_DcmService bl_DcmService_t; +/** \brief A alias of the struct _tag_DcmBuffer.*/ +typedef struct _tag_DcmBuffer bl_DcmBuffer_t; + +/***************************************************************************** + * Structure Definitions + *****************************************************************************/ +/** \brief This is header of service or subfunction or did.*/ +struct _tag_DcmServiceHeader +{ + bl_u8_t type; + bl_ResponseCode_t resCode; + bl_ResponseCode_t sessionResCode; + bl_BufferSize_t (*MakeId)(const bl_Buffer_t *buffer, bl_u16_t *id); +}; + +/** \brief This is info of service or subfunction or did.*/ +struct _tag_DcmService +{ + bl_u16_t id; + bl_u16_t number; + bl_BufferSize_t minSize; + bl_BufferSize_t maxSize; + bl_u32_t flag; + const struct _tag_DcmService *serviceList; + const struct _tag_DcmServiceHeader *header; + bl_ResponseCode_t (*Callback)(bl_BufferSize_t size, bl_Buffer_t *buffer, + bl_BufferSize_t *respSize); +}; + +/** \brief This is info of dcm buffer.*/ +struct _tag_DcmBuffer +{ + bl_u16_t status; + bl_u16_t index; + bl_BufferSize_t recvSize; + bl_BufferSize_t tranSize; + bl_BufferSize_t totalSize; + bl_Buffer_t *buffer; +}; + +/***************************************************************************** + * External Global Variable Declarations + *****************************************************************************/ +/** \brief The service header of dcm module.*/ +extern const bl_DcmServiceHeader_t g_DcmServiceHeader; + +/** \brief The subid header of service.*/ +extern const bl_DcmServiceHeader_t g_DcmSubIdHeader; + +/** \brief The did header of service.*/ +extern const bl_DcmServiceHeader_t g_DcmDidHeader; + +/***************************************************************************** + * External Function Prototype Declarations + *****************************************************************************/ +/** \brief Initialize the dcm module.*/ +extern void Dcm_Init(void); +/** \brief Mainfunction of the dcm module.*/ +extern void Dcm_MainFunction(void); +/** \brief Timerfunction of the dcm module.*/ +extern void Dcm_TimerFunction(void); +/** \brief Start the S3 timer.*/ +extern void Dcm_StartS3Timer(void); +/** \brief Stop the S3 timer.*/ +extern void Dcm_StopS3Timer(void); +/** \brief Check whether the response is suspended.*/ +extern bl_Return_t Dcm_IsSuspendedResponse(void); + +/** \brief Start reception.*/ +extern bl_Return_t Dcm_StartOfReception(bl_BufferSize_t size); +/** \brief Copy received data.*/ +extern bl_Return_t Dcm_CopyRxData(bl_BufferSize_t size, + const bl_Buffer_t *data); +/** \brief Indicate received result to the upper*/ +extern void Dcm_RxIndication(bl_u8_t taType, bl_CanTpResult_t result); +/** \brief Copy transmittied data.*/ +extern bl_Return_t Dcm_CopyTxData(bl_BufferSize_t size, bl_Buffer_t *data); +/** \brief Confirm transmitting result to the upper.*/ +extern void Dcm_TxConfirmation(bl_CanTpResult_t result); + +#endif + diff --git a/code_boot_out/asil/middle/autosar_bl/inc/bl_flash.h b/code_boot_out/asil/middle/autosar_bl/inc/bl_flash.h new file mode 100644 index 0000000..69c21ee --- /dev/null +++ b/code_boot_out/asil/middle/autosar_bl/inc/bl_flash.h @@ -0,0 +1,98 @@ +/**************************************************************************//** + * + * \copyright This software is the property of Technologies. Any + * information contained in this doc should not be reproduced, + * or used, or disclosed without the written authorization from + * Technologies. + * + * \brief This is the header file of the flash module. + * + * \file bl_flash.h + * \ingroup driver_module + * \author + * + * \version 1.0.0 + * \date 15/05/2014 + * + * \par Changelist + * Version | Date | Authors | CR# | Descriptions + * -------- | ---------- | ---------------- | --- | ------------- + * 01.00.00 | 15/05/2014 | ning.chen | N/A | BootDrv010001 + *****************************************************************************/ +#ifndef _BL_FLASH_H_ +#define _BL_FLASH_H_ +#include "bl_typedefs.h" +#include "bl_flash_if.h" +#include "common_types.h" +#include "bl_system_cfg.h" +#include "boot_app_cfg.h" +#include "nvm.h" + +/***************************************************************************** + * QAC Suppression + *****************************************************************************/ +/*PRQA S 3210,3447,3453 EOF*/ +/* + * 3210:The global identifier is declared but is not used. + * The functions are used in the bl_security_cfg.c file. + * + * MISRA-C:2004 8.8(3447):The identifier has external linkage but this + * declaration is not in a header file. + * The function Declarations are in the header file. + * + * MISRA-C:2004 19.7(3453):A function could probably be used instead of this + * function-like macro. + * + */ + +/***************************************************************************** + * Macro Definitions + *****************************************************************************/ +//實際沒有用到的宏 +#define FLASH_DRIVER_VERSION_TYPE (0x8001u) +#define FLASH_DRIVER_VERSION_INDEX (0x0000u) +#define FLASH_DRIVER_VERSION_MAGIC (0x47313936UL) +#define FLASH_DRIVER_VERSION_VERSION (0x00010000UL) + +/* +#define FLASHIF_DRIVER_MAGIC_VALUE (0x47313936UL) +#define FLASHIF_DRIVER_VERSION_VALUE (0x00010000UL) +*/ + +#define FLASH_START_ADRESS (APP_ADRRESS_START) +#define FLASH_END_ADRESS (FLASH_P_BLOCK_END_ADDR) // stm32f107VC +#define FLASH_ERASE_SIZE (FLASH_P_BLOCK_SECTOR_SIZES) //一個sector 大小512 --stm32f107vc = 0x800 +#define FLASH_ERASE_VALUE (0xFFu) +#define FLASH_PHRASE_SIZE (FLASH_P_PAGE_SIZES) //page大小 = 8 stm32f107vc = 0x800 +#define FLASH_PHRASE_SIZE_HALF (FLASH_P_PAGE_SIZES/2) +#define FLASH_RESET_TIME_CNT (0) +#define FLASH_OVER_TIME_CNT (0x10000u) + +//可能要干掉 +#define FLASH_DRIVER_INIT_OFFSET (0x0Cu) +#define FLASH_DRIVER_DEINIT_OFFSET (0x10u) +#define FLASH_DRIVER_ERASE_OFFSET (0x14u) +#define FLASH_DRIVER_WRITE_OFFSET (0x18u) + + +/***************************************************************************** + * Type Declarations + *****************************************************************************/ + + +void Flash_Init(bl_FlashDrvParam_t *par); +void Flash_Deinit(bl_FlashDrvParam_t *par); +void Flash_Write(bl_FlashDrvParam_t *par); +void Flash_Erase(bl_FlashDrvParam_t *par); + + +extern void Flash_Read(bl_FlashDrvParam_t *par); + +#define FLASH_DRIVER_INIT(sa, pp) Flash_Init(pp) +#define FLASH_DRIVER_DEINIT(sa, pp) Flash_Deinit(pp) +#define FLASH_DRIVER_ERASE(sa, pp) Flash_Erase(pp) +#define FLASH_DRIVER_WRITE(sa, pp) Flash_Write(pp) + + + +#endif diff --git a/code_boot_out/asil/middle/autosar_bl/inc/bl_flash_if.h b/code_boot_out/asil/middle/autosar_bl/inc/bl_flash_if.h new file mode 100644 index 0000000..3f2dad8 --- /dev/null +++ b/code_boot_out/asil/middle/autosar_bl/inc/bl_flash_if.h @@ -0,0 +1,161 @@ +/**************************************************************************//** + * + * \copyright This software is the property of Technologies. Any + * information contained in this doc should not be reproduced, + * or used, or disclosed without the written authorization from + * Technologies. + * + * \brief This is a head file of bl_flash_if. + * + * \file bl_flash_if.h + * \author + * + * \version 5.1.0 + * \date 27/03/2014 + * + * \par Changelist + * Version | Date | Authors | CR# | Descriptions + * -------- | ---------- | ---------------- | --- | ------------ + * 02.00.00 | 19/08/2013 | haiping.wang | N/A | Boot020001 + * 05.01.00 | 27/03/2014 | mingqing.tang | N/A | Boot050002 + * + *****************************************************************************/ +#ifndef _BL_FLASH_IF_H_ +#define _BL_FLASH_IF_H_ +#include "bl_typedefs.h" +#include "bl_rte_funcfg.h" +#include "bl_flash_if_funcfg.h" + +/***************************************************************************** + * QAC Suppression + *****************************************************************************/ +/*PRQA S 783,3205,3210,3447 EOF*/ +/* + * 783:A subsequent declaration of the identifier means that it is being used + * both as a structure/union member and also as a label, ordinary identifier. + * The member of the structure is used through the structure object. + * + * 3205:The identifier is not used and could be removed. + * + * 3210:The global identifier is declared but is not used. + * The functions are used in the bl_security_cfg.c file. + * + * MISRA-C:2004 8.8(3447):The identifier has external linkage but this + * declaration is not in a header file. + * The function Declarations are in the header file. + * + */ + +/***************************************************************************** + * Macro Definitions + *****************************************************************************/ +/** \breif The flash IF is not initialized.*/ +#define FLASHIF_STATUS_NOINIT (0) +/** \breif The flash IF is idle.*/ +#define FLASHIF_STATUS_IDLE (1) +/** \breif The flash IF is writing data to flash device.*/ +#define FLASHIF_STATUS_WRITING (2) +/** \breif The flash IF is erasing a flash block.*/ +#define FLASHIF_STATUS_ERASING (3) + +/***************************************************************************** + * Type Declarations + *****************************************************************************/ +/** \brief A alias of the struct _tag_FlashIfBlockInfo.*/ +typedef struct _tag_FlashIfBlockInfo bl_FlashIfBlockInfo_t; +/** \brief A alias of the struct _tag_FlashIfContext.*/ +typedef struct _tag_FlashIfContext bl_FlashIfContext_t; +/** \brief A alias of the struct _tag_FlashDrvParam_t.*/ +typedef struct _tag_FlashDrvParam bl_FlashDrvParam_t; +/** \brief A alias of the struct _tag_FlashDrvHeader.*/ +typedef struct _tag_FlashDrvHeader bl_FlashDrvHeader_t; + +/** \brief A pointer point to the operations function of flash driver.*/ +typedef void + (FLASHIF_DRIVER_FUN_POS * FLASHIF_DRIVER_FUNPTR_POS bl_FlashDrvFun_t) + (bl_FlashDrvParam_t *par); +/***************************************************************************** + * Structure Definitions + *****************************************************************************/ +struct _tag_FlashIfBlockInfo +{ + bl_Address_t address; /**< the start address of a block.*/ + bl_Size_t totalSize; /**< the total size of a block.*/ + bl_Size_t sectorSize; /**< the eraseable size.*/ + bl_Size_t pageSize; /**< the writable size.*/ +#if (FLASHIF_FUN_ERASE_BY_BLOCKID == BL_FUN_ON) + bl_u16_t phyBlockId; /**< the start physical eraseable block id.*/ +#endif +}; + +struct _tag_FlashIfContext +{ + bl_u16_t startId; /**< the start index of operating block.*/ // 就是 g_FlashIfBlockList 的buf id + bl_u16_t endId; /**< the end index of operating block.*/ + bl_Address_t address; /**< the address of a operation.*/ + bl_Size_t size; /**< the remain size of a operation.*/ + bl_Size_t opsSize; /**< the size of one operation.*/ + bl_Size_t doneSize; /**< the operated size of one operation.*/ + bl_u32_t opsTime; /**< the time of one operation*/ + bl_u32_t timeout; /**< the timer of one operation*/ + bl_Buffer_t *buffer; /**< the buffer of operating block.*/ + const struct _tag_FlashIfBlockInfo *block; /**< the current block.*/ + bl_Return_t (* Operate)(const struct _tag_FlashIfBlockInfo *block, + bl_Address_t address, + bl_Size_t size, + const bl_Buffer_t *buffer); +}; + +struct _tag_FlashDrvParam +{ + bl_u8_t type; /**< the type*/ //好像是没用的變量 + bl_Return_t errCode; /**< the result of a flash operation*/ +#if (FLASHIF_FUN_ERASE_BY_BLOCKID == BL_FUN_ON) + bl_u16_t phyBlockId; /**< the physical block id.*/ +#endif + bl_Address_t address; /**< the start address of a flash operation.*/ + bl_Size_t size; /**< the size of a flash operation.*/ + bl_Buffer_t *buffer; /**< the contents of data of a flash operation.*/ + void (*FeedDog)(void); /**< the feed watchdog interface.*/ +}; + +struct _tag_FlashDrvHeader +{ + bl_u16_t type; /**< The type of the flash driver.*/ + bl_u16_t index; /**< The index of the flash driver.*/ + bl_u32_t magic; /**< The magic value of the flash driver*/ + bl_u32_t version; /**< The current of the flash driver.*/ + bl_FlashDrvFun_t Init; /**< Initialize the flash drvier.*/ + bl_FlashDrvFun_t Deinit;/**< Deinitialize the flash drvier*/ + bl_FlashDrvFun_t Erase; /**< Erase a block of the flash device.*/ + bl_FlashDrvFun_t Write; /**< Write data to the flash device.*/ +}; + +/***************************************************************************** + * External Global Variable Declarations + *****************************************************************************/ + +/***************************************************************************** + * External Function Prototype Declarations + *****************************************************************************/ +/** \brief Initialize the flash IF module.*/ +extern bl_Return_t Flsif_Init(void); +/** \brief deinitialize the flash IF module.*/ +extern bl_Return_t Flsif_DeInit(void); +/** \brief read the data from the flash.*/ +extern bl_Return_t Flsif_Read(bl_Address_t address, + bl_Size_t size, + bl_Buffer_t *buffer); +/** \brief begin to write data to the flash.*/ +extern bl_Return_t Flsif_Write(bl_Address_t address, + bl_Size_t size, + const bl_Buffer_t *buffer); +/** \brief begin to erase the flash.*/ +extern bl_Return_t Flsif_Erase(bl_Address_t address, + bl_Size_t size); + + +void flash_if_test(void); + +#endif + diff --git a/code_boot_out/asil/middle/autosar_bl/inc/bl_logical_block.h b/code_boot_out/asil/middle/autosar_bl/inc/bl_logical_block.h new file mode 100644 index 0000000..0e412fe --- /dev/null +++ b/code_boot_out/asil/middle/autosar_bl/inc/bl_logical_block.h @@ -0,0 +1,267 @@ +/**************************************************************************//** + * + * \copyright This software is the property of Technologies. Any + * information contained in this doc should not be reproduced, + * or used, or disclosed without the written authorization from + * Technologies. + * + * \brief This is a head file of the logical block manager module. + * + * \file bl_logical_block.h + * \ingroup lb_manager_module + * \author + * + * \version 5.1.0 + * \date 27/03/2014 + * + * \par Changelist + * Version | Date | Authors | CR# | Descriptions + * -------- | ---------- | ---------------- | --- | ------------ + * 03.00.00 | 12/09/2011 | mingqing.tang | N/A | Boot030001 + * 03.01.00 | 16/09/2011 | mingqing.tang | N/A | Boot030002 + * 03.02.00 | 23/09/2011 | mingqing.tang | N/A | Boot030003 + * 03.03.00 | 17/10/2011 | mingqing.tang | N/A | Boot030004 + * 03.05.00 | 27/10/2011 | mingqing.tang | N/A | Boot030006 + * 03.06.00 | 08/11/2011 | mingqing.tang | N/A | Boot030007 + * 03.08.00 | 30/11/2011 | mingqing.tang | N/A | Boot030009 + * 03.11.00 | 15/02/2012 | mingqing.tang | N/A | Boot030012 + * 03.14.00 | 13/03/2012 | mingqing.tang | N/A | Boot030015 + * 03.15.00 | 26/03/2012 | mingqing.tang | N/A | Boot030016 + * 03.18.00 | 29/05/2012 | mingqing.tang | N/A | Boot030019 + * 04.00.00 | 15/07/2012 | mingqing.tang | N/A | Boot040001 + * 04.01.00 | 15/07/2012 | mingqing.tang | N/A | Boot040002 + * 04.03.00 | 15/07/2012 | mingqing.tang | N/A | Boot040004 + * 04.04.00 | 15/07/2012 | mingqing.tang | N/A | Boot040005 + * 04.10.00 | 15/07/2012 | mingqing.tang | N/A | Boot040011 + * 04.12.00 | 15/07/2012 | mingqing.tang | N/A | Boot040013 + * 04.16.00 | 15/07/2012 | mingqing.tang | N/A | Boot040016 + * 04.19.00 | 15/07/2012 | mingqing.tang | N/A | Boot040020 + * 04.21.00 | 15/07/2012 | mingqing.tang | N/A | Boot040022 + * 04.26.00 | 15/07/2012 | mingqing.tang | N/A | Boot040026 + * 04.27.00 | 15/07/2012 | mingqing.tang | N/A | Boot040028 + * 04.30.00 | 10/04/2013 | mingqing.tang | N/A | Boot040031 + * 05.00.00 | 19/06/2013 | mingqing.tang | N/A | Boot030001 + * 05.01.00 | 27/03/2014 | mingqing.tang | N/A | Boot050002 + * + *****************************************************************************/ +#ifndef _BL_LOGICAL_BLOCK_H_ +#define _BL_LOGICAL_BLOCK_H_ +#include "common_types.h" +#include "bl_typedefs.h" +#include "bl_logical_block_funcfg.h" +#include "bl_rte.h" + +/***************************************************************************** + * QAC Suppression + *****************************************************************************/ +/*PRQA S 783,3205,3210,3447,3448 EOF*/ +/* + * 783:A subsequent declaration of the identifier means that it is being used + * both as a structure/union member and also as a label, ordinary identifier. + * The member of the structure is used through the structure object. + * + * 3205:The identifier is not used and could be removed. + * The bl_Adapter_t is used by the specifically adapter such as UDS platform in + * the bl_adpt_uds_platform.c + * + * 3210:The global identifier is declared but is not used. + * The functions are used in the bl_security_cfg.c file. + * + * MISRA-C:2004 8.8(3447):The identifier has external linkage but this + * declaration is not in a header file. + * The function Declarations are in the header file. + * + * MISRA-C:2004 5.3(3448):Declaration of typedef is not in a header file. + * The bl_SecurityDelay_t is declared in the header file. + * + */ + +/***************************************************************************** + * Macro Definitions + *****************************************************************************/ +#define LBM_TYPE_APPLICATION (0x0001u) +#define LBM_TYPE_CALDATA (0x0002u) +#define LBM_TYPE_DRIVER (0x0004u) +#define LBM_TYPE_VIRTUAL (0x0008u) +//這幾個狀態。要好好研究 +#define LBM_STATUS_NOT_INIT BL_STATUS_NOT_INIT +#define LBM_STATUS_VALID (0x0001u) +#define LBM_STATUS_INVALID (0x0002u) +#define LBM_STATUS_UPDATING (0x0003u) +#define LBM_STATUS_UPDATED (0x0004u) +#define LBM_STATUS_NOT_CARE (0x0005u) +#define LBM_STATUS_NOT_EXIST (0xFFFFu) + +#define LBM_INVALID_ATTEMPT_COUNT (0) +#define LBM_ERROR_LBID BL_ERROR_ID_16BIT +#define LBM_COUNTER_MAX_SIZE (4) + +#define LBM_ERR_UPDATED_ID BL_ERR_USER_CODE_01 //值是100 + +/***************************************************************************** + * Type Declarations + *****************************************************************************/ +/** \brief A alias of the struct _tag_Segment.*/ +typedef struct _tag_Segment bl_Segment_t; +/** \brief A alias of the struct _tag_SegmentList.*/ +typedef struct _tag_SegmentList bl_SegmentList_t; +/** \brief A alias of the struct _tag_LogicalBlock.*/ +typedef struct _tag_LogicalBlock bl_LogicalBlock_t; +/** \brief A alias of the struct _tag_LogicalBlockList.*/ +typedef struct _tag_LogicalBlockList bl_LogicalBlockList_t; + +/***************************************************************************** + * Structure Definitions + *****************************************************************************/ +/** \brief This is a segment indicated a region in a logical block.*/ +struct _tag_Segment +{ + bl_u32_t address; /**< the address of a segment in the logical block.*/ + bl_u32_t size; /**< the size of a segment in the logical block.*/ +}; + +/** + * \brief This is a list of segments, these segments are in the same logical + * block. + */ +struct _tag_SegmentList +{ + bl_u16_t number; /**< the number of segments in this list.*/ + const struct _tag_Segment *segList; /**< the segments list.*/ +}; + +/** + * \brief This is a logical block, it indicates a independent unit used to + * download. + */ +struct _tag_LogicalBlock +{ + bl_u16_t type; + bl_u16_t index; + bl_u16_t *status; + bl_u16_t memId; + bl_DownStatus_t getLbMask; + bl_DownStatus_t writeLbMask; + bl_DownStatus_t eraseLbMask; + bl_DownStatus_t verifyLbMask; + bl_Address_t address; + bl_Size_t size; + bl_Address_t offsetMask; + bl_u16_t validFlagId; + bl_u16_t headerId; + bl_u16_t fpId; + bl_u16_t succCntId; + bl_u16_t attemptCntId; + bl_AttemptCounter_t maxAttemptCnt; + const struct _tag_SegmentList segments; +}; + +/** + * \brief This is a list of logical blocks, includes all supported logical + * block. + */ +struct _tag_LogicalBlockList +{ + bl_u16_t status; + bl_u16_t number; + bl_u16_t appNum; + bl_u16_t calNum; + bl_u16_t drvNum; + bl_u16_t virNum; + const struct _tag_LogicalBlock *lbList; +}; + +typedef union +{ + bl_u32_t dw; + bl_u8_t byt[4]; + struct{ + bl_u16_t f_attmp; + bl_u16_t success; + }dt; +}bl_u_cnt_t; + +typedef struct +{ + bl_u8_t fingprnt[16]; + bl_u_cnt_t pgm_counter; + bl_u8_t pgm_date[4]; + //bl_us32_t app_valid; +}bl_flash_t; + + +/***************************************************************************** + * External Global Variable Declarations + *****************************************************************************/ + +/***************************************************************************** + * External Function Prototype Declarations + *****************************************************************************/ +/** \brief Initialize the logical block module.*/ +extern bl_Return_t Lbm_Init(void); +/** \brief Get a logical block id.*/ +extern bl_Return_t Lbm_GetBlock(bl_DownContext_t *dct, + bl_Address_t address, + bl_Size_t size); +/** \brief Clear the logical block information of the download context*/ +extern void Lbm_ClearBlock(bl_DownContext_t *dct); +/** \brief write data into a logical block.*/ +extern bl_Return_t Lbm_Write(const bl_DownContext_t *dct, + bl_Address_t address, + bl_Size_t size, + const bl_Buffer_t *buffer); +/** \brief erase a logical block.*/ +extern bl_Return_t Lbm_Erase(const bl_DownContext_t *dct); +/** \brief verify whether a logical block is valid.*/ +extern bl_Return_t Lbm_Verify(const bl_DownContext_t *dct, + bl_Size_t size, + const bl_Buffer_t *value); +/** \brief check whether all of logical blocks are valid.*/ +extern bl_Return_t Lbm_IsAllValid(void); +/** \brief update the status of all of logical blocks.*/ +extern void Lbm_UpdateStatus(void); +/** \brief save the status of a logical block.*/ +extern bl_Return_t Lbm_SaveStatus(bl_u16_t id); //把 flash app valid 值寫進去 +/** \brief save the status of all of logical blocks.*/ +extern bl_Return_t Lbm_SaveAllStatus(void); +/** \brief clear the status of a logical block.*/ +extern bl_Return_t Lbm_ClearStatus(bl_u16_t id); +/** \brief get the status of a logical block.*/ +extern bl_Return_t Lbm_GetStatus(bl_u16_t id,bl_u16_t *status); +#if (LBM_FUN_SAVE_FINGERPRINT == BL_FUN_ON) +/** \brief save the fingerprint information of the logical blocks.*/ +extern void Lbm_SaveFingerprint(const bl_Buffer_t *buffer); +#endif + +#if (LBM_FUN_SAVE_PROGRAMMING_DATE == BL_FUN_ON) + void Lbm_SaveProgramDate(const bl_Buffer_t *buffer); +#endif + +#if (LBM_FUN_ATTEMPT_COUNTER == BL_FUN_ON) +bl_AttemptCounter_t Lbm_GetAttmptCount(void); +//void Lbm_SavePgmFattmpCnt(const bl_Buffer_t *buffer); + +#endif +#if (LBM_FUN_SUCCESS_COUNTER == BL_FUN_ON) +bl_SuccessCounter_t Lbm_GetSuccesCount(void); +//void Lbm_SavePgmSuccCnt(const bl_Buffer_t *buffer); + +#endif + +#if 0 +bl_Return_t _Lbm_erase_(bl_u16_t did); + +bl_Return_t Lbm_read_eeprom_Data(bl_u8_t did); + +bl_Return_t _Lbm_SaveDataToRom(bl_u8_t w_index); +#endif + + +void lb_logic_block_init_flashdrv(void); +u8 lb_logic_block_read_app_valid1(void); +bl_u8_t check_program_valid_nores_is_valid(void); +bl_u8_t check_program_valid_to_app_valid(void); +void clear_program_valid_to_app_valid(void); + +#endif + diff --git a/code_boot_out/asil/middle/autosar_bl/inc/bl_memory.h b/code_boot_out/asil/middle/autosar_bl/inc/bl_memory.h new file mode 100644 index 0000000..3eb8d37 --- /dev/null +++ b/code_boot_out/asil/middle/autosar_bl/inc/bl_memory.h @@ -0,0 +1,158 @@ +/**************************************************************************//** + * + * \copyright This software is the property of Technologies. Any + * information contained in this doc should not be reproduced, + * or used, or disclosed without the written authorization from + * Technologies. + * + * \brief This is a head file of the memory manager module. + * + * \file bl_memory.h + * \ingroup memory_manager_module + * \author + * + * \version 5.1.0 + * \date 27/03/2014 + * + * \par Changelist + * Version | Date | Authors | CR# | Descriptions + * -------- | ---------- | ---------------- | --- | ------------ + * 05.01.00 | 27/03/2014 | cong.xu | N/A | Boot050002 + * + *****************************************************************************/ +#ifndef _BL_MEMORY_H_ +#define _BL_MEMORY_H_ +#include "bl_typedefs.h" +#include "bl_memory_funcfg.h" + +/***************************************************************************** + * QAC Suppression + *****************************************************************************/ +/*PRQA S 783,3205,3210,3447,3448 EOF*/ +/* + * 783:A subsequent declaration of the identifier means that it is being used + * both as a structure/union member and also as a label, ordinary identifier. + * The member of the structure is used through the structure object. + * + * 3205:The identifier is not used and could be removed. + * The bl_Adapter_t is used by the specifically adapter such as UDS platform in + * the bl_adpt_uds_platform.c + * + * 3210:The global identifier is declared but is not used. + * The functions are used in the bl_security_cfg.c file. + * + * MISRA-C:2004 8.8(3447):The identifier has external linkage but this + * declaration is not in a header file. + * The function Declarations are in the header file. + * + * MISRA-C:2004 5.3(3448):Declaration of typedef is not in a header file. + * The bl_SecurityDelay_t is declared in the header file. + * + */ + +/***************************************************************************** + * Macro Definitions + *****************************************************************************/ +#define MEM_MEMORY_TYPE_FLASH (0x0001u) /**< A flash.*/ +#define MEM_MEMORY_TYPE_EEPROM (0x0002u) /**< A eeprom.*/ +#define MEM_MEMORY_TYPE_RAM (0x0004u) /**< A ram.*/ +#define MEM_MEMORY_TYPE_VIRTUAL (0x0008u) /**< A logical memory.*/ +#define MEM_MEMORY_TYPE_EXT_FLASH (0x0010u) /**< like flash.*/ +#define MEM_MEMORY_TYPE_EXT_EEPROM (0x0020u) /**< like eeprom.*/ +#define MEM_MEMORY_TYPE_EXT_RAM (0x0040u) /**< like ram.*/ +#define MEM_MEMORY_TYPE_EXT_VIRTUAL (0x0080u) /**< like virtual.*/ +#define MEM_MEMORY_TYPE_EXTERNAL_DRV (0x8000u) /**< the extrnal driver.*/ + +#define MEM_MEMORY_TYPE_SIZE (2) /** the size of type of the memory.*/ +#define MEM_MEMORY_INDEX_SIZE (2) /** the size of index of the memory.*/ + +#define MEM_ERROR_DRVID BL_ERROR_ID_16BIT /**< invalid driver id.*/ +#define MEM_ERROR_MEMID BL_ERROR_ID_16BIT /**< invalid memory id.*/ + +/***************************************************************************** + * Type Declarations + *****************************************************************************/ +/** \brief A alias of the struct _tag_MemoryOperations.*/ +typedef struct _tag_MemoryOperations bl_MemoryOperations_t; +/** \brief A alias of the struct _tag_MemoryInfo.*/ +typedef struct _tag_MemoryInfo bl_MemoryInfo_t; +/** \brief A alias of the struct _tag_MemoryInfoList.*/ +typedef struct _tag_MemoryInfoList bl_MemoryInfoList_t; + +/***************************************************************************** + * Structure Definitions + *****************************************************************************/ +/** + * \brief the memory operations. + */ +struct _tag_MemoryOperations +{ + bl_Return_t (*Init)(void); /**< the initialization interface.*/ + bl_Return_t (*Deinit)(void); /**< the deinitialization interface.*/ + bl_Return_t (*Write)(bl_Address_t address, + bl_Size_t size, + const bl_Buffer_t *buffer); /**< the write interface.*/ + bl_Return_t (*Read)(bl_Address_t address, + bl_Size_t size, + bl_Buffer_t *buffer); /**< the read interface.*/ + bl_Return_t (*Erase)(bl_Address_t address, + bl_Size_t size); /**< the erase interface.*/ +}; + +/** + * \brief the memory informations. + */ +struct _tag_MemoryInfo +{ + bl_u16_t type; /**< the type of a memory.*/ + bl_u16_t index; /**< the index of a memory.*/ + bl_Address_t addr; /**< the base address of a memory.*/ + bl_Size_t size; /**< the size of a memory.*/ + const struct _tag_MemoryOperations * ops;/**< the operations list.*/ +}; + +/** + * \brief the list of the memory informations. + */ +struct _tag_MemoryInfoList +{ + bl_u16_t number; /**< the number of memory managed by module.*/ + const struct _tag_MemoryInfo *memList; /**< the memory information list.*/ +}; + +/***************************************************************************** + * External Global Variable Declarations + *****************************************************************************/ + +/***************************************************************************** + * External Function Prototype Declarations + *****************************************************************************/ +/** \brief This function is used to initialize the memory manager module.*/ +extern bl_Return_t bl_Mem_Init(void); +/** \brief This function is used to initialize a memory by id.*/ +extern bl_Return_t Mem_InitMemory(bl_u16_t id); +/** \brief This function is used to de-initialize a memory by id.*/ +extern bl_Return_t Mem_DeinitMemory(bl_u16_t id); +/** \brief This function is used to read data from a memory.*/ +extern bl_Return_t Mem_Read(bl_u16_t id, + bl_Address_t address, + bl_Size_t size, + bl_Buffer_t *buffer); +/** \brief This function is used to write data to a memory.*/ +extern bl_Return_t Mem_Write(bl_u16_t id, + bl_Address_t address, + bl_Size_t size, + const bl_Buffer_t *buffer); +/** \brief This function is used to erase a memory.*/ +extern bl_Return_t Mem_Erase(bl_u16_t id,bl_Address_t address,bl_Size_t size); +/** \brief This function is used to look for a memory.*/ +extern bl_Return_t Mem_LookforMemId(bl_u16_t type, + bl_u16_t index, + bl_u16_t *mid); +/** \brief This function is used to check the driver status.*/ +extern bl_Return_t Mem_IsExternalDrv(bl_u16_t id); +/** \brief This function is used to check the memory status.*/ +extern bl_Return_t Mem_IsReadable(bl_u16_t id); + +#endif + diff --git a/code_boot_out/asil/middle/autosar_bl/inc/bl_proc_passive_schedule.h b/code_boot_out/asil/middle/autosar_bl/inc/bl_proc_passive_schedule.h new file mode 100644 index 0000000..fe1270e --- /dev/null +++ b/code_boot_out/asil/middle/autosar_bl/inc/bl_proc_passive_schedule.h @@ -0,0 +1,69 @@ +/**************************************************************************//** + * + * \copyright This software is the property of Technologies. Any + * information contained in this doc should not be reproduced, + * or used, or disclosed without the written authorization from + * Technologies. + * + * \brief This is the head file of the passive process driver. + * + * \file bl_proc_passive_schedule.h + * \ingroup process_driver_module + * \author + * + * \version 5.1.0 + * \date 27/03/2014 + * + * \par Changelist + * Version | Date | Authors | CR# | Descriptions + * -------- | ---------- | ---------------- | --- | ------------ + * 04.00.00 | 12/03/2012 | mingqing.tang | N/A | Boot040001 + * 04.03.00 | 22/03/2012 | mingqing.tang | N/A | Boot040004 + * 04.07.00 | 18/04/2012 | mingqing.tang | N/A | Boot040008 + * 05.00.00 | 19/06/2013 | heli.zhang | N/A | Boot050001 + * 05.01.00 | 27/03/2014 | mingqing.tang | N/A | Boot050002 + * + *****************************************************************************/ +#ifndef _BL_PROC_PASSIVE_SCHEDULE_H_ +#define _BL_PROC_PASSIVE_SCHEDULE_H_ +#include "bl_typedefs.h" +#include "bl_adapter.h" + +/***************************************************************************** + * QAC Suppression + *****************************************************************************/ +/*PRQA S 3210,3447 EOF*/ +/* + * 3210:The global identifier is declared but is not used. + * The functions are used in the bl_process_driver.c file. + * + * MISRA-C:2004 8.8(3447):The identifier has external linkage but this + * declaration is not in a header file. + * The function Declarations are in the header file. + * + */ + +/***************************************************************************** + * Macro Definitions + *****************************************************************************/ + +/***************************************************************************** + * Type Declarations + *****************************************************************************/ + +/***************************************************************************** + * Structure Definitions + *****************************************************************************/ + +/***************************************************************************** + * External Global Variable Declarations + *****************************************************************************/ + +/***************************************************************************** + * External Function Prototype Declarations + *****************************************************************************/ +/** \brief Passive process driver schedule function.*/ +extern void Proc_PassiveSchedule(const bl_Adapter_t *adapter); + +#endif + diff --git a/code_boot_out/asil/middle/autosar_bl/inc/bl_process_driver.h b/code_boot_out/asil/middle/autosar_bl/inc/bl_process_driver.h new file mode 100644 index 0000000..44051fe --- /dev/null +++ b/code_boot_out/asil/middle/autosar_bl/inc/bl_process_driver.h @@ -0,0 +1,109 @@ +/**************************************************************************//** + * + * \copyright This software is the property of Technologies. Any + * information contained in this doc should not be reproduced, + * or used, or disclosed without the written authorization from + * Technologies. + * + * \brief This is the head file of the process driver module. + * + * \file bl_process_driver.h + * \ingroup process_driver_module + * \author + * + * \version 5.1.0 + * \date 27/03/2014 + * + * \par Changelist + * Version | Date | Authors | CR# | Descriptions + * -------- | ---------- | ---------------- | --- | ------------ + * 04.00.00 | 12/03/2012 | mingqing.tang | N/A | Boot040001 + * 04.03.00 | 22/03/2012 | mingqing.tang | N/A | Boot040004 + * 04.07.00 | 18/04/2012 | mingqing.tang | N/A | Boot040008 + * 05.00.00 | 19/06/2013 | heli.zhang | N/A | Boot050001 + * 05.01.00 | 27/03/2014 | mingqing.tang | N/A | Boot050002 + * + *****************************************************************************/ +#ifndef _BL_PROCESS_DRIVER_H_ +#define _BL_PROCESS_DRIVER_H_ +#include "bl_typedefs.h" +#include "bl_adapter.h" + +/***************************************************************************** + * QAC Suppression + *****************************************************************************/ +/*PRQA S 783,3205,3210,3447,3448 EOF*/ +/* + * 783:A subsequent declaration of the identifier means that it is being used + * both as a structure/union member and also as a label, ordinary identifier. + * The member of the structure is used through the structure object. + * + * 3205:The identifier is not used and could be removed. + * The bl_Adapter_t is used by the specifically adapter such as UDS platform in + * the bl_adpt_uds_platform.c + * + * 3210:The global identifier is declared but is not used. + * The functions are used in the bl_security_cfg.c file. + * + * MISRA-C:2004 8.8(3447):The identifier has external linkage but this + * declaration is not in a header file. + * The function Declarations are in the header file. + * + * MISRA-C:2004 5.3(3448):Declaration of typedef is not in a header file. + * The bl_SecurityDelay_t is declared in the header file. + * + */ + +/***************************************************************************** + * Macro Definitions + *****************************************************************************/ +#define PROC_DRIVER_TYPE_ACTIVE (0x0001u) +#define PROC_DRIVER_TYPE_PASSIVE (0x0002u) + +// 就是 Proc_PassiveSchedule(&g_UdsPlatformAdapter) +#define PROC_SCHEDULE() g_CurProcessDriver->Schedule \ + (g_CurProcessDriver->adapter) +/***************************************************************************** + * Type Declarations + *****************************************************************************/ +typedef struct _tag_ProcessDriver bl_ProcessDriver_t; + +typedef struct _tag_ProcessDriverList bl_ProcessDriverList_t; +/***************************************************************************** + * Structure Definitions + *****************************************************************************/ +/** \brief This is process driver info.*/ +struct _tag_ProcessDriver +{ + bl_u16_t type; + bl_u16_t index; + const struct _tag_Adapter *adapter; //指向 g_UdsPlatformAdapter + void (*Schedule)(const struct _tag_Adapter *adapter); //指向 Proc_PassiveSchedule +}; + +/** \brief This is process driver list info.*/ +struct _tag_ProcessDriverList +{ + bl_u16_t number; + const struct _tag_ProcessDriver *procList; +}; + +/***************************************************************************** + * External Global Variable Declarations + *****************************************************************************/ +/** \brief Point to current process driver.*/ +extern const bl_ProcessDriver_t *g_CurProcessDriver; + +/***************************************************************************** + * External Function Prototype Declarations + *****************************************************************************/ +/** \brief Initialize the process driver module.*/ +extern void Proc_Init(void); +/** \brief Activate the current process driver.*/ +extern bl_Return_t Proc_ActivateDriver(bl_u16_t id); +/** \brief timeout callback.*/ +extern void Proc_Timeout(void); +/** \brief system sleep callback.*/ +extern void Proc_Sleep(void); + +#endif diff --git a/code_boot_out/asil/middle/autosar_bl/inc/bl_ram.h b/code_boot_out/asil/middle/autosar_bl/inc/bl_ram.h new file mode 100644 index 0000000..6c95448 --- /dev/null +++ b/code_boot_out/asil/middle/autosar_bl/inc/bl_ram.h @@ -0,0 +1,77 @@ +/**************************************************************************//** + * + * \copyright This software is the property of Technologies. Any + * information contained in this doc should not be reproduced, + * or used, or disclosed without the written authorization from + * Technologies. + * + * \brief This is a head file of the ram module. + * + * \file bl_ram.h + * \ingroup ram_module + * \author + * + * \version 2.0.0 + * \date 25/09/2012 + * + * \par Changelist + * Version | Date | Authors | CR# | Descriptions + * -------- | ---------- | ---------- | --- | ------------ + * 02.00.00 | 25/09/2012 | xin.shang | N/A | Boot020001 + * + *****************************************************************************/ +#ifndef _BL_RAM_H_ +#define _BL_RAM_H_ +#include "bl_typedefs.h" + +/***************************************************************************** + * QAC Suppression + *****************************************************************************/ +/*PRQA S 3205,3210,3447,3448 EOF*/ +/* + * 3205:The identifier is not used and could be removed. + * The bl_Adapter_t is used by the specifically adapter such as UDS platform in + * the bl_adpt_uds_platform.c + * + * 3210:The global identifier is declared but is not used. + * The functions are used in the bl_security_cfg.c file. + * + * MISRA-C:2004 8.8(3447):The identifier has external linkage but this + * declaration is not in a header file. + * The function Declarations are in the header file. + * + * MISRA-C:2004 5.3(3448):Declaration of typedef is not in a header file. + * The bl_SecurityDelay_t is declared in the header file. + * + */ + +/***************************************************************************** + * Macro Definitions + *****************************************************************************/ + +/***************************************************************************** + * Type Declarations + *****************************************************************************/ + +/***************************************************************************** + * Structure Definitions + *****************************************************************************/ + +/***************************************************************************** + * External Global Variable Declarations + *****************************************************************************/ + +/***************************************************************************** + * External Function Prototype Declarations + *****************************************************************************/ +/** \brief This function is used to write ram memory.*/ +extern bl_Return_t Ram_Write(bl_Address_t address, + bl_Size_t size, + const bl_Buffer_t *buffer); +/** \brief This function is used to read ram memory.*/ +extern bl_Return_t Ram_Read(bl_Address_t address, + bl_Size_t size, + bl_Buffer_t *buffer); + +#endif + diff --git a/code_boot_out/asil/middle/autosar_bl/inc/bl_rte.h b/code_boot_out/asil/middle/autosar_bl/inc/bl_rte.h new file mode 100644 index 0000000..db57534 --- /dev/null +++ b/code_boot_out/asil/middle/autosar_bl/inc/bl_rte.h @@ -0,0 +1,285 @@ +/**************************************************************************//** + * + * \copyright This software is the property of Technologies. Any + * information contained in this doc should not be reproduced, + * or used, or disclosed without the written authorization from + * Technologies. + * + * \brief This is a head file of the runtime environment module. + * + * \file bl_rte.h + * \ingroup rte_module + * \author + * + * \version 5.1.0 + * \date 27/03/2014 + * + * \par Changelist + * Version | Date | Authors | CR# | Descriptions + * -------- | ---------- | ---------------- | --- | ------------ + * 01.00.00 | 17/03/2010 | hewei.zhang | N/A | Boot010001 + * 01.01.00 | 20/04/2010 | hewei.zhang | N/A | Boot010002 + * 01.03.00 | 28/05/2010 | hewei.zhang | N/A | Boot010004 + * 01.04.00 | 26/06/2010 | hewei.zhang | N/A | Boot010005 + * 01.08.00 | 24/08/2010 | hewei.zhang | N/A | Boot010009 + * 01.11.00 | 07/12/2010 | hewei.zhang | N/A | Boot010012 + * 02.00.00 | 21/02/2011 | mingqing.tang | N/A | Boot020001 + * 02.02.00 | 15/03/2011 | mingqing.tang | N/A | Boot020003 + * 02.07.00 | 14/06/2011 | mingqing.tang | N/A | Boot020008 + * 03.00.00 | 12/09/2011 | mingqing.tang | N/A | Boot030001 + * 03.03.00 | 17/10/2011 | mingqing.tang | N/A | Boot030004 + * 03.04.00 | 24/10/2011 | mingqing.tang | N/A | Boot030005 + * 03.10.00 | 03/01/2012 | mingqing.tang | N/A | Boot030011 + * 03.12.00 | 18/01/2012 | mingqing.tang | N/A | Boot030013 + * 03.18.00 | 29/05/2012 | mingqing.tang | N/A | Boot030019 + * 05.00.00 | 19/06/2013 | mingqing.tang | N/A | Boot050001 + * 05.01.00 | 27/03/2014 | mingqing.tang | N/A | Boot050002 + * + *****************************************************************************/ +#ifndef _BL_RTE_H_ +#define _BL_RTE_H_ +#include "bl_typedefs.h" +#include "bl_rte_funcfg.h" + +/***************************************************************************** + * QAC Suppression + *****************************************************************************/ +/*PRQA S 783,3205,3210,3447,3448,3453 EOF*/ +/* + * 783:A subsequent declaration of the identifier means that it is being used + * both as a structure/union member and also as a label, ordinary identifier. + * The member of the structure is used through the structure object. + * + * 3205:The identifier is not used and could be removed. + * The bl_Adapter_t is used by the specifically adapter such as UDS platform in + * the bl_adpt_uds_platform.c + * + * 3210:The global identifier is declared but is not used. + * The functions are used in the bl_security_cfg.c file. + * + * MISRA-C:2004 8.8(3447):The identifier has external linkage but this + * declaration is not in a header file. + * The function Declarations are in the header file. + * + * MISRA-C:2004 5.3(3448):Declaration of typedef is not in a header file. + * The bl_SecurityDelay_t is declared in the header file. + * + * MISRA-C:2004 19.7(3453):A function could probably be used instead of this + * function-like macro. + * These macros have no side-effect. + * + */ + +/***************************************************************************** + * Macro Definitions + *****************************************************************************/ +/** */ +#define RTE_NUMBER_OF_DOWN_STATUS (4u) +/** */ +#define RTE_DOWN_STATUS_SYS_MASK (0x000000FFUL) +#define RTE_DOWN_STATUS_USER_MASK (0x3FFFFFFFUL) +#define RTE_DOWN_STATUS_INDEX_MASK (0xC0000000UL) +#define RTE_SYSFLAG_SECURITY_ACCESS (0x00000001UL) +#define RTE_SYSFLAG_CHECK_SIGNATURE (0x00000002UL) +#define RTE_SYSFLAG_ERASE_BLOCK (0x00000004UL) +#define RTE_SYSFLAG_WRITE_DATA (0x00000008UL) +#define RTE_SYSFLAG_WRITE_FINGPRINT (0x00000010UL) //寫入金手指，具體是什麼？ +#define RTE_SYSFLAG_WRITE_OTHER (0x00000020UL) +#define RTE_USER_FLAG_GROUP_1 (0x40000000UL) //包括 ALLOW_TRANS_DATA ；BLOCK_FIRST_DATA ； SEGMENT_FIRST_DATA ; SEGMENT_FIRST_DATA +#define RTE_USER_FLAG_GROUP_2 (0x80000000UL) //2 +#define RTE_USER_FLAG_GROUP_3 (0xC0000000UL) //3 + +#define RTE_NUMBER_OF_EVENT (4u) +/** \brief */ +#define RTE_EVENT_TYPE_RECV_REQUEST (0x0000u) +#define RTE_EVENT_TYPE_MEMOPS_TIMEOUT (0x0001u) +#define RTE_EVENT_TYPE_S3TIME_TIMEOUT (0x0002u) +#define RTE_EVENT_TYPE_SYSTEM_SLEEP (0x0003u) + +#define RTE_GET_DOWNSTATUS_ID(mask) ((bl_u16_t)((((bl_u32_t)(mask)) >> 30)\ + & 0xFFu)) + +#define RTE_GET_DOWNSTATUS_VALUE(mask) ((((bl_u32_t)(mask))\ + & RTE_DOWN_STATUS_USER_MASK)) //3fffffff + +/***************************************************************************** + * Type Declarations + *****************************************************************************/ + +typedef struct _tag_DownSegment bl_DownSegment_t; + +typedef struct _tag_DownSegmentList bl_DownSegList_t; + +typedef struct _tag_DownContext bl_DownContext_t; + +typedef struct _tag_ResetProcess bl_ResetProcess_t; + +typedef struct _tag_ResetProcessList bl_ResetProcessList_t; + +typedef struct _tag_WatchdogOps bl_WatchdogOps_t; + +typedef struct _tag_SystemSleepOps bl_SystemSleepOps_t; + +typedef struct _tag_TimerOps bl_TimerOps_t; + +typedef struct _tag_ComIfData bl_ComIfData_t; + +typedef struct _tag_ComIfOps bl_ComIfOps_t; + +typedef struct _tag_RteInfo bl_RteInfo_t; + +typedef void (*bl_PeriodicCallback_t)(void); + +typedef void (*bl_EventCallback_t)(void); + +typedef void (*bl_FeedWgdCallback_t)(void); +/***************************************************************************** + * Structure Definitions + *****************************************************************************/ +struct _tag_DownSegment +{ + bl_Address_t address; /**< the address of a download segment.*/ + bl_Size_t size; /**< the size of a download segment.*/ +}; + +struct _tag_DownSegmentList +{ + bl_u16_t number; /**< the max number of the download segment.*/ + struct _tag_DownSegment *segList; /**< the download segment list.*/ +}; + +struct _tag_DownContext +{ + bl_u16_t lbId; /**< the id of logical block is downloaded.*/ //相當於 logic block層的id --LBM_LB1_ID_APP + bl_u16_t segIndex; /**< the index of usable segment.*/ + bl_DownStatus_t status[RTE_NUMBER_OF_DOWN_STATUS]; /**< system status.*/ //bl_DownStatus_t is u32 + struct _tag_DownSegmentList segment; /**< list is recorded by bootloader.*/ +}; + +struct _tag_ResetProcess +{ + bl_BootingFlag_t flag; /**< the reason of the system reset.*/ // bl_BootingFlag_t is u16 + void (*Process)(void); /**< the callback used to process action.*/ +}; + +struct _tag_ResetProcessList +{ + bl_u16_t number; /**< the max number of process callback.*/ + const struct _tag_ResetProcess *resetList; /**< the process list.*/ +}; + +struct _tag_WatchdogOps +{ + void (*Init)(void); + void (*Feed)(void); + void (*FastReset)(void); + void (*Deinit)(void); +}; + +struct _tag_SystemSleepOps +{ + bl_Return_t (*IsSleep)(void); + void (*SleepCallback)(void); + void (*SystemSleep)(void); + void (*WakeupCallback)(void); +}; + +struct _tag_TimerOps +{ + void (*Init)(void); + void (*Deinit)(void); + bl_Return_t (*IsTimeout)(void); +}; + +struct _tag_ComIfData +{ + bl_ComIfHandle_t retHandle; // bl_ComIfHandle_t is u16 gs_CanIfPduCfg中的buf id + bl_BufferSize_t retSize; //bl_BufferSize_t is u16 接收長度 實際收到的長度 + bl_BufferSize_t bufSize; //目標要收到的長度 + bl_Buffer_t *buffer; // bl_Buffer_t is u8 +}; + +struct _tag_ComIfOps +{ + bl_Return_t (*Init)(void); + void (*Deinit)(void); + bl_Return_t (*Read)(struct _tag_ComIfData *data); // + bl_Return_t (*Write)(bl_ComIfHandle_t handle, //這里的handle是什麼意思 + bl_BufferSize_t size, + const bl_Buffer_t *buffer); + bl_Return_t (*IsWritten)(bl_ComIfHandle_t handle); +}; + +struct _tag_RteInfo +{ + bl_u32_t version; + const struct _tag_WatchdogOps *wdgOps; + const struct _tag_SystemSleepOps *sleepOps; + const struct _tag_TimerOps *timerOps; + const struct _tag_ComIfOps *comOps; + void (*SystemReset)(void); +}; + + +/***************************************************************************** + * External Global Variable Declarations + *****************************************************************************/ +extern bl_DownContext_t g_DownContext; + +extern const bl_RteInfo_t g_RteInfo; +/***************************************************************************** + * External Function Prototype Declarations + *****************************************************************************/ +/** \brief This function is used to pre-initialize the rte module.*/ +extern void Rte_PreInit(void); +/** \brief This function is used to initialize the rte module.*/ +extern bl_Return_t Rte_PostInit(void); +/** \brief This function is used to de-initialize the rte module.*/ +extern void Rte_GotoApplication(void); +/** \brief This function is used to execute additional function.*/ +extern void Rte_ProcessReset(bl_BootingFlag_t flag); +/** \brief This function is used to periodically execute the callback.*/ +extern void Rte_PeriodicSchedule(bl_PeriodicCallback_t callback); +/** \brief Notice rte module that the event of interest has occurred.*/ +extern void Rte_ReportEvent(bl_u16_t type); +/** \brief Reset the count of the sleep timer and SIB reset timer.*/ +extern void Rte_ResetTimer(void); +/** \brief Save the address and size information to the DownContext.*/ +extern bl_Return_t Rte_SaveAddressInfo(bl_DownContext_t *dct, + bl_Address_t address, + bl_Size_t size); +/** \brief Clear the address and size information in the DownContext.*/ +extern void Rte_ClearAddressInfo(bl_DownContext_t *dct); +/** \brief Get the status of download process.*/ +extern bl_DownStatus_t Rte_GetDownStatus(const bl_DownContext_t *dct, + bl_u16_t gId); +/** \brief Set the status of download process.*/ +extern void Rte_SetDownStatus(bl_DownContext_t *dct, bl_DownStatus_t mask); +/** \brief Set the mutex status of download process.*/ +extern void Rte_SetMutexDownStatus(bl_DownContext_t *dct, + bl_DownStatus_t mask, + bl_DownStatus_t mutex); +/** \brief Clear the status of download process.*/ +extern void Rte_ClearDownStatus(bl_DownContext_t *dct, bl_DownStatus_t mask); +/** \brief Clear the all status of download process.*/ +extern void Rte_ClearAllDownStatus(bl_DownContext_t *dct); +/** \brief Check the status whether is valid by the mask.*/ +extern bl_Return_t Rte_IsValidStatus(const bl_DownContext_t *dct, + bl_DownStatus_t mask); +/** \brief Check the status whether is valid by the mask.*/ +extern bl_Return_t Rte_IsAllValidStatus(const bl_DownContext_t *dct, + bl_DownStatus_t mask); +/** \brief Check the status whether is valid by the mask.*/ +extern bl_Return_t Rte_IsOnlyValidStatus(const bl_DownContext_t *dct, + bl_DownStatus_t mask); + +/** \brief Do nothing.*/ +extern void Rte_Dummy(void); + +#if (RTE_FUN_STAY_IN_BOOT == BL_FUN_ON) +/** \brief Stay in boot.*/ +extern bl_Return_t Rte_StayInBoot(void); +#endif + +#endif + diff --git a/code_boot_out/asil/middle/autosar_bl/inc/bl_security.h b/code_boot_out/asil/middle/autosar_bl/inc/bl_security.h new file mode 100644 index 0000000..422947f --- /dev/null +++ b/code_boot_out/asil/middle/autosar_bl/inc/bl_security.h @@ -0,0 +1,123 @@ +/**************************************************************************//** + * + * \copyright This software is the property of Technologies. Any + * information contained in this doc should not be reproduced, + * or used, or disclosed without the written authorization from + * Technologies. + * + * \brief This is a head file of the security manager module. + * + * \file bl_security.h + * \ingroup security_manager_module + * \author + * + * + * \version 5.1.0 + * \date 27/03/2014 + * + * \par Changelist + * Version | Date | Authors | CR# | Descriptions + * -------- | ---------- | ---------------- | --- | ------------ + * 01.00.00 | 25/03/2010 | hewei.zhang | N/A | Boot010001 + * 01.01.00 | 19/05/2010 | hewei.zhang | N/A | Boot010002 + * 02.00.00 | 18/05/2011 | mingqing.tang | N/A | Boot020001 + * 02.01.00 | 15/06/2011 | mingqing.tang | N/A | Boot020002 + * 02.05.00 | 22/06/2011 | mingqing.tang | N/A | Boot020006 + * 05.00.00 | 19/06/2013 | xin.shang | N/A | Boot050001 + * 05.01.00 | 27/03/2014 | mingqing.tang | N/A | Boot050002 + * + *****************************************************************************/ +#ifndef _BL_SECURITY_H_ +#define _BL_SECURITY_H_ +#include "bl_typedefs.h" +#include "bl_security_funcfg.h" + +/***************************************************************************** + * QAC Suppression + *****************************************************************************/ +/*PRQA S 3205,3210,3447,3448 EOF*/ +/* + * 3205:The identifier is not used and could be removed. + * The bl_Adapter_t is used by the specifically adapter such as UDS platform in + * the bl_adpt_uds_platform.c + * + * 3210:The global identifier is declared but is not used. + * The functions are used in the bl_security_cfg.c file. + * + * MISRA-C:2004 8.8(3447):The identifier has external linkage but this + * declaration is not in a header file. + * The function Declarations are in the header file. + * + * MISRA-C:2004 5.3(3448):Declaration of typedef is not in a header file. + * The bl_SecurityDelay_t is declared in the header file. + * + */ + +/***************************************************************************** + * Macro Definitions + *****************************************************************************/ + +/***************************************************************************** + * Type Declarations + *****************************************************************************/ +/** \brief A alias of the struct _tag_SecurityAccessOps.*/ +typedef struct _tag_SecurityAccessOps bl_SecurityAccessOps_t; +/** \brief A alias of the struct _tag_VerificationOps.*/ +typedef struct _tag_VerificationOps bl_VerificationOps_t; + +/***************************************************************************** + * Structure Definitions + *****************************************************************************/ + +/** \brief The list of the security access interfaces.*/ +struct _tag_SecurityAccessOps +{ + void (*Init)(void); /**< initialize the security access function.*/ // SECM_ACCESS_INIT + void (*MakeNewSeed)(void); // SECM_ACCESS_MAKE_NEWSEED + void (*GetSeed)(bl_Buffer_t *seed); // SECM_ACCESS_GET_SEED + bl_Return_t (*VerifyKey)(const bl_Buffer_t *key); // SECM_ACCESS_VERIFY_KEY +}; + +/** + * \brief The list of the integrality interfaces. + */ +struct _tag_VerificationOps +{ + void (*Init)(void);/**< init interface.*/ // SECM_VERIFICATION_INIT + void (*Start)(void); /**< start interface.*/ // SECM_VERIFICATION_START + bl_Return_t (*Update)(bl_Size_t size, const bl_Buffer_t *data); // SECM_VERIFICATION_UPDATE + bl_Return_t (*Verify)(bl_Size_t size, const bl_Buffer_t *hash); // SECM_VERIFICATION_VERIFY +}; + +/***************************************************************************** + * External Global Variable Declarations + *****************************************************************************/ + +/***************************************************************************** + * External Function Prototype Declarations + *****************************************************************************/ +/** \brief The initialization interface of the security management module.*/ +extern void Secm_Init(void); + +/** \brief Make a new seed.*/ +extern void Secm_MakeNewSeed(void); +/** \brief Save the current contents of the seed to a buffer.*/ +extern void Secm_GetSeed(bl_Buffer_t *seed); +/** \brief Verify the key whether is valid.*/ +extern bl_Return_t Secm_VerifyKey(bl_Size_t size, const bl_Buffer_t *key); + +/** \brief The start interface for verifting data.*/ +extern void Secm_StartHash(void); +/** \brief The update interface for verifting the HASH.*/ +extern bl_Return_t Secm_UpdateHash(bl_Size_t size, const bl_Buffer_t *data); +/** \brief The compare interface for verifting data.*/ +extern bl_Return_t Secm_VerifyHash(bl_Size_t size, const bl_Buffer_t *hash); + +#if ((SECM_SECURITY_CLASS == BL_SECURITY_CLASS_C) \ + || (SECM_SECURITY_CLASS == BL_SECURITY_CLASS_CCC)) +/** \brief Update the hash value by the address and size of a segment.*/ +extern bl_Return_t Secm_UpdateHashByAddr(bl_Address_t addr, bl_Size_t size); +#endif + +#endif + diff --git a/code_boot_out/asil/middle/autosar_bl/inc/bl_system.h b/code_boot_out/asil/middle/autosar_bl/inc/bl_system.h new file mode 100644 index 0000000..9aa2af6 --- /dev/null +++ b/code_boot_out/asil/middle/autosar_bl/inc/bl_system.h @@ -0,0 +1,73 @@ +/**************************************************************************//** + * + * \copyright This software is the property of Technologies. Any + * information contained in this doc should not be reproduced, + * or used, or disclosed without the written authorization from + * Technologies. + * + * \brief This is a head file of the system clock module. + * + * \file bl_system.h + * \ingroup driver_module + * \author + * + * \version 1.0.0 + * \date 14/05/2014 + * + * \par Changelist + * Version | Date | Authors | CR# | Descriptions + * -------- | ---------- | ---------------- | --- | ------------- + * 01.00.00 | 14/05/2014 | ning.chen | N/A | BootDrv010001 + *****************************************************************************/ +#ifndef _BL_SYSTEM_H_ +#define _BL_SYSTEM_H_ +#include "bl_typedefs.h" +#include "bl_system_cfg.h" + +/***************************************************************************** + * QAC Suppression + *****************************************************************************/ +/*PRQA S 3205,3210,3447,3448 EOF*/ +/* + * 3205:The identifier is not used and could be removed. + * The bl_Adapter_t is used by the specifically adapter such as UDS platform in + * the bl_adpt_uds_platform.c + * + * 3210:The global identifier is declared but is not used. + * The functions are used in the bl_security_cfg.c file. + * + * MISRA-C:2004 8.8(3447):The identifier has external linkage but this + * declaration is not in a header file. + * The function Declarations are in the header file. + * + * MISRA-C:2004 5.3(3448):Declaration of typedef is not in a header file. + * The bl_SecurityDelay_t is declared in the header file. + * + */ + + +/***************************************************************************** + * Macro Definitions + *****************************************************************************/ +#ifdef MCU_OSC_IS_4 +#define SYS_OSC_CLOCK_FREQ (4000) +#else +#define SYS_OSC_CLOCK_FREQ (8000) +#endif +#define SYS_MCU_CLOCK_FREQ (40000) +#define SYS_BUS_CLOCK_FREQ (20000) /*KHz*/ +/***************************************************************************** + * External Function Prototype Declarations + *****************************************************************************/ + /** \brief This function is used to remap interrupt vector table.*/ +extern void Sys_RemapInterrupt(void); +/** \brief This function is used to go to application.*/ +extern void Sys_GotoApplication(void); +/** \brief This function is used to turn on the flash protection.*/ +extern void Sys_ProtectBootloader(void); +extern void Sys_InitClock(void); +extern void Sys_DeinitClock(void); +extern void Sys_Sleep(void); + +#endif + diff --git a/code_boot_out/asil/middle/autosar_bl/inc/bl_timer.h b/code_boot_out/asil/middle/autosar_bl/inc/bl_timer.h new file mode 100644 index 0000000..829adb4 --- /dev/null +++ b/code_boot_out/asil/middle/autosar_bl/inc/bl_timer.h @@ -0,0 +1,60 @@ +/**************************************************************************//** + * + * \copyright This software is the property of Technologies. Any + * information contained in this doc should not be reproduced, + * or used, or disclosed without the written authorization from + * Technologies. + * + * \brief This is a head file of the timer module. + * + * \file bl_timer.h + * \ingroup driver_module + * \author + * + * \version 1.0.0 + * \date 14/05/2014 + * + * \par Changelist + * Version | Date | Authors | CR# | Descriptions + * -------- | ---------- | ---------------- | --- | ------------- + * 01.00.00 | 14/05/2014 | ning.chen | N/A | BootDrv010001 + *****************************************************************************/ +#ifndef _BL_TIMER_H_ +#define _BL_TIMER_H_ +#include "bl_typedefs.h" + +/***************************************************************************** + * QAC Suppression + *****************************************************************************/ +/*PRQA S 3205,3210,3447,3448 EOF*/ +/* + * 3205:The identifier is not used and could be removed. + * The bl_Adapter_t is used by the specifically adapter such as UDS platform in + * the bl_adpt_uds_platform.c + * + * 3210:The global identifier is declared but is not used. + * The functions are used in the bl_security_cfg.c file. + * + * MISRA-C:2004 8.8(3447):The identifier has external linkage but this + * declaration is not in a header file. + * The function Declarations are in the header file. + * + * MISRA-C:2004 5.3(3448):Declaration of typedef is not in a header file. + * The bl_SecurityDelay_t is declared in the header file. + * + */ + +/***************************************************************************** + * Macro Definitions + *****************************************************************************/ +#define TIMER_SYSTEM_PERIOD (1) /*ms*/ + +/***************************************************************************** + * External Function Prototype Declarations + *****************************************************************************/ +extern void Tim_Init(void); +extern bl_Return_t Tim_IsTimeout(void); +extern void Tim_Deinit(void); +extern void Tim_tick_count(void); + +#endif diff --git a/code_boot_out/asil/middle/autosar_bl/inc/bl_typedefs.h b/code_boot_out/asil/middle/autosar_bl/inc/bl_typedefs.h new file mode 100644 index 0000000..01f1c8e --- /dev/null +++ b/code_boot_out/asil/middle/autosar_bl/inc/bl_typedefs.h @@ -0,0 +1,349 @@ +/**************************************************************************//** + * + * \copyright This software is the property of Technologies. Any + * information contained in this doc should not be reproduced, + * or used, or disclosed without the written authorization from + * Technologies. + * + * \brief This is a head file to define base type used for bootloader. + * + * \file bl_typedefs.h + * \author + * + * \version 5.1.0 + * \date 27/03/2014 + * + * \par Changelist + * Version | Date | Authors | CR# | Descriptions + * -------- | ---------- | ---------------- | --- | ------------ + * 01.00.00 | 15/03/2010 | hewei.zhang | N/A | Boot010001 + * 01.01.00 | 16/06/2010 | hewei.zhang | N/A | Boot010002 + * 02.00.00 | 16/05/2011 | mingqing.tang | N/A | Boot020001 + * 02.01.00 | 25/05/2011 | mingqing.tang | N/A | Boot020002 + * 03.00.00 | 15/09/2011 | mingqing.tang | N/A | Boot030001 + * 04.00.00 | 20/10/2011 | mingqing.tang | N/A | Boot040001 + * 05.00.00 | 19/06/2013 | mingqing.tang | N/A | Boot050001 + * 05.01.00 | 27/03/2014 | mingqing.tang | N/A | Boot050002 + * + *****************************************************************************/ +#ifndef _BL_TYPEDEFS_H_ +#define _BL_TYPEDEFS_H_ + +/***************************************************************************** + * QAC Suppression + *****************************************************************************/ +/*PRQA S 3205,3412,3435,3453,3456 EOF*/ +/* + * 3205:The identifier is not used and could be removed. + * The identifiers was used in other files or will be used for future. + * + * MISRA-C:2004 19.4(3412):Macro defines an unrecognized code-fragment. + * BL_WAITFOR_TIMEOUT is only used to polling check a status. + * + * MISRA-C:2004 19.4(3435):Parameter is used more than once in this macro. + * + * MISRA-C:2004 19.7(3453):A function could probably be used instead of this + * function-like macro. + * These macros do not have side-effect. + * + * 3456:Parameter will be evaluated more than once when this macro is used. + * When these macros is used, there is no side-effect. + * + */ + +/***************************************************************************** + * Macro Definitions + *****************************************************************************/ +#define BL_BYTE_WIDTH_8 (1) /**< one byte width is 8bits(one byte)*/ +#define BL_BYTE_WIDTH_16 (2) /**< one byte width is 16bits(two bytes).*/ + +#define BL_MCU_TYPE_8 (8) /**< the 8bits mcu.*/ +#define BL_MCU_TYPE_16 (16) /**< the 16bits mcu.*/ +#define BL_MCU_TYPE_32 (32) /**< the 32bits mcu.*/ + +#define BL_BYTE_BIG_ENDIAN (0) /**< big endian for byte order.*/ +#define BL_BYTE_LITTLE_ENDIAN (1) /**< little endian for byte order.*/ + +#define BL_STATUS_NOT_INIT (0) /**< the uninitialized status.*/ +#define BL_STATUS_INITED (1) /**< the initialized status.*/ + +#define BL_ERROR_ID_16BIT (0xFFFFu) /**< Indicate a invalid ID.*/ + +//這幾個等級有什麼區別？？？ +#define BL_SECURITY_CLASS_DDD (0x01u) /** security level DDD.*/ +#define BL_SECURITY_CLASS_C (0x02u) /** security level C.*/ +#define BL_SECURITY_CLASS_CCC (0x03u) /** security level CCC.*/ +#define BL_SECURITY_CLASS_BBB (0x04u) /** security level BBB.*/ +#define BL_SECURITY_CLASS_AAA (0x05u) /** security level AAA.*/ + +/** the macro is used to indicate that a function is disable.*/ +#define BL_FUN_OFF (0) +/** the macro is used to indicate that a function is enable.*/ +#define BL_FUN_ON (1) +/** the macro is used to indicate that a pointer is invalid.*/ +#define BL_NULL_PTR ((void *)0) +/** Only used to pass muster. It's not a valid pointer.*/ +#define BL_VIRTUAL_PTR ((void *)1) + + +/* the informations of this MCU.*/ +/** Indicate the width of a byte in this MCU.*/ +#define BL_BYTE_WIDTH BL_BYTE_WIDTH_8 +/** Indicate the byte order of this MCU.*/ +#define BL_BYTE_ENDIAN BL_BYTE_LITTLE_ENDIAN +/** Indicate the type of this mcu.*/ +#define BL_MCU_TYPE BL_MCU_TYPE_16 + +#define BL_FORCE_MEMACC_ALIGN BL_FUN_ON +/** The debug function.*/ +#define BL_DEBUG BL_FUN_OFF +/** position a memory, near or far.*/ +#define BL_MEMORY_POS +/** position a memory, near or far.*/ +#define BL_VARIABLE_POS + +#define BL_GET_LOW_HALF(byte) ((byte) & 0x0Fu) +#define BL_GET_HIGH_HALF(byte) ((byte) & 0xF0u) + +/** swap bytes of the 16bits number.*/ +#define __BL_SWAP16(n) ((bl_u16_t)( \ + (((bl_u16_t)(n) & (bl_u16_t)0x00FFu) << 8u) | \ + (((bl_u16_t)(n) & (bl_u16_t)0xFF00u) >> 8u))) +/** swap bytes of the 32bits number.*/ +#define __BL_SWAP32(n) ((bl_u32_t)( \ + (((bl_u32_t)(n) & (bl_u32_t)0x000000FFUL) << 24u)|\ + (((bl_u32_t)(n) & (bl_u32_t)0x0000FF00UL) << 8u) |\ + (((bl_u32_t)(n) & (bl_u32_t)0x00FF0000UL) >> 8u) |\ + (((bl_u32_t)(n) & (bl_u32_t)0xFF000000UL) >> 24u))) + + +#if (BL_BYTE_ENDIAN == BL_BYTE_BIG_ENDIAN) //該工程，進這個選項 + +#define _BL_BE16_TO_MCU(n) ((bl_u16_t)(n)) + +#define _BL_LE16_TO_MCU(n) __BL_SWAP16(n) + +#define _BL_BE32_TO_MCU(n) ((bl_u32_t)(n)) + +#define _BL_LE32_TO_MCU(n) __BL_SWAP32(n) + +#define _BL_MCU_TO_BE16(n) ((bl_u16_t)(n)) + +#define _BL_MCU_TO_LE16(n) __BL_SWAP16(n) + +#define _BL_MCU_TO_BE32(n) ((bl_u32_t)(n)) + +#define _BL_MCU_TO_LE32(n) __BL_SWAP32(n) + +#else + +#define _BL_BE16_TO_MCU(n) __BL_SWAP16(n) + +#define _BL_LE16_TO_MCU(n) ((bl_u16_t)(n)) + +#define _BL_BE32_TO_MCU(n) __BL_SWAP32(n) + +#define _BL_LE32_TO_MCU(n) ((bl_u32_t)(n)) + +#define _BL_MCU_TO_BE16(n) __BL_SWAP16(n) + +#define _BL_MCU_TO_LE16(n) ((bl_u16_t)(n)) + +#define _BL_MCU_TO_BE32(n) __BL_SWAP32(n) + +#define _BL_MCU_TO_LE32(n) ((bl_u32_t)(n)) + +#endif + +#if ((BL_BYTE_WIDTH != BL_BYTE_WIDTH_8) || (BL_FORCE_MEMACC_ALIGN == BL_FUN_ON)) // + +#define BL_BE16_TO_MCU(p) Bl_Be16ToMcu((const bl_Buffer_t *)(p)) + +#define BL_LE16_TO_MCU(p) Bl_Le16ToMcu((const bl_Buffer_t *)(p)) + +#define BL_BE32_TO_MCU(p) Bl_Be32ToMcu((const bl_Buffer_t *)(p)) + +#define BL_LE32_TO_MCU(p) Bl_Le32ToMcu((const bl_Buffer_t *)(p)) + +#define BL_MCU_TO_BE16(p,n) Bl_McuToBe16((bl_Buffer_t *)(p),(bl_u16_t)(n)) + +#define BL_MCU_TO_LE16(p,n) Bl_McuToLe16((bl_Buffer_t *)(p),(bl_u16_t)(n)) + +#define BL_MCU_TO_BE32(p,n) Bl_McuToBe32((bl_Buffer_t *)(p),(bl_u32_t)(n)) + +#define BL_MCU_TO_LE32(p,n) Bl_McuToLe32((bl_Buffer_t *)(p),(bl_u32_t)(n)) + +#else //該工程，進這個選項 + +#define BL_BE16_TO_MCU(p) _BL_BE16_TO_MCU(*(const bl_u16_t *)(p)) + +#define BL_LE16_TO_MCU(p) _BL_LE16_TO_MCU(*(const bl_u16_t *)(p)) + +#define BL_BE32_TO_MCU(p) _BL_BE32_TO_MCU(*(const bl_u32_t *)(p)) + +#define BL_LE32_TO_MCU(p) _BL_LE32_TO_MCU(*(const bl_u32_t *)(p)) + +#define BL_MCU_TO_BE16(p,n) *((bl_u16_t *)(p)) = _BL_MCU_TO_BE16(n) + +#define BL_MCU_TO_LE16(p,n) *((bl_u16_t *)(p)) = _BL_MCU_TO_LE16(n) + +#define BL_MCU_TO_BE32(p,n) *((bl_u32_t *)(p)) = _BL_MCU_TO_BE32(n) + +#define BL_MCU_TO_LE32(p,n) *((bl_u32_t *)(p)) = _BL_MCU_TO_LE32(n) + +#endif + +#if (BL_BYTE_ENDIAN == BL_BYTE_BIG_ENDIAN) +#define BL_MAKE_LOCAL_U16(p) BL_BE16_TO_MCU(p) +#define BL_LOCAL_U16_TO_BUF(p,n) BL_MCU_TO_BE16(p,n) +#define BL_MAKE_LOCAL_U32(p) BL_BE32_TO_MCU(p) +#define BL_LOCAL_U32_TO_BUF(p,n) BL_MCU_TO_BE32(p,n) +#elif(BL_BYTE_ENDIAN == BL_BYTE_LITTLE_ENDIAN) //該芯片是小端--是該選項 +#define BL_MAKE_LOCAL_U16(p) BL_LE16_TO_MCU(p) +#define BL_LOCAL_U16_TO_BUF(p,n) BL_MCU_TO_LE16(p,n) +#define BL_MAKE_LOCAL_U32(p) BL_LE32_TO_MCU(p) +#define BL_LOCAL_U32_TO_BUF(p,n) BL_MCU_TO_LE32(p,n) +#else +#error "the byte endian is error!" +#endif + +#if (BL_DEBUG == BL_FUN_ON) +/** \brief A valid debug assert macro.*/ +#define BL_DO_DEBUG_ASSERT(cond,ret,retval) do{\ + if (!(cond))\ + {\ + if ((ret) != 0)\ + return (retval);\ + else\ + while(1);\ + }\ + }\ + while(0) /*lint !e717*/ +/** \brief A valid debug assert macro.*/ +#define BL_DO_DEBUG_ASSERT_NO_RET(cond) do{\ + if (!(cond))\ + {\ + while(1);\ + }\ + }\ + while(0) /*lint !e717*/ +#else +/** \brief A null macro.*/ +#define BL_DO_DEBUG_ASSERT(cond,ret,retval) ((void)0) +/** \brief A null macro.*/ +#define BL_DO_DEBUG_ASSERT_NO_RET(cond) ((void)0) +#endif + +/** \brief a debug assert without return value.*/ +#define BL_DEBUG_ASSERT_NO_RET(cond) BL_DO_DEBUG_ASSERT_NO_RET(cond) +/** \brief a debug assert with return value.*/ +#define BL_DEBUG_ASSERT_RET(cond,ret) BL_DO_DEBUG_ASSERT(cond,1,ret) +/** \brief a debug assert.*/ +#define BL_DEBUG_ASSERT(cond) BL_DEBUG_ASSERT_RET(cond,BL_ERR_ASSERT_FAILURE) +/** \brief a debug assert.*/ +#define BL_DEBUG_ASSERT_PARAM(cond) BL_DEBUG_ASSERT_RET(cond,\ + BL_ERR_ASSERT_PARAMETERS) +/** \brief a debug assert.*/ +#define BL_DEBUG_ASSERT_CONFIG(cond) BL_DEBUG_ASSERT_RET(cond,\ + BL_ERR_ASSERT_CONFIGURATION) +/** \brief Wait until the condition is true or the timer is timeout*/ +#define BL_WAITFOR_TIMEOUT(timer,cond) while((!(cond)) && ((timer) > 0)) \ + { (timer) -= 1u;} + + +/***************************************************************************** + * Type Declarations + *****************************************************************************/ +typedef unsigned char bl_u8_t; /**< This is a unsigned type for 8 bits.*/ +typedef unsigned short bl_u16_t; /**< This is a unsigned type for 16 bits.*/ +typedef unsigned long bl_u32_t; /**< This is a unsigned type for 32 bits.*/ + +typedef signed char bl_s8_t; /**< This is a signed type for 8 bits.*/ +typedef signed short bl_s16_t; /**< This is a signed type for 16 bits.*/ +typedef signed long bl_s32_t; /**< This is a signed type for 32 bits.*/ + +typedef bl_u32_t bl_Address_t; /**< The address of the memory.*/ +typedef bl_u32_t bl_Size_t; /**< The size of the memory.*/ +typedef bl_u16_t bl_BootingFlag_t; /**< The flag of booting.*/ + +typedef bl_u16_t bl_BufferSize_t; /**< The size of a buffer.*/ +#if (BL_BYTE_WIDTH == BL_BYTE_WIDTH_8) //進入該選項 +typedef bl_u8_t bl_Buffer_t; /**< The type for buffer.*/ +#elif (BL_BYTE_WIDTH == BL_BYTE_WIDTH_16) +typedef bl_u16_t bl_Buffer_t; /**< The type for buffer.*/ +#else +#error "the configuration of the width byte is invalid." +#endif + +typedef bl_u8_t bl_ResponseCode_t; /**< The response code for DCM.*/ + +typedef bl_u32_t bl_DownStatus_t; /**< The download status.*/ + +typedef bl_u16_t bl_ComIfHandle_t; /**< THe handle of communication module.*/ + +typedef enum _tag_Return +{ + /** Indicate that a function was successfully processed.*/ + BL_ERR_OK = 0, + /** Indicate that a function was NOT successfully processed.*/ + BL_ERR_NOT_OK = 1, + /** A debug assert failure is caused by the parameters of a function.*/ + BL_ERR_ASSERT_CONFIGURATION = 2, + /** A debug assert failure is caused by the parameters of a function.*/ + BL_ERR_ASSERT_PARAMETERS = 3, + /** A debug assert is failure.*/ + BL_ERR_ASSERT_FAILURE = 4, + /** The buffer is busy*/ + BL_ERR_BUFFER_BUSY = 5, + /** The size greater than the size of buffer*/ + BL_ERR_BUFFER_OVERFLOW = 6, + BL_ERR_INVALID_FS = 7, + BL_ERR_WRONG_SN = 8, + BL_ERR_UNEXPECTED_FRAME = 9, + /** The timerA used to cantp module is timeout*/ + BL_ERR_TIMEROUT_A = 10, + /** The timerBs used to cantp module is timeout*/ + BL_ERR_TIMEROUT_BS = 11, + /** The timerCr used to cantp module is timeout*/ + BL_ERR_TIMEROUT_CR = 12, + /** The error codes defined by user is not smaller than this macro.*/ + BL_ERR_SYSTEM_LIMIT = 99, + /** + * A error code, named '01', is used by user. It is only used for the + * internal interface of a module. + */ + BL_ERR_USER_CODE_01 = 100, + /** A error code, named '02', is used by user.*/ + BL_ERR_USER_CODE_02 = 101, + /** A error code, named '03', is used by user.*/ + BL_ERR_USER_CODE_03 = 102, + /** A error code, named '04', is used by user.*/ + BL_ERR_USER_CODE_04 = 103, + /** A error code, named '05', is used by user.*/ + BL_ERR_USER_CODE_05 = 104, + /** A error code, named '06', is used by user.*/ + BL_ERR_USER_CODE_06 = 105, + /** A error code, named '07', is used by user.*/ + BL_ERR_USER_CODE_07 = 106 +} bl_Return_t; /**< Some values from a called function.*/ + +/***************************************************************************** + * Structure Definitions + *****************************************************************************/ +typedef union +{ + bl_u32_t wd; + bl_u8_t bt[4]; +}bl_us32_t; + +/***************************************************************************** + * External Global Variable Declarations + *****************************************************************************/ + +/***************************************************************************** + * External Function Prototype Declarations + *****************************************************************************/ +#define STATIC //static + +#endif + diff --git a/code_boot_out/asil/middle/autosar_bl/inc/bl_watchdog.h b/code_boot_out/asil/middle/autosar_bl/inc/bl_watchdog.h new file mode 100644 index 0000000..c9d21c5 --- /dev/null +++ b/code_boot_out/asil/middle/autosar_bl/inc/bl_watchdog.h @@ -0,0 +1,86 @@ +/**************************************************************************//** + * + * \copyright This software is the property of Technologies. Any + * information contained in this doc should not be reproduced, + * or used, or disclosed without the written authorization from + * Technologies. + * + * \brief This is the header file of the watchdog module . + * + * \file bl_watchdog.h + * \ingroup driver_module + * \author + * + * \version 1.0.0 + * \date 14/05/2014 + * + * \par Changelist + * Version | Date | Authors | CR# | Descriptions + * -------- | ---------- | ---------------- | --- | ------------- + * 01.00.00 | 14/05/2014 | ning.chen | N/A | BootDrv010001 + *****************************************************************************/ +#ifndef _BL_WATCHDOG_H_ +#define _BL_WATCHDOG_H_ +#include "bl_typedefs.h" +#include "bl_rte_funcfg.h" +#include "common_types.h" +#include "bl_system_cfg.h" + +/***************************************************************************** + * QAC Suppression + *****************************************************************************/ +/*PRQA S 3205,3210,3447,3448 EOF*/ +/* + * 3205:The identifier is not used and could be removed. + * The bl_Adapter_t is used by the specifically adapter such as UDS platform in + * the bl_adpt_uds_platform.c + * + * 3210:The global identifier is declared but is not used. + * The functions are used in the bl_security_cfg.c file. + * + * MISRA-C:2004 8.8(3447):The identifier has external linkage but this + * declaration is not in a header file. + * The function Declarations are in the header file. + * + * MISRA-C:2004 5.3(3448):Declaration of typedef is not in a header file. + * The bl_SecurityDelay_t is declared in the header file. + * + */ +/***************************************************************************** + * Macro Definitions + *****************************************************************************/ + +/***************************************************************************** + * External Function Prototype Declarations + *****************************************************************************/ +extern void Wdg_Init(void); +extern void Wdg_Deinit(void); +extern void Wdg_FastReset(void); + + +typedef void(*bl_WdgFun_t)(void); +typedef struct +{ + //bl_u16_t type; /**< The type of the flash driver.*/ + //bl_u16_t index; /**< The index of the flash driver.*/ + bl_WdgFun_t feed; /**< Initialize the flash drvier.*/ + //u32 res; +}wdg_Header; + + +#if (RTE_FUN_COPY_WDG_TO_RAM == BL_FUN_ON) //l + extern __attribute__((section(".RAMCODE_WDG1"))) void Wdg_Feed(void); +#else + + extern void Wdg_Feed(void); + +#endif + +#if (RTE_FUN_COPY_WDG_TO_RAM == BL_FUN_ON) //l + extern const __IO wdg_Header g_WdgHeader __attribute__((section(".RAMCODE_WDG"))); +#else + //#pragma location = "RAMCODE" + extern const __IO wdg_Header g_WdgHeader; +#endif + +#endif \ No newline at end of file diff --git a/code_boot_out/asil/middle/autosar_bl/sources/base/bl_booting.c b/code_boot_out/asil/middle/autosar_bl/sources/base/bl_booting.c new file mode 100644 index 0000000..1a2ea25 --- /dev/null +++ b/code_boot_out/asil/middle/autosar_bl/sources/base/bl_booting.c @@ -0,0 +1,258 @@ +/**************************************************************************//** + * + * \copyright This software is the property of Technologies. Any + * information contained in this doc should not be reproduced, + * or used, or disclosed without the written authorization from + * Technologies. + * + * \brief This is the source file of the booting manager module. + * + * \file bl_booting.c + * \ingroup booting_manager_module + * \author + * + * \version 5.1.0 + * \date 27/03/2014 + * + * \par Changelist + * Version | Date | Authors | CR# | Descriptions + * -------- | ---------- | ---------------- | --- | ------------ + * 01.00.00 | 15/03/2010 | hewei.zhang | N/A | Boot010001 + * 01.02.00 | 16/06/2010 | hewei.zhang | N/A | Boot010003 + * 01.03.00 | 18/08/2010 | hewei.zhang | N/A | Boot010004 + * 02.00.00 | 16/05/2011 | mingqing.tang | N/A | Boot020001 + * 02.05.00 | 25/05/2011 | mingqing.tang | N/A | Boot020006 + * 03.00.00 | 15/09/2011 | mingqing.tang | N/A | Boot030001 + * 03.02.00 | 20/10/2011 | mingqing.tang | N/A | Boot030003 + * 05.00.00 | 19/06/2013 | xin.shang | N/A | Boot050001 + * 05.01.00 | 27/03/2014 | mingqing.tang | N/A | Boot050002 + * + *****************************************************************************/ +#include "bl_rte.h" +#include "bl_logical_block.h" +#include "bl_data.h" +#include "bl_booting.h" +#include "bl_booting_cfg.h" +#include "wdog.h" + +/***************************************************************************** + * QAC Suppression + *****************************************************************************/ +/*PRQA S 506,781,1532,2103,3112,3210,3227,3442 EOF*/ +/* + * 506:Dereferencing pointer value that is possibly NULL. + * The parameter flag is not a null pointer. + * + * MISRA-C:2004 5.6(781):The identifier is used as a structure/union member. + * The member of the structure is used through the structure object. + * + * 1532:The function is only referenced in one translation unit. + * + * 2103:Integral promotion, unsigned short promoted to unsigned int. + * This message will therefore only be generated when a short and an int are of + * equal size. + * + * MISRA-C:2004 14.2(3112):This statement has no side-effect. + * App_GetIntegralityValue is reserved to future.(void)dct is used by IDE to + * avoid a warning. + * + * 3210:The global identifier is declared but is not used. + * The functions are used in the bl_dcm_cfg.c file. + * The g_UdsPlatformAdapter is used in the bl_process_driver_cfg.c file. + * + * 3227:The parameter is never modified and so it could be declared with const. + * + * 3442:Operator other than & or = applied to a volatile object. + * + */ + +/***************************************************************************** + * Internal Macro Definitions + *****************************************************************************/ + +/***************************************************************************** + * Internal Type Definitions + *****************************************************************************/ + +/***************************************************************************** + * Internal Structure Definitions + *****************************************************************************/ + +/***************************************************************************** + * Internal Function Declarations + *****************************************************************************/ +/***************************************************************************** + * Internal Variable Definitions + *****************************************************************************/ + +/***************************************************************************** + * Global Variable Definitions + *****************************************************************************/ + +/***************************************************************************** + * Function Definitions + *****************************************************************************/ +/**************************************************************************//** + * + * \details Check the booting flags, if one of the flag is valid, need not to + * check the others. + * + * \return Return the flag which is checked valid. + * + * \retval BOOTING_FLAG_NULL - none of the flag is valid. + * \retval BOOTING_FLAG_REPROGRAM_VALID - reprogram flag is valid. + * \retval BOOTING_FLAG_APPLICATION_VALID - application flag is valid. + * \retval BOOTING_FLAG_SYSTEM_RESET - reset flag is valid. + * + * \since V2.0.0 + * + *****************************************************************************/ +bl_BootingFlag_t Bootm_CheckBootingRequirement(void) +{ + bl_BootingFlag_t flag = (bl_BootingFlag_t)BOOTING_FLAG_NULL; + bl_u16_t i; + bl_u16_t number; + bl_Return_t result; + const bl_BootingChecker_t *checker; + + number = g_BootingCheckerList.number; // BOOTM_NUMBER_OF_BOOTING_CHECKER + checker = g_BootingCheckerList.checkerList; // gs_BootingChecker + + for (i = 0; i < number; i++) + { + result = checker[i](&flag); // gs_BootingChecker[i] Bootm_ReprogramFlagChecker(&flag) + // or Bootm_AppValidFlagChecker[&flag] + if (BL_ERR_OK == result) + { + break; + } + } + + return flag; +} + +/**************************************************************************//** + * + * \details System go to the application. + * + * \note If the stay-in-boot function is turned on, execute the + * stay-in-boot function. If the function return OK, exit and stay in + * the bootloader. + * + * \since V1.0.0 + * + *****************************************************************************/ +extern void boot_app_jump(void); +void Bootm_GotoApplication(void) +{ +#if(BL_FUN_ON == RTE_FUN_STAY_IN_BOOT) + bl_Return_t ret; + + ret = Rte_StayInBoot(); + if(BL_ERR_OK == ret) + { + /*A valid message of the stay in boot function is received.*/ + } + else +#endif + { + #if 1 + wdog_task(); + Rte_GotoApplication(); + #else + boot_app_jump(); + #endif + /*never return*/ + } + + return ; +} + +/**************************************************************************//** + * + * \details Check the reprogram flag. + * + * \param[out] flag - the buffer of the flag. + * + * \return If reprogram flag is checked valid returns BL_ERR_OK, otherwise returns + * BL_ERR_NOT_OK. + * + * \retval BL_ERR_OK - the reprogram flag is checked valid. + * \retval BL_ERR_NOT_OK - the reprogram flag is checked invalid. + * + * \since V5.0.0 + * + *****************************************************************************/ +bl_Return_t Bootm_ReprogramFlagChecker(bl_BootingFlag_t *flag) +{ + bl_Return_t ret; + + ret = Dm_IsDefaultData(BOOTM_REPROGRAM_FLAG_DID); //是不是 默認值； + if (BL_ERR_OK == ret) + { + (void)Dm_ClearData(BOOTM_REPROGRAM_FLAG_DID); //如果是，就要留在 編程會話裡; 但是清除他，是為了重啟，自由進到app + + *flag = (bl_BootingFlag_t)BOOTING_FLAG_REPROGRAM_VALID; + } + + return ret; +} + +/**************************************************************************//** + * + * \details Check the application flag. + * + * \param[out] flag - the buffer of the flag. + * + * \return If application flag is checked valid returns BL_ERR_OK, otherwise + * returns BL_ERR_NOT_OK. + * + * \retval BL_ERR_OK - the application flag is checked valid. + * \retval BL_ERR_NOT_OK - the application flag is checked invalid. + * + * \since V5.0.0 + * + *****************************************************************************/ +bl_Return_t Bootm_AppValidFlagChecker(bl_BootingFlag_t *flag) +{ + bl_Return_t ret; + + ret = Lbm_IsAllValid(); // 判斷 flash app flash driver 是 LBM_IS_VALID_STATUS 或 updated 或 nocare + if(BL_ERR_OK == ret) + { + *flag = (bl_BootingFlag_t)BOOTING_FLAG_APPLICATION_VALID; + } + + return ret; +} + +/**************************************************************************//** + * + * \details Check the reset flag. + * + * \param[out] flag - the buffer of the flag. + * + * \return If reset flag is checked valid returns BL_ERR_OK, otherwise returns + * BL_ERR_NOT_OK. + * + * \retval BL_ERR_OK - the reset flag is checked valid. + * \retval BL_ERR_NOT_OK - the reset flag is checked invalid. + * + * \since V5.0.0 + * //把應用層 flash app valid 值 清除了 + *****************************************************************************/ +bl_Return_t Bootm_ResetFlagChecker(bl_BootingFlag_t *flag) +{ + bl_Return_t ret; + + ret = Dm_IsDefaultData(BOOTM_RESET_FLAG_DID); + if (BL_ERR_OK == ret) + { + (void)Dm_ClearData(BOOTM_RESET_FLAG_DID); + + *flag = (bl_BootingFlag_t)BOOTING_FLAG_SYSTEM_RESET; + } + + return ret; +} + diff --git a/code_boot_out/asil/middle/autosar_bl/sources/base/bl_common.c b/code_boot_out/asil/middle/autosar_bl/sources/base/bl_common.c new file mode 100644 index 0000000..db08b7d --- /dev/null +++ b/code_boot_out/asil/middle/autosar_bl/sources/base/bl_common.c @@ -0,0 +1,388 @@ +/**************************************************************************//** + * + * \copyright This software is the property of Technologies. Any + * information contained in this doc should not be reproduced, + * or used, or disclosed without the written authorization from + * Technologies. + * + * \brief This is the source file of the common module. + * + * \file bl_common.c + * \ingroup common_module + * \author + * + * \version 5.1.0 + * \date 27/03/2014 + * + * \par Changelist + * Version | Date | Authors | CR# | Descriptions + * -------- | ---------- | ---------------- | --- | ------------ + * 01.00.00 | 15/03/2010 | hewei.zhang | N/A | Boot010001 + * 03.00.00 | 15/09/2011 | mingqing.tang | N/A | Boot030001 + * 05.00.00 | 19/06/2013 | mingqing.tang | N/A | Boot050001 + * 05.01.00 | 27/03/2014 | mingqing.tang | N/A | Boot050002 + * + *****************************************************************************/ +#include "bl_common.h" + +/***************************************************************************** + * QAC Suppression + *****************************************************************************/ +/*PRQA S 310,506,602,1503,1532,2103,3212,3227,3435,3453,3456 EOF*/ +/* + * MISRA-C:2004 11.4(310):Casting to different object pointer type. + * + * 506:Dereferencing pointer value that is possibly NULL. + * The parameter delay is not a null pointer. + * + * MISRA-C:2004 20.2(602):The identifier is reserved for use by the library. + * The Bootloader do not use any library funtion and use the underscores to + * indicate that the function is a interal function. + * + * MISRA-C:2004 14.1(1503):The function is defined but is not used within this + * project. + * these functions will be used When correlative macro is enable. + * + * 1532:The function is only referenced in one translation unit. + * all functions in this file are configurations in the Security Module. + * + * 2103:Integral promotion, unsigned short promoted to unsigned int. + * This message will therefore only be generated when a short and an int are of + * equal size. + * + * 3212:This explicit cast is redundant and could be removed. + * + * 3227:The parameter is never modified and so it could be declared with const. + * + * MISRA-C:2004 19.4(3435):Parameter is used more than once in this macro. + * + * MISRA-C:2004 19.7(3453):A function could probably be used instead of this + * function-like macro. + * These macros do not have side-effect. + * + * 3456:Parameter will be evaluated more than once when this macro is used. + * When these macros is used, there is no side-effect. + * + */ + +/***************************************************************************** + * Internal Macro Definitions + *****************************************************************************/ +#define BL_BE32TOMCU(buf) (bl_u32_t)( (((bl_u32_t)(buf)[0] & 0xFFUL) << 24u)\ + | (((bl_u32_t)(buf)[1] & 0xFFUL) << 16u)\ + | (((bl_u32_t)(buf)[2] & 0xFFUL) << 8u)\ + | (((bl_u32_t)(buf)[3] & 0xFFUL) << 0u)) + +#define BL_LE32TOMCU(buf) (bl_u32_t)( (((bl_u32_t)(buf)[3] & 0xFFUL) << 24u)\ + | (((bl_u32_t)(buf)[2] & 0xFFUL) << 16u)\ + | (((bl_u32_t)(buf)[1] & 0xFFUL) << 8u)\ + | (((bl_u32_t)(buf)[0] & 0xFFUL) << 0u)) + +#define BL_BE16TOMCU(buf) (bl_u16_t)( (((bl_u16_t)(buf)[0] & 0x00FFu) << 8u)\ + | (((bl_u16_t)(buf)[1] & 0x00FFu) << 0u)) + +#define BL_LE16TOMCU(buf) (bl_u16_t)( (((bl_u16_t)(buf)[1] & 0x00FFu) << 8u)\ + | (((bl_u16_t)(buf)[0] & 0x00FFu) << 0u)) + +#define BL_LEFT_SHIFT_8BITS (8) +#define BL_LEFT_SHIFT_16BITS (16) +#define BL_LEFT_SHIFT_24BITS (24) +#define BL_BYTE_FILL_VALUE (0xFFu) + +/***************************************************************************** + * Internal Type Definitions + *****************************************************************************/ + +/***************************************************************************** + * Internal Structure Definitions + *****************************************************************************/ + +/***************************************************************************** + * Internal Function Declarations + *****************************************************************************/ +/** \brief Copy the data from src to des.*/ +static void _Bl_CopyData(bl_Buffer_t *des, + const bl_Buffer_t *src, + bl_Size_t size); + +/***************************************************************************** + * Internal Variable Definitions + *****************************************************************************/ + +/***************************************************************************** + * Global Variable Definitions + *****************************************************************************/ + +/***************************************************************************** + * Function Definitions + *****************************************************************************/ +/**************************************************************************//** + * + * \details Copy the data from src to des. + * + * \param[out] des - the destination address. + * \param[in] src - the source address. + * \param[in] size - the size of the data. + * + * \since V1.0.0 + * + *****************************************************************************/ +void Bl_MemCpy(bl_Buffer_t *des,const bl_Buffer_t *src, bl_Size_t size) +{ + if ((des != src) && (des != BL_NULL_PTR)) + { + _Bl_CopyData(des,src,size); + } + + return ; +} +/**************************************************************************//** + * + * \details Set the data to src. + * + * \param[out] des - the destination address. + * \param[in] src - the source content. + * \param[in] size - the size of the data. + * + * \since V1.0.0 + * + *****************************************************************************/ +void Bl_MemSet(bl_Buffer_t *des, bl_Buffer_t src, bl_Size_t size) +{ + bl_u32_t i; + + if (des != BL_NULL_PTR) + { + for (i = 0; i < size; i++) + { + des[i] = src; + } + } + + return; +} + +/**************************************************************************//** + * + * \details exchange the contents in a buffer to data. + * + * \param[in] buf - the contents of data + * + * \since V3.0.0 + * + *****************************************************************************/ +bl_u16_t Bl_Be16ToMcu(const bl_Buffer_t *buf) +{ + bl_u16_t tmp; + +#if (BL_BYTE_WIDTH != BL_BYTE_WIDTH_8) + tmp = BL_BE16TOMCU(buf); +#elif (BL_FORCE_MEMACC_ALIGN == BL_FUN_ON) + _Bl_CopyData((bl_Buffer_t *)&tmp, buf, (bl_Size_t)sizeof(tmp)); +#endif + + return _BL_BE16_TO_MCU(tmp); +} +/**************************************************************************//** + * + * \details exchange the contents in a buffer to data. + * + * \param[in] buf - the contents of data + * + * \since V3.0.0 + * + *****************************************************************************/ +bl_u16_t Bl_Le16ToMcu(const bl_Buffer_t *buf) +{ + bl_u16_t tmp; + +#if (BL_BYTE_WIDTH != BL_BYTE_WIDTH_8) + tmp = BL_LE16TOMCU(buf); +#elif (BL_FORCE_MEMACC_ALIGN == BL_FUN_ON) + _Bl_CopyData((bl_Buffer_t *)&tmp, buf, (bl_Size_t)sizeof(tmp)); +#endif + + return _BL_LE16_TO_MCU(tmp); +} +/**************************************************************************//** + * + * \details exchange the contents in a buffer to data. + * + * \param[in] buf - the contents of data + * + * \since V3.0.0 + * + *****************************************************************************/ +bl_u32_t Bl_Be32ToMcu(const bl_Buffer_t *buf) +{ + bl_u32_t tmp; + +#if (BL_BYTE_WIDTH != BL_BYTE_WIDTH_8) + tmp = BL_BE32TOMCU(buf); +#elif (BL_FORCE_MEMACC_ALIGN == BL_FUN_ON) + _Bl_CopyData((bl_Buffer_t *)&tmp, buf, (bl_Size_t)sizeof(tmp)); +#endif + + return _BL_BE32_TO_MCU(tmp); +} +/**************************************************************************//** + * + * \details exchange the contents in a buffer to data. + * + * \param[in] buf - the contents of data + * + * \since V3.0.0 + * + *****************************************************************************/ +bl_u32_t Bl_Le32ToMcu(const bl_Buffer_t *buf) +{ + bl_u32_t tmp; + +#if (BL_BYTE_WIDTH != BL_BYTE_WIDTH_8) + tmp = BL_LE32TOMCU(buf); +#elif (BL_FORCE_MEMACC_ALIGN == BL_FUN_ON) + _Bl_CopyData((bl_Buffer_t *)&tmp, buf, (bl_Size_t)sizeof(tmp)); +#endif + + return _BL_LE32_TO_MCU(tmp); +} + +/**************************************************************************//** + * + * \details exchange the data to buffer. + * + * \param[out] buf - the buffer + * \param[in] data - the data + * + * \since V5.0.0 + * + *****************************************************************************/ +void Bl_McuToBe16(bl_Buffer_t *buf, bl_u16_t data) +{ + bl_u16_t tmp; + + tmp = _BL_MCU_TO_BE16(data); + +#if (BL_BYTE_WIDTH != BL_BYTE_WIDTH_8) + + buf[0] = (bl_Buffer_t)((tmp >> BL_LEFT_SHIFT_8BITS) & BL_BYTE_FILL_VALUE); + buf[1] = (bl_Buffer_t)((tmp >> 0u) & BL_BYTE_FILL_VALUE); + +#elif (BL_FORCE_MEMACC_ALIGN == BL_FUN_ON) + + _Bl_CopyData(buf, (const bl_Buffer_t *)&tmp, (bl_Size_t)sizeof(tmp)); + +#endif +} + +/**************************************************************************//** + * + * \details exchange the data to buffer. + * + * \param[out] buf - the buffer + * \param[in] data - the data + * + * \since V5.0.0 + * + *****************************************************************************/ +void Bl_McuToLe16(bl_Buffer_t *buf, bl_u16_t data) +{ + bl_u16_t tmp; + + tmp = _BL_MCU_TO_LE16(data); + +#if (BL_BYTE_WIDTH != BL_BYTE_WIDTH_8) + + buf[0] = (bl_Buffer_t)((tmp >> 0u) & BL_BYTE_FILL_VALUE); + buf[1] = (bl_Buffer_t)((tmp >> BL_LEFT_SHIFT_8BITS) & BL_BYTE_FILL_VALUE); + +#elif (BL_FORCE_MEMACC_ALIGN == BL_FUN_ON) + + _Bl_CopyData(buf, (const bl_Buffer_t *)&tmp, (bl_Size_t)sizeof(tmp)); + +#endif +} + +/**************************************************************************//** + * + * \details exchange the data to buffer. + * + * \param[out] buf - the buffer + * \param[in] data - the data + * + * \since V5.0.0 + * + *****************************************************************************/ +void Bl_McuToBe32(bl_Buffer_t *buf, bl_u32_t data) +{ + bl_u32_t tmp; + + tmp = _BL_MCU_TO_BE32(data); + +#if (BL_BYTE_WIDTH != BL_BYTE_WIDTH_8) + + buf[0] = (bl_Buffer_t)((tmp >> 0u) & BL_BYTE_FILL_VALUE); + buf[1] = (bl_Buffer_t)((tmp >> BL_LEFT_SHIFT_8BITS) & BL_BYTE_FILL_VALUE); + buf[2] = (bl_Buffer_t)((tmp >> BL_LEFT_SHIFT_16BITS) & BL_BYTE_FILL_VALUE); + buf[3] = (bl_Buffer_t)((tmp >> BL_LEFT_SHIFT_24BITS) & BL_BYTE_FILL_VALUE); + +#elif (BL_FORCE_MEMACC_ALIGN == BL_FUN_ON) + + _Bl_CopyData(buf, (const bl_Buffer_t *)&tmp, (bl_Size_t)sizeof(tmp)); + +#endif +} + +/**************************************************************************//** + * + * \details exchange the data to buffer. + * + * \param[out] buf - the buffer + * \param[in] data - the data + * + * \since V5.0.0 + * + *****************************************************************************/ +void Bl_McuToLe32(bl_Buffer_t *buf, bl_u32_t data) +{ + bl_u32_t tmp; + + tmp = _BL_MCU_TO_LE32(data); + +#if (BL_BYTE_WIDTH != BL_BYTE_WIDTH_8) + + buf[0] = (bl_Buffer_t)((tmp >> BL_LEFT_SHIFT_24BITS) & BL_BYTE_FILL_VALUE); + buf[1] = (bl_Buffer_t)((tmp >> BL_LEFT_SHIFT_16BITS) & BL_BYTE_FILL_VALUE); + buf[2] = (bl_Buffer_t)((tmp >> BL_LEFT_SHIFT_8BITS) & BL_BYTE_FILL_VALUE); + buf[3] = (bl_Buffer_t)((tmp >> 0u) & BL_BYTE_FILL_VALUE); + +#elif (BL_FORCE_MEMACC_ALIGN == BL_FUN_ON) + + _Bl_CopyData(buf, (const bl_Buffer_t *)&tmp, (bl_Size_t)sizeof(tmp)); + +#endif +} + +/**************************************************************************//** + * + * \details Copy the data from src to des. + * + * \param[out] des - the destination address. + * \param[in] src - the source address. + * \param[in] size - the size of the data. + * + * \since V3.0.0 + * + *****************************************************************************/ +static void _Bl_CopyData(bl_Buffer_t *des, + const bl_Buffer_t *src, + bl_Size_t size) +{ + bl_u32_t i; + + for (i = 0; i < size; i++) + { + des[i] = src[i]; + } +} + diff --git a/code_boot_out/asil/middle/autosar_bl/sources/base/bl_main.c b/code_boot_out/asil/middle/autosar_bl/sources/base/bl_main.c new file mode 100644 index 0000000..054f74e --- /dev/null +++ b/code_boot_out/asil/middle/autosar_bl/sources/base/bl_main.c @@ -0,0 +1,86 @@ +#include "main.h" +#include "user_init.h" +#include "logic_delay.h" +#include "logic_timer.h" +//#include "lin_app.h" + +#include "stack_check.h" + +#include "boot_app.h" + +#include "bl_timer.h" +#include "bl_can.h" +#include "bl_booting.h" +#include "bl_process_driver.h" +#include "bl_system.h" +#include "bl_logical_block.h" +#include "bl_flash_if.h" + +u8 g_flash_read_flag2 =0xff; + + +int bl_main(void) +{ + u8 i; + bl_BootingFlag_t flag; + + //__disable_irq(); + + //__enable_irq(); + + /*Initialize system*/ + Rte_PreInit(); + #if 1 + #ifdef BOOT_STATE_PROG_DEBUG_EN + adpt_test_init(); + #endif + #ifdef FLASH_TEST_ERASE_WRITE + flash_if_test(); + #endif + boot_app_init(); + flag = Bootm_CheckBootingRequirement(); + //flag = BOOTING_FLAG_REPROGRAM_VALID; + if (BOOTING_FLAG_APPLICATION_VALID == flag) + { + if(lb_logic_block_read_app_valid1()!=0) + { + #ifdef BOOT_STATE_PROG_DEBUG_EN + #else + //#ifdef FALSH_DRIVER_INIT_EN + //#else + //boot_app_jump(); + wdog_task(); + Bootm_GotoApplication(); + //#endif + #endif + flag=0u; + } + else + { + flag=0u; + } + /*never return unless StayInBoot enable and receive a valid SIB frame*/ + } + g_flash_read_flag2 = flag; + #endif + (void)Rte_PostInit(); + + #ifdef FALSH_DRIVER_INIT_EN + lb_logic_block_init_flashdrv(); + //Dm_WriteDefaultData(1); //flash app + //g_test_flash_app_flag = Dm_IsDefaultData(1); + #endif + + Rte_ProcessReset(flag); // 跳到這里 flag=0; 或者 BOOTING_FLAG_REPROGRAM_VALID + #ifdef NVM_EEPROM_EXT_EN + nvm_eeprom_init(); //要在不跳转时，初始化EEPROM + #endif + + for( ;; ) + { + wdog_task(); + //app_task_1ms(); + PROC_SCHEDULE(); // 相當於 Proc_PassiveSchedule(&g_UdsPlatformAdapter) + } +} + diff --git a/code_boot_out/asil/middle/autosar_bl/sources/base/bl_process_driver.c b/code_boot_out/asil/middle/autosar_bl/sources/base/bl_process_driver.c new file mode 100644 index 0000000..c33836a --- /dev/null +++ b/code_boot_out/asil/middle/autosar_bl/sources/base/bl_process_driver.c @@ -0,0 +1,155 @@ +/**************************************************************************//** + * + * \copyright This software is the property of Technologies. Any + * information contained in this doc should not be reproduced, + * or used, or disclosed without the written authorization from + * Technologies. + * + * \brief This is the source file of the process driver module. + * + * \file bl_process_driver.c + * \ingroup process_driver_module + * \author + * + * \version 5.1.0 + * \date 27/03/2014 + * + * \par Changelist + * Version | Date | Authors | CR# | Descriptions + * -------- | ---------- | ---------------- | --- | ------------ + * 04.00.00 | 12/03/2012 | mingqing.tang | N/A | Boot040001 + * 04.03.00 | 22/03/2012 | mingqing.tang | N/A | Boot040004 + * 04.07.00 | 18/04/2012 | mingqing.tang | N/A | Boot040008 + * 05.00.00 | 19/06/2013 | heli.zhang | N/A | Boot050001 + * 05.01.00 | 27/03/2014 | mingqing.tang | N/A | Boot050002 + * + *****************************************************************************/ +#include "bl_process_driver.h" +#include "bl_process_driver_cfg.h" + +/***************************************************************************** + * QAC Suppression + *****************************************************************************/ +/*PRQA S 506,1532,3406 EOF*/ +/* + * 506:Dereferencing pointer value that is possibly NULL. + * The g_CurProcessDriver is not a null pointer when the proc_init is called. + * + * 1532:The function is only referenced in one translation unit. + * all functions in this file are configurations in the Security Module. + * + * MISRA-C:2004 8.5(3406):Object with external linkage has been defined in a + * header file. + * The g_CurProcessDriver is not defined in a header file. + * + */ + +/***************************************************************************** + * Internal Macro Definitions + *****************************************************************************/ + +/***************************************************************************** + * Internal Type Definitions + *****************************************************************************/ + +/***************************************************************************** + * Internal Structure Definitions + *****************************************************************************/ + +/***************************************************************************** + * Internal Function Declarations + *****************************************************************************/ + +/***************************************************************************** + * Internal Variable Definitions + *****************************************************************************/ + +/***************************************************************************** + * Global Variable Definitions + *****************************************************************************/ +/** \brief Point to current process driver.*/ +const bl_ProcessDriver_t *g_CurProcessDriver; + +/***************************************************************************** + * Function Definitions + *****************************************************************************/ +/**************************************************************************//** + * + * \details Initialize the process driver module. This function initializes + * the current process driver pointer. + * + * \since V4.0.0 + * + *****************************************************************************/ +void Proc_Init(void) +{ + g_CurProcessDriver = &(g_ProcessDriverList.procList[PROC_DEFAULT_DRIVER]); //就是 gs_ProcessDriver + + if (g_CurProcessDriver->adapter != BL_NULL_PTR) // 就是 g_UdsPlatformAdapter + { + (void)g_CurProcessDriver->adapter->Init(); // 調用了 Adpt_UdsInit + } +} + +#if (PROC_NUMBER_OF_DRIVER > 1u) //不成立 +/**************************************************************************//** + * + * \details Activate the current process driver. + * + * \param[in] id - Indicates which process driver will be activated. + * + * \return If activation is successful return BL_ERR_OK, + * otherwise return BL_ERR_NOT_OK. + * + * \retval BL_ERR_OK - Activate successfully. + * \retval BL_ERR_NOT_OK - Activate unsuccessfully. + * + * \since V5.0.0 + * + *****************************************************************************/ +bl_Return_t Proc_ActivateDriver(bl_u16_t id) +{ + bl_Return_t ret = BL_ERR_NOT_OK; + + if (id < g_ProcessDriverList.number) + { + g_CurProcessDriver = &(g_ProcessDriverList.procList[id]); //就是 gs_ProcessDriver + + (void)g_CurProcessDriver->adapter->Init(); //激活 Adpt_UdsInit + + ret = BL_ERR_OK; + } + + return ret; +} +#endif + +/**************************************************************************//** + * + * \details timeout callback. + * + * \since V5.0.0 + * 是靠 Rte_ReportEvent(RTE_EVENT_TYPE_MEMOPS_TIMEOUT); //要發送 78負響應 調用 的 + *****************************************************************************/ +void Proc_Timeout(void) +{ + if ((g_CurProcessDriver->adapter != BL_NULL_PTR)) // 就是 g_UdsPlatformAdapter + { + g_CurProcessDriver->adapter->Timeout(); //調用 Adpt_UdsTimeOutCallBack + } +} + +/**************************************************************************//** + * + * \details system sleep callback. + * + * \since V5.0.0 + * + *****************************************************************************/ +void Proc_Sleep(void) +{ + if ((g_CurProcessDriver->adapter != BL_NULL_PTR)) // 就是 g_UdsPlatformAdapter + { + g_CurProcessDriver->adapter->Sleep(); //調用 Canif_Sleep + } +} diff --git a/code_boot_out/asil/middle/autosar_bl/sources/base/bl_rte.c b/code_boot_out/asil/middle/autosar_bl/sources/base/bl_rte.c new file mode 100644 index 0000000..0a21d44 --- /dev/null +++ b/code_boot_out/asil/middle/autosar_bl/sources/base/bl_rte.c @@ -0,0 +1,858 @@ +/**************************************************************************//** + * + * \copyright This software is the property of Technologies. Any + * information contained in this doc should not be reproduced, + * or used, or disclosed without the written authorization from + * Technologies. + * + * \brief This is the source file of the runtime environment module. + * + * \file bl_rte.c + * \ingroup rte_module + * \author + * + * + * \version 5.1.0 + * \date 27/03/2014 + * + * \par Changelist + * Version | Date | Authors | CR# | Descriptions + * -------- | ---------- | ---------------- | --- | ------------ + * 01.00.00 | 17/03/2010 | hewei.zhang | N/A | Boot010001 + * 01.01.00 | 20/04/2010 | hewei.zhang | N/A | Boot010002 + * 01.03.00 | 28/05/2010 | hewei.zhang | N/A | Boot010004 + * 01.04.00 | 26/06/2010 | hewei.zhang | N/A | Boot010005 + * 01.08.00 | 24/08/2010 | hewei.zhang | N/A | Boot010009 + * 01.11.00 | 07/12/2010 | hewei.zhang | N/A | Boot010012 + * 02.00.00 | 21/02/2011 | mingqing.tang | N/A | Boot020001 + * 02.02.00 | 15/03/2011 | mingqing.tang | N/A | Boot020003 + * 02.07.00 | 14/06/2011 | mingqing.tang | N/A | Boot020008 + * 03.00.00 | 12/09/2011 | mingqing.tang | N/A | Boot030001 + * 03.03.00 | 17/10/2011 | mingqing.tang | N/A | Boot030004 + * 03.04.00 | 24/10/2011 | mingqing.tang | N/A | Boot030005 + * 03.10.00 | 03/01/2012 | mingqing.tang | N/A | Boot030011 + * 03.12.00 | 18/01/2012 | mingqing.tang | N/A | Boot030013 + * 03.18.00 | 29/05/2012 | mingqing.tang | N/A | Boot030019 + * 05.00.00 | 19/06/2013 | mingqing.tang | N/A | Boot050001 + * 05.01.00 | 27/03/2014 | mingqing.tang | N/A | Boot050002 + * + *****************************************************************************/ +#include "bl_rte.h" +#include "bl_logical_block.h" +#include "bl_memory.h" +#include "bl_system.h" +#include "bl_booting.h" +#include "bl_app.h" +#include "bl_process_driver.h" +#include "bl_security.h" +#include "bl_rte_cfg.h" + +#include "bl_timer.h" +#include "calibration.h" +//#include "system_ac780x.h" +#include "wdog.h" + + +#ifdef FALSH_DRIVER_INIT_EN +#include "common_types.h" +#include "bl_data.h" +#endif + +//#define DCM_DEBUG_EN 1 + +#ifdef DCM_DEBUG_EN +typedef struct +{ + u8 id; + u32 value; +}bl_dcm_debug_s; +STATIC bl_dcm_debug_s g_bl_dcm_debug; +#endif + +/***************************************************************************** + * QAC Suppression + *****************************************************************************/ +/*PRQA S 506,602,781,1252,1257,1503,1532,2100,2103,3112,3212,3227,3406 EOF*/ +/*PRQA S 3453 EOF*/ +/* + * 506:Dereferencing pointer value that is possibly NULL. + * The parameter delay is not a null pointer. + * + * MISRA-C:2004 20.2(602):The identifier is reserved for use by the library. + * The Bootloader do not use any library funtion and use the underscores to + * indicate that the function is a interal function. + * + * MISRA-C:2004 5.6(781):The identifier is used as a structure/union member. + * The member of the structure is used through the structure object. + * + * 1252:suffixed integer constant implicitly converted to different integer. + * + * 1257:Suffixed integer constant implicitly converted to smaller integer type + * on assignment. + * + * MISRA-C:2004 14.1(1503):The function is defined but is not used within this + * project. + * these functions will be used When correlative macro is enable. + * + * 1532:The function is only referenced in one translation unit. + * all functions in this file are configurations in the Security Module. + * + * 2100:Integral promotion : unsigned char promoted to signed int. + * + * 2103:Integral promotion, unsigned short promoted to unsigned int. + * This message will therefore only be generated when a short and an int are of + * equal size. + * + * MISRA-C:2004 14.2(3112):This statement has no side-effect. + * The DEBUG_ASSERT macro is used to debug bootloader when the BL_DEBUG is + * enable. When the BL_DEBUG is disable, the DEBUG_ASSERT macro is null. + * + * 3212:This explicit cast is redundant and could be removed. + * + * 3227:The parameter is never modified and so it could be declared with const. + * + * MISRA-C:2004 8.5(3406):Object with external linkage has been defined in a + * header file. + * The g_DownContext is not defined in a header file. + * + * MISRA-C:2004 19.7(3453):A function could probably be used instead of this + * function-like macro. + * These macros have no side-effect. + * + */ + +/***************************************************************************** + * Verify The Configurations of Function Macro + *****************************************************************************/ +#if (RTE_FUN_STAY_IN_BOOT == BL_FUN_OFF) +#if (RTE_FUN_STAY_IN_BOOT_RESET == BL_FUN_ON) +#error "The stay in boot function is closed!" +#endif +#endif + +#if (RTE_FUN_SYSTEM_SLEEP == BL_FUN_OFF) +#if (RTE_FUN_ADDITIONAL_SLEEP_CONDITION == BL_FUN_ON) +#error "The system sleep function is closed!" +#endif +#endif + +#if (RTE_FUN_FILE_HEADER_PROCESS == BL_FUN_OFF) +#if ((RTE_FUN_INTEGRALITY_VALUE_IN_HEADER == BL_FUN_ON) \ + || (RTE_FUN_COMPATIBILITY_VALUE_IN_HEADER == BL_FUN_ON)) +#error "The file header process function is closed!" +#endif +#endif + +/***************************************************************************** + * Internal Macro Definitions + *****************************************************************************/ +#define RTE_RESET_SYSTEM_SLEEP_COUNT() (gs_SystemSleepCount =\ + (bl_u32_t)(RTE_SYSTEM_SLEEP_TIME\ + / RTE_SYSTEM_SCHEDULE_PERIOD)) //80s + +#define RTE_SUB_SYSTEM_SLEEP_COUNT() (gs_SystemSleepCount -= 1UL) + +#define RTE_ADD_SYSTEM_SLEEP_COUNT() (gs_SystemSleepCount += 1UL) + +#define RTE_IS_SYSTEM_SLEEP() (gs_SystemSleepCount == 0UL) + +#define RTE_RESET_SIB_COUNT() (gs_StayInBootResetCount =\ + (bl_u16_t)(RTE_STAY_IN_BOOT_RESET_TIME\ + / RTE_SYSTEM_SCHEDULE_PERIOD)) //20s + +#define RTE_SUB_SIB_COUNT() (gs_StayInBootResetCount -= 1u) + +#define RTE_IS_SIB_RESET() (gs_StayInBootResetCount == 0u) + +#define RTE_DISABLE_SIB_RESET() (gs_StayInBootResetFlag = 0u) + +#define RTE_ENABLE_SIB_RESET() (gs_StayInBootResetFlag = 1u) + +#define RTE_IS_SIB_RESET_ENABLE() (gs_StayInBootResetFlag == 1u) + +#define RTE_DO_EVENT_PROCESSER(event) g_EventProcessList[event]() + +/***************************************************************************** + * Internal Type Definitions + *****************************************************************************/ + +/***************************************************************************** + * Internal Structure Definitions + *****************************************************************************/ + +/***************************************************************************** + * Internal Function Declarations + *****************************************************************************/ +static void _Rte_Deinit(void); +#if (RTE_FUN_STAY_IN_BOOT == BL_FUN_ON) +static void _Rte_InitStayInBoot(void); + +static bl_Return_t _Rte_VerifyStayInBoot(bl_ComIfHandle_t handle, + bl_BufferSize_t size, + const bl_Buffer_t *buffer); +#endif + +/***************************************************************************** + * Internal Variable Definitions + *****************************************************************************/ +#if (RTE_FUN_SYSTEM_SLEEP == BL_FUN_ON) +STATIC bl_u32_t gs_SystemSleepCount; +#endif + +#if (RTE_FUN_STAY_IN_BOOT_RESET == BL_FUN_ON) +STATIC bl_u16_t gs_StayInBootResetCount; +STATIC bl_u8_t gs_StayInBootResetFlag; +#endif + +/***************************************************************************** + * Global Variable Definitions + *****************************************************************************/ +bl_DownContext_t g_DownContext; +/***************************************************************************** + * Function Definitions + *****************************************************************************/ +/**************************************************************************//** + * + * \details In this interface, the system clock driver is initialized first. + * + * \return None. + * + * \warning If the initialization is fails, this interface will wait until + * the power on again. + * + * \since V2.0.0 + * + *****************************************************************************/ + +void Rte_PreInit(void) +{ + Sys_InitClock(); + +#if ((RTE_FUN_WATCHDOG == BL_FUN_ON) && (RTE_FUN_PRE_INIT_WDG == BL_FUN_ON)) //RTE_FUN_PRE_INIT_WDG ==OFF + g_RteInfo.wdgOps->Init(); //看門狗初始化 --這時不初始化 Wdg_Init +#endif + +#if (RTE_FUN_STAY_IN_BOOT == BL_FUN_ON) + _Rte_InitStayInBoot(); // gs_StayInBootResetCount =20s //gs_StayInBootResetFlag + + (void)g_RteInfo.comOps->Init(); //can 初始化 Canif_Init + + g_RteInfo.timerOps->Init(); //定時器初始化 Tim_Init +#endif + + (void)Lbm_Init(); // logic block 初始化 包含 memeory data等等 + __enable_irq(); //可以再移上面一點 + return ; +} + +/**************************************************************************//** + * + * \details post initialize the Bootloader. + * + * \return If this module is initialized successfully returns BL_ERR_OK, + * otherwise returns BL_ERR_NOT_OK. + * + * \retval BL_ERR_OK - initialize successfully. + * \retval BL_ERR_NOT_OK - initialize unsuccessfully. + + * + * \since V2.0.0 + * + *****************************************************************************/ +bl_Return_t Rte_PostInit(void) +{ + bl_Return_t ret; + + /*Initialize the download context.*/ + g_DownContext.segIndex = 0; + g_DownContext.lbId = BL_ERROR_ID_16BIT; + g_DownContext.segment.number = RTE_NUMBER_OF_DOWN_SEGMENT; // 最多30 + g_DownContext.segment.segList = g_DownSegment; // 每個seg的起始地址 和長度 + +#if (RTE_FUN_SYSTEM_SLEEP == BL_FUN_ON) + RTE_RESET_SYSTEM_SLEEP_COUNT(); // gs_SystemSleepCount=80s +#endif + +#if ((RTE_FUN_WATCHDOG == BL_FUN_ON) && (RTE_FUN_PRE_INIT_WDG == BL_FUN_OFF)) + g_RteInfo.wdgOps->Init(); //看門狗初始化，真正 +#endif + +#if (RTE_FUN_STAY_IN_BOOT == BL_FUN_OFF) + + g_RteInfo.timerOps->Init(); //定時器又初始化？？ +#endif + + cal_did_init(); + + Proc_Init(); // 調用了 Adpt_UdsInit + + ret = bl_Mem_Init(); //memory 初始化，但其實 Flsif_Init 并没有真正初始化; 要在後面 34 36服務，把flash drv都下載完才可以，也可以手動。 FALSH_DRIVER_INIT_EN 有測試 + if (BL_ERR_OK == ret) + { + Secm_Init(); // 安全算法 Acc_UdsDemoInit Bzip2_Init 等 + } + + return ret; +} + +/**************************************************************************//** + * + * \details find and call the reset process function. + * + * \return None. + * + * \since V1.0.0 + * 在main初始化時 + *****************************************************************************/ +void Rte_ProcessReset(bl_BootingFlag_t flag) +{ + bl_u16_t i; + bl_u16_t num; + const bl_ResetProcess_t *list; + + num = g_ResetProcessList.number; // RTE_NUMBER_OF_BOOTING_PROCESSOR + list = g_ResetProcessList.resetList; // gs_ResetProcess + + for (i = 0; i < num; i++) + { + if (flag == list[i].flag) // 先是 BOOTING_FLAG_REPROGRAM_VALID == flag 則調用 Adpt_ReprogramValidProcess 一般會是這種情況; 也有可能都不滿足 + // 如果是 BOOTING_FLAG_APPLICATION_VALID == flag 則調用 Adpt_AppValidProcess 基本上都跳到 APP了 + { + list[i].Process(); + break; + } + } + #if (RTE_FUN_STAY_IN_BOOT_RESET == BL_FUN_ON) + //如果 app flag 失敗，且不是編程模式 + if(flag == 0u) + { + RTE_ENABLE_SIB_RESET(); + } + #endif + return ; +} + +/**************************************************************************//** + * + * \details periodic schedule the callback. + * + * \return None. + * + * \since V1.0.0 + * + *****************************************************************************/ +void Rte_PeriodicSchedule(bl_PeriodicCallback_t callback) +{ + bl_Return_t ret; + + ret = g_RteInfo.timerOps->IsTimeout(); /* 1000 us ---> 250 us timer period */ // Tim_IsTimeout + if (BL_ERR_OK == ret) + { + BL_DEBUG_ASSERT_NO_RET(callback != BL_NULL_PTR); + + callback(); // Adpt_UdsPeriodicCallback + /* + Adpt_DelayTimeCallback(&gs_UdsPrivateData.delay); // + Dcm_TimerFunction(); + Cantp_PeriodFunction(); + Dcm_MainFunction(); + */ + +#if (RTE_FUN_SYSTEM_SLEEP == BL_FUN_ON) + + RTE_SUB_SYSTEM_SLEEP_COUNT(); + + if (RTE_IS_SYSTEM_SLEEP()) + { + +#if (RTE_FUN_ADDITIONAL_SLEEP_CONDITION == BL_FUN_ON) + if (g_RteInfo.sleepOps->IsSleep()) +#endif + { + RTE_RESET_SYSTEM_SLEEP_COUNT(); + + g_RteInfo.sleepOps->SleepCallback(); + RTE_DO_EVENT_PROCESSER(RTE_EVENT_TYPE_SYSTEM_SLEEP); + g_RteInfo.sleepOps->SystemSleep(); + g_RteInfo.sleepOps->WakeupCallback(); + } +#if (RTE_FUN_ADDITIONAL_SLEEP_CONDITION == BL_FUN_ON) + else + { + RTE_ADD_SYSTEM_SLEEP_COUNT(); + } +#endif + + } + +#endif + +#if (RTE_FUN_STAY_IN_BOOT_RESET == BL_FUN_ON) + if (RTE_IS_SIB_RESET_ENABLE()) // gs_StayInBootResetFlag==1 + { + RTE_SUB_SIB_COUNT(); //gs_StayInBootResetCount-1 + if (RTE_IS_SIB_RESET()) // gs_StayInBootResetCount==0 + { + RTE_DISABLE_SIB_RESET(); //gs_StayInBootResetFlag=0 + g_RteInfo.SystemReset(); //boot復位 + } + } +#endif + + } + + return ; +} + +/**************************************************************************//** + * + * \details call the event process function. + * + * \return None. + * + * \since V1.0.0 + * + *****************************************************************************/ +void Rte_ReportEvent(bl_u16_t type) +{ + BL_DEBUG_ASSERT_NO_RET(type < RTE_NUMBER_OF_EVENT); + + RTE_DO_EVENT_PROCESSER(type); // 寫入 g_EventProcessList + /* + #define RTE_NUMBER_OF_EVENT (4) + #define RTE_EVENT_TYPE_RECV_REQUEST (0x0000u) &Rte_ResetTimer, // 重置 gs_StayInBootResetCount=初始 + #define RTE_EVENT_TYPE_MEMOPS_TIMEOUT (0x0001u) &Proc_Timeout, // Adpt_UdsTimeOutCallBack //負響應 78 + #define RTE_EVENT_TYPE_S3TIME_TIMEOUT (0x0002u) RTE_WATCHDOG_OPS_RESET, //Wdg_FastReset + #define RTE_EVENT_TYPE_SYSTEM_SLEEP (0x0003u) &Proc_Sleep, + */ +} + +/**************************************************************************//** + * + * \details Reset the count of the sleep timer and SIB reset timer. + * + * \return None. + * + * \since V1.0.0 + * + *****************************************************************************/ +void Rte_ResetTimer(void) +{ +#if (RTE_FUN_SYSTEM_SLEEP == BL_FUN_ON) + RTE_RESET_SYSTEM_SLEEP_COUNT(); +#endif + +#if (RTE_FUN_STAY_IN_BOOT_RESET == BL_FUN_ON) + RTE_RESET_SIB_COUNT(); +#endif + + return ; +} +/**************************************************************************//** + * + * \details Save the address and size into dct. + * + * \return None. + * + * \since V3.0.0 + * 34 服務時，請求下載 則把 seg的地址和長度 保存 + *****************************************************************************/ +bl_Return_t Rte_SaveAddressInfo(bl_DownContext_t *dct, //g_DownContext + bl_Address_t address, + bl_Size_t size) +{ + bl_Return_t ret = BL_ERR_NOT_OK; + bl_u16_t index; + + index = dct->segIndex; + if (index < dct->segment.number) + { + dct->segment.segList[index].address = address; + dct->segment.segList[index].size = size; + + dct->segIndex = index + 1u; + + ret = BL_ERR_OK; + } + + return ret; +} + +/**************************************************************************//** + * + * \details Clear the address in the dct. + * + * \return None. + * + * \since V3.0.0 + * + *****************************************************************************/ +void Rte_ClearAddressInfo(bl_DownContext_t *dct) +{ + dct->segIndex = 0; +} + +/**************************************************************************//** + * + * \details get the download status in the dct. + * + * \return None. + * + * \since V2.0.0 + * + *****************************************************************************/ +bl_DownStatus_t Rte_GetDownStatus(const bl_DownContext_t *dct,bl_u16_t gId) +{ + bl_DownStatus_t status = 0; + + if (gId < RTE_NUMBER_OF_DOWN_STATUS) + { + status = dct->status[gId]; + } + + return RTE_GET_DOWNSTATUS_VALUE(status); // status & 0x3fffffff +} + +/**************************************************************************//** + * + * \details set the download status in the dct. + * + * \return None. + * + * \since V2.0.0 + * + *****************************************************************************/ +void Rte_SetDownStatus(bl_DownContext_t *dct, bl_DownStatus_t mask) +{ + bl_u16_t id; + + id = RTE_GET_DOWNSTATUS_ID(mask); /*PRQA S 2985*/ //mask >> 30 再 與上 0xff + + dct->status[id] |= RTE_GET_DOWNSTATUS_VALUE(mask); // (mask&0x3ffffffff) + + return ; +} + +/**************************************************************************//** + * + * \details set mutex download status in the dct. + * + * \return None. + * + * \since V5.1.0 + * + *****************************************************************************/ +void Rte_SetMutexDownStatus(bl_DownContext_t *dct, + bl_DownStatus_t mask, + bl_DownStatus_t mutex) +{ + bl_DownStatus_t tmp; + bl_u16_t id; + + tmp = RTE_GET_DOWNSTATUS_VALUE(mask); //mask&3fffffff + if (((tmp & (tmp - 1UL)) == 0UL) && ((mutex & tmp) > 0UL)) + { + id = RTE_GET_DOWNSTATUS_ID(mask); /*PRQA S 2985*/ //mask >> 30 再 與上 0xff + dct->status[id] = (dct->status[id] & (~mutex)) | tmp; + } +} + +/**************************************************************************//** + * + * \details clear the download status in the dct. + * + * \return None. + * + * \since V2.0.0 + * + *****************************************************************************/ +void Rte_ClearDownStatus(bl_DownContext_t *dct, bl_DownStatus_t mask) +{ + bl_u16_t id; + + id = RTE_GET_DOWNSTATUS_ID(mask); /*PRQA S 2985*/ //mask >> 30 再 與上 0xff + + dct->status[id] &= RTE_GET_DOWNSTATUS_VALUE(~mask); // ~(mask&0x3ffffffff) + + return ; +} + +/**************************************************************************//** + * + * \details clear all download status in dct. + * + * \return None. + * + * \since V2.0.0 + * + *****************************************************************************/ +void Rte_ClearAllDownStatus(bl_DownContext_t *dct) +{ + bl_u16_t id; + + for (id = 0; id < RTE_NUMBER_OF_DOWN_STATUS; id++) + { + dct->status[id] = 0; + } + + return ; +} + +/**************************************************************************//** + * + * \details check whether download status is valid. + * + * \return None. + * + * \since V2.0.0 + * + *****************************************************************************/ +bl_Return_t Rte_IsValidStatus(const bl_DownContext_t *dct, + bl_DownStatus_t mask) +{ + bl_Return_t ret = BL_ERR_NOT_OK; + bl_u16_t id; + bl_DownStatus_t value; + + id = RTE_GET_DOWNSTATUS_ID(mask); /*PRQA S 2985*/ //mask >>30 + value = RTE_GET_DOWNSTATUS_VALUE(mask); //mask & 3fffffff + #ifdef DCM_DEBUG_EN + g_bl_dcm_debug.id = id; + g_bl_dcm_debug.value = value; + #endif + if ((value & dct->status[id]) > 0UL) + { + ret = BL_ERR_OK; + } + + return ret; +} + +/**************************************************************************//** + * + * \details check whether all download status are valid. + * + * \return None. + * + * \since V2.0.0 + * + *****************************************************************************/ +bl_Return_t Rte_IsAllValidStatus(const bl_DownContext_t *dct, + bl_DownStatus_t mask) +{ + bl_Return_t ret = BL_ERR_NOT_OK; + bl_u16_t id; + bl_DownStatus_t value; + + id = RTE_GET_DOWNSTATUS_ID(mask); /*PRQA S 2985*/ // id = (mask >> 30) & 0xff + value = RTE_GET_DOWNSTATUS_VALUE(mask); //value = mask & 0x3FFFFFFF + + if ((value & dct->status[id]) == value) //注意 status 一共才 4個 即 RTE_NUMBER_OF_DOWN_STATUS = 4 + { + ret = BL_ERR_OK; + } + + return ret; + +} + +/**************************************************************************//** + * + * \details check whether only one download status is valid. + * + * \return None. + * + * \since V2.0.0 + * + *****************************************************************************/ +bl_Return_t Rte_IsOnlyValidStatus(const bl_DownContext_t *dct, + bl_DownStatus_t mask) +{ + bl_Return_t ret = BL_ERR_NOT_OK; + bl_u16_t id; + bl_DownStatus_t value; + + id = RTE_GET_DOWNSTATUS_ID(mask); /*PRQA S 2985*/ + value = RTE_GET_DOWNSTATUS_VALUE(mask) & dct->status[id]; + + if ((value > 0UL) && ((value & (value - 1UL)) == 0UL)) + { + ret = BL_ERR_OK; + } + + return ret; +} + +/**************************************************************************//** + * + * \details Go to the application. + * + * \return None. + * + * \since V2.0.0 + * + *****************************************************************************/ +void Rte_GotoApplication(void) +{ + + //Sys_RemapInterrupt(); // IVBR 重新指向 中斷向量，相當於NVIC + + Sys_ProtectBootloader(); //目前是空的 + + _Rte_Deinit(); //看門狗 定時器 CAN sysclk 反初始化 + __disable_irq(); + Sys_RemapInterrupt(); // IVBR 重新指向 中斷向量，相當於NVIC + Sys_GotoApplication(); //真正跳到app +} +/**************************************************************************//** + * + * \details Do nothing. + * + * \return None. + * + * \since V2.0.0 + * + *****************************************************************************/ +void Rte_Dummy(void) +{ + return ; +} + +/**************************************************************************//** + * + * \details Deinitialize the RTE module. + * + * \return None. + * + * \since V2.0.0 + * + *****************************************************************************/ +static void _Rte_Deinit(void) +{ +#if (RTE_FUN_PRE_INIT_WDG == BL_FUN_ON) + g_RteInfo.wdgOps->Deinit(); // Wdg_Deinit +#endif + +#if (RTE_FUN_STAY_IN_BOOT == BL_FUN_ON) + g_RteInfo.comOps->Deinit(); // Canif_DeInit FLEXCAN_DRV_Deinit + + g_RteInfo.timerOps->Deinit(); // Tim_Deinit +#endif + + Sys_DeinitClock(); + + return ; +} + + +#if (RTE_FUN_STAY_IN_BOOT == BL_FUN_ON) +/**************************************************************************//** + * + * \details Check whether the stay in boot message is receviced. + * + * \return None. + * + * \since V2.0.0 + * + *****************************************************************************/ +bl_Return_t Rte_StayInBoot(void) +{ + bl_Return_t ret = BL_ERR_NOT_OK; + bl_Return_t readRet=BL_ERR_NOT_OK; + bl_Return_t isTimeout=BL_ERR_OK; + bl_Buffer_t buf[RTE_STAY_IN_BOOT_MSG_SIZE]; + bl_ComIfData_t comData; + bl_u32_t count = (bl_u32_t)(RTE_STAY_IN_BOOT_TIME + / RTE_SYSTEM_SCHEDULE_PERIOD); + + comData.buffer = buf; + comData.bufSize = RTE_STAY_IN_BOOT_MSG_SIZE; //收到5個；至少；本項目中的值是 (0x04u),(0x31u),(0x01u),(0xF5u),(0x18u) + do + { + wdog_task(); + readRet = g_RteInfo.comOps->Read(&comData); // Canif_TryToRead + if (BL_ERR_OK == readRet) + { + + #if 1 + ret = _Rte_VerifyStayInBoot(comData.retHandle, //handle buf id + comData.retSize, // 實際長度 + buf); //內容 + #endif + } + + //isTimeout = Tim_IsTimeout(); // Tim_IsTimeout + isTimeout = g_RteInfo.timerOps->IsTimeout(); // Tim_IsTimeout + if (BL_ERR_OK == isTimeout) + { + count -= 1UL; + } + //这里可以考虙，外部喂狗 + }while((ret != BL_ERR_OK) && (count > 0UL)); + +#if (RTE_FUN_STAY_IN_BOOT_RESET == BL_FUN_ON) + if (BL_ERR_OK == ret) + { + RTE_ENABLE_SIB_RESET(); + } +#endif + + return ret; +} + +/**************************************************************************//** + * + * \details verify whether the received message is a valid message. + * + * \return None. + * + * \since V2.0.0 + * //(0x04u),(0x31u),(0x01u),(0xF5u),(0x18u) 是否是這五個數 + *****************************************************************************/ +static bl_Return_t _Rte_VerifyStayInBoot(bl_ComIfHandle_t handle, + bl_BufferSize_t size, + const bl_Buffer_t *buffer) +{ + bl_Return_t ret = BL_ERR_NOT_OK; + bl_u16_t i; + + (void)handle; + + if (size >= RTE_STAY_IN_BOOT_MSG_SIZE) + { + ret = BL_ERR_OK; + + for (i = 0; i < RTE_STAY_IN_BOOT_MSG_SIZE; i++) + { + if (buffer[i] != g_StayInBootValue[i]) + { + ret = BL_ERR_NOT_OK; + break; + } + } + } + + return ret; +} + +/**************************************************************************//** + * + * \details When the function of the stay in boot reset is enable, the + * relative variables is initialized. + * + * \return None. + * + * \since V2.0.0 + * + *****************************************************************************/ +static void _Rte_InitStayInBoot(void) +{ + +#if (RTE_FUN_STAY_IN_BOOT_RESET == BL_FUN_ON) + RTE_RESET_SIB_COUNT(); // gs_StayInBootResetCount =20s + RTE_DISABLE_SIB_RESET(); //gs_StayInBootResetFlag=0 +#endif + +} +#endif + diff --git a/code_boot_out/asil/middle/autosar_bl/sources/cfg/bl_adapter_cfg.c b/code_boot_out/asil/middle/autosar_bl/sources/cfg/bl_adapter_cfg.c new file mode 100644 index 0000000..dfeb1ed --- /dev/null +++ b/code_boot_out/asil/middle/autosar_bl/sources/cfg/bl_adapter_cfg.c @@ -0,0 +1,84 @@ +/**************************************************************************//** + * + * \copyright This software is the property of Technologies. Any + * information contained in this doc should not be reproduced, + * or used, or disclosed without the written authorization from + * Technologies. + * + * \brief This is the source file to configurate the adapter module. + * + * \file bl_adapter_cfg.c + * \ingroup communication_adapter_module + * \author + * + * \version 5.1.0 + * \date 27/03/2014 + * + * \par Changelist + * Version | Date | Authors | CR# | Descriptions + * -------- | ---------- | ---------------- | --- | ------------ + * 03.00.00 | 12/09/2011 | mingqing.tang | N/A | Boot030001 + * 03.02.00 | 27/09/2011 | mingqing.tang | N/A | Boot030003 + * 03.03.00 | 29/09/2011 | mingqing.tang | N/A | Boot030004 + * 03.05.00 | 12/10/2011 | mingqing.tang | N/A | Boot030006 + * 04.00.00 | 10/07/2012 | mingqing.tang | N/A | Boot040001 + * 04.02.00 | 15/07/2012 | mingqing.tang | N/A | Boot040003 + * 04.04.00 | 18/07/2012 | mingqing.tang | N/A | Boot040005 + * 04.06.00 | 31/07/2012 | mingqing.tang | N/A | Boot040007 + * 04.10.00 | 07/08/2012 | mingqing.tang | N/A | Boot040011 + * 04.11.00 | 15/08/2012 | mingqing.tang | N/A | Boot040012 + * 05.00.00 | 19/06/2013 | heli.zhang | N/A | Boot050001 + * 05.01.00 | 27/03/2014 | mingqing.tang | N/A | Boot050002 + * + *****************************************************************************/ +#include "bl_adapter_cfg.h" + +/***************************************************************************** + * QAC Suppression + *****************************************************************************/ +/*PRQA S 1531,3211 EOF*/ +/* + * 1531:The object is referenced in only one translation unit. + * g_SecurityDelayInfo is a configurations. + * + * 3211:The global identifier is defined but not used. + * The g_SecurityDelayInfo is used in the bl_adapter.c file. + * + */ + +/***************************************************************************** + * Internal Macro Definitions + *****************************************************************************/ + +/***************************************************************************** + * Internal Type Definitions + *****************************************************************************/ + +/***************************************************************************** + * Internal Structure Definitions + *****************************************************************************/ + +/***************************************************************************** + * Internal Function Declarations + *****************************************************************************/ + +/***************************************************************************** + * Internal Variable Definitions +*****************************************************************************/ + +/***************************************************************************** + * External Variable Definitions +*****************************************************************************/ +/** \details The delay info of security access.*/ +const bl_SecurityDelay_t g_SecurityDelayInfo = +{ + ADPT_SECURITY_DELAY_TIME, //delayTime g_SecurityDelayInfo.delayTime + ADPT_SECURITY_ATTEMPT_COUNT, +#if (ADPT_FUN_SAVE_DELAY_FLAG == BL_FUN_ON) + ADPT_SECURITY_DELAY_FLAG_ID, +#endif +#if (ADPT_FUN_ADVANCED_ATTEMPT_DELAY ==BL_FUN_ON) + ADPT_SECURITY_FAILED_COUNT_ID +#endif +}; + diff --git a/code_boot_out/asil/middle/autosar_bl/sources/cfg/bl_booting_cfg.c b/code_boot_out/asil/middle/autosar_bl/sources/cfg/bl_booting_cfg.c new file mode 100644 index 0000000..3515024 --- /dev/null +++ b/code_boot_out/asil/middle/autosar_bl/sources/cfg/bl_booting_cfg.c @@ -0,0 +1,92 @@ +/**************************************************************************//** + * + * \copyright This software is the property of Technologies. Any + * information contained in this doc should not be reproduced, + * or used, or disclosed without the written authorization from + * Technologies. + * + * \brief This is a source file to configurate the booting manager + * module. + * + * \file bl_booting_cfg.c + * \ingroup booting_manager_module + * \author + * + * \version 5.1.0 + * \date 27/03/2014 + * + * \par Changelist + * Version | Date | Authors | CR# | Descriptions + * -------- | ---------- | ---------------- | --- | ------------ + * 01.00.00 | 15/03/2010 | hewei.zhang | N/A | Boot010001 + * 01.02.00 | 16/06/2010 | hewei.zhang | N/A | Boot010003 + * 01.03.00 | 18/08/2010 | hewei.zhang | N/A | Boot010004 + * 02.00.00 | 16/05/2011 | mingqing.tang | N/A | Boot020001 + * 02.05.00 | 25/05/2011 | mingqing.tang | N/A | Boot020006 + * 03.00.00 | 15/09/2011 | mingqing.tang | N/A | Boot030001 + * 03.02.00 | 20/10/2011 | mingqing.tang | N/A | Boot030003 + * 05.00.00 | 19/06/2013 | xin.shang | N/A | Boot050001 + * 05.01.00 | 27/03/2014 | mingqing.tang | N/A | Boot050002 + * + *****************************************************************************/ +#include "bl_booting_cfg.h" + +/***************************************************************************** + * QAC Suppression + *****************************************************************************/ +/*PRQA S 1533,3211 EOF*/ +/* + * 1533:The object is referenced in only one translation unit. + * g_BootingCheckerList is a configurations. + * + * 3211:The global identifier is defined but not used. + * The g_BootingCheckerList is used in the bl_booting.c file. + * + */ + +/***************************************************************************** + * Internal Macro Definitions + *****************************************************************************/ + +/***************************************************************************** + * Internal Type Definitions + *****************************************************************************/ + +/***************************************************************************** + * Internal Structure Definitions + *****************************************************************************/ + +/***************************************************************************** + * Internal Function Declarations + *****************************************************************************/ + +/***************************************************************************** + * Internal Variable Definitions + *****************************************************************************/ + +/***************************************************************************** + * Global Variable Definitions + *****************************************************************************/ +/**************************************************************************//** + * \details The booting checkers. + *****************************************************************************/ +STATIC const bl_BootingChecker_t + gs_BootingChecker[BOOTM_NUMBER_OF_BOOTING_CHECKER] = +{ + &Bootm_ReprogramFlagChecker, + &Bootm_AppValidFlagChecker, +}; + +/****************************************************************************** + * \details The list of booting checkers. + * + * \warning Do not change the name of this variable. + *****************************************************************************/ +const bl_BootingCheckerList_t g_BootingCheckerList = +{ + BOOTM_NUMBER_OF_BOOTING_CHECKER,gs_BootingChecker, //為什麼 第一參數是2個 原來有兩個變量需要判斷； +}; +/***************************************************************************** + * Function Definitions + *****************************************************************************/ + diff --git a/code_boot_out/asil/middle/autosar_bl/sources/cfg/bl_can_if_cfg.c b/code_boot_out/asil/middle/autosar_bl/sources/cfg/bl_can_if_cfg.c new file mode 100644 index 0000000..26a1eeb --- /dev/null +++ b/code_boot_out/asil/middle/autosar_bl/sources/cfg/bl_can_if_cfg.c @@ -0,0 +1,101 @@ +/**************************************************************************//** + * + * \copyright This software is the property of Technologies. Any + * information contained in this doc should not be reproduced, + * or used, or disclosed without the written authorization from + * Technologies. + * + * \brief This is a source file to configurate the can_if module. + * + * \file bl_can_if_lcfg.c + * \ingroup can_if_module + * \author + * + * \version 5.2.1 + * \date 27/03/2014 + * + * \par Changelist + * Version | Date | Authors | CR# | Descriptions + * -------- | ---------- | ---------------- | --- | ------------ + * 02.00.00 | 20/08/2013 | haiping.wang | N/A | Boot020001 + * 05.01.00 | 27/03/2014 | mingqing.tang | N/A | Boot050002 + * 05.02.01 | 21/08/2014 | mingqing.tang | N/A | BootSpec050002 + * +******************************************************************************/ +#include "bl_can_tp.h" +#include "bl_can_if_cfg.h" + +/***************************************************************************** + * QAC Suppression + *****************************************************************************/ +/*PRQA S 1531,3120,3211 EOF*/ +/* + * 1531:The object is referenced in only one translation unit. + * g_CanIfRxPduCfg and g_CanIfTxPduCfg are configurations. + * + * 3120:Hard-coded magic integer constant. + * This is a only configuration. + * + * 3211:The global identifier is defined but not used. + * The g_CanIfRxPduCfg and g_CanIfTxPduCfg are used in the bl_can_if.c file. + * + */ + + +/***************************************************************************** + * Macro Definitions + *****************************************************************************/ +/* define status of pdu*/ +#define CANIF_RECEIVE (0) +#define CANIF_TRANSMITE (1) + +/* define types of pdu*/ +#define CANIF_STANDARD (0) +#define CANIF_EXTERNED (1) + +#define CANIF_NUMBER_OF_PDU (CANIFRX_TOTAL_NUM + CANIFTX_TOTAL_NUM) +/***************************************************************************** + * Global Variable Definitions + *****************************************************************************/ +#if (CANIF_FUN_DYNAMIC_CANID == BL_FUN_ON) //不支持動態修改 +STATIC bl_CanIfPduCfg_t gs_CanIfPduCfg[CANIF_NUMBER_OF_PDU] = //先是兩個收 再是發 +{ + // status //type //handle //can id //canfd標志 BRS標志 + { + CANIF_RECEIVE, CANIF_STANDARD, HANDLE_CAN_RX0, CANIF_PHY_RX_CANID , 1u , 1u// + }, + { + CANIF_RECEIVE, CANIF_STANDARD, HANDLE_CAN_RX0, CANIF_FUN_RX_CANID, 1u , 1u + }, + { + CANIF_TRANSMITE, CANIF_STANDARD, HANDLE_CAN_TX0,CANIF_PHY_TX_CANID, 1u , 1u + }, +}; +#else //這是默認選擇路徑 +STATIC const bl_CanIfPduCfg_t gs_CanIfPduCfg[CANIF_NUMBER_OF_PDU] = +{ + // status //type //handle //can id //canfd標志 BRS標志 + { + CANIF_RECEIVE, CANIF_STANDARD, HANDLE_CAN_RX0, CANIF_PHY_RX_CANID , 1u , 1u //物理尋址 第三handle 第4 id + }, + { + CANIF_RECEIVE, CANIF_STANDARD, HANDLE_CAN_RX0, CANIF_FUN_RX_CANID , 1u , 1u //功能尋址 + }, + { + CANIF_TRANSMITE, CANIF_STANDARD, HANDLE_CAN_TX0,CANIF_PHY_TX_CANID, 1u, 1u + }, +}; +#endif + +const bl_CanIfRxList_t g_CanIfRxPduCfg = +{ + //number //rxList //RxInd + CANIFRX_TOTAL_NUM,&gs_CanIfPduCfg[0],&Cantp_RxIndication, //有兩個 第一參數=2 +}; + +const bl_CanIfTxList_t g_CanIfTxPduCfg = +{ + //number //txList //TxConf + CANIFTX_TOTAL_NUM,&gs_CanIfPduCfg[2],&Cantp_TxConfirmation, +}; + diff --git a/code_boot_out/asil/middle/autosar_bl/sources/cfg/bl_can_tp_cfg.c b/code_boot_out/asil/middle/autosar_bl/sources/cfg/bl_can_tp_cfg.c new file mode 100644 index 0000000..a651281 --- /dev/null +++ b/code_boot_out/asil/middle/autosar_bl/sources/cfg/bl_can_tp_cfg.c @@ -0,0 +1,142 @@ +/**************************************************************************//** + * + * \copyright This software is the property of Technologies. Any + * information contained in this doc should not be reproduced, + * or used, or disclosed without the written authorization from + * Technologies. + * + * \brief This is a configuration source file of the CAN Transport + * Protocol module. + * + * \file bl_can_tp_cfg.c + * \ingroup cantp_module + * \author + * + * + * \version 5.1.0 + * \date 27/03/2014 + * + * \par Changelist + * Version | Date | Authors | CR# | Descriptions + * -------- | ---------- | ---------------- | --- | ------------ + * 01.00.00 | 17/03/2010 | rui.guo | N/A | Boot010001 + * 02.00.00 | 21/02/2011 | rui.guo | N/A | Boot020001 + * 05.00.00 | 19/06/2013 | rui.guo | N/A | Boot050001 + * 05.01.00 | 27/03/2014 | mingqing.tang | N/A | Boot050002 + * + *****************************************************************************/ +#include "bl_rte_funcfg.h" +#include "bl_can_tp_cfg.h" + +/***************************************************************************** + * QAC Suppression + *****************************************************************************/ +/*PRQA S 1257,1533,3120,3211,3453 EOF*/ +/* + * 1257:Suffixed integer constant implicitly converted to smaller integer type + * on assignment. + * + * 1533:The object is referenced in only one translation unit. + * + * 3120:Hard-coded magic integer constant. + * This is a only configuration. + * + * 3211:The global identifier is defined but not used. + * The g_CanTpTxChnsCfg and g_CanTpRxChnsCfg are used in the bl_can_tp.c file. + * + * MISRA-C:2004 19.7(3453):A function could probably be used instead of this + * function-like macro. + * + */ + +/***************************************************************************** + * Verify The Configurations of Function Macro + *****************************************************************************/ +#if (RTE_SYSTEM_SCHEDULE_PERIOD != CANTP_SCHEDULE_PERIOD) +#error "The period of cantp is error." +#endif + +/***************************************************************************** + * Internal Macro Definitions + *****************************************************************************/ +#define CANTP_MAKE_TIMEOUT(ms) ((bl_u16_t)((ms)/CANTP_SCHEDULE_PERIOD)) /* for 1000us period */ +//#define CANTP_MAKE_TIMEOUT(ms) ((bl_u16_t)((ms) * 4)) /* for 250us period */ +/***************************************************************************** + * Internal Type Definitions + *****************************************************************************/ + +/***************************************************************************** + * Internal Structure Definitions + *****************************************************************************/ + +/***************************************************************************** + * Internal Function Declarations + *****************************************************************************/ + +/***************************************************************************** + * Internal Variable Definitions + *****************************************************************************/ + +/***************************************************************************** + * Global Variable Definitions + *****************************************************************************/ +/** \brief the configurations of the Rx channels.*/ +#define STmin_Tester (0U) +#define STmin_ECU (0U) +#define BS_Tester (0U) + +const bl_CanTpChannelCfg_t g_CanTpRxChnsCfg[CANTP_NUMBER_OF_RX_CHANNEL] = +{ + /*Channel 0:Phsical & Standars addressing*/ + { + CANTP_TYPE_STANDARD, + CANTP_TATYPE_PHYSICAL, + 0, /* RX HANDLE */ + 0, /* TX HANDLE */ + CANTP_MAKE_TIMEOUT(70u), /* TIME A */ + CANTP_MAKE_TIMEOUT(50u), /* TIME B */ + CANTP_MAKE_TIMEOUT(1000u), /* TIME C */ + 0, /* TA */ + 0, /* STmin */ + 0, /* BS */ + 0, /* WFT */ + }, + /*Channel 1:functional & Standars addressing*/ + { + CANTP_TYPE_STANDARD, + CANTP_TATYPE_FUNCTIONAL, + 1, /* RX HANDLE */ + 0, /* TX HANDLE */ + CANTP_MAKE_TIMEOUT(70u), /* TIME A */ + CANTP_MAKE_TIMEOUT(50u), /* TIME B */ + CANTP_MAKE_TIMEOUT(150u), /* TIME C */ + 0, /* TA */ + 0, /* STmin */ + 0, /* BS */ + 0, /* WFT */ + }, +}; + +/** \brief the configurations of the Tx channels.*/ +const bl_CanTpChannelCfg_t g_CanTpTxChnsCfg[CANTP_NUMBER_OF_TX_CHANNEL] = +{ + /*Channel 0:Phsical & Standars addressing*/ + { + CANTP_TYPE_STANDARD, + CANTP_TATYPE_PHYSICAL, + 0, /* RX HANDLE */ + 0, /* TX HANDLE */ + CANTP_MAKE_TIMEOUT(70u), /* TIME A */ + CANTP_MAKE_TIMEOUT(150u), /* TIME B */ + CANTP_MAKE_TIMEOUT(70u), /* TIME C */ + 0, /* TA */ + 0, /* STmin */ + 0, /* BS */ + 0, /* WFT */ + }, +}; + +/***************************************************************************** + * Function Definitions + *****************************************************************************/ + diff --git a/code_boot_out/asil/middle/autosar_bl/sources/cfg/bl_data_cfg.c b/code_boot_out/asil/middle/autosar_bl/sources/cfg/bl_data_cfg.c new file mode 100644 index 0000000..d3ea945 --- /dev/null +++ b/code_boot_out/asil/middle/autosar_bl/sources/cfg/bl_data_cfg.c @@ -0,0 +1,117 @@ +/**************************************************************************//** + * + * \copyright This software is the property of Technologies. Any + * information contained in this doc should not be reproduced, + * or used, or disclosed without the written authorization from + * Technologies. + * + * \brief This is a source file to configurate the data manager module. + * + * \file bl_data_cfg.c + * \ingroup data_manager_module + * \author + * + * \version 5.1.0 + * \date 27/03/2014 + * + * \par Changelist + * Version | Date | Authors | CR# | Descriptions + * -------- | ---------- | ---------------- | --- | ------------ + * 04.00.00 | 06/03/2013 | xin.shang | N/A | Boot040001 + * 04.02.00 | 11/03/2013 | xin.shang | N/A | Boot040003 + * 04.03.00 | 11/03/2013 | xin.shang | N/A | Boot040004 + * 04.11.00 | 13/03/2013 | xin.shang | N/A | Boot040012 + * 04.13.00 | 15/03/2013 | xin.shang | N/A | Boot040014 + * 04.14.00 | 20/03/2013 | xin.shang | N/A | Boot040015 + * 04.21.00 | 21/03/2013 | xin.shang | N/A | Boot040022 + * 04.31.00 | 04/04/2013 | xin.shang | N/A | Boot040032 + * 05.00.00 | 19/06/2013 | xin.shang | N/A | Boot050001 + * 05.01.00 | 27/03/2014 | mingqing.tang | N/A | Boot050002 + * + *****************************************************************************/ +#include "bl_data_cfg.h" + +/***************************************************************************** + * QAC Suppression + *****************************************************************************/ +/*PRQA S 1257,1531,3120,3211 EOF*/ +/* + * 1257:Suffixed integer constant implicitly converted to smaller integer type + * on assignment. + * + * 1531:The object is referenced in only one translation unit. + * g_DataInfoList is a configurations. + * + * 3120:Hard-coded magic integer constant. + * This is a only configuration. + * + * 3211:The global identifier is defined but not used. + * The g_DataInfoList is used in the bl_data.c file. + * + */ + +/***************************************************************************** + * Internal Macro Definitions + *****************************************************************************/ +/** Calculate the sum of data size.*/ + +/***************************************************************************** + * Internal Type Definitions + *****************************************************************************/ + +/***************************************************************************** + * Internal Structure Definitions + *****************************************************************************/ + +/***************************************************************************** + * Internal Function Declarations + *****************************************************************************/ + +/***************************************************************************** + * Internal Variable Definitions + *****************************************************************************/ + +/***************************************************************************** + * Global Variable Definitions + *****************************************************************************/ +/****************************************************************************** + * \details The default data list. + *****************************************************************************/ +const bl_Buffer_t gs_defaultDataList[DM_DATA_SIZE_SUM] = +{ + 0xA5u,0xA5u,0xE5u,0x34u, //REPROGRAM_DATA + 0xAAu,0xAAu,0x04u,0xE5u, ///application valid flag*/ + 0xAAu,0xAAu,0x04u,0xE5u, ///application valid flag1 */ // + 0xA5u,0xA5u,0xE5u,0x34u, // app REPROGRAM_DATA +}; + + +/**************************************************************************//** + * \details The data informations. + *****************************************************************************/ +STATIC const bl_DataInfo_t gs_DataInfo[DM_NUMBER_OF_MANAGED_DATA] = +{ + { + DM_DATA_0_TYPE,DM_DATA_0_MEMID,DM_DATA_0_LOCAL_ADDR, //REPROGRAM_DATA BOOTM_REPROGRAM_FLAG_DID + DM_DATA_0_SIZE,DM_DATA_0_DDP + }, + { + DM_DATA_1_TYPE,DM_DATA_1_MEMID,DM_DATA_1_LOCAL_ADDR, /*application program Valid */ //BOOTM_RESET_FLAG_DID + DM_DATA_1_SIZE,DM_DATA_1_DDP + }, +}; + + +/****************************************************************************** + * \details The data informations list. + * + * \warning Do not change the name of this variable. + *****************************************************************************/ +const bl_DataInfoList_t g_DataInfoList = +{ + DM_NUMBER_OF_MANAGED_DATA,gs_DataInfo, +}; +/***************************************************************************** + * Function Definitions + *****************************************************************************/ + diff --git a/code_boot_out/asil/middle/autosar_bl/sources/cfg/bl_dcm_cfg.c b/code_boot_out/asil/middle/autosar_bl/sources/cfg/bl_dcm_cfg.c new file mode 100644 index 0000000..d12e742 --- /dev/null +++ b/code_boot_out/asil/middle/autosar_bl/sources/cfg/bl_dcm_cfg.c @@ -0,0 +1,564 @@ +/**************************************************************************//** + * + * \copyright This software is the property of Technologies. Any + * information contained in this doc should not be reproduced, + * or used, or disclosed without the written authorization from + * Technologies. + * + * \brief This is the source file to configurate the DCM module. + * + * \file bl_dcm_cfg.c + * \ingroup communication_protocol_stack_module + * \author + * + * + * \version 5.2.0 + * \date 19/06/2014 + * + * \par Changelist + * Version | Date | Authors | CR# | Descriptions + * -------- | ---------- | ---------------- | --- | ------------ + * 01.00.00 | 08/04/2010 | hewei.zhang | N/A | Boot010001 + * 01.02.00 | 19/04/2010 | hewei.zhang | N/A | Boot010003 + * 01.04.00 | 06/05/2010 | hewei.zhang | N/A | Boot010005 + * 02.00.00 | 18/03/2011 | mingqing.tang | N/A | Boot020001 + * 02.01.00 | 31/03/2011 | mingqing.tang | N/A | Boot020002 + * 02.03.00 | 07/04/2011 | mingqing.tang | N/A | Boot020004 + * 03.00.00 | 12/09/2011 | mingqing.tang | N/A | Boot030001 + * 03.05.00 | 11/10/2011 | mingqing.tang | N/A | Boot030006 + * 03.06.00 | 26/10/2011 | mingqing.tang | N/A | Boot030007 + * 04.00.00 | 02/01/2012 | mingqing.tang | N/A | Boot040001 + * 04.02.00 | 16/01/2012 | mingqing.tang | N/A | Boot040003 + * 04.08.00 | 04/04/2012 | mingqing.tang | N/A | Boot040009 + * 05.00.00 | 19/06/2013 | heli.zhang | N/A | Boot050001 + * 05.01.00 | 27/03/2014 | mingqing.tang | N/A | Boot050002 + * 05.02.00 | 19/06/2014 | mingqing.tang | N/A | BootSpec050001 + * + *****************************************************************************/ +#include "bl_dcm_cfg.h" +#include "bl_adpt_uds_platform.h" + +/***************************************************************************** + * QAC Suppression + *****************************************************************************/ +/*PRQA S 1257,1531,1533,3120,3211 EOF*/ +/* + * 1257:Suffixed integer constant implicitly converted to smaller integer type + * on assignment. + * + * 1531:The object is referenced in only one translation unit. + * g_DcmBuffer is a configurations. + * + * 1533:The object is only referenced by one function. + * The g_DcmServiceList is a configurations. + * + * 3120:Hard-coded magic integer constant. + * This is a only configuration. + * + * 3211:The global identifier is defined but not used. + * The g_BootingCheckerList is used in the bl_booting.c file. + * + */ + +/***************************************************************************** + * Internal Macro Definitions + *****************************************************************************/ + +/***************************************************************************** + * Internal Type Definitions + *****************************************************************************/ + +/***************************************************************************** + * Internal Structure Definitions + *****************************************************************************/ + +/***************************************************************************** + * Internal Function Declarations + *****************************************************************************/ + +/***************************************************************************** + * Internal Variable Definitions +*****************************************************************************/ +/**************************************************************************//** + * \details The dcmbuffer of saving rx and tx data. + *****************************************************************************/ +STATIC bl_Buffer_t gs_Buffer[DCM_BUFFER_SIZE]; //診斷時的多幀最大緩存 見 g_DcmBuffer.buffer 才是真正被調用的 + + +/**************************************************************************//** + * \details The subfunction list of 0x10 service. + *****************************************************************************/ +STATIC const bl_DcmService_t gs_Dcm10SubId[DCM_10SUBID_NUMBER] = +{ + { + //id=1 //num=0 //minsize=0 //maxsize=2 + 1, 0, DCM_10SUBID_MINLEN, DCM_10SUBID_MAXLEN, + //flag=40000031f //serviceList空 //header=空 //Callback + DCM_10SUBID01_FLAG, BL_NULL_PTR, BL_NULL_PTR, &Adpt_UdsCallback1001 + }, + { + //id=2 //num=0 //minsize=0 //maxsize=2 + 2, 0, DCM_10SUBID_MINLEN, DCM_10SUBID_MAXLEN, + //flag=400000316 //serviceList空 //header=空 //Callback + DCM_10SUBID02_FLAG, BL_NULL_PTR, BL_NULL_PTR, &Adpt_UdsCallback1002 + }, + { + //id=3 //num=0 //minsize=0 //maxsize=2 + 3, 0, DCM_10SUBID_MINLEN, DCM_10SUBID_MAXLEN, + //flag=40000031D //serviceList空 //header=空 //Callback + DCM_10SUBID03_FLAG, BL_NULL_PTR, BL_NULL_PTR, &Adpt_UdsCallback1003 + }, + { + //id=3 //num=0 //minsize=0 //maxsize=2 + DCM_SESSION_SUPPLY_ID, 0, DCM_10SUBID_MINLEN, DCM_10SUBID_MAXLEN, + //flag=40000031D //serviceList空 //header=空 //Callback + DCM_10SUBID04_FLAG, BL_NULL_PTR, BL_NULL_PTR, &Adpt_UdsCallback1004 + }, +}; + +/**************************************************************************//** + * \details The subfunction list of 0x11 service. + *****************************************************************************/ +STATIC const bl_DcmService_t gs_Dcm11SubId[DCM_11SUBID_NUMBER] = +{ + { + //id=1 //num=0 //minsize=0 //maxsize=2 + 1, 0, DCM_11SUBID_MINLEN, DCM_11SUBID_MAXLEN, + //flag=0 //serviceList空 //header=空 //Callback + DCM_11SUBID_FLAG, BL_NULL_PTR, BL_NULL_PTR, &Adpt_UdsCallback1101 + }, + { + //id=1 //num=0 //minsize=0 //maxsize=2 + 3, 0, DCM_11SUBID_MINLEN, DCM_11SUBID_MAXLEN, + //flag=0 //serviceList空 //header=空 //Callback + DCM_11SUBID_FLAG, BL_NULL_PTR, BL_NULL_PTR, &Adpt_UdsCallback1103 + } +}; + +/**************************************************************************//** + * \details The subfunction list of 0x27 service. + *****************************************************************************/ +STATIC const bl_DcmService_t gs_Dcm27SubId[DCM_27SUBID_NUMBER] = +{ + { + //id=0x11 //num=0 //minsize=2 //maxsize=2 //flag=0 + DCM_SA_SEED_REQ, 0, DCM_27SEED_MINLEN, 2, DCM_27SUBIDSEED_FLAG, + //serviceList空 //header=空 //Callback + BL_NULL_PTR, BL_NULL_PTR, &Adpt_UdsCallbackGetSeedForLevel1 + }, + { + //id=0x12 //num=0 //minsize=6 //maxsize=6 //flag=0 + DCM_SA_KEY_RSP, 0, DCM_27KEY_MINLEN, DCM_27KEY_MAXLEN, DCM_27SUBIDKEY_FLAG, + //serviceList空 //header=空 //Callback + BL_NULL_PTR, BL_NULL_PTR, &Adpt_UdsCallbackVerifyKeyForLevel1 + }, + { + //id=0x11 //num=0 //minsize=2 //maxsize=2 //flag=0 + DCM_SA_SEED_2_REQ, 0, DCM_27SEED_MINLEN, 2, DCM_27SUBIDSEED_FLAG, + //serviceList空 //header=空 //Callback + BL_NULL_PTR, BL_NULL_PTR, &Adpt_UdsCallbackGetSeedForLevel5 + }, + { + //id=0x12 //num=0 //minsize=6 //maxsize=6 //flag=0 + DCM_SA_KEY_2_RSP, 0, DCM_27KEY_MINLEN, DCM_27KEY_MAXLEN, DCM_27SUBIDKEY_FLAG, + //serviceList空 //header=空 //Callback + BL_NULL_PTR, BL_NULL_PTR, &Adpt_UdsCallbackVerifyKeyForLevel5 + }, + { + //id=0x11 //num=0 //minsize=2 //maxsize=2 //flag=0 + 0x23, 0, DCM_27SEED_MINLEN, 2, DCM_27SUBIDSEED_FLAG_TEST, + //serviceList空 //header=空 //Callback + BL_NULL_PTR, BL_NULL_PTR, &Adpt_UdsCallbackGetSeedForLevel23 + }, + { + //id=0x12 //num=0 //minsize=6 //maxsize=6 //flag=0 + 0x24, 0, DCM_27KEY_MINLEN, DCM_27KEY_MAXLEN, DCM_27SUBIDKEY_FLAG_TEST, + //serviceList空 //header=空 //Callback + BL_NULL_PTR, BL_NULL_PTR, &Adpt_UdsCallbackVerifyKeyForLevel24 + }, +}; + +/**************************************************************************//** + * \details The subfunction list of 0x28 service. + *****************************************************************************/ +STATIC const bl_DcmService_t gs_Dcm28SubId[DCM_28SUBID_NUMBER] = +{ + { + //id=0x3 //num=0 //minsize=0 //maxsize=0 //flag=0 + 3, 0, DCM_28SUBID_MINLEN, 0, DCM_28SUBID03_FLAG, + //serviceList空 //header=空 //Callback + BL_NULL_PTR,BL_NULL_PTR, &Adpt_UdsCallback28 + }, + { + //id=0x1 //num=0 //minsize=0 //maxsize=0 //flag=0 + 1, 0, DCM_28SUBID_MINLEN, 0, DCM_28SUBID01_FLAG, + //serviceList空 //header=空 //Callback + BL_NULL_PTR,BL_NULL_PTR, &Adpt_UdsCallback28 + }, + { + //id=0x0 //num=0 //minsize=0 //maxsize=0 //flag=0 + 0, 0, DCM_28SUBID_MINLEN, 0, DCM_28SUBID00_FLAG, + //serviceList空 //header=空 //Callback + BL_NULL_PTR,BL_NULL_PTR, &Adpt_UdsCallback28 + }, +}; + +#define RID_CheckProgramCond (0x0203u) //FD02 CheckProgrammingPrecondition +#define RID_CheckProgramCheckSum (0x0202u) //FD03 CheckRamBootSoftwarevalidityRoutine +#define RID_EraseFlashMemory (0xFF00u) //FD00 EraseFlashMemoryRoutine +#define RID_CheckProgrammingDependency (0xFF01u) //FD01 Check Programming Dependency Routine, If only a single application software image is used, then always return TRUE + +//#define DID_WR_Fingerprint (0xF198u) +#define DID_WR_Fingerprint (0xF198u) //原來寫入F198表示金手指 +//#define DID_WR_PrgramDate (0x0202u) + +#define DID_R_Fingerprint (0xF198u) +#define DID_WR_ProgramDate (0xF199u) +#define DID_R_ProgramDate (0xF199u) +/**************************************************************************//** + * \details The data identifier list of 0x31 service. + *****************************************************************************/ +STATIC const bl_DcmService_t gs_Dcm31Did[DCM_31DID_NUMBER] = +{ + { + //id=0x0203 //num=0 //minsize=0 //maxsize=4 //flag=0x4000031c + RID_CheckProgramCond, 0, DCM_31CONDITION_MINLEN, 4, DCM_31CONDITION_FLAG, + //serviceList空 //header=空 //Callback + BL_NULL_PTR, BL_NULL_PTR, &Adpt_UdsCallbackCheckProgramCond //編程條件 好像沒有用到 + }, + { + //id=ff00 擦除 num=0 //minsize=13 //maxsize=13 //flag=0x40000212 + RID_EraseFlashMemory, 0, DCM_31ERASE_MINLEN, 13, DCM_31ERASE_FLAG, + //serviceList空 //header=空 //Callback + BL_NULL_PTR, BL_NULL_PTR, &Adpt_UdsCallbackEraseMemory + }, + { + //id=0202 //num=0 //minsize=8 //maxsize=8 //flag=0x40000212 + RID_CheckProgramCheckSum, 0, DCM_31CHECKSUM_MINLEN, 13, DCM_31CHECKSUM_FLAG, + //serviceList空 //header=空 //Callback + BL_NULL_PTR, BL_NULL_PTR, &Adpt_UdsCallbackCheckSum + }, + { + //id=FF01 //num=0 //minsize=8 //maxsize=8 //flag=0x40000212 + RID_CheckProgrammingDependency, 0, DCM_31COMPAT_MINLEN, 4, DCM_31COMPAT_FLAG, + //serviceList空 //header=空 //Callback + BL_NULL_PTR, BL_NULL_PTR, &Adpt_UdsCallbackCheckCompatibility //編程兼容性-依赖性 + }, +#if(RTE_FUN_STAY_IN_BOOT == BL_FUN_ON) + { + //id=f518 //num=0 //minsize=8 //maxsize=8 //flag=0x40000212 + 0xF518u, 0, DCM_31STAYINBOOT_MINLEN, 4, DCM_31STAYINBOOT_FLAG, + //serviceList空 //header=空 //Callback + BL_NULL_PTR, BL_NULL_PTR, &Adpt_UdsCallbackStayInBoot + }, +#endif +}; + +/**************************************************************************//** + * \details The subfunction list of 0x31 service. + *****************************************************************************/ +STATIC const bl_DcmService_t gs_Dcm31SubId[DCM_31SUBID_NUMBER] = +{ + { + //id=1 //num=5或4 //minsize=0 //maxsize=0 //flag=0 + 1, DCM_31DID_NUMBER,DCM_31SUBID_MINLEN, 0u, DCM_31SUBID_FLAG, + //serviceList //header //Callback + gs_Dcm31Did, &g_DcmDidHeader, BL_NULL_PTR + }, +}; + +/**************************************************************************//** + * \details The subfunction list of 0x3E service. + *****************************************************************************/ +STATIC const bl_DcmService_t gs_Dcm3ESubId[DCM_3ESUBID_NUMBER] = +{ + { + 0, 0, 0, 0, 0, BL_NULL_PTR, BL_NULL_PTR, &Adpt_UdsCallback3E + }, +}; + +/**************************************************************************//** + * \details The subfunction list of 0x85 service. + *****************************************************************************/ +STATIC const bl_DcmService_t gs_Dcm85SubId[DCM_85SUBID_NUMBER] = +{ + { + 1, 0, 0, 0, 0, BL_NULL_PTR, BL_NULL_PTR, &Adpt_UdsCallback85 + }, + { + 2, 0, 0, 0, 0, BL_NULL_PTR, BL_NULL_PTR, &Adpt_UdsCallback85 + }, +}; + + +/**************************************************************************//** + * \details The subfunction list of 0x2E service. + *****************************************************************************/ +STATIC const bl_DcmService_t gs_Dcm2ESubId[DCM_2ESUBID_NUMBER] = +{ + { + //id=F198 //num=0 //minsize=19 //maxsize=19 //flag=0 + DID_WR_Fingerprint, 0, DCM_2EFINGERPRINT_MINLEN, DCM_2ESERVICE_MAXLEN, DCM_2EDID_FLAG, //DCM_2ESERVICE_FLAG, + BL_NULL_PTR, BL_NULL_PTR, &Adpt_UdsCallBackWriteFingerprint + }, +#if 1 + { + //id=F199 //num=0 //minsize=7 //maxsize=7 //flag=0 + DID_WR_ProgramDate, 0, DCM_2EPROGRAMDATE_MINLEN, DCM_2ESERVICE_MAXLEN, DCM_2EDID_FLAG, //DCM_2ESERVICE_FLAG, + BL_NULL_PTR, BL_NULL_PTR, &Adpt_UdsCallBackWriteProgrammingDate + }, + { + //id=F18C //num=0 //minsize=19 //maxsize=19 //flag=0 + 0xf18c, 0, DCM_2E_F18C_MINLEN, DCM_2ESERVICE_MAXLEN, DCM_2EDID_FLAG, //DCM_2ESERVICE_FLAG, + BL_NULL_PTR, BL_NULL_PTR, &Adpt_UdsCallBackWrite_F18C + }, + { + //id=F190 //num=0 //minsize=19 //maxsize=19 //flag=0 + 0xf190, 0, DCM_2E_F190_MINLEN, DCM_2ESERVICE_MAXLEN, DCM_2EDID_FLAG, //DCM_2ESERVICE_FLAG, + BL_NULL_PTR, BL_NULL_PTR, &Adpt_UdsCallBackWrite_F190 + }, + { + //id=FE02 //num=0 //minsize=19 //maxsize=19 //flag=0 + 0x01a0, 0, DCM_2E_01A0_MINLEN, DCM_2ESERVICE_MAXLEN, DCM_2EDID_FLAG_TEST, //DCM_2ESERVICE_FLAG, + BL_NULL_PTR, BL_NULL_PTR, &Adpt_UdsCallBackWrite_01a0_manulifecount + }, + { + //id=FE02 //num=0 //minsize=19 //maxsize=19 //flag=0 + 0xFE01, 0, DCM_2E_FE01_MINLEN, DCM_2ESERVICE_MAXLEN, DCM_2EDID_FLAG_TEST, //DCM_2ESERVICE_FLAG, + BL_NULL_PTR, BL_NULL_PTR, &Adpt_UdsCallBackWrite_fe01_backdoo_access_key + }, +#endif +}; +STATIC const bl_DcmService_t gs_Dcm22SubId[DCM_22SUBID_NUMBER] = +{ + {//0 + 0xf100U, 0, 2,6, DCM_22DID_FLAG, + BL_NULL_PTR, BL_NULL_PTR, &Adpt_UdsCallBackReadPgmSuccCounter + }, + {//1 + 0x0201U, 0, 2,4, DCM_22DID_FLAG, + BL_NULL_PTR, BL_NULL_PTR, &Adpt_UdsCallBackReadPgmAttmpCounter + }, + {//2 + 0xF180U, 0, 2,16, DCM_22DID_FLAG, + BL_NULL_PTR, BL_NULL_PTR, &Adpt_UdsCallBackReadBootSW_ID + }, + {//3 + 0xF181U, 0, 2,17, DCM_22DID_FLAG, + BL_NULL_PTR, BL_NULL_PTR, &Adpt_UdsCallBackRead_F181_vmapp_softid_ID + }, + {//4 + 0xF182U, 0, 2,16, DCM_22DID_FLAG, + BL_NULL_PTR, BL_NULL_PTR, &Adpt_UdsCallBackRead_F182_ecu_calnum + }, + {//5 + 0xF186U, 0, 2,4, DCM_22DID_FLAG, + BL_NULL_PTR, BL_NULL_PTR, &Adpt_UdsCallBackReadActiveSession + }, + {//6 + 0xF187U, 0, 2,16, DCM_22DID_FLAG, + BL_NULL_PTR, BL_NULL_PTR, &Adpt_UdsCallBackReadSparaPartNumber + }, + {//7 + 0xF188U, 0, 2,16, DCM_22DID_FLAG, + BL_NULL_PTR, BL_NULL_PTR, &Adpt_UdsCallBackRead_F188_ECU_SW + }, + {//8 + 0xFE02U, 0, 2,4, DCM_22DID_FLAG, + BL_NULL_PTR, BL_NULL_PTR, &Adpt_UdsCallBackReadfe02_count + }, + {//9 + 0xF18AU, 0, 2,8, DCM_22DID_FLAG, + BL_NULL_PTR, BL_NULL_PTR, &Adpt_UdsCallBackRead_f18A_supplier + }, + {//10 + 0xF18BU, 0, 2,6, DCM_22DID_FLAG, + BL_NULL_PTR, BL_NULL_PTR, &Adpt_UdsCallBackRead_f18B_ecu_manu_date + }, + { + 0xF18CU, 0, 2,17, DCM_22DID_FLAG, + BL_NULL_PTR, BL_NULL_PTR, &Adpt_UdsCallBackRead_f18C_ecu_sn + }, + { + 0xF190U, 0, 2,19, DCM_22DID_FLAG, + BL_NULL_PTR, BL_NULL_PTR, &Adpt_UdsCallBackRead_f190_vin + }, + { + 0xF191U, 0, 2,16, DCM_22DID_FLAG, + BL_NULL_PTR, BL_NULL_PTR, &Adpt_UdsCallBackRead_f191_ecu_hw_num + }, + { + 0xF192U, 0, 2,16, DCM_22DID_FLAG, + BL_NULL_PTR, BL_NULL_PTR, &Adpt_UdsCallBackRead_f192_hw_part_num + }, + { + 0xF193U, 0, 2,19, DCM_22DID_FLAG, + BL_NULL_PTR, BL_NULL_PTR, &Adpt_UdsCallBackReadECU_HW_Number + }, + { + 0xF194U, 0, 2,19, DCM_22DID_FLAG, + BL_NULL_PTR, BL_NULL_PTR, &Adpt_UdsCallBackRead_f194_ecu_sw_num + }, + { + 0xF195U, 0, 2,16, DCM_22DID_FLAG, + BL_NULL_PTR, BL_NULL_PTR, &Adpt_UdsCallBackRead_f195_sw_version_num + }, + { + DID_WR_Fingerprint, 0, 2,23, DCM_22DID_FLAG, + BL_NULL_PTR, BL_NULL_PTR, &Adpt_UdsCallBackReadFingerprint + }, + {//19 + DID_WR_ProgramDate, 0, 2,7, DCM_22DID_FLAG, + BL_NULL_PTR, BL_NULL_PTR, &Adpt_UdsCallBackReadProgrammingDate + }, + { + 0xF19EU, 0, 2,16, DCM_22DID_FLAG, + BL_NULL_PTR, BL_NULL_PTR, &Adpt_UdsCallBackRead_f19E_odx_id + }, + { + 0xF1F1U, 0, 2,16, DCM_22DID_FLAG, + BL_NULL_PTR, BL_NULL_PTR, &Adpt_UdsCallBackRead_F1F1_ecu_cal_num, + }, + { + 0xF1F2U, 0, 2,16, DCM_22DID_FLAG, + BL_NULL_PTR, BL_NULL_PTR, &Adpt_UdsCallBackRead_F1F2_boot_sw_id, + }, + { + 0x01a0U, 0, 1,4, DCM_22DID_FLAG, + BL_NULL_PTR, BL_NULL_PTR, &Adpt_UdsCallBackRead_01a0_manulifecount, + }, + { + 0xFE01U, 0, 2,4, DCM_22DID_FLAG, + BL_NULL_PTR, BL_NULL_PTR, &Adpt_UdsCallBackRead_FE01_device_id, + }, +}; + +/**************************************************************************//** + * \details The all service list of dcm mudule. + *****************************************************************************/ +//這是總的DCM UDS 服務表 +STATIC const bl_DcmService_t gs_DcmService[DCM_SERVICE_NUMBER] = +{ + { + //id=0x0010 //num=3 //minSize=2 + 0x0010u, DCM_10SUBID_NUMBER, DCM_10SERVICE_MINLEN, + //maxsize=2 //flag=0 //serviceList + DCM_10SERVICE_MAXLEN, DCM_10SERVICE_FLAG, gs_Dcm10SubId, + //header + &g_DcmSubIdHeader, BL_NULL_PTR + }, + { + //id=0x0011 //num=1 //minSize=2 + 0x0011u, DCM_11SUBID_NUMBER, DCM_11SERVICE_MINLEN, + //maxsize=2 //flag=4000031f //serviceList + DCM_11SERVICE_MAXLEN, DCM_11SERVICE_FLAG, gs_Dcm11SubId,\ + //header + &g_DcmSubIdHeader, BL_NULL_PTR + }, + { + //id=0x0027 //num=2 //minSize=2 + 0x0027u, DCM_27SUBID_NUMBER, DCM_27SERVICE_MINLEN, + //maxsize=0 //flag=40000312 //serviceList + DCM_27SERVICE_MAXLEN, DCM_27SERVICE_FLAG, gs_Dcm27SubId, + //header + &g_DcmSubIdHeader, BL_NULL_PTR + }, + { + //id=0x0028 //num=3 //minSize=3 + 0x0028u, DCM_28SUBID_NUMBER, DCM_28SERVICE_MINLEN, + //maxsize=3 //flag=4000031C //serviceList + DCM_28SERVICE_MAXLEN, DCM_28SERVICE_FLAG, gs_Dcm28SubId, + //header + &g_DcmSubIdHeader,BL_NULL_PTR + }, + { + //id=0x0031 //num=1 //minSize=4 + 0x0031u, DCM_31SUBID_NUMBER, DCM_31SERVICE_MINLEN, + //maxsize=0 //flag=0 //serviceList + DCM_31SERVICE_MAXLEN, DCM_31SERVICE_FLAG, gs_Dcm31SubId, + //header + &g_DcmSubIdHeader, BL_NULL_PTR + }, + { + //id=0x0034 //num=0 //minSize=11 + 0x0034u, DCM_34SUBID_NUMBER, DCM_34SERVICE_MINLEN, + //maxsize=11 //flag=40000212 //serviceList + DCM_34SERVICE_MAXLEN, DCM_34SERVICE_FLAG, BL_NULL_PTR, + //header + BL_NULL_PTR, &Adpt_UdsCallback34 + }, + { + //id=0x0036 //num=0 //minSize=3 + 0x0036u, DCM_36SUBID_NUMBER, DCM_36SERVICE_MINLEN, + //maxsize=0 //flag=40000212 //serviceList + DCM_36SERVICE_MAXLEN, DCM_36SERVICE_FLAG, BL_NULL_PTR, + //header + BL_NULL_PTR, &Adpt_UdsCallback36 + }, + { + //id=0x0037 //num=0 //minSize=1 + 0x0037u, DCM_37SUBID_NUMBER, DCM_37SERVICE_MINLEN, + //maxsize=1 //flag=40000212 //serviceList + DCM_37SERVICE_MAXLEN, DCM_37SERVICE_FLAG, BL_NULL_PTR, + //header + BL_NULL_PTR, &Adpt_UdsCallback37 + }, + { + //id=0x003E //num=1 //minSize=2 + 0x003Eu, DCM_3ESUBID_NUMBER, DCM_3ESERVICE_MINLEN, + //maxsize=2 //flag=4000031f //serviceList + DCM_3ESERVICE_MAXLEN, DCM_3ESERVICE_FLAG, gs_Dcm3ESubId, + //header + &g_DcmSubIdHeader, BL_NULL_PTR + }, + { + //id=0x0085 //num=2 //minSize=2 + 0x0085u, DCM_85SUBID_NUMBER, DCM_85SERVICE_MINLEN, + //maxsize=2 //flag=4000031C //serviceList + DCM_85SERVICE_MAXLEN, DCM_85SERVICE_FLAG, gs_Dcm85SubId, + //header + &g_DcmSubIdHeader, BL_NULL_PTR + }, + { + //id=0x002e //num=2 //minSize=7 + 0x002Eu, DCM_2ESUBID_NUMBER, DCM_2ESERVICE_MINLEN, + //maxsize=19 //flag=40000212 //serviceList + DCM_2ESERVICE_MAXLEN, DCM_2ESERVICE_FLAG, gs_Dcm2ESubId, + //header + &g_DcmDidHeader, BL_NULL_PTR + }, + { + //id=0x0022 //num=12 //minSize=3 + 0x0022u, DCM_22SUBID_NUMBER, DCM_22SERVICE_MINLEN, + //maxsize=3 //flag=4000031f //serviceList + DCM_22SERVICE_MAXLEN, DCM_22SERVICE_FLAG, gs_Dcm22SubId, + //header + &g_DcmDidHeader, BL_NULL_PTR + }, + //g_DcmSubIdHeader +}; + +/***************************************************************************** + * External Variable Definitions +*****************************************************************************/ +/**************************************************************************//** + * \details The dcmbuffer info, including recvSize, tranSize and so on. + *****************************************************************************/ +bl_DcmBuffer_t g_DcmBuffer = +{ + //status //index //recvSize //tranSize //totalSize *b=實體uffer + DCM_STATUS_BUFFER_UNLOCK, 0, 0, 0, DCM_BUFFER_SIZE, gs_Buffer, +}; + +const bl_DcmService_t g_DcmServiceList = +{ + 0, //id + DCM_SERVICE_NUMBER, //number + 0, //minSize + 0, //maxSize + 0, //flag + gs_DcmService, //serviceList -- 結構體 _tag_DcmService + &g_DcmServiceHeader, //header -- 結構體 _tag_DcmServiceHeader + BL_NULL_PTR +}; + diff --git a/code_boot_out/asil/middle/autosar_bl/sources/cfg/bl_flash_if_cfg.c b/code_boot_out/asil/middle/autosar_bl/sources/cfg/bl_flash_if_cfg.c new file mode 100644 index 0000000..b01e71f --- /dev/null +++ b/code_boot_out/asil/middle/autosar_bl/sources/cfg/bl_flash_if_cfg.c @@ -0,0 +1,81 @@ +/**************************************************************************//** + * + * \copyright This software is the property of Technologies. Any + * information contained in this doc should not be reproduced, + * or used, or disclosed without the written authorization from + * Technologies. + * + * \brief This is a source file to configurate the flash_if manager + * module. + * + * \file bl_flash_if_cfg.c + * \ingroup flash_if_manager_module + * \author + * + * \version 5.1.0 + * \date 27/03/2014 + * + * \par Changelist + * Version | Date | Authors | CR# | Descriptions + * -------- | ---------- | ---------------- | --- | ------------ + * 02.00.00 | 19/08/2013 | haiping.wang | N/A | Boot020001 + * 05.01.00 | 27/03/2014 | mingqing.tang | N/A | Boot050002 + * +******************************************************************************/ +#include "bl_flash_if_cfg.h" + +/***************************************************************************** + * QAC Suppression + *****************************************************************************/ +/*PRQA S 1531,3211 EOF*/ +/* + * 1531:The object is referenced in only one translation unit. + * g_BootingCheckerList is a configurations. + * + * 3211:The global identifier is defined but not used. + * The g_BootingCheckerList is used in the bl_booting.c file. + * + */ + +/***************************************************************************** + * Verify The Configurations of Function Macro + *****************************************************************************/ + +/***************************************************************************** + * Internal Macro Definitions + *****************************************************************************/ + +/***************************************************************************** + * Internal Type Definitions + *****************************************************************************/ + +/***************************************************************************** + * Internal Structure Definitions + *****************************************************************************/ + +/***************************************************************************** + * Internal Function Declarations + *****************************************************************************/ + +/***************************************************************************** + * Internal Variable Definitions +*****************************************************************************/ + +/***************************************************************************** + * Global Variable Definitions + *****************************************************************************/ +/** \brief config the physical flash block.*/ +const bl_FlashIfBlockInfo_t g_FlashIfBlockList[FLASHIF_NUMBER_OF_BLOCK] = +{ + { + FLASHIF_BLOCK0_STARTADDRESS, + FLASHIF_BLOCK0_TOTAL_SIZE, + FLASHIF_BLOCK0_SECTOR_SIZE, + FLASHIF_BLOCK0_PAGE_SIZE, + }, +}; + +/***************************************************************************** + * Function Definitions + *****************************************************************************/ + diff --git a/code_boot_out/asil/middle/autosar_bl/sources/cfg/bl_logical_block_cfg.c b/code_boot_out/asil/middle/autosar_bl/sources/cfg/bl_logical_block_cfg.c new file mode 100644 index 0000000..2fe7b80 --- /dev/null +++ b/code_boot_out/asil/middle/autosar_bl/sources/cfg/bl_logical_block_cfg.c @@ -0,0 +1,184 @@ +/**************************************************************************//** + * + * \copyright This software is the property of Technologies. Any + * information contained in this doc should not be reproduced, + * or used, or disclosed without the written authorization from + * Technologies. + * + * \brief This is a source file to configurate the logical block manager + * module. + * + * \file bl_logical_block_cfg.c + * \ingroup lb_manager_module + * \author + * + * \version 5.1.0 + * \date 27/03/2014 + * + * \par Changelist + * Version | Date | Authors | CR# | Descriptions + * -------- | ---------- | ---------------- | --- | ------------ + * 03.00.00 | 12/09/2011 | mingqing.tang | N/A | Boot030001 + * 03.01.00 | 16/09/2011 | mingqing.tang | N/A | Boot030002 + * 03.02.00 | 23/09/2011 | mingqing.tang | N/A | Boot030003 + * 03.11.00 | 15/02/2012 | mingqing.tang | N/A | Boot030012 + * 04.00.00 | 15/07/2012 | mingqing.tang | N/A | Boot040001 + * 04.01.00 | 15/07/2012 | mingqing.tang | N/A | Boot040002 + * 04.03.00 | 15/07/2012 | mingqing.tang | N/A | Boot040004 + * 04.21.00 | 15/07/2012 | mingqing.tang | N/A | Boot040022 + * 04.30.00 | 10/04/2013 | mingqing.tang | N/A | Boot040031 + * 05.00.00 | 19/06/2013 | mingqing.tang | N/A | Boot030001 + * 05.01.00 | 27/03/2014 | mingqing.tang | N/A | Boot050002 + * + *****************************************************************************/ +#include "bl_data.h" +#include "bl_logical_block_cfg.h" +#include "bl_flash_if_cfg.h" + +/***************************************************************************** + * QAC Suppression + *****************************************************************************/ +/*PRQA S 1257,1531,1533,3211,3406 EOF*/ +/* + * 1257:Suffixed integer constant implicitly converted to smaller integer type + * on assignment. + * + * 1531:The object is referenced in only one translation unit. + * g_LogicalBlockList is a configurations. + * + * 1533:The object is referenced in only one translation unit. + * + * 3211:The global identifier is defined but not used. + * The g_BootingCheckerList is used in the bl_booting.c file. + * + * MISRA-C:2004 8.5(3406):Object with external linkage has been defined in a + * header file. + * The g_HashCalculation is not defined in a header file. + * + */ + +/***************************************************************************** + * Verify The Configurations of Function Macro + *****************************************************************************/ +#if (((LBM_HASH_CALCULATION_BUFFER_SIZE)\ + & (LBM_HASH_CALCULATION_BUFFER_SIZE - 1UL)) != 0UL) +#error "the size of the buffer used to calculate the hash value is invalid." +#endif +/***************************************************************************** + * Internal Macro Definitions + *****************************************************************************/ + +/***************************************************************************** + * Internal Type Definitions + *****************************************************************************/ + +/***************************************************************************** + * Internal Structure Definitions + *****************************************************************************/ + +/***************************************************************************** + * Internal Function Declarations + *****************************************************************************/ + +/***************************************************************************** + * Internal Variable Definitions +*****************************************************************************/ +/**************************************************************************//** + * \details A list of status of the logical block. + *****************************************************************************/ +STATIC bl_u16_t gs_LogicalBlockStatus[LBM_NUMBER_OF_LOGICAL_BLOCK]; + +/**************************************************************************//** + * \details A array of the segment informations. + *****************************************************************************/ + +/**************************************************************************//** + * \details A array of the logical block informations. + *****************************************************************************/ +STATIC const bl_LogicalBlock_t gs_LogicalBlock[LBM_NUMBER_OF_LOGICAL_BLOCK] = +{ + /*logical block 1----flash application*/ + { + //type index=0 *statusָgs_LogicalBlockStatus[0] memId ӌid=1 + LBM_LB1_TYPE,LBM_LB1_INDEX,LBM_LB1_STATUS_PTR,LBM_LB1_MEMID, + //getLbMask 00 //writeLbMask RTE_SYSFLAG_ERASE_BLOCK=0x04???̫; + LBM_LB1_GETID_MASK,LBM_LB1_WRITE_MASK, + //eraseLbMask 00 //verifyLbMask 00 //address 0x030000 + LBM_LB1_ERASE_MASK,LBM_LB1_VERIFY_MASK,LBM_LB1_ADDRESS, + //size 0x0000BFF0UL //offsetMask FFFFFF validFlagIdַЧλmask //valid flag =0x01 pgm app valid flag ID + LBM_LB1_SIZE,LBM_LB1_OFFSET_MASK,LBM_LB1_VALID_FLAG_ID, + //headerId 3 //fpId 2 //succCntId 3 + LBM_LB1_FILE_HEADER_ID,LBM_LB1_FINGERPRINT_ID,LBM_LB1_SUCCESS_COUNT_ID, + //attemptCntId 3 //maxAttemptCnt ff D50ĬJ0 + LBM_LB1_ATTEMPT_COUNT_ID,LBM_LB1_MAX_ATTEMPT_COUNT, + //const struct _tag_SegmentList segments eֵ0 ʾ]жx segments + { + LBM_LB1_SEG_NUMBER,LBM_LB1_SEG_PTR + }, + }, + /*logical block 2--flash driver,ஔ ram */ + { + //type index=0?? *statusָgs_LogicalBlockStatus[1] memId ӌid=0 + LBM_LB2_TYPE,LBM_LB2_INDEX,LBM_LB2_STATUS_PTR,LBM_LB2_MEMID, + //getLbMask 00 //writeLbMask 00 + LBM_LB2_GETID_MASK,LBM_LB2_WRITE_MASK, + //eraseLbMask 00 //verifyLbMask 00 //address 0x3e00 + LBM_LB2_ERASE_MASK,LBM_LB2_VERIFY_MASK,LBM_LB2_ADDRESS, + //size 0x000001E0UL //offsetMask FFFF ַЧλmask //validFlagId flag error + LBM_LB2_SIZE,LBM_LB2_OFFSET_MASK,LBM_LB2_VALID_FLAG_ID, + //headerId ff //fpId FF //succCntId FF + LBM_LB2_FILE_HEADER_ID,LBM_LB2_FINGERPRINT_ID,LBM_LB2_SUCCESS_COUNT_ID, + //attemptCntId FF //maxAttemptCnt 0 + LBM_LB2_ATTEMPT_COUNT_ID,LBM_LB2_MAX_ATTEMPT_COUNT, + //const struct _tag_SegmentList segments eֵ0 ʾ]жx segments + { + LBM_LB2_SEG_NUMBER,LBM_LB2_SEG_PTR + }, + }, + /*logical block 3--flash CAL,ஔ APP DATA */ + { + //type index=0?? *statusָgs_LogicalBlockStatus[1] memId ӌid=0 + LBM_LB3_TYPE,LBM_LB3_INDEX,LBM_LB3_STATUS_PTR,LBM_LB3_MEMID, + //getLbMask 00 //writeLbMask 00 + LBM_LB3_GETID_MASK,LBM_LB3_WRITE_MASK, + //eraseLbMask 00 //verifyLbMask 00 //address 0x3e00 + LBM_LB3_ERASE_MASK,LBM_LB3_VERIFY_MASK,LBM_LB3_ADDRESS, + //size 0x000001E0UL //offsetMask FFFF ַЧλmask //validFlagId flag error + LBM_LB3_SIZE,LBM_LB3_OFFSET_MASK,LBM_LB3_VALID_FLAG_ID, + //headerId ff //fpId FF //succCntId FF + LBM_LB3_FILE_HEADER_ID,LBM_LB3_FINGERPRINT_ID,LBM_LB3_SUCCESS_COUNT_ID, + //attemptCntId FF //maxAttemptCnt 0 + LBM_LB3_ATTEMPT_COUNT_ID,LBM_LB3_MAX_ATTEMPT_COUNT, + //const struct _tag_SegmentList segments eֵ0 ʾ]жx segments + { + LBM_LB3_SEG_NUMBER,LBM_LB3_SEG_PTR + }, + }, +}; + +/***************************************************************************** + * Global Variable Definitions + *****************************************************************************/ +/**************************************************************************//** + * \details A list of logical blocks is managed by the logical block module. + *****************************************************************************/ +const bl_LogicalBlockList_t g_LogicalBlockList = +{ + BL_STATUS_INITED, //status ʼ + LBM_NUMBER_OF_LOGICAL_BLOCK, //number FЃɂblock + LBM_NUMBER_OF_APPLICATION, //appNum һÉK + LBM_NUMBER_OF_CALDATA, //calNum 0 + LBM_NUMBER_OF_DRIVER, //drvNum һ ӉK + LBM_NUMBER_OF_VIRTUAL, //virNum 0 + gs_LogicalBlock, //*lbList ָw +}; + +/**************************************************************************//** + * \details the buffer is used to calculate the hash value. + *****************************************************************************/ +bl_Buffer_t g_HashCalculation[LBM_HASH_CALCULATION_BUFFER_SIZE]; //@512A棻 flash sectorС 512 + +/***************************************************************************** + * Function Definitions + *****************************************************************************/ + diff --git a/code_boot_out/asil/middle/autosar_bl/sources/cfg/bl_memory_cfg.c b/code_boot_out/asil/middle/autosar_bl/sources/cfg/bl_memory_cfg.c new file mode 100644 index 0000000..8554ddd --- /dev/null +++ b/code_boot_out/asil/middle/autosar_bl/sources/cfg/bl_memory_cfg.c @@ -0,0 +1,122 @@ +/**************************************************************************//** + * + * \copyright This software is the property of Technologies. Any + * information contained in this doc should not be reproduced, + * or used, or disclosed without the written authorization from + * Technologies. + * + * \brief This is a source file to configurate the memory manager module. + * + * \file bl_memory_cfg.c + * \ingroup memory_manager_module + * \author + * + * + * \version 5.1.0 + * \date 27/03/2014 + * + * \par Changelist + * Version | Date | Authors | CR# | Descriptions + * -------- | ---------- | ---------------- | --- | ------------ + * 01.00.00 | 17/03/2010 | hewei.zhang | N/A | Boot010001 + * 01.01.00 | 20/04/2010 | hewei.zhang | N/A | Boot010002 + * 01.04.00 | 26/06/2010 | hewei.zhang | N/A | Boot010005 + * 02.00.00 | 21/02/2011 | mingqing.tang | N/A | Boot020001 + * 02.02.00 | 15/03/2011 | mingqing.tang | N/A | Boot020003 + * 02.07.00 | 14/06/2011 | mingqing.tang | N/A | Boot020008 + * 03.00.00 | 12/09/2011 | mingqing.tang | N/A | Boot030001 + * 03.03.00 | 17/10/2011 | mingqing.tang | N/A | Boot030004 + * 03.04.00 | 24/10/2011 | mingqing.tang | N/A | Boot030005 + * 03.18.00 | 29/05/2012 | mingqing.tang | N/A | Boot030019 + * 05.00.00 | 19/06/2013 | mingqing.tang | N/A | Boot050001 + * 05.01.00 | 27/03/2014 | mingqing.tang | N/A | Boot050002 + * + *****************************************************************************/ +#include "bl_rte.h" +#include "bl_memory_cfg.h" +#include "bl_flash_if.h" +#include "bl_ram.h" +#include "bl_flash_if_cfg.h" +/***************************************************************************** + * QAC Suppression + *****************************************************************************/ +/*PRQA S 1257,1531,3211 EOF*/ +/* + * 1257:Suffixed integer constant implicitly converted to smaller integer type + * on assignment. + * + * 1531:The object is referenced in only one translation unit. + * g_BootingCheckerList is a configurations. + * + * 3211:The global identifier is defined but not used. + * The g_BootingCheckerList is used in the bl_booting.c file. + * + */ + +/***************************************************************************** + * Internal Macro Definitions + *****************************************************************************/ + +/***************************************************************************** + * Internal Type Definitions + *****************************************************************************/ + +/***************************************************************************** + * Internal Structure Definitions + *****************************************************************************/ + +/***************************************************************************** + * Internal Function Declarations + *****************************************************************************/ + +/***************************************************************************** + * Internal Variable Definitions + *****************************************************************************/ + +/***************************************************************************** + * Global Variable Definitions + *****************************************************************************/ +/**************************************************************************//** + * \details The memory operations list. + *****************************************************************************/ +STATIC const bl_MemoryOperations_t gs_MemoryOps[MEM_NUMBER_OF_OPSLIST] = +{ + { + MEM_MEMORY_0_OPS_INIT,MEM_MEMORY_0_OPS_DEINIT,MEM_MEMORY_0_OPS_WRITE, + MEM_MEMORY_0_OPS_READ,MEM_MEMORY_0_OPS_ERASE + }, + { + MEM_MEMORY_1_OPS_INIT,MEM_MEMORY_1_OPS_DEINIT,MEM_MEMORY_1_OPS_WRITE, + MEM_MEMORY_1_OPS_READ,MEM_MEMORY_1_OPS_ERASE + }, +}; + +/**************************************************************************//** + * \details The memory informations. + *****************************************************************************/ +STATIC const bl_MemoryInfo_t gs_MemoryInfo[MEM_NUMBER_OF_MEMORY] = +{ + { + MEM_MEMORY_0_TYPE,MEM_MEMORY_0_INDEX,MEM_MEMORY_0_BASE_ADDRESS, + MEM_MEMORY_0_SIZE,MEM_MEMORY_0_OPS + }, + { + MEM_MEMORY_1_TYPE,MEM_MEMORY_1_INDEX,MEM_MEMORY_1_BASE_ADDRESS, + MEM_MEMORY_1_SIZE,MEM_MEMORY_1_OPS + }, +}; + +/**************************************************************************//** + * \details The memory informations list. + * + * \warning Do not change the name of this variable. + *****************************************************************************/ +const bl_MemoryInfoList_t g_MemoryInfoList = +{ + MEM_NUMBER_OF_MEMORY,gs_MemoryInfo +}; + +/***************************************************************************** + * Function Definitions + *****************************************************************************/ + diff --git a/code_boot_out/asil/middle/autosar_bl/sources/cfg/bl_process_driver_cfg.c b/code_boot_out/asil/middle/autosar_bl/sources/cfg/bl_process_driver_cfg.c new file mode 100644 index 0000000..1ed97fa --- /dev/null +++ b/code_boot_out/asil/middle/autosar_bl/sources/cfg/bl_process_driver_cfg.c @@ -0,0 +1,90 @@ +/**************************************************************************//** + * + * \copyright This software is the property of Technologies. Any + * information contained in this doc should not be reproduced, + * or used, or disclosed without the written authorization from + * Technologies. + * + * \brief This is the source file to configurate the process driver + * module. + * + * \file bl_process_driver_cfg.c + * \ingroup process_driver_module + * \author + * + * \version 5.1.0 + * \date 27/03/2014 + * + * \par Changelist + * Version | Date | Authors | CR# | Descriptions + * -------- | ---------- | ---------------- | --- | ------------ + * 04.00.00 | 12/03/2012 | mingqing.tang | N/A | Boot040001 + * 04.03.00 | 22/03/2012 | mingqing.tang | N/A | Boot040004 + * 04.07.00 | 18/04/2012 | mingqing.tang | N/A | Boot040008 + * 05.00.00 | 19/06/2013 | heli.zhang | N/A | Boot050001 + * 05.01.00 | 27/03/2014 | mingqing.tang | N/A | Boot050002 + * + *****************************************************************************/ +#include "bl_process_driver_cfg.h" +#include "bl_proc_passive_schedule.h" +#include "bl_adpt_uds_platform.h" + +/***************************************************************************** + * QAC Suppression + *****************************************************************************/ +/*PRQA S 1257,1533,3211 EOF*/ +/* + * 1257:Suffixed integer constant implicitly converted to smaller integer type + * on assignment. + * + * 1533:The object is referenced in only one translation unit. + * + * 3211:The global identifier is defined but not used. + * The g_BootingCheckerList is used in the bl_booting.c file. + * + */ + +/***************************************************************************** + * Internal Macro Definitions + *****************************************************************************/ + +/***************************************************************************** + * Internal Type Definitions + *****************************************************************************/ + +/***************************************************************************** + * Internal Structure Definitions + *****************************************************************************/ + +/***************************************************************************** + * Internal Function Declarations + *****************************************************************************/ + +/***************************************************************************** + * Internal Variable Definitions + *****************************************************************************/ +/**************************************************************************//** + * \details The process driver info. + *****************************************************************************/ +STATIC const bl_ProcessDriver_t gs_ProcessDriver[PROC_NUMBER_OF_DRIVER] = +{ + { + // // //adapter g_UdsPlatformAdapter + PROC_DRIVER_0_TYPE, PROC_DRIVER_0_INDEX, PROC_DRIVER_0_ADAPTER, + //Schedule Proc_PassiveSchedule + PROC_DRIVER_0_SCHEDULER + }, +}; + +/***************************************************************************** + * External Variable Definitions + *****************************************************************************/ +/**************************************************************************//** + * \details The process driver list, including all process driver info. + *****************************************************************************/ +const bl_ProcessDriverList_t g_ProcessDriverList = +{ + PROC_NUMBER_OF_DRIVER, gs_ProcessDriver, +}; + + diff --git a/code_boot_out/asil/middle/autosar_bl/sources/cfg/bl_rte_cfg.c b/code_boot_out/asil/middle/autosar_bl/sources/cfg/bl_rte_cfg.c new file mode 100644 index 0000000..dde5c18 --- /dev/null +++ b/code_boot_out/asil/middle/autosar_bl/sources/cfg/bl_rte_cfg.c @@ -0,0 +1,200 @@ +/**************************************************************************//** + * + * \copyright This software is the property of Technologies. Any + * information contained in this doc should not be reproduced, + * or used, or disclosed without the written authorization from + * Technologies. + * + * \brief This is the configuration source file of the runtime + * environment module. + * + * \file bl_rte_cfg.c + * \ingroup rte_module + * \author + * + * \version 5.1.0 + * \date 27/03/2014 + * + * \par Changelist + * Version | Date | Authors | CR# | Descriptions + * -------- | ---------- | ---------------- | --- | ------------ + * 01.00.00 | 17/03/2010 | hewei.zhang | N/A | Boot010001 + * 01.01.00 | 20/04/2010 | hewei.zhang | N/A | Boot010002 + * 01.03.00 | 28/05/2010 | hewei.zhang | N/A | Boot010004 + * 01.04.00 | 26/06/2010 | hewei.zhang | N/A | Boot010005 + * 01.08.00 | 24/08/2010 | hewei.zhang | N/A | Boot010009 + * 01.11.00 | 07/12/2010 | hewei.zhang | N/A | Boot010012 + * 02.00.00 | 21/02/2011 | mingqing.tang | N/A | Boot020001 + * 02.02.00 | 15/03/2011 | mingqing.tang | N/A | Boot020003 + * 02.07.00 | 14/06/2011 | mingqing.tang | N/A | Boot020008 + * 03.00.00 | 12/09/2011 | mingqing.tang | N/A | Boot030001 + * 03.03.00 | 17/10/2011 | mingqing.tang | N/A | Boot030004 + * 03.04.00 | 24/10/2011 | mingqing.tang | N/A | Boot030005 + * 03.10.00 | 03/01/2012 | mingqing.tang | N/A | Boot030011 + * 03.12.00 | 18/01/2012 | mingqing.tang | N/A | Boot030013 + * 03.18.00 | 29/05/2012 | mingqing.tang | N/A | Boot030019 + * 05.00.00 | 19/06/2013 | mingqing.tang | N/A | Boot050001 + * 05.01.00 | 27/03/2014 | mingqing.tang | N/A | Boot050002 + * + *****************************************************************************/ +#include "bl_rte.h" +#include "bl_rte_cfg.h" +#include "bl_app.h" +#include "bl_booting.h" +#include "bl_watchdog.h" +#include "bl_system.h" +#include "bl_timer.h" +#include "bl_can_if.h" +#include "bl_process_driver.h" +#include "bl_adpt_uds_platform.h" + +/***************************************************************************** + * QAC Suppression + *****************************************************************************/ +/*PRQA S 305,1257,1531,1533,3211,3406 EOF*/ +/* + * MISRA-C:2004 11.3(305):Cast a pointer to an integral type. + * The feed interface of the watchdog module must be run in the RAM. + * + * 1257:Suffixed integer constant implicitly converted to smaller integer type + * on assignment. + * + * 1531:The object is referenced in only one translation unit. + * g_SecurityDelayInfo is a configurations. + * + * 1533:The object is only referenced by one function. + * The objects are a configurations. + * + * 3211:The global identifier is defined but not used. + * The identifier are used in the bl_rte.c file. + * + * MISRA-C:2004 8.5(3406):Object with external linkage has been defined in a + * header file. + * The g_DownSegment is not defined in a header file. + * + */ + +/***************************************************************************** + * Internal Macro Definitions + *****************************************************************************/ + +/***************************************************************************** + * Internal Type Definitions + *****************************************************************************/ + +/***************************************************************************** + * Internal Structure Definitions + *****************************************************************************/ + +/***************************************************************************** + * Internal Function Declarations + *****************************************************************************/ + +/***************************************************************************** + * Internal Variable Definitions + *****************************************************************************/ +STATIC const bl_ResetProcess_t + gs_ResetProcess[RTE_NUMBER_OF_BOOTING_PROCESSOR] = +{ + //flag = 01 // *Process = &Adpt_ReprogramValidProcess + { + BOOTING_FLAG_REPROGRAM_VALID,RTE_REPROGRAM_PROCESS + }, +#if (RTE_FUN_STAY_IN_BOOT == BL_FUN_ON) + { + //flag = 02 // *Process = &Adpt_AppValidProcess + BOOTING_FLAG_APPLICATION_VALID,RTE_STAYINBOOT_PROCESS + }, +#endif +}; + +STATIC const bl_WatchdogOps_t gs_WatchdogOps = +{ + RTE_WATCHDOG_OPS_INIT, //*Init Wdg_Init +#if ((RTE_FUN_WATCHDOG == BL_FUN_ON) && (RTE_FUN_COPY_WDG_TO_RAM == BL_FUN_ON)) //條件成立 + (bl_FeedWgdCallback_t)RTE_WATCHDOG_FEED_INTERFACE_ADDR, // 1160；在 Wdg_Init時把 Wdg_Feed 載入 /*PRQA S 0305*/ +#else + RTE_WATCHDOG_OPS_FEED, +#endif + RTE_WATCHDOG_OPS_RESET, //*FastReset Wdg_FastReset + RTE_WATCHDOG_OPS_DEINIT //*Deinit Wdg_Deinit +}; + +#if (RTE_FUN_SYSTEM_SLEEP == BL_FUN_ON) +STATIC const bl_SystemSleepOps_t gs_SystemSleepOps = +{ + RTE_SYSTEM_OPS_ISSLEEP, // *IsSleep BL_NULL_PTR + RTE_SYSTEM_OPS_SLEEPCALLBACK, // *SleepCallback &Rte_Dummy + RTE_SYSTEM_OPS_SYSTEMSLEEP, // *SystemSleep &Sys_Sleep + RTE_SYSTEM_OPS_WAKEUPCALLBACK // *WakeupCallback &Wdg_FastReset +}; +#endif + +STATIC const bl_TimerOps_t gs_TimerOps = +{ + RTE_TIMER_OPS_INIT, // *Init Tim_Init + RTE_TIMER_OPS_DEINIT, // *Deinit Tim_Deinit + RTE_TIMER_OPS_TIMEOUT // *IsTimeout Tim_IsTimeout +}; + +STATIC const bl_ComIfOps_t gs_ComIfOps = +{ + RTE_COMIF_OPS_INIT, // *Init Canif_Init + RTE_COMIF_OPS_DEINIT, // *Deinit Canif_DeInit + RTE_COMIF_OPS_READ, // *Read Canif_TryToRead + RTE_COMIF_OPS_WRITE, // *Write Canif_Write + RTE_COMIF_OPS_ISSUCCWRITE // *IsWritten Canif_IsWritten +}; + + +/***************************************************************************** + * Global Variable Definitions + *****************************************************************************/ +// RTE_NUMBER_OF_DOWN_SEGMENT =30 +bl_DownSegment_t g_DownSegment[RTE_NUMBER_OF_DOWN_SEGMENT]; // 下載時的 seg 情況。， 相當於 每個seg 的地址和長度，列出來 + +const bl_ResetProcessList_t g_ResetProcessList = +{ + RTE_NUMBER_OF_BOOTING_PROCESSOR, // 2 + gs_ResetProcess +}; + +#if (RTE_FUN_STAY_IN_BOOT == BL_FUN_ON) //條件成立 +const bl_Buffer_t g_StayInBootValue[RTE_STAY_IN_BOOT_MSG_SIZE] = +{ + RTE_STAY_IN_BOOT_VALUE //(0x04u),(0x31u),(0x01u),(0xF5u),(0x18u) +}; +#endif + +/* +#define RTE_NUMBER_OF_EVENT (4) +#define RTE_EVENT_TYPE_RECV_REQUEST (0x0000u) +#define RTE_EVENT_TYPE_MEMOPS_TIMEOUT (0x0001u) +#define RTE_EVENT_TYPE_S3TIME_TIMEOUT (0x0002u) +#define RTE_EVENT_TYPE_SYSTEM_SLEEP (0x0003u) +*/ +const bl_EventCallback_t g_EventProcessList[RTE_NUMBER_OF_EVENT] = // 被重命名 成 RTE_DO_EVENT_PROCESSER +{ + &Rte_ResetTimer, // 重置 gs_StayInBootResetCount=初始 + &Proc_Timeout, // Adpt_UdsTimeOutCallBack //負響應 78 + RTE_WATCHDOG_OPS_RESET, //Wdg_FastReset + &Proc_Sleep, +}; + +const bl_RteInfo_t g_RteInfo = +{ + RTE_SYSTEM_VERSION, // version = 0x00050100UL + &gs_WatchdogOps, // *wdgOps 指向看門狗 實體 +#if (RTE_FUN_SYSTEM_SLEEP == BL_FUN_ON) + &gs_SystemSleepOps, // *sleepOps 指向休眠相關實體 +#else + BL_NULL_PTR, /*RTE_FUN_SYSTEM_SLEEP is OFF*/ +#endif + &gs_TimerOps, // *timerOps 指向定時器 實體 + &gs_ComIfOps, // *comOps 指向 can 實體 + RTE_WATCHDOG_OPS_RESET // *SystemReset == Wdg_FastReset +}; +/***************************************************************************** + * Function Definitions + *****************************************************************************/ + diff --git a/code_boot_out/asil/middle/autosar_bl/sources/cfg/bl_security_cfg.c b/code_boot_out/asil/middle/autosar_bl/sources/cfg/bl_security_cfg.c new file mode 100644 index 0000000..39a4bc2 --- /dev/null +++ b/code_boot_out/asil/middle/autosar_bl/sources/cfg/bl_security_cfg.c @@ -0,0 +1,99 @@ +/**************************************************************************//** + * + * \copyright This software is the property of Technologies. Any + * information contained in this doc should not be reproduced, + * or used, or disclosed without the written authorization from + * Technologies. + * + * \brief This is a source file to configurate the security manager module. + * + * \file bl_security_cfg.c + * \ingroup security_manager_module + * \author + * + * + * \version 5.1.0 + * \date 27/03/2014 + * + * \par Changelist + * Version | Date | Authors | CR# | Descriptions + * -------- | ---------- | ---------------- | --- | ------------ + * 01.00.00 | 25/03/2010 | hewei.zhang | N/A | Boot010001 + * 01.01.00 | 19/05/2010 | hewei.zhang | N/A | Boot010002 + * 02.00.00 | 18/05/2011 | mingqing.tang | N/A | Boot020001 + * 02.01.00 | 15/06/2011 | mingqing.tang | N/A | Boot020002 + * 02.05.00 | 22/06/2011 | mingqing.tang | N/A | Boot020006 + * 05.00.00 | 19/06/2013 | xin.shang | N/A | Boot050001 + * 05.01.00 | 27/03/2014 | mingqing.tang | N/A | Boot050002 + * + *****************************************************************************/ +#include "bl_security_cfg.h" +#include "bl_crc32_bzip2.h" +#include "bl_access_udsdemo.h" + +/***************************************************************************** + * QAC Suppression + *****************************************************************************/ +/*PRQA S 1531,3211 EOF*/ +/* + * 1531:The object is referenced in only one translation unit. + * + * 3211:The global identifier is defined but not used. + * The g_SecurityAccessOps is used in the bl_security.c file. + * The g_VerificationOps is used in the bl_security.c file. + * + */ + +/***************************************************************************** + * Internal Macro Definitions + *****************************************************************************/ + +/***************************************************************************** + * Internal Type Definitions + *****************************************************************************/ + +/***************************************************************************** + * Internal Structure Definitions + *****************************************************************************/ + +/***************************************************************************** + * Internal Function Declarations + *****************************************************************************/ + +/***************************************************************************** + * Internal Variable Definitions + *****************************************************************************/ + +/***************************************************************************** + * Global Variable Definitions + *****************************************************************************/ +/**************************************************************************//** + * \details A operation list of security access, this list is only used by + * the security manager module. + * + * \warning All other modules MUST not use this variable. + *****************************************************************************/ +const bl_SecurityAccessOps_t g_SecurityAccessOps = +{ + SECM_ACCESS_INIT, //Init Acc_UdsDemoInit + SECM_ACCESS_MAKE_NEWSEED, //MakeNewSeed Acc_UdsDemoMakeNewSeed + SECM_ACCESS_GET_SEED, //GetSeed Acc_UdsDemoGetSeed + SECM_ACCESS_VERIFY_KEY //VerifyKey Acc_UdsDemoVerifyKey +}; + + +/****************************************************************************** + * \details The verification Operations list. + *****************************************************************************/ +const bl_VerificationOps_t g_VerificationOps = +{ + SECM_VERIFICATION_INIT, //Init Bzip2_Init + SECM_VERIFICATION_START, //Start Bzip2_Start + SECM_VERIFICATION_UPDATE, //Update Bzip2_Update + SECM_VERIFICATION_VERIFY //Verify Bzip2_Verify +}; + +/***************************************************************************** + * Function Definitions + *****************************************************************************/ + diff --git a/code_boot_out/asil/middle/autosar_bl/sources/driver/bl_can.c b/code_boot_out/asil/middle/autosar_bl/sources/driver/bl_can.c new file mode 100644 index 0000000..1d43f57 --- /dev/null +++ b/code_boot_out/asil/middle/autosar_bl/sources/driver/bl_can.c @@ -0,0 +1,1373 @@ +/**************************************************************************//** + * + * \copyright This software is the property of Technologies. Any + * information contained in this doc should not be reproduced, + * or used, or disclosed without the written authorization from + * Technologies. + * + * \brief This is the source file of the can module. + * + * \file bl_can.c + * \ingroup driver_module + * \author + * + * \version 1.1.0 + * \date 14/05/2014 + * + * \par Changelist + * Version | Date | Authors | CR# | Descriptions + * -------- | ---------- | ---------------- | --- | ------------- + * 01.00.00 | 14/05/2014 | ning.chen | N/A | BootDrv010001 + * 01.01.00 | 21/08/2014 | ning.chen | N/A | BootDrv010002 + * + *****************************************************************************/ +#include "bl_common.h" +#include "bl_rte.h" +#include "bl_system.h" +#include "bl_can.h" +#include "queue_entity.h" +#include "bl_system_cfg.h" +#include "Cpu.h" +#include "bl_can_if_cfg.h" +#include "Ls_Nm.h" +#include "can.h" + + +/***************************************************************************** + * QAC Suppression + *****************************************************************************/ +/*PRQA S 277,303,312,506,602,781,1251,1252,1257,1258,1532,2100,2103,2465 EOF*/ +/*PRQA S 3112,3120,3204,3212,3218,3227,3441,3442,3453,4130 EOF*/ +/* + * 277:An integer constant expression with negative value is being converted + * to an unsigned type. + * + * MISRA-C:2004 11.3(303):Cast a pointer to an integral type. + * To address a register must cast an integral type to a pointer. + * + * 312:Dangerous pointer cast results in loss of volatile qualification. + * + * 506:Dereferencing pointer value that is possibly NULL. + * The parameter pdu is not a null pointer. + * + * MISRA-C:2004 20.2(602):The identifier is reserved for use by the library. + * The Bootloader do not use any library funtion and use the underscores to + * indicate that the function is a interal function. + * + * MISRA-C:2004 5.6(781):The identifier is used as a structure/union member. + * The member of the structure is used through the structure object. + * + * 1251:Suffixed integer constant causes implicit conversion of other + * (integral) operand. + * + * 1252:suffixed integer constant implicitly converted to different integer. + * + * 1257:Suffixed integer constant implicitly converted to smaller integer type + * on assignment. + * + * 1258:Suffixed integer constant explicitly cast to another type. + * + * 1532:The function is only referenced in one translation unit. + * all functions in this file are configurations in the Security Module. + * + * 2100:Integral promotion : unsigned char promoted to signed int. + * + * 2103:Integral promotion, unsigned short promoted to unsigned int. + * This message will therefore only be generated when a short and an int are of + * equal size. + * + * 2465:This 'for' loop will only be executed once. + * + * MISRA-C:2004 14.2(3112):This statement has no side-effect. + * The DEBUG_ASSERT macro is used to debug bootloader when the BL_DEBUG is + * enable. When the BL_DEBUG is disable, the DEBUG_ASSERT macro is null. + * + * 3120:Hard-coded magic integer constant. + * This is a only configuration. + * + * 3204:The variable is only set once and so it could be declared with the + * 'const' qualifier. + * + * 3212:This explicit cast is redundant and could be removed. + * + * MISRA-C:2004 8.7(3218):File scope static identifier is only accessed in one + * function. + * + * 3227:The parameter is never modified and so it could be declared with const. + * + * 3441:Function call argument contains side effects. + * + * 3442:Operator other than & or = applied to a volatile object. + * + * MISRA-C:2004 19.7(3453):A function could probably be used instead of this + * function-like macro. + * + * MISRA-C:2004 12.7(4130):Bitwise operations on signed data will give + * implementation defined results. + * + */ + +static void can1_phy_drive_init(void); + +#if 1 +#define CAN_DRIVE_SR_ALLOC() // CPU_SR_ALLOC() +#define CAN_DRIVE_CRITICAL_ENTER() // CPU_CRITICAL_ENTER() +#define CAN_DRIVE_CRITICAL_EXIT() // CPU_CRITICAL_EXIT() +#else +#define CAN_DRIVE_SR_ALLOC() //CPU_SR_ALLOC() +#define CAN_DRIVE_CRITICAL_ENTER() INT_SYS_DisableIRQGlobal() +#define CAN_DRIVE_CRITICAL_EXIT() INT_SYS_EnableIRQGlobal() +#endif + +typedef enum +{ + CAN_T_START = 0, + CAN_T_STOP = 1, + CAN_T_SLEEP = 2, + CAN_T_WAKEUP =3, + CAN_T_NONE = 4 +}Can_StateTransitionType; +typedef enum +{ + CAN_DRIVE_STATE_INIT = 0u, //就是STOP + CAN_DRIVE_STATE_NORMAL = 1u, + CAN_DRIVE_STATE_BUSOFF = 2u, + CAN_DRIVE_STATE_SLEEP = 3u, +}can_drive_state_e; + +typedef struct $ +{ + u8 buf[12]; + u8 tx[12]; + u8 rx[12]; +}bl_can_test_s; +static bl_can_test_s g_bl_can_test[2] = {0}; + +typedef struct +{ + u8 state; + u16 count; +}can_driver_busoff_s; +typedef struct +{ + u8 state; + u16 count; +}can_driver_wakeup_s; +typedef struct +{ + u8 state; + can_driver_busoff_s busoff; + can_driver_wakeup_s wakeup; + can_queue_elem_s tx; + can_queue_elem_s rx; + #ifdef CAN_LOGIC_DEBUG + u8 buf[20]; + #endif +}can_driver_s; +static can_driver_s g_can_driver[CAN_ID_TOTAL] = {0u}; +#ifdef CAN_LOGIC_DEBUG +static u8 g_can_busoff_test[CAN_ID_TOTAL][9] ={0}; +//static can_drive_debug_s g_can_drive_debug = {0u}; +#endif + +#ifdef CAN_RX_INTERRUPT_EN +#define CAN1_QUEUE_RX_DEPTH 8 +typedef can_queue_elem_s can_rx_q_t; +sequential_queue_s can1_rx_queue; +bl_CanRxPdu_t can1_rx_qbuf[CAN1_QUEUE_RX_DEPTH]; +#endif + +/***************************************************************************** + * Verify The Configurations of Macro + *****************************************************************************/ +#if ((CAN_USED_CONTROLLER_NUMBER == 0)\ + || (CAN_USED_CONTROLLER_NUMBER > CAN_MAX_NUMBER_OF_CONTROLLER)) +#error "the number of used controller is error." +#endif + +/***************************************************************************** + * Internal Macro Definitions + *****************************************************************************/ + + +/*lint -emacro(778,CAN_MAKE_BUF_ID,CAN_MAKE_CAN_ID)*/ +/*lint -emacro(572,CAN_MAKE_BUF_ID,CAN_MAKE_CAN_ID)*/ +#if (CANIF_FUN_EXTERNED_ID == BL_FUN_ON) +#define CAN_MAKE_BUF_ID(canId) (bl_u32_t)((((canId)<<3) & 0xFFE00000UL)|\ + (((canId) << 1) & 0x0007FFFEUL) |\ + 0x00180000UL) +#define CAN_MAKE_CAN_ID(bufId) (bl_u32_t)((((bufId) >> 1) & 0x0003FFFFUL) |\ + (((bufId) >> 3) & 0x1FFC0000UL)) +#else +#define CAN_MAKE_BUF_ID(canId) (bl_u32_t)((canId) << 21) +#define CAN_MAKE_CAN_ID(bufId) (bl_u32_t)(((bufId) >> 21) & 0x000007FFUL) +#endif +/***************************************************************************** + * Internal Structure Definitions + *****************************************************************************/ + +/***************************************************************************** + * Internal Function Declarations + *****************************************************************************/ +/** \brief Deinitialize a can controller.*/ +static void _Can_DeInit(volatile bl_CanControllerBaseRegs_t *regs); +/** \brief Initialize a can controller.*/ +static bl_Return_t _Can_Init(volatile bl_CanControllerBaseRegs_t *regs, + const bl_CanControllerBaseRegs_t *initReg); + +#if (CANIF_FUN_DYNAMIC_CANID == BL_FUN_ON) +/** \brief Set the can id to the Can IF module.*/ +static void _Can_SetCanId(void); +#endif + +/***************************************************************************** + * Internal Variable Definitions + *****************************************************************************/ +STATIC __IO bl_CanControllerRegs_t * + const gs_CanControllerRegs[CAN_MAX_NUMBER_OF_CONTROLLER] = +{ + (__IO bl_CanControllerRegs_t*)CAN_BASE, + //(__IO bl_CanControllerRegs_t*)CAN0_BASE, + //(__IO bl_CanControllerRegs_t*)CAN2_BASE, +}; + +STATIC bl_CanController_t gs_CanController[CAN_USED_CONTROLLER_NUMBER]; + +STATIC const bl_CanControllerBaseRegs_t + gs_CanControllerInitReg[CAN_USED_CONTROLLER_NUMBER] ; +#if 0 += +{ + { + CAN0_CTL0_INIT, + (CAN_CTL1_CANE|CAN0_CLKSRC_CFG), + CAN0BTR0_Def, + CAN0BTR1_Def, + 0xffu, + CAN0_RIER_INIT, + 0, + CAN0_TIER_INIT, + 0, + 0, + 0, + CANIDAC_Def, + 0, + 0, + 0, + 0, + (CAN_RX_ID0 >> 24) & 0xFFu, /*lint !e778 !e572*/ + (CAN_RX_ID0 >> 16) & 0xFFu, /*lint !e778 !e572*/ + (CAN_RX_ID0 >> 8) & 0xFFu, /*lint !e778 !e572*/ + (CAN_RX_ID0 >> 0) & 0xFFu, /*lint !e778 !e572*/ + CAN_IDMR_INIT, + CAN_IDMR_INIT, + CAN_IDMR_INIT, + CAN_IDMR_INIT, + (CAN_RX_ID1 >> 24) & 0xFFu, /*lint !e778 !e572*/ + (CAN_RX_ID1 >> 16) & 0xFFu, /*lint !e778 !e572*/ + (CAN_RX_ID1 >> 8) & 0xFFu, /*lint !e778 !e572*/ + (CAN_RX_ID1 >> 0) & 0xFFu, /*lint !e778 !e572*/ + CAN_IDMR_INIT, + CAN_IDMR_INIT, + CAN_IDMR_INIT, + CAN_IDMR_INIT, + }, +}; +#endif + +STATIC const bl_CanControllerCfg_t + gs_CanControllerCfg[CAN_USED_CONTROLLER_NUMBER] = +{ + { + CAN_USED_CONTROLLER_ID,&gs_CanControllerInitReg[0] + }, + /** + { + CAN_USED_CONTROLLER_ID_1,&gs_CanControllerInitReg[1] + },**/ +}; + +/***************************************************************************** + * Global Variable Definitions + *****************************************************************************/ + +/***************************************************************************** + * Function Definitions + *****************************************************************************/ +/**************************************************************************//** + * + * \details Initialize can module. + * + * \return If the can driver is initialized successfully return + * BL_ERR_OK. otherwise return BL_ERR_NOT_OK. + * + * \retval BL_ERR_OK - can driver is initialized successfully. + * \retval BL_ERR_NOT_OK - can driver is not initialized successfully. + * + * \since V2.0.0 + * + *****************************************************************************/ +bl_Return_t Can_Init(void) +{ + bl_u8_t i; + bl_u8_t phyId; + bl_CanControllerRegs_t *regs; + bl_Return_t ret = BL_ERR_NOT_OK; + + for (i = 0; i < CAN_USED_CONTROLLER_NUMBER; i++) + { + if (gs_CanController[i].status != CAN_STATUS_IDLE) + { + phyId = gs_CanControllerCfg[i].phyId; + regs = (bl_CanControllerRegs_t*)gs_CanControllerRegs[phyId]; + + ret = _Can_Init(®s->base,gs_CanControllerCfg[i].initReg); + if (BL_ERR_OK == ret) + { + gs_CanController[i].status = CAN_STATUS_IDLE; + gs_CanController[i].regs = regs; + } + else + { + gs_CanController[i].status = CAN_STATUS_NOINIT; + gs_CanController[i].regs = BL_NULL_PTR; + break; + } + } + else + { + ret = BL_ERR_OK; + } + } + +#if (CANIF_FUN_DYNAMIC_CANID == BL_FUN_ON) + if (BL_ERR_OK == ret) + { + _Can_SetCanId(); + + } +#endif + + #ifdef CAN_RX_INTERRUPT_EN + queue_init(&can1_rx_queue,(sequential_queue_elem*)&can1_rx_qbuf,CAN1_QUEUE_RX_DEPTH,sizeof(bl_CanRxPdu_t)); + #endif + return ret; +} + +/**************************************************************************//** + * + * \details Deinitialize can module. + * + * \return None. + * + * \since V2.0.0 + * + *****************************************************************************/ +void Can_Deinit(void) +{ + bl_u8_t i; + + for (i = 0; i < CAN_USED_CONTROLLER_NUMBER; i++) + { + if (gs_CanController[i].status != CAN_STATUS_NOINIT) + { + _Can_DeInit(&gs_CanController[i].regs->base); + + gs_CanController[i].status = CAN_STATUS_NOINIT; + gs_CanController[i].regs = BL_NULL_PTR; + } + } + + return ; +} + +//#define CANx_TXMASK(hth) ((u8)(0x01<<(hth))) +#define CANx_TXMASK(hth) ((u8)(0x02)) + +/**************************************************************************//** + * + * \details Transmit can message. + * + * \param[in/out] pdu - the pointer of can Tx PDU. + * + * \return If the can driver is transmited successfully return BL_ERR_OK. + * otherwise return BL_ERR_NOT_OK. + * + * \retval BL_ERR_OK - can message is transmited successfully. + * \retval BL_ERR_NOT_OK - the controller is busy or not initialized. + * + * \since V2.0.0 + *struct _tag_CanTxPdu +{ + bl_ComIfHandle_t handle; + bl_BufferSize_t dlc; + bl_u32_t canId; + const bl_Buffer_t *frame; +}; + *****************************************************************************/ +bl_Return_t Can_Write(const bl_CanTxPdu_t *pdu) +{ + bl_Return_t ret = BL_ERR_NOT_OK; + bl_ComIfHandle_t handle = pdu->handle; + volatile bl_CanControllerBaseRegs_t *regs; + //volatile bl_CanFrameBuffer_t *txBuf; + u8 phyhth; + u8 l_tmp; + u8 phyhthTXEMask; + u8 hthmatchflag = 0; + can_queue_elem_s l_frm_tx; + u32 l_id_mask; + u8 i; + //const can_logic_cfg_txrx_s *p_tx_cfg; + BL_DEBUG_ASSERT_PARAM(handle < CAN_USED_CONTROLLER_NUMBER); + + if (CAN_STATUS_IDLE == gs_CanController[handle].status) + { + #if 0 + regs = &gs_CanController[handle].regs->base; + + if ((regs->tflg & 0x01u) != 0u) + { + gs_CanController[handle].status = CAN_STATUS_TRANSMITTING; + txBuf = &gs_CanController[handle].regs->txBuf; + + regs->tbsel = 0x01u; + + txBuf->id = CAN_MAKE_BUF_ID(pdu->canId); + txBuf->dlc = (bl_u8_t)BL_GET_LOW_HALF(pdu->dlc); //注意，CANFD要超过 15 + Bl_MemCpy((bl_Buffer_t *)txBuf->data, + pdu->frame, + (bl_Size_t)CAN_MAX_SIZE_OF_DATA); + regs->tflg = 0x01u; + + ret = BL_ERR_OK; + } + #else + if(((pdu->canId) & MSK_EXT_ID_MSB)) + { + l_frm_tx.type = CAN_MSG_ID_EXT; + l_frm_tx.msg_id = pdu->canId; + l_id_mask = 0x1fffffff; + } + else + { + l_frm_tx.type = CAN_MSG_ID_STD; + l_frm_tx.msg_id = pdu->canId; + l_id_mask = 0x7ff; + } + regs = &gs_CanController[handle].regs->base; + if(regs ==CAN0) + { + l_frm_tx.phy_id =CAN_ID_0; + //p_tx_cfg = &g_can_id_0_cfg_tx_table[0]; + } + #if 0 + else if(regs ==CAN1) + { + //l_tmp = ((CAN2->TSR) >> 26) & 0X07; + l_frm_tx.phy_id =CAN_ID_0; + //p_tx_cfg = &g_can_id_0_cfg_tx_table[0]; + } + #endif + else + { + #ifdef CAN_ID_0_EN + l_frm_tx.phy_id =CAN_ID_0; + #endif + #ifdef CAN_ID_1_EN + l_frm_tx.phy_id =CAN_ID_1; + #endif + return BL_ERR_NOT_OK; + } + + for(i=0;itxBuf; + + //if(0 == ((pdu->canId) & 0x10000000)) //((uint32)(0x10000000)) MSK_EXT_ID_MSB // + #if 0 + //l_frm_tx.len = (bl_u8_t)BL_GET_LOW_HALF(pdu->dlc); //注意，这里修改，不判断低4位 + #else + l_frm_tx.len = pdu->dlc; + if(pdu->dlc>CAN_MAX_SIZE_OF_DATA) + { + l_frm_tx.len = pdu->dlc; + } + #endif + l_frm_tx.fd_enable = pdu->canfd; + //这里要有BRS的处理 + l_frm_tx.enable_brs =pdu->brs; + Bl_MemCpy((bl_Buffer_t *)l_frm_tx.buf, + pdu->frame, + (bl_Size_t)CAN_MAX_SIZE_OF_DATA); + Bl_MemCpy((bl_Buffer_t *)&g_can_driver[l_frm_tx.phy_id].tx,(bl_Buffer_t *)&l_frm_tx,sizeof(can_queue_elem_s)); + can_tx_start(&g_can_driver[l_frm_tx.phy_id].tx); + + ret = BL_ERR_OK; + } + + #endif + } + + return ret; + +} + +/**************************************************************************//** + * + * \details Receive can message. + * + * \param[in/out] pdu - the pointer of can Rx PDU. + * + * \return If the can message is received successfully return BL_ERR_OK. + * otherwise return BL_ERR_NOT_OK. + * + * \retval BL_ERR_OK - can message is received successfully. + * \retval BL_ERR_NOT_OK - no can message can be received. + * + * \since V2.0.0 + * + *****************************************************************************/ +/* +struct _tag_CanRxPdu +{ + bl_ComIfHandle_t handle; //這裡的hander 是指buf 的id ； 即 gs_CanIfPduCfg數據的buf id + bl_BufferSize_t dlc; + bl_u32_t canId; + bl_Buffer_t frame[CANIF_MAX_CAN_FRAME_SIZE]; +}; + */ +bl_Return_t Can_Read(bl_CanRxPdu_t *pdu) +{ + bl_u8_t i; + bl_CanControllerBaseRegs_t *regs; + can_id_e l_can_id; + bl_Return_t ret = BL_ERR_NOT_OK; + ITStatus itstatus = RESET; + //can_rx_q_t l_frm_rx ; + bl_CanRxPdu_t l_pdu_rx; + QUEUE_OPERATE_FLAG_E l_result; + #ifdef CAN_RX_INTERRUPT_EN + //處理隊列中的數據 + l_result = queue_get_head(&can1_rx_queue,(sequential_queue_elem*)&l_pdu_rx); + if(l_result == QUEUE_OK) + { + queue_del_element(&can1_rx_queue,(sequential_queue_elem*)&l_pdu_rx); + //*pdu = l_pdu_rx; + Bl_MemCpy((bl_Buffer_t*)pdu,(const bl_Buffer_t *)&l_pdu_rx, + (bl_Size_t)sizeof(bl_CanRxPdu_t)); + ret = BL_ERR_OK; + //break; + } + else + { + + } + #else + for (i = 0; i < CAN_USED_CONTROLLER_NUMBER; i++) + { + regs = &gs_CanController[i].regs->base; + /* Check CAN_RF0R_FMP0 bit */ + itstatus = CAN_GetFlagStatus(regs, CAN_FLAG_FMP0); + if ( itstatus != RESET) + { + if(regs==CAN1) + { + l_can_id = CAN_ID_1; + } + else + { + l_can_id = CAN_ID_2; + } + can_frame_rx(l_can_id,CAN_FIFO_ID_0,&l_frm_rx); + pdu->handle = i; + pdu->dlc = l_frm_rx.dlc; + pdu->canId = l_frm_rx.identifier.st_ex_id; + Bl_MemCpy(pdu->frame, + (const bl_Buffer_t *)l_frm_rx.data, + (bl_Size_t)CAN_MAX_SIZE_OF_DATA); + regs->RF0R |= CAN_RF0R_RFOM0; + //CAN_ClearFlag(regs,CAN_FLAG_FF0|CAN_FLAG_FOV0); + ret = BL_ERR_OK; + break; + } + } + #endif + return ret; +} + + +void Can_SetTxStatus_finish(bl_ComIfHandle_t handle) +{ + bl_Return_t ret = BL_ERR_NOT_OK; + volatile bl_CanControllerBaseRegs_t *regs; + u8 l_tmp; + BL_DEBUG_ASSERT_PARAM(handle < CAN_USED_CONTROLLER_NUMBER); + gs_CanController[handle].status = CAN_STATUS_TRANSMIT_FINISH; +} +/**************************************************************************//** + * + * \details Check can transmit status. + * + * \param[in] handle - the index of a frame pdu list. + * + * \return If the can message is transmited successfully return + * BL_ERR_OK. otherwise return BL_ERR_NOT_OK. + * + * \retval BL_ERR_OK - the data is transmitted successfully. + * \retval BL_ERR_NOT_OK - can driver is not transmitting data. + * + * \since V2.0.0 + * + *****************************************************************************/ +bl_Return_t Can_CheckTxStatus(bl_ComIfHandle_t handle) +{ + bl_Return_t ret = BL_ERR_NOT_OK; + volatile bl_CanControllerBaseRegs_t *regs; + u8 l_tmp; + BL_DEBUG_ASSERT_PARAM(handle < CAN_USED_CONTROLLER_NUMBER); + + #ifdef CAN_TX_INTERRUPT_EN + if(CAN_STATUS_TRANSMIT_FINISH == gs_CanController[handle].status) + { + gs_CanController[handle].status = CAN_STATUS_IDLE; + ret = BL_ERR_OK; + } + #else + if (CAN_STATUS_TRANSMITTING == gs_CanController[handle].status) + { + regs = &gs_CanController[handle].regs->base; + #if 0 + if ((regs->tflg & 0x01u) > 0u) + { + gs_CanController[handle].status = CAN_STATUS_IDLE; + ret = BL_ERR_OK; + } + #else + //l_tmp = ((regs->TSR) >> 26) & 0X07; + //if(l_tmp==0x07) //表示三个邮箱都空了，才是空闲 + if( (regs->TSR & (CAN_TSR_TXOK0|CAN_TSR_TXOK1|CAN_TSR_TXOK2) ) !=0 ) //任一郵箱成功 + { + gs_CanController[handle].status = CAN_STATUS_IDLE; + ret = BL_ERR_OK; + } + #endif + } + #endif + + return ret; +} + +/**************************************************************************//** + * + * \details Check can busoff. + * + * \return None. + * + * \since V2.0.0 + * + *****************************************************************************/ +void Can_BusOff_Check(void) +{ + ls_nm_task(); + //can1_busoff_op_task(); +} +#if (RTE_FUN_SYSTEM_SLEEP == BL_FUN_ON) +/**************************************************************************//** + * + * \details Set all can controller into sleep mode. + * + * \return None. + * + * \note This interface is not set the WUPE in the CTL0 register. + * + * \since V2.0.0 + * + *****************************************************************************/ +void Can_Sleep(void) +{ + bl_u8_t i; + bl_u16_t delay = CAN_TIMEOUT_DURATION; + volatile bl_CanControllerBaseRegs_t *regs; + + for (i = 0; i < CAN_USED_CONTROLLER_NUMBER; i++) + { + #if 0 + regs = &gs_CanController[i].regs->base; + /* First set hw start,then sleep ,otherwise set sleep is wrong*/ + if ((regs->ctl0 & CAN_CTL0_INITRQ) > 0u) + { + regs->ctl0 &= ((bl_u8_t)~CAN_CTL0_INITRQ); + BL_WAITFOR_TIMEOUT(delay,((regs->ctl1 & CAN_CTL1_INITAK) > 0u)) + } + + regs->rflg |= CAN_RFLG_ALL; + + delay = CAN_TIMEOUT_DURATION; + /*request enter into sleep mode and allows the MSCAN to + restart from sleep mode when traffic on CAN is detected*/ + regs->ctl0 |= CAN_CTL0_SLPRQ; + BL_WAITFOR_TIMEOUT(delay,((regs->ctl1 & CAN_CTL1_SLPAK) > 0u)) + #endif + } + + #if 0 + _asm CLI;/*Enable the interrupt.*/ + #endif + return ; +} + +/**************************************************************************//** + * + * \details The interrupt service function is used to can wakeup interrupt. + * + * \return None. + * + * \since V2.0.0 + * + *****************************************************************************/ +interrupt CAN_USED_CONTROLLER_ISR_ID void Can_Wakeup(void) /*PRQA S 1503,3408*/ +{ + return ; +} +#endif + + +/**************************************************************************//** + * + * \details Initialize the can controller. + * + * \param[in] regs - the pointer of the register list of can controller. + * \param[in] initReg - the configurations of the register of can controller. + * + * \return If the can controller is initialized successfully return BL_ERR_OK, + * otherwise return BL_ERR_NOT_OK. + * + * \since V2.0.0 + * + *****************************************************************************/ +static bl_Return_t _Can_Init(volatile bl_CanControllerBaseRegs_t *regs, + const bl_CanControllerBaseRegs_t *initReg) +{ + bl_Return_t ret = BL_ERR_NOT_OK; + #if 0 + bl_u16_t delay = CAN_TIMEOUT_DURATION; + + regs->ctl0 |= CAN_CTL0_INITRQ; + + BL_WAITFOR_TIMEOUT(delay,((regs->ctl1 & CAN_CTL1_INITAK) > 0u)) + if (delay != 0) + { + delay = CAN_TIMEOUT_DURATION; + + /* initialise hardware registers.*/ + regs->ctl1 = initReg->ctl1; + regs->btr0 = initReg->btr0; + regs->btr1 = initReg->btr1; + regs->idac = initReg->idac; + + Bl_MemCpy((bl_Buffer_t *)&(regs->idar0), + (const bl_Buffer_t *)&(initReg->idar0), + (bl_Size_t)CAN_NUMBER_OF_FILTER_REGS); + + /* quit the init mode */ + regs->ctl0 &= (~(bl_u8_t)(CAN_CTL0_SLPRQ | CAN_CTL0_INITRQ)); + BL_WAITFOR_TIMEOUT(delay,(0u == (regs->ctl1 & CAN_CTL1_INITAK))) + /* wait for can quit init mode */ + if (delay != 0) + { + /*Init the WUPE or TIM*/ + regs->ctl0 |= initReg->ctl0; + regs->rier = initReg->rier; + regs->tier = 0; + /* Clear all flags */ + regs->rflg = CAN_RFLG_ALL; + ret = BL_ERR_OK; + } + } + #else + if(regs == CAN0) + { + #ifdef CAN_ID_0_EN + can0_init(); + #endif + ret = BL_ERR_OK; + } + #if 0 + else if(regs == CAN1) + { + #ifdef CAN_ID_1_EN + //can1_init(); + #endif + ret = BL_ERR_OK; + } + #endif + /* + else if(regs == CAN2) + { + //can2_init(); + ret = BL_ERR_OK; + } + */ + else + { + + } + #endif + + return ret; +} + +/**************************************************************************//** + * + * \details De-initialize the can controller. + * + * \param[in] regs - the pointer of the register list of can controller. + * + * \return None. + * + * \since V2.0.0 + * + *****************************************************************************/ +static void _Can_DeInit(volatile bl_CanControllerBaseRegs_t *regs) +{ + CAN_TypeDef *p_can = (bl_CanControllerBaseRegs_t*)regs; + #if 0 + bl_u16_t delay = CAN_TIMEOUT_DURATION; + + regs->ctl0 |= CAN_CTL0_SLPRQ; + BL_WAITFOR_TIMEOUT(delay,((regs->ctl1 & CAN_CTL1_SLPAK) > 0u)) + + regs->ctl0 &= (~(bl_u8_t)CAN_CTL0_SLPRQ); + + delay = CAN_TIMEOUT_DURATION; + + regs->ctl0 |= CAN_CTL0_INITRQ; + BL_WAITFOR_TIMEOUT(delay,((regs->ctl1 & CAN_CTL1_INITAK) > 0u)) + #else + //CAN_DeInit(p_can); + if(p_can == CAN0) + { + #ifdef CAN_ID_0_EN + can0_de_init(); + #endif + } + #if 0 + else if(p_can == CAN1) + { + #ifdef CAN_ID_1_EN + //FLEXCAN_DRV_Deinit(CAN_ID_1); + #endif + } + else if(p_can == CAN2) + { + #ifdef CAN_ID_2_EN + //FLEXCAN_DRV_Deinit(CAN_ID_2); + #endif + } + #endif + else + { + + } + #endif + return ; +} + +#if (CANIF_FUN_DYNAMIC_CANID == BL_FUN_ON) +/**************************************************************************//** + * + * \details Set the can id. + * + * \return None. + * + * \since V2.0.0 + * + *****************************************************************************/ +static void _Can_SetCanId(void) +{ + bl_u32_t id; + /*add your code to make the can id*/ +#error "add your code to make the can id and delete this message." + /*set the rx id*/ + Canif_SetRxCanId(CANIF_PHY_RX_HANDLE,id); + /*set the tx id*/ + Canif_SetTxCanId(CANIF_TX_HANDLE,id); +} +#endif + + + + + + +/** + * @brief CAN1 接收0 中斷函數； 發現是以幀的形式接收一次； + * @param + * @return 指針地址 + */ +void can_id_phy_rx_irq_task(u8 phy_id,const can_queue_elem_s *p_frame_info) +{ + u8 i; + + #if 0 + can_rx_q_t l_frm_rx; + + l_frm_rx.type = p_frame_info->type; + l_frm_rx.phy_id = p_frame_info->phy_id; + l_frm_rx.mailbox_id = p_frame_info->mailbox_id; + l_frm_rx.msg_id = p_frame_info->msg_id; + l_frm_rx.len = p_frame_info->len; + for(i=0;i<64;i++) + { + l_frm_rx.buf[i] = p_frame_info->buf[i]; + } + Bl_MemCpy((bl_Buffer_t *)&g_can_driver[CAN_ID_0].rx,(bl_Buffer_t *)&l_frm_rx,sizeof(can_rx_q_t)); + #endif + + #if 1 + bl_CanRxPdu_t l_pdu_rx; + + bl_ComIfHandle_t handle; //這裡的hander 是指buf 的id ； 即 gs_CanIfPduCfg 數據的buf id + bl_BufferSize_t dlc; + bl_u32_t canId; + bl_Buffer_t frame[CANIF_MAX_CAN_FRAME_SIZE]; + if(phy_id == CAN_ID_0) + { + #ifdef CAN_ID_0_EN + l_pdu_rx.handle = HANDLE_CAN0_RX0; // HANDLE_CAN0_RX0 + #endif + } + else if(phy_id == CAN_ID_1) + { + #ifdef CAN_ID_1_EN + l_pdu_rx.handle = HANDLE_CAN1_RX0; // HANDLE_CAN0_RX0 + #endif + } + else if(phy_id == CAN_ID_2) + { + #ifdef CAN_ID_2_EN + l_pdu_rx.handle = HANDLE_CAN2_RX0; // HANDLE_CAN0_RX0 + #endif + } + else + { + l_pdu_rx.handle = 0xffu; // + } + l_pdu_rx.dlc = p_frame_info->len; + l_pdu_rx.canId =p_frame_info->msg_id; + for(i=0;ibuf[i]; + } + #else + + #endif + + #ifdef CAN_RX_INTERRUPT_EN + queue_add_element(&can1_rx_queue,(sequential_queue_elem*)&l_pdu_rx); + #endif + g_bl_can_test[0].buf[1]++; + +} + +/** + * @brief 喚醒中斷 + * @param + * @return + */ +void can_id_phy_wakeup_irq_task(u8 phy_id) +{ + #if 0 + u8 phyController= CAN_ID_0; + u8 l_logic_id; + + l_logic_id = can_drive_get_logic_id(phyController); //EmptyFlagForHth 類似這樣的變量 都是以bufid為順序，而並非物理通道 + + #ifdef CAN_TEST_USE_DRIVE + #ifdef CAN_LOGIC_DEBUG + g_can_driver[CAN_ID_0].buf[5]++; + #endif + g_can_driver[CAN_ID_0].wakeup.count=0; + if(g_can_driver[CAN_ID_0].wakeup.state != 1) + { + g_can_driver[CAN_ID_0].wakeup.state=1; + g_can_driver[CAN_ID_0].state = CAN_DRIVE_STATE_INIT; + (void)Can_SetControllerMode(l_logic_id, CAN_T_WAKEUP); + } + #endif +#ifdef TEST_QUEUE_FOR_TEST_EN + test_queue_for_test_add(5); +#endif + CanIf_ControllerWakeUp(l_logic_id) ; + #endif +} + +#if 0 +/** + * @brief busoff >=255 + * 原來的代碼沒有查完寄存器； + * @param + * @return + */ +void can_logic0_phy_busoff_irq_task(void) +{ + #if 1 + u8 phyController= CAN_ID_0; + //u8 l_logic_id; + + //l_logic_id = can_drive_get_logic_id(phyController); //EmptyFlagForHth 類似這樣的變量 都是以bufid為順序，而並非物理通道 + //#ifdef CAN_TEST_USE_DRIVE + #ifdef CAN_LOGIC_DEBUG + g_can_driver[CAN_ID_0].buf[4]++; + #endif + g_can_driver[CAN_ID_0].busoff.count=0; + if(g_can_driver[CAN_ID_0].busoff.state != 1) + { + g_can_driver[CAN_ID_0].busoff.state=1; + g_can_driver[CAN_ID_0].state = CAN_DRIVE_STATE_BUSOFF; + //(void)Can_SetControllerMode(l_logic_id, CAN_T_STOP); + } + //#endif + #ifdef TEST_QUEUE_FOR_TEST_EN + test_queue_for_test_add(1); + #endif + + //CanIf_ControllerBusOff(l_logic_id); /*是和CanNm_PhysErrorInd 調用相同效果*/ + #endif +} +#endif + + +/** +* @brief 用於測試 在drive層的busoff恢復 +* @param input: +* @param output: +* @return none: +* @calls +* @calls by +* @others +*/ +void can1_busoff_op_task(void) +{ + #if 0 + //#ifdef CAN_TEST_USE_DRIVE + + //can_init_s l_can; + u8 l_flag; + u8 l_flag_wakeup; + u16 l_count; + u8 l_logic_id; + CAN_DRIVE_SR_ALLOC(); + CAN_DRIVE_CRITICAL_ENTER(); + //l_logic_id = can_drive_get_logic_id(CAN_ID_1); //EmptyFlagForHth 類似這樣的變量 都是以bufid為順序，而並非物理通道 + l_flag = g_can_driver[CAN_ID_0].busoff.state; + l_flag_wakeup = g_can_driver[CAN_ID_0].wakeup.state; + CAN_DRIVE_CRITICAL_EXIT(); + /**/ + if(l_flag == 1) + { + CAN_DRIVE_CRITICAL_ENTER(); + #ifdef CAN_LOGIC_DEBUG + g_can_busoff_test[CAN_ID_0][7]++; + #endif + g_can_driver[CAN_ID_0].busoff.count++; + l_count = g_can_driver[CAN_ID_0].busoff.count; + CAN_DRIVE_CRITICAL_EXIT(); + if(l_count >= 5) + { + CAN_DRIVE_CRITICAL_ENTER(); + g_can_driver[CAN_ID_0].busoff.count = 0; + CAN_DRIVE_CRITICAL_EXIT(); + #ifdef CAN_LOGIC_DEBUG + g_can_busoff_test[CAN_ID_0][8]++; + #endif + //can_phy_tx[CAN_ID_1].busoff_flag = 0; + + #if 0 + l_can.id = CAN_ID_1; + /* CAN1 and CAN2 cell init */ + l_can.config.ttcm = DISABLE; /* time triggered communication mode 時間觸發模式*/ + l_can.config.abom = DISABLE; /* Set the automatic bus-off management 不啟用自動離線模式 */ + l_can.config.awum = DISABLE; /* Set the automatic wake-up mode 由軟件方式喚醒*/ + l_can.config.nart = DISABLE; /* Set the no automatic retransmission 自動重傳開啟*/ + l_can.config.rflm = DISABLE; /* Set the receive FIFO locked mode 鎖定FIFO 即溢出時；下一個收到的報文被丟棄 */ + l_can.config.txfp = ENABLE; /*1.優先級由發送請求的順序來決定*/ /* 0.優先級由報文的標識符來決定 */ + l_can.config.mode = CAN_Mode_Normal; /* 本外設正常工作；soft master reset CAN軟件復位 值1表示強行復位；*/ + l_can.config.sjw = CAN_SJW_1tq; /*重新同步跳躍寬度*/ + l_can.config.bs1 = CAN_BS1_3tq; /*時間段1*/ + l_can.config.bs2 = CAN_BS2_2tq; /*時間段2*/ + l_can.config.prescaler = 12u; /*波特率分頻器*/ + can_init(l_can); + + #else + //can_re_fresh(CAN1); + //(void)Can_InitController(0,0); + FLEXCAN_DRV_Deinit(CAN_ID_0); + can0_init(); + Can_SetTxStatus_finish(CAN_ID_0); + #endif + + #if 0 + if(CANIF_CS_SLEEP == CanIf_ControllerMode[CANIF_CONTROLLER_ID]) + { + ret = (Std_ReturnType)Can_SetControllerMode(CANIF_CONTROLLER_ID, + CAN_T_WAKEUP); + } + if(E_OK == ret) + { + ret = (Std_ReturnType)Can_SetControllerMode(CANIF_CONTROLLER_ID, + CAN_T_START); + } + #else + //Can_SetControllerMode(CAN_CONTROLLER_0_ID, CAN_T_START); + #endif + CAN_DRIVE_CRITICAL_ENTER(); + g_can_driver[CAN_ID_0].busoff.state = 2; + CAN_DRIVE_CRITICAL_EXIT(); + } + + } + else if(l_flag ==2 ) + { + CAN_DRIVE_CRITICAL_ENTER(); + g_can_driver[CAN_ID_0].busoff.count++; + if(g_can_driver[CAN_ID_0].busoff.count >= 10) + { + g_can_driver[CAN_ID_0].busoff.count=0u; + g_can_driver[CAN_ID_0].busoff.state = 0u; + g_can_driver[CAN_ID_0].state = CAN_DRIVE_STATE_NORMAL; + } + CAN_DRIVE_CRITICAL_EXIT(); + } + + if(l_flag_wakeup == 1) + { + CAN_DRIVE_CRITICAL_ENTER(); + g_can_driver[CAN_ID_0].wakeup.count++; + if(g_can_driver[CAN_ID_0].wakeup.count >= 10) + { + g_can_driver[CAN_ID_0].wakeup.state = 0u; + g_can_driver[CAN_ID_0].wakeup.count=0u; + //(void)Can_InitController(0,0); + //Can_SetControllerMode(CAN_CONTROLLER_0_ID, CAN_T_START); + g_can_driver[CAN_ID_0].state = CAN_DRIVE_STATE_NORMAL; + + } + CAN_DRIVE_CRITICAL_EXIT(); + } + + //#endif + #endif +} + + + + + +u8 can_drive_get_logic_id(u8 phy_id) +{ + u8 i; + u8 l_result=CAN_ID_NULL; + for(i=0;i=CAN_LOGIC_ID_MAX) + { + + } + else + { + l_result =gs_CanControllerCfg[logic_id].phyId; + } + + return l_result; + +} + + + +bl_Return_t Can_Controller_enable( u8 Controller, u8 state ) +{ + + bl_Return_t ret = BL_ERR_NOT_OK; + u8 phyController =gs_CanControllerCfg[Controller].phyId; + CAN_TypeDef *p_can_base; + + if(CAN_ID_0 == phyController) + { + p_can_base=CAN0; + } +#ifdef S32K14x_SERIES //目前先針對144 + else if(CAN_ID_1 == phyController) + { + p_can_base=CAN1; + } +#endif + else + { + p_can_base=CAN0; + } + + if(state == TRUE) + { + //FLEXCAN_Enable(p_can_base); + //CAN_SetIntEnable(p_can_base,ENABLE); + } + else + { + //FLEXCAN_Disable(p_can_base); + //CAN_SetIntEnable(p_can_base,DISABLE); + } + ret = BL_ERR_OK; + return ret; +} + + +/* + bl_ComIfHandle_t handle; + bl_BufferSize_t dlc; + bl_u32_t canId; + const bl_Buffer_t *frame; + */ + + +#ifdef CAN_AUTOSAR_EN + +#else +////////////////測試 +bl_CanTxPdu_t g_bl_can_tx; +u16 g_bl_can_tx_count; +u8 g_bl_can_tx_data[8]; + + +void bl_can_tx_task(void) +{ + u8 i; + bl_CanTxPdu_t l_bl_can_tx; + g_bl_can_tx.handle =0; + + Can_CheckTxStatus(g_bl_can_tx.handle); + + g_bl_can_tx_count++; + for(i=0;i<8;i++) + { + g_bl_can_tx_data[i] = i+g_bl_can_tx_count; + } + g_bl_can_tx.dlc =8; + g_bl_can_tx.canId =0x112;//g_can_id_0_cfg_tx_table[0].can_id; + g_bl_can_tx.frame =&g_bl_can_tx_data[0]; + Can_Write((const bl_CanTxPdu_t *)&g_bl_can_tx); +} + + +/* +struct _tag_CanRxPdu +{ + bl_ComIfHandle_t handle; //這裡的hander 是指buf 的id ； 即 gs_CanIfPduCfg數據的buf id + bl_BufferSize_t dlc; + bl_u32_t canId; + bl_Buffer_t frame[CANIF_MAX_CAN_FRAME_SIZE]; +}; + + */ + +bl_CanRxPdu_t g_bl_can_rx; +u16 g_bl_can_rx_count; +u8 g_bl_can_rx_data[8]; +bl_Return_t g_bl_can_rx_result; + +void bl_can_rx_task(void) +{ + u8 i; + //g_bl_can_rx.frame =&g_bl_can_rx_data[0]; + g_bl_can_rx_result = Can_Read(&g_bl_can_rx); + if(BL_ERR_OK == g_bl_can_rx_result) + { + g_bl_can_rx_count++; + } +} + +#endif diff --git a/code_boot_out/asil/middle/autosar_bl/sources/driver/bl_can_transceiver.c b/code_boot_out/asil/middle/autosar_bl/sources/driver/bl_can_transceiver.c new file mode 100644 index 0000000..3d66686 --- /dev/null +++ b/code_boot_out/asil/middle/autosar_bl/sources/driver/bl_can_transceiver.c @@ -0,0 +1,115 @@ +/**************************************************************************//** + * + * \copyright This software is the property of Technologies. Any + * information contained in this doc should not be reproduced, + * or used, or disclosed without the written authorization from + * Technologies. + * + * \brief This is the source file of the can transceiver. + * + * \file bl_can_transceiver.c + * \ingroup driver_module + * \author + * + * \version 1.0.0 + * \date 14/05/2014 + * + * \par Changelist + * Version | Date | Authors | CR# | Descriptions + * -------- | ---------- | ---------------- | --- | ------------- + * 01.00.00 | 14/05/2014 | ning.chen | N/A | BootDrv010001 + *****************************************************************************/ +#include "bl_can_transceiver.h" +#include "bl_can_if_funcfg.h" +#include "gpio.h" +//#include + +/***************************************************************************** + * QAC Suppression + *****************************************************************************/ +/*PRQA S 277,303,602,781,1532,2100,2103,3112,3227,3453,4130 EOF*/ +/* + * 277:An integer constant expression with negative value is being converted + * to an unsigned type. + * + * MISRA-C:2004 11.3(303):Cast a pointer to an integral type. + * To address a register must cast an integral type to a pointer. + * + * MISRA-C:2004 20.2(602):The identifier is reserved for use by the library. + * The Bootloader do not use any library funtion and use the underscores to + * indicate that the function is a interal function. + * + * MISRA-C:2004 5.6(781):The identifier is used as a structure/union member. + * The member of the structure is used through the structure object. + * + * 1532:The function is only referenced in one translation unit. + * all functions in this file are configurations in the Security Module. + * + * 2100:Integral promotion : unsigned char promoted to signed int. + * + * 2103:Integral promotion, unsigned short promoted to unsigned int. + * This message will therefore only be generated when a short and an int are of + * equal size. + * + * MISRA-C:2004 14.2(3112):This statement has no side-effect. + * The DEBUG_ASSERT macro is used to debug bootloader when the BL_DEBUG is + * enable. When the BL_DEBUG is disable, the DEBUG_ASSERT macro is null. + * + * 3227:The parameter is never modified and so it could be declared with const. + * + * MISRA-C:2004 19.7(3453):A function could probably be used instead of this + * function-like macro. + * + * MISRA-C:2004 12.7(4130):Bitwise operations on signed data will give + * implementation defined results. + * + */ + +/***************************************************************************** + * Verify The Configurations of Macro + *****************************************************************************/ + +/***************************************************************************** + * Internal Macro Definitions + *****************************************************************************/ + + +/***************************************************************************** + * Internal Structure Definitions + *****************************************************************************/ + +/***************************************************************************** + * Internal Function Declarations + *****************************************************************************/ + +/***************************************************************************** + * Internal Variable Definitions + *****************************************************************************/ + +/***************************************************************************** + * Global Variable Definitions + *****************************************************************************/ + +/***************************************************************************** + * Function Definitions + *****************************************************************************/ +#if (CANIF_FUN_INIT_TRANSCEIVER == BL_FUN_ON) +/**************************************************************************//** + * + * \details Initialize can transceiver. + * + * \since V1.0.0 + * + *****************************************************************************/ +void CanTrcv_Init(void) +{ + CAN0_STB_ON(); +} + +void CanTrcv_Disable(void) +{ + CAN0_STB_OFF(); +} + +#endif + diff --git a/code_boot_out/asil/middle/autosar_bl/sources/driver/bl_flash_read.c b/code_boot_out/asil/middle/autosar_bl/sources/driver/bl_flash_read.c new file mode 100644 index 0000000..511690e --- /dev/null +++ b/code_boot_out/asil/middle/autosar_bl/sources/driver/bl_flash_read.c @@ -0,0 +1,167 @@ +/**************************************************************************//** + * + * \copyright This software is the property of Technologies. Any + * information contained in this doc should not be reproduced, + * or used, or disclosed without the written authorization from + * Technologies. + * + * \brief This is the source file of the flash module. + * + * \file bl_flash_read.c + * \ingroup driver_module + * \author + * + * \version 1.1.0 + * \date 14/05/2014 + * + * \par Changelist + * Version | Date | Authors | CR# | Descriptions + * -------- | ---------- | ---------------- | --- | ------------- + * 01.00.00 | 14/05/2014 | ning.chen | N/A | BootDrv010001 + * 01.01.00 | 21/08/2014 | ning.chen | N/A | BootDrv010002 + * + *****************************************************************************/ +#include "bl_flash_if.h" +#include "bl_flash_if_cfg.h" +#include "nvm.h" + +/***************************************************************************** + * QAC Suppression + *****************************************************************************/ +/*PRQA S 306,506,781,1015,1532,3112,3227,3408 EOF*/ +/* + * MISRA-C:2004 11.3(306):Cast a pointer to an integral type. + * To address a flash must cast an integral type to a pointer. + * + * 506:Dereferencing pointer value that is possibly NULL. + * The parameter delay is not a null pointer. + * + * MISRA-C:2004 5.6(781):The identifier is used as a structure/union member. + * The member of the structure is used through the structure object. + * + * 1015:Far is not a legal keyword in ISO C + * This is a valid keyword in the CodeWarrior. + * + * 1532:The function is only referenced in one translation unit. + * all functions in this file are configurations in the Security Module. + * + * MISRA-C:2004 14.2(3112):This statement has no side-effect. + * The DEBUG_ASSERT macro is used to debug bootloader when the BL_DEBUG is + * enable. When the BL_DEBUG is disable, the DEBUG_ASSERT macro is null. + * + * 3227:The parameter is never modified and so it could be declared with const. + * + * MISRA-C:2004 8.8(3408):The identifier has external linkage but is being + * defined without any previous declaration. + * The Flash_Read has a previous declaraton in the bl_flash.h file. + * + */ + +#if 0 +#define FLASH_PPAGE (*(volatile bl_u8_t *)(0x15u)) + +#define FLASH_PAGE_START_ADDRESS (0x8000u) + +#define FLASH_PAGE_BIT_OFFSET (14) +#endif +#define FLASH_PAGE_SIZE FLASHIF_BLOCK0_PAGE_SIZE +#define FLASH_GET_LOW_ADDRESS(address) ((address) & 0x0FFFu) // stm32f103ze f107vc t 0x800 + +/***************************************************************************** + * Function Definitions + *****************************************************************************/ +/**************************************************************************//** + * + * \details Read the data from the internal Flash device. + * + * \return None. + * + * \since V1.0.0 + * + *****************************************************************************/ +void Flash_Read(bl_FlashDrvParam_t *par) +{ + #if 1 + //bool_m_t l_resut; + status_t l_resut = STATUS_SUCCESS; /* Return code variable */ + BL_DEBUG_ASSERT_NO_RET(par != BL_NULL_PTR); + + l_resut = flash_drv_pflash_read(par->address,par->size,par->buffer); + + if(l_resut == STATUS_SUCCESS) + { + par->errCode = BL_ERR_OK; + } + + #else + + bl_Size_t i; + bl_Size_t size; + bl_Buffer_t *buffer; + bl_Address_t address; + bl_Buffer_t *src; + bl_u8_t ppage; + bl_u16_t readSize; + bl_u16_t remainSize; + + BL_DEBUG_ASSERT_NO_RET(par != BL_NULL_PTR); + + size = par->size; + buffer = par->buffer; + address = par->address; + remainSize = (bl_u16_t)(FLASH_PAGE_SIZE - FLASH_GET_LOW_ADDRESS(address)); + src = (bl_Buffer_t *)(FLASH_PAGE_START_ADDRESS + + FLASH_GET_LOW_ADDRESS(address)); + + if (remainSize > size) + { + readSize = (bl_u16_t)size; + } + else + { + readSize = remainSize; + } + + ppage = FLASH_PPAGE; + FLASH_PPAGE = (bl_u8_t)(address >> FLASH_PAGE_BIT_OFFSET); + + for (i = 0; i < readSize; i++) + { + buffer[i] = src[i]; /*lint !e511*/ + } + + size -= readSize; + buffer = &buffer[readSize]; + + while(size > 0) + { + FLASH_PPAGE = FLASH_PPAGE + 1; + src = (bl_Buffer_t *)FLASH_PAGE_START_ADDRESS; + + if (size > FLASH_PAGE_SIZE) + { + readSize = FLASH_PAGE_SIZE; + } + else + { + readSize = (bl_u16_t)size; + } + + for (i = 0; i < readSize; i++) + { + buffer[i] = src[i]; /*lint !e511*/ + } + + size -= readSize; + buffer = &buffer[readSize]; + } + + FLASH_PPAGE = ppage; + + par->errCode = BL_ERR_OK; + + #endif + + return ; +} + diff --git a/code_boot_out/asil/middle/autosar_bl/sources/driver/bl_system.c b/code_boot_out/asil/middle/autosar_bl/sources/driver/bl_system.c new file mode 100644 index 0000000..a59bd67 --- /dev/null +++ b/code_boot_out/asil/middle/autosar_bl/sources/driver/bl_system.c @@ -0,0 +1,197 @@ +/**************************************************************************//** + * + * \copyright This software is the property of Technologies. Any + * information contained in this doc should not be reproduced, + * or used, or disclosed without the written authorization from + * Technologies. + * + * \brief This is the source file of the system clock module. + * + * \file bl_system.c + * \ingroup driver_module + * \author + * + * \version 1.1.0 + * \date 14/05/2014 + * + * \par Changelist + * Version | Date | Authors | CR# | Descriptions + * -------- | ---------- | ---------------- | --- | ------------- + * 01.00.00 | 14/05/2014 | ning.chen | N/A | BootDrv010001 + * 01.01.00 | 21/08/2014 | ning.chen | N/A | BootDrv010002 + * + *****************************************************************************/ +#include "bl_system.h" + + +#include "clk.h" +#include "boot_app.h" +#include "logic_timer.h" +#include "Cpu.h" +#include "nvic.h" +//#include "lin_driver.h" + +#include "clk.h" +#include "gpio.h" + +#include "can.h" +#include "tim.h" + +#include "boot_app.h" +#include "nvic.h" + +#include "nvm.h" +#include "wdog.h" +//#include "lin_app.h" +//#include "device_registers.h" +#include "bl_timer.h" + + +/***************************************************************************** + * QAC Suppression + *****************************************************************************/ +/*PRQA S 277,303,305,1251,1257,1503,1532,2100,3112,3442,3453,4130 EOF*/ +/* + * 277:An integer constant expression with negative value is being converted + * to an unsigned type. + * + * MISRA-C:2004 11.3(303):Cast a pointer to an integral type. + * To address a register must cast an integral type to a pointer. + * + * MISRA-C:2004 11.3(305):Cast a pointer to an integral type. + * + * 1251:Suffixed integer constant causes implicit conversion of other + * (integral) operand. + * + * 1257:Suffixed integer constant implicitly converted to smaller integer type + * on assignment. + * + * MISRA-C:2004 14.1(1503):The function is defined but is not used within this + * project. + * these functions will be used When correlative macro is enable. + * + * 1532:The function is only referenced in one translation unit. + * all functions in this file are configurations in the Security Module. + * + * 2100:Integral promotion : unsigned char promoted to signed int. + * + * MISRA-C:2004 14.2(3112):This statement has no side-effect. + * The DEBUG_ASSERT macro is used to debug bootloader when the BL_DEBUG is + * enable. When the BL_DEBUG is disable, the DEBUG_ASSERT macro is null. + * + * 3442:Operator other than & or = applied to a volatile object. + * + * MISRA-C:2004 19.7(3453):A function could probably be used instead of this + * function-like macro. + * + * MISRA-C:2004 12.7(4130):Bitwise operations on signed data will give + * implementation defined results. + * + */ + +/***************************************************************************** + * Internal Macro Definitions + *****************************************************************************/ + + + +/***************************************************************************** + * Internal Type Definitions + *****************************************************************************/ +/** a function pointer is used to go to application*/ +typedef void (* theApp)(void); + +/***************************************************************************** + * Function Definitions + *****************************************************************************/ +/**************************************************************************//** + * + * \details Initialize system clock. + * + * \return None. + * + * \since V1.0.0 + * + *****************************************************************************/ +void Sys_InitClock(void) +{ + __disable_irq(); + + clk_init(); + gpio_init(); + + nvm_init(); + //spm_init(); + //wdog_init(); +} + +/**************************************************************************//** + * + * \details Deinitialize system clock. + * + * \return None. + * + * \since V1.0.0 + * + *****************************************************************************/ +void Sys_DeinitClock(void) +{ + SystemDeInit(); +} + +/**************************************************************************//** + * + * \details Set system clock to sleep mode. + * + * \return None. + * + * \since V1.0.0 + * + *****************************************************************************/ +void Sys_Sleep(void) +{ + /*PRQA S 899*/ + //_asm STOP; /*into STOP mode*/ + //_asm NOP; + // _asm NOP; +} + +/**************************************************************************//** + * + * \details Remap the interrupt vector table. + * + * \since V1.0.0 + * + *****************************************************************************/ +void Sys_RemapInterrupt(void) +{ + //nvic_set_vector_table(FLASH_APP_BASE,BOOT_APP_VECTOR_OFFSET); +} + +/**************************************************************************//** + * + * \details Set up the application entry point, and go to the application. + * + * \since V1.0.0 + * + *****************************************************************************/ +void Sys_GotoApplication(void) +{ + /*when a new application is downloaded by the bootloader, the enter address + of this application maybe is different from the old one.*/ + /*PRQA S 3204 1*/ + boot_app_jump_to_app(); +} + +/**************************************************************************//** + * + * \details . + * + * \since V1.0.0 + * + *****************************************************************************/ +void Sys_ProtectBootloader(void) +{ + +} + diff --git a/code_boot_out/asil/middle/autosar_bl/sources/driver/bl_timer.c b/code_boot_out/asil/middle/autosar_bl/sources/driver/bl_timer.c new file mode 100644 index 0000000..3611888 --- /dev/null +++ b/code_boot_out/asil/middle/autosar_bl/sources/driver/bl_timer.c @@ -0,0 +1,161 @@ +/**************************************************************************//** + * + * \copyright This software is the property of Technologies. Any + * information contained in this doc should not be reproduced, + * or used, or disclosed without the written authorization from + * Technologies. + * + * \brief This is the source file of the timer module. + * + * \file bl_timer.c + * \ingroup driver_module + * \author + * + * \version 1.0.0 + * \date 14/05/2014 + * + * \par Changelist + * Version | Date | Authors | CR# | Descriptions + * -------- | ---------- | ---------------- | --- | ------------- + * 01.00.00 | 14/05/2014 | ning.chen | N/A | BootDrv010001 + *****************************************************************************/ +#include "bl_system.h" +#include "bl_timer.h" + +#include "Cpu.h" +#include "tim.h" +#include "common_types.h" +//#include "ac780x_timer.h" + + + +#if 1 +#define TIM_APP_ALLOC() //CPU_SR_ALLOC() +#define TIM_APP_ENTER_CRITICAL() INT_SYS_DisableIRQGlobal() +#define TIM_APP_EXIT_CRITICAL() INT_SYS_EnableIRQGlobal() +#else +#define TIM_APP_ALLOC() //CPU_SR_ALLOC() +#define TIM_APP_ENTER_CRITICAL() INT_SYS_DisableIRQGlobal() +#define TIM_APP_EXIT_CRITICAL() INT_SYS_EnableIRQGlobal() +#endif + +/***************************************************************************** + * QAC Suppression + *****************************************************************************/ +/*PRQA S 303,1251,1257,1532,2100,3442,3453 EOF*/ +/* + * MISRA-C:2004 11.3(303):Cast a pointer to an integral type. + * To address a register must cast an integral type to a pointer. + * + * 1251:Suffixed integer constant causes implicit conversion of other + * (integral) operand. + * + * 1257:Suffixed integer constant implicitly converted to smaller integer type + * on assignment. + * + * 1532:The function is only referenced in one translation unit. + * all functions in this file are configurations in the Security Module. + * + * 2100:Integral promotion : unsigned char promoted to signed int. + * + * 3442:Operator other than & or = applied to a volatile object. + * + * MISRA-C:2004 19.7(3453):A function could probably be used instead of this + * function-like macro. + * + */ + +/***************************************************************************** + * Internal Macro Definitions + *****************************************************************************/ + +static u8 g_time_tick = 0; + +/***************************************************************************** + * Function Definitions + *****************************************************************************/ +/**************************************************************************//** + * + * \details Initialize timer module. + * + * \return If the timer is initialized successfully returns BL_ERR_OK, + * otherwise returns BL_ERR_NOT_OK. + * + * \retval BL_ERR_OK - the timer is initialized successfully. + * \retval BL_ERR_NOT_OK - the timer is not initialized successfully. + * + * \since V2.0.0 + * + *****************************************************************************/ +void Tim_Init(void) +{ + g_time_tick = 0; + //systick_init(); // + //app_tim_init(); / + tim_init(); +} + + +void Tim_tick_count(void) +{ + g_time_tick++; +} + +/**************************************************************************//** + * + * \details Check whether the timer is time out. + * + * \return If the timer is time out returns BL_ERR_OK, + * otherwise returns BL_ERR_NOT_OK. + * + * \retval BL_ERR_OK - the timer is time out. + * \retval BL_ERR_NOT_OK - the timer is not time out. + * + * \since V2.0.0 + * + *****************************************************************************/ +bl_Return_t Tim_IsTimeout(void) +{ + //bl_Return_t ret = BL_ERR_OK; + #if 1 + bl_Return_t ret = BL_ERR_NOT_OK; + + if(g_time_tick >=1) + { + //DISABLE_INTERRUPTS(); + /* write 1 to clear flag */ + g_time_tick=0; + //ENABLE_INTERRUPTS(); + ret = BL_ERR_OK; + } + #endif + return ret; +} + +/**************************************************************************//** + * + * \details Deinitialize timer module. + * + * \return If the timer is deinitialized successfully returns BL_ERR_OK, + * otherwise returns BL_ERR_NOT_OK. + * + * \retval BL_ERR_OK - the timer is deinitialized successfully. + * \retval BL_ERR_NOT_OK - the timer is not deinitialized successfully. + * + * \since V2.0.0 + * + *****************************************************************************/ +#define S32_SysTick_CSR_CLKSOURCE_MASK 0x4u +#define S32_SysTick_CSR_ENABLE_MASK 0x1u +#define S32_SysTick_CSR_TICKINT_MASK 0x2u + +void Tim_Deinit(void) +{ + //NVIC_DisableIRQ(TIMER_CHANNEL0_IRQn); + //NVIC_DisableIRQ(TIMER_CHANNEL1_IRQn); + //NVIC_DisableIRQ(TIMER_CHANNEL2_IRQn); + //NVIC_DisableIRQ(TIMER_CHANNEL3_IRQn); + (*((u32 *)(SysTick_BASE))) &= ~(S32_SysTick_CSR_CLKSOURCE_MASK|S32_SysTick_CSR_ENABLE_MASK|S32_SysTick_CSR_TICKINT_MASK) ; + tim_de_init(); + return ; +} diff --git a/code_boot_out/asil/middle/autosar_bl/sources/driver/bl_watchdog.c b/code_boot_out/asil/middle/autosar_bl/sources/driver/bl_watchdog.c new file mode 100644 index 0000000..261a580 --- /dev/null +++ b/code_boot_out/asil/middle/autosar_bl/sources/driver/bl_watchdog.c @@ -0,0 +1,211 @@ +/**************************************************************************//** + * + * \copyright This software is the property of Technologies. Any + * information contained in this doc should not be reproduced, + * or used, or disclosed without the written authorization from + * Technologies. + * + * \brief This is the source file of the watchdog module . + * + * \file bl_watchdog.c + * \ingroup driver_module + * \author + * + * \version 1.0.0 + * \date 14/05/2014 + * + * \par Changelist + * Version | Date | Authors | CR# | Descriptions + * -------- | ---------- | ---------------- | --- | ------------- + * 01.00.00 | 14/05/2014 | ning.chen | N/A | BootDrv010001 + *****************************************************************************/ +#include "bl_common.h" +#include "bl_rte_funcfg.h" +#include "bl_system.h" +#include "bl_watchdog.h" +#include "bl_rte_cfg.h" +#include "boot_app_cfg.h" +#include "nvic.h" +#include "wdog.h" + +/***************************************************************************** + * QAC Suppression + *****************************************************************************/ +/*PRQA S 303,306,310,342,1257,1258,1503,1532,3412,3453 EOF*/ +/* + * MISRA-C:2004 11.3(303):Cast a pointer to an integral type. + * To address a register must cast an integral type to a pointer. + * + * MISRA-C:2004 11.3(306):Cast a pointer to an integral type. + * To address a flash must cast an integral type to a pointer. + * + * MISRA-C:2004 11.4(310):Casting to different object pointer type. + * + * 342:K&R compilers do not support the ISO glue operator '##'. + * + * 1257:Suffixed integer constant implicitly converted to smaller integer type + * on assignment. + * + * 1258:Suffixed integer constant explicitly cast to another type. + * + * MISRA-C:2004 14.1(1503):The function is defined but is not used within this + * project. + * these functions will be used When correlative macro is enable. + * + * 1532:The function is only referenced in one translation unit. + * all functions in this file are configurations in the Security Module. + * + * MISRA-C:2004 19.4(3412):Macro defines an unrecognized code-fragment. + * + * MISRA-C:2004 19.7(3453):A function could probably be used instead of this + * function-like macro. + * + */ + + +/***************************************************************************** + * Internal Macro Definitions + *****************************************************************************/ +#define WDG_CPMUCOP (*(volatile bl_u8_t *)(0x3Cu)) +/* 0x40 disable RTI&COP when debug, + 0x00 enable RTI&COP when debug*/ +#define WDG_CPMUCOP_RSBCK_CFG (0x40u) + +#define WDG_CPMUARMCOP (*(volatile bl_u8_t *)(0x3Fu)) + + +#if (SYS_OSC_CLOCK_FREQ == 1000) /* internal clcok */ +/*262ms*/ +#define WDG_COPCTL_CR_VALUE (0x03u) +#elif ((SYS_OSC_CLOCK_FREQ == 4000) || (SYS_OSC_CLOCK_FREQ == 8000)) +/*262ms and 131ms*/ +#define WDG_COPCTL_CR_VALUE (0x04u) +#elif ((SYS_OSC_CLOCK_FREQ == 12000) || (SYS_OSC_CLOCK_FREQ == 16000)) +/*349ms and 262ms*/ +#define WDG_COPCTL_CR_VALUE (0x05u) +#else +#error "the configurations of watchdog is error." +#endif + +#define WDG_ARMCOP_FIRST_VALUE (0x55u) +#define WDG_ARMCOP_SECOND_VALUE (0xAAu) +#define WDG_ARMCOP_WRONG_VALUE (0x11u) + +#if 0 +/*extern the identifiers is generated by the linker.*/ +#define __SEG_START_REF(a) __SEG_START_##a /**/ +#define __SEG_END_REF(a) __SEG_END_##a +#define __SEG_SIZE_REF(a) __SEG_SIZE_##a +#define __SEG_START_DEF(a) extern bl_u8_t __SEG_START_REF(a) [] +#define __SEG_END_DEF(a) extern bl_u8_t __SEG_END_REF(a) [] +#define __SEG_SIZE_DEF(a) extern bl_u8_t __SEG_SIZE_REF(a) [] + +__SEG_START_DEF(WDG_FEED);/*PRQA S 3447,3684*/ +#endif + +/***************************************************************************** + * Function Definitions + *****************************************************************************/ +/**************************************************************************//** + * + * \details Initialize watchdog module. + * + * \return None. + * + * \since V2.0.0 + * + *****************************************************************************/ +void Wdg_Init(void) +{ + //WDG_CPMUCOP = (WDG_COPCTL_CR_VALUE | WDG_CPMUCOP_RSBCK_CFG); +#if (RTE_FUN_COPY_WDG_TO_RAM == BL_FUN_ON) //條件成立， + //必須把 3DF0 載入 就是把 Wdg_Feed 載到 3DF0 + #if 0 + Bl_MemCpy((bl_Buffer_t *)RTE_WATCHDOG_FEED_INTERFACE_ADDR, + (const bl_Buffer_t *)RTE_WATCHDOG_OPS_FEED, + (bl_u32_t)RTE_WATCHDOG_FEED_INTERFACE_SIZE); + #else + + #endif + +#else + wdog_init(); +#endif +} + +/**************************************************************************//** + * + * \details Feed watchdog. + * + * \return None. + * + * \since V2.0.0 + * + *****************************************************************************/ +static u16 g_test_freewog = 0; +#if (RTE_FUN_COPY_WDG_TO_RAM == BL_FUN_ON) //條件成立， + __attribute__((section(".RAMCODE_WDG1"))) void Wdg_Feed(void) + { + + } +#else + + void Wdg_Feed(void) + { + g_test_freewog++; + wdog_task(); + } + +#endif + +/**************************************************************************//** + * + * \details Deinitialize watchdog module. + * + * \return None. + * + * \since V2.0.0 + * + *****************************************************************************/ +void Wdg_Deinit(void) +{ + /*The watchdog of xep100 is not deinitialized.*/ + wdt_disable(); + return ; +} + +/**************************************************************************//** + * + * \details Reset watchdog module. + * + * \return None. + * + * \since V2.0.0 + * + *****************************************************************************/ +void Wdg_FastReset(void) +{ + ResetMCUHandle(); + #if 0 + for(;;) + { + } + #endif +} + + + +#if (RTE_FUN_COPY_WDG_TO_RAM == BL_FUN_ON) //條件成立， + //#pragma location = "RAMCODE" + const __IO wdg_Header g_WdgHeader __attribute__((section(".RAMCODE_WDG"))) = +#else + const __IO wdg_Header g_WdgHeader = +#endif + + { + //0x1234, + //0x5678, + &Wdg_Feed, + //0x12345678 + }; + diff --git a/code_boot_out/asil/middle/autosar_bl/sources/lib/gcc/libfm33_boot_uds_core.a b/code_boot_out/asil/middle/autosar_bl/sources/lib/gcc/libfm33_boot_uds_core.a new file mode 100644 index 0000000..89518fc Binary files /dev/null and b/code_boot_out/asil/middle/autosar_bl/sources/lib/gcc/libfm33_boot_uds_core.a differ diff --git a/code_boot_out/asil/middle/autosar_bl/sources/lib/iar/fm33_boot_uds_core.a b/code_boot_out/asil/middle/autosar_bl/sources/lib/iar/fm33_boot_uds_core.a new file mode 100644 index 0000000..574c6d9 Binary files /dev/null and b/code_boot_out/asil/middle/autosar_bl/sources/lib/iar/fm33_boot_uds_core.a differ diff --git a/code_boot_out/asil/middle/autosar_bl/sources/spec/bl_access_udsdemo.c b/code_boot_out/asil/middle/autosar_bl/sources/spec/bl_access_udsdemo.c new file mode 100644 index 0000000..675cb26 --- /dev/null +++ b/code_boot_out/asil/middle/autosar_bl/sources/spec/bl_access_udsdemo.c @@ -0,0 +1,307 @@ +/**************************************************************************//** + * + * \copyright This software is the property of Technologies. Any + * information contained in this doc should not be reproduced, + * or used, or disclosed without the written authorization from + * Technologies. + * + * \brief This is a source file to make seed and verify a key. + * + * \file bl_access_udsdemo.c + * \ingroup security_manager_module + * \author + * + * \version 5.1.0 + * \date 27/03/2018 + * + * \par Changelist + * Version | Date | Authors | CR# | Descriptions + * -------- | ---------- | ---------------- | --- | ------------ + * 01.00.00 | 25/03/2018 | xucong | N/A | Boot010001 + * + *****************************************************************************/ +#include "bl_system_cfg.h" + +#include "bl_common.h" +#include "bl_security_funcfg.h" +#include "bl_access_udsdemo.h" +#include "bl_adpt_uds_platform.h" +#include "bl_dcm_cfg.h" +#include "bl_adapter_cfg.h" + +/***************************************************************************** + * QAC Suppression + *****************************************************************************/ +/*PRQA S 602,1532,3212,3227,3453 EOF*/ +/* + * MISRA-C:2004 20.2(602):The identifier is reserved for use by the library. + * The Bootloader do not use any library funtion and use the underscores to + * indicate that the function is a interal function. + * + * 1532:The function is only referenced in one translation unit. + * all functions in this file are configurations in the Security Module. + * + * 3212:This explicit cast is redundant and could be removed. + * ACC_UDSDEMO_KEY_FROM_BUF and ACC_UDSDEMO_SEED_TO_BUF are not explicit cast. + * + * 3227:The parameter is never modified and so it could be declared with const. + * Acc_UdsDemoGetSeed, the seed will be modify. + * Acc_UdsDemoVerifyKey, the key is declared with const. + * + * MISRA-C:2004 19.7(3453):A function could probably be used instead of this + * function-like macro. + * ACC_UDSDEMO_KEY_FROM_BUF macro do not have side-effect. + * ACC_UDSDEMO_SEED_TO_BUF macro do not have side-effect. + * + */ + +/***************************************************************************** + * Verify The Configurations of Macro + *****************************************************************************/ +#if ((SECM_ACCESS_KEY_SIZE != 4u) && (SECM_ACCESS_KEY_SIZE != 2u) && (SECM_ACCESS_KEY_SIZE != 16u) ) +#error "The size of a key is only four or two, other values are invalid." +#endif + +#if ((SECM_ACCESS_SEED_SIZE != 4u) && (SECM_ACCESS_SEED_SIZE != 2u)) +#error "The size of a seed is only four or two, other values are invalid." +#endif +/***************************************************************************** + * Internal Macro Definitions + *****************************************************************************/ +#if (SECM_ACCESS_KEY_SIZE == 4u) //進入該選項 +#define ACC_UDSDEMO_KEY_MASK (0xA5CEFDB6UL) +#define ACC_UDSDEMO_KEY_FROM_BUF(buf) BL_BE32_TO_MCU(buf) //buf = * buf +#elif (SECM_ACCESS_KEY_SIZE == 2u) +#define ACC_UDSDEMO_KEY_MASK (0xDFB6u) +#define ACC_UDSDEMO_KEY_FROM_BUF(buf) BL_BE16_TO_MCU(buf) +#elif (SECM_ACCESS_KEY_SIZE > 4u) +#define ACC_UDSDEMO_KEY_MASK (0xDFu) +#define ACC_UDSDEMO_KEY_FROM_BUF(buf) BL_BE16_TO_MCU(buf) +#endif + +#if (SECM_ACCESS_SEED_SIZE == 4u) //進入該選項 +/** \brief It is used to calculate the random seed*/ +#define ACC_UDSDEMO_RANDOM_SEED (16807UL) +#define ACC_UDSDEMO_SEED_INITVALUE (0x12350012UL) +#define ACC_UDSDEMO_SEED_TO_BUF(seed,buf) BL_MCU_TO_BE32(buf,seed) //*buf = seed +#elif (SECM_ACCESS_SEED_SIZE == 2u) +/** \brief It is used to calculate the random seed*/ +#define ACC_UDSDEMO_RANDOM_SEED (16807u) +#define ACC_UDSDEMO_SEED_INITVALUE (0x1235u) +#define ACC_UDSDEMO_SEED_TO_BUF(seed,buf) BL_MCU_TO_BE16(buf,seed) +#elif (SECM_ACCESS_SEED_SIZE > 4u) +#define ACC_UDSDEMO_RANDOM_SEED (3u) +#define ACC_UDSDEMO_SEED_INITVALUE (0x12u) +#define ACC_UDSDEMO_SEED_TO_BUF(seed,buf) BL_MCU_TO_BE16(buf,seed) + +#endif + +/***************************************************************************** + * Internal Type Definitions + *****************************************************************************/ +#if (SECM_ACCESS_SEED_SIZE == 4u) //是該選項 +typedef bl_u32_t bl_UdsDemoSeed_t; +#elif (SECM_ACCESS_SEED_SIZE == 2u) +typedef bl_u16_t bl_UdsDemoSeed_t; +#else +typedef bl_u16_t bl_UdsDemoSeed_t; +#endif + +#if (SECM_ACCESS_KEY_SIZE == 4u) //是該選項 +typedef bl_u32_t bl_UdsDemoKey_t; +#elif (SECM_ACCESS_KEY_SIZE == 2u) +typedef bl_u16_t bl_UdsDemoKey_t; +#else +typedef bl_u16_t bl_UdsDemoKey_t; +#endif + + +/***************************************************************************** + * Internal Structure Definitions + *****************************************************************************/ + +/***************************************************************************** + * Internal Function Declarations + *****************************************************************************/ +/** \brief Calculate the key from the gs_UdsDemoSeed.*/ +static bl_UdsDemoKey_t _Acc_UdsDemoCalculateKey(void); + +/***************************************************************************** + * Internal Variable Definitions + *****************************************************************************/ +STATIC bl_UdsDemoSeed_t gs_UdsDemoSeed; //u32 + +/***************************************************************************** + * Global Variable Definitions + *****************************************************************************/ + +//#define GETBIT(a,b) (unsigned char)(((a) & (1<<(b) ))!=0)/*fetch bit "b" out of "a"*/ + +/***************************************************************************** + * Function Definitions + *****************************************************************************/ +/**************************************************************************//** + * + * \details Initialize the DEMO security access used for UDS. + * + * \since V1.0.0 + * + *****************************************************************************/ +void Acc_UdsDemoInit(void) +{ + gs_UdsDemoSeed = ACC_UDSDEMO_SEED_INITVALUE; +} + +/**************************************************************************//** + * + * \details Make a new seed. + * + * \since V5.0.0 + * + *****************************************************************************/ +void Acc_UdsDemoMakeNewSeed(void) +{ + #if 1 + gs_UdsDemoSeed *= ACC_UDSDEMO_RANDOM_SEED; + #else + gs_UdsDemoSeed = 0x12345678; + #endif + return ; +} + +/**************************************************************************//** + * + * \details Get current seed value. + * + * \param[out] seed - the value of current seed. + * + * \since V1.0.0 + * + *****************************************************************************/ +void Acc_UdsDemoGetSeed(bl_Buffer_t *seed) +{ + ACC_UDSDEMO_SEED_TO_BUF(gs_UdsDemoSeed,seed); // seed = gs_UdsDemoSeed + + return ; +} + +/**************************************************************************//** + * + * \details Verify the value of transmitted key whether is right. + * + * \param[in] key - the value of transmitted key. + * + * \return If the transmitted key value is right return BL_ERR_OK, otherwise + * return BL_ERR_NOT_OK. + * + * \retval BL_ERR_OK - the transmitted key value is right. + * \retval BL_ERR_NOT_OK - the transmitted key value is NOT right. + * + * \since V1.0.0 + * + *****************************************************************************/ +bl_Return_t Acc_UdsDemoVerifyKey(const bl_Buffer_t *key) +{ + bl_Return_t ret = BL_ERR_NOT_OK; + bl_UdsDemoKey_t calKey; + bl_UdsDemoKey_t tranKey; + + calKey = _Acc_UdsDemoCalculateKey(); //這是相當於本地算出來的 + tranKey = ACC_UDSDEMO_KEY_FROM_BUF(key); // tranKey = *key --這是相當於 診斷上收回來的數據； + + if (calKey == tranKey) + { + ret = BL_ERR_OK; + } + + return ret; +} + +/**************************************************************************//** + * + * \details An algorithm is used to calculate the key by a seed. + * + * \return the key value + * + * \since V1.0.0 + * + *****************************************************************************/ + +static const u32 key_u32= 0x00000017; + +static bl_UdsDemoKey_t _Acc_UdsDemoCalculateKey(void) +{ + bl_UdsDemoKey_t key = 0; +#if 0 + /*When the size of seed is 2, there will be a necessary explicit cast.*/ + key = (((bl_UdsDemoKey_t)gs_UdsDemoSeed ^ ACC_UDSDEMO_KEY_MASK) + + ACC_UDSDEMO_KEY_MASK); + return key; +#else + #if 0 + bl_u8_t PowArray_P[16] = { 0 }; + bl_u8_t PowArray_N[16] = { 0 }; + bl_u8_t i; /*programming flash */ + bl_UdsDemoKey_t Key_P=0, Key_N=0, key_tmp=0; + for (i = 0; i < 15; i++) + { + PowArray_P[i] = PowArray_N[i] = 0; + if ((gs_UdsDemoSeed & 0x8000u) != 0) + { + PowArray_P[i] = 1; + } + else + { + PowArray_N[i] = 1; + } + gs_UdsDemoSeed <<= 1; + Key_P += PowArray_P[i] * Brilliance_f60.KeyArrayCom[i]; + Key_N += PowArray_N[i] * Brilliance_f60.KeyArrayCom[i]; + } + PowArray_P[15] = PowArray_N[15] = 0; + if ((gs_UdsDemoSeed & 0x8000u) != 0) + { + PowArray_P[15] = 1; + } + else + { + PowArray_N[15] = 1; + } + Key_P += PowArray_P[15] * Brilliance_f60.KeyArrayTs; + Key_N += PowArray_N[15] * Brilliance_f60.KeyArrayTs; + if (Key_P >= Key_N) + { + key_tmp = (Key_P - Key_N); + } + else + { + key_tmp = (Key_N - Key_P); + } + key_tmp = key_tmp * 32; + key_tmp += (Key_P & Brilliance_f60.kypMask); + key = key_tmp & Brilliance_f60.MASK; //[lev_index]; + #else + bl_u8_t i, Key[4];//,cal_data[4]; + bl_u8_t MagicSeed[4] = {0}; + //static const bl_u8_t xor_array[4] = {0x44U, 0x4DU, 0x53U, 0x16U}; + u32 l_seed =0; + u32 l_result=0; + u32 l_key; + + Acc_UdsDemoGetSeed(MagicSeed); + l_seed= ((u32)MagicSeed[0]<<24) | ((u32)MagicSeed[1]<<16) | ((u32)MagicSeed[2]<<8) | ((u32)MagicSeed[3]); + + l_result = ((((l_seed >> 1) ^ l_seed) <<3) ^ (l_seed >>2)); + l_key = l_result ^ key_u32; + Key[0] = l_key>>24; + Key[1] = l_key>>16; + Key[2] = l_key>>8; + Key[3] = l_key; + + key = ACC_UDSDEMO_KEY_FROM_BUF(Key); //key = *Key + #endif + + return key; +#endif +} + diff --git a/code_boot_out/asil/middle/autosar_bl/sources/spec/bl_adpt_uds_platform.c b/code_boot_out/asil/middle/autosar_bl/sources/spec/bl_adpt_uds_platform.c new file mode 100644 index 0000000..759f929 --- /dev/null +++ b/code_boot_out/asil/middle/autosar_bl/sources/spec/bl_adpt_uds_platform.c @@ -0,0 +1,3313 @@ +/**************************************************************************//** + * + * \copyright This software is the property of Technologies. Any + * information contained in this doc should not be reproduced, + * or used, or disclosed without the written authorization from + * Technologies. + * + * \brief This is the source file of the adapter module based on uds + * platform. + * + * \file bl_adpt_uds_platform.c + * \ingroup communication_adapter_module + * \author + * + * \version 5.1.0 + * \date 27/03/2018 + * + * \par Changelist + * Version | Date | Authors | CR# | Descriptions + * -------- | ---------- | ---------------- | --- | ------------ + * 01.00.00 | 25/03/2018 | xucong | N/A | Boot010001 + + * + *****************************************************************************/ +#include "bl_system_cfg.h" +#include "bl_common.h" +#include "bl_rte.h" +#include "bl_data.h" +#include "bl_can_tp.h" +#include "bl_can_if.h" +#include "bl_dcm.h" +#include "bl_dcm_cfg.h" +#include "bl_adapter.h" +#include "bl_security.h" +#include "bl_logical_block.h" + + +#include "bl_adpt_uds_platform.h" +#include "bl_adpt_uds_platform_cfg.h" +#include "bl_booting_cfg.h" +#include "bl_flash_if_cfg.h" +#include "bl_logical_block_cfg.h" +#include "bl_can_transceiver.h" +#include "bl_flash_if.h" +#include "bl_data_cfg.h" +#include "bl_flash.h" +#include "bl_memory.h" +#include "bl_memory_cfg.h" +//#include "eeprom.h" +#include "calibration.h" + +#include "common_types.h" +#include "error.h" +#include "bl_system_cfg.h" +#include "crc.h" +#include "nvm.h" +#include "Ls_Nm.h" +#include "bl_access_udsdemo.h" +#include "wdog.h" + +#ifdef UDS_DEBUG_EN +typedef struct +{ + u16 data[2]; + u16 time[8]; + u32 addr ; + u32 size; +}usd_test_s; +usd_test_s g_usd_test = {0}; +#endif + +u8 check_date_valid(u8 *p_date); + +/***************************************************************************** + * Verify The Configurations of Macro + *****************************************************************************/ +#if (DCM_BUFFER_SIZE < ADPT_MAXNUM_OF_BLOCKLENGTH) +#error "the buffer of the Dcm module is too small." +#endif + +#if (RTE_FUN_GATEWAY == BL_FUN_ON) +#error "the function of gateway is not ok." +#endif +/***************************************************************************** + * Internal Macro Definitions + *****************************************************************************/ +/*lint -emacro(778,ADPT_SESSION_RESPONSE0,ADPT_SESSION_RESPONSE1)*/ +/*lint -emacro(778,ADPT_SESSION_RESPONSE2,ADPT_SESSION_RESPONSE3)*/ +/*lint -emacro(572,ADPT_SESSION_RESPONSE0,ADPT_SESSION_RESPONSE1)*/ +/*lint -emacro(572,ADPT_SESSION_RESPONSE2,ADPT_SESSION_RESPONSE3)*/ +#define ADPT_P2START_TIMER (DCM_P2STARTIMEVALUE/DCM_P2STARTIMER_DIV) +#define ADPT_SESSION_RESPONSE0 (u8)(((u16)DCM_P2TIMEVALUE >> 8) & 0xFFu) +#define ADPT_SESSION_RESPONSE1 (u8)(((u16)DCM_P2TIMEVALUE >> 0) & 0xFFu) +#define ADPT_SESSION_RESPONSE2 (u8)(((u16)ADPT_P2START_TIMER >> 8) & 0xFFu) +#define ADPT_SESSION_RESPONSE3 (u8)(((u16)ADPT_P2START_TIMER >> 0) & 0xFFu) + +#define ADPT_MEMORY_LEN_FORMAT (0x04u) +#define ADPT_MEMORY_ADDR_FORMAT (0x04u) + +#define ADPT_MEMORY_LENANDADDR_FORMAT ((ADPT_MEMORY_LEN_FORMAT << 4) \ + | ADPT_MEMORY_ADDR_FORMAT) + +#define ADPT_ERASE_DATA_LENGTH (0x01u \ + + ADPT_MEMORY_LEN_FORMAT \ + + ADPT_MEMORY_ADDR_FORMAT) +#define ADPT_CHECKSUM_LENGTH (0x04u) + +#define ADPT_DATAFORMAT_IDEN (0x00u) +#define ADPT_LENFORMAT_IDEN (0x20u) +#define ADPT_IDEN_LEN_FORMAT ((ADPT_LENFORMAT_IDEN >> 4) & 0x0Fu) +#define ADPT_REQDOWNLOAD_RESPLENGTH (0x01u + ADPT_IDEN_LEN_FORMAT) + +/** \brief Indicate the 31 service is ok.*/ +#define ADPT_ROUTINE_CORRECT_RESULT (0u) //(0) // GL = 4 //31應答，FE-5HA是 4 和 5 +/** \brief Indicate the 31 service is not ok.*/ +#define ADPT_ROUTINE_INCORRECT_RESULT (1u) //(1) // GL = 5 +#define ADPT_ROUTINE_INCORRECT_SIG_RESULT (2u) //(1) // GL = 5 +#if 0 //目前沒有用到 +#define ADPT_ROUTINE_NOT_ALL_MANDATORY_BLOCKS_PRESENT_RESULT (6) // 31 FF 01 + +#define ADPT_ROUTINE_HW_INCOMPATIBILITY_RESULT (7) // 31 FF 01 +#define ADPT_ROUTINE_SW_INCOMPATIBILITY_RESULT (8) // 31 FF 01 +#endif + +#define ADPT_UDS_SYSTEM_STATUS_MASK (RTE_SYSFLAG_WRITE_FINGPRINT \ + | ADPT_SYSTEM_STATUS_MASK) //1c + +#define ADPT_UDS_STATUS_MASK (ADPT_STATUS_ALLOW_TRANS_DATA \ + | ADPT_STATUS_BLOCK_FIRST_DATA \ + | ADPT_STATUS_SEGMENT_FIRST_DATA) //78000000 + +#define ADPT_UDS_36_SERVICE_ID (0x36u) +#define ADPT_UDS_31_SERVICE_ID (0x31u) +#define ADPT_UDS_3E_SERVICE_ID (0x3Eu) +#define ADPT_UDS_11_SERVICE_ID (0x11u) + +#define ADPT_UDS_36_SERVICE_INDEX_POS (0x00u) +#define ADPT_UDS_36_SERVICE_DATA_POS (0x01u) + +#define ADPT_UDS_ERASE_MEMORY_FORMAT_POS (0) // 44開始 +#define ADPT_UDS_ERASE_MEMORY_ADDRESS_POS (1) +#define ADPT_UDS_ERASE_MEMORY_SIZE_POS (5) + +#define ADPT_UDS_34_SERVICE_IDEN_POS (0) +#define ADPT_UDS_34_SERVICE_ADDRANDSIZE_POS (1) +#define ADPT_UDS_34_SERVICE_ADDRESS_POS (2) +#define ADPT_UDS_34_SERVICE_SIZE_POS (ADPT_UDS_34_SERVICE_ADDRESS_POS \ + + ADPT_MEMORY_ADDR_FORMAT) //6 + +#define ADPT_UDS_34_RESPONSE_FORMAT_POS (0) // 如 20是格式 +#define ADPT_UDS_34_RESPONSE_SIZE_POS (1) // 如 0402是長度 + + +#define ADPT_STATUS_ALLOW_TRANS_DATA DCM_MAKE_FLAG(0x20000000UL) // +#define ADPT_STATUS_BLOCK_FIRST_DATA DCM_MAKE_FLAG(0x10000000UL) +#define ADPT_STATUS_SEGMENT_FIRST_DATA DCM_MAKE_FLAG(0x08000000UL) + +#define ADPT_UDS_MAX_CAN_FRAME_SIZE (CANTP_MAX_FRAME_SIZE) //好好查一下該宏 +#define ADPT_UDS_CAN_FRAME_INDEX_0 (0) +#define ADPT_UDS_CAN_FRAME_INDEX_1 (1) +#define ADPT_UDS_CAN_FRAME_INDEX_2 (2) +#define ADPT_UDS_CAN_FRAME_INDEX_3 (3) +#define ADPT_UDS_CAN_FRAME_INDEX_4 (4) +#define ADPT_UDS_CAN_FRAME_INDEX_5 (5) +#define ADPT_UDS_CAN_FRAME_INDEX_6 (6) +#define ADPT_UDS_CAN_FRAME_INDEX_7 (7) +#define ADPT_UDS_CAN_FRAME_INDEX_8 (8) + +/***************************************************************************** + * Internal Type Definitions + *****************************************************************************/ +/** \brief A alias of struct _tag_AdapterData.*/ +typedef struct _tag_AdapterData bl_AdapterData_t; + +#if (RTE_FUN_GATEWAY == BL_FUN_ON) +/** \brief A alias of struct _tag_GatewayTransmitList.*/ +typedef struct _tag_GatewayTransmitList bl_GatewayTransmitList_t; +/** \brief A alias of struct _tag_GatewayConversion.*/ +typedef struct _tag_GatewayConversion bl_GatewayConversion_t; +#endif + +/***************************************************************************** + * Internal Structure Definitions + *****************************************************************************/ +/** \brief This is data of a adapter.*/ +struct _tag_AdapterData +{ + struct _tag_SecurityDelay delay; /**< security access delay*/ + bl_u8_t blockIndex; /**< the block index of 36 service*/ + bl_Buffer_t serviceId; /**< the id of processing service*/ + bl_Address_t address; /**< the address of 36 service*/ + bl_Size_t remainSize; /**< the remain size of 36 service*/ +}; + +#if(RTE_FUN_GATEWAY == BL_FUN_ON) +/** \brief This is a list of gateway transmission.*/ +struct _tag_GatewayTransmitList +{ + bl_u16_t handle; + bl_u16_t number; + struct _tag_GatewayConversion *data; +}; + +/** + * \brief This is info of gateway conversion, it includes services + * needed to be transmitted. + */ +struct _tag_GatewayConversion +{ + bl_u8_t sid; + bl_u16_t size; + bl_Buffer_t *data; +}; + +#endif +/***************************************************************************** + * Internal Function Declarations + *****************************************************************************/ +#if(RTE_FUN_GATEWAY == BL_FUN_ON) +/** \brief Gateway transmits messages.*/ +static void _Adpt_UdsGatewayTransmit(bl_u8_t id); +#endif +/** \brief Send 0x78 negative response.*/ +static void _Adpt_UdsPendingResponse(bl_u8_t id); +/** \brief Timeout callback of sending 0x78.*/ +static void _Adpt_TimeOutCallBack(bl_u8_t id); +/** \brief send a response by comif.*/ +static void _Adpt_SendResponse(bl_BufferSize_t size, const bl_Buffer_t *buffer); +/** \brief Set response info of session.*/ +static bl_BufferSize_t _Adpt_SetSessionResp(bl_Buffer_t *buffer); +/** \brief Goto the session.*/ +static void _Adpt_UdsGotoSession(bl_DownStatus_t sessionMask); +/** \brief Reset the bootloader.*/ +static void _Adpt_UdsResetSystem(bl_u8_t sid, bl_u16_t flagId); +/** \brief Clear the download information.*/ +static void _Adpt_UdsClearDownInfo(bl_AdapterData_t *adpt); + +/***************************************************************************** + * Internal Variable Definitions + *****************************************************************************/ +/** \brief Private data variable.*/ +STATIC bl_AdapterData_t gs_UdsPrivateData; +#if 0 +struct _tag_AdapterData +{ + struct _tag_SecurityDelay delay; /**< security access delay*/ + bl_u8_t blockIndex; /**< the block index of 36 service*/ + bl_Buffer_t serviceId; /**< the id of processing service*/ + bl_Address_t address; /**< the address of 36 service*/ + bl_Size_t remainSize; /**< the remain size of 36 service*/ +}; +#endif + +#if ADPT_UDS_MAX_CAN_FRAME_SIZE <=8 +STATIC const bl_Buffer_t gs_DefaultResponse[ADPT_UDS_MAX_CAN_FRAME_SIZE] = +{ + 0x06u,0x50u,0x01u,ADPT_SESSION_RESPONSE0,ADPT_SESSION_RESPONSE1, + ADPT_SESSION_RESPONSE2,ADPT_SESSION_RESPONSE3,CANTP_FRAME_PADDING_VALUE +}; +#else +STATIC const bl_Buffer_t gs_DefaultResponse[ADPT_UDS_MAX_CAN_FRAME_SIZE] = +{ + 0x00,0x06u,0x50u,0x01u,ADPT_SESSION_RESPONSE0,ADPT_SESSION_RESPONSE1, + ADPT_SESSION_RESPONSE2,ADPT_SESSION_RESPONSE3 +}; +#endif + +#if ADPT_UDS_MAX_CAN_FRAME_SIZE <=8 +STATIC const bl_Buffer_t gs_ReprogrammingResponse[ADPT_UDS_MAX_CAN_FRAME_SIZE]= +{ + 0x06u,0x50u,0x02u,ADPT_SESSION_RESPONSE0,ADPT_SESSION_RESPONSE1, + ADPT_SESSION_RESPONSE2,ADPT_SESSION_RESPONSE3,CANTP_FRAME_PADDING_VALUE +}; +#else +STATIC const bl_Buffer_t gs_ReprogrammingResponse[ADPT_UDS_MAX_CAN_FRAME_SIZE]= +{ + 0x00,0x06u,0x50u,0x02u,ADPT_SESSION_RESPONSE0,ADPT_SESSION_RESPONSE1, + ADPT_SESSION_RESPONSE2,ADPT_SESSION_RESPONSE3 +}; +#endif + +#if ADPT_UDS_MAX_CAN_FRAME_SIZE <=8 +STATIC const bl_Buffer_t gs_ResetResponse[ADPT_UDS_MAX_CAN_FRAME_SIZE] = +{ + 0x02u,0x51u,0x01u,CANTP_FRAME_PADDING_VALUE, + CANTP_FRAME_PADDING_VALUE,CANTP_FRAME_PADDING_VALUE, + CANTP_FRAME_PADDING_VALUE,CANTP_FRAME_PADDING_VALUE +}; +#else +STATIC const bl_Buffer_t gs_ResetResponse[ADPT_UDS_MAX_CAN_FRAME_SIZE] = +{ + 0x00,0x02u,0x51u,0x01u,CANTP_FRAME_PADDING_VALUE, + CANTP_FRAME_PADDING_VALUE,CANTP_FRAME_PADDING_VALUE, + CANTP_FRAME_PADDING_VALUE,CANTP_FRAME_PADDING_VALUE +}; +#endif + +#if ADPT_UDS_MAX_CAN_FRAME_SIZE <=8 +STATIC const bl_Buffer_t gs_ResetResponse_sub03[ADPT_UDS_MAX_CAN_FRAME_SIZE] = +{ + 0x02u,0x51u,0x03u,CANTP_FRAME_PADDING_VALUE, + CANTP_FRAME_PADDING_VALUE,CANTP_FRAME_PADDING_VALUE, + CANTP_FRAME_PADDING_VALUE,CANTP_FRAME_PADDING_VALUE +}; +#else +STATIC const bl_Buffer_t gs_ResetResponse_sub03[ADPT_UDS_MAX_CAN_FRAME_SIZE] = +{ + 0x00,0x02u,0x51u,0x03u,CANTP_FRAME_PADDING_VALUE, + CANTP_FRAME_PADDING_VALUE,CANTP_FRAME_PADDING_VALUE, + CANTP_FRAME_PADDING_VALUE,CANTP_FRAME_PADDING_VALUE +}; +#endif + + +#if (RTE_FUN_STAY_IN_BOOT == BL_FUN_ON) +#if ADPT_UDS_MAX_CAN_FRAME_SIZE <=8 +STATIC const bl_Buffer_t gs_StayInBootResponse[ADPT_UDS_MAX_CAN_FRAME_SIZE] = +{ + 0x04u,0x71u,0x01u,ADPT_STAY_IN_BOOT_RESPONSE_HID, //F5 + //18 AA + ADPT_STAY_IN_BOOT_RESPONSE_LID,CANTP_FRAME_PADDING_VALUE, + //AA AA + CANTP_FRAME_PADDING_VALUE,CANTP_FRAME_PADDING_VALUE +}; +#else +STATIC const bl_Buffer_t gs_StayInBootResponse[ADPT_UDS_MAX_CAN_FRAME_SIZE] = +{ + 0x0,0x04u,0x71u,0x01u,ADPT_STAY_IN_BOOT_RESPONSE_HID, //F5 + //18 AA + ADPT_STAY_IN_BOOT_RESPONSE_LID,CANTP_FRAME_PADDING_VALUE, + //AA AA + CANTP_FRAME_PADDING_VALUE,CANTP_FRAME_PADDING_VALUE +}; +#endif +#endif + +#if(RTE_FUN_GATEWAY == BL_FUN_ON) +/** \details The data of gateway conversion. */ +STATIC const bl_u8_t gs_UdsGatewayData[ADPT_UDS_CONVERSION_DATA_LENGTH] = //2 +{ + 0x3Eu, 0x80u, +} + +/** \details A list of gateway transmission. */ +STATIC const bl_GatewayTransmitList_t gs_UdsGatewayList = +{ + ADPT_UDS_COMOPS_HANDLE, //0XFFFF + ADPT_UDS_NUMBER_OF_GATEWAY, //1 + gs_UdsGateway, +}; + +/** \details The info of gateway conversion. */ +STATIC const bl_GatewayConversion_t gs_UdsGateway[ADPT_UDS_NUMBER_OF_GATEWAY] = //1 +{ + { + ADPT_UDS_3E_SERVICE_ID, // SID= 3E + ADPT_UDS_CONVERSION_DATA_LENGTH, //SZIE =2 + gs_UdsGatewayData // 內容指針 指向 gs_UdsGatewayData 3e 80 + }, +}; + +#endif + +/***************************************************************************** + * Global Variable Definitions + *****************************************************************************/ +/** \details The Uds platform adapter informations. */ +const bl_Adapter_t g_UdsPlatformAdapter = +{ + //type=0 index=0 //Init //Callback + 0x00u, 0x00u, &Adpt_UdsInit, &Adpt_UdsCallback, + //PeriodCallback //Timeout + &Adpt_UdsPeriodicCallback, &Adpt_UdsTimeOutCallBack, + //Sleep 目前沒有sleep +#if (RTE_FUN_SYSTEM_SLEEP == BL_FUN_ON) + &Canif_Sleep, +#else + BL_NULL_PTR, /*RTE_FUN_SYSTEM_SLEEP is OFF*/ +#endif +}; + +///// 安全访问相关 +static u8 security_access_mclf_cycle_counter = 0u ; //security_access_get_mclf_cycle_counter + +u8 security_access_get_mclf_cycle_counter(void) +{ + return security_access_mclf_cycle_counter; +} + +void security_access_set_mclf_cycle_counter(u8 value) +{ + security_access_mclf_cycle_counter = value; +} + + + +/***************************************************************************** + * Function Definitions + *****************************************************************************/ +/**************************************************************************//** + * + * \details Initialize the uds module. This function mainly initialize + * CanTp, dcm and security access delay info. + * + * \return If Initialization is successful return BL_ERR_OK, + * otherwise return BL_ERR_NOT_OK. + * + * \retval BL_ERR_OK - Initialize successfully. + * \retval BL_ERR_NOT_OK - Initialize unsuccessfully. + * + * \note This function is called by the process driver module. + * + * \since V3.0.0 + * + *****************************************************************************/ +bl_Return_t Adpt_UdsInit(void) +{ + bl_Return_t ret; + + //ret = Canif_Init(); //己在Rte_PreInit初始化過了 + Cantp_Init(); + Dcm_Init(); + ls_nm_Init(); + + gs_UdsPrivateData.serviceId = 0; + + Adpt_InitDelayInfo(&gs_UdsPrivateData.delay); + + _Adpt_UdsGotoSession(DCM_STATUS_SESSION_DEFAULT); + + return ret; +} + +/**************************************************************************//** + * + * \details Periodic callback of function Rte_PeriodicSchedule. This function + * needs to be called periodically, and mainly handles timer of dcm, + * and CanTp module. + * + * \since V3.0.0 + * + *****************************************************************************/ +void Adpt_UdsPeriodicCallback(void) +{ + #ifdef UDS_DEBUG_EN + g_usd_test.time[0]++; + if(g_usd_test.time[0]>=1000) //果然是250us;後來改回1ms了 + { + g_usd_test.time[0]=0; + g_usd_test.time[1]++; + } + #endif + wdog_task(); + //(void)CanTrcv_CheckError(); + Adpt_DelayTimeCallback(&gs_UdsPrivateData.delay); // + Dcm_TimerFunction(); // gs_DcmS3TimerStartFlag and gs_DcmS3Timer + Cantp_PeriodFunction(); + Dcm_MainFunction(); + #ifdef NVM_EEPROM_EXT_EN + eeprom_task(); + #endif +} + +/**************************************************************************//** + * + * \details Callback of the adapter, it should be always running. This + * function will be called by process driver module, and performs + * tx confirmation and rx indication. + * + * \since V3.0.0 + * + *****************************************************************************/ +void Adpt_UdsCallback(void) +{ + #ifdef UDS_DEBUG_EN + g_usd_test.time[2]++; + if(g_usd_test.time[2]>=1000) + { + g_usd_test.time[2]=0; + g_usd_test.time[3]++; + } + #endif + Canif_TxMainFunction(); + Canif_RxMainFunction(); + Canif_BusoffMainFunction(); +} + +/**************************************************************************//** + * + * \details Callback of default session. + * + * \param[in] size - the data size, not include id, subid and did. + * \param[in/out] buffer - the pointer of data. + * \param[out] respSize - the size of response data. + * + * \return Return response code. + * + * \retval 0x00 - Positive response code. + * \retval others - Negative response code. + * + * \since V3.0.0 + * 在數組 gs_Dcm10SubIdl 中 + *****************************************************************************/ +bl_ResponseCode_t Adpt_UdsCallback1001(bl_BufferSize_t size, + bl_Buffer_t *buffer, + bl_BufferSize_t *respSize) +{ + bl_ResponseCode_t resCode = DCM_E_POSITIVERESPONSE; + bl_Return_t ret; + bl_u8_t l_buf[ADPT_UDS_MAX_CAN_FRAME_SIZE]; + bl_u8_t i; + (void)size; + + /*programming session.*/ + ret = Rte_IsValidStatus(&g_DownContext, DCM_STATUS_SESSION_PROGRAMMING); + if(BL_ERR_OK == ret) + { + #if 1 + if (Dcm_IsSuspendedResponse() != BL_ERR_OK) //gs_SupPosRespFlag==0 + { + #ifdef DEFAULT_GOTO_APP_DEFAULT_SEESION_78 + //先修改ram标志，使app能判断 + (void)Mem_Write(MEM_MEMORY_ID_RAM,DM_DATA_3_LOCAL_ADDR,DM_DATA_3_SIZE,DM_DATA_3_DDP); // + _Adpt_UdsPendingResponse(0x10); + #else + for(i=0;i<8;i++) + { + l_buf[i] = gs_DefaultResponse[i]; + } + for(i=8;isegIndex + + _Adpt_UdsGotoSession(DCM_STATUS_SESSION_PROGRAMMING); + + *respSize = _Adpt_SetSessionResp(buffer); + resCode = DCM_E_POSITIVERESPONSE; + } + else + { + (void)Dm_WriteDefaultData(BOOTM_REPROGRAM_FLAG_DID); //BOOTM_REPROGRAM_FLAG_DID + #ifdef BOOT_STATE_PROG_DEBUG_EN + #else + g_RteInfo.SystemReset(); + #endif + } + } + return resCode; +} + +/**************************************************************************//** + * + * \details Callback of extended session. + * + * \param[in] size - the data size, not include id, subid and did. + * \param[in/out] buffer - the pointer of data. + * \param[out] respSize - the size of response data. + * + * \return Return response code. + * + * \retval 0x00 - Positive response code. + * \retval others - Negative response code. + * + * \since V3.0.0 + * + *****************************************************************************/ +bl_ResponseCode_t Adpt_UdsCallback1003(bl_BufferSize_t size, + bl_Buffer_t *buffer, + bl_BufferSize_t *respSize) +{ + bl_ResponseCode_t resCode = DCM_E_CONDITIONSNOTCORRECT; + bl_Return_t ret; + + (void)size; + + #if 0 //任何會話，直接進入03 + /*programming session.*/ + ret = Rte_IsValidStatus(&g_DownContext, DCM_STATUS_SESSION_PROGRAMMING); + + ///ret = BL_ERR_NOT_OK; ///// ??? + if (ret != BL_ERR_OK) /*the programming can not go to extended.*/ + #endif + { + Dcm_StartS3Timer(); + + _Adpt_UdsGotoSession(DCM_STATUS_SESSION_EXTENDED); + + *respSize = _Adpt_SetSessionResp(buffer); + + resCode = DCM_E_POSITIVERESPONSE; + } + return resCode; +} + + +/**************************************************************************//** + * + * \details Callback of extended session. + * + * \param[in] size - the data size, not include id, subid and did. + * \param[in/out] buffer - the pointer of data. + * \param[out] respSize - the size of response data. + * + * \return Return response code. + * + * \retval 0x00 - Positive response code. + * \retval others - Negative response code. + * + * \since V3.0.0 + * + *****************************************************************************/ +bl_ResponseCode_t Adpt_UdsCallback1004(bl_BufferSize_t size, + bl_Buffer_t *buffer, + bl_BufferSize_t *respSize) +{ + bl_ResponseCode_t resCode = DCM_E_CONDITIONSNOTCORRECT; + bl_Return_t ret; + + (void)size; + #if 0 //任何會話，直接進入60 + /*programming session.*/ + ret = Rte_IsValidStatus(&g_DownContext, DCM_STATUS_SESSION_PROGRAMMING); + + ///ret = BL_ERR_NOT_OK; ///// ??? + if (ret != BL_ERR_OK) /*the programming can not go to extended.*/ + #endif + { + Dcm_StartS3Timer(); + + _Adpt_UdsGotoSession(DCM_STATUS_SESSION_SUPPLY); + + *respSize = _Adpt_SetSessionResp(buffer); + + resCode = DCM_E_POSITIVERESPONSE; + } + return resCode; +} + + +/**************************************************************************//** + * + * \details Callback of reset. + * + * \param[in] size - the data size, not include id, subid and did. + * \param[in/out] buffer - the pointer of data. + * \param[out] respSize - the size of response data. + * + * \return Return response code. + * + * \retval 0x00 - Positive response code. + * \retval others - Negative response code. + * + * \since V3.0.0 + * gs_Dcm11SubId 數組中 + *****************************************************************************/ +bl_ResponseCode_t Adpt_UdsCallback1101(bl_BufferSize_t size, + bl_Buffer_t *buffer, + bl_BufferSize_t *respSize) +{ + bl_ResponseCode_t resCode = DCM_E_POSITIVERESPONSE; + bl_u8_t i; + bl_u8_t l_buf[ADPT_UDS_MAX_CAN_FRAME_SIZE]; + (void)respSize; + (void)buffer; + (void)size; + + if (Dcm_IsSuspendedResponse() != BL_ERR_OK) //gs_SupPosRespFlag==0 + { + for(i=0;i<8;i++) + { + l_buf[i] = gs_ResetResponse[i]; + } + for(i=8;i>8 ); + buffer[1] = (u8)(l_u16_temp[0] &0x00ffu); + buffer[2] = (u8)( l_u16_temp[1] >>8 ); + buffer[3] = (u8)(l_u16_temp[1] &0x00ffu); + *respSize = 4; + } + #if 0 + else + { + + if( (buffer[0] == 0 && buffer[1] == 0 && buffer[2] == 0 && buffer[3] == 0 && + buffer[4] == 0 && buffer[5] == 0 && buffer[6] == 0 && buffer[7] == 0 && + buffer[8] == 0 && buffer[9] == 0 && buffer[10] == 0 && buffer[11] == 0 && + buffer[12] == 0 && buffer[13] == 0 && buffer[14] == 0 && buffer[15] == 0 ) || ( + + buffer[0] == 0xff && buffer[1] == 0xff && buffer[2] == 0xff && buffer[3] == 0xff && + buffer[4] == 0xff && buffer[5] == 0xff && buffer[6] == 0xff && buffer[7] == 0xff && + buffer[8] == 0xff && buffer[9] == 0xff && buffer[10] == 0xff && buffer[11] == 0xff && + buffer[12] == 0xff && buffer[13] == 0xff && buffer[14] == 0xff && buffer[15] == 0xff )) { + + buffer[0] = buffer[1] = buffer[2] = buffer[3] = 0x20; + buffer[4] = buffer[5] = buffer[6] = buffer[7] = 0x20; + buffer[8] = buffer[9] = buffer[10] = buffer[11] = 0x20; + buffer[12] = buffer[13] = buffer[14] = buffer[15] = 0x20; + } + *respSize = 16; + + /**/ + } + #endif + return resCode; +} + + +/* 22 F18A */ +/* software detailed design ID: BSWDD110217*/ +bl_ResponseCode_t Adpt_UdsCallBackRead_f18A_supplier(bl_BufferSize_t size, + bl_Buffer_t *buffer, + bl_BufferSize_t *respSize) +{ + bl_ResponseCode_t resCode = DCM_E_POSITIVERESPONSE; + (void)size; + (void)cal_read_did(0xF18au,(u8*)&buffer[0],SYSDID_F18A_CK_LEN); + //resCode = DCM_E_CONDITIONSNOTCORRECT; + *respSize = SYSDID_F18A_LEN; + return resCode; +} + +/* 22 F18B */ +/* software detailed design ID: BSWDD110218*/ +bl_ResponseCode_t Adpt_UdsCallBackRead_f18B_ecu_manu_date(bl_BufferSize_t size, + bl_Buffer_t *buffer, + bl_BufferSize_t *respSize) +{ + bl_ResponseCode_t resCode = DCM_E_POSITIVERESPONSE; + (void)size; + + //resCode = DCM_E_CONDITIONSNOTCORRECT; + (void)cal_read_did(0xF18bu,(u8*)&buffer[0],SYSDID_F18B_CK_LEN); + *respSize = SYSDID_F18B_LEN; + return resCode; +} + + +/* 22 F18C */ +/* software detailed design ID: BSWDD110219*/ +bl_ResponseCode_t Adpt_UdsCallBackRead_f18C_ecu_sn(bl_BufferSize_t size, + bl_Buffer_t *buffer, + bl_BufferSize_t *respSize) +{ + bl_ResponseCode_t resCode = DCM_E_POSITIVERESPONSE; + bl_u8_t l_crc; + (void)size; + //resCode = DCM_E_CONDITIONSNOTCORRECT; + (void)cal_read_did(0xF18Cu,(u8*)&buffer[0],SYSDID_F18C_CK_LEN); + l_crc = crc_8_make(buffer,SYSDID_F18C_LEN); + if(l_crc == buffer[SYSDID_F18C_LEN]) //校验正确 + { + //如果是正确的 + } + else + { + //buffer[0]=0; + //如果是错误的 + #ifdef DEBUG_APP_DCM_EN + g_debug_app_dcm.crc_error_count++; + #endif + } + *respSize = SYSDID_F18C_LEN; + return resCode; +} + + +/* 22 F190 */ +/* software detailed design ID: BSWDD110220*/ +bl_ResponseCode_t Adpt_UdsCallBackRead_f190_vin(bl_BufferSize_t size, + bl_Buffer_t *buffer, + bl_BufferSize_t *respSize) +{ + bl_ResponseCode_t resCode = DCM_E_POSITIVERESPONSE; + u8 l_crc; + (void)size; + (void)cal_read_did(0xF190u,(u8*)&buffer[0],SYSDID_F190_VIN_CK_LEN); + l_crc = crc_8_make(buffer,SYSDID_F190_VIN_LEN); + if(l_crc == buffer[SYSDID_F190_VIN_LEN]) //校验正确 + { + //如果是正确的 + } + else + { + //buffer[0]=0; + //如果是错误的--也认为未写入 + #ifdef DEBUG_APP_DCM_EN + g_debug_app_dcm.crc_error_count++; + #endif + } + *respSize = RTE_F190_VIN_SIZE; + return resCode; +} + + +/* 22 F191 */ +/* software detailed design ID: BSWDD110221*/ +bl_ResponseCode_t Adpt_UdsCallBackRead_f191_ecu_hw_num(bl_BufferSize_t size, + bl_Buffer_t *buffer, + bl_BufferSize_t *respSize) +{ + bl_ResponseCode_t resCode = DCM_E_POSITIVERESPONSE; + (void)size; + + //resCode = DCM_E_CONDITIONSNOTCORRECT; + (void)cal_read_did(0xF191u,(u8*)&buffer[0],SYSDID_F191_CK_LEN); + *respSize = SYSDID_F191_LEN; + return resCode; +} + + +/* 22 F192 */ +/* software detailed design ID: BSWDD110222*/ +bl_ResponseCode_t Adpt_UdsCallBackRead_f192_hw_part_num(bl_BufferSize_t size, + bl_Buffer_t *buffer, + bl_BufferSize_t *respSize) +{ + bl_ResponseCode_t resCode = DCM_E_POSITIVERESPONSE; + (void)size; + + //resCode = DCM_E_CONDITIONSNOTCORRECT; + (void)cal_read_did(0xF192u,(u8*)&buffer[0],SYSDID_F192_CK_LEN); + *respSize = SYSDID_F192_LEN; + return resCode; +} + +/* 22 F193 */ +/* software detailed design ID: BSWDD110223*/ +bl_ResponseCode_t Adpt_UdsCallBackReadECU_HW_Number(bl_BufferSize_t size, + bl_Buffer_t *buffer, + bl_BufferSize_t *respSize) +{ + //u8 i; + bl_ResponseCode_t resCode = DCM_E_POSITIVERESPONSE; + (void)size; + //resCode = DCM_E_CONDITIONSNOTCORRECT; + (void)cal_read_did(0xF193u,(u8*)&buffer[0],SYSDID_F193_CK_LEN); + *respSize = SYSDID_F193_LEN; + return resCode; +} +//#define UDS_TEST_F194_CHECKSUM +#ifdef UDS_TEST_F194_CHECKSUM +volatile static u8 g_test_f194[2] ={0u}; +#endif +/* 22 F194 */ +/* software detailed design ID: BSWDD110224*/ +bl_ResponseCode_t Adpt_UdsCallBackRead_f194_ecu_sw_num(bl_BufferSize_t size, + bl_Buffer_t *buffer, + bl_BufferSize_t *respSize) +{ + bl_ResponseCode_t resCode = DCM_E_POSITIVERESPONSE; + u8 i; + u8 l_checksum=0u; + + (void)size; + + //resCode = DCM_E_CONDITIONSNOTCORRECT; + (void)cal_read_did(0xF194u,(u8*)&buffer[0],SYSDID_F194_CK_LEN); + //判断checksum + for(i = 0; i < SYSDID_F194_LEN; i++) + { + l_checksum += buffer[i]; + } + //校验正确，说明有APP + if(l_checksum == buffer[SYSDID_F194_LEN]) + { + #ifdef UDS_TEST_F194_CHECKSUM + g_test_f194[0]++; + #endif + } + else + { + #ifdef UDS_TEST_F194_CHECKSUM + g_test_f194[1]++; + #endif + for(i = 0; i < SYSDID_F194_LEN; i++) + { + buffer[i] = g_sysdid_f194[i]; + } + } + *respSize = SYSDID_F194_LEN; + return resCode; +} + +/* 22 F195 */ +/* software detailed design ID: BSWDD110225*/ +bl_ResponseCode_t Adpt_UdsCallBackRead_f195_sw_version_num(bl_BufferSize_t size, + bl_Buffer_t *buffer, + bl_BufferSize_t *respSize) +{ + bl_ResponseCode_t resCode = DCM_E_POSITIVERESPONSE; + (void)size; + + //resCode = DCM_E_CONDITIONSNOTCORRECT; + (void)cal_read_did(0xF195u,(u8*)&buffer[0],SYSDID_F195_CK_LEN); + *respSize = SYSDID_F195_LEN; + return resCode; +} + +/* 22 F198 */ +/* software detailed design ID: BSWDD110226*/ +bl_ResponseCode_t Adpt_UdsCallBackReadFingerprint(bl_BufferSize_t size, + bl_Buffer_t *buffer, + bl_BufferSize_t *respSize) +{ + //u8 i; + bl_ResponseCode_t resCode = DCM_E_POSITIVERESPONSE; + //bl_Return_t ret = BL_ERR_OK; + u8 l_crc; + (void)size; + /*read fingerprint.*/ + #ifdef FLASH_DRIVER_READ + buffer[0] = g_boot_read_sx[0]; + #endif + (void)cal_read_did(0xF198u,(u8*)&buffer[0],SYSDID_F198_REPAIR_SN_CK_LEN); + l_crc = crc_8_make(buffer,SYSDID_F198_REPAIR_SN_LEN); + if(l_crc == buffer[SYSDID_F198_REPAIR_SN_LEN]) //校验正确 + { + //如果是正确的 + } + else + { + //pu8Data[0]=0; + //如果是错误的--也认为未写入 + #ifdef DEBUG_APP_DCM_EN + g_debug_app_dcm.crc_error_count++; + #endif + } + *respSize = SYSDID_F198_REPAIR_SN_LEN; + return resCode; +} + + +/* 22 F199 */ +/* software detailed design ID: BSWDD110227*/ +bl_ResponseCode_t Adpt_UdsCallBackReadProgrammingDate(bl_BufferSize_t size, + bl_Buffer_t *buffer, + bl_BufferSize_t *respSize) +{ + bl_ResponseCode_t resCode = DCM_E_POSITIVERESPONSE; + u8 l_crc; + (void)size; + (void)cal_read_did(0xF199u,(u8*)&buffer[0],SYSDID_F199_DATE_CK_LEN); + l_crc = crc_8_make(buffer,SYSDID_F199_DATE_LEN); + if(l_crc == buffer[SYSDID_F199_DATE_LEN]) //校验正确 + { + //如果是正确的 + } + else + { + //pu8Data[0]=0; + //如果是错误的--也认为未写入 + #ifdef DEBUG_APP_DCM_EN + g_debug_app_dcm.crc_error_count++; + #endif + } + *respSize = SYSDID_F199_DATE_LEN; + return resCode; +} + + + +/* 22 F19E */ +/* software detailed design ID: BSWDD110228*/ +bl_ResponseCode_t Adpt_UdsCallBackRead_f19E_odx_id(bl_BufferSize_t size, + bl_Buffer_t *buffer, + bl_BufferSize_t *respSize) +{ + bl_ResponseCode_t resCode = DCM_E_POSITIVERESPONSE; + //bl_u8_t i; + (void)size; + (void)cal_read_did(0xF19eu,(u8*)&buffer[0],SYSDID_F19E_CK_LEN); + *respSize = SYSDID_F19E_LEN; + return resCode; +} + + +/* 22 F1F1 */ +/* software detailed design ID: BSWDD110229*/ +bl_ResponseCode_t Adpt_UdsCallBackRead_F1F1_ecu_cal_num(bl_BufferSize_t size, + bl_Buffer_t *buffer, + bl_BufferSize_t *respSize) +{ + bl_ResponseCode_t resCode = DCM_E_POSITIVERESPONSE; + (void)size; + + //resCode = DCM_E_CONDITIONSNOTCORRECT; + (void)cal_read_did(0xF1f1u,(u8*)&buffer[0],SYSDID_F1F1_CK_LEN); + *respSize = SYSDID_F1F1_LEN; + return resCode; +} + +/* 22 F1F2*/ +/* software detailed design ID: BSWDD110230*/ +bl_ResponseCode_t Adpt_UdsCallBackRead_F1F2_boot_sw_id(bl_BufferSize_t size, + bl_Buffer_t *buffer, + bl_BufferSize_t *respSize) +{ + bl_ResponseCode_t resCode = DCM_E_POSITIVERESPONSE; + //bl_u8_t i; + (void)size; + + (void)cal_read_did(0xF1f2u,(u8*)&buffer[0],SYSDID_F1F2_CK_LEN); + *respSize = SYSDID_F1F2_LEN; + return resCode; +} + +/* 22 01a0*/ +/* software detailed design ID: BSWDD110231*/ +bl_ResponseCode_t Adpt_UdsCallBackRead_01a0_manulifecount(bl_BufferSize_t size, + bl_Buffer_t *buffer, + bl_BufferSize_t *respSize) +{ + bl_ResponseCode_t resCode = DCM_E_POSITIVERESPONSE; + u8 l_crc; + u8 l_buf[2]; + (void)size; + (void)cal_read_did(0x01A0u,(u8*)&l_buf[0],SYSDID_MANUFAC_LIFECYCLE_COUNT_CK_LEN); + l_buf[0] = security_access_get_mclf_cycle_counter(); + l_crc = crc_8_make(&l_buf[0],1); + if(l_crc == l_buf[1]) + { + buffer[0] = security_access_get_mclf_cycle_counter();; + } + else + { + buffer[0] = security_access_get_mclf_cycle_counter();; + } + *respSize = SYSDID_MANUFAC_LIFECYCLE_COUNT_LEN; + return resCode; +} + +/* 22 Fe01*/ +/* software detailed design ID: BSWDD110232*/ +bl_ResponseCode_t Adpt_UdsCallBackRead_FE01_device_id(bl_BufferSize_t size, + bl_Buffer_t *buffer, + bl_BufferSize_t *respSize) +{ + bl_ResponseCode_t resCode = DCM_E_POSITIVERESPONSE;//DCM_E_SUBFUNCTIONNOTSUPPORTED; + (void)size; + #if 1//8 + //(void)flash_read_bytes(0xFFFE08,buffer,8); + //buffer[8] = FSEC; + *respSize = 9; + #else + //flash_read_bytes(0xFFFE00,buffer,16); + //buffer[16] = FSEC; + *respSize = 17; + #endif + resCode = DCM_E_POSITIVERESPONSE; + return resCode; +} + + +bl_u8_t g_cur_request_level =0; //當前請求的等級 + +/**************************************************************************//** + * + * \details Callback of getting seed. + * + * \param[in] size - the data size, not include id, subid and did. + * \param[in/out] buffer - the pointer of data. + * \param[out] respSize - the size of response data. + * + * \return Return response code. + * + * \retval 0x00 - Positive response code. + * \retval others - Negative response code. + * + * \since V3.0.0 + * + *****************************************************************************/ +bl_ResponseCode_t Adpt_UdsCallbackGetSeedForLevel1(bl_BufferSize_t size, + bl_Buffer_t *buffer, + bl_BufferSize_t *respSize) +{ + bl_ResponseCode_t resCode = DCM_E_POSITIVERESPONSE; + bl_Return_t ret; +#if(ADPT_FUN_DELAY_WITH_CONTINUOUS_SEED == BL_FUN_ON) + bl_u16_t remainCount = 0; +#endif + + (void)size; + + do + { + #if 0 //為什麼 FE-5HA把這個給去掉了 + /*judge wheter security access is available.*/ + ret = Adpt_IsAccessible(&gs_UdsPrivateData.delay); + if (ret != BL_ERR_OK) + { + resCode = DCM_E_REQUIREDTIMEDELAYNOTEXPIRED; + break; + } + #endif + ret = Rte_IsValidStatus(&g_DownContext, DCM_STATUS_SECURITY_UNLOCK_1); + if(BL_ERR_OK == ret) + { + /*when unlock, return seed 0x00u.*/ + Bl_MemSet(buffer,0,(bl_Size_t)SECM_ACCESS_SEED_SIZE); + break; + } + /*If a seed is requested, return it.*/ + ret = Rte_IsValidStatus(&g_DownContext, DCM_STATUS_SECURITY_WAITKEY_1); + if(BL_ERR_OK == ret) + { +#if(ADPT_FUN_DELAY_WITH_CONTINUOUS_SEED == BL_FUN_ON) + /*if always request seed, decrease attemptcount.*/ + remainCount = Adpt_DecreaseAttemptCount(&gs_UdsPrivateData.delay); + if(remainCount == 0x00u) + { +#if(ADPT_FUN_SAVE_DELAY_FLAG == BL_FUN_ON) + /*set security access delay flag.*/ + (void)Dm_WriteDefaultData(gs_UdsPrivateData.delay.delayFlagId); +#endif + + Rte_SetMutexDownStatus(&g_DownContext, + DCM_STATUS_SECURITY_LOCK_1, + DCM_SECURITYACCESS_1_MASK); + + resCode = DCM_E_EXCEEDNUMBEROFATTEMPTS; + break; + } +#endif + /*return the last seed.*/ + Secm_GetSeed(buffer); + + break; + } + + /*request a new seed.*/ + Secm_MakeNewSeed(); + /*Copy the seed to buffer*/ + Secm_GetSeed(buffer); + /*set wait key status.*/ + Rte_SetDownStatus(&g_DownContext, DCM_STATUS_SECURITY_WAITKEY_1); + + g_cur_request_level = 0u; // 0就是mask數組中的第一等級 + + }while(0);/*lint !e717*/ + + *respSize = SECM_ACCESS_SEED_SIZE; + + return resCode; +} + + +/**************************************************************************//** + * + * \details Callback of getting seed. + * + * \param[in] size - the data size, not include id, subid and did. + * \param[in/out] buffer - the pointer of data. + * \param[out] respSize - the size of response data. + * + * \return Return response code. + * + * \retval 0x00 - Positive response code. + * \retval others - Negative response code. + * + * \since V3.0.0 + * + *****************************************************************************/ +/* software detailed design ID: BSWDD110234*/ +bl_ResponseCode_t Adpt_UdsCallbackGetSeedForLevel5(bl_BufferSize_t size, + bl_Buffer_t *buffer, + bl_BufferSize_t *respSize) +{ + bl_ResponseCode_t resCode = DCM_E_POSITIVERESPONSE; + bl_Return_t ret; +#if(ADPT_FUN_DELAY_WITH_CONTINUOUS_SEED == BL_FUN_ON) + bl_u16_t remainCount = 0; +#endif + + (void)size; + + do + { + #if 0 //為什麼 FE-5HA把這個給去掉了 + /*judge wheter security access is available.*/ + ret = Adpt_IsAccessible(&gs_UdsPrivateData.delay); + if (ret != BL_ERR_OK) + { + resCode = DCM_E_REQUIREDTIMEDELAYNOTEXPIRED; + break; + } + #endif + ret = Rte_IsValidStatus(&g_DownContext, DCM_STATUS_SECURITY_UNLOCK_2); + if(BL_ERR_OK == ret) + { + /*when unlock, return seed 0x00u.*/ + Bl_MemSet(buffer,0,(bl_Size_t)SECM_ACCESS_SEED_SIZE); + break; + } + /*If a seed is requested, return it.*/ + ret = Rte_IsValidStatus(&g_DownContext, DCM_STATUS_SECURITY_WAITKEY_2); + if(BL_ERR_OK == ret) + { +#if(ADPT_FUN_DELAY_WITH_CONTINUOUS_SEED == BL_FUN_ON) + /*if always request seed, decrease attemptcount.*/ + remainCount = Adpt_DecreaseAttemptCount(&gs_UdsPrivateData.delay); + if(remainCount == 0x00u) + { +#if(ADPT_FUN_SAVE_DELAY_FLAG == BL_FUN_ON) + /*set security access delay flag.*/ + (void)Dm_WriteDefaultData(gs_UdsPrivateData.delay.delayFlagId); +#endif + + Rte_SetMutexDownStatus(&g_DownContext, + DCM_STATUS_SECURITY_LOCK_2, + DCM_SECURITYACCESS_2_MASK); + + resCode = DCM_E_EXCEEDNUMBEROFATTEMPTS; + break; + } +#endif + /*return the last seed.*/ + Secm_GetSeed(buffer); + + break; + } + + /*request a new seed.*/ + Secm_MakeNewSeed(); + /*Copy the seed to buffer*/ + Secm_GetSeed(buffer); + /*set wait key status.*/ + Rte_SetDownStatus(&g_DownContext, DCM_STATUS_SECURITY_WAITKEY_2); + + g_cur_request_level = 2; // 2就是mask數組中的第五等級 + + }while(0);/*lint !e717*/ + + *respSize = SECM_ACCESS_SEED_SIZE; + + return resCode; +} + +/**************************************************************************//** + * + * \details Callback of verifying key. + * + * \param[in] size - the data size, not include id, subid and did. + * \param[in/out] buffer - the pointer of data. + * \param[out] respSize - the size of response data. + * + * \return Return response code. + * + * \retval 0x00 - Positive response code. + * \retval others - Negative response code. + * + * \since V3.0.0 + * + *****************************************************************************/ +/*lint -e{818}*/ +bl_ResponseCode_t Adpt_UdsCallbackVerifyKeyForLevel1(bl_BufferSize_t size, + bl_Buffer_t *buffer, + bl_BufferSize_t *respSize) +{ + bl_u16_t remainCount; + bl_ResponseCode_t resCode = DCM_E_POSITIVERESPONSE; + bl_Return_t ret; + + do + { + ret = Rte_IsValidStatus(&g_DownContext, + DCM_STATUS_SECURITY_WAITKEY_1); + if (ret != BL_ERR_OK) + { + resCode = DCM_E_REQUESTSEQUENCEERROR; + break; + } + + /*verify key.*/ + ret = Secm_VerifyKey((bl_Size_t)size,buffer); + if (ret != BL_ERR_OK) + { + remainCount = Adpt_DecreaseAttemptCount(&gs_UdsPrivateData.delay); //相當於 等 attemptCount 操作次數 Adpt_DecreaseAttemptCount + if (0x00u == remainCount) + { +#if(ADPT_FUN_SAVE_DELAY_FLAG == BL_FUN_ON) + /*set security access delay flag.*/ + (void)Dm_WriteDefaultData(gs_UdsPrivateData.delay.delayFlagId); +#endif + Rte_SetMutexDownStatus(&g_DownContext, + DCM_STATUS_SECURITY_LOCK_1, + DCM_SECURITYACCESS_1_MASK); + + resCode = DCM_E_EXCEEDNUMBEROFATTEMPTS; + } + else + { + resCode = DCM_E_INVALIDKEY; + } + + break; + } + *respSize = 0x00u; + Rte_SetMutexDownStatus(&g_DownContext, + DCM_STATUS_SECURITY_UNLOCK_1, + DCM_SECURITYACCESS_1_MASK); //从0x512 变成 0x212 + + }while(0);/*lint !e717*/ + + return resCode; +} + + +/*lint -e{818}*/ +/* software detailed design ID: BSWDD110236*/ +bl_ResponseCode_t Adpt_UdsCallbackVerifyKeyForLevel5(bl_BufferSize_t size, + bl_Buffer_t *buffer, + bl_BufferSize_t *respSize) +{ + bl_u16_t remainCount; + bl_ResponseCode_t resCode = DCM_E_POSITIVERESPONSE; + bl_Return_t ret; + + do + { + ret = Rte_IsValidStatus(&g_DownContext, + DCM_STATUS_SECURITY_WAITKEY_2); + if (ret != BL_ERR_OK) + { + resCode = DCM_E_REQUESTSEQUENCEERROR; + break; + } + + /*verify key.*/ + ret = Secm_VerifyKey((bl_Size_t)size,buffer); + if (ret != BL_ERR_OK) + { + remainCount = Adpt_DecreaseAttemptCount(&gs_UdsPrivateData.delay); //相當於 等 attemptCount 操作次數 Adpt_DecreaseAttemptCount + if (0x00u == remainCount) + { +#if(ADPT_FUN_SAVE_DELAY_FLAG == BL_FUN_ON) + /*set security access delay flag.*/ + (void)Dm_WriteDefaultData(gs_UdsPrivateData.delay.delayFlagId); +#endif + Rte_SetMutexDownStatus(&g_DownContext, + DCM_STATUS_SECURITY_LOCK_2, + DCM_SECURITYACCESS_2_MASK); + + resCode = DCM_E_EXCEEDNUMBEROFATTEMPTS; + } + else + { + resCode = DCM_E_INVALIDKEY; + } + + break; + } + *respSize = 0x00u; + Rte_SetMutexDownStatus(&g_DownContext, + DCM_STATUS_SECURITY_UNLOCK_2, + DCM_SECURITYACCESS_2_MASK); + }while(0);/*lint !e717*/ + + return resCode; +} + + + +/**************************************************************************//** + * + * \details Callback of getting seed. + * + * \param[in] size - the data size, not include id, subid and did. + * \param[in/out] buffer - the pointer of data. + * \param[out] respSize - the size of response data. + * + * \return Return response code. + * + * \retval 0x00 - Positive response code. + * \retval others - Negative response code. + * + * \since V3.0.0 + * + *****************************************************************************/ +/* software detailed design ID: BSWDD110233*/ +bl_ResponseCode_t Adpt_UdsCallbackGetSeedForLevel23(bl_BufferSize_t size, + bl_Buffer_t *buffer, + bl_BufferSize_t *respSize) +{ + bl_ResponseCode_t resCode = DCM_E_POSITIVERESPONSE; + bl_Return_t ret; +#if(ADPT_FUN_DELAY_WITH_CONTINUOUS_SEED == BL_FUN_ON) + bl_u16_t remainCount = 0; +#endif + + (void)size; + #if 0 + do + { + #if 1 //為什麼 FE-5HA把這個給去掉了 + /*judge wheter security access is available.*/ + ret = bl_access_supply_get_lock(); + if (ret != BL_ERR_OK) + { + resCode = DCM_E_REQUIREDTIMEDELAYNOTEXPIRED; + break; + } + #endif + ret = Rte_IsValidStatus(&g_DownContext, DCM_STATUS_SECURITY_UNLOCK_3); + if(BL_ERR_OK == ret) + { + /*when unlock, return seed 0x00u.*/ + Bl_MemSet(buffer,0,(bl_Size_t)SECM_ACCESS_SEED_SIZE); + break; + } + /*If a seed is requested, return it.*/ + ret = Rte_IsValidStatus(&g_DownContext, DCM_STATUS_SECURITY_WAITKEY_3); + if(BL_ERR_OK == ret) + { +#if(ADPT_FUN_DELAY_WITH_CONTINUOUS_SEED == BL_FUN_ON) + /*if always request seed, decrease attemptcount.*/ + remainCount = bl_access_supply_inc_attemptCount(); + if(remainCount == 0x00u) + { +#if(ADPT_FUN_SAVE_DELAY_FLAG == BL_FUN_ON) + /*set security access delay flag.*/ + (void)Dm_WriteDefaultData(gs_UdsPrivateData.delay.delayFlagId); +#endif + + Rte_SetMutexDownStatus(&g_DownContext, + DCM_STATUS_SECURITY_LOCK_3, + DCM_SECURITYACCESS_3_MASK); + + resCode = DCM_E_EXCEEDNUMBEROFATTEMPTS; + break; + } +#endif + /*return the last seed.*/ + //Secm_GetSeed(buffer); + Acc_UdsDemoGetSeed_supply(buffer); + break; + } + + /*request a new seed.*/ + //Secm_MakeNewSeed(); + /*Copy the seed to buffer*/ + //Secm_GetSeed(buffer); + Acc_UdsDemoGetSeed_supply(buffer); + /*set wait key status.*/ + Rte_SetDownStatus(&g_DownContext, DCM_STATUS_SECURITY_WAITKEY_3); + + g_cur_request_level = 0x23; // 0就是mask數組中的第一等級 + + }while(0);/*lint !e717*/ + *respSize = SECM_ACCESS_SEED_SIZE; + #else + resCode = DCM_E_SUBFUNCTIONNOTSUPPORTEDINACTIVESESSION; + #endif + return resCode; +} + +/*lint -e{818}*/ +/* software detailed design ID: BSWDD110235*/ +bl_ResponseCode_t Adpt_UdsCallbackVerifyKeyForLevel24(bl_BufferSize_t size, + bl_Buffer_t *buffer, + bl_BufferSize_t *respSize) +{ + bl_u16_t remainCount; + bl_ResponseCode_t resCode = DCM_E_POSITIVERESPONSE; + bl_Return_t ret; + #if 0 + do + { + ret = Rte_IsValidStatus(&g_DownContext, + DCM_STATUS_SECURITY_WAITKEY_3); + if (ret != BL_ERR_OK) + { + resCode = DCM_E_REQUESTSEQUENCEERROR; + break; + } + + /*verify key.*/ + ret = Acc_UdsDemoVerifyKey_for_supply((bl_Size_t)size,buffer); // Secm_VerifyKey + if (ret != BL_ERR_OK) + { + remainCount = bl_access_supply_get_attemptCount();//相當於 等 attemptCount 操作次數 + if (0x00u == remainCount) + { +#if(ADPT_FUN_SAVE_DELAY_FLAG == BL_FUN_ON) + /*set security access delay flag.*/ + (void)Dm_WriteDefaultData(gs_UdsPrivateData.delay.delayFlagId); +#endif + Rte_SetMutexDownStatus(&g_DownContext, + DCM_STATUS_SECURITY_LOCK_1, + DCM_SECURITYACCESS_1_MASK); + + resCode = DCM_E_EXCEEDNUMBEROFATTEMPTS; + } + else + { + resCode = DCM_E_INVALIDKEY; + } + + break; + } + bl_access_supply_clear_attemptCount(); //校驗成功，清除次數 + *respSize = 0x00u; + Rte_SetMutexDownStatus(&g_DownContext, + DCM_STATUS_SECURITY_UNLOCK_3, + DCM_SECURITYACCESS_3_MASK); //从0x512 变成 0x212 + + }while(0);/*lint !e717*/ + #endif + resCode = DCM_E_SUBFUNCTIONNOTSUPPORTEDINACTIVESESSION; + return resCode; +} + + +/**************************************************************************//** + * + * \details Callback of enable or disable communication. + * + * \param[in] size - the data size, not include id, subid and did. + * \param[in/out] buffer - the pointer of data. + * \param[out] respSize - the size of response data. + * + * \return Return response code. + * + * \retval DCM_E_POSITIVERESPONSE - Positive response code. + * \retval DCM_E_REQUESTOUTOFRANGE - Negative response code. + * + * \since V3.0.0 + * + *****************************************************************************/ +/*lint -e{818}*/ +bl_ResponseCode_t Adpt_UdsCallback28(bl_BufferSize_t size, + bl_Buffer_t *buffer, + bl_BufferSize_t *respSize) +{ + bl_ResponseCode_t resCode = DCM_E_POSITIVERESPONSE; + + (void)size; + /*if(ADPT_COMMCONTROLTYPE_DATA != buffer[0])*/ + if((ADPT_COMMCONTROLTYPE_DATA != buffer[0]) && (0x3u != buffer[0])) // buffer[0]！=ADPT_COMMCONTROLTYPE_DATA是01 且不等於03 + { + resCode = DCM_E_REQUESTOUTOFRANGE; //回復 31 + } + else + { + *respSize = 0x00u; + } + + + return resCode; +} + +/**************************************************************************//** + * + * \details Callback of writting fingerprint. + * + * \param[in] size - the data size, not include id, subid and did. + * \param[in/out] buffer - the pointer of data. + * \param[out] respSize - the size of response data. + * + * \return Return response code. + * + * \retval 0x00 - Positive response code. + * \retval others - Negative response code. + * + * \since V3.0.0 + * + *****************************************************************************/ +/*lint -e{818}*/ //F198 +/* software detailed design ID: BSWDD110238*/ +bl_ResponseCode_t Adpt_UdsCallBackWriteFingerprint(bl_BufferSize_t size, + bl_Buffer_t *buffer, + bl_BufferSize_t *respSize) +{ + bl_ResponseCode_t resCode = DCM_E_GENERALPROGRAMMINGFAILURE; + //bl_Return_t ret; + u8 l_crc; + (void)size; + /*write fingerprint data.*/ + #if (LBM_FUN_SAVE_FINGERPRINT == BL_FUN_ON) + //(void)IntEeprom_WriteBytes(EEPROM_START_ADDRESS, buffer, RTE_FINGERPRINT_SIZE); + #endif + l_crc = crc_8_make(buffer,SYSDID_F198_REPAIR_SN_LEN); + buffer[SYSDID_F198_REPAIR_SN_LEN] = l_crc; + (void)cal_write_did(0xf198u,(u8*)&buffer[0],SYSDID_F198_REPAIR_SN_CK_LEN); + //eeprom_write_u8(SYSDID_F198_REPAIR_SN_ADDR,buffer,SYSDID_F198_REPAIR_SN_LEN); + Rte_SetDownStatus(&g_DownContext, RTE_SYSFLAG_WRITE_FINGPRINT); + *respSize = 0u; + resCode = DCM_E_POSITIVERESPONSE; + return resCode; +} + + +bl_ResponseCode_t Adpt_UdsCallBackWriteProgrammingDate(bl_BufferSize_t size, + bl_Buffer_t *buffer, + bl_BufferSize_t *respSize) +{ + bl_ResponseCode_t resCode = DCM_E_GENERALPROGRAMMINGFAILURE; +// bl_Return_t ret; + u8 l_crc; + bl_u8_t l_result; + (void)size; + /*write PGM date TO RAM */ + #if (LBM_FUN_SAVE_PROGRAMMING_DATE == BL_FUN_ON) + //(void)IntEeprom_WriteBytes(EEPROM_START_ADDRESS+0x14, buffer, RTE_PGM_DATE_SIZE); + //(void)EEPROM_SetWord((EEPROM_TAddress)(EEPROM_DATA_BASE_ADDR+EEPROM_START_ADDRESS+0x14), ((bl_u16_t)(buffer[0]<<8))|buffer[0]); + //(void)EEPROM_SetWord((EEPROM_TAddress)(EEPROM_DATA_BASE_ADDR+EEPROM_START_ADDRESS+0x16), ((bl_u16_t)(buffer[2]<<8))|buffer[3]); + #endif + l_crc = crc_8_make(buffer,SYSDID_F199_DATE_LEN); + buffer[SYSDID_F199_DATE_LEN] = l_crc; + (void)cal_write_did(0xf199u,(u8*)&buffer[0],SYSDID_F199_DATE_CK_LEN); + //eeprom_write_u8(SYSDID_F199_DATE_ADDR,buffer,SYSDID_F199_DATE_LEN); + l_result = check_date_valid(buffer); + if(l_result == FALSE) + { + resCode = DCM_E_REQUESTOUTOFRANGE; + //*respSize = 0u; + } + else + { + Rte_SetDownStatus(&g_DownContext, RTE_SYSFLAG_WRITE_OTHER); + *respSize = 0u; + resCode = DCM_E_POSITIVERESPONSE; + } + return resCode; +} + + + +/**************************************************************************//** + * + * \details Callback of writting fingerprint. + * + * \param[in] size - the data size, not include id, subid and did. + * \param[in/out] buffer - the pointer of data. + * \param[out] respSize - the size of response data. + * + * \return Return response code. + * + * \retval 0x00 - Positive response code. + * \retval others - Negative response code. + * + * \since V3.0.0 + * + *****************************************************************************/ +/* software detailed design ID: BSWDD110240*/ +bl_ResponseCode_t Adpt_UdsCallBackWrite_F18C(bl_BufferSize_t size, + bl_Buffer_t *buffer, + bl_BufferSize_t *respSize) +{ + bl_ResponseCode_t resCode = DCM_E_GENERALPROGRAMMINGFAILURE; +// bl_Return_t ret; + u8 l_crc; + (void)size; + /*write fingerprint data.*/ + #if (LBM_FUN_SAVE_FINGERPRINT == BL_FUN_ON) + //(void)IntEeprom_WriteBytes(EEPROM_START_ADDRESS, buffer, RTE_FINGERPRINT_SIZE); + #endif + l_crc = crc_8_make(buffer,SYSDID_F18C_LEN); + buffer[SYSDID_F18C_LEN] = l_crc; + (void)cal_write_did(0xf18cu,(u8*)&buffer[0],SYSDID_F18C_CK_LEN); + //Rte_SetDownStatus(&g_DownContext, RTE_SYSFLAG_WRITE_FINGPRINT); + *respSize = 0u; + resCode = DCM_E_POSITIVERESPONSE; + return resCode; +} + + + +/**************************************************************************//** + * + * \details Callback of writting fingerprint. + * + * \param[in] size - the data size, not include id, subid and did. + * \param[in/out] buffer - the pointer of data. + * \param[out] respSize - the size of response data. + * + * \return Return response code. + * + * \retval 0x00 - Positive response code. + * \retval others - Negative response code. + * + * \since V3.0.0 + * + *****************************************************************************/ +/* software detailed design ID: BSWDD110241*/ +bl_ResponseCode_t Adpt_UdsCallBackWrite_F190(bl_BufferSize_t size, + bl_Buffer_t *buffer, + bl_BufferSize_t *respSize) +{ + bl_ResponseCode_t resCode = DCM_E_GENERALPROGRAMMINGFAILURE; +// bl_Return_t ret; + u8 l_crc; + (void)size; + /*write fingerprint data.*/ + #if (LBM_FUN_SAVE_FINGERPRINT == BL_FUN_ON) + //(void)IntEeprom_WriteBytes(EEPROM_START_ADDRESS, buffer, RTE_FINGERPRINT_SIZE); + #endif + l_crc = crc_8_make(buffer,SYSDID_F190_VIN_LEN); + buffer[SYSDID_F190_VIN_LEN] = l_crc; + (void)cal_write_did(0xf190u,(u8*)&buffer[0],SYSDID_F190_VIN_CK_LEN); + //eeprom_write_u8(SYSDID_F190_VIN_ADDR,buffer,SYSDID_F190_VIN_LEN); + *respSize = 0u; + resCode = DCM_E_POSITIVERESPONSE; + return resCode; +} + +/**************************************************************************//** + * + * \details Callback of writting fingerprint. + * + * \param[in] size - the data size, not include id, subid and did. + * \param[in/out] buffer - the pointer of data. + * \param[out] respSize - the size of response data. + * + * \return Return response code. + * + * \retval 0x00 - Positive response code. + * \retval others - Negative response code. + * + * \since V3.0.0 + * + *****************************************************************************/ +/* software detailed design ID: BSWDD110242*/ +bl_ResponseCode_t Adpt_UdsCallBackWrite_01a0_manulifecount(bl_BufferSize_t size, + bl_Buffer_t *buffer, + bl_BufferSize_t *respSize) +{ + bl_ResponseCode_t resCode = DCM_E_GENERALPROGRAMMINGFAILURE; + bl_Return_t ret; + u8 l_buf[2]; + (void)size; + /*write fingerprint data.*/ + #if (LBM_FUN_SAVE_FINGERPRINT == BL_FUN_ON) + //(void)IntEeprom_WriteBytes(EEPROM_START_ADDRESS, buffer, RTE_FINGERPRINT_SIZE); + #endif + #if 0 + ret = Rte_IsValidStatus(&g_DownContext, DCM_STATUS_SESSION_SUPPLY); + if(BL_ERR_OK == ret) + { + l_buf[0]=buffer[0]; + l_buf[1] = crc_8_make(&l_buf[0],1); //crc + (void)cal_write_did(0x01a0u,(u8*)&l_buf[0],SYSDID_MANUFAC_LIFECYCLE_COUNT_CK_LEN); + security_access_set_mclf_cycle_counter(l_buf[0]); + *respSize = 0u; + resCode = DCM_E_POSITIVERESPONSE; + } + else + { + if(buffer[0] ==SERVICE_27_MANULF_CYC_COUNT_VALID) //只能写入0 + { + l_buf[0]=buffer[0]; + l_buf[1] = crc_8_make(&l_buf[0],1); //crc + (void)cal_write_did(0x01a0u,(u8*)&l_buf[0],SYSDID_MANUFAC_LIFECYCLE_COUNT_CK_LEN); + security_access_set_mclf_cycle_counter(l_buf[0]); + *respSize = 0u; + resCode = DCM_E_POSITIVERESPONSE; + } + else + { + *respSize = 0u; + resCode = DCM_E_REQUESTOUTOFRANGE; + } + } + #endif + return resCode; +} + +/**************************************************************************//** + * + * \details Callback of writting fingerprint. + * + * \param[in] size - the data size, not include id, subid and did. + * \param[in/out] buffer - the pointer of data. + * \param[out] respSize - the size of response data. + * + * \return Return response code. + * + * \retval 0x00 - Positive response code. + * \retval others - Negative response code. + * + * \since V3.0.0 + * + *****************************************************************************/ +//static u8 g_buf_backdoo[16]; +/* software detailed design ID: BSWDD110242*/ +bl_ResponseCode_t Adpt_UdsCallBackWrite_fe01_backdoo_access_key(bl_BufferSize_t size, + bl_Buffer_t *buffer, + bl_BufferSize_t *respSize) +{ + bl_ResponseCode_t resCode = DCM_E_GENERALPROGRAMMINGFAILURE; + bl_Return_t ret; + //u8 l_buf[8]; + //u8 i; + bl_FlashDrvParam_t l_bl_flash_drv1; + (void)size; + + /*write fingerprint data.*/ + #if (LBM_FUN_SAVE_FINGERPRINT == BL_FUN_ON) + //(void)IntEeprom_WriteBytes(EEPROM_START_ADDRESS, buffer, RTE_FINGERPRINT_SIZE); + #endif + ret = Rte_IsValidStatus(&g_DownContext, DCM_STATUS_SESSION_SUPPLY); + if(BL_ERR_OK == ret) + { + l_bl_flash_drv1.size = 8u; + l_bl_flash_drv1.FeedDog = g_RteInfo.wdgOps->Feed;//(void*)0; + l_bl_flash_drv1.buffer = buffer; + #if 0 + Flash_backdoor(&l_bl_flash_drv1); + if(l_bl_flash_drv1.errCode == BL_ERR_OK) + { + *respSize = 0u; + resCode = DCM_E_POSITIVERESPONSE; + } + else + { + #if 0 + l_bl_flash_drv1.size = 0; + Flash_unsecure(&l_bl_flash_drv1); + if(l_bl_flash_drv1.errCode == BL_ERR_OK) + { + *respSize = 0u; + resCode = DCM_E_INVALIDKEY; //DCM_E_INVALIDKEY + } + else + { + *respSize = 0u; + resCode = DCM_E_GENERALPROGRAMMINGFAILURE; + } + #else + *respSize = 0u; + resCode = DCM_E_GENERALPROGRAMMINGFAILURE; + #endif + } + #else + *respSize = 0u; + resCode = DCM_E_POSITIVERESPONSE; + #endif + } + else + { + *respSize = 0u; + resCode = DCM_E_SECURITYACCESSDENIED; + } + + return resCode; +} + +/**************************************************************************//** + * + * \details Callback of checking programming contiditions. + * + * \param[in] size - the data size, not include id, subid and did. + * \param[in/out] buffer - the pointer of data. + * \param[out] respSize - the size of response data. + * + * \return Return response code. + * + * \retval 0x00 - Positive response code. + * \retval others - Negative response code. + * + * \since V3.0.0 + * + *****************************************************************************/ + +bl_ResponseCode_t Adpt_UdsCallbackCheckProgramCond(bl_BufferSize_t size, + bl_Buffer_t *buffer, + bl_BufferSize_t *respSize) +{ + bl_ResponseCode_t resCode = DCM_E_POSITIVERESPONSE; + + (void)size; + + *respSize = 0x01u; + buffer[0] = ADPT_ROUTINE_CORRECT_RESULT; + + return resCode; +} + +/**************************************************************************//** + * + * \details Callback of erasing memory. + * + * \param[in] size - the data size, not include id, subid and did. + * \param[in/out] buffer - the pointer of data. + * \param[out] respSize - the size of response data. + * + * \return Return response code. + * + * \retval 0x00 - Positive response code. + * \retval others - Negative response code. + * + * \since V3.0.0 + * + *****************************************************************************/ +bl_ResponseCode_t Adpt_UdsCallbackEraseMemory(bl_BufferSize_t size, + bl_Buffer_t *buffer, + bl_BufferSize_t *respSize) +{ + bl_Size_t eraseSize; + bl_Address_t address; + bl_ResponseCode_t resCode = DCM_E_CONDITIONSNOTCORRECT; + bl_Return_t ret; + + (void)size; + + if((bl_Buffer_t)ADPT_MEMORY_LENANDADDR_FORMAT + == buffer[ADPT_UDS_ERASE_MEMORY_FORMAT_POS]) + { + #if 1 + address = BL_BE32_TO_MCU(&buffer[ADPT_UDS_ERASE_MEMORY_ADDRESS_POS]); + eraseSize = BL_BE32_TO_MCU(&buffer[ADPT_UDS_ERASE_MEMORY_SIZE_POS]); + #else + address = LBM_LB1_ADDRESS; + eraseSize = LBM_LB1_SIZE; + #endif + gs_UdsPrivateData.serviceId = ADPT_UDS_31_SERVICE_ID; + _Adpt_TimeOutCallBack(ADPT_UDS_31_SERVICE_ID); //負響應78 + + ret = Adpt_EraseLB(&g_DownContext, address, eraseSize); + if(BL_ERR_OK == ret) + { + buffer[0] = ADPT_ROUTINE_CORRECT_RESULT; + } + else + { + Rte_ClearDownStatus(&g_DownContext, ADPT_UDS_STATUS_MASK); + buffer[0] = ADPT_ROUTINE_INCORRECT_RESULT; //*buffer = ADPT_ROUTINE_INCORRECT_RESULT; // + } + *respSize = 0x01u; + resCode = DCM_E_POSITIVERESPONSE; + } + return resCode; +} + +/**************************************************************************//** + * + * \details Callback of checksum. + * + * \param[in] size - the data size, not include id, subid and did. + * \param[in/out] buffer - the pointer of data. + * \param[out] respSize - the size of response data. + * + * \return Return response code. + * + * \retval 0x00 - Positive response code. + * \retval others - Negative response code. + * + * \since V3.0.0 + * + *****************************************************************************/ +bl_ResponseCode_t Adpt_UdsCallbackCheckSum(bl_BufferSize_t size, + bl_Buffer_t *buffer, + bl_BufferSize_t *respSize) +{ + bl_ResponseCode_t resCode = DCM_E_POSITIVERESPONSE; + bl_Return_t ret; + + gs_UdsPrivateData.serviceId = ADPT_UDS_31_SERVICE_ID; + _Adpt_TimeOutCallBack(ADPT_UDS_31_SERVICE_ID); + + ret = Adpt_VerifyData(&g_DownContext, (bl_Size_t)size, buffer); //这里需要改动，因为接口变了。 + if(BL_ERR_OK == ret) + { + buffer[0] = ADPT_ROUTINE_CORRECT_RESULT; //正确 + } + else if(BL_ERR_USER_CODE_01 == ret) + { + buffer[0] = ADPT_ROUTINE_INCORRECT_SIG_RESULT; //数字签名有错 2 + } + else + { + buffer[0] = ADPT_ROUTINE_INCORRECT_RESULT; //校验有错 1 + } + + Rte_ClearDownStatus(&g_DownContext, ADPT_UDS_STATUS_MASK); + + *respSize = 0x01u; + + return resCode; +} + +/**************************************************************************//** + * + * \details Callback of checking compatibility. + * + * \param[in] size - the data size, not include id, subid and did. + * \param[in/out] buffer - the pointer of data. + * \param[out] respSize - the size of response data. + * + * \return Return response code. + * + * \retval 0x00 - Positive response code. + * \retval others - Negative response code. + * + * \since V3.0.0 + * + *****************************************************************************/ +bl_ResponseCode_t Adpt_UdsCallbackCheckCompatibility(bl_BufferSize_t size, + bl_Buffer_t *buffer, + bl_BufferSize_t *respSize) +{ + bl_ResponseCode_t resCode = DCM_E_POSITIVERESPONSE; + bl_Return_t ret; + + (void)size; + + ret = Adpt_CheckCompatibility(); + if(BL_ERR_OK == ret) + { + buffer[0] = ADPT_ROUTINE_CORRECT_RESULT; + } + else + { + buffer[0] = ADPT_ROUTINE_INCORRECT_RESULT; + } + + _Adpt_UdsClearDownInfo(&gs_UdsPrivateData); + + *respSize = 0x01u; + + return resCode; +} + +#if (RTE_FUN_STAY_IN_BOOT == BL_FUN_ON) +/**************************************************************************//** + * + * \details Callback of stayinboot. + * + * \param[in] size - the data size, not include id, subid and did. + * \param[in/out] buffer - the pointer of data. + * \param[out] respSize - the size of response data. + * + * \return Return response code. + * + * \retval 0x00 - Positive response code. + * \retval others - Negative response code. + * + * \since V3.0.0 + * + *****************************************************************************/ +bl_ResponseCode_t Adpt_UdsCallbackStayInBoot(bl_BufferSize_t size, + bl_Buffer_t *buffer, + bl_BufferSize_t *respSize) +{ + bl_ResponseCode_t resCode = DCM_E_POSITIVERESPONSE; + + (void)buffer; + (void)size; + + *respSize = 0x00u; + + return resCode; +} +#endif + +/**************************************************************************//** + * + * \details Callback of requesting download. + * + * \param[in] size - the data size, not include id, subid and did. + * \param[in/out] buffer - the pointer of data. + * \param[out] respSize - the size of response data. + * + * \return Return response code. + * + * \retval 0x00 - Positive response code. + * \retval others - Negative response code. + * + * \since V3.0.0 + * + *****************************************************************************/ +bl_ResponseCode_t Adpt_UdsCallback34(bl_BufferSize_t size, + bl_Buffer_t *buffer, + bl_BufferSize_t *respSize) +{ + bl_Size_t reqSize; + bl_Address_t addr; + bl_ResponseCode_t resCode = DCM_E_POSITIVERESPONSE; + bl_Return_t ret; + + (void)size; + tFlashOptInfo *l_pstFlashOptInfo = (void *)0; + l_pstFlashOptInfo = (tFlashOptInfo *)flashDriverStartAdd; + + do + { + #ifdef FLASH_DRIVER_FAILED_RES_NES_FUNC + if(g_DownContext.lbId == /*LBM_LB1_ID_APP*/0) + { + if( (l_pstFlashOptInfo->magic != FLASH_DRIVER_VERSION_MAGIC ) || (l_pstFlashOptInfo->version != FLASH_DRIVER_VERSION_VERSION) ) + { + resCode = DCM_E_GENERALREJECT; + break; + } + } + #endif + ret = Rte_IsValidStatus(&g_DownContext, ADPT_STATUS_ALLOW_TRANS_DATA); + if(BL_ERR_OK == ret) + { + resCode = DCM_E_REQUESTSEQUENCEERROR; + break; + } + + if((ADPT_DATAFORMAT_IDEN != buffer[ADPT_UDS_34_SERVICE_IDEN_POS]) + || (ADPT_MEMORY_LENANDADDR_FORMAT + != buffer[ADPT_UDS_34_SERVICE_ADDRANDSIZE_POS])) + { + resCode = DCM_E_CONDITIONSNOTCORRECT; + break; + } + + addr = BL_BE32_TO_MCU(&buffer[ADPT_UDS_34_SERVICE_ADDRESS_POS]); + reqSize = BL_BE32_TO_MCU(&buffer[ADPT_UDS_34_SERVICE_SIZE_POS]); /*PRQA S 1840*/ + + ret = Adpt_ActivateDownload(&g_DownContext, addr, reqSize); + if(BL_ERR_OK == ret) + { + buffer[ADPT_UDS_34_RESPONSE_FORMAT_POS] = ADPT_LENFORMAT_IDEN; + +#if(1u == ADPT_IDEN_LEN_FORMAT) + /*get maxnum of block length.*/ + buffer[ADPT_UDS_34_RESPONSE_SIZE_POS] = ADPT_MAXNUM_OF_BLOCKLENGTH; +#elif (2u == ADPT_IDEN_LEN_FORMAT) + BL_MCU_TO_BE16(&buffer[ADPT_UDS_34_RESPONSE_SIZE_POS], + ADPT_MAXNUM_OF_BLOCKLENGTH); +#else +#error "ADPT_IDEN_LEN_FORMAT is error." +#endif + + gs_UdsPrivateData.address = addr; + gs_UdsPrivateData.remainSize = reqSize; + gs_UdsPrivateData.blockIndex = 0x01u; + + *respSize = ADPT_REQDOWNLOAD_RESPLENGTH; + + Rte_SetDownStatus(&g_DownContext, ADPT_STATUS_ALLOW_TRANS_DATA); + } + else + { + resCode = DCM_E_GENERALREJECT; + } + }while(0);/*lint !e717*/ + + if (resCode != DCM_E_POSITIVERESPONSE) + { + _Adpt_UdsClearDownInfo(&gs_UdsPrivateData); + } + return resCode; +} + +/**************************************************************************//** + * + * \details Callback of transferring data. + * + * \param[in] size - the data size, not include id, subid and did. + * \param[in/out] buffer - the pointer of data. + * \param[out] respSize - the size of response data. + * + * \return Return response code. + * + * \retval 0x00 - Positive response code. + * \retval others - Negative response code. + * + * \since V3.0.0 + * + *****************************************************************************/ +/*lint -e{818}*/ +bl_ResponseCode_t Adpt_UdsCallback36(bl_BufferSize_t size, + bl_Buffer_t *buffer, //這裡的數據，己經去掉了sid 或者 sudid did等 + bl_BufferSize_t *respSize) +{ + bl_u8_t expendIndex; + bl_Size_t dataSize; + bl_ResponseCode_t resCode = DCM_E_POSITIVERESPONSE; + bl_Return_t ret; + + dataSize = (bl_Size_t)((bl_Size_t)size - 1u); /*overflow checking is not required.*/ + + do + { + ret = Rte_IsValidStatus(&g_DownContext, ADPT_STATUS_ALLOW_TRANS_DATA); + if (ret != BL_ERR_OK) + { + resCode = DCM_E_REQUESTSEQUENCEERROR; + break; + } + + expendIndex = gs_UdsPrivateData.blockIndex; + + ret = Rte_IsValidStatus(&g_DownContext,ADPT_STATUS_SEGMENT_FIRST_DATA); + if(BL_ERR_NOT_OK == ret) + { + if (buffer[ADPT_UDS_36_SERVICE_INDEX_POS] != expendIndex) + { + resCode = DCM_E_WRONGBLOCKSEQUENCECOUNTER; //顺序 + break; + } + /*set first 0x36 service of a download segment.*/ + Rte_SetDownStatus(&g_DownContext, ADPT_STATUS_SEGMENT_FIRST_DATA); + } + +#if(ADPT_FUN_FIRST_DATA_PREPROCESS == BL_FUN_ON) + ret = Rte_IsValidStatus(&g_DownContext, ADPT_STATUS_BLOCK_FIRST_DATA); + if(BL_ERR_NOT_OK == ret) + { + + /*set first 0x36 service of a logical block.*/ + Rte_SetDownStatus(&g_DownContext, ADPT_STATUS_BLOCK_FIRST_DATA); + + App_PreprocessData(); + } +#endif + + /*check whether the SN is valid.*/ + if(buffer[ADPT_UDS_36_SERVICE_INDEX_POS] != expendIndex) + { + if (buffer[ADPT_UDS_36_SERVICE_INDEX_POS] != (expendIndex - 1u)) + { + resCode = DCM_E_WRONGBLOCKSEQUENCECOUNTER; + } + else + { + /*repeat request*/ + resCode = DCM_E_POSITIVERESPONSE; + } + break; + } + + /*Check the size of received data.*/ + if(gs_UdsPrivateData.remainSize > ADPT_MAXNUM_OF_TRANS_DATA) + { + /*It is not the last 0x36 service.*/ + if(ADPT_MAXNUM_OF_TRANS_DATA != dataSize) + { + resCode = DCM_E_INCORRECTMESSAGELENGTHORINVALIDFORMAT; + break; + } + } + else if(gs_UdsPrivateData.remainSize != dataSize) + { + resCode = DCM_E_INCORRECTMESSAGELENGTHORINVALIDFORMAT; + break; + } + else + { + /*last service and data size is ok.*/ + } + + /*send 0x78.*/ + gs_UdsPrivateData.serviceId = ADPT_UDS_36_SERVICE_ID; + _Adpt_TimeOutCallBack(ADPT_UDS_36_SERVICE_ID); + #ifdef UDS_DEBUG_EN + g_usd_test.data[0]++; + #endif + ret = Adpt_DownloadData(&g_DownContext, + gs_UdsPrivateData.address, + dataSize, + &buffer[ADPT_UDS_36_SERVICE_DATA_POS]); + if(BL_ERR_OK != ret) + { + resCode = DCM_E_GENERALPROGRAMMINGFAILURE; + break; + } + else + { + *respSize = 0x01u; + gs_UdsPrivateData.blockIndex++; + gs_UdsPrivateData.address += dataSize; + gs_UdsPrivateData.remainSize -= dataSize; + } + }while(0);/*lint !e717*/ + + if (resCode != DCM_E_POSITIVERESPONSE) + { + _Adpt_UdsClearDownInfo(&gs_UdsPrivateData); + } + + return resCode; +} + +/**************************************************************************//** + * + * \details Callback of requesting transfer exit. + * + * \param[in] size - the data size, not include id, subid and did. + * \param[in/out] buffer - the pointer of data. + * \param[out] respSize - the size of response data. + * + * \return Return response code. + * + * \retval 0x00 - Positive response code. + * \retval others - Negative response code. + * + * \since V3.0.0 + * + *****************************************************************************/ +bl_ResponseCode_t Adpt_UdsCallback37(bl_BufferSize_t size, + bl_Buffer_t *buffer, + bl_BufferSize_t *respSize) +{ + bl_ResponseCode_t resCode = DCM_E_POSITIVERESPONSE; + bl_Return_t ret; + + (void)buffer; + (void)size; + + ret = Rte_IsValidStatus(&g_DownContext, + ADPT_STATUS_ALLOW_TRANS_DATA); + if(BL_ERR_OK != ret) + { + _Adpt_UdsClearDownInfo(&gs_UdsPrivateData); + + resCode = DCM_E_REQUESTSEQUENCEERROR; + } + else + { + Rte_ClearDownStatus(&g_DownContext, + (ADPT_STATUS_SEGMENT_FIRST_DATA + | ADPT_STATUS_ALLOW_TRANS_DATA)); + *respSize = 0x00u; + } + #ifdef UDS_DEBUG_EN + g_usd_test.data[1]++; + #endif + return resCode; +} + +/**************************************************************************//** + * + * \details Callback of keeping session. + * + * \param[in] size - the data size, not include id, subid and did. + * \param[in/out] buffer - the pointer of data. + * \param[out] respSize - the size of response data. + * + * \return Return response code. + * + * \retval 0x00 - Positive response code. + * \retval others - Negative response code. + * + * \since V3.0.0 + * + *****************************************************************************/ +bl_ResponseCode_t Adpt_UdsCallback3E(bl_BufferSize_t size, + bl_Buffer_t *buffer, + bl_BufferSize_t *respSize) +{ + bl_ResponseCode_t resCode = DCM_E_POSITIVERESPONSE; + + (void)size; + (void)buffer; + +#if(RTE_FUN_GATEWAY == BL_FUN_ON) + _Adpt_UdsGatewayTransmit(ADPT_UDS_3E_SERVICE_ID); +#endif + + *respSize = 0x00u; + + return resCode; +} + +/**************************************************************************//** + * + * \details Callback of switching on of off dtc. + * + * \param[in] size - the data size, not include id, subid and did. + * \param[in/out] buffer - the pointer of data. + * \param[out] respSize - the size of response data. + * + * \return Return response code. + * + * \retval DCM_E_POSITIVERESPONSE - Positive response code. + * \retval DCM_E_SUBFUNCTIONNOTSUPPORTED - Negative response code. + * + * \since V3.0.0 + * + *****************************************************************************/ +bl_ResponseCode_t Adpt_UdsCallback85(bl_BufferSize_t size, + bl_Buffer_t *buffer, + bl_BufferSize_t *respSize) +{ + bl_ResponseCode_t resCode = DCM_E_POSITIVERESPONSE; + + (void)size; + (void)buffer; + + *respSize = 0x00u; + + return resCode; +} + +/**************************************************************************//** + * + * \details Timeout callback of sending 0x78. + * + * \param[in] id - service id. + * + * \since V3.0.0 + * 是靠 Rte_ReportEvent(RTE_EVENT_TYPE_MEMOPS_TIMEOUT); //要發送 78負響應 調用 的 + *****************************************************************************/ +void Adpt_UdsTimeOutCallBack(void) +{ + #ifdef UDS_DEBUG_EN + g_usd_test.time[4]++; + if(g_usd_test.time[4]>=1000) + { + g_usd_test.time[4]=0; + g_usd_test.time[5]++; + } + #endif + _Adpt_TimeOutCallBack(gs_UdsPrivateData.serviceId); + + return ; +} + + +// +void Adpt_Res_default_ValidProcess(void) +{ + bl_u8_t i; + bl_u8_t l_buf[ADPT_UDS_MAX_CAN_FRAME_SIZE]; + Dcm_StartS3Timer(); + + Rte_SetMutexDownStatus(&g_DownContext, + DCM_STATUS_SESSION_DEFAULT, + DCM_SESSION_MASK); + + for(i=0;i<8;i++) + { + l_buf[i] = gs_DefaultResponse[i]; + } + for(i=8;iaddress = 0; + adpt->remainSize = 0; + adpt->blockIndex = 0; + 再清 g_DownContext.state[0-1] + state[0]一般指#define RTE_SYSFLAG_SECURITY_ACCESS (0x00000001UL) + #define RTE_SYSFLAG_CHECK_SIGNATURE (0x00000002UL) + #define RTE_SYSFLAG_ERASE_BLOCK (0x00000004UL) + #define RTE_SYSFLAG_WRITE_DATA (0x00000008UL) + #define RTE_SYSFLAG_WRITE_FINGPRINT (0x00000010UL) //寫入金手指，具體是什麼？ + #define RTE_SYSFLAG_WRITE_OTHER (0x00000020UL) + state[1]一般指 RTE_USER_FLAG_GROUP_1 + 下面包含 ALLOW_TRANS_DATA ；BLOCK_FIRST_DATA ； SEGMENT_FIRST_DATA ; SEGMENT_FIRST_DATA + 所有 DCM診斷相關 + */ + +#if (DCM_FUN_SECURITY_ACCESS == BL_FUN_ON) + /*lock the level 1.*/ + Rte_SetMutexDownStatus(&g_DownContext, + DCM_STATUS_SECURITY_LOCK_1, //40000100 + DCM_SECURITYACCESS_1_MASK); //40000700 相當於清除其余兩個 再置 DCM_STATUS_SECURITY_LOCK_1 + /*lock the level 1.*/ + Rte_SetMutexDownStatus(&g_DownContext, + DCM_STATUS_SECURITY_LOCK_2, //40000100 + DCM_SECURITYACCESS_2_MASK); //40000700 相當於清除其余兩個 再置 DCM_STATUS_SECURITY_LOCK_1 + /*lock the level 1.*/ + Rte_SetMutexDownStatus(&g_DownContext, + DCM_STATUS_SECURITY_LOCK_3, //40000100 + DCM_SECURITYACCESS_3_MASK); //40000700 相當於清除其余兩個 再置 DCM_STATUS_SECURITY_LOCK_1 +#else + /*unlock the level 1.*/ + Rte_SetMutexDownStatus(&g_DownContext, + DCM_STATUS_SECURITY_UNLOCK_1, //40000200 + DCM_SECURITYACCESS_1_MASK); //40000700 相當於清除其余兩個 再置 DCM_SECURITYACCESS_1_MASK +#endif + Rte_SetMutexDownStatus(&g_DownContext, + sessionMask, // + DCM_SESSION_MASK); //40000007 相當於清除其余兩個 再置sessionMask + + return ; +} + +/**************************************************************************//** + * + * \details Clear the download information. + * + * \since V5.1.0 + * + *****************************************************************************/ +static void _Adpt_UdsClearDownInfo(bl_AdapterData_t *adpt) +{ + adpt->address = 0; + adpt->remainSize = 0; + adpt->blockIndex = 0; + + Rte_ClearDownStatus(&g_DownContext, ADPT_UDS_SYSTEM_STATUS_MASK); //1c state[0] + /* + (RTE_SYSFLAG_ERASE_BLOCK \ 4 + | RTE_SYSFLAG_WRITE_DATA) //8 + | RTE_SYSFLAG_WRITE_FINGPRINT 10 + */ + Rte_ClearDownStatus(&g_DownContext, ADPT_UDS_STATUS_MASK); //78000000 state[1] + /* + (ADPT_STATUS_ALLOW_TRANS_DATA \ + | ADPT_STATUS_BLOCK_FIRST_DATA \ + | ADPT_STATUS_SEGMENT_FIRST_DATA) //78000000 + */ + return ; +} + +/**************************************************************************//** + * + * \details Reset the system. + * + * \since V5.1.0 + * 好像沒有用到 + *****************************************************************************/ +static void _Adpt_UdsResetSystem(bl_u8_t sid, bl_u16_t flagId) +{ + bl_Return_t ret; + + ret = Dcm_IsSuspendedResponse(); //gs_SupPosRespFlag==0 + if (ret != BL_ERR_OK) + { + _Adpt_TimeOutCallBack(sid); + /*write flag.*/ + (void)Dm_WriteDefaultData(flagId); + } + + g_RteInfo.SystemReset(); +} + + + + + + + + +void adpt_test_init(void) +{ + (void)Dm_WriteDefaultData(BOOTM_REPROGRAM_FLAG_DID); +} + + +void adpt_secutiry_valid_all(void) +{ + Rte_SetMutexDownStatus(&g_DownContext, + DCM_STATUS_SECURITY_UNLOCK_1, + DCM_SECURITYACCESS_1_MASK); //从0x512 变成 0x212 + Rte_SetMutexDownStatus(&g_DownContext, + DCM_STATUS_SECURITY_UNLOCK_2, + DCM_SECURITYACCESS_2_MASK); //从0x512 变成 0x212 +} + + +u8 check_date_valid(u8 *p_date) +{ + u16 l_year; + u8 l_result = TRUE; + u8 l_data[4]; + u16 l_temp; + + #if 1 + + l_data[0] = p_date[0]; + l_data[1] = p_date[1]; + l_data[2] = p_date[2]; + l_data[3] = p_date[3]; + + /*日期合法的判斷*/ + if( (l_data[0]>0x99u) || (l_data[1]>0x99u) || (l_data[0]==0x00u) || (l_data[2]==0x00u) || (l_data[3]==0x00u) || (l_data[2]>0x12u) || (l_data[3]>0x31u) ) + { + l_result = FALSE; + } + else if( ( (l_data[2]==0x04u) || (l_data[2]==0x06u) || (l_data[2]==0x09u) || (l_data[2]==0x11u ) ) && (l_data[3]>0x30u) ) + { + l_result = FALSE; + } + else if( ( (l_data[2]==0x01u) || (l_data[2]==0x03u) || (l_data[2]==0x05u) || (l_data[2]==0x07u ) || (l_data[2]==0x08u )|| (l_data[2]==0x10u ) || (l_data[2]==0x12u )) && (l_data[3]>0x31u) ) + { + l_result = FALSE; + } + else if( l_data[2]==0x02u) + { + + l_temp = (u16)((u16)l_data[0] >> 4) ; + l_temp *= 1000u; + l_year = l_temp; + l_temp =(u16)((u16)l_data[0] & 0x0fu); + l_temp *= 100u; + l_year += l_temp; + l_temp =(u16)((u16)l_data[1] >> 4); + l_temp *= 10u; + l_year += l_temp; + l_temp =(u16)((u16)l_data[1] & 0x0fu) ; + l_year += l_temp; + + //l_year = (u16)(l_data[0] >> 4) * 1000 + (u16)(l_data[0] & 0x0f) * 100 + (u16)(l_data[1] >> 4) * 10 + (u16)(l_data[1] & 0x0f) ; + if( ( (l_year%4u) ==0u) && ( (l_year%100u) != 0u) || ( (l_year%400u) ==0u) ) /*PRQA S 3397*/ + { + l_temp = 0x29u; + } + else + { + l_temp = 0x28u; + } + + if(l_data[3]>l_temp) + { + l_result = FALSE; + } + else + { + l_result = TRUE; + } + + + } + else + { + //code + } + #endif + + return l_result; +} diff --git a/code_boot_out/asil/middle/autosar_bl/sources/spec/bl_app.c b/code_boot_out/asil/middle/autosar_bl/sources/spec/bl_app.c new file mode 100644 index 0000000..a58bb83 --- /dev/null +++ b/code_boot_out/asil/middle/autosar_bl/sources/spec/bl_app.c @@ -0,0 +1,125 @@ +/**************************************************************************//** + * + * \copyright This software is the property of Technologies. Any + * information contained in this doc should not be reproduced, + * or used, or disclosed without the written authorization from + * Technologies. + * + * \brief This is the source file of the application callback module. + * + * \file bl_app.c + * \ingroup application_callback_module + * \author + * + * \version 5.1.0 + * \date 27/03/2014 + * + * \par Changelist + * Version | Date | Authors | CR# | Descriptions + * -------- | ---------- | ---------------- | --- | ------------ + * 01.00.00 | 15/03/2010 | hewei.zhang | N/A | Boot010001 + * 02.00.00 | 11/05/2011 | mingqing.tang | N/A | Boot020001 + * 02.05.00 | 08/06/2011 | mingqing.tang | N/A | Boot020006 + * 05.00.00 | 19/06/2013 | xin.shang | N/A | Boot050001 + * 05.01.00 | 27/03/2014 | mingqing.tang | N/A | Boot050002 + * + *****************************************************************************/ +#include "bl_app.h" + +/***************************************************************************** + * QAC Suppression + *****************************************************************************/ +/*PRQA S 1503,1532,3112,3227,3673 EOF*/ +/* + * MISRA-C:2004 14.1(1503):The function is defined but is not used within this + * project. + * these functions will be used When correlative macro is enable. + * + * 1532:The function is only referenced in one translation unit. + * all functions in this file are used in the Booting and LBM Module. + * + * MISRA-C:2004 14.2(3112):This statement has no side-effect. + * App_GetIntegralityValue is reserved to future.(void)dct is used by IDE to + * avoid a warning. + * + * 3227:The parameter is never modified and so it could be declared with const. + * + * MISRA-C:2004 16.7(3673): the pointer could be of type 'pointer to const'. + * The App_GetIntegralityValue is used to get integrality value from the head + * of the application, so it will modify the buffer. + * + */ + +/***************************************************************************** + * Internal Macro Definitions + *****************************************************************************/ + +/***************************************************************************** + * Internal Type Definitions + *****************************************************************************/ + +/***************************************************************************** + * Internal Structure Definitions + *****************************************************************************/ + +/***************************************************************************** + * Internal Function Declarations + *****************************************************************************/ + +/***************************************************************************** + * Internal Variable Definitions + *****************************************************************************/ + +/***************************************************************************** + * Global Variable Definitions + *****************************************************************************/ + +/***************************************************************************** + * Function Definitions + *****************************************************************************/ +/**************************************************************************//** + * + * \details . + * + * \since V5.0.0 + * + *****************************************************************************/ +bl_Return_t App_PreprocessData(bl_DownContext_t *dct, + bl_Size_t size, + const bl_Buffer_t *buffer) +{ + (void)dct; + (void)size; + (void)buffer; + return BL_ERR_OK; +} + +/**************************************************************************//** + * + * \details . + * + * \since V2.0.0 + * + *****************************************************************************/ +bl_Return_t App_GetIntegralityValue(bl_DownContext_t *dct, + bl_Size_t *size, + bl_Buffer_t *buffer) +{ + (void)dct; + (void)size; + (void)buffer; + return BL_ERR_OK; +} + +/**************************************************************************//** + * + * \details . + * + * \since V2.0.0 + * + *****************************************************************************/ +bl_Return_t App_CheckCompatibility(void) +{ + return BL_ERR_OK; +} + diff --git a/code_boot_out/asil/middle/autosar_bl/sources/spec/bl_crc32_bzip2.c b/code_boot_out/asil/middle/autosar_bl/sources/spec/bl_crc32_bzip2.c new file mode 100644 index 0000000..c49318f --- /dev/null +++ b/code_boot_out/asil/middle/autosar_bl/sources/spec/bl_crc32_bzip2.c @@ -0,0 +1,320 @@ +/**************************************************************************//** + * + * \copyright This software is the property of Technologies. Any + * information contained in this doc should not be reproduced, + * or used, or disclosed without the written authorization from + * Technologies. + * + * \brief This is a head file of a crc algorithm, this algorithm is used + * by BZIP2. + * + * \file bl_crc32_bzip2.c + * \ingroup security_manager_module + * \author + * + * \version 5.1.0 + * \date 27/03/2018 + * + * \par Changelist + * Version | Date | Authors | CR# | Descriptions + * -------- | ---------- | ---------------- | --- | ------------ + * 01.00.00 | 25/03/2018 | xucong | N/A | Boot010001 + * + *****************************************************************************/ + +#include "bl_common.h" +#include "bl_security_funcfg.h" +#include "bl_crc32_bzip2.h" + + +/***************************************************************************** + * QAC Suppression + *****************************************************************************/ +/*PRQA S 506,602,1252,1532,2100,2103,3212,3227 EOF*/ +/* + * 506:Dereferencing pointer value that is possibly NULL. + * The parameter delay is not a null pointer. + * + * MISRA-C:2004 20.2(602):The identifier is reserved for use by the library. + * The Bootloader do not use any library funtion and use the underscores to + * indicate that the function is a interal function. + * + * 1252:suffixed integer constant implicitly converted to different integer. + * + * 1532:The function is only referenced in one translation unit. + * all functions in this file are configurations in the Security Module. + * + * 2100:Integral promotion : unsigned char promoted to signed int. + * + * 2103:Integral promotion, unsigned short promoted to unsigned int. + * This message will therefore only be generated when a short and an int are of + * equal size. + * + * 3212:This explicit cast is redundant and could be removed. + * BL_BE32_TO_MCU is not explicit cast. + * + * 3227:The parameter is never modified and so it could be declared with const. + * + */ + +/***************************************************************************** + * Verify The Configurations of Macro + *****************************************************************************/ +#if ((SECM_CRC_WIDTH != 32u) || (SECM_CRC_VALUE_SIZE != 4u)) +#error "This crc algorithm is not used for current security manager module." +#endif + +/***************************************************************************** + * Internal Macro Definitions + *****************************************************************************/ +#define BZIP2_CRC_SIZE_OPIMITE_MASK (0x0Fu) +#define BZIP2_CRC_SHIFT_BITS (SECM_CRC_WIDTH - BZIP2_CALCULATED_WIDTH) + +#define BZIP2_INIT_CRC_TABLE_MASK (0x80000000UL) +#define BZIP2_INIT_CRC_TABLE_SHIFT (24UL) +#define BZIP2_INIT_CRC_TABLE_BITS (8UL) + +#if (SECM_CRC_OPIMITE_BY_SIZE == BL_FUN_ON) //OFF +#define BZIP2_TABLE_SIZE (16UL) +#define BZIP2_CALCULATED_WIDTH (4UL) +#else +#define BZIP2_TABLE_SIZE (256u) //x@ +#define BZIP2_CALCULATED_WIDTH (8u) +#endif + + +/***************************************************************************** + * Internal Type Definitions + *****************************************************************************/ + +/***************************************************************************** + * Internal Structure Definitions + *****************************************************************************/ + +/***************************************************************************** + * Internal Function Declarations + *****************************************************************************/ +static void _Bzip2_InitTable(void); +static void Crc32_ieee802_3_init(void); +/***************************************************************************** + * Internal Variable Definitions + *****************************************************************************/ +STATIC bl_u32_t gs_bzip2CrcRemainder; //УĽY +STATIC bl_u32_t gs_bzip2CrcTable[BZIP2_TABLE_SIZE]; //256 +/***************************************************************************** + * Global Variable Definitions + *****************************************************************************/ + +/***************************************************************************** + * Function Definitions + *****************************************************************************/ + +#ifdef CRC32_ORG +//λת +static bl_u32_t Crc32_ieee802_3_bitrev(bl_u32_t input, bl_u16_t bw) +{ + bl_u16_t i; + bl_u32_t var = 0u; + bl_u32_t l_input = input; + for(i=0;i>=1; + } + return var; +} + + +// +//:X32+X26+...X1+1,poly=(1<<26)|...|(1<<1)|(1<<0) +void Crc32_ieee802_3_init(void) +{ + bl_u16_t i; + bl_u16_t j; + bl_u32_t c, poly; + poly = Crc32_ieee802_3_bitrev(CRC32_BZIP2_POLYNOMIAL,32); // + for(i=0u; i<256u; i++) + { + c = i; + for (j=0u; j<8u; j++) + { + if((c&1u)!=0u) + { + c=poly^(c>>1); + } + else + { + c=c>>1; + } + } + gs_bzip2CrcTable[i] = c; + } + //__asm( NOP); +} + + +#else + +/**************************************************************************//** + * + * \details Initialize the crc table of the bzip2 algorithm. + * + * \since V2.0.0 + * ĿǰҲûõ + *****************************************************************************/ +static void _Bzip2_InitTable(void) +{ + bl_u32_t l_remainder; + bl_u32_t dividend; + bl_u8_t bit; + + /* Compute the l_remainder of each possible dividend.*/ + for (dividend = 0; dividend < BZIP2_TABLE_SIZE; dividend++) + { + /* Start with the dividend followed by zeros.*/ + l_remainder = dividend << BZIP2_INIT_CRC_TABLE_SHIFT; + + /* Perform modulo-2 division, a bit at a time.*/ + for (bit = (bl_u8_t)BZIP2_INIT_CRC_TABLE_BITS; bit > 0u; --bit) + { + /* Try to divide the current data bit.*/ + if ((l_remainder & BZIP2_INIT_CRC_TABLE_MASK) != 0UL) + { + l_remainder = (l_remainder << 1) ^ CRC32_BZIP2_POLYNOMIAL; + } + else + { + l_remainder = (l_remainder << 1); + } + } + + /* Store the result into the table.*/ + gs_bzip2CrcTable[dividend] = l_remainder; + } + + return ; +} + + +#endif + +/**************************************************************************//** + * + * \details Initialize the bzip2 crc32 algorithm. + * + * \since V1.0.0 + * + *****************************************************************************/ +void Bzip2_Init(void) +{ +#ifdef CRC32_ORG + /* used for Geely DMS */ //ת + Crc32_ieee802_3_init(); +#else + _Bzip2_InitTable(); //ת Bzip2 +#endif +} + +/**************************************************************************//** + * + * \details Start the bzip2 crc32 algorithm. + * + * \since V1.0.0 + * + *****************************************************************************/ +void Bzip2_Start(void) +{ + gs_bzip2CrcRemainder = CRC32_BZIP2_INIT_VALUE; +} + +/**************************************************************************//** + * + * \details Update the crc value. + * + * \param[in] size - the size of data. + * \param[in] data - the value of data. + * + * \return If the crc value is calculated successfully return BL_ERR_OK, + * otherwise crc value BL_ERR_NOT_OK. + * + * \retval BL_ERR_OK - the crc value is calculated successfully. + * \retval BL_ERR_NOT_OK - the crc value is not calculated successfully. + * + * \since V1.0.0 + * + *****************************************************************************/ +bl_Return_t Bzip2_Update(bl_Size_t size, const bl_Buffer_t *data) +{ + //bl_Buffer_t tmp; + bl_Size_t i; + bl_u32_t crc = gs_bzip2CrcRemainder; + + for (i = 0; i < size; i++) + { + #ifdef CRC32_ORG /* only used for Geely DMS */ + //tmp = (bl_Buffer_t)(crc ^ data[i]); //tmp = (bl_Buffer_t)((crc ^ data[i]) & 0xffU); + crc = ((crc >> 8) ^ gs_bzip2CrcTable[(crc ^ data[i]) & 0xffu]); + #else + #if (SECM_CRC_OPIMITE_BY_SIZE == BL_FUN_ON) + tmp = (bl_Buffer_t)((crc >> BZIP2_CRC_SHIFT_BITS) + ^ ((data[i] >> BZIP2_CALCULATED_WIDTH) + & BZIP2_CRC_SIZE_OPIMITE_MASK)); + #else + tmp = (bl_Buffer_t)((crc >> BZIP2_CRC_SHIFT_BITS) ^ data[i]); + #endif + + crc = (crc << BZIP2_CALCULATED_WIDTH) ^ gs_bzip2CrcTable[tmp]; + + #if (SECM_CRC_OPIMITE_BY_SIZE == BL_FUN_ON) + tmp = (bl_Buffer_t)((crc >> BZIP2_CRC_SHIFT_BITS) + ^ (data[i] & BZIP2_CRC_SIZE_OPIMITE_MASK)); + crc = (crc << BZIP2_CALCULATED_WIDTH) ^ gs_bzip2CrcTable[tmp]; + #endif + #endif + } + gs_bzip2CrcRemainder = crc; + return BL_ERR_OK; +} + +/**************************************************************************//** + * + * \details The algorithm to calculate the crc value. + * + * \param[in] size - the size of data. + * \param[in] data - the value of data. + * + * \return If the crc value is right return BL_ERR_OK, otherwise return + * BL_ERR_NOT_OK. + * + * \retval BL_ERR_OK - the crc value is right. + * \retval BL_ERR_NOT_OK - the crc value is NOT right. + * + * \since V1.0.0 + * + *****************************************************************************/ +bl_Return_t Bzip2_Verify(bl_Size_t size, const bl_Buffer_t *hash) +{ + bl_Return_t ret = BL_ERR_NOT_OK; + bl_u32_t crc; + bl_u32_t tranCrc; + + if (SECM_CRC_VALUE_SIZE == size) + { + /* Finish the crc algorithm.*/ + crc = gs_bzip2CrcRemainder ^ CRC32_BZIP2_FINAL_XOR_VALUE; + /* Verify the crc value.*/ + tranCrc = BL_BE32_TO_MCU(hash); + + if (tranCrc == crc) + { + ret = BL_ERR_OK; + } + } + + return ret; +} + + diff --git a/code_boot_out/asil/middle/autosar_bl/sources/spec/bl_proc_passive_schedule.c b/code_boot_out/asil/middle/autosar_bl/sources/spec/bl_proc_passive_schedule.c new file mode 100644 index 0000000..0c496a6 --- /dev/null +++ b/code_boot_out/asil/middle/autosar_bl/sources/spec/bl_proc_passive_schedule.c @@ -0,0 +1,137 @@ +/**************************************************************************//** + * + * \copyright This software is the property of Technologies. Any + * information contained in this doc should not be reproduced, + * or used, or disclosed without the written authorization from + * Technologies. + * + * \brief This is the source file of the passive process driver. + * + * \file bl_proc_passive_schedule.h + * \ingroup process_driver_module + * \author + * + * \version 5.1.0 + * \date 27/03/2014 + * + * \par Changelist + * Version | Date | Authors | CR# | Descriptions + * -------- | ---------- | ---------------- | --- | ------------ + * 04.00.00 | 12/03/2012 | mingqing.tang | N/A | Boot040001 + * 04.03.00 | 22/03/2012 | mingqing.tang | N/A | Boot040004 + * 04.07.00 | 18/04/2012 | mingqing.tang | N/A | Boot040008 + * 05.00.00 | 19/06/2013 | heli.zhang | N/A | Boot050001 + * 05.01.00 | 27/03/2014 | mingqing.tang | N/A | Boot050002 + * + *****************************************************************************/ +#include "bl_rte.h" +#include "bl_proc_passive_schedule.h" +#include "bl_watchdog.h" +#include "bl_flash_if.h" +#include "bl_flash.h" +/***************************************************************************** + * QAC Suppression + *****************************************************************************/ +/*PRQA S 506,602,1532,2103,3112,3227 EOF*/ +/* + * 506:Dereferencing pointer value that is possibly NULL. + * The parameter delay is not a null pointer. + * + * MISRA-C:2004 20.2(602):The identifier is reserved for use by the library. + * The Bootloader do not use any library funtion and use the underscores to + * indicate that the function is a interal function. + * + * 1532:The function is only referenced in one translation unit. + * all functions in this file are configurations in the Security Module. + * + * 2103:Integral promotion, unsigned short promoted to unsigned int. + * This message will therefore only be generated when a short and an int are of + * equal size. + * + * MISRA-C:2004 14.2(3112):This statement has no side-effect. + * The DEBUG_ASSERT macro is used to debug bootloader when the BL_DEBUG is + * enable. When the BL_DEBUG is disable, the DEBUG_ASSERT macro is null. + * + * 3227:The parameter is never modified and so it could be declared with const. + * + */ + +/***************************************************************************** + * Internal Macro Definitions + *****************************************************************************/ + +/***************************************************************************** + * Internal Type Definitions + *****************************************************************************/ + +/***************************************************************************** + * Internal Structure Definitions + *****************************************************************************/ + +/***************************************************************************** + * Internal Function Declarations + *****************************************************************************/ + +/***************************************************************************** + * Internal Variable Definitions + *****************************************************************************/ + +/***************************************************************************** + * Global Variable Definitions + *****************************************************************************/ + +/***************************************************************************** + * Function Definitions + *****************************************************************************/ +/**************************************************************************//** + * + * \details Passive process driver schedule function. + * + * \note The corresponding adapter can't be null, otherwise system will always + * reset. + * + * \since V4.0.0 + * + *****************************************************************************/ + +void Proc_PassiveSchedule(const bl_Adapter_t *adapter) +{ + bl_FlashDrvParam_t l_flash_para; + BL_DEBUG_ASSERT_NO_RET(BL_NULL_PTR != adapter); + bl_FlashDrvFun_t flash_jump_fun; + bl_FeedWgdCallback_t wdg_jump_fun; + + //for (;;) + { + #if 0 + Wdg_Feed(); + g_WdgHeader.feed(); + //g_RteInfo.wdgOps->Feed(); //喂狗 + #if 1 + flash_jump_fun = FLASH_DRIVER_INIT_POINT(FLASHIF_DRIVER_STARTADDRESS); // FLASHIF_WRITE_POINT() + flash_jump_fun(&l_flash_para); + #else + FLASHIF_WRITE(&l_flash_para); + #endif + l_flash_para.FeedDog = g_WdgHeader.feed; + g_FlashHeader.Write(&l_flash_para); + #endif + + adapter->Callback(); // Adpt_UdsCallback + /* + Canif_TxMainFunction(); + Canif_RxMainFunction(); + Canif_BusoffMainFunction(); + */ + Rte_PeriodicSchedule(adapter->PeriodCallback); // Rte_PeriodicSchedule(&Adpt_UdsPeriodicCallback); + /** + Adpt_DelayTimeCallback(&gs_UdsPrivateData.delay); + Dcm_TimerFunction(); + Cantp_PeriodFunction(); + Dcm_MainFunction(); + //超時 超時 復位 的邏輯 ； + */ + } +} + + diff --git a/code_boot_out/asil/middle/autosar_bl/sources/types/error.h b/code_boot_out/asil/middle/autosar_bl/sources/types/error.h new file mode 100644 index 0000000..a2a1fcb --- /dev/null +++ b/code_boot_out/asil/middle/autosar_bl/sources/types/error.h @@ -0,0 +1,99 @@ +/** + * @file: err.h + * @brief: Ƶʾ + * @author: Mingyea + * @version: V1.0.0 + * @date: 2013-04-21 + * @history: + * 1.err_flag_e + * author:linyanhai + * version:V1.0.1 + * date:2014-03-13 + */ +#ifndef __ERROR_H__ +#define __ERROR_H__ + +#define ERROR_NEGATIVE + +#ifdef ERROR_NEGATIVE +typedef signed short err_flag_e; + +#define ERR_OK 0 /* OK */ +#define ERR_SPEED (-1) /* This device does not work in the active speed mode. */ +#define ERR_RANGE (-2) /* Parameter out of range. */ +#define ERR_VALUE (-3) /* Parameter of incorrect value. */ +#define ERR_OVERFLOW (-4) /* Timer overflow. */ +#define ERR_MATH (-5) /* Overflow during evaluation. */ +#define ERR_ENABLED (-6) /* Device is enabled. */ +#define ERR_DISABLED (-7) /* Device is disabled. */ +#define ERR_BUSY (-8) /* Device is busy. */ +#define ERR_ID_NOEXIST (-9) /* ID not exist . */ +#define ERR_ID_INVALID (-10) /* ID is invalid . */ +#define ERR_NOTAVAIL (-11) /* Requested value or method not available. */ +#define ERR_RXEMPTY (-12) /* No data in receiver. */ +#define ERR_TXFULL (-13) /* Transmitter is full. */ +#define ERR_BUSOFF (-14) /* Bus not available. */ +#define ERR_OVERRUN (-15) /* Overrun error is detected. */ +#define ERR_FRAMING (-16) /* Framing error is detected. */ +#define ERR_PARITY (-17) /* Parity error is detected. */ +#define ERR_NOISE (-18) /* Noise error is detected. */ +#define ERR_IDLE (-19) /* Idle error is detected. */ +#define ERR_FAULT (-20) /* Fault error is detected. */ +#define ERR_BREAK (-21) /* Break char is received during communication. */ +#define ERR_CRC (-22) /* CRC error is detected. */ +#define ERR_ARBITR (-23) /* A node losts arbitration. This error occurs if two nodes start transmission at the same time. */ +#define ERR_PROTECT (-24) /* Protection error is detected. */ +#define ERR_UNDERFLOW (-25) /* Underflow error is detected. */ +#define ERR_UNDERRUN (-26) /* Underrun error is detected. */ +#define ERR_COMMON (-27) /* Common error of a device. */ +#define ERR_LINSYNC (-28) /* LIN synchronization error is detected. */ +#define ERR_FAILED (-29) /* Requested functionality or process failed. */ + +#else +/*ܵĴʾ */ +typedef enum +{ + ERR_OK= 0, /* OK */ + ERR_SPEED, /* This device does not work in the active speed mode. */ + ERR_RANGE, /* Parameter out of range. */ + ERR_VALUE, /* Parameter of incorrect value. */ + ERR_OVERFLOW , /* Timer overflow. */ + ERR_MATH , /* Overflow during evaluation. */ + ERR_ENABLED , /* Device is enabled. */ + ERR_DISABLED , /* Device is disabled. */ + ERR_BUSY , /* Device is busy. */ + ERR_ID_NOEXIST, /* ID not exist . */ + ERR_ID_INVALID, /* ID is invalid . */ + ERR_NOTAVAIL, /* Requested value or method not available. */ + ERR_RXEMPTY , /* No data in receiver. */ + ERR_TXFULL , /* Transmitter is full. */ + ERR_BUSOFF , /* Bus not available. */ + ERR_OVERRUN , /* Overrun error is detected. */ + ERR_FRAMING , /* Framing error is detected. */ + ERR_PARITY , /* Parity error is detected. */ + ERR_NOISE , /* Noise error is detected. */ + ERR_IDLE , /* Idle error is detected. */ + ERR_FAULT , /* Fault error is detected. */ + ERR_BREAK , /* Break char is received during communication. */ + ERR_CRC , /* CRC error is detected. */ + ERR_ARBITR , /* A node losts arbitration. This error occurs if two nodes start transmission at the same time. */ + ERR_PROTECT, /* Protection error is detected. */ + ERR_UNDERFLOW ,/* Underflow error is detected. */ + ERR_UNDERRUN ,/* Underrun error is detected. */ + ERR_COMMON ,/* Common error of a device. */ + ERR_LINSYNC ,/* LIN synchronization error is detected. */ + ERR_FAILED ,/* Requested functionality or process failed. */ + ERR_QFULL ,/* Queue is full. */ +}err_flag_e; + +#endif + + + + + +#endif /* __TYPES_H__ */ + + + + diff --git a/code_boot_out/ide_project_iar/Backup of Example.ewp b/code_boot_out/ide_project_iar/Backup of Example.ewp new file mode 100644 index 0000000..ffef569 --- /dev/null +++ b/code_boot_out/ide_project_iar/Backup of Example.ewp @@ -0,0 +1,1086 @@ + + + + 2 + + Example + + ARM + + 1 + + General + 3 + + 22 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ICCARM + 2 + + 31 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + AARM + 2 + + 9 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + OBJCOPY + 0 + + 1 + 1 + 1 + + + + + + + + + CUSTOM + 3 + + + + 0 + + + + BICOMP + 0 + + + + BUILDACTION + 1 + + + + + + + ILINK + 0 + + 16 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + IARCHIVE + 0 + + 0 + 1 + 1 + + + + + + + BILINK + 0 + + + + + Application + + IAR + + $PROJ_DIR$\..\Drivers\CMSIS\Device\FM\FM33xx\Source\Templates\iar\startup_fm33lg0xx.s + + + + MF-config + + $PROJ_DIR$\..\MF-config\Src\mf_config.c + + + + User + + $PROJ_DIR$\..\..\ADC差分查询\Src\adc.c + + + $PROJ_DIR$\..\..\ADC差分查询\Src\main.c + + + + + Drivers + + CMSIS + + $PROJ_DIR$\..\Drivers\CMSIS\Device\FM\FM33xx\Source\system_fm33lg0xx.c + + + + FM33LG0xx_FL_Driver + + $PROJ_DIR$\..\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl.c + + + $PROJ_DIR$\..\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_adc.c + + + $PROJ_DIR$\..\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_aes.c + + + $PROJ_DIR$\..\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_atim.c + + + $PROJ_DIR$\..\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_bstim16.c + + + $PROJ_DIR$\..\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_bstim32.c + + + $PROJ_DIR$\..\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_can.c + + + $PROJ_DIR$\..\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_cmu.c + + + $PROJ_DIR$\..\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_comp.c + + + $PROJ_DIR$\..\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_crc.c + + + $PROJ_DIR$\..\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_dac.c + + + $PROJ_DIR$\..\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_divas.c + + + $PROJ_DIR$\..\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_dma.c + + + $PROJ_DIR$\..\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_exti.c + + + $PROJ_DIR$\..\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_flash.c + + + $PROJ_DIR$\..\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_gpio.c + + + $PROJ_DIR$\..\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_gptim.c + + + $PROJ_DIR$\..\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_i2c.c + + + $PROJ_DIR$\..\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_iwdt.c + + + $PROJ_DIR$\..\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_lcd.c + + + $PROJ_DIR$\..\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_lptim16.c + + + $PROJ_DIR$\..\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_lptim32.c + + + $PROJ_DIR$\..\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_lpuart.c + + + $PROJ_DIR$\..\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_pmu.c + + + $PROJ_DIR$\..\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_rng.c + + + $PROJ_DIR$\..\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_rtca.c + + + $PROJ_DIR$\..\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_spi.c + + + $PROJ_DIR$\..\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_svd.c + + + $PROJ_DIR$\..\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_uart.c + + + $PROJ_DIR$\..\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_vao.c + + + $PROJ_DIR$\..\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_vrefp.c + + + $PROJ_DIR$\..\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_wwdt.c + + + + + + diff --git a/code_boot_out/ide_project_iar/Example.dep b/code_boot_out/ide_project_iar/Example.dep new file mode 100644 index 0000000..cef82e4 --- /dev/null +++ b/code_boot_out/ide_project_iar/Example.dep @@ -0,0 +1,2873 @@ + + + 4 + 473760137 + + Example + + $PROJ_DIR$\..\asil\bsp\can.c + $PROJ_DIR$\..\asil\bsp\can_cfg.c + $PROJ_DIR$\..\asil\bsp\gpio.c + $PROJ_DIR$\..\asil\bsp\gpio_cfg.c + $PROJ_DIR$\..\asil\algorithmic\crc.c + $PROJ_DIR$\..\asil\bsp\Ls_Nm.c + $PROJ_DIR$\..\asil\bsp\rmu.c + $PROJ_DIR$\..\asil\middle\autosar_bl\sources\base\bl_booting.c + $PROJ_DIR$\..\asil\middle\autosar_bl\sources\cfg\bl_can_tp_cfg.c + $PROJ_DIR$\..\asil\middle\autosar_bl\sources\cfg\bl_logical_block_cfg.c + $PROJ_DIR$\..\asil\middle\autosar_bl\sources\cfg\bl_security_cfg.c + $PROJ_DIR$\..\asil\middle\autosar_bl\sources\cfg\bl_booting_cfg.c + $PROJ_DIR$\..\asil\middle\autosar_bl\sources\driver\bl_flash_read.c + $PROJ_DIR$\..\asil\middle\autosar_bl\sources\driver\bl_system.c + $PROJ_DIR$\..\asil\middle\autosar_bl\sources\base\bl_rte.c + $PROJ_DIR$\..\asil\bsp\wdog.c + $PROJ_DIR$\..\asil\middle\autosar_bl\sources\cfg\bl_rte_cfg.c + $PROJ_DIR$\..\asil\middle\autosar_bl\sources\driver\bl_can_transceiver.c + $PROJ_DIR$\..\asil\middle\autosar_bl\sources\base\bl_process_driver.c + $PROJ_DIR$\..\asil\middle\autosar_bl\sources\driver\bl_timer.c + $PROJ_DIR$\..\asil\middle\autosar_bl\sources\cfg\bl_adapter_cfg.c + $PROJ_DIR$\..\asil\middle\autosar_bl\sources\driver\bl_watchdog.c + $PROJ_DIR$\..\asil\middle\autosar_bl\sources\spec\bl_access_udsdemo.c + $PROJ_DIR$\..\asil\middle\autosar_bl\sources\cfg\bl_dcm_cfg.c + $PROJ_DIR$\..\asil\middle\autosar_bl\sources\base\bl_common.c + $PROJ_DIR$\..\asil\middle\autosar_bl\sources\cfg\bl_flash_if_cfg.c + $PROJ_DIR$\..\asil\middle\autosar_bl\sources\driver\bl_can.c + $PROJ_DIR$\..\asil\bsp\wdog_cfg.c + $PROJ_DIR$\..\asil\middle\autosar_bl\sources\spec\bl_adpt_uds_platform.c + $PROJ_DIR$\..\asil\middle\autosar_bl\sources\spec\bl_app.c + $PROJ_DIR$\..\asil\middle\autosar_bl\sources\cfg\bl_memory_cfg.c + $PROJ_DIR$\..\asil\bsp\rmu_cfg.c + $PROJ_DIR$\..\asil\middle\autosar_bl\sources\cfg\bl_data_cfg.c + $PROJ_DIR$\..\asil\middle\autosar_bl\sources\cfg\bl_process_driver_cfg.c + $PROJ_DIR$\..\asil\middle\autosar_bl\sources\cfg\bl_can_if_cfg.c + $PROJ_DIR$\Example\Obj\queue_entity.xcl + $PROJ_DIR$\Example\Obj\mf_config.xcl + $PROJ_DIR$\Example\Obj\clk_cfg.o + $PROJ_DIR$\Example\Obj\Cpu.xcl + $PROJ_DIR$\Example\Obj\queue_entity_cfg.xcl + $PROJ_DIR$\Example\Obj\fm33lg0xx_fl_dac.xcl + $PROJ_DIR$\Example\Obj\tim.xcl + $PROJ_DIR$\..\asil\middle\autosar_bl\cfg\bl_can_tp_cfg.h + $PROJ_DIR$\Example\Obj\bl_flash_if_cfg.xcl + $PROJ_DIR$\Example\Obj\main.xcl + $PROJ_DIR$\Example\Obj\bl_rte_cfg.xcl + $PROJ_DIR$\Example\Obj\bl_watchdog.o + $PROJ_DIR$\Example\Obj\fm33lg0xx_fl_svd.xcl + $PROJ_DIR$\..\asil\bsp\can_cfg.h + $PROJ_DIR$\Example\Obj\bl_access_udsdemo.xcl + $PROJ_DIR$\Example\Obj\nvm.__cstat.et + $PROJ_DIR$\Example\Obj\eeprom.xcl + $PROJ_DIR$\Example\Obj\startup.xcl + $PROJ_DIR$\Example\Obj\gpio_cfg.xcl + $PROJ_DIR$\..\asil\middle\autosar_bl\inc\bl_dcm.h + $PROJ_DIR$\Example\Obj\fm33lg0xx_fl_rng.o + $PROJ_DIR$\..\asil\middle\autosar_bl\inc\bl_flash_if.h + $PROJ_DIR$\Example\Obj\bl_watchdog.xcl + $PROJ_DIR$\..\asil\middle\autosar_bl\inc\bl_memory.h + $PROJ_DIR$\..\asil\middle\autosar_bl\cfg\bl_data_cfg.h + $PROJ_DIR$\Example\Obj\bl_common.xcl + $PROJ_DIR$\..\asil\middle\autosar_bl\inc\bl_proc_passive_schedule.h + $PROJ_DIR$\Example\Obj\clk_cfg.__cstat.et + $PROJ_DIR$\Example\Obj\startup.o + $PROJ_DIR$\Example\Obj\bl_system.xcl + $PROJ_DIR$\..\asil\middle\autosar_bl\inc\bl_timer.h + $PROJ_DIR$\Example\Obj\rmu_cfg.xcl + $PROJ_DIR$\..\sdk\Drivers\FM33LG0xx_FL_Driver\Inc\fm33lg0xx_fl_bstim32.h + $TOOLKIT_DIR$\inc\c\DLib_Config_Normal.h + $PROJ_DIR$\Example\Obj\flash.xcl + $PROJ_DIR$\..\sdk\Drivers\FM33LG0xx_FL_Driver\Inc\fm33lg0xx_fl_crc.h + $PROJ_DIR$\Example\Obj\bl_flash_read.o + $PROJ_DIR$\Example\Obj\fm33lg0xx_fl_wwdt.o + $PROJ_DIR$\Example\Obj\bl_flash_if_cfg.o + $PROJ_DIR$\Example\Obj\fm33lg0xx_fl_lptim16.o + $PROJ_DIR$\Example\Obj\fm33lg0xx_fl_can.o + $PROJ_DIR$\Example\Obj\boot_app_cfg.xcl + $PROJ_DIR$\..\asil\middle\autosar_bl\cfg\bl_memory_funcfg.h + $PROJ_DIR$\Example\Obj\bl_timer.o + $PROJ_DIR$\Example\Obj\bl_flash_read.xcl + $PROJ_DIR$\Example\Obj\svd_cfg.__cstat.et + $PROJ_DIR$\..\asil\middle\autosar_bl\cfg\bl_logical_block_cfg.h + $PROJ_DIR$\..\sdk\Drivers\FM33LG0xx_FL_Driver\Inc\fm33lg0xx_fl_atim.h + $PROJ_DIR$\Example\Obj\bl_timer.xcl + $PROJ_DIR$\..\sdk\Drivers\FM33LG0xx_FL_Driver\Inc\fm33lg0xx_fl_bstim16.h + $PROJ_DIR$\Example\Obj\fm33lg0xx_fl_bstim16.o + $PROJ_DIR$\Example\Obj\tim_cfg.o + $PROJ_DIR$\..\qm\module\flash.h + $PROJ_DIR$\..\asil\middle\autosar_bl\inc\bl_logical_block.h + $PROJ_DIR$\Example\Exe\fm33_lg0x_boot.hex + $PROJ_DIR$\Example\Obj\startup_fm33lg0xx.o + $PROJ_DIR$\..\qm\app\boot_app.h + $PROJ_DIR$\Example\Obj\fm33lg0xx_fl_aes.__cstat.et + $PROJ_DIR$\..\sdk\Drivers\FM33LG0xx_FL_Driver\Inc\fm33lg0xx_fl_dma.h + $PROJ_DIR$\Example\Obj\tim.o + $PROJ_DIR$\Example\Obj\fm33lg0xx_fl_gpio.xcl + $PROJ_DIR$\Example\Obj\bl_crc32_bzip2.o + $PROJ_DIR$\Example\Obj\bl_logical_block_cfg.xcl + $PROJ_DIR$\..\qm\bsp\clk.c + $PROJ_DIR$\..\qm\bsp\eeprom_cfg.c + $PROJ_DIR$\..\qm\common\common_cfg.h + $PROJ_DIR$\..\qm\bsp\eeprom.c + $PROJ_DIR$\..\qm\bsp\svd_cfg.c + $PROJ_DIR$\..\qm\common\assert.c + $PROJ_DIR$\..\qm\bsp\nvic_cfg.c + $PROJ_DIR$\..\qm\common\common_types.h + $PROJ_DIR$\..\qm\common\error.h + $PROJ_DIR$\..\qm\common\logic_timer.c + $PROJ_DIR$\..\qm\common\logic_timer.h + $PROJ_DIR$\..\qm\algorithmic\random_pseudo.c + $PROJ_DIR$\..\asil\middle\autosar_bl\sources\spec\bl_crc32_bzip2.c + $PROJ_DIR$\..\qm\app\boot_app.c + $PROJ_DIR$\..\asil\middle\autosar_bl\sources\spec\bl_proc_passive_schedule.c + $PROJ_DIR$\..\qm\bsp\clk_cfg.c + $PROJ_DIR$\..\qm\common\assert.h + $PROJ_DIR$\..\qm\common\common_memory.h + $PROJ_DIR$\..\qm\bsp\Cpu.c + $PROJ_DIR$\..\qm\common\queue_entity.c + $PROJ_DIR$\..\qm\common\common_memory.c + $PROJ_DIR$\..\qm\common\queue_entity.h + $PROJ_DIR$\..\qm\bsp\tim_cfg.c + $PROJ_DIR$\..\qm\common\queue_entity_cfg.c + $PROJ_DIR$\..\qm\bsp\nvic.c + $PROJ_DIR$\..\qm\bsp\svd.c + $PROJ_DIR$\..\qm\bsp\eeprom_seq.c + $PROJ_DIR$\..\qm\bsp\eeprom_state_machine.c + $PROJ_DIR$\..\qm\bsp\tim.c + $PROJ_DIR$\..\qm\app\boot_app_cfg.c + $PROJ_DIR$\..\qm\app\main.c + $PROJ_DIR$\..\qm\app\user_init.c + $PROJ_DIR$\..\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_adc.c + $PROJ_DIR$\..\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_lpuart.c + $PROJ_DIR$\..\qm\module\nvm.c + $PROJ_DIR$\..\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_crc.c + $PROJ_DIR$\..\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_divas.c + $PROJ_DIR$\..\qm\module\calibration.c + $PROJ_DIR$\..\qm\common\status.h + $PROJ_DIR$\..\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_can.c + $PROJ_DIR$\..\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_cmu.c + $PROJ_DIR$\..\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_atim.c + $PROJ_DIR$\..\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_dma.c + $PROJ_DIR$\..\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_exti.c + $PROJ_DIR$\..\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_comp.c + $PROJ_DIR$\..\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_bstim32.c + $PROJ_DIR$\..\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_gpio.c + $PROJ_DIR$\..\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_bstim16.c + $PROJ_DIR$\..\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl.c + $PROJ_DIR$\..\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_flash.c + $PROJ_DIR$\..\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_i2c.c + $PROJ_DIR$\..\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_iwdt.c + $PROJ_DIR$\..\sdk\Drivers\CMSIS\Device\FM\FM33xx\Source\system_fm33lg0xx.c + $PROJ_DIR$\..\qm\module\flash.c + $PROJ_DIR$\..\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_dac.c + $PROJ_DIR$\..\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_gptim.c + $PROJ_DIR$\..\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_lcd.c + $PROJ_DIR$\..\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_aes.c + $PROJ_DIR$\..\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_lptim32.c + $PROJ_DIR$\..\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_pmu.c + $PROJ_DIR$\..\qm\module\nvm_cfg.c + $PROJ_DIR$\..\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_lptim16.c + $PROJ_DIR$\..\qm\common\queue_entity_cfg.h + $PROJ_DIR$\..\sdk\Drivers\FM33LG0xx_FL_Driver\Inc\fm33lg0xx_fl_gptim.h + $PROJ_DIR$\Example\Obj\crc.xcl + $PROJ_DIR$\Example\Obj\bl_adapter_cfg.xcl + $PROJ_DIR$\Example\Obj\fm33lg0xx_fl_vao.xcl + $PROJ_DIR$\..\sdk\Drivers\CMSIS\Device\FM\FM33xx\Include\core_cmInstr.h + $PROJ_DIR$\Example\Obj\gpio.xcl + $PROJ_DIR$\Example\Obj\bl_logical_block_cfg.__cstat.et + $PROJ_DIR$\Example\Obj\clk.__cstat.et + $PROJ_DIR$\Example\Obj\bl_system.o + $PROJ_DIR$\Example\Obj\boot_app_cfg.__cstat.et + $PROJ_DIR$\Example\Obj\logic_timer.__cstat.et + $PROJ_DIR$\Example\Obj\random_pseudo.__cstat.et + $PROJ_DIR$\..\sdk\Drivers\FM33LG0xx_FL_Driver\Inc\fm33lg0xx_fl_vrefp.h + $PROJ_DIR$\Example\Obj\fm33lg0xx_fl_comp.xcl + $PROJ_DIR$\..\qm\bsp\eeprom_cfg.h + $PROJ_DIR$\..\asil\middle\autosar_bl\cfg\bl_rte_cfg.h + $PROJ_DIR$\..\sdk\Drivers\FM33LG0xx_FL_Driver\Inc\fm33lg0xx_fl_divas.h + $PROJ_DIR$\Example\Obj\eeprom.__cstat.et + $PROJ_DIR$\Example\Obj\bl_flash_read.__cstat.et + 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$TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin.ENU.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin2.ENU.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\RemedyRtosViewer\RemedyRtosViewer.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\SMX\smxAwareIarArm8.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\SMX\smxAwareIarArm8BE.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin + 0 + + + $EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin + 0 + + + $EW_DIR$\common\plugins\TargetAccessServer\TargetAccessServer.ENU.ewplugin + 0 + + + $EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin + 0 + + + + diff --git a/code_boot_out/ide_project_iar/Example.ewp b/code_boot_out/ide_project_iar/Example.ewp new file mode 100644 index 0000000..c2fe777 --- /dev/null +++ b/code_boot_out/ide_project_iar/Example.ewp @@ -0,0 +1,1506 @@ + + + 3 + + Example + + ARM + + 1 + + General + 3 + + 31 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ICCARM + 2 + + 35 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + AARM + 2 + + 10 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + OBJCOPY + 0 + + 1 + 1 + 1 + + + + + + + + + CUSTOM + 3 + + + + 0 + + + + BICOMP + 0 + + + + BUILDACTION + 1 + + + + + + + ILINK + 0 + + 23 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + IARCHIVE + 0 + + 0 + 1 + 1 + + + + + + + BILINK + 0 + + + + Coder + 0 + + + + + asil + + algorithmic + + $PROJ_DIR$\..\asil\algorithmic\crc.c + + + + app + + + bsp + + $PROJ_DIR$\..\asil\bsp\can.c + + + $PROJ_DIR$\..\asil\bsp\can_cfg.c + + + $PROJ_DIR$\..\asil\bsp\gpio.c + + + $PROJ_DIR$\..\asil\bsp\gpio_cfg.c + + + $PROJ_DIR$\..\asil\bsp\Ls_Nm.c + + + $PROJ_DIR$\..\asil\bsp\rmu.c + + + $PROJ_DIR$\..\asil\bsp\rmu_cfg.c + + + $PROJ_DIR$\..\asil\bsp\stack_check.c + + Example + + + + $PROJ_DIR$\..\asil\bsp\stack_check_cfg.c + + Example + + + + $PROJ_DIR$\..\asil\bsp\wdog.c + + + $PROJ_DIR$\..\asil\bsp\wdog_cfg.c + + + + middle + + autosar_bl + + source + + base + + $PROJ_DIR$\..\asil\middle\autosar_bl\sources\base\bl_booting.c + + + $PROJ_DIR$\..\asil\middle\autosar_bl\sources\base\bl_common.c + + + $PROJ_DIR$\..\asil\middle\autosar_bl\sources\base\bl_main.c + + Example + + + + $PROJ_DIR$\..\asil\middle\autosar_bl\sources\base\bl_process_driver.c + + + $PROJ_DIR$\..\asil\middle\autosar_bl\sources\base\bl_rte.c + + + + cfg + + $PROJ_DIR$\..\asil\middle\autosar_bl\sources\cfg\bl_adapter_cfg.c + + + $PROJ_DIR$\..\asil\middle\autosar_bl\sources\cfg\bl_booting_cfg.c + + + $PROJ_DIR$\..\asil\middle\autosar_bl\sources\cfg\bl_can_if_cfg.c + + + $PROJ_DIR$\..\asil\middle\autosar_bl\sources\cfg\bl_can_tp_cfg.c + + + $PROJ_DIR$\..\asil\middle\autosar_bl\sources\cfg\bl_data_cfg.c + + + $PROJ_DIR$\..\asil\middle\autosar_bl\sources\cfg\bl_dcm_cfg.c + + + $PROJ_DIR$\..\asil\middle\autosar_bl\sources\cfg\bl_flash_if_cfg.c + + + $PROJ_DIR$\..\asil\middle\autosar_bl\sources\cfg\bl_logical_block_cfg.c + + + $PROJ_DIR$\..\asil\middle\autosar_bl\sources\cfg\bl_memory_cfg.c + + + $PROJ_DIR$\..\asil\middle\autosar_bl\sources\cfg\bl_process_driver_cfg.c + + + $PROJ_DIR$\..\asil\middle\autosar_bl\sources\cfg\bl_rte_cfg.c + + + $PROJ_DIR$\..\asil\middle\autosar_bl\sources\cfg\bl_security_cfg.c + + + + driver + + $PROJ_DIR$\..\asil\middle\autosar_bl\sources\driver\bl_can.c + + + $PROJ_DIR$\..\asil\middle\autosar_bl\sources\driver\bl_can_transceiver.c + + + $PROJ_DIR$\..\asil\middle\autosar_bl\sources\driver\bl_flash_read.c + + + $PROJ_DIR$\..\asil\middle\autosar_bl\sources\driver\bl_system.c + + + $PROJ_DIR$\..\asil\middle\autosar_bl\sources\driver\bl_timer.c + + + $PROJ_DIR$\..\asil\middle\autosar_bl\sources\driver\bl_watchdog.c + + + + spec + + $PROJ_DIR$\..\asil\middle\autosar_bl\sources\spec\bl_access_udsdemo.c + + + $PROJ_DIR$\..\asil\middle\autosar_bl\sources\spec\bl_adpt_uds_platform.c + + + $PROJ_DIR$\..\asil\middle\autosar_bl\sources\spec\bl_app.c + + + $PROJ_DIR$\..\asil\middle\autosar_bl\sources\spec\bl_crc32_bzip2.c + + + $PROJ_DIR$\..\asil\middle\autosar_bl\sources\spec\bl_proc_passive_schedule.c + + + + + + + module + + + + qm + + algorithmic + + $PROJ_DIR$\..\qm\algorithmic\random_pseudo.c + + + + app + + $PROJ_DIR$\..\qm\app\boot_app.c + + + $PROJ_DIR$\..\qm\app\boot_app_cfg.c + + + $PROJ_DIR$\..\qm\app\main.c + + + $PROJ_DIR$\..\qm\app\user_init.c + + + + bsp + + $PROJ_DIR$\..\qm\bsp\clk.c + + + $PROJ_DIR$\..\qm\bsp\clk_cfg.c + + + $PROJ_DIR$\..\qm\bsp\Cpu.c + + + $PROJ_DIR$\..\qm\bsp\eeprom.c + + + $PROJ_DIR$\..\qm\bsp\eeprom_cfg.c + + + $PROJ_DIR$\..\qm\bsp\eeprom_seq.c + + + $PROJ_DIR$\..\qm\bsp\eeprom_state_machine.c + + + $PROJ_DIR$\..\qm\bsp\nvic.c + + + $PROJ_DIR$\..\qm\bsp\nvic_cfg.c + + + $PROJ_DIR$\..\qm\bsp\svd.c + + + $PROJ_DIR$\..\qm\bsp\svd_cfg.c + + + $PROJ_DIR$\..\qm\bsp\tim.c + + + $PROJ_DIR$\..\qm\bsp\tim_cfg.c + + + + common + + $PROJ_DIR$\..\qm\common\assert.c + + + $PROJ_DIR$\..\qm\common\assert.h + + + $PROJ_DIR$\..\qm\common\common_cfg.h + + + $PROJ_DIR$\..\qm\common\common_memory.c + + + $PROJ_DIR$\..\qm\common\common_memory.h + + + $PROJ_DIR$\..\qm\common\common_types.h + + + $PROJ_DIR$\..\qm\common\error.h + + + $PROJ_DIR$\..\qm\common\logic_timer.c + + + $PROJ_DIR$\..\qm\common\logic_timer.h + + + $PROJ_DIR$\..\qm\common\queue_entity.c + + + $PROJ_DIR$\..\qm\common\queue_entity.h + + + $PROJ_DIR$\..\qm\common\queue_entity_cfg.c + + + $PROJ_DIR$\..\qm\common\queue_entity_cfg.h + + + $PROJ_DIR$\..\qm\common\status.h + + + + middle + + + module + + $PROJ_DIR$\..\qm\module\calibration.c + + + $PROJ_DIR$\..\qm\module\flash.c + + + $PROJ_DIR$\..\qm\module\nvm.c + + + $PROJ_DIR$\..\qm\module\nvm_cfg.c + + + + + sdk + + drivers + + cmsis + + $PROJ_DIR$\..\sdk\Drivers\CMSIS\Device\FM\FM33xx\Source\system_fm33lg0xx.c + + + + fl_driver + + $PROJ_DIR$\..\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl.c + + + $PROJ_DIR$\..\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_adc.c + + + $PROJ_DIR$\..\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_aes.c + + + $PROJ_DIR$\..\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_atim.c + + + $PROJ_DIR$\..\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_bstim16.c + + + $PROJ_DIR$\..\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_bstim32.c + + + $PROJ_DIR$\..\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_can.c + + + $PROJ_DIR$\..\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_cmu.c + + + $PROJ_DIR$\..\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_comp.c + + + $PROJ_DIR$\..\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_crc.c + + + $PROJ_DIR$\..\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_dac.c + + + $PROJ_DIR$\..\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_divas.c + + + $PROJ_DIR$\..\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_dma.c + + + $PROJ_DIR$\..\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_exti.c + + + $PROJ_DIR$\..\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_flash.c + + + $PROJ_DIR$\..\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_gpio.c + + + $PROJ_DIR$\..\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_gptim.c + + + $PROJ_DIR$\..\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_i2c.c + + + $PROJ_DIR$\..\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_iwdt.c + + + $PROJ_DIR$\..\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_lcd.c + + + $PROJ_DIR$\..\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_lptim16.c + + + $PROJ_DIR$\..\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_lptim32.c + + + $PROJ_DIR$\..\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_lpuart.c + + + $PROJ_DIR$\..\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_pmu.c + + + $PROJ_DIR$\..\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_rng.c + + + $PROJ_DIR$\..\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_rtca.c + + + $PROJ_DIR$\..\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_spi.c + + + $PROJ_DIR$\..\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_svd.c + + + $PROJ_DIR$\..\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_uart.c + + + $PROJ_DIR$\..\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_vao.c + + + $PROJ_DIR$\..\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_vrefp.c + + + $PROJ_DIR$\..\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_wwdt.c + + + + iar + + $PROJ_DIR$\..\sdk\Drivers\CMSIS\Device\FM\FM33xx\Source\Templates\iar\startup_fm33lg0xx.s + + + + $PROJ_DIR$\..\sdk\Drivers\CMSIS\Device\FM\FM33xx\Source\Templates\startup.c + + + + mf_config + + $PROJ_DIR$\..\sdk\MF-config\Src\mf_config.c + + + + diff --git a/code_boot_out/ide_project_iar/Example.ewt b/code_boot_out/ide_project_iar/Example.ewt new file mode 100644 index 0000000..02b237f --- /dev/null +++ b/code_boot_out/ide_project_iar/Example.ewt @@ -0,0 +1,1600 @@ + + + 3 + + Example + + ARM + + 1 + + C-STAT + 262 + + 262 + + 0 + + 1 + 600 + 1 + 2 + 0 + 1 + 100 + + + 1.6.2 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + 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$PROJ_DIR$\..\asil\bsp\gpio.c + + + $PROJ_DIR$\..\asil\bsp\gpio_cfg.c + + + $PROJ_DIR$\..\asil\bsp\Ls_Nm.c + + + $PROJ_DIR$\..\asil\bsp\rmu.c + + + $PROJ_DIR$\..\asil\bsp\rmu_cfg.c + + + $PROJ_DIR$\..\asil\bsp\stack_check.c + + + $PROJ_DIR$\..\asil\bsp\stack_check_cfg.c + + + $PROJ_DIR$\..\asil\bsp\wdog.c + + + $PROJ_DIR$\..\asil\bsp\wdog_cfg.c + + + + middle + + autosar_bl + + source + + base + + $PROJ_DIR$\..\asil\middle\autosar_bl\sources\base\bl_booting.c + + + $PROJ_DIR$\..\asil\middle\autosar_bl\sources\base\bl_common.c + + + $PROJ_DIR$\..\asil\middle\autosar_bl\sources\base\bl_main.c + + + $PROJ_DIR$\..\asil\middle\autosar_bl\sources\base\bl_process_driver.c + + + $PROJ_DIR$\..\asil\middle\autosar_bl\sources\base\bl_rte.c + + + + cfg + + $PROJ_DIR$\..\asil\middle\autosar_bl\sources\cfg\bl_adapter_cfg.c + + + $PROJ_DIR$\..\asil\middle\autosar_bl\sources\cfg\bl_booting_cfg.c + + + $PROJ_DIR$\..\asil\middle\autosar_bl\sources\cfg\bl_can_if_cfg.c + + + $PROJ_DIR$\..\asil\middle\autosar_bl\sources\cfg\bl_can_tp_cfg.c + + + $PROJ_DIR$\..\asil\middle\autosar_bl\sources\cfg\bl_data_cfg.c + + + $PROJ_DIR$\..\asil\middle\autosar_bl\sources\cfg\bl_dcm_cfg.c + + + $PROJ_DIR$\..\asil\middle\autosar_bl\sources\cfg\bl_flash_if_cfg.c + + + $PROJ_DIR$\..\asil\middle\autosar_bl\sources\cfg\bl_logical_block_cfg.c + + + $PROJ_DIR$\..\asil\middle\autosar_bl\sources\cfg\bl_memory_cfg.c + + + $PROJ_DIR$\..\asil\middle\autosar_bl\sources\cfg\bl_process_driver_cfg.c + + + $PROJ_DIR$\..\asil\middle\autosar_bl\sources\cfg\bl_rte_cfg.c + + + $PROJ_DIR$\..\asil\middle\autosar_bl\sources\cfg\bl_security_cfg.c + + + + driver + + $PROJ_DIR$\..\asil\middle\autosar_bl\sources\driver\bl_can.c + + + $PROJ_DIR$\..\asil\middle\autosar_bl\sources\driver\bl_can_transceiver.c + + + $PROJ_DIR$\..\asil\middle\autosar_bl\sources\driver\bl_flash_read.c + + + $PROJ_DIR$\..\asil\middle\autosar_bl\sources\driver\bl_system.c + + + $PROJ_DIR$\..\asil\middle\autosar_bl\sources\driver\bl_timer.c + + + $PROJ_DIR$\..\asil\middle\autosar_bl\sources\driver\bl_watchdog.c + + + + spec + + $PROJ_DIR$\..\asil\middle\autosar_bl\sources\spec\bl_access_udsdemo.c + + + $PROJ_DIR$\..\asil\middle\autosar_bl\sources\spec\bl_adpt_uds_platform.c + + + $PROJ_DIR$\..\asil\middle\autosar_bl\sources\spec\bl_app.c + + + $PROJ_DIR$\..\asil\middle\autosar_bl\sources\spec\bl_crc32_bzip2.c + + + $PROJ_DIR$\..\asil\middle\autosar_bl\sources\spec\bl_proc_passive_schedule.c + + + + + + + module + + + + qm + + algorithmic + + $PROJ_DIR$\..\qm\algorithmic\random_pseudo.c + + + + app + + $PROJ_DIR$\..\qm\app\boot_app.c + + + $PROJ_DIR$\..\qm\app\boot_app_cfg.c + + + $PROJ_DIR$\..\qm\app\main.c + + + $PROJ_DIR$\..\qm\app\user_init.c + + + + bsp + + $PROJ_DIR$\..\qm\bsp\clk.c + + + $PROJ_DIR$\..\qm\bsp\clk_cfg.c + + + $PROJ_DIR$\..\qm\bsp\Cpu.c + + + $PROJ_DIR$\..\qm\bsp\eeprom.c + + + $PROJ_DIR$\..\qm\bsp\eeprom_cfg.c + + + $PROJ_DIR$\..\qm\bsp\eeprom_seq.c + + + $PROJ_DIR$\..\qm\bsp\eeprom_state_machine.c + + + $PROJ_DIR$\..\qm\bsp\nvic.c + + + $PROJ_DIR$\..\qm\bsp\nvic_cfg.c + + + $PROJ_DIR$\..\qm\bsp\svd.c + + + $PROJ_DIR$\..\qm\bsp\svd_cfg.c + + + $PROJ_DIR$\..\qm\bsp\tim.c + + + $PROJ_DIR$\..\qm\bsp\tim_cfg.c + + + + common + + $PROJ_DIR$\..\qm\common\assert.c + + + $PROJ_DIR$\..\qm\common\assert.h + + + $PROJ_DIR$\..\qm\common\common_cfg.h + + + $PROJ_DIR$\..\qm\common\common_memory.c + + + $PROJ_DIR$\..\qm\common\common_memory.h + + + $PROJ_DIR$\..\qm\common\common_types.h + + + $PROJ_DIR$\..\qm\common\error.h + + + $PROJ_DIR$\..\qm\common\logic_timer.c + + + $PROJ_DIR$\..\qm\common\logic_timer.h + + + $PROJ_DIR$\..\qm\common\queue_entity.c + + + $PROJ_DIR$\..\qm\common\queue_entity.h + + + $PROJ_DIR$\..\qm\common\queue_entity_cfg.c + + + $PROJ_DIR$\..\qm\common\queue_entity_cfg.h + + + $PROJ_DIR$\..\qm\common\status.h + + + + middle + + + module + + $PROJ_DIR$\..\qm\module\calibration.c + + + $PROJ_DIR$\..\qm\module\flash.c + + + $PROJ_DIR$\..\qm\module\nvm.c + + + $PROJ_DIR$\..\qm\module\nvm_cfg.c + + + + + sdk + + drivers + + cmsis + + $PROJ_DIR$\..\sdk\Drivers\CMSIS\Device\FM\FM33xx\Source\system_fm33lg0xx.c + + + + fl_driver + + $PROJ_DIR$\..\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl.c + + + $PROJ_DIR$\..\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_adc.c + + + $PROJ_DIR$\..\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_aes.c + + + $PROJ_DIR$\..\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_atim.c + + + $PROJ_DIR$\..\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_bstim16.c + + + $PROJ_DIR$\..\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_bstim32.c + + + $PROJ_DIR$\..\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_can.c + + + $PROJ_DIR$\..\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_cmu.c + + + $PROJ_DIR$\..\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_comp.c + + + $PROJ_DIR$\..\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_crc.c + + + $PROJ_DIR$\..\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_dac.c + + + $PROJ_DIR$\..\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_divas.c + + + $PROJ_DIR$\..\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_dma.c + + + $PROJ_DIR$\..\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_exti.c + + + $PROJ_DIR$\..\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_flash.c + + + $PROJ_DIR$\..\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_gpio.c + + + $PROJ_DIR$\..\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_gptim.c + + + $PROJ_DIR$\..\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_i2c.c + + + $PROJ_DIR$\..\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_iwdt.c + + + $PROJ_DIR$\..\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_lcd.c + + + $PROJ_DIR$\..\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_lptim16.c + + + $PROJ_DIR$\..\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_lptim32.c + + + $PROJ_DIR$\..\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_lpuart.c + + + $PROJ_DIR$\..\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_pmu.c + + + $PROJ_DIR$\..\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_rng.c + + + $PROJ_DIR$\..\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_rtca.c + + + $PROJ_DIR$\..\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_spi.c + + + $PROJ_DIR$\..\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_svd.c + + + $PROJ_DIR$\..\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_uart.c + + + $PROJ_DIR$\..\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_vao.c + + + $PROJ_DIR$\..\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_vrefp.c + + + $PROJ_DIR$\..\sdk\Drivers\FM33LG0xx_FL_Driver\Src\fm33lg0xx_fl_wwdt.c + + + + iar + + $PROJ_DIR$\..\sdk\Drivers\CMSIS\Device\FM\FM33xx\Source\Templates\iar\startup_fm33lg0xx.s + + + + $PROJ_DIR$\..\sdk\Drivers\CMSIS\Device\FM\FM33xx\Source\Templates\startup.c + + + + mf_config + + $PROJ_DIR$\..\sdk\MF-config\Src\mf_config.c + + + + diff --git a/code_boot_out/ide_project_iar/Project.eww b/code_boot_out/ide_project_iar/Project.eww new file mode 100644 index 0000000..119dcef --- /dev/null +++ b/code_boot_out/ide_project_iar/Project.eww @@ -0,0 +1,7 @@ + + + + $WS_DIR$\Example.ewp + + + \ No newline at end of file diff --git a/code_boot_out/ide_project_iar/device/FM33LG04x.i79 b/code_boot_out/ide_project_iar/device/FM33LG04x.i79 new file mode 100644 index 0000000..cb7c27f --- /dev/null +++ b/code_boot_out/ide_project_iar/device/FM33LG04x.i79 @@ -0,0 +1,29 @@ +[FILEFORMAT] +rev=1.6 + +[CHIP] +name=FM33LG04x +endiansupport=le +thumbsupport=true +armsupport=false +fpu=None +SIMD=false + +JTAG=false +SWD=true +SWO_TraceD0=false + +[CORE] +name=SC000 + +[DDF FILE] +name=FMSH\FM33LG04x.ddf + +[LINKER FILE] +name=$TOOLKIT_DIR$\config\linker\FMSH\FM33LG04x.icf + +[FLASH LOADER] + +little=$TOOLKIT_DIR$\config\flashloader\FMSH\FM33LG04x.board + + diff --git a/code_boot_out/ide_project_iar/device/FM33LG04x.menu b/code_boot_out/ide_project_iar/device/FM33LG04x.menu new file mode 100644 index 0000000..771d6d8 --- /dev/null +++ b/code_boot_out/ide_project_iar/device/FM33LG04x.menu @@ -0,0 +1,7 @@ + + + FM33LG04x + FMSH FM33LG04x + $CUR_DIR$\FM33LG04x.i79 + + diff --git a/code_boot_out/ide_project_iar/flashloader/FM33LG04x.board b/code_boot_out/ide_project_iar/flashloader/FM33LG04x.board new file mode 100644 index 0000000..acc4027 --- /dev/null +++ b/code_boot_out/ide_project_iar/flashloader/FM33LG04x.board @@ -0,0 +1,11 @@ + + + + + CODE 0x00000000 0x0003FFFF + $PROJ_DIR$\flashloader\FM33LG04x.flash + + + + + diff --git a/code_boot_out/ide_project_iar/flashloader/FM33LG04x.flash b/code_boot_out/ide_project_iar/flashloader/FM33LG04x.flash new file mode 100644 index 0000000..a23a209 --- /dev/null +++ b/code_boot_out/ide_project_iar/flashloader/FM33LG04x.flash @@ -0,0 +1,10 @@ + + + + $PROJ_DIR$\flashloader\fm33lg0xx.out + 1 + 256 0x400 + 0x00000000 + 1 + 1 + diff --git a/code_boot_out/ide_project_iar/flashloader/fm33lg0xx.out b/code_boot_out/ide_project_iar/flashloader/fm33lg0xx.out new file mode 100644 index 0000000..cc0ffb3 Binary files /dev/null and b/code_boot_out/ide_project_iar/flashloader/fm33lg0xx.out differ diff --git a/code_boot_out/ide_project_iar/note.txt b/code_boot_out/ide_project_iar/note.txt new file mode 100644 index 0000000..973024d --- /dev/null +++ b/code_boot_out/ide_project_iar/note.txt @@ -0,0 +1,14 @@ + +\config\debugger\FMSH\ +復制到 +C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.3 ARM8402\arm\RTOS\SEGGER\ + +\config\devices\FMSH\ +復制到 +C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.3 ARM8402\arm\config\devices\ + +\config\flashloader\ +復制到 +C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.3 ARM8402\arm\src\flashloader\ + + diff --git a/code_boot_out/qm/algorithmic/random_pseudo.c b/code_boot_out/qm/algorithmic/random_pseudo.c new file mode 100644 index 0000000..6d6104b --- /dev/null +++ b/code_boot_out/qm/algorithmic/random_pseudo.c @@ -0,0 +1,220 @@ +/** ########################################################################## +** Filename : +** Project : +** Module : +** Processor : +** Version : +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20230602- --V1.0-- --mingyea--- --修改-- + +** #########################################################################*/ + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ +#include "common_types.h" +//#include "error.h" +#include "crc.h" + +#include "random_pseudo.h" +//#include "adc_manage.h" + +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ +#define RAND_SEED_INIT_VAL 1u /* See Note #1a. */ + +#define RAND_LCG_PARAM_M 0x7FFFFFFFu /* See Note #1b2B. */ +#define RAND_LCG_PARAM_A 1103515245u /* See Note #1b1A2. */ +#define RAND_LCG_PARAM_B 12345u /* See Note #1b1A3. */ + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- S T A T I C V A R I A B L E S +----------------------------------------------------------------------------*/ +static u32 random_seed_cur=0; //当前随机数值 +static u32 random_seed_pre=0; //上次随机数值 +static u32 random_input1_count=0; + +/*--------------------------------------------------------------------------- +* G L O B A L V A R I A B L E S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ +static void random_set_seed(u32 seed); +static u32 random_seed(u32 seed); +static u32 random_generate_seed(void); + + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description :注意，不能初始值为一个固定值，应考虙每个单片机的不同；在定时器初始化之后 +----------------------------------------------------------------------------*/ +void random_init(void) +{ + u32 l_random; + #if 0 + random_set_seed(RAND_SEED_INIT_VAL); //第一次 + #else + l_random = 0; //adc_get_voltage_value(ADC_CHANNEL_SBAT); //定时器0寄存器的计数值 + random_set_seed(l_random); //第一次 + #endif +} + + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +----------------------------------------------------------------------------*/ +static void random_set_seed(u32 seed) +{ + random_seed_cur = seed; +} + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : 算法 +----------------------------------------------------------------------------*/ +static u32 random_seed(u32 seed) +{ + u32 l_random; + l_random = ( ( (u32)RAND_LCG_PARAM_A * seed) + (u32)RAND_LCG_PARAM_B) % ((u32)RAND_LCG_PARAM_M + 1u); + return l_random; +} + + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : 产生随机数 +----------------------------------------------------------------------------*/ +static u32 random_generate_seed(void) +{ + u32 l_random; + l_random = random_seed_cur; + random_seed_cur = random_seed(l_random + random_input1_count); + return random_seed_cur; +} + + + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : 启动一次随机数的产生； 防止连续两次不重复 +----------------------------------------------------------------------------*/ +void random_start(void) +{ + random_generate_seed(); + if( random_seed_cur == random_seed_pre) + { + random_seed_cur++; + } + else + { + + } + random_seed_pre = random_seed_cur; +} + + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : 返回当前随机数 +----------------------------------------------------------------------------*/ +void random_get(u8 *random_data,u8 random_len) +{ + //u8 i; + u8 l_len = random_len; + //if(l_len > SERVICE_SEED_LEN_VALID) + { + //l_len =SERVICE_SEED_LEN_VALID; + } + random_data[0] = (u8)(random_seed_cur >> 24); + random_data[1] = (u8)(random_seed_cur >> 16); + random_data[2] = (u8)(random_seed_cur >> 8); + random_data[3] = (u8)(random_seed_cur); +} + + + + + + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +----------------------------------------------------------------------------*/ +void random_input_count(void) +{ + random_input1_count++; +} + + + + + + + + + + + + + + diff --git a/code_boot_out/qm/algorithmic/random_pseudo.h b/code_boot_out/qm/algorithmic/random_pseudo.h new file mode 100644 index 0000000..8e5dcb4 --- /dev/null +++ b/code_boot_out/qm/algorithmic/random_pseudo.h @@ -0,0 +1,67 @@ +/** ########################################################################## +** Filename : +** Project : +** Module : +** Processor : +** Version : 1.0 +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : 此文档用于规范代码书写； +* 注意， +* 1.所有文件用UTF-8格式 +* 2.tab键空格4个 +* 3.各模块，都要有 初始化函数 init, 反初始化函数 deinit, +* 周期任务task,进入休眠goto sleep, +* 唤醒后 goto wake ,判断是否可休眠judge_pre_sleep 等主要函数接口 +* 4. +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20191106- --V01-- --LYJ--- --初版-- +** -20230602- --V1.0-- --mingyea--- --修改-- + +** #########################################################################*/ +#ifndef RANDOM_PSEUDO_H_ +#define RANDOM_PSEUDO_H_ + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ +#include "common_types.h" + +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ +#define SEED_LEN_MAX 4u +//#define ADC_CHANNEL_SBAT 0 + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- G L O B A L V A R I A B L E S +- only configuration table allowed here,variables are not allowed! +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ +void random_init(void); +void random_start(void); +void random_get(u8 *random_data,u8 random_len); +void random_input_count(void); + +#endif diff --git a/code_boot_out/qm/app/boot_app.c b/code_boot_out/qm/app/boot_app.c new file mode 100644 index 0000000..8b4bdb1 --- /dev/null +++ b/code_boot_out/qm/app/boot_app.c @@ -0,0 +1,319 @@ +/** ########################################################################## +** Filename : +** Project : +** Module : +** Processor : +** Version : 1.0 +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : +* +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20230602- --V1.0-- --mingyea--- --修改-- + +** #########################################################################*/ + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ +//#include "includes.h" +#include "error.h" +#include "boot_app.h" +#include "can.h" +#include "nvm.h" +//#include "lin_commontl_api.h" +//#include "lin_slave_diag.h" +#include "common_cfg.h" +#include "bl_can_if_funcfg.h" +#include "bl_adpt_uds_platform.h" + +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- S T A T I C V A R I A B L E S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +* G L O B A L V A R I A B L E S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ +#if 0 //最后的 app valid flag,应该在boot区成功时，要写入，記得debug時，要開啟 + #pragma CONST_SEG MEMORY_MAP_ROM_APP_FLAG_END + const u8 AppValid[16] = {0xaa,0xaa,0x04,0xe5,0xaa,0xaa,0x04,0xe5,0xaa,0xaa,0x04,0xe5,0xaa,0xaa,0x04,0xe5}; //APP_VALID_FLAG_ADDR + #pragma CONST_SEG DEFAULT +#else + +#ifdef __ICCARM__ +MEMORY_MAP_FLAG_NO_OPTIME const u8 AppValid[16] @APP_VALID_FLAG_ADDR = {0xaa,0xaa,0x04,0xe5,0xaa,0xaa,0x04,0xe5,0xaa,0xaa,0x04,0xe5,0xaa,0xaa,0x04,0xe5}; +#else +MEMORY_MAP_FLAG_NO_OPTIME volatile const MEMORY_MAP_ROM_APP_VALID u8 AppValid[16] = {0xaa,0xaa,0x04,0xe5,0xaa,0xaa,0x04,0xe5,0xaa,0xaa,0x04,0xe5,0xaa,0xaa,0x04,0xe5}; +#endif + +#endif + + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ +//跳轉相關 +u32 jump_adress; +typedef void (*pFunction)(void) ; +pFunction jump_to_app; + +static void Boot_SendEcuResetRespones(void); + +static u8 Boot_IsValidFlag(u8 flagId); +static void Boot_SetFlag(u8 flagId); + +//static u8 Boot_MemCpy(u8 * des, const u8 *src, u32 size); + + +/* BEGIN_FUNCTION_HDR +************************************************************************************************ +* Function Name : Boot_ReprogramCallBack +* +* Description : Set the reprogramming flag and reset the ECU. +* +* Inputs : none +* +* Outputs : none +* +* Limitations : Only for Bootloader +* +************************************************************************************************ +END_FUNCTION_HDR */ +void Boot_ReprogramCallBack(void) +{ + /*set reprogram flag*/ + Boot_SetFlag(FLAG_REPROGRAM_ID); + /*reset ECU*/ + ResetMCUHandle(); +} + +void Boot_Reprogram_only_writeram(void) +{ + /*set reprogram flag*/ + Boot_SetFlag(FLAG_REPROGRAM_ID); + /*reset ECU*/ + //ResetMCUHandle(); +} +/* BEGIN_FUNCTION_HDR +************************************************************************************************ +* Function Name : Boot_ResetMCUCallBack +* +* Description : Reset the ECU. +* +* Inputs : none +* +* Outputs : none +* +* Limitations : Only for Bootloader +* +************************************************************************************************ +END_FUNCTION_HDR */ +void Boot_ResetMCUCallBack(void) +{ + /*set reprogram flag*/ + Boot_SetFlag(FLAG_RESET_ID); + /*reset ECU*/ + ResetMCUHandle(); +} + +/* BEGIN_FUNCTION_HDR +************************************************************************************************ +* Function Name : Boot_SetFlag +* +* Description : Set the reprogramming flag. +* +* Inputs : none +* +* Outputs : none +* +* Limitations : Only for Bootloader +* +************************************************************************************************ +END_FUNCTION_HDR */ +static void Boot_SetFlag(u8 flagId) +{ + u32 addr = 0xFFFFFFFFUL; + u32 data = 0xFFFFFFFFUL; + u8 l_buf[4] ={FLAG_REPROGRAM_u8_DATA0,FLAG_REPROGRAM_u8_DATA1,FLAG_REPROGRAM_u8_DATA2,FLAG_REPROGRAM_u8_DATA3}; + + switch (flagId) + { + case FLAG_REPROGRAM_ID: + addr = AppValid[0]; // AppValid1 + //addr = AppValid_in[0]; // AppValid_in + addr = FLAG_REPROGRAM_ADDR; + //data = FLAG_REPROGRAM_DATA; + break; + default : + break; + } + + if (addr != 0xFFFFFFFFUL) + { + #if 0 + (void)FlagWriteHandle(addr,(u32)4,&l_buf); + #else + (void)ram_write_bytes(addr,(u8*)&l_buf[0],FLAG_REPROGRAM_LEN); + #endif + } +} + +/*--------------------------------------------------------------------------- +|Prototype : boot_app_init +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : 初始化 +----------------------------------------------------------------------------*/ +void boot_app_init(void) +{ + #if 0 + u8 i; /*PRQA S 3205*/ + u8 l_buf[8]; + u32 l_temp; + u32 tempP2Star; + boot_app_clear_flag(); + (void)in_flash_read_words(&g_boot_flag_info,in_flash_get_boot_log_s_addr() ,IN_FLASH_LOG_LEN_BOOT_WORKS); + if(g_boot_flag_info == BOOT_APP_FLAG_IS_BOOT_SUCCESS) + { + boot_app_jump_to_app(); + } + #endif +} + + +/*--------------------------------------------------------------------------- +|Prototype : boot_app_task +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +----------------------------------------------------------------------------*/ +void boot_app_task(void) +{ + +} + + +#if 0 +#ifdef __ICCARM__ +static void __set_MSP(uint32_t topOfMainStack) +{ + __asm("msr msp, r0"); +} +static __inline void __set_PSP(uint32_t topOfProcStack) +{ + __asm("msr psp, r0"); +} +/** + \brief Set Control Register + \details Writes the given value to the Control Register. + \param [in] control Control Register value to set + */ +static __inline void __set_CONTROL(uint32_t control) +{ + __asm volatile ("MSR control, %0" : : "r" (control) : "memory"); +} + +#endif + +#ifdef __GNUC__ + +static void __set_MSP(uint32_t topOfMainStack) +{ + __asm volatile ("MSR msp, %0\n" : : "r" (topOfMainStack) : "sp"); +} +static void __set_PSP(uint32_t topOfMainStack) +{ + __asm volatile ("MSR psp, %0\n" : : "r" (topOfMainStack) : "sp"); +} +/** + \brief Set Control Register + \details Writes the given value to the Control Register. + \param [in] control Control Register value to set + */ +static void __set_CONTROL(uint32_t control) +{ + __asm volatile ("MSR control, %0" : : "r" (control) : "memory"); +} + + +#endif + +#endif + + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +----------------------------------------------------------------------------*/ + +void boot_app_jump_to_app(void) +{ + + /*一上電就跳轉到應用程序區*/ + + /*檢查棧頂地址是否合法*/ + if( ((* (__IO u32*)APP_ADRRESS_VECTOR) & 0x2ffe0000u) == 0x20000000u) + { + /*用戶代碼區第二個字為程序開始地址(復位地址) 即Reset_handler */ + jump_adress = * (__IO u32*)(APP_ADRRESS_VECTOR+4u); /*所謂的PC 是0x8000004 ,SP 是 0x8000000*/ + jump_to_app = (pFunction)jump_adress; + + /*考虙這語句是否可以去掉---後來測試發現不影響--是獨立的*/ + // SCB->VTOR = 0x08000000u; /* Vector Table Relocation in Internal FLASH. */ + + //和RTOS相關的，這兩句，研究了好多天，價格不菲 + __set_PSP(*(__IO u32 *)APP_ADRRESS_VECTOR); + __set_CONTROL(0); + /*初始化APP堆棧指針---用戶代碼區的第一個字用於存放棧頂地址*/ + __set_MSP((* (__IO u32*)APP_ADRRESS_VECTOR)); /*__set_MSP 是設置椎棧指針*/ + + #if 0 + bsp_int_disable_all_int(); + #if OS_TYPE == OS_TYPES_NULL + bsp_int_disable_primask(); + bsp_int_disable_faultmask(); + #endif + #endif + + jump_to_app(); + + } + + + +} diff --git a/code_boot_out/qm/app/boot_app.h b/code_boot_out/qm/app/boot_app.h new file mode 100644 index 0000000..e8edde4 --- /dev/null +++ b/code_boot_out/qm/app/boot_app.h @@ -0,0 +1,81 @@ +/** ########################################################################## +** Filename : +** Project : +** Module : +** Processor : +** Version : +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20230602- --V1.0-- --mingyea--- --修改-- + +** #########################################################################*/ + +#ifndef BOOT_APP_H__ +#define BOOT_APP_H__ + + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ +#include "common_types.h" +#include "boot_app_cfg.h" + + +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- G L O B A L V A R I A B L E S +- only configuration table allowed here,variables are not allowed! +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ +//片区开头的标志 +//extern const u8 AppValid[16] ; // APP_VALID_FLAG1_ADDR +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ +void boot_app_init(void); +void boot_app_task(void); + +void boot_app_jump_to_app(void); + +extern void Boot_ResetProcess(void); + +extern void Boot_ReprogramCallBack(void); + +extern void Boot_ResetMCUCallBack(void); + +extern u8 Boot_FingerprintCallBack(u8 * readBuf,u32 readSize); +void Boot_Reprogram_only_writeram(void); + +void boot_app_test(void); + + + + +#endif /* __BOOT_APP_H__ */ + + + + + + diff --git a/code_boot_out/qm/app/boot_app_cfg.c b/code_boot_out/qm/app/boot_app_cfg.c new file mode 100644 index 0000000..f3ca7c3 --- /dev/null +++ b/code_boot_out/qm/app/boot_app_cfg.c @@ -0,0 +1,60 @@ +/** ########################################################################## +** Filename : +** Project : +** Module : +** Processor : +** Version : 1.0 +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20230602- --V1.0-- --mingyea--- --修改-- + +** #########################################################################*/ + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ +#include "boot_app.h" + +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- S T A T I C V A R I A B L E S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +* G L O B A L V A R I A B L E S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ + + + +/* [] END OF FILE */ + diff --git a/code_boot_out/qm/app/boot_app_cfg.h b/code_boot_out/qm/app/boot_app_cfg.h new file mode 100644 index 0000000..2d94061 --- /dev/null +++ b/code_boot_out/qm/app/boot_app_cfg.h @@ -0,0 +1,176 @@ +/** ########################################################################## +** Filename : +** Project : +** Module : +** Processor : +** Version : +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20230602- --V1.0-- --mingyea--- --修改-- + +** #########################################################################*/ + + +#ifndef BOOT_APP_CFG_H__ +#define BOOT_APP_CFG_H__ + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ + +#if 0 +#include "common_types.h" +#include "gpio.h" +#include "flash_cfg.h" +#include "nvic.h" +#include "device_registers.h" +#else +#include "common_types.h" +#include "common_cfg.h" +#include "gpio.h" +//#include "wdog.h" + +#endif + +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ + +//暫時放這裡 手冊上可能不是這地址 +#define FLASH_APP_BASE ((uint32_t)0x00008000) /*!< FLASH(up to 1 MB) base address in the alias region */ +#define FLASH_ASW_MAX_ADDR 0x0001C000u //0X7D000-0X7FFFF 預留為其他用途 +// app 的偏移地址 +// app 的偏移地址 +#define BOOT_APP_START FLASH_APP_BASE +#define BOOT_APP_VECTOR_OFFSET 0x00000100u +//app的起始地址 +//app的起始地址 +#define APP_ADRRESS_START BOOT_APP_START //(FLASH_APP_BASE + BOOT_APP_START) +#define APP_ADRRESS_VECTOR (FLASH_APP_BASE + BOOT_APP_VECTOR_OFFSET) + +#define APP_VALID_FLAG_1_ADDR (APP_ADRRESS_START) //首地址，也做为标志 + +#define APP_VALID_ADDR_OFFSET 0x10u //0X100 //倒推回來的偏移地址 +//app 的 有效標志所在的地址 +#define APP_VALID_FLAG1_ADDR (APP_ADRRESS_START) //144 开头的地址， +#define APP_VALID_FLAG_ADDR (FLASH_ASW_MAX_ADDR-APP_VALID_ADDR_OFFSET) //0xFF9FF0 +#define APP_VALID_FLAG_IN_ADDR 0x0001BFCCu // //(FLASH_P_BLOCK_SIZES-APP_VALID_ADDR_OFFSET) //144最大12k = 0x0008 0000 +#define BOOT_CALIBRATION_START_ADDR 0x00007800u +#define APP_CALIBRATION_START_ADDR 0x0001BBCCu + +#define P_APP_VALID_FLAG_ADDR_U32 ((u32 *)APP_VALID_FLAG_ADDR) +#define P_APP_VALID_FLAG_ADDR_U8 ((u8 *)APP_VALID_FLAG_ADDR) +#define FLAG_APP_VALID_FLAG_DATA 0xAAAA04E5ul //app valid flag +#define FLAG_APP_VALID_FLAG_DATA0 0xaau //app valid flag +#define FLAG_APP_VALID_FLAG_DATA1 0xaau //app valid flag +#define FLAG_APP_VALID_FLAG_DATA2 0x04u //app valid flag +#define FLAG_APP_VALID_FLAG_DATA3 0xe5u //app valid flag + + + +//以下從 fe-5ha移植 +#define FLAG_REPROGRAM_ID 0x01U +#define FLAG_RESET_ID 0x02U +#define FLAG_FINGERPRINT_ID 0x03U + +//這是RAM 相關的，重擦除標志 +#define FLAG_BASE_SIZE 0x04U + + +//CAL的起始地址 +#define CAL_ADRRESS_START (FLASH_ASW_MAX_ADDR) +#define CAL_ADRRESS_LEN (0X800u) + + +//#define APP_USER_CONST_ADDR_OFFSET 0X800 //倒推回來的偏移地址--用戶一些用戶數據 +//#define APP_USER_CONST_ADDR (FLASH_ASW_MAX_ADDR-APP_USER_CONST_ADDR_OFFSET) //144 最大512k = 0x0008 0000 + +#define FLAG_BASE_ADDR 0x20007FC0u //0x1200U //0x3FF8U + + +#define FLAG_REPROGRAM_ADDR (FLAG_BASE_ADDR + 0u) //重編程請求的地址 + +#define FLAG_REPROGRAM_LEN 4u +#define FLAG_REPROGRAM_DATA 0xA5A5E534U //重編程請求的值 + +#define FLAG_REPROGRAM_u8_DATA0 0xA5U //重編程請求的值 +#define FLAG_REPROGRAM_u8_DATA1 0xA5U //重編程請求的值 +#define FLAG_REPROGRAM_u8_DATA2 0xE5U //重編程請求的值 +#define FLAG_REPROGRAM_u8_DATA3 0x34U //重編程請求的值 + + +#define FLAG_JUMP_TO_BOOT_RESPONSE_ADDR (u32)(FLAG_BASE_ADDR + 0x04u) //標志，用於跳轉到boot時，要應答的數據； +#define FLAG_JUMP_TO_BOOT_RESPONSE_LEN (4u) //標志，用於跳轉到boot時，要應答的數據； +#define FLAG_JUMP_TO_BOOT_RESPONSE_INIT ((u32)0xaa769021) //無效值 +#define FLAG_JUMP_TO_BOOT_RESPONSE_11_01 ((u32)0x554b1101) //復位的應答 +#define FLAG_JUMP_TO_BOOT_RESPONSE_11_03 ((u32)0x554b1103) //復位的應答 +#define FLAG_JUMP_TO_BOOT_RESPONSE_10_02 ((u32)0x554b1002) //編程的應答 +#define FLAG_JUMP_TO_BOOT_RESPONSE_10_01 ((u32)0x554b1001) //默認的應答 +#define FLAG_JUMP_TO_APP_RESPONSE_11_01_PRE ((u32)0x55491101) //復位的應答----因为跳转前，先又进入boot，所以加以区分 +#define FLAG_JUMP_TO_APP_RESPONSE_11_03_PRE ((u32)0x55491103) //復位的應答 +#define FLAG_JUMP_TO_APP_RESPONSE_10_02_PRE ((u32)0x55491002) //編程的應答 +#define FLAG_JUMP_TO_APP_RESPONSE_10_01_PRE ((u32)0x55491001) //默認的應答 +#define FLAG_JUMP_TO_APP_RESPONSE_11_01 ((u32)0x554a1101) //復位的應答----因为跳转前，先又进入boot，所以加以区分 +#define FLAG_JUMP_TO_APP_RESPONSE_11_03 ((u32)0x554a1103) //復位的應答 +#define FLAG_JUMP_TO_APP_RESPONSE_10_02 ((u32)0x554a1002) //編程的應答 +#define FLAG_JUMP_TO_APP_RESPONSE_10_01 ((u32)0x554a1001) //默認的應答 + +#if 1 +#define FLAG_RAM_WDOG_ADDR 0x20007800 //看門狗在ram中運行 +#define FLAG_RAM_DRIVER_ADDR 0x20007000 //驅動在driver中運行 +#define FLAG_RAM_RE_START_ADDR FLAG_RAM_DRIVER_ADDR +#endif +#define RAM_TOTAL_SIZES 0x00008000UL //32k + +#define RAM_WDOG_ADDR FLAG_RAM_WDOG_ADDR //看門狗在ram中運行--和icf上一致 ，目前用来别的用途 +#define RAM_NO_INIT_ADDR 0x20007C00u //看門狗在ram中運行--和icf上一致 ，目前用来别的用途 + +//#define FlagReadHandle(addr,size,buf) Boot_MemCpy((u8 *)buf,(const u8 *)addr,size) +//#define FlagWriteHandle(addr,size,buf) Boot_MemCpy((u8 *)addr,(const u8 *)buf,size) +#define ResetMCUHandle() SystemSoftwareReset() +//#define Boot_ComControlHandle() 0 +//#define Boot_CheckProgramming() 0 + + + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ + + + +/*--------------------------------------------------------------------------- +- G L O B A L V A R I A B L E S +- only configuration table allowed here,variables are not allowed! +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ + + + + +#endif /* __BOOT_APP_CFG_H__ */ + + + + + + + diff --git a/code_boot_out/qm/app/main.c b/code_boot_out/qm/app/main.c new file mode 100644 index 0000000..090d53f --- /dev/null +++ b/code_boot_out/qm/app/main.c @@ -0,0 +1,208 @@ +/** ########################################################################## +** Filename : +** Project : +** Module : +** Processor : +** Version : 1.0 +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20230602- --V1.0-- --mingyea--- --修改-- + +** #########################################################################*/ + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ +#if 0 +#include +#include +#include +#include +#endif + +#include "common_types.h" +#include "common_cfg.h" +#include "mf_config.h" +#include "fm33lg0xx_fl.h" +#if defined(USE_FULL_ASSERT) +#include "fm33_assert.h" +#endif /* USE_FULL_ASSERT */ + +#include "nvic.h" + +#include "clk.h" +#include "gpio.h" +#include "tim.h" +#include "rmu.h" +#include "svd.h" + +//#include "pwm.h" +#include "wdog.h" +//#include "spm.h" +#include "can.h" +#include "ls_nm.h" +#include "nvm.h" + +#include "logic_timer.h" + +#ifdef CAN_AUTOSAR_EN +#include "CanTrcv.h" +#include "can_drive.h" +#include "CanIf.h" +#include "CanIf_Cfg.h" +#include "Com.h" +#include "CanTp.h" +#include "Dcm.h" +#include "Demm.h" +#include "app_com.h" +#include "app_dcm.h" +#endif +#include "user_init.h" +#include "logic_timer.h" +//#include "lin_app.h" + +#include "stack_check.h" + +#include "boot_app.h" + +#include "bl_timer.h" +#include "bl_can.h" +#include "bl_booting.h" +#include "bl_process_driver.h" +#include "bl_system.h" +#include "bl_logical_block.h" +#include "bl_flash_if.h" +#include "bl_adpt_uds_platform.h" + +u8 g_flash_read_flag2 =0xff; +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- S T A T I C V A R I A B L E S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +* G L O B A L V A R I A B L E S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ +int main(void) +{ + u8 i; + bl_BootingFlag_t flag; + bl_BootingFlag_t flag1; + bl_BootingFlag_t flag2; + + //__disable_irq(); + + //__enable_irq(); + + /*Initialize system*/ + Rte_PreInit(); + #if 1 + #ifdef BOOT_STATE_PROG_DEBUG_EN + adpt_test_init(); + #endif + #ifdef FLASH_TEST_ERASE_WRITE + flash_if_test(); + #endif + //boot_app_init(); + flag = Bootm_CheckBootingRequirement(); + flag1 = check_program_valid_nores_is_valid(); + flag2 = check_program_valid_to_app_valid(); + //再判断，编程会话的无应答模式 + if(flag1 == BOOTING_FLAG_REPROGRAM_VALID) + { + flag = BOOTING_FLAG_REPROGRAM_VALID; + } + else + { + //code + } + if (BOOTING_FLAG_APPLICATION_VALID == flag) + { + if(lb_logic_block_read_app_valid1()!=0) + { + #ifdef BOOT_STATE_PROG_DEBUG_EN + #else + //#ifdef FALSH_DRIVER_INIT_EN + //#else + //boot_app_jump(); + Bootm_GotoApplication(); + //#endif + #endif + flag=0u; + } + else + { + flag=0u; + } + /*never return unless StayInBoot enable and receive a valid SIB frame*/ + } + g_flash_read_flag2 = flag; + #endif + rmu_init(); + svd_init(); + (void)Rte_PostInit(); + + lb_logic_block_init_flashdrv(); + //Dm_WriteDefaultData(1); //flash app + //g_test_flash_app_flag = Dm_IsDefaultData(1); + + if(flag2 == BOOTING_FLAG_REPROGRAM_VALID) + { + clear_program_valid_to_app_valid(); + //回复，默认会话 + Adpt_Res_default_ValidProcess(); + } + #if 1 + if(flag1==BOOTING_FLAG_REPROGRAM_VALID) + { + Adpt_ReprogramValid_nores_Process(); // + } + else + #endif + { + Rte_ProcessReset(flag); // 跳到這里 flag=0; 或者 BOOTING_FLAG_REPROGRAM_VALID + } + #ifdef NVM_EEPROM_EXT_EN + eeprom_init(); //要在不跳转时，初始化EEPROM + #endif + + for( ;; ) + { + //wdog_task(); + //app_task_1ms(); + gpio_task(); + PROC_SCHEDULE(); // 相當於 Proc_PassiveSchedule(&g_UdsPlatformAdapter) + } +} + + diff --git a/code_boot_out/qm/app/main.h b/code_boot_out/qm/app/main.h new file mode 100644 index 0000000..218d2af --- /dev/null +++ b/code_boot_out/qm/app/main.h @@ -0,0 +1,72 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file : main.h + * @brief : Header for main.c file. + * This file contains the common defines of the application. + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2019 FMSH. + * All rights reserved.

+ * + * This software component is licensed by FM under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ +/* USER CODE END Header */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __MAIN_H +#define __MAIN_H + +#ifdef __cplusplus +extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ + + +/* Private includes ----------------------------------------------------------*/ +/* USER CODE BEGIN Includes */ + +/* USER CODE END Includes */ + +/* Exported types ------------------------------------------------------------*/ +/* USER CODE BEGIN ET */ + +/* USER CODE END ET */ + +/* Exported constants --------------------------------------------------------*/ +/* USER CODE BEGIN EC */ + +/* USER CODE END EC */ + +/* Exported macro ------------------------------------------------------------*/ +/* USER CODE BEGIN EM */ + +/* USER CODE END EM */ + +/* Exported functions prototypes ---------------------------------------------*/ +void Error_Handler(void); + +/* USER CODE BEGIN EFP */ + +/* USER CODE END EFP */ + +/* Private defines -----------------------------------------------------------*/ + +/* USER CODE BEGIN Private defines */ + +/* USER CODE END Private defines */ + +#ifdef __cplusplus +} +#endif + +#endif /* __MAIN_H */ + +/************************ (C) COPYRIGHT FMSH *****END OF FILE****/ diff --git a/code_boot_out/qm/app/user_init.c b/code_boot_out/qm/app/user_init.c new file mode 100644 index 0000000..8b86d13 --- /dev/null +++ b/code_boot_out/qm/app/user_init.c @@ -0,0 +1,240 @@ +/** ########################################################################## +** Filename : +** Project : +** Module : +** Processor : +** Version : 1.0 +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20230602- --V1.0-- --mingyea--- --修改-- + +** #########################################################################*/ + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ +#include "common_types.h" +#include "common_cfg.h" +#include "mf_config.h" +#include "fm33lg0xx_fl.h" +#if defined(USE_FULL_ASSERT) +#include "fm33_assert.h" +#endif /* USE_FULL_ASSERT */ +#include "user_init.h" + +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ + + + +/*--------------------------------------------------------------------------- +- S T A T I C V A R I A B L E S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +* G L O B A L V A R I A B L E S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ + +#if 0 +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +----------------------------------------------------------------------------*/ +void ClockInit(uint32_t clock) +{ + FL_FLASH_SetReadWait(FLASH, FL_FLASH_READ_WAIT_2CYCLE); + switch (clock) + { + case FL_CMU_RCHF_FREQUENCY_8MHZ: + FL_CMU_RCHF_WriteTrimValue(RCHF8M_TRIM); + FL_FLASH_SetReadWait(FLASH, FL_FLASH_READ_WAIT_0CYCLE); + FL_CDIF_SetPrescaler(CDIF, FL_CDIF_PSC_DIV1); + break; + + case FL_CMU_RCHF_FREQUENCY_16MHZ: + FL_CMU_RCHF_WriteTrimValue(RCHF16M_TRIM); + FL_FLASH_SetReadWait(FLASH, FL_FLASH_READ_WAIT_0CYCLE); + FL_CDIF_SetPrescaler(CDIF, FL_CDIF_PSC_DIV2); + break; + + case FL_CMU_RCHF_FREQUENCY_24MHZ: + FL_CMU_RCHF_WriteTrimValue(RCHF24M_TRIM); + FL_FLASH_SetReadWait(FLASH, FL_FLASH_READ_WAIT_0CYCLE); + FL_CDIF_SetPrescaler(CDIF, FL_CDIF_PSC_DIV4); + break; + + case FL_CMU_RCHF_FREQUENCY_32MHZ: + FL_CMU_RCHF_WriteTrimValue(RCHF32M_TRIM); + FL_FLASH_SetReadWait(FLASH, FL_FLASH_READ_WAIT_1CYCLE); + FL_CDIF_SetPrescaler(CDIF, FL_CDIF_PSC_DIV4); + break; + + default: + FL_CMU_RCHF_WriteTrimValue(RCHF8M_TRIM); + FL_FLASH_SetReadWait(FLASH, FL_FLASH_READ_WAIT_0CYCLE); + FL_CDIF_SetPrescaler(CDIF, FL_CDIF_PSC_DIV1); + break; + } + + FL_CMU_RCHF_SetFrequency(clock); + FL_CMU_SetSystemClockSource(FL_CMU_SYSTEM_CLK_SOURCE_RCHF); +} + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +----------------------------------------------------------------------------*/ +void FoutInit(void) +{ + FL_GPIO_InitTypeDef init = {0}; + + init.pin = FL_GPIO_PIN_11; + init.mode = FL_GPIO_MODE_DIGITAL; + init.outputType = FL_GPIO_OUTPUT_PUSHPULL; + init.pull = FL_DISABLE; + FL_GPIO_Init(GPIOD, &init); + + FL_GPIO_SetFOUT0(GPIO, FL_GPIO_FOUT0_SELECT_AHBCLK_DIV64); +} + +#ifndef MFANG + +#ifdef __CC_ARM +#pragma import(__use_no_semihosting) +//标准库需要的支持函数 +struct __FILE +{ + int handle; +}; +FILE __stdout; +#endif + +//定义_sys_exit()以避免使用半主机模式 +void _sys_exit(int x) +{ + x = x; +} + +#if 0 +//重定义fputc函数 +int fputc(int ch, FILE *f) +{ + FL_UART_WriteTXBuff(UART0, (uint8_t)ch); + while(FL_UART_IsActiveFlag_TXBuffEmpty(UART0) != FL_SET); + return ch; +} +#endif + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +----------------------------------------------------------------------------*/ +void DebugUartInit(void) +{ + FL_GPIO_InitTypeDef GPIO_InitStruct = {0}; + FL_UART_InitTypeDef UART_InitStruct = {0}; + + //PA13:UART0-RX PA14:UART0-TX + GPIO_InitStruct.pin = FL_GPIO_PIN_13|FL_GPIO_PIN_14; + GPIO_InitStruct.mode = FL_GPIO_MODE_DIGITAL; + GPIO_InitStruct.outputType = FL_GPIO_OUTPUT_PUSHPULL; + GPIO_InitStruct.pull = FL_ENABLE; + GPIO_InitStruct.remapPin = FL_DISABLE; + FL_GPIO_Init(GPIOA, &GPIO_InitStruct); + + UART_InitStruct.clockSrc = FL_CMU_UART0_CLK_SOURCE_APBCLK; + + UART_InitStruct.baudRate = 115200; //波特率 + UART_InitStruct.dataWidth = FL_UART_DATA_WIDTH_8B; //数据位数 + UART_InitStruct.stopBits = FL_UART_STOP_BIT_WIDTH_1B; //停止位 + UART_InitStruct.parity = FL_UART_PARITY_EVEN; //奇偶校验 + UART_InitStruct.transferDirection = FL_UART_DIRECTION_TX_RX; //接收-发送使能 + FL_UART_Init(UART0, &UART_InitStruct); +} + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +----------------------------------------------------------------------------*/ +void LedInit(void) +{ + uint8_t count = 5; + + FL_GPIO_InitTypeDef GPIO_InitStruct = {0}; + + FL_GPIO_ResetOutputPin(LED0_GPIO, LED0_PIN); + + GPIO_InitStruct.pin = LED0_PIN; + GPIO_InitStruct.mode = FL_GPIO_MODE_OUTPUT; + GPIO_InitStruct.outputType = FL_GPIO_OUTPUT_PUSHPULL; + GPIO_InitStruct.pull = FL_DISABLE; + FL_GPIO_Init(LED0_GPIO, &GPIO_InitStruct); + + while (count--) + { + LED0_ON(); + FL_DelayMs(100); + LED0_OFF(); + FL_DelayMs(100); + } +} + +#endif + +void UserInit(void) +{ +#ifndef MFANG + LedInit(); + DebugUartInit(); +#endif +} + + +#endif \ No newline at end of file diff --git a/code_boot_out/qm/app/user_init.h b/code_boot_out/qm/app/user_init.h new file mode 100644 index 0000000..08a0ee7 --- /dev/null +++ b/code_boot_out/qm/app/user_init.h @@ -0,0 +1,72 @@ +/** ########################################################################## +** Filename : +** Project : +** Module : +** Processor : +** Version : +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20230602- --V1.0-- --mingyea--- --޸-- + +** #########################################################################*/ + +#ifndef USER_INIT_H__ +#define USER_INIT_H__ + + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ +#if 0 +#ifndef MFANG +#include +#endif +#endif +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ +#if 0 +#ifndef MFANG + +#define LED0_GPIO GPIOB +#define LED0_PIN FL_GPIO_PIN_4 + +#define LED0_ON() FL_GPIO_ResetOutputPin(LED0_GPIO, LED0_PIN) +#define LED0_OFF() FL_GPIO_SetOutputPin(LED0_GPIO, LED0_PIN) +#define LED0_TOG() FL_GPIO_ToggleOutputPin(LED0_GPIO, LED0_PIN) + +#endif +#endif +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ + + + +/*--------------------------------------------------------------------------- +- G L O B A L V A R I A B L E S +- only configuration table allowed here,variables are not allowed! +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ +//void UserInit(void); +//void FoutInit(void); + +#endif diff --git a/code_boot_out/qm/bsp/Cpu.c b/code_boot_out/qm/bsp/Cpu.c new file mode 100644 index 0000000..1a9d8a6 --- /dev/null +++ b/code_boot_out/qm/bsp/Cpu.c @@ -0,0 +1,151 @@ +/** ########################################################################## +** Filename : +** Project : +** Module : +** Processor : +** Version : +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20191106- --V01-- --LYJ--- --初版-- +** -20230602- --V1.0-- --mingyea--- --修改-- +** -20231202- --V1.1-- --linboyi--- --加了计数的方式-- +** #########################################################################*/ + + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ +#include "cpu.h" +#include "common_types.h" +#include "common_cfg.h" + + +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ +typedef struct +{ + u32 low; + u32 high; + u8 iwdtslp; + u8 iwdtslp_f; +}cpu_opt_bytes_t; +cpu_opt_bytes_t g_cpu_opt_bytes; + + +/*--------------------------------------------------------------------------- +- S T A T I C V A R I A B L E S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +* G L O B A L V A R I A B L E S +----------------------------------------------------------------------------*/ + +static uint32_t ulInterruptDisableCount = 0; +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ + + + + +/*--------------------------------------------------------------------------- +|Prototype : HardFault_Handler +|Called by : None +|Preconditions : None +|Input parameters : None +|Output parameters : None +|Return value : None +|Description : TBD Cpu configuration will be generated here +----------------------------------------------------------------------------*/ +void HardFault_Handler(void) +{ + SystemSoftwareReset(); +} + +/*--------------------------------------------------------------------------- +|Prototype : cpu_get_opt_bytes +|Called by : None +|Preconditions : None +|Input parameters : None +|Output parameters : None +|Return value : None +|Description : +----------------------------------------------------------------------------*/ +void cpu_get_opt_bytes(void) +{ + g_cpu_opt_bytes.low = *(u32*)0x1ffffc00; + g_cpu_opt_bytes.high = *(u32*)0x1ffffc04; + + g_cpu_opt_bytes.iwdtslp = (uint8_t)((g_cpu_opt_bytes.high >> 4u) & 0x0fu); + g_cpu_opt_bytes.iwdtslp_f = (uint8_t)((g_cpu_opt_bytes.high >> 20u) & 0x0fu); + +} + + + +/*--------------------------------------------------------------------------- +|Prototype : System_EnableIrqGlobal +|Called by : None +|Preconditions : None +|Input parameters : None +|Output parameters : None +|Return value : None +|Description : +----------------------------------------------------------------------------*/ +void System_EnableIrqGlobal(void) +{ + if(ulInterruptDisableCount > 0ul) + { + ulInterruptDisableCount --; + if(ulInterruptDisableCount == 0ul) + { + __enable_irq(); /* PRQA S 3335*/ + } + } +} + + +/*--------------------------------------------------------------------------- +|Prototype : System_DisableIrqGlobal +|Called by : None +|Preconditions : None +|Input parameters : None +|Output parameters : None +|Return value : None +|Description : +----------------------------------------------------------------------------*/ +void System_DisableIrqGlobal(void) +{ + if(ulInterruptDisableCount < 0xfffffffful) + { + __disable_irq(); /* PRQA S 3335*/ + ulInterruptDisableCount ++; + } + else + { + SystemSoftwareReset(); + } +} + +/* END Cpu. */ diff --git a/code_boot_out/qm/bsp/Cpu.h b/code_boot_out/qm/bsp/Cpu.h new file mode 100644 index 0000000..f382017 --- /dev/null +++ b/code_boot_out/qm/bsp/Cpu.h @@ -0,0 +1,102 @@ +/** ########################################################################## +** Filename : +** Project : +** Module : +** Processor : +** Version : 1.0 +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20230602- --V1.0-- --mingyea--- --修改-- + +** #########################################################################*/ + +#ifndef Cpu_H__ +#define Cpu_H__ + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ +#include "common_types.h" +#include "fm33lg0xx.h" + +#include "fm33lg0xx_fl.h" +#if defined(USE_FULL_ASSERT) +#include "fm33_assert.h" +#endif /* USE_FULL_ASSERT */ +#include "assert.h" + +/*Include shared modules, which are used for whole project*/ +#if 0 +#include "device_registers.h" + +#include "interrupt_manager.h" +#include "clock.h" +#include "osif.h" +#include "lin_driver.h" +#include "lin_common_api.h" +#include "edma_driver.h" +#include "lptmr_driver.h" +/* Including needed modules to compile this module/procedure */ +#include "lin_cfg.h" +#include "lin1.h" +#include "lin2.h" +//#include "clockMan1.h" +//6#include "pin_mux.h" +//#include "dmaController1.h" +#include "lpTmr1.h" +#endif + +void System_EnableIrqGlobal(void); +void System_DisableIrqGlobal(void); + +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ +#if 0 //新改的上下文 +#define CPU_SR_ALLOC() //CPU_SR_ALLOC() +#define ENTER_CRITICAL() System_DisableIrqGlobal() +#define EXIT_CRITICAL() System_EnableIrqGlobal() +#else //老版的上下文 +#define CPU_SR_ALLOC() uint32_t primask +#define ENTER_CRITICAL() {primask = __get_PRIMASK();__disable_irq();} +#define EXIT_CRITICAL() __set_PRIMASK(primask) +#endif + + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ + + + +/*--------------------------------------------------------------------------- +- G L O B A L V A R I A B L E S +- only configuration table allowed here,variables are not allowed! +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ +void cpu_get_opt_bytes(void); + + +/* END Cpu. */ + +#endif +/* Cpu_H */ + diff --git a/code_boot_out/qm/bsp/clk.c b/code_boot_out/qm/bsp/clk.c new file mode 100644 index 0000000..c143658 --- /dev/null +++ b/code_boot_out/qm/bsp/clk.c @@ -0,0 +1,357 @@ +/** ########################################################################## +** Filename : +** Project : +** Module : +** Processor : +** Version : +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20230602- --V1.0-- --mingyea--- --修改-- + +** #########################################################################*/ + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ +#include "clk.h" +#include "mf_config.h" +#include "svd.h" +#include "wdog.h" +#include "nvic.h" +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- S T A T I C V A R I A B L E S +----------------------------------------------------------------------------*/ +//static clk_work_mode_e g_clk_work_mode; +static clk_clocks_freq_s g_clk_info; + + +/*--------------------------------------------------------------------------- +* G L O B A L V A R I A B L E S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ + +extern void SystemInit_hsi(void); + + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description :初始化 +----------------------------------------------------------------------------*/ +void clk_init(void) +{ + wdog_init(); + + FL_RMU_PDR_Enable(RMU); + //FL_RMU_PDR_Disable(RMU); + + FL_RMU_BOR_SetThreshold(RMU,FL_RMU_BOR_THRESHOLD_2P00V); + FL_RMU_BOR_Enable(RMU); + + FL_Init(); + MF_Clock_Init(); + #ifdef CLK_HSE_EN + /* XTHF 8M倍频至48M */ + SelXTHFToPLL(FL_CMU_PLL_PSC_DIV8, 48 - 1); + #else + SystemInit_hsi(); + #endif + FL_CMU_RCLP_Enable(); //其实默认己开 + //SystemCoreClockUpdate(); +} + + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +----------------------------------------------------------------------------*/ +void SystemDeInit (void) +{ + FL_SVD_DeInit(SVD); + SVD_Interrupt_DeInit(); + #if 0 + CKGEN_SetSysclkSrc(SYSCLK_SRC_INTERNAL_OSC); ///PLLCR, CMU_PLLCR_DB_Msk | CMU_PLLCR_REFPRSC_Msk | CMU_PLLCR_OSEL_Msk | CMU_PLLCR_INSEL_Msk, + (PLL_DB << CMU_PLLCR_DB_Pos) | PLL_REFPSC | PLL_OSEL | Source); +} + + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : RCHF振荡频率值 +|Output parameters : +|Return value : +|Description : RCHF初始化配置 +----------------------------------------------------------------------------*/ +void RCHFInit(uint32_t clock) +{ + switch(clock) + { + case FL_CMU_RCHF_FREQUENCY_8MHZ: + FL_CMU_RCHF_WriteTrimValue(RCHF8M_TRIM); + break; + + case FL_CMU_RCHF_FREQUENCY_16MHZ: + FL_CMU_RCHF_WriteTrimValue(RCHF16M_TRIM); + break; + + case FL_CMU_RCHF_FREQUENCY_24MHZ: + FL_CMU_RCHF_WriteTrimValue(RCHF24M_TRIM); + break; + + case FL_CMU_RCHF_FREQUENCY_32MHZ: + FL_CMU_RCHF_WriteTrimValue(RCHF32M_TRIM); + break; + + default: + FL_CMU_RCHF_WriteTrimValue(RCHF8M_TRIM); + break; + } + + FL_CMU_RCHF_SetFrequency(clock); +} + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : rchf FL_CMU_RCHF_FREQUENCY_8MHZ + clock PLL倍频输出频率 +|Output parameters : +|Return value : +|Description : RCHF初始化配置 +----------------------------------------------------------------------------*/ +void SelRCHFToPLL(uint32_t rchf, uint32_t clock) +{ + FL_NVIC_ConfigTypeDef InterruptConfigStruct; + + uint32_t counter = 0; + uint32_t readystatus = 0; + uint32_t div = FL_CMU_PLL_PSC_DIV8; + + if(clock > 63) { return; } + + RCHFInit(rchf); + + FL_CMU_ClearFlag_SYSCLKSELError(); //清除时钟选择错误标志 + FL_CMU_EnableIT_SYSCLKSELError(); //使能时钟选择错误中断 + + InterruptConfigStruct.preemptPriority = NVIC_PRIORITY_CLK; + FL_NVIC_Init(&InterruptConfigStruct, FDET_IRQn); //系统时钟选择错误中断 + + switch(rchf) + { + case FL_CMU_RCHF_FREQUENCY_16MHZ: + div = FL_CMU_PLL_PSC_DIV16; + break; + + case FL_CMU_RCHF_FREQUENCY_24MHZ: + div = FL_CMU_PLL_PSC_DIV24; + break; + + case FL_CMU_RCHF_FREQUENCY_32MHZ: + div = FL_CMU_PLL_PSC_DIV32; + break; + + default: + break; + } + + if(clock <= 23) + { + FL_FLASH_SetReadWait(FLASH, FL_FLASH_READ_WAIT_0CYCLE); + } + + else + if((clock > 23) && (clock <= 47)) + { + FL_FLASH_SetReadWait(FLASH, FL_FLASH_READ_WAIT_1CYCLE); + } + + else + { + FL_FLASH_SetReadWait(FLASH, FL_FLASH_READ_WAIT_2CYCLE); + } + + CMU_PLL_ConfigDomain_SYSTEM(FL_CMU_PLL_CLK_SOURCE_RCHF, div, clock, FL_CMU_PLL_OUTPUT_X1); + + FL_CMU_PLL_Enable(); + do + { + readystatus = FL_CMU_IsActiveFlag_PLLReady(); + counter++; + } while((readystatus != 0x1U) && (counter != PLL_TIMEOUT)); + + FL_CDIF_SetPrescaler(CDIF, FL_CDIF_PSC_DIV8); //CDIF接口访问的最高频率建议不超过8M + + FL_CMU_SetSystemClockSource(FL_CMU_SYSTEM_CLK_SOURCE_PLL); //系统时钟源选择PLL + FL_CMU_SetAHBPrescaler(FL_CMU_AHBCLK_PSC_DIV1); + FL_CMU_SetAPBPrescaler(FL_CMU_APBCLK_PSC_DIV1); + SystemCoreClockUpdate(); +} + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : XTHF初始化配置 +----------------------------------------------------------------------------*/ +void XTHFInit(void) +{ + FL_GPIO_InitTypeDef GPIO_InitStruct = {0}; + FL_NVIC_ConfigTypeDef InterruptConfigStruct; + //PC2.3配置成模拟功能，外接XTHF + + GPIO_InitStruct.pin = FL_GPIO_PIN_2 | FL_GPIO_PIN_3; + GPIO_InitStruct.mode = FL_GPIO_MODE_ANALOG; + GPIO_InitStruct.outputType = FL_GPIO_OUTPUT_PUSHPULL; + GPIO_InitStruct.pull = (uint8_t)FL_DISABLE; + GPIO_InitStruct.remapPin = (uint8_t)FL_DISABLE; + GPIO_InitStruct.analogSwitch = (uint8_t)FL_DISABLE; + (void)FL_GPIO_Init(GPIOC, &GPIO_InitStruct); + + + + //使能XTHF + FL_CMU_XTHF_Enable(); + FL_CMU_XTHF_WriteDriverStrength(0x02); //振荡强度---05 可能合适 10PF， + FL_DelayMs(2); + + #if 1 //晶振停振检测，要开启 + FL_CMU_ClearFlag_XTHFFail(); + FL_CMU_EnableIT_XTHFFail(); //开启XTHF停振检测中断 + InterruptConfigStruct.preemptPriority = NVIC_PRIORITY_CLK; + FL_NVIC_Init(&InterruptConfigStruct, FDET_IRQn); + #endif + + SystemCoreClockUpdate(); + +} + + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : div 对XTHF参考时钟的分频，目标分频到1M; clock PLL倍频输出频率 +|Output parameters : +|Return value : +|Description : 选择外部XTHF作为锁相环的参考时钟 +----------------------------------------------------------------------------*/ +void SelXTHFToPLL(uint32_t div, uint32_t clock) +{ + FL_NVIC_ConfigTypeDef InterruptConfigStruct; + uint32_t counter = 0; + uint32_t readystatus = 0; + + if(clock > 63) { return; } + + XTHFInit(); + + FL_CMU_ClearFlag_SYSCLKSELError(); //清除时钟选择错误标志 + FL_CMU_EnableIT_SYSCLKSELError(); //使能时钟选择错误中断 + + InterruptConfigStruct.preemptPriority = 0x00; + FL_NVIC_Init(&InterruptConfigStruct, FDET_IRQn); //系统时钟选择错误中断 + + if(clock <= 23) + { + FL_FLASH_SetReadWait(FLASH, FL_FLASH_READ_WAIT_0CYCLE); + } + + else + if((clock > 23) && (clock <= 47)) + { + FL_FLASH_SetReadWait(FLASH, FL_FLASH_READ_WAIT_1CYCLE); + } + + else + { + FL_FLASH_SetReadWait(FLASH, FL_FLASH_READ_WAIT_2CYCLE); + } + + CMU_PLL_ConfigDomain_SYSTEM(FL_CMU_PLL_CLK_SOURCE_XTHF, div, clock, FL_CMU_PLL_OUTPUT_X1); + + FL_CMU_PLL_Enable(); + do + { + readystatus = FL_CMU_IsActiveFlag_PLLReady(); + counter++; + } while((readystatus != 0x1U) && (counter != PLL_TIMEOUT)); + FL_CDIF_SetPrescaler(CDIF, FL_CDIF_PSC_DIV8); //CDIF接口访问的最高频率建议不超过8M + + FL_CMU_SetSystemClockSource(FL_CMU_SYSTEM_CLK_SOURCE_PLL); + FL_CMU_SetAHBPrescaler(FL_CMU_AHBCLK_PSC_DIV1); + FL_CMU_SetAPBPrescaler(FL_CMU_APBCLK_PSC_DIV1); + SystemCoreClockUpdate(); +} + diff --git a/code_boot_out/qm/bsp/clk.h b/code_boot_out/qm/bsp/clk.h new file mode 100644 index 0000000..edea1be --- /dev/null +++ b/code_boot_out/qm/bsp/clk.h @@ -0,0 +1,110 @@ +/** ########################################################################## +** Filename : +** Project : +** Module : +** Processor : +** Version : 1.0 +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20230602- --V1.0-- --mingyea--- --修改-- + +** #########################################################################*/ + +#ifndef CLK_H___ +#define CLK_H___ + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ + +/* Include inherited beans */ +#include "common_types.h" +#include "clk_cfg.h" + +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ +//自己手動加的 +typedef enum +{ + CLK_SYS_SRC_NULL=0, + CLK_SYS_SRC_OSC=1, + CLK_SYS_SRC_SIRC=2, + CLK_SYS_SRC_FIRC=3, + CLK_SYS_SRC_SPLL=6 +}clk_sys_source_e; + +typedef struct +{ + u8 error; + //clk_work_mode_e mode; + //clk_sys_source_e sys_src; + u32 osc_freq; + u32 firc_freq; + u32 sirc_freq; + u32 vco_freq; /*!< returns SYSCLK clock frequency expressed in Hz */ + u32 spll_freq; /*!< returns SYSCLK clock frequency expressed in Hz */ + u32 core_freq; /*!< returns SYSCLK clock frequency expressed in Hz */ + u32 sysclk_freq; /*!< returns SYSCLK clock frequency expressed in Hz */ + u32 bus_freq; /*!< returns HCLK clock frequency expressed in Hz */ + u32 flash_freq; /*!< returns PCLK1 clock frequency expressed in Hz */ + u32 spll1_freq; /*!< returns PCLK2 clock frequency expressed in Hz */ + u32 spll2_freq; /*!< returns PCLK2 clock frequency expressed in Hz */ + u32 firc1_freq; /*!< returns ADCCLK clock frequency expressed in Hz */ + u32 firc2_freq; /*!< returns ADCCLK clock frequency expressed in Hz */ + u32 sirc1_freq; /*!< returns ADCCLK clock frequency expressed in Hz */ + u32 sirc2_freq; /*!< returns ADCCLK clock frequency expressed in Hz */ + u32 sosc1_freq; /*!< returns ADCCLK clock frequency expressed in Hz */ + u32 sosc2_freq; /*!< returns ADCCLK clock frequency expressed in Hz */ + u32 rtc_freq; /*!< returns ADCCLK clock frequency expressed in Hz */ + u32 lpo_freq; /*!< returns ADCCLK clock frequency expressed in Hz */ + u32 rtc_out_freq; /*!< returns ADCCLK clock frequency expressed in Hz */ +}clk_clocks_freq_s; + +/*--------------------------------------------------------------------------- +- G L O B A L V A R I A B L E S +- only configuration table allowed here,variables are not allowed! +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ + +void clk_init(void); +void clk_get_clock_frequence(clk_clocks_freq_s* clk_freq); +void clk_update_clock_frequence(void); +void SystemDeInit (void); + +void FDET_IRQHandler(void); +void CMU_PLL_ConfigDomain_SYSTEM(uint32_t Source, uint32_t PLL_REFPSC, uint32_t PLL_DB, uint32_t PLL_OSEL); + +void SelRCHFToPLL(uint32_t rchf, uint32_t clock); +void SelXTHFToPLL(uint32_t div, uint32_t clock); + +void RCHFInit(uint32_t clock); +void XTHFInit(void); + + +#endif + +/* ifndef CLK_H___ */ + diff --git a/code_boot_out/qm/bsp/clk_cfg.c b/code_boot_out/qm/bsp/clk_cfg.c new file mode 100644 index 0000000..e2b3b91 --- /dev/null +++ b/code_boot_out/qm/bsp/clk_cfg.c @@ -0,0 +1,93 @@ +/** ########################################################################## +** Filename : +** Project : +** Module : +** Processor : +** Version : 1.0 +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20191106- --V01-- --LYJ--- --初版-- +** -20230602- --V1.0-- --mingyea--- --修改-- + +** #########################################################################*/ + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ +#include "clk.h" + +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- S T A T I C V A R I A B L E S +----------------------------------------------------------------------------*/ +//static uint32_t SYSCLKSELErrorState[4] = {0}; + + +/*--------------------------------------------------------------------------- +* G L O B A L V A R I A B L E S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : CMU时钟中断 +----------------------------------------------------------------------------*/ +void FDET_IRQHandler(void) +{ + //SYSCLKSELErrorState[2]++; + /* 时钟选择中断处理 */ + if((FL_CMU_IsEnabledIT_SYSCLKSELError() == 0x01UL) + && (FL_CMU_IsActiveFlag_SYSCLKSELError() == 0x01UL)) + { + /* 清除时钟选择错误标志 */ + FL_CMU_ClearFlag_SYSCLKSELError(); + + //SYSCLKSELErrorState[0]++; + } + if((FL_CMU_IsEnabledIT_XTHFFail() == 0x01UL) + && (FL_CMU_IsActiveFlag_XTHFFail() == 0x01UL)) + { + /* 清除高频晶体停振标志 */ + FL_CMU_ClearFlag_XTHFFail(); + //SYSCLKSELErrorState[1]++; + /*应用处理逻辑*/ + //clk_init(); //重新配置 + SystemSoftwareReset(); + } +} + + diff --git a/code_boot_out/qm/bsp/clk_cfg.h b/code_boot_out/qm/bsp/clk_cfg.h new file mode 100644 index 0000000..52e3f71 --- /dev/null +++ b/code_boot_out/qm/bsp/clk_cfg.h @@ -0,0 +1,63 @@ +/** ########################################################################## +** Filename : +** Project : +** Module : +** Processor : +** Version : 1.0 +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20230602- --V1.0-- --mingyea--- --修改-- + +** #########################################################################*/ + +#ifndef CLK_CFG_H___ +#define CLK_CFG_H___ + + +#include "cpu.h" +#include "common_cfg.h" + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ +#define PLL_TIMEOUT 0xFFFFFFFFU + +#define CLK_HSE_EN 1 //外部晶振使能 + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- G L O B A L V A R I A B L E S +- only configuration table allowed here,variables are not allowed! +----------------------------------------------------------------------------*/ +//extern uint32_t SYSCLKSELErrorState ; + + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ + + + +#endif \ No newline at end of file diff --git a/code_boot_out/qm/bsp/device/iar/fm33lg0xx.zip b/code_boot_out/qm/bsp/device/iar/fm33lg0xx.zip new file mode 100644 index 0000000..62df170 Binary files /dev/null and b/code_boot_out/qm/bsp/device/iar/fm33lg0xx.zip differ diff --git a/code_boot_out/qm/bsp/eeprom.c b/code_boot_out/qm/bsp/eeprom.c new file mode 100644 index 0000000..a72c407 --- /dev/null +++ b/code_boot_out/qm/bsp/eeprom.c @@ -0,0 +1,1358 @@ +/** ########################################################################## +** Filename : +** Project : +** Module : +** Processor : +** Version : 1.0 +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20230602- --V1.0-- --mingyea--- --修改-- + +** #########################################################################*/ + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ + +#include "error.h" +#include "eeprom.h" +#include "eeprom_seq.h" +#include "eeprom_state_machine.h" + +#include "wdog.h" + +#ifdef NVM_EEPROM_EXT_EN +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ + + + +/*--------------------------------------------------------------------------- +- S T A T I C V A R I A B L E S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +* G L O B A L V A R I A B L E S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : 擦除数据 +----------------------------------------------------------------------------*/ +uint8_t eeprom_erase_page(u32 page_addr) +{ + uint8_t l_flash_status ; + + #ifdef EEPROM_EXT_JUDGE_PAGE_ADDR + assert_param(page_addr>=EEPROM_FLASH_ADDR_START); + assert_param(page_addr=EEPROM_FLASH_ADDR_START); + assert_param(addr<=EEPROM_AERA_END_ADDR); + assert_param((addr&FLASH_ADDRS_ALIGN_RES_MASK)==0u); + #endif + wdog_task(); + if (FL_FAIL == FL_FLASH_Program_Word(FLASH, addr, data)) + { + l_flash_status = EFLASH_STATUS_BUSY; + } + else + { + l_flash_status = EFLASH_STATUS_SUCCESS; + } + return l_flash_status; +} + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description :初始化 +----------------------------------------------------------------------------*/ +u16 eeprom_drv_init(u8 area_id) +{ + u16 i; + u16 l_page0_status, l_page1_status; + #ifdef EEPROM_FLASH_CAN_REWRITE_TO_BIT_ZERO + #else + u16 l_page0_auxi, l_page1_auxi; + #endif + //u16 l_addr_index = 0u; + //u16 l_eeprom_status = 0u, l_read_status = EFLASH_READ_FAILED; + u16 l_flash_status = (u16)EFLASH_STATUS_SUCCESS; + u8 l_flag_out=0u; + + assert_param(area_id=EEPROM_AREA_TOTAL) + { + l_flash_status = (u16)EFLASH_STATUS_PPADRER_ERROR; + //return l_flash_status; + } + else + { + /* Get Page0 status */ + l_page0_status = (*(__IO eflash_operate_t*)EFLASH_AREAx_PAGE0_BASE_ADDRESS(area_id)); /*PRQA S 4461*/ + /* Get Page1 status */ + l_page1_status = (*(__IO eflash_operate_t*)EFLASH_AREAx_PAGE1_BASE_ADDRESS(area_id)); /*PRQA S 4461*/ + #ifdef EEPROM_FLASH_CAN_REWRITE_TO_BIT_ZERO + #else + /* Get Page0 status */ + l_page0_auxi = (*(__IO eflash_operate_t*)(EFLASH_AREAx_PAGE0_BASE_ADDRESS(area_id)+EFLASH_OPERATION_LEN)); + /* Get Page1 status */ + l_page1_auxi = (*(__IO eflash_operate_t*)(EFLASH_AREAx_PAGE1_BASE_ADDRESS(area_id)+EFLASH_OPERATION_LEN)); + #endif + /* Check for invalid header states and repair if necessary */ + switch (l_page0_status) + { + case EFLASH_ERASED: + if (l_page1_status == EFLASH_VALID_PAGE) /* Page0 erased, Page1 valid */ + { + //其实不需要每次都擦除， + #if 1 //其实没必要，每次都删除 + if(g_eeprom_ext[area_id].first_reset_flag != EEPROM_FLAG_NOT_FIRST_RESET) + { + for(i = 0; i < EEPROM_AREAx_EFLASH_PAGE_NUM(area_id); i ++) + { + l_flash_status = (u16)eeprom_erase_page(EFLASH_AREAx_PAGE0_BASE_ADDRESS(area_id) + (u32)i * (u32)EFLASH_PAGE_SIEZ); + if(l_flash_status != (u16)EFLASH_STATUS_SUCCESS) + { + break; + } + } + /* If erase operation was failed, a Flash error code is returned */ + if (l_flash_status != (u16)EFLASH_STATUS_SUCCESS) + { + //return l_flash_status; + l_flag_out=1u; + break; + } + } + #endif + } + #ifdef EEPROM_FLASH_CAN_REWRITE_TO_BIT_ZERO + else if (l_page1_status == EFLASH_RECEIVE_DATA) /* Page0 erased, Page1 receive */ + { + //g_eeprom_ext[area_id].first_reset_flag = EEPROM_FLAG_FIRST_RESET_CLEAR; + /* Erase Page0 */ + for(i = 0; i < EEPROM_AREAx_EFLASH_PAGE_NUM(area_id); i ++) + { + l_flash_status = (u16)eeprom_erase_page(EFLASH_AREAx_PAGE0_BASE_ADDRESS(area_id) + (u32)i * (u32)EFLASH_PAGE_SIEZ); + if(l_flash_status != (u16)EFLASH_STATUS_SUCCESS) + { + break; + } + } + /* If erase operation was failed, a Flash error code is returned */ + if (l_flash_status != (u16)EFLASH_STATUS_SUCCESS) + { + l_flag_out=1u; + break; + } + /* Mark Page1 as valid */ + l_flash_status = (u16)eeprom_program_u32(EFLASH_AREAx_PAGE1_BASE_ADDRESS(area_id), (u32)EFLASH_VALID_PAGE); + /* If program operation was failed, a Flash error code is returned */ + if (l_flash_status != (u16)EFLASH_STATUS_SUCCESS) + { + l_flag_out=1u; + break; + } + g_eeprom_ext[area_id].state = EFLASH_STATE_IDLE; + break; + } + #endif + else /* First EEPROM access (Page0&1 are erased) or invalid state -> format EEPROM */ + { + #ifdef EEPROM_FLASH_CAN_REWRITE_TO_BIT_ZERO + + #else + if( l_page0_auxi == EFLASH_RECEIVE_DATA ) + { + //正在转移，不用格式化--并且把FFFFF清成0， + l_flash_status = eeprom_program_u32(EFLASH_AREAx_PAGE0_BASE_ADDRESS(area_id), EFLASH_VALID_PAGE); + if (l_flash_status != EFLASH_STATUS_SUCCESS) + { + //return l_flash_status; + l_flag_out=1u; + break; + } + g_eeprom_ext[area_id].state = EFLASH_STATE_IDLE; + } + else if(l_page1_auxi == EFLASH_RECEIVE_DATA ) + { + //正在转移，不用格式化--并且把FFFFF清成0， + l_flash_status = eeprom_program_u32(EFLASH_AREAx_PAGE1_BASE_ADDRESS(area_id), EFLASH_VALID_PAGE); + if (l_flash_status != EFLASH_STATUS_SUCCESS) + { + //return l_flash_status; + l_flag_out=1u; + break; + } + g_eeprom_ext[area_id].state = EFLASH_STATE_IDLE; + } + else + #endif + { + /* Erase both Page0 and Page1 and set Page0 as valid page */ + l_flash_status = (u16)eeprom_format(area_id); + /* If erase/program operation was failed, a Flash error code is returned */ + if (l_flash_status != (u16)EFLASH_STATUS_SUCCESS) + { + //return l_flash_status; + l_flag_out=1u; + break; + } + g_eeprom_ext[area_id].first_reset_flag = EEPROM_FLAG_FIRST_RESET_CLEAR; + } + } + break; + #ifdef EEPROM_FLASH_CAN_REWRITE_TO_BIT_ZERO + case EFLASH_RECEIVE_DATA: + if (l_page1_status == EFLASH_VALID_PAGE) /* Page0 receive, Page1 valid */ + { + #ifdef EEPROM_EXT_STATE_MACHILE_ENABLE + //--其实可以考虙删除PAGE0，重新在状态机中搬 + /* Erase Page1 */ + for(i = 0; i < EEPROM_AREAx_EFLASH_PAGE_NUM(area_id); i ++) + { + //wdog_task(); + //wdt_disable(); + l_flash_status = (u16)eeprom_erase_page(EFLASH_AREAx_PAGE0_BASE_ADDRESS(area_id) + (u32)i * (u32)EFLASH_PAGE_SIEZ); + //wdog_init(); + //wdog_task(); + if(l_flash_status != (u16)EFLASH_STATUS_SUCCESS) + { + break; + } + } + /* If erase operation was failed, a Flash error code is returned */ + if (l_flash_status != (u16)EFLASH_STATUS_SUCCESS) + { + l_flag_out=1u; + break; + } + //g_eeprom_ext[area_id].first_reset_flag = EEPROM_FLAG_FIRST_RESET_CLEAR; + g_eeprom_ext[area_id].trans_page_count =0u; + g_eeprom_ext[area_id].transfer_state = EFLASH_PAGE_TRANSFER_STATE_WRITE_NEW_DATA; + #else + /* Transfer data from Page1 to Page0 */ //--其实可以考虙删除PAGE0，重新在状态机中搬 + eeprom_reset_page_transfer_continus(area_id,g_eeprom_ext[area_id].page_cur_id, g_logic_page_write_data[area_id]); + #endif + } + else if(l_page1_status == EFLASH_ERASED) /* Page0 receive, Page1 erased */ + { + /* Erase Page1 */ + //g_eeprom_ext[area_id].first_reset_flag = EEPROM_FLAG_FIRST_RESET_CLEAR; + for(i = 0; i < EEPROM_AREAx_EFLASH_PAGE_NUM(area_id); i ++) + { + l_flash_status = (u16)eeprom_erase_page(EFLASH_AREAx_PAGE1_BASE_ADDRESS(area_id) + (u32)i * (u32)EFLASH_PAGE_SIEZ); + if(l_flash_status != (u16)EFLASH_STATUS_SUCCESS) + { + break; + } + } + /* If erase operation was failed, a Flash error code is returned */ + if (l_flash_status != (u16)EFLASH_STATUS_SUCCESS) + { + l_flag_out=1u; + break; + } + /* Mark Page0 as valid */ + l_flash_status = (u16)eeprom_program_u32(EFLASH_AREAx_PAGE0_BASE_ADDRESS(area_id), (u32)EFLASH_VALID_PAGE); + /* If program operation was failed, a Flash error code is returned */ + if (l_flash_status != (u16)EFLASH_STATUS_SUCCESS) + { + l_flag_out=1u; + break; + } + g_eeprom_ext[area_id].state = EFLASH_STATE_IDLE; + } + else /* Invalid state -> format eeprom */ + { + /* Erase both Page0 and Page1 and set Page0 as valid page */ + l_flash_status = (u16)eeprom_format(area_id); + /* If erase/program operation was failed, a Flash error code is returned */ + if (l_flash_status != (u16)EFLASH_STATUS_SUCCESS) + { + //return l_flash_status; + l_flag_out=1u; + break; + } + g_eeprom_ext[area_id].first_reset_flag = EEPROM_FLAG_FIRST_RESET_CLEAR; + } + break; + #endif + case EFLASH_VALID_PAGE: + if (l_page1_status == EFLASH_VALID_PAGE) /* Invalid state -> format eeprom */ + { + /* Erase both Page0 and Page1 and set Page0 as valid page */ + l_flash_status = (u16)eeprom_format(area_id); + /* If erase/program operation was failed, a Flash error code is returned */ + if (l_flash_status != (u16)EFLASH_STATUS_SUCCESS) + { + //return l_flash_status; + l_flag_out=1u; + break; + } + g_eeprom_ext[area_id].first_reset_flag = EEPROM_FLAG_FIRST_RESET_CLEAR; + } + else if (l_page1_status == EFLASH_ERASED) /* Page0 valid, Page1 erased */ + { + /* Erase Page1 */ + #if 1 //其实没必要，每次都删除 + if(g_eeprom_ext[area_id].first_reset_flag != EEPROM_FLAG_NOT_FIRST_RESET) + { + for(i = 0; i < EEPROM_AREAx_EFLASH_PAGE_NUM(area_id); i ++) + { + l_flash_status = (u16)eeprom_erase_page(EFLASH_AREAx_PAGE1_BASE_ADDRESS(area_id) + (u32)i * (u32)EFLASH_PAGE_SIEZ); + if(l_flash_status != (u16)EFLASH_STATUS_SUCCESS) + { + break; + } + } + /* If erase operation was failed, a Flash error code is returned */ + if (l_flash_status != (u16)EFLASH_STATUS_SUCCESS) + { + //return l_flash_status; + l_flag_out=1u; + break; + } + } + #endif + } + else /* Page0 valid, Page1 receive */ + { + #ifdef EEPROM_EXT_STATE_MACHILE_ENABLE + for(i = 0; i < EEPROM_AREAx_EFLASH_PAGE_NUM(area_id); i ++) + { + //wdog_task(); + //wdt_disable(); + l_flash_status = (u16)eeprom_erase_page(EFLASH_AREAx_PAGE1_BASE_ADDRESS(area_id) + (u32)i * (u32)EFLASH_PAGE_SIEZ); + //wdog_init(); + //wdog_task(); + if(l_flash_status != (u16)EFLASH_STATUS_SUCCESS) + { + break; + } + } + /* If erase operation was failed, a Flash error code is returned */ + if (l_flash_status != (u16)EFLASH_STATUS_SUCCESS) + { + l_flag_out=1u; + break; + } + g_eeprom_ext[area_id].trans_page_count =0u; + g_eeprom_ext[area_id].transfer_state = EFLASH_PAGE_TRANSFER_STATE_WRITE_NEW_DATA; + #else + /* Transfer data from Page0 to Page1 */ //--其实可以考虙删除PAGE1，重新在状态机中搬 + eeprom_reset_page_transfer_continus(area_id,g_eeprom_ext[area_id].page_cur_id, g_logic_page_write_data[area_id]); + #endif + } + + break; + + default: /* Any other state -> format eeprom */ + /* Erase both Page0 and Page1 and set Page0 as valid page */ + l_flash_status = (u16)eeprom_format(area_id); + /* If erase/program operation was failed, a Flash error code is returned */ + if (l_flash_status != (u16)EFLASH_STATUS_SUCCESS) + { + //return l_flash_status; + l_flag_out=1u; + break; + } + g_eeprom_ext[area_id].first_reset_flag = EEPROM_FLAG_FIRST_RESET_CLEAR; + break; + } + } + if(l_flag_out==0u) + { + l_flash_status = (u16)EFLASH_STATUS_SUCCESS; + } + return l_flash_status; +} + + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : area_id: Var片区；virt_addr: Variable virtual address；data: Global variable contains the read variable value +|Output parameters : +|Return value : Success or error status: + * - 0: if variable was found + * - 1: if the variable was not found + * - EFLASH_NO_VALID_PAGE: if no valid page was found. +|Description :读取一个U32 +----------------------------------------------------------------------------*/ +u16 eeprom_read_one_element(u8 area_id,u16 virt_addr, u32* data) +{ + u16 l_valid_page = EFLASH_PAGE0; + u16 l_addr_value = 0x5555, l_read_status = EFLASH_READ_FAILED; + u32 l_addr, l_page_start_addr; + + assert_param(area_id (l_page_start_addr + EFLASH_OPERATION_LEN)) + { + /* Get the current location content to be compared with virtual address */ + l_addr_value = (*(__IO eflash_operate_t*)l_addr); /* PRQA S 4461*/ + + /* Compare the read address with the virtual address */ + if (l_addr_value == (virt_addr + EEPROM_VIRT_ADDRESS_OFFSET)) + { + /* Get content of l_addr-EFLASH_OPERATION_LEN which is variable value */ + *data = (*(__IO eflash_operate_t*)(l_addr - EFLASH_OPERATION_LEN)); + + /* In case variable value is read, reset l_read_status flag */ + l_read_status = EFLASH_READ_OK; + + break; + } + else + { + /* Next address location */ + l_addr = l_addr - EFLASH_ELEMENT_LEN; + } + } + + //如果讀取，沒有該數據，返回一個默認值 + if(l_read_status!=EFLASH_READ_OK) + { + *data= EEPROM_EXT_UN_WRITE_INIT; + } + + /* Return l_read_status value: (0: variable exist, 1: variable doesn't exist) */ + return l_read_status; + +} + + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : area_id: Var片区；virt_addr: 16 bit virtual address of the variable + data: 16 bit data to be written as variable value +|Output parameters : +|Return value : Success or error status: + * - EFLASH_STATUS_SUCCESS: on success + * - EFLASH_PAGE_FULL: if valid page is full + * - EFLASH_NO_VALID_PAGE: if no valid page was found + * - Flash error code: on write Flash error +|Description :快速定位地址； +----------------------------------------------------------------------------*/ +void eeprom_get_current_page_addr(u8 area_id,u16 *p_valid_page,u32 *p_addr) +{ + u16 l_valid_page = EFLASH_PAGE0; + //uint8_t l_status_res = EFLASH_STATUS_SUCCESS; + u32 l_current_addr = 0u; + u32 l_addr, l_page_end_addr; + + /* Get active Page for read operation */ + l_valid_page = eeprom_find_valid_page(area_id,EFLASH_READ_FROM_VALID_PAGE); + + /* Check if there is no valid page */ + if (l_valid_page == EFLASH_NO_VALID_PAGE) + { + *p_valid_page = EFLASH_NO_VALID_PAGE; + *p_addr = EFLASH_READ_NOT_VALID_ADDR_CUR; //表示没有 有效的页 + return ; + } + *p_valid_page = l_valid_page; + /* Get the valid Page start l_addr */ + l_addr = (u32)(EFLASH_AREAx_PAGE0_BASE_ADDRESS(area_id) + (u32)((u32)l_valid_page * \ + (u32)EFLASH_AREAx_MASS_PAGE_SIZE(area_id)) + (u32)EFLASH_PAGE_FIRST_VARIABLE_ADDRESS); + + /* Get the valid Page end l_addr */ + l_page_end_addr = (u32)((EFLASH_AREAx_PAGE0_BASE_ADDRESS(area_id) - (u32)EFLASH_OPERATION_LEN) + \ + (u32)(((u32)1 + (u32)l_valid_page) * (u32)EFLASH_AREAx_MASS_PAGE_SIZE(area_id))); + /* Check each active page address starting from begining */ + while (l_addr <= l_page_end_addr) + { + /* Verify if l_addr and l_addr+EFLASH_OPERATION_LEN contents are all 0xF */ + #if (EFLASH_OPERATION_LEN == 2) + if ((*(__IO eflash_operate_t*)l_addr) == 0xFFFFFFFF) + #elif (EFLASH_OPERATION_LEN == 4) + if (((*(__IO eflash_operate_t*)l_addr) == 0xFFFFFFFF) && + ((*(__IO eflash_operate_t*)(l_addr - EFLASH_OPERATION_LEN)) == 0xFFFFFFFF)) //我认为目前-4是合理的 因为数据在地址前面 + #endif + { + /* Set variable data */ + //向前找，如果先找到FFFF，则认为是空的，当前可以填的。 + l_current_addr = l_addr; + *p_addr = l_current_addr; + /* Return program operation status */ + return ;//l_current_addr; + } + else + { + /* Next address location */ + l_addr = l_addr + EFLASH_ELEMENT_LEN; + } + } + + l_current_addr = l_page_end_addr; + *p_addr = l_current_addr; //对齐到实际地址 + /* Return EFLASH_PAGE_FULL in case the valid page is full */ + return ;//l_current_addr; + +} + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : Erases EFLASH_PAGE0 and EFLASH_PAGE1 and writes EFLASH_VALID_PAGE header to EFLASH_PAGE0 +|Output parameters : +|Return value : Status of the last operation (Flash write or erase) done during + * EEPROM formating +|Description : +----------------------------------------------------------------------------*/ +uint8_t eeprom_format(u8 area_id) +{ + uint8_t l_status_res = EFLASH_STATUS_SUCCESS; + u8 i; + + assert_param(area_id= EEPROM_AREAx_ADDR_TOTAL_U32(area_id)) + { + g_eeprom_ext[area_id].trans_page_count = 0; + l_status_res = EFLASH_STATUS_BUSY; + g_eeprom_ext[area_id].eflash_page_index = 0; + g_eeprom_ext[area_id].transfer_state = EFLASH_PAGE_TRANSFER_STATE_ERASE; + g_eeprom_ext[area_id].erase_state = EFLASH_PAGE_ERASE_STATE_WAIT_LAST_OPERATION; + #ifdef EEPROM_EXT_DEBUG_EN + g_eeprom_ext_test[area_id].test_count[8]++; + #endif + break; + } + } + l_status_res = EFLASH_STATUS_BUSY; + break; + case EFLASH_PAGE_TRANSFER_STATE_ERASE: + + l_status_res = eeprom_erase_page((u32)g_eeprom_ext[area_id].page_addr_old + \ + (u32)g_eeprom_ext[area_id].eflash_page_index * (u32)EFLASH_PAGE_SIEZ); + if (l_status_res != EFLASH_STATUS_SUCCESS) + { + return l_status_res; + } + #ifdef EEPROM_EXT_DEBUG_EN + g_eeprom_ext_test[area_id].test_count[9]++; + #endif + g_eeprom_ext[area_id].eflash_page_index ++; + if(g_eeprom_ext[area_id].eflash_page_index >= EEPROM_AREAx_EFLASH_PAGE_NUM(area_id)) + { + #ifdef EEPROM_EXT_DEBUG_IO_EN + EEPROM_EXT_TEST_ON(area_id); + #endif + l_status_res = eeprom_program_u32(g_eeprom_ext[area_id].page_addr_new, EFLASH_VALID_PAGE); + #ifdef EEPROM_EXT_DEBUG_IO_EN + EEPROM_EXT_TEST_OFF(area_id); + #endif + #ifdef EEPROM_EXT_DEBUG_EN + g_eeprom_ext_test[area_id].test_count[10]++; + #endif + } + else + { + l_status_res = EFLASH_STATUS_BUSY; + #ifdef EEPROM_EXT_DEBUG_EN + g_eeprom_ext_test[area_id].test_count[11]++; + #endif + } + break; + default: + l_status_res = EFLASH_STATUS_CMD_INVALID; + break; + } + return (l_status_res); +} + + + + + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : None +|Preconditions : None +|Input parameters : +|Output parameters : None +|Return value : None +|Description +----------------------------------------------------------------------------*/ +u8 eeprom_ext_get_state(u8 area_id) +{ + assert_param(area_id1u + eeprom_area_init(EEPROM_AREA_ID_1); + #endif +} + + + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : None +|Preconditions : None +|Input parameters : +|Output parameters : None +|Return value : None +|Description 任务 +----------------------------------------------------------------------------*/ +void eeprom_task(void) +{ + eeprom_test_task(); + #if 1 + //if(g_eeprom_input_test.flag==0x1) + { + //g_eeprom_input_test.flag=2u; + //g_eeprom_input_test.count++; + //eeprom_ext_input_test(); + //eeprom_ext_restart(); + //加一个低电压的判断 + if(SVD_ISR_SVDR_Msk != FL_SVD_GetLatchedPowerStatus(SVD)) + { + return ; //l_result; + } + #ifdef EEPROM_EXT_STATE_MACHILE_ENABLE + { + eeprom_state_machine_task(EEPROM_AREA_ID_0); + #if EEPROM_AREA_TOTAL >1u + eeprom_state_machine_task(EEPROM_AREA_ID_1); + #endif + } + #endif + } + #else + #ifdef EEPROM_EXT_STATE_MACHILE_ENABLE + u8 l_power_grade; + l_power_grade = power_drive_get_grade(POWER_GRADE_ID_FUNC); + if( ( (l_power_grade == POWER_GRADE_FUNC_NORMAL) || (l_power_grade == POWER_GRADE_FUNC_HIGH) ) //电压不能低于9v + ) + { + #ifdef EEPROM_EXT_DEBUG_EN + //g_eeprom_ext_test.test_count[37]++; + #endif + #ifdef EEPROM_EXT_STATE_MACHILE_ENABLE + eeprom_state_machine_task(EEPROM_AREA_ID_0); + #if EEPROM_AREA_TOTAL >1u + eeprom_state_machine_task(EEPROM_AREA_ID_1); + #endif + #endif + } + else + { + #ifdef EEPROM_EXT_DEBUG_EN + //g_eeprom_ext_test.test_count[38]++; + #endif + } + #endif + #endif +} + + +#if 0 +// +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : None +|Preconditions : None +|Input parameters : +|Output parameters : None +|Return value : None +|Description 测试用 +----------------------------------------------------------------------------*/ +u8 eeprom_write_u8_ext1(u32 w_addr, u8 *p_data, u16 b_number) +{ + u8 l_result ; + u16 l_start_addr; + u16 l_offset; + u16 l_len; + u16 i; + u32 *p_u32; + u32 l_data; + l_result = ram_write_bytes_for_eeprom(w_addr+EEPROM_RAM_ADDR_START,p_data,b_number); + #if 0 //def EEPROM_EXT_STATE_MACHILE_ENABLE + #else + l_offset = w_addr&(u32)0x03u; + l_start_addr = (w_addr-l_offset)/4u; + l_len = ((b_number+l_offset)/0x04u+1u); + for(i = 0; i < l_len; i++) + { + if( ((w_addr+EEPROM_RAM_ADDR_START)>=EEPROM_AREAx_RAM_ADDR_START(EEPROM_AREA_ID_0) ) + && ((w_addr+EEPROM_RAM_ADDR_START+b_number)<=EEPROM_AREAx_RAM_ADDR_END(EEPROM_AREA_ID_0) ) ) + { + p_u32 = (u32*)(l_start_addr*4u+EEPROM_RAM_ADDR_START); + l_data = *p_u32; + eeprom_write_one_element_seq(EEPROM_AREA_ID_0,l_start_addr,l_data); + } + else if( ((w_addr+EEPROM_RAM_ADDR_START)>=EEPROM_AREAx_RAM_ADDR_START(EEPROM_AREA_ID_1) ) + && ((w_addr+EEPROM_RAM_ADDR_START+b_number)<=EEPROM_AREAx_RAM_ADDR_END(EEPROM_AREA_ID_1) ) ) + { + p_u32 = (u32*)(l_start_addr*4u+EEPROM_RAM_ADDR_START); + l_data = *p_u32; + l_offset = (EEPROM_AREAx_RAM_ADDR_START(EEPROM_AREA_ID_1)-EEPROM_AREAx_RAM_ADDR_START(EEPROM_AREA_ID_0))/4; + eeprom_write_one_element_seq(EEPROM_AREA_ID_1,l_start_addr-l_offset,l_data); + } + else + { + + } + p_u32++; + } + #endif + return l_result; +} +#endif + + + +#endif + + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : None +|Preconditions : None +|Input parameters : +|Output parameters : None +|Return value : None +|Description : +----------------------------------------------------------------------------*/ +err_flag_e ram_read_bytes_for_eeprom(u32 addr,u8 *p_data,u16 len) +{ + err_flag_e l_result; + u8 *p_src; + u16 i; + + if( (addrEEPROM_RAM_ADDR_END) || ((addr+len)>(EEPROM_RAM_ADDR_END+1u)) ) + { + l_result = ERR_FAILED; + } + else + { + p_src = (u8 *)(addr); + + for (i = 0; i < len; i++) + { + p_data[i] = p_src[i]; /*lint !e511*/ + } + + l_result = ERR_OK; + } + + return l_result; +} + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : None +|Preconditions : None +|Input parameters : +|Output parameters : None +|Return value : None +|Description +----------------------------------------------------------------------------*/ +err_flag_e ram_write_bytes_for_eeprom(u32 addr,u8 *p_data,u16 len) +{ + err_flag_e l_result; + u8 *p_addr; + u16 i; + + if( (addrEEPROM_RAM_ADDR_END) || ((addr+len)>(EEPROM_RAM_ADDR_END+1u)) ) + { + l_result = ERR_FAILED; + } + else + { + p_addr = (u8 *)(addr); + + for (i = 0; i < len; i++) + { + p_addr[i] = p_data[i] ; /*lint !e511*/ + } + + l_result = ERR_OK; + } + + return l_result; +} + + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : None +|Preconditions : None +|Input parameters : +|Output parameters : None +|Return value : None +|Description +----------------------------------------------------------------------------*/ +u8 eeprom_read_u8_ext(u32 w_addr, u8 *p_data, u16 b_number) +{ + u8 l_result ; + l_result = (u8)ram_read_bytes_for_eeprom((u32)w_addr+(u32)EEPROM_RAM_ADDR_START,p_data,b_number); + return l_result; +} + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : None +|Preconditions : None +|Input parameters : +|Output parameters : None +|Return value : None +|Description +----------------------------------------------------------------------------*/ +u8 eeprom_write_u8_ext(u32 w_addr, u8 *p_data, u16 b_number) +{ + u8 l_result ; + #if 1 //def EEPROM_EXT_STATE_MACHILE_ENABLE + #else + u16 l_start_addr; + u16 l_offset; + u16 l_len; + u16 i; + u32 *p_u32; + u32 l_data; + #endif + l_result = (u8)ram_write_bytes_for_eeprom((u32)w_addr+(u32)EEPROM_RAM_ADDR_START,p_data,b_number); + #if 1 //def EEPROM_EXT_STATE_MACHILE_ENABLE + #else + l_offset = w_addr&(u32)0x03u; + l_start_addr = (w_addr-l_offset)/4u; + l_len = ((b_number+l_offset)/0x04u+1u); + for(i = 0; i < l_len; i++) + { + if( ((w_addr+EEPROM_RAM_ADDR_START)>=EEPROM_AREAx_RAM_ADDR_START(EEPROM_AREA_ID_0) ) + && ((w_addr+EEPROM_RAM_ADDR_START+b_number)<=EEPROM_AREAx_RAM_ADDR_END(EEPROM_AREA_ID_0) ) ) + { + p_u32 = (u32*)(l_start_addr*4u+EEPROM_RAM_ADDR_START); + l_data = *p_u32; + eeprom_write_one_element_seq(EEPROM_AREA_ID_0,l_start_addr,l_data); + } + else if( ((w_addr+EEPROM_RAM_ADDR_START)>=EEPROM_AREAx_RAM_ADDR_START(EEPROM_AREA_ID_1) ) + && ((w_addr+EEPROM_RAM_ADDR_START+b_number)<=EEPROM_AREAx_RAM_ADDR_END(EEPROM_AREA_ID_1) ) ) + { + p_u32 = (u32*)(l_start_addr*4u+EEPROM_RAM_ADDR_START); + l_data = *p_u32; + l_offset = (EEPROM_AREAx_RAM_ADDR_START(EEPROM_AREA_ID_1)-EEPROM_AREAx_RAM_ADDR_START(EEPROM_AREA_ID_0))/4; + eeprom_write_one_element_seq(EEPROM_AREA_ID_1,l_start_addr-l_offset,l_data); + } + else + { + + } + p_u32++; + } + #endif + return l_result; +} diff --git a/code_boot_out/qm/bsp/eeprom.h b/code_boot_out/qm/bsp/eeprom.h new file mode 100644 index 0000000..a2c5fa5 --- /dev/null +++ b/code_boot_out/qm/bsp/eeprom.h @@ -0,0 +1,225 @@ +/** ########################################################################## +** Filename : +** Project : +** Module : +** Processor : +** Version : +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20230602- --V1.0-- --mingyea--- --修改-- + +** #########################################################################*/ +#ifndef EEPROM_H__ +#define EEPROM_H__ + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ + +#include "common_types.h" +#include "common_cfg.h" +#include "fm33lg0xx_fl.h" +#include "mf_config.h" +#include "eeprom_cfg.h" + +#ifdef NVM_EEPROM_EXT_EN + +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ +#define EFLASH_STATE_READ 0u +#define EFLASH_STATE_IDLE 1u +#define EFLASH_STATE_UPDATE 2u +#define EFLASH_STATE_PAGE_TRANSFER 3u + +#define EFLASH_PAGE_ERASE_STATE_WAIT_LAST_OPERATION 0u +#define EFLASH_PAGE_ERASE_STATE_TRIGGER_TO_START 1u +#define EFLASH_PAGE_ERASE_STATE_WAIT_ERASE_FINISH 2u +#define EFLASH_PAGE_ERASE_STATE_WAIT_EOP 3u + +#define EFLASH_PAGE_TRANSFER_STATE_WRITE_NEW_DATA 0u +#define EFLASH_PAGE_TRANSFER_STATE_COPY 1U +#define EFLASH_PAGE_TRANSFER_STATE_ERASE 2U + +#define EFLASH_RESULT_INIT 0U +#define EFLASH_RESULT_ONCE_OK 1U //循环一次 + +/* Used Flash pages for EEPROM emulation */ +#define EFLASH_PAGE0 ((u16)0x0000) +#define EFLASH_PAGE1 ((u16)0x0001) + +/* No valid page define */ +#define EFLASH_NO_VALID_PAGE ((u16)0x00AB) + +/* Page status definitions */ +#define EFLASH_ERASED ((u16)0xFFFF) /* PAGE is empty */ +#define EFLASH_RECEIVE_DATA ((u16)0xEEEE) /* PAGE is marked to receive data */ +#define EFLASH_VALID_PAGE ((u16)0x0000) /* PAGE containing valid data */ + +/* Valid pages in read and write defines */ +#define EFLASH_READ_FROM_VALID_PAGE ((u8)0x00) +#define EFLASH_WRITE_IN_VALID_PAGE ((u8)0x01) + +/* Page full define */ +#define EFLASH_PAGE_FULL ((u8)0x80) + + +#define EFLASH_OPERATION_LEN 4u //flash operation lenth, 4 bytes +#define EFLASH_PAGE_START_INFO_LEN 8u //page start information, 4 bytes for page status, 4 bytes reserved +#define EFLASH_PAGE_FIRST_VARIABLE_ADDRESS (EFLASH_PAGE_START_INFO_LEN + EFLASH_OPERATION_LEN) //(EFLASH_PAGE_START_INFO_LEN + EFLASH_OPERATION_LEN) +#define EFLASH_ELEMENT_LEN 8u //page element lenth, 8 bytes{4 for data + 4 for virtual address} + +#define EFLASH_ADDRS_ALIGN 4u + +#define EFLASH_STATUS_SUCCESS 4U +#define EFLASH_STATUS_BUSY 1U +#define EFLASH_STATUS_CMD_INVALID 3U +#define EFLASH_STATUS_PPADRER_ERROR 2U + + + +#define EFLASH_READ_OK 0u +#define EFLASH_READ_FAILED 1u + + +#define FLASH_Lock() +#define FLASH_Unlock() + +//#define EEPROM_FLAG_CHANGE 0x000000u + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ +typedef u32 eflash_operate_t; //flash operation occupy + +typedef enum +{ + FLASH_BUSY = 1u, + FLASH_ERROR_PG, + FLASH_ERROR_WRP, + FLASH_COMPLETE, + FLASH_TIMEOUT +}FLASH_Status; + +typedef struct +{ + u32 first_reset_flag; //是否第一次操作 + + //转移相关 + u32 page_addr_new; + u32 page_addr_old; + u16 valid_page_new; + u16 eflash_page_index; + u16 trans_page_count; + + //总状态相关 + u8 state; //状态 -- + u8 erase_state; //状态 --擦除数据 + u8 transfer_state; //状态 --转移数据 + u8 result; // + u16 cmd_eeprom_result; //每一條指令，的返回 + //u16 cmd_ram_result; //每一條指令，的返回 + u16 page_count; + u16 page_cur_id; + u16 page_addr_cur_total; + + #ifdef EEPROM_OPTIMIZE_SEARCH_FAST //快速定位相关 + u16 current_page; + u32 current_end_addr; //存了多少个数据，指的是，flash扇区上，包括重复 + #endif + //u32 data; // + //u8 data_u8[4]; + +}eeprom_ext_s; + +typedef struct +{ + u8 test; + #ifdef EEPROM_EXT_DEBUG_EN + //做為接口的eeprom 邏輯地址 + u16 test_count[70]; + #endif +}eeprom_ext_test_s; + +typedef struct +{ + u8 sector_num; //有几个扇区，不包含备份域， + u16 mass_page_size_byte; //总容量，不包含备份域 + u16 mass_page_addr_total_u32; + u16 mass_page_addr_total_u8; + u32 ram_start_addr; + u32 ram_end_addr; + u32 eflash_page0_start_addr; + u32 eflash_page0_end_addr; + u32 eflash_page1_start_addr; + u32 eflash_page1_end_addr; +}eeprom_user_info_s; + +typedef struct +{ + u8 flag; + u8 count; +}eeprom_input_test_s; +/*--------------------------------------------------------------------------- +- G L O B A L V A R I A B L E S +- only configuration table allowed here,variables are not allowed! +----------------------------------------------------------------------------*/ +#ifdef EEPROM_EXT_DEBUG_EN +extern eeprom_input_test_s g_eeprom_input_test[EEPROM_AREA_TOTAL_FOR_RAM]; +#endif +extern MEMORY_MAP_RAM_FLAG_NOINIT eeprom_ext_s g_eeprom_ext[EEPROM_AREA_TOTAL_FOR_RAM]; +extern eeprom_ext_test_s g_eeprom_ext_test[EEPROM_AREA_TOTAL_FOR_RAM] ; +extern u8 *g_ram_for_eeprom[EEPROM_AREA_TOTAL_FOR_RAM] ; +extern u32 g_logic_page_read_data[EEPROM_AREA_TOTAL_FOR_RAM] MEMORY_MAP_RAM_WDOG ; +extern u32 g_logic_page_write_data[EEPROM_AREA_TOTAL_FOR_RAM] MEMORY_MAP_RAM_WDOG ; +extern u8 g_logic_page_read_u8data[EEPROM_AREA_TOTAL_FOR_RAM][4] MEMORY_MAP_RAM_WDOG ; + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ +extern const eeprom_user_info_s g_eeprom_user_info[EEPROM_AREA_TOTAL_FOR_RAM] ; + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ + + +//////以下是内部接口，给eeprom_ext +u16 eeprom_read_one_element(u8 area_id,u16 virt_addr, u32* data); +uint8_t eeprom_verify_page_ful_write_one_ele(u8 area_id,u16 valid_page, u16 virt_addr, u32 data); +uint8_t eeprom_program_u32(u32 addr, u32 data); +u16 eeprom_find_valid_page(u8 area_id,u8 operation); +uint8_t eeprom_erase_page(u32 page_addr); +uint8_t eeprom_format(u8 area_id); +void eeprom_get_current_page_addr(u8 area_id,u16 *p_valid_page,u32 *p_addr); +u16 eeprom_drv_init(u8 area_id); +uint8_t eeprom_page_transfer(u8 area_id,u16 virt_addr, u32 data); +u16 eeprom_get_cur_page_id(u8 area_id); +u32 eeprom_get_cur_end_addr(u8 area_id); + +///以下是外部接口 +void eeprom_init(void); +void eeprom_task(void); +u8 eeprom_ext_get_state(u8 area_id); +void eeprom_ext_clear_flag(void); + + +u8 eeprom_write_u8_ext1(u32 w_addr, u8 *p_data, u16 b_number); + +#endif + +u8 eeprom_read_u8_ext(u32 w_addr, u8 *p_data, u16 b_number); +u8 eeprom_write_u8_ext(u32 w_addr, u8 *p_data, u16 b_number); + + +#endif /* __EEPROM_H */ + diff --git a/code_boot_out/qm/bsp/eeprom_cfg.c b/code_boot_out/qm/bsp/eeprom_cfg.c new file mode 100644 index 0000000..25417a6 --- /dev/null +++ b/code_boot_out/qm/bsp/eeprom_cfg.c @@ -0,0 +1,467 @@ +/** ########################################################################## +** Filename : +** Project : +** Module : +** Processor : +** Version : +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20230602- --V1.0-- --mingyea--- --修改-- + +** #########################################################################*/ + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ +#include "eeprom.h" +#include "common_cfg.h" +#include "common_memory.h" +#include "error.h" +#include "gpio.h" +#include "wdog.h" +#include "nvm.h" +#include "eeprom_state_machine.h" + +#ifdef NVM_EEPROM_EXT_EN + +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ + + + +/*--------------------------------------------------------------------------- +- S T A T I C V A R I A B L E S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +* G L O B A L V A R I A B L E S +----------------------------------------------------------------------------*/ +#ifdef EEPROM_EXT_DEBUG_EN +eeprom_input_test_s g_eeprom_input_test[EEPROM_AREA_TOTAL_FOR_RAM] = {0u}; //MEMORY_MAP_RAM_FLAG_NOINIT +#endif + +MEMORY_MAP_RAM_FLAG_NOINIT eeprom_ext_s g_eeprom_ext[EEPROM_AREA_TOTAL_FOR_RAM] @RAM_EEPROM_OP_RAM_ADDR; +eeprom_ext_test_s g_eeprom_ext_test[EEPROM_AREA_TOTAL_FOR_RAM] ; + +//MEMORY_MAP_FLAG_NO_OPTIME MEMORY_MAP_RAM_EEPROM u8 g_ram_for_eeprom_data[EEPROM_RAM_MAX_U8] = {0u}; + +#if 0 //debug的時候，開啟該宏 +#else +u8 *g_ram_for_eeprom[EEPROM_AREA_TOTAL_FOR_RAM] = +{ + (u8*)(u32)EEPROM_AREA0_RAM_ADDR_START, + #if EEPROM_AREA_TOTAL>1u + (u8*)(u32)EEPROM_AREA1_RAM_ADDR_START + #endif +}; +#endif + +u32 g_logic_page_read_data[EEPROM_AREA_TOTAL_FOR_RAM] MEMORY_MAP_RAM_WDOG @RAM_EEPROM_DATA_RAM_ADDR ; //逻辑页的数据--注意，该地址也是未初始化的，见ICF +u32 g_logic_page_write_data[EEPROM_AREA_TOTAL_FOR_RAM] MEMORY_MAP_RAM_WDOG @(RAM_EEPROM_DATA_RAM_ADDR+(4u*EEPROM_AREA_TOTAL_FOR_RAM)) ; //逻辑页的数据 +u8 g_logic_page_read_u8data[EEPROM_AREA_TOTAL_FOR_RAM][4] MEMORY_MAP_RAM_WDOG @(RAM_EEPROM_DATA_RAM_ADDR+(8u*EEPROM_AREA_TOTAL_FOR_RAM)); + + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ +const eeprom_user_info_s g_eeprom_user_info[EEPROM_AREA_TOTAL_FOR_RAM] = +{ + { + EEPROM_AREA0_EFLASH_PAGE_NUM, + EFLASH_AREA0_MASS_PAGE_SIZE, + EEPROM_AREA0_ADDR_TOTAL_U32, + EEPROM_AREA0_ADDR_TOTAL_U8, + EEPROM_AREA0_RAM_ADDR_START, + EEPROM_AREA0_RAM_ADDR_END, + EFLASH_AREA0_PAGE0_BASE_ADDRESS, + EFLASH_AREA0_PAGE0_END_ADDRESS, + EFLASH_AREA0_PAGE1_BASE_ADDRESS, + EFLASH_AREA0_PAGE1_END_ADDRESS, + }, + #if EEPROM_AREA_TOTAL >1u + { + EEPROM_AREA1_EFLASH_PAGE_NUM, + EFLASH_AREA1_MASS_PAGE_SIZE, + EEPROM_AREA1_ADDR_TOTAL_U32, + EEPROM_AREA1_ADDR_TOTAL_U8, + EEPROM_AREA1_RAM_ADDR_START, + EEPROM_AREA1_RAM_ADDR_END, + EFLASH_AREA1_PAGE0_BASE_ADDRESS, + EFLASH_AREA1_PAGE0_END_ADDRESS, + EFLASH_AREA1_PAGE1_BASE_ADDRESS, + EFLASH_AREA1_PAGE1_END_ADDRESS, + }, + #endif +}; + + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : area_id: Var片区 +|Output parameters : +|Return value : +|Description : 返回当前有效页 +----------------------------------------------------------------------------*/ +u16 eeprom_get_cur_page_id(u8 area_id) +{ + assert_param(area_id 1u +#define EEPROM_AERA_END_ADDR (EFLASH_AREA1_PAGE1_END_ADDRESS+1u-4u) +#else +#define EEPROM_AERA_END_ADDR (EFLASH_AREA0_PAGE1_END_ADDRESS+1u-4u) +#endif + +//总的 +#define EEPROM_FLASH_ADDR_START EFLASH_AREA0_START_ADDRESS //总的eeprom的flash的起始地址 +#define EEPROM_FLASH_ADDR_END 0x1FFFFu //总的eeprom的flash的结束地址--暂时没用到，先用 EEPROM_AERA_END_ADDR + + +////RAM总区间范围 +#define EEPROM_RAM_ADDR_START 0x20006000u //相映射的 RAM地址，要和icf上定义的相一致 +#define EEPROM_RAM_ADDR_END (0x20006FFF-4u)//(0x20006FFF-4u*EEPROM_AREA_TOTAL_FOR_RAM) //见icf---注意，这里减多少，和EEPROM_AREA1_RAM_ADDR_START有关 + +#define EEPROM_RAM_MAX_U8 ((EFLASH_AREA0_MASS_PAGE_SIZE+EFLASH_AREA1_MASS_PAGE_SIZE)/4u) + + +#define EEPROM_AREAx_EFLASH_PAGE_NUM(x) g_eeprom_user_info[x].sector_num +#define EFLASH_AREAx_MASS_PAGE_SIZE(x) g_eeprom_user_info[x].mass_page_size_byte +#define EEPROM_AREAx_ADDR_TOTAL_U32(x) g_eeprom_user_info[x].mass_page_addr_total_u32 +#define EEPROM_AREAx_ADDR_TOTAL_U8(x) g_eeprom_user_info[x].mass_page_addr_total_u8 +#define EEPROM_AREAx_RAM_ADDR_START(x) g_eeprom_user_info[x].ram_start_addr +#define EEPROM_AREAx_RAM_ADDR_END(x) g_eeprom_user_info[x].ram_end_addr +#define EFLASH_AREAx_PAGE0_BASE_ADDRESS(x) g_eeprom_user_info[x].eflash_page0_start_addr +#define EFLASH_AREAx_PAGE0_END_ADDRESS(x) g_eeprom_user_info[x].eflash_page0_end_addr +#define EFLASH_AREAx_PAGE1_BASE_ADDRESS(x) g_eeprom_user_info[x].eflash_page1_start_addr +#define EFLASH_AREAx_PAGE1_END_ADDRESS(x) g_eeprom_user_info[x].eflash_page1_end_addr + + + + +#ifdef NVM_EEPROM_EXT_EN +#define EEPROM_EXT_STATE_MACHILE_ENABLE //用状态机方式，实现 +#define EEPROM_EXT_NOT_TRANS_MORE_WHEN_FULL //写满时，不要重复的擦写 +#endif +#define EEPROM_EXT_JUDGE_PAGE_ADDR //为了安全，在最底层，再加一次判断地址范围 + +//extern MEMORY_MAP_FLAG_NO_OPTIME MEMORY_MAP_RAM_EEPROM u8 g_ram_for_eeprom_data[EEPROM_RAM_MAX_U8]; + + +#ifdef NVM_EEPROM_EXT_EN +//#define EEPROM_EXT_DEBUG_EN //变量跟踪 +//#define EEPROM_EXT_DEBUG_IO_EN //io测试时间 +//#define EEPROM_INPUT_TEST //修改RAM值，用来测试 +#endif + + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ + + + +/*--------------------------------------------------------------------------- +- G L O B A L V A R I A B L E S +- only configuration table allowed here,variables are not allowed! +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ + +#ifdef EEPROM_INPUT_TEST + +//给外部接口--任务 +void eeprom_ext_input_test(void); + +#endif + +#if 0 +#define EEPROM_EXT_TEST_ON() TEST1_ON() +#define EEPROM_EXT_TEST_OFF() TEST1_OFF() + +#define EEPROM_EXT_TEST1_ON() TEST1_ON() +#define EEPROM_EXT_TEST1_OFF() TEST1_OFF() + +#define EEPROM_EXT_ERASE_TEST_ON() //TEST1_ON() +#define EEPROM_EXT_ERASE_TEST_OFF() //TEST1_OFF() +#else + +#ifdef EEPROM_EXT_DEBUG_IO_EN + +void EEPROM_EXT_TEST_ON(u8 id); +void EEPROM_EXT_TEST_OFF(u8 id); + +#define EEPROM_EXT_TEST1_ON EEPROM_EXT_TEST_ON +#define EEPROM_EXT_TEST1_OFF EEPROM_EXT_TEST_OFF + +#define EEPROM_EXT_ERASE_TEST_ON EEPROM_EXT_TEST_ON +#define EEPROM_EXT_ERASE_TEST_OFF EEPROM_EXT_TEST_OFF + +#endif + +void eeprom_test_task(void); + +#endif + + +#endif /* __EEPROM_H */ + +/*******************************END OF FILE************************************/ diff --git a/code_boot_out/qm/bsp/eeprom_seq.c b/code_boot_out/qm/bsp/eeprom_seq.c new file mode 100644 index 0000000..fe8a89d --- /dev/null +++ b/code_boot_out/qm/bsp/eeprom_seq.c @@ -0,0 +1,464 @@ +/** ########################################################################## +** Filename : +** Project : +** Module : +** Processor : +** Version : +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20230602- --V1.0-- --mingyea--- --修改-- + +** #########################################################################*/ + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ +#include "common_types.h" +#include "common_memory.h" +#include "eeprom.h" +#include "eeprom_seq.h" +#include "wdog.h" + +#ifdef NVM_EEPROM_EXT_EN + +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- S T A T I C V A R I A B L E S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +* G L O B A L V A R I A B L E S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : 读取所有到ram,顺序执行 +----------------------------------------------------------------------------*/ +void eeprom_read_all_data_to_ram_seq(u8 area_id) +{ + u16 i; + + for(i=0u;i EEPROM_AREAx_ADDR_TOTAL_U32(area_id)) + { + g_eeprom_ext[area_id].trans_page_count = 0; + l_status_res = EFLASH_STATUS_BUSY; + g_eeprom_ext[area_id].eflash_page_index = 0; + g_eeprom_ext[area_id].transfer_state = EFLASH_PAGE_TRANSFER_STATE_ERASE; + g_eeprom_ext[area_id].erase_state = EFLASH_PAGE_ERASE_STATE_WAIT_LAST_OPERATION; + #ifdef EEPROM_EXT_DEBUG_EN + g_eeprom_ext_test[area_id].test_count[22]++; + #endif + break; + } + } + }while(g_eeprom_ext[area_id].transfer_state==EFLASH_PAGE_TRANSFER_STATE_COPY); + } + + if(g_eeprom_ext[area_id].transfer_state == EFLASH_PAGE_TRANSFER_STATE_ERASE) + { + do + { + l_status_res = eeprom_erase_page((u32)g_eeprom_ext[area_id].page_addr_old + \ + (u32)g_eeprom_ext[area_id].eflash_page_index * (u32)EFLASH_PAGE_SIEZ); + if (l_status_res != EFLASH_STATUS_SUCCESS) + { + #ifdef EEPROM_EXT_DEBUG_EN + g_eeprom_ext_test[area_id].test_count[23]++; + #endif + return l_status_res; + } + #ifdef EEPROM_EXT_DEBUG_EN + g_eeprom_ext_test[area_id].test_count[24]++; + #endif + g_eeprom_ext[area_id].eflash_page_index ++; + if(g_eeprom_ext[area_id].eflash_page_index >= EEPROM_AREAx_EFLASH_PAGE_NUM(area_id)) + { + #ifdef EEPROM_EXT_DEBUG_IO_EN + EEPROM_EXT_TEST_ON(area_id); + #endif + l_status_res = eeprom_program_u32(g_eeprom_ext[area_id].page_addr_new, EFLASH_VALID_PAGE); + #ifdef EEPROM_EXT_DEBUG_IO_EN + EEPROM_EXT_TEST_OFF(area_id); + #endif + #ifdef EEPROM_EXT_DEBUG_EN + g_eeprom_ext_test[area_id].test_count[25]++; + #endif + break; + } + else + { + l_status_res = EFLASH_STATUS_BUSY; + #ifdef EEPROM_EXT_DEBUG_EN + g_eeprom_ext_test[area_id].test_count[26]++; + #endif + } + }while(1); + + } + return (l_status_res); +} + +#if 0 +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : virt_addr: Variable virtual address + data: 16 bit data to be written +|Output parameters : +|Return value : +|Description : 顺序执行 +----------------------------------------------------------------------------*/ +u16 eeprom_write_one_element_seq(u8 area_id,u16 virt_addr, u32 data) +{ + u16 l_status = 0; + u16 l_valid_page = EFLASH_PAGE0; + + l_valid_page = eeprom_find_valid_page(area_id,EFLASH_WRITE_IN_VALID_PAGE); + + if (l_valid_page == EFLASH_NO_VALID_PAGE) + { + #ifdef EEPROM_EXT_DEBUG_IO_EN + EEPROM_EXT_TEST1_ON(area_id); + #endif + eeprom_format(area_id); + #ifdef EEPROM_EXT_DEBUG_IO_EN + EEPROM_EXT_TEST1_OFF(area_id); + #endif + g_eeprom_ext[area_id].state = EFLASH_STATE_IDLE; + #ifdef EEPROM_OPTIMIZE_SEARCH_FAST + eeprom_get_current_page_addr(area_id,&g_eeprom_ext[area_id].current_page,&g_eeprom_ext[area_id].current_end_addr); + #endif + #ifdef EEPROM_EXT_DEBUG_EN + g_eeprom_ext_test[area_id].test_count[27]++; + #endif + } + #ifdef EEPROM_EXT_DEBUG_IO_EN + EEPROM_EXT_TEST1_ON(area_id); + #endif + l_status = eeprom_verify_page_ful_write_one_ele(area_id,l_valid_page, virt_addr, data); + #ifdef EEPROM_EXT_DEBUG_IO_EN + EEPROM_EXT_TEST1_OFF(area_id); + #endif + if(l_status == EFLASH_STATUS_PPADRER_ERROR) + { + #ifdef EEPROM_EXT_DEBUG_IO_EN + EEPROM_EXT_TEST1_ON(area_id); + #endif + eeprom_format(area_id); + #ifdef EEPROM_EXT_DEBUG_IO_EN + EEPROM_EXT_TEST1_OFF(area_id); + #endif + //EFLASH_SetCtrlReg1(0x0); + //EFLASH_LockCtrl(); //TEMP_CLOSE 这些不知道怎么修改 + g_eeprom_ext[area_id].state = EFLASH_STATE_IDLE; + #ifdef EEPROM_OPTIMIZE_SEARCH_FAST + eeprom_get_current_page_addr(area_id,&g_eeprom_ext[area_id].current_page,&g_eeprom_ext[area_id].current_end_addr); + #endif + #ifdef EEPROM_EXT_DEBUG_EN + g_eeprom_ext_test[area_id].test_count[28]++; + #endif + //break; + } + if(l_status == EFLASH_PAGE_FULL) + { + //l_timeout = 0; + #ifdef EEPROM_EXT_NOT_TRANS_MORE_WHEN_FULL + if( g_eeprom_ext[area_id].page_addr_cur_total >= (g_eeprom_user_info[area_id].mass_page_addr_total_u32) ) + { + #ifdef EEPROM_EXT_DEBUG_EN + g_eeprom_ext_test[area_id].test_count[29]++; + #endif + g_eeprom_ext[area_id].state = EFLASH_STATE_IDLE; + #ifdef EEPROM_OPTIMIZE_SEARCH_FAST + eeprom_get_current_page_addr(area_id,&g_eeprom_ext[area_id].current_page,&g_eeprom_ext[area_id].current_end_addr); + #endif + } + else + #endif + { + g_eeprom_ext[area_id].state = EFLASH_STATE_PAGE_TRANSFER; + g_eeprom_ext[area_id].transfer_state = EFLASH_PAGE_TRANSFER_STATE_WRITE_NEW_DATA; + } + #ifdef EEPROM_EXT_DEBUG_EN + g_eeprom_ext_test[area_id].test_count[30]++; + #endif + } + else + { + #ifdef EEPROM_OPTIMIZE_SEARCH_FAST + eeprom_get_current_page_addr(area_id,&g_eeprom_ext[area_id].current_page,&g_eeprom_ext[area_id].current_end_addr); + #endif + g_eeprom_ext[area_id].state = EFLASH_STATE_IDLE; + #ifdef EEPROM_EXT_DEBUG_EN + g_eeprom_ext_test[area_id].test_count[31]++; + #endif + } + if(g_eeprom_ext[area_id].state == EFLASH_STATE_PAGE_TRANSFER) + { + //virt_addr =virt_addr;// g_eeprom_ext[area_id].page_cur_id; + //data = g_logic_page_write_data[area_id]; + l_status = eeprom_page_transfer_seq(area_id,virt_addr, data); + if(l_status == EFLASH_STATUS_SUCCESS) + { + g_eeprom_ext[area_id].state = EFLASH_STATE_IDLE; + #ifdef EEPROM_EXT_DEBUG_EN + g_eeprom_ext_test[area_id].test_count[32]++; + #endif + } + if(l_status == EFLASH_STATUS_PPADRER_ERROR) + { + #ifdef EEPROM_EXT_DEBUG_IO_EN + EEPROM_EXT_TEST1_ON(area_id); + #endif + eeprom_format(area_id); + #ifdef EEPROM_EXT_DEBUG_IO_EN + EEPROM_EXT_TEST1_OFF(area_id); + #endif + //EFLASH_SetCtrlReg1(0x0); + //EFLASH_LockCtrl(); //TEMP_CLOSE 这些不知道怎么修改 + g_eeprom_ext[area_id].state = EFLASH_STATE_IDLE; + #ifdef EEPROM_EXT_DEBUG_EN + g_eeprom_ext_test[area_id].test_count[33]++; + #endif + } + //l_timeout ++; + if( (l_status != EFLASH_STATUS_BUSY && l_status != EFLASH_STATUS_SUCCESS)) + { + //EFLASH_SetCtrlReg1(0x0); + //EFLASH_LockCtrl(); //TEMP_CLOSE 这些不知道怎么修改 + g_eeprom_ext[area_id].state = EFLASH_STATE_IDLE; + #ifdef EEPROM_EXT_DEBUG_EN + g_eeprom_ext_test[area_id].test_count[34]++; + #endif + } + #ifdef EEPROM_EXT_DEBUG_EN + g_eeprom_ext_test[area_id].test_count[35]++; + #endif + #ifdef EEPROM_OPTIMIZE_SEARCH_FAST + if(g_eeprom_ext[area_id].state==EFLASH_STATE_IDLE) + { + eeprom_get_current_page_addr(area_id,&g_eeprom_ext[area_id].current_page,&g_eeprom_ext[area_id].current_end_addr); + } + #endif + } + // + /* Return last operation status */ + return l_status; +} +#endif + +#if 1 +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : 转移--上电继续 +----------------------------------------------------------------------------*/ +uint8_t eeprom_reset_page_transfer_continus(u8 area_id,u16 virt_addr, u32 data) +{ + uint8_t l_status_res = eeprom_page_transfer_seq(area_id,virt_addr,data); + if (l_status_res != EFLASH_STATUS_SUCCESS) + { + //全部擦除 + } + g_eeprom_ext[area_id].state = EFLASH_STATE_IDLE; + return l_status_res; +} +#endif +//#endif + + +#endif + + diff --git a/code_boot_out/qm/bsp/eeprom_seq.h b/code_boot_out/qm/bsp/eeprom_seq.h new file mode 100644 index 0000000..241e64c --- /dev/null +++ b/code_boot_out/qm/bsp/eeprom_seq.h @@ -0,0 +1,70 @@ +/** ########################################################################## +** Filename : +** Project : +** Module : +** Processor : +** Version : 1.0 +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20230602- --V1.0-- --mingyea--- --修改-- + +** #########################################################################*/ +#ifndef EEPROM_SEQ_H__ +#define EEPROM_SEQ_H__ + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ +#include "common_types.h" +#include "common_cfg.h" +#include "fm33lg0xx_fl.h" +#include "mf_config.h" +#include "eeprom.h" +#include "eeprom_state_machine.h" + +#ifdef NVM_EEPROM_EXT_EN + +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- G L O B A L V A R I A B L E S +- only configuration table allowed here,variables are not allowed! +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ + +//对外接口 +void eeprom_read_all_data_to_ram_seq(u8 area_id); +u16 eeprom_write_one_element_seq(u8 area_id,u16 virt_addr, u32 data); +uint8_t eeprom_reset_page_transfer_continus(u8 area_id,u16 virt_addr, u32 data); +extern uint8_t eeprom_page_transfer_seq(u8 area_id,u16 virt_addr, u32 data); + +#endif + +#endif /* __EEPROM_H */ + +/*******************************END OF FILE************************************/ diff --git a/code_boot_out/qm/bsp/eeprom_state_machine.c b/code_boot_out/qm/bsp/eeprom_state_machine.c new file mode 100644 index 0000000..40d5a0d --- /dev/null +++ b/code_boot_out/qm/bsp/eeprom_state_machine.c @@ -0,0 +1,609 @@ +/** ########################################################################## +** Filename : +** Project : +** Module : +** Processor : +** Version : 1.0 +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20230602- --V1.0-- --mingyea--- --修改-- + +** #########################################################################*/ + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ +#include "eeprom_state_machine.h" +#include "common_cfg.h" +#include "common_memory.h" +#include "error.h" +#include "gpio.h" +//#include "key_app_cfg.h" +//#include "power_drive.h" +#include "eeprom.h" +#include "wdog.h" +#ifdef NVM_EEPROM_EXT_EN + +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ + + + +/*--------------------------------------------------------------------------- +- S T A T I C V A R I A B L E S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +* G L O B A L V A R I A B L E S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : area_id: Var片区 +|Output parameters : +|Return value : +|Description : 片区0初始化 +----------------------------------------------------------------------------*/ +void eeprom_area_init(u8 area_id) +{ + u8 l_flag_read_all = 0u; + assert_param(area_id>24)&0xffu; + g_ram_for_eeprom[4u*i+1u] = (g_logic_page_read_data>>16)&0xffu; + g_ram_for_eeprom[4u*i+2u] = (g_logic_page_read_data>>8)&0xffu; + g_ram_for_eeprom[4u*i+3u] = (g_logic_page_read_data)&0xffu; + #else + common_memory_copys((u8*)&g_ram_for_eeprom[area_id][4u*i],(u8*)&g_logic_page_read_data[area_id],EEPROM_READ_U32_NUM); + #endif + l_count++; + #ifdef EEPROM_EXT_DEBUG_EN + g_eeprom_ext_test[area_id].test_count[39]++; + #endif + g_eeprom_ext[area_id].page_count++; + if(g_eeprom_ext[area_id].page_count>=EEPROM_AREAx_ADDR_TOTAL_U32(area_id)) //所有都读取完全 + { + //EEPROM_EXT_TEST_OFF(); + g_eeprom_ext[area_id].page_count=0u; + g_eeprom_ext[area_id].state = EFLASH_STATE_IDLE; + #ifdef EEPROM_OPTIMIZE_SEARCH_FAST + eeprom_get_current_page_addr(area_id,&g_eeprom_ext[area_id].current_page,&g_eeprom_ext[area_id].current_end_addr); + #endif + #ifdef EEPROM_EXT_DEBUG_EN + g_eeprom_ext_test[area_id].test_count[40]++; + #endif + break; + } + }while(l_count=EEPROM_AREAx_ADDR_TOTAL_U32(area_id)) + { + g_eeprom_ext[area_id].page_count=0u; + // + g_eeprom_ext[area_id].result = EFLASH_RESULT_ONCE_OK; + + #ifdef EEPROM_EXT_DEBUG_EN + g_eeprom_ext_test[area_id].test_count[41]++; + #endif + #ifdef EEPROM_OPTIMIZE_SEARCH_FAST + eeprom_get_current_page_addr(area_id,&g_eeprom_ext[area_id].current_page,&g_eeprom_ext[area_id].current_end_addr); + #endif + } + + i=g_eeprom_ext[area_id].page_count; + g_eeprom_ext[area_id].cmd_eeprom_result =eeprom_read_one_element(area_id,g_eeprom_ext[area_id].page_count,&g_logic_page_read_data[area_id]); + if(g_eeprom_ext[area_id].cmd_eeprom_result == EFLASH_READ_OK) + { + #ifdef EEPROM_EXT_DEBUG_EN + g_eeprom_ext_test[area_id].test_count[42]++; + #endif + } + else + { + #ifdef EEPROM_EXT_DEBUG_EN + g_eeprom_ext_test[area_id].test_count[43]++; + #endif + } + //EEPROM_EXT_TEST_OFF(); + #if 1 + //if(0 == l_status) //己存在 + { + #if 0 + g_logic_page_read_u8data[0] = (g_logic_page_read_data>>24)&0xffu; + g_logic_page_read_u8data[1] = (g_logic_page_read_data>>16)&0xffu; + g_logic_page_read_u8data[2] = (g_logic_page_read_data>>8)&0xffu; + g_logic_page_read_u8data[3] = (g_logic_page_read_data>>0)&0xffu; + #else + common_memory_copys((u8*)&g_logic_page_read_u8data[area_id][0],(u8*)&g_logic_page_read_data[area_id],EEPROM_READ_U32_NUM); + #endif + if( (g_ram_for_eeprom[area_id][4*i] == g_logic_page_read_u8data[area_id][0] ) + && (g_ram_for_eeprom[area_id][4*i+1] == g_logic_page_read_u8data[area_id][1] ) + && (g_ram_for_eeprom[area_id][4*i+2] == g_logic_page_read_u8data[area_id][2] ) + && (g_ram_for_eeprom[area_id][4*i+3] == g_logic_page_read_u8data[area_id][3] ) + ) + { + //全部相同 + #ifdef EEPROM_EXT_DEBUG_EN + g_eeprom_ext_test[area_id].test_count[44]++; + #endif + } + else + { + //有不同--还得判断 + #if 0 + g_logic_page_write_data= ((u32)g_ram_for_eeprom[4*i]<<24) + | ((u32)g_ram_for_eeprom[4*i+1]<<16) + | ((u32)g_ram_for_eeprom[4*i+2]<<8) + | ((u32)g_ram_for_eeprom[4*i+3]); + #else + common_memory_copys((u8*)&g_logic_page_write_data[area_id],(u8*)&g_ram_for_eeprom[area_id][4u*i],EEPROM_READ_U32_NUM); + #endif + g_eeprom_ext[area_id].page_cur_id = i; + #ifdef EEPROM_EXT_DEBUG_IO_EN + EEPROM_EXT_TEST_ON(area_id); + #endif + g_eeprom_ext[area_id].state = EFLASH_STATE_UPDATE; + #ifdef EEPROM_EXT_DEBUG_IO_EN + EEPROM_EXT_TEST_OFF(area_id); + #endif + #ifdef EEPROM_EXT_DEBUG_EN + g_eeprom_ext_test[area_id].test_count[45]++; + #endif + } + + } + #if 0 + else //不存在 + { + g_logic_page_data= ((u32)g_ram_for_eeprom[4*i]<<24) + | ((u32)g_ram_for_eeprom[4*i+1]<<16) + | ((u32)g_ram_for_eeprom[4*i+2]<<8) + | ((u32)g_ram_for_eeprom[4*i+3]); + g_eeprom_ext.page_cur_id = i; + EEPROM_EXT_TEST_ON(); + g_eeprom_ext.state = EFLASH_STATE_UPDATE; + EEPROM_EXT_TEST_OFF(); + } + #endif + #ifdef EEPROM_EXT_DEBUG_EN + g_eeprom_ext_test[area_id].test_count[46]++; + #endif + g_eeprom_ext[area_id].page_count++; + //break; + //}while(1); + #endif + break; + case EFLASH_STATE_UPDATE: + virt_addr = g_eeprom_ext[area_id].page_cur_id; + data = g_logic_page_write_data[area_id]; + /* Get valid Page for write operation */ + l_valid_page = eeprom_find_valid_page(area_id,EFLASH_WRITE_IN_VALID_PAGE); + + /* Check if there is no valid page */ + /* 扇区损坏，要格式化E2 需要很长时间，请关闭开门狗 */ + if (l_valid_page == EFLASH_NO_VALID_PAGE) + { + #ifdef EEPROM_EXT_DEBUG_IO_EN + EEPROM_EXT_TEST1_ON(area_id); + #endif + eeprom_format(area_id); + #ifdef EEPROM_EXT_DEBUG_IO_EN + EEPROM_EXT_TEST1_OFF(area_id); + #endif + g_eeprom_ext[area_id].state = EFLASH_STATE_IDLE; + #ifdef EEPROM_OPTIMIZE_SEARCH_FAST + eeprom_get_current_page_addr(area_id,&g_eeprom_ext[area_id].current_page,&g_eeprom_ext[area_id].current_end_addr); + #endif + #ifdef EEPROM_EXT_DEBUG_EN + g_eeprom_ext_test[area_id].test_count[47]++; + #endif + break; + } + #ifdef EEPROM_EXT_DEBUG_IO_EN + //EEPROM_EXT_TEST1_ON(area_id); + #endif + l_status = eeprom_verify_page_ful_write_one_ele(area_id,l_valid_page, virt_addr, data); + #ifdef EEPROM_EXT_DEBUG_IO_EN + //EEPROM_EXT_TEST1_OFF(area_id); + #endif + if(l_status == EFLASH_STATUS_PPADRER_ERROR) + { + #ifdef EEPROM_EXT_DEBUG_IO_EN + EEPROM_EXT_TEST1_ON(area_id); + #endif + eeprom_format(area_id); + #ifdef EEPROM_EXT_DEBUG_IO_EN + EEPROM_EXT_TEST1_OFF(area_id); + #endif + g_eeprom_ext[area_id].state = EFLASH_STATE_IDLE; + #ifdef EEPROM_OPTIMIZE_SEARCH_FAST + eeprom_get_current_page_addr(area_id,&g_eeprom_ext[area_id].current_page,&g_eeprom_ext[area_id].current_end_addr); + #endif + #ifdef EEPROM_EXT_DEBUG_EN + g_eeprom_ext_test[area_id].test_count[48]++; + #endif + break; + } + if(l_status == EFLASH_PAGE_FULL) + { + l_timeout = 0; + #ifdef EEPROM_EXT_NOT_TRANS_MORE_WHEN_FULL + if( g_eeprom_ext[area_id].page_addr_cur_total >= (g_eeprom_user_info[area_id].mass_page_addr_total_u32) ) + { + #ifdef EEPROM_EXT_DEBUG_EN + g_eeprom_ext_test[area_id].test_count[49]++; + #endif + g_eeprom_ext[area_id].state = EFLASH_STATE_IDLE; + g_eeprom_ext[area_id].result = EFLASH_RESULT_ONCE_OK; + #ifdef EEPROM_OPTIMIZE_SEARCH_FAST + eeprom_get_current_page_addr(area_id,&g_eeprom_ext[area_id].current_page,&g_eeprom_ext[area_id].current_end_addr); + #endif + } + else + #endif + { + g_eeprom_ext[area_id].state = EFLASH_STATE_PAGE_TRANSFER; + g_eeprom_ext[area_id].transfer_state = EFLASH_PAGE_TRANSFER_STATE_WRITE_NEW_DATA; + } + #ifdef EEPROM_EXT_DEBUG_EN + g_eeprom_ext_test[area_id].test_count[50]++; + #endif + } + else + { + #ifdef EEPROM_OPTIMIZE_SEARCH_FAST + eeprom_get_current_page_addr(area_id,&g_eeprom_ext[area_id].current_page,&g_eeprom_ext[area_id].current_end_addr); + #endif + g_eeprom_ext[area_id].state = EFLASH_STATE_IDLE; + #ifdef EEPROM_EXT_DEBUG_EN + g_eeprom_ext_test[area_id].test_count[51]++; + #endif + } + #ifdef EEPROM_EXT_DEBUG_EN + g_eeprom_ext_test[area_id].test_count[52]++; + #endif + break; + case EFLASH_STATE_PAGE_TRANSFER: + virt_addr = g_eeprom_ext[area_id].page_cur_id; + data = g_logic_page_write_data[area_id]; + l_status = eeprom_page_transfer(area_id,virt_addr, data); + if(l_status == EFLASH_STATUS_SUCCESS) + { + g_eeprom_ext[area_id].state = EFLASH_STATE_IDLE; + #ifdef EEPROM_EXT_DEBUG_EN + g_eeprom_ext_test[area_id].test_count[53]++; + #endif + } + if(l_status == EFLASH_STATUS_PPADRER_ERROR) + { + #ifdef EEPROM_EXT_DEBUG_IO_EN + EEPROM_EXT_TEST1_ON(area_id); + #endif + eeprom_format(area_id); + #ifdef EEPROM_EXT_DEBUG_IO_EN + EEPROM_EXT_TEST1_OFF(area_id); + #endif + g_eeprom_ext[area_id].state = EFLASH_STATE_IDLE; + #ifdef EEPROM_EXT_DEBUG_EN + g_eeprom_ext_test[area_id].test_count[54]++; + #endif + } + l_timeout ++; + if( (l_timeout >= EEPROM_EXT_TIMEOUT) || (l_status != EFLASH_STATUS_BUSY && l_status != EFLASH_STATUS_SUCCESS)) + { + //EFLASH_SetCtrlReg1(0x0); + //EFLASH_LockCtrl(); //TEMP_CLOSE 这些不知道怎么修改 + g_eeprom_ext[area_id].state = EFLASH_STATE_IDLE; + g_eeprom_ext[area_id].result = EFLASH_RESULT_ONCE_OK; + #ifdef EEPROM_EXT_DEBUG_EN + g_eeprom_ext_test[area_id].test_count[55]++; + #endif + } + #ifdef EEPROM_EXT_DEBUG_EN + g_eeprom_ext_test[area_id].test_count[56]++; + #endif + #ifdef EEPROM_OPTIMIZE_SEARCH_FAST + if(g_eeprom_ext[area_id].state==EFLASH_STATE_IDLE) + { + eeprom_get_current_page_addr(area_id,&g_eeprom_ext[area_id].current_page,&g_eeprom_ext[area_id].current_end_addr); + } + #endif + break; + default: + g_eeprom_ext[area_id].state = EFLASH_STATE_IDLE; + #ifdef EEPROM_EXT_DEBUG_EN + g_eeprom_ext_test[area_id].test_count[57]++; + #endif + break; + + #else + + default: + #ifdef EEPROM_EXT_DEBUG_EN + g_eeprom_ext_test[area_id].test_count[58]++; + #endif + break; + + #endif + + } +} + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : area_id: Var片区 +|Output parameters : +|Return value : +|Description : 重新启动--一个循环 +----------------------------------------------------------------------------*/ +void eeprom_state_machine_area_resatrt(u8 area_id) +{ + assert_param(area_id1u + g_eeprom_ext[EEPROM_AREA_ID_1].page_count=0u; + g_eeprom_ext[EEPROM_AREA_ID_1].result = EFLASH_RESULT_INIT; + #endif + } +} + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : 重新启动--一个循环 +----------------------------------------------------------------------------*/ +void eeprom_state_machine_resatrt(void) +{ + u8 i; + for(i=0u;i1u + l_result = g_eeprom_ext[area_id].result; + #endif + } + return l_result; +} + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : 读取一个循环是否结束 +----------------------------------------------------------------------------*/ +u8 eeprom_state_machine_area_get_all_result_ok(void) +{ + u8 l_result = EFLASH_RESULT_ONCE_OK; + //u8 l_total = EEPROM_AREA_TOTAL; + u8 i; + + for(i=0u;iVTOR = NVIC_VectTab | (Offset & (uint32_t)0x1FFFFF80); +} + + + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description :初始化 +----------------------------------------------------------------------------*/ +void nvic_init(void) +{ + //NVIC_SetVectorTable(FLASH_BASE,BOOT_APP_VECTOR_OFFSET); + nvic_set_vector_table(0x00000000u,0x00); // + /* Configure one bit for preemption priority */ + //NVIC_PriorityGroupConfig(NVIC_PriorityGroup_2); + +} + + + + diff --git a/code_boot_out/qm/bsp/nvic.h b/code_boot_out/qm/bsp/nvic.h new file mode 100644 index 0000000..fd55126 --- /dev/null +++ b/code_boot_out/qm/bsp/nvic.h @@ -0,0 +1,71 @@ +/** ########################################################################## +** Filename : +** Project : +** Module : +** Processor : +** Version : +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20230602- --V1.0-- --mingyea--- --修改-- + +** #########################################################################*/ +#ifndef NVIC_H__ +#define NVIC_H__ + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ +#include "common_types.h" +#include "nvic_cfg.h" + +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- G L O B A L V A R I A B L E S +- only configuration table allowed here,variables are not allowed! +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ + + + +void nvic_init(void); +void nvic_set_vector_table(uint32_t NVIC_VectTab, uint32_t Offset); + +#if 0 +void nvic_disable_primask(void); +void nvic_enable_primask(void); +void nvic_disable_faultmask(void); +void nvic_enable_faultmask(void); +#endif + + +#endif /* __NVIC_H__ */ + + + + diff --git a/code_boot_out/qm/bsp/nvic_cfg.c b/code_boot_out/qm/bsp/nvic_cfg.c new file mode 100644 index 0000000..d583303 --- /dev/null +++ b/code_boot_out/qm/bsp/nvic_cfg.c @@ -0,0 +1,56 @@ +/** ########################################################################## +** Filename : +** Project : +** Module : +** Processor : +** Version : 1.0 +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20230602- --V1.0-- --mingyea--- --修改-- + +** #########################################################################*/ + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ +#include "nvic.h" + +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ + + + +/*--------------------------------------------------------------------------- +- S T A T I C V A R I A B L E S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +* G L O B A L V A R I A B L E S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ diff --git a/code_boot_out/qm/bsp/nvic_cfg.h b/code_boot_out/qm/bsp/nvic_cfg.h new file mode 100644 index 0000000..c99d29f --- /dev/null +++ b/code_boot_out/qm/bsp/nvic_cfg.h @@ -0,0 +1,117 @@ +/** ########################################################################## +** Filename : +** Project : +** Module : +** Processor : +** Version : +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20230602- --V1.0-- --mingyea--- --修改-- + +** #########################################################################*/ +#ifndef NVIC_CFG_H__ +#define NVIC_CFG_H__ + + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ +#define CPU_CFG_KA_IPL_BOUNDARY_11x 0 + + +/*中斷優先級配置*/ + +#define NVIC_PRIORITY_CLK (CPU_CFG_KA_IPL_BOUNDARY_11x) +#define NVIC_PRIORITY_PVD (CPU_CFG_KA_IPL_BOUNDARY_11x) +#define NVIC_PRIORITY_SVD (CPU_CFG_KA_IPL_BOUNDARY_11x) + +#define NVIC_PRIORITY_CAN (CPU_CFG_KA_IPL_BOUNDARY_11x+1) + +#define NVIC_PRIORITY_LIN (CPU_CFG_KA_IPL_BOUNDARY_11x+2) +#define NVIC_PRIORITY_USART (CPU_CFG_KA_IPL_BOUNDARY_11x+2) + +#define NVIC_PRIORITY_TIM (CPU_CFG_KA_IPL_BOUNDARY_11x+3) +#define NVIC_PRIORITY_ADC (CPU_CFG_KA_IPL_BOUNDARY_11x+3) + +#define NVIC_PRIORITY_GPIO (CPU_CFG_KA_IPL_BOUNDARY_11x+3) +#define NVIC_PRIORITY_RTC (CPU_CFG_KA_IPL_BOUNDARY_11x+3) +#define NVIC_PRIORITY_WDOG (CPU_CFG_KA_IPL_BOUNDARY_11x+3) + +#define NVIC_PRIORITY_PWM (CPU_CFG_KA_IPL_BOUNDARY_11x+3) + +#define NVIC_PRIORITY_USART0 NVIC_PRIORITY_USART +#define NVIC_PRIORITY_USART1 NVIC_PRIORITY_USART +#define NVIC_PRIORITY_USART2 NVIC_PRIORITY_USART +#define NVIC_PRIORITY_USART3 NVIC_PRIORITY_USART +#define NVIC_PRIORITY_USART4 NVIC_PRIORITY_USART +#define NVIC_PRIORITY_USART5 NVIC_PRIORITY_USART + + +#if 0 +#define NVIC_PRIORITY_TIM0 NVIC_PRIORITY_TIM +#define NVIC_PRIORITY_TIM1 NVIC_PRIORITY_TIM + +#define NVIC_PRIORITY_ADC0 NVIC_PRIORITY_ADC +#define NVIC_PRIORITY_ADC1 NVIC_PRIORITY_ADC +#define NVIC_PRIORITY_ADC2 NVIC_PRIORITY_ADC +#define NVIC_PRIORITY_ADC3 NVIC_PRIORITY_ADC + +#define NVIC_PRIORITY_EXTI0 NVIC_PRIORITY_GPIO + +#define NVIC_PRIORITY_CAN0_TX NVIC_PRIORITY_CAN +#define NVIC_PRIORITY_CAN0_RX0 NVIC_PRIORITY_CAN +#endif + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- G L O B A L V A R I A B L E S +- only configuration table allowed here,variables are not allowed! +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ + + + + + + + + + + + + + + + + + + + +#endif \ No newline at end of file diff --git a/code_boot_out/qm/bsp/svd.c b/code_boot_out/qm/bsp/svd.c new file mode 100644 index 0000000..e0a267a --- /dev/null +++ b/code_boot_out/qm/bsp/svd.c @@ -0,0 +1,197 @@ +/** ########################################################################## +** Filename : +** Project : +** Module : +** Processor : +** Version : +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20230602- --V1.0-- --mingyea--- --修改-- + +** #########################################################################*/ + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ +#include "svd.h" +#include "nvic.h" + + +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- S T A T I C V A R I A B L E S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +* G L O B A L V A R I A B L E S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ + + + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : SVD初始化 +----------------------------------------------------------------------------*/ +void svd_init(void) +{ + //FL_GPIO_InitTypeDef GPIO_InitStruct; + FL_NVIC_ConfigTypeDef InterruptConfigStruct; + FL_SVD_InitTypeDef SVD_InitStruct; + + #if 0 + GPIO_InitStruct.pin = FL_GPIO_PIN_15; + GPIO_InitStruct.mode = FL_GPIO_MODE_ANALOG; + GPIO_InitStruct.outputType = FL_GPIO_OUTPUT_PUSHPULL; + GPIO_InitStruct.pull = FL_DISABLE; + GPIO_InitStruct.remapPin = FL_DISABLE; + GPIO_InitStruct.analogSwitch = FL_DISABLE; + FL_GPIO_Init(GPIOA, &GPIO_InitStruct); + #endif + + SVD_InitStruct.SVSChannel = (uint32_t)FL_DISABLE; + SVD_InitStruct.digitalFilter = (uint32_t)FL_ENABLE; + SVD_InitStruct.referenceVoltage = (uint32_t)FL_SVD_REFERENCE_1P0V; + SVD_InitStruct.workMode = (uint32_t)FL_SVD_WORK_MODE_CONTINUOUS; + SVD_InitStruct.enablePeriod = (uint32_t)FL_SVD_ENABLE_PERIOD_62P5MS; + SVD_InitStruct.warningThreshold = (uint32_t)FL_SVD_WARNING_THRESHOLD_GROUP11; //必须4.2以上 + FL_SVD_Init(SVD, &SVD_InitStruct); + + /* 清除欠压标志 */ + FL_SVD_ClearFlag_PowerFall(SVD); + /* 使能欠压中断 */ + FL_SVD_EnableIT_PowerFall(SVD); + + /* 清除过压标志 */ + FL_SVD_ClearFlag_PowerRise(SVD); + /* 使能过压中断 */ + FL_SVD_EnableIT_PowerRise(SVD); + + InterruptConfigStruct.preemptPriority = NVIC_PRIORITY_SVD; //优先级改为最高 + FL_NVIC_Init(&InterruptConfigStruct, SVD_IRQn); + + FL_SVD_Enable(SVD); +} + + + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +----------------------------------------------------------------------------*/ +void svd_task(void) +{ + //SVD锁存判断 + if((uint32_t)FL_RESET == FL_SVD_GetLatchedPowerStatus(SVD)) // SVD内部滤波后的电压检测标志，仅在使能数字滤波时有意义；软件避免写此寄存器。 + { + // SVD检测到欠压 + // ... + } + #if 0 + if(SVDState == SPOWEROFF) + { + // SVD检测到欠压 + } + else + { + // SVD检测到欠压恢复 + } + #endif +} + + + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : SVD中断配置 +----------------------------------------------------------------------------*/ +void SVD_Interrupt_Init(void) +{ + FL_NVIC_ConfigTypeDef InterruptConfigStruct; + + /* 使能过压和欠压中断 */ + FL_SVD_ClearFlag_PowerRise(SVD); + FL_SVD_ClearFlag_PowerFall(SVD); + FL_SVD_EnableIT_PowerRise(SVD); + FL_SVD_EnableIT_PowerFall(SVD); + + /* 配置NVIC中断 */ + InterruptConfigStruct.preemptPriority = NVIC_PRIORITY_SVD; + FL_NVIC_Init(&InterruptConfigStruct, SVD_IRQn); + + /* 基于SVD监测结果初始赋值 */ + /* 注意：如果有使能数字滤波，应使用SVDR查询；如未使能数字滤波，应使用SVDO查询 */ + //eSVDResult = SVD_SVDO_POLL(); +} + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : SVD中断反初始化 +----------------------------------------------------------------------------*/ + +void SVD_Interrupt_DeInit(void) +{ + /* 禁能过压和欠压中断 */ + FL_SVD_ClearFlag_PowerRise(SVD); + FL_SVD_ClearFlag_PowerFall(SVD); + FL_SVD_DisableIT_PowerRise(SVD); + FL_SVD_DisableIT_PowerFall(SVD); + + /* 清除NVIC Pending位 */ + NVIC_ClearPendingIRQ(SVD_IRQn); + /* 禁能NVIC中断 */ + NVIC_DisableIRQ(SVD_IRQn); +} + + + + diff --git a/code_boot_out/qm/bsp/svd.h b/code_boot_out/qm/bsp/svd.h new file mode 100644 index 0000000..af25ce4 --- /dev/null +++ b/code_boot_out/qm/bsp/svd.h @@ -0,0 +1,62 @@ +/** ########################################################################## +** Filename : +** Project : +** Module : +** Processor : +** Version : +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20230602- --V1.0-- --mingyea--- --修改-- + +** #########################################################################*/ +#ifndef SVD_H__ +#define SVD_H__ + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ +#include "fm33lg0xx_fl.h" + + +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ +#define SPOWERON 0u +#define SPOWEROFF 1u + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- G L O B A L V A R I A B L E S +- only configuration table allowed here,variables are not allowed! +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ + +void svd_init(void); +void svd_task(void); +void SVD_Interrupt_Init(void); +void SVD_Interrupt_DeInit(void); + + +#endif diff --git a/code_boot_out/qm/bsp/svd_cfg.c b/code_boot_out/qm/bsp/svd_cfg.c new file mode 100644 index 0000000..d1301a6 --- /dev/null +++ b/code_boot_out/qm/bsp/svd_cfg.c @@ -0,0 +1,92 @@ +/** ########################################################################## +** Filename : +** Project : +** Module : +** Processor : +** Version : 1.0 +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20230602- --V1.0-- --mingyea--- --修改-- + +** #########################################################################*/ + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ + +#include "common_types.h" +#include "common_cfg.h" +#include "svd.h" + +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- S T A T I C V A R I A B L E S +----------------------------------------------------------------------------*/ +u8 SVDState = SPOWERON; //svd检测状态 + + +/*--------------------------------------------------------------------------- +* G L O B A L V A R I A B L E S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : SVD中断 +----------------------------------------------------------------------------*/ +void SVD_IRQHandler(void) +{ + if((uint32_t)FL_SET == FL_SVD_IsActiveFlag_PowerFall(SVD)) //欠压中断 + { + FL_SVD_ClearFlag_PowerFall(SVD); + SVDState = SPOWEROFF; + SystemSoftwareReset(); + } + else if((uint32_t)FL_SET == FL_SVD_IsActiveFlag_PowerRise(SVD)) //欠压恢复中断 + { + FL_SVD_ClearFlag_PowerRise(SVD); + SVDState = SPOWERON; + SystemSoftwareReset(); + } + else + { + // + } +} + + + + diff --git a/code_boot_out/qm/bsp/svd_cfg.h b/code_boot_out/qm/bsp/svd_cfg.h new file mode 100644 index 0000000..8f37632 --- /dev/null +++ b/code_boot_out/qm/bsp/svd_cfg.h @@ -0,0 +1,58 @@ +/** ########################################################################## +** Filename : +** Project : +** Module : +** Processor : +** Version : 1.0 +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20230602- --V1.0-- --mingyea--- --修改-- + +** #########################################################################*/ +#ifndef SVD_CFG_H__ +#define SVD_CFG_H__ + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ +#include "fm33lg0xx_fl.h" + +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- G L O B A L V A R I A B L E S +- only configuration table allowed here,variables are not allowed! +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ + + + + + + +#endif diff --git a/code_boot_out/qm/bsp/tim.c b/code_boot_out/qm/bsp/tim.c new file mode 100644 index 0000000..8f2ecb3 --- /dev/null +++ b/code_boot_out/qm/bsp/tim.c @@ -0,0 +1,368 @@ +/** ########################################################################## +** Filename : +** Project : +** Module : +** Processor : +** Version : +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20230602- --V1.0-- --mingyea--- --修改-- + +** #########################################################################*/ + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ +#include "tim.h" +#include "cpu.h" +#include "nvic.h" + +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ +typedef struct +{ + u8 state; + u16 pwm_duty; +}tim_s; + +/*--------------------------------------------------------------------------- +- S T A T I C V A R I A B L E S +----------------------------------------------------------------------------*/ +static tim_s g_tim; + + +/*--------------------------------------------------------------------------- +* G L O B A L V A R I A B L E S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ + + + +#ifdef FL_ATIM_ENABLE +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +----------------------------------------------------------------------------*/ +static void atim_init(void) +{ + FL_ATIM_Init(ATIM, (FL_ATIM_InitTypeDef*)&g_atimer0_Config0); /*PRQA S 0311*/ + + FL_ATIM_ClearFlag_Update(ATIM); /* 清除计数器中断标志位 */ + //FL_ATIM_EnableIT_Update(ATIM); /* 开启计数器中断 */ + + //pwm_manage_atm_init(); + + FL_ATIM_Enable(ATIM); /* 使能定时器 */ + //FL_ATIM_EnableALLOutput(ATIM);/* 主控输出使能 */ + //FL_ATIM_OC_EnableChannel(ATIM,FL_ATIM_CHANNEL_2); + //FL_ATIM_OC_DisableChannel(ATIM,FL_ATIM_CHANNEL_2); + +} +#endif + + + +#ifdef FL_BSTIM16_ENABLE +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +----------------------------------------------------------------------------*/ +static void bstim16_init(void) +{ + FL_BSTIM16_Init(BSTIM16, (FL_BSTIM16_InitTypeDef*)&g_TimerBase_InitStruct); + + FL_BSTIM16_ClearFlag_Update(BSTIM16); /* 清除计数器中断标志位 */ + FL_BSTIM16_EnableIT_Update(BSTIM16); /* 开启计数器中断 */ + + NVIC_ClearPendingIRQ(BSTIM_IRQn); + NVIC_DisableIRQ(BSTIM_IRQn); + NVIC_SetPriority(BSTIM_IRQn, NVIC_PRIORITY_TIM); //中断优先级配置 + NVIC_EnableIRQ(BSTIM_IRQn); + + FL_BSTIM16_Enable(BSTIM16); /* 使能定时器 */ +} +#endif + +#ifdef FL_GPTIM_ENABLE +/*--------------------------------------------------------------------------- +|Prototype :初始化 +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +----------------------------------------------------------------------------*/ +void gptim_init(void) +{ + FL_GPTIM_Init(GPTIM0, (FL_GPTIM_InitTypeDef*)&g_gptim_init_cfg); + + //pwm_manage_gptm0_init(); + + FL_GPTIM_Enable(GPTIM0); /* 使能定时器 */ + +} +#endif + +#ifdef FL_GPTIM1_ENABLE +/*--------------------------------------------------------------------------- +|Prototype :初始化 +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +----------------------------------------------------------------------------*/ +void gptim1_init(void) +{ + FL_GPTIM_Init(GPTIM1, (FL_GPTIM_InitTypeDef*)&g_gptim_init_cfg); + //pwm_manage_gptm1_init(); + FL_GPTIM_Enable(GPTIM1); /* 使能定时器 */ + +} +#endif + + +#ifdef FL_GPTIM2_ENABLE +/*--------------------------------------------------------------------------- +|Prototype :初始化 +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +----------------------------------------------------------------------------*/ +void gptim2_init(void) +{ + FL_GPTIM_Init(GPTIM2, (FL_GPTIM_InitTypeDef*)&g_gptim2_init_cfg); + //pwm_manage_gptm2_init(); + FL_GPTIM_Enable(GPTIM2); /* 使能定时器 */ + +} +#endif + +#ifdef FL_LPTIM16_ENABLE +/*--------------------------------------------------------------------------- +|Prototype : 初始化 +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +----------------------------------------------------------------------------*/ +void lptim16_init(void) +{ + FL_LPTIM16_StructInit((FL_LPTIM16_InitTypeDef*)&g_lptim16_cfg_tab); + FL_LPTIM16_Init(LPTIM16, (FL_LPTIM16_InitTypeDef*)&g_lptim16_cfg_tab); + /*---------------- 中断配置 ----------------*/ + /* 清除标志 */ + FL_LPTIM16_ClearFlag_Update(LPTIM16); + + /* 中断使能 */ + FL_LPTIM16_EnableIT_Update(LPTIM16); + + /* 使能并配置NVIC */ + NVIC_ClearPendingIRQ(LPTIMx_IRQn); + NVIC_DisableIRQ(LPTIMx_IRQn); + NVIC_SetPriority(LPTIMx_IRQn, NVIC_PRIORITY_RTC); //中断优先级配置 + NVIC_EnableIRQ(LPTIMx_IRQn); + + /*---------------------------------------------*/ + + /* 使能LPTIM16 */ + FL_LPTIM16_Enable(LPTIM16); +} + + +#endif + + +#ifdef FL_LPTIM32_ENABLE +/*--------------------------------------------------------------------------- +|Prototype : 初始化 +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +----------------------------------------------------------------------------*/ +void lptim32_init(void) +{ + /*---------------- 定时器时间基准配置 ----------------*/ + FL_LPTIM32_StructInit((FL_LPTIM32_InitTypeDef*)&g_lptim32_cfg_tab); + + FL_LPTIM32_Init(LPTIM32, (FL_LPTIM32_InitTypeDef*)&g_lptim32_cfg_tab); + + /*---------------------------------------------*/ + + /*---------------- 中断配置 ----------------*/ + /* 清除标志 */ + FL_LPTIM32_ClearFlag_Update(LPTIM32); + + //pwm_manage_lpt32_init(); + /*---------------------------------------------*/ + + /* 使能LPTIM32 */ + FL_LPTIM32_Enable(LPTIM32); + +} + + +#endif + + +/*--------------------------------------------------------------------------- +|Prototype : 初始化 +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +----------------------------------------------------------------------------*/ +void tim_init(void) +{ + g_tim.state =0u; + g_tim.pwm_duty =500u; + + #ifdef FL_BSTIM16_ENABLE + bstim16_init(); + #endif + + #ifdef FL_LPTIM16_ENABLE + //lptim16_init(); + #endif + + #ifdef FL_LPTIM32_ENABLE + lptim32_init(); + #endif + + #ifdef FL_ATIM_ENABLE + atim_init(); + #endif + + #ifdef FL_GPTIM_ENABLE + gptim_init(); + #endif + + #ifdef FL_GPTIM1_ENABLE + gptim1_init(); + #endif + + #ifdef FL_GPTIM2_ENABLE + gptim2_init(); + #endif +} + + +/*--------------------------------------------------------------------------- +|Prototype : 反初始化 +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +----------------------------------------------------------------------------*/ +void tim_de_init(void) +{ + #ifdef FL_ATIM_ENABLE + FL_ATIM_DeInit(ATIM); + #endif + + #ifdef FL_BSTIM16_ENABLE + FL_BSTIM16_DeInit(BSTIM16); + #endif + + #ifdef FL_GPTIM0_ENABLE + FL_GPTIM_DeInit(GPTIM0); + #endif + + #ifdef FL_GPTIM1_ENABLE + FL_GPTIM_DeInit(GPTIM1); + #endif + + #ifdef FL_GPTIM2_ENABLE + FL_GPTIM_DeInit(GPTIM2); + #endif + + #ifdef FL_LPTIM32_ENABLE + FL_LPTIM32_DeInit(LPTIM32); + #endif + + //留着LPTIM16不反初始，是给间歇唤醒用的； + +} + + + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : 任务， 测试用 +----------------------------------------------------------------------------*/ +void tim_task(void) +{ + if(g_tim.state==1u) + { + //#ifdef FL_ATIM_PWM_EN + //FL_ATIM_WriteCompareCH2(ATIM,g_tim.pwm_duty); //B6 + //#endif + #ifdef FL_GPTIM_ENABLE + FL_GPTIM_WriteCompareCH2(GPTIM0,g_tim.pwm_duty); //B6 + #endif + } +} + + + + + + + + + + diff --git a/code_boot_out/qm/bsp/tim.h b/code_boot_out/qm/bsp/tim.h new file mode 100644 index 0000000..02e4dac --- /dev/null +++ b/code_boot_out/qm/bsp/tim.h @@ -0,0 +1,80 @@ +/** ########################################################################## +** Filename : +** Project : +** Module : +** Processor : +** Version : 1.0 +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20230602- --V1.0-- --mingyea--- --修改-- + +** #########################################################################*/ + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ +#ifndef TIM_H__ +#define TIM_H__ + + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ +#include "common_types.h" +#include "tim_cfg.h" + +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- S T A T I C V A R I A B L E S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +* G L O B A L V A R I A B L E S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ + +void tim_init(void); +void tim_task(void); +void tim_de_init(void); + +#ifdef FL_LPTIM16_ENABLE +void lptim16_init(void); +#endif + + +#endif /* __APP_TIM_H__ */ + + + + + + diff --git a/code_boot_out/qm/bsp/tim_cfg.c b/code_boot_out/qm/bsp/tim_cfg.c new file mode 100644 index 0000000..ee5d526 --- /dev/null +++ b/code_boot_out/qm/bsp/tim_cfg.c @@ -0,0 +1,510 @@ +/** ########################################################################## +** Filename : +** Project : +** Module : +** Processor : +** Version : 1.0 +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20230602- --V1.0-- --mingyea--- --修改-- + +** #########################################################################*/ + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ +#include "common_cfg.h" +#include "cpu.h" +#include "tim.h" +#include "gpio.h" + +#include "logic_timer.h" +#include "random_pseudo.h" +#include "bl_timer.h" + +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ + +typedef struct +{ + u8 state; + #ifdef TIM_CFG_DEBUG_DISP_EN + u16 count[8]; + #endif +}tim_cfg_s; + + +/*--------------------------------------------------------------------------- +- S T A T I C V A R I A B L E S +----------------------------------------------------------------------------*/ +tim_cfg_s g_tim_cfg = {0u}; + + +/*--------------------------------------------------------------------------- +* G L O B A L V A R I A B L E S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ +#ifdef FL_ATIM_ENABLE +const FL_ATIM_InitTypeDef g_atimer0_Config0 = +{ + (uint32_t)FL_CMU_ATIM_CLK_SOURCE_APBCLK, /* 时钟源选择APB2 */ + (uint32_t)48u-1u, /* 分频系数8000 */ // 479 48MHZ/480= + (uint32_t)FL_ATIM_COUNTER_DIR_UP, /* 向上计数 */ + (uint32_t)FL_ATIM_PWM_FREQ-1u, /* 自动重装载值1000 */ // 1 / (48MHZ/480) * 100 = 0.001 s + (uint32_t)FL_ENABLE, /* 自动重装载禁止preload */ + (uint32_t)FL_ATIM_CLK_DIVISION_DIV1, /* 死区和滤波设置 */ /*! 定时器分频系数与数字滤波器所使用的采样时钟分频比 */ + (uint32_t)0u, /* 重复计数 */ +}; + +const FL_ATIM_OC_InitTypeDef g_atmer0_ch1_InitStructer = +{ + (uint32_t)FL_ATIM_OC_MODE_PWM1, /*! OCMode 比较输出模式 */ + (uint32_t)FL_ENABLE, /*! OCState 正向比较通道输出使能 */ + (uint32_t)FL_DISABLE, /*! OCNState 比较互补通道输出使能 */ + (uint32_t)FL_ATIM_OC_POLARITY_NORMAL, /*! OCPolarity 比较输出极性 */ + (uint32_t)FL_ATIM_OC_POLARITY_NORMAL, /*! OCNPolarity 比较互补输出极性 */ + (uint32_t)FL_DISABLE, /*! OCFastMode 比较输出通道快速模式使能 */ + (uint32_t)FL_DISABLE, /*! OCPreload 输出比较预装载 */ + (uint32_t)FL_ATIM_PWM_DUTY_INIT, /*! compareValue 通道比较值 */ + (uint32_t)FL_ATIM_OC_IDLE_STATE_HIGH, /*! OCIdleState 输出空闲状态电平 */ + (uint32_t)FL_DISABLE, /*! OCETRFStatus ETR清0使能 */ + (uint32_t)FL_ATIM_OCN_IDLE_STATE_HIGH, /*! OCNIdleState 互补输出空闲状态电平 */ +}; + +const FL_ATIM_OC_InitTypeDef g_atmer0_ch2_InitStructer = +{ + (uint32_t)FL_ATIM_OC_MODE_PWM1, /*! OCMode 比较输出模式 */ + (uint32_t)FL_ENABLE, /*! OCState 正向比较通道输出使能 */ + (uint32_t)FL_DISABLE, /*! OCNState 比较互补通道输出使能 */ + (uint32_t)FL_ATIM_OC_POLARITY_NORMAL, /*! OCPolarity 比较输出极性 */ + (uint32_t)FL_ATIM_OC_POLARITY_NORMAL, /*! OCNPolarity 比较互补输出极性 */ + (uint32_t)FL_DISABLE, /*! OCFastMode 比较输出通道快速模式使能 */ + (uint32_t)FL_DISABLE, /*! OCPreload 输出比较预装载 */ + (uint32_t)FL_ATIM_PWM_DUTY_INIT, /*! compareValue 通道比较值 */ + (uint32_t)FL_ATIM_OC_IDLE_STATE_HIGH, /*! OCIdleState 输出空闲状态电平 */ + (uint32_t)FL_DISABLE, /*! OCETRFStatus ETR清0使能 */ + (uint32_t)FL_ATIM_OCN_IDLE_STATE_HIGH, /*! OCNIdleState 互补输出空闲状态电平 */ +}; + +const FL_ATIM_OC_InitTypeDef g_atmer0_ch3_InitStructer = +{ + (uint32_t)FL_ATIM_OC_MODE_PWM1, /*! OCMode 比较输出模式 */ + (uint32_t)FL_ENABLE, /*! OCState 正向比较通道输出使能 */ + (uint32_t)FL_DISABLE, /*! OCNState 比较互补通道输出使能 */ + (uint32_t)FL_ATIM_OC_POLARITY_NORMAL, /*! OCPolarity 比较输出极性 */ + (uint32_t)FL_ATIM_OC_POLARITY_NORMAL, /*! OCNPolarity 比较互补输出极性 */ + (uint32_t)FL_DISABLE, /*! OCFastMode 比较输出通道快速模式使能 */ + (uint32_t)FL_DISABLE, /*! OCPreload 输出比较预装载 */ + (uint32_t)FL_ATIM_PWM_DUTY_INIT, /*! compareValue 通道比较值 */ + (uint32_t)FL_ATIM_OC_IDLE_STATE_HIGH, /*! OCIdleState 输出空闲状态电平 */ + (uint32_t)FL_DISABLE, /*! OCETRFStatus ETR清0使能 */ + (uint32_t)FL_ATIM_OCN_IDLE_STATE_HIGH, /*! OCNIdleState 互补输出空闲状态电平 */ +}; + +const FL_ATIM_OC_InitTypeDef g_atmer0_ch4_InitStructer = +{ + (uint32_t)FL_ATIM_OC_MODE_PWM1, /*! OCMode 比较输出模式 */ + (uint32_t)FL_ENABLE, /*! OCState 正向比较通道输出使能 */ + (uint32_t)FL_DISABLE, /*! OCNState 比较互补通道输出使能 */ + (uint32_t)FL_ATIM_OC_POLARITY_NORMAL, /*! OCPolarity 比较输出极性 */ + (uint32_t)FL_ATIM_OC_POLARITY_NORMAL, /*! OCNPolarity 比较互补输出极性 */ + (uint32_t)FL_DISABLE, /*! OCFastMode 比较输出通道快速模式使能 */ + (uint32_t)FL_DISABLE, /*! OCPreload 输出比较预装载 */ + (uint32_t)FL_ATIM_PWM_DUTY_INIT, /*! compareValue 通道比较值 */ + (uint32_t)FL_ATIM_OC_IDLE_STATE_HIGH, /*! OCIdleState 输出空闲状态电平 */ + (uint32_t)FL_DISABLE, /*! OCETRFStatus ETR清0使能 */ + (uint32_t)FL_ATIM_OCN_IDLE_STATE_HIGH, /*! OCNIdleState 互补输出空闲状态电平 */ +}; + + +const FL_ATIM_BDTR_InitTypeDef g_atimer0_bdtr_config= +{ + (uint32_t)FL_ATIM_OSSR_DISABLE, /*! OSSRState 运行状态下的输出关闭状态 */ + (uint32_t)FL_ATIM_OSSI_DISABLE, /*! OSSIState 空闲状态下的输出关闭状态 */ + (uint32_t)FL_ATIM_LOCK_LEVEL_OFF, /*! lockLevel 寄存器写保护等级 */ + (uint32_t)100u, /*! deadTime 死区时间 */ + (uint32_t)FL_DISABLE, /*! breakState 刹车使能 */ + (uint32_t)FL_ATIM_BREAK_FILTER_DIV1, /*! breakFilter 刹车信号滤波 */ + (uint32_t)FL_ATIM_BREAK_POLARITY_HIGH, /*! breakPolarity 刹车信号极性 */ + (uint32_t)FL_DISABLE, /*! automaticOutput 刹车后计数器重装后自动输出使能*/ + (uint32_t)FL_ATIM_BREAK1_GATE_AUTO, /*! gatedBrakeSignal_1 刹车信号1门控 */ + (uint32_t)FL_ATIM_BREAK2_GATE_AUTO, /*! gatedBrakeSignal_2 刹车信号2门控 */ + (uint32_t)FL_ATIM_BREAK_COMBINATION_OR, /*! brakeSignalCombined 两路刹车信号控制逻辑 */ +}; +#endif + + +#ifdef FL_BSTIM16_ENABLE +const FL_BSTIM16_InitTypeDef g_TimerBase_InitStruct = +{ + (uint32_t)479u, + (uint32_t)99u, // 1 / (48MHZ/480M) * 100 = 0.001 s + (uint32_t)FL_ENABLE, + (uint32_t)FL_CMU_BSTIM16_CLK_SOURCE_APBCLK, +}; +#endif + +#ifdef FL_GPTIM_ENABLE +/** + * + */ +const FL_GPTIM_InitTypeDef g_gptim_init_cfg = +{ + (uint32_t)48u - 1u, /* 分频系数48000 */ + (uint32_t)FL_GPTIM_COUNTER_DIR_UP, /* 向上计数 */ + (uint32_t)FL_GPTIM_PWM_FREQ - 1u, /* 自动重装载值1000 */ + (uint32_t)FL_ENABLE, /* 预装载preload使能 */ + (uint32_t)FL_GPTIM_CLK_DIVISION_DIV1, /* 死区和滤波分频 */ +}; + +const FL_GPTIM_OC_InitTypeDef g_gptim_ch1_cfg = +{ + (uint32_t)FL_GPTIM_OC_MODE_PWM1, /* 输出比较模式PWM1 */ + (uint32_t)FL_DISABLE, /* 关闭快速使能 */ + (uint32_t)FL_DISABLE, /* OC preload 无效 */ + (uint32_t)FL_GPTIM_PWM_DUTY_VALID, /* 比较值500 */ + (uint32_t)FL_GPTIM_OC_POLARITY_NORMAL, /* OC正常输出 */ + (uint32_t)FL_DISABLE, /* OC1REF不受ETR影响 */ +}; + +const FL_GPTIM_OC_InitTypeDef g_gptim_ch2_cfg = +{ + (uint32_t)FL_GPTIM_OC_MODE_PWM1, /* 输出比较模式PWM1 */ + (uint32_t)FL_DISABLE, /* 关闭快速使能 */ + (uint32_t)FL_DISABLE, /* OC preload 无效 */ + (uint32_t)FL_GPTIM_PWM_DUTY_VALID, /* 比较值500 */ + (uint32_t)FL_GPTIM_OC_POLARITY_NORMAL, /* OC正常输出 */ + (uint32_t)FL_DISABLE, /* OC1REF不受ETR影响 */ +}; + +const FL_GPTIM_OC_InitTypeDef g_gptim_ch3_cfg = +{ + (uint32_t)FL_GPTIM_OC_MODE_PWM1, /* 输出比较模式PWM1 */ + (uint32_t)FL_DISABLE, /* 关闭快速使能 */ + (uint32_t)FL_DISABLE, /* OC preload 无效 */ + (uint32_t)FL_GPTIM_PWM_DUTY_VALID, /* 比较值500 */ + (uint32_t)FL_GPTIM_OC_POLARITY_NORMAL, /* OC正常输出 */ + (uint32_t)FL_DISABLE, /* OC1REF不受ETR影响 */ +}; + +const FL_GPTIM_OC_InitTypeDef g_gptim_ch4_cfg = +{ + (uint32_t)FL_GPTIM_OC_MODE_PWM1, /* 输出比较模式PWM1 */ + (uint32_t)FL_DISABLE, /* 关闭快速使能 */ + (uint32_t)FL_DISABLE, /* OC preload 无效 */ + (uint32_t)FL_GPTIM_PWM_DUTY_VALID, /* 比较值500 */ + (uint32_t)FL_GPTIM_OC_POLARITY_NORMAL, /* OC正常输出 */ + (uint32_t)FL_DISABLE, /* OC1REF不受ETR影响 */ +}; + +#endif + +#ifdef FL_GPTIM1_ENABLE + +const FL_GPTIM_InitTypeDef g_gptim1_init_cfg = +{ + (uint32_t)48u - 1u, /* 分频系数48000 */ + (uint32_t)FL_GPTIM_COUNTER_DIR_UP, /* 向上计数 */ + (uint32_t)FL_GPTIM1_PWM_FREQ - 1u, /* 自动重装载值1000 */ + (uint32_t)FL_ENABLE, /* 预装载preload使能 */ + (uint32_t)FL_GPTIM_CLK_DIVISION_DIV1, /* 死区和滤波分频 */ +}; + +const FL_GPTIM_OC_InitTypeDef g_gptim1_ch1_cfg = +{ + (uint32_t)FL_GPTIM_OC_MODE_PWM1, /* 输出比较模式PWM1 */ + (uint32_t)FL_DISABLE, /* 关闭快速使能 */ + (uint32_t)FL_DISABLE, /* OC preload 无效 */ + (uint32_t)FL_GPTIM1_PWM_DUTY_VALID, /* 比较值500 */ + (uint32_t)FL_GPTIM_OC_POLARITY_NORMAL, /* OC正常输出 */ + (uint32_t)FL_DISABLE, /* OC1REF不受ETR影响 */ +}; + +const FL_GPTIM_OC_InitTypeDef g_gptim1_ch2_cfg = +{ + (uint32_t)FL_GPTIM_OC_MODE_PWM1, /* 输出比较模式PWM1 */ + (uint32_t)FL_DISABLE, /* 关闭快速使能 */ + (uint32_t)FL_DISABLE, /* OC preload 无效 */ + (uint32_t)FL_GPTIM1_PWM_DUTY_VALID, /* 比较值500 */ + (uint32_t)FL_GPTIM_OC_POLARITY_NORMAL, /* OC正常输出 */ + (uint32_t)FL_DISABLE, /* OC1REF不受ETR影响 */ +}; + +const FL_GPTIM_OC_InitTypeDef g_gptim1_ch3_cfg = +{ + (uint32_t)FL_GPTIM_OC_MODE_PWM1, /* 输出比较模式PWM1 */ + (uint32_t)FL_DISABLE, /* 关闭快速使能 */ + (uint32_t)FL_DISABLE, /* OC preload 无效 */ + (uint32_t)FL_GPTIM1_PWM_DUTY_VALID, /* 比较值500 */ + (uint32_t)FL_GPTIM_OC_POLARITY_NORMAL, /* OC正常输出 */ + (uint32_t)FL_DISABLE, /* OC1REF不受ETR影响 */ +}; + +const FL_GPTIM_OC_InitTypeDef g_gptim1_ch4_cfg = +{ + (uint32_t)FL_GPTIM_OC_MODE_PWM1, /* 输出比较模式PWM1 */ + (uint32_t)FL_DISABLE, /* 关闭快速使能 */ + (uint32_t)FL_DISABLE, /* OC preload 无效 */ + (uint32_t)FL_GPTIM1_PWM_DUTY_VALID, /* 比较值500 */ + (uint32_t)FL_GPTIM_OC_POLARITY_NORMAL, /* OC正常输出 */ + (uint32_t)FL_DISABLE, /* OC1REF不受ETR影响 */ +}; + +#endif + + + + +const FL_GPTIM_InitTypeDef g_gptim2_init_cfg = +{ + (uint32_t)48u - 1u, /* 分频系数48000 */ + (uint32_t)FL_GPTIM_COUNTER_DIR_UP, /* 向上计数 */ + (uint32_t)FL_GPTIM2_PWM_FREQ - 1u, /* 自动重装载值1000 */ + (uint32_t)FL_ENABLE, /* 预装载preload使能 */ + (uint32_t)FL_GPTIM_CLK_DIVISION_DIV1, /* 死区和滤波分频 */ +}; + +const FL_GPTIM_OC_InitTypeDef g_gptim2_ch1_cfg = +{ + (uint32_t)FL_GPTIM_OC_MODE_PWM1, /* 输出比较模式PWM1 */ + (uint32_t)FL_DISABLE, /* 关闭快速使能 */ + (uint32_t)FL_DISABLE, /* OC preload 无效 */ + (uint32_t)FL_GPTIM2_PWM_DUTY_VALID, /* 比较值500 */ + (uint32_t)FL_GPTIM_OC_POLARITY_NORMAL, /* OC正常输出 */ + (uint32_t)FL_DISABLE, /* OC1REF不受ETR影响 */ +}; + +const FL_GPTIM_OC_InitTypeDef g_gptim2_ch2_cfg = +{ + (uint32_t)FL_GPTIM_OC_MODE_PWM1, /* 输出比较模式PWM1 */ + (uint32_t)FL_DISABLE, /* 关闭快速使能 */ + (uint32_t)FL_DISABLE, /* OC preload 无效 */ + (uint32_t)FL_GPTIM2_PWM_DUTY_VALID, /* 比较值500 */ + (uint32_t)FL_GPTIM_OC_POLARITY_NORMAL, /* OC正常输出 */ + (uint32_t)FL_DISABLE, /* OC1REF不受ETR影响 */ +}; + +const FL_GPTIM_OC_InitTypeDef g_gptim2_ch3_cfg = +{ + (uint32_t)FL_GPTIM_OC_MODE_PWM1, /* 输出比较模式PWM1 */ + (uint32_t)FL_DISABLE, /* 关闭快速使能 */ + (uint32_t)FL_DISABLE, /* OC preload 无效 */ + (uint32_t)FL_GPTIM2_PWM_DUTY_VALID, /* 比较值500 */ + (uint32_t)FL_GPTIM_OC_POLARITY_NORMAL, /* OC正常输出 */ + (uint32_t)FL_DISABLE, /* OC1REF不受ETR影响 */ +}; + +const FL_GPTIM_OC_InitTypeDef g_gptim2_ch4_cfg = +{ + (uint32_t)FL_GPTIM_OC_MODE_PWM1, /* 输出比较模式PWM1 */ + (uint32_t)FL_DISABLE, /* 关闭快速使能 */ + (uint32_t)FL_DISABLE, /* OC preload 无效 */ + (uint32_t)FL_GPTIM2_PWM_DUTY_VALID, /* 比较值500 */ + (uint32_t)FL_GPTIM_OC_POLARITY_NORMAL, /* OC正常输出 */ + (uint32_t)FL_DISABLE, /* OC1REF不受ETR影响 */ +}; + + + + +#ifdef FL_LPTIM16_ENABLE +const FL_LPTIM16_InitTypeDef g_lptim16_cfg_tab = +{ + (uint32_t)FL_CMU_LPTIM16_CLK_SOURCE_RCLP, /* 内部时钟源 */ + (uint32_t)FL_LPTIM16_CLK_SOURCE_INTERNAL, /* 预分频器的时钟源 可选择内部时钟, 也可选择外部时钟 */ + (uint32_t)FL_LPTIM16_PSC_DIV32, /* 预分频系数 */ + (uint32_t)200 - 1, /* 重装值 */ //200ms 做为间隙唤醒 + (uint32_t)FL_LPTIM16_OPERATION_MODE_NORMAL, /* 定时器工作模式选择 */ + (uint32_t)FL_LPTIM16_ENCODER_MODE_DISABLE, /* 定时器编码器模式 */ + (uint32_t)FL_LPTIM16_ONE_PULSE_MODE_CONTINUOUS, /* 单次计数使能 */ + (uint32_t)FL_LPTIM16_ETR_COUNT_EDGE_RISING, /* ETR异步计数边沿 */ + (uint32_t)FL_LPTIM16_ETR_TRIGGER_EDGE_RISING, /* ETR触发计数边沿 */ +}; +#endif + + +const FL_LPTIM32_InitTypeDef g_lptim32_cfg_tab = +{ + (uint32_t)FL_CMU_LPTIM32_CLK_SOURCE_APBCLK, /* 内部时钟源 */ + (uint32_t)FL_LPTIM32_CLK_SOURCE_INTERNAL, /* 预分频器的时钟源 可选择内部时钟, 也可选择外部时钟 */ + (uint32_t)FL_LPTIM32_PSC_DIV16, /* 预分频系数 */ + (uint32_t)FL_LPT32_PWM_FREQ - 1, /* 重装值 */ //3000*200 - 1 是 200ms + (uint32_t)FL_LPTIM32_OPERATION_MODE_NORMAL, /* 定时器工作模式选择 */ + (uint32_t)FL_LPTIM32_ONE_PULSE_MODE_CONTINUOUS, /* 单次计数使能 */ + (uint32_t)FL_LPTIM32_ETR_COUNT_EDGE_RISING, /* ETR异步计数边沿 */ + (uint32_t)FL_LPTIM32_ETR_TRIGGER_EDGE_RISING, /* ETR触发计数边沿 */ +}; + +// +const FL_LPTIM32_OC_InitTypeDef g_lpt32_ch1_cfg = +{ + (uint32_t)0u, /* 比较值 */ + (uint32_t)FL_LPTIM32_OC_POLARITY_INVERT, //输出极性 +}; + +// +const FL_LPTIM32_OC_InitTypeDef g_lpt32_ch2_cfg = +{ + (uint32_t)0u, /* 比较值 */ + (uint32_t)FL_LPTIM32_OC_POLARITY_INVERT, //输出极性 +}; + +// +const FL_LPTIM32_OC_InitTypeDef g_lpt32_ch3_cfg = +{ + (uint32_t)0u, /* 比较值 */ + (uint32_t)FL_LPTIM32_OC_POLARITY_INVERT, //输出极性 +}; + +// +const FL_LPTIM32_OC_InitTypeDef g_lpt32_ch4_cfg = +{ + (uint32_t)0u, /* 比较值 */ + (uint32_t)FL_LPTIM32_OC_POLARITY_INVERT, //输出极性 +}; + + + + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ + + + +#ifdef FL_ATIM_ENABLE +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : ATIM中断函数 +----------------------------------------------------------------------------*/ +void ATIM_IRQHandler() +{ + if(FL_ATIM_IsEnabledIT_Update(ATIM) && FL_ATIM_IsActiveFlag_Update(ATIM)) + { + FL_ATIM_ClearFlag_Update(ATIM); + + /* 处理更新事件 */ + //logic_time_tick_count(); + #ifdef TIM_CFG_DEBUG_DISP_EN + g_tim_cfg.count[0]++; + if(g_tim_cfg.count[0]>=1000u) + { + g_tim_cfg.count[0]=0u; + g_tim_cfg.count[1]++; + } + #endif + //random_input_count(); + //TEST1_TOGGLE(); + } +} +#endif + +#ifdef FL_BSTIM16_ENABLE + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : BSTIM中断服务函数 +----------------------------------------------------------------------------*/ +void BSTIM_IRQHandler(void) +{ + if(FL_BSTIM16_IsEnabledIT_Update(BSTIM16) && FL_BSTIM16_IsActiveFlag_Update(BSTIM16)) + { + FL_BSTIM16_ClearFlag_Update(BSTIM16); + + /* 处理更新事件 */ + Tim_tick_count(); + //logic_timer_tick_count(); + #ifdef TIM_CFG_DEBUG_DISP_EN + g_tim_cfg.count[2]++; + if(g_tim_cfg.count[2]>=1000u) + { + g_tim_cfg.count[2]=0u; + g_tim_cfg.count[3]++; + } + #endif + //random_input_count(); + //TEST1_TOGGLE(); + } +} + +#endif + + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : LPTIM中断函数 +----------------------------------------------------------------------------*/ +void LPTIM_IRQHandler(void) +{ + #ifdef FL_LPTIM16_ENABLE + + /* 定时器溢出时翻转LED0 */ + if(FL_LPTIM16_IsActiveFlag_Update(LPTIM16)) + { + FL_LPTIM16_ClearFlag_Update(LPTIM16); + /* LED0_TOG(); */ + #ifdef TIM_CFG_DEBUG_DISP_EN + g_tim_cfg.count[4]++; + if(g_tim_cfg.count[4]>=5u) + { + g_tim_cfg.count[4]=0u; + g_tim_cfg.count[5]++; + } + #endif + } + #endif + #ifdef FL_LPTIM32_ENABLE + /* 定时器溢出时翻转LED */ + if(FL_LPTIM32_IsEnabledIT_Update(LPTIM32) && FL_LPTIM32_IsActiveFlag_Update(LPTIM32)) + { + /* LED0_TOG(); */ + FL_LPTIM32_ClearFlag_Update(LPTIM32); + #ifdef TIM_CFG_DEBUG_DISP_EN + g_tim_cfg.count[6]++; + if(g_tim_cfg.count[6]>=1000u) + { + g_tim_cfg.count[6]=0u; + g_tim_cfg.count[7]++; + } + #endif + } + #endif +} + + + diff --git a/code_boot_out/qm/bsp/tim_cfg.h b/code_boot_out/qm/bsp/tim_cfg.h new file mode 100644 index 0000000..6759ef7 --- /dev/null +++ b/code_boot_out/qm/bsp/tim_cfg.h @@ -0,0 +1,153 @@ +/** ########################################################################## +** Filename : +** Project : +** Module : +** Processor : +** Version : 1.0 +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20230602- --V1.0-- --mingyea--- --修改-- + +** #########################################################################*/ +#ifndef TIM_CFG_H__ +#define TIM_CFG_H__ + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ +#include "common_types.h" +#include "cpu.h" + +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ +#define TIME_SR_ALLOC() CPU_SR_ALLOC() +#define TIME_CRITICAL_ENTER() ENTER_CRITICAL() +#define TIME_CRITICAL_EXIT() EXIT_CRITICAL() + +/*****************普通定時器*******************/ + +//#define FL_ATIM_ENABLE // ATIM定时器 +#define FL_BSTIM16_ENABLE //BSTIM16定时器 +//#define FL_GPTIM_ENABLE //GPTIM定时器 +//#define FL_GPTIM1_ENABLE //GPTIM定时器 +//#define FL_GPTIM2_ENABLE //GPTIM定时器 +//#define FL_LPTIM16_ENABLE //LPTIM16定时器---主要用做间隙唤醒 +//#define FL_LPTIM32_ENABLE //LPTIM16定时器 + +#define FL_ATIM_PWM_FREQ 1000u //频率 +#define FL_ATIM_PWM_DUTY_VALID 250u //有效占空比 +#define FL_ATIM_PWM_DUTY_INIT 0u //有效占空比--初始值 + +#define FL_GPTIM_PWM_FREQ 1000u //频率 +#define FL_GPTIM_PWM_DUTY_VALID 250u //有效占空比 + +#define FL_GPTIM1_PWM_FREQ 1000u //频率 +#define FL_GPTIM1_PWM_DUTY_VALID 250u //有效占空比 + +#define FL_GPTIM2_PWM_FREQ 1000u //频率 +#define FL_GPTIM2_PWM_DUTY_VALID 250u //有效占空比 + +#define FL_LPT32_PWM_FREQ 3000u //频率 是1k +#define FL_LPT32_PWM_DUTY_VALID 250u //有效占空比 + + +//#define TIM_CFG_DEBUG_DISP_EN //辅助调试 + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- G L O B A L V A R I A B L E S +- only configuration table allowed here,variables are not allowed! +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ +#ifdef FL_ATIM_ENABLE +extern const FL_ATIM_InitTypeDef g_atimer0_Config0 ; +extern const FL_ATIM_OC_InitTypeDef g_atmer0_ch1_InitStructer ; +extern const FL_ATIM_OC_InitTypeDef g_atmer0_ch2_InitStructer ; +extern const FL_ATIM_OC_InitTypeDef g_atmer0_ch3_InitStructer ; +extern const FL_ATIM_OC_InitTypeDef g_atmer0_ch4_InitStructer ; +extern const FL_ATIM_BDTR_InitTypeDef g_atimer0_bdtr_config; +#endif + + + +#ifdef FL_BSTIM16_ENABLE +extern const FL_BSTIM16_InitTypeDef g_TimerBase_InitStruct ; +#endif + + +#ifdef FL_GPTIM_ENABLE +/** + * + */ +extern const FL_GPTIM_InitTypeDef g_gptim_init_cfg ; +extern const FL_GPTIM_OC_InitTypeDef g_gptim_ch1_cfg ; +extern const FL_GPTIM_OC_InitTypeDef g_gptim_ch2_cfg ; +extern const FL_GPTIM_OC_InitTypeDef g_gptim_ch3_cfg ; +extern const FL_GPTIM_OC_InitTypeDef g_gptim_ch4_cfg ; + +#endif + +#ifdef FL_GPTIM1_ENABLE + + +extern const FL_GPTIM_InitTypeDef g_gptim1_init_cfg ; +extern const FL_GPTIM_OC_InitTypeDef g_gptim1_ch1_cfg ; +extern const FL_GPTIM_OC_InitTypeDef g_gptim1_ch2_cfg ; +extern const FL_GPTIM_OC_InitTypeDef g_gptim1_ch3_cfg ; +extern const FL_GPTIM_OC_InitTypeDef g_gptim1_ch4_cfg ; + +#endif + + +extern const FL_GPTIM_InitTypeDef g_gptim2_init_cfg ; +extern const FL_GPTIM_OC_InitTypeDef g_gptim2_ch1_cfg ; +extern const FL_GPTIM_OC_InitTypeDef g_gptim2_ch2_cfg ; +extern const FL_GPTIM_OC_InitTypeDef g_gptim2_ch3_cfg ; +extern const FL_GPTIM_OC_InitTypeDef g_gptim2_ch4_cfg ; + + +#ifdef FL_LPTIM16_ENABLE +extern const FL_LPTIM16_InitTypeDef g_lptim16_cfg_tab ; + +#endif + + + +extern const FL_LPTIM32_InitTypeDef g_lptim32_cfg_tab ; +extern const FL_LPTIM32_OC_InitTypeDef g_lpt32_ch1_cfg ; +extern const FL_LPTIM32_OC_InitTypeDef g_lpt32_ch2_cfg ; +extern const FL_LPTIM32_OC_InitTypeDef g_lpt32_ch3_cfg ; +extern const FL_LPTIM32_OC_InitTypeDef g_lpt32_ch4_cfg ; + + + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ + + + + + + + +#endif /* __TIM_CFG_H__ */ diff --git a/code_boot_out/qm/common/assert.c b/code_boot_out/qm/common/assert.c new file mode 100644 index 0000000..c13d5bd --- /dev/null +++ b/code_boot_out/qm/common/assert.c @@ -0,0 +1,109 @@ +/** ########################################################################## +** Filename : assert.c +** Project : +** Module : +** Processor : +** Version : 1.0 +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20230602- --V1.0-- --mingyea--- --修改-- + +** #########################################################################*/ + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ +#include "common_types.h" + +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ +//#ifdef USE_FULL_ASSERT + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- S T A T I C V A R I A B L E S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- G L O B A L V A R I A B L E S +----------------------------------------------------------------------------*/ +u32 g_assert_line; +u8 *g_assert_file; +u8 g_assert_file_buf[200]; + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ + + +/*lint -efunc(957,assert_failed) */ /* 函數應當具有原型聲明，且原型在函數的定義和調用範圍內都是可見的 */ +/*lint -efunc(818,assert_failed) */ /* (建議)函數原型中的指針參數如果不是用於修改所指向的對像,就應該聲明為指向const的指針MISRA 2004 Rule 16.7 */ +/*--------------------------------------------------------------------------- +|Prototype : void assert_failed(uint8_t* file, uint32_t line) +|Called by : None +|Preconditions : None +|Input parameters : None +|Output parameters : None +|Return value : None +|Description : +----------------------------------------------------------------------------*/ +//void assert_failed(uint8_t* file, uint32_t line) +void assert_failed(void) +{ + /* User can add his own implementation to report the file name and line number, + ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */ + + /*注意要查看變量的值需將宏開啟*/ + + #if 0 + u8 i; + g_assert_line = line; + g_assert_file = file; + for(i=0;i<200;i++) + { + g_assert_file_buf[i] = g_assert_file[i]; + } + g_assert_line = line; + #else + u8 i; + /* Infinite loop */ + /*如果想顯示 line 和 file 必須去掉 while語句; 切換到上面的宏顯示*/ + while (1) + { + #if 0 + g_assert_file = file; + for(i=0u;i<200u;i++) + { + g_assert_file_buf[i] = g_assert_file[i]; + } + g_assert_line = line; + #else + g_assert_line++; + #endif + //for(g_assert_file_buf) + } + #endif +} /* End of function assert_failed*/ + +//#endif + + +/* [] END OF FILE */ diff --git a/code_boot_out/qm/common/assert.h b/code_boot_out/qm/common/assert.h new file mode 100644 index 0000000..7b534de --- /dev/null +++ b/code_boot_out/qm/common/assert.h @@ -0,0 +1,78 @@ +/** ########################################################################## +** Filename : assert.h +** Project : +** Module : +** Processor : +** Version : 1.0 +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20230602- --V1.0-- --mingyea--- --修改-- + +** #########################################################################*/ +#ifndef ASSERT__H +#define ASSERT__H + +/** + * @page misra_violations MISRA-C:2012 violations + * + * @section [global] + * Violates MISRA 2012 Advisory Rule 2.3, Global typedef not referenced. + * status_t is referenced from all drivers. + * + * @section [global] + * Violates MISRA 2012 Advisory Rule 2.5, Local macro not referenced. + * The defined macro is used as include guard. + * + */ + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ +#ifdef USE_FULL_ASSERT + //#define DEVICE_ASSERT(x) ((x) ? (void)0 : (void)printf("[ASSERT]Detect error on %s %d\n", __FILE__, __LINE__) ) + #if 0 + #define assert_param(x) ((x) ? (void)0 : (void)assert_failed(__FILE__, __LINE__) ) + extern void assert_failed(uint8_t* file, uint32_t line); + #else + #define assert_param(x) ((x) ? (void)0 : (void)assert_failed() ) + extern void assert_failed(void); + #endif +#else + #define assert_param(x) ((void)0) +#endif + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- G L O B A L V A R I A B L E S +- only configuration table allowed here,variables are not allowed! +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ + + +#endif /* ASSERT__H */ + +/* [] END OF FILE */ diff --git a/code_boot_out/qm/common/common_cfg.h b/code_boot_out/qm/common/common_cfg.h new file mode 100644 index 0000000..2f1ebc5 --- /dev/null +++ b/code_boot_out/qm/common/common_cfg.h @@ -0,0 +1,124 @@ +/** ########################################################################## +** Filename : common_cfg.h +** Project : +** Module : +** Processor : +** Version : V1.0 +** Compiler : +** Date/Time : +** Abstract : +** Contents : link相关的定义，以及工程配置 +** Note : +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20230602- --V1.0-- --mingyea--- --初版-- + +** #########################################################################*/ +#ifndef COMMON_CFG__H +#define COMMON_CFG__H + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ +#include "common_types.h" + +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ +#define FUNCTION_OPEN 1U +#define FUNCTION_CLOSE 0U + + +#define MCU_GOTO_SLEEP_FUNCTION_ON FUNCTION_CLOSE + + +#ifdef __ICCARM__ + +#if 0 +#define MEMORY_MAP_ROM_FOR_ASIL #pragma location = ".ROM_ASIL" // #pragma location = ".RAM_ASIL" +#define MEMORY_MAP_RAM_FOR_ASIL #pragma location = ".RAM_ASIL" +#else + +#define MEMORY_MAP_ROM_FOR_ASIL //__attribute__((section(".ROM_ASIL"))) // #pragma location = ".RAM_ASIL" +#define MEMORY_MAP_ROM_DATA_FOR_ASIL //__attribute__((section(".ROM_DATA_ASIL"))) // #pragma location = ".ROM_DATA_ASIL" +#define MEMORY_MAP_RAM_FOR_ASIL //__attribute__((section(".RAM_ASIL"))) // #pragma location = ".RAM_ASIL" +#define MEMORY_MAP_ROM_DATA_FOR_UDS __attribute__((section(".ROM_DATA_UDS"))) // #pragma location = ".ROM_DATA_UDS" +#define MEMORY_MAP_ROM_APP_RES __attribute__((section(".ROM_APP_RES"))) // #pragma location = ".ROM_APP_VALID" +#define MEMORY_MAP_ROM_APP_VALID __attribute__((section(".ROM_APP_VALID"))) // #pragma location = ".ROM_APP_VALID1" + +#define ENABLE_STATIC_FOR_ASIL static +#define MEMORY_MAP_RAM_FLAG_NOINIT __attribute__((section(".RAM_FLAG_NOLINT"))) // #pragma location = ".RAM_ASIL" +#define MEMORY_MAP_RAM_FLAG_PROG __attribute__((section(".RAM_FLAG_PROG"))) // #pragma location = ".RAM_FLAG_PROG" +#define MEMORY_MAP_RAM_EEPROM __attribute__((section(".RAM_EEPROM"))) // #pragma location = ".RAM_EEPROM" +#define MEMORY_MAP_RAM_WDOG __attribute__((section(".RAM_WDOG"))) // #pragma location = ".RAM_WDOG" + +#define MEMORY_MAP_FLAG_NO_OPTIME __root //不被優化 + +#endif + +//#define MEMORY_MAP_CONTINUS 1 /**/ +#define LIN_MEMORY_MAP_ENABLE 1 /**/ + +#else + +#define MEMORY_MAP_ROM_FOR_ASIL //__attribute__((section(".ROM_ASIL"))) +#define MEMORY_MAP_ROM_DATA_FOR_ASIL //__attribute__((section(".ROM_DATA_ASIL"))) // #pragma location = ".RAM_ASIL" +#define MEMORY_MAP_RAM_FOR_ASIL //__attribute__((section(".RAM_ASIL"))) +#define MEMORY_MAP_ROM_DATA_FOR_UDS __attribute__((section(".ROM_DATA_UDS"))) // #pragma location = ".ROM_DATA_UDS" +#define MEMORY_MAP_ROM_APP_RES __attribute__((section(".ROM_APP_RES"))) // #pragma location = ".ROM_APP_VALID" +#define MEMORY_MAP_ROM_APP_VALID __attribute__((section(".ROM_APP_VALID"))) // #pragma location = ".ROM_APP_VALID1" + +#define ENABLE_STATIC_FOR_ASIL //注意GCC不能有 static +#define MEMORY_MAP_RAM_FLAG_NOINIT __attribute__((section(".RAM_FLAG_NOLINT"))) // #pragma location = ".RAM_ASIL" +#define MEMORY_MAP_RAM_FLAG_PROG __attribute__((section(".RAM_FLAG_PROG"))) // #pragma location = ".RAM_FLAG_PROG" +#define MEMORY_MAP_RAM_EEPROM __attribute__((section(".RAM_EEPROM"))) // #pragma location = ".RAM_EEPROM" +#define MEMORY_MAP_RAM_WDOG __attribute__((section(".RAM_WDOG"))) // #pragma location = ".RAM_WDOG" + +#define MEMORY_MAP_FLAG_NO_OPTIME __attribute__((used)) //不被優化 + +#endif + + +#define SystemSoftwareReset NVIC_SystemReset + + + +//主任务的时间 +#define APP_TASK_1MS 1 +#define APP_TASK_2MS 2 +#define APP_TASK_5MS 5 +#define APP_TASK_10MS 10 +#define APP_TASK_100MS 100 + + + + +//TO MODIFY 要最後修改 +// +//TO_BE_DELETE +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- G L O B A L V A R I A B L E S +- only configuration table allowed here,variables are not allowed! +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ + + +#endif /* COMMON_CFG__H */ + +/* [] END OF FILE */ \ No newline at end of file diff --git a/code_boot_out/qm/common/common_memory.c b/code_boot_out/qm/common/common_memory.c new file mode 100644 index 0000000..0286c97 --- /dev/null +++ b/code_boot_out/qm/common/common_memory.c @@ -0,0 +1,137 @@ +/** ########################################################################## +** Filename : common_types.h +** Project : +** Module : +** Processor : +** Version : 1.1 +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : 主要用於批量處理數據，如初始化，復制，清除等等 +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20230602- --V1.0-- --mingyea--- --初版-- +** -20231012- --V1.1-- --mingyea--- 删除 common_get_str_length，common_string_compare，common_memory_compare_u16，common_memory_copys_u16 + +** #########################################################################*/ +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ +#include "common_memory.h" +#include "cpu.h" + +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- S T A T I C V A R I A B L E S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- G L O B A L V A R I A B L E S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +|Prototype : void common_memory_copys(void) +|Called by : None +|Preconditions : None +|Input parameters : None +|Output parameters : None +|Return value : None +|Description : u8类型的数据拷贝 +----------------------------------------------------------------------------*/ +void common_memory_copys(u8* dst,const u8* src,u16 length) +{ + u16 i = 0u; + for(i = 0u; i < length; i++) + { + dst[i] = src[i]; + } +} /* End of function common_memory_copys*/ + + +/*--------------------------------------------------------------------------- +|Prototype : void common_memory_clear(u8 *dst , u16 length) +|Called by : None +|Preconditions : None +|Input parameters : None +|Output parameters : None +|Return value : None +|Description : u8类型的数据清零 +----------------------------------------------------------------------------*/ +void common_memory_clear(u8 *dst , u16 length) +{ + u16 i = 0u; + for(i = 0u; i < length; i++) + { + dst[i] = 0u; + } +} /* End of function common_memory_clear*/ + + +/*--------------------------------------------------------------------------- +|Prototype : void common_memory_fill(u8 *dst , u8 value, u16 length) +|Called by : None +|Preconditions : None +|Input parameters : None +|Output parameters : None +|Return value : None +|Description : 将一串数填充为相同的值 +----------------------------------------------------------------------------*/ +void common_memory_fill(u8 *dst , u8 value, u16 length) +{ + u16 i; + for(i = 0u; i < length; i++) + { + dst[i] = value; + } +} /* End of function common_memory_fill*/ + +/*--------------------------------------------------------------------------- +|Prototype : void common_memory_copys_u16(u16* dst,const u16* src,u16 length) +|Called by : None +|Preconditions : None +|Input parameters : None +|Output parameters : None +|Return value : MEMORY_RESULT_DIFFERENT/ MEMORY_RESULT_SAME +|Description : u8类型的两个数组比较 +----------------------------------------------------------------------------*/ +memory_result_t common_memory_compare(const u8 *dst , const u8 *src, u16 length) +{ + u16 i; + + for(i = 0u; i < length; i++) + { + if(dst[i] != src[i]) + { + return MEMORY_RESULT_DIFFERENT; + } + } + + return MEMORY_RESULT_SAME; +} /* End of function common_memory_compare*/ + + + + +/* [] END OF FILE */ diff --git a/code_boot_out/qm/common/common_memory.h b/code_boot_out/qm/common/common_memory.h new file mode 100644 index 0000000..e928ef7 --- /dev/null +++ b/code_boot_out/qm/common/common_memory.h @@ -0,0 +1,67 @@ +/** ########################################################################## +** Filename : common_types.h +** Project : +** Module : +** Processor : +** Version : 1.0 +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : 主要用於批量處理數據，如初始化，復制，清除等等 +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20230602- --V1.0-- --mingyea--- --修改-- + +** #########################################################################*/ +#ifndef COMMON_MEMORY__H +#define COMMON_MEMORY__H + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ +#include "common_types.h" + +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ +typedef enum +{ + MEMORY_RESULT_DIFFERENT = 0U, + MEMORY_RESULT_SAME = 1U +}memory_result_t; + +/*--------------------------------------------------------------------------- +- G L O B A L V A R I A B L E S +- only configuration table allowed here,variables are not allowed! +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ +void common_memory_copys(u8* dst,const u8* src,u16 length); +void common_memory_clear(u8 *dst , u16 length); +void common_memory_fill(u8 *dst , u8 value, u16 length); +memory_result_t common_memory_compare(const u8 *dst , const u8 *src, u16 length); + + + + + +#endif /* COMMON_MEMORY__H */ + +/* [] END OF FILE */ diff --git a/code_boot_out/qm/common/common_types.h b/code_boot_out/qm/common/common_types.h new file mode 100644 index 0000000..2304f09 --- /dev/null +++ b/code_boot_out/qm/common/common_types.h @@ -0,0 +1,264 @@ +/** ########################################################################## +** Filename : common_types.h +** Project : +** Module : +** Processor : +** Version : V1.1 +** Compiler : +** Date/Time : +** Abstract : +** Contents : 类型 +** Note : +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + + +** -20230602- --V1.0-- --mingyea--- --优化-- +** -20231012- --V1.1-- --mingyea--- 去掉对ide的库文件依赖,删除多余的定义 +** #########################################################################*/ +#ifndef COMMON_TYPES__H +#define COMMON_TYPES__H + + +/*--------------------------------各變量類型--------------------------------*/ + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ + + + + +/*#include "stdint_copy.h" */ /*!< standard types definitions */ + +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ +#define __VC volatile const /*!< defines 'read only' permissions */ +#define __I volatile const /*!< defines 'read only' permissions */ +#define __O volatile /*!< defines 'write only' permissions */ +#define __IO volatile /*!< defines 'read / write' permissions */ + + + +#define __VC volatile const /*!< defines 'read only' permissions */ +#define __I volatile const /*!< defines 'read only' permissions */ +#define __O volatile /*!< defines 'write only' permissions */ +#define __IO volatile /*!< defines 'read / write' permissions */ + + +#define COMMON_FALSE 0u +#define COMMON_TRUE 1u + +//#define NULL 0 +#define NULL_POINT 0 +#ifndef NULL_PTR +#define NULL_PTR (void*)0 +#endif + +#define U8_MAX (255) +#define S8_MAX (127) +#define S8_MIN (-128) +#define U16_MAX (65535u) +#define S16_MAX (32767) +#define S16_MIN (-32768) +#define U32_MAX (4294967295uL) +#define S32_MAX (2147483647) +#define S32_MIN (-2147483648uL) + + + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ + +/*!< Signed integer types */ +typedef signed char int8_t; +typedef signed short int16_t; +typedef signed long int32_t; +typedef signed long long int64_t; + +/*!< Unsigned integer types */ +typedef unsigned char uint8_t; +/*STM32芯片和 STM8芯片 調試發現 SHORT 都是16位 */ +typedef unsigned short uint16_t; +/*STM32芯片調試發現 INT 和 LONG 都是32位 ; + 而在STM8時 INT 是16位 */ +typedef unsigned long uint32_t; +typedef unsigned long long uint64_t; + +typedef float float32_t; +typedef double float64_t; +typedef long double float128_t; + +typedef int64_t s64; +typedef int32_t s32; +typedef int16_t s16; +typedef int8_t s8; + +typedef const int64_t sc64; /*!< Read Only */ +typedef const int32_t sc32; /*!< Read Only */ +typedef const int16_t sc16; /*!< Read Only */ +typedef const int8_t sc8; /*!< Read Only */ + +typedef __IO int32_t vs32; +typedef __IO int16_t vs16; +typedef __IO int8_t vs8; + +typedef __I int32_t vsc32; /*!< Read Only */ +typedef __I int16_t vsc16; /*!< Read Only */ +typedef __I int8_t vsc8; /*!< Read Only */ + +typedef uint64_t u64; +typedef uint32_t u32; +typedef uint16_t u16; +typedef uint8_t u8; + +typedef const uint32_t uc32; /*!< Read Only */ +typedef const uint16_t uc16; /*!< Read Only */ +typedef const uint8_t uc8; /*!< Read Only */ + +typedef __IO uint32_t vu32; +typedef __IO uint16_t vu16; +typedef __IO uint8_t vu8; + +typedef __I uint32_t vuc32; /*!< Read Only */ +typedef __I uint16_t vuc16; /*!< Read Only */ +typedef __I uint8_t vuc8; /*!< Read Only */ + +typedef uint16_t size_n_t; + +#if 0 +typedef float32_t f32; +typedef float64_t f64; +typedef float128_t f128; + +typedef const float32_t fc32; +typedef const float64_t fc64; +typedef const float128_t fc128; + +typedef __IO float32_t vf32; +typedef __IO float64_t vf64; +typedef __IO float128_t vf128; + + +typedef __I float32_t vfc32; +typedef __I float64_t vfc64; +typedef __I float128_t vfc128; +#endif + + +typedef enum +{ + RESET = 0, + SET = !RESET +/*} FlagStatus, ITStatus,BitStatus, BitAction;*/ +} FlagStatus, ITStatus,BitStatus; + +typedef enum +{ + DISABLE = 0, + ENABLE = !DISABLE +} FunctionalState; + + + + +//以后不用 TRUE和FALSE +//如果是bool型，就用 bool_m_t + +typedef enum +{ + FALSE_M = 0u, /* 假 */ + TRUE_M = !FALSE_M /* 真 */ +}bool_m_t; /* 布爾運算 */ + + +typedef enum +{ + FALSE = 0u, /* 假 */ + TRUE = !FALSE /* 真 */ +}bool; /* 布爾運算 */ + + + +/*操作的結果*/ +typedef enum +{ + FAILED = 0u, /* 失敗 */ + RIGHT = !FAILED /* 成功 */ +}operate_status_e; + + + + + + + + +/*********符號類型的值範圍************/ + + + + + + + + + + + + + + + + + + + + + + + + + + + +/************************************以上是枚舉標誌定義***********************************/ + + + +/************************************基本運算的公用函數宏***********************************/ + + + + + + + + + + + +/*--------------------------------------------------------------------------- +- G L O B A L V A R I A B L E S +- only configuration table allowed here,variables are not allowed! +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ + + + +#endif /* COMMON_TYPES__H */ + +/* [] END OF FILE */ diff --git a/code_boot_out/qm/common/error.h b/code_boot_out/qm/common/error.h new file mode 100644 index 0000000..1a355a1 --- /dev/null +++ b/code_boot_out/qm/common/error.h @@ -0,0 +1,130 @@ +/** ########################################################################## +** Filename : error.h +** Project : +** Module : +** Processor : +** Version : V1.0 +** Compiler : +** Date/Time : +** Abstract : +** Contents : 错误机制的提示 +** Note : +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20140313- --V0.0-- --mingyea--- --初版-- +** -20230602- --V1.0-- --mingyea--- --增加err_flag_e 负数定义宏-- + +** #########################################################################*/ +#ifndef ERROR__H +#define ERROR__H + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ +//#define ERROR_NEGATIVE + +#ifdef ERROR_NEGATIVE +typedef signed short err_flag_e; + +#define ERR_OK 0 /* OK */ +#define ERR_SPEED (-1) /* This device does not work in the active speed mode. */ +#define ERR_RANGE (-2) /* Parameter out of range. */ +#define ERR_VALUE (-3) /* Parameter of incorrect value. */ +#define ERR_OVERFLOW (-4) /* Timer overflow. */ +#define ERR_MATH (-5) /* Overflow during evaluation. */ +#define ERR_ENABLED (-6) /* Device is enabled. */ +#define ERR_DISABLED (-7) /* Device is disabled. */ +#define ERR_BUSY (-8) /* Device is busy. */ +#define ERR_ID_NOEXIST (-9) /* ID not exist . */ +#define ERR_ID_INVALID (-10) /* ID is invalid . */ +#define ERR_NOTAVAIL (-11) /* Requested value or method not available. */ +#define ERR_RXEMPTY (-12) /* No data in receiver. */ +#define ERR_TXFULL (-13) /* Transmitter is full. */ +#define ERR_BUSOFF (-14) /* Bus not available. */ +#define ERR_OVERRUN (-15) /* Overrun error is detected. */ +#define ERR_FRAMING (-16) /* Framing error is detected. */ +#define ERR_PARITY (-17) /* Parity error is detected. */ +#define ERR_NOISE (-18) /* Noise error is detected. */ +#define ERR_IDLE (-19) /* Idle error is detected. */ +#define ERR_FAULT (-20) /* Fault error is detected. */ +#define ERR_BREAK (-21) /* Break char is received during communication. */ +#define ERR_CRC (-22) /* CRC error is detected. */ +#define ERR_ARBITR (-23) /* A node losts arbitration. This error occurs if two nodes start transmission at the same time. */ +#define ERR_PROTECT (-24) /* Protection error is detected. */ +#define ERR_UNDERFLOW (-25) /* Underflow error is detected. */ +#define ERR_UNDERRUN (-26) /* Underrun error is detected. */ +#define ERR_COMMON (-27) /* Common error of a device. */ +#define ERR_LINSYNC (-28) /* LIN synchronization error is detected. */ +#define ERR_FAILED (-29) /* Requested functionality or process failed. */ + +#else +/*总的错误提示 */ +typedef enum +{ + ERR_OK= 0, /* OK */ + ERR_SPEED, /* This device does not work in the active speed mode. */ + ERR_RANGE, /* Parameter out of range. */ + ERR_VALUE, /* Parameter of incorrect value. */ + ERR_OVERFLOW , /* Timer overflow. */ + ERR_MATH , /* Overflow during evaluation. */ + ERR_ENABLED , /* Device is enabled. */ + ERR_DISABLED , /* Device is disabled. */ + ERR_BUSY , /* Device is busy. */ + ERR_ID_NOEXIST, /* ID not exist . */ + ERR_ID_INVALID, /* ID is invalid . */ + ERR_NOTAVAIL, /* Requested value or method not available. */ + ERR_RXEMPTY , /* No data in receiver. */ + ERR_TXFULL , /* Transmitter is full. */ + ERR_BUSOFF , /* Bus not available. */ + ERR_OVERRUN , /* Overrun error is detected. */ + ERR_FRAMING , /* Framing error is detected. */ + ERR_PARITY , /* Parity error is detected. */ + ERR_NOISE , /* Noise error is detected. */ + ERR_IDLE , /* Idle error is detected. */ + ERR_FAULT , /* Fault error is detected. */ + ERR_BREAK , /* Break char is received during communication. */ + ERR_CRC , /* CRC error is detected. */ + ERR_ARBITR , /* A node losts arbitration. This error occurs if two nodes start transmission at the same time. */ + ERR_PROTECT, /* Protection error is detected. */ + ERR_UNDERFLOW ,/* Underflow error is detected. */ + ERR_UNDERRUN ,/* Underrun error is detected. */ + ERR_COMMON ,/* Common error of a device. */ + ERR_LINSYNC ,/* LIN synchronization error is detected. */ + ERR_FAILED ,/* Requested functionality or process failed. */ + ERR_QFULL /* Queue is full. */ +}err_flag_e; + +#endif + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- G L O B A L V A R I A B L E S +- only configuration table allowed here,variables are not allowed! +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ + + + +#endif /* ERROR__H */ + +/* [] END OF FILE */ + diff --git a/code_boot_out/qm/common/logic_timer.c b/code_boot_out/qm/common/logic_timer.c new file mode 100644 index 0000000..75a04fc --- /dev/null +++ b/code_boot_out/qm/common/logic_timer.c @@ -0,0 +1,262 @@ +/** ########################################################################## +** Filename : logic_time.c +** Project : +** Module : +** Processor : +** Version : 1.0 +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20191106- --V01-- --LYJ--- --初版-- +** -20230602- --V1.0-- --mingyea--- --修改-- + +** #########################################################################*/ + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ +#include "common_types.h" +#include "logic_timer.h" +#include "cpu.h" + +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ +#define LOGICTIME_CONTEXT_ENABLE 1u /*隊列操作時開啟上下文切換*/ + +//注意，上下文切换，要在单片机的cpu.h中定义 +#ifdef LOGICTIME_CONTEXT_ENABLE +#define LOGICTIME_SR_ALLOC() CPU_SR_ALLOC() +#define LOGICTIME_CRITICAL_ENTER() ENTER_CRITICAL() +#define LOGICTIME_CRITICAL_EXIT() EXIT_CRITICAL() +#else +#define LOGICTIME_SR_ALLOC() +#define LOGICTIME_CRITICAL_ENTER() +#define LOGICTIME_CRITICAL_EXIT() +#endif + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- S T A T I C V A R I A B L E S +----------------------------------------------------------------------------*/ +static logic_timer_t g_logic_time_tick; + +/*--------------------------------------------------------------------------- +- G L O B A L V A R I A B L E S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +|Prototype : void logic_timer_tick_init(void) +|Called by : None +|Preconditions : None +|Input parameters : None +|Output parameters : None +|Return value : None +|Description : 初始化定時器 +----------------------------------------------------------------------------*/ +void logic_timer_tick_init (void) +{ + LOGICTIME_SR_ALLOC(); /*PCLINT_ERROS*/ /*lint !e717 */ /*do while*/ /*PRQA S 2981*/ + LOGICTIME_CRITICAL_ENTER(); /*PCLINT_ERROS*/ /*lint !e717 */ /*do while*/ + g_logic_time_tick = 0u; + LOGICTIME_CRITICAL_EXIT(); /*PCLINT_ERROS*/ /*lint !e717 */ /*do while*/ +} /* End of function logic_timer_tick_init*/ + + +/*--------------------------------------------------------------------------- +|Prototype : void logic_timer_tick_count(void) +|Called by : None +|Preconditions : None +|Input parameters : None +|Output parameters : None +|Return value : None +|Description : 定時器中斷處理; 計數; +----------------------------------------------------------------------------*/ +void logic_timer_tick_count(void) +{ + LOGICTIME_SR_ALLOC(); /*PCLINT_ERROS*/ /*lint !e717 */ /*do while*/ /*PRQA S 2981*/ + LOGICTIME_CRITICAL_ENTER(); /*PCLINT_ERROS*/ /*lint !e717 */ /*do while*/ + g_logic_time_tick ++; /* Increment the current time */ + LOGICTIME_CRITICAL_EXIT(); /*PCLINT_ERROS*/ /*lint !e717 */ /*do while*/ +} /* End of function logic_timer_tick_count*/ + + +/*--------------------------------------------------------------------------- +|Prototype : void logic_timer_get_tick(void) +|Called by : None +|Preconditions : None +|Input parameters : None +|Output parameters : None +|Return value : None +|Description : 读取tick +----------------------------------------------------------------------------*/ +logic_timer_t logic_timer_get_tick(void) +{ + logic_timer_t tmp; + LOGICTIME_SR_ALLOC(); /*PCLINT_ERROS*/ /*lint !e717 */ /*do while*/ /*PRQA S 2981*/ + LOGICTIME_CRITICAL_ENTER(); /*PCLINT_ERROS*/ /*lint !e717 */ /*do while*/ + tmp = g_logic_time_tick; /* Increment the current time */ + LOGICTIME_CRITICAL_EXIT(); /*PCLINT_ERROS*/ /*lint !e717 */ /*do while*/ + return tmp ; /* Increment the current time */ +} /* End of function logic_timer_get_tick*/ + + + +/*--------------------------------------------------------------------------- +|Prototype : void logic_timer_start(logic_timer_s* delay_cb, void (*p_fun)(void),logic_timer_t delay_tick) +|Called by : None +|Preconditions : None +|Input parameters : None +|Output parameters : None +|Return value : None +|Description : 启动逻辑定时器/延时 +----------------------------------------------------------------------------*/ +void logic_timer_start(logic_timer_s* delay_cb, void (*p_fun)(void),logic_timer_t delay_tick) +{ + delay_cb->current_time = logic_timer_get_tick(); + delay_cb->delay_time = delay_tick; + delay_cb->p_func = p_fun; + delay_cb->state = (u8)LOGIC_TIMER_FALSE; + /*delay_cb->abort_en = LOGIC_TIMER_FALSE;*/ +} /* End of function logic_timer_start*/ + + +/*--------------------------------------------------------------------------- +|Prototype : u8 logic_timer_out(logic_timer_s* delay_cb) +|Called by : None +|Preconditions : None +|Input parameters : None +|Output parameters : None +|Return value : None +|Description : 判断超时 +----------------------------------------------------------------------------*/ +u8 logic_timer_out(logic_timer_s* delay_cb) +{ + u8 l_result=LOGIC_TIMER_FALSE; + /* + if(delay_cb->abort_en) + return TIME_ABORT; + */ + if(delay_cb->state == (u8)LOGIC_TIMER_FALSE) + { + delay_cb->get_offset_time = logic_timer_get_tick() - delay_cb->current_time; + if ((delay_cb->get_offset_time) >= delay_cb->delay_time) + { + if(delay_cb->p_func != (void*)NULL_POINT) + { + delay_cb->p_func(); + } + logic_timer_abort(delay_cb); + l_result = LOGIC_TIMER_TRUE; + /*return LOGIC_TIMER_TRUE;*/ + } + else + { + + } + } + else + { + } + //return delay_cb->state; /*return TIME_RUNNING;*/ + return l_result; /*return TIME_RUNNING;*/ +} /* End of function logic_timer_out*/ + +/*--------------------------------------------------------------------------- +|Prototype : void logic_timer_abort(logic_timer_s *delay_cb) +|Called by : None +|Preconditions : None +|Input parameters : None +|Output parameters : None +|Return value : None +|Description : 忽略 +----------------------------------------------------------------------------*/ +void logic_timer_abort(logic_timer_s *delay_cb) +{ + /*delay_cb->abort_en = LOGIC_TIMER_TRUE;*/ + delay_cb->p_func = (void*)NULL_POINT; + delay_cb->state = (u8)LOGIC_TIMER_TRUE; +} /* End of function logic_timer_abort*/ + +#if 0 +/*--------------------------------------------------------------------------- +|Prototype : void logic_timer_tick_start(logic_timer_t *tick_counter, logic_timer_t tick_counts) +|Called by : None +|Preconditions : None +|Input parameters : None +|Output parameters : None +|Return value : None +|Description : 没什么用 +----------------------------------------------------------------------------*/ +void logic_timer_tick_start(logic_timer_t *tick_counter, logic_timer_t tick_counts) +{ + *tick_counter = tick_counts; +} /* End of function logic_timer_tick_start*/ + + +/*--------------------------------------------------------------------------- +|Prototype : u8 logic_timer_tick_time_out(logic_timer_t *tick_counter) +|Called by : None +|Preconditions : None +|Input parameters : None +|Output parameters : None +|Return value : None +|Description : 没什么用 +----------------------------------------------------------------------------*/ +u8 logic_timer_tick_time_out(logic_timer_t *tick_counter) +{ + u8 l_result; + + if(*tick_counter !=0u) + { + (*tick_counter)--; + l_result = LOGIC_TIMER_FALSE; /*PRQA S 4420*/ + } + else + { + l_result = LOGIC_TIMER_FALSE; /*PRQA S 4420*/ + } + + return l_result; +} /* End of function logic_timer_tick_time_out*/ + + + +/*--------------------------------------------------------------------------- +|Prototype : void logic_timer_tick_abort(logic_timer_t* tick_counter) +|Called by : None +|Preconditions : None +|Input parameters : None +|Output parameters : None +|Return value : None +|Description : 没什么用 +----------------------------------------------------------------------------*/ +void logic_timer_tick_abort(logic_timer_t* tick_counter) +{ + *tick_counter = 0u; +} /* End of function logic_timer_tick_abort*/ + +#endif + + +/* [] END OF FILE */ diff --git a/code_boot_out/qm/common/logic_timer.h b/code_boot_out/qm/common/logic_timer.h new file mode 100644 index 0000000..c83baa3 --- /dev/null +++ b/code_boot_out/qm/common/logic_timer.h @@ -0,0 +1,98 @@ +/** ########################################################################## +** Filename : logic_timer.h +** Project : +** Module : +** Processor : +** Version : 1.0 +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20191106- --V01-- --LYJ--- --初版-- +** -20230602- --V1.0-- --mingyea--- --修改-- + +** #########################################################################*/ +#ifndef LOGIC_TIMER__H +#define LOGIC_TIMER__H + +/*lint -e749 */ /* 枚舉 not referenced*/ +/*lint -e750 */ /* 宏 not referenced*/ +/*lint -e751 */ /* 變量 not referenced*/ +/*lint -e752 */ /* 函數 not referenced*/ +/*lint -e753 */ /* 枚舉 not referenced*/ +/*lint -e754 */ /* 結構體成員 not referenced*/ + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ +#include "common_types.h" +#include "common_cfg.h" + +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ +#define LOGIC_TIMER_STATUS_STOP 0u +#define LOGIC_TIMER_STATUS_RUNNING 1u +#define LOGIC_TIMER_STATUS_DELETE 2u + +#define LOGIC_TIMER_FALSE 0u +#define LOGIC_TIMER_TRUE 1u + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ +typedef u16 logic_timer_t; + +typedef struct +{ + logic_timer_t get_offset_time; + logic_timer_t current_time; + logic_timer_t delay_time; + u8 state; + /* bool_t abort_en;*/ + void (*p_func)(void) ; +}logic_timer_s; + +/*--------------------------------------------------------------------------- +- G L O B A L V A R I A B L E S +- only configuration table allowed here,variables are not allowed! +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ + +/* 時間以邏輯定時器週期為基準*/ +void logic_timer_start(logic_timer_s* delay_cb, void (*p_fun)(void),logic_timer_t delay_tick); + +/* 超時返回 TRUE, 否則返回FALSE;*/ +u8 logic_timer_out(logic_timer_s* delay_cb); + +void logic_timer_abort(logic_timer_s* delay_cb); + +/* 時間以被調的任務週期為基準, tick_counts 倍 , 不適用於任務週期不確定的任務調用*/ +void logic_timer_tick_start(logic_timer_t *tick_counter, logic_timer_t tick_counts); +u8 logic_timer_tick_time_out(logic_timer_t *tick_counter); +void logic_timer_tick_abort(logic_timer_t *tick_counter); + + +void logic_timer_tick_init (void); +void logic_timer_tick_count(void); +logic_timer_t logic_timer_get_tick(void); + + +#endif /* LOGIC_TIMER__H */ + +/* [] END OF FILE */ diff --git a/code_boot_out/qm/common/queue_entity.c b/code_boot_out/qm/common/queue_entity.c new file mode 100644 index 0000000..25b21dd --- /dev/null +++ b/code_boot_out/qm/common/queue_entity.c @@ -0,0 +1,795 @@ +/** ########################################################################## +** Filename : queue_entity.c +** Project : +** Module : +** Processor : +** Version : 1.2 +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : 消息隊列 + 順序循環消息隊列 ---- 溢出丟棄 + 約定:1.隊列尾指針為實際末尾無素的下一位置. 2.浪費一個元素空間,以"隊列頭指 + 針在隊列尾指針的下一位置(指環狀的下一位置)上作為隊列呈"滿"狀態的標誌. + seq為空循環隊列的判定條件為:頭尾重合 seq.front==seq.rear + seq為滿循環隊列的判定條件為:隊尾趕上隊頭 (seq.rear+1)%MAXSIZE==seq.front + 注: 申請的隊列空間,buf至少2個. + 注: 定義隊列緩存時;可以多加一個地址緩存;但是記住在調用queue_init函數時;參數length的值就是隊列緩存大小值; +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20230602- --V1.2-- --mingyea--- --修改-- + +** #########################################################################*/ + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ +#include "common_types.h" +#include "queue_entity.h" + +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- S T A T I C V A R I A B L E S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- G L O B A L V A R I A B L E S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +|Prototype : void queue_init(sequential_queue_s *seq, sequential_queue_elem *pdata, u8 length , u8 unit_sizes) +|Called by : +|Preconditions : +|Input parameters : seq : 順序隊列；pdata 隊列元素的數據; length隊列長度,unit_sizes 元素的字節長度; +|Output parameters : +|Return value : +|Description : 初始化一個空順序隊列 +----------------------------------------------------------------------------*/ +void queue_init(sequential_queue_s *seq, sequential_queue_elem *pdata, u8 length , u8 unit_sizes) +{ + seq->front = 0u; + seq->rear=0u; + seq->base = pdata; + seq->length = length; + seq->unit_sizes = unit_sizes; +} /* End of function queue_init*/ + + +/*--------------------------------------------------------------------------- +|Prototype : void queue_clear(sequential_queue_s *seq) +|Called by : +|Preconditions : +|Input parameters : seq : 順序隊列； +|Output parameters : +|Return value : +|Description : 清空隊列 +----------------------------------------------------------------------------*/ +void queue_clear(sequential_queue_s *seq) +{ + QUEUE_CPU_SR_ALLOC(); /*PRQA S 2981*/ + QUEUE_CPU_CRITICAL_ENTER(); + + seq->front = 0u; + seq->rear=0u; + + QUEUE_CPU_CRITICAL_EXIT(); +} /* End of function queue_clear*/ + + +/*--------------------------------------------------------------------------- +|Prototype : QUEUE_RIGHT_FLAG_E queue_get_empty(sequential_queue_s seq) +|Called by : +|Preconditions : +|Input parameters : seq : 順序隊列； +|Output parameters : +|Return value : QUEUE_RIGHT_FLAG_E: 若隊列seq為空隊列，則返回ture 否則返回false +|Description : 判斷隊列是否為空; +----------------------------------------------------------------------------*/ +QUEUE_RIGHT_FLAG_E queue_get_empty(sequential_queue_s seq) +{ + + QUEUE_RIGHT_FLAG_E l_resutl; + + QUEUE_CPU_SR_ALLOC(); /*PRQA S 2981*/ + QUEUE_CPU_CRITICAL_ENTER(); + + /*隊列空的標誌*/ + if(seq.front==seq.rear) + { + l_resutl = QUEUE_TRUE; + } + else + { + l_resutl = QUEUE_FALSE; + } + + QUEUE_CPU_CRITICAL_EXIT(); + + return l_resutl; +} /* End of function queue_get_empty*/ + + +/*--------------------------------------------------------------------------- +|Prototype : u16 queue_get_length(sequential_queue_s seq) +|Called by : +|Preconditions : +|Input parameters : seq : 順序隊列； +|Output parameters : +|Return value : 長度數目 +|Description : 求出隊列不為空元素的數目; +----------------------------------------------------------------------------*/ + u16 queue_get_length(sequential_queue_s seq) +{ + + #ifdef QUEUE_MOD_ENABLE + u16 length = (seq.length + seq.rear) - seq.front ; + QUEUE_CPU_SR_ALLOC(); /*PRQA S 2981*/ + QUEUE_CPU_CRITICAL_ENTER(); + length %= seq.length; + #else + u16 length ; + QUEUE_CPU_SR_ALLOC(); /*PRQA S 2981*/ + QUEUE_CPU_CRITICAL_ENTER(); + + if( seq.rear >= seq.front) + { + length = seq.rear - seq.front; + } + else + { + #if 0 + length = seq.length + seq.rear - seq.front; + #else + length = seq.length + seq.rear; + length -= seq.front; + #endif + } + #endif + + QUEUE_CPU_CRITICAL_EXIT(); + + return length; +} /* End of function queue_get_length*/ + +/*--------------------------------------------------------------------------- +|Prototype : QUEUE_OPERATE_FLAG_E queue_get_head(sequential_queue_s *seq,sequential_queue_elem *element) +|Called by : +|Preconditions : +|Input parameters : seq : 順序隊列； +|Output parameters : element: 將頭元素數據傳給外部的變量; +|Return value : 是否操作成功 +|Description : 若隊列不為空，則用e返回seq的隊頭元素 +----------------------------------------------------------------------------*/ +QUEUE_OPERATE_FLAG_E queue_get_head(sequential_queue_s *seq,sequential_queue_elem *element) +{ + + sequential_queue_elem *pdata; + u8 j; + QUEUE_OPERATE_FLAG_E l_resutl = QUEUE_OK; + + QUEUE_CPU_SR_ALLOC(); /*PRQA S 2981*/ + QUEUE_CPU_CRITICAL_ENTER(); + + if(seq->front == seq->rear) + { + l_resutl = QUEUE_ERRO; + } + + if( l_resutl == QUEUE_OK) + { + + /* 將隊頭元素賦值給e */ + #ifdef QUEUE_MOD_ENABLE + pdata = seq->base + ( (seq->front%seq->length) * seq->unit_sizes) ; + #else + pdata = seq->base + ((seq->front) * seq->unit_sizes) ; + #endif + + for(j=0u;junit_sizes;j++) + { + element[j] = *pdata; + /* 該語句刪除隊列元素; */ + /* *pdata = 0;*/ + pdata += sizeof(sequential_queue_elem); + } + + } + QUEUE_CPU_CRITICAL_EXIT(); + + return l_resutl; + +} /* End of function queue_get_head*/ + +/*--------------------------------------------------------------------------- +|Prototype : QUEUE_OPERATE_FLAG_E queue_add_element(sequential_queue_s *seq,const sequential_queue_elem *element) +|Called by : +|Preconditions : +|Input parameters : seq : 順序隊列； +|Output parameters : element: 將頭元素數據傳給外部的變量; +|Return value : 是否操作成功 +|Description : 若隊列未滿，則插入元素e為seq新的隊尾元素 +----------------------------------------------------------------------------*/ +/*lint -efunc(818,queue_add_element) */ /*（建議）16.7 函數的指針參數 如果不是用來修改的話，建議聲明指向 const 類型*/ +QUEUE_OPERATE_FLAG_E queue_add_element(sequential_queue_s *seq,const sequential_queue_elem *element) +{ + + sequential_queue_elem *pdata; + u8 i; + QUEUE_OPERATE_FLAG_E l_resutl= QUEUE_OK; + + #ifdef QUEUE_MOD_ENABLE + #else + u16 tmp_rear ; + #endif + + QUEUE_CPU_SR_ALLOC(); /*PRQA S 2981*/ + QUEUE_CPU_CRITICAL_ENTER(); + + #ifdef QUEUE_MOD_ENABLE + /* 隊列滿的標誌 */ + if( ((seq->rear+1u)%seq->length) == seq->front) + #else + tmp_rear = seq->rear + 1u; + if( tmp_rear >= seq->length) + { + tmp_rear = 0u; + } + if(tmp_rear == seq->front) + #endif + { + l_resutl = QUEUE_ERRO; + + } + + if( l_resutl == QUEUE_OK) + { + + /*將元素e賦值給隊尾*/ + #ifdef QUEUE_MOD_ENABLE + pdata = seq->base + ( (seq->rear%seq->length) * seq->unit_sizes) ; + #else + pdata = seq->base + ((seq->rear) * seq->unit_sizes) ; + #endif + + for(i=0u;iunit_sizes;i++) + { + *pdata = element[i]; + pdata += sizeof(sequential_queue_elem); + } + + /*seq->base[seq->rear%seq->length]=element;*/ + + /* rear指針向後移一位，若到最後就轉到 數組頭部*/ + + #ifdef QUEUE_MOD_ENABLE + + seq->rear=(seq->rear+1u)%seq->length; + + #else + + seq->rear++; + if( seq->rear >= seq->length) + { + seq->rear = 0u; + } + + #endif + + + + } + + QUEUE_CPU_CRITICAL_EXIT(); + + return l_resutl; + +} /* End of function queue_add_element*/ + + +/*--------------------------------------------------------------------------- +|Prototype : QUEUE_OPERATE_FLAG_E queue_del_element(sequential_queue_s *seq,sequential_queue_elem *element) +|Called by : +|Preconditions : +|Input parameters : seq : 順序隊列； +|Output parameters : element: 將頭元素數據傳給外部的變量; +|Return value : 是否操作成功 +|Description : 若隊列未滿，則刪除元素e為seq新的隊尾元素 +----------------------------------------------------------------------------*/ +QUEUE_OPERATE_FLAG_E queue_del_element(sequential_queue_s *seq,sequential_queue_elem *element) +{ + QUEUE_OPERATE_FLAG_E l_resutl= QUEUE_OK; + sequential_queue_elem *pdata; + u8 i; + + QUEUE_CPU_SR_ALLOC(); /*PRQA S 2981*/ + QUEUE_CPU_CRITICAL_ENTER(); + + + /* 隊列空的判斷 */ + if( seq->rear == seq->front) + { + l_resutl = QUEUE_ERRO; + } + + if( l_resutl == QUEUE_OK) + { + + /* 將隊頭元素賦值給e */ + #ifdef QUEUE_MOD_ENABLE + pdata = seq->base + ( (seq->front%seq->length) * seq->unit_sizes) ; + #else + pdata = seq->base + ((seq->front) * seq->unit_sizes ); + #endif + + for(i=0u;iunit_sizes;i++) + { + element[i] = *pdata; + /* 該語句刪除隊列元素; */ + *pdata = 0u; + pdata += sizeof(sequential_queue_elem); + } + /* *element = seq->base[seq->front]; */ + + /* 該語句刪除隊列元素; */ + /*seq->base[seq->front] = 0; */ + + #ifdef QUEUE_MOD_ENABLE + + /* front 指針向後移一位置 */ + seq->front=(seq->front+1u)%seq->length; + + #else + + seq->front++; + if( seq->front >= seq->length) + { + seq->front = 0u; + } + + #endif + + + } + + QUEUE_CPU_CRITICAL_EXIT(); + + return l_resutl; + +} /* End of function queue_del_element*/ + + +#if 0 +/*--------------------------------------------------------------------------- +|Prototype : QUEUE_OPERATE_FLAG_E queue_del_one_element(sequential_queue_s *seq,u16 i,sequential_queue_elem *element) +|Called by : +|Preconditions : +|Input parameters : seq : 順序隊列； +|Output parameters : element: 將頭元素數據傳給外部的變量; +|Return value : 是否操作成功 +|Description : 若隊列不空，則刪除Q中的某一個元素 +----------------------------------------------------------------------------*/ +QUEUE_OPERATE_FLAG_E queue_del_one_element(sequential_queue_s *seq,u16 i,sequential_queue_elem *element) +{ + QUEUE_OPERATE_FLAG_E l_resutl= QUEUE_OK; + sequential_queue_elem *pdata; + u8 j; + #ifdef QUEUE_MOD_ENABLE + + #else + u16 tmp_i; + #endif + + QUEUE_CPU_SR_ALLOC(); /*PRQA S 2981*/ + QUEUE_CPU_CRITICAL_ENTER(); + + + /* 隊列空的判斷 */ + if( seq->rear == seq->front) + { + l_resutl = QUEUE_ERRO; + } + + + if( l_resutl == QUEUE_OK) + { + + l_resutl = QUEUE_ERRO; + + #if 0 + /* 將隊頭元素賦值給e */ + *element = seq->base[i%seq->length]; + /* 該語句刪除隊列元素; */ + seq->base[i%seq->length] = 0; + #else + + /* 將隊頭元素賦值給e */ + #ifdef QUEUE_MOD_ENABLE + + pdata = seq->base + ( (i%seq->length) * seq->unit_sizes ) ; + + #else + + if( i < seq->length) + { + tmp_i = i; + } + else + { + tmp_i = i - seq->length ; + + } + + pdata = seq->base + (tmp_i * seq->unit_sizes ); + + #endif + + + for(j=0u;junit_sizes;j++) + { + element[j] = *pdata; + /* 該語句刪除隊列元素; */ + *pdata = 0u; + pdata += sizeof(sequential_queue_elem); + } + + #endif + + + + + #ifdef QUEUE_MOD_ENABLE + + if( (seq->front%seq->length) == (i%seq->length) ) + + #else + + /* 如果要刪除的是隊頭 */ + if( seq->front == tmp_i ) + + #endif + + { + + #ifdef QUEUE_MOD_ENABLE + + seq->front = ( seq->front + 1u)%seq->length; + + #else + + /* front 指針向後移一位置 */ + seq->front++; + if( seq->front >= seq->length) + { + seq->front = 0u; + } + + #endif + + l_resutl = QUEUE_OK; + + + } + + if( l_resutl == QUEUE_ERRO) + { + + /* 如果要刪除的是隊尾 */ + #ifdef QUEUE_MOD_ENABLE + if( ( ( (seq->rear + seq->length) -1u) %seq->length) == (i%seq->length) ) + #else + tmp_i++; + if( tmp_i >= seq->length) + { + tmp_i = 0u; + } + if( seq->rear == tmp_i ) + #endif + { + + #ifdef QUEUE_MOD_ENABLE + + /* rear 指針向前移一位置 */ + seq->rear = ( (seq->rear + seq->length) -1u) %seq->length; + + #else + + if( seq->rear >0u ) + { + seq->rear--; + } + else + { + seq->rear = seq->length -1u; + } + + #endif + + l_resutl = QUEUE_OK; + + } + } + + /*lint -e(838) */ /*局部變量只作臨界交換用;所以提示沒作用*/ + /* l_resutl = QUEUE_OK; */ + + + } + + + QUEUE_CPU_CRITICAL_EXIT(); + + return l_resutl; + + +} /* End of function queue_del_one_element*/ + + + +/*--------------------------------------------------------------------------- +|Prototype : QUEUE_OPERATE_FLAG_E queue_del_one_element_by_flag(sequential_queue_s *seq,u16 i,sequential_queue_elem *element,QUEUE_DEL_FLAG_E fdo) +|Called by : +|Preconditions : +|Input parameters : seq : 順序隊列；i表示元素地址; fdo 刪除的方法 +|Output parameters : element: 將頭元素數據傳給外部的變量; +|Return value : 是否操作成功 +|Description : 若隊列不空，則刪除Q中的某一個元素 +----------------------------------------------------------------------------*/ +QUEUE_OPERATE_FLAG_E queue_del_one_element_by_flag(sequential_queue_s *seq,u16 i,sequential_queue_elem *element,QUEUE_DEL_FLAG_E fdo) +{ + QUEUE_OPERATE_FLAG_E l_resutl= QUEUE_OK; + sequential_queue_elem *pdata; + u8 j; + u8 flag_del = 0u; + + #ifdef QUEUE_MOD_ENABLE + + #else + u16 tmp_i; + #endif + + QUEUE_CPU_SR_ALLOC(); /*PRQA S 2981*/ + QUEUE_CPU_CRITICAL_ENTER(); + + + + /* 隊列空的判斷 */ + if( seq->rear == seq->front) + { + *element = 0u; + + /* 開啟總中斷 */ + l_resutl = QUEUE_ERRO; + + } + + if( l_resutl ==QUEUE_OK) + { + + /* 複製元素*/ + #ifdef QUEUE_MOD_ENABLE + + pdata = seq->base + ( (i%seq->length) * seq->unit_sizes ); + + #else + + if( i < seq->length) + { + tmp_i = i; + } + else + { + tmp_i = i - seq->length ; + } + + pdata = seq->base + (tmp_i * seq->unit_sizes) ; + + #endif + + for(j=0u;junit_sizes;j++) + { + element[j] = *pdata; + + /* 該語句刪除隊列元素; */ + if(fdo == QUEUE_DEL) + { + *pdata = 0u; + } + else if((fdo == QUEUE_MINUS)&& (j==0u)) + { + if(*pdata != 0u) + { + *pdata = *pdata - 1u; + /*重新運行的次數被清為0時；將隊列元素刪除*/ + if( *pdata == 0u) + { + flag_del = 1u; + } + } + } + else /*PRQA S 2013*/ + { + + } + + pdata += sizeof(sequential_queue_elem); + + } + + l_resutl = QUEUE_ERRO; + /*滿足刪除隊列的標誌*/ + if( (fdo == QUEUE_DEL) || (flag_del ==1u) ) + { + + #ifdef QUEUE_MOD_ENABLE + /* 如果要刪除的是隊頭 */ + if( (seq->front%seq->length) == (i%seq->length) ) + #else + if( seq->front == tmp_i ) + #endif + { + /* front 指針向後移一位置 */ + + #ifdef QUEUE_MOD_ENABLE + + seq->front = ( seq->front + 1u)%seq->length; + + #else + + /* front 指針向後移一位置 */ + seq->front++; + if( seq->front >= seq->length) + { + seq->front = 0u; + } + + #endif + + l_resutl = QUEUE_OK; + + } + + if ( l_resutl == QUEUE_ERRO) + { + + /* 如果要刪除的是隊尾 */ + #ifdef QUEUE_MOD_ENABLE + if( ( ( (seq->rear + seq->length) -1u) %seq->length) == (i%seq->length) ) + #else + tmp_i++; + if( tmp_i >= seq->length) + { + tmp_i = 0u; + } + if( seq->rear == tmp_i ) + #endif + { + + #ifdef QUEUE_MOD_ENABLE + + /* rear 指針向前移一位置 */ + seq->rear = ( (seq->rear + seq->length) -1u) %seq->length; + + #else + + if( seq->rear >0u ) + { + seq->rear--; + } + else + { + seq->rear = seq->length -1u; + } + + #endif + + l_resutl = QUEUE_OK; + + } + + } + } + + + } + + QUEUE_CPU_CRITICAL_EXIT(); + + return l_resutl; + +} /* End of function queue_del_one_element_by_flag*/ + +/*--------------------------------------------------------------------------- +|Prototype : QUEUE_OPERATE_FLAG_E queue_get_element(sequential_queue_s seq,u8 i ,sequential_queue_elem *element) +|Called by : +|Preconditions : +|Input parameters : seq : 順序隊列； +|Output parameters : element: 將頭元素數據傳給外部的變量; +|Return value : 是否操作成功 +|Description : 若隊列不為空，則用e返回seq的某一个元素，该函数不建议调用 +----------------------------------------------------------------------------*/ +QUEUE_OPERATE_FLAG_E queue_get_element(sequential_queue_s seq,u8 i ,sequential_queue_elem *element) +{ + sequential_queue_elem *pdata; + u8 j; + QUEUE_OPERATE_FLAG_E l_resutl= QUEUE_OK; + + #ifdef QUEUE_MOD_ENABLE + #else + u16 tmp_i ; + #endif + + QUEUE_CPU_SR_ALLOC(); /*PRQA S 2981*/ + QUEUE_CPU_CRITICAL_ENTER(); + + if(seq.front == seq.rear) + { + l_resutl = QUEUE_ERRO; + } + + if( l_resutl == QUEUE_OK) + { + + #ifdef QUEUE_MOD_ENABLE + + /* 將隊頭元素賦值給e */ + pdata = seq.base + ( (i%seq.length) * seq.unit_sizes) ; + #else + if( i < seq.length) + { + tmp_i = i; + } + else + { + tmp_i = i - seq.length ; + } + + pdata = seq.base + (tmp_i * seq.unit_sizes) ; + + #endif + + for(j=0u;j> 8; + volatile_did.boot_soft_id[2*j+1] = l_buf[j].w; + } + #endif + + #if 1 + /*F187*/ + for(j=0;j<5;j++) + { + l_buf[j].w = (u16)const_did.geely_spare_part_number[2*j] << 8 | const_did.geely_spare_part_number[2*j+1] ; + #ifdef CAL_USE_NVM + (void)eeprom_set_u16((eeprom_addr_t)(EEPROM_DATA_BASE_ADDR+EEPROM_F187_ADDR+2*j), l_buf[j].w); + #endif + } + #endif + + #if 1 + /*F189*/ + for(j=0;j<8;j++) + { + l_buf[j].w = (u16)const_did.ecu_software_version_number[2*j] << 8 | const_did.ecu_software_version_number[2*j+1] ; + #ifdef CAL_USE_NVM + (void)eeprom_set_u16((eeprom_addr_t)(EEPROM_DATA_BASE_ADDR+EEPROM_F189_ADDR+2*j), l_buf[j].w); + #endif + } + #endif + + #if 1 + + /*F193*/ + for(j=0;j<8;j++) + { + l_buf[j].w = (u16)const_did.system_supplier_ecu_hardware_version_number[2*j] << 8 | const_did.system_supplier_ecu_hardware_version_number[2*j+1] ; + #ifdef CAL_USE_NVM + (void)eeprom_set_u16((eeprom_addr_t)(EEPROM_DATA_BASE_ADDR+EEPROM_F193_ADDR+2*j), l_buf[j].w); + #endif + } + #endif + + + } + #endif +} + + + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : 判斷數組的值是否都為 value; +----------------------------------------------------------------------------*/ +u8 buf_judge_value_is_same(uc8 *pdata,u8 len ,u8 value) +{ + + u8 l_result = TRUE; + + u8 i; + + for(i=0;i 0U) //&& (ret == STATUS_SUCCESS)) + { + + *p_data = *((uint8_t *)addr++); + + len--; + p_data++; + + } + } + /* + else + { + ret = STATUS_UNSUPPORTED; + } + */ + return ret; +} + +MEMORY_MAP_RAM_FOR_ASIL status_t FLASH_ErasePage_ext(uint32_t Page_Address,cpu_wdg_t p_freewdg) +{ + status_t l_result = STATUS_ERROR; + //flash_callback_t pCallBack; + g_pstFlashOptInfo = (tFlashOptInfo *)flashDriverStartAdd; + FLASH_SR_ALLOC(); + //u32 checkValue; + //checkValue = BL_MAKE_LOCAL_U32(FLASHIF_DRIVER_MAGIC_ADDRESS); //因為是大端，所以直接讀取FLASHIF_DRIVER_MAGIC_ADDRESS地址上的值 + if ( g_pstFlashOptInfo->magic == FLASH_DRIVER_VERSION_MAGIC) // FLASHIF_DRIVER_MAGIC_VALUE 目前為了編譯g_FlashHeader 才改成這樣，如果是原來的要改回 FLASH_DRIVER_VERSION_MAGIC等 + { + //checkValue = BL_MAKE_LOCAL_U32(FLASHIF_DRIVER_VERSION_ADDRESS); + if (g_pstFlashOptInfo->version == FLASH_DRIVER_VERSION_VERSION) // FLASHIF_DRIVER_VERSION_VALUE + { + // + } + else + { + //l_result = STATUS_ERROR; + return l_result; + } + } + else + { + //l_result = STATUS_ERROR; + return l_result; + } + //加一个低电压的判断 + if(SVD_ISR_SVDR_Msk != FL_SVD_GetLatchedPowerStatus(SVD)) + { + return l_result; + } + + g_flash.addr = Page_Address; + g_flash.size = FLASH_SECTOR_SIZES; + + if( (g_flash.addr % FLASH_SECTOR_SIZES )== 0) + { + //pCallBack = (flash_callback_t)CCIF_Callback; + //flashSSDConfig.CallBack = pCallBack; + #ifdef FLASH_CFG_EN_INT + //#if PROJECT_NAME_CURRENT == PROJECT_NAME_DEMO + TEST1_ON(); + //#endif + FLASH_CRITICAL_ENTER(); + wdog_task(); + // sector erase 7.5ms + //g_flash.result = FLASH_DRV_EraseSector(&flashSSDConfig, g_flash.addr, g_flash.size); + g_flash.result = g_pstFlashOptInfo->FLASH_EraseSector(&g_flash_ssd1, g_flash.addr, g_flash.size); ///<擦除一个页，地址为当前页首地址 + FLASH_CRITICAL_EXIT(); + //#if PROJECT_NAME_CURRENT == PROJECT_NAME_DEMO + TEST1_OFF(); + //#endif + #else + //g_flash.result = FLASH_DRV_EraseSector(&flashSSDConfig, g_flash.addr, g_flash.size); + g_flash.result = g_pstFlashOptInfo->FLASH_EraseSector(&g_flash_ssd1, g_flash.addr, g_flash.size); ///<擦除一个页，地址为当前页首地址 + #endif + //while( (FTFx_FSTAT & FTFx_FSTAT_CCIF_MASK) == 0); + //DEV_ASSERT(STATUS_SUCCESS == g_flash.result); + //pCallBack = (flash_callback_t)CCIF_Callback; + //flashSSDConfig.CallBack = NULL_CALLBACK; + + if(g_flash.result == STATUS_SUCCESS) + { + l_result = STATUS_SUCCESS; + } + #if 0 //不校驗 + if(STATUS_SUCCESS == l_result) + { + #ifdef FLASH_CFG_EN_INT + #if PROJECT_NAME_CURRENT == PROJECT_NAME_DEMO + TEST1_ON(); + #endif + FLASH_CRITICAL_ENTER(); + //g_flash.result = FLASH_DRV_VerifySection(&flashSSDConfig, g_flash.addr, g_flash.size / FTFx_DPHRASE_SIZE, 1u); + g_flash.result = g_pstFlashOptInfo->FLASH_VerifySection(0, g_flash.addr, g_flash.size / FLASH_SECTOR_SIZES,0); ///<验证当前页是否擦除成功 + FLASH_CRITICAL_EXIT(); + #if PROJECT_NAME_CURRENT == PROJECT_NAME_DEMO + TEST1_OFF(); + #endif + #else + /* Verify the erase operation at margin level value of 1, user read */ + //g_flash.result = FLASH_DRV_VerifySection(&flashSSDConfig, g_flash.addr, g_flash.size / FTFx_DPHRASE_SIZE, 1u); + g_flash.result = g_pstFlashOptInfo->FLASH_VerifySection(0, g_flash.addr, g_flash.size / FLASH_SECTOR_SIZES,0); ///<验证当前页是否擦除成功 + #endif + //while( (FTFx_FSTAT & FTFx_FSTAT_CCIF_MASK) == 0); + //DEV_ASSERT(STATUS_SUCCESS == g_flash.result); + l_result = (status_t)g_flash.result; + } + #endif + } + else + { + l_result = STATUS_SUCCESS; + } + + return l_result; +} + +#define FLASH_PAGE_REMAP_ADDR 0x20007BF0 +#ifdef __ICCARM__ +u8 l_page[FLASH_P_PAGE_SIZES] @(FLASH_PAGE_REMAP_ADDR); //把 分配給eeprom 的拿來用 +#else +u8 l_page[FLASH_P_PAGE_SIZES] __attribute__((at(FLASH_PAGE_REMAP_ADDR))); //把 分配給eeprom 的拿來用 +#endif +MEMORY_MAP_RAM_FOR_ASIL status_t in_flash_wr_byte_for_boot(u32 phy_start_addr,uc8* pBuffer,u16 numbers,cpu_wdg_t p_freewdg) +{ + u32 failAddr; + status_t l_result = STATUS_ERROR; + //flash_callback_t pCallBack; + FLASH_SR_ALLOC(); + u8 *p_buf; + //u8 l_page[FLASH_P_PAGE_SIZES]; + u16 l_offset; + u16 i; + u32 checkValue; + g_pstFlashOptInfo = (tFlashOptInfo *)flashDriverStartAdd; + //checkValue = BL_MAKE_LOCAL_U32(FLASHIF_DRIVER_MAGIC_ADDRESS); //因為是大端，所以直接讀取FLASHIF_DRIVER_MAGIC_ADDRESS地址上的值 + if ( g_pstFlashOptInfo->magic == FLASH_DRIVER_VERSION_MAGIC) // FLASHIF_DRIVER_MAGIC_VALUE 目前為了編譯g_FlashHeader 才改成這樣，如果是原來的要改回 FLASH_DRIVER_VERSION_MAGIC等 + { + //checkValue = BL_MAKE_LOCAL_U32(FLASHIF_DRIVER_VERSION_ADDRESS); + if (g_pstFlashOptInfo->version == FLASH_DRIVER_VERSION_VERSION) // FLASHIF_DRIVER_VERSION_VALUE + { + // + } + else + { + //l_result = STATUS_ERROR; + return l_result; + } + } + else + { + //l_result = STATUS_ERROR; + return l_result; + } + + //加一个低电压的判断 + if(SVD_ISR_SVDR_Msk != FL_SVD_GetLatchedPowerStatus(SVD)) + { + return l_result; + } + + g_flash.addr = phy_start_addr; + g_flash.size = FLASH_P_PAGE_SIZES; + //l_offset = numbers%FLASH_P_PAGE_SIZES; + l_offset = numbers&(FLASH_P_PAGE_SIZES-1); //前提是 numbersFLASH_Program_page(&g_flash_ssd1, g_flash.addr, g_flash.size,p_buf); ///<验证当前页是否擦除成功 + FLASH_CRITICAL_EXIT(); + //#if PROJECT_NAME_CURRENT == PROJECT_NAME_DEMO + TEST1_OFF(); + //#endif + #else + //g_flash.result = FLASH_DRV_Program(&flashSSDConfig, g_flash.addr, g_flash.size, p_buf); + g_flash.result = g_pstFlashOptInfo->FLASH_Program_page(&g_flash_ssd1, g_flash.addr, g_flash.size,p_buf); ///<验证当前页是否擦除成功 + #endif + //while( (FTFx_FSTAT & FTFx_FSTAT_CCIF_MASK) == 0); + //DEV_ASSERT(STATUS_SUCCESS == g_flash.result); + + if(STATUS_SUCCESS == g_flash.result) + { + l_result = STATUS_SUCCESS; + } + #if 0 + if(l_result == STATUS_SUCCESS) + { + #ifdef FLASH_CFG_EN_INT + #if PROJECT_NAME_CURRENT == PROJECT_NAME_DEMO + TEST1_ON(); + #endif + FLASH_CRITICAL_ENTER(); + // FLASH_DRV_ProgramCheck 必須是 FLASH_DRV_Program 之後，而且w_data不變 大概75ms時間 --4096字節 + //g_flash.result = FLASH_DRV_ProgramCheck(&flashSSDConfig, g_flash.addr, g_flash.size, p_buf, &failAddr, 1u); + g_flash.result = g_pstFlashOptInfo->FLASH_ProgramCheck(0, g_flash.addr, g_flash.size,p_buf,&failAddr,0); ///<验证当前页是否擦除成功 + FLASH_CRITICAL_EXIT(); + #if PROJECT_NAME_CURRENT == PROJECT_NAME_DEMO + TEST1_OFF(); + #endif + #else + //g_flash.result = FLASH_DRV_ProgramCheck(&flashSSDConfig, g_flash.addr, g_flash.size, p_buf, &failAddr, 1u); + g_flash.result = g_pstFlashOptInfo->FLASH_ProgramCheck(0, g_flash.addr, g_flash.size,p_buf,&failAddr,0); ///<验证当前页是否擦除成功 + #endif + //g_flash.result = FLASH_DRV_ProgramCheck(&flashSSDConfig, g_flash.addr, g_flash.size, g_flash.w_data, &failAddr, 1u); + //while( (FTFx_FSTAT & FTFx_FSTAT_CCIF_MASK) == 0); + //DEV_ASSERT(STATUS_SUCCESS == g_flash.result); + + #if 0 + FLASH_TEST_GPIO_TOG1(); + flash_drv_pflash_read(g_flash.addr ,g_flash.size,g_flash.r_data); + FLASH_TEST_GPIO_TOG1(); + #endif + + l_result = g_flash.result; + } + #endif + return l_result; +} + + +#if 1 +#define NVM_FLASH_PAGE_SIZE 512u //字节 +#define NVM_FLASH_SECTOR_SIZE 2048u //字节 +#define NVM_FLASH_TEST_ADDR 0x00016000 +#define TestPageNum ((NVM_FLASH_TEST_ADDR - 0x00000000)/NVM_FLASH_SECTOR_SIZE) +void flash_test(void) +{ + u16 i; + u32 l_result; + for (i=0;i<2048;i++) + { + g_flash.w_data[i] = (uint8_t)i+0x77; + } + do + { + //g_pstFlashOptInfo = (tFlashOptInfo *)flashDriverStartAdd; + + TEST1_ON(); + g_flash.result = g_pstFlashOptInfo->FLASH_EraseSector(&g_flash_ssd1, NVM_FLASH_TEST_ADDR, 0x800); ///<擦除一个页，地址为当前页首地址 + //g_flash.result = eFLASH_EraseSector(&g_flash_ssd1, NVM_FLASH_TEST_ADDR, 0x800); ///<擦除一个页，地址为当前页首地址 + TEST1_OFF(); + if (g_flash.result != STATUS_SUCCESS) + { + //EFLASH_LockCtrl(); + g_flash.test[1]++; + //break; + } + + TEST1_ON(); + ///写操作，只可以写擦除过的地址，一次限制512字(2K byte)，buff必须四字节对齐。 + g_flash.result = g_pstFlashOptInfo->FLASH_Program_sector(&g_flash_ssd1, NVM_FLASH_TEST_ADDR, 2048,(u8*)&g_flash.w_data[0]); ///<验证当前页是否擦除成功 + //g_flash.result = eFLASH_Program_page(&g_flash_ssd1, NVM_FLASH_TEST_ADDR, 512,(u8*)&g_flash.wr_data[0]); ///<验证当前页是否擦除成功 + TEST1_OFF(); + if (g_flash.result != STATUS_SUCCESS) + { + g_flash.test[3]++; + //EFLASH_LockCtrl(); + //break; + } + + for (i=0;i<2048;i++) + { + //g_flash.wr_data[i] = (uint8_t)i+0x92; + g_flash.r_data[i] = 0u; + } + //讀取扇區 + TEST1_ON(); + flash_read_bytes(NVM_FLASH_TEST_ADDR,g_flash.r_data,2048); + TEST1_OFF(); + }while(0); +} +#endif + + + + diff --git a/code_boot_out/qm/module/flash.h b/code_boot_out/qm/module/flash.h new file mode 100644 index 0000000..0b9309f --- /dev/null +++ b/code_boot_out/qm/module/flash.h @@ -0,0 +1,92 @@ +/**~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +** Filename : flash.h +** Project : KUWE (PM01 PEPS) +** Module : +** Processor : Freescale mc9s12g128 +** Date/Time : 2016-07-14, 9:00 +** Abstract : +** Contents : +** Author : +** http : +** mail : +** -------------------------------------------------------------------------- +** +** -------------------------------------------------------------------------- +**~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~*/ + +#ifndef __FLASH_H__ +#define __FLASH_H__ + +#include "common_types.h" +#include "Cpu.h" +//#include "ac780x_eflash.h" +#include "status.h" +#include "common_cfg.h" +#include "bl_flash_if_funcfg.h" + + +typedef void(*cpu_wdg_t)(void); + +#ifndef NULL_PTR +#define NULL_PTR ((void *)0) +#endif + +#define FLASH_DRIVER_SECTOR_SIZE FL_FLASH_SECTOR_SIZE_BYTE //byte +#define FLASH_DRIVER_PAGE_SIZE FL_FLASH_PGAE_SIZE_BYTE //byte + +#define FLASH_DRIVER_VERSION_TYPE (0x8001u) +#define FLASH_DRIVER_VERSION_INDEX (0x0000u) +#define FLASH_DRIVER_VERSION_MAGIC (0x47313936UL) +#define FLASH_DRIVER_VERSION_VERSION (0x00010000UL) + +#define FLASHIF_DRIVER_MAGIC_ADDRESS (FLASHIF_DRIVER_STARTADDRESS + 4u) +#define FLASHIF_DRIVER_VERSION_ADDRESS (FLASHIF_DRIVER_STARTADDRESS + 8u) + +typedef void (* flash_callback_t)(void); +typedef struct +{ + uint32_t PFlashBase; /*!< The base address of P-Flash memory */ + uint32_t PFlashSize; /*!< The size in byte of P-Flash memory */ + uint32_t DFlashBase; /*!< For FlexNVM device, this is the base address of D-Flash memory (FlexNVM memory); + * For non-FlexNVM device, this field is unused */ + uint32_t DFlashSize; /*!< For FlexNVM device, this is the size in byte of area + * which is used as D-Flash from FlexNVM memory; + * For non-FlexNVM device, this field is unused */ + uint32_t EERAMBase; /*!< The base address of FlexRAM (for FlexNVM device) + * or acceleration RAM memory (for non-FlexNVM device) */ + uint32_t EEESize; /*!< For FlexNVM device, this is the size in byte of EEPROM area which was partitioned + * from FlexRAM; For non-FlexNVM device, this field is unused */ + flash_callback_t CallBack; /*!< Call back function to service the time critical events. Any code reachable from this function + * must not be placed in a Flash block targeted for a program/erase operation */ +} flash_ssd_config_t; +typedef struct +{ + uint16_t type; /**< The type of the flash driver.*/ + uint16_t index; /**< The index of the flash driver.*/ + uint32_t magic; /**< The magic value of the flash driver*/ + uint32_t version; /**< The current of the flash driver.*/ + //status_t (*FLASH_EraseAllBlock)(const flash_ssd_config_t * pSSDConfig); + //status_t (*FLASH_VerifyAllBlock)(const flash_ssd_config_t * pSSDConfig,uint8_t marginLevel); + status_t (*FLASH_EraseSector)(const flash_ssd_config_t * pSSDConfig,uint32_t dest,uint32_t size); + //status_t (*FLASH_VerifySection)(const flash_ssd_config_t * pSSDConfig,uint32_t dest,uint16_t number,uint8_t marginLevel); + //void (*FLASH_EraseSuspend)(void); + //void (*FLASH_EraseResume)(void); + status_t (*FLASH_Program_page)(const flash_ssd_config_t * pSSDConfig,uint32_t dest, uint32_t size,const uint8_t * pData); + status_t (*FLASH_ProgramCheck)(const flash_ssd_config_t * pSSDConfig,uint32_t dest,uint32_t size,const uint8_t * pExpectedData,uint32_t * pFailAddr,uint8_t marginLevel); + status_t (*FLASH_Program_sector)(const flash_ssd_config_t * pSSDConfig,uint32_t dest, uint32_t size,const uint8_t * pData); + status_t (*FLASH_Erase_page)(const flash_ssd_config_t * pSSDConfig, uint32_t dest,uint32_t size); + //u8 (*FLASH_CommandSequence)(const flash_ssd_config_t * pSSDConfig); + //status_t (*FLASH_VerifyBlock)(const flash_ssd_config_t * pSSDConfig,uint32_t dest,uint8_t marginLevel); +} tFlashOptInfo; + + +//extern const MEMORY_MAP_RAM_FLASH_DRV tFlashOptInfo g_stFlashOptInfo ; +//extern const flash_ssd_config_t g_flash_ssd; + +#define flashDriverStartAdd 0x20007000 ///RAM_END_ADDR) || ((addr+len)>(RAM_END_ADDR+1u)) ) + { + l_result = (u8)ERR_FAILED; + } + else + { + p_src = (u8 *)(addr); + + for (i = 0; i < len; i++) + { + p_data[i] = p_src[i]; /*lint !e511*/ + } + + l_result = (u8)ERR_OK; + } + + return l_result; +} + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +----------------------------------------------------------------------------*/ +u8 ram_write_bytes(u32 addr,u8 *p_data,u16 len) +{ + u8 l_result; + u8 *p_addr; + u16 i; + + if( (addrRAM_END_ADDR) || ((addr+len)>(RAM_END_ADDR+1u)) ) + { + l_result = (u8)ERR_FAILED; + } + else + { + p_addr = (u8 *)(addr); + + for (i = 0; i < len; i++) + { + p_addr[i] = p_data[i] ; /*lint !e511*/ + } + + l_result = (u8)ERR_OK; + } + + return l_result; +} + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +----------------------------------------------------------------------------*/ +u8 flash_read_bytes(u32 addr,u8 *p_data,u16 len) +{ + u8 l_result; + u8 *p_src; + u16 i; + + if( (addrFLASH_END_ADDR) || ((addr+len)>(FLASH_END_ADDR+1u)) ) + { + l_result = (u8)ERR_FAILED; + } + else + { + p_src = (u8 *)(addr); + + for (i = 0; i < len; i++) + { + p_data[i] = p_src[i]; /*lint !e511*/ + } + + l_result = (u8)ERR_OK; + } + + return l_result; +} + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +----------------------------------------------------------------------------*/ +void nvm_init(void) +{ + //u8 i; + flash_init(); + //#ifdef NVM_EEPROM_EXT_EN + //eeprom_init(); + //#endif + + //nvm_eeprom_init(); + + //eeprom_ext_init(); + #if 0 + g_nvm_test.result = nvm_read_bytes(NVM_TYPE_EEPROM,0x100300,&g_nvm_test.read_data[0],16); + for(i=0;i<20;i++) + { + g_nvm_test.read_data[i] = 0; + g_nvm_test.write_data[i] = 0x36+i; + } + g_nvm_test.result = nvm_write_bytes(NVM_TYPE_EEPROM,0x100300,&g_nvm_test.write_data[0],16); + g_nvm_test.result = nvm_read_bytes(NVM_TYPE_EEPROM,0x100300,&g_nvm_test.read_data[0],16); + + g_nvm_test.result = nvm_read_bytes(NVM_TYPE_FLASH,0xfe0000,&g_nvm_test.read_data[0],16); + g_nvm_test.result = nvm_read_bytes(NVM_TYPE_RAM,0x001000ul,&g_nvm_test.read_data[0],8); + for(i=0;i<20;i++) + { + g_nvm_test.write_data[i] = 0x36+i; + } + g_nvm_test.result = nvm_write_bytes(NVM_TYPE_RAM,0x001000ul,&g_nvm_test.write_data[0],8); + g_nvm_test.result = nvm_read_bytes(NVM_TYPE_RAM,0x001000ul,&g_nvm_test.read_data[0],8); + #endif +} + + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +----------------------------------------------------------------------------*/ +void nvm_task(void) +{ + //#ifdef NVM_EEPROM_EXT_EN + //eeprom_task(); + //#endif +} + + + + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +----------------------------------------------------------------------------*/ +u8 nvm_read_bytes(nvm_type_e type,u32 addr, u8 *p_data, u16 num) +{ + u8 l_result = (u8)ERR_FAILED; + switch(type) + { + case NVM_TYPE_EEPROM: + //#ifdef NVM_EEPROM_EXT_EN + l_result =eeprom_read_u8_ext(addr,p_data,num); + //#endif + break; + case NVM_TYPE_RAM: + l_result =ram_read_bytes(addr,p_data,num); + break; + case NVM_TYPE_FLASH: + l_result =flash_read_bytes(addr,p_data,num); + break; + default: + //code + break; + } + return l_result; +} + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +----------------------------------------------------------------------------*/ +u8 nvm_write_bytes(nvm_type_e type,u32 addr, u8 *p_data, u16 num) +{ + u8 l_result = (u8)ERR_FAILED; + switch(type) + { + case NVM_TYPE_EEPROM: + //#ifdef NVM_EEPROM_EXT_EN + l_result =eeprom_write_u8_ext(addr,p_data,num); + //#endif + break; + case NVM_TYPE_RAM: + l_result =ram_write_bytes(addr,p_data,num); + break; + case NVM_TYPE_FLASH: + //l_result =flash_read_bytes(addr,p_data,num); + break; + default: + //code + break; + } + return l_result; +} + + + diff --git a/code_boot_out/qm/module/nvm.h b/code_boot_out/qm/module/nvm.h new file mode 100644 index 0000000..52eb1b3 --- /dev/null +++ b/code_boot_out/qm/module/nvm.h @@ -0,0 +1,74 @@ +/** ########################################################################## +** Filename : +** Project : +** Module : +** Processor : +** Version : 1.0 +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20230602- --V1.0-- --mingyea--- --修改-- + +** #########################################################################*/ +#ifndef NVM_H__ +#define NVM_H__ + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ +#include "common_types.h" +#include "nvm_cfg.h" +#include "gpio.h" +#include "flash.h" +#include "eeprom.h" +#include "eeprom_seq.h" +#include "eeprom_state_machine.h" + +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ +typedef enum +{ + NVM_TYPE_EEPROM=0, + NVM_TYPE_RAM, + NVM_TYPE_FLASH +}nvm_type_e; + +/*--------------------------------------------------------------------------- +- G L O B A L V A R I A B L E S +- only configuration table allowed here,variables are not allowed! +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ + +u8 ram_write_bytes(u32 addr,u8 *p_data,u16 len); +u8 ram_read_bytes(u32 addr,u8 *p_data,u16 len); +u8 flash_read_bytes(u32 addr,u8 *p_data,u16 len); + +void nvm_init(void); +void nvm_task(void); +u8 nvm_read_bytes(nvm_type_e type,u32 addr, u8 *p_data, u16 num); +u8 nvm_write_bytes(nvm_type_e type,u32 addr, u8 *p_data, u16 num); + + +#endif diff --git a/code_boot_out/qm/module/nvm_cfg.c b/code_boot_out/qm/module/nvm_cfg.c new file mode 100644 index 0000000..5014886 --- /dev/null +++ b/code_boot_out/qm/module/nvm_cfg.c @@ -0,0 +1,187 @@ +/** ########################################################################## +** Filename : +** Project : +** Module : +** Processor : +** Version : +** Compiler : +** Date/Time : +** Abstract : +** Contents : +** Note : +** +** (c) Copyright dmdz Co.,Ltd +** -------------------------------------------------------------------------- +** R E V I S I O N H I S T O R Y +** -------------------------------------------------------------------------- +** Date Ver Author Description + +** -20230602- --V1.0-- --mingyea--- --修改-- + +** #########################################################################*/ + +/*--------------------------------------------------------------------------- +- I N C L U D E F I L E S +----------------------------------------------------------------------------*/ +#include "common_types.h" +#include "error.h" +#include "gpio.h" +#include "nvm.h" +#include "cpu.h" + + +/*--------------------------------------------------------------------------- +- D E F I N E S / M A C R O S +----------------------------------------------------------------------------*/ +#ifdef NVM_FLASH_DEBUG_EN + +#define NVM_FLASH_PAGE_SIZE 512u //字节 +#define NVM_FLASH_SECTOR_SIZE 2048u //字节 +#define NVM_FLASH_TEST_ADDR 0x00016000 +#define TestPageNum ((NVM_FLASH_TEST_ADDR - 0x00000000)/NVM_FLASH_SECTOR_SIZE) + +#endif + +/*--------------------------------------------------------------------------- +- T Y P E D E F I N I T I O N S +----------------------------------------------------------------------------*/ + +#ifdef NVM_FLASH_DEBUG_EN + + +#pragma pack(4) +typedef struct +{ + u8 state; + u8 read_project; + u8 write_project; + u8 result; + u16 page_id; + u32 addr; + u8 wr_data[NVM_FLASH_SECTOR_SIZE]; + u8 rd_data[NVM_FLASH_SECTOR_SIZE]; + u8 test[20]; +}nvm_flash_test_s; +#pragma pack() + +#endif + +/*--------------------------------------------------------------------------- +- S T A T I C V A R I A B L E S +----------------------------------------------------------------------------*/ +#ifdef NVM_FLASH_DEBUG_EN +nvm_flash_test_s g_nvm_flash_test; +#endif + +/*--------------------------------------------------------------------------- +* G L O B A L V A R I A B L E S +----------------------------------------------------------------------------*/ + + +/*--------------------------------------------------------------------------- +- C O N S T A N T S +----------------------------------------------------------------------------*/ + +/*--------------------------------------------------------------------------- +- F U N C T I O N P R O T O T Y P E +----------------------------------------------------------------------------*/ + + +#ifdef NVM_FLASH_DEBUG_EN + + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +----------------------------------------------------------------------------*/ +void nvm_falsh_init(void) +{ + // +} + +#define NVM_TEST_ON() //NVM_TEST_ON() +#define NVM_TEST_OFF() //NVM_TEST_OFF() + +/*--------------------------------------------------------------------------- +|Prototype : +|Called by : +|Preconditions : +|Input parameters : +|Output parameters : +|Return value : +|Description : +----------------------------------------------------------------------------*/ +void nvm_flash_test(void) +{ + #if 1 + u16 i; + + for (i=0;i= 6010050) + #pragma clang system_header /* treat file as system include file */ +#endif + +#ifndef __CORE_CM0PLUS_H_GENERIC +#define __CORE_CM0PLUS_H_GENERIC + +//#include +#include "common_types.h" + +#ifdef __cplusplus + extern "C" { +#endif + +/** + \page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions + CMSIS violates the following MISRA-C:2004 rules: + + \li Required Rule 8.5, object/function definition in header file.
+ Function definitions in header files are used to allow 'inlining'. + + \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.
+ Unions are used for effective representation of core registers. + + \li Advisory Rule 19.7, Function-like macro defined.
+ Function-like macros are used to allow more efficient code. + */ + + +/******************************************************************************* + * CMSIS definitions + ******************************************************************************/ +/** + \ingroup Cortex-M0+ + @{ + */ + +/* CMSIS CM0+ definitions */ +#define __CM0PLUS_CMSIS_VERSION_MAIN ( 5U) /*!< [31:16] CMSIS HAL main version */ +#define __CM0PLUS_CMSIS_VERSION_SUB ( 0U) /*!< [15:0] CMSIS HAL sub version */ +#define __CM0PLUS_CMSIS_VERSION ((__CM0PLUS_CMSIS_VERSION_MAIN << 16U) | \ + __CM0PLUS_CMSIS_VERSION_SUB ) /*!< CMSIS HAL version number */ + +#define __CORTEX_M (0U) /*!< Cortex-M Core */ + +/* Common defines in core_*.h files + - #define __ASM Compiler keyword for asm + - #define __INLINE Compiler keyword for inline + - #define __STATIC_INLINE Compiler keyword for static inline + - #define __NO_RETURN function that never returns + - #define __USED function or variable that is not optimized away + - #define __WEAK weak function or variable + - #define __UNALIGNED_UINT32 pointer to unaligned uint32_t variable + */ +#if defined ( __CC_ARM ) /* ARM Compiler 4/5 */ + #define __ASM __asm + #define __INLINE __inline + #define __STATIC_INLINE static __inline + #define __NO_RETURN __declspec(noreturn) + #define __USED __attribute__((used)) + #define __WEAK __attribute__((weak)) + #define __UNALIGNED_UINT32(x) (*((__packed uint32_t *)(x))) + +#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) /* ARM Compiler 6 */ + #define __ASM __asm + #define __INLINE __inline + #define __STATIC_INLINE static __inline + #define __NO_RETURN __attribute__((noreturn)) + #define __USED __attribute__((used)) + #define __WEAK __attribute__((weak)) + #pragma clang diagnostic push + #pragma clang diagnostic ignored "-Wpacked" + struct __attribute__((packed)) T_UINT32 { uint32_t v; }; + #pragma clang diagnostic pop + #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v) + +#elif defined ( __GNUC__ ) /* GNU Compiler */ + #define __ASM __asm + #define __INLINE inline + #define __STATIC_INLINE static inline + #define __NO_RETURN __attribute__((noreturn)) + #define __USED __attribute__((used)) + #define __WEAK __attribute__((weak)) + struct __attribute__((packed)) T_UINT32 { uint32_t v; }; + #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v) + +#elif defined ( __ICCARM__ ) /* IAR Compiler */ + #define __ASM __asm + #define __INLINE inline + #define __STATIC_INLINE static inline + #define __NO_RETURN __noreturn + #define __USED + #define __WEAK __weak +// struct __packed T_UINT32 { uint32_t v; }; + #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v) + +#elif defined ( __TI_ARM__ ) /* TI ARM Compiler */ + #define __ASM __asm + #define __INLINE inline + #define __STATIC_INLINE static inline + #define __NO_RETURN __attribute__((noreturn)) + #define __USED __attribute__((used)) + #define __WEAK __attribute__((weak)) + struct __attribute__((packed)) T_UINT32 { uint32_t v; }; + #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v) + +#elif defined ( __TASKING__ ) /* TASKING Compiler */ + #define __ASM __asm + #define __INLINE inline + #define __STATIC_INLINE static inline + #define __NO_RETURN __attribute__((noreturn)) + #define __USED __attribute__((used)) + #define __WEAK __attribute__((weak)) + struct __packed__ T_UINT32 { uint32_t v; }; + #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v) + +#elif defined ( __CSMC__ ) /* COSMIC Compiler */ + #define __packed + #define __ASM _asm + #define __INLINE inline + #define __STATIC_INLINE static inline + #define __NO_RETURN + #define __USED + #define __WEAK + #define __UNALIGNED_UINT32(x) (*x) + +#else + #error Unknown compiler +#endif + +/** __FPU_USED indicates whether an FPU is used or not. + This core does not support an FPU at all +*/ +#define __FPU_USED 0U + +#if defined ( __CC_ARM ) + #if defined __TARGET_FPU_VFP + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) + #if defined __ARM_PCS_VFP + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined ( __GNUC__ ) + #if defined (__VFP_FP__) && !defined(__SOFTFP__) + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined ( __ICCARM__ ) + #if defined __ARMVFP__ + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined ( __TI_ARM__ ) + #if defined __TI_VFP_SUPPORT__ + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined ( __TASKING__ ) + #if defined __FPU_VFP__ + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined ( __CSMC__ ) + #if ( __CSMC__ & 0x400U) + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#endif + +#include "core_cminstr.h" /* Core Instruction Access */ +#include "core_cmfunc.h" /* Core Function Access */ + +#ifdef __cplusplus +} +#endif + +#endif /* __CORE_CM0PLUS_H_GENERIC */ + +#ifndef __CMSIS_GENERIC + +#ifndef __CORE_CM0PLUS_H_DEPENDANT +#define __CORE_CM0PLUS_H_DEPENDANT + +#ifdef __cplusplus + extern "C" { +#endif + +/* check device defines and use defaults */ +#if defined __CHECK_DEVICE_DEFINES + #ifndef __CM0PLUS_REV + #define __CM0PLUS_REV 0x0000U + #warning "__CM0PLUS_REV not defined in device header file; using default!" + #endif + + #ifndef __MPU_PRESENT + #define __MPU_PRESENT 0U + #warning "__MPU_PRESENT not defined in device header file; using default!" + #endif + + #ifndef __VTOR_PRESENT + #define __VTOR_PRESENT 0U + #warning "__VTOR_PRESENT not defined in device header file; using default!" + #endif + + #ifndef __NVIC_PRIO_BITS + #define __NVIC_PRIO_BITS 2U + #warning "__NVIC_PRIO_BITS not defined in device header file; using default!" + #endif + + #ifndef __Vendor_SysTickConfig + #define __Vendor_SysTickConfig 0U + #warning "__Vendor_SysTickConfig not defined in device header file; using default!" + #endif +#endif + +/* IO definitions (access restrictions to peripheral registers) */ +/** + \defgroup CMSIS_glob_defs CMSIS Global Defines + + IO Type Qualifiers are used + \li to specify the access to peripheral variables. + \li for automatic generation of peripheral register debug information. +*/ +#ifdef __cplusplus + #define __I volatile /*!< Defines 'read only' permissions */ +#else + #define __I volatile const /*!< Defines 'read only' permissions */ +#endif +#define __O volatile /*!< Defines 'write only' permissions */ +#define __IO volatile /*!< Defines 'read / write' permissions */ + +/* following defines should be used for structure members */ +#define __IM volatile const /*! Defines 'read only' structure member permissions */ +#define __OM volatile /*PRQA S 0602*/ /*! Defines 'write only' structure member permissions */ +#define __IOM volatile /*! Defines 'read / write' structure member permissions */ + +/*@} end of group Cortex-M0+ */ + + + +/******************************************************************************* + * Register Abstraction + Core Register contain: + - Core Register + - Core NVIC Register + - Core SCB Register + - Core SysTick Register + - Core MPU Register + ******************************************************************************/ +/** + \defgroup CMSIS_core_register Defines and Type Definitions + \brief Type definitions and defines for Cortex-M processor based devices. +*/ + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_CORE Status and Control Registers + \brief Core Register type definitions. + @{ + */ + +/** + \brief Union type to access the Application Program Status Register (APSR). + */ +typedef union +{ + struct + { + uint32_t _reserved0:28; /*!< bit: 0..27 Reserved */ + uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ + uint32_t C:1; /*!< bit: 29 Carry condition code flag */ + uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ + uint32_t N:1; /*!< bit: 31 Negative condition code flag */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} APSR_Type; + +/* APSR Register Definitions */ +#define APSR_N_Pos 31U /*!< APSR: N Position */ +#define APSR_N_Msk (1UL << APSR_N_Pos) /*!< APSR: N Mask */ + +#define APSR_Z_Pos 30U /*!< APSR: Z Position */ +#define APSR_Z_Msk (1UL << APSR_Z_Pos) /*!< APSR: Z Mask */ + +#define APSR_C_Pos 29U /*!< APSR: C Position */ +#define APSR_C_Msk (1UL << APSR_C_Pos) /*!< APSR: C Mask */ + +#define APSR_V_Pos 28U /*!< APSR: V Position */ +#define APSR_V_Msk (1UL << APSR_V_Pos) /*!< APSR: V Mask */ + + +/** + \brief Union type to access the Interrupt Program Status Register (IPSR). + */ +typedef union +{ + struct + { + uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ + uint32_t _reserved0:23; /*!< bit: 9..31 Reserved */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} IPSR_Type; + +/* IPSR Register Definitions */ +#define IPSR_ISR_Pos 0U /*!< IPSR: ISR Position */ +#define IPSR_ISR_Msk (0x1FFUL /*<< IPSR_ISR_Pos*/) /*!< IPSR: ISR Mask */ + + +/** + \brief Union type to access the Special-Purpose Program Status Registers (xPSR). + */ +typedef union +{ + struct + { + uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ + uint32_t _reserved0:15; /*!< bit: 9..23 Reserved */ + uint32_t T:1; /*!< bit: 24 Thumb bit (read 0) */ + uint32_t _reserved1:3; /*!< bit: 25..27 Reserved */ + uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ + uint32_t C:1; /*!< bit: 29 Carry condition code flag */ + uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ + uint32_t N:1; /*!< bit: 31 Negative condition code flag */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} xPSR_Type; + +/* xPSR Register Definitions */ +#define xPSR_N_Pos 31U /*!< xPSR: N Position */ +#define xPSR_N_Msk (1UL << xPSR_N_Pos) /*!< xPSR: N Mask */ + +#define xPSR_Z_Pos 30U /*!< xPSR: Z Position */ +#define xPSR_Z_Msk (1UL << xPSR_Z_Pos) /*!< xPSR: Z Mask */ + +#define xPSR_C_Pos 29U /*!< xPSR: C Position */ +#define xPSR_C_Msk (1UL << xPSR_C_Pos) /*!< xPSR: C Mask */ + +#define xPSR_V_Pos 28U /*!< xPSR: V Position */ +#define xPSR_V_Msk (1UL << xPSR_V_Pos) /*!< xPSR: V Mask */ + +#define xPSR_T_Pos 24U /*!< xPSR: T Position */ +#define xPSR_T_Msk (1UL << xPSR_T_Pos) /*!< xPSR: T Mask */ + +#define xPSR_ISR_Pos 0U /*!< xPSR: ISR Position */ +#define xPSR_ISR_Msk (0x1FFUL /*<< xPSR_ISR_Pos*/) /*!< xPSR: ISR Mask */ + + +/** + \brief Union type to access the Control Registers (CONTROL). + */ +typedef union +{ + struct + { + uint32_t nPRIV:1; /*!< bit: 0 Execution privilege in Thread mode */ + uint32_t SPSEL:1; /*!< bit: 1 Stack to be used */ + uint32_t _reserved1:30; /*!< bit: 2..31 Reserved */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} CONTROL_Type; + +/* CONTROL Register Definitions */ +#define CONTROL_SPSEL_Pos 1U /*!< CONTROL: SPSEL Position */ +#define CONTROL_SPSEL_Msk (1UL << CONTROL_SPSEL_Pos) /*!< CONTROL: SPSEL Mask */ + +#define CONTROL_nPRIV_Pos 0U /*!< CONTROL: nPRIV Position */ +#define CONTROL_nPRIV_Msk (1UL /*<< CONTROL_nPRIV_Pos*/) /*!< CONTROL: nPRIV Mask */ + +/*@} end of group CMSIS_CORE */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_NVIC Nested Vectored Interrupt Controller (NVIC) + \brief Type definitions for the NVIC Registers + @{ + */ + +/** + \brief Structure type to access the Nested Vectored Interrupt Controller (NVIC). + */ +typedef struct +{ + __IOM uint32_t ISER[1U]; /*!< Offset: 0x000 (R/W) Interrupt Set Enable Register */ + uint32_t RESERVED0[31U]; + __IOM uint32_t ICER[1U]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register */ + uint32_t RSERVED1[31U]; + __IOM uint32_t ISPR[1U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */ + uint32_t RESERVED2[31U]; + __IOM uint32_t ICPR[1U]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register */ + uint32_t RESERVED3[31U]; + uint32_t RESERVED4[64U]; + __IOM uint32_t IP[8U]; /*!< Offset: 0x300 (R/W) Interrupt Priority Register */ +} NVIC_Type; + +/*@} end of group CMSIS_NVIC */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_SCB System Control Block (SCB) + \brief Type definitions for the System Control Block Registers + @{ + */ + +/** + \brief Structure type to access the System Control Block (SCB). + */ +typedef struct +{ + __IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */ + __IOM uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Register */ +#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U) + __IOM uint32_t VTOR; /*!< Offset: 0x008 (R/W) Vector Table Offset Register */ +#else + uint32_t RESERVED0; +#endif + __IOM uint32_t AIRCR; /*!< Offset: 0x00C (R/W) Application Interrupt and Reset Control Register */ + __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */ + __IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */ + uint32_t RESERVED1; + __IOM uint32_t SHP[2U]; /*!< Offset: 0x01C (R/W) System Handlers Priority Registers. [0] is RESERVED */ + __IOM uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State Register */ +} SCB_Type; + +/* SCB CPUID Register Definitions */ +#define SCB_CPUID_IMPLEMENTER_Pos 24U /*!< SCB CPUID: IMPLEMENTER Position */ +#define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB CPUID: IMPLEMENTER Mask */ + +#define SCB_CPUID_VARIANT_Pos 20U /*!< SCB CPUID: VARIANT Position */ +#define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) /*!< SCB CPUID: VARIANT Mask */ + +#define SCB_CPUID_ARCHITECTURE_Pos 16U /*!< SCB CPUID: ARCHITECTURE Position */ +#define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB CPUID: ARCHITECTURE Mask */ + +#define SCB_CPUID_PARTNO_Pos 4U /*!< SCB CPUID: PARTNO Position */ +#define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB CPUID: PARTNO Mask */ + +#define SCB_CPUID_REVISION_Pos 0U /*!< SCB CPUID: REVISION Position */ +#define SCB_CPUID_REVISION_Msk (0xFUL /*<< SCB_CPUID_REVISION_Pos*/) /*!< SCB CPUID: REVISION Mask */ + +/* SCB Interrupt Control State Register Definitions */ +#define SCB_ICSR_NMIPENDSET_Pos 31U /*!< SCB ICSR: NMIPENDSET Position */ +#define SCB_ICSR_NMIPENDSET_Msk (1UL << SCB_ICSR_NMIPENDSET_Pos) /*!< SCB ICSR: NMIPENDSET Mask */ + +#define SCB_ICSR_PENDSVSET_Pos 28U /*!< SCB ICSR: PENDSVSET Position */ +#define SCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos) /*!< SCB ICSR: PENDSVSET Mask */ + +#define SCB_ICSR_PENDSVCLR_Pos 27U /*!< SCB ICSR: PENDSVCLR Position */ +#define SCB_ICSR_PENDSVCLR_Msk (1UL << SCB_ICSR_PENDSVCLR_Pos) /*!< SCB ICSR: PENDSVCLR Mask */ + +#define SCB_ICSR_PENDSTSET_Pos 26U /*!< SCB ICSR: PENDSTSET Position */ +#define SCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos) /*!< SCB ICSR: PENDSTSET Mask */ + +#define SCB_ICSR_PENDSTCLR_Pos 25U /*!< SCB ICSR: PENDSTCLR Position */ +#define SCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos) /*!< SCB ICSR: PENDSTCLR Mask */ + +#define SCB_ICSR_ISRPREEMPT_Pos 23U /*!< SCB ICSR: ISRPREEMPT Position */ +#define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB ICSR: ISRPREEMPT Mask */ + +#define SCB_ICSR_ISRPENDING_Pos 22U /*!< SCB ICSR: ISRPENDING Position */ +#define SCB_ICSR_ISRPENDING_Msk (1UL << SCB_ICSR_ISRPENDING_Pos) /*!< SCB ICSR: ISRPENDING Mask */ + +#define SCB_ICSR_VECTPENDING_Pos 12U /*!< SCB ICSR: VECTPENDING Position */ +#define SCB_ICSR_VECTPENDING_Msk (0x1FFUL << SCB_ICSR_VECTPENDING_Pos) /*!< SCB ICSR: VECTPENDING Mask */ + +#define SCB_ICSR_VECTACTIVE_Pos 0U /*!< SCB ICSR: VECTACTIVE Position */ +#define SCB_ICSR_VECTACTIVE_Msk (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/) /*!< SCB ICSR: VECTACTIVE Mask */ + +#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U) +/* SCB Interrupt Control State Register Definitions */ +#define SCB_VTOR_TBLOFF_Pos 8U /*!< SCB VTOR: TBLOFF Position */ +#define SCB_VTOR_TBLOFF_Msk (0xFFFFFFUL << SCB_VTOR_TBLOFF_Pos) /*!< SCB VTOR: TBLOFF Mask */ +#endif + +/* SCB Application Interrupt and Reset Control Register Definitions */ +#define SCB_AIRCR_VECTKEY_Pos 16U /*!< SCB AIRCR: VECTKEY Position */ +#define SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos) /*!< SCB AIRCR: VECTKEY Mask */ + +#define SCB_AIRCR_VECTKEYSTAT_Pos 16U /*!< SCB AIRCR: VECTKEYSTAT Position */ +#define SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos) /*!< SCB AIRCR: VECTKEYSTAT Mask */ + +#define SCB_AIRCR_ENDIANESS_Pos 15U /*!< SCB AIRCR: ENDIANESS Position */ +#define SCB_AIRCR_ENDIANESS_Msk (1UL << SCB_AIRCR_ENDIANESS_Pos) /*!< SCB AIRCR: ENDIANESS Mask */ + +#define SCB_AIRCR_SYSRESETREQ_Pos 2U /*!< SCB AIRCR: SYSRESETREQ Position */ +#define SCB_AIRCR_SYSRESETREQ_Msk (1UL << SCB_AIRCR_SYSRESETREQ_Pos) /*!< SCB AIRCR: SYSRESETREQ Mask */ + +#define SCB_AIRCR_VECTCLRACTIVE_Pos 1U /*!< SCB AIRCR: VECTCLRACTIVE Position */ +#define SCB_AIRCR_VECTCLRACTIVE_Msk (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos) /*!< SCB AIRCR: VECTCLRACTIVE Mask */ + +/* SCB System Control Register Definitions */ +#define SCB_SCR_SEVONPEND_Pos 4U /*!< SCB SCR: SEVONPEND Position */ +#define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) /*!< SCB SCR: SEVONPEND Mask */ + +#define SCB_SCR_SLEEPDEEP_Pos 2U /*!< SCB SCR: SLEEPDEEP Position */ +#define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB SCR: SLEEPDEEP Mask */ + +#define SCB_SCR_SLEEPONEXIT_Pos 1U /*!< SCB SCR: SLEEPONEXIT Position */ +#define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB SCR: SLEEPONEXIT Mask */ + +/* SCB Configuration Control Register Definitions */ +#define SCB_CCR_STKALIGN_Pos 9U /*!< SCB CCR: STKALIGN Position */ +#define SCB_CCR_STKALIGN_Msk (1UL << SCB_CCR_STKALIGN_Pos) /*!< SCB CCR: STKALIGN Mask */ + +#define SCB_CCR_UNALIGN_TRP_Pos 3U /*!< SCB CCR: UNALIGN_TRP Position */ +#define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */ + +/* SCB System Handler Control and State Register Definitions */ +#define SCB_SHCSR_SVCALLPENDED_Pos 15U /*!< SCB SHCSR: SVCALLPENDED Position */ +#define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB SHCSR: SVCALLPENDED Mask */ + +/*@} end of group CMSIS_SCB */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_SysTick System Tick Timer (SysTick) + \brief Type definitions for the System Timer Registers. + @{ + */ + +/** + \brief Structure type to access the System Timer (SysTick). + */ +typedef struct +{ + __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Register */ + __IOM uint32_t LOAD; /*!< Offset: 0x004 (R/W) SysTick Reload Value Register */ + __IOM uint32_t VAL; /*!< Offset: 0x008 (R/W) SysTick Current Value Register */ + __IM uint32_t CALIB; /*!< Offset: 0x00C (R/ ) SysTick Calibration Register */ +} SysTick_Type; + +/* SysTick Control / Status Register Definitions */ +#define SysTick_CTRL_COUNTFLAG_Pos 16U /*!< SysTick CTRL: COUNTFLAG Position */ +#define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */ + +#define SysTick_CTRL_CLKSOURCE_Pos 2U /*!< SysTick CTRL: CLKSOURCE Position */ +#define SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */ + +#define SysTick_CTRL_TICKINT_Pos 1U /*!< SysTick CTRL: TICKINT Position */ +#define SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */ + +#define SysTick_CTRL_ENABLE_Pos 0U /*!< SysTick CTRL: ENABLE Position */ +#define SysTick_CTRL_ENABLE_Msk (1UL /*<< SysTick_CTRL_ENABLE_Pos*/) /*!< SysTick CTRL: ENABLE Mask */ + +/* SysTick Reload Register Definitions */ +#define SysTick_LOAD_RELOAD_Pos 0U /*!< SysTick LOAD: RELOAD Position */ +#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/) /*!< SysTick LOAD: RELOAD Mask */ + +/* SysTick Current Register Definitions */ +#define SysTick_VAL_CURRENT_Pos 0U /*!< SysTick VAL: CURRENT Position */ +#define SysTick_VAL_CURRENT_Msk (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/) /*!< SysTick VAL: CURRENT Mask */ + +/* SysTick Calibration Register Definitions */ +#define SysTick_CALIB_NOREF_Pos 31U /*!< SysTick CALIB: NOREF Position */ +#define SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */ + +#define SysTick_CALIB_SKEW_Pos 30U /*!< SysTick CALIB: SKEW Position */ +#define SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */ + +#define SysTick_CALIB_TENMS_Pos 0U /*!< SysTick CALIB: TENMS Position */ +#define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/) /*!< SysTick CALIB: TENMS Mask */ + +/*@} end of group CMSIS_SysTick */ + +#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_MPU Memory Protection Unit (MPU) + \brief Type definitions for the Memory Protection Unit (MPU) + @{ + */ + +/** + \brief Structure type to access the Memory Protection Unit (MPU). + */ +typedef struct +{ + __IM uint32_t TYPE; /*!< Offset: 0x000 (R/ ) MPU Type Register */ + __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */ + __IOM uint32_t RNR; /*!< Offset: 0x008 (R/W) MPU Region RNRber Register */ + __IOM uint32_t RBAR; /*!< Offset: 0x00C (R/W) MPU Region Base Address Register */ + __IOM uint32_t RASR; /*!< Offset: 0x010 (R/W) MPU Region Attribute and Size Register */ +} MPU_Type; + +/* MPU Type Register Definitions */ +#define MPU_TYPE_IREGION_Pos 16U /*!< MPU TYPE: IREGION Position */ +#define MPU_TYPE_IREGION_Msk (0xFFUL << MPU_TYPE_IREGION_Pos) /*!< MPU TYPE: IREGION Mask */ + +#define MPU_TYPE_DREGION_Pos 8U /*!< MPU TYPE: DREGION Position */ +#define MPU_TYPE_DREGION_Msk (0xFFUL << MPU_TYPE_DREGION_Pos) /*!< MPU TYPE: DREGION Mask */ + +#define MPU_TYPE_SEPARATE_Pos 0U /*!< MPU TYPE: SEPARATE Position */ +#define MPU_TYPE_SEPARATE_Msk (1UL /*<< MPU_TYPE_SEPARATE_Pos*/) /*!< MPU TYPE: SEPARATE Mask */ + +/* MPU Control Register Definitions */ +#define MPU_CTRL_PRIVDEFENA_Pos 2U /*!< MPU CTRL: PRIVDEFENA Position */ +#define MPU_CTRL_PRIVDEFENA_Msk (1UL << MPU_CTRL_PRIVDEFENA_Pos) /*!< MPU CTRL: PRIVDEFENA Mask */ + +#define MPU_CTRL_HFNMIENA_Pos 1U /*!< MPU CTRL: HFNMIENA Position */ +#define MPU_CTRL_HFNMIENA_Msk (1UL << MPU_CTRL_HFNMIENA_Pos) /*!< MPU CTRL: HFNMIENA Mask */ + +#define MPU_CTRL_ENABLE_Pos 0U /*!< MPU CTRL: ENABLE Position */ +#define MPU_CTRL_ENABLE_Msk (1UL /*<< MPU_CTRL_ENABLE_Pos*/) /*!< MPU CTRL: ENABLE Mask */ + +/* MPU Region Number Register Definitions */ +#define MPU_RNR_REGION_Pos 0U /*!< MPU RNR: REGION Position */ +#define MPU_RNR_REGION_Msk (0xFFUL /*<< MPU_RNR_REGION_Pos*/) /*!< MPU RNR: REGION Mask */ + +/* MPU Region Base Address Register Definitions */ +#define MPU_RBAR_ADDR_Pos 8U /*!< MPU RBAR: ADDR Position */ +#define MPU_RBAR_ADDR_Msk (0xFFFFFFUL << MPU_RBAR_ADDR_Pos) /*!< MPU RBAR: ADDR Mask */ + +#define MPU_RBAR_VALID_Pos 4U /*!< MPU RBAR: VALID Position */ +#define MPU_RBAR_VALID_Msk (1UL << MPU_RBAR_VALID_Pos) /*!< MPU RBAR: VALID Mask */ + +#define MPU_RBAR_REGION_Pos 0U /*!< MPU RBAR: REGION Position */ +#define MPU_RBAR_REGION_Msk (0xFUL /*<< MPU_RBAR_REGION_Pos*/) /*!< MPU RBAR: REGION Mask */ + +/* MPU Region Attribute and Size Register Definitions */ +#define MPU_RASR_ATTRS_Pos 16U /*!< MPU RASR: MPU Region Attribute field Position */ +#define MPU_RASR_ATTRS_Msk (0xFFFFUL << MPU_RASR_ATTRS_Pos) /*!< MPU RASR: MPU Region Attribute field Mask */ + +#define MPU_RASR_XN_Pos 28U /*!< MPU RASR: ATTRS.XN Position */ +#define MPU_RASR_XN_Msk (1UL << MPU_RASR_XN_Pos) /*!< MPU RASR: ATTRS.XN Mask */ + +#define MPU_RASR_AP_Pos 24U /*!< MPU RASR: ATTRS.AP Position */ +#define MPU_RASR_AP_Msk (0x7UL << MPU_RASR_AP_Pos) /*!< MPU RASR: ATTRS.AP Mask */ + +#define MPU_RASR_TEX_Pos 19U /*!< MPU RASR: ATTRS.TEX Position */ +#define MPU_RASR_TEX_Msk (0x7UL << MPU_RASR_TEX_Pos) /*!< MPU RASR: ATTRS.TEX Mask */ + +#define MPU_RASR_S_Pos 18U /*!< MPU RASR: ATTRS.S Position */ +#define MPU_RASR_S_Msk (1UL << MPU_RASR_S_Pos) /*!< MPU RASR: ATTRS.S Mask */ + +#define MPU_RASR_C_Pos 17U /*!< MPU RASR: ATTRS.C Position */ +#define MPU_RASR_C_Msk (1UL << MPU_RASR_C_Pos) /*!< MPU RASR: ATTRS.C Mask */ + +#define MPU_RASR_B_Pos 16U /*!< MPU RASR: ATTRS.B Position */ +#define MPU_RASR_B_Msk (1UL << MPU_RASR_B_Pos) /*!< MPU RASR: ATTRS.B Mask */ + +#define MPU_RASR_SRD_Pos 8U /*!< MPU RASR: Sub-Region Disable Position */ +#define MPU_RASR_SRD_Msk (0xFFUL << MPU_RASR_SRD_Pos) /*!< MPU RASR: Sub-Region Disable Mask */ + +#define MPU_RASR_SIZE_Pos 1U /*!< MPU RASR: Region Size Field Position */ +#define MPU_RASR_SIZE_Msk (0x1FUL << MPU_RASR_SIZE_Pos) /*!< MPU RASR: Region Size Field Mask */ + +#define MPU_RASR_ENABLE_Pos 0U /*!< MPU RASR: Region enable bit Position */ +#define MPU_RASR_ENABLE_Msk (1UL /*<< MPU_RASR_ENABLE_Pos*/) /*!< MPU RASR: Region enable bit Disable Mask */ + +/*@} end of group CMSIS_MPU */ +#endif + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_CoreDebug Core Debug Registers (CoreDebug) + \brief Cortex-M0+ Core Debug Registers (DCB registers, SHCSR, and DFSR) are only accessible over DAP and not via processor. + Therefore they are not covered by the Cortex-M0+ header file. + @{ + */ +/*@} end of group CMSIS_CoreDebug */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_core_bitfield Core register bit field macros + \brief Macros for use with bit field definitions (xxx_Pos, xxx_Msk). + @{ + */ + +/** + \brief Mask and shift a bit field value for use in a register bit range. + \param[in] field Name of the register bit field. + \param[in] value Value of the bit field. This parameter is interpreted as an uint32_t type. + \return Masked and shifted value. +*/ +#define _VAL2FLD(field, value) (((uint32_t)(value) << field ## _Pos) & field ## _Msk) + +/** + \brief Mask and shift a register value to extract a bit filed value. + \param[in] field Name of the register bit field. + \param[in] value Value of register. This parameter is interpreted as an uint32_t type. + \return Masked and shifted bit field value. +*/ +#define _FLD2VAL(field, value) (((uint32_t)(value) & field ## _Msk) >> field ## _Pos) + +/*@} end of group CMSIS_core_bitfield */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_core_base Core Definitions + \brief Definitions for base addresses, unions, and structures. + @{ + */ + +/* Memory mapping of Cortex-M0+ Hardware */ +#define SCS_BASE (0xE000E000UL) /*!< System Control Space Base Address */ +#define SysTick_BASE (SCS_BASE + 0x0010UL) /*!< SysTick Base Address */ +#define NVIC_BASE (SCS_BASE + 0x0100UL) /*!< NVIC Base Address */ +#define SCB_BASE (SCS_BASE + 0x0D00UL) /*!< System Control Block Base Address */ + +#define SCB ((SCB_Type *) SCB_BASE ) /*!< SCB configuration struct */ +#define SysTick ((SysTick_Type *) SysTick_BASE ) /*!< SysTick configuration struct */ +#define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration struct */ + +#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) + #define MPU_BASE (SCS_BASE + 0x0D90UL) /*!< Memory Protection Unit */ + #define MPU ((MPU_Type *) MPU_BASE ) /*!< Memory Protection Unit */ +#endif + +/*@} */ + + + +/******************************************************************************* + * Hardware Abstraction Layer + Core Function Interface contains: + - Core NVIC Functions + - Core SysTick Functions + - Core Register Access Functions + ******************************************************************************/ +/** + \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference +*/ + + + +/* ########################## NVIC functions #################################### */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_NVICFunctions NVIC Functions + \brief Functions that manage interrupts and exceptions via the NVIC. + @{ + */ + +/* Interrupt Priorities are WORD accessible only under ARMv6M */ +/* The following MACROS handle generation of the register offset and byte masks */ +#define _BIT_SHIFT(IRQn) ( ((((uint32_t)(int32_t)(IRQn)) ) & 0x03UL) * 8UL) +#define _SHP_IDX(IRQn) ( (((((uint32_t)(int32_t)(IRQn)) & 0x0FUL)-8UL) >> 2UL) ) +#define _IP_IDX(IRQn) ( (((uint32_t)(int32_t)(IRQn)) >> 2UL) ) + + +/** + \brief Enable Interrupt + \details Enables a device specific interrupt in the NVIC interrupt controller. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be nagative. + */ +__STATIC_INLINE void NVIC_EnableIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->ISER[0U] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL)); + } +} + + +/** + \brief Disable Interrupt + \details Disables a device specific interrupt in the NVIC interrupt controller. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be nagative. + */ +__STATIC_INLINE void NVIC_DisableIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->ICER[0U] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL)); + } +} + + +/** + \brief Get Pending Interrupt + \details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt. + \param [in] IRQn Device specific interrupt number. + \return 0 Interrupt status is not pending. + \return 1 Interrupt status is pending. + \note IRQn must not be nagative. + */ +__STATIC_INLINE uint32_t NVIC_GetPendingIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC->ISPR[0U] & (1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +/** + \brief Set Pending Interrupt + \details Sets the pending bit of a device specific interrupt in the NVIC pending register. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be nagative. + */ +__STATIC_INLINE void NVIC_SetPendingIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->ISPR[0U] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL)); + } +} + + +/** + \brief Clear Pending Interrupt + \details Clears the pending bit of a device specific interrupt in the NVIC pending register. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be nagative. + */ +__STATIC_INLINE void NVIC_ClearPendingIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->ICPR[0U] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL)); + } +} + + +/** + \brief Set Interrupt Priority + \details Sets the priority of a device specific interrupt or a processor exception. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + \param [in] IRQn Interrupt number. + \param [in] priority Priority to set. + \note The priority cannot be set for every processor exception. + */ +__STATIC_INLINE void NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->IP[_IP_IDX(IRQn)] = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | + (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); + } + else + { + SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | + (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); + } +} + + +/** + \brief Get Interrupt Priority + \details Reads the priority of a device specific interrupt or a processor exception. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + \param [in] IRQn Interrupt number. + \return Interrupt Priority. + Value is aligned automatically to the implemented priority bits of the microcontroller. + */ +__STATIC_INLINE uint32_t NVIC_GetPriority(IRQn_Type IRQn) +{ + + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC->IP[ _IP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS))); + } + else + { + return((uint32_t)(((SCB->SHP[_SHP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS))); + } +} + + +/** + \brief System Reset + \details Initiates a system reset request to reset the MCU. + */ +__STATIC_INLINE void NVIC_SystemReset(void) +{ + __DSB(); /* Ensure all outstanding memory accesses included + buffered write are completed before reset */ + SCB->AIRCR = ((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | + SCB_AIRCR_SYSRESETREQ_Msk); + __DSB(); /* Ensure completion of memory access */ + + for(;;) /* wait until reset */ + { + __NOP(); + } +} + +/*@} end of CMSIS_Core_NVICFunctions */ + + +/* ########################## FPU functions #################################### */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_FpuFunctions FPU Functions + \brief Function that provides FPU type. + @{ + */ + +/** + \brief get FPU type + \details returns the FPU type + \returns + - \b 0: No FPU + - \b 1: Single precision FPU + - \b 2: Double + Single precision FPU + */ +__STATIC_INLINE uint32_t SCB_GetFPUType(void) +{ + return 0U; /* No FPU */ +} + + +/*@} end of CMSIS_Core_FpuFunctions */ + + + +/* ################################## SysTick function ############################################ */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_SysTickFunctions SysTick Functions + \brief Functions that configure the System. + @{ + */ + +#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U) + +/** + \brief System Tick Configuration + \details Initializes the System Timer and its interrupt, and starts the System Tick Timer. + Counter is in free running mode to generate periodic interrupts. + \param [in] ticks Number of ticks between two interrupts. + \return 0 Function succeeded. + \return 1 Function failed. + \note When the variable __Vendor_SysTickConfig is set to 1, then the + function SysTick_Config is not included. In this case, the file device.h + must contain a vendor-specific implementation of this function. + */ +__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) +{ + if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) + { + return (1UL); /* Reload value impossible */ + } + + SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ + NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ + SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ + SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | + SysTick_CTRL_TICKINT_Msk | + SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ + return (0UL); /* Function successful */ +} + +#endif + +/*@} end of CMSIS_Core_SysTickFunctions */ + + + + +#ifdef __cplusplus +} +#endif + +#endif /* __CORE_CM0PLUS_H_DEPENDANT */ + +#endif /* __CMSIS_GENERIC */ diff --git a/code_boot_out/sdk/Drivers/CMSIS/Device/FM/FM33xx/Include/core_cmFunc.h b/code_boot_out/sdk/Drivers/CMSIS/Device/FM/FM33xx/Include/core_cmFunc.h new file mode 100644 index 0000000..b6ad0a4 --- /dev/null +++ b/code_boot_out/sdk/Drivers/CMSIS/Device/FM/FM33xx/Include/core_cmFunc.h @@ -0,0 +1,664 @@ +/**************************************************************************//** + * @file core_cmFunc.h + * @brief CMSIS Cortex-M Core Function Access Header File + * @version V4.10 + * @date 18. March 2015 + * + * @note + * + ******************************************************************************/ +/* Copyright (c) 2009 - 2015 ARM LIMITED + + All rights reserved. + Redistribution and use in source and binary forms, with or without + modification, are permitted provided that the following conditions are met: + - Redistributions of source code must retain the above copyright + notice, this list of conditions and the following disclaimer. + - Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the + documentation and/or other materials provided with the distribution. + - Neither the name of ARM nor the names of its contributors may be used + to endorse or promote products derived from this software without + specific prior written permission. + * + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE + LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + POSSIBILITY OF SUCH DAMAGE. + ---------------------------------------------------------------------------*/ + + +#ifndef __CORE_CMFUNC_H +#define __CORE_CMFUNC_H + + +/* ########################### Core Function Access ########################### */ +/** \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions + @{ + */ + +#if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/ +/* ARM armcc specific functions */ + +#if (__ARMCC_VERSION < 400677) + #error "Please use ARM Compiler Toolchain V4.0.677 or later!" +#endif + +/* intrinsic void __enable_irq(); */ +/* intrinsic void __disable_irq(); */ + +/** \brief Get Control Register + + This function returns the content of the Control Register. + + \return Control Register value + */ +__STATIC_INLINE uint32_t __get_CONTROL(void) +{ + register uint32_t __regControl __ASM("control"); + return(__regControl); +} + + +/** \brief Set Control Register + + This function writes the given value to the Control Register. + + \param [in] control Control Register value to set + */ +__STATIC_INLINE void __set_CONTROL(uint32_t control) +{ + register uint32_t __regControl __ASM("control"); + __regControl = control; +} + + +/** \brief Get IPSR Register + + This function returns the content of the IPSR Register. + + \return IPSR Register value + */ +__STATIC_INLINE uint32_t __get_IPSR(void) +{ + register uint32_t __regIPSR __ASM("ipsr"); + return(__regIPSR); +} + + +/** \brief Get APSR Register + + This function returns the content of the APSR Register. + + \return APSR Register value + */ +__STATIC_INLINE uint32_t __get_APSR(void) +{ + register uint32_t __regAPSR __ASM("apsr"); + return(__regAPSR); +} + + +/** \brief Get xPSR Register + + This function returns the content of the xPSR Register. + + \return xPSR Register value + */ +__STATIC_INLINE uint32_t __get_xPSR(void) +{ + register uint32_t __regXPSR __ASM("xpsr"); + return(__regXPSR); +} + + +/** \brief Get Process Stack Pointer + + This function returns the current value of the Process Stack Pointer (PSP). + + \return PSP Register value + */ +__STATIC_INLINE uint32_t __get_PSP(void) +{ + register uint32_t __regProcessStackPointer __ASM("psp"); + return(__regProcessStackPointer); +} + + +/** \brief Set Process Stack Pointer + + This function assigns the given value to the Process Stack Pointer (PSP). + + \param [in] topOfProcStack Process Stack Pointer value to set + */ +__STATIC_INLINE void __set_PSP(uint32_t topOfProcStack) +{ + register uint32_t __regProcessStackPointer __ASM("psp"); + __regProcessStackPointer = topOfProcStack; +} + + +/** \brief Get Main Stack Pointer + + This function returns the current value of the Main Stack Pointer (MSP). + + \return MSP Register value + */ +__STATIC_INLINE uint32_t __get_MSP(void) +{ + register uint32_t __regMainStackPointer __ASM("msp"); + return(__regMainStackPointer); +} + + +/** \brief Set Main Stack Pointer + + This function assigns the given value to the Main Stack Pointer (MSP). + + \param [in] topOfMainStack Main Stack Pointer value to set + */ +__STATIC_INLINE void __set_MSP(uint32_t topOfMainStack) +{ + register uint32_t __regMainStackPointer __ASM("msp"); + __regMainStackPointer = topOfMainStack; +} + + +/** \brief Get Priority Mask + + This function returns the current state of the priority mask bit from the Priority Mask Register. + + \return Priority Mask value + */ +__STATIC_INLINE uint32_t __get_PRIMASK(void) +{ + register uint32_t __regPriMask __ASM("primask"); + return(__regPriMask); +} + + +/** \brief Set Priority Mask + + This function assigns the given value to the Priority Mask Register. + + \param [in] priMask Priority Mask + */ +__STATIC_INLINE void __set_PRIMASK(uint32_t priMask) +{ + register uint32_t __regPriMask __ASM("primask"); + __regPriMask = (priMask); +} + + +#if (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300) + +/** \brief Enable FIQ + + This function enables FIQ interrupts by clearing the F-bit in the CPSR. + Can only be executed in Privileged modes. + */ +#define __enable_fault_irq __enable_fiq + + +/** \brief Disable FIQ + + This function disables FIQ interrupts by setting the F-bit in the CPSR. + Can only be executed in Privileged modes. + */ +#define __disable_fault_irq __disable_fiq + + +/** \brief Get Base Priority + + This function returns the current value of the Base Priority register. + + \return Base Priority register value + */ +__STATIC_INLINE uint32_t __get_BASEPRI(void) +{ + register uint32_t __regBasePri __ASM("basepri"); + return(__regBasePri); +} + + +/** \brief Set Base Priority + + This function assigns the given value to the Base Priority register. + + \param [in] basePri Base Priority value to set + */ +__STATIC_INLINE void __set_BASEPRI(uint32_t basePri) +{ + register uint32_t __regBasePri __ASM("basepri"); + __regBasePri = (basePri & 0xff); +} + + +/** \brief Set Base Priority with condition + + This function assigns the given value to the Base Priority register only if BASEPRI masking is disabled, + or the new value increases the BASEPRI priority level. + + \param [in] basePri Base Priority value to set + */ +__STATIC_INLINE void __set_BASEPRI_MAX(uint32_t basePri) +{ + register uint32_t __regBasePriMax __ASM("basepri_max"); + __regBasePriMax = (basePri & 0xff); +} + + +/** \brief Get Fault Mask + + This function returns the current value of the Fault Mask register. + + \return Fault Mask register value + */ +__STATIC_INLINE uint32_t __get_FAULTMASK(void) +{ + register uint32_t __regFaultMask __ASM("faultmask"); + return(__regFaultMask); +} + + +/** \brief Set Fault Mask + + This function assigns the given value to the Fault Mask register. + + \param [in] faultMask Fault Mask value to set + */ +__STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask) +{ + register uint32_t __regFaultMask __ASM("faultmask"); + __regFaultMask = (faultMask & (uint32_t)1); +} + +#endif /* (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300) */ + + +#if (__CORTEX_M == 0x04) || (__CORTEX_M == 0x07) + +/** \brief Get FPSCR + + This function returns the current value of the Floating Point Status/Control register. + + \return Floating Point Status/Control register value + */ +__STATIC_INLINE uint32_t __get_FPSCR(void) +{ +#if (__FPU_PRESENT == 1) && (__FPU_USED == 1) + register uint32_t __regfpscr __ASM("fpscr"); + return(__regfpscr); +#else + return(0); +#endif +} + + +/** \brief Set FPSCR + + This function assigns the given value to the Floating Point Status/Control register. + + \param [in] fpscr Floating Point Status/Control value to set + */ +__STATIC_INLINE void __set_FPSCR(uint32_t fpscr) +{ +#if (__FPU_PRESENT == 1) && (__FPU_USED == 1) + register uint32_t __regfpscr __ASM("fpscr"); + __regfpscr = (fpscr); +#endif +} + +#endif /* (__CORTEX_M == 0x04) || (__CORTEX_M == 0x07) */ + + +#elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/ +/* GNU gcc specific functions */ + +/** \brief Enable IRQ Interrupts + + This function enables IRQ interrupts by clearing the I-bit in the CPSR. + Can only be executed in Privileged modes. + */ +__attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_irq(void) +{ + __ASM volatile ("cpsie i" : : : "memory"); +} + + +/** \brief Disable IRQ Interrupts + + This function disables IRQ interrupts by setting the I-bit in the CPSR. + Can only be executed in Privileged modes. + */ +__attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_irq(void) +{ + __ASM volatile ("cpsid i" : : : "memory"); +} + + +/** \brief Get Control Register + + This function returns the content of the Control Register. + + \return Control Register value + */ +__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_CONTROL(void) +{ + uint32_t result; + + __ASM volatile ("MRS %0, control" : "=r" (result) ); + return(result); +} + + +/** \brief Set Control Register + + This function writes the given value to the Control Register. + + \param [in] control Control Register value to set + */ +__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_CONTROL(uint32_t control) +{ + __ASM volatile ("MSR control, %0" : : "r" (control) : "memory"); +} + + +/** \brief Get IPSR Register + + This function returns the content of the IPSR Register. + + \return IPSR Register value + */ +__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_IPSR(void) +{ + uint32_t result; + + __ASM volatile ("MRS %0, ipsr" : "=r" (result) ); + return(result); +} + + +/** \brief Get APSR Register + + This function returns the content of the APSR Register. + + \return APSR Register value + */ +__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_APSR(void) +{ + uint32_t result; + + __ASM volatile ("MRS %0, apsr" : "=r" (result) ); + return(result); +} + + +/** \brief Get xPSR Register + + This function returns the content of the xPSR Register. + + \return xPSR Register value + */ +__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_xPSR(void) +{ + uint32_t result; + + __ASM volatile ("MRS %0, xpsr" : "=r" (result) ); + return(result); +} + + +/** \brief Get Process Stack Pointer + + This function returns the current value of the Process Stack Pointer (PSP). + + \return PSP Register value + */ +__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_PSP(void) +{ + register uint32_t result; + + __ASM volatile ("MRS %0, psp\n" : "=r" (result) ); + return(result); +} + + +/** \brief Set Process Stack Pointer + + This function assigns the given value to the Process Stack Pointer (PSP). + + \param [in] topOfProcStack Process Stack Pointer value to set + */ +__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_PSP(uint32_t topOfProcStack) +{ + __ASM volatile ("MSR psp, %0\n" : : "r" (topOfProcStack) : "sp"); +} + + +/** \brief Get Main Stack Pointer + + This function returns the current value of the Main Stack Pointer (MSP). + + \return MSP Register value + */ +__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_MSP(void) +{ + register uint32_t result; + + __ASM volatile ("MRS %0, msp\n" : "=r" (result) ); + return(result); +} + + +/** \brief Set Main Stack Pointer + + This function assigns the given value to the Main Stack Pointer (MSP). + + \param [in] topOfMainStack Main Stack Pointer value to set + */ +__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_MSP(uint32_t topOfMainStack) +{ + __ASM volatile ("MSR msp, %0\n" : : "r" (topOfMainStack) : "sp"); +} + + +/** \brief Get Priority Mask + + This function returns the current state of the priority mask bit from the Priority Mask Register. + + \return Priority Mask value + */ +__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_PRIMASK(void) +{ + uint32_t result; + + __ASM volatile ("MRS %0, primask" : "=r" (result) ); + return(result); +} + + +/** \brief Set Priority Mask + + This function assigns the given value to the Priority Mask Register. + + \param [in] priMask Priority Mask + */ +__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_PRIMASK(uint32_t priMask) +{ + __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); +} + + +#if (__CORTEX_M >= 0x03) + +/** \brief Enable FIQ + + This function enables FIQ interrupts by clearing the F-bit in the CPSR. + Can only be executed in Privileged modes. + */ +__attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_fault_irq(void) +{ + __ASM volatile ("cpsie f" : : : "memory"); +} + + +/** \brief Disable FIQ + + This function disables FIQ interrupts by setting the F-bit in the CPSR. + Can only be executed in Privileged modes. + */ +__attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_fault_irq(void) +{ + __ASM volatile ("cpsid f" : : : "memory"); +} + + +/** \brief Get Base Priority + + This function returns the current value of the Base Priority register. + + \return Base Priority register value + */ +__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_BASEPRI(void) +{ + uint32_t result; + + __ASM volatile ("MRS %0, basepri" : "=r" (result) ); + return(result); +} + + +/** \brief Set Base Priority + + This function assigns the given value to the Base Priority register. + + \param [in] basePri Base Priority value to set + */ +__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_BASEPRI(uint32_t value) +{ + __ASM volatile ("MSR basepri, %0" : : "r" (value) : "memory"); +} + + +/** \brief Set Base Priority with condition + + This function assigns the given value to the Base Priority register only if BASEPRI masking is disabled, + or the new value increases the BASEPRI priority level. + + \param [in] basePri Base Priority value to set + */ +__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_BASEPRI_MAX(uint32_t value) +{ + __ASM volatile ("MSR basepri_max, %0" : : "r" (value) : "memory"); +} + + +/** \brief Get Fault Mask + + This function returns the current value of the Fault Mask register. + + \return Fault Mask register value + */ +__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_FAULTMASK(void) +{ + uint32_t result; + + __ASM volatile ("MRS %0, faultmask" : "=r" (result) ); + return(result); +} + + +/** \brief Set Fault Mask + + This function assigns the given value to the Fault Mask register. + + \param [in] faultMask Fault Mask value to set + */ +__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask) +{ + __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory"); +} + +#endif /* (__CORTEX_M >= 0x03) */ + + +#if (__CORTEX_M == 0x04) || (__CORTEX_M == 0x07) + +/** \brief Get FPSCR + + This function returns the current value of the Floating Point Status/Control register. + + \return Floating Point Status/Control register value + */ +__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_FPSCR(void) +{ +#if (__FPU_PRESENT == 1) && (__FPU_USED == 1) + uint32_t result; + + /* Empty asm statement works as a scheduling barrier */ + __ASM volatile (""); + __ASM volatile ("VMRS %0, fpscr" : "=r" (result) ); + __ASM volatile (""); + return(result); +#else + return(0); +#endif +} + + +/** \brief Set FPSCR + + This function assigns the given value to the Floating Point Status/Control register. + + \param [in] fpscr Floating Point Status/Control value to set + */ +__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_FPSCR(uint32_t fpscr) +{ +#if (__FPU_PRESENT == 1) && (__FPU_USED == 1) + /* Empty asm statement works as a scheduling barrier */ + __ASM volatile (""); + __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc"); + __ASM volatile (""); +#endif +} + +#endif /* (__CORTEX_M == 0x04) || (__CORTEX_M == 0x07) */ + + +#elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/ +/* IAR iccarm specific functions */ +#include + + +#elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/ +/* TI CCS specific functions */ +#include + + +#elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/ +/* TASKING carm specific functions */ +/* + * The CMSIS functions have been implemented as intrinsics in the compiler. + * Please use "carm -?i" to get an up to date list of all intrinsics, + * Including the CMSIS ones. + */ + + +#elif defined ( __CSMC__ ) /*------------------ COSMIC Compiler -------------------*/ +/* Cosmic specific functions */ +#include + +#endif + +/*@} end of CMSIS_Core_RegAccFunctions */ + +#endif /* __CORE_CMFUNC_H */ diff --git a/code_boot_out/sdk/Drivers/CMSIS/Device/FM/FM33xx/Include/core_cmInstr.h b/code_boot_out/sdk/Drivers/CMSIS/Device/FM/FM33xx/Include/core_cmInstr.h new file mode 100644 index 0000000..fca425c --- /dev/null +++ b/code_boot_out/sdk/Drivers/CMSIS/Device/FM/FM33xx/Include/core_cmInstr.h @@ -0,0 +1,916 @@ +/**************************************************************************//** + * @file core_cmInstr.h + * @brief CMSIS Cortex-M Core Instruction Access Header File + * @version V4.10 + * @date 18. March 2015 + * + * @note + * + ******************************************************************************/ +/* Copyright (c) 2009 - 2014 ARM LIMITED + + All rights reserved. + Redistribution and use in source and binary forms, with or without + modification, are permitted provided that the following conditions are met: + - Redistributions of source code must retain the above copyright + notice, this list of conditions and the following disclaimer. + - Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the + documentation and/or other materials provided with the distribution. + - Neither the name of ARM nor the names of its contributors may be used + to endorse or promote products derived from this software without + specific prior written permission. + * + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE + LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + POSSIBILITY OF SUCH DAMAGE. + ---------------------------------------------------------------------------*/ + + +#ifndef __CORE_CMINSTR_H +#define __CORE_CMINSTR_H + + +/* ########################## Core Instruction Access ######################### */ +/** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface + Access to dedicated instructions + @{ +*/ + +#if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/ +/* ARM armcc specific functions */ + +#if (__ARMCC_VERSION < 400677) + #error "Please use ARM Compiler Toolchain V4.0.677 or later!" +#endif + + +/** \brief No Operation + + No Operation does nothing. This instruction can be used for code alignment purposes. + */ +#define __NOP __nop + + +/** \brief Wait For Interrupt + + Wait For Interrupt is a hint instruction that suspends execution + until one of a number of events occurs. + */ +#define __WFI __wfi + + +/** \brief Wait For Event + + Wait For Event is a hint instruction that permits the processor to enter + a low-power state until one of a number of events occurs. + */ +#define __WFE __wfe + + +/** \brief Send Event + + Send Event is a hint instruction. It causes an event to be signaled to the CPU. + */ +#define __SEV __sev + + +/** \brief Instruction Synchronization Barrier + + Instruction Synchronization Barrier flushes the pipeline in the processor, + so that all instructions following the ISB are fetched from cache or + memory, after the instruction has been completed. + */ +#define __ISB() do {\ + __schedule_barrier();\ + __isb(0xF);\ + __schedule_barrier();\ + } while (0) + +/** \brief Data Synchronization Barrier + + This function acts as a special kind of Data Memory Barrier. + It completes when all explicit memory accesses before this instruction complete. + */ +#define __DSB() do {\ + __schedule_barrier();\ + __dsb(0xF);\ + __schedule_barrier();\ + } while (0) + +/** \brief Data Memory Barrier + + This function ensures the apparent order of the explicit memory operations before + and after the instruction, without ensuring their completion. + */ +#define __DMB() do {\ + __schedule_barrier();\ + __dmb(0xF);\ + __schedule_barrier();\ + } while (0) + +/** \brief Reverse byte order (32 bit) + + This function reverses the byte order in integer value. + + \param [in] value Value to reverse + \return Reversed value + */ +#define __REV __rev + + +/** \brief Reverse byte order (16 bit) + + This function reverses the byte order in two unsigned short values. + + \param [in] value Value to reverse + \return Reversed value + */ +#ifndef __NO_EMBEDDED_ASM +__attribute__((section(".rev16_text"))) __STATIC_INLINE __ASM uint32_t __REV16(uint32_t value) +{ + rev16 r0, r0 + bx lr +} +#endif + +/** \brief Reverse byte order in signed short value + + This function reverses the byte order in a signed short value with sign extension to integer. + + \param [in] value Value to reverse + \return Reversed value + */ +#ifndef __NO_EMBEDDED_ASM +__attribute__((section(".revsh_text"))) __STATIC_INLINE __ASM int32_t __REVSH(int32_t value) +{ + revsh r0, r0 + bx lr +} +#endif + + +/** \brief Rotate Right in unsigned value (32 bit) + + This function Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits. + + \param [in] value Value to rotate + \param [in] value Number of Bits to rotate + \return Rotated value + */ +#define __ROR __ror + + +/** \brief Breakpoint + + This function causes the processor to enter Debug state. + Debug tools can use this to investigate system state when the instruction at a particular address is reached. + + \param [in] value is ignored by the processor. + If required, a debugger can use it to store additional information about the breakpoint. + */ +#define __BKPT(value) __breakpoint(value) + + +/** \brief Reverse bit order of value + + This function reverses the bit order of the given value. + + \param [in] value Value to reverse + \return Reversed value + */ +#if (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300) + #define __RBIT __rbit +#else +__attribute__((always_inline)) __STATIC_INLINE uint32_t __RBIT(uint32_t value) +{ + uint32_t result; + int32_t s = 4 /*sizeof(v)*/ * 8 - 1; // extra shift needed at end + + result = value; // r will be reversed bits of v; first get LSB of v + for (value >>= 1; value; value >>= 1) + { + result <<= 1; + result |= value & 1; + s--; + } + result <<= s; // shift when v's highest bits are zero + return(result); +} +#endif + + +/** \brief Count leading zeros + + This function counts the number of leading zeros of a data value. + + \param [in] value Value to count the leading zeros + \return number of leading zeros in value + */ +#define __CLZ __clz + + +#if (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300) + +/** \brief LDR Exclusive (8 bit) + + This function executes a exclusive LDR instruction for 8 bit value. + + \param [in] ptr Pointer to data + \return value of type uint8_t at (*ptr) + */ +#define __LDREXB(ptr) ((uint8_t ) __ldrex(ptr)) + + +/** \brief LDR Exclusive (16 bit) + + This function executes a exclusive LDR instruction for 16 bit values. + + \param [in] ptr Pointer to data + \return value of type uint16_t at (*ptr) + */ +#define __LDREXH(ptr) ((uint16_t) __ldrex(ptr)) + + +/** \brief LDR Exclusive (32 bit) + + This function executes a exclusive LDR instruction for 32 bit values. + + \param [in] ptr Pointer to data + \return value of type uint32_t at (*ptr) + */ +#define __LDREXW(ptr) ((uint32_t ) __ldrex(ptr)) + + +/** \brief STR Exclusive (8 bit) + + This function executes a exclusive STR instruction for 8 bit values. + + \param [in] value Value to store + \param [in] ptr Pointer to location + \return 0 Function succeeded + \return 1 Function failed + */ +#define __STREXB(value, ptr) __strex(value, ptr) + + +/** \brief STR Exclusive (16 bit) + + This function executes a exclusive STR instruction for 16 bit values. + + \param [in] value Value to store + \param [in] ptr Pointer to location + \return 0 Function succeeded + \return 1 Function failed + */ +#define __STREXH(value, ptr) __strex(value, ptr) + + +/** \brief STR Exclusive (32 bit) + + This function executes a exclusive STR instruction for 32 bit values. + + \param [in] value Value to store + \param [in] ptr Pointer to location + \return 0 Function succeeded + \return 1 Function failed + */ +#define __STREXW(value, ptr) __strex(value, ptr) + + +/** \brief Remove the exclusive lock + + This function removes the exclusive lock which is created by LDREX. + + */ +#define __CLREX __clrex + + +/** \brief Signed Saturate + + This function saturates a signed value. + + \param [in] value Value to be saturated + \param [in] sat Bit position to saturate to (1..32) + \return Saturated value + */ +#define __SSAT __ssat + + +/** \brief Unsigned Saturate + + This function saturates an unsigned value. + + \param [in] value Value to be saturated + \param [in] sat Bit position to saturate to (0..31) + \return Saturated value + */ +#define __USAT __usat + + +/** \brief Rotate Right with Extend (32 bit) + + This function moves each bit of a bitstring right by one bit. + The carry input is shifted in at the left end of the bitstring. + + \param [in] value Value to rotate + \return Rotated value + */ +#ifndef __NO_EMBEDDED_ASM +__attribute__((section(".rrx_text"))) __STATIC_INLINE __ASM uint32_t __RRX(uint32_t value) +{ + rrx r0, r0 + bx lr +} +#endif + + +/** \brief LDRT Unprivileged (8 bit) + + This function executes a Unprivileged LDRT instruction for 8 bit value. + + \param [in] ptr Pointer to data + \return value of type uint8_t at (*ptr) + */ +#define __LDRBT(ptr) ((uint8_t ) __ldrt(ptr)) + + +/** \brief LDRT Unprivileged (16 bit) + + This function executes a Unprivileged LDRT instruction for 16 bit values. + + \param [in] ptr Pointer to data + \return value of type uint16_t at (*ptr) + */ +#define __LDRHT(ptr) ((uint16_t) __ldrt(ptr)) + + +/** \brief LDRT Unprivileged (32 bit) + + This function executes a Unprivileged LDRT instruction for 32 bit values. + + \param [in] ptr Pointer to data + \return value of type uint32_t at (*ptr) + */ +#define __LDRT(ptr) ((uint32_t ) __ldrt(ptr)) + + +/** \brief STRT Unprivileged (8 bit) + + This function executes a Unprivileged STRT instruction for 8 bit values. + + \param [in] value Value to store + \param [in] ptr Pointer to location + */ +#define __STRBT(value, ptr) __strt(value, ptr) + + +/** \brief STRT Unprivileged (16 bit) + + This function executes a Unprivileged STRT instruction for 16 bit values. + + \param [in] value Value to store + \param [in] ptr Pointer to location + */ +#define __STRHT(value, ptr) __strt(value, ptr) + + +/** \brief STRT Unprivileged (32 bit) + + This function executes a Unprivileged STRT instruction for 32 bit values. + + \param [in] value Value to store + \param [in] ptr Pointer to location + */ +#define __STRT(value, ptr) __strt(value, ptr) + +#endif /* (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300) */ + + +#elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/ +/* GNU gcc specific functions */ + +/* Define macros for porting to both thumb1 and thumb2. + * For thumb1, use low register (r0-r7), specified by constrant "l" + * Otherwise, use general registers, specified by constrant "r" */ +#if defined (__thumb__) && !defined (__thumb2__) +#define __CMSIS_GCC_OUT_REG(r) "=l" (r) +#define __CMSIS_GCC_USE_REG(r) "l" (r) +#else +#define __CMSIS_GCC_OUT_REG(r) "=r" (r) +#define __CMSIS_GCC_USE_REG(r) "r" (r) +#endif + +/** \brief No Operation + + No Operation does nothing. This instruction can be used for code alignment purposes. + */ +__attribute__((always_inline)) __STATIC_INLINE void __NOP(void) +{ + __ASM volatile ("nop"); +} + + +/** \brief Wait For Interrupt + + Wait For Interrupt is a hint instruction that suspends execution + until one of a number of events occurs. + */ +__attribute__((always_inline)) __STATIC_INLINE void __WFI(void) +{ + __ASM volatile ("wfi"); +} + + +/** \brief Wait For Event + + Wait For Event is a hint instruction that permits the processor to enter + a low-power state until one of a number of events occurs. + */ +__attribute__((always_inline)) __STATIC_INLINE void __WFE(void) +{ + __ASM volatile ("wfe"); +} + + +/** \brief Send Event + + Send Event is a hint instruction. It causes an event to be signaled to the CPU. + */ +__attribute__((always_inline)) __STATIC_INLINE void __SEV(void) +{ + __ASM volatile ("sev"); +} + + +/** \brief Instruction Synchronization Barrier + + Instruction Synchronization Barrier flushes the pipeline in the processor, + so that all instructions following the ISB are fetched from cache or + memory, after the instruction has been completed. + */ +__attribute__((always_inline)) __STATIC_INLINE void __ISB(void) +{ + __ASM volatile ("isb 0xF":::"memory"); +} + + +/** \brief Data Synchronization Barrier + + This function acts as a special kind of Data Memory Barrier. + It completes when all explicit memory accesses before this instruction complete. + */ +__attribute__((always_inline)) __STATIC_INLINE void __DSB(void) +{ + __ASM volatile ("dsb 0xF":::"memory"); +} + + +/** \brief Data Memory Barrier + + This function ensures the apparent order of the explicit memory operations before + and after the instruction, without ensuring their completion. + */ +__attribute__((always_inline)) __STATIC_INLINE void __DMB(void) +{ + __ASM volatile ("dmb 0xF":::"memory"); +} + + +/** \brief Reverse byte order (32 bit) + + This function reverses the byte order in integer value. + + \param [in] value Value to reverse + \return Reversed value + */ +__attribute__((always_inline)) __STATIC_INLINE uint32_t __REV(uint32_t value) +{ +#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 5) + return __builtin_bswap32(value); +#else + uint32_t result; + + __ASM volatile ("rev %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); + return(result); +#endif +} + + +/** \brief Reverse byte order (16 bit) + + This function reverses the byte order in two unsigned short values. + + \param [in] value Value to reverse + \return Reversed value + */ +__attribute__((always_inline)) __STATIC_INLINE uint32_t __REV16(uint32_t value) +{ + uint32_t result; + + __ASM volatile ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); + return(result); +} + + +/** \brief Reverse byte order in signed short value + + This function reverses the byte order in a signed short value with sign extension to integer. + + \param [in] value Value to reverse + \return Reversed value + */ +__attribute__((always_inline)) __STATIC_INLINE int32_t __REVSH(int32_t value) +{ +#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8) + return (short)__builtin_bswap16(value); +#else + uint32_t result; + + __ASM volatile ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); + return(result); +#endif +} + + +/** \brief Rotate Right in unsigned value (32 bit) + + This function Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits. + + \param [in] value Value to rotate + \param [in] value Number of Bits to rotate + \return Rotated value + */ +__attribute__((always_inline)) __STATIC_INLINE uint32_t __ROR(uint32_t op1, uint32_t op2) +{ + return (op1 >> op2) | (op1 << (32 - op2)); +} + + +/** \brief Breakpoint + + This function causes the processor to enter Debug state. + Debug tools can use this to investigate system state when the instruction at a particular address is reached. + + \param [in] value is ignored by the processor. + If required, a debugger can use it to store additional information about the breakpoint. + */ +#define __BKPT(value) __ASM volatile ("bkpt "#value) + + +/** \brief Reverse bit order of value + + This function reverses the bit order of the given value. + + \param [in] value Value to reverse + \return Reversed value + */ +__attribute__((always_inline)) __STATIC_INLINE uint32_t __RBIT(uint32_t value) +{ + uint32_t result; + +#if (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300) + __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); +#else + int32_t s = 4 /*sizeof(v)*/ * 8 - 1; // extra shift needed at end + + result = value; // r will be reversed bits of v; first get LSB of v + for (value >>= 1; value; value >>= 1) + { + result <<= 1; + result |= value & 1; + s--; + } + result <<= s; // shift when v's highest bits are zero +#endif + return(result); +} + + +/** \brief Count leading zeros + + This function counts the number of leading zeros of a data value. + + \param [in] value Value to count the leading zeros + \return number of leading zeros in value + */ +#define __CLZ __builtin_clz + + +#if (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300) + +/** \brief LDR Exclusive (8 bit) + + This function executes a exclusive LDR instruction for 8 bit value. + + \param [in] ptr Pointer to data + \return value of type uint8_t at (*ptr) + */ +__attribute__((always_inline)) __STATIC_INLINE uint8_t __LDREXB(volatile uint8_t *addr) +{ + uint32_t result; + +#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8) + __ASM volatile ("ldrexb %0, %1" : "=r" (result) : "Q" (*addr) ); +#else + /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not + accepted by assembler. So has to use following less efficient pattern. + */ + __ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) : "memory" ); +#endif + return ((uint8_t) result); /* Add explicit type cast here */ +} + + +/** \brief LDR Exclusive (16 bit) + + This function executes a exclusive LDR instruction for 16 bit values. + + \param [in] ptr Pointer to data + \return value of type uint16_t at (*ptr) + */ +__attribute__((always_inline)) __STATIC_INLINE uint16_t __LDREXH(volatile uint16_t *addr) +{ + uint32_t result; + +#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8) + __ASM volatile ("ldrexh %0, %1" : "=r" (result) : "Q" (*addr) ); +#else + /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not + accepted by assembler. So has to use following less efficient pattern. + */ + __ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) : "memory" ); +#endif + return ((uint16_t) result); /* Add explicit type cast here */ +} + + +/** \brief LDR Exclusive (32 bit) + + This function executes a exclusive LDR instruction for 32 bit values. + + \param [in] ptr Pointer to data + \return value of type uint32_t at (*ptr) + */ +__attribute__((always_inline)) __STATIC_INLINE uint32_t __LDREXW(volatile uint32_t *addr) +{ + uint32_t result; + + __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); + return(result); +} + + +/** \brief STR Exclusive (8 bit) + + This function executes a exclusive STR instruction for 8 bit values. + + \param [in] value Value to store + \param [in] ptr Pointer to location + \return 0 Function succeeded + \return 1 Function failed + */ +__attribute__((always_inline)) __STATIC_INLINE uint32_t __STREXB(uint8_t value, volatile uint8_t *addr) +{ + uint32_t result; + + __ASM volatile ("strexb %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) ); + return(result); +} + + +/** \brief STR Exclusive (16 bit) + + This function executes a exclusive STR instruction for 16 bit values. + + \param [in] value Value to store + \param [in] ptr Pointer to location + \return 0 Function succeeded + \return 1 Function failed + */ +__attribute__((always_inline)) __STATIC_INLINE uint32_t __STREXH(uint16_t value, volatile uint16_t *addr) +{ + uint32_t result; + + __ASM volatile ("strexh %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) ); + return(result); +} + + +/** \brief STR Exclusive (32 bit) + + This function executes a exclusive STR instruction for 32 bit values. + + \param [in] value Value to store + \param [in] ptr Pointer to location + \return 0 Function succeeded + \return 1 Function failed + */ +__attribute__((always_inline)) __STATIC_INLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr) +{ + uint32_t result; + + __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); + return(result); +} + + +/** \brief Remove the exclusive lock + + This function removes the exclusive lock which is created by LDREX. + + */ +__attribute__((always_inline)) __STATIC_INLINE void __CLREX(void) +{ + __ASM volatile ("clrex" ::: "memory"); +} + + +/** \brief Signed Saturate + + This function saturates a signed value. + + \param [in] value Value to be saturated + \param [in] sat Bit position to saturate to (1..32) + \return Saturated value + */ +#define __SSAT(ARG1,ARG2) \ +({ \ + uint32_t __RES, __ARG1 = (ARG1); \ + __ASM ("ssat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \ + __RES; \ + }) + + +/** \brief Unsigned Saturate + + This function saturates an unsigned value. + + \param [in] value Value to be saturated + \param [in] sat Bit position to saturate to (0..31) + \return Saturated value + */ +#define __USAT(ARG1,ARG2) \ +({ \ + uint32_t __RES, __ARG1 = (ARG1); \ + __ASM ("usat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \ + __RES; \ + }) + + +/** \brief Rotate Right with Extend (32 bit) + + This function moves each bit of a bitstring right by one bit. + The carry input is shifted in at the left end of the bitstring. + + \param [in] value Value to rotate + \return Rotated value + */ +__attribute__((always_inline)) __STATIC_INLINE uint32_t __RRX(uint32_t value) +{ + uint32_t result; + + __ASM volatile ("rrx %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); + return(result); +} + + +/** \brief LDRT Unprivileged (8 bit) + + This function executes a Unprivileged LDRT instruction for 8 bit value. + + \param [in] ptr Pointer to data + \return value of type uint8_t at (*ptr) + */ +__attribute__((always_inline)) __STATIC_INLINE uint8_t __LDRBT(volatile uint8_t *addr) +{ + uint32_t result; + +#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8) + __ASM volatile ("ldrbt %0, %1" : "=r" (result) : "Q" (*addr) ); +#else + /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not + accepted by assembler. So has to use following less efficient pattern. + */ + __ASM volatile ("ldrbt %0, [%1]" : "=r" (result) : "r" (addr) : "memory" ); +#endif + return ((uint8_t) result); /* Add explicit type cast here */ +} + + +/** \brief LDRT Unprivileged (16 bit) + + This function executes a Unprivileged LDRT instruction for 16 bit values. + + \param [in] ptr Pointer to data + \return value of type uint16_t at (*ptr) + */ +__attribute__((always_inline)) __STATIC_INLINE uint16_t __LDRHT(volatile uint16_t *addr) +{ + uint32_t result; + +#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8) + __ASM volatile ("ldrht %0, %1" : "=r" (result) : "Q" (*addr) ); +#else + /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not + accepted by assembler. So has to use following less efficient pattern. + */ + __ASM volatile ("ldrht %0, [%1]" : "=r" (result) : "r" (addr) : "memory" ); +#endif + return ((uint16_t) result); /* Add explicit type cast here */ +} + + +/** \brief LDRT Unprivileged (32 bit) + + This function executes a Unprivileged LDRT instruction for 32 bit values. + + \param [in] ptr Pointer to data + \return value of type uint32_t at (*ptr) + */ +__attribute__((always_inline)) __STATIC_INLINE uint32_t __LDRT(volatile uint32_t *addr) +{ + uint32_t result; + + __ASM volatile ("ldrt %0, %1" : "=r" (result) : "Q" (*addr) ); + return(result); +} + + +/** \brief STRT Unprivileged (8 bit) + + This function executes a Unprivileged STRT instruction for 8 bit values. + + \param [in] value Value to store + \param [in] ptr Pointer to location + */ +__attribute__((always_inline)) __STATIC_INLINE void __STRBT(uint8_t value, volatile uint8_t *addr) +{ + __ASM volatile ("strbt %1, %0" : "=Q" (*addr) : "r" ((uint32_t)value) ); +} + + +/** \brief STRT Unprivileged (16 bit) + + This function executes a Unprivileged STRT instruction for 16 bit values. + + \param [in] value Value to store + \param [in] ptr Pointer to location + */ +__attribute__((always_inline)) __STATIC_INLINE void __STRHT(uint16_t value, volatile uint16_t *addr) +{ + __ASM volatile ("strht %1, %0" : "=Q" (*addr) : "r" ((uint32_t)value) ); +} + + +/** \brief STRT Unprivileged (32 bit) + + This function executes a Unprivileged STRT instruction for 32 bit values. + + \param [in] value Value to store + \param [in] ptr Pointer to location + */ +__attribute__((always_inline)) __STATIC_INLINE void __STRT(uint32_t value, volatile uint32_t *addr) +{ + __ASM volatile ("strt %1, %0" : "=Q" (*addr) : "r" (value) ); +} + +#endif /* (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300) */ + + +#elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/ +/* IAR iccarm specific functions */ +#include + + +#elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/ +/* TI CCS specific functions */ +#include + + +#elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/ +/* TASKING carm specific functions */ +/* + * The CMSIS functions have been implemented as intrinsics in the compiler. + * Please use "carm -?i" to get an up to date list of all intrinsics, + * Including the CMSIS ones. + */ + + +#elif defined ( __CSMC__ ) /*------------------ COSMIC Compiler -------------------*/ +/* Cosmic specific functions */ +#include + +#endif + +/*@}*/ /* end of group CMSIS_Core_InstructionInterface */ + +#endif /* __CORE_CMINSTR_H */ diff --git a/code_boot_out/sdk/Drivers/CMSIS/Device/FM/FM33xx/Include/fm33lg0xx.h b/code_boot_out/sdk/Drivers/CMSIS/Device/FM/FM33xx/Include/fm33lg0xx.h new file mode 100644 index 0000000..d6860ea --- /dev/null +++ b/code_boot_out/sdk/Drivers/CMSIS/Device/FM/FM33xx/Include/fm33lg0xx.h @@ -0,0 +1,993 @@ +/**************************************************************************************************** + * @file FM33LG0XX.h + * + * @brief CMSIS CORTEX-M0 Peripheral Access Layer Header File for + * FM33LG0XX from Keil. + * + * @version V0.0.1 + * @date 14 july 2020 + * + * @note Generated with SVDConv V2.87e + * from CMSIS SVD File 'FM33LG0XX.SVD' Version 1.0, + * + * @par ARM Limited (ARM) is supplying this software for use with Cortex-M + * processor based microcontroller, but can be equally used for other + * suitable processor architectures. This file can be freely distributed. + * Modifications to this file shall be clearly marked. + * + * THIS SOFTWARE IS PROVIDED “AS IS”. NO WARRANTIES, WHETHER EXPRESS, IMPLIED + * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. + * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR + * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. + * + *******************************************************************************************************/ + + +/** @addtogroup Keil + * @{ + */ + +/** @addtogroup FM33LG0XX + * @{ + */ + +#ifndef __FM33LG0XX_H +#define __FM33LG0XX_H + +#ifdef __cplusplus +extern "C" { +#endif + + +#define __RCHF_INITIAL_CLOCK (8000000) /* Value of the Internal RC HIGH oscillator in Hz */ +#define __RCLP_CLOCK (32000) /* Value of the Internal RC LOW oscillator in Hz */ +#define __XTHF_CLOCK (8000000) /* Value of the EXTERNAL oscillator in Hz */ +#define __XTLF_CLOCK (32768) /* Value of the EXTERNAL oscillator in Hz */ + +/** + * @brief Configuration of the Cortex-M0 Processor and Core Peripherals + */ +#define __CM0_REV 0x0100U /*!< Cortex-M0 Core Revision */ +#define __MPU_PRESENT 1U /*!< MPU present or not */ +#define __VTOR_PRESENT 1U /*!< VTOR present or not */ +#define __NVIC_PRIO_BITS 2U /*!< Number of Bits used for Priority Levels */ +#define __Vendor_SysTickConfig 0U /*!< Set to 1 if different SysTick Config is used */ +/* ------------------------- Interrupt Number Definition ------------------------ */ + +/** + * @brief FM33LG0XX Interrupt Number Definition, according to the selected device + * in @ref Library_configuration_section + */ + +typedef enum { +/****** Cortex-M0 Processor Exceptions Numbers ****************************************************************/ + Reset_IRQn = -15, /*!< 1 复位向量 */ + NMI_IRQn = -14, /*!< 2 WKUPx中断、低功耗模式错误中断 */ + HardFault_IRQn = -13, /*!< 3 HardFault中断向量 */ + SVC_IRQn = -5, /*!< 11 SVCall系统服务请求 */ + PendSV_IRQn = -2, /*!< 14 可挂起系统服务请求 */ + SysTick_IRQn = -1, /*!< 15 内部定时器中断向量 */ + +/* -------------------- FM33LG0XX specific Interrupt Numbers --------------------*/ + WWDT_IRQn = 0, /*!< 0 窗口看门狗或独立看门狗中断 */ + SVD_IRQn = 1, /*!< 1 电源监测报警中断 */ + RTCx_IRQn = 2, /*!< 2 实时时钟中断 */ + FLASH_IRQn = 3, /*!< 3 NVMIF中断 */ + FDET_IRQn = 4, /*!< 4 XTLF或XTHF停振检测中断、系统时钟选择错误中断 */ + ADC_IRQn = 5, /*!< 5 ADC转换完成中断 */ + DAC_IRQn = 6, /*!< 6 DAC中断 */ + SPI0_IRQn = 7, /*!< 7 SPI0中断 */ + SPI1_IRQn = 8, /*!< 8 SPI1中断 */ + SPI2_IRQn = 9, /*!< 9 SPI2中断 */ + UART0_IRQn = 10, /*!< 10 UART0中断 */ + UART1_IRQn = 11, /*!< 11 UART1中断 */ + UART3_IRQn = 12, /*!< 12 UART3中断 */ + UART4_IRQn = 13, /*!< 13 UART4中断 */ + UART5_IRQn = 14, /*!< 14 UART5中断 */ + LPUARTx_IRQn = 16, /*!< 16 LPUART0/1/2中断 */ + I2C_IRQn = 17, /*!< 17 I2C中断 */ + CCL_IRQn = 18, /*!< 18 时钟校准中断 */ + AES_IRQn = 19, /*!< 19 AES中断 */ + LPTIMx_IRQn = 20, /*!< 20 LPTIM16或LPTIM32中断 */ + DMA_IRQn = 21, /*!< 21 DMA中断 */ + WKUPx_IRQn = 22, /*!< 22 WKUP引脚中断 */ + LUT_IRQn = 23, /*!< 23 LUT中断 */ + BSTIM_IRQn = 24, /*!< 24 BSTIM16或BSTIM32中断 */ + COMPx_IRQn = 25, /*!< 25 COMPx中断 */ + GPTIM01_IRQn = 26, /*!< 26 通用定时器0,1中断 */ + GPTIM2_IRQn = 27, /*!< 27 通用定时器2中断 */ + ATIM_IRQn = 28, /*!< 28 高级定时器中断 */ + VREF_IRQn = 29, /*!< 29 1.2V内部基准电压建立中断、VREF_VREG中断 */ + GPIO_IRQn = 30, /*!< 30 外部引脚中断 */ + CAN_IRQn = 31, /*!< 31 CAN2.0中断 */ + +} IRQn_Type; + + +/** @addtogroup Configuration_of_CMSIS + * @{ + */ + +/* ================================================================================ */ +/* ================ Processor and Core Peripheral Section ================ */ +/* ================================================================================ */ + +#include "core_cm0plus.h" /*!< Cortex-M0 processor and core peripherals */ +#include "system_fm33lg0xx.h" /*!< FM33LG0XX System */ + +/* ================================================================================ */ +/* ================ Device Specific Peripheral Section ================ */ +/* ================================================================================ */ + +/** @addtogroup Device_Peripheral_Registers + * @{ + */ + +/* ================================================================================ */ +/* ================ FLS ================ */ +/* ================================================================================ */ + +typedef struct +{ + __IO uint32_t RDCR; /*!< Flash Read Control Register, Address offset: 0x00 */ + __IO uint32_t PFCR; /*!< Flash Prefetch Control Register, Address offset: 0x04 */ + __I uint32_t OPTBR; /*!< Flash Option Bytes Register, Address offset: 0x08 */ + __IO uint32_t ACLOCK1; /*!< Flash Application Code Lock Register1, Address offset: 0x0C */ + __IO uint32_t ACLOCK2; /*!< Flash Application Code Lock Register2, Address offset: 0x10 */ + __IO uint32_t EPCR; /*!< Flash Erase/Program Control Register, Address offset: 0x14 */ + __O uint32_t KEY; /*!< Flash Key Register, Address offset: 0x18 */ + __IO uint32_t IER; /*!< Flash Interrupt Enable Register, Address offset: 0x1C */ + __IO uint32_t ISR; /*!< Flash Interrupt Status Register, Address offset: 0x20 */ +}FLASH_Type; + + +/* ================================================================================ */ +/* ================ PMU ================ */ +/* ================================================================================ */ + +typedef struct +{ + __IO uint32_t CR; /*!< Power Management Control Register, Address offset: 0x00 */ + __IO uint32_t WKTR; /*!< Wakeup Time Register, Address offset: 0x04 */ + __IO uint32_t WKFR; /*!< Wakeup Source Flags Register, Address offset: 0x08 */ + __IO uint32_t IER; /*!< PMU Interrupt Enable Register, Address offset: 0x0C */ + __IO uint32_t ISR; /*!< PMU Interrupt and Status Register, Address offset: 0x10 */ + __IO uint32_t RSV1[9]; /*!< RESERVED REGISTER, Address offset: 0x14 */ + __IO uint32_t ULPB_TR; /*!< ULPBG trim Register, Address offset: 0x38 */ +}PMU_Type; + +/* ================================================================================ */ +/* ================ VREFP ================ */ +/* ================================================================================ */ + +typedef struct +{ + __IO uint32_t CR; /*!< VREFP Control Register, Address offset: 0x00 */ + __IO uint32_t CFGR; /*!< VREFP Config Register, Address offset: 0x04 */ + __IO uint32_t ISR; /*!< VREFP Interrupt Status Register, Address offset: 0x08 */ + __IO uint32_t TR; /*!< VREFP Trim Register, Address offset: 0x0C */ +}VREFP_Type; + +/* ================================================================================ */ +/* ================ VREF ================ */ +/* ================================================================================ */ + +typedef struct +{ + __IO uint32_t CR; /*!< VREF Control Register, Address offset: 0x00 */ + __IO uint32_t CFGR; /*!< VREF Config Register, Address offset: 0x04 */ + __IO uint32_t ISR; /*!< VREF Status Register, Address offset: 0x08 */ + __IO uint32_t IER; /*!< VREF Interrupt Enable Register, Address offset: 0x0C */ + __IO uint32_t BUFCR; /*!< Buffer Control Register, Address offset: 0x10 */ +}VREF_Type; + + +/* ================================================================================ */ +/* ================ VAO ================ */ +/* ================================================================================ */ + +typedef struct +{ + __IO uint32_t RSV1[512]; /*!< RESERVED REGISTER, Address offset: 0x00 */ + __IO uint32_t RSTCR; /*!< VBAT Reset Control Register, Address offset: 0x800 */ + __IO uint32_t XTLFCR; /*!< XTLF Control Register, Address offset: 0x804 */ + __IO uint32_t XTLFPR; /*!< XTLF Power Register, Address offset: 0x808 */ + __IO uint32_t FDIER; /*!< XTLF Oscillation Fail Detection Interrupt Enable Register,Address offset: 0x80C */ + __IO uint32_t FDISR; /*!< XTLF Oscillation Fail Detection Interrupt Status Register,Address offset: 0x810 */ + __IO uint32_t RSV2[251]; /*!< RESERVED REGISTER, Address offset: 0x814 */ + __IO uint32_t INEN; /*!< VAO IO Input Enable Register, Address offset: 0xC00 */ + __IO uint32_t PUEN; /*!< VAO IO Pull-up Enable Register, Address offset: 0xC04 */ + __IO uint32_t ODEN; /*!< VAO IO Open Drain Enable Register, Address offset: 0xC08 */ + __IO uint32_t FCR; /*!< VAO IO Function Control Register, Address offset: 0xC0C */ + __IO uint32_t DOR; /*!< VAO IO Data Output Register, Address offset: 0xC10 */ + __I uint32_t DIR; /*!< VAO IO Data Input Register, Address offset: 0xC14 */ + __IO uint32_t VILR; /*!< VAO IO Voltage Input Low Register, Address offset: 0xC18 */ +}VAO_Type; + + +/* ================================================================================ */ +/* ================ CDIF ================ */ +/* ================================================================================ */ + +typedef struct +{ + __IO uint32_t CR; /*!< , Address offset: 0x00 */ + __IO uint32_t PRSC; /*!< , Address offset: 0x04 */ +}CDIF_Type; + + +/* ================================================================================ */ +/* ================ RMU ================ */ +/* ================================================================================ */ + +typedef struct +{ + __IO uint32_t PDRCR; /*!< PDR Control Register, Address offset: 0x00 */ + __IO uint32_t BORCR; /*!< BOR Control Register, Address offset: 0x04 */ + __IO uint32_t LKPCR; /*!< Reset Config Register, Address offset: 0x08 */ + __O uint32_t SOFTRST; /*!< Software Reset Register, Address offset: 0x0C */ + __IO uint32_t RSTFR; /*!< Reset Flag Register, Address offset: 0x10 */ + __O uint32_t PRSTEN; /*!< Peripheral Reset Enable Register, Address offset: 0x14 */ + __IO uint32_t AHBRSTCR; /*!< AHB Peripherals Reset Register, Address offset: 0x18 */ + __IO uint32_t APBRSTCR1; /*!< APB Peripherals Reset Register1, Address offset: 0x1C */ + __IO uint32_t APBRSTCR2; /*!< APB Peripherals Reset Register2, Address offset: 0x20 */ +}RMU_Type; + + +/* ================================================================================ */ +/* ================ IWDT ================ */ +/* ================================================================================ */ + +typedef struct +{ + __O uint32_t SERV; /*!< IWDT Service Register, Address offset: 0x00 */ + __IO uint32_t CR; /*!< IWDT Config Register, Address offset: 0x04 */ + __I uint32_t CNT; /*!< IWDT Counter Register, Address offset: 0x08 */ + __IO uint32_t WIN; /*!< IWDT Window Register, Address offset: 0x0C */ + __IO uint32_t IER; /*!< IWDT Interrupt Enable Register, Address offset: 0x10 */ + __IO uint32_t ISR; /*!< IWDT Interrupt Status Register, Address offset: 0x14 */ +}IWDT_Type; + + +/* ================================================================================ */ +/* ================ WWDT ================ */ +/* ================================================================================ */ + +typedef struct +{ + __O uint32_t CR; /*!< WWDT Control Register, Address offset: 0x00 */ + __IO uint32_t CFGR; /*!< WWDT Config Register, Address offset: 0x04 */ + __I uint32_t CNT; /*!< WWDT Counter Register, Address offset: 0x08 */ + __IO uint32_t IER; /*!< WWDT Interrupt Enable Register, Address offset: 0x0C */ + __IO uint32_t ISR; /*!< WWDT Interrupt Status Register, Address offset: 0x10 */ + __I uint32_t PSC; /*!< WWDT Prescaler Register, Address offset: 0x14 */ +}WWDT_Type; + + +/* ================================================================================ */ +/* ================ CMU ================ */ +/* ================================================================================ */ + +typedef struct +{ + __IO uint32_t SYSCLKCR; /*!< System Clock Control Register, Address offset: 0x00 */ + __IO uint32_t RCHFCR; /*!< RCHF Control Register, Address offset: 0x04 */ + __IO uint32_t RCHFTR; /*!< RCHF Trim Register, Address offset: 0x08 */ + __IO uint32_t PLLCR; /*!< PLL Control Register, Address offset: 0x0C */ + __IO uint32_t RCLPCR; /*!< RCLP Control Register, Address offset: 0x10 */ + __IO uint32_t RCLPTR; /*!< RCLP Trim Register, Address offset: 0x14 */ + __IO uint32_t RSV1; /*!< RESERVED REGISTER, Address offset: 0x18 */ + __IO uint32_t LSCLKSEL; /*!< LSCLK Select Register, Address offset: 0x1C */ + __IO uint32_t XTHFCR; /*!< XTHF Control Register, Address offset: 0x20 */ + __IO uint32_t RCLFCR; /*!< RCLF Control Register, Address offset: 0x24 */ + __IO uint32_t RCLFTR; /*!< RCLF Trim Register, Address offset: 0x28 */ + __IO uint32_t IER; /*!< Interrupt Enable Register, Address offset: 0x2C */ + __IO uint32_t ISR; /*!< Interrupt Status Register, Address offset: 0x30 */ + __IO uint32_t PCLKCR1; /*!< Peripheral bus Clock Control Register1, Address offset: 0x34 */ + __IO uint32_t PCLKCR2; /*!< Peripheral bus Clock Control Register2, Address offset: 0x38 */ + __IO uint32_t PCLKCR3; /*!< Peripheral bus Clock Control Register3, Address offset: 0x3C */ + __IO uint32_t PCLKCR4; /*!< Peripheral bus Clock Control Register4, Address offset: 0x40 */ + __IO uint32_t OPCCR1; /*!< Peripheral Clock Config Register1, Address offset: 0x44 */ + __IO uint32_t OPCCR2; /*!< Peripheral Clock Config Register 2, Address offset: 0x48 */ + __IO uint32_t OPCCR3; /*!< Peripheral Clock Config Register 3, Address offset: 0x4C */ + __IO uint32_t AHBMCR; /*!< AHB Master Control Register, Address offset: 0x50 */ + __IO uint32_t CCCR; /*!< Clock Calibration Control Register, Address offset: 0x54 */ + __IO uint32_t CCFR; /*!< Clock Calibration Config Register, Address offset: 0x58 */ + __I uint32_t CCNR; /*!< Clock Calibration Counter Register, Address offset: 0x5C */ + __IO uint32_t CCISR; /*!< Clock Calibration Interrupt Status Register, Address offset: 0x60 */ +}CMU_Type; + + +/* ================================================================================ */ +/* ================ SVD ================ */ +/* ================================================================================ */ + +typedef struct +{ + __IO uint32_t CFGR; /*!< SVD Config Register, Address offset: 0x00 */ + __IO uint32_t CR; /*!< SVD Control Register, Address offset: 0x04 */ + __IO uint32_t IER; /*!< SVD Interrupt Enable Register, Address offset: 0x08 */ + __IO uint32_t ISR; /*!< SVD Interrupt Status Register, Address offset: 0x0C */ + __IO uint32_t VSR; /*!< SVD reference Voltage Select Register, Address offset: 0x10 */ +}SVD_Type; + + +/* ================================================================================ */ +/* ================ AES ================ */ +/* ================================================================================ */ + +typedef struct +{ + __IO uint32_t CR; /*!< AES Control Register, Address offset: 0x00 */ + __IO uint32_t IER; /*!< AES Interrupt Enable Register, Address offset: 0x04 */ + __IO uint32_t ISR; /*!< AES Interrupt Status Register, Address offset: 0x08 */ + __IO uint32_t DIR; /*!< AES Data Input Register, Address offset: 0x0C */ + __I uint32_t DOR; /*!< AES Data Output Register, Address offset: 0x10 */ + __IO uint32_t KEY0; /*!< AES Key Register 0, Address offset: 0x14 */ + __IO uint32_t KEY1; /*!< AES Key Register 1, Address offset: 0x18 */ + __IO uint32_t KEY2; /*!< AES Key Register 2, Address offset: 0x1C */ + __IO uint32_t KEY3; /*!< AES Key Register 3, Address offset: 0x20 */ + __IO uint32_t KEY4; /*!< AES Key Register 4, Address offset: 0x24 */ + __IO uint32_t KEY5; /*!< AES Key Register 5, Address offset: 0x28 */ + __IO uint32_t KEY6; /*!< AES Key Register 6, Address offset: 0x2C */ + __IO uint32_t KEY7; /*!< AES Key Register 7, Address offset: 0x30 */ + __IO uint32_t IVR0; /*!< AES Initial Vector Register 0, Address offset: 0x34 */ + __IO uint32_t IVR1; /*!< AES Initial Vector Register 1, Address offset: 0x38 */ + __IO uint32_t IVR2; /*!< AES Initial Vector Register 2, Address offset: 0x3C */ + __IO uint32_t IVR3; /*!< AES Initial Vector Register 3, Address offset: 0x40 */ + __IO uint32_t H0; /*!< AES MultH parameter Register 0, Address offset: 0x44 */ + __IO uint32_t H1; /*!< AES MultH parameter Register 1, Address offset: 0x48 */ + __IO uint32_t H2; /*!< AES MultH parameter Register 2, Address offset: 0x4C */ + __IO uint32_t H3; /*!< AES MultH parameter Register 3, Address offset: 0x50 */ +}AES_Type; + + +/* ================================================================================ */ +/* ================ RNG ================ */ +/* ================================================================================ */ + +typedef struct +{ + __IO uint32_t CR; /*!< Random Number Generator Control Register, Address offset: 0x00 */ + __I uint32_t DOR; /*!< Random Number Generator Data Output Register, Address offset: 0x04 */ + __IO uint32_t RSV1[2]; /*!< RESERVED REGISTER, Address offset: 0x08 */ + __IO uint32_t SR; /*!< Random Number Generator Status Register, Address offset: 0x10 */ + __IO uint32_t CRCCR; /*!< CRC Control Register, Address offset: 0x14 */ + __IO uint32_t CRCDIR; /*!< CRC Data input Register, Address offset: 0x18 */ + __IO uint32_t CRCSR; /*!< CRC Status Register, Address offset: 0x1C */ +}RNG_Type; + + +/* ================================================================================ */ +/* ================ COMP ================ */ +/* ================================================================================ */ +typedef struct +{ + __IO uint32_t CR; /*!< ComparatorControl Register 1, Address offset: 0x00 */ + +} COMP_Type; + +typedef struct +{ + __IO uint32_t ICR; /*!< Comparator Interrupt Config Register, Address offset: 0x0C */ + __IO uint32_t ISR; /*!< Comparator Interrupt Status Register, Address offset: 0x10 */ + __IO uint32_t BUFCR; /*!< Comparator Buffer Control Register, Address offset: 0x14 */ +}COMP_COMMON_Type; + + +/* ================================================================================ */ +/* ================ CALC ================ */ +/* ================================================================================ */ + +typedef struct +{ + __IO uint32_t OPRD; /*!< Operand Register, Address offset: 0x00 */ + __IO uint32_t DIVSOR; /*!< Divisor Regsiter, Address offset: 0x04 */ + __I uint32_t QUOT; /*!< Quotient Register, Address offset: 0x08 */ + __I uint32_t REMD; /*!< Reminder Register, Address offset: 0x0C */ + __I uint32_t ROOT; /*!< Root Register, Address offset: 0x10 */ + __I uint32_t SR; /*!< Status Register, Address offset: 0x14 */ + __IO uint32_t CR; /*!< Control Register, Address offset: 0x18 */ +}DIVAS_Type; + + +/* ================================================================================ */ +/* ================ I2C ================ */ +/* ================================================================================ */ + +typedef struct +{ + __IO uint32_t MSPCFGR; /*!< I2C Master Config Register, Address offset: 0x00 */ + __IO uint32_t MSPCR; /*!< I2C Master Control Register, Address offset: 0x04 */ + __IO uint32_t MSPIER; /*!< I2C Master Intterupt Enable Register, Address offset: 0x08 */ + __IO uint32_t MSPISR; /*!< I2C Master Interrupt Status Register, Address offset: 0x0C */ + __IO uint32_t MSPSR; /*!< I2C Master Status Register, Address offset: 0x10 */ + __IO uint32_t MSPBGR; /*!< I2C Master Baud rate Generator Register, Address offset: 0x14 */ + __IO uint32_t MSPBUF; /*!< I2C Master transfer Buffer, Address offset: 0x18 */ + __IO uint32_t MSPTCR; /*!< I2C Master Timing Control Register, Address offset: 0x1C */ + __IO uint32_t MSPTOR; /*!< I2C Master Time-Out Register, Address offset: 0x20 */ + __IO uint32_t SSPCR; /*!< I2C Slave Control Register, Address offset: 0x24 */ + __IO uint32_t SSPIER; /*!< I2C Slave Interrupt Enable Register, Address offset: 0x28 */ + __IO uint32_t SSPISR; /*!< I2C Slave Interrupt Status Register, Address offset: 0x2C */ + __I uint32_t SSPSR; /*!< I2C Slave Status Register, Address offset: 0x30 */ + __IO uint32_t SSPBUF; /*!< I2C Slave transfer Buffer, Address offset: 0x34 */ + __IO uint32_t SSPADR; /*!< I2C Slave Address Register, Address offset: 0x38 */ +}I2C_Type; + + +/* ================================================================================ */ +/* ================ UART_COMMON ================ */ +/* ================================================================================ */ + +typedef struct +{ + __IO uint32_t IRCR; /*!< Infrared modulation Control Register, Address offset: 0x00 */ +}UART_COMMON_Type; + + +/* ================================================================================ */ +/* ================ UARTx ================ */ +/* ================================================================================ */ + +typedef struct +{ + __IO uint32_t CSR; /*!< UARTx Control Status Register, Address offset: 0x00 */ + __IO uint32_t IER; /*!< UARTx Interrupt Enable Register, Address offset: 0x04 */ + __IO uint32_t ISR; /*!< UARTx Interrupt Status Register, Address offset: 0x08 */ + __IO uint32_t TODR; /*!< UARTx Time-Out and Delay Register, Address offset: 0x0C */ + __I uint32_t RXBUF; /*!< UARTx Receive Buffer, Address offset: 0x10 */ + __O uint32_t TXBUF; /*!< UARTx Transmit Buffer, Address offset: 0x14 */ + __IO uint32_t BGR; /*!< UARTx Baud rate Generator Register, Address offset: 0x18 */ +}UART_Type; + + +/* ================================================================================ */ +/* ================ LPUARTx ================ */ +/* ================================================================================ */ + +typedef struct +{ + __IO uint32_t CSR; /*!< LPUARTx Control Status Register, Address offset: 0x00 */ + __IO uint32_t IER; /*!< LPUARTx Interrupt Enable Register, Address offset: 0x04 */ + __IO uint32_t ISR; /*!< LPUARTx Interrupt Status Register, Address offset: 0x08 */ + __IO uint32_t BMR; /*!< LPUARTx Baud rate Modulation Register, Address offset: 0x0C */ + __I uint32_t RXBUF; /*!< LPUARTx Receive Buffer Register, Address offset: 0x10 */ + __IO uint32_t TXBUF; /*!< LPUARTx Transmit Buffer Register, Address offset: 0x14 */ + __IO uint32_t DMR; /*!< LPUARTx data Matching Register, Address offset: 0x18 */ +}LPUART_Type; + + +/* ================================================================================ */ +/* ================ SPIx ================ */ +/* ================================================================================ */ + +typedef struct +{ + __IO uint32_t CR1; /*!< SPIxControl Register1, Address offset: 0x00 */ + __IO uint32_t CR2; /*!< SPIxControl Register2, Address offset: 0x04 */ + __IO uint32_t CR3; /*!< Control Register3, Address offset: 0x08 */ + __IO uint32_t IER; /*!< SPIxInterrupt Enable Register, Address offset: 0x0C */ + __IO uint32_t ISR; /*!< SPIxStatus Register, Address offset: 0x10 */ + __O uint32_t TXBUF; /*!< SPIxTransmit Buffer, Address offset: 0x14 */ + __I uint32_t RXBUF; /*!< SPIxReceive Buffer, Address offset: 0x18 */ +}SPI_Type; + + +/* ================================================================================ */ +/* ================ CAN ================ */ +/* ================================================================================ */ + +typedef struct +{ + __IO uint32_t CR; /*!< CAN Control Register, Address offset: 0x00 */ + __IO uint32_t MSR; /*!< CAN mode select register, Address offset: 0x04 */ + __IO uint32_t BRPR; /*!< CAN Baud rate Prescaler Register, Address offset: 0x08 */ + __IO uint32_t BTR; /*!< CAN Bit Timing Register, Address offset: 0x0C */ + __I uint32_t ECR; /*!< CAN Error Counter Register, Address offset: 0x10 */ + __IO uint32_t ESR; /*!< CAN Error Status Register, Address offset: 0x14 */ + __I uint32_t SR; /*!< CAN Status Register, Address offset: 0x18 */ + __I uint32_t ISR; /*!< CAN Interrupt Status Register, Address offset: 0x1C */ + __IO uint32_t IER; /*!< CAN Interrupt Enable Register, Address offset: 0x20 */ + __IO uint32_t ICR; /*!< CAN Interrupt Clear Register, Address offset: 0x24 */ + __IO uint32_t RSV1[2]; /*!< RESERVED REGISTER, Address offset: 0x28 */ + __O uint32_t TXFIDR; /*!< CAN TX FIFO ID Register, Address offset: 0x30 */ + __O uint32_t TXFDLCR; /*!< CAN TX FIFO DLC Register, Address offset: 0x34 */ + __O uint32_t TXFDW1R; /*!< CAN TX FIFO Data Word1 Register, Address offset: 0x38 */ + __O uint32_t TXFDW2R; /*!< CAN TX FIFO Data Word2 Register, Address offset: 0x3C */ + __O uint32_t HPBIDR; /*!< CAN TX HPB ID Register, Address offset: 0x40 */ + __O uint32_t HPBDLCR; /*!< CAN TX HPB DLC Register, Address offset: 0x44 */ + __O uint32_t HPBDW1R; /*!< CAN TX HPB Data Word1 Register, Address offset: 0x48 */ + __O uint32_t HPBDW2R; /*!< CAN TX HPB Data Word2 Register, Address offset: 0x4C */ + __O uint32_t RXFIDR; /*!< CAN RX FIFO ID Register, Address offset: 0x50 */ + __O uint32_t RXFDLCR; /*!< CAN RX FIFO DLC Register, Address offset: 0x54 */ + __O uint32_t RXFDW1R; /*!< CAN RX FIFO Data Word1 Register, Address offset: 0x58 */ + __O uint32_t RXFDW2R; /*!< CAN RX FIFO Data Word2 Register, Address offset: 0x5C */ + __IO uint32_t AFR; /*!< Acceptance Filter Register, Address offset: 0x60 */ + __IO uint32_t AFMR0; /*!< Acceptance Filter Mask Register0, Address offset: 0x64 */ + __IO uint32_t AFIR0; /*!< Acceptance Filter ID Register0, Address offset: 0x68 */ + __IO uint32_t AFMR1; /*!< Acceptance Filter Mask Register1, Address offset: 0x6C */ + __IO uint32_t AFIR1; /*!< Acceptance Filter ID Register1, Address offset: 0x70 */ + __IO uint32_t AFMR2; /*!< Acceptance Filter Mask Register2, Address offset: 0x74 */ + __IO uint32_t AFIR2; /*!< Acceptance Filter ID Register2, Address offset: 0x78 */ + __IO uint32_t AFMR3; /*!< Acceptance Filter Mask Register3, Address offset: 0x7C */ + __IO uint32_t AFIR3; /*!< Acceptance Filter ID Register3, Address offset: 0x80 */ +}CAN_Type; + + +/* ================================================================================ */ +/* ================ DMA ================ */ +/* ================================================================================ */ + +typedef struct +{ + __IO uint32_t GCR; /*!< DMA Global Control Register, Address offset: 0x00 */ + __IO uint32_t CH0CR; /*!< Channel 0 Control Register, Address offset: 0x04 */ + __IO uint32_t CH0MAD; /*!< Channel 0 Memory Address Register, Address offset: 0x08 */ + __IO uint32_t CH1CR; /*!< Channel 1 Control Register, Address offset: 0x0C */ + __IO uint32_t CH1MAD; /*!< Channel 1 Memory Address Register, Address offset: 0x10 */ + __IO uint32_t CH2CR; /*!< Channel 2 Control Register, Address offset: 0x14 */ + __IO uint32_t CH2MAD; /*!< Channel 2 Memory Address Register, Address offset: 0x18 */ + __IO uint32_t CH3CR; /*!< Channel 3 Control Register, Address offset: 0x1C */ + __IO uint32_t CH3MAD; /*!< Channel 3 Memory Address Register, Address offset: 0x20 */ + __IO uint32_t CH4CR; /*!< Channel 4 Control Register, Address offset: 0x24 */ + __IO uint32_t CH4MAD; /*!< Channel 4 Memory Address Register, Address offset: 0x28 */ + __IO uint32_t CH5CR; /*!< Channel 5 Control Register, Address offset: 0x2C */ + __IO uint32_t CH5MAD; /*!< Channel 5 Memory Address Register, Address offset: 0x30 */ + __IO uint32_t CH6CR; /*!< Channel 6 Control Register, Address offset: 0x34 */ + __IO uint32_t CH6MAD; /*!< Channel 6 Memory Address Register, Address offset: 0x38 */ + __IO uint32_t CH7CR; /*!< Channel 11 Control Register, Address offset: 0x3C */ + __IO uint32_t CH7FLSAD; /*!< Channel 11 Flash Address Register, Address offset: 0x40 */ + __IO uint32_t CH7RAMAD; /*!< Channel 11 RAM Address Register, Address offset: 0x44 */ + __IO uint32_t ISR; /*!< DMA Interrupt Status Register, Address offset: 0x48 */ +}DMA_Type; + + +/* ================================================================================ */ +/* ================ CRC ================ */ +/* ================================================================================ */ + +typedef struct +{ + __IO uint32_t DR; /*!< CRC Data Register, Address offset: 0x00 */ + __IO uint32_t CR; /*!< Control Register, Address offset: 0x04 */ + __IO uint32_t LFSR; /*!< CRC Linear Feedback Shift Register, Address offset: 0x08 */ + __IO uint32_t XOR; /*!< CRC output XOR Register, Address offset: 0x0C */ + __IO uint32_t RSV1[3]; /*!< RESERVED REGISTER, Address offset: 0x10 */ + __IO uint32_t POLY; /*!< CRC Polynominal Register, Address offset: 0x1C */ +}CRC_Type; + + +/* ================================================================================ */ +/* ================ ATIM ================ */ +/* ================================================================================ */ + +typedef struct +{ + __IO uint32_t CR1; /*!< ATIM Control Register1, Address offset: 0x00 */ + __IO uint32_t CR2; /*!< ATIM Control Register2, Address offset: 0x04 */ + __IO uint32_t SMCR; /*!< ATIM Slave Mode Control Register, Address offset: 0x08 */ + __IO uint32_t DIER; /*!< ATIM DMA and Interrupt Enable Register, Address offset: 0x0C */ + __IO uint32_t ISR; /*!< ATIM Interrupt Status Register, Address offset: 0x10 */ + __O uint32_t EGR; /*!< ATIM Event Generation Register, Address offset: 0x14 */ + __IO uint32_t CCMR1; /*!< ATIM Capture/Compare Mode Register1, Address offset: 0x18 */ + __IO uint32_t CCMR2; /*!< ATIM Capture/Compare Mode Register2, Address offset: 0x1C */ + __IO uint32_t CCER; /*!< ATIM Capture/Compare Enable Register, Address offset: 0x20 */ + __IO uint32_t CNT; /*!< ATIM Counter Register, Address offset: 0x24 */ + __IO uint32_t PSC; /*!< ATIM Prescaler Register, Address offset: 0x28 */ + __IO uint32_t ARR; /*!< ATIM Auto-Reload Register, Address offset: 0x2C */ + __IO uint32_t RCR; /*!< ATIM Repetition Counter Register, Address offset: 0x30 */ + __IO uint32_t CCR1; /*!< ATIM Capture/Compare Register1, Address offset: 0x34 */ + __IO uint32_t CCR2; /*!< ATIM Capture/Compare Register2, Address offset: 0x38 */ + __IO uint32_t CCR3; /*!< ATIM Capture/Compare Register3, Address offset: 0x3C */ + __IO uint32_t CCR4; /*!< ATIM Capture/Compare Register4, Address offset: 0x40 */ + __IO uint32_t BDTR; /*!< ATIM Break and Deadtime Register, Address offset: 0x44 */ + __IO uint32_t DCR; /*!< ATIM DMA Control Register, Address offset: 0x48 */ + __IO uint32_t DMAR; /*!< ATIM DMA Access Register, Address offset: 0x4C */ + __IO uint32_t RSV1[4]; /*!< RESERVED REGISTER, Address offset: 0x50 */ + __IO uint32_t BKCR; /*!< ATIM Break Control Register, Address offset: 0x60 */ +}ATIM_Type; + + +/* ================================================================================ */ +/* ================ GPTIMx ================ */ +/* ================================================================================ */ + +typedef struct +{ + __IO uint32_t CR1; /*!< GPTIMx Control Register1, Address offset: 0x00 */ + __IO uint32_t CR2; /*!< GPTIMx Control Register2, Address offset: 0x04 */ + __IO uint32_t SMCR; /*!< GPTIMx Slave Mode Control Register, Address offset: 0x08 */ + __IO uint32_t DIER; /*!< GPTIMx DMA and Interrupt Enable Register, Address offset: 0x0C */ + __IO uint32_t ISR; /*!< Interrupt Status Register, Address offset: 0x10 */ + __O uint32_t EGR; /*!< GPTIMx Event Generation Register, Address offset: 0x14 */ + __IO uint32_t CCMR1; /*!< GPTIMx Capture/Compare Mode Register1, Address offset: 0x18 */ + __IO uint32_t CCMR2; /*!< GPTIMx Capture/Compare Mode Register2, Address offset: 0x1C */ + __IO uint32_t CCER; /*!< GPTIMx Capture/Compare Enable Register, Address offset: 0x20 */ + __IO uint32_t CNT; /*!< GPTIMx Counter Register, Address offset: 0x24 */ + __IO uint32_t PSC; /*!< GPTIMx Prescaler Register, Address offset: 0x28 */ + __IO uint32_t ARR; /*!< GPTIMx Auto-Reload Register, Address offset: 0x2C */ + __IO uint32_t RSV1; /*!< RESERVED REGISTER, Address offset: 0x30 */ + __IO uint32_t CCR1; /*!< GPTIMx Capture/Compare Register1, Address offset: 0x34 */ + __IO uint32_t CCR2; /*!< GPTIMx Capture/Compare Register2, Address offset: 0x38 */ + __IO uint32_t CCR3; /*!< GPTIMx Capture/Compare Register3, Address offset: 0x3C */ + __IO uint32_t CCR4; /*!< GPTIMx Capture/Compare Register4, Address offset: 0x40 */ + __IO uint32_t RSV2; /*!< RESERVED REGISTER, Address offset: 0x44 */ + __IO uint32_t DCR; /*!< GPTIMx DMA Control Register, Address offset: 0x48 */ + __IO uint32_t DMAR; /*!< GPTIMx DMA access Register, Address offset: 0x4C */ + __IO uint32_t RSV3[4]; /*!< RESERVED REGISTER, Address offset: 0x50 */ + __IO uint32_t ITRSEL; /*!< GPTIMx Internal Trigger Select Register, Address offset: 0x60 */ +}GPTIM_Type; + + +/* ================================================================================ */ +/* ================ BSTIM32 ================ */ +/* ================================================================================ */ + +typedef struct +{ + __IO uint32_t CR1; /*!< BSTIM Control Register1, Address offset: 0x00 */ + __IO uint32_t CR2; /*!< BSTIM Control Register2, Address offset: 0x04 */ + __IO uint32_t RSV1; /*!< RESERVED REGISTER, Address offset: 0x08 */ + __IO uint32_t IER; /*!< BSTIM Interrupt Enable Register, Address offset: 0x0C */ + __IO uint32_t ISR; /*!< BSTIM Interrupt Status Register, Address offset: 0x10 */ + __O uint32_t EGR; /*!< BSTIM Event Generation Register, Address offset: 0x14 */ + __IO uint32_t RSV2[3]; /*!< RESERVED REGISTER, Address offset: 0x18 */ + __IO uint32_t CNT; /*!< BSTIM Counter Register, Address offset: 0x24 */ + __IO uint32_t PSC; /*!< BSTIM Prescaler Register, Address offset: 0x28 */ + __IO uint32_t ARR; /*!< BSTIM Auto-Reload Register, Address offset: 0x2C */ +}BSTIM32_Type; + + +/* ================================================================================ */ +/* ================ BSTIM16 ================ */ +/* ================================================================================ */ + +typedef struct +{ + __IO uint32_t CR1; /*!< BSTIM Control Register1, Address offset: 0x00 */ + __IO uint32_t CR2; /*!< BSTIM Control Register2, Address offset: 0x04 */ + __IO uint32_t RSV1; /*!< RESERVED REGISTER, Address offset: 0x08 */ + __IO uint32_t IER; /*!< BSTIM Interrupt Enable Register, Address offset: 0x0C */ + __IO uint32_t ISR; /*!< BSTIM Interrupt Status Register, Address offset: 0x10 */ + __O uint32_t EGR; /*!< BSTIM Event Generation Register, Address offset: 0x14 */ + __IO uint32_t RSV2[3]; /*!< RESERVED REGISTER, Address offset: 0x18 */ + __IO uint32_t CNT; /*!< BSTIM Counter Register, Address offset: 0x24 */ + __IO uint32_t PSC; /*!< BSTIM Prescaler Register, Address offset: 0x28 */ + __IO uint32_t ARR; /*!< BSTIM Auto-Reload Register, Address offset: 0x2C */ +}BSTIM16_Type; + + +/* ================================================================================ */ +/* ================ LPTIM32 ================ */ +/* ================================================================================ */ + +typedef struct +{ + __IO uint32_t CFGR; /*!< LPTIM32 Config Register, Address offset: 0x00 */ + __I uint32_t CNT; /*!< LPTIM32 Counter Register, Address offset: 0x04 */ + __IO uint32_t CCSR; /*!< LPTIM32 Capture/Compare Control and Status Register, Address offset: 0x08 */ + __IO uint32_t ARR; /*!< LPTIM32 Auto-Reload Register, Address offset: 0x0C */ + __IO uint32_t IER; /*!< LPTIM32 Interrupt Enable Register, Address offset: 0x10 */ + __IO uint32_t ISR; /*!< LPTIM32 Interrupt Status Register, Address offset: 0x14 */ + __IO uint32_t CR; /*!< LPTIM32 Control Register, Address offset: 0x18 */ + __IO uint32_t RSV1; /*!< RESERVED REGISTER, Address offset: 0x1C */ + __IO uint32_t CCR1; /*!< LPTIM32 Capture/Compare Register1, Address offset: 0x20 */ + __IO uint32_t CCR2; /*!< LPTIM32 Capture/Compare Register2, Address offset: 0x24 */ + __IO uint32_t CCR3; /*!< LPTIM32 Capture/Compare Register3, Address offset: 0x28 */ + __IO uint32_t CCR4; /*!< LPTIM32 Capture/Compare Register4, Address offset: 0x2C */ +}LPTIM32_Type; + + +/* ================================================================================ */ +/* ================ LPTIM16 ================ */ +/* ================================================================================ */ + +typedef struct +{ + __IO uint32_t CFGR; /*!< LPTIM Config Register, Address offset: 0x00 */ + __I uint32_t CNT; /*!< LPTIM Counter Register, Address offset: 0x04 */ + __IO uint32_t CCSR; /*!< LPTIM Capture/Compare Control and Status Register, Address offset: 0x08 */ + __IO uint32_t ARR; /*!< LPTIM Auto-Reload Register, Address offset: 0x0C */ + __IO uint32_t IER; /*!< LPTIM Interrupt Enable Register, Address offset: 0x10 */ + __IO uint32_t ISR; /*!< LPTIM Interrupt Status Register, Address offset: 0x14 */ + __IO uint32_t CR; /*!< LPTIM Control Register, Address offset: 0x18 */ + __IO uint32_t RSV1; /*!< RESERVED REGISTER, Address offset: 0x1C */ + __IO uint32_t CCR1; /*!< LPTIM Capture/Compare Register1, Address offset: 0x20 */ + __IO uint32_t CCR2; /*!< LPTIM Capture/Compare Register2, Address offset: 0x24 */ +}LPTIM16_Type; + + +/* ================================================================================ */ +/* ================ RTCA ================ */ +/* ================================================================================ */ + +typedef struct +{ + __IO uint32_t WER; /*!< RTC Write Enable Register, Address offset: 0x00 */ + __IO uint32_t IER; /*!< RTC Interrupt Enable Register, Address offset: 0x04 */ + __IO uint32_t ISR; /*!< RTC Interrupt Status Register, Address offset: 0x08 */ + __IO uint32_t BCDSEC; /*!< BCD format time second registers, Address offset: 0x0C */ + __IO uint32_t BCDMIN; /*!< BCD format time minute registers, Address offset: 0x10 */ + __IO uint32_t BCDHOUR; /*!< BCD format time hour registers, Address offset: 0x14 */ + __IO uint32_t BCDDAY; /*!< BCD format time day registers, Address offset: 0x18 */ + __IO uint32_t BCDWEEK; /*!< BCD format time week registers, Address offset: 0x1C */ + __IO uint32_t BCDMONTH; /*!< BCD format time month registers, Address offset: 0x20 */ + __IO uint32_t BCDYEAR; /*!< BCD format time year registers, Address offset: 0x24 */ + __IO uint32_t ALARM; /*!< RTCA Alarm Register, Address offset: 0x28 */ + __IO uint32_t TMSEL; /*!< RTCA Time Mark Select, Address offset: 0x2C */ + __IO uint32_t ADJUST; /*!< RTCA time Adjust Register, Address offset: 0x30 */ + __IO uint32_t ADSIGN; /*!< RTCA time Adjust Sign Register, Address offset: 0x34 */ + __IO uint32_t RSV1; /*!< RESERVED REGISTER, Address offset: 0x38 */ + __IO uint32_t SBSCNT; /*!< RTCA Sub-Second Counter, Address offset: 0x3C */ + __IO uint32_t CR; /*!< RTCA Control Register, Address offset: 0x40 */ +}RTCA_Type; + + +/* ================================================================================ */ +/* ================ LCD ================ */ +/* ================================================================================ */ + +typedef struct +{ + __IO uint32_t CR; /*!< LCD Control Register, Address offset: 0x00 */ + __IO uint32_t TEST; /*!< LCD test Register, Address offset: 0x04 */ + __IO uint32_t FCR; /*!< LCD Frequency Control Register, Address offset: 0x08 */ + __IO uint32_t FLKT; /*!< LCD Flick Time Register, Address offset: 0x0C */ + __IO uint32_t RSV1; /*!< RESERVED REGISTER, Address offset: 0x10 */ + __IO uint32_t IER; /*!< LCD Interrupt Enable Register, Address offset: 0x14 */ + __IO uint32_t ISR; /*!< LCD Interrupt Status Register, Address offset: 0x18 */ + __IO uint32_t RSV2[2]; /*!< RESERVED REGISTER, Address offset: 0x1C */ + __IO uint32_t DATA0; /*!< LCD data buffer registers 0, Address offset: 0x24 */ + __IO uint32_t DATA1; /*!< LCD data buffer registers 1, Address offset: 0x28 */ + __IO uint32_t DATA2; /*!< LCD data buffer registers 2, Address offset: 0x2C */ + __IO uint32_t DATA3; /*!< LCD data buffer registers 3, Address offset: 0x30 */ + __IO uint32_t DATA4; /*!< LCD data buffer registers 4, Address offset: 0x34 */ + __IO uint32_t DATA5; /*!< LCD data buffer registers 5, Address offset: 0x38 */ + __IO uint32_t DATA6; /*!< LCD data buffer registers 6, Address offset: 0x3C */ + __IO uint32_t DATA7; /*!< LCD data buffer registers 7, Address offset: 0x40 */ + __IO uint32_t DATA8; /*!< LCD data buffer registers 8, Address offset: 0x44 */ + __IO uint32_t DATA9; /*!< LCD data buffer registers 9, Address offset: 0x48 */ + __IO uint32_t RSV3; /*!< RESERVED REGISTER, Address offset: 0x4C */ + __IO uint32_t COMEN; /*!< LCD COM Enable Register, Address offset: 0x50 */ + __IO uint32_t SEGEN0; /*!< LCD SEG Enable Register0, Address offset: 0x54 */ + __IO uint32_t SEGEN1; /*!< LCD SEG Enable Register 1, Address offset: 0x58 */ +}LCD_Type; + + +/* ================================================================================ */ +/* ================ ADC ================ */ +/* ================================================================================ */ + +typedef struct +{ + __IO uint32_t ISR; /*!< ADC Interrupt and Status Register, Address offset: 0x00 */ + __IO uint32_t IER; /*!< ADC Interrupt Enable Register, Address offset: 0x04 */ + __IO uint32_t CR1; /*!< ADC Control Register, Address offset: 0x08 */ + __IO uint32_t CR2; /*!< ADC Control Register, Address offset: 0x0C */ + __IO uint32_t CALR; /*!< ADC Calibration Register, Address offset: 0x10 */ + __IO uint32_t CFGR1; /*!< ADC Config Register1, Address offset: 0x14 */ + __IO uint32_t CFGR2; /*!< ADC Config Register2, Address offset: 0x18 */ + __IO uint32_t SMTR; /*!< ADC Sampling Time Register, Address offset: 0x1C */ + __IO uint32_t CHER; /*!< ADC Channel Enable Register, Address offset: 0x20 */ + __IO uint32_t DCR; /*!< ADC Differential Channel Control Register, Address offset: 0x24 */ + __I uint32_t DR; /*!< ADC Data Register, Address offset: 0x28 */ + __IO uint32_t HLTR; /*!< ADC analog watchdog Threshold Register, Address offset: 0x2C */ +}ADC_Type; + + +/* ================================================================================ */ +/* ================ DAC ================ */ +/* ================================================================================ */ + +typedef struct +{ + __IO uint32_t CR1; /*!< DAC Control Register, Address offset: 0x00 */ + __IO uint32_t CR2; /*!< DAC Control Register, Address offset: 0x04 */ + __IO uint32_t CFGR; /*!< DAC Config Register, Address offset: 0x08 */ + __O uint32_t SWTRGR; /*!< DAC Software Trigger Register, Address offset: 0x0C */ + __IO uint32_t DHR; /*!< DAC Data Holding Register, Address offset: 0x10 */ + __IO uint32_t ISR; /*!< DAC Interrupt Status Register, Address offset: 0x14 */ + __IO uint32_t IER; /*!< DAC Interrupt Enable Register, Address offset: 0x18 */ + __IO uint32_t SHTR; /*!< DAC Sample Hold Time Register, Address offset: 0x1C */ +}DAC_Type; + + +/* ================================================================================ */ +/* ================ GPIO ================ */ +/* ================================================================================ */ + +typedef struct +{ + __IO uint32_t INEN; /*!< GPIOx Input Enable Register, Address offset: 0x00 */ + __IO uint32_t PUEN; /*!< GPIOx Pull-Up Enable Register, Address offset: 0x04 */ + __IO uint32_t ODEN; /*!< GPIOx Open-Drain Enable Register, Address offset: 0x08 */ + __IO uint32_t FCR; /*!< GPIOx Function Control Register, Address offset: 0x0C */ + __IO uint32_t DO; /*!< GPIOx Data Output Register, Address offset: 0x10 */ + __O uint32_t DSET; /*!< GPIOx Data Set Register, Address offset: 0x14 */ + __O uint32_t DRST; /*!< GPIOx Data Reset Register, Address offset: 0x18 */ + __I uint32_t DIN; /*!< GPIOx Data Input Register, Address offset: 0x1C */ + __IO uint32_t DFS; /*!< GPIOx Digital Function Select, Address offset: 0x20 */ + __IO uint32_t RSV1; /*!< RESERVED REGISTER, Address offset: 0x24 */ + __IO uint32_t ANEN; /*!< GPIOx Analog channel Enable Register, Address offset: 0x28 */ + __IO uint32_t VILR; /*!< GPIOx Voltage Input Low Register, Address offset: 0x2C */ +}GPIO_Type; + + +/* ================================================================================ */ +/* ================ GPIO_COMMON ================ */ +/* ================================================================================ */ + +typedef struct +{ + __IO uint32_t EXTISEL0; /*!< External Interrupt Input Select Register0, Address offset: 0x00 */ + __IO uint32_t EXTISEL1; /*!< External Interrupt Input Select Register1, Address offset: 0x04 */ + __IO uint32_t EXTIEDS0; /*!< External Interrupt Edge Select and Enable Register0, Address offset: 0x08 */ + __IO uint32_t EXTIEDS1; /*!< External Interrupt Edge Select and Enable Register1, Address offset: 0x0C */ + __IO uint32_t EXTIDF; /*!< External Interrupt Digital Filter Register, Address offset: 0x10 */ + __IO uint32_t EXTIISR; /*!< External Interrupt and Status Register, Address offset: 0x14 */ + __I uint32_t EXTIDI; /*!< External Interrupt Data Input Register, Address offset: 0x18 */ + __IO uint32_t RSV1[9]; /*!< RESERVED REGISTER, Address offset: 0x1C */ + __IO uint32_t FOUTSEL; /*!< Frequency Output Select Register, Address offset: 0x100 */ + __IO uint32_t RSV2[63]; /*!< RESERVED REGISTER, Address offset: 0x104 */ + __IO uint32_t PINWKEN; /*!< Wakeup Enable Register, Address offset: 0x200 */ +}GPIO_COMMON_Type; + + +/* ================================================================================ */ +/* ================ DBG ================ */ +/* ================================================================================ */ + +typedef struct +{ + __I uint32_t SYSCFG; /*!< , Address offset: 0x00 */ + __IO uint32_t CR; /*!< , Address offset: 0x04 */ + __IO uint32_t HDFR; /*!< , Address offset: 0x08 */ +}DBG_Type; + + + +/* ================================================================================ */ +/* ================ CPU memory map ================ */ +/* ================================================================================ */ + + +/* Peripheral and SRAM base address */ + +#define FLASH_BASE (( uint32_t)0x00000000) +#define SRAM_BASE (( uint32_t)0x20000000) +#define PERIPH_BASE (( uint32_t)0x40000000) + + +/* ================================================================================ */ +/* ================ Peripheral memory map ================ */ +/* ================================================================================ */ + +/* Peripheral memory map */ + +#define FLASH_R_BASE (PERIPH_BASE +0x00001000ul) +#define PMU_BASE (PERIPH_BASE +0x00002000ul) +#define VREFP_BASE (PERIPH_BASE +0x0000203Cul) +#define VREF_BASE (PERIPH_BASE +0x0001A400ul) +#define VAO_BASE (PERIPH_BASE +0x0001F000ul) +#define CDIF_BASE (PERIPH_BASE +0x0001E000ul) +#define RMU_BASE (PERIPH_BASE +0x00002800ul) +#define IWDT_BASE (PERIPH_BASE +0x00011400ul) +#define WWDT_BASE (PERIPH_BASE +0x00011800ul) +#define CMU_BASE (PERIPH_BASE +0x00002400ul) +#define SVD_BASE (PERIPH_BASE +0x00012800ul) +#define AES_BASE (PERIPH_BASE +0x00013800ul) +#define RNG_BASE (PERIPH_BASE +0x00013C00ul) +#define COMP1_BASE (PERIPH_BASE +0x00015400ul) +#define COMP2_BASE (PERIPH_BASE +0x00015404ul) +#define COMP3_BASE (PERIPH_BASE +0x00015408ul) +#define COMP_COMMON_BASE (PERIPH_BASE +0x0001540Cul) +#define DIVAS_BASE (PERIPH_BASE +0x00019C00ul) +#define I2C_BASE (PERIPH_BASE +0x00012400ul) +#define UART_COMMON_BASE (PERIPH_BASE +0x00017C00ul) +#define UART0_BASE (PERIPH_BASE +0x00012000ul) +#define UART1_BASE (PERIPH_BASE +0x00016800ul) +#define UART3_BASE (PERIPH_BASE +0x00017000ul) +#define UART4_BASE (PERIPH_BASE +0x00017400ul) +#define UART5_BASE (PERIPH_BASE +0x00017800ul) +#define LPUART0_BASE (PERIPH_BASE +0x00014000ul) +#define LPUART1_BASE (PERIPH_BASE +0x00014400ul) +#define LPUART2_BASE (PERIPH_BASE +0x00015000ul) +#define SPI0_BASE (PERIPH_BASE +0x00010400ul) +#define SPI1_BASE (PERIPH_BASE +0x00010800ul) +#define SPI2_BASE (PERIPH_BASE +0x00014800ul) +#define CAN_BASE (PERIPH_BASE +0x00019400ul) +#define DMA_BASE (PERIPH_BASE +0x00000400ul) +#define CRC_BASE (PERIPH_BASE +0x00010000ul) +#define ATIM_BASE (PERIPH_BASE +0x00013000ul) +#define GPTIM0_BASE (PERIPH_BASE +0x00014C00ul) +#define GPTIM1_BASE (PERIPH_BASE +0x00016400ul) +#define GPTIM2_BASE (PERIPH_BASE +0x00018000ul) +#define BSTIM32_BASE (PERIPH_BASE +0x00016000ul) +#define BSTIM16_BASE (PERIPH_BASE +0x00018C00ul) +#define LPTIM32_BASE (PERIPH_BASE +0x00013400ul) +#define LPTIM16_BASE (PERIPH_BASE +0x00018800ul) +#define RTCA_BASE (PERIPH_BASE +0x00011000ul) +#define LCD_BASE (PERIPH_BASE +0x00010C00ul) +#define ADC_BASE (PERIPH_BASE +0x00015C00ul) +#define DAC_BASE (PERIPH_BASE +0x00019800ul) +#define GPIOA_BASE (PERIPH_BASE +0x00000C00ul) +#define GPIOB_BASE (PERIPH_BASE +0x00000C40ul) +#define GPIOC_BASE (PERIPH_BASE +0x00000C80ul) +#define GPIOD_BASE (PERIPH_BASE +0x00000CC0ul) +#define GPIOE_BASE (PERIPH_BASE +0x00000D00ul) +#define GPIO_COMMON_BASE (PERIPH_BASE +0x00000DC0ul) +#define DBG_BASE (PERIPH_BASE +0x00000000ul) + +/* ================================================================================ */ +/* ================ Peripheral declaration ================ */ +/* ================================================================================ */ + +#define FLASH ((FLASH_Type *) FLASH_R_BASE ) +#define PMU ((PMU_Type *) PMU_BASE ) +#define VREFP ((VREFP_Type *) VREFP_BASE ) +#define VREF ((VREF_Type *) VREF_BASE ) +#define VAO ((VAO_Type *) VAO_BASE ) +#define CDIF ((CDIF_Type *) CDIF_BASE ) +#define RMU ((RMU_Type *) RMU_BASE ) +#define IWDT ((IWDT_Type *) IWDT_BASE ) +#define WWDT ((WWDT_Type *) WWDT_BASE ) +#define CMU ((CMU_Type *) CMU_BASE ) +#define SVD ((SVD_Type *) SVD_BASE ) +#define AES ((AES_Type *) AES_BASE ) +#define RNG ((RNG_Type *) RNG_BASE ) +#define COMP1 ((COMP_Type *) COMP1_BASE ) +#define COMP2 ((COMP_Type *) COMP2_BASE ) +#define COMP3 ((COMP_Type *) COMP3_BASE ) +#define COMP ((COMP_COMMON_Type *)COMP_COMMON_BASE ) +#define DIVAS ((DIVAS_Type *) DIVAS_BASE ) +#define I2C ((I2C_Type *) I2C_BASE ) +#define UART ((UART_COMMON_Type *) UART_COMMON_BASE ) +#define UART0 ((UART_Type *) UART0_BASE ) +#define UART1 ((UART_Type *) UART1_BASE ) +#define UART3 ((UART_Type *) UART3_BASE ) +#define UART4 ((UART_Type *) UART4_BASE ) +#define UART5 ((UART_Type *) UART5_BASE ) +#define LPUART0 ((LPUART_Type *) LPUART0_BASE ) +#define LPUART1 ((LPUART_Type *) LPUART1_BASE ) +#define LPUART2 ((LPUART_Type *) LPUART2_BASE ) +#define SPI0 ((SPI_Type *) SPI0_BASE ) +#define SPI1 ((SPI_Type *) SPI1_BASE ) +#define SPI2 ((SPI_Type *) SPI2_BASE ) +#define CAN ((CAN_Type *) CAN_BASE ) +#define DMA ((DMA_Type *) DMA_BASE ) +#define CRC ((CRC_Type *) CRC_BASE ) +#define ATIM ((ATIM_Type *) ATIM_BASE ) +#define GPTIM0 ((GPTIM_Type *) GPTIM0_BASE ) +#define GPTIM1 ((GPTIM_Type *) GPTIM1_BASE ) +#define GPTIM2 ((GPTIM_Type *) GPTIM2_BASE ) +#define BSTIM32 ((BSTIM32_Type *) BSTIM32_BASE ) +#define BSTIM16 ((BSTIM16_Type *) BSTIM16_BASE ) +#define LPTIM32 ((LPTIM32_Type *) LPTIM32_BASE ) +#define LPTIM16 ((LPTIM16_Type *) LPTIM16_BASE ) +#define RTCA ((RTCA_Type *) RTCA_BASE ) +#define LCD ((LCD_Type *) LCD_BASE ) +#define ADC ((ADC_Type *) ADC_BASE ) +#define DAC ((DAC_Type *) DAC_BASE ) +#define GPIOA ((GPIO_Type *) GPIOA_BASE ) +#define GPIOB ((GPIO_Type *) GPIOB_BASE ) +#define GPIOC ((GPIO_Type *) GPIOC_BASE ) +#define GPIOD ((GPIO_Type *) GPIOD_BASE ) +#define GPIOE ((GPIO_Type *) GPIOE_BASE ) +#define GPIO ((GPIO_COMMON_Type *) GPIO_COMMON_BASE ) +#define DBG ((DBG_Type *) DBG_BASE ) + +/* ================================================================================ */ +/* ================ Peripheral include ================ */ +/* ================================================================================ */ + +/** @} */ /* End of group Device_Peripheral_Registers */ +/** @} */ /* End of group FM33LG0XX */ +/** @} */ /* End of group Keil */ + +#ifdef __cplusplus +} +#endif + +#endif /* FM33LG0XX_H */ + diff --git a/code_boot_out/sdk/Drivers/CMSIS/Device/FM/FM33xx/Include/system_fm33lg0xx.h b/code_boot_out/sdk/Drivers/CMSIS/Device/FM/FM33xx/Include/system_fm33lg0xx.h new file mode 100644 index 0000000..077a59e --- /dev/null +++ b/code_boot_out/sdk/Drivers/CMSIS/Device/FM/FM33xx/Include/system_fm33lg0xx.h @@ -0,0 +1,178 @@ +/**************************************************************************//** + * @file system_fm33lg0xx.h + * @brief CMSIS Cortex-M0 Device Peripheral Access Layer Header File for + * Device FM33LG0XX + * @version V2.0.0 + * @date 15. Mar 2021 + * + * @note + * + ******************************************************************************/ +/* Copyright (c) 2012 ARM LIMITED + + All rights reserved. + Redistribution and use in source and binary forms, with or without + modification, are permitted provided that the following conditions are met: + - Redistributions of source code must retain the above copyright + notice, this list of conditions and the following disclaimer. + - Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the + documentation and/or other materials provided with the distribution. + - Neither the name of ARM nor the names of its contributors may be used + to endorse or promote products derived from this software without + specific prior written permission. + * + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE + LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + POSSIBILITY OF SUCH DAMAGE. + ---------------------------------------------------------------------------*/ + +#ifndef SYSTEM_FM33LC0XX_H +#define SYSTEM_FM33LC0XX_H + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @brief CMSIS Device version number + */ +#define __FM33LG0xx_CMSIS_VERSION_MAIN (0x02) /*!< [31:24] main version */ +#define __FM33LG0xx_CMSIS_VERSION_SUB1 (0x03) /*!< [23:16] sub1 version */ +#define __FM33LG0xx_CMSIS_VERSION_SUB2 (0x00) /*!< [15:0] sub2 version */ +#define __FM33LG0xx_CMSIS_VERSION ((__FM33LG0xx_CMSIS_VERSION_MAIN << 24)\ + |(__FM33LG0xx_CMSIS_VERSION_SUB1 << 16)\ + |(__FM33LG0xx_CMSIS_VERSION_SUB2)) + +/* Configurations ------------------------------------------------------------*/ +/** + * @brief LSCLK auto switch + * @note Comment the following line to enable LSCLK auto switch function. + */ +//#define USE_LSCLK_AUTO_SWITCH + + +/** + * @brief Keep debug connection under sleep mode + * @note Uncomment the following line to debug under sleep mode + */ +/* #define USE_DEBUG_UNDER_SLEEP */ +//#define USE_DEBUG_UNDER_SLEEP //TEMP_CLOSE +/** + * @brief Open IWDT on program startup + * @note Uncomment the following line to use IWDT on startup. User can modify + * the IWDT_OVERFLOW_PERIOD to change the IDWT overflow period. + */ +/* #define USE_IWDT_ON_STARTUP */ + +#ifdef USE_IWDT_ON_STARTUP + +/* + Valid value of IWDT_OVERFLOW_PERIOD: + - 0x0: 125ms + - 0x1: 250ms + - 0x2: 500ms + - 0x3: 1s + - 0x4: 2s + - 0x5: 4s + - 0x6: 8s + - 0x7: 16s + */ +#define IWDT_OVERFLOW_PERIOD 0x7 + +#endif /* USE_IWDT_ON_STARTUP */ + +/* Includes ------------------------------------------------------------------*/ +//#include +#include "common_types.h" + +/* Device Includes -----------------------------------------------------------*/ +#include "fm33lg0xx.h" + +/* Trim Values ---------------------------------------------------------------*/ +/* Validate Function */ +#define LDT_CHECK(_N_VALUE_, _T_VALUE_) \ + ((((_N_VALUE_ >> 16) & 0xFFFFU) == \ + (~(_N_VALUE_) & 0xFFFFU)) ? (_N_VALUE_) : (_T_VALUE_)) + +#define RCHF8M_LDT_TRIM (*(uint32_t *)0x1FFFFB40U) /* RC8M 常温校准值 */ +#define RCHF16M_LDT_TRIM (*(uint32_t *)0x1FFFFB3CU) /* RC16M 常温校准值 */ +#define RCHF24M_LDT_TRIM (*(uint32_t *)0x1FFFFB38U) /* RC24M 常温校准值 */ +#define RCHF32M_LDT_TRIM (*(uint32_t *)0x1FFFFB34U) /* RC32M 常温校准值 */ +#define RCLF_LDT_TRIM (*(uint32_t *)0x1FFFFB44U) /* RCLF 常温校准值 */ +#define RCLP_LDT_TRIM (*(uint32_t *)0x1FFFFB20U) /* RCLP 常温校准值 */ + + +#define RCHF8M_LDT_TRIM_BKP (*(uint16_t *)0x1FFFFBC2U) /* RC8M 常温校准值备份 */ +#define RCHF16M_LDT_TRIM_BKP (*(uint16_t *)0x1FFFFBC4U) /* RC16M 常温校准值备份 */ +#define RCHF24M_LDT_TRIM_BKP (*(uint16_t *)0x1FFFFBC6U) /* RC24M 常温校准值备份 */ +#define RCHF32M_LDT_TRIM_BKP (*(uint16_t *)0x1FFFFBC8U) /* RC32M 常温校准值备份 */ +#define RCLF_LDT_TRIM_BKP (*(uint16_t *)0x1FFFFBC0U) /* RCLF 常温校准值备份 */ +#define RCLP_LDT_TRIM_BKP (*(uint16_t *)0x1FFFFBCEU) /* RCLP 常温校准值备份 */ + + +#define RCHF8M_TRIM (LDT_CHECK(RCHF8M_LDT_TRIM, RCHF8M_LDT_TRIM_BKP) & 0xffU) +#define RCHF16M_TRIM (LDT_CHECK(RCHF16M_LDT_TRIM, RCHF16M_LDT_TRIM_BKP) & 0xffU) +#define RCHF24M_TRIM (LDT_CHECK(RCHF24M_LDT_TRIM, RCHF24M_LDT_TRIM_BKP) & 0xffU) +#define RCHF32M_TRIM (LDT_CHECK(RCHF32M_LDT_TRIM, RCHF32M_LDT_TRIM_BKP) & 0xffU) +#define RCLF_TRIM (LDT_CHECK(RCLF_LDT_TRIM, RCLF_LDT_TRIM_BKP) & 0xffU) +#define RCLP_TRIM (LDT_CHECK(RCLP_LDT_TRIM, RCLP_LDT_TRIM_BKP) & 0xffU) + + +#define ULPBG_LDT_TRIM (*(uint32_t *)0x1FFFFA98U) + +#define ULPBG_LDT_TRIM_BKP (*(uint16_t *)0x1FFFFBAAU) /* 备份值 */ + +#define ULPBG_TRIM (LDT_CHECK(ULPBG_LDT_TRIM, ULPBG_LDT_TRIM_BKP) & 0x1fU) + +/* Default Clock Frequency Values --------------------------------------------*/ + +#define XTHF_DEFAULT_VALUE ((uint32_t)8000000U) /*!< Default value of XTHF in Hz */ +#define XTLF_DEFAULT_VALUE ((uint32_t)32768U) /*!< Default value of XTLF in Hz */ + +/* Default system core clock value */ +#define HCLK_DEFAULT_VALUE ((uint32_t)8000000U) + +/* Exported Clock Frequency Variables --------------------------------------- */ +/* + - [SystemCoreClock] holds the value of CPU operation clock freqency, and is initialized + to HCLK_DEFAULT_VALUE; + - [XTLFClock] holds the value of external low-frequency oscillator(XTLF), + and is initialized to XTLF_DEFAULT_VALUE; + - [XTHFClock] holds the value of external high_frequency oscillator(XTHF), + and is initialized to XTHF_DEFAULT_VALUE; + + NOTE: If users are using these two external oscillators, they should modify the + value of XTLFClock and XTHFClock to the correct value, and call the SystemCoreClockUpdate() + to update the SystemCoreClock variable, otherwise those codes which rely on + the SystemCoreClock variable will fail to run. + */ +extern uint32_t XTLFClock; /*!< External Low-freq Osc Clock Frequency (XTLF) */ +extern uint32_t XTHFClock; /*!< External High-freq Osc Clock Frequency (XTHF) */ +extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */ + +/** + * @brief Setup the microcontroller system. + * Initialize the System. + */ +void SystemInit(void); + +/** + * @brief Updates the SystemCoreClock with current core Clock + * retrieved from cpu registers. + */ +void SystemCoreClockUpdate(void); + +#ifdef __cplusplus +} +#endif + +#endif /* SYSTEM_FM33LG0XX_H */ diff --git a/code_boot_out/sdk/Drivers/CMSIS/Device/FM/FM33xx/Source/Templates/ARM/startup_fm33lg0xx.s b/code_boot_out/sdk/Drivers/CMSIS/Device/FM/FM33xx/Source/Templates/ARM/startup_fm33lg0xx.s new file mode 100644 index 0000000..7cded38 --- /dev/null +++ b/code_boot_out/sdk/Drivers/CMSIS/Device/FM/FM33xx/Source/Templates/ARM/startup_fm33lg0xx.s @@ -0,0 +1,231 @@ +;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------ +;*/ + + +; Stack Configuration +; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + +Stack_Size EQU 0x00000800 + + AREA STACK, NOINIT, READWRITE, ALIGN=3 +Stack_Mem SPACE Stack_Size +__initial_sp + + +; Heap Configuration +; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + +Heap_Size EQU 0x00000800 + + AREA HEAP, NOINIT, READWRITE, ALIGN=3 +__heap_base +Heap_Mem SPACE Heap_Size +__heap_limit + + PRESERVE8 + THUMB + + +; Vector Table Mapped to Address 0 at Reset + + AREA RESET, DATA, READONLY + EXPORT __Vectors + EXPORT __Vectors_End + EXPORT __Vectors_Size + +__Vectors DCD __initial_sp ; Top of Stack + DCD Reset_Handler ; Reset Handler + DCD NMI_Handler ; NMI Handler + DCD HardFault_Handler ; Hard Fault Handler + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD SVC_Handler ; SVCall Handler + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD PendSV_Handler ; PendSV Handler + DCD SysTick_Handler ; SysTick Handler + + ; External Interrupts + DCD WDT_IRQHandler ; 0: WWDT + DCD SVD_IRQHandler ; 1: SVD + DCD RTC_IRQHandler ; 2: RTC + DCD FLASH_IRQHandler ; 3: FLASH + DCD FDET_IRQHandler ; 4: LFDET + DCD ADC_IRQHandler ; 5: ADC + DCD DAC_IRQHandler ; 6: DAC + DCD SPI0_IRQHandler ; 7: SPI0 + DCD SPI1_IRQHandler ; 8: SPI1 + DCD SPI2_IRQHandler ; 9: SPI2 + DCD UART0_IRQHandler ; 10: UART0 + DCD UART1_IRQHandler ; 11: UART1 + DCD UART3_IRQHandler ; 12: UART3 + DCD UART4_IRQHandler ; 13: UART4 + DCD UART5_IRQHandler ; 14: UART5 + DCD 0 ; 15: + DCD LPUARTx_IRQHandler ; 16: LPUART + DCD I2C_IRQHandler ; 17: I2C + DCD CCL_IRQHandler ; 18: CCL + DCD AES_IRQHandler ; 19: AES + DCD LPTIM_IRQHandler ; 20: LPTIM + DCD DMA_IRQHandler ; 21: DMA + DCD WKUPx_IRQHandler ; 22: WKUP + DCD LUT_IRQHandler ; 23: LUT + DCD BSTIM_IRQHandler ; 24: BSTIM + DCD COMPx_IRQHandler ; 25: COMPx + DCD GPTIM0_1_IRQHandler ; 26: GPTIM0_1 + DCD GPTIM2_IRQHandler ; 27: GPTIM2 + DCD ATIM_IRQHandler ; 28: ATIM + DCD VREF_IRQHandler ; 29: VREF + DCD GPIO_IRQHandler ; 30: GPIO + DCD CAN_IRQHandler ; 31: CAN +__Vectors_End + +__Vectors_Size EQU __Vectors_End - __Vectors + + AREA |.text|, CODE, READONLY + + +; Reset Handler + +Reset_Handler PROC + EXPORT Reset_Handler [WEAK] + IMPORT SystemInit + IMPORT __main + LDR R0, =SystemInit + BLX R0 + LDR R0, =__main + BX R0 + ENDP + + +; Dummy Exception Handlers (infinite loops which can be modified) + +NMI_Handler PROC + EXPORT NMI_Handler [WEAK] + B . + ENDP +HardFault_Handler\ + PROC + EXPORT HardFault_Handler [WEAK] + B . + ENDP +SVC_Handler PROC + EXPORT SVC_Handler [WEAK] + B . + ENDP +PendSV_Handler PROC + EXPORT PendSV_Handler [WEAK] + B . + ENDP +SysTick_Handler PROC + EXPORT SysTick_Handler [WEAK] + B . + ENDP + +Default_Handler PROC + EXPORT CAN_IRQHandler [WEAK] + EXPORT GPIO_IRQHandler [WEAK] + EXPORT VREF_IRQHandler [WEAK] + EXPORT ATIM_IRQHandler [WEAK] + EXPORT GPTIM2_IRQHandler [WEAK] + EXPORT GPTIM0_1_IRQHandler [WEAK] + EXPORT COMPx_IRQHandler [WEAK] + EXPORT BSTIM_IRQHandler [WEAK] + EXPORT LUT_IRQHandler [WEAK] + EXPORT WKUPx_IRQHandler [WEAK] + EXPORT DMA_IRQHandler [WEAK] + EXPORT LPTIM_IRQHandler [WEAK] + EXPORT AES_IRQHandler [WEAK] + EXPORT CCL_IRQHandler [WEAK] + EXPORT I2C_IRQHandler [WEAK] + EXPORT LPUARTx_IRQHandler [WEAK] + EXPORT UART5_IRQHandler [WEAK] + EXPORT UART4_IRQHandler [WEAK] + EXPORT UART3_IRQHandler [WEAK] + EXPORT UART1_IRQHandler [WEAK] + EXPORT UART0_IRQHandler [WEAK] + EXPORT SPI2_IRQHandler [WEAK] + EXPORT SPI1_IRQHandler [WEAK] + EXPORT SPI0_IRQHandler [WEAK] + EXPORT DAC_IRQHandler [WEAK] + EXPORT ADC_IRQHandler [WEAK] + EXPORT FDET_IRQHandler [WEAK] + EXPORT FLASH_IRQHandler [WEAK] + EXPORT RTC_IRQHandler [WEAK] + EXPORT SVD_IRQHandler [WEAK] + EXPORT WDT_IRQHandler [WEAK] + +CAN_IRQHandler +GPIO_IRQHandler +VREF_IRQHandler +ATIM_IRQHandler +GPTIM2_IRQHandler +GPTIM0_1_IRQHandler +COMPx_IRQHandler +BSTIM_IRQHandler +LUT_IRQHandler +WKUPx_IRQHandler +DMA_IRQHandler +LPTIM_IRQHandler +AES_IRQHandler +CCL_IRQHandler +I2C_IRQHandler +LPUARTx_IRQHandler +UART5_IRQHandler +UART4_IRQHandler +UART3_IRQHandler +UART1_IRQHandler +UART0_IRQHandler +SPI2_IRQHandler +SPI1_IRQHandler +SPI0_IRQHandler +DAC_IRQHandler +ADC_IRQHandler +FDET_IRQHandler +FLASH_IRQHandler +RTC_IRQHandler +SVD_IRQHandler +WDT_IRQHandler + + B . + ENDP + + + ALIGN + + +; User Initial Stack & Heap + + IF :DEF:__MICROLIB + + EXPORT __initial_sp + EXPORT __heap_base + EXPORT __heap_limit + + ELSE + + IMPORT __use_two_region_memory + EXPORT __user_initial_stackheap +__user_initial_stackheap + + LDR R0, = Heap_Mem + LDR R1, =(Stack_Mem + Stack_Size) + LDR R2, = (Heap_Mem + Heap_Size) + LDR R3, = Stack_Mem + BX LR + + ALIGN + + ENDIF + + + END + + *****END OF FILE***** \ No newline at end of file diff --git a/code_boot_out/sdk/Drivers/CMSIS/Device/FM/FM33xx/Source/Templates/gcc/linker/fm33lg02x_flash.ld b/code_boot_out/sdk/Drivers/CMSIS/Device/FM/FM33xx/Source/Templates/gcc/linker/fm33lg02x_flash.ld new file mode 100644 index 0000000..e65baef --- /dev/null +++ b/code_boot_out/sdk/Drivers/CMSIS/Device/FM/FM33xx/Source/Templates/gcc/linker/fm33lg02x_flash.ld @@ -0,0 +1,139 @@ +/* Entry Point */ +ENTRY(Reset_Handler) + +/* Highest address of the user mode stack */ +_estack = 0x20008000; /* end of RAM */ +/* Generate a link error if heap and stack don't fit into RAM */ +_Min_Heap_Size = 0x400; /* required amount of heap */ +_Stack_Size = 0x400; /* amount of stack */ + +/* Specify the memory areas */ +MEMORY +{ +RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 32K +FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 128K +} + +/* Define output sections */ +SECTIONS +{ + /* The startup code goes first into FLASH */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + } >FLASH + + /* The program code and other data goes into FLASH */ + .text : + { + . = ALIGN(4); + *(.text) /* .text sections (code) */ + *(.text*) /* .text* sections (code) */ + *(.glue_7) /* glue arm to thumb code */ + *(.glue_7t) /* glue thumb to arm code */ + *(.eh_frame) + + KEEP (*(.init)) + KEEP (*(.fini)) + + . = ALIGN(4); + _etext = .; /* define a global symbols at end of code */ + } >FLASH + + /* Constant data goes into FLASH */ + .rodata : + { + . = ALIGN(4); + *(.rodata) /* .rodata sections (constants, strings, etc.) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + . = ALIGN(4); + } >FLASH + + .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH + .ARM : { + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + } >FLASH + + .preinit_array : + { + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array*)) + PROVIDE_HIDDEN (__preinit_array_end = .); + } >FLASH + .init_array : + { + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array*)) + PROVIDE_HIDDEN (__init_array_end = .); + } >FLASH + .fini_array : + { + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(SORT(.fini_array.*))) + KEEP (*(.fini_array*)) + PROVIDE_HIDDEN (__fini_array_end = .); + } >FLASH + + /* used by the startup to initialize data */ + _sidata = LOADADDR(.data); + + /* Initialized data sections goes into RAM, load LMA copy after code */ + .data : + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start */ + *(.data) /* .data sections */ + *(.data*) /* .data* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end */ + } >RAM AT> FLASH + + + /* Uninitialized data section */ + . = ALIGN(4); + .bss : + { + /* This is used by the startup in order to initialize the .bss secion */ + _sbss = .; /* define a global symbol at bss start */ + __bss_start__ = _sbss; + *(.bss) + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end */ + __bss_end__ = _ebss; + } >RAM + + /* Remove information from the standard libraries */ + /DISCARD/ : + { + libc.a ( * ) + libm.a ( * ) + libgcc.a ( * ) + } + + /* User_heap_stack section, used to check that there is enough RAM left */ + . = ALIGN(8); + PROVIDE ( end = . ); + PROVIDE ( _end = . ); + + /* system stack */ + PROVIDE (_stack_base = _estack - _Stack_Size); /* _estack is top of stack*/ + ASSERT ((_stack_base > end), "Error: No room left for the stack") + /* _estack is top of stack*/ + + /* left ram for heap */ + PROVIDE (heap_start = _end); + PROVIDE (heap_end = _stack_base); + PROVIDE (heap_len = heap_end - heap_start); + ASSERT ((heap_len > _Min_Heap_Size), "Error: No room left for the heap") + + .ARM.attributes 0 : { *(.ARM.attributes) } +} diff --git a/code_boot_out/sdk/Drivers/CMSIS/Device/FM/FM33xx/Source/Templates/gcc/linker/fm33lg04x_flash.ld b/code_boot_out/sdk/Drivers/CMSIS/Device/FM/FM33xx/Source/Templates/gcc/linker/fm33lg04x_flash.ld new file mode 100644 index 0000000..01712e5 --- /dev/null +++ b/code_boot_out/sdk/Drivers/CMSIS/Device/FM/FM33xx/Source/Templates/gcc/linker/fm33lg04x_flash.ld @@ -0,0 +1,268 @@ +/* +** ################################################################### +** Processor: S32K11x with mm KB SRAM +** Compiler: GNU C Compiler +** +** Abstract: +** Linker file for the GNU C Compiler +** +** Copyright 2018 NXP +** All rights reserved. +** +** THIS SOFTWARE IS PROVIDED BY NXP "AS IS" AND ANY EXPRESSED OR +** IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES +** OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. +** IN NO EVENT SHALL NXP OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, +** INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR +** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) +** HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, +** STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING +** IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF +** THE POSSIBILITY OF SUCH DAMAGE. +** +** http: www.freescale.com +** mail: support@freescale.com +** +** ################################################################### +*/ + +/* Entry Point */ +ENTRY(Reset_Handler) + +HEAP_SIZE = DEFINED(__heap_size__) ? __heap_size__ : 0x00000200; +STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x00000200; +STACK_CHECK_S_ADDR = 0x210; + +/* If symbol __flash_vector_table__=1 is defined at link time + * the interrupt vector will not be copied to RAM. + * Warning: Using the interrupt vector from Flash will not allow + * INT_SYS_InstallHandler because the section is Read Only. + */ +M_VECTOR_RAM_SIZE = DEFINED(__flash_vector_table__) ? 0x0 : 0x00C0; + +/* Specify the memory areas */ +MEMORY +{ + /* Flash */ + m_interrupts (RX) : ORIGIN = 0x00000000, LENGTH = 0x000000C0 + + + m_text (RX) : ORIGIN = 0x00000100, LENGTH = 0x0007F00 + m_text1 (RX) : ORIGIN = 0x0001BFF0, LENGTH = 0x10 /*FOR UDS DATA*/ + + + /* SRAM_L */ + /*m_custom (RW) : ORIGIN = 0x1FFFFC00, LENGTH = 0x00000300*/ + /* SRAM_U */ + m_data (RW) : ORIGIN = 0x20000000, LENGTH = 0x00003800 + m_data_2 (RW) : ORIGIN = 0x20003800, LENGTH = 0x00002800 /*Ŀǰ ASIL */ + m_data_5 (RW) : ORIGIN = 0x20007C00, LENGTH = 0x00000200 /*Ŀǰδʼ*/ + m_data_3 (RW) : ORIGIN = (0x20003800-STACK_CHECK_S_ADDR), LENGTH = 0x10 +} + +/* Define output sections */ +SECTIONS +{ + + /* The startup code goes first into internal flash */ + .interrupts : + { + __VECTOR_TABLE = .; + __interrupts_start__ = .; + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + __interrupts_end__ = .; + . = ALIGN(4); + } > m_interrupts + + + /* The program code and other data goes into internal flash */ + .text : + { + . = ALIGN(4); + *(.text) /* .text sections (code) */ + *(.text*) /* .text* sections (code) */ + *(.rodata) /* .rodata sections (constants, strings, etc.) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + *(.init) /* section used in crti.o files */ + *(.fini) /* section used in crti.o files */ + *(.eh_frame) /* section used in crtbegin.o files */ + . = ALIGN(4); + } > m_text + + /* Section used by the libgcc.a library for fvp4 */ + .ARM : + { + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + } > m_text + + __etext = .; /* Define a global symbol at end of code. */ + __DATA_ROM = .; /* Symbol is used by startup for data initialization. */ + /* The program code and other data goes into internal flash */ + .ROM_APP_VALID : + { + . = ALIGN(4); + *(.ROM_APP_VALID) /* .text sections (code) */ + *(.ROM_APP_VALID*) /* .text* sections (code) */ + . = ALIGN(4); + } > m_text1 + __DATA_UDS_ROM = .; /* Symbol is used by startup for data initialization. */ + + .interrupts_ram : + { + . = ALIGN(4); + __VECTOR_RAM__ = .; + __RAM_START = .; + __interrupts_ram_start__ = .; /* Create a global symbol at data start. */ + *(.m_interrupts_ram) /* This is a user defined section. */ + . += M_VECTOR_RAM_SIZE; + . = ALIGN(4); + __interrupts_ram_end__ = .; /* Define a global symbol at data end. */ + } > m_data + + __VECTOR_RAM = DEFINED(__flash_vector_table__) ? ORIGIN(m_interrupts) : __VECTOR_RAM__ ; + __RAM_VECTOR_TABLE_SIZE = DEFINED(__flash_vector_table__) ? 0x0 : (__interrupts_ram_end__ - __interrupts_ram_start__) ; + + .data : AT(__DATA_ROM) + { + . = ALIGN(4); + __DATA_RAM = .; + __data_start__ = .; /* Create a global symbol at data start. */ + *(.data) /* .data sections */ + *(.data*) /* .data* sections */ + . = ALIGN(4); + __data_end__ = .; /* Define a global symbol at data end. */ + } > m_data + + __DATA_END = __DATA_ROM + (__data_end__ - __data_start__); + __CODE_ROM = __DATA_END; /* Symbol is used by code initialization. */ + + .code : AT(__CODE_ROM) + { + . = ALIGN(4); + __CODE_RAM = .; + __code_start__ = .; /* Create a global symbol at code start. */ + __code_ram_start__ = .; + *(.code_ram) /* Custom section for storing code in RAM */ + . = ALIGN(4); + __code_end__ = .; /* Define a global symbol at code end. */ + __code_ram_end__ = .; + } > m_data + + __CODE_END = __CODE_ROM + (__code_end__ - __code_start__); + __CUSTOM_ROM = __CODE_END; + + /* Custom Section Block that can be used to place data at absolute address. */ + /* Use __attribute__((section (".customSection"))) to place data here. */ + /* Use this section only when MTB (Micro Trace Buffer) is not used, because MTB uses the same RAM area, as described in S32K Reference Manual. */ + + + /* Uninitialized data section. */ + .bss : + { + /* This is used by the startup in order to initialize the .bss section. */ + . = ALIGN(4); + __BSS_START = .; + __bss_start__ = .; + *(.bss) + *(.bss*) + *(COMMON) + . = ALIGN(4); + __bss_end__ = .; + __BSS_END = .; + } > m_data + + /* Put heap section after the program data */ + .heap : + { + . = ALIGN(8); + __end__ = .; + __heap_start__ = .; + PROVIDE(end = .); + PROVIDE(_end = .); + PROVIDE(__end = .); + __HeapBase = .; + . += HEAP_SIZE; + __HeapLimit = .; + __heap_limit = .; + __heap_end__ = .; + } > m_data + + /* Initializes stack on the end of block */ + __StackTop = ORIGIN(m_data) + LENGTH(m_data); + __StackLimit = __StackTop - STACK_SIZE; + __StackLimit_check = __StackTop - STACK_SIZE -0x10; + PROVIDE(__stack = __StackTop); + //__RAM_END = __StackTop; + + .stack __StackLimit : + { + . = ALIGN(8); + __stack_start__ = .; + . += STACK_SIZE; + __stack_end__ = .; + } > m_data + + + + __DATA2_ROM = __CUSTOM_ROM; + .RAM_ASIL ORIGIN(m_data_2) : AT(__DATA2_ROM) + { + . = ALIGN(4); + __RAM_ASILStart = .; + __RAM_ASIL_Start__ = .; + KEEP(*(.RAM_ASIL)) /* Keep section even if not referenced. */ + __RAM_ASIL_end__ = .; + . = ALIGN(4); + __scst_data_start__ = .; + *(.m0_scst_ram_data) + . = ALIGN(4); + *(.m0_scst_ram_data_target0) + . = ALIGN(4); + *(.m0_scst_ram_data_target1) + . = ALIGN(4); + *(.m0_scst_ram_test_code) + *(.m0_scst_test_shell_data) + __scst_data_end__ = .; + } >m_data_2 + + /* Initializes stack on the end of block */ + __DATA2_RAM_END = ORIGIN(m_data_2) + LENGTH(m_data_2); + __DATA2_ROM_END = __DATA2_ROM + __scst_data_end__ - __RAM_ASIL_Start__; + + __STACK_CHECK_ROM = __DATA2_ROM_END; + __STACK_CHECK_RAM = ORIGIN(m_data_3) + LENGTH(m_data_3); + .STACK_CHECK_ADDR ORIGIN(m_data_3) : AT(__STACK_CHECK_ROM) + { + __STACK_CHECK_ADDRStart = .; + __STACK_CHECK_ADDR_start__ = .; + KEEP(*(.STACK_CHECK_ADDR)) /* Keep section even if not referenced. */ + __STACK_CHECK_ADDR_end__ = .; + } > m_data_3 + __STACK_CHECK_ROM_END = __STACK_CHECK_ROM + (__STACK_CHECK_ADDR_end__ - __STACK_CHECK_ADDR_start__); + + __DATA5_ROM = __STACK_CHECK_ROM_END; + .RAM_FLAG_NOLINT ORIGIN(m_data_5) : AT(__DATA5_ROM) + { + . = ALIGN(4); + __RAM_FLAG_NOLINTstart = .; + __RAM_FLAG_NOLINT_Start__ = .; + KEEP(*(.RAM_FLAG_NOLINT)) /* Keep section even if not referenced. */ + __RAM_FLAG_NOLINT_end__ = .; + . = ALIGN(4); + } >m_data_5 + + /* Initializes stack on the end of block */ + __DATA5_RAM_END = ORIGIN(m_data_5) + LENGTH(m_data_5); + __DATA5_ROM_END = __DATA5_ROM + __RAM_FLAG_NOLINT_end__ - __RAM_FLAG_NOLINTstart; + + __RAM_END = __DATA2_RAM_END; + .ARM.attributes 0 : { *(.ARM.attributes) } + + ASSERT(__StackLimit >= __HeapLimit, "region m_data overflowed with stack and heap") + ASSERT((0x20003800-STACK_CHECK_S_ADDR) == __StackLimit_check, "region stack check addr is error") +} + diff --git a/code_boot_out/sdk/Drivers/CMSIS/Device/FM/FM33xx/Source/Templates/gcc/linker/fm33lg04x_flash_backup.ld b/code_boot_out/sdk/Drivers/CMSIS/Device/FM/FM33xx/Source/Templates/gcc/linker/fm33lg04x_flash_backup.ld new file mode 100644 index 0000000..49f3d0f --- /dev/null +++ b/code_boot_out/sdk/Drivers/CMSIS/Device/FM/FM33xx/Source/Templates/gcc/linker/fm33lg04x_flash_backup.ld @@ -0,0 +1,131 @@ +/* Entry Point */ +ENTRY(Reset_Handler) + +/* Highest address of the user mode stack */ +_estack = 0x20008000; /* end of RAM */ +/* Generate a link error if heap and stack don't fit into RAM */ +_Min_Heap_Size = 0x400; /* required amount of heap */ +_Stack_Size = 0x400; /* amount of stack */ + +/* Specify the memory areas */ +MEMORY +{ +RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 32K +FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 256K +} + +/* Define output sections */ +SECTIONS +{ + /* The startup code goes first into FLASH */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + } >FLASH + + /* The program code and other data goes into FLASH */ + .text : + { + . = ALIGN(4); + *(.text) /* .text sections (code) */ + *(.text*) /* .text* sections (code) */ + *(.glue_7) /* glue arm to thumb code */ + *(.glue_7t) /* glue thumb to arm code */ + *(.eh_frame) + + KEEP (*(.init)) + KEEP (*(.fini)) + + . = ALIGN(4); + _etext = .; /* define a global symbols at end of code */ + } >FLASH + + /* Constant data goes into FLASH */ + .rodata : + { + . = ALIGN(4); + *(.rodata) /* .rodata sections (constants, strings, etc.) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + . = ALIGN(4); + } >FLASH + + .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH + .ARM : { + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + } >FLASH + + .preinit_array : + { + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array*)) + PROVIDE_HIDDEN (__preinit_array_end = .); + } >FLASH + .init_array : + { + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array*)) + PROVIDE_HIDDEN (__init_array_end = .); + } >FLASH + .fini_array : + { + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(SORT(.fini_array.*))) + KEEP (*(.fini_array*)) + PROVIDE_HIDDEN (__fini_array_end = .); + } >FLASH + + /* used by the startup to initialize data */ + _sidata = LOADADDR(.data); + + /* Initialized data sections goes into RAM, load LMA copy after code */ + .data : + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start */ + *(.data) /* .data sections */ + *(.data*) /* .data* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end */ + } >RAM AT> FLASH + + + /* Uninitialized data section */ + . = ALIGN(4); + .bss : + { + /* This is used by the startup in order to initialize the .bss secion */ + _sbss = .; /* define a global symbol at bss start */ + __bss_start__ = _sbss; + *(.bss) + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end */ + __bss_end__ = _ebss; + } >RAM + + /* User_heap_stack section, used to check that there is enough RAM left */ + . = ALIGN(8); + PROVIDE ( end = . ); + PROVIDE ( _end = . ); + + /* system stack */ + PROVIDE (_stack_base = _estack - _Stack_Size); /* _estack is top of stack*/ + ASSERT ((_stack_base > end), "Error: No room left for the stack") + /* _estack is top of stack*/ + + /* left ram for heap */ + PROVIDE (heap_start = _end); + PROVIDE (heap_end = _stack_base); + PROVIDE (heap_len = heap_end - heap_start); + ASSERT ((heap_len > _Min_Heap_Size), "Error: No room left for the heap") + + .ARM.attributes 0 : { *(.ARM.attributes) } +} diff --git a/code_boot_out/sdk/Drivers/CMSIS/Device/FM/FM33xx/Source/Templates/gcc/startup_fm33lg0xx.S b/code_boot_out/sdk/Drivers/CMSIS/Device/FM/FM33xx/Source/Templates/gcc/startup_fm33lg0xx.S new file mode 100644 index 0000000..4c22beb --- /dev/null +++ b/code_boot_out/sdk/Drivers/CMSIS/Device/FM/FM33xx/Source/Templates/gcc/startup_fm33lg0xx.S @@ -0,0 +1,235 @@ +/* ---------------------------------------------------------------------------------------*/ +/* @file: startup_S32K118.s */ +/* @purpose: GNU Compiler Collection Startup File */ +/* S32K118 */ +/* @version: 1.0 */ +/* @date: 2018-1-22 */ +/* @build: b170107 */ +/* ---------------------------------------------------------------------------------------*/ +/* */ +/* Copyright 2018 NXP */ +/* All rights reserved. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY NXP "AS IS" AND ANY EXPRESSED OR */ +/* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES */ +/* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. */ +/* IN NO EVENT SHALL NXP OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, */ +/* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES */ +/* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR */ +/* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) */ +/* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, */ +/* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING */ +/* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF */ +/* THE POSSIBILITY OF SUCH DAMAGE. */ +/*****************************************************************************/ +/* Version: GNU Compiler Collection */ +/*****************************************************************************/ + .syntax unified + .arch armv6-m + + .section .isr_vector, "a" + .align 2 + .globl __isr_vector +__isr_vector: + .long __StackTop /* Top of Stack */ + .long Reset_Handler /* Reset Handler */ + .long NMI_Handler /* Non Maskable Interrupt */ + .long HardFault_Handler /* Cortex-M0 SV Hard Fault Interrupt */ + .long 0 + .long 0 + .long 0 + .long 0 + .long 0 + .long 0 + .long 0 + .long SVC_Handler /* Cortex-M0 SV Call Interrupt */ + .long 0 + .long 0 + .long PendSV_Handler /* Cortex-M0 Pend SV Interrupt */ + .long SysTick_Handler /* Cortex-M0 System Tick Interrupt */ + + + .long WWDT_IRQHandler /* 0: WWDT */ + .long SVD_IRQHandler /* 1: SVD */ + .long RTC_IRQHandler /* 2: RTC */ + .long FLASH_IRQHandler /* 3: FLASH */ + .long FDET_IRQHandler /* 4: FDET */ + .long ADC_IRQHandler /* 5: ADC */ + .long DAC_IRQHandler /* 6: DAC */ + .long SPI0_IRQHandler /* 7: SPI0 */ + .long SPI1_IRQHandler /* 8: SPI1 */ + .long SPI2_IRQHandler /* 9: SPI2 */ + .long UART0_IRQHandler /* 10: UART0 */ + .long UART1_IRQHandler /* 11: UART1 */ + .long UART3_IRQHandler /* 12: UART3 */ + .long UART4_IRQHandler /* 13: UART4 */ + .long UART5_IRQHandler /* 14: UART5 */ + .long U7816_IRQHandler /* 15: U7816 */ + .long LPUARTx_IRQHandler /* 16: LPUARTx */ + .long I2C_IRQHandler /* 17: I2C */ + .long CCL_IRQHandler /* 18: CCL */ + .long AES_IRQHandler /* 19: AES */ + .long LPTIM_IRQHandler /* 20: LPTIM */ + .long DMA_IRQHandler /* 21: DMA */ + .long WKUPx_IRQHandler /* 22: WKUP */ + .long LUT_IRQHandler /* 23: LUT */ + .long BSTIM_IRQHandler /* 24: BSTIM */ + .long COMPx_IRQHandler /* 25: COMPx */ + .long GPTIM0_1_IRQHandler /* 26: GPTIM0(1) */ + .long GPTIM2_IRQHandler /* 27: GPTIM2 */ + .long ATIM_IRQHandler /* 28: ATIM */ + .long VREF_IRQHandler /* 39: VREF */ + .long GPIO_IRQHandler /* 30: GPIO */ + .long CAN_IRQHandler /* 31: CAN */ + + .size __isr_vector, . - __isr_vector + +/* Flash Configuration */ + .section .FlashConfig, "a" + .long 0xFFFFFFFF /* 8 bytes backdoor comparison key */ + .long 0xFFFFFFFF /* */ + .long 0xFFFFFFFF /* 4 bytes program flash protection bytes */ + .long 0xFFFF7FFE /* FDPROT:FEPROT:FOPT:FSEC(0xFE = unsecured) */ + + .text + .thumb + +/* Reset Handler */ + + .thumb_func + .align 2 + .globl Reset_Handler + .weak Reset_Handler + .type Reset_Handler, %function +Reset_Handler: + cpsid i /* Mask interrupts */ + + /* Init the rest of the registers */ + ldr r1,=0 + ldr r2,=0 + ldr r3,=0 + ldr r4,=0 + ldr r5,=0 + ldr r6,=0 + ldr r7,=0 + mov r8,r7 + mov r9,r7 + mov r10,r7 + mov r11,r7 + mov r12,r7 + +#ifdef START_FROM_FLASH + + /* Init ECC RAM */ + #ldr r6, =0x200030c0 + #ldr r7, =0x200030d0 + ldr r1, =__RAM_START + ldr r2, =__RAM_END + + + subs r2, r1 + subs r2, #1 + ble .LC5 + + movs r0, 0 + movs r3, #4 +.LC4: + str r0, [r1] +.LC41: + add r1, r1, r3 + subs r2, 4 + bge .LC4 + blt .LC5 +.LC42: + /*a<0x200030c0 a>0x200030d0 LC41*/ + ldr r5, =0x20005710 + movs r4,r1 + subs r4,r5 + bgt .LC4 + ldr r5, =0x20005700 + movs r4,r1 + subs r4,r5 + blt .LC4 + bge .LC41 +.LC5: +#else + bl ram_init +#endif + + /* Initialize the stack pointer */ + ldr r0,=__StackTop + mov r13,r0 + +#ifndef __NO_SYSTEM_INIT + /* Call the system init routine */ + ldr r0,=SystemInit + blx r0 +#endif + + /* Init .data and .bss sections */ + ldr r0,=init_data_bss + blx r0 + cpsie i /* Unmask interrupts */ + bl main +JumpToSelf: + b JumpToSelf + + .pool + .size Reset_Handler, . - Reset_Handler + + .align 1 + .thumb_func + .weak DefaultISR + .type DefaultISR, %function +DefaultISR: + b DefaultISR + .size DefaultISR, . - DefaultISR + +/* Macro to define default handlers. Default handler + * will be weak symbol and just dead loops. They can be + * overwritten by other handlers */ + .macro def_irq_handler handler_name + .weak \handler_name + .set \handler_name, DefaultISR + .endm + +/* Exception Handlers */ + def_irq_handler NMI_Handler + def_irq_handler HardFault_Handler + def_irq_handler SVC_Handler + def_irq_handler PendSV_Handler + def_irq_handler SysTick_Handler + def_irq_handler WWDT_IRQHandler + def_irq_handler SVD_IRQHandler + def_irq_handler RTC_IRQHandler + def_irq_handler FLASH_IRQHandler + def_irq_handler FDET_IRQHandler + def_irq_handler ADC_IRQHandler + def_irq_handler DAC_IRQHandler + def_irq_handler SPI0_IRQHandler + def_irq_handler SPI1_IRQHandler + def_irq_handler SPI2_IRQHandler + def_irq_handler UART0_IRQHandler + def_irq_handler UART1_IRQHandler + def_irq_handler UART3_IRQHandler + def_irq_handler UART4_IRQHandler + def_irq_handler UART5_IRQHandler + def_irq_handler U7816_IRQHandler + def_irq_handler LPUARTx_IRQHandler + def_irq_handler I2C_IRQHandler + def_irq_handler CCL_IRQHandler + def_irq_handler AES_IRQHandler + def_irq_handler LPTIM_IRQHandler + def_irq_handler DMA_IRQHandler + def_irq_handler WKUPx_IRQHandler + def_irq_handler LUT_IRQHandler + def_irq_handler BSTIM_IRQHandler + def_irq_handler COMPx_IRQHandler + def_irq_handler GPTIM0_1_IRQHandler + def_irq_handler GPTIM2_IRQHandler + def_irq_handler ATIM_IRQHandler + def_irq_handler VREF_IRQHandler + def_irq_handler GPIO_IRQHandler + def_irq_handler CAN_IRQHandler + + .end diff --git a/code_boot_out/sdk/Drivers/CMSIS/Device/FM/FM33xx/Source/Templates/gcc/startup_fm33lg0xx_back.S b/code_boot_out/sdk/Drivers/CMSIS/Device/FM/FM33xx/Source/Templates/gcc/startup_fm33lg0xx_back.S new file mode 100644 index 0000000..e1c4d0d --- /dev/null +++ b/code_boot_out/sdk/Drivers/CMSIS/Device/FM/FM33xx/Source/Templates/gcc/startup_fm33lg0xx_back.S @@ -0,0 +1,250 @@ + .syntax unified + .cpu cortex-m0plus + .fpu softvfp + .thumb + +.global Default_Handler + +/* start address for the initialization values of the .data section. +defined in linker script */ +.word _sidata +/* start address for the .data section. defined in linker script */ +.word _sdata +/* end address for the .data section. defined in linker script */ +.word _edata +/* start address for the .bss section. defined in linker script */ +.word _sbss +/* end address for the .bss section. defined in linker script */ +.word _ebss + + .section .text.Reset_Handler + .weak Reset_Handler + .type Reset_Handler, %function +Reset_Handler: + ldr r0, =_estack + mov sp, r0 /* set stack pointer */ + +/* Copy the data segment initializers from flash to SRAM */ + movs r1, #0 + b LoopCopyDataInit + +CopyDataInit: + ldr r3, =_sidata + ldr r3, [r3, r1] + str r3, [r0, r1] + adds r1, r1, #4 + +LoopCopyDataInit: + ldr r0, =_sdata + ldr r3, =_edata + adds r2, r0, r1 + cmp r2, r3 + bcc CopyDataInit + ldr r2, =_sbss + b LoopFillZerobss +/* Zero fill the bss segment. */ +FillZerobss: + movs r3, #0 + str r3, [r2] + adds r2, r2, #4 + +LoopFillZerobss: + ldr r3, = _ebss + cmp r2, r3 + bcc FillZerobss + +/* Call the clock system intitialization function.*/ + bl SystemInit +/* Call static constructors */ +// bl __libc_init_array +/* Call the application's entry point.*/ + bl main + +LoopForever: + b LoopForever + + .size Reset_Handler, .-Reset_Handler + .section .text.Default_Handler,"ax",%progbits +Default_Handler: +Infinite_Loop: + b Infinite_Loop + .size Default_Handler, .-Default_Handler + +/****************************************************************************** +* +* The minimal vector table for a Cortex M0. Note that the proper constructs +* must be placed on this to ensure that it ends up at physical address +* 0x0000.0000. +* +******************************************************************************/ + .section .isr_vector,"a",%progbits + .global g_pfnVectors +g_pfnVectors: + .word _estack + .word Reset_Handler + .word NMI_Handler + .word HardFault_Handler + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word SVC_Handler + .word 0 + .word 0 + .word PendSV_Handler + .word SysTick_Handler + /* External Interrupts */ + .word WWDT_IRQHandler /* 0: WWDT */ + .word SVD_IRQHandler /* 1: SVD */ + .word RTC_IRQHandler /* 2: RTC */ + .word FLASH_IRQHandler /* 3: FLASH */ + .word FDET_IRQHandler /* 4: FDET */ + .word ADC_IRQHandler /* 5: ADC */ + .word DAC_IRQHandler /* 6: DAC */ + .word SPI0_IRQHandler /* 7: SPI0 */ + .word SPI1_IRQHandler /* 8: SPI1 */ + .word SPI2_IRQHandler /* 9: SPI2 */ + .word UART0_IRQHandler /* 10: UART0 */ + .word UART1_IRQHandler /* 11: UART1 */ + .word UART3_IRQHandler /* 12: UART3 */ + .word UART4_IRQHandler /* 13: UART4 */ + .word UART5_IRQHandler /* 14: UART5 */ + .word U7816_IRQHandler /* 15: U7816 */ + .word LPUARTx_IRQHandler /* 16: LPUARTx */ + .word I2C_IRQHandler /* 17: I2C */ + .word CCL_IRQHandler /* 18: CCL */ + .word AES_IRQHandler /* 19: AES */ + .word LPTIM_IRQHandler /* 20: LPTIM */ + .word DMA_IRQHandler /* 21: DMA */ + .word WKUPx_IRQHandler /* 22: WKUP */ + .word LUT_IRQHandler /* 23: LUT */ + .word BSTIM_IRQHandler /* 24: BSTIM */ + .word COMPx_IRQHandler /* 25: COMPx */ + .word GPTIM0_1_IRQHandler /* 26: GPTIM0(1) */ + .word GPTIM2_IRQHandler /* 27: GPTIM2 */ + .word ATIM_IRQHandler /* 28: ATIM */ + .word VREF_IRQHandler /* 39: VREF */ + .word GPIO_IRQHandler /* 30: GPIO */ + .word CAN_IRQHandler /* 31: CAN */ + +/******************************************************************************* +* +* Provide weak aliases for each Exception handler to the Default_Handler. +* As they are weak aliases, any function with the same name will override +* this definition. +* +*******************************************************************************/ + .weak NMI_Handler + .thumb_set NMI_Handler,Default_Handler + + .weak HardFault_Handler + .thumb_set HardFault_Handler,Default_Handler + + .weak SVC_Handler + .thumb_set SVC_Handler,Default_Handler + + .weak PendSV_Handler + .thumb_set PendSV_Handler,Default_Handler + + .weak SysTick_Handler + .thumb_set SysTick_Handler,Default_Handler + + .weak WWDT_IRQHandler + .thumb_set WWDT_IRQHandler,Default_Handler + + .weak SVD_IRQHandler + .thumb_set SVD_IRQHandler,Default_Handler + + .weak RTC_IRQHandler + .thumb_set RTC_IRQHandler,Default_Handler + + .weak FLASH_IRQHandler + .thumb_set FLASH_IRQHandler,Default_Handler + + .weak FDET_IRQHandler + .thumb_set FDET_IRQHandler,Default_Handler + + .weak ADC_IRQHandler + .thumb_set ADC_IRQHandler,Default_Handler + + .weak DAC_IRQHandler + .thumb_set DAC_IRQHandler,Default_Handler + + .weak SPI0_IRQHandler + .thumb_set SPI0_IRQHandler,Default_Handler + + .weak SPI1_IRQHandler + .thumb_set SPI1_IRQHandler,Default_Handler + + .weak SPI2_IRQHandler + .thumb_set SPI2_IRQHandler,Default_Handler + + .weak UART0_IRQHandler + .thumb_set UART0_IRQHandler,Default_Handler + + .weak UART1_IRQHandler + .thumb_set UART1_IRQHandler,Default_Handler + + .weak UART3_IRQHandler + .thumb_set UART3_IRQHandler,Default_Handler + + .weak UART4_IRQHandler + .thumb_set UART4_IRQHandler,Default_Handler + + .weak UART5_IRQHandler + .thumb_set UART5_IRQHandler,Default_Handler + + .weak U7816_IRQHandler + .thumb_set U7816_IRQHandler,Default_Handler + + .weak LPUARTx_IRQHandler + .thumb_set LPUARTx_IRQHandler,Default_Handler + + .weak I2C_IRQHandler + .thumb_set I2C_IRQHandler,Default_Handler + + .weak CCL_IRQHandler + .thumb_set CCL_IRQHandler,Default_Handler + + .weak AES_IRQHandler + .thumb_set AES_IRQHandler,Default_Handler + + .weak LPTIM_IRQHandler + .thumb_set LPTIM_IRQHandler,Default_Handler + + .weak DMA_IRQHandler + .thumb_set DMA_IRQHandler,Default_Handler + + .weak WKUPx_IRQHandler + .thumb_set WKUPx_IRQHandler,Default_Handler + + .weak LUT_IRQHandler + .thumb_set LUT_IRQHandler,Default_Handler + + .weak BSTIM_IRQHandler + .thumb_set BSTIM_IRQHandler,Default_Handler + + .weak COMPx_IRQHandler + .thumb_set COMPx_IRQHandler,Default_Handler + + .weak GPTIM0_1_IRQHandler + .thumb_set GPTIM0_1_IRQHandler,Default_Handler + + .weak GPTIM2_IRQHandler + .thumb_set GPTIM2_IRQHandler,Default_Handler + + .weak ATIM_IRQHandler + .thumb_set ATIM_IRQHandler,Default_Handler + + .weak VREF_IRQHandler + .thumb_set VREF_IRQHandler,Default_Handler + + .weak GPIO_IRQHandler + .thumb_set GPIO_IRQHandler,Default_Handler + + .weak CAN_IRQHandler + .thumb_set CAN_IRQHandler,Default_Handler + diff --git a/code_boot_out/sdk/Drivers/CMSIS/Device/FM/FM33xx/Source/Templates/iar/linker/FM33LG04x.icf b/code_boot_out/sdk/Drivers/CMSIS/Device/FM/FM33xx/Source/Templates/iar/linker/FM33LG04x.icf new file mode 100644 index 0000000..f75aa07 --- /dev/null +++ b/code_boot_out/sdk/Drivers/CMSIS/Device/FM/FM33xx/Source/Templates/iar/linker/FM33LG04x.icf @@ -0,0 +1,178 @@ +/* +** ################################################################### +** Processor: +** Compiler: IAR ANSI C/C++ Compiler for ARM +** +** Abstract: +** Linker file for the IAR ANSI C/C++ Compiler for ARM +** +** Copyright 2018 NXP +** All rights reserved. +** +** THIS SOFTWARE IS PROVIDED BY NXP "AS IS" AND ANY EXPRESSED OR +** IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES +** OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. +** IN NO EVENT SHALL NXP OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, +** INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR +** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) +** HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, +** STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING +** IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF +** THE POSSIBILITY OF SUCH DAMAGE. +** +** http: www.freescale.com +** mail: support@freescale.com +** +** ################################################################### +*/ + +/* If symbol __flash_vector_table__=1 is defined at link time + * the interrupt vector will not be copied to RAM. + * Warning: Using the interrupt vector from FLASH will not allow + * INT_SYS_InstallHandler because the section is Read Only. + */ +define symbol __ram_vector_table_size__ = isdefinedsymbol(__flash_vector_table__) ? 0 : 0x000000C0; +define symbol __ram_vector_table_offset__ = isdefinedsymbol(__flash_vector_table__) ? 0 : 0x000000BF; + +/* Flash */ +define symbol m_interrupts_start = 0x00000000; +define symbol m_interrupts_end = 0x000000BF; + +define symbol m_text_start = 0x00000100; +define symbol m_text_end = 0x00007FFF; // 1BFF0 is app valid flag end + +define symbol m_text_start1 = 0x00007800; // for uds data +define symbol m_text_end1 = 0x00007BFF; // + +define symbol m_text_start7 = 0x0001BFF0; // for app valid end +define symbol m_text_end7 = 0x0001BFFF; // + +/* SRAM_U */ +define symbol m_interrupts_ram_start = 0x20000000; +define symbol m_interrupts_ram_end = 0x20000000 + __ram_vector_table_offset__; + +define symbol m_data_start = m_interrupts_ram_start + __ram_vector_table_size__; +define symbol m_data_end = 0x20005FFF; //0x200037FF + +/* +define symbol m_data_1_start = 0x20003800; //for asil ram +define symbol m_data_1_end = 0x20005FFF; +*/ + +define symbol m_data_2_start = 0x20006000; //for eeprom +define symbol m_data_2_end = 0x20006FFF; + +define symbol m_data_3_start = 0x20007000; //for flash driver +define symbol m_data_3_end = 0x200077FF; + +define symbol m_data_4_start = 0x20007800; //for wdog +define symbol m_data_4_end = 0x20007BEF; //0x20007BF0 //for flash + +define symbol m_data_7_start = 0x20007C00; //for no init +define symbol m_data_7_end = 0x20007DFF; + +define symbol m_data_5_start = 0x20007FC0; //for 編程會話標志 +define symbol m_data_5_end = 0x20007FCF; + +define symbol m_data_6_start = 0x20007FD0; //for 数字签名 +define symbol m_data_6_end = 0x20007FEF; + + +/* Sizes */ +if (isdefinedsymbol(__stack_size__)) { + define symbol __size_cstack__ = __stack_size__; +} else { + define symbol __size_cstack__ = 0x00000800; +} + +if (isdefinedsymbol(__heap_size__)) { + define symbol __size_heap__ = __heap_size__; +} else { + define symbol __size_heap__ = 0x00000200; +} + +define exported symbol __VECTOR_TABLE = m_interrupts_start; +define exported symbol __VECTOR_RAM = isdefinedsymbol(__flash_vector_table__) ? m_interrupts_start : m_interrupts_ram_start; +define exported symbol __RAM_VECTOR_TABLE_SIZE = __ram_vector_table_size__; + +define exported symbol __RAM_START = m_interrupts_ram_start; +define exported symbol __RAM_END = m_data_end; + +define memory mem with size = 4G; +define region TEXT_region = mem:[from m_interrupts_start to m_interrupts_end] + | mem:[from m_text_start to m_text_end]; +/*define region TEXT_region1 = mem:[from m_text_start1 to m_text_end1]; +define region TEXT_region2 = mem:[from m_text_start2 to m_text_end2];*/ +define region TEXT_region1 = mem:[from m_text_start1 to m_text_end1]; +define region TEXT_region7 = mem:[from m_text_start7 to m_text_end7]; +define region DATA_region = mem:[from m_data_start to m_data_end-__size_cstack__]; +/*define region DATA_region_1 = mem:[from m_data_1_start to m_data_1_end];*/ +define region DATA_region_2 = mem:[from m_data_2_start to m_data_2_end]; +define region DATA_region_3 = mem:[from m_data_3_start to m_data_3_end]; +define region DATA_region_4 = mem:[from m_data_4_start to m_data_4_end]; +define region DATA_region_7 = mem:[from m_data_7_start to m_data_7_end]; +define region DATA_region_5 = mem:[from m_data_5_start to m_data_5_end]; +define region DATA_region_6 = mem:[from m_data_6_start to m_data_6_end]; +define region CSTACK_region = mem:[from m_data_end-__size_cstack__+1 to m_data_end]; +define region CSTACK_region_check = mem:[from m_data_end-__size_cstack__+1-16 to m_data_end-__size_cstack__]; +define region m_interrupts_ram_region = mem:[from m_interrupts_ram_start to m_interrupts_ram_end]; + + + +define block CSTACK with alignment = 8, size = __size_cstack__ { }; +define block HEAP with alignment = 8, size = __size_heap__ { }; +define block RW { readwrite }; +define block ZI { zi }; + +/* Custom Section Block that can be used to place data at absolute address. */ +/* Use __attribute__((section (".customSection"))) to place data here. */ +/* Use this section only when MTB (Micro Trace Buffer) is not used, because MTB uses the same RAM area, as described in S32K Reference Manual. */ +define block stack_check_Block { section .STACK_CHECK_ADDR }; + +define block __CODE_ROM { section .textrw_init }; +define block __CODE_RAM { section .textrw }; + + +initialize manually { section .textrw }; +initialize manually { section .bss }; +initialize manually { section .customSection }; + +initialize manually { section .RAM_FLAG_PROG }; +initialize manually { section .RAM_FLASH_DRV }; +initialize manually { section .RAM_WDOG }; + +/*initialize manually { section .RAM_ASIL };*/ +initialize manually { section .STACK_CHECK_ADDR }; +initialize manually { section .data }; +initialize manually { section __DLIB_PERTHREAD }; + +do not initialize { section .noinit, section .bss, section .data, section __DLIB_PERTHREAD, section .customSection,section .STACK_CHECK_ADDR + ,section .RAM_FLAG_PROG,section .RAM_FLASH_DRV,section .RAM_WDOG, + /*,section .RAM_ASIL*/ + }; + + +place at address mem: m_interrupts_start { readonly section .intvec }; +place in TEXT_region { readonly }; +place in TEXT_region { block __CODE_ROM }; +/*place in TEXT_region { section .ROM_ASIL};*/ +place in TEXT_region1 { section .ROM_DATA_UDS}; +place in TEXT_region7 { section .ROM_APP_VALID_END}; +place in DATA_region { block RW }; +place in DATA_region { block __CODE_RAM }; +/*place in DATA_region { section .RAM_L};*/ +place in DATA_region { block ZI }; +place in DATA_region { last block HEAP }; +/*place in DATA_region_1 { section .RAM_ASIL };*/ +place in DATA_region_2 { section .RAM_EEPROM }; +place in DATA_region_3 { section .RAM_FLASH_DRV }; +place in DATA_region_4 { section .RAM_WDOG }; +place in DATA_region_7 { section .RAM_FLAG_NOLINT }; +place in DATA_region_5 { section .RAM_FLAG_PROG }; +place in DATA_region_6 { section .RAM_FLAG_SIG }; +place in CSTACK_region { block CSTACK }; +place in CSTACK_region_check { block stack_check_Block}; +place in m_interrupts_ram_region { section m_interrupts_ram }; + + diff --git a/code_boot_out/sdk/Drivers/CMSIS/Device/FM/FM33xx/Source/Templates/iar/linker/FM33LG04x_backup.icf b/code_boot_out/sdk/Drivers/CMSIS/Device/FM/FM33xx/Source/Templates/iar/linker/FM33LG04x_backup.icf new file mode 100644 index 0000000..9320907 --- /dev/null +++ b/code_boot_out/sdk/Drivers/CMSIS/Device/FM/FM33xx/Source/Templates/iar/linker/FM33LG04x_backup.icf @@ -0,0 +1,33 @@ +/*###ICF### Section handled by ICF editor, don't touch! ****/ +/*-Editor annotation file-*/ +/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ +/*-Specials-*/ +define symbol __ICFEDIT_intvec_start__ = 0x00008100; +/*-Memory Regions-*/ +define symbol __ICFEDIT_region_ROM_start__ = 0x00000000; +define symbol __ICFEDIT_region_ROM_end__ = 0x0003FFFF; +define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; +define symbol __ICFEDIT_region_RAM_end__ = 0x20007FFF; +/*-Sizes-*/ +define symbol __ICFEDIT_size_cstack__ = 0x800; +define symbol __ICFEDIT_size_heap__ = 0x0; +/**** End of ICF editor section. ###ICF###*/ + +define memory mem with size = 4G; +define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; +define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; + +define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; +define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; + +initialize by copy { readwrite }; +do not initialize { section .noinit }; + +place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; + +place in ROM_region { readonly }; +place in RAM_region { readwrite, + block CSTACK, block HEAP }; + +export symbol __ICFEDIT_region_RAM_start__; +export symbol __ICFEDIT_region_RAM_end__; \ No newline at end of file diff --git a/code_boot_out/sdk/Drivers/CMSIS/Device/FM/FM33xx/Source/Templates/iar/startup_fm33lg0xx.s b/code_boot_out/sdk/Drivers/CMSIS/Device/FM/FM33xx/Source/Templates/iar/startup_fm33lg0xx.s new file mode 100644 index 0000000..3964a68 --- /dev/null +++ b/code_boot_out/sdk/Drivers/CMSIS/Device/FM/FM33xx/Source/Templates/iar/startup_fm33lg0xx.s @@ -0,0 +1,352 @@ + + MODULE ?cstartup + + ;; Forward declaration of sections. + SECTION CSTACK:DATA:NOROOT(3) + + SECTION .intvec:CODE:NOROOT(2) + + EXTERN init_data_bss + EXTERN main + EXTERN __iar_program_start + EXTERN SystemInit + PUBLIC __vector_table + PUBLIC __Vectors + PUBLIC __Vectors_End + PUBLIC __Vectors_Size + + DATA + +__vector_table + DCD sfe(CSTACK) + DCD Reset_Handler ; Reset Handler + DCD NMI_Handler ; NMI Handler + DCD HardFault_Handler ; Hard Fault Handler + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD SVC_Handler ; SVCall Handler + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD PendSV_Handler ; PendSV Handler + DCD SysTick_Handler ; SysTick Handler + + ; External Interrupts + DCD WDT_IRQHandler ; 0: WWDT + DCD SVD_IRQHandler ; 1: SVD + DCD RTC_IRQHandler ; 2: RTC + DCD FLASH_IRQHandler ; 3: FLASH + DCD FDET_IRQHandler ; 4: LFDET + DCD ADC_IRQHandler ; 5: ADC + DCD DAC_IRQHandler ; 6: DAC + DCD SPI0_IRQHandler ; 7: SPI0 + DCD SPI1_IRQHandler ; 8: SPI1 + DCD SPI2_IRQHandler ; 9: SPI2 + DCD UART0_IRQHandler ; 10: UART0 + DCD UART1_IRQHandler ; 11: UART1 + DCD UART3_IRQHandler ; 12: UART3 + DCD UART4_IRQHandler ; 13: UART4 + DCD UART5_IRQHandler ; 14: UART5 + DCD U7816_IRQHandler ; 15: U7816 + DCD LPUARTx_IRQHandler ; 16: LPUART + DCD I2C_IRQHandler ; 17: I2C + DCD CCL_IRQHandler ; 18: CCL + DCD AES_IRQHandler ; 19: AES + DCD LPTIM_IRQHandler ; 20: LPTIM + DCD DMA_IRQHandler ; 21: DMA + DCD WKUPx_IRQHandler ; 22: WKUP + DCD LUT_IRQHandler ; 23: LUT + DCD BSTIM_IRQHandler ; 24: BSTIM + DCD COMPx_IRQHandler ; 25: COMPx + DCD GPTIM0_1_IRQHandler ; 26: GPTIM0_1 + DCD GPTIM2_IRQHandler ; 27: GPTIM2 + DCD ATIM_IRQHandler ; 28: ATIM + DCD VREF_IRQHandler ; 29: VREF + DCD GPIO_IRQHandler ; 30: GPIO + DCD CAN_IRQHandler ; 31: CAN +__Vectors_End + +__Vectors EQU __vector_table +__Vectors_Size EQU __Vectors_End - __Vectors +;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; +;; +;; Default interrupt handlers. +;; + THUMB + + PUBWEAK Reset_Handler + SECTION .text:CODE:REORDER:NOROOT(2) +Reset_Handler + CPSID I ; Mask interrupts + ;; Init the rest of the registers + LDR R1,=0 + LDR R2,=0 + LDR R3,=0 + LDR R4,=0 + LDR R5,=0 + LDR R6,=0 + LDR R7,=0 + MOV R8,R7 + MOV R9,R7 + MOV R10,R7 + MOV R11,R7 + MOV R12,R7 +#ifdef START_FROM_FLASH + IMPORT __RAM_START, __RAM_END + ;; INIT ECC RAM + + LDR R1, =__RAM_START + LDR R2, =__RAM_END + + SUBS R2, R2, R1 + SUBS R2, #1 + BLE .LC5 + + MOVS R0, #0 + MOVS R3, #4 + .LC4: + STR R0, [R1] + ADD R1, R1, R3 + SUBS R2, #4 + BGE .LC4 + .LC5: +#endif +;; Initialize the stack pointer + LDR R0, =sfe(CSTACK) + MOV R13,R0 + +#ifndef __NO_SYSTEM_INIT + ;; Call the CMSIS system init routine + LDR R0, =SystemInit + BLX R0 +#endif + + ;; Init .data and .bss sections + LDR R0, =init_data_bss + BLX R0 + ;CPSIE I ; Unmask interrupts + + BL main ;main __iar_program_start + + PUBWEAK NMI_Handler + SECTION .text:CODE:REORDER:NOROOT(1) +NMI_Handler + B NMI_Handler + + + PUBWEAK HardFault_Handler + SECTION .text:CODE:NOROOT:REORDER(1) +HardFault_Handler + B HardFault_Handler + + + PUBWEAK SVC_Handler + SECTION .text:CODE:NOROOT:REORDER(1) +SVC_Handler + B SVC_Handler + + + PUBWEAK PendSV_Handler + SECTION .text:CODE:NOROOT:REORDER(1) +PendSV_Handler + B PendSV_Handler + + + PUBWEAK SysTick_Handler + SECTION .text:CODE:NOROOT:REORDER(1) +SysTick_Handler + B SysTick_Handler + + + PUBWEAK WDT_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +WDT_IRQHandler + B WDT_IRQHandler + + + PUBWEAK SVD_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +SVD_IRQHandler + B SVD_IRQHandler + + + PUBWEAK RTC_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +RTC_IRQHandler + B RTC_IRQHandler + + + PUBWEAK FLASH_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +FLASH_IRQHandler + B FLASH_IRQHandler + + + PUBWEAK FDET_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +FDET_IRQHandler + B FDET_IRQHandler + + + PUBWEAK ADC_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +ADC_IRQHandler + B ADC_IRQHandler + + PUBWEAK DAC_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +DAC_IRQHandler + B DAC_IRQHandler + + + PUBWEAK SPI0_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +SPI0_IRQHandler + B SPI0_IRQHandler + + + PUBWEAK SPI1_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +SPI1_IRQHandler + B SPI1_IRQHandler + + + PUBWEAK SPI2_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +SPI2_IRQHandler + B SPI2_IRQHandler + + + PUBWEAK UART0_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +UART0_IRQHandler + B UART0_IRQHandler + + + PUBWEAK UART1_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +UART1_IRQHandler + B UART1_IRQHandler + + + PUBWEAK UART3_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +UART3_IRQHandler + B UART3_IRQHandler + + + PUBWEAK UART4_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +UART4_IRQHandler + B UART4_IRQHandler + + + PUBWEAK UART5_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +UART5_IRQHandler + B UART5_IRQHandler + + + PUBWEAK U7816_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +U7816_IRQHandler + B U7816_IRQHandler + + + PUBWEAK LPUARTx_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +LPUARTx_IRQHandler + B LPUARTx_IRQHandler + + + PUBWEAK I2C_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +I2C_IRQHandler + B I2C_IRQHandler + + PUBWEAK CCL_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +CCL_IRQHandler + B CCL_IRQHandler + + + PUBWEAK AES_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +AES_IRQHandler + B AES_IRQHandler + + + PUBWEAK LPTIM_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +LPTIM_IRQHandler + B LPTIM_IRQHandler + + + PUBWEAK DMA_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +DMA_IRQHandler + B DMA_IRQHandler + + + PUBWEAK WKUPx_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +WKUPx_IRQHandler + B WKUPx_IRQHandler + + PUBWEAK LUT_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +LUT_IRQHandler + B LUT_IRQHandler + + + PUBWEAK BSTIM_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +BSTIM_IRQHandler + B BSTIM_IRQHandler + + + PUBWEAK COMPx_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +COMPx_IRQHandler + B COMPx_IRQHandler + + + PUBWEAK GPTIM0_1_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +GPTIM0_1_IRQHandler + B GPTIM0_1_IRQHandler + + + PUBWEAK GPTIM2_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +GPTIM2_IRQHandler + B GPTIM2_IRQHandler + + + PUBWEAK ATIM_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +ATIM_IRQHandler + B ATIM_IRQHandler + + + PUBWEAK VREF_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +VREF_IRQHandler + B VREF_IRQHandler + + + PUBWEAK GPIO_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +GPIO_IRQHandler + B GPIO_IRQHandler + + + PUBWEAK CAN_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +CAN_IRQHandler + B CAN_IRQHandler + END \ No newline at end of file diff --git a/code_boot_out/sdk/Drivers/CMSIS/Device/FM/FM33xx/Source/Templates/iar/startup_fm33lg0xx_backup.s b/code_boot_out/sdk/Drivers/CMSIS/Device/FM/FM33xx/Source/Templates/iar/startup_fm33lg0xx_backup.s new file mode 100644 index 0000000..4004ec6 --- /dev/null +++ b/code_boot_out/sdk/Drivers/CMSIS/Device/FM/FM33xx/Source/Templates/iar/startup_fm33lg0xx_backup.s @@ -0,0 +1,299 @@ + + MODULE ?cstartup + + ;; Forward declaration of sections. + SECTION CSTACK:DATA:NOROOT(3) + + SECTION .intvec:CODE:NOROOT(2) + + EXTERN __iar_program_start + PUBLIC __vector_table + + DATA + +__vector_table + DCD sfe(CSTACK) + DCD Reset_Handler ; Reset Handler + DCD NMI_Handler ; NMI Handler + DCD HardFault_Handler ; Hard Fault Handler + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD SVC_Handler ; SVCall Handler + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD PendSV_Handler ; PendSV Handler + DCD SysTick_Handler ; SysTick Handler + + ; External Interrupts + DCD WDT_IRQHandler ; 0: WWDT + DCD SVD_IRQHandler ; 1: SVD + DCD RTC_IRQHandler ; 2: RTC + DCD FLASH_IRQHandler ; 3: FLASH + DCD FDET_IRQHandler ; 4: LFDET + DCD ADC_IRQHandler ; 5: ADC + DCD DAC_IRQHandler ; 6: DAC + DCD SPI0_IRQHandler ; 7: SPI0 + DCD SPI1_IRQHandler ; 8: SPI1 + DCD SPI2_IRQHandler ; 9: SPI2 + DCD UART0_IRQHandler ; 10: UART0 + DCD UART1_IRQHandler ; 11: UART1 + DCD UART3_IRQHandler ; 12: UART3 + DCD UART4_IRQHandler ; 13: UART4 + DCD UART5_IRQHandler ; 14: UART5 + DCD U7816_IRQHandler ; 15: U7816 + DCD LPUARTx_IRQHandler ; 16: LPUART + DCD I2C_IRQHandler ; 17: I2C + DCD CCL_IRQHandler ; 18: CCL + DCD AES_IRQHandler ; 19: AES + DCD LPTIM_IRQHandler ; 20: LPTIM + DCD DMA_IRQHandler ; 21: DMA + DCD WKUPx_IRQHandler ; 22: WKUP + DCD LUT_IRQHandler ; 23: LUT + DCD BSTIM_IRQHandler ; 24: BSTIM + DCD COMPx_IRQHandler ; 25: COMPx + DCD GPTIM0_1_IRQHandler ; 26: GPTIM0_1 + DCD GPTIM2_IRQHandler ; 27: GPTIM2 + DCD ATIM_IRQHandler ; 28: ATIM + DCD VREF_IRQHandler ; 29: VREF + DCD GPIO_IRQHandler ; 30: GPIO + DCD CAN_IRQHandler ; 31: CAN +__Vectors_End + +;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; +;; +;; Default interrupt handlers. +;; + THUMB + + PUBWEAK Reset_Handler + SECTION .text:CODE:NOROOT:REORDER(2) +Reset_Handler + IMPORT SystemInit + LDR R0, =SystemInit + BLX R0 + LDR R0, =__iar_program_start + BX R0 + + PUBWEAK NMI_Handler + SECTION .text:CODE:NOROOT:REORDER(1) +NMI_Handler + B NMI_Handler + + + PUBWEAK HardFault_Handler + SECTION .text:CODE:NOROOT:REORDER(1) +HardFault_Handler + B HardFault_Handler + + + PUBWEAK SVC_Handler + SECTION .text:CODE:NOROOT:REORDER(1) +SVC_Handler + B SVC_Handler + + + PUBWEAK PendSV_Handler + SECTION .text:CODE:NOROOT:REORDER(1) +PendSV_Handler + B PendSV_Handler + + + PUBWEAK SysTick_Handler + SECTION .text:CODE:NOROOT:REORDER(1) +SysTick_Handler + B SysTick_Handler + + + PUBWEAK WDT_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +WDT_IRQHandler + B WDT_IRQHandler + + + PUBWEAK SVD_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +SVD_IRQHandler + B SVD_IRQHandler + + + PUBWEAK RTC_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +RTC_IRQHandler + B RTC_IRQHandler + + + PUBWEAK FLASH_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +FLASH_IRQHandler + B FLASH_IRQHandler + + + PUBWEAK FDET_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +FDET_IRQHandler + B FDET_IRQHandler + + + PUBWEAK ADC_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +ADC_IRQHandler + B ADC_IRQHandler + + PUBWEAK DAC_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +DAC_IRQHandler + B DAC_IRQHandler + + + PUBWEAK SPI0_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +SPI0_IRQHandler + B SPI0_IRQHandler + + + PUBWEAK SPI1_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +SPI1_IRQHandler + B SPI1_IRQHandler + + + PUBWEAK SPI2_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +SPI2_IRQHandler + B SPI2_IRQHandler + + + PUBWEAK UART0_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +UART0_IRQHandler + B UART0_IRQHandler + + + PUBWEAK UART1_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +UART1_IRQHandler + B UART1_IRQHandler + + + PUBWEAK UART3_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +UART3_IRQHandler + B UART3_IRQHandler + + + PUBWEAK UART4_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +UART4_IRQHandler + B UART4_IRQHandler + + + PUBWEAK UART5_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +UART5_IRQHandler + B UART5_IRQHandler + + + PUBWEAK U7816_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +U7816_IRQHandler + B U7816_IRQHandler + + + PUBWEAK LPUARTx_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +LPUARTx_IRQHandler + B LPUARTx_IRQHandler + + + PUBWEAK I2C_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +I2C_IRQHandler + B I2C_IRQHandler + + PUBWEAK CCL_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +CCL_IRQHandler + B CCL_IRQHandler + + + PUBWEAK AES_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +AES_IRQHandler + B AES_IRQHandler + + + PUBWEAK LPTIM_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +LPTIM_IRQHandler + B LPTIM_IRQHandler + + + PUBWEAK DMA_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +DMA_IRQHandler + B DMA_IRQHandler + + + PUBWEAK WKUPx_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +WKUPx_IRQHandler + B WKUPx_IRQHandler + + PUBWEAK LUT_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +LUT_IRQHandler + B LUT_IRQHandler + + + PUBWEAK BSTIM_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +BSTIM_IRQHandler + B BSTIM_IRQHandler + + + PUBWEAK COMPx_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +COMPx_IRQHandler + B COMPx_IRQHandler + + + PUBWEAK GPTIM0_1_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +GPTIM0_1_IRQHandler + B GPTIM0_1_IRQHandler + + + PUBWEAK GPTIM2_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +GPTIM2_IRQHandler + B GPTIM2_IRQHandler + + + PUBWEAK ATIM_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +ATIM_IRQHandler + B ATIM_IRQHandler + + + PUBWEAK VREF_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +VREF_IRQHandler + B VREF_IRQHandler + + + PUBWEAK GPIO_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +GPIO_IRQHandler + B GPIO_IRQHandler + + + PUBWEAK CAN_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +CAN_IRQHandler + B CAN_IRQHandler + END \ No newline at end of file diff --git a/code_boot_out/sdk/Drivers/CMSIS/Device/FM/FM33xx/Source/Templates/startup.c b/code_boot_out/sdk/Drivers/CMSIS/Device/FM/FM33xx/Source/Templates/startup.c new file mode 100644 index 0000000..ec92f3e --- /dev/null +++ b/code_boot_out/sdk/Drivers/CMSIS/Device/FM/FM33xx/Source/Templates/startup.c @@ -0,0 +1,315 @@ +/* + * Copyright (c) 2013 - 2014, Freescale Semiconductor, Inc. + * Copyright 2016-2018 NXP + * All rights reserved. + * + * THIS SOFTWARE IS PROVIDED BY NXP "AS IS" AND ANY EXPRESSED OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL NXP OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF + * THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * @page misra_violations MISRA-C:2012 violations + * + * @section [global] + * Violates MISRA 2012 Advisory Rule 8.9, An object should be defined at block + * scope if its identifier only appears in a single function. + * All variables with this problem are defined in the linker files. + * + * @section [global] + * Violates MISRA 2012 Advisory Rule 8.11, When an array with external linkage + * is declared, its size should be explicitly specified. + * The size of the arrays can not be explicitly determined. + * + * @section [global] + * Violates MISRA 2012 Advisory Rule 11.4, A conversion should not be performed + * between a pointer to object and an integer type. + * The cast is required to initialize a pointer with an unsigned int define, + * representing an address. + * + * @section [global] + * Violates MISRA 2012 Required Rule 11.6, A cast shall not be performed + * between pointer to void and an arithmetic type. + * The cast is required to initialize a pointer with an unsigned int define, + * representing an address. + * + * @section [global] + * Violates MISRA 2012 Required Rule 2.1, A project shall not contain unreachable + * code. + * The condition compares two address defined in linker files that can be different. + * + * @section [global] + * Violates MISRA 2012 Advisory Rule 8.7, External could be made static. + * Function is defined for usage by application code. + * + * @section [global] + * Violates MISRA 2012 Mandatory Rule 17.3, Symbol 'MFSPR' undeclared, assumed + * to return int. + * This is an e200 Power Architecture Assembly instruction used to retrieve + * the core number. + * + */ + +#include "startup.h" +//#include +#include "common_types.h" +#include "cpu.h" +#include "core_cm0plus.h" + +#define GET_CORE_ID() 0U +#define NUMBER_OF_CORES (1u) +#define FEATURE_INTERRUPT_INT_VECTORS {&SCB->VTOR} + +/******************************************************************************* + * Static Variables + ******************************************************************************/ +static volatile uint32_t * const s_vectors[NUMBER_OF_CORES] = FEATURE_INTERRUPT_INT_VECTORS; + +/******************************************************************************* + * Code + ******************************************************************************/ + +/*FUNCTION********************************************************************** + * + * Function Name : init_data_bss + * Description : Make necessary initializations for RAM. + * - Copy the vector table from ROM to RAM. + * - Copy initialized data from ROM to RAM. + * - Copy code that should reside in RAM from ROM + * - Clear the zero-initialized data section. + * + * Tool Chains: + * __GNUC__ : GNU Compiler Collection + * __ghs__ : Green Hills ARM Compiler + * __ICCARM__ : IAR ARM Compiler + * __DCC__ : Wind River Diab Compiler + * __ARMCC_VERSION : ARMC Compiler + * + * Implements : init_data_bss_Activity + *END**************************************************************************/ +void init_data_bss(void) +{ + #if 1 + uint32_t n; + uint8_t coreId; +/* For ARMC we are using the library method of initializing DATA, Custom Section and + * Code RAM sections so the below variables are not needed */ +#if !defined(__ARMCC_VERSION) + /* Declare pointers for various data sections. These pointers + * are initialized using values pulled in from the linker file */ + uint8_t * data_ram; + uint8_t * code_ram; + uint8_t * bss_start; + uint8_t * custom_ram; + uint8_t * stack_check_ram; + uint8_t * code_asil_ram; + const uint8_t * data_rom, * data_rom_end; + const uint8_t * code_rom, * code_rom_end; + const uint8_t * bss_end; + const uint8_t * custom_rom, * custom_rom_end; + const uint8_t * code_asil_rom, * stack_check_rom_end; + const uint8_t * stack_check_rom, * code_asil_rom_end; +#endif + /* Addresses for VECTOR_TABLE and VECTOR_RAM come from the linker file */ + +#if defined(__ARMCC_VERSION) + extern uint32_t __RAM_VECTOR_TABLE_SIZE; + extern uint32_t __VECTOR_ROM; + extern uint32_t __VECTOR_RAM; +#else + extern uint32_t __RAM_VECTOR_TABLE_SIZE[]; + extern uint32_t __VECTOR_TABLE[]; + extern uint32_t __VECTOR_RAM[]; +#endif + /* Get section information from linker files */ +#if defined(__ICCARM__) + /* Data */ + data_ram = __section_begin(".data"); + data_rom = __section_begin(".data_init"); + data_rom_end = __section_end(".data_init"); + + /* CODE RAM */ + #pragma section = "__CODE_ROM" + #pragma section = "__CODE_RAM" + code_ram = __section_begin("__CODE_RAM"); + code_rom = __section_begin("__CODE_ROM"); + code_rom_end = __section_end("__CODE_ROM"); + + /* BSS */ + bss_start = __section_begin(".bss"); + bss_end = __section_end(".bss"); + + //custom_ram = __section_begin(".customSection"); + //custom_rom = __section_begin(".customSection_init"); + //custom_rom_end = __section_end(".customSection_init"); + #if 0 //暂时关闭 + /*分离出来的ASIL 相关的ram变量--这里先是data region2相关*/ + #pragma section = ".RAM_ASIL" + #pragma section = ".RAM_ASIL_init" + code_asil_ram = __section_begin(".RAM_ASIL"); + code_asil_rom = __section_begin(".RAM_ASIL_init"); + code_asil_rom_end = __section_end(".RAM_ASIL_init"); + #endif + + /*分离出来的ASIL 相关的ram变量--这里先是stack check相关*/ + #pragma section = ".STACK_CHECK_ADDR" + #pragma section = ".STACK_CHECK_ADDR_init" + stack_check_ram = __section_begin(".STACK_CHECK_ADDR"); + stack_check_rom = __section_begin(".STACK_CHECK_ADDR_init"); + stack_check_rom_end = __section_end(".STACK_CHECK_ADDR_init"); + +#elif defined (__ARMCC_VERSION) + /* VECTOR TABLE*/ + uint8_t * vector_table_size = (uint8_t *)__RAM_VECTOR_TABLE_SIZE; + uint32_t * vector_rom = (uint32_t *)__VECTOR_ROM; + uint32_t * vector_ram = (uint32_t *)__VECTOR_RAM; +#else + extern uint32_t __DATA_ROM[]; + extern uint32_t __DATA_RAM[]; + extern uint32_t __DATA_END[]; + + extern uint32_t __CODE_RAM[]; + extern uint32_t __CODE_ROM[]; + extern uint32_t __CODE_END[]; + + extern uint32_t __BSS_START[]; + extern uint32_t __BSS_END[]; + + extern uint32_t __CUSTOM_ROM[]; + extern uint32_t __CUSTOM_END[]; + + extern uint32_t __DATA2_ROM[]; + extern uint32_t __DATA2_ROM_END[]; + + extern uint32_t __STACK_CHECK_ROM[]; + extern uint32_t __STACK_CHECK_ROM_END[]; + + /* Data */ + data_ram = (uint8_t *)__DATA_RAM; + data_rom = (uint8_t *)__DATA_ROM; + data_rom_end = (uint8_t *)__DATA_END; + /* CODE RAM */ + code_ram = (uint8_t *)__CODE_RAM; + code_rom = (uint8_t *)__CODE_ROM; + code_rom_end = (uint8_t *)__CODE_END; + /* BSS */ + bss_start = (uint8_t *)__BSS_START; + bss_end = (uint8_t *)__BSS_END; + + /* Custom section */ + //custom_ram = CUSTOMSECTION_SECTION_START; + //custom_rom = (uint8_t *)__CUSTOM_ROM; + //custom_rom_end = (uint8_t *)__CUSTOM_END; + + /*分离出来的ASIL 相关的ram变量--这里先是data region2相关*/ + code_asil_ram = DATA2_ADDR_START; + code_asil_rom = (uint8_t *)__DATA2_ROM; + code_asil_rom_end = (uint8_t *)__DATA2_ROM_END; + + /*分离出来的ASIL 相关的ram变量--这里先是stack check相关*/ + stack_check_ram = STACK_CHECK_ADDR_START; + stack_check_rom = (uint8_t *)__STACK_CHECK_ROM; + stack_check_rom_end = (uint8_t *)__STACK_CHECK_ROM_END; + +#endif + +#if !defined(__ARMCC_VERSION) + /* Copy initialized data from ROM to RAM */ + while (data_rom_end != data_rom) + { + *data_ram = *data_rom; + data_ram++; + data_rom++; + } + + /* Copy functions from ROM to RAM */ + while (code_rom_end != code_rom) + { + *code_ram = *code_rom; + code_ram++; + code_rom++; + } + + /* Clear the zero-initialized data section */ + while(bss_end != bss_start) + { + *bss_start = 0; + bss_start++; + } + #if 0 + /* Copy customsection rom to ram */ + while(custom_rom_end != custom_rom) + { + *custom_ram = *custom_rom; + custom_rom++; + custom_ram++; + } + #endif + #if 0 //暂时关闭 + /* Copy ASIL rom to ram */ + while(code_asil_rom_end != code_asil_rom) + { + *code_asil_ram = *code_asil_rom; + code_asil_rom++; + code_asil_ram++; + } + #endif + + #if 1 + /* Copy stack rom to ram */ + while(stack_check_rom_end != stack_check_rom) + { + *stack_check_ram = *stack_check_rom; + stack_check_rom++; + stack_check_ram++; + } + #endif + +#endif + +#if 0 + coreId = (uint8_t)GET_CORE_ID(); +#if defined (__ARMCC_VERSION) + /* Copy the vector table from ROM to RAM */ + /* Workaround */ + for (n = 0; n < (((uint32_t)(vector_table_size))/sizeof(uint32_t)); n++) + { + vector_ram[n] = vector_rom[n]; + } + /* Point the VTOR to the position of vector table */ + *s_vectors[coreId] = (uint32_t) __VECTOR_RAM; +#else + /* Check if VECTOR_TABLE copy is needed */ + if (__VECTOR_RAM != __VECTOR_TABLE) + { + /* Copy the vector table from ROM to RAM */ + for (n = 0; n < (((uint32_t)__RAM_VECTOR_TABLE_SIZE)/sizeof(uint32_t)); n++) + { + __VECTOR_RAM[n] = __VECTOR_TABLE[n]; + } + /* Point the VTOR to the position of vector table */ + *s_vectors[coreId] = (uint32_t)__VECTOR_RAM; + } + else + { + /* Point the VTOR to the position of vector table */ + *s_vectors[coreId] = (uint32_t)__VECTOR_TABLE; + } +#endif +#endif + +#endif +} + +/******************************************************************************* + * EOF + ******************************************************************************/ + diff --git a/code_boot_out/sdk/Drivers/CMSIS/Device/FM/FM33xx/Source/Templates/startup.h b/code_boot_out/sdk/Drivers/CMSIS/Device/FM/FM33xx/Source/Templates/startup.h new file mode 100644 index 0000000..4a7cd52 --- /dev/null +++ b/code_boot_out/sdk/Drivers/CMSIS/Device/FM/FM33xx/Source/Templates/startup.h @@ -0,0 +1,153 @@ +/* + * Copyright (c) 2013 - 2014, Freescale Semiconductor, Inc. + * Copyright 2016-2017 NXP + * All rights reserved. + * + * THIS SOFTWARE IS PROVIDED BY NXP "AS IS" AND ANY EXPRESSED OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL NXP OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF + * THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef STARTUP_H +#define STARTUP_H + +//#include +#include "common_types.h" +//#include "device_registers.h" +/** + * @page misra_violations MISRA-C:2012 violations + * + * @section [global] + * Violates MISRA 2012 Advisory Rule 2.5, Local macro not referenced. + * The defined macro is used as include guard. + * + * @section [global] + * Violates MISRA 2012 Advisory Rule 8.9, An object should be defined at block + * scope if its identifier only appears in a single function. + * All variables with this problem are defined in the linker files. + * + */ +#if 1 +/******************************************************************************* + * API + ******************************************************************************/ + +/*! + * @brief define symbols that specific start and end addres of some basic sections. + */ +//#if (defined(S32K14x_SERIES) || defined(S32K11x_SERIES) || defined(S32V234_SERIES) || defined(MPC574x_SERIES) || defined(S32R_SERIES) || defined(S32MTV_SERIES) || defined(SJA1110_SERIES)) + #if (defined(__ICCARM__)) + #define INTERRUPTS_SECTION_START __section_begin(".intvec") + #define INTERRUPTS_SECTION_END __section_end(".intvec") + #define BSS_SECTION_START __section_begin(".bss") + #define BSS_SECTION_END __section_end(".bss") + #define DATA_SECTION_START __section_begin(".data") + #define DATA_SECTION_END __section_end(".data") + #define CUSTOMSECTION_SECTION_START __section_begin(".customSection") + #define CUSTOMSECTION_SECTION_END __section_end(".customSection") + #define CODE_RAM_SECTION_START __section_begin("__CODE_RAM") + #define CODE_RAM_SECTION_END __section_end("__CODE_RAM") + #define DATA_INIT_SECTION_START __section_begin(".data_init") + #define DATA_INIT_SECTION_END __section_end(".data_init") + #define CODE_ROM_SECTION_START __section_begin("__CODE_ROM") + #define CODE_ROM_SECTION_END __section_end("__CODE_ROM") + + #elif (defined(__ARMCC_VERSION)) + #define INTERRUPTS_SECTION_START (uint8_t *)__VECTOR_ROM_START + #define INTERRUPTS_SECTION_END (uint8_t *)__VECTOR_ROM_END + #define BSS_SECTION_START (uint8_t *)__BSS_START + #define BSS_SECTION_END (uint8_t *)__BSS_END + #define DATA_SECTION_START (uint8_t *)__DATA_RAM_START + #define DATA_SECTION_END (uint8_t *)__DATA_RAM_END + #define CUSTOMSECTION_SECTION_START (uint8_t *)__CUSTOM_SECTION_START + #define CUSTOMSECTION_SECTION_END (uint8_t *)__CUSTOM_SECTION_END + #define CODE_RAM_SECTION_START (uint8_t *)__CODE_RAM_START + #define CODE_RAM_SECTION_END (uint8_t *)__CODE_RAM_END + + extern uint32_t __VECTOR_ROM_START; + extern uint32_t __VECTOR_ROM_END; + extern uint32_t __BSS_START; + extern uint32_t __BSS_END; + extern uint32_t __DATA_RAM_START; + extern uint32_t __DATA_RAM_END; + extern uint32_t __CUSTOM_SECTION_START; + extern uint32_t __CUSTOM_SECTION_END; + extern uint32_t __CODE_RAM_START; + extern uint32_t __CODE_RAM_END; + #else + #define INTERRUPTS_SECTION_START (uint8_t *)&__interrupts_start__ + #define INTERRUPTS_SECTION_END (uint8_t *)&__interrupts_end__ + #define BSS_SECTION_START (uint8_t *)&__bss_start__ + #define BSS_SECTION_END (uint8_t *)&__bss_end__ + #define DATA_SECTION_START (uint8_t *)&__data_start__ + #define DATA_SECTION_END (uint8_t *)&__data_end__ + #define CUSTOMSECTION_SECTION_START (uint8_t *)&__customSection_start__ + #define CUSTOMSECTION_SECTION_END (uint8_t *)&__customSection_end__ + #define CODE_RAM_SECTION_START (uint8_t *)&__code_ram_start__ + #define CODE_RAM_SECTION_END (uint8_t *)&__code_ram_end__ + + #define DATA2_ADDR_START (uint8_t *)&__RAM_ASIL_Start__ + #define DATA2_ADDR_END (uint8_t *)&__RAM_ASIL_end__ + + #define STACK_CHECK_ADDR_START (uint8_t *)&__STACK_CHECK_ADDRStart + #define STACK_CHECK_ADDR_END (uint8_t *)&__STACK_CHECK_ADDR_end__ + + extern uint32_t __interrupts_start__; + extern uint32_t __interrupts_end__; + extern uint32_t __bss_start__; + extern uint32_t __bss_end__; + extern uint32_t __data_start__; + extern uint32_t __data_end__; + extern uint32_t __customSection_start__; + extern uint32_t __customSection_end__; + extern uint32_t __code_ram_start__; + extern uint32_t __code_ram_end__; + + extern uint32_t __RAM_ASIL_Start__; + extern uint32_t __RAM_ASIL_end__; + + extern uint32_t __STACK_CHECK_ADDRStart; + extern uint32_t __STACK_CHECK_ADDR_end__; + + #endif +//#endif + +#if (defined(__ICCARM__)) + #pragma section = ".data" + #pragma section = ".data_init" + #pragma section = ".bss" + #pragma section = ".intvec" + #pragma section = ".customSection" + #pragma section = ".customSection_init" + #pragma section = "__CODE_RAM" + #pragma section = "__CODE_ROM" + //#pragma section = ".RAM_ASIL" + //#pragma section = ".RAM_ASIL_init" + #pragma section = ".STACK_CHECK_ADDR" + #pragma section = ".STACK_CHECK_ADDR_init" + //#pragma section = ".STACK_CHECK_ADDR_init" +#endif + +/*! + * @brief Make necessary initializations for RAM. + * + * - Copy initialized data from ROM to RAM. + * - Clear the zero-initialized data section. + * - Copy the vector table from ROM to RAM. This could be an option. + */ +#endif +void init_data_bss(void); + +#endif /* STARTUP_H*/ +/******************************************************************************* + * EOF + ******************************************************************************/ + diff --git a/code_boot_out/sdk/Drivers/CMSIS/Device/FM/FM33xx/Source/system_fm33lg0xx.c b/code_boot_out/sdk/Drivers/CMSIS/Device/FM/FM33xx/Source/system_fm33lg0xx.c new file mode 100644 index 0000000..1c93a98 --- /dev/null +++ b/code_boot_out/sdk/Drivers/CMSIS/Device/FM/FM33xx/Source/system_fm33lg0xx.c @@ -0,0 +1,300 @@ +/**************************************************************************//** + * @file system_fm33lg0xx.c + * @brief CMSIS Cortex-M0 Device Peripheral Access Layer Source File for + * Device FM33LG0XX + * @version V2.0.0 + * @date 15. Mar 2021 + * + * @note + * + ******************************************************************************/ +/* Copyright (c) 2012 ARM LIMITED + + All rights reserved. + Redistribution and use in source and binary forms, with or without + modification, are permitted provided that the following conditions are met: + - Redistributions of source code must retain the above copyright + notice, this list of conditions and the following disclaimer. + - Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the + documentation and/or other materials provided with the distribution. + - Neither the name of ARM nor the names of its contributors may be used + to endorse or promote products derived from this software without + specific prior written permission. + * + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE + LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + POSSIBILITY OF SUCH DAMAGE. + ---------------------------------------------------------------------------*/ + +#include "system_fm33lg0xx.h" + +/* Clock Variable definitions ------------------------------------------------*/ +uint32_t XTLFClock = XTLF_DEFAULT_VALUE; /*!< External Low-freq Osc Clock Frequency (XTLF) */ +uint32_t XTHFClock = XTHF_DEFAULT_VALUE; /*!< External High-freq Osc Clock Frequency (XTHF) */ +uint32_t SystemCoreClock = HCLK_DEFAULT_VALUE; /*!< System Clock Frequency (Core Clock) */ + +/* Clock functions -----------------------------------------------------------*/ +/** + * @brief Retrieve the PLL clock frequency + * + * @retval PLL clock frequency + */ +static uint32_t SystemPLLClockUpdate(void) +{ + uint32_t clock = 0; + + /* Acquire PLL clock source */ + switch ((CMU->PLLCR >> 1) & 0x1) + { + case 0: + switch ((CMU->RCHFCR >> 16) & 0xFU) + { + case 1: /* 16MHz */ + clock = 16000000; + break; + + case 2: /* 24MHz */ + clock = 24000000; + break; + + case 3: /* 32MHz */ + clock = 32000000; + break; + + case 0: /* 8MHz */ + default: + clock = 8000000; + break; + } + break; + + case 1: + clock = XTHFClock; + break; + } + + /* Acquire PLL prescaler */ + switch ((CMU->PLLCR >> 0x4) & 0x7) + { + case 0: /* input divided by 1 */ + clock /= 1; + break; + + case 1: /* input divided by 2 */ + clock /= 2; + break; + + case 2: /* input divided by 4 */ + clock /= 4; + break; + + case 3: /* input divided by 8 */ + clock /= 8; + break; + + case 4: /* input divided by 12 */ + clock /= 12; + break; + + case 5: /* input divided by 16 */ + clock /= 16; + break; + + case 6: /* input divided by 24 */ + clock /= 24; + break; + + case 7: /* input divided by 32 */ + clock /= 32; + break; + } + + /* Acquire PLL multiplier and calculate PLL frequency */ + clock = clock * (((CMU->PLLCR >> 16) & 0x7F) + 1); + + /* Acquire PLL output channel(PLLx1 or PLLx2) */ + if ((CMU->PLLCR >> 3) & 0x1) + { + clock *= 2; + } + + return clock; +} + +/** + * @brief Update the core clock frequency variable: SystemCoreClock + * + */ +void SystemCoreClockUpdate(void) +{ + switch ((CMU->SYSCLKCR >> 0) & 0x7) + { + case 1: /* XTHF */ + SystemCoreClock = XTHFClock; + break; + + case 2: /* PLL */ + SystemCoreClock = SystemPLLClockUpdate(); + break; + + case 4: /* RCLF */ + switch ((CMU->RCLFCR >> 16) & 0x3) + { + case 0: /* output divided by 1 */ + SystemCoreClock = 614400; + break; + + case 1: /* output divided by 4 */ + SystemCoreClock = 153600; + break; + + case 2: /* output divided by 8 */ + SystemCoreClock = 76800; + break; + + case 3: /* output divided by 16 */ + SystemCoreClock = 38400; + break; + } + break; + + case 5: /* XTLF */ + SystemCoreClock = XTLFClock; + break; + + case 6: /* RCLP */ + SystemCoreClock = 32000; + break; + + default: + switch ((CMU->RCHFCR >> 16) & 0xf) + { + case 1: /* 16MHz */ + SystemCoreClock = 16000000; + break; + + case 2: /* 24MHz */ + SystemCoreClock = 24000000; + break; + + case 3: /* 32MHz */ + SystemCoreClock = 32000000; + break; + + case 0: /* 8MHz */ + default: + SystemCoreClock = 8000000; + break; + } + break; + } + /* AHB Prescaler */ + switch((CMU->SYSCLKCR >> 8) & 0x7) + { + case 4: /* divide by 2 */ + SystemCoreClock /= 2; + break; + + case 5: /* divide by 4 */ + SystemCoreClock /= 4; + break; + + case 6: /* divide by 8 */ + SystemCoreClock /= 8; + break; + + case 7: /* divide by 16 */ + SystemCoreClock /= 16; + break; + + default: /* no division */ + break; + } +} + +/** + * @brief Setup the microcontroller system. + * Initialize the System. + */ +void SystemInit(void) +{ + + #if defined(USE_IWDT_ON_STARTUP) + CMU->PCLKCR1 |= 0x20U; /* Enable IWDT Operation Clock */ + IWDT->CR = IWDT_OVERFLOW_PERIOD; /* Configure IWDT overflow period */ + IWDT->SERV = 0x12345A5AU; /* Enable IWDT */ + #endif + + /* Enable VREF Operation Clock */ + CMU->PCLKCR1 |= 0x1U << 12; + + /* Enable PAD Operation Clock */ + CMU->PCLKCR1 |= 0x1U << 7; + + #ifdef USE_LSCLK_AUTO_SWITCH + + /* Enable LSCLK auto switch */ + CMU->SYSCLKCR |= 0x8000000U; + CMU->LSCLKSEL = 0x55U; + + #else + + /* Disable LSCLK auto switch */ + CMU->SYSCLKCR &= 0x7FFFFFFU; + CMU->LSCLKSEL = 0x55U; + + #endif /* USE_LSCLK_AUTO_SWITCH */ + + /* Keep timers running and disable IWDT && WWDT under debug mode */ + DBG->CR = 0x3U; + + #ifdef USE_DEBUG_UNDER_SLEEP + /* Keep debug connnection under sleep mode */ + DBG->CR |= 0x1U << 16; + #endif + + /* Load power trim value */ + PMU->ULPB_TR = ULPBG_TRIM; + + /* Load default clock trim value */ + CMU->RCHFTR = RCHF8M_TRIM; + CMU->RCLFTR = RCLF_TRIM; + CMU->RCLPTR = RCLP_TRIM; + + /* Enable SWD port pull up */ + GPIOD->PUEN |= 0x3U << 7; + + /* + If BOR is disabled, power down will be monitored by PDR. This means VDD can + be below the minimum operating voltage(1.65V) to V_PDR threshold without + power down reset. To solve this, user should use SVD to monitor VDD voltage. + When the VDD voltage drop below 1.65V, program can enter sleep. + */ + + /* PDR Config enable 1.5v */ + RMU->PDRCR = 0x5; + + /* Disable BOR power down */ + RMU->BORCR = 0x01; + + /* Update System Core Clock */ + SystemCoreClockUpdate(); + + #if defined(USE_IWDT_ON_STARTUP) + IWDT->SERV = 0x12345A5AU; /* Feed IWDT */ + #endif +} + + + + + diff --git a/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33_assert.h b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33_assert.h new file mode 100644 index 0000000..141e51f --- /dev/null +++ b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33_assert.h @@ -0,0 +1,67 @@ + /** + **************************************************************************************************** + * @file fm33_assert.h + * @author FMSH Application Team + * @brief Assert function define + **************************************************************************************************** + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef __FM33_ASSERT_H +#define __FM33_ASSERT_H + +#include "assert.h" + +#ifdef __cplusplus + extern "C" { +#endif +#if 0 +#ifdef USE_FULL_ASSERT +#define assert_param(expr) do{if((expr) == 0)for(;;);}while(0) +#else +#define assert_param(expr) ((void)0U) +#endif +#endif +#ifdef __cplusplus +} +#endif + + +#endif + diff --git a/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl.h b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl.h new file mode 100644 index 0000000..d815da6 --- /dev/null +++ b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl.h @@ -0,0 +1,142 @@ + /** + ******************************************************************************************************* + * @file fm33lg0xx_fl.h + * @author FMSH Application Team + * @brief Header file of FL Driver Library + ******************************************************************************************************* + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + + +/* Define to prevent recursive inclusion -------------------------------------------------------------*/ +#ifndef __FM33LG0XX_FL_H +#define __FM33LG0XX_FL_H + +#ifdef __cplusplus +extern "C" { +#endif + +/* Includes -------------------------------------------------------------------------------------------*/ +#include "fm33lg0xx_fl_conf.h" +#include "fm33lg0xx_fl_def.h" + +/* Macros ---------------------------------------------------------------------------------------------*/ +/** @defgroup FL_Private_Macros FL Driver Library Private Macros + * @{ + */ + +/** + * @brief FM33LG0xx FL Driver Library version number + */ +#define __FM33LG0xx_FL_VERSION_MAIN (0x02) /*!< [31:24] main version */ +#define __FM33LG0xx_FL_VERSION_SUB1 (0x03) /*!< [23:16] sub1 version */ +#define __FM33LG0xx_FL_VERSION_SUB2 (0x00) /*!< [15:0] sub2 version */ +#define __FM33LG0xx_FL_VERSION ((__FM33LG0xx_FL_VERSION_MAIN << 24)\ + |(__FM33LG0xx_FL_VERSION_SUB1 << 16)\ + |(__FM33LG0xx_FL_VERSION_SUB2)) + +/** + * @brief Macros used by delay support functions + */ +#define FL_DELAY_US (SystemCoreClock/1000000) +#define FL_DELAY_MS (SystemCoreClock/1000) + +/** + * @} + */ + + /* Struct Defines -------------------------------------------------------------------------------------*/ +/** @defgroup FL_ET_NVIC FL Driver Library NVIC Init Sturcture Defines + * @{ + */ + +typedef struct +{ + /** 中断抢占优先级 */ + uint32_t preemptPriority; + +} FL_NVIC_ConfigTypeDef; + +/** + * @} + */ + +/* Exported Functions ---------------------------------------------------------------------------------*/ +/** @defgroup FL_EF_DELAY Exported FL Driver Library Delay Support Functions + * @{ + */ + +void FL_DelayInit(void); +void FL_DelayUs(uint32_t count); +void FL_DelayMs(uint32_t count); +void FL_DelayUsStart(uint32_t count); +void FL_DelayMsStart(uint32_t count); +bool FL_DelayEnd(void); + +/** + * @} + */ + +/** @defgroup FL_EF_INIT FL Driver Library Exported Init Functions + * @{ + */ + +void FL_Init(void); + +/** + * @} + */ + +/** @defgroup FL_EF_NVIC FL Driver Library Exported NVIC Configuration Functions + * @{ + */ + +void FL_NVIC_Init(FL_NVIC_ConfigTypeDef *configStruct, IRQn_Type irq); + +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif /* __FM33LG0XX_FL_H */ + +/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/ diff --git a/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_adc.h b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_adc.h new file mode 100644 index 0000000..fd6801f --- /dev/null +++ b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_adc.h @@ -0,0 +1,2104 @@ + /** + ******************************************************************************************************* + * @file fm33lg0xx_fl_adc.h + * @author FMSH Application Team + * @brief Head file of ADC FL Module + ******************************************************************************************************* + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + + +/* Define to prevent recursive inclusion---------------------------------------------------------------*/ +#ifndef __FM33LG0XX_FL_ADC_H +#define __FM33LG0XX_FL_ADC_H + +#ifdef __cplusplus +extern "C" { +#endif +/* Includes -------------------------------------------------------------------------------------------*/ +#include "fm33lg0xx_fl_def.h" +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + + /** @defgroup ADC ADC + * @brief ADC FL driver + * @{ + */ + +/* Exported types -------------------------------------------------------------------------------------*/ +/** @defgroup ADC_FL_ES_INIT ADC Exported Init structures + * @{ + */ +#define ADC_VREF_SOURCE (*((uint16_t *)(0x1FFFFB08))) /* vref122定标值 */ + +#define ADC_VREF_BKP (*((uint16_t *)(0x1FFFFBF6))) /* vref122备份值 */ + +#define ADC_VREF ((((ADC_VREF_SOURCE & 0xffffU)>0x0654) && ((ADC_VREF_SOURCE & 0xffffU)<0x0690)) ? ADC_VREF_SOURCE : ADC_VREF_BKP) + + +#define ADC_TS_SOURCE (*((uint16_t *)(0x1FFFFB12))) /* PTAT定标值 */ + +#define ADC_TS_BKP (*((uint16_t *)(0x1FFFFBE2))) /* PTAT备份值 */ + +#define ADC_TS ((((ADC_TS_SOURCE & 0xffffU)>0x03E8) && ((ADC_TS_SOURCE & 0xffffU)<0x0474)) ? ADC_TS_SOURCE : ADC_TS_BKP) + +/** + * @brief FL ADC Init Sturcture definition + */ +typedef struct +{ + /** ADC工作时钟源选择 */ + uint32_t clockSource; + /** ADCCLK预分频配置 */ + uint32_t clockPrescaler; + /** ADC基准源选择 */ + uint32_t referenceSource; + /** ADC数据位选择 */ + uint32_t bitWidth; + +} FL_ADC_CommonInitTypeDef; + +typedef struct +{ + /** 连续转换模式配置 */ + uint32_t conversionMode; + /** 单次自动转换模式配置 */ + uint32_t autoMode; + /** 等待模式配置 */ + FL_FunState waitMode; + /** 覆盖模式配置 */ + FL_FunState overrunMode; + /** 通道扫描顺序配置 */ + uint32_t scanDirection; + /** 触发信号使能配置 */ + uint32_t externalTrigConv; + /** 触发源选择 */ + uint32_t triggerSource; + /** 快速通道采样时间配置 */ + uint32_t fastChannelTime; + /** 慢速通道采样时间配置 */ + uint32_t lowChannelTime; + /** 过采样使能配置 */ + FL_FunState oversamplingMode; + /** 过采样率配置 */ + uint32_t overSampingMultiplier; + /** 过采样移位配置 */ + uint32_t oversamplingShift; + +} FL_ADC_InitTypeDef; +/** + * @} + */ +/* Exported constants ---------------------------------------------------------------------------------*/ +/** @defgroup ADC_FL_Exported_Constants ADC Exported Constants + * @{ + */ + +#define ADC_ISR_EOC_Pos (0U) +#define ADC_ISR_EOC_Msk (0x1U << ADC_ISR_EOC_Pos) +#define ADC_ISR_EOC ADC_ISR_EOC_Msk + +#define ADC_ISR_EOS_Pos (1U) +#define ADC_ISR_EOS_Msk (0x1U << ADC_ISR_EOS_Pos) +#define ADC_ISR_EOS ADC_ISR_EOS_Msk + +#define ADC_ISR_OVR_Pos (2U) +#define ADC_ISR_OVR_Msk (0x1U << ADC_ISR_OVR_Pos) +#define ADC_ISR_OVR ADC_ISR_OVR_Msk + +#define ADC_ISR_BUSY_Pos (3U) +#define ADC_ISR_BUSY_Msk (0x1U << ADC_ISR_BUSY_Pos) +#define ADC_ISR_BUSY ADC_ISR_BUSY_Msk + +#define ADC_ISR_EOCAL_Pos (4U) +#define ADC_ISR_EOCAL_Msk (0x1U << ADC_ISR_EOCAL_Pos) +#define ADC_ISR_EOCAL ADC_ISR_EOCAL_Msk + +#define ADC_ISR_AWD_UL_Pos (5U) +#define ADC_ISR_AWD_UL_Msk (0x1U << ADC_ISR_AWD_UL_Pos) +#define ADC_ISR_AWD_UL ADC_ISR_AWD_UL_Msk + +#define ADC_ISR_AWD_AH_Pos (6U) +#define ADC_ISR_AWD_AH_Msk (0x1U << ADC_ISR_AWD_AH_Pos) +#define ADC_ISR_AWD_AH ADC_ISR_AWD_AH_Msk + +#define ADC_IER_EOCIE_Pos (0U) +#define ADC_IER_EOCIE_Msk (0x1U << ADC_IER_EOCIE_Pos) +#define ADC_IER_EOCIE ADC_IER_EOCIE_Msk + +#define ADC_IER_EOSIE_Pos (1U) +#define ADC_IER_EOSIE_Msk (0x1U << ADC_IER_EOSIE_Pos) +#define ADC_IER_EOSIE ADC_IER_EOSIE_Msk + +#define ADC_IER_OVRIE_Pos (2U) +#define ADC_IER_OVRIE_Msk (0x1U << ADC_IER_OVRIE_Pos) +#define ADC_IER_OVRIE ADC_IER_OVRIE_Msk + +#define ADC_IER_EOCALIE_Pos (4U) +#define ADC_IER_EOCALIE_Msk (0x1U << ADC_IER_EOCALIE_Pos) +#define ADC_IER_EOCALIE ADC_IER_EOCALIE_Msk + +#define ADC_IER_AWD_ULIE_Pos (5U) +#define ADC_IER_AWD_ULIE_Msk (0x1U << ADC_IER_AWD_ULIE_Pos) +#define ADC_IER_AWD_ULIE ADC_IER_AWD_ULIE_Msk + +#define ADC_IER_AWD_AHIE_Pos (6U) +#define ADC_IER_AWD_AHIE_Msk (0x1U << ADC_IER_AWD_AHIE_Pos) +#define ADC_IER_AWD_AHIE ADC_IER_AWD_AHIE_Msk + +#define ADC_CR1_ADEN_Pos (0U) +#define ADC_CR1_ADEN_Msk (0x1U << ADC_CR1_ADEN_Pos) +#define ADC_CR1_ADEN ADC_CR1_ADEN_Msk + +#define ADC_CR1_SWTRIG_Pos (1U) +#define ADC_CR1_SWTRIG_Msk (0x1U << ADC_CR1_SWTRIG_Pos) +#define ADC_CR1_SWTRIG ADC_CR1_SWTRIG_Msk + +#define ADC_CR2_TRGCFG_Pos (0U) +#define ADC_CR2_TRGCFG_Msk (0x3U << ADC_CR2_TRGCFG_Pos) +#define ADC_CR2_TRGCFG ADC_CR2_TRGCFG_Msk + +#define ADC_CALR_CALEN_Pos (0U) +#define ADC_CALR_CALEN_Msk (0x1U << ADC_CALR_CALEN_Pos) +#define ADC_CALR_CALEN ADC_CALR_CALEN_Msk + +#define ADC_CFGR1_PEFSEL_Pos (0U) +#define ADC_CFGR1_PEFSEL_Msk (0x3U << ADC_CFGR1_PEFSEL_Pos) +#define ADC_CFGR1_PEFSEL ADC_CFGR1_PEFSEL_Msk + +#define ADC_CFGR1_CLKSEL_Pos (2U) +#define ADC_CFGR1_CLKSEL_Msk (0x1U << ADC_CFGR1_CLKSEL_Pos) +#define ADC_CFGR1_CLKSEL ADC_CFGR1_CLKSEL_Msk + +#define ADC_CFGR1_BITSEL_Pos (3U) +#define ADC_CFGR1_BITSEL_Msk (0x3U << ADC_CFGR1_BITSEL_Pos) +#define ADC_CFGR1_BITSEL ADC_CFGR1_BITSEL_Msk + +#define ADC_CFGR1_EXSOC_Pos (5U) +#define ADC_CFGR1_EXSOC_Msk (0x1U << ADC_CFGR1_EXSOC_Pos) +#define ADC_CFGR1_EXSOC ADC_CFGR1_EXSOC_Msk + +#define ADC_CFGR1_APBCLK_PSC_Pos (6U) +#define ADC_CFGR1_APBCLK_PSC_Msk (0x3U << ADC_CFGR1_APBCLK_PSC_Pos) +#define ADC_CFGR1_APBCLK_PSC ADC_CFGR1_APBCLK_PSC_Msk + +#define ADC_CFGR1_BUFEN_Pos (8U) +#define ADC_CFGR1_BUFEN_Msk (0x1U << ADC_CFGR1_BUFEN_Pos) +#define ADC_CFGR1_BUFEN ADC_CFGR1_BUFEN_Msk + +#define ADC_CFGR1_BUFMOD_Pos (9U) +#define ADC_CFGR1_BUFMOD_Msk (0x1U << ADC_CFGR1_BUFMOD_Pos) +#define ADC_CFGR1_BUFMOD ADC_CFGR1_BUFMOD_Msk + +#define ADC_CFGR1_BUFLPF_Pos (10U) +#define ADC_CFGR1_BUFLPF_Msk (0x1U << ADC_CFGR1_BUFLPF_Pos) +#define ADC_CFGR1_BUFLPF ADC_CFGR1_BUFLPF_Msk + +#define ADC_CFGR1_BUFCHP_EN_Pos (11U) +#define ADC_CFGR1_BUFCHP_EN_Msk (0x1U << ADC_CFGR1_BUFCHP_EN_Pos) +#define ADC_CFGR1_BUFCHP_EN ADC_CFGR1_BUFCHP_EN_Msk + +#define ADC_CFGR2_DMAEN_Pos (0U) +#define ADC_CFGR2_DMAEN_Msk (0x1U << ADC_CFGR2_DMAEN_Pos) +#define ADC_CFGR2_DMAEN ADC_CFGR2_DMAEN_Msk + +#define ADC_CFGR2_SCANDIR_Pos (2U) +#define ADC_CFGR2_SCANDIR_Msk (0x1U << ADC_CFGR2_SCANDIR_Pos) +#define ADC_CFGR2_SCANDIR ADC_CFGR2_SCANDIR_Msk + +#define ADC_CFGR2_EXTS_Pos (4U) +#define ADC_CFGR2_EXTS_Msk (0xfU << ADC_CFGR2_EXTS_Pos) +#define ADC_CFGR2_EXTS ADC_CFGR2_EXTS_Msk + +#define ADC_CFGR2_OVRM_Pos (8U) +#define ADC_CFGR2_OVRM_Msk (0x1U << ADC_CFGR2_OVRM_Pos) +#define ADC_CFGR2_OVRM ADC_CFGR2_OVRM_Msk + +#define ADC_CFGR2_CONT_Pos (9U) +#define ADC_CFGR2_CONT_Msk (0x1U << ADC_CFGR2_CONT_Pos) +#define ADC_CFGR2_CONT ADC_CFGR2_CONT_Msk + +#define ADC_CFGR2_WAIT_Pos (10U) +#define ADC_CFGR2_WAIT_Msk (0x1U << ADC_CFGR2_WAIT_Pos) +#define ADC_CFGR2_WAIT ADC_CFGR2_WAIT_Msk + +#define ADC_CFGR2_SEMI_Pos (11U) +#define ADC_CFGR2_SEMI_Msk (0x1U << ADC_CFGR2_SEMI_Pos) +#define ADC_CFGR2_SEMI ADC_CFGR2_SEMI_Msk + +#define ADC_CFGR2_IOTRFEN_Pos (14U) +#define ADC_CFGR2_IOTRFEN_Msk (0x1U << ADC_CFGR2_IOTRFEN_Pos) +#define ADC_CFGR2_IOTRFEN ADC_CFGR2_IOTRFEN_Msk + +#define ADC_CFGR2_OVSEN_Pos (16U) +#define ADC_CFGR2_OVSEN_Msk (0x1U << ADC_CFGR2_OVSEN_Pos) +#define ADC_CFGR2_OVSEN ADC_CFGR2_OVSEN_Msk + +#define ADC_CFGR2_OVSR_Pos (17U) +#define ADC_CFGR2_OVSR_Msk (0x7U << ADC_CFGR2_OVSR_Pos) +#define ADC_CFGR2_OVSR ADC_CFGR2_OVSR_Msk + +#define ADC_CFGR2_OVSS_Pos (20U) +#define ADC_CFGR2_OVSS_Msk (0xfU << ADC_CFGR2_OVSS_Pos) +#define ADC_CFGR2_OVSS ADC_CFGR2_OVSS_Msk + +#define ADC_CFGR2_AWDEN_Pos (24U) +#define ADC_CFGR2_AWDEN_Msk (0x1U << ADC_CFGR2_AWDEN_Pos) +#define ADC_CFGR2_AWDEN ADC_CFGR2_AWDEN_Msk + +#define ADC_CFGR2_AWDSC_Pos (25U) +#define ADC_CFGR2_AWDSC_Msk (0x1U << ADC_CFGR2_AWDSC_Pos) +#define ADC_CFGR2_AWDSC ADC_CFGR2_AWDSC_Msk + +#define ADC_CFGR2_AWDCH_Pos (26U) +#define ADC_CFGR2_AWDCH_Msk (0x1fU << ADC_CFGR2_AWDCH_Pos) +#define ADC_CFGR2_AWDCH ADC_CFGR2_AWDCH_Msk + +#define ADC_SMTR_SMTS1_Pos (0U) +#define ADC_SMTR_SMTS1_Msk (0xfU << ADC_SMTR_SMTS1_Pos) +#define ADC_SMTR_SMTS1 ADC_SMTR_SMTS1_Msk + +#define ADC_SMTR_SMTS2_Pos (4U) +#define ADC_SMTR_SMTS2_Msk (0xfU << ADC_SMTR_SMTS2_Pos) +#define ADC_SMTR_SMTS2 ADC_SMTR_SMTS2_Msk + +#define ADC_DR_DATA_Pos (0U) +#define ADC_DR_DATA_Msk (0xffffU << ADC_DR_DATA_Pos) +#define ADC_DR_DATA ADC_DR_DATA_Msk + +#define ADC_HLTR_AWD_LT_Pos (0U) +#define ADC_HLTR_AWD_LT_Msk (0xffffU << ADC_HLTR_AWD_LT_Pos) +#define ADC_HLTR_AWD_LT ADC_HLTR_AWD_LT_Msk + +#define ADC_HLTR_AWD_HT_Pos (16U) +#define ADC_HLTR_AWD_HT_Msk (0xffffU << ADC_HLTR_AWD_HT_Pos) +#define ADC_HLTR_AWD_HT ADC_HLTR_AWD_HT_Msk + + + +#define FL_ADC_EXTERNAL_CH0 ((u32)0x1U << 0U) +#define FL_ADC_EXTERNAL_CH1 ((u32)0x1U << 1U) +#define FL_ADC_EXTERNAL_CH2 ((u32)0x1U << 2U) +#define FL_ADC_EXTERNAL_CH3 ((u32)0x1U << 3U) +#define FL_ADC_EXTERNAL_CH4 ((u32)0x1U << 4U) +#define FL_ADC_EXTERNAL_CH5 ((u32)0x1U << 5U) +#define FL_ADC_EXTERNAL_CH6 ((u32)0x1U << 6U) +#define FL_ADC_EXTERNAL_CH7 ((u32)0x1U << 7U) +#define FL_ADC_EXTERNAL_CH8 ((u32)0x1U << 8U) +#define FL_ADC_EXTERNAL_CH9 ((u32)0x1U << 9U) +#define FL_ADC_EXTERNAL_CH10 ((u32)0x1U << 10U) +#define FL_ADC_EXTERNAL_CH11 ((u32)0x1U << 11U) +#define FL_ADC_EXTERNAL_CH12 ((u32)0x1U << 12U) +#define FL_ADC_EXTERNAL_CH13 ((u32)0x1U << 13U) +#define FL_ADC_EXTERNAL_CH14 ((u32)0x1U << 14U) +#define FL_ADC_EXTERNAL_CH15 ((u32)0x1U << 15U) +#define FL_ADC_EXTERNAL_CH16 ((u32)0x1U << 16U) +#define FL_ADC_EXTERNAL_CH17 ((u32)0x1U << 17U) +#define FL_ADC_EXTERNAL_CH18 ((u32)0x1U << 18U) +#define FL_ADC_EXTERNAL_CH19 ((u32)0x1U << 19U) +#define FL_ADC_INTERNAL_VREF1P2 ((u32)0x1U << 24U) +#define FL_ADC_INTERNAL_TS ((u32)0x1U << 25U) +#define FL_ADC_INTERNAL_AVREF ((u32)0x1U << 26U) +#define FL_ADC_INTERNAL_VBAT_DIV3 ((u32)0x1U << 27U) +#define FL_ADC_INTERNAL_VDD_DIV3 ((u32)0x1U << 28U) +#define FL_ADC_INTERNAL_DAC ((u32)0x1U << 29U) +#define FL_ADC_ALL_CHANNEL (0xfffffU << 0U) + + +#define FL_ADC_DIFFERENTIAL_GROUP0 (0x1Ul << 0U) +#define FL_ADC_DIFFERENTIAL_GROUP1 (0x1Ul << 1U) +#define FL_ADC_DIFFERENTIAL_GROUP2 (0x1Ul << 2U) +#define FL_ADC_DIFFERENTIAL_GROUP3 (0x1Ul << 3U) +#define FL_ADC_DIFFERENTIAL_GROUP4 (0x1Ul << 4U) +#define FL_ADC_DIFFERENTIAL_GROUP5 (0x1Ul << 5U) +#define FL_ADC_DIFFERENTIAL_GROUP6 (0x1Ul << 6U) +#define FL_ADC_CLK_PSC_DIV1 (0x0Ul << 0U) +#define FL_ADC_CLK_PSC_DIV2 (0x1Ul << 0U) +#define FL_ADC_CLK_PSC_DIV4 (0x2Ul << 0U) +#define FL_ADC_CLK_PSC_DIV8 (0x3Ul << 0U) +#define FL_ADC_CLK_PSC_DIV16 (0x4Ul << 0U) +#define FL_ADC_CLK_PSC_DIV32 (0x5Ul << 0U) + + + +#define FL_ADC_TRIGGER_EDGE_NONE (0x0Ul << ADC_CR2_TRGCFG_Pos) +#define FL_ADC_TRIGGER_EDGE_RISING (0x1Ul << ADC_CR2_TRGCFG_Pos) +#define FL_ADC_TRIGGER_EDGE_FALLING (0x2Ul << ADC_CR2_TRGCFG_Pos) +#define FL_ADC_TRIGGER_EDGE_BOTH (0x3Ul << ADC_CR2_TRGCFG_Pos) + + +#define FL_ADC_REF_SOURCE_VDDA (0x0Ul << ADC_CFGR1_PEFSEL_Pos) +#define FL_ADC_REF_SOURCE_VREFP (0x1Ul << ADC_CFGR1_PEFSEL_Pos) +#define FL_ADC_REF_SOURCE_VDD15 (0x2Ul << ADC_CFGR1_PEFSEL_Pos) + + +#define FL_ADC_CLK_SOURCE_ADCCLK (0x0U << ADC_CFGR1_CLKSEL_Pos) +#define FL_ADC_CLK_SOURCE_APBCLK (0x1U << ADC_CFGR1_CLKSEL_Pos) + + +#define FL_ADC_BIT_WIDTH_12B (0x0Ul << ADC_CFGR1_BITSEL_Pos) +#define FL_ADC_BIT_WIDTH_10B (0x1Ul << ADC_CFGR1_BITSEL_Pos) +#define FL_ADC_BIT_WIDTH_8B (0x2Ul << ADC_CFGR1_BITSEL_Pos) +#define FL_ADC_BIT_WIDTH_6B (0x3Ul << ADC_CFGR1_BITSEL_Pos) + + +#define FL_ADC_APBCLK_PSC_DIV1 (0x0U << ADC_CFGR1_APBCLK_PSC_Pos) +#define FL_ADC_APBCLK_PSC_DIV2 (0x1U << ADC_CFGR1_APBCLK_PSC_Pos) +#define FL_ADC_APBCLK_PSC_DIV4 (0x2U << ADC_CFGR1_APBCLK_PSC_Pos) +#define FL_ADC_APBCLK_PSC_DIV8 (0x3U << ADC_CFGR1_APBCLK_PSC_Pos) + + +#define FL_ADC_BUFF_POWER_MODE_NORMAL (0x0U << ADC_CFGR1_BUFMOD_Pos) +#define FL_ADC_BUFF_POWER_MODE_LOW (0x1U << ADC_CFGR1_BUFMOD_Pos) + + +#define FL_ADC_BUFF_FILTER_MODE_NORMAL (0x0U << ADC_CFGR1_BUFLPF_Pos) +#define FL_ADC_BUFF_FILTER_MODE_LOWPASS (0x1U << ADC_CFGR1_BUFLPF_Pos) + + +#define FL_ADC_SEQ_SCAN_DIR_FORWARD (0x0Ul << ADC_CFGR2_SCANDIR_Pos) +#define FL_ADC_SEQ_SCAN_DIR_BACKWARD (0x1Ul << ADC_CFGR2_SCANDIR_Pos) + + +#define FL_ADC_TRGI_LUT0 (0x0Ul << ADC_CFGR2_EXTS_Pos) +#define FL_ADC_TRGI_LUT1 (0x1Ul << ADC_CFGR2_EXTS_Pos) +#define FL_ADC_TRGI_LUT2 (0x2Ul << ADC_CFGR2_EXTS_Pos) +#define FL_ADC_TRGI_ATIM (0x3Ul << ADC_CFGR2_EXTS_Pos) +#define FL_ADC_TRGI_GPTIM1 (0x4Ul << ADC_CFGR2_EXTS_Pos) +#define FL_ADC_TRGI_GPTIM2 (0x5Ul << ADC_CFGR2_EXTS_Pos) +#define FL_ADC_TRGI_BSTIM16 (0x6Ul << ADC_CFGR2_EXTS_Pos) +#define FL_ADC_TRGI_LPTIM16 (0x7Ul << ADC_CFGR2_EXTS_Pos) +#define FL_ADC_TRGI_COMP1 (0x8Ul << ADC_CFGR2_EXTS_Pos) +#define FL_ADC_TRGI_COMP2 (0x9Ul << ADC_CFGR2_EXTS_Pos) +#define FL_ADC_TRGI_RTCA (0xaUl << ADC_CFGR2_EXTS_Pos) +#define FL_ADC_TRGI_LUT3 (0xbUl << ADC_CFGR2_EXTS_Pos) +#define FL_ADC_TRGI_GPTIM0 (0xcUl << ADC_CFGR2_EXTS_Pos) +#define FL_ADC_TRGI_COMP3 (0xdUl << ADC_CFGR2_EXTS_Pos) + + +#define FL_ADC_CONV_MODE_SINGLE (0x0Ul << ADC_CFGR2_CONT_Pos) +#define FL_ADC_CONV_MODE_CONTINUOUS (0x1Ul << ADC_CFGR2_CONT_Pos) + + +#define FL_ADC_SINGLE_CONV_MODE_AUTO (0x0Ul << ADC_CFGR2_SEMI_Pos) +#define FL_ADC_SINGLE_CONV_MODE_SEMIAUTO (0x1Ul << ADC_CFGR2_SEMI_Pos) + + +#define FL_ADC_OVERSAMPLING_MUL_2X (0x0Ul << ADC_CFGR2_OVSR_Pos) +#define FL_ADC_OVERSAMPLING_MUL_4X (0x1Ul << ADC_CFGR2_OVSR_Pos) +#define FL_ADC_OVERSAMPLING_MUL_8X (0x2Ul << ADC_CFGR2_OVSR_Pos) +#define FL_ADC_OVERSAMPLING_MUL_16X (0x3Ul << ADC_CFGR2_OVSR_Pos) +#define FL_ADC_OVERSAMPLING_MUL_32X (0x4Ul << ADC_CFGR2_OVSR_Pos) +#define FL_ADC_OVERSAMPLING_MUL_64X (0x5Ul << ADC_CFGR2_OVSR_Pos) +#define FL_ADC_OVERSAMPLING_MUL_128X (0x6Ul << ADC_CFGR2_OVSR_Pos) +#define FL_ADC_OVERSAMPLING_MUL_256X (0x7Ul << ADC_CFGR2_OVSR_Pos) + + +#define FL_ADC_OVERSAMPLING_SHIFT_0B (0x0Ul << ADC_CFGR2_OVSS_Pos) +#define FL_ADC_OVERSAMPLING_SHIFT_1B (0x1Ul << ADC_CFGR2_OVSS_Pos) +#define FL_ADC_OVERSAMPLING_SHIFT_2B (0x2Ul << ADC_CFGR2_OVSS_Pos) +#define FL_ADC_OVERSAMPLING_SHIFT_3B (0x3Ul << ADC_CFGR2_OVSS_Pos) +#define FL_ADC_OVERSAMPLING_SHIFT_4B (0x4Ul << ADC_CFGR2_OVSS_Pos) +#define FL_ADC_OVERSAMPLING_SHIFT_5B (0x5Ul << ADC_CFGR2_OVSS_Pos) +#define FL_ADC_OVERSAMPLING_SHIFT_6B (0x6Ul << ADC_CFGR2_OVSS_Pos) +#define FL_ADC_OVERSAMPLING_SHIFT_7B (0x7Ul << ADC_CFGR2_OVSS_Pos) +#define FL_ADC_OVERSAMPLING_SHIFT_8B (0x8Ul << ADC_CFGR2_OVSS_Pos) + + +#define FL_ADC_AWDG_ALL_CHANNEL (0x0U << ADC_CFGR2_AWDSC_Pos) +#define FL_ADC_AWDG_SINGLE_CHANNEL (0x1U << ADC_CFGR2_AWDSC_Pos) + + +#define FL_ADC_AWDG_CH0 (0x0U << ADC_CFGR2_AWDCH_Pos) +#define FL_ADC_AWDG_CH1 (0x1U << ADC_CFGR2_AWDCH_Pos) +#define FL_ADC_AWDG_CH2 (0x2U << ADC_CFGR2_AWDCH_Pos) +#define FL_ADC_AWDG_CH3 (0x3U << ADC_CFGR2_AWDCH_Pos) +#define FL_ADC_AWDG_CH4 (0x4U << ADC_CFGR2_AWDCH_Pos) +#define FL_ADC_AWDG_CH5 (0x5U << ADC_CFGR2_AWDCH_Pos) +#define FL_ADC_AWDG_CH6 (0x6U << ADC_CFGR2_AWDCH_Pos) +#define FL_ADC_AWDG_CH7 (0x7U << ADC_CFGR2_AWDCH_Pos) +#define FL_ADC_AWDG_CH8 (0x8U << ADC_CFGR2_AWDCH_Pos) +#define FL_ADC_AWDG_CH9 (0x9U << ADC_CFGR2_AWDCH_Pos) +#define FL_ADC_AWDG_CH10 (0xaU << ADC_CFGR2_AWDCH_Pos) +#define FL_ADC_AWDG_CH11 (0xbU << ADC_CFGR2_AWDCH_Pos) +#define FL_ADC_AWDG_CH12 (0xcU << ADC_CFGR2_AWDCH_Pos) +#define FL_ADC_AWDG_CH13 (0xdU << ADC_CFGR2_AWDCH_Pos) +#define FL_ADC_AWDG_CH14 (0xeU << ADC_CFGR2_AWDCH_Pos) +#define FL_ADC_AWDG_CH15 (0xfU << ADC_CFGR2_AWDCH_Pos) +#define FL_ADC_AWDG_CH16 (0x10U << ADC_CFGR2_AWDCH_Pos) +#define FL_ADC_AWDG_CH17 (0x11U << ADC_CFGR2_AWDCH_Pos) +#define FL_ADC_AWDG_CH18 (0x12U << ADC_CFGR2_AWDCH_Pos) +#define FL_ADC_AWDG_CH19 (0x13U << ADC_CFGR2_AWDCH_Pos) + + +#define FL_ADC_SLOW_CH_SAMPLING_TIME_2_ADCCLK (0x0Ul << ADC_SMTR_SMTS1_Pos) +#define FL_ADC_SLOW_CH_SAMPLING_TIME_4_ADCCLK (0x1Ul << ADC_SMTR_SMTS1_Pos) +#define FL_ADC_SLOW_CH_SAMPLING_TIME_8_ADCCLK (0x2Ul << ADC_SMTR_SMTS1_Pos) +#define FL_ADC_SLOW_CH_SAMPLING_TIME_12_ADCCLK (0x3Ul << ADC_SMTR_SMTS1_Pos) +#define FL_ADC_SLOW_CH_SAMPLING_TIME_16_ADCCLK (0x4Ul << ADC_SMTR_SMTS1_Pos) +#define FL_ADC_SLOW_CH_SAMPLING_TIME_32_ADCCLK (0x5Ul << ADC_SMTR_SMTS1_Pos) +#define FL_ADC_SLOW_CH_SAMPLING_TIME_64_ADCCLK (0x6Ul << ADC_SMTR_SMTS1_Pos) +#define FL_ADC_SLOW_CH_SAMPLING_TIME_80_ADCCLK (0x7Ul << ADC_SMTR_SMTS1_Pos) +#define FL_ADC_SLOW_CH_SAMPLING_TIME_96_ADCCLK (0x8Ul << ADC_SMTR_SMTS1_Pos) +#define FL_ADC_SLOW_CH_SAMPLING_TIME_128_ADCCLK (0x9Ul << ADC_SMTR_SMTS1_Pos) +#define FL_ADC_SLOW_CH_SAMPLING_TIME_160_ADCCLK (0xaUl << ADC_SMTR_SMTS1_Pos) +#define FL_ADC_SLOW_CH_SAMPLING_TIME_192_ADCCLK (0xbUl << ADC_SMTR_SMTS1_Pos) +#define FL_ADC_SLOW_CH_SAMPLING_TIME_256_ADCCLK (0xcUl << ADC_SMTR_SMTS1_Pos) +#define FL_ADC_SLOW_CH_SAMPLING_TIME_320_ADCCLK (0xdUl << ADC_SMTR_SMTS1_Pos) +#define FL_ADC_SLOW_CH_SAMPLING_TIME_384_ADCCLK (0xeUl << ADC_SMTR_SMTS1_Pos) +#define FL_ADC_SLOW_CH_SAMPLING_TIME_512_ADCCLK (0xfUl << ADC_SMTR_SMTS1_Pos) + + +#define FL_ADC_FAST_CH_SAMPLING_TIME_2_ADCCLK (0x0Ul << ADC_SMTR_SMTS2_Pos) +#define FL_ADC_FAST_CH_SAMPLING_TIME_4_ADCCLK (0x1Ul << ADC_SMTR_SMTS2_Pos) +#define FL_ADC_FAST_CH_SAMPLING_TIME_8_ADCCLK (0x2Ul << ADC_SMTR_SMTS2_Pos) +#define FL_ADC_FAST_CH_SAMPLING_TIME_12_ADCCLK (0x3Ul << ADC_SMTR_SMTS2_Pos) +#define FL_ADC_FAST_CH_SAMPLING_TIME_16_ADCCLK (0x4Ul << ADC_SMTR_SMTS2_Pos) +#define FL_ADC_FAST_CH_SAMPLING_TIME_32_ADCCLK (0x5Ul << ADC_SMTR_SMTS2_Pos) +#define FL_ADC_FAST_CH_SAMPLING_TIME_64_ADCCLK (0x6Ul << ADC_SMTR_SMTS2_Pos) +#define FL_ADC_FAST_CH_SAMPLING_TIME_80_ADCCLK (0x7Ul << ADC_SMTR_SMTS2_Pos) +#define FL_ADC_FAST_CH_SAMPLING_TIME_96_ADCCLK (0x8Ul << ADC_SMTR_SMTS2_Pos) +#define FL_ADC_FAST_CH_SAMPLING_TIME_128_ADCCLK (0x9Ul << ADC_SMTR_SMTS2_Pos) +#define FL_ADC_FAST_CH_SAMPLING_TIME_160_ADCCLK (0xaUl << ADC_SMTR_SMTS2_Pos) +#define FL_ADC_FAST_CH_SAMPLING_TIME_192_ADCCLK (0xbUl << ADC_SMTR_SMTS2_Pos) +#define FL_ADC_FAST_CH_SAMPLING_TIME_256_ADCCLK (0xcUl << ADC_SMTR_SMTS2_Pos) +#define FL_ADC_FAST_CH_SAMPLING_TIME_320_ADCCLK (0xdUl << ADC_SMTR_SMTS2_Pos) +#define FL_ADC_FAST_CH_SAMPLING_TIME_384_ADCCLK (0xeUl << ADC_SMTR_SMTS2_Pos) +#define FL_ADC_FAST_CH_SAMPLING_TIME_512_ADCCLK (0xfUl << ADC_SMTR_SMTS2_Pos) + + +/** + * @} + */ +/* Exported functions ---------------------------------------------------------------------------------*/ +/** @defgroup ADC_FL_Exported_Functions ADC Exported Functions + * @{ + */ + +/** + * @brief Get ADC End Of Conversion Flag + * @rmtoll ISR EOC FL_ADC_IsActiveFlag_EndOfConversion + * @param ADCx ADC instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ADC_IsActiveFlag_EndOfConversion(ADC_Type *ADCx) +{ + return (uint32_t)(READ_BIT(ADCx->ISR, ADC_ISR_EOC_Msk) == (ADC_ISR_EOC_Msk)); +} + +/** + * @brief Clear ADC End Of Conversion Flag + * @rmtoll ISR EOC FL_ADC_ClearFlag_EndOfConversion + * @param ADCx ADC instance + * @retval None + */ +__STATIC_INLINE void FL_ADC_ClearFlag_EndOfConversion(ADC_Type *ADCx) +{ + WRITE_REG(ADCx->ISR, ADC_ISR_EOC_Msk); +} + +/** + * @brief Get ADC End Of Sequence Flag + * @rmtoll ISR EOS FL_ADC_IsActiveFlag_EndOfSequence + * @param ADCx ADC instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ADC_IsActiveFlag_EndOfSequence(ADC_Type *ADCx) +{ + return (uint32_t)(READ_BIT(ADCx->ISR, ADC_ISR_EOS_Msk) == (ADC_ISR_EOS_Msk)); +} + +/** + * @brief Clear ADC End Of Sequence Flag + * @rmtoll ISR EOS FL_ADC_ClearFlag_EndOfSequence + * @param ADCx ADC instance + * @retval None + */ +__STATIC_INLINE void FL_ADC_ClearFlag_EndOfSequence(ADC_Type *ADCx) +{ + WRITE_REG(ADCx->ISR, ADC_ISR_EOS_Msk); +} + +/** + * @brief Get ADC Data Overrun Flag + * @rmtoll ISR OVR FL_ADC_IsActiveFlag_Overrun + * @param ADCx ADC instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ADC_IsActiveFlag_Overrun(ADC_Type *ADCx) +{ + return (uint32_t)(READ_BIT(ADCx->ISR, ADC_ISR_OVR_Msk) == (ADC_ISR_OVR_Msk)); +} + +/** + * @brief Clear ADC Data Overrun Flag + * @rmtoll ISR OVR FL_ADC_ClearFlag_Overrun + * @param ADCx ADC instance + * @retval None + */ +__STATIC_INLINE void FL_ADC_ClearFlag_Overrun(ADC_Type *ADCx) +{ + WRITE_REG(ADCx->ISR, ADC_ISR_OVR_Msk); +} + +/** + * @brief Get ADC Busy Flag + * @rmtoll ISR BUSY FL_ADC_IsActiveFlag_Busy + * @param ADCx ADC instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ADC_IsActiveFlag_Busy(ADC_Type *ADCx) +{ + return (uint32_t)(READ_BIT(ADCx->ISR, ADC_ISR_BUSY_Msk) == (ADC_ISR_BUSY_Msk)); +} + +/** + * @brief Get ADC End Of Calibration Flag + * @rmtoll ISR EOCAL FL_ADC_IsActiveFlag_EndOfCalibration + * @param ADCx ADC instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ADC_IsActiveFlag_EndOfCalibration(ADC_Type *ADCx) +{ + return (uint32_t)(READ_BIT(ADCx->ISR, ADC_ISR_EOCAL_Msk) == (ADC_ISR_EOCAL_Msk)); +} + +/** + * @brief Clear ADC End Of Calibration Flag + * @rmtoll ISR EOCAL FL_ADC_ClearFlag_EndOfCalibration + * @param ADCx ADC instance + * @retval None + */ +__STATIC_INLINE void FL_ADC_ClearFlag_EndOfCalibration(ADC_Type *ADCx) +{ + WRITE_REG(ADCx->ISR, ADC_ISR_EOCAL_Msk); +} + +/** + * @brief Get ADC Analog Watchdog Under Low + * @rmtoll ISR AWD_UL FL_ADC_IsActiveFlag_AnalogWDGUnderLow + * @param ADCx ADC instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ADC_IsActiveFlag_AnalogWDGUnderLow(ADC_Type *ADCx) +{ + return (uint32_t)(READ_BIT(ADCx->ISR, ADC_ISR_AWD_UL_Msk) == (ADC_ISR_AWD_UL_Msk)); +} + +/** + * @brief Clear ADC Analog Watchdog Under Low + * @rmtoll ISR AWD_UL FL_ADC_ClearFlag_AnalogWDGUnderLow + * @param ADCx ADC instance + * @retval None + */ +__STATIC_INLINE void FL_ADC_ClearFlag_AnalogWDGUnderLow(ADC_Type *ADCx) +{ + WRITE_REG(ADCx->ISR, ADC_ISR_AWD_UL_Msk); +} + +/** + * @brief Get ADC Analog Watchdog Above High + * @rmtoll ISR AWD_AH FL_ADC_IsActiveFlag_AnalogWDGAboveHigh + * @param ADCx ADC instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ADC_IsActiveFlag_AnalogWDGAboveHigh(ADC_Type *ADCx) +{ + return (uint32_t)(READ_BIT(ADCx->ISR, ADC_ISR_AWD_AH_Msk) == (ADC_ISR_AWD_AH_Msk)); +} + +/** + * @brief Clear ADC Analog Watchdog Above High + * @rmtoll ISR AWD_AH FL_ADC_ClearFlag_AnalogWDGAboveHigh + * @param ADCx ADC instance + * @retval None + */ +__STATIC_INLINE void FL_ADC_ClearFlag_AnalogWDGAboveHigh(ADC_Type *ADCx) +{ + WRITE_REG(ADCx->ISR, ADC_ISR_AWD_AH_Msk); +} + +/** + * @brief Enable ADC End 0f Conversion interrupt + * @rmtoll IER EOCIE FL_ADC_EnableIT_EndOfConversion + * @param ADCx ADC instance + * @retval None + */ +__STATIC_INLINE void FL_ADC_EnableIT_EndOfConversion(ADC_Type *ADCx) +{ + SET_BIT(ADCx->IER, ADC_IER_EOCIE_Msk); +} + +/** + * @brief Disable ADC End 0f Conversion interrupt + * @rmtoll IER EOCIE FL_ADC_DisableIT_EndOfConversion + * @param ADCx ADC instance + * @retval None + */ +__STATIC_INLINE void FL_ADC_DisableIT_EndOfConversion(ADC_Type *ADCx) +{ + CLEAR_BIT(ADCx->IER, ADC_IER_EOCIE_Msk); +} + +/** + * @brief Get ADC End 0f Conversion interrupt Enable Status + * @rmtoll IER EOCIE FL_ADC_IsEnabledIT_EndOfConversion + * @param ADCx ADC instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ADC_IsEnabledIT_EndOfConversion(ADC_Type *ADCx) +{ + return (uint32_t)(READ_BIT(ADCx->IER, ADC_IER_EOCIE_Msk) == ADC_IER_EOCIE_Msk); +} + +/** + * @brief Enable ADC End Of Sequence interrupt + * @rmtoll IER EOSIE FL_ADC_EnableIT_EndOfSequence + * @param ADCx ADC instance + * @retval None + */ +__STATIC_INLINE void FL_ADC_EnableIT_EndOfSequence(ADC_Type *ADCx) +{ + SET_BIT(ADCx->IER, ADC_IER_EOSIE_Msk); +} + +/** + * @brief Disable ADC End Of Sequence interrupt + * @rmtoll IER EOSIE FL_ADC_DisableIT_EndOfSequence + * @param ADCx ADC instance + * @retval None + */ +__STATIC_INLINE void FL_ADC_DisableIT_EndOfSequence(ADC_Type *ADCx) +{ + CLEAR_BIT(ADCx->IER, ADC_IER_EOSIE_Msk); +} + +/** + * @brief Get ADC End Of Sequence interrupt Enable Status + * @rmtoll IER EOSIE FL_ADC_IsEnabledIT_EndOfSequence + * @param ADCx ADC instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ADC_IsEnabledIT_EndOfSequence(ADC_Type *ADCx) +{ + return (uint32_t)(READ_BIT(ADCx->IER, ADC_IER_EOSIE_Msk) == ADC_IER_EOSIE_Msk); +} + +/** + * @brief Enable ADC Data Overrun interrupt + * @rmtoll IER OVRIE FL_ADC_EnableIT_Overrun + * @param ADCx ADC instance + * @retval None + */ +__STATIC_INLINE void FL_ADC_EnableIT_Overrun(ADC_Type *ADCx) +{ + SET_BIT(ADCx->IER, ADC_IER_OVRIE_Msk); +} + +/** + * @brief Disable ADC Data Overrun interrupt + * @rmtoll IER OVRIE FL_ADC_DisableIT_Overrun + * @param ADCx ADC instance + * @retval None + */ +__STATIC_INLINE void FL_ADC_DisableIT_Overrun(ADC_Type *ADCx) +{ + CLEAR_BIT(ADCx->IER, ADC_IER_OVRIE_Msk); +} + +/** + * @brief Get ADC Data Overrun interrupt Enable Status + * @rmtoll IER OVRIE FL_ADC_IsEnabledIT_Overrun + * @param ADCx ADC instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ADC_IsEnabledIT_Overrun(ADC_Type *ADCx) +{ + return (uint32_t)(READ_BIT(ADCx->IER, ADC_IER_OVRIE_Msk) == ADC_IER_OVRIE_Msk); +} + +/** + * @brief Enable ADC End Of Calibration interrupt + * @rmtoll IER EOCALIE FL_ADC_EnableIT_EndOfCalibration + * @param ADCx ADC instance + * @retval None + */ +__STATIC_INLINE void FL_ADC_EnableIT_EndOfCalibration(ADC_Type *ADCx) +{ + SET_BIT(ADCx->IER, ADC_IER_EOCALIE_Msk); +} + +/** + * @brief Disable ADC End Of Calibration interrupt + * @rmtoll IER EOCALIE FL_ADC_DisableIT_EndOfCalibration + * @param ADCx ADC instance + * @retval None + */ +__STATIC_INLINE void FL_ADC_DisableIT_EndOfCalibration(ADC_Type *ADCx) +{ + CLEAR_BIT(ADCx->IER, ADC_IER_EOCALIE_Msk); +} + +/** + * @brief Get ADC End Of Calibration interrupt Enable Status + * @rmtoll IER EOCALIE FL_ADC_IsEnabledIT_EndOfCalibration + * @param ADCx ADC instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ADC_IsEnabledIT_EndOfCalibration(ADC_Type *ADCx) +{ + return (uint32_t)(READ_BIT(ADCx->IER, ADC_IER_EOCALIE_Msk) == ADC_IER_EOCALIE_Msk); +} + +/** + * @brief Enable ADC Analog Watchdog Under Low interrupt + * @rmtoll IER AWD_ULIE FL_ADC_EnableIT_AnalogWDGUnderLow + * @param ADCx ADC instance + * @retval None + */ +__STATIC_INLINE void FL_ADC_EnableIT_AnalogWDGUnderLow(ADC_Type *ADCx) +{ + SET_BIT(ADCx->IER, ADC_IER_AWD_ULIE_Msk); +} + +/** + * @brief Disable ADC Analog Watchdog Under Low interrupt + * @rmtoll IER AWD_ULIE FL_ADC_DisableIT_AnalogWDGUnderLow + * @param ADCx ADC instance + * @retval None + */ +__STATIC_INLINE void FL_ADC_DisableIT_AnalogWDGUnderLow(ADC_Type *ADCx) +{ + CLEAR_BIT(ADCx->IER, ADC_IER_AWD_ULIE_Msk); +} + +/** + * @brief Get ADC Analog Watchdog Under Low interrupt Enable Status + * @rmtoll IER AWD_ULIE FL_ADC_IsEnabledIT_AnalogWDGUnderLow + * @param ADCx ADC instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ADC_IsEnabledIT_AnalogWDGUnderLow(ADC_Type *ADCx) +{ + return (uint32_t)(READ_BIT(ADCx->IER, ADC_IER_AWD_ULIE_Msk) == ADC_IER_AWD_ULIE_Msk); +} + +/** + * @brief Enable ADC Analog Watchdog Above High interrupt + * @rmtoll IER AWD_AHIE FL_ADC_EnableIT_AnalogWDGAboveHigh + * @param ADCx ADC instance + * @retval None + */ +__STATIC_INLINE void FL_ADC_EnableIT_AnalogWDGAboveHigh(ADC_Type *ADCx) +{ + SET_BIT(ADCx->IER, ADC_IER_AWD_AHIE_Msk); +} + +/** + * @brief Disable ADC Analog Watchdog Above High interrupt + * @rmtoll IER AWD_AHIE FL_ADC_DisableIT_AnalogWDGAboveHigh + * @param ADCx ADC instance + * @retval None + */ +__STATIC_INLINE void FL_ADC_DisableIT_AnalogWDGAboveHigh(ADC_Type *ADCx) +{ + CLEAR_BIT(ADCx->IER, ADC_IER_AWD_AHIE_Msk); +} + +/** + * @brief Get ADC Analog Watchdog Above High interrupt Enable Status + * @rmtoll IER AWD_AHIE FL_ADC_IsEnabledIT_AnalogWDGAboveHigh + * @param ADCx ADC instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ADC_IsEnabledIT_AnalogWDGAboveHigh(ADC_Type *ADCx) +{ + return (uint32_t)(READ_BIT(ADCx->IER, ADC_IER_AWD_AHIE_Msk) == ADC_IER_AWD_AHIE_Msk); +} + +/** + * @brief Enable ADC + * @rmtoll CR1 ADEN FL_ADC_Enable + * @param ADCx ADC instance + * @retval None + */ +__STATIC_INLINE void FL_ADC_Enable(ADC_Type *ADCx) +{ + SET_BIT(ADCx->CR1, ADC_CR1_ADEN_Msk); +} + +/** + * @brief Disable ADC + * @rmtoll CR1 ADEN FL_ADC_Disable + * @param ADCx ADC instance + * @retval None + */ +__STATIC_INLINE void FL_ADC_Disable(ADC_Type *ADCx) +{ + CLEAR_BIT(ADCx->CR1, ADC_CR1_ADEN_Msk); +} + +/** + * @brief Get ADC Enable Status + * @rmtoll CR1 ADEN FL_ADC_IsEnabled + * @param ADCx ADC instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ADC_IsEnabled(ADC_Type *ADCx) +{ + return (uint32_t)(READ_BIT(ADCx->CR1, ADC_CR1_ADEN_Msk) == ADC_CR1_ADEN_Msk); +} + +/** + * @brief Enable ADC Sofeware Triggered Conversion + * @rmtoll CR1 SWTRIG FL_ADC_EnableSWConversion + * @param ADCx ADC instance + * @retval None + */ +__STATIC_INLINE void FL_ADC_EnableSWConversion(ADC_Type *ADCx) +{ + SET_BIT(ADCx->CR1, ADC_CR1_SWTRIG_Msk); +} + +/** + * @brief Set ADC Trigger Edge + * @rmtoll CR2 TRGCFG FL_ADC_SetTriggerEdge + * @param ADCx ADC instance + * @param edge This parameter can be one of the following values: + * @arg @ref FL_ADC_TRIGGER_EDGE_NONE + * @arg @ref FL_ADC_TRIGGER_EDGE_RISING + * @arg @ref FL_ADC_TRIGGER_EDGE_FALLING + * @arg @ref FL_ADC_TRIGGER_EDGE_BOTH + * @retval None + */ +__STATIC_INLINE void FL_ADC_SetTriggerEdge(ADC_Type *ADCx, uint32_t edge) +{ + MODIFY_REG(ADCx->CR2, ADC_CR2_TRGCFG_Msk, edge); +} + +/** + * @brief Read ADC Trigger Edge + * @rmtoll CR2 TRGCFG FL_ADC_GetTriggerEdge + * @param ADCx ADC instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_ADC_TRIGGER_EDGE_NONE + * @arg @ref FL_ADC_TRIGGER_EDGE_RISING + * @arg @ref FL_ADC_TRIGGER_EDGE_FALLING + * @arg @ref FL_ADC_TRIGGER_EDGE_BOTH + */ +__STATIC_INLINE uint32_t FL_ADC_GetTriggerEdge(ADC_Type *ADCx) +{ + return (uint32_t)(READ_BIT(ADCx->CR2, ADC_CR2_TRGCFG_Msk)); +} + +/** + * @brief Enable ADC Calibration + * @rmtoll CALR CALEN FL_ADC_EnableCalibration + * @param ADCx ADC instance + * @retval None + */ +__STATIC_INLINE void FL_ADC_EnableCalibration(ADC_Type *ADCx) +{ + SET_BIT(ADCx->CALR, ADC_CALR_CALEN_Msk); +} + +/** + * @brief Disable ADC Calibration + * @rmtoll CALR CALEN FL_ADC_DisableCalibration + * @param ADCx ADC instance + * @retval None + */ +__STATIC_INLINE void FL_ADC_DisableCalibration(ADC_Type *ADCx) +{ + CLEAR_BIT(ADCx->CALR, ADC_CALR_CALEN_Msk); +} + +/** + * @brief Get ADC Calibration Enable Status + * @rmtoll CALR CALEN FL_ADC_IsEnabledCalibration + * @param ADCx ADC instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ADC_IsEnabledCalibration(ADC_Type *ADCx) +{ + return (uint32_t)(READ_BIT(ADCx->CALR, ADC_CALR_CALEN_Msk) == ADC_CALR_CALEN_Msk); +} + +/** + * @brief Set ADC Reference Source + * @rmtoll CFGR1 PEFSEL FL_ADC_SetReferenceSource + * @param ADCx ADC instance + * @param ref This parameter can be one of the following values: + * @arg @ref FL_ADC_REF_SOURCE_VDDA + * @arg @ref FL_ADC_REF_SOURCE_VREFP + * @arg @ref FL_ADC_REF_SOURCE_VDD15 + * @retval None + */ +__STATIC_INLINE void FL_ADC_SetReferenceSource(ADC_Type *ADCx, uint32_t ref) +{ + MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_PEFSEL_Msk, ref); +} + +/** + * @brief Read ADC Reference Source + * @rmtoll CFGR1 PEFSEL FL_ADC_GetReferenceSource + * @param ADCx ADC instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_ADC_REF_SOURCE_VDDA + * @arg @ref FL_ADC_REF_SOURCE_VREFP + * @arg @ref FL_ADC_REF_SOURCE_VDD15 + */ +__STATIC_INLINE uint32_t FL_ADC_GetReferenceSource(ADC_Type *ADCx) +{ + return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC_CFGR1_PEFSEL_Msk)); +} + +/** + * @brief Set ADC Working Clock + * @rmtoll CFGR1 CLKSEL FL_ADC_SetClockSource + * @param ADCx ADC instance + * @param clock This parameter can be one of the following values: + * @arg @ref FL_ADC_CLK_SOURCE_ADCCLK + * @arg @ref FL_ADC_CLK_SOURCE_APBCLK + * @retval None + */ +__STATIC_INLINE void FL_ADC_SetClockSource(ADC_Type *ADCx, uint32_t clock) +{ + MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_CLKSEL_Msk, clock); +} + +/** + * @brief Read ADC Working Clock + * @rmtoll CFGR1 CLKSEL FL_ADC_GetClockSource + * @param ADCx ADC instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_ADC_CLK_SOURCE_ADCCLK + * @arg @ref FL_ADC_CLK_SOURCE_APBCLK + */ +__STATIC_INLINE uint32_t FL_ADC_GetClockSource(ADC_Type *ADCx) +{ + return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC_CFGR1_CLKSEL_Msk)); +} + +/** + * @brief Set ADC Output Bit Width + * @rmtoll CFGR1 BITSEL FL_ADC_SetBitWidth + * @param ADCx ADC instance + * @param bitWidth This parameter can be one of the following values: + * @arg @ref FL_ADC_BIT_WIDTH_12B + * @arg @ref FL_ADC_BIT_WIDTH_10B + * @arg @ref FL_ADC_BIT_WIDTH_8B + * @arg @ref FL_ADC_BIT_WIDTH_6B + * @retval None + */ +__STATIC_INLINE void FL_ADC_SetBitWidth(ADC_Type *ADCx, uint32_t bitWidth) +{ + MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_BITSEL_Msk, bitWidth); +} + +/** + * @brief Read ADC Output Bit Width + * @rmtoll CFGR1 BITSEL FL_ADC_GetBitWidth + * @param ADCx ADC instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_ADC_BIT_WIDTH_12B + * @arg @ref FL_ADC_BIT_WIDTH_10B + * @arg @ref FL_ADC_BIT_WIDTH_8B + * @arg @ref FL_ADC_BIT_WIDTH_6B + */ +__STATIC_INLINE uint32_t FL_ADC_GetBitWidth(ADC_Type *ADCx) +{ + return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC_CFGR1_BITSEL_Msk)); +} + +/** + * @brief Enable ADC External Conversion + * @rmtoll CFGR1 EXSOC FL_ADC_EnableExternalConversion + * @param ADCx ADC instance + * @retval None + */ +__STATIC_INLINE void FL_ADC_EnableExternalConversion(ADC_Type *ADCx) +{ + SET_BIT(ADCx->CFGR1, ADC_CFGR1_EXSOC_Msk); +} + +/** + * @brief Disable ADC External Conversion + * @rmtoll CFGR1 EXSOC FL_ADC_DisableExternalConversion + * @param ADCx ADC instance + * @retval None + */ +__STATIC_INLINE void FL_ADC_DisableExternalConversion(ADC_Type *ADCx) +{ + CLEAR_BIT(ADCx->CFGR1, ADC_CFGR1_EXSOC_Msk); +} + +/** + * @brief Get ADC External Conversion Enable Status + * @rmtoll CFGR1 EXSOC FL_ADC_IsEnabledExternalConversion + * @param ADCx ADC instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ADC_IsEnabledExternalConversion(ADC_Type *ADCx) +{ + return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC_CFGR1_EXSOC_Msk) == ADC_CFGR1_EXSOC_Msk); +} + +/** + * @brief Set ADC APBCLK Prescaler + * @rmtoll CFGR1 APBCLK_PSC FL_ADC_SetAPBPrescaler + * @param ADCx ADC instance + * @param psc This parameter can be one of the following values: + * @arg @ref FL_ADC_APBCLK_PSC_DIV1 + * @arg @ref FL_ADC_APBCLK_PSC_DIV2 + * @arg @ref FL_ADC_APBCLK_PSC_DIV4 + * @arg @ref FL_ADC_APBCLK_PSC_DIV8 + * @retval None + */ +__STATIC_INLINE void FL_ADC_SetAPBPrescaler(ADC_Type *ADCx, uint32_t psc) +{ + MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_APBCLK_PSC_Msk, psc); +} + +/** + * @brief Read ADC APBCLK Prescaler + * @rmtoll CFGR1 APBCLK_PSC FL_ADC_GetAPBPrescaler + * @param ADCx ADC instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_ADC_APBCLK_PSC_DIV1 + * @arg @ref FL_ADC_APBCLK_PSC_DIV2 + * @arg @ref FL_ADC_APBCLK_PSC_DIV4 + * @arg @ref FL_ADC_APBCLK_PSC_DIV8 + */ +__STATIC_INLINE uint32_t FL_ADC_GetAPBPrescaler(ADC_Type *ADCx) +{ + return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC_CFGR1_APBCLK_PSC_Msk)); +} + +/** + * @brief Enable ADC Buffer + * @rmtoll CFGR1 BUFEN FL_ADC_EnableBuffer + * @param ADCx ADC instance + * @retval None + */ +__STATIC_INLINE void FL_ADC_EnableBuffer(ADC_Type *ADCx) +{ + SET_BIT(ADCx->CFGR1, ADC_CFGR1_BUFEN_Msk); +} + +/** + * @brief Disable ADC Buffer + * @rmtoll CFGR1 BUFEN FL_ADC_DisableBuffer + * @param ADCx ADC instance + * @retval None + */ +__STATIC_INLINE void FL_ADC_DisableBuffer(ADC_Type *ADCx) +{ + CLEAR_BIT(ADCx->CFGR1, ADC_CFGR1_BUFEN_Msk); +} + +/** + * @brief Get ADC Buffer Enable Status + * @rmtoll CFGR1 BUFEN FL_ADC_IsEnabledBuffer + * @param ADCx ADC instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ADC_IsEnabledBuffer(ADC_Type *ADCx) +{ + return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC_CFGR1_BUFEN_Msk) == ADC_CFGR1_BUFEN_Msk); +} + +/** + * @brief Set ADC Buffer Power Mode + * @rmtoll CFGR1 BUFMOD FL_ADC_SetBufferPowerMode + * @param ADCx ADC instance + * @param mode This parameter can be one of the following values: + * @arg @ref FL_ADC_BUFF_POWER_MODE_NORMAL + * @arg @ref FL_ADC_BUFF_POWER_MODE_LOW + * @retval None + */ +__STATIC_INLINE void FL_ADC_SetBufferPowerMode(ADC_Type *ADCx, uint32_t mode) +{ + MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_BUFMOD_Msk, mode); +} + +/** + * @brief Read ADC Buffer Power Mode + * @rmtoll CFGR1 BUFMOD FL_ADC_GetBufferPowerMode + * @param ADCx ADC instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_ADC_BUFF_POWER_MODE_NORMAL + * @arg @ref FL_ADC_BUFF_POWER_MODE_LOW + */ +__STATIC_INLINE uint32_t FL_ADC_GetBufferPowerMode(ADC_Type *ADCx) +{ + return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC_CFGR1_BUFMOD_Msk)); +} + +/** + * @brief Set ADC Buffer Filter Mode + * @rmtoll CFGR1 BUFLPF FL_ADC_SetBufferFilterMode + * @param ADCx ADC instance + * @param mode This parameter can be one of the following values: + * @arg @ref FL_ADC_BUFF_FILTER_MODE_NORMAL + * @arg @ref FL_ADC_BUFF_FILTER_MODE_LOWPASS + * @retval None + */ +__STATIC_INLINE void FL_ADC_SetBufferFilterMode(ADC_Type *ADCx, uint32_t mode) +{ + MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_BUFLPF_Msk, mode); +} + +/** + * @brief Read ADC Buffer Filter Mode + * @rmtoll CFGR1 BUFLPF FL_ADC_GetBufferFilterMode + * @param ADCx ADC instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_ADC_BUFF_FILTER_MODE_NORMAL + * @arg @ref FL_ADC_BUFF_FILTER_MODE_LOWPASS + */ +__STATIC_INLINE uint32_t FL_ADC_GetBufferFilterMode(ADC_Type *ADCx) +{ + return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC_CFGR1_BUFLPF_Msk)); +} + +/** + * @brief Enable ADC Buffer Chopper + * @rmtoll CFGR1 BUFCHP_EN FL_ADC_EnableBufferChopper + * @param ADCx ADC instance + * @retval None + */ +__STATIC_INLINE void FL_ADC_EnableBufferChopper(ADC_Type *ADCx) +{ + SET_BIT(ADCx->CFGR1, ADC_CFGR1_BUFCHP_EN_Msk); +} + +/** + * @brief Disable ADC Buffer Chopper + * @rmtoll CFGR1 BUFCHP_EN FL_ADC_DisableBufferChopper + * @param ADCx ADC instance + * @retval None + */ +__STATIC_INLINE void FL_ADC_DisableBufferChopper(ADC_Type *ADCx) +{ + CLEAR_BIT(ADCx->CFGR1, ADC_CFGR1_BUFCHP_EN_Msk); +} + +/** + * @brief Get ADC Buffer Chopper Enable Status + * @rmtoll CFGR1 BUFCHP_EN FL_ADC_IsEnabledBufferChopper + * @param ADCx ADC instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ADC_IsEnabledBufferChopper(ADC_Type *ADCx) +{ + return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC_CFGR1_BUFCHP_EN_Msk) == ADC_CFGR1_BUFCHP_EN_Msk); +} + +/** + * @brief Enable ADC DMA + * @rmtoll CFGR2 DMAEN FL_ADC_EnableDMAReq + * @param ADCx ADC instance + * @retval None + */ +__STATIC_INLINE void FL_ADC_EnableDMAReq(ADC_Type *ADCx) +{ + SET_BIT(ADCx->CFGR2, ADC_CFGR2_DMAEN_Msk); +} + +/** + * @brief Disable ADC DMA + * @rmtoll CFGR2 DMAEN FL_ADC_DisableDMAReq + * @param ADCx ADC instance + * @retval None + */ +__STATIC_INLINE void FL_ADC_DisableDMAReq(ADC_Type *ADCx) +{ + CLEAR_BIT(ADCx->CFGR2, ADC_CFGR2_DMAEN_Msk); +} + +/** + * @brief Get ADC DMA Enable Status + * @rmtoll CFGR2 DMAEN FL_ADC_IsEnabledDMAReq + * @param ADCx ADC instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ADC_IsEnabledDMAReq(ADC_Type *ADCx) +{ + return (uint32_t)(READ_BIT(ADCx->CFGR2, ADC_CFGR2_DMAEN_Msk) == ADC_CFGR2_DMAEN_Msk); +} + +/** + * @brief Set ADC Channel Scan Direction + * @rmtoll CFGR2 SCANDIR FL_ADC_SetSequenceScanDirection + * @param ADCx ADC instance + * @param dir This parameter can be one of the following values: + * @arg @ref FL_ADC_SEQ_SCAN_DIR_FORWARD + * @arg @ref FL_ADC_SEQ_SCAN_DIR_BACKWARD + * @retval None + */ +__STATIC_INLINE void FL_ADC_SetSequenceScanDirection(ADC_Type *ADCx, uint32_t dir) +{ + MODIFY_REG(ADCx->CFGR2, ADC_CFGR2_SCANDIR_Msk, dir); +} + +/** + * @brief Get ADC Channel Scan Direction + * @rmtoll CFGR2 SCANDIR FL_ADC_GetSequenceScanDirection + * @param ADCx ADC instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_ADC_SEQ_SCAN_DIR_FORWARD + * @arg @ref FL_ADC_SEQ_SCAN_DIR_BACKWARD + */ +__STATIC_INLINE uint32_t FL_ADC_GetSequenceScanDirection(ADC_Type *ADCx) +{ + return (uint32_t)(READ_BIT(ADCx->CFGR2, ADC_CFGR2_SCANDIR_Msk)); +} + +/** + * @brief Set ADC Trigger Source + * @rmtoll CFGR2 EXTS FL_ADC_SetTriggerSource + * @param ADCx ADC instance + * @param source This parameter can be one of the following values: + * @arg @ref FL_ADC_TRGI_LUT0 + * @arg @ref FL_ADC_TRGI_LUT1 + * @arg @ref FL_ADC_TRGI_LUT2 + * @arg @ref FL_ADC_TRGI_ATIM + * @arg @ref FL_ADC_TRGI_GPTIM1 + * @arg @ref FL_ADC_TRGI_GPTIM2 + * @arg @ref FL_ADC_TRGI_BSTIM16 + * @arg @ref FL_ADC_TRGI_LPTIM16 + * @arg @ref FL_ADC_TRGI_COMP1 + * @arg @ref FL_ADC_TRGI_COMP2 + * @arg @ref FL_ADC_TRGI_RTCA + * @arg @ref FL_ADC_TRGI_LUT3 + * @arg @ref FL_ADC_TRGI_GPTIM0 + * @arg @ref FL_ADC_TRGI_COMP3 + * @retval None + */ +__STATIC_INLINE void FL_ADC_SetTriggerSource(ADC_Type *ADCx, uint32_t source) +{ + MODIFY_REG(ADCx->CFGR2, ADC_CFGR2_EXTS_Msk, source); +} + +/** + * @brief Get ADC Trigger Source + * @rmtoll CFGR2 EXTS FL_ADC_GetTriggerSource + * @param ADCx ADC instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_ADC_TRGI_LUT0 + * @arg @ref FL_ADC_TRGI_LUT1 + * @arg @ref FL_ADC_TRGI_LUT2 + * @arg @ref FL_ADC_TRGI_ATIM + * @arg @ref FL_ADC_TRGI_GPTIM1 + * @arg @ref FL_ADC_TRGI_GPTIM2 + * @arg @ref FL_ADC_TRGI_BSTIM16 + * @arg @ref FL_ADC_TRGI_LPTIM16 + * @arg @ref FL_ADC_TRGI_COMP1 + * @arg @ref FL_ADC_TRGI_COMP2 + * @arg @ref FL_ADC_TRGI_RTCA + * @arg @ref FL_ADC_TRGI_LUT3 + * @arg @ref FL_ADC_TRGI_GPTIM0 + * @arg @ref FL_ADC_TRGI_COMP3 + */ +__STATIC_INLINE uint32_t FL_ADC_GetTriggerSource(ADC_Type *ADCx) +{ + return (uint32_t)(READ_BIT(ADCx->CFGR2, ADC_CFGR2_EXTS_Msk)); +} + +/** + * @brief Enable ADC Overrun Mode + * @rmtoll CFGR2 OVRM FL_ADC_EnableOverrunMode + * @param ADCx ADC instance + * @retval None + */ +__STATIC_INLINE void FL_ADC_EnableOverrunMode(ADC_Type *ADCx) +{ + SET_BIT(ADCx->CFGR2, ADC_CFGR2_OVRM_Msk); +} + +/** + * @brief Disable ADC Overrun Mode + * @rmtoll CFGR2 OVRM FL_ADC_DisableOverrunMode + * @param ADCx ADC instance + * @retval None + */ +__STATIC_INLINE void FL_ADC_DisableOverrunMode(ADC_Type *ADCx) +{ + CLEAR_BIT(ADCx->CFGR2, ADC_CFGR2_OVRM_Msk); +} + +/** + * @brief Get ADC Overrun Mode Enable Status + * @rmtoll CFGR2 OVRM FL_ADC_IsEnabledOverrunMode + * @param ADCx ADC instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ADC_IsEnabledOverrunMode(ADC_Type *ADCx) +{ + return (uint32_t)(READ_BIT(ADCx->CFGR2, ADC_CFGR2_OVRM_Msk) == ADC_CFGR2_OVRM_Msk); +} + +/** + * @brief Set ADC Conversion Mode + * @rmtoll CFGR2 CONT FL_ADC_SetConversionMode + * @param ADCx ADC instance + * @param mode This parameter can be one of the following values: + * @arg @ref FL_ADC_CONV_MODE_SINGLE + * @arg @ref FL_ADC_CONV_MODE_CONTINUOUS + * @retval None + */ +__STATIC_INLINE void FL_ADC_SetConversionMode(ADC_Type *ADCx, uint32_t mode) +{ + MODIFY_REG(ADCx->CFGR2, ADC_CFGR2_CONT_Msk, mode); +} + +/** + * @brief Get ADC Conversion Mode + * @rmtoll CFGR2 CONT FL_ADC_GetConversionMode + * @param ADCx ADC instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_ADC_CONV_MODE_SINGLE + * @arg @ref FL_ADC_CONV_MODE_CONTINUOUS + */ +__STATIC_INLINE uint32_t FL_ADC_GetConversionMode(ADC_Type *ADCx) +{ + return (uint32_t)(READ_BIT(ADCx->CFGR2, ADC_CFGR2_CONT_Msk)); +} + +/** + * @brief Enable ADC Wait Mode + * @rmtoll CFGR2 WAIT FL_ADC_EnableWaitMode + * @param ADCx ADC instance + * @retval None + */ +__STATIC_INLINE void FL_ADC_EnableWaitMode(ADC_Type *ADCx) +{ + SET_BIT(ADCx->CFGR2, ADC_CFGR2_WAIT_Msk); +} + +/** + * @brief Disable ADC Wait Mode + * @rmtoll CFGR2 WAIT FL_ADC_DisableWaitMode + * @param ADCx ADC instance + * @retval None + */ +__STATIC_INLINE void FL_ADC_DisableWaitMode(ADC_Type *ADCx) +{ + CLEAR_BIT(ADCx->CFGR2, ADC_CFGR2_WAIT_Msk); +} + +/** + * @brief Get ADC Wait Mode Enable Status + * @rmtoll CFGR2 WAIT FL_ADC_IsEnabledWaitMode + * @param ADCx ADC instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ADC_IsEnabledWaitMode(ADC_Type *ADCx) +{ + return (uint32_t)(READ_BIT(ADCx->CFGR2, ADC_CFGR2_WAIT_Msk) == ADC_CFGR2_WAIT_Msk); +} + +/** + * @brief Set ADC Single Conversion Mode + * @rmtoll CFGR2 SEMI FL_ADC_SetSingleConversionAutoMode + * @param ADCx ADC instance + * @param mode This parameter can be one of the following values: + * @arg @ref FL_ADC_SINGLE_CONV_MODE_AUTO + * @arg @ref FL_ADC_SINGLE_CONV_MODE_SEMIAUTO + * @retval None + */ +__STATIC_INLINE void FL_ADC_SetSingleConversionAutoMode(ADC_Type *ADCx, uint32_t mode) +{ + MODIFY_REG(ADCx->CFGR2, ADC_CFGR2_SEMI_Msk, mode); +} + +/** + * @brief Get ADC Single Conversion Mode + * @rmtoll CFGR2 SEMI FL_ADC_GetSingleConversionAutoMode + * @param ADCx ADC instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_ADC_SINGLE_CONV_MODE_AUTO + * @arg @ref FL_ADC_SINGLE_CONV_MODE_SEMIAUTO + */ +__STATIC_INLINE uint32_t FL_ADC_GetSingleConversionAutoMode(ADC_Type *ADCx) +{ + return (uint32_t)(READ_BIT(ADCx->CFGR2, ADC_CFGR2_SEMI_Msk)); +} + +/** + * @brief Enable ADC Trigger Filter + * @rmtoll CFGR2 IOTRFEN FL_ADC_EnableTriggerFilter + * @param ADCx ADC instance + * @retval None + */ +__STATIC_INLINE void FL_ADC_EnableTriggerFilter(ADC_Type *ADCx) +{ + SET_BIT(ADCx->CFGR2, ADC_CFGR2_IOTRFEN_Msk); +} + +/** + * @brief Disable ADC Trigger Filter + * @rmtoll CFGR2 IOTRFEN FL_ADC_DisableTriggerFilter + * @param ADCx ADC instance + * @retval None + */ +__STATIC_INLINE void FL_ADC_DisableTriggerFilter(ADC_Type *ADCx) +{ + CLEAR_BIT(ADCx->CFGR2, ADC_CFGR2_IOTRFEN_Msk); +} + +/** + * @brief Get ADC Trigger Filter Enable Status + * @rmtoll CFGR2 IOTRFEN FL_ADC_IsEnabledTriggerFilter + * @param ADCx ADC instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ADC_IsEnabledTriggerFilter(ADC_Type *ADCx) +{ + return (uint32_t)(READ_BIT(ADCx->CFGR2, ADC_CFGR2_IOTRFEN_Msk) == ADC_CFGR2_IOTRFEN_Msk); +} + +/** + * @brief Enable ADC OverSampling + * @rmtoll CFGR2 OVSEN FL_ADC_EnableOverSampling + * @param ADCx ADC instance + * @retval None + */ +__STATIC_INLINE void FL_ADC_EnableOverSampling(ADC_Type *ADCx) +{ + SET_BIT(ADCx->CFGR2, ADC_CFGR2_OVSEN_Msk); +} + +/** + * @brief Disable ADC OverSampling + * @rmtoll CFGR2 OVSEN FL_ADC_DisableOverSampling + * @param ADCx ADC instance + * @retval None + */ +__STATIC_INLINE void FL_ADC_DisableOverSampling(ADC_Type *ADCx) +{ + CLEAR_BIT(ADCx->CFGR2, ADC_CFGR2_OVSEN_Msk); +} + +/** + * @brief Get ADC OverSampling Enable Status + * @rmtoll CFGR2 OVSEN FL_ADC_IsEnabledOverSampling + * @param ADCx ADC instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ADC_IsEnabledOverSampling(ADC_Type *ADCx) +{ + return (uint32_t)(READ_BIT(ADCx->CFGR2, ADC_CFGR2_OVSEN_Msk) == ADC_CFGR2_OVSEN_Msk); +} + +/** + * @brief Set ADC OverSampling Multiplier + * @rmtoll CFGR2 OVSR FL_ADC_SetOverSamplingMultiplier + * @param ADCx ADC instance + * @param mul This parameter can be one of the following values: + * @arg @ref FL_ADC_OVERSAMPLING_MUL_2X + * @arg @ref FL_ADC_OVERSAMPLING_MUL_4X + * @arg @ref FL_ADC_OVERSAMPLING_MUL_8X + * @arg @ref FL_ADC_OVERSAMPLING_MUL_16X + * @arg @ref FL_ADC_OVERSAMPLING_MUL_32X + * @arg @ref FL_ADC_OVERSAMPLING_MUL_64X + * @arg @ref FL_ADC_OVERSAMPLING_MUL_128X + * @arg @ref FL_ADC_OVERSAMPLING_MUL_256X + * @retval None + */ +__STATIC_INLINE void FL_ADC_SetOverSamplingMultiplier(ADC_Type *ADCx, uint32_t mul) +{ + MODIFY_REG(ADCx->CFGR2, ADC_CFGR2_OVSR_Msk, mul); +} + +/** + * @brief Read ADC OverSampling Multiplier + * @rmtoll CFGR2 OVSR FL_ADC_GetOverSamplingMultiplier + * @param ADCx ADC instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_ADC_OVERSAMPLING_MUL_2X + * @arg @ref FL_ADC_OVERSAMPLING_MUL_4X + * @arg @ref FL_ADC_OVERSAMPLING_MUL_8X + * @arg @ref FL_ADC_OVERSAMPLING_MUL_16X + * @arg @ref FL_ADC_OVERSAMPLING_MUL_32X + * @arg @ref FL_ADC_OVERSAMPLING_MUL_64X + * @arg @ref FL_ADC_OVERSAMPLING_MUL_128X + * @arg @ref FL_ADC_OVERSAMPLING_MUL_256X + */ +__STATIC_INLINE uint32_t FL_ADC_GetOverSamplingMultiplier(ADC_Type *ADCx) +{ + return (uint32_t)(READ_BIT(ADCx->CFGR2, ADC_CFGR2_OVSR_Msk)); +} + +/** + * @brief Set ADC OverSampling Shift + * @rmtoll CFGR2 OVSS FL_ADC_SetOverSamplingShift + * @param ADCx ADC instance + * @param shift This parameter can be one of the following values: + * @arg @ref FL_ADC_OVERSAMPLING_SHIFT_0B + * @arg @ref FL_ADC_OVERSAMPLING_SHIFT_1B + * @arg @ref FL_ADC_OVERSAMPLING_SHIFT_2B + * @arg @ref FL_ADC_OVERSAMPLING_SHIFT_3B + * @arg @ref FL_ADC_OVERSAMPLING_SHIFT_4B + * @arg @ref FL_ADC_OVERSAMPLING_SHIFT_5B + * @arg @ref FL_ADC_OVERSAMPLING_SHIFT_6B + * @arg @ref FL_ADC_OVERSAMPLING_SHIFT_7B + * @arg @ref FL_ADC_OVERSAMPLING_SHIFT_8B + * @retval None + */ +__STATIC_INLINE void FL_ADC_SetOverSamplingShift(ADC_Type *ADCx, uint32_t shift) +{ + MODIFY_REG(ADCx->CFGR2, ADC_CFGR2_OVSS_Msk, shift); +} + +/** + * @brief Read ADC OverSampling Shift + * @rmtoll CFGR2 OVSS FL_ADC_GetOverSamplingShift + * @param ADCx ADC instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_ADC_OVERSAMPLING_SHIFT_0B + * @arg @ref FL_ADC_OVERSAMPLING_SHIFT_1B + * @arg @ref FL_ADC_OVERSAMPLING_SHIFT_2B + * @arg @ref FL_ADC_OVERSAMPLING_SHIFT_3B + * @arg @ref FL_ADC_OVERSAMPLING_SHIFT_4B + * @arg @ref FL_ADC_OVERSAMPLING_SHIFT_5B + * @arg @ref FL_ADC_OVERSAMPLING_SHIFT_6B + * @arg @ref FL_ADC_OVERSAMPLING_SHIFT_7B + * @arg @ref FL_ADC_OVERSAMPLING_SHIFT_8B + */ +__STATIC_INLINE uint32_t FL_ADC_GetOverSamplingShift(ADC_Type *ADCx) +{ + return (uint32_t)(READ_BIT(ADCx->CFGR2, ADC_CFGR2_OVSS_Msk)); +} + +/** + * @brief Enable ADC Analog WDG + * @rmtoll CFGR2 AWDEN FL_ADC_EnableAnalogWDG + * @param ADCx ADC instance + * @retval None + */ +__STATIC_INLINE void FL_ADC_EnableAnalogWDG(ADC_Type *ADCx) +{ + SET_BIT(ADCx->CFGR2, ADC_CFGR2_AWDEN_Msk); +} + +/** + * @brief Disable ADC Analog WDG + * @rmtoll CFGR2 AWDEN FL_ADC_DisableAnalogWDG + * @param ADCx ADC instance + * @retval None + */ +__STATIC_INLINE void FL_ADC_DisableAnalogWDG(ADC_Type *ADCx) +{ + CLEAR_BIT(ADCx->CFGR2, ADC_CFGR2_AWDEN_Msk); +} + +/** + * @brief Get ADC Analog WDG Enable Status + * @rmtoll CFGR2 AWDEN FL_ADC_IsEnabledAnalogWDG + * @param ADCx ADC instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ADC_IsEnabledAnalogWDG(ADC_Type *ADCx) +{ + return (uint32_t)(READ_BIT(ADCx->CFGR2, ADC_CFGR2_AWDEN_Msk) == ADC_CFGR2_AWDEN_Msk); +} + +/** + * @brief Set ADC Analog WDG Monitor Mode + * @rmtoll CFGR2 AWDSC FL_ADC_SetAnalogWDGMonitorMode + * @param ADCx ADC instance + * @param mode This parameter can be one of the following values: + * @arg @ref FL_ADC_AWDG_ALL_CHANNEL + * @arg @ref FL_ADC_AWDG_SINGLE_CHANNEL + * @retval None + */ +__STATIC_INLINE void FL_ADC_SetAnalogWDGMonitorMode(ADC_Type *ADCx, uint32_t mode) +{ + MODIFY_REG(ADCx->CFGR2, ADC_CFGR2_AWDSC_Msk, mode); +} + +/** + * @brief Read ADC Analog WDG Monitor Mode + * @rmtoll CFGR2 AWDSC FL_ADC_GetAnalogWDGMonitorMode + * @param ADCx ADC instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_ADC_AWDG_ALL_CHANNEL + * @arg @ref FL_ADC_AWDG_SINGLE_CHANNEL + */ +__STATIC_INLINE uint32_t FL_ADC_GetAnalogWDGMonitorMode(ADC_Type *ADCx) +{ + return (uint32_t)(READ_BIT(ADCx->CFGR2, ADC_CFGR2_AWDSC_Msk)); +} + +/** + * @brief Set ADC Analog WDG Monitor Channel + * @rmtoll CFGR2 AWDCH FL_ADC_SetAnalogWDGMonitorChannel + * @param ADCx ADC instance + * @param monitorChannel This parameter can be one of the following values: + * @arg @ref FL_ADC_AWDG_CH0 + * @arg @ref FL_ADC_AWDG_CH1 + * @arg @ref FL_ADC_AWDG_CH2 + * @arg @ref FL_ADC_AWDG_CH3 + * @arg @ref FL_ADC_AWDG_CH4 + * @arg @ref FL_ADC_AWDG_CH5 + * @arg @ref FL_ADC_AWDG_CH6 + * @arg @ref FL_ADC_AWDG_CH7 + * @arg @ref FL_ADC_AWDG_CH8 + * @arg @ref FL_ADC_AWDG_CH9 + * @arg @ref FL_ADC_AWDG_CH10 + * @arg @ref FL_ADC_AWDG_CH11 + * @arg @ref FL_ADC_AWDG_CH12 + * @arg @ref FL_ADC_AWDG_CH13 + * @arg @ref FL_ADC_AWDG_CH14 + * @arg @ref FL_ADC_AWDG_CH15 + * @arg @ref FL_ADC_AWDG_CH16 + * @arg @ref FL_ADC_AWDG_CH17 + * @arg @ref FL_ADC_AWDG_CH18 + * @arg @ref FL_ADC_AWDG_CH19 + * @retval None + */ +__STATIC_INLINE void FL_ADC_SetAnalogWDGMonitorChannel(ADC_Type *ADCx, uint32_t monitorChannel) +{ + MODIFY_REG(ADCx->CFGR2, ADC_CFGR2_AWDCH_Msk, monitorChannel); +} + +/** + * @brief Read ADC Analog WDG Monitor Channel + * @rmtoll CFGR2 AWDCH FL_ADC_GetAnalogWDGMonitorChannel + * @param ADCx ADC instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_ADC_AWDG_CH0 + * @arg @ref FL_ADC_AWDG_CH1 + * @arg @ref FL_ADC_AWDG_CH2 + * @arg @ref FL_ADC_AWDG_CH3 + * @arg @ref FL_ADC_AWDG_CH4 + * @arg @ref FL_ADC_AWDG_CH5 + * @arg @ref FL_ADC_AWDG_CH6 + * @arg @ref FL_ADC_AWDG_CH7 + * @arg @ref FL_ADC_AWDG_CH8 + * @arg @ref FL_ADC_AWDG_CH9 + * @arg @ref FL_ADC_AWDG_CH10 + * @arg @ref FL_ADC_AWDG_CH11 + * @arg @ref FL_ADC_AWDG_CH12 + * @arg @ref FL_ADC_AWDG_CH13 + * @arg @ref FL_ADC_AWDG_CH14 + * @arg @ref FL_ADC_AWDG_CH15 + * @arg @ref FL_ADC_AWDG_CH16 + * @arg @ref FL_ADC_AWDG_CH17 + * @arg @ref FL_ADC_AWDG_CH18 + * @arg @ref FL_ADC_AWDG_CH19 + */ +__STATIC_INLINE uint32_t FL_ADC_GetAnalogWDGMonitorChannel(ADC_Type *ADCx) +{ + return (uint32_t)(READ_BIT(ADCx->CFGR2, ADC_CFGR2_AWDCH_Msk)); +} + +/** + * @brief Set ADC Slow Channel Sampling Time + * @rmtoll SMTR SMTS1 FL_ADC_SetSlowChannelSamplingTime + * @param ADCx ADC instance + * @param time This parameter can be one of the following values: + * @arg @ref FL_ADC_SLOW_CH_SAMPLING_TIME_2_ADCCLK + * @arg @ref FL_ADC_SLOW_CH_SAMPLING_TIME_4_ADCCLK + * @arg @ref FL_ADC_SLOW_CH_SAMPLING_TIME_8_ADCCLK + * @arg @ref FL_ADC_SLOW_CH_SAMPLING_TIME_12_ADCCLK + * @arg @ref FL_ADC_SLOW_CH_SAMPLING_TIME_16_ADCCLK + * @arg @ref FL_ADC_SLOW_CH_SAMPLING_TIME_32_ADCCLK + * @arg @ref FL_ADC_SLOW_CH_SAMPLING_TIME_64_ADCCLK + * @arg @ref FL_ADC_SLOW_CH_SAMPLING_TIME_80_ADCCLK + * @arg @ref FL_ADC_SLOW_CH_SAMPLING_TIME_96_ADCCLK + * @arg @ref FL_ADC_SLOW_CH_SAMPLING_TIME_128_ADCCLK + * @arg @ref FL_ADC_SLOW_CH_SAMPLING_TIME_160_ADCCLK + * @arg @ref FL_ADC_SLOW_CH_SAMPLING_TIME_192_ADCCLK + * @arg @ref FL_ADC_SLOW_CH_SAMPLING_TIME_256_ADCCLK + * @arg @ref FL_ADC_SLOW_CH_SAMPLING_TIME_320_ADCCLK + * @arg @ref FL_ADC_SLOW_CH_SAMPLING_TIME_384_ADCCLK + * @arg @ref FL_ADC_SLOW_CH_SAMPLING_TIME_512_ADCCLK + * @retval None + */ +__STATIC_INLINE void FL_ADC_SetSlowChannelSamplingTime(ADC_Type *ADCx, uint32_t time) +{ + MODIFY_REG(ADCx->SMTR, ADC_SMTR_SMTS1_Msk, time); +} + +/** + * @brief Read ADC Slow Channel Sampling Time + * @rmtoll SMTR SMTS1 FL_ADC_GetSlowChannelSamplingTime + * @param ADCx ADC instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_ADC_SLOW_CH_SAMPLING_TIME_2_ADCCLK + * @arg @ref FL_ADC_SLOW_CH_SAMPLING_TIME_4_ADCCLK + * @arg @ref FL_ADC_SLOW_CH_SAMPLING_TIME_8_ADCCLK + * @arg @ref FL_ADC_SLOW_CH_SAMPLING_TIME_12_ADCCLK + * @arg @ref FL_ADC_SLOW_CH_SAMPLING_TIME_16_ADCCLK + * @arg @ref FL_ADC_SLOW_CH_SAMPLING_TIME_32_ADCCLK + * @arg @ref FL_ADC_SLOW_CH_SAMPLING_TIME_64_ADCCLK + * @arg @ref FL_ADC_SLOW_CH_SAMPLING_TIME_80_ADCCLK + * @arg @ref FL_ADC_SLOW_CH_SAMPLING_TIME_96_ADCCLK + * @arg @ref FL_ADC_SLOW_CH_SAMPLING_TIME_128_ADCCLK + * @arg @ref FL_ADC_SLOW_CH_SAMPLING_TIME_160_ADCCLK + * @arg @ref FL_ADC_SLOW_CH_SAMPLING_TIME_192_ADCCLK + * @arg @ref FL_ADC_SLOW_CH_SAMPLING_TIME_256_ADCCLK + * @arg @ref FL_ADC_SLOW_CH_SAMPLING_TIME_320_ADCCLK + * @arg @ref FL_ADC_SLOW_CH_SAMPLING_TIME_384_ADCCLK + * @arg @ref FL_ADC_SLOW_CH_SAMPLING_TIME_512_ADCCLK + */ +__STATIC_INLINE uint32_t FL_ADC_GetSlowChannelSamplingTime(ADC_Type *ADCx) +{ + return (uint32_t)(READ_BIT(ADCx->SMTR, ADC_SMTR_SMTS1_Msk)); +} + +/** + * @brief Set ADC Fast Channel Sampling Time + * @rmtoll SMTR SMTS2 FL_ADC_SetFastChannelSamplingTime + * @param ADCx ADC instance + * @param time This parameter can be one of the following values: + * @arg @ref FL_ADC_FAST_CH_SAMPLING_TIME_2_ADCCLK + * @arg @ref FL_ADC_FAST_CH_SAMPLING_TIME_4_ADCCLK + * @arg @ref FL_ADC_FAST_CH_SAMPLING_TIME_8_ADCCLK + * @arg @ref FL_ADC_FAST_CH_SAMPLING_TIME_12_ADCCLK + * @arg @ref FL_ADC_FAST_CH_SAMPLING_TIME_16_ADCCLK + * @arg @ref FL_ADC_FAST_CH_SAMPLING_TIME_32_ADCCLK + * @arg @ref FL_ADC_FAST_CH_SAMPLING_TIME_64_ADCCLK + * @arg @ref FL_ADC_FAST_CH_SAMPLING_TIME_80_ADCCLK + * @arg @ref FL_ADC_FAST_CH_SAMPLING_TIME_96_ADCCLK + * @arg @ref FL_ADC_FAST_CH_SAMPLING_TIME_128_ADCCLK + * @arg @ref FL_ADC_FAST_CH_SAMPLING_TIME_160_ADCCLK + * @arg @ref FL_ADC_FAST_CH_SAMPLING_TIME_192_ADCCLK + * @arg @ref FL_ADC_FAST_CH_SAMPLING_TIME_256_ADCCLK + * @arg @ref FL_ADC_FAST_CH_SAMPLING_TIME_320_ADCCLK + * @arg @ref FL_ADC_FAST_CH_SAMPLING_TIME_384_ADCCLK + * @arg @ref FL_ADC_FAST_CH_SAMPLING_TIME_512_ADCCLK + * @retval None + */ +__STATIC_INLINE void FL_ADC_SetFastChannelSamplingTime(ADC_Type *ADCx, uint32_t time) +{ + MODIFY_REG(ADCx->SMTR, ADC_SMTR_SMTS2_Msk, time); +} + +/** + * @brief Read ADC Fast Channel Sampling Time + * @rmtoll SMTR SMTS2 FL_ADC_GetFastChannelSamplingTime + * @param ADCx ADC instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_ADC_FAST_CH_SAMPLING_TIME_2_ADCCLK + * @arg @ref FL_ADC_FAST_CH_SAMPLING_TIME_4_ADCCLK + * @arg @ref FL_ADC_FAST_CH_SAMPLING_TIME_8_ADCCLK + * @arg @ref FL_ADC_FAST_CH_SAMPLING_TIME_12_ADCCLK + * @arg @ref FL_ADC_FAST_CH_SAMPLING_TIME_16_ADCCLK + * @arg @ref FL_ADC_FAST_CH_SAMPLING_TIME_32_ADCCLK + * @arg @ref FL_ADC_FAST_CH_SAMPLING_TIME_64_ADCCLK + * @arg @ref FL_ADC_FAST_CH_SAMPLING_TIME_80_ADCCLK + * @arg @ref FL_ADC_FAST_CH_SAMPLING_TIME_96_ADCCLK + * @arg @ref FL_ADC_FAST_CH_SAMPLING_TIME_128_ADCCLK + * @arg @ref FL_ADC_FAST_CH_SAMPLING_TIME_160_ADCCLK + * @arg @ref FL_ADC_FAST_CH_SAMPLING_TIME_192_ADCCLK + * @arg @ref FL_ADC_FAST_CH_SAMPLING_TIME_256_ADCCLK + * @arg @ref FL_ADC_FAST_CH_SAMPLING_TIME_320_ADCCLK + * @arg @ref FL_ADC_FAST_CH_SAMPLING_TIME_384_ADCCLK + * @arg @ref FL_ADC_FAST_CH_SAMPLING_TIME_512_ADCCLK + */ +__STATIC_INLINE uint32_t FL_ADC_GetFastChannelSamplingTime(ADC_Type *ADCx) +{ + return (uint32_t)(READ_BIT(ADCx->SMTR, ADC_SMTR_SMTS2_Msk)); +} + +/** + * @brief Enable ADC Channel + * @rmtoll CHER FL_ADC_EnableSequencerChannel + * @param ADCx ADC instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_ADC_EXTERNAL_CH0 + * @arg @ref FL_ADC_EXTERNAL_CH1 + * @arg @ref FL_ADC_EXTERNAL_CH2 + * @arg @ref FL_ADC_EXTERNAL_CH3 + * @arg @ref FL_ADC_EXTERNAL_CH4 + * @arg @ref FL_ADC_EXTERNAL_CH5 + * @arg @ref FL_ADC_EXTERNAL_CH6 + * @arg @ref FL_ADC_EXTERNAL_CH7 + * @arg @ref FL_ADC_EXTERNAL_CH8 + * @arg @ref FL_ADC_EXTERNAL_CH9 + * @arg @ref FL_ADC_EXTERNAL_CH10 + * @arg @ref FL_ADC_EXTERNAL_CH11 + * @arg @ref FL_ADC_EXTERNAL_CH12 + * @arg @ref FL_ADC_EXTERNAL_CH13 + * @arg @ref FL_ADC_EXTERNAL_CH14 + * @arg @ref FL_ADC_EXTERNAL_CH15 + * @arg @ref FL_ADC_EXTERNAL_CH16 + * @arg @ref FL_ADC_EXTERNAL_CH17 + * @arg @ref FL_ADC_EXTERNAL_CH18 + * @arg @ref FL_ADC_EXTERNAL_CH19 + * @arg @ref FL_ADC_INTERNAL_VREF1P2 + * @arg @ref FL_ADC_INTERNAL_TS + * @arg @ref FL_ADC_INTERNAL_AVREF + * @arg @ref FL_ADC_INTERNAL_VBAT_DIV3 + * @arg @ref FL_ADC_INTERNAL_VDD_DIV3 + * @arg @ref FL_ADC_INTERNAL_DAC + * @retval None + */ +__STATIC_INLINE void FL_ADC_EnableSequencerChannel(ADC_Type *ADCx, uint32_t channel) +{ + SET_BIT(ADCx->CHER, ((channel & 0x7fffffff) << 0x0U)); +} + +/** + * @brief Disable ADC Channel + * @rmtoll CHER FL_ADC_DisableSequencerChannel + * @param ADCx ADC instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_ADC_EXTERNAL_CH0 + * @arg @ref FL_ADC_EXTERNAL_CH1 + * @arg @ref FL_ADC_EXTERNAL_CH2 + * @arg @ref FL_ADC_EXTERNAL_CH3 + * @arg @ref FL_ADC_EXTERNAL_CH4 + * @arg @ref FL_ADC_EXTERNAL_CH5 + * @arg @ref FL_ADC_EXTERNAL_CH6 + * @arg @ref FL_ADC_EXTERNAL_CH7 + * @arg @ref FL_ADC_EXTERNAL_CH8 + * @arg @ref FL_ADC_EXTERNAL_CH9 + * @arg @ref FL_ADC_EXTERNAL_CH10 + * @arg @ref FL_ADC_EXTERNAL_CH11 + * @arg @ref FL_ADC_EXTERNAL_CH12 + * @arg @ref FL_ADC_EXTERNAL_CH13 + * @arg @ref FL_ADC_EXTERNAL_CH14 + * @arg @ref FL_ADC_EXTERNAL_CH15 + * @arg @ref FL_ADC_EXTERNAL_CH16 + * @arg @ref FL_ADC_EXTERNAL_CH17 + * @arg @ref FL_ADC_EXTERNAL_CH18 + * @arg @ref FL_ADC_EXTERNAL_CH19 + * @arg @ref FL_ADC_INTERNAL_VREF1P2 + * @arg @ref FL_ADC_INTERNAL_TS + * @arg @ref FL_ADC_INTERNAL_AVREF + * @arg @ref FL_ADC_INTERNAL_VBAT_DIV3 + * @arg @ref FL_ADC_INTERNAL_VDD_DIV3 + * @arg @ref FL_ADC_INTERNAL_DAC + * @retval None + */ +__STATIC_INLINE void FL_ADC_DisableSequencerChannel(ADC_Type *ADCx, uint32_t channel) +{ + CLEAR_BIT(ADCx->CHER, ((channel & 0x7fffffff) << 0x0U)); +} + +/** + * @brief Get ADC Channel Enable Status + * @rmtoll CHER FL_ADC_IsEnabledSequencerChannel + * @param ADCx ADC instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_ADC_EXTERNAL_CH0 + * @arg @ref FL_ADC_EXTERNAL_CH1 + * @arg @ref FL_ADC_EXTERNAL_CH2 + * @arg @ref FL_ADC_EXTERNAL_CH3 + * @arg @ref FL_ADC_EXTERNAL_CH4 + * @arg @ref FL_ADC_EXTERNAL_CH5 + * @arg @ref FL_ADC_EXTERNAL_CH6 + * @arg @ref FL_ADC_EXTERNAL_CH7 + * @arg @ref FL_ADC_EXTERNAL_CH8 + * @arg @ref FL_ADC_EXTERNAL_CH9 + * @arg @ref FL_ADC_EXTERNAL_CH10 + * @arg @ref FL_ADC_EXTERNAL_CH11 + * @arg @ref FL_ADC_EXTERNAL_CH12 + * @arg @ref FL_ADC_EXTERNAL_CH13 + * @arg @ref FL_ADC_EXTERNAL_CH14 + * @arg @ref FL_ADC_EXTERNAL_CH15 + * @arg @ref FL_ADC_EXTERNAL_CH16 + * @arg @ref FL_ADC_EXTERNAL_CH17 + * @arg @ref FL_ADC_EXTERNAL_CH18 + * @arg @ref FL_ADC_EXTERNAL_CH19 + * @arg @ref FL_ADC_INTERNAL_VREF1P2 + * @arg @ref FL_ADC_INTERNAL_TS + * @arg @ref FL_ADC_INTERNAL_AVREF + * @arg @ref FL_ADC_INTERNAL_VBAT_DIV3 + * @arg @ref FL_ADC_INTERNAL_VDD_DIV3 + * @arg @ref FL_ADC_INTERNAL_DAC + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ADC_IsEnabledSequencerChannel(ADC_Type *ADCx, uint32_t channel) +{ + return (uint32_t)(READ_BIT(ADCx->CHER, ((channel & 0x7fffffff) << 0x0U)) == ((channel & 0x7fffffff) << 0x0U)); +} + +/** + * @brief Enable ADC Differential Channel + * @rmtoll DCR FL_ADC_EnableDifferentialChannel + * @param ADCx ADC instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_ADC_DIFFERENTIAL_GROUP0 + * @arg @ref FL_ADC_DIFFERENTIAL_GROUP1 + * @arg @ref FL_ADC_DIFFERENTIAL_GROUP2 + * @arg @ref FL_ADC_DIFFERENTIAL_GROUP3 + * @arg @ref FL_ADC_DIFFERENTIAL_GROUP4 + * @arg @ref FL_ADC_DIFFERENTIAL_GROUP5 + * @arg @ref FL_ADC_DIFFERENTIAL_GROUP6 + * @retval None + */ +__STATIC_INLINE void FL_ADC_EnableDifferentialChannel(ADC_Type *ADCx, uint32_t channel) +{ + SET_BIT(ADCx->DCR, ((channel & 0x7f) << 0x0U)); +} + +/** + * @brief Disable ADC Differential Channel + * @rmtoll DCR FL_ADC_DisableDifferentialChannel + * @param ADCx ADC instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_ADC_DIFFERENTIAL_GROUP0 + * @arg @ref FL_ADC_DIFFERENTIAL_GROUP1 + * @arg @ref FL_ADC_DIFFERENTIAL_GROUP2 + * @arg @ref FL_ADC_DIFFERENTIAL_GROUP3 + * @arg @ref FL_ADC_DIFFERENTIAL_GROUP4 + * @arg @ref FL_ADC_DIFFERENTIAL_GROUP5 + * @arg @ref FL_ADC_DIFFERENTIAL_GROUP6 + * @retval None + */ +__STATIC_INLINE void FL_ADC_DisableDifferentialChannel(ADC_Type *ADCx, uint32_t channel) +{ + CLEAR_BIT(ADCx->DCR, ((channel & 0x7f) << 0x0U)); +} + +/** + * @brief Get ADC Differential Channel Enable Status + * @rmtoll DCR FL_ADC_IsEnabledDifferentialChannel + * @param ADCx ADC instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_ADC_DIFFERENTIAL_GROUP0 + * @arg @ref FL_ADC_DIFFERENTIAL_GROUP1 + * @arg @ref FL_ADC_DIFFERENTIAL_GROUP2 + * @arg @ref FL_ADC_DIFFERENTIAL_GROUP3 + * @arg @ref FL_ADC_DIFFERENTIAL_GROUP4 + * @arg @ref FL_ADC_DIFFERENTIAL_GROUP5 + * @arg @ref FL_ADC_DIFFERENTIAL_GROUP6 + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ADC_IsEnabledDifferentialChannel(ADC_Type *ADCx, uint32_t channel) +{ + return (uint32_t)(READ_BIT(ADCx->DCR, ((channel & 0x7f) << 0x0U)) == ((channel & 0x7f) << 0x0U)); +} + +/** + * @brief Get ADC Conversion Data + * @rmtoll DR DATA FL_ADC_ReadConversionData + * @param ADCx ADC instance + * @retval + */ +__STATIC_INLINE uint32_t FL_ADC_ReadConversionData(ADC_Type *ADCx) +{ + return (uint32_t)(READ_BIT(ADCx->DR, (0xffffU << 0U)) >> 0U); +} + +/** + * @brief Write ADC Analog Watchdog Under Low + * @rmtoll HLTR AWD_LT FL_ADC_WriteAnalogWDGLowThreshold + * @param ADCx ADC instance + * @param threshold + * @retval None + */ +__STATIC_INLINE void FL_ADC_WriteAnalogWDGLowThreshold(ADC_Type *ADCx, uint32_t threshold) +{ + MODIFY_REG(ADCx->HLTR, (0xffffU << 0U), (threshold << 0U)); +} + +/** + * @brief Read ADC Analog Watchdog Under Low + * @rmtoll HLTR AWD_LT FL_ADC_ReadAnalogWDGLowThreshold + * @param ADCx ADC instance + * @retval + */ +__STATIC_INLINE uint32_t FL_ADC_ReadAnalogWDGLowThreshold(ADC_Type *ADCx) +{ + return (uint32_t)(READ_BIT(ADCx->HLTR, (0xffffU << 0U)) >> 0U); +} + +/** + * @brief Write ADC Analog Watchdog Above High + * @rmtoll HLTR AWD_HT FL_ADC_WriteAnalogWDGHighThreshold + * @param ADCx ADC instance + * @param threshold + * @retval None + */ +__STATIC_INLINE void FL_ADC_WriteAnalogWDGHighThreshold(ADC_Type *ADCx, uint32_t threshold) +{ + MODIFY_REG(ADCx->HLTR, (0xffffU << 16U), (threshold << 16U)); +} + +/** + * @brief Read ADC Analog Watchdog Above High + * @rmtoll HLTR AWD_HT FL_ADC_ReadAnalogWDGHighThreshold + * @param ADCx ADC instance + * @retval + */ +__STATIC_INLINE uint32_t FL_ADC_ReadAnalogWDGHighThreshold(ADC_Type *ADCx) +{ + return (uint32_t)(READ_BIT(ADCx->HLTR, (0xffffU << 16U)) >> 16U); +} + +/** + * @} + */ + +/** @defgroup ADC_FL_EF_Init Initialization and de-initialization functions + * @{ + */ +FL_ErrorStatus FL_ADC_CommonDeInit(void); +FL_ErrorStatus FL_ADC_DeInit(ADC_Type *ADCx); +uint32_t GetActualVddaVoltage(ADC_Type *ADCx); +void FL_ADC_StructInit(FL_ADC_InitTypeDef *ADC_InitStruct); +FL_ErrorStatus FL_ADC_Init(ADC_Type *ADCx, FL_ADC_InitTypeDef *ADC_InitStruct); +void FL_ADC_CommonStructInit(FL_ADC_CommonInitTypeDef *ADC_CommonInitStruct); +FL_ErrorStatus FL_ADC_CommonInit(FL_ADC_CommonInitTypeDef *ADC_CommonInitStruct); + +/** + * @} + */ + + +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif /* __FM33LG0XX_FL_ADC_H*/ + +/*************************Py_Code_Generator Version: 0.1-0.14-0.1 @ 2022-05-09*************************/ +/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/ diff --git a/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_aes.h b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_aes.h new file mode 100644 index 0000000..fbdc560 --- /dev/null +++ b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_aes.h @@ -0,0 +1,784 @@ + /** + ******************************************************************************************************* + * @file fm33lg0xx_fl_aes.h + * @author FMSH Application Team + * @brief Head file of AES FL Module + ******************************************************************************************************* + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + + +/* Define to prevent recursive inclusion---------------------------------------------------------------*/ +#ifndef __FM33LG0XX_FL_AES_H +#define __FM33LG0XX_FL_AES_H + +#ifdef __cplusplus +extern "C" { +#endif +/* Includes -------------------------------------------------------------------------------------------*/ +#include "fm33lg0xx_fl_def.h" +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @defgroup AES AES + * @brief AES FL driver + * @{ + */ + +/* Exported types -------------------------------------------------------------------------------------*/ +/** @defgroup AES_FL_ES_INIT AES Exported Init structures + * @{ + */ + +/** + * @brief FL AES Init Sturcture definition + */ +typedef struct +{ + /* 秘钥长度 */ + uint32_t keyLength; + /* 数据流处理模式 */ + uint32_t cipherMode; + /* AES工作模式 */ + uint32_t operationMode; + /* 输入数据类型 */ + uint32_t dataType; + +} FL_AES_InitTypeDef; +/** + * @} + */ +/* Exported constants ---------------------------------------------------------------------------------*/ +/** @defgroup AES_FL_Exported_Constants AES Exported Constants + * @{ + */ + +#define AES_CR_KEYLEN_Pos (13U) +#define AES_CR_KEYLEN_Msk (0x3U << AES_CR_KEYLEN_Pos) +#define AES_CR_KEYLEN AES_CR_KEYLEN_Msk + +#define AES_CR_DMAOEN_Pos (12U) +#define AES_CR_DMAOEN_Msk (0x1U << AES_CR_DMAOEN_Pos) +#define AES_CR_DMAOEN AES_CR_DMAOEN_Msk + +#define AES_CR_DMAIEN_Pos (11U) +#define AES_CR_DMAIEN_Msk (0x1U << AES_CR_DMAIEN_Pos) +#define AES_CR_DMAIEN AES_CR_DMAIEN_Msk + +#define AES_CR_IVRSWAP_Pos (9U) +#define AES_CR_IVRSWAP_Msk (0x3U << AES_CR_IVRSWAP_Pos) +#define AES_CR_IVRSWAP AES_CR_IVRSWAP_Msk + +#define AES_CR_CHMOD_Pos (5U) +#define AES_CR_CHMOD_Msk (0x3U << AES_CR_CHMOD_Pos) +#define AES_CR_CHMOD AES_CR_CHMOD_Msk + +#define AES_CR_MODE_Pos (3U) +#define AES_CR_MODE_Msk (0x3U << AES_CR_MODE_Pos) +#define AES_CR_MODE AES_CR_MODE_Msk + +#define AES_CR_DATATYP_Pos (1U) +#define AES_CR_DATATYP_Msk (0x3U << AES_CR_DATATYP_Pos) +#define AES_CR_DATATYP AES_CR_DATATYP_Msk + +#define AES_CR_EN_Pos (0U) +#define AES_CR_EN_Msk (0x1U << AES_CR_EN_Pos) +#define AES_CR_EN AES_CR_EN_Msk + +#define AES_IER_WRERR_IE_Pos (2U) +#define AES_IER_WRERR_IE_Msk (0x1U << AES_IER_WRERR_IE_Pos) +#define AES_IER_WRERR_IE AES_IER_WRERR_IE_Msk + +#define AES_IER_RDERR_IE_Pos (1U) +#define AES_IER_RDERR_IE_Msk (0x1U << AES_IER_RDERR_IE_Pos) +#define AES_IER_RDERR_IE AES_IER_RDERR_IE_Msk + +#define AES_IER_CCF_IE_Pos (0U) +#define AES_IER_CCF_IE_Msk (0x1U << AES_IER_CCF_IE_Pos) +#define AES_IER_CCF_IE AES_IER_CCF_IE_Msk + +#define AES_ISR_WRERR_Pos (2U) +#define AES_ISR_WRERR_Msk (0x1U << AES_ISR_WRERR_Pos) +#define AES_ISR_WRERR AES_ISR_WRERR_Msk + +#define AES_ISR_RDERR_Pos (1U) +#define AES_ISR_RDERR_Msk (0x1U << AES_ISR_RDERR_Pos) +#define AES_ISR_RDERR AES_ISR_RDERR_Msk + +#define AES_ISR_CCF_Pos (0U) +#define AES_ISR_CCF_Msk (0x1U << AES_ISR_CCF_Pos) +#define AES_ISR_CCF AES_ISR_CCF_Msk + + + +#define FL_AES_KEY0_OFFSET (0x0U << 0U) +#define FL_AES_KEY1_OFFSET (0x1U << 0U) +#define FL_AES_KEY2_OFFSET (0x2U << 0U) +#define FL_AES_KEY3_OFFSET (0x3U << 0U) +#define FL_AES_KEY4_OFFSET (0x4U << 0U) +#define FL_AES_KEY5_OFFSET (0x5U << 0U) +#define FL_AES_KEY6_OFFSET (0x6U << 0U) +#define FL_AES_KEY7_OFFSET (0x7U << 0U) +#define FL_AES_IVR0_OFFSET (0x0U << 0U) +#define FL_AES_IVR1_OFFSET (0x1U << 0U) +#define FL_AES_IVR2_OFFSET (0x2U << 0U) +#define FL_AES_IVR3_OFFSET (0x3U << 0U) +#define FL_AES_H0_OFFSET (0x0U << 0U) +#define FL_AES_H1_OFFSET (0x1U << 0U) +#define FL_AES_H2_OFFSET (0x2U << 0U) +#define FL_AES_H3_OFFSET (0x3U << 0U) + + + +#define FL_AES_KEY_LENGTH_128B (0x0U << AES_CR_KEYLEN_Pos) +#define FL_AES_KEY_LENGTH_192B (0x1U << AES_CR_KEYLEN_Pos) +#define FL_AES_KEY_LENGTH_256B (0x2U << AES_CR_KEYLEN_Pos) + + +#define FL_AES_IVR_SWAP_32B (0x0U << AES_CR_IVRSWAP_Pos) +#define FL_AES_IVR_SWAP_16B (0x1U << AES_CR_IVRSWAP_Pos) +#define FL_AES_IVR_SWAP_8B (0x2U << AES_CR_IVRSWAP_Pos) +#define FL_AES_IVR_SWAP_1B (0x3U << AES_CR_IVRSWAP_Pos) + + +#define FL_AES_CIPHER_ECB (0x0U << AES_CR_CHMOD_Pos) +#define FL_AES_CIPHER_CBC (0x1U << AES_CR_CHMOD_Pos) +#define FL_AES_CIPHER_CTR (0x2U << AES_CR_CHMOD_Pos) +#define FL_AES_CIPHER_MULTH (0x3U << AES_CR_CHMOD_Pos) + + +#define FL_AES_OPERATION_MODE_ENCRYPTION (0x0U << AES_CR_MODE_Pos) +#define FL_AES_OPERATION_MODE_KEYDERIVATION (0x1U << AES_CR_MODE_Pos) +#define FL_AES_OPERATION_MODE_DECRYPTION (0x2U << AES_CR_MODE_Pos) +#define FL_AES_OPERATION_MODE_KEYDERIVATION_DECRYPTION (0x3U << AES_CR_MODE_Pos) + + +#define FL_AES_DATA_TYPE_32B (0x0U << AES_CR_DATATYP_Pos) +#define FL_AES_DATA_TYPE_16B (0x1U << AES_CR_DATATYP_Pos) +#define FL_AES_DATA_TYPE_8B (0x2U << AES_CR_DATATYP_Pos) +#define FL_AES_DATA_TYPE_1B (0x3U << AES_CR_DATATYP_Pos) + + +/** + * @} + */ +/* Exported functions ---------------------------------------------------------------------------------*/ +/** @defgroup AES_FL_Exported_Functions AES Exported Functions + * @{ + */ + +/** + * @brief Set key size selection + * @rmtoll CR KEYLEN FL_AES_SetKeySize + * @param AESx AES instance + * @param keySize This parameter can be one of the following values: + * @arg @ref FL_AES_KEY_LENGTH_128B + * @arg @ref FL_AES_KEY_LENGTH_192B + * @arg @ref FL_AES_KEY_LENGTH_256B + * @retval None + */ +__STATIC_INLINE void FL_AES_SetKeySize(AES_Type *AESx, uint32_t keySize) +{ + MODIFY_REG(AESx->CR, AES_CR_KEYLEN_Msk, keySize); +} + +/** + * @brief Get key size selection + * @rmtoll CR KEYLEN FL_AES_GetKeySize + * @param AESx AES instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_AES_KEY_LENGTH_128B + * @arg @ref FL_AES_KEY_LENGTH_192B + * @arg @ref FL_AES_KEY_LENGTH_256B + */ +__STATIC_INLINE uint32_t FL_AES_GetKeySize(AES_Type *AESx) +{ + return (uint32_t)(READ_BIT(AESx->CR, AES_CR_KEYLEN_Msk)); +} + +/** + * @brief DMA output enable + * @rmtoll CR DMAOEN FL_AES_EnableDMAReq_Output + * @param AESx AES instance + * @retval None + */ +__STATIC_INLINE void FL_AES_EnableDMAReq_Output(AES_Type *AESx) +{ + SET_BIT(AESx->CR, AES_CR_DMAOEN_Msk); +} + +/** + * @brief DMA output enable status + * @rmtoll CR DMAOEN FL_AES_IsEnabledDMAReq_Output + * @param AESx AES instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_AES_IsEnabledDMAReq_Output(AES_Type *AESx) +{ + return (uint32_t)(READ_BIT(AESx->CR, AES_CR_DMAOEN_Msk) == AES_CR_DMAOEN_Msk); +} + +/** + * @brief DMA output disable + * @rmtoll CR DMAOEN FL_AES_DisableDMAReq_Output + * @param AESx AES instance + * @retval None + */ +__STATIC_INLINE void FL_AES_DisableDMAReq_Output(AES_Type *AESx) +{ + CLEAR_BIT(AESx->CR, AES_CR_DMAOEN_Msk); +} + +/** + * @brief DMA input enable + * @rmtoll CR DMAIEN FL_AES_EnableDMAReq_Input + * @param AESx AES instance + * @retval None + */ +__STATIC_INLINE void FL_AES_EnableDMAReq_Input(AES_Type *AESx) +{ + SET_BIT(AESx->CR, AES_CR_DMAIEN_Msk); +} + +/** + * @brief DMA input enable status + * @rmtoll CR DMAIEN FL_AES_IsEnabledDMAReq_Input + * @param AESx AES instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_AES_IsEnabledDMAReq_Input(AES_Type *AESx) +{ + return (uint32_t)(READ_BIT(AESx->CR, AES_CR_DMAIEN_Msk) == AES_CR_DMAIEN_Msk); +} + +/** + * @brief DMA input disable + * @rmtoll CR DMAIEN FL_AES_DisableDMAReq_Input + * @param AESx AES instance + * @retval None + */ +__STATIC_INLINE void FL_AES_DisableDMAReq_Input(AES_Type *AESx) +{ + CLEAR_BIT(AESx->CR, AES_CR_DMAIEN_Msk); +} + +/** + * @brief Set IVR register read out swapping + * @rmtoll CR IVRSWAP FL_AES_SetIVRSwapType + * @param AESx AES instance + * @param type This parameter can be one of the following values: + * @arg @ref FL_AES_IVR_SWAP_32B + * @arg @ref FL_AES_IVR_SWAP_16B + * @arg @ref FL_AES_IVR_SWAP_8B + * @arg @ref FL_AES_IVR_SWAP_1B + * @retval None + */ +__STATIC_INLINE void FL_AES_SetIVRSwapType(AES_Type *AESx, uint32_t type) +{ + MODIFY_REG(AESx->CR, AES_CR_IVRSWAP_Msk, type); +} + +/** + * @brief Get IVR register read out swapping + * @rmtoll CR IVRSWAP FL_AES_GetIVRSwapType + * @param AESx AES instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_AES_IVR_SWAP_32B + * @arg @ref FL_AES_IVR_SWAP_16B + * @arg @ref FL_AES_IVR_SWAP_8B + * @arg @ref FL_AES_IVR_SWAP_1B + */ +__STATIC_INLINE uint32_t FL_AES_GetIVRSwapType(AES_Type *AESx) +{ + return (uint32_t)(READ_BIT(AESx->CR, AES_CR_IVRSWAP_Msk)); +} + +/** + * @brief Set cipher mode + * @rmtoll CR CHMOD FL_AES_SetCipherMode + * @param AESx AES instance + * @param mode This parameter can be one of the following values: + * @arg @ref FL_AES_CIPHER_ECB + * @arg @ref FL_AES_CIPHER_CBC + * @arg @ref FL_AES_CIPHER_CTR + * @arg @ref FL_AES_CIPHER_MULTH + * @retval None + */ +__STATIC_INLINE void FL_AES_SetCipherMode(AES_Type *AESx, uint32_t mode) +{ + MODIFY_REG(AESx->CR, AES_CR_CHMOD_Msk, mode); +} + +/** + * @brief Get cipher mode + * @rmtoll CR CHMOD FL_AES_GetCipherMode + * @param AESx AES instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_AES_CIPHER_ECB + * @arg @ref FL_AES_CIPHER_CBC + * @arg @ref FL_AES_CIPHER_CTR + * @arg @ref FL_AES_CIPHER_MULTH + */ +__STATIC_INLINE uint32_t FL_AES_GetCipherMode(AES_Type *AESx) +{ + return (uint32_t)(READ_BIT(AESx->CR, AES_CR_CHMOD_Msk)); +} + +/** + * @brief Set operation mode + * @rmtoll CR MODE FL_AES_SetOperationMode + * @param AESx AES instance + * @param mode This parameter can be one of the following values: + * @arg @ref FL_AES_OPERATION_MODE_ENCRYPTION + * @arg @ref FL_AES_OPERATION_MODE_KEYDERIVATION + * @arg @ref FL_AES_OPERATION_MODE_DECRYPTION + * @arg @ref FL_AES_OPERATION_MODE_KEYDERIVATION_DECRYPTION + * @retval None + */ +__STATIC_INLINE void FL_AES_SetOperationMode(AES_Type *AESx, uint32_t mode) +{ + MODIFY_REG(AESx->CR, AES_CR_MODE_Msk, mode); +} + +/** + * @brief Get operation mode + * @rmtoll CR MODE FL_AES_GetOperationMode + * @param AESx AES instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_AES_OPERATION_MODE_ENCRYPTION + * @arg @ref FL_AES_OPERATION_MODE_KEYDERIVATION + * @arg @ref FL_AES_OPERATION_MODE_DECRYPTION + * @arg @ref FL_AES_OPERATION_MODE_KEYDERIVATION_DECRYPTION + */ +__STATIC_INLINE uint32_t FL_AES_GetOperationMode(AES_Type *AESx) +{ + return (uint32_t)(READ_BIT(AESx->CR, AES_CR_MODE_Msk)); +} + +/** + * @brief Set data type selection + * @rmtoll CR DATATYP FL_AES_SetDataType + * @param AESx AES instance + * @param rule This parameter can be one of the following values: + * @arg @ref FL_AES_DATA_TYPE_32B + * @arg @ref FL_AES_DATA_TYPE_16B + * @arg @ref FL_AES_DATA_TYPE_8B + * @arg @ref FL_AES_DATA_TYPE_1B + * @retval None + */ +__STATIC_INLINE void FL_AES_SetDataType(AES_Type *AESx, uint32_t rule) +{ + MODIFY_REG(AESx->CR, AES_CR_DATATYP_Msk, rule); +} + +/** + * @brief Get data type selection + * @rmtoll CR DATATYP FL_AES_GetDataType + * @param AESx AES instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_AES_DATA_TYPE_32B + * @arg @ref FL_AES_DATA_TYPE_16B + * @arg @ref FL_AES_DATA_TYPE_8B + * @arg @ref FL_AES_DATA_TYPE_1B + */ +__STATIC_INLINE uint32_t FL_AES_GetDataType(AES_Type *AESx) +{ + return (uint32_t)(READ_BIT(AESx->CR, AES_CR_DATATYP_Msk)); +} + +/** + * @brief AES enable + * @rmtoll CR EN FL_AES_Enable + * @param AESx AES instance + * @retval None + */ +__STATIC_INLINE void FL_AES_Enable(AES_Type *AESx) +{ + SET_BIT(AESx->CR, AES_CR_EN_Msk); +} + +/** + * @brief Get AES enable status + * @rmtoll CR EN FL_AES_IsEnabled + * @param AESx AES instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_AES_IsEnabled(AES_Type *AESx) +{ + return (uint32_t)(READ_BIT(AESx->CR, AES_CR_EN_Msk) == AES_CR_EN_Msk); +} + +/** + * @brief AES disable + * @rmtoll CR EN FL_AES_Disable + * @param AESx AES instance + * @retval None + */ +__STATIC_INLINE void FL_AES_Disable(AES_Type *AESx) +{ + CLEAR_BIT(AESx->CR, AES_CR_EN_Msk); +} + +/** + * @brief Write error interrupt enable + * @rmtoll IER WRERR_IE FL_AES_EnableIT_WriteError + * @param AESx AES instance + * @retval None + */ +__STATIC_INLINE void FL_AES_EnableIT_WriteError(AES_Type *AESx) +{ + SET_BIT(AESx->IER, AES_IER_WRERR_IE_Msk); +} + +/** + * @brief Get write error interrupt enable status + * @rmtoll IER WRERR_IE FL_AES_IsEnabledIT_WriteError + * @param AESx AES instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_AES_IsEnabledIT_WriteError(AES_Type *AESx) +{ + return (uint32_t)(READ_BIT(AESx->IER, AES_IER_WRERR_IE_Msk) == AES_IER_WRERR_IE_Msk); +} + +/** + * @brief Write error interrupt disable + * @rmtoll IER WRERR_IE FL_AES_DisableIT_WriteError + * @param AESx AES instance + * @retval None + */ +__STATIC_INLINE void FL_AES_DisableIT_WriteError(AES_Type *AESx) +{ + CLEAR_BIT(AESx->IER, AES_IER_WRERR_IE_Msk); +} + +/** + * @brief Read error interrupt enable + * @rmtoll IER RDERR_IE FL_AES_EnableIT_ReadError + * @param AESx AES instance + * @retval None + */ +__STATIC_INLINE void FL_AES_EnableIT_ReadError(AES_Type *AESx) +{ + SET_BIT(AESx->IER, AES_IER_RDERR_IE_Msk); +} + +/** + * @brief Get read Error interrupt enable status + * @rmtoll IER RDERR_IE FL_AES_IsEnabledIT_ReadError + * @param AESx AES instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_AES_IsEnabledIT_ReadError(AES_Type *AESx) +{ + return (uint32_t)(READ_BIT(AESx->IER, AES_IER_RDERR_IE_Msk) == AES_IER_RDERR_IE_Msk); +} + +/** + * @brief Read error interrupt disable + * @rmtoll IER RDERR_IE FL_AES_DisableIT_ReadError + * @param AESx AES instance + * @retval None + */ +__STATIC_INLINE void FL_AES_DisableIT_ReadError(AES_Type *AESx) +{ + CLEAR_BIT(AESx->IER, AES_IER_RDERR_IE_Msk); +} + +/** + * @brief Cipher complete interrupt enable + * @rmtoll IER CCF_IE FL_AES_EnableIT_Complete + * @param AESx AES instance + * @retval None + */ +__STATIC_INLINE void FL_AES_EnableIT_Complete(AES_Type *AESx) +{ + SET_BIT(AESx->IER, AES_IER_CCF_IE_Msk); +} + +/** + * @brief Get cipher complete interrupt enable status + * @rmtoll IER CCF_IE FL_AES_IsEnabledIT_Complete + * @param AESx AES instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_AES_IsEnabledIT_Complete(AES_Type *AESx) +{ + return (uint32_t)(READ_BIT(AESx->IER, AES_IER_CCF_IE_Msk) == AES_IER_CCF_IE_Msk); +} + +/** + * @brief Cipher complete interrupt disable + * @rmtoll IER CCF_IE FL_AES_DisableIT_Complete + * @param AESx AES instance + * @retval None + */ +__STATIC_INLINE void FL_AES_DisableIT_Complete(AES_Type *AESx) +{ + CLEAR_BIT(AESx->IER, AES_IER_CCF_IE_Msk); +} + +/** + * @brief Get write error flag + * @rmtoll ISR WRERR FL_AES_IsActiveFlag_WriteError + * @param AESx AES instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_AES_IsActiveFlag_WriteError(AES_Type *AESx) +{ + return (uint32_t)(READ_BIT(AESx->ISR, AES_ISR_WRERR_Msk) == (AES_ISR_WRERR_Msk)); +} + +/** + * @brief Clear write error flag + * @rmtoll ISR WRERR FL_AES_ClearFlag_WriteError + * @param AESx AES instance + * @retval None + */ +__STATIC_INLINE void FL_AES_ClearFlag_WriteError(AES_Type *AESx) +{ + WRITE_REG(AESx->ISR, AES_ISR_WRERR_Msk); +} + +/** + * @brief Get read error flag + * @rmtoll ISR RDERR FL_AES_IsActiveFlag_ReadError + * @param AESx AES instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_AES_IsActiveFlag_ReadError(AES_Type *AESx) +{ + return (uint32_t)(READ_BIT(AESx->ISR, AES_ISR_RDERR_Msk) == (AES_ISR_RDERR_Msk)); +} + +/** + * @brief Clear read error flag + * @rmtoll ISR RDERR FL_AES_ClearFlag_ReadError + * @param AESx AES instance + * @retval None + */ +__STATIC_INLINE void FL_AES_ClearFlag_ReadError(AES_Type *AESx) +{ + WRITE_REG(AESx->ISR, AES_ISR_RDERR_Msk); +} + +/** + * @brief Get cipher complete flag + * @rmtoll ISR CCF FL_AES_IsActiveFlag_Complete + * @param AESx AES instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_AES_IsActiveFlag_Complete(AES_Type *AESx) +{ + return (uint32_t)(READ_BIT(AESx->ISR, AES_ISR_CCF_Msk) == (AES_ISR_CCF_Msk)); +} + +/** + * @brief Clear cipher complete flag + * @rmtoll ISR CCF FL_AES_ClearFlag_Complete + * @param AESx AES instance + * @retval None + */ +__STATIC_INLINE void FL_AES_ClearFlag_Complete(AES_Type *AESx) +{ + WRITE_REG(AESx->ISR, AES_ISR_CCF_Msk); +} + +/** + * @brief Write AES data input register + * @rmtoll DIR FL_AES_WriteInputData + * @param AESx AES instance + * @param data + * @retval None + */ +__STATIC_INLINE void FL_AES_WriteInputData(AES_Type *AESx, uint32_t data) +{ + MODIFY_REG(AESx->DIR, (0xffffffffU << 0U), (data << 0U)); +} + +/** + * @brief Read AES data output register + * @rmtoll DOR FL_AES_ReadOutputData + * @param AESx AES instance + * @retval + */ +__STATIC_INLINE uint32_t FL_AES_ReadOutputData(AES_Type *AESx) +{ + return (uint32_t)(READ_BIT(AESx->DOR, (0xffffffffU << 0U)) >> 0U); +} + +/** + * @brief Set key registers + * @rmtoll KEY0 FL_AES_WriteKeys + * @param AESx AES instance + * @param offset This parameter can be one of the following values: + * @arg @ref FL_AES_KEY0_OFFSET + * @arg @ref FL_AES_KEY1_OFFSET + * @arg @ref FL_AES_KEY2_OFFSET + * @arg @ref FL_AES_KEY3_OFFSET + * @arg @ref FL_AES_KEY4_OFFSET + * @arg @ref FL_AES_KEY5_OFFSET + * @arg @ref FL_AES_KEY6_OFFSET + * @arg @ref FL_AES_KEY7_OFFSET + * @param data + * @retval None + */ +__STATIC_INLINE void FL_AES_WriteKeys(AES_Type *AESx, uint32_t offset, uint32_t data) +{ + WRITE_REG(*((&AESx->KEY0) + offset), data); +} + +/** + * @brief Get key registers + * @rmtoll KEY0 FL_AES_ReadKeys + * @param AESx AES instance + * @param offset This parameter can be one of the following values: + * @arg @ref FL_AES_KEY0_OFFSET + * @arg @ref FL_AES_KEY1_OFFSET + * @arg @ref FL_AES_KEY2_OFFSET + * @arg @ref FL_AES_KEY3_OFFSET + * @arg @ref FL_AES_KEY4_OFFSET + * @arg @ref FL_AES_KEY5_OFFSET + * @arg @ref FL_AES_KEY6_OFFSET + * @arg @ref FL_AES_KEY7_OFFSET + * @retval + */ +__STATIC_INLINE uint32_t FL_AES_ReadKeys(AES_Type *AESx, uint32_t offset) +{ + return (uint32_t)READ_REG(*((&AESx->KEY0) + offset)); +} + +/** + * @brief Write initialization vector registers + * @rmtoll DIR FL_AES_WriteIVR + * @param AESx AES instance + * @param offset This parameter can be one of the following values: + * @arg @ref FL_AES_IVR0_OFFSET + * @arg @ref FL_AES_IVR1_OFFSET + * @arg @ref FL_AES_IVR2_OFFSET + * @arg @ref FL_AES_IVR3_OFFSET + * @param data + * @retval None + */ +__STATIC_INLINE void FL_AES_WriteIVR(AES_Type *AESx, uint32_t offset, uint32_t data) +{ + WRITE_REG(*((&AESx->IVR0) + offset), data); +} + +/** + * @brief Read initialization vector registers + * @rmtoll DOR FL_AES_ReadIVR + * @param AESx AES instance + * @param offset This parameter can be one of the following values: + * @arg @ref FL_AES_IVR0_OFFSET + * @arg @ref FL_AES_IVR1_OFFSET + * @arg @ref FL_AES_IVR2_OFFSET + * @arg @ref FL_AES_IVR3_OFFSET + * @retval + */ +__STATIC_INLINE uint32_t FL_AES_ReadIVR(AES_Type *AESx, uint32_t offset) +{ + return (uint32_t)READ_REG(*((&AESx->IVR0) + offset)); +} + +/** + * @brief Set AES MultH parameter Register + * @rmtoll H0 FL_AES_WriteHParams + * @param AESx AES instance + * @param offset This parameter can be one of the following values: + * @arg @ref FL_AES_H0_OFFSET + * @arg @ref FL_AES_H1_OFFSET + * @arg @ref FL_AES_H2_OFFSET + * @arg @ref FL_AES_H3_OFFSET + * @param data + * @retval None + */ +__STATIC_INLINE void FL_AES_WriteHParams(AES_Type *AESx, uint32_t offset, uint32_t data) +{ + WRITE_REG(*((&AESx->H0) + offset), data); +} + +/** + * @brief Get AES MultH parameter Register + * @rmtoll H0 FL_AES_ReadHParams + * @param AESx AES instance + * @param offset This parameter can be one of the following values: + * @arg @ref FL_AES_H0_OFFSET + * @arg @ref FL_AES_H1_OFFSET + * @arg @ref FL_AES_H2_OFFSET + * @arg @ref FL_AES_H3_OFFSET + * @retval + */ +__STATIC_INLINE uint32_t FL_AES_ReadHParams(AES_Type *AESx, uint32_t offset) +{ + return (uint32_t)READ_REG(*((&AESx->H0) + offset)); +} + +/** + * @} + */ + +/** @defgroup AES_FL_EF_Init Initialization and de-initialization functions + * @{ + */ +FL_ErrorStatus FL_AES_DeInit(void); +void FL_AES_StructInit(FL_AES_InitTypeDef *AES_InitStructer); +FL_ErrorStatus FL_AES_Init(AES_Type *AESx, FL_AES_InitTypeDef *AES_InitStructer); + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif /* __FM33LG0XX_FL_AES_H*/ + +/*************************Py_Code_Generator Version: 0.1-0.11-0.1 @ 2020-09-14*************************/ +/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/ diff --git a/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_atim.h b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_atim.h new file mode 100644 index 0000000..d3a15b7 --- /dev/null +++ b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_atim.h @@ -0,0 +1,3773 @@ + /** + ******************************************************************************************************* + * @file fm33lg0xx_fl_atim.h + * @author FMSH Application Team + * @brief Head file of ATIM FL Module + ******************************************************************************************************* + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + + +/* Define to prevent recursive inclusion---------------------------------------------------------------*/ +#ifndef __FM33LG0XX_FL_ATIM_H +#define __FM33LG0XX_FL_ATIM_H + +#ifdef __cplusplus +extern "C" { +#endif +/* Includes -------------------------------------------------------------------------------------------*/ +#include "fm33lg0xx_fl_def.h" +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @defgroup ATIM ATIM + * @brief ATIM FL driver + * @{ + */ + +/* Exported types -------------------------------------------------------------------------------------*/ +/** @defgroup ATIM_FL_ES_INIT ATIM Exported Init structures + * @{ + */ + +/** + * @brief FL ATIM Init Sturcture definition + */ + +typedef struct +{ + /*! 时钟源选择 */ + uint32_t clockSource; + /*! 预分频系数 */ + uint32_t prescaler; + /*! 计数模式 */ + uint32_t counterMode; + /*! 自动重装载值 */ + uint32_t autoReload; + /*! 预装载使能 */ + uint32_t autoReloadState; + /*! 定时器分频系数与数字滤波器所使用的采样时钟分频比 */ + uint32_t clockDivision; + /*! 重复计数次数 */ + uint32_t repetitionCounter; + +} FL_ATIM_InitTypeDef; + + +typedef struct +{ + + /*! 外部时钟源模式 */ + uint32_t slaveMode; + /*! 输入触发信号选择 */ + uint32_t triggerSrc; + /*! Trigger 延迟*/ + uint32_t triggerDelay; + +} FL_ATIM_SlaveInitTypeDef; + +/** + * @brief TIM ETR configuration structure definition. + */ + +typedef struct +{ + /*! 外部触发使能 */ + uint32_t useExternalTrigger; + /*! 外部时钟滤波 */ + uint32_t ETRFilter; + /*! 外部时钟分频 */ + uint32_t ETRClockDivision; + /*! 外部时钟触发极性 */ + uint32_t ETRPolarity; + +} FL_ATIM_ETR_InitTypeDef; + +/** + * @brief TIM Output Compare configuration structure definition. + */ +typedef struct +{ + /*! 比较输出模式 */ + uint32_t OCMode; + /*! 正向比较通道输出使能 */ + uint32_t OCState; + /*! 比较互补通道输出使能 */ + uint32_t OCNState; + /*! 比较输出极性 */ + uint32_t OCPolarity; + /*! 比较互补输出极性 */ + uint32_t OCNPolarity; + /*! 比较输出通道快速模式使能 */ + uint32_t OCFastMode; + /*! 输出比较预装载 */ + uint32_t OCPreload; + /*! 通道比较值 */ + uint32_t compareValue; + /*! 输出空闲状态电平 */ + uint32_t OCIdleState; + /*! ETR清0使能 */ + uint32_t OCETRFStatus; + /*! 互补输出空闲状态电平 */ + uint32_t OCNIdleState; + +} FL_ATIM_OC_InitTypeDef; +/** + * @brief TIM Input Capture configuration structure definition. + */ + +typedef struct +{ + /*! 输入捕获使能 */ + uint32_t captureState; + /*! 输入捕获极性 */ + uint32_t ICPolarity; + /*! 通道映射激活的输入选择 */ + uint32_t ICActiveInput; + /*! 输入分频 */ + uint32_t ICPrescaler; + /*! 输入滤波 */ + uint32_t ICFilter; + +} FL_ATIM_IC_InitTypeDef; + +/** + * @brief BDTR (Break and Dead Time) structure definition + */ +typedef struct +{ + /*! 运行状态下的输出关闭状态 */ + uint32_t OSSRState; + /*! 空闲状态下的输出关闭状态 */ + uint32_t OSSIState; + /*! 寄存器写保护等级 */ + uint32_t lockLevel; + /*! 死区时间 */ + uint32_t deadTime; + /*! 刹车使能 */ + uint32_t breakState; + /*! 刹车信号滤波 */ + uint32_t breakFilter; + /*! 刹车信号极性 */ + uint32_t breakPolarity; + /*! 刹车后计数器重装后自动输出使能*/ + uint32_t automaticOutput; + /*! 刹车信号1门控 */ + uint32_t gatedBrakeSignal_1; + /*! 刹车信号2门控 */ + uint32_t gatedBrakeSignal_2; + /*! 两路刹车信号控制逻辑 */ + uint32_t brakeSignalCombined; + +} FL_ATIM_BDTR_InitTypeDef; +/** + * @} + */ +/* Exported constants ---------------------------------------------------------------------------------*/ +/** @defgroup ATIM_FL_Exported_Constants ATIM Exported Constants + * @{ + */ + +#define ATIM_CR1_CKD_Pos (8U) +#define ATIM_CR1_CKD_Msk (0x3Ul << ATIM_CR1_CKD_Pos) +#define ATIM_CR1_CKD ATIM_CR1_CKD_Msk + +#define ATIM_CR1_ARPE_Pos (7U) +#define ATIM_CR1_ARPE_Msk (0x1Ul << ATIM_CR1_ARPE_Pos) +#define ATIM_CR1_ARPE ATIM_CR1_ARPE_Msk + +#define ATIM_CR1_CMS_Pos (5U) +#define ATIM_CR1_CMS_Msk (0x3Ul << ATIM_CR1_CMS_Pos) +#define ATIM_CR1_CMS ATIM_CR1_CMS_Msk + +#define ATIM_CR1_DIR_Pos (4U) +#define ATIM_CR1_DIR_Msk (0x1Ul << ATIM_CR1_DIR_Pos) +#define ATIM_CR1_DIR ATIM_CR1_DIR_Msk + +#define ATIM_CR1_OPM_Pos (3U) +#define ATIM_CR1_OPM_Msk (0x1Ul << ATIM_CR1_OPM_Pos) +#define ATIM_CR1_OPM ATIM_CR1_OPM_Msk + +#define ATIM_CR1_URS_Pos (2U) +#define ATIM_CR1_URS_Msk (0x1Ul << ATIM_CR1_URS_Pos) +#define ATIM_CR1_URS ATIM_CR1_URS_Msk + +#define ATIM_CR1_UDIS_Pos (1U) +#define ATIM_CR1_UDIS_Msk (0x1Ul << ATIM_CR1_UDIS_Pos) +#define ATIM_CR1_UDIS ATIM_CR1_UDIS_Msk + +#define ATIM_CR1_CEN_Pos (0U) +#define ATIM_CR1_CEN_Msk (0x1Ul << ATIM_CR1_CEN_Pos) +#define ATIM_CR1_CEN ATIM_CR1_CEN_Msk + +#define ATIM_CR2_OISN_Pos (9U) +#define ATIM_CR2_OISN_Msk (0x1Ul << ATIM_CR2_OISN_Pos) +#define ATIM_CR2_OISN ATIM_CR2_OISN_Msk + +#define ATIM_CR2_OIS_Pos (8U) +#define ATIM_CR2_OIS_Msk (0x1Ul << ATIM_CR2_OIS_Pos) +#define ATIM_CR2_OIS ATIM_CR2_OIS_Msk + +#define ATIM_CR2_TI1S_Pos (7U) +#define ATIM_CR2_TI1S_Msk (0x1Ul << ATIM_CR2_TI1S_Pos) +#define ATIM_CR2_TI1S ATIM_CR2_TI1S_Msk + +#define ATIM_CR2_MMS_Pos (4U) +#define ATIM_CR2_MMS_Msk (0x7Ul << ATIM_CR2_MMS_Pos) +#define ATIM_CR2_MMS ATIM_CR2_MMS_Msk + +#define ATIM_CR2_CCDS_Pos (3U) +#define ATIM_CR2_CCDS_Msk (0x1Ul << ATIM_CR2_CCDS_Pos) +#define ATIM_CR2_CCDS ATIM_CR2_CCDS_Msk + +#define ATIM_CR2_CCUS_Pos (2U) +#define ATIM_CR2_CCUS_Msk (0x1Ul << ATIM_CR2_CCUS_Pos) +#define ATIM_CR2_CCUS ATIM_CR2_CCUS_Msk + +#define ATIM_CR2_CCPC_Pos (0U) +#define ATIM_CR2_CCPC_Msk (0x1Ul << ATIM_CR2_CCPC_Pos) +#define ATIM_CR2_CCPC ATIM_CR2_CCPC_Msk + +#define ATIM_SMCR_ETP_Pos (15U) +#define ATIM_SMCR_ETP_Msk (0x1Ul << ATIM_SMCR_ETP_Pos) +#define ATIM_SMCR_ETP ATIM_SMCR_ETP_Msk + +#define ATIM_SMCR_ECE_Pos (14U) +#define ATIM_SMCR_ECE_Msk (0x1Ul << ATIM_SMCR_ECE_Pos) +#define ATIM_SMCR_ECE ATIM_SMCR_ECE_Msk + +#define ATIM_SMCR_ETPS_Pos (12U) +#define ATIM_SMCR_ETPS_Msk (0x3Ul << ATIM_SMCR_ETPS_Pos) +#define ATIM_SMCR_ETPS ATIM_SMCR_ETPS_Msk + +#define ATIM_SMCR_ETF_Pos (8U) +#define ATIM_SMCR_ETF_Msk (0xfUl << ATIM_SMCR_ETF_Pos) +#define ATIM_SMCR_ETF ATIM_SMCR_ETF_Msk + +#define ATIM_SMCR_MSM_Pos (7U) +#define ATIM_SMCR_MSM_Msk (0x1Ul << ATIM_SMCR_MSM_Pos) +#define ATIM_SMCR_MSM ATIM_SMCR_MSM_Msk + +#define ATIM_SMCR_TS_Pos (4U) +#define ATIM_SMCR_TS_Msk (0x7Ul << ATIM_SMCR_TS_Pos) +#define ATIM_SMCR_TS ATIM_SMCR_TS_Msk + +#define ATIM_SMCR_SMS_Pos (0U) +#define ATIM_SMCR_SMS_Msk (0x7Ul << ATIM_SMCR_SMS_Pos) +#define ATIM_SMCR_SMS ATIM_SMCR_SMS_Msk + +#define ATIM_DIER_CC1BURSTEN_Pos (16U) +#define ATIM_DIER_CC1BURSTEN_Msk (0x1Ul << ATIM_DIER_CC1BURSTEN_Pos) +#define ATIM_DIER_CC1BURSTEN ATIM_DIER_CC1BURSTEN_Msk + +#define ATIM_DIER_CC2BURSTEN_Pos (17U) +#define ATIM_DIER_CC2BURSTEN_Msk (0x1Ul << ATIM_DIER_CC2BURSTEN_Pos) +#define ATIM_DIER_CC2BURSTEN ATIM_DIER_CC2BURSTEN_Msk + +#define ATIM_DIER_CC3BURSTEN_Pos (18Ul) +#define ATIM_DIER_CC3BURSTEN_Msk (0x1Ul << ATIM_DIER_CC3BURSTEN_Pos) +#define ATIM_DIER_CC3BURSTEN ATIM_DIER_CC3BURSTEN_Msk + +#define ATIM_DIER_CC4BURSTEN_Pos (19Ul) +#define ATIM_DIER_CC4BURSTEN_Msk (0x1Ul << ATIM_DIER_CC4BURSTEN_Pos) +#define ATIM_DIER_CC4BURSTEN ATIM_DIER_CC4BURSTEN_Msk + +#define ATIM_DIER_TDE_Pos (14U) +#define ATIM_DIER_TDE_Msk (0x1Ul << ATIM_DIER_TDE_Pos) +#define ATIM_DIER_TDE ATIM_DIER_TDE_Msk + +#define ATIM_DIER_COMDE_Pos (13U) +#define ATIM_DIER_COMDE_Msk (0x1Ul << ATIM_DIER_COMDE_Pos) +#define ATIM_DIER_COMDE ATIM_DIER_COMDE_Msk + +#define ATIM_DIER_CCDE_Pos (9U) +#define ATIM_DIER_CCDE_Msk (0x1Ul << ATIM_DIER_CCDE_Pos) +#define ATIM_DIER_CCDE ATIM_DIER_CCDE_Msk + +#define ATIM_DIER_UDE_Pos (8U) +#define ATIM_DIER_UDE_Msk (0x1Ul << ATIM_DIER_UDE_Pos) +#define ATIM_DIER_UDE ATIM_DIER_UDE_Msk + +#define ATIM_DIER_BIE_Pos (7U) +#define ATIM_DIER_BIE_Msk (0x1Ul << ATIM_DIER_BIE_Pos) +#define ATIM_DIER_BIE ATIM_DIER_BIE_Msk + +#define ATIM_DIER_TIE_Pos (6U) +#define ATIM_DIER_TIE_Msk (0x1Ul << ATIM_DIER_TIE_Pos) +#define ATIM_DIER_TIE ATIM_DIER_TIE_Msk + +#define ATIM_DIER_COMIE_Pos (5U) +#define ATIM_DIER_COMIE_Msk (0x1Ul << ATIM_DIER_COMIE_Pos) +#define ATIM_DIER_COMIE ATIM_DIER_COMIE_Msk + +#define ATIM_DIER_CCIE_Pos (1U) +#define ATIM_DIER_CCIE_Msk (0x1Ul << ATIM_DIER_CCIE_Pos) +#define ATIM_DIER_CCIE ATIM_DIER_CCIE_Msk + +#define ATIM_DIER_UIE_Pos (0U) +#define ATIM_DIER_UIE_Msk (0x1Ul << ATIM_DIER_UIE_Pos) +#define ATIM_DIER_UIE ATIM_DIER_UIE_Msk + +#define ATIM_ISR_CCOF_Pos (9U) +#define ATIM_ISR_CCOF_Msk (0x1Ul << ATIM_ISR_CCOF_Pos) +#define ATIM_ISR_CCOF ATIM_ISR_CCOF_Msk + +#define ATIM_ISR_BIF_Pos (7U) +#define ATIM_ISR_BIF_Msk (0x1Ul << ATIM_ISR_BIF_Pos) +#define ATIM_ISR_BIF ATIM_ISR_BIF_Msk + +#define ATIM_ISR_TIF_Pos (6U) +#define ATIM_ISR_TIF_Msk (0x1Ul << ATIM_ISR_TIF_Pos) +#define ATIM_ISR_TIF ATIM_ISR_TIF_Msk + +#define ATIM_ISR_COMIF_Pos (5U) +#define ATIM_ISR_COMIF_Msk (0x1Ul << ATIM_ISR_COMIF_Pos) +#define ATIM_ISR_COMIF ATIM_ISR_COMIF_Msk + +#define ATIM_ISR_CCIF_Pos (1U) +#define ATIM_ISR_CCIF_Msk (0x1Ul << ATIM_ISR_CCIF_Pos) +#define ATIM_ISR_CCIF ATIM_ISR_CCIF_Msk + +#define ATIM_ISR_UIF_Pos (0U) +#define ATIM_ISR_UIF_Msk (0x1Ul << ATIM_ISR_UIF_Pos) +#define ATIM_ISR_UIF ATIM_ISR_UIF_Msk + +#define ATIM_EGR_BG_Pos (7U) +#define ATIM_EGR_BG_Msk (0x1Ul << ATIM_EGR_BG_Pos) +#define ATIM_EGR_BG ATIM_EGR_BG_Msk + +#define ATIM_EGR_TG_Pos (6U) +#define ATIM_EGR_TG_Msk (0x1Ul << ATIM_EGR_TG_Pos) +#define ATIM_EGR_TG ATIM_EGR_TG_Msk + +#define ATIM_EGR_COMG_Pos (5U) +#define ATIM_EGR_COMG_Msk (0x1Ul << ATIM_EGR_COMG_Pos) +#define ATIM_EGR_COMG ATIM_EGR_COMG_Msk + +#define ATIM_EGR_CCG_Pos (1U) +#define ATIM_EGR_CCG_Msk (0x1Ul << ATIM_EGR_CCG_Pos) +#define ATIM_EGR_CCG ATIM_EGR_CCG_Msk + +#define ATIM_EGR_UG_Pos (0U) +#define ATIM_EGR_UG_Msk (0x1Ul << ATIM_EGR_UG_Pos) +#define ATIM_EGR_UG ATIM_EGR_UG_Msk + +#define ATIM_DCR_DBL_Pos (8U) +#define ATIM_DCR_DBL_Msk (0x1fUl << ATIM_DCR_DBL_Pos) +#define ATIM_DCR_DBL ATIM_DCR_DBL_Msk + +#define ATIM_DCR_DBA_Pos (0U) +#define ATIM_DCR_DBA_Msk (0x1fUl << ATIM_DCR_DBA_Pos) +#define ATIM_DCR_DBA ATIM_DCR_DBA_Msk + +#define ATIM_CCMR_OCCE_Pos (7U) +#define ATIM_CCMR_OCCE_Msk (0x1Ul << ATIM_CCMR_OCCE_Pos) +#define ATIM_CCMR_OCCE ATIM_CCMR_OCCE_Msk + +#define ATIM_CCMR_OCM_Pos (4U) +#define ATIM_CCMR_OCM_Msk (0x7Ul << ATIM_CCMR_OCM_Pos) +#define ATIM_CCMR_OCM ATIM_CCMR_OCM_Msk + +#define ATIM_CCMR_OCPE_Pos (3U) +#define ATIM_CCMR_OCPE_Msk (0x1Ul << ATIM_CCMR_OCPE_Pos) +#define ATIM_CCMR_OCPE ATIM_CCMR_OCPE_Msk + +#define ATIM_CCMR_OCFE_Pos (2U) +#define ATIM_CCMR_OCFE_Msk (0x1Ul << ATIM_CCMR_OCFE_Pos) +#define ATIM_CCMR_OCFE ATIM_CCMR_OCFE_Msk + +#define ATIM_CCMR_ICF_Pos (4U) +#define ATIM_CCMR_ICF_Msk (0xfUl << ATIM_CCMR_ICF_Pos) +#define ATIM_CCMR_ICF ATIM_CCMR_ICF_Msk + +#define ATIM_CCMR_ICPSC_Pos (2U) +#define ATIM_CCMR_ICPSC_Msk (0x3Ul << ATIM_CCMR_ICPSC_Pos) +#define ATIM_CCMR_ICPSC ATIM_CCMR_ICPSC_Msk + +#define ATIM_CCMR_CCS_Pos (0U) +#define ATIM_CCMR_CCS_Msk (0x3Ul << ATIM_CCMR_CCS_Pos) +#define ATIM_CCMR_CCS ATIM_CCMR_CCS_Msk + +#define ATIM_CCER_CCNP_Pos (3U) +#define ATIM_CCER_CCNP_Msk (0x1Ul << ATIM_CCER_CCNP_Pos) +#define ATIM_CCER_CCNP ATIM_CCER_CCNP_Msk + +#define ATIM_CCER_CCNE_Pos (2U) +#define ATIM_CCER_CCNE_Msk (0x1Ul << ATIM_CCER_CCNE_Pos) +#define ATIM_CCER_CCNE ATIM_CCER_CCNE_Msk + +#define ATIM_CCER_CCOP_Pos (1U) +#define ATIM_CCER_CCOP_Msk (0x1Ul << ATIM_CCER_CCOP_Pos) +#define ATIM_CCER_CCOP ATIM_CCER_CCOP_Msk + +#define ATIM_CCER_CCIP_Pos (1U) +#define ATIM_CCER_CCIP_Msk (0x1Ul << ATIM_CCER_CCIP_Pos) +#define ATIM_CCER_CCIP ATIM_CCER_CCIP_Msk + +#define ATIM_CCER_CCOE_Pos (0U) +#define ATIM_CCER_CCOE_Msk (0x1Ul << ATIM_CCER_CCOE_Pos) +#define ATIM_CCER_CCOE ATIM_CCER_CCOE_Msk + +#define ATIM_CCER_CCIE_Pos (0U) +#define ATIM_CCER_CCIE_Msk (0x1Ul << ATIM_CCER_CCIE_Pos) +#define ATIM_CCER_CCIE ATIM_CCER_CCIE_Msk + +#define ATIM_BDTR_MOE_Pos (15U) +#define ATIM_BDTR_MOE_Msk (0x1Ul << ATIM_BDTR_MOE_Pos) +#define ATIM_BDTR_MOE ATIM_BDTR_MOE_Msk + +#define ATIM_BDTR_AOE_Pos (14U) +#define ATIM_BDTR_AOE_Msk (0x1Ul << ATIM_BDTR_AOE_Pos) +#define ATIM_BDTR_AOE ATIM_BDTR_AOE_Msk + +#define ATIM_BDTR_BKP_Pos (13U) +#define ATIM_BDTR_BKP_Msk (0x1Ul << ATIM_BDTR_BKP_Pos) +#define ATIM_BDTR_BKP ATIM_BDTR_BKP_Msk + +#define ATIM_BDTR_BKE_Pos (12Ul) +#define ATIM_BDTR_BKE_Msk (0x1Ul << ATIM_BDTR_BKE_Pos) +#define ATIM_BDTR_BKE ATIM_BDTR_BKE_Msk + +#define ATIM_BDTR_OSSR_Pos (11U) +#define ATIM_BDTR_OSSR_Msk (0x1Ul << ATIM_BDTR_OSSR_Pos) +#define ATIM_BDTR_OSSR ATIM_BDTR_OSSR_Msk + +#define ATIM_BDTR_OSSI_Pos (10U) +#define ATIM_BDTR_OSSI_Msk (0x1Ul << ATIM_BDTR_OSSI_Pos) +#define ATIM_BDTR_OSSI ATIM_BDTR_OSSI_Msk + +#define ATIM_BDTR_LOCK_Pos (8U) +#define ATIM_BDTR_LOCK_Msk (0x3Ul << ATIM_BDTR_LOCK_Pos) +#define ATIM_BDTR_LOCK ATIM_BDTR_LOCK_Msk + +#define ATIM_BDTR_DTG_Pos (0U) +#define ATIM_BDTR_DTG_Msk (0xffUl << ATIM_BDTR_DTG_Pos) +#define ATIM_BDTR_DTG ATIM_BDTR_DTG_Msk + +#define ATIM_BKCR_BRK1GATE_Pos (8U) +#define ATIM_BKCR_BRK1GATE_Msk (0x1Ul << ATIM_BKCR_BRK1GATE_Pos) +#define ATIM_BKCR_BRK1GATE ATIM_BKCR_BRK1GATE_Msk + +#define ATIM_BKCR_BRK2GATE_Pos (9U) +#define ATIM_BKCR_BRK2GATE_Msk (0x1Ul << ATIM_BKCR_BRK2GATE_Pos) +#define ATIM_BKCR_BRK2GATE ATIM_BKCR_BRK2GATE_Msk + +#define ATIM_BKCR_BRKF_Pos (4U) +#define ATIM_BKCR_BRKF_Msk (0xfUl << ATIM_BKCR_BRKF_Pos) +#define ATIM_BKCR_BRKF ATIM_BKCR_BRKF_Msk + +#define ATIM_BKCR_BRKCOMB_Pos (3U) +#define ATIM_BKCR_BRKCOMB_Msk (0x1Ul << ATIM_BKCR_BRKCOMB_Pos) +#define ATIM_BKCR_BRKCOMB ATIM_BKCR_BRKCOMB_Msk + +#define ATIM_BKCR_HFDET_BRKEN_Pos (2U) +#define ATIM_BKCR_HFDET_BRKEN_Msk (0x1Ul << ATIM_BKCR_HFDET_BRKEN_Pos) +#define ATIM_BKCR_HFDET_BRKEN ATIM_BKCR_HFDET_BRKEN_Msk + +#define ATIM_BKCR_SVD_BRKEN_Pos (1U) +#define ATIM_BKCR_SVD_BRKEN_Msk (0x1Ul << ATIM_BKCR_SVD_BRKEN_Pos) +#define ATIM_BKCR_SVD_BRKEN ATIM_BKCR_SVD_BRKEN_Msk + +#define ATIM_BKCR_COMP_BRKEN_Pos (0U) +#define ATIM_BKCR_COMP_BRKEN_Msk (0x1Ul << ATIM_BKCR_COMP_BRKEN_Pos) +#define ATIM_BKCR_COMP_BRKEN ATIM_BKCR_COMP_BRKEN_Msk + + + +#define FL_ATIM_CHANNEL_1 0x0Ul +#define FL_ATIM_CHANNEL_2 0x1Ul +#define FL_ATIM_CHANNEL_3 0x2Ul +#define FL_ATIM_CHANNEL_4 0x3Ul + + + +#define FL_ATIM_CLK_DIVISION_DIV1 (0x0Ul << ATIM_CR1_CKD_Pos) +#define FL_ATIM_CLK_DIVISION_DIV2 (0x1Ul << ATIM_CR1_CKD_Pos) +#define FL_ATIM_CLK_DIVISION_DIV4 (0x2Ul << ATIM_CR1_CKD_Pos) + + +#define FL_ATIM_COUNTER_ALIGNED_EDGE (0x0Ul << ATIM_CR1_CMS_Pos) +#define FL_ATIM_COUNTER_ALIGNED_CENTER_DOWN (0x1Ul << ATIM_CR1_CMS_Pos) +#define FL_ATIM_COUNTER_ALIGNED_CENTER_UP (0x2Ul << ATIM_CR1_CMS_Pos) +#define FL_ATIM_COUNTER_ALIGNED_CENTER_UP_DOWN (0x3Ul << ATIM_CR1_CMS_Pos) + + +#define FL_ATIM_COUNTER_DIR_UP (0x0Ul << ATIM_CR1_DIR_Pos) +#define FL_ATIM_COUNTER_DIR_DOWN (0x1Ul << ATIM_CR1_DIR_Pos) + + +#define FL_ATIM_ONE_PULSE_MODE_CONTINUOUS (0x0Ul << ATIM_CR1_OPM_Pos) +#define FL_ATIM_ONE_PULSE_MODE_SINGLE (0x1Ul << ATIM_CR1_OPM_Pos) + + +#define FL_ATIM_UPDATE_SOURCE_REGULAR (0x0Ul << ATIM_CR1_URS_Pos) +#define FL_ATIM_UPDATE_SOURCE_COUNTER (0x1Ul << ATIM_CR1_URS_Pos) + + +#define FL_ATIM_OCN_IDLE_STATE_LOW (0x0Ul << ATIM_CR2_OISN_Pos) +#define FL_ATIM_OCN_IDLE_STATE_HIGH (0x1Ul << ATIM_CR2_OISN_Pos) + + +#define FL_ATIM_OC_IDLE_STATE_LOW (0x0Ul << ATIM_CR2_OIS_Pos) +#define FL_ATIM_OC_IDLE_STATE_HIGH (0x1Ul << ATIM_CR2_OIS_Pos) + + +#define FL_ATIM_TRGO_RESET (0x0Ul << ATIM_CR2_MMS_Pos) +#define FL_ATIM_TRGO_ENABLE (0x1Ul << ATIM_CR2_MMS_Pos) +#define FL_ATIM_TRGO_UPDATE (0x2Ul << ATIM_CR2_MMS_Pos) +#define FL_ATIM_TRGO_CC1IF (0x3Ul << ATIM_CR2_MMS_Pos) +#define FL_ATIM_TRGO_OC1REF (0x4Ul << ATIM_CR2_MMS_Pos) +#define FL_ATIM_TRGO_OC2REF (0x5Ul << ATIM_CR2_MMS_Pos) +#define FL_ATIM_TRGO_OC3REF (0x6Ul << ATIM_CR2_MMS_Pos) +#define FL_ATIM_TRGO_OC4REF (0x7Ul << ATIM_CR2_MMS_Pos) + + +#define FL_ATIM_DMA_REQ_CC (0x0Ul << ATIM_CR2_CCDS_Pos) +#define FL_ATIM_DMA_REQ_UPDATE (0x1Ul << ATIM_CR2_CCDS_Pos) + + +#define FL_ATIM_UPDATE_SOURCE_COMG_ONLY (0x0Ul << ATIM_CR2_CCUS_Pos) +#define FL_ATIM_UPDATE_SOURCE_COMG_AND_TRGI (0x1Ul << ATIM_CR2_CCUS_Pos) + + +#define FL_ATIM_ETR_POLARITY_NORMAL (0x0Ul << ATIM_SMCR_ETP_Pos) +#define FL_ATIM_ETR_POLARITY_INVERT (0x1Ul << ATIM_SMCR_ETP_Pos) + + +#define FL_ATIM_ETR_PSC_DIV1 (0x0Ul << ATIM_SMCR_ETPS_Pos) +#define FL_ATIM_ETR_PSC_DIV2 (0x1Ul << ATIM_SMCR_ETPS_Pos) +#define FL_ATIM_ETR_PSC_DIV4 (0x2Ul << ATIM_SMCR_ETPS_Pos) +#define FL_ATIM_ETR_PSC_DIV8 (0x3Ul << ATIM_SMCR_ETPS_Pos) + + +#define FL_ATIM_ETR_FILTER_DIV1 (0x0Ul << ATIM_SMCR_ETF_Pos) +#define FL_ATIM_ETR_FILTER_DIV1_N2 (0x1Ul << ATIM_SMCR_ETF_Pos) +#define FL_ATIM_ETR_FILTER_DIV1_N4 (0x2Ul << ATIM_SMCR_ETF_Pos) +#define FL_ATIM_ETR_FILTER_DIV1_N8 (0x3Ul << ATIM_SMCR_ETF_Pos) +#define FL_ATIM_ETR_FILTER_DIV2_N6 (0x4Ul << ATIM_SMCR_ETF_Pos) +#define FL_ATIM_ETR_FILTER_DIV2_N8 (0x5Ul << ATIM_SMCR_ETF_Pos) +#define FL_ATIM_ETR_FILTER_DIV4_N6 (0x6Ul << ATIM_SMCR_ETF_Pos) +#define FL_ATIM_ETR_FILTER_DIV4_N8 (0x7Ul << ATIM_SMCR_ETF_Pos) +#define FL_ATIM_ETR_FILTER_DIV8_N6 (0x8Ul << ATIM_SMCR_ETF_Pos) +#define FL_ATIM_ETR_FILTER_DIV8_N8 (0x9Ul << ATIM_SMCR_ETF_Pos) +#define FL_ATIM_ETR_FILTER_DIV16_N5 (0xaUl << ATIM_SMCR_ETF_Pos) +#define FL_ATIM_ETR_FILTER_DIV16_N6 (0xbUl << ATIM_SMCR_ETF_Pos) +#define FL_ATIM_ETR_FILTER_DIV16_N8 (0xcUl << ATIM_SMCR_ETF_Pos) +#define FL_ATIM_ETR_FILTER_DIV32_N5 (0xdUl << ATIM_SMCR_ETF_Pos) +#define FL_ATIM_ETR_FILTER_DIV32_N6 (0xeUl << ATIM_SMCR_ETF_Pos) +#define FL_ATIM_ETR_FILTER_DIV32_N8 (0xfUl << ATIM_SMCR_ETF_Pos) + + +#define FL_ATIM_TRGI_ITR0 (0x0Ul << ATIM_SMCR_TS_Pos) +#define FL_ATIM_TRGI_ITR1 (0x1Ul << ATIM_SMCR_TS_Pos) +#define FL_ATIM_TRGI_ITR2 (0x2Ul << ATIM_SMCR_TS_Pos) +#define FL_ATIM_TRGI_ITR3 (0x3Ul << ATIM_SMCR_TS_Pos) +#define FL_ATIM_TRGI_TI1F_EDGE (0x4Ul << ATIM_SMCR_TS_Pos) +#define FL_ATIM_TRGI_TI1FP1 (0x5Ul << ATIM_SMCR_TS_Pos) +#define FL_ATIM_TRGI_TI2FP2 (0x6Ul << ATIM_SMCR_TS_Pos) +#define FL_ATIM_TRGI_ETRF (0x7Ul << ATIM_SMCR_TS_Pos) + + +#define FL_ATIM_SLAVE_MODE_PROHIBITED (0x0Ul << ATIM_SMCR_SMS_Pos) +#define FL_ATIM_SLAVE_MODE_ENCODER_X2_TI1 (0x1Ul << ATIM_SMCR_SMS_Pos) +#define FL_ATIM_SLAVE_MODE_ENCODER_X2_TI2 (0x2Ul << ATIM_SMCR_SMS_Pos) +#define FL_ATIM_SLAVE_MODE_ENCODER_X4_TI1TI2 (0x3Ul << ATIM_SMCR_SMS_Pos) +#define FL_ATIM_SLAVE_MODE_TRGI_RISE_RST (0x4Ul << ATIM_SMCR_SMS_Pos) +#define FL_ATIM_SLAVE_MODE_TRGI_HIGH_RUN (0x5Ul << ATIM_SMCR_SMS_Pos) +#define FL_ATIM_SLAVE_MODE_TRGI_RISE_RUN (0x6Ul << ATIM_SMCR_SMS_Pos) +#define FL_ATIM_SLAVE_MODE_TRGI_CLK (0x7Ul << ATIM_SMCR_SMS_Pos) + + +#define FL_ATIM_DMA_BURST_LENGTH_1 (0x0Ul << ATIM_DCR_DBL_Pos) +#define FL_ATIM_DMA_BURST_LENGTH_2 (0x1Ul << ATIM_DCR_DBL_Pos) +#define FL_ATIM_DMA_BURST_LENGTH_3 (0x2Ul << ATIM_DCR_DBL_Pos) +#define FL_ATIM_DMA_BURST_LENGTH_4 (0x3Ul << ATIM_DCR_DBL_Pos) +#define FL_ATIM_DMA_BURST_LENGTH_5 (0x4Ul << ATIM_DCR_DBL_Pos) +#define FL_ATIM_DMA_BURST_LENGTH_6 (0x5Ul << ATIM_DCR_DBL_Pos) +#define FL_ATIM_DMA_BURST_LENGTH_7 (0x6Ul << ATIM_DCR_DBL_Pos) +#define FL_ATIM_DMA_BURST_LENGTH_8 (0x7Ul << ATIM_DCR_DBL_Pos) +#define FL_ATIM_DMA_BURST_LENGTH_9 (0x8Ul << ATIM_DCR_DBL_Pos) +#define FL_ATIM_DMA_BURST_LENGTH_10 (0x9Ul << ATIM_DCR_DBL_Pos) +#define FL_ATIM_DMA_BURST_LENGTH_11 (0xaUl << ATIM_DCR_DBL_Pos) +#define FL_ATIM_DMA_BURST_LENGTH_12 (0xbUl << ATIM_DCR_DBL_Pos) +#define FL_ATIM_DMA_BURST_LENGTH_13 (0xcUl << ATIM_DCR_DBL_Pos) +#define FL_ATIM_DMA_BURST_LENGTH_14 (0xdUl << ATIM_DCR_DBL_Pos) +#define FL_ATIM_DMA_BURST_LENGTH_15 (0xeUl << ATIM_DCR_DBL_Pos) +#define FL_ATIM_DMA_BURST_LENGTH_16 (0xfUl << ATIM_DCR_DBL_Pos) +#define FL_ATIM_DMA_BURST_LENGTH_17 (0x10Ul << ATIM_DCR_DBL_Pos) +#define FL_ATIM_DMA_BURST_LENGTH_18 (0x11Ul << ATIM_DCR_DBL_Pos) + + +#define FL_ATIM_DMA_BURST_ADDR_CR1 (0x0Ul << ATIM_DCR_DBA_Pos) +#define FL_ATIM_DMA_BURST_ADDR_CR2 (0x1Ul << ATIM_DCR_DBA_Pos) +#define FL_ATIM_DMA_BURST_ADDR_SMCR (0x2Ul << ATIM_DCR_DBA_Pos) +#define FL_ATIM_DMA_BURST_ADDR_DIER (0x3Ul << ATIM_DCR_DBA_Pos) +#define FL_ATIM_DMA_BURST_ADDR_SR (0x4Ul << ATIM_DCR_DBA_Pos) +#define FL_ATIM_DMA_BURST_ADDR_EGR (0x5Ul << ATIM_DCR_DBA_Pos) +#define FL_ATIM_DMA_BURST_ADDR_CCMR1 (0x6Ul << ATIM_DCR_DBA_Pos) +#define FL_ATIM_DMA_BURST_ADDR_CCMR2 (0x7Ul << ATIM_DCR_DBA_Pos) +#define FL_ATIM_DMA_BURST_ADDR_CCER (0x8Ul << ATIM_DCR_DBA_Pos) +#define FL_ATIM_DMA_BURST_ADDR_CNT (0x9Ul << ATIM_DCR_DBA_Pos) +#define FL_ATIM_DMA_BURST_ADDR_PSC (0xaUl << ATIM_DCR_DBA_Pos) +#define FL_ATIM_DMA_BURST_ADDR_ARR (0xbUl << ATIM_DCR_DBA_Pos) +#define FL_ATIM_DMA_BURST_ADDR_RCR (0xcUl << ATIM_DCR_DBA_Pos) +#define FL_ATIM_DMA_BURST_ADDR_CCR1 (0xdUl << ATIM_DCR_DBA_Pos) +#define FL_ATIM_DMA_BURST_ADDR_CCR2 (0xeUl << ATIM_DCR_DBA_Pos) +#define FL_ATIM_DMA_BURST_ADDR_CCR3 (0xfUl << ATIM_DCR_DBA_Pos) +#define FL_ATIM_DMA_BURST_ADDR_CCR4 (0x10Ul << ATIM_DCR_DBA_Pos) +#define FL_ATIM_DMA_BURST_ADDR_BDTR (0x11Ul << ATIM_DCR_DBA_Pos) + + +#define FL_ATIM_OC_MODE_FROZEN (0x0Ul << ATIM_CCMR_OCM_Pos) +#define FL_ATIM_OC_MODE_ACTIVE (0x1Ul << ATIM_CCMR_OCM_Pos) +#define FL_ATIM_OC_MODE_INACTIVE (0x2Ul << ATIM_CCMR_OCM_Pos) +#define FL_ATIM_OC_MODE_TOGGLE (0x3Ul << ATIM_CCMR_OCM_Pos) +#define FL_ATIM_OC_MODE_FORCED_INACTIVE (0x4Ul << ATIM_CCMR_OCM_Pos) +#define FL_ATIM_OC_MODE_FORCED_ACTIVE (0x5Ul << ATIM_CCMR_OCM_Pos) +#define FL_ATIM_OC_MODE_PWM1 (0x6Ul << ATIM_CCMR_OCM_Pos) +#define FL_ATIM_OC_MODE_PWM2 (0x7Ul << ATIM_CCMR_OCM_Pos) + + +#define FL_ATIM_IC_FILTER_DIV1 (0x0Ul << ATIM_CCMR_ICF_Pos) +#define FL_ATIM_IC_FILTER_DIV1_N2 (0x1Ul << ATIM_CCMR_ICF_Pos) +#define FL_ATIM_IC_FILTER_DIV1_N4 (0x2Ul << ATIM_CCMR_ICF_Pos) +#define FL_ATIM_IC_FILTER_DIV1_N8 (0x3Ul << ATIM_CCMR_ICF_Pos) +#define FL_ATIM_IC_FILTER_DIV2_N6 (0x4Ul << ATIM_CCMR_ICF_Pos) +#define FL_ATIM_IC_FILTER_DIV2_N8 (0x5Ul << ATIM_CCMR_ICF_Pos) +#define FL_ATIM_IC_FILTER_DIV4_N6 (0x6Ul << ATIM_CCMR_ICF_Pos) +#define FL_ATIM_IC_FILTER_DIV4_N8 (0x7Ul << ATIM_CCMR_ICF_Pos) +#define FL_ATIM_IC_FILTER_DIV8_N6 (0x8Ul << ATIM_CCMR_ICF_Pos) +#define FL_ATIM_IC_FILTER_DIV8_N8 (0x9Ul << ATIM_CCMR_ICF_Pos) +#define FL_ATIM_IC_FILTER_DIV16_N5 (0xaUl << ATIM_CCMR_ICF_Pos) +#define FL_ATIM_IC_FILTER_DIV16_N6 (0xbUl << ATIM_CCMR_ICF_Pos) +#define FL_ATIM_IC_FILTER_DIV16_N8 (0xcUl << ATIM_CCMR_ICF_Pos) +#define FL_ATIM_IC_FILTER_DIV32_N5 (0xdUl << ATIM_CCMR_ICF_Pos) +#define FL_ATIM_IC_FILTER_DIV32_N6 (0xeUl << ATIM_CCMR_ICF_Pos) +#define FL_ATIM_IC_FILTER_DIV32_N8 (0xfUl << ATIM_CCMR_ICF_Pos) + + +#define FL_ATIM_IC_PSC_DIV1 (0x0Ul << ATIM_CCMR_ICPSC_Pos) +#define FL_ATIM_IC_PSC_DIV2 (0x1Ul << ATIM_CCMR_ICPSC_Pos) +#define FL_ATIM_IC_PSC_DIV4 (0x2Ul << ATIM_CCMR_ICPSC_Pos) +#define FL_ATIM_IC_PSC_DIV8 (0x3Ul << ATIM_CCMR_ICPSC_Pos) + + +#define FL_ATIM_CHANNEL_MODE_OUTPUT (0x0Ul << ATIM_CCMR_CCS_Pos) +#define FL_ATIM_CHANNEL_MODE_INPUT_NORMAL (0x1Ul << ATIM_CCMR_CCS_Pos) +#define FL_ATIM_CHANNEL_MODE_INPUT_CROSSOVER (0x2Ul << ATIM_CCMR_CCS_Pos) +#define FL_ATIM_CHANNEL_MODE_INPUT_TRC (0x3Ul << ATIM_CCMR_CCS_Pos) + + +#define FL_ATIM_OCN_POLARITY_NORMAL (0x0Ul << ATIM_CCER_CCNP_Pos) +#define FL_ATIM_OCN_POLARITY_INVERT (0x1Ul << ATIM_CCER_CCNP_Pos) + + +#define FL_ATIM_OC_POLARITY_NORMAL (0x0Ul << ATIM_CCER_CCOP_Pos) +#define FL_ATIM_OC_POLARITY_INVERT (0x1Ul << ATIM_CCER_CCOP_Pos) + + +#define FL_ATIM_IC_POLARITY_NORMAL (0x0Ul << ATIM_CCER_CCIP_Pos) +#define FL_ATIM_IC_POLARITY_INVERT (0x1Ul << ATIM_CCER_CCIP_Pos) + + +#define FL_ATIM_BREAK_POLARITY_LOW (0x0Ul << ATIM_BDTR_BKP_Pos) +#define FL_ATIM_BREAK_POLARITY_HIGH (0x1Ul << ATIM_BDTR_BKP_Pos) + + +#define FL_ATIM_OSSR_DISABLE (0x0Ul << ATIM_BDTR_OSSR_Pos) +#define FL_ATIM_OSSR_ENABLE (0x1Ul << ATIM_BDTR_OSSR_Pos) + + +#define FL_ATIM_OSSI_DISABLE (0x0Ul << ATIM_BDTR_OSSI_Pos) +#define FL_ATIM_OSSI_ENABLE (0x1Ul << ATIM_BDTR_OSSI_Pos) + + +#define FL_ATIM_LOCK_LEVEL_OFF (0x0Ul << ATIM_BDTR_LOCK_Pos) +#define FL_ATIM_LOCK_LEVEL_1 (0x1Ul << ATIM_BDTR_LOCK_Pos) +#define FL_ATIM_LOCK_LEVEL_2 (0x2Ul << ATIM_BDTR_LOCK_Pos) +#define FL_ATIM_LOCK_LEVEL_3 (0x3Ul << ATIM_BDTR_LOCK_Pos) + + +#define FL_ATIM_BREAK1_GATE_LOW (0x0Ul << ATIM_BKCR_BRK1GATE_Pos) +#define FL_ATIM_BREAK1_GATE_AUTO (0x1Ul << ATIM_BKCR_BRK1GATE_Pos) + + +#define FL_ATIM_BREAK2_GATE_LOW (0x0Ul << ATIM_BKCR_BRK2GATE_Pos) +#define FL_ATIM_BREAK2_GATE_AUTO (0x1Ul << ATIM_BKCR_BRK2GATE_Pos) + + +#define FL_ATIM_BREAK_FILTER_DIV1 (0x0Ul << ATIM_BKCR_BRKF_Pos) +#define FL_ATIM_BREAK_FILTER_DIV1_N2 (0x1Ul << ATIM_BKCR_BRKF_Pos) +#define FL_ATIM_BREAK_FILTER_DIV1_N4 (0x2Ul << ATIM_BKCR_BRKF_Pos) +#define FL_ATIM_BREAK_FILTER_DIV1_N8 (0x3Ul << ATIM_BKCR_BRKF_Pos) +#define FL_ATIM_BREAK_FILTER_DIV2_N6 (0x4Ul << ATIM_BKCR_BRKF_Pos) +#define FL_ATIM_BREAK_FILTER_DIV2_N8 (0x5Ul << ATIM_BKCR_BRKF_Pos) +#define FL_ATIM_BREAK_FILTER_DIV4_N6 (0x6Ul << ATIM_BKCR_BRKF_Pos) +#define FL_ATIM_BREAK_FILTER_DIV4_N8 (0x7Ul << ATIM_BKCR_BRKF_Pos) +#define FL_ATIM_BREAK_FILTER_DIV8_N6 (0x8Ul << ATIM_BKCR_BRKF_Pos) +#define FL_ATIM_BREAK_FILTER_DIV8_N8 (0x9Ul << ATIM_BKCR_BRKF_Pos) +#define FL_ATIM_BREAK_FILTER_DIV16_N5 (0xaUl << ATIM_BKCR_BRKF_Pos) +#define FL_ATIM_BREAK_FILTER_DIV16_N6 (0xbUl << ATIM_BKCR_BRKF_Pos) +#define FL_ATIM_BREAK_FILTER_DIV16_N8 (0xcUl << ATIM_BKCR_BRKF_Pos) +#define FL_ATIM_BREAK_FILTER_DIV32_N5 (0xdUl << ATIM_BKCR_BRKF_Pos) +#define FL_ATIM_BREAK_FILTER_DIV32_N6 (0xeUl << ATIM_BKCR_BRKF_Pos) +#define FL_ATIM_BREAK_FILTER_DIV32_N8 (0xfUl << ATIM_BKCR_BRKF_Pos) + + +#define FL_ATIM_BREAK_COMBINATION_OR (0x0Ul << ATIM_BKCR_BRKCOMB_Pos) +#define FL_ATIM_BREAK_COMBINATION_AND (0x1Ul << ATIM_BKCR_BRKCOMB_Pos) + + +/** + * @} + */ +/* Exported functions ---------------------------------------------------------------------------------*/ +/** @defgroup ATIM_FL_Exported_Functions ATIM Exported Functions + * @{ + */ + +/** + * @brief 设置时钟分频因子 + * @rmtoll CR1 CKD FL_ATIM_SetClockDivision + * @param TIMx TIM instance + * @param div This parameter can be one of the following values: + * @arg @ref FL_ATIM_CLK_DIVISION_DIV1 + * @arg @ref FL_ATIM_CLK_DIVISION_DIV2 + * @arg @ref FL_ATIM_CLK_DIVISION_DIV4 + * @retval None + */ +__STATIC_INLINE void FL_ATIM_SetClockDivision(ATIM_Type *TIMx, uint32_t div) +{ + MODIFY_REG(TIMx->CR1, ATIM_CR1_CKD_Msk, div); +} + +/** + * @brief 读取时钟分频因子 + * @rmtoll CR1 CKD FL_ATIM_GetClockDivision + * @param TIMx TIM instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_ATIM_CLK_DIVISION_DIV1 + * @arg @ref FL_ATIM_CLK_DIVISION_DIV2 + * @arg @ref FL_ATIM_CLK_DIVISION_DIV4 + */ +__STATIC_INLINE uint32_t FL_ATIM_GetClockDivision(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->CR1, ATIM_CR1_CKD_Msk)); +} + +/** + * @brief 自动重装载使能 + * @rmtoll CR1 ARPE FL_ATIM_EnableARRPreload + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_ATIM_EnableARRPreload(ATIM_Type *TIMx) +{ + SET_BIT(TIMx->CR1, ATIM_CR1_ARPE_Msk); +} + +/** + * @brief 获取自动重装载使能状态 + * @rmtoll CR1 ARPE FL_ATIM_IsEnabledARRPreload + * @param TIMx TIM instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ATIM_IsEnabledARRPreload(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->CR1, ATIM_CR1_ARPE_Msk) == ATIM_CR1_ARPE_Msk); +} + +/** + * @brief 自动重装载禁用 + * @rmtoll CR1 ARPE FL_ATIM_DisableARRPreload + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_ATIM_DisableARRPreload(ATIM_Type *TIMx) +{ + CLEAR_BIT(TIMx->CR1, ATIM_CR1_ARPE_Msk); +} + +/** + * @brief 计数器对齐模式设置 + * @rmtoll CR1 CMS FL_ATIM_SetCounterAlignedMode + * @param TIMx TIM instance + * @param mode This parameter can be one of the following values: + * @arg @ref FL_ATIM_COUNTER_ALIGNED_EDGE + * @arg @ref FL_ATIM_COUNTER_ALIGNED_CENTER_DOWN + * @arg @ref FL_ATIM_COUNTER_ALIGNED_CENTER_UP + * @arg @ref FL_ATIM_COUNTER_ALIGNED_CENTER_UP_DOWN + * @retval None + */ +__STATIC_INLINE void FL_ATIM_SetCounterAlignedMode(ATIM_Type *TIMx, uint32_t mode) +{ + MODIFY_REG(TIMx->CR1, ATIM_CR1_CMS_Msk, mode); +} + +/** + * @brief 读取计数器对齐模式 + * @rmtoll CR1 CMS FL_ATIM_GetCounterAlignedMode + * @param TIMx TIM instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_ATIM_COUNTER_ALIGNED_EDGE + * @arg @ref FL_ATIM_COUNTER_ALIGNED_CENTER_DOWN + * @arg @ref FL_ATIM_COUNTER_ALIGNED_CENTER_UP + * @arg @ref FL_ATIM_COUNTER_ALIGNED_CENTER_UP_DOWN + */ +__STATIC_INLINE uint32_t FL_ATIM_GetCounterAlignedMode(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->CR1, ATIM_CR1_CMS_Msk)); +} + +/** + * @brief 设置记数方向 + * @rmtoll CR1 DIR FL_ATIM_SetCounterDirection + * @param TIMx TIM instance + * @param dir This parameter can be one of the following values: + * @arg @ref FL_ATIM_COUNTER_DIR_UP + * @arg @ref FL_ATIM_COUNTER_DIR_DOWN + * @retval None + */ +__STATIC_INLINE void FL_ATIM_SetCounterDirection(ATIM_Type *TIMx, uint32_t dir) +{ + MODIFY_REG(TIMx->CR1, ATIM_CR1_DIR_Msk, dir); +} + +/** + * @brief 读取记数方向 + * @rmtoll CR1 DIR FL_ATIM_GetCounterDirection + * @param TIMx TIM instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_ATIM_COUNTER_DIR_UP + * @arg @ref FL_ATIM_COUNTER_DIR_DOWN + */ +__STATIC_INLINE uint32_t FL_ATIM_GetCounterDirection(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->CR1, ATIM_CR1_DIR_Msk)); +} + +/** + * @brief 设置单脉冲输出模式 + * @rmtoll CR1 OPM FL_ATIM_SetOnePulseMode + * @param TIMx TIM instance + * @param mode This parameter can be one of the following values: + * @arg @ref FL_ATIM_ONE_PULSE_MODE_CONTINUOUS + * @arg @ref FL_ATIM_ONE_PULSE_MODE_SINGLE + * @retval None + */ +__STATIC_INLINE void FL_ATIM_SetOnePulseMode(ATIM_Type *TIMx, uint32_t mode) +{ + MODIFY_REG(TIMx->CR1, ATIM_CR1_OPM_Msk, mode); +} + +/** + * @brief 读取单脉冲输出的模式 + * @rmtoll CR1 OPM FL_ATIM_GetOnePulseMode + * @param TIMx TIM instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_ATIM_ONE_PULSE_MODE_CONTINUOUS + * @arg @ref FL_ATIM_ONE_PULSE_MODE_SINGLE + */ +__STATIC_INLINE uint32_t FL_ATIM_GetOnePulseMode(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->CR1, ATIM_CR1_OPM_Msk)); +} + +/** + * @brief 设置更新请求源 + * @rmtoll CR1 URS FL_ATIM_SetUpdateSource + * @param TIMx TIM instance + * @param source This parameter can be one of the following values: + * @arg @ref FL_ATIM_UPDATE_SOURCE_REGULAR + * @arg @ref FL_ATIM_UPDATE_SOURCE_COUNTER + * @retval None + */ +__STATIC_INLINE void FL_ATIM_SetUpdateSource(ATIM_Type *TIMx, uint32_t source) +{ + MODIFY_REG(TIMx->CR1, ATIM_CR1_URS_Msk, source); +} + +/** + * @brief 读取更新请求源 + * @rmtoll CR1 URS FL_ATIM_GetUpdateSource + * @param TIMx TIM instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_ATIM_UPDATE_SOURCE_REGULAR + * @arg @ref FL_ATIM_UPDATE_SOURCE_COUNTER + */ +__STATIC_INLINE uint32_t FL_ATIM_GetUpdateSource(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->CR1, ATIM_CR1_URS_Msk)); +} + +/** + * @brief 使能更新事件 + * @rmtoll CR1 UDIS FL_ATIM_EnableUpdateEvent + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_ATIM_EnableUpdateEvent(ATIM_Type *TIMx) +{ + CLEAR_BIT(TIMx->CR1, ATIM_CR1_UDIS_Msk); +} + +/** + * @brief 读取更新事件状态 + * @rmtoll CR1 UDIS FL_ATIM_IsEnabledUpdateEvent + * @param TIMx TIM instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ATIM_IsEnabledUpdateEvent(ATIM_Type *TIMx) +{ + return (uint32_t)!(READ_BIT(TIMx->CR1, ATIM_CR1_UDIS_Msk) == ATIM_CR1_UDIS_Msk); +} + +/** + * @brief 禁用更新事件 + * @rmtoll CR1 UDIS FL_ATIM_DisableUpdateEvent + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_ATIM_DisableUpdateEvent(ATIM_Type *TIMx) +{ + SET_BIT(TIMx->CR1, ATIM_CR1_UDIS_Msk); +} + +/** + * @brief 计数器使能 + * @rmtoll CR1 CEN FL_ATIM_Enable + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_ATIM_Enable(ATIM_Type *TIMx) +{ + SET_BIT(TIMx->CR1, ATIM_CR1_CEN_Msk); +} + +/** + * @brief 读取计数器使能状态 + * @rmtoll CR1 CEN FL_ATIM_IsEnabled + * @param TIMx TIM instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ATIM_IsEnabled(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->CR1, ATIM_CR1_CEN_Msk) == ATIM_CR1_CEN_Msk); +} + +/** + * @brief 计数器关闭 + * @rmtoll CR1 CEN FL_ATIM_Disable + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_ATIM_Disable(ATIM_Type *TIMx) +{ + CLEAR_BIT(TIMx->CR1, ATIM_CR1_CEN_Msk); +} + +/** + * @brief 设置OCN的输出空闲状态 + * @note + * @rmtoll CR2 OISN FL_ATIM_OC_SetReverseChannelIdleState + * @param TIMx TIM instance + * @param OCNIdleState This parameter can be one of the following values: + * @arg @ref FL_ATIM_OCN_IDLE_STATE_LOW + * @arg @ref FL_ATIM_OCN_IDLE_STATE_HIGH + * @param channel This parameter can be one of the following values: + * @arg @ref FL_ATIM_CHANNEL_1 + * @arg @ref FL_ATIM_CHANNEL_2 + * @arg @ref FL_ATIM_CHANNEL_3 + * @retval None + */ +__STATIC_INLINE void FL_ATIM_OC_SetReverseChannelIdleState(ATIM_Type *TIMx, uint32_t OCNIdleState, uint32_t channel) +{ + MODIFY_REG(TIMx->CR2, (ATIM_CR2_OISN_Msk << (channel * 2)), OCNIdleState << (channel * 2)); +} + +/** + * @brief 读取OCN的输出空闲状态 + * @note + * @rmtoll CR2 OISN FL_ATIM_OC_GetReverseChannelIdleState + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_ATIM_CHANNEL_1 + * @arg @ref FL_ATIM_CHANNEL_2 + * @arg @ref FL_ATIM_CHANNEL_3 + * @retval Returned value can be one of the following values: + * @arg @ref FL_ATIM_OCN_IDLE_STATE_LOW + * @arg @ref FL_ATIM_OCN_IDLE_STATE_HIGH + */ +__STATIC_INLINE uint32_t FL_ATIM_OC_GetReverseChannelIdleState(ATIM_Type *TIMx, uint32_t channel) +{ + return (uint32_t)(READ_BIT(TIMx->CR2, (ATIM_CR2_OISN_Msk << (channel * 2)))); +} + +/** + * @brief 设置OC的输出空闲状态 + * @note + * @rmtoll CR2 OIS FL_ATIM_OC_SetChannelIdleState + * @param TIMx TIM instance + * @param OCIdleState This parameter can be one of the following values: + * @arg @ref FL_ATIM_OC_IDLE_STATE_LOW + * @arg @ref FL_ATIM_OC_IDLE_STATE_HIGH + * @param channel This parameter can be one of the following values: + * @arg @ref FL_ATIM_CHANNEL_1 + * @arg @ref FL_ATIM_CHANNEL_2 + * @arg @ref FL_ATIM_CHANNEL_3 + * @arg @ref FL_ATIM_CHANNEL_4 + * @retval None + */ +__STATIC_INLINE void FL_ATIM_OC_SetChannelIdleState(ATIM_Type *TIMx, uint32_t OCIdleState, uint32_t channel) +{ + MODIFY_REG(TIMx->CR2, (ATIM_CR2_OIS_Msk << (channel * 2)), OCIdleState << (channel * 2)); +} + +/** + * @brief 读取OC的输出空闲状态 + * @note + * @rmtoll CR2 OIS FL_ATIM_OC_GetChannelIdleState + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_ATIM_CHANNEL_1 + * @arg @ref FL_ATIM_CHANNEL_2 + * @arg @ref FL_ATIM_CHANNEL_3 + * @arg @ref FL_ATIM_CHANNEL_4 + * @retval Returned value can be one of the following values: + * @arg @ref FL_ATIM_OC_IDLE_STATE_LOW + * @arg @ref FL_ATIM_OC_IDLE_STATE_HIGH + */ +__STATIC_INLINE uint32_t FL_ATIM_OC_GetChannelIdleState(ATIM_Type *TIMx, uint32_t channel) +{ + return (uint32_t)(READ_BIT(TIMx->CR2, (ATIM_CR2_OIS_Msk << (channel * 2)))); +} + +/** + * @brief 通道1输入源选择 + * @rmtoll CR2 TI1S FL_ATIM_IC_EnableXORCombination + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_ATIM_IC_EnableXORCombination(ATIM_Type *TIMx) +{ + SET_BIT(TIMx->CR2, ATIM_CR2_TI1S_Msk); +} + +/** + * @brief 读取通道1输入源 + * @rmtoll CR2 TI1S FL_ATIM_IC_IsEnabledXORCombination + * @param TIMx TIM instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ATIM_IC_IsEnabledXORCombination(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->CR2, ATIM_CR2_TI1S_Msk) == ATIM_CR2_TI1S_Msk); +} + +/** + * @brief 通道1输入源禁用XOR组合 + * @rmtoll CR2 TI1S FL_ATIM_IC_DisableXORCombination + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_ATIM_IC_DisableXORCombination(ATIM_Type *TIMx) +{ + CLEAR_BIT(TIMx->CR2, ATIM_CR2_TI1S_Msk); +} + +/** + * @brief 设置同步触发信号源 + * @rmtoll CR2 MMS FL_ATIM_SetTriggerOutput + * @param TIMx TIM instance + * @param triggerOutput This parameter can be one of the following values: + * @arg @ref FL_ATIM_TRGO_RESET + * @arg @ref FL_ATIM_TRGO_ENABLE + * @arg @ref FL_ATIM_TRGO_UPDATE + * @arg @ref FL_ATIM_TRGO_CC1IF + * @arg @ref FL_ATIM_TRGO_OC1REF + * @arg @ref FL_ATIM_TRGO_OC2REF + * @arg @ref FL_ATIM_TRGO_OC3REF + * @arg @ref FL_ATIM_TRGO_OC4REF + * @retval None + */ +__STATIC_INLINE void FL_ATIM_SetTriggerOutput(ATIM_Type *TIMx, uint32_t triggerOutput) +{ + MODIFY_REG(TIMx->CR2, ATIM_CR2_MMS_Msk, triggerOutput); +} + +/** + * @brief 读取同步触发源 + * @rmtoll CR2 MMS FL_ATIM_GetTriggerOutput + * @param TIMx TIM instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_ATIM_TRGO_RESET + * @arg @ref FL_ATIM_TRGO_ENABLE + * @arg @ref FL_ATIM_TRGO_UPDATE + * @arg @ref FL_ATIM_TRGO_CC1IF + * @arg @ref FL_ATIM_TRGO_OC1REF + * @arg @ref FL_ATIM_TRGO_OC2REF + * @arg @ref FL_ATIM_TRGO_OC3REF + * @arg @ref FL_ATIM_TRGO_OC4REF + */ +__STATIC_INLINE uint32_t FL_ATIM_GetTriggerOutput(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->CR2, ATIM_CR2_MMS_Msk)); +} + +/** + * @brief 设置DMA请求触发 + * @rmtoll CR2 CCDS FL_ATIM_CC_SetDMAReqTrigger + * @param TIMx TIM instance + * @param trigger This parameter can be one of the following values: + * @arg @ref FL_ATIM_DMA_REQ_CC + * @arg @ref FL_ATIM_DMA_REQ_UPDATE + * @retval None + */ +__STATIC_INLINE void FL_ATIM_CC_SetDMAReqTrigger(ATIM_Type *TIMx, uint32_t trigger) +{ + MODIFY_REG(TIMx->CR2, ATIM_CR2_CCDS_Msk, trigger); +} + +/** + * @brief 读取DMA请求触发 + * @rmtoll CR2 CCDS FL_ATIM_CC_GetDMAReqTrigger + * @param TIMx TIM instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_ATIM_DMA_REQ_CC + * @arg @ref FL_ATIM_DMA_REQ_UPDATE + */ +__STATIC_INLINE uint32_t FL_ATIM_CC_GetDMAReqTrigger(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->CR2, ATIM_CR2_CCDS_Msk)); +} + +/** + * @brief 设置捕捉比较寄存器更新选择 + * @rmtoll CR2 CCUS FL_ATIM_CC_SetUpdateSource + * @param TIMx TIM instance + * @param updateSource This parameter can be one of the following values: + * @arg @ref FL_ATIM_UPDATE_SOURCE_COMG_ONLY + * @arg @ref FL_ATIM_UPDATE_SOURCE_COMG_AND_TRGI + * @retval None + */ +__STATIC_INLINE void FL_ATIM_CC_SetUpdateSource(ATIM_Type *TIMx, uint32_t updateSource) +{ + MODIFY_REG(TIMx->CR2, ATIM_CR2_CCUS_Msk, updateSource); +} + +/** + * @brief 读取捕捉比较寄存器更新源 + * @rmtoll CR2 CCUS FL_ATIM_CC_GetUpdateSource + * @param TIMx TIM instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_ATIM_UPDATE_SOURCE_COMG_ONLY + * @arg @ref FL_ATIM_UPDATE_SOURCE_COMG_AND_TRGI + */ +__STATIC_INLINE uint32_t FL_ATIM_CC_GetUpdateSource(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->CR2, ATIM_CR2_CCUS_Msk)); +} + +/** + * @brief 捕捉比较预装载使能 + * @rmtoll CR2 CCPC FL_ATIM_CC_EnablePreload + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_ATIM_CC_EnablePreload(ATIM_Type *TIMx) +{ + SET_BIT(TIMx->CR2, ATIM_CR2_CCPC_Msk); +} + +/** + * @brief 读取捕捉比较预装载使能状态 + * @rmtoll CR2 CCPC FL_ATIM_CC_IsEnabledPreload + * @param TIMx TIM instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ATIM_CC_IsEnabledPreload(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->CR2, ATIM_CR2_CCPC_Msk) == ATIM_CR2_CCPC_Msk); +} + +/** + * @brief 捕捉比较预装载失能 + * @rmtoll CR2 CCPC FL_ATIM_CC_DisablePreload + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_ATIM_CC_DisablePreload(ATIM_Type *TIMx) +{ + CLEAR_BIT(TIMx->CR2, ATIM_CR2_CCPC_Msk); +} + +/** + * @brief 设置外部触发信号极性 + * @rmtoll SMCR ETP FL_ATIM_SetETRPolarity + * @param TIMx TIM instance + * @param polarity This parameter can be one of the following values: + * @arg @ref FL_ATIM_ETR_POLARITY_NORMAL + * @arg @ref FL_ATIM_ETR_POLARITY_INVERT + * @retval None + */ +__STATIC_INLINE void FL_ATIM_SetETRPolarity(ATIM_Type *TIMx, uint32_t polarity) +{ + MODIFY_REG(TIMx->SMCR, ATIM_SMCR_ETP_Msk, polarity); +} + +/** + * @brief 读取外部触发信号极性 + * @rmtoll SMCR ETP FL_ATIM_GetETRPolarity + * @param TIMx TIM instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_ATIM_ETR_POLARITY_NORMAL + * @arg @ref FL_ATIM_ETR_POLARITY_INVERT + */ +__STATIC_INLINE uint32_t FL_ATIM_GetETRPolarity(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->SMCR, ATIM_SMCR_ETP_Msk)); +} + +/** + * @brief 外部时钟使能 + * @rmtoll SMCR ECE FL_ATIM_EnableExternalClock + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_ATIM_EnableExternalClock(ATIM_Type *TIMx) +{ + SET_BIT(TIMx->SMCR, ATIM_SMCR_ECE_Msk); +} + +/** + * @brief 读取外部时钟使能状态 + * @rmtoll SMCR ECE FL_ATIM_IsEnabledExternalClock + * @param TIMx TIM instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ATIM_IsEnabledExternalClock(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->SMCR, ATIM_SMCR_ECE_Msk) == ATIM_SMCR_ECE_Msk); +} + +/** + * @brief 外部时钟禁用 + * @rmtoll SMCR ECE FL_ATIM_DisableExternalClock + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_ATIM_DisableExternalClock(ATIM_Type *TIMx) +{ + CLEAR_BIT(TIMx->SMCR, ATIM_SMCR_ECE_Msk); +} + +/** + * @brief 设置外部触发信号预分频 + * @rmtoll SMCR ETPS FL_ATIM_SetETRPrescaler + * @param TIMx TIM instance + * @param psc This parameter can be one of the following values: + * @arg @ref FL_ATIM_ETR_PSC_DIV1 + * @arg @ref FL_ATIM_ETR_PSC_DIV2 + * @arg @ref FL_ATIM_ETR_PSC_DIV4 + * @arg @ref FL_ATIM_ETR_PSC_DIV8 + * @retval None + */ +__STATIC_INLINE void FL_ATIM_SetETRPrescaler(ATIM_Type *TIMx, uint32_t psc) +{ + MODIFY_REG(TIMx->SMCR, ATIM_SMCR_ETPS_Msk, psc); +} + +/** + * @brief 读取外部触发信号预分频 + * @rmtoll SMCR ETPS FL_ATIM_GetETRPrescaler + * @param TIMx TIM instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_ATIM_ETR_PSC_DIV1 + * @arg @ref FL_ATIM_ETR_PSC_DIV2 + * @arg @ref FL_ATIM_ETR_PSC_DIV4 + * @arg @ref FL_ATIM_ETR_PSC_DIV8 + */ +__STATIC_INLINE uint32_t FL_ATIM_GetETRPrescaler(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->SMCR, ATIM_SMCR_ETPS_Msk)); +} + +/** + * @brief 设置外部触发信号滤波时钟和长度 + * @rmtoll SMCR ETF FL_ATIM_SetETRFilter + * @param TIMx TIM instance + * @param filter This parameter can be one of the following values: + * @arg @ref FL_ATIM_ETR_FILTER_DIV1 + * @arg @ref FL_ATIM_ETR_FILTER_DIV1_N2 + * @arg @ref FL_ATIM_ETR_FILTER_DIV1_N4 + * @arg @ref FL_ATIM_ETR_FILTER_DIV1_N8 + * @arg @ref FL_ATIM_ETR_FILTER_DIV2_N6 + * @arg @ref FL_ATIM_ETR_FILTER_DIV2_N8 + * @arg @ref FL_ATIM_ETR_FILTER_DIV4_N6 + * @arg @ref FL_ATIM_ETR_FILTER_DIV4_N8 + * @arg @ref FL_ATIM_ETR_FILTER_DIV8_N6 + * @arg @ref FL_ATIM_ETR_FILTER_DIV8_N8 + * @arg @ref FL_ATIM_ETR_FILTER_DIV16_N5 + * @arg @ref FL_ATIM_ETR_FILTER_DIV16_N6 + * @arg @ref FL_ATIM_ETR_FILTER_DIV16_N8 + * @arg @ref FL_ATIM_ETR_FILTER_DIV32_N5 + * @arg @ref FL_ATIM_ETR_FILTER_DIV32_N6 + * @arg @ref FL_ATIM_ETR_FILTER_DIV32_N8 + * @retval None + */ +__STATIC_INLINE void FL_ATIM_SetETRFilter(ATIM_Type *TIMx, uint32_t filter) +{ + MODIFY_REG(TIMx->SMCR, ATIM_SMCR_ETF_Msk, filter); +} + +/** + * @brief 读取外部触发信号滤波时钟和长度 + * @rmtoll SMCR ETF FL_ATIM_GetETRFilter + * @param TIMx TIM instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_ATIM_ETR_FILTER_DIV1 + * @arg @ref FL_ATIM_ETR_FILTER_DIV1_N2 + * @arg @ref FL_ATIM_ETR_FILTER_DIV1_N4 + * @arg @ref FL_ATIM_ETR_FILTER_DIV1_N8 + * @arg @ref FL_ATIM_ETR_FILTER_DIV2_N6 + * @arg @ref FL_ATIM_ETR_FILTER_DIV2_N8 + * @arg @ref FL_ATIM_ETR_FILTER_DIV4_N6 + * @arg @ref FL_ATIM_ETR_FILTER_DIV4_N8 + * @arg @ref FL_ATIM_ETR_FILTER_DIV8_N6 + * @arg @ref FL_ATIM_ETR_FILTER_DIV8_N8 + * @arg @ref FL_ATIM_ETR_FILTER_DIV16_N5 + * @arg @ref FL_ATIM_ETR_FILTER_DIV16_N6 + * @arg @ref FL_ATIM_ETR_FILTER_DIV16_N8 + * @arg @ref FL_ATIM_ETR_FILTER_DIV32_N5 + * @arg @ref FL_ATIM_ETR_FILTER_DIV32_N6 + * @arg @ref FL_ATIM_ETR_FILTER_DIV32_N8 + */ +__STATIC_INLINE uint32_t FL_ATIM_GetETRFilter(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->SMCR, ATIM_SMCR_ETF_Msk)); +} + +/** + * @brief 主/从模式使能 + * @rmtoll SMCR MSM FL_ATIM_EnableMasterSlaveMode + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_ATIM_EnableMasterSlaveMode(ATIM_Type *TIMx) +{ + SET_BIT(TIMx->SMCR, ATIM_SMCR_MSM_Msk); +} + +/** + * @brief 读取主/从模式使能状态 + * @rmtoll SMCR MSM FL_ATIM_IsEnabledMasterSlaveMode + * @param TIMx TIM instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ATIM_IsEnabledMasterSlaveMode(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->SMCR, ATIM_SMCR_MSM_Msk) == ATIM_SMCR_MSM_Msk); +} + +/** + * @brief 定时器主/从模式禁用 + * @rmtoll SMCR MSM FL_ATIM_DisableMasterSlaveMode + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_ATIM_DisableMasterSlaveMode(ATIM_Type *TIMx) +{ + CLEAR_BIT(TIMx->SMCR, ATIM_SMCR_MSM_Msk); +} + +/** + * @brief 设置同步计数器触发源 + * @rmtoll SMCR TS FL_ATIM_SetTriggerInput + * @param TIMx TIM instance + * @param triggerInput This parameter can be one of the following values: + * @arg @ref FL_ATIM_TRGI_ITR0 + * @arg @ref FL_ATIM_TRGI_ITR1 + * @arg @ref FL_ATIM_TRGI_ITR2 + * @arg @ref FL_ATIM_TRGI_ITR3 + * @arg @ref FL_ATIM_TRGI_TI1F_EDGE + * @arg @ref FL_ATIM_TRGI_TI1FP1 + * @arg @ref FL_ATIM_TRGI_TI2FP2 + * @arg @ref FL_ATIM_TRGI_ETRF + * @retval None + */ +__STATIC_INLINE void FL_ATIM_SetTriggerInput(ATIM_Type *TIMx, uint32_t triggerInput) +{ + MODIFY_REG(TIMx->SMCR, ATIM_SMCR_TS_Msk, triggerInput); +} + +/** + * @brief 读取同步计数器的触发源 + * @rmtoll SMCR TS FL_ATIM_GetTriggerInput + * @param TIMx TIM instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_ATIM_TRGI_ITR0 + * @arg @ref FL_ATIM_TRGI_ITR1 + * @arg @ref FL_ATIM_TRGI_ITR2 + * @arg @ref FL_ATIM_TRGI_ITR3 + * @arg @ref FL_ATIM_TRGI_TI1F_EDGE + * @arg @ref FL_ATIM_TRGI_TI1FP1 + * @arg @ref FL_ATIM_TRGI_TI2FP2 + * @arg @ref FL_ATIM_TRGI_ETRF + */ +__STATIC_INLINE uint32_t FL_ATIM_GetTriggerInput(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->SMCR, ATIM_SMCR_TS_Msk)); +} + +/** + * @brief 从机模式设置 + * @rmtoll SMCR SMS FL_ATIM_SetSlaveMode + * @param TIMx TIM instance + * @param encoderMode This parameter can be one of the following values: + * @arg @ref FL_ATIM_SLAVE_MODE_PROHIBITED + * @arg @ref FL_ATIM_SLAVE_MODE_ENCODER_X2_TI1 + * @arg @ref FL_ATIM_SLAVE_MODE_ENCODER_X2_TI2 + * @arg @ref FL_ATIM_SLAVE_MODE_ENCODER_X4_TI1TI2 + * @arg @ref FL_ATIM_SLAVE_MODE_TRGI_RISE_RST + * @arg @ref FL_ATIM_SLAVE_MODE_TRGI_HIGH_RUN + * @arg @ref FL_ATIM_SLAVE_MODE_TRGI_RISE_RUN + * @arg @ref FL_ATIM_SLAVE_MODE_TRGI_CLK + * @retval None + */ +__STATIC_INLINE void FL_ATIM_SetSlaveMode(ATIM_Type *TIMx, uint32_t encoderMode) +{ + MODIFY_REG(TIMx->SMCR, ATIM_SMCR_SMS_Msk, encoderMode); +} + +/** + * @brief 读取从机模式 + * @rmtoll SMCR SMS FL_ATIM_GetSlaveMode + * @param TIMx TIM instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_ATIM_SLAVE_MODE_PROHIBITED + * @arg @ref FL_ATIM_SLAVE_MODE_ENCODER_X2_TI1 + * @arg @ref FL_ATIM_SLAVE_MODE_ENCODER_X2_TI2 + * @arg @ref FL_ATIM_SLAVE_MODE_NCODER_X4_TI1TI2 + * @arg @ref FL_ATIM_SLAVE_MODE_TRGI_RISE_RST + * @arg @ref FL_ATIM_SLAVE_MODE_TRGI_HIGH_RUN + * @arg @ref FL_ATIM_SLAVE_MODE_TRGI_RISE_RUN + * @arg @ref FL_ATIM_SLAVE_MODE_TRGI_CLK + */ +__STATIC_INLINE uint32_t FL_ATIM_GetSlaveMode(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->SMCR, ATIM_SMCR_SMS_Msk)); +} + +/** + * @brief 通道1的模式配置为Burst模式 + * @rmtoll DIER CC1BURSTEN FL_ATIM_EnableCC1DMABurstMode + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_ATIM_EnableCC1DMABurstMode(ATIM_Type *TIMx) +{ + SET_BIT(TIMx->DIER, ATIM_DIER_CC1BURSTEN_Msk); +} + +/** + * @brief 读取通道1的模式配置 + * @rmtoll DIER CC1BURSTEN FL_ATIM_IsEnabledCC1DMABurstMode + * @param TIMx TIM instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ATIM_IsEnabledCC1DMABurstMode(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->DIER, ATIM_DIER_CC1BURSTEN_Msk) == ATIM_DIER_CC1BURSTEN_Msk); +} + +/** + * @brief 通道1的Burst模式禁用 + * @rmtoll DIER CC1BURSTEN FL_ATIM_DisableCC1DMABurstMode + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_ATIM_DisableCC1DMABurstMode(ATIM_Type *TIMx) +{ + CLEAR_BIT(TIMx->DIER, ATIM_DIER_CC1BURSTEN_Msk); +} + +/** + * @brief 通道2的模式配置为Burst模式 + * @rmtoll DIER CC2BURSTEN FL_ATIM_EnableCC2DMABurstMode + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_ATIM_EnableCC2DMABurstMode(ATIM_Type *TIMx) +{ + SET_BIT(TIMx->DIER, ATIM_DIER_CC2BURSTEN_Msk); +} + +/** + * @brief 读取通道2的模式配置 + * @rmtoll DIER CC2BURSTEN FL_ATIM_IsEnabledCC2DMABurstMode + * @param TIMx TIM instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ATIM_IsEnabledCC2DMABurstMode(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->DIER, ATIM_DIER_CC2BURSTEN_Msk) == ATIM_DIER_CC2BURSTEN_Msk); +} + +/** + * @brief 通道2的Burst模式禁用 + * @rmtoll DIER CC2BURSTEN FL_ATIM_DisableCC2DMABurstMode + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_ATIM_DisableCC2DMABurstMode(ATIM_Type *TIMx) +{ + CLEAR_BIT(TIMx->DIER, ATIM_DIER_CC2BURSTEN_Msk); +} + +/** + * @brief 通道3的模式配置为Burst模式 + * @rmtoll DIER CC3BURSTEN FL_ATIM_EnableCC3DMABurstMode + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_ATIM_EnableCC3DMABurstMode(ATIM_Type *TIMx) +{ + SET_BIT(TIMx->DIER, ATIM_DIER_CC3BURSTEN_Msk); +} + +/** + * @brief 读取通道3的模式配置 + * @rmtoll DIER CC3BURSTEN FL_ATIM_IsEnabledCC3DMABurstMode + * @param TIMx TIM instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ATIM_IsEnabledCC3DMABurstMode(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->DIER, ATIM_DIER_CC3BURSTEN_Msk) == ATIM_DIER_CC3BURSTEN_Msk); +} + +/** + * @brief 通道3的Burst模式禁用 + * @rmtoll DIER CC3BURSTEN FL_ATIM_DisableCC3DMABurstMode + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_ATIM_DisableCC3DMABurstMode(ATIM_Type *TIMx) +{ + CLEAR_BIT(TIMx->DIER, ATIM_DIER_CC3BURSTEN_Msk); +} + +/** + * @brief 通道4的模式配置为Burst模式 + * @rmtoll DIER CC4BURSTEN FL_ATIM_EnableCC4DMABurstMode + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_ATIM_EnableCC4DMABurstMode(ATIM_Type *TIMx) +{ + SET_BIT(TIMx->DIER, ATIM_DIER_CC4BURSTEN_Msk); +} + +/** + * @brief 读取通道4的模式配置 + * @rmtoll DIER CC4BURSTEN FL_ATIM_IsEnabledCC4DMABurstMode + * @param TIMx TIM instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ATIM_IsEnabledCC4DMABurstMode(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->DIER, ATIM_DIER_CC4BURSTEN_Msk) == ATIM_DIER_CC4BURSTEN_Msk); +} + +/** + * @brief 通道4的Burst模式禁用 + * @rmtoll DIER CC4BURSTEN FL_ATIM_DisableCC4DMABurstMode + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_ATIM_DisableCC4DMABurstMode(ATIM_Type *TIMx) +{ + CLEAR_BIT(TIMx->DIER, ATIM_DIER_CC4BURSTEN_Msk); +} + +/** + * @brief 外部触发DMA请求使能 + * @rmtoll DIER TDE FL_ATIM_EnableDMAReq_Trigger + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_ATIM_EnableDMAReq_Trigger(ATIM_Type *TIMx) +{ + SET_BIT(TIMx->DIER, ATIM_DIER_TDE_Msk); +} + +/** + * @brief 读取外部触发DMA请求使能状态 + * @rmtoll DIER TDE FL_ATIM_IsEnabledDMAReq_Trigger + * @param TIMx TIM instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ATIM_IsEnabledDMAReq_Trigger(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->DIER, ATIM_DIER_TDE_Msk) == ATIM_DIER_TDE_Msk); +} + +/** + * @brief 外部触发DMA请求禁用 + * @rmtoll DIER TDE FL_ATIM_DisableDMAReq_Trigger + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_ATIM_DisableDMAReq_Trigger(ATIM_Type *TIMx) +{ + CLEAR_BIT(TIMx->DIER, ATIM_DIER_TDE_Msk); +} + +/** + * @brief COM事件DMA请求使能 + * @note + * @rmtoll DIER COMDE FL_ATIM_EnableDMAReq_COM + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_ATIM_EnableDMAReq_COM(ATIM_Type *TIMx) +{ + SET_BIT(TIMx->DIER, ATIM_DIER_COMDE_Msk); +} + +/** + * @brief 读取COM事件DMA请求使能状态 + * @note + * @rmtoll DIER COMDE FL_ATIM_IsEnabledDMAReq_COM + * @param TIMx TIM instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ATIM_IsEnabledDMAReq_COM(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->DIER, ATIM_DIER_COMDE_Msk) == ATIM_DIER_COMDE_Msk); +} + +/** + * @brief COM事件DMA请求禁用 + * @note + * @rmtoll DIER COMDE FL_ATIM_DisableDMAReq_COM + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_ATIM_DisableDMAReq_COM(ATIM_Type *TIMx) +{ + CLEAR_BIT(TIMx->DIER, ATIM_DIER_COMDE_Msk); +} + +/** + * @brief 捕捉比较通道的DMA请求使能 + * @rmtoll DIER CCDE FL_ATIM_EnableDMAReq_CC + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_ATIM_CHANNEL_1 + * @arg @ref FL_ATIM_CHANNEL_2 + * @arg @ref FL_ATIM_CHANNEL_3 + * @arg @ref FL_ATIM_CHANNEL_4 + * @retval None + */ +__STATIC_INLINE void FL_ATIM_EnableDMAReq_CC(ATIM_Type *TIMx, uint32_t channel) +{ + SET_BIT(TIMx->DIER, ATIM_DIER_CCDE_Msk << channel); +} + +/** + * @brief 读取捕捉比较通道的DMA请求使能 + * @rmtoll DIER CCDE FL_ATIM_IsEnabledDMAReq_CC + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_ATIM_CHANNEL_1 + * @arg @ref FL_ATIM_CHANNEL_2 + * @arg @ref FL_ATIM_CHANNEL_3 + * @arg @ref FL_ATIM_CHANNEL_4 + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ATIM_IsEnabledDMAReq_CC(ATIM_Type *TIMx, uint32_t channel) +{ + return (uint32_t)(READ_BIT(TIMx->DIER, (ATIM_DIER_CCDE_Msk << channel)) == (ATIM_DIER_CCDE_Msk << channel)); +} + +/** + * @brief 捕捉比较通道的DMA请求禁用 + * @rmtoll DIER CCDE FL_ATIM_DisableDMAReq_CC + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_ATIM_CHANNEL_1 + * @arg @ref FL_ATIM_CHANNEL_2 + * @arg @ref FL_ATIM_CHANNEL_3 + * @arg @ref FL_ATIM_CHANNEL_4 + * @retval None + */ +__STATIC_INLINE void FL_ATIM_DisableDMAReq_CC(ATIM_Type *TIMx, uint32_t channel) +{ + CLEAR_BIT(TIMx->DIER, ATIM_DIER_CCDE_Msk << channel); +} + +/** + * @brief 更新事件DMA请求使能 + * @rmtoll DIER UDE FL_ATIM_EnableDMAReq_Update + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_ATIM_EnableDMAReq_Update(ATIM_Type *TIMx) +{ + SET_BIT(TIMx->DIER, ATIM_DIER_UDE_Msk); +} + +/** + * @brief 读取更新事件DMA请求使能状态 + * @rmtoll DIER UDE FL_ATIM_IsEnabledDMAReq_Update + * @param TIMx TIM instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ATIM_IsEnabledDMAReq_Update(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->DIER, ATIM_DIER_UDE_Msk) == ATIM_DIER_UDE_Msk); +} + +/** + * @brief 更新事件DMA请求禁用 + * @rmtoll DIER UDE FL_ATIM_DisableDMAReq_Update + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_ATIM_DisableDMAReq_Update(ATIM_Type *TIMx) +{ + CLEAR_BIT(TIMx->DIER, ATIM_DIER_UDE_Msk); +} + +/** + * @brief 刹车事件中断使能 + * @note + * @rmtoll DIER BIE FL_ATIM_EnableIT_Break + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_ATIM_EnableIT_Break(ATIM_Type *TIMx) +{ + SET_BIT(TIMx->DIER, ATIM_DIER_BIE_Msk); +} + +/** + * @brief 读取刹车事件中断使能状态 + * @note + * @rmtoll DIER BIE FL_ATIM_IsEnabledIT_Break + * @param TIMx TIM instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ATIM_IsEnabledIT_Break(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->DIER, ATIM_DIER_BIE_Msk) == ATIM_DIER_BIE_Msk); +} + +/** + * @brief 刹车事件中断禁用 + * @note + * @rmtoll DIER BIE FL_ATIM_DisableIT_Break + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_ATIM_DisableIT_Break(ATIM_Type *TIMx) +{ + CLEAR_BIT(TIMx->DIER, ATIM_DIER_BIE_Msk); +} + +/** + * @brief 触发事件中断使能 + * @rmtoll DIER TIE FL_ATIM_EnableIT_Trigger + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_ATIM_EnableIT_Trigger(ATIM_Type *TIMx) +{ + SET_BIT(TIMx->DIER, ATIM_DIER_TIE_Msk); +} + +/** + * @brief 读取触发事件中断使能 + * @rmtoll DIER TIE FL_ATIM_IsEnabledIT_Trigger + * @param TIMx TIM instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ATIM_IsEnabledIT_Trigger(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->DIER, ATIM_DIER_TIE_Msk) == ATIM_DIER_TIE_Msk); +} + +/** + * @brief 触发事件中断禁用 + * @rmtoll DIER TIE FL_ATIM_DisableIT_Trigger + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_ATIM_DisableIT_Trigger(ATIM_Type *TIMx) +{ + CLEAR_BIT(TIMx->DIER, ATIM_DIER_TIE_Msk); +} + +/** + * @brief COM事件中断使能 + * @note + * @rmtoll DIER COMIE FL_ATIM_EnableIT_COM + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_ATIM_EnableIT_COM(ATIM_Type *TIMx) +{ + SET_BIT(TIMx->DIER, ATIM_DIER_COMIE_Msk); +} + +/** + * @brief 读取COM事件中断使能状态 + * @note + * @rmtoll DIER COMIE FL_ATIM_IsEnabledIT_COM + * @param TIMx TIM instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ATIM_IsEnabledIT_COM(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->DIER, ATIM_DIER_COMIE_Msk) == ATIM_DIER_COMIE_Msk); +} + +/** + * @brief COM事件中断禁用 + * @note + * @rmtoll DIER COMIE FL_ATIM_DisableIT_COM + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_ATIM_DisableIT_COM(ATIM_Type *TIMx) +{ + CLEAR_BIT(TIMx->DIER, ATIM_DIER_COMIE_Msk); +} + +/** + * @brief 捕捉/比较通道中断使能 + * @rmtoll DIER CCIE FL_ATIM_EnableIT_CC + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_ATIM_CHANNEL_1 + * @arg @ref FL_ATIM_CHANNEL_2 + * @arg @ref FL_ATIM_CHANNEL_3 + * @arg @ref FL_ATIM_CHANNEL_4 + * @retval None + */ +__STATIC_INLINE void FL_ATIM_EnableIT_CC(ATIM_Type *TIMx, uint32_t channel) +{ + SET_BIT(TIMx->DIER, ATIM_DIER_CCIE_Msk << channel); +} + +/** + * @brief 读取捕捉/比较通道中断使能状态 + * @rmtoll DIER CCIE FL_ATIM_IsEnabledIT_CC + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_ATIM_CHANNEL_1 + * @arg @ref FL_ATIM_CHANNEL_2 + * @arg @ref FL_ATIM_CHANNEL_3 + * @arg @ref FL_ATIM_CHANNEL_4 + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ATIM_IsEnabledIT_CC(ATIM_Type *TIMx, uint32_t channel) +{ + return (uint32_t)(READ_BIT(TIMx->DIER, (ATIM_DIER_CCIE_Msk << channel)) == (ATIM_DIER_CCIE_Msk << channel)); +} + +/** + * @brief 捕捉/比较通道中断禁用 + * @rmtoll DIER CCIE FL_ATIM_DisableIT_CC + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_ATIM_CHANNEL_1 + * @arg @ref FL_ATIM_CHANNEL_2 + * @arg @ref FL_ATIM_CHANNEL_3 + * @arg @ref FL_ATIM_CHANNEL_4 + * @retval None + */ +__STATIC_INLINE void FL_ATIM_DisableIT_CC(ATIM_Type *TIMx, uint32_t channel) +{ + CLEAR_BIT(TIMx->DIER, ATIM_DIER_CCIE_Msk << channel); +} + +/** + * @brief 更新事件中断使能 + * @rmtoll DIER UIE FL_ATIM_EnableIT_Update + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_ATIM_EnableIT_Update(ATIM_Type *TIMx) +{ + SET_BIT(TIMx->DIER, ATIM_DIER_UIE_Msk); +} + +/** + * @brief 读取更新事件中断使能状态 + * @rmtoll DIER UIE FL_ATIM_IsEnabledIT_Update + * @param TIMx TIM instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ATIM_IsEnabledIT_Update(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->DIER, ATIM_DIER_UIE_Msk) == ATIM_DIER_UIE_Msk); +} + +/** + * @brief 更新事件中断禁用 + * @rmtoll DIER UIE FL_ATIM_DisableIT_Update + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_ATIM_DisableIT_Update(ATIM_Type *TIMx) +{ + CLEAR_BIT(TIMx->DIER, ATIM_DIER_UIE_Msk); +} + +/** + * @brief 捕捉/比较通道的Overcapture中断标志 + * @rmtoll ISR CCOF FL_ATIM_IsActiveFlag_CCOverflow + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_ATIM_CHANNEL_1 + * @arg @ref FL_ATIM_CHANNEL_2 + * @arg @ref FL_ATIM_CHANNEL_3 + * @arg @ref FL_ATIM_CHANNEL_4 + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ATIM_IsActiveFlag_CCOverflow(ATIM_Type *TIMx, uint32_t channel) +{ + return (uint32_t)(READ_BIT(TIMx->ISR, (ATIM_ISR_CCOF_Msk << channel)) == (ATIM_ISR_CCOF_Msk << channel)); +} + +/** + * @brief 清除Overcapture中断标志 + * @rmtoll ISR CCOF FL_ATIM_ClearFlag_CCOverflow + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_ATIM_CHANNEL_1 + * @arg @ref FL_ATIM_CHANNEL_2 + * @arg @ref FL_ATIM_CHANNEL_3 + * @arg @ref FL_ATIM_CHANNEL_4 + * @retval None + */ +__STATIC_INLINE void FL_ATIM_ClearFlag_CCOverflow(ATIM_Type *TIMx, uint32_t channel) +{ + WRITE_REG(TIMx->ISR, (ATIM_ISR_CCOF_Msk << channel)); +} + +/** + * @brief 读取刹车事件中断标志 + * @note + * @rmtoll ISR BIF FL_ATIM_IsActiveFlag_Break + * @param TIMx TIM instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ATIM_IsActiveFlag_Break(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->ISR, ATIM_ISR_BIF_Msk) == (ATIM_ISR_BIF_Msk)); +} + +/** + * @brief 清除刹车事件中断标志 + * @note + * @rmtoll ISR BIF FL_ATIM_ClearFlag_Break + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_ATIM_ClearFlag_Break(ATIM_Type *TIMx) +{ + WRITE_REG(TIMx->ISR, ATIM_ISR_BIF_Msk); +} + +/** + * @brief 触发事件中断标志 + * @rmtoll ISR TIF FL_ATIM_IsActiveFlag_Trigger + * @param TIMx TIM instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ATIM_IsActiveFlag_Trigger(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->ISR, ATIM_ISR_TIF_Msk) == (ATIM_ISR_TIF_Msk)); +} + +/** + * @brief 清除触发事件中断标志 + * @rmtoll ISR TIF FL_ATIM_ClearFlag_Trigger + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_ATIM_ClearFlag_Trigger(ATIM_Type *TIMx) +{ + WRITE_REG(TIMx->ISR, ATIM_ISR_TIF_Msk); +} + +/** + * @brief 读取COM事件中断标志 + * @note + * @rmtoll ISR COMIF FL_ATIM_IsActiveFlag_COM + * @param TIMx TIM instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ATIM_IsActiveFlag_COM(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->ISR, ATIM_ISR_COMIF_Msk) == (ATIM_ISR_COMIF_Msk)); +} + +/** + * @brief 清除COM事件中断标志 + * @note + * @rmtoll ISR COMIF FL_ATIM_ClearFlag_COM + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_ATIM_ClearFlag_COM(ATIM_Type *TIMx) +{ + WRITE_REG(TIMx->ISR, ATIM_ISR_COMIF_Msk); +} + +/** + * @brief 读取捕捉/比较通道中断标志 + * @rmtoll ISR CCIF FL_ATIM_IsActiveFlag_CC + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_ATIM_CHANNEL_1 + * @arg @ref FL_ATIM_CHANNEL_2 + * @arg @ref FL_ATIM_CHANNEL_3 + * @arg @ref FL_ATIM_CHANNEL_4 + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ATIM_IsActiveFlag_CC(ATIM_Type *TIMx, uint32_t channel) +{ + return (uint32_t)(READ_BIT(TIMx->ISR, (ATIM_ISR_CCIF_Msk << channel)) == (ATIM_ISR_CCIF_Msk << channel)); +} + +/** + * @brief 清除捕捉/比较通道中断标志 + * @rmtoll ISR CCIF FL_ATIM_ClearFlag_CC + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_ATIM_CHANNEL_1 + * @arg @ref FL_ATIM_CHANNEL_2 + * @arg @ref FL_ATIM_CHANNEL_3 + * @arg @ref FL_ATIM_CHANNEL_4 + * @retval None + */ +__STATIC_INLINE void FL_ATIM_ClearFlag_CC(ATIM_Type *TIMx, uint32_t channel) +{ + WRITE_REG(TIMx->ISR, (ATIM_ISR_CCIF_Msk << channel)); +} + +/** + * @brief 读取更新事件中断标志 + * @rmtoll ISR UIF FL_ATIM_IsActiveFlag_Update + * @param TIMx TIM instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ATIM_IsActiveFlag_Update(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->ISR, ATIM_ISR_UIF_Msk) == (ATIM_ISR_UIF_Msk)); +} + +/** + * @brief 清除更新事件中断标志 + * @rmtoll ISR UIF FL_ATIM_ClearFlag_Update + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_ATIM_ClearFlag_Update(ATIM_Type *TIMx) +{ + WRITE_REG(TIMx->ISR, ATIM_ISR_UIF_Msk); +} + +/** + * @brief 软件刹车使能 + * @note + * @rmtoll EGR BG FL_ATIM_GenerateBreakEvent + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_ATIM_GenerateBreakEvent(ATIM_Type *TIMx) +{ + SET_BIT(TIMx->EGR, ATIM_EGR_BG_Msk); +} + +/** + * @brief 软件触发使能 + * @rmtoll EGR TG FL_ATIM_GenerateTriggerEvent + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_ATIM_GenerateTriggerEvent(ATIM_Type *TIMx) +{ + SET_BIT(TIMx->EGR, ATIM_EGR_TG_Msk); +} + +/** + * @brief 软件COM事件使能 + * @note + * @rmtoll EGR COMG FL_ATIM_GenerateCOMEvent + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_ATIM_GenerateCOMEvent(ATIM_Type *TIMx) +{ + SET_BIT(TIMx->EGR, ATIM_EGR_COMG_Msk); +} + +/** + * @brief 捕捉/比较通道软件触发使能 + * @rmtoll EGR CCG FL_ATIM_GenerateCCEvent + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_ATIM_CHANNEL_1 + * @arg @ref FL_ATIM_CHANNEL_2 + * @arg @ref FL_ATIM_CHANNEL_3 + * @arg @ref FL_ATIM_CHANNEL_4 + * @retval None + */ +__STATIC_INLINE void FL_ATIM_GenerateCCEvent(ATIM_Type *TIMx, uint32_t channel) +{ + SET_BIT(TIMx->EGR, ATIM_EGR_CCG_Msk << channel); +} + +/** + * @brief 软件更新事件使能 + * @rmtoll EGR UG FL_ATIM_GenerateUpdateEvent + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_ATIM_GenerateUpdateEvent(ATIM_Type *TIMx) +{ + SET_BIT(TIMx->EGR, ATIM_EGR_UG_Msk); +} + +/** + * @brief 设置计数器值 + * @rmtoll CNT FL_ATIM_WriteCounter + * @param TIMx TIM instance + * @param counter + * @retval None + */ +__STATIC_INLINE void FL_ATIM_WriteCounter(ATIM_Type *TIMx, uint32_t counter) +{ + MODIFY_REG(TIMx->CNT, (0xffffU << 0U), (counter << 0U)); +} + +/** + * @brief 读取计数器值 + * @rmtoll CNT FL_ATIM_ReadCounter + * @param TIMx TIM instance + * @retval + */ +__STATIC_INLINE uint32_t FL_ATIM_ReadCounter(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->CNT, 0xffffU) >> 0U); +} + +/** + * @brief 设置计数器时钟预分频值 + * @rmtoll PSC FL_ATIM_WritePrescaler + * @param TIMx TIM instance + * @param psc + * @retval None + */ +__STATIC_INLINE void FL_ATIM_WritePrescaler(ATIM_Type *TIMx, uint32_t psc) +{ + MODIFY_REG(TIMx->PSC, (0xffffU << 0U), (psc << 0U)); +} + +/** + * @brief 读取计数器时钟预分频值 + * @rmtoll PSC FL_ATIM_ReadPrescaler + * @param TIMx TIM instance + * @retval + */ +__STATIC_INLINE uint32_t FL_ATIM_ReadPrescaler(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->PSC, 0xffffU) >> 0U); +} + +/** + * @brief 设置计数溢出时的自动重载值 + * @rmtoll ARR FL_ATIM_WriteAutoReload + * @param TIMx TIM instance + * @param autoReload + * @retval None + */ +__STATIC_INLINE void FL_ATIM_WriteAutoReload(ATIM_Type *TIMx, uint32_t autoReload) +{ + MODIFY_REG(TIMx->ARR, (0xffffU << 0U), (autoReload << 0U)); +} + +/** + * @brief 读取计数溢出时的自动重载值 + * @rmtoll ARR FL_ATIM_ReadAutoReload + * @param TIMx TIM instance + * @retval + */ +__STATIC_INLINE uint32_t FL_ATIM_ReadAutoReload(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->ARR, 0xffffU) >> 0U); +} + +/** + * @brief 捕捉/比较通道1寄存器配置 + * @rmtoll CCR1 FL_ATIM_WriteCompareCH1 + * @param TIMx TIM instance + * @param compareValue + * @retval None + */ +__STATIC_INLINE void FL_ATIM_WriteCompareCH1(ATIM_Type *TIMx, uint32_t compareValue) +{ + MODIFY_REG(TIMx->CCR1, (0xffffU << 0U), (compareValue << 0U)); +} + +/** + * @brief 读取捕捉/比较通道1寄存器值 + * @rmtoll CCR1 FL_ATIM_ReadCompareCH1 + * @param TIMx TIM instance + * @retval + */ +__STATIC_INLINE uint32_t FL_ATIM_ReadCompareCH1(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->CCR1, 0xffffU) >> 0U); +} + +/** + * @brief 捕捉/比较通道2寄存器配置 + * @rmtoll CCR2 FL_ATIM_WriteCompareCH2 + * @param TIMx TIM instance + * @param compareValue + * @retval None + */ +__STATIC_INLINE void FL_ATIM_WriteCompareCH2(ATIM_Type *TIMx, uint32_t compareValue) +{ + MODIFY_REG(TIMx->CCR2, (0xffffU << 0U), (compareValue << 0U)); +} + +/** + * @brief 读取捕捉/比较通道2寄存器值 + * @rmtoll CCR2 FL_ATIM_ReadCompareCH2 + * @param TIMx TIM instance + * @retval + */ +__STATIC_INLINE uint32_t FL_ATIM_ReadCompareCH2(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->CCR2, 0xffffU) >> 0U); +} + +/** + * @brief 捕捉/比较通道3寄存器配置 + * @rmtoll CCR3 FL_ATIM_WriteCompareCH3 + * @param TIMx TIM instance + * @param compareValue + * @retval None + */ +__STATIC_INLINE void FL_ATIM_WriteCompareCH3(ATIM_Type *TIMx, uint32_t compareValue) +{ + MODIFY_REG(TIMx->CCR3, (0xffffU << 0U), (compareValue << 0U)); +} + +/** + * @brief 读取捕捉/比较通道3寄存器值 + * @rmtoll CCR3 FL_ATIM_ReadCompareCH3 + * @param TIMx TIM instance + * @retval + */ +__STATIC_INLINE uint32_t FL_ATIM_ReadCompareCH3(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->CCR3, 0xffffU) >> 0U); +} + +/** + * @brief 捕捉/比较通道4寄存器配置 + * @rmtoll CCR4 FL_ATIM_WriteCompareCH4 + * @param TIMx TIM instance + * @param compareValue + * @retval None + */ +__STATIC_INLINE void FL_ATIM_WriteCompareCH4(ATIM_Type *TIMx, uint32_t compareValue) +{ + MODIFY_REG(TIMx->CCR4, (0xffffU << 0U), (compareValue << 0U)); +} + +/** + * @brief 读取捕捉/比较通道4寄存器值 + * @rmtoll CCR4 FL_ATIM_ReadCompareCH4 + * @param TIMx TIM instance + * @retval + */ +__STATIC_INLINE uint32_t FL_ATIM_ReadCompareCH4(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->CCR4, 0xffffU) >> 0U); +} + +/** + * @brief 设置DMA Burst长度 + * @rmtoll DCR DBL FL_ATIM_SetDMABurstLength + * @param TIMx TIM instance + * @param length This parameter can be one of the following values: + * @arg @ref FL_ATIM_DMA_BURST_LENGTH_1 + * @arg @ref FL_ATIM_DMA_BURST_LENGTH_2 + * @arg @ref FL_ATIM_DMA_BURST_LENGTH_3 + * @arg @ref FL_ATIM_DMA_BURST_LENGTH_4 + * @arg @ref FL_ATIM_DMA_BURST_LENGTH_5 + * @arg @ref FL_ATIM_DMA_BURST_LENGTH_6 + * @arg @ref FL_ATIM_DMA_BURST_LENGTH_7 + * @arg @ref FL_ATIM_DMA_BURST_LENGTH_8 + * @arg @ref FL_ATIM_DMA_BURST_LENGTH_9 + * @arg @ref FL_ATIM_DMA_BURST_LENGTH_10 + * @arg @ref FL_ATIM_DMA_BURST_LENGTH_11 + * @arg @ref FL_ATIM_DMA_BURST_LENGTH_12 + * @arg @ref FL_ATIM_DMA_BURST_LENGTH_13 + * @arg @ref FL_ATIM_DMA_BURST_LENGTH_14 + * @arg @ref FL_ATIM_DMA_BURST_LENGTH_15 + * @arg @ref FL_ATIM_DMA_BURST_LENGTH_16 + * @arg @ref FL_ATIM_DMA_BURST_LENGTH_17 + * @arg @ref FL_ATIM_DMA_BURST_LENGTH_18 + * @retval None + */ +__STATIC_INLINE void FL_ATIM_SetDMABurstLength(ATIM_Type *TIMx, uint32_t length) +{ + MODIFY_REG(TIMx->DCR, ATIM_DCR_DBL_Msk, length); +} + +/** + * @brief 读取DMA Burst长度 + * @rmtoll DCR DBL FL_ATIM_GetDMABurstLength + * @param TIMx TIM instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_ATIM_DMA_BURST_LENGTH_1 + * @arg @ref FL_ATIM_DMA_BURST_LENGTH_2 + * @arg @ref FL_ATIM_DMA_BURST_LENGTH_3 + * @arg @ref FL_ATIM_DMA_BURST_LENGTH_4 + * @arg @ref FL_ATIM_DMA_BURST_LENGTH_5 + * @arg @ref FL_ATIM_DMA_BURST_LENGTH_6 + * @arg @ref FL_ATIM_DMA_BURST_LENGTH_7 + * @arg @ref FL_ATIM_DMA_BURST_LENGTH_8 + * @arg @ref FL_ATIM_DMA_BURST_LENGTH_9 + * @arg @ref FL_ATIM_DMA_BURST_LENGTH_10 + * @arg @ref FL_ATIM_DMA_BURST_LENGTH_11 + * @arg @ref FL_ATIM_DMA_BURST_LENGTH_12 + * @arg @ref FL_ATIM_DMA_BURST_LENGTH_13 + * @arg @ref FL_ATIM_DMA_BURST_LENGTH_14 + * @arg @ref FL_ATIM_DMA_BURST_LENGTH_15 + * @arg @ref FL_ATIM_DMA_BURST_LENGTH_16 + * @arg @ref FL_ATIM_DMA_BURST_LENGTH_17 + * @arg @ref FL_ATIM_DMA_BURST_LENGTH_18 + */ +__STATIC_INLINE uint32_t FL_ATIM_GetDMABurstLength(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->DCR, ATIM_DCR_DBL_Msk)); +} + +/** + * @brief 设置指向DMA寄存器的偏移地址 + * @rmtoll DCR DBA FL_ATIM_SetDMABurstAddress + * @param TIMx TIM instance + * @param address This parameter can be one of the following values: + * @arg @ref FL_ATIM_DMA_BURST_ADDR_CR1 + * @arg @ref FL_ATIM_DMA_BURST_ADDR_CR2 + * @arg @ref FL_ATIM_DMA_BURST_ADDR_SMCR + * @arg @ref FL_ATIM_DMA_BURST_ADDR_DIER + * @arg @ref FL_ATIM_DMA_BURST_ADDR_SR + * @arg @ref FL_ATIM_DMA_BURST_ADDR_EGR + * @arg @ref FL_ATIM_DMA_BURST_ADDR_CCMR1 + * @arg @ref FL_ATIM_DMA_BURST_ADDR_CCMR2 + * @arg @ref FL_ATIM_DMA_BURST_ADDR_CCER + * @arg @ref FL_ATIM_DMA_BURST_ADDR_CNT + * @arg @ref FL_ATIM_DMA_BURST_ADDR_PSC + * @arg @ref FL_ATIM_DMA_BURST_ADDR_ARR + * @arg @ref FL_ATIM_DMA_BURST_ADDR_RCR + * @arg @ref FL_ATIM_DMA_BURST_ADDR_CCR1 + * @arg @ref FL_ATIM_DMA_BURST_ADDR_CCR2 + * @arg @ref FL_ATIM_DMA_BURST_ADDR_CCR3 + * @arg @ref FL_ATIM_DMA_BURST_ADDR_CCR4 + * @arg @ref FL_ATIM_DMA_BURST_ADDR_BDTR + * @retval None + */ +__STATIC_INLINE void FL_ATIM_SetDMABurstAddress(ATIM_Type *TIMx, uint32_t address) +{ + MODIFY_REG(TIMx->DCR, ATIM_DCR_DBA_Msk, address); +} + +/** + * @brief 读取指向DMA寄存器的偏移地址 + * @rmtoll DCR DBA FL_ATIM_GetDMABurstAddress + * @param TIMx TIM instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_ATIM_DMA_BURST_ADDR_CR1 + * @arg @ref FL_ATIM_DMA_BURST_ADDR_CR2 + * @arg @ref FL_ATIM_DMA_BURST_ADDR_SMCR + * @arg @ref FL_ATIM_DMA_BURST_ADDR_DIER + * @arg @ref FL_ATIM_DMA_BURST_ADDR_SR + * @arg @ref FL_ATIM_DMA_BURST_ADDR_EGR + * @arg @ref FL_ATIM_DMA_BURST_ADDR_CCMR1 + * @arg @ref FL_ATIM_DMA_BURST_ADDR_CCMR2 + * @arg @ref FL_ATIM_DMA_BURST_ADDR_CCER + * @arg @ref FL_ATIM_DMA_BURST_ADDR_CNT + * @arg @ref FL_ATIM_DMA_BURST_ADDR_PSC + * @arg @ref FL_ATIM_DMA_BURST_ADDR_ARR + * @arg @ref FL_ATIM_DMA_BURST_ADDR_RCR + * @arg @ref FL_ATIM_DMA_BURST_ADDR_CCR1 + * @arg @ref FL_ATIM_DMA_BURST_ADDR_CCR2 + * @arg @ref FL_ATIM_DMA_BURST_ADDR_CCR3 + * @arg @ref FL_ATIM_DMA_BURST_ADDR_CCR4 + * @arg @ref FL_ATIM_DMA_BURST_ADDR_BDTR + */ +__STATIC_INLINE uint32_t FL_ATIM_GetDMABurstAddress(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->DCR, ATIM_DCR_DBA_Msk)); +} + +/** + * @brief 配置DMA burst访问寄存器 + * @rmtoll DMAR FL_ATIM_WriteDMAAddress + * @param TIMx TIM instance + * @param address + * @retval None + */ +__STATIC_INLINE void FL_ATIM_WriteDMAAddress(ATIM_Type *TIMx, uint32_t address) +{ + MODIFY_REG(TIMx->DMAR, (0xffffffffU << 0U), (address << 0U)); +} + +/** + * @brief 读取DMA burst访问寄存器值 + * @rmtoll DMAR FL_ATIM_ReadDMAAddress + * @param TIMx TIM instance + * @retval + */ +__STATIC_INLINE uint32_t FL_ATIM_ReadDMAAddress(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->DMAR, 0xffffffffU) >> 0U); +} + +/** + * @brief 输出比较清零使能 + * @rmtoll CCMR OCCE FL_ATIM_OC_EnableClear + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_ATIM_CHANNEL_1 + * @arg @ref FL_ATIM_CHANNEL_2 + * @arg @ref FL_ATIM_CHANNEL_3 + * @arg @ref FL_ATIM_CHANNEL_4 + * @retval None + */ +__STATIC_INLINE void FL_ATIM_OC_EnableClear(ATIM_Type *TIMx, uint32_t channel) +{ + if(channel < FL_ATIM_CHANNEL_3) + { + SET_BIT(TIMx->CCMR1, (ATIM_CCMR_OCCE_Msk << (channel * 8))); + } + else + { + SET_BIT(TIMx->CCMR2, (ATIM_CCMR_OCCE_Msk << ((channel - 2) * 8))); + } +} + +/** + * @brief 读取输出比较清零使能状态 + * @rmtoll CCMR OCCE FL_ATIM_OC_IsEnabledClear + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_ATIM_CHANNEL_1 + * @arg @ref FL_ATIM_CHANNEL_2 + * @arg @ref FL_ATIM_CHANNEL_3 + * @arg @ref FL_ATIM_CHANNEL_4 + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ATIM_OC_IsEnabledClear(ATIM_Type *TIMx, uint32_t channel) +{ + if(channel < FL_ATIM_CHANNEL_3) + { + return (uint32_t)(READ_BIT(TIMx->CCMR1, (ATIM_CCMR_OCCE_Msk << (channel * 8))) == (ATIM_CCMR_OCCE_Msk << (channel * 8))); + } + else + { + return (uint32_t)(READ_BIT(TIMx->CCMR2, (ATIM_CCMR_OCCE_Msk << ((channel - 2) * 8))) == (ATIM_CCMR_OCCE_Msk << ((channel - 2) * 8))); + } +} + +/** + * @brief 输出比较清零禁用 + * @rmtoll CCMR OCCE FL_ATIM_OC_DisableClear + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_ATIM_CHANNEL_1 + * @arg @ref FL_ATIM_CHANNEL_2 + * @arg @ref FL_ATIM_CHANNEL_3 + * @arg @ref FL_ATIM_CHANNEL_4 + * @retval None + */ +__STATIC_INLINE void FL_ATIM_OC_DisableClear(ATIM_Type *TIMx, uint32_t channel) +{ + if(channel < FL_ATIM_CHANNEL_3) + { + CLEAR_BIT(TIMx->CCMR1, (ATIM_CCMR_OCCE_Msk << (channel * 8))); + } + else + { + CLEAR_BIT(TIMx->CCMR2, (ATIM_CCMR_OCCE_Msk << ((channel - 2) * 8))); + } +} + +/** + * @brief 输出比较模式配置 + * @rmtoll CCMR OCM FL_ATIM_OC_SetMode + * @param TIMx TIM instance + * @param mode This parameter can be one of the following values: + * @arg @ref FL_ATIM_OC_MODE_FROZEN + * @arg @ref FL_ATIM_OC_MODE_ACTIVE + * @arg @ref FL_ATIM_OC_MODE_INACTIVE + * @arg @ref FL_ATIM_OC_MODE_TOGGLE + * @arg @ref FL_ATIM_OC_MODE_FORCED_INACTIVE + * @arg @ref FL_ATIM_OC_MODE_FORCED_ACTIVE + * @arg @ref FL_ATIM_OC_MODE_PWM1 + * @arg @ref FL_ATIM_OC_MODE_PWM2 + * @param channel This parameter can be one of the following values: + * @arg @ref FL_ATIM_CHANNEL_1 + * @arg @ref FL_ATIM_CHANNEL_2 + * @arg @ref FL_ATIM_CHANNEL_3 + * @arg @ref FL_ATIM_CHANNEL_4 + * @retval None + */ +__STATIC_INLINE void FL_ATIM_OC_SetMode(ATIM_Type *TIMx, uint32_t mode, uint32_t channel) +{ + if(channel < FL_ATIM_CHANNEL_3) + { + MODIFY_REG(TIMx->CCMR1, (ATIM_CCMR_OCM_Msk << (channel * 8)), (mode << (channel * 8))); + } + else + { + MODIFY_REG(TIMx->CCMR2, (ATIM_CCMR_OCM_Msk << ((channel - 2) * 8)), (mode << ((channel - 2) * 8))); + } +} + +/** + * @brief 读取输出比较模式配置值 + * @rmtoll CCMR OCM FL_ATIM_OC_GetMode + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_ATIM_CHANNEL_1 + * @arg @ref FL_ATIM_CHANNEL_2 + * @arg @ref FL_ATIM_CHANNEL_3 + * @arg @ref FL_ATIM_CHANNEL_4 + * @retval Returned value can be one of the following values: + * @arg @ref FL_ATIM_OC_MODE_FROZEN + * @arg @ref FL_ATIM_OC_MODE_ACTIVE + * @arg @ref FL_ATIM_OC_MODE_INACTIVE + * @arg @ref FL_ATIM_OC_MODE_TOGGLE + * @arg @ref FL_ATIM_OC_MODE_FORCED_INACTIVE + * @arg @ref FL_ATIM_OC_MODE_FORCED_ACTIVE + * @arg @ref FL_ATIM_OC_MODE_PWM1 + * @arg @ref FL_ATIM_OC_MODE_PWM2 + */ +__STATIC_INLINE uint32_t FL_ATIM_OC_GetMode(ATIM_Type *TIMx, uint32_t channel) +{ + if(channel < FL_ATIM_CHANNEL_3) + { + return (uint32_t)(READ_BIT(TIMx->CCMR1, (ATIM_CCMR_OCM_Msk << (channel * 8)))); + } + else + { + return (uint32_t)(READ_BIT(TIMx->CCMR2, (ATIM_CCMR_OCM_Msk << ((channel - 2) * 8)))); + } +} + +/** + * @brief 输出比较预装载使能 + * @rmtoll CCMR OCPE FL_ATIM_OC_EnablePreload + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_ATIM_CHANNEL_1 + * @arg @ref FL_ATIM_CHANNEL_2 + * @arg @ref FL_ATIM_CHANNEL_3 + * @arg @ref FL_ATIM_CHANNEL_4 + * @retval None + */ +__STATIC_INLINE void FL_ATIM_OC_EnablePreload(ATIM_Type *TIMx, uint32_t channel) +{ + if(channel < FL_ATIM_CHANNEL_3) + { + SET_BIT(TIMx->CCMR1, (ATIM_CCMR_OCPE_Msk << (channel * 8))); + } + else + { + SET_BIT(TIMx->CCMR2, (ATIM_CCMR_OCPE_Msk << ((channel - 2) * 8))); + } +} + +/** + * @brief 读取输出比较预装载使能状态 + * @rmtoll CCMR OCPE FL_ATIM_OC_IsEnabledPreload + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_ATIM_CHANNEL_1 + * @arg @ref FL_ATIM_CHANNEL_2 + * @arg @ref FL_ATIM_CHANNEL_3 + * @arg @ref FL_ATIM_CHANNEL_4 + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ATIM_OC_IsEnabledPreload(ATIM_Type *TIMx, uint32_t channel) +{ + if(channel < FL_ATIM_CHANNEL_3) + { + return (uint32_t)(READ_BIT(TIMx->CCMR1, (ATIM_CCMR_OCPE_Msk << (channel * 8))) == (ATIM_CCMR_OCPE_Msk << (channel * 8))); + } + else + { + return (uint32_t)(READ_BIT(TIMx->CCMR2, (ATIM_CCMR_OCPE_Msk << ((channel - 2) * 8))) == (ATIM_CCMR_OCPE_Msk << ((channel - 2) * 8))); + } +} + +/** + * @brief 输出比较预装载禁用 + * @rmtoll CCMR OCPE FL_ATIM_OC_DisablePreload + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_ATIM_CHANNEL_1 + * @arg @ref FL_ATIM_CHANNEL_2 + * @arg @ref FL_ATIM_CHANNEL_3 + * @arg @ref FL_ATIM_CHANNEL_4 + * @retval None + */ +__STATIC_INLINE void FL_ATIM_OC_DisablePreload(ATIM_Type *TIMx, uint32_t channel) +{ + if(channel < FL_ATIM_CHANNEL_3) + { + CLEAR_BIT(TIMx->CCMR1, (ATIM_CCMR_OCPE_Msk << (channel * 8))); + } + else + { + CLEAR_BIT(TIMx->CCMR2, (ATIM_CCMR_OCPE_Msk << ((channel - 2) * 8))); + } +} + +/** + * @brief 输出比较快速使能 + * @rmtoll CCMR OCFE FL_ATIM_OC_EnableFastMode + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_ATIM_CHANNEL_1 + * @arg @ref FL_ATIM_CHANNEL_2 + * @arg @ref FL_ATIM_CHANNEL_3 + * @arg @ref FL_ATIM_CHANNEL_4 + * @retval None + */ +__STATIC_INLINE void FL_ATIM_OC_EnableFastMode(ATIM_Type *TIMx, uint32_t channel) +{ + if(channel < FL_ATIM_CHANNEL_3) + { + SET_BIT(TIMx->CCMR1, (ATIM_CCMR_OCFE_Msk << (channel * 8))); + } + else + { + SET_BIT(TIMx->CCMR2, (ATIM_CCMR_OCFE_Msk << ((channel - 2) * 8))); + } +} + +/** + * @brief 获取输出比较快速使能状态 + * @rmtoll CCMR OCFE FL_ATIM_OC_IsEnabledFastMode + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_ATIM_CHANNEL_1 + * @arg @ref FL_ATIM_CHANNEL_2 + * @arg @ref FL_ATIM_CHANNEL_3 + * @arg @ref FL_ATIM_CHANNEL_4 + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ATIM_OC_IsEnabledFastMode(ATIM_Type *TIMx, uint32_t channel) +{ + if(channel < FL_ATIM_CHANNEL_3) + { + return (uint32_t)(READ_BIT(TIMx->CCMR1, (ATIM_CCMR_OCFE_Msk << (channel * 8))) == (ATIM_CCMR_OCFE_Msk << (channel * 8))); + } + else + { + return (uint32_t)(READ_BIT(TIMx->CCMR2, (ATIM_CCMR_OCFE_Msk << ((channel - 2) * 8))) == (ATIM_CCMR_OCFE_Msk << ((channel - 2) * 8))); + } +} + +/** + * @brief 输出比较快速禁用 + * @rmtoll CCMR OCFE FL_ATIM_OC_DisableFastMode + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_ATIM_CHANNEL_1 + * @arg @ref FL_ATIM_CHANNEL_2 + * @arg @ref FL_ATIM_CHANNEL_3 + * @arg @ref FL_ATIM_CHANNEL_4 + * @retval None + */ +__STATIC_INLINE void FL_ATIM_OC_DisableFastMode(ATIM_Type *TIMx, uint32_t channel) +{ + if(channel < FL_ATIM_CHANNEL_3) + { + CLEAR_BIT(TIMx->CCMR1, (ATIM_CCMR_OCFE_Msk << (channel * 8))); + } + else + { + CLEAR_BIT(TIMx->CCMR2, (ATIM_CCMR_OCFE_Msk << ((channel - 2) * 8))); + } +} + +/** + * @brief 设置输入捕捉滤波器 + * @rmtoll CCMR ICF FL_ATIM_IC_SetFilter + * @param TIMx TIM instance + * @param filter This parameter can be one of the following values: + * @arg @ref FL_ATIM_IC_FILTER_DIV1 + * @arg @ref FL_ATIM_IC_FILTER_DIV1_N2 + * @arg @ref FL_ATIM_IC_FILTER_DIV1_N4 + * @arg @ref FL_ATIM_IC_FILTER_DIV1_N8 + * @arg @ref FL_ATIM_IC_FILTER_DIV2_N6 + * @arg @ref FL_ATIM_IC_FILTER_DIV2_N8 + * @arg @ref FL_ATIM_IC_FILTER_DIV4_N6 + * @arg @ref FL_ATIM_IC_FILTER_DIV4_N8 + * @arg @ref FL_ATIM_IC_FILTER_DIV8_N6 + * @arg @ref FL_ATIM_IC_FILTER_DIV8_N8 + * @arg @ref FL_ATIM_IC_FILTER_DIV16_N5 + * @arg @ref FL_ATIM_IC_FILTER_DIV16_N6 + * @arg @ref FL_ATIM_IC_FILTER_DIV16_N8 + * @arg @ref FL_ATIM_IC_FILTER_DIV32_N5 + * @arg @ref FL_ATIM_IC_FILTER_DIV32_N6 + * @arg @ref FL_ATIM_IC_FILTER_DIV32_N8 + * @param channel This parameter can be one of the following values: + * @arg @ref FL_ATIM_CHANNEL_1 + * @arg @ref FL_ATIM_CHANNEL_2 + * @arg @ref FL_ATIM_CHANNEL_3 + * @arg @ref FL_ATIM_CHANNEL_4 + * @retval None + */ +__STATIC_INLINE void FL_ATIM_IC_SetFilter(ATIM_Type *TIMx, uint32_t filter, uint32_t channel) +{ + if(channel < FL_ATIM_CHANNEL_3) + { + MODIFY_REG(TIMx->CCMR1, (ATIM_CCMR_ICF_Msk << (channel * 8)), (filter << (channel * 8))); + } + else + { + MODIFY_REG(TIMx->CCMR2, (ATIM_CCMR_ICF_Msk << ((channel - 2) * 8)), (filter << ((channel - 2) * 8))); + } +} + +/** + * @brief 读取输入滤波器值 + * @rmtoll CCMR ICF FL_ATIM_IC_GetFilter + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_ATIM_CHANNEL_1 + * @arg @ref FL_ATIM_CHANNEL_2 + * @arg @ref FL_ATIM_CHANNEL_3 + * @arg @ref FL_ATIM_CHANNEL_4 + * @retval Returned value can be one of the following values: + * @arg @ref FL_ATIM_IC_FILTER_DIV1 + * @arg @ref FL_ATIM_IC_FILTER_DIV1_N2 + * @arg @ref FL_ATIM_IC_FILTER_DIV1_N4 + * @arg @ref FL_ATIM_IC_FILTER_DIV1_N8 + * @arg @ref FL_ATIM_IC_FILTER_DIV2_N6 + * @arg @ref FL_ATIM_IC_FILTER_DIV2_N8 + * @arg @ref FL_ATIM_IC_FILTER_DIV4_N6 + * @arg @ref FL_ATIM_IC_FILTER_DIV4_N8 + * @arg @ref FL_ATIM_IC_FILTER_DIV8_N6 + * @arg @ref FL_ATIM_IC_FILTER_DIV8_N8 + * @arg @ref FL_ATIM_IC_FILTER_DIV16_N5 + * @arg @ref FL_ATIM_IC_FILTER_DIV16_N6 + * @arg @ref FL_ATIM_IC_FILTER_DIV16_N8 + * @arg @ref FL_ATIM_IC_FILTER_DIV32_N5 + * @arg @ref FL_ATIM_IC_FILTER_DIV32_N6 + * @arg @ref FL_ATIM_IC_FILTER_DIV32_N8 + */ +__STATIC_INLINE uint32_t FL_ATIM_IC_GetFilter(ATIM_Type *TIMx, uint32_t channel) +{ + if(channel < FL_ATIM_CHANNEL_3) + { + return (uint32_t)(READ_BIT(TIMx->CCMR1, (ATIM_CCMR_ICF_Msk << (channel * 8)))); + } + else + { + return (uint32_t)(READ_BIT(TIMx->CCMR2, (ATIM_CCMR_ICF_Msk << ((channel - 2) * 8)))); + } +} + +/** + * @brief 设置输入捕捉预分频 + * @rmtoll CCMR ICPSC FL_ATIM_IC_SetPrescaler + * @param TIMx TIM instance + * @param psc This parameter can be one of the following values: + * @arg @ref FL_ATIM_IC_PSC_DIV1 + * @arg @ref FL_ATIM_IC_PSC_DIV2 + * @arg @ref FL_ATIM_IC_PSC_DIV4 + * @arg @ref FL_ATIM_IC_PSC_DIV8 + * @param channel This parameter can be one of the following values: + * @arg @ref FL_ATIM_CHANNEL_1 + * @arg @ref FL_ATIM_CHANNEL_2 + * @arg @ref FL_ATIM_CHANNEL_3 + * @arg @ref FL_ATIM_CHANNEL_4 + * @retval None + */ +__STATIC_INLINE void FL_ATIM_IC_SetPrescaler(ATIM_Type *TIMx, uint32_t psc, uint32_t channel) +{ + if(channel < FL_ATIM_CHANNEL_3) + { + MODIFY_REG(TIMx->CCMR1, (ATIM_CCMR_ICPSC_Msk << (channel * 8)), (psc << (channel * 8))); + } + else + { + MODIFY_REG(TIMx->CCMR2, (ATIM_CCMR_ICPSC_Msk << ((channel - 2) * 8)), (psc << ((channel - 2) * 8))); + } +} + +/** + * @brief 读取输入捕捉预分频值 + * @rmtoll CCMR ICPSC FL_ATIM_IC_GetPrescaler + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_ATIM_CHANNEL_1 + * @arg @ref FL_ATIM_CHANNEL_2 + * @arg @ref FL_ATIM_CHANNEL_3 + * @arg @ref FL_ATIM_CHANNEL_4 + * @retval Returned value can be one of the following values: + * @arg @ref FL_ATIM_IC_PSC_DIV1 + * @arg @ref FL_ATIM_IC_PSC_DIV2 + * @arg @ref FL_ATIM_IC_PSC_DIV4 + * @arg @ref FL_ATIM_IC_PSC_DIV8 + */ +__STATIC_INLINE uint32_t FL_ATIM_IC_GetPrescaler(ATIM_Type *TIMx, uint32_t channel) +{ + if(channel < FL_ATIM_CHANNEL_3) + { + return (uint32_t)(READ_BIT(TIMx->CCMR1, (ATIM_CCMR_ICPSC_Msk << (channel * 8)))); + } + else + { + return (uint32_t)(READ_BIT(TIMx->CCMR2, (ATIM_CCMR_ICPSC_Msk << ((channel - 2) * 8)))); + } +} + +/** + * @brief 捕捉/比较通道选择 + * @rmtoll CCMR CCS FL_ATIM_CC_SetChannelMode + * @param TIMx TIM instance + * @param mode This parameter can be one of the following values: + * @arg @ref FL_ATIM_CHANNEL_MODE_OUTPUT + * @arg @ref FL_ATIM_CHANNEL_MODE_INPUT_NORMAL + * @arg @ref FL_ATIM_CHANNEL_MODE_INPUT_CROSSOVER + * @arg @ref FL_ATIM_CHANNEL_MODE_INPUT_TRC + * @param channel This parameter can be one of the following values: + * @arg @ref FL_ATIM_CHANNEL_1 + * @arg @ref FL_ATIM_CHANNEL_2 + * @arg @ref FL_ATIM_CHANNEL_3 + * @arg @ref FL_ATIM_CHANNEL_4 + * @retval None + */ +__STATIC_INLINE void FL_ATIM_CC_SetChannelMode(ATIM_Type *TIMx, uint32_t mode, uint32_t channel) +{ + if(channel < FL_ATIM_CHANNEL_3) + { + MODIFY_REG(TIMx->CCMR1, (ATIM_CCMR_CCS_Msk << (channel * 8)), (mode << (channel * 8))); + } + else + { + MODIFY_REG(TIMx->CCMR2, (ATIM_CCMR_CCS_Msk << ((channel - 2) * 8)), (mode << ((channel - 2) * 8))); + } +} + +/** + * @brief 获取捕捉/比较通道 + * @rmtoll CCMR CCS FL_ATIM_CC_GetChannelMode + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_ATIM_CHANNEL_1 + * @arg @ref FL_ATIM_CHANNEL_2 + * @arg @ref FL_ATIM_CHANNEL_3 + * @arg @ref FL_ATIM_CHANNEL_4 + * @retval Returned value can be one of the following values: + * @arg @ref FL_ATIM_CHANNEL_MODE_OUTPUT + * @arg @ref FL_ATIM_CHANNEL_MODE_INPUT_NORMAL + * @arg @ref FL_ATIM_CHANNEL_MODE_INPUT_CROSSOVER + * @arg @ref FL_ATIM_CHANNEL_MODE_INPUT_TRC + */ +__STATIC_INLINE uint32_t FL_ATIM_CC_GetChannelMode(ATIM_Type *TIMx, uint32_t channel) +{ + if(channel < FL_ATIM_CHANNEL_3) + { + return (uint32_t)(READ_BIT(TIMx->CCMR1, (ATIM_CCMR_CCS_Msk << (channel * 8)))); + } + else + { + return (uint32_t)(READ_BIT(TIMx->CCMR2, (ATIM_CCMR_CCS_Msk << ((channel - 2) * 8)))); + } +} + +/** + * @brief 设置捕捉/比较互补输出极性 + * @note + * @rmtoll CCER CCNP FL_ATIM_OC_SetReverseChannelPolarity + * @param TIMx TIM instance + * @param polarity This parameter can be one of the following values: + * @arg @ref FL_ATIM_OCN_POLARITY_NORMAL + * @arg @ref FL_ATIM_OCN_POLARITY_INVERT + * @param channel This parameter can be one of the following values: + * @arg @ref FL_ATIM_CHANNEL_1 + * @arg @ref FL_ATIM_CHANNEL_2 + * @arg @ref FL_ATIM_CHANNEL_3 + * @retval None + */ +__STATIC_INLINE void FL_ATIM_OC_SetReverseChannelPolarity(ATIM_Type *TIMx, uint32_t polarity, uint32_t channel) +{ + MODIFY_REG(TIMx->CCER, (ATIM_CCER_CCNP_Msk << (channel * 4)), (polarity << (channel * 4))); +} + +/** + * @brief 读取捕捉/比较互补输出极性 + * @note + * @rmtoll CCER CCNP FL_ATIM_OC_GetReverseChannelPolarity + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_ATIM_CHANNEL_1 + * @arg @ref FL_ATIM_CHANNEL_2 + * @arg @ref FL_ATIM_CHANNEL_3 + * @retval Returned value can be one of the following values: + * @arg @ref FL_ATIM_OCN_POLARITY_NORMAL + * @arg @ref FL_ATIM_OCN_POLARITY_INVERT + */ +__STATIC_INLINE uint32_t FL_ATIM_OC_GetReverseChannelPolarity(ATIM_Type *TIMx, uint32_t channel) +{ + return (uint32_t)(READ_BIT(TIMx->CCER, (ATIM_CCER_CCNP_Msk << (channel * 4)))); +} + +/** + * @brief 捕捉/比较互补输出使能 + * @note + * @rmtoll CCER CCNE FL_ATIM_OC_EnableReverseChannel + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_ATIM_CHANNEL_1 + * @arg @ref FL_ATIM_CHANNEL_2 + * @arg @ref FL_ATIM_CHANNEL_3 + * @retval None + */ +__STATIC_INLINE void FL_ATIM_OC_EnableReverseChannel(ATIM_Type *TIMx, uint32_t channel) +{ + SET_BIT(TIMx->CCER, (ATIM_CCER_CCNE_Msk << (channel * 4))); +} + +/** + * @brief 读取捕捉/比较互补输出使能状态 + * @note + * @rmtoll CCER CCNE FL_ATIM_OC_IsEnabledReverseChannel + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_ATIM_CHANNEL_1 + * @arg @ref FL_ATIM_CHANNEL_2 + * @arg @ref FL_ATIM_CHANNEL_3 + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ATIM_OC_IsEnabledReverseChannel(ATIM_Type *TIMx, uint32_t channel) +{ + return (uint32_t)(READ_BIT(TIMx->CCER, (ATIM_CCER_CCNE_Msk << (channel * 4))) == (ATIM_CCER_CCNE_Msk << (channel * 4))); +} + +/** + * @brief 捕捉/比较互补输出禁用 + * @note + * @rmtoll CCER CCNE FL_ATIM_OC_DisableReverseChannel + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_ATIM_CHANNEL_1 + * @arg @ref FL_ATIM_CHANNEL_2 + * @arg @ref FL_ATIM_CHANNEL_3 + * @retval None + */ +__STATIC_INLINE void FL_ATIM_OC_DisableReverseChannel(ATIM_Type *TIMx, uint32_t channel) +{ + CLEAR_BIT(TIMx->CCER, (ATIM_CCER_CCNE_Msk << (channel * 4))); +} + +/** + * @brief CC1通道配置为输出时，设置捕捉/比较输出极性 + * @rmtoll CCER CCOP FL_ATIM_OC_SetChannelPolarity + * @param TIMx TIM instance + * @param polarity This parameter can be one of the following values: + * @arg @ref FL_ATIM_OC_POLARITY_NORMAL + * @arg @ref FL_ATIM_OC_POLARITY_INVERT + * @param channel This parameter can be one of the following values: + * @arg @ref FL_ATIM_CHANNEL_1 + * @arg @ref FL_ATIM_CHANNEL_2 + * @arg @ref FL_ATIM_CHANNEL_3 + * @arg @ref FL_ATIM_CHANNEL_4 + * @retval None + */ +__STATIC_INLINE void FL_ATIM_OC_SetChannelPolarity(ATIM_Type *TIMx, uint32_t polarity, uint32_t channel) +{ + MODIFY_REG(TIMx->CCER, (ATIM_CCER_CCOP_Msk << (channel * 4)), (polarity << (channel * 4))); +} + +/** + * @brief CC1通道配置为输出时，读取捕捉/比较输出极性 + * @rmtoll CCER CCOP FL_ATIM_OC_GetChannelPolarity + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_ATIM_CHANNEL_1 + * @arg @ref FL_ATIM_CHANNEL_2 + * @arg @ref FL_ATIM_CHANNEL_3 + * @arg @ref FL_ATIM_CHANNEL_4 + * @retval Returned value can be one of the following values: + * @arg @ref FL_ATIM_OC_POLARITY_NORMAL + * @arg @ref FL_ATIM_OC_POLARITY_INVERT + */ +__STATIC_INLINE uint32_t FL_ATIM_OC_GetChannelPolarity(ATIM_Type *TIMx, uint32_t channel) +{ + return (uint32_t)(READ_BIT(TIMx->CCER, (ATIM_CCER_CCOP_Msk << (channel * 4)))); +} + +/** + * @brief CC1通道配置为输入时，设置捕捉/比较输出极性 + * @rmtoll CCER CCIP FL_ATIM_IC_SetChannelPolarity + * @param TIMx TIM instance + * @param polarity This parameter can be one of the following values: + * @arg @ref FL_ATIM_IC_POLARITY_NORMAL + * @arg @ref FL_ATIM_IC_POLARITY_INVERT + * @param channel This parameter can be one of the following values: + * @arg @ref FL_ATIM_CHANNEL_1 + * @arg @ref FL_ATIM_CHANNEL_2 + * @arg @ref FL_ATIM_CHANNEL_3 + * @arg @ref FL_ATIM_CHANNEL_4 + * @retval None + */ +__STATIC_INLINE void FL_ATIM_IC_SetChannelPolarity(ATIM_Type *TIMx, uint32_t polarity, uint32_t channel) +{ + MODIFY_REG(TIMx->CCER, (ATIM_CCER_CCIP_Msk << (channel * 4)), (polarity << (channel * 4))); +} + +/** + * @brief CC1通道配置为输入时，设置捕捉/比较输出极性 + * @rmtoll CCER CCIP FL_ATIM_IC_GetChannelPolarity + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_ATIM_CHANNEL_1 + * @arg @ref FL_ATIM_CHANNEL_2 + * @arg @ref FL_ATIM_CHANNEL_3 + * @arg @ref FL_ATIM_CHANNEL_4 + * @retval Returned value can be one of the following values: + * @arg @ref FL_ATIM_IC_POLARITY_NORMAL + * @arg @ref FL_ATIM_IC_POLARITY_INVERT + */ +__STATIC_INLINE uint32_t FL_ATIM_IC_GetChannelPolarity(ATIM_Type *TIMx, uint32_t channel) +{ + return (uint32_t)(READ_BIT(TIMx->CCER, (ATIM_CCER_CCIP_Msk << (channel * 4)))); +} + +/** + * @brief CC1通道配置为输出时，捕捉/比较输出使能 + * @rmtoll CCER CCOE FL_ATIM_OC_EnableChannel + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_ATIM_CHANNEL_1 + * @arg @ref FL_ATIM_CHANNEL_2 + * @arg @ref FL_ATIM_CHANNEL_3 + * @arg @ref FL_ATIM_CHANNEL_4 + * @retval None + */ +__STATIC_INLINE void FL_ATIM_OC_EnableChannel(ATIM_Type *TIMx, uint32_t channel) +{ + SET_BIT(TIMx->CCER, (ATIM_CCER_CCOE_Msk << (channel * 4))); +} + +/** + * @brief CC1通道配置为输出时，读取捕捉/比较输出使能状态 + * @rmtoll CCER CCOE FL_ATIM_OC_IsEnabledChannel + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_ATIM_CHANNEL_1 + * @arg @ref FL_ATIM_CHANNEL_2 + * @arg @ref FL_ATIM_CHANNEL_3 + * @arg @ref FL_ATIM_CHANNEL_4 + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ATIM_OC_IsEnabledChannel(ATIM_Type *TIMx, uint32_t channel) +{ + return (uint32_t)(READ_BIT(TIMx->CCER, (ATIM_CCER_CCOE_Msk << (channel * 4))) == (ATIM_CCER_CCOE_Msk << (channel * 4))); +} + +/** + * @brief CC1通道配置为输出时，捕捉/比较输出禁用 + * @rmtoll CCER CCOE FL_ATIM_OC_DisableChannel + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_ATIM_CHANNEL_1 + * @arg @ref FL_ATIM_CHANNEL_2 + * @arg @ref FL_ATIM_CHANNEL_3 + * @arg @ref FL_ATIM_CHANNEL_4 + * @retval None + */ +__STATIC_INLINE void FL_ATIM_OC_DisableChannel(ATIM_Type *TIMx, uint32_t channel) +{ + CLEAR_BIT(TIMx->CCER, (ATIM_CCER_CCOE_Msk << (channel * 4))); +} + +/** + * @brief CC1通道配置为输入时，捕捉/比较输出使能 + * @rmtoll CCER CCIE FL_ATIM_IC_EnableChannel + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_ATIM_CHANNEL_1 + * @arg @ref FL_ATIM_CHANNEL_2 + * @arg @ref FL_ATIM_CHANNEL_3 + * @arg @ref FL_ATIM_CHANNEL_4 + * @retval None + */ +__STATIC_INLINE void FL_ATIM_IC_EnableChannel(ATIM_Type *TIMx, uint32_t channel) +{ + SET_BIT(TIMx->CCER, (ATIM_CCER_CCIE_Msk << (channel * 4))); +} + +/** + * @brief CC1通道配置为输入时，读取捕捉/比较输出使能状态 + * @rmtoll CCER CCIE FL_ATIM_IC_IsEnabledChannel + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_ATIM_CHANNEL_1 + * @arg @ref FL_ATIM_CHANNEL_2 + * @arg @ref FL_ATIM_CHANNEL_3 + * @arg @ref FL_ATIM_CHANNEL_4 + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ATIM_IC_IsEnabledChannel(ATIM_Type *TIMx, uint32_t channel) +{ + return (uint32_t)(READ_BIT(TIMx->CCER, (ATIM_CCER_CCIE_Msk << (channel * 4))) == (ATIM_CCER_CCIE_Msk << (channel * 4))); +} + +/** + * @brief CC1通道配置为输入时，捕捉/比较输出禁用 + * @rmtoll CCER CCIE FL_ATIM_IC_DisableChannel + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_ATIM_CHANNEL_1 + * @arg @ref FL_ATIM_CHANNEL_2 + * @arg @ref FL_ATIM_CHANNEL_3 + * @arg @ref FL_ATIM_CHANNEL_4 + * @retval None + */ +__STATIC_INLINE void FL_ATIM_IC_DisableChannel(ATIM_Type *TIMx, uint32_t channel) +{ + CLEAR_BIT(TIMx->CCER, (ATIM_CCER_CCIE_Msk << (channel * 4))); +} + +/** + * @brief 设置重复计数值 + * @note + * @rmtoll RCR FL_ATIM_WriteRepetitionCounter + * @param TIMx TIM instance + * @param repeatCounter + * @retval None + */ +__STATIC_INLINE void FL_ATIM_WriteRepetitionCounter(ATIM_Type *TIMx, uint32_t repeatCounter) +{ + MODIFY_REG(TIMx->RCR, (0xffU << 0U), (repeatCounter << 0U)); +} + +/** + * @brief 读取重复计数值 + * @note + * @rmtoll RCR FL_ATIM_ReadRepetitionCounter + * @param TIMx TIM instance + * @retval + */ +__STATIC_INLINE uint32_t FL_ATIM_ReadRepetitionCounter(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->RCR, 0xffU) >> 0U); +} + +/** + * @brief 主控输出使能 + * @note + * @rmtoll BDTR MOE FL_ATIM_EnableALLOutput + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_ATIM_EnableALLOutput(ATIM_Type *TIMx) +{ + SET_BIT(TIMx->BDTR, ATIM_BDTR_MOE_Msk); +} + +/** + * @brief 读取主控输出使能状态 + * @note + * @rmtoll BDTR MOE FL_ATIM_IsEnabledALLOutput + * @param TIMx TIM instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ATIM_IsEnabledALLOutput(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->BDTR, ATIM_BDTR_MOE_Msk) == ATIM_BDTR_MOE_Msk); +} + +/** + * @brief 主控输出禁用 + * @note + * @rmtoll BDTR MOE FL_ATIM_DisableALLOutput + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_ATIM_DisableALLOutput(ATIM_Type *TIMx) +{ + CLEAR_BIT(TIMx->BDTR, ATIM_BDTR_MOE_Msk); +} + +/** + * @brief 自动输出使能 + * @note + * @rmtoll BDTR AOE FL_ATIM_EnableAutomaticOutput + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_ATIM_EnableAutomaticOutput(ATIM_Type *TIMx) +{ + SET_BIT(TIMx->BDTR, ATIM_BDTR_AOE_Msk); +} + +/** + * @brief 读取自动输出使能状态 + * @note + * @rmtoll BDTR AOE FL_ATIM_IsEnabledAutomaticOutput + * @param TIMx TIM instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ATIM_IsEnabledAutomaticOutput(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->BDTR, ATIM_BDTR_AOE_Msk) == ATIM_BDTR_AOE_Msk); +} + +/** + * @brief 自动输出禁用 + * @note + * @rmtoll BDTR AOE FL_ATIM_DisableAutomaticOutput + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_ATIM_DisableAutomaticOutput(ATIM_Type *TIMx) +{ + CLEAR_BIT(TIMx->BDTR, ATIM_BDTR_AOE_Msk); +} + +/** + * @brief 设置刹车极性 + * @note + * @rmtoll BDTR BKP FL_ATIM_SetBreakPolarity + * @param TIMx TIM instance + * @param polarity This parameter can be one of the following values: + * @arg @ref FL_ATIM_BREAK_POLARITY_LOW + * @arg @ref FL_ATIM_BREAK_POLARITY_HIGH + * @retval None + */ +__STATIC_INLINE void FL_ATIM_SetBreakPolarity(ATIM_Type *TIMx, uint32_t polarity) +{ + MODIFY_REG(TIMx->BDTR, ATIM_BDTR_BKP_Msk, polarity); +} + +/** + * @brief 读取刹车极性 + * @note + * @rmtoll BDTR BKP FL_ATIM_GetBreakPolarity + * @param TIMx TIM instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_ATIM_BREAK_POLARITY_LOW + * @arg @ref FL_ATIM_BREAK_POLARITY_HIGH + */ +__STATIC_INLINE uint32_t FL_ATIM_GetBreakPolarity(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->BDTR, ATIM_BDTR_BKP_Msk)); +} + +/** + * @brief 刹车使能 + * @note + * @rmtoll BDTR BKE FL_ATIM_EnableBreak + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_ATIM_EnableBreak(ATIM_Type *TIMx) +{ + SET_BIT(TIMx->BDTR, ATIM_BDTR_BKE_Msk); +} + +/** + * @brief 读取刹车使能状态 + * @note + * @rmtoll BDTR BKE FL_ATIM_IsEnabledBreak + * @param TIMx TIM instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ATIM_IsEnabledBreak(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->BDTR, ATIM_BDTR_BKE_Msk) == ATIM_BDTR_BKE_Msk); +} + +/** + * @brief 刹车禁用 + * @note + * @rmtoll BDTR BKE FL_ATIM_DisableBreak + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_ATIM_DisableBreak(ATIM_Type *TIMx) +{ + CLEAR_BIT(TIMx->BDTR, ATIM_BDTR_BKE_Msk); +} + +/** + * @brief 运行状态下的输出关闭状态选择 + * @note + * @rmtoll BDTR OSSR FL_ATIM_SetOffStateRun + * @param TIMx TIM instance + * @param state This parameter can be one of the following values: + * @arg @ref FL_ATIM_OSSR_DISABLE + * @arg @ref FL_ATIM_OSSR_ENABLE + * @retval None + */ +__STATIC_INLINE void FL_ATIM_SetOffStateRun(ATIM_Type *TIMx, uint32_t state) +{ + MODIFY_REG(TIMx->BDTR, ATIM_BDTR_OSSR_Msk, state); +} + +/** + * @brief 读取运行状态下的输出关闭状态选择 + * @note + * @rmtoll BDTR OSSR FL_ATIM_GetOffStateRun + * @param TIMx TIM instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_ATIM_OSSR_DISABLE + * @arg @ref FL_ATIM_OSSR_ENABLE + */ +__STATIC_INLINE uint32_t FL_ATIM_GetOffStateRun(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->BDTR, ATIM_BDTR_OSSR_Msk)); +} + +/** + * @brief IDLE状态下的输出关闭状态选择 + * @note + * @rmtoll BDTR OSSI FL_ATIM_SetOffStateIdle + * @param TIMx TIM instance + * @param state This parameter can be one of the following values: + * @arg @ref FL_ATIM_OSSI_DISABLE + * @arg @ref FL_ATIM_OSSI_ENABLE + * @retval None + */ +__STATIC_INLINE void FL_ATIM_SetOffStateIdle(ATIM_Type *TIMx, uint32_t state) +{ + MODIFY_REG(TIMx->BDTR, ATIM_BDTR_OSSI_Msk, state); +} + +/** + * @brief IDLE状态下的输出关闭状态选择 + * @note + * @rmtoll BDTR OSSI FL_ATIM_GetOffStateIdle + * @param TIMx TIM instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_ATIM_OSSI_DISABLE + * @arg @ref FL_ATIM_OSSI_ENABLE + */ +__STATIC_INLINE uint32_t FL_ATIM_GetOffStateIdle(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->BDTR, ATIM_BDTR_OSSI_Msk)); +} + +/** + * @brief 设置寄存器写保护等级 + * @note + * @rmtoll BDTR LOCK FL_ATIM_SetLockLevel + * @param TIMx TIM instance + * @param lockLevel This parameter can be one of the following values: + * @arg @ref FL_ATIM_LOCK_LEVEL_OFF + * @arg @ref FL_ATIM_LOCK_LEVEL_1 + * @arg @ref FL_ATIM_LOCK_LEVEL_2 + * @arg @ref FL_ATIM_LOCK_LEVEL_3 + * @retval None + */ +__STATIC_INLINE void FL_ATIM_SetLockLevel(ATIM_Type *TIMx, uint32_t lockLevel) +{ + MODIFY_REG(TIMx->BDTR, ATIM_BDTR_LOCK_Msk, lockLevel); +} + +/** + * @brief 读取寄存器写保护配置状态 + * @note + * @rmtoll BDTR LOCK FL_ATIM_GetLockLevel + * @param TIMx TIM instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_ATIM_LOCK_LEVEL_OFF + * @arg @ref FL_ATIM_LOCK_LEVEL_1 + * @arg @ref FL_ATIM_LOCK_LEVEL_2 + * @arg @ref FL_ATIM_LOCK_LEVEL_3 + */ +__STATIC_INLINE uint32_t FL_ATIM_GetLockLevel(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->BDTR, ATIM_BDTR_LOCK_Msk)); +} + +/** + * @brief 设置死区时间长度 + * @note + * @rmtoll BDTR DTG FL_ATIM_WriteDeadTime + * @param TIMx TIM instance + * @param deadTime + * @retval None + */ +__STATIC_INLINE void FL_ATIM_WriteDeadTime(ATIM_Type *TIMx, uint32_t deadTime) +{ + MODIFY_REG(TIMx->BDTR, (0xffU << 0U), (deadTime << 0U)); +} + +/** + * @brief 读取死区时间长度 + * @note + * @rmtoll BDTR DTG FL_ATIM_ReadDeadTime + * @param TIMx TIM instance + * @retval + */ +__STATIC_INLINE uint32_t FL_ATIM_ReadDeadTime(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->BDTR, 0xffU) >> 0U); +} + +/** + * @brief 设置ATIM_BRK1引脚输入门控信号 + * @note + * @rmtoll BKCR BRK1GATE FL_ATIM_SetBreak1GateState + * @param TIMx TIM instance + * @param state This parameter can be one of the following values: + * @arg @ref FL_ATIM_BREAK1_GATE_LOW + * @arg @ref FL_ATIM_BREAK1_GATE_AUTO + * @retval None + */ +__STATIC_INLINE void FL_ATIM_SetBreak1GateState(ATIM_Type *TIMx, uint32_t state) +{ + MODIFY_REG(TIMx->BKCR, ATIM_BKCR_BRK1GATE_Msk, state); +} + +/** + * @brief 读取ATIM_BRK1引脚输入门控信号 + * @note + * @rmtoll BKCR BRK1GATE FL_ATIM_GetBreak1GateState + * @param TIMx TIM instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_ATIM_BREAK1_GATE_LOW + * @arg @ref FL_ATIM_BREAK1_GATE_AUTO + */ +__STATIC_INLINE uint32_t FL_ATIM_GetBreak1GateState(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->BKCR, ATIM_BKCR_BRK1GATE_Msk)); +} + +/** + * @brief 设置ATIM_BRK2引脚输入门控信号 + * @note + * @rmtoll BKCR BRK2GATE FL_ATIM_SetBreak2GateState + * @param TIMx TIM instance + * @param state This parameter can be one of the following values: + * @arg @ref FL_ATIM_BREAK2_GATE_LOW + * @arg @ref FL_ATIM_BREAK2_GATE_AUTO + * @retval None + */ +__STATIC_INLINE void FL_ATIM_SetBreak2GateState(ATIM_Type *TIMx, uint32_t state) +{ + MODIFY_REG(TIMx->BKCR, ATIM_BKCR_BRK2GATE_Msk, state); +} + +/** + * @brief 读取ATIM_BRK2引脚输入门控信号 + * @note + * @rmtoll BKCR BRK2GATE FL_ATIM_GetBreak2GateState + * @param TIMx TIM instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_ATIM_BREAK2_GATE_LOW + * @arg @ref FL_ATIM_BREAK2_GATE_AUTO + */ +__STATIC_INLINE uint32_t FL_ATIM_GetBreak2GateState(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->BKCR, ATIM_BKCR_BRK2GATE_Msk)); +} + +/** + * @brief 设置刹车信号的滤波时钟和长度选择 + * @note + * @rmtoll BKCR BRKF FL_ATIM_SetBreakFilter + * @param TIMx TIM instance + * @param filter This parameter can be one of the following values: + * @arg @ref FL_ATIM_BREAK_FILTER_DIV1 + * @arg @ref FL_ATIM_BREAK_FILTER_DIV1_N2 + * @arg @ref FL_ATIM_BREAK_FILTER_DIV1_N4 + * @arg @ref FL_ATIM_BREAK_FILTER_DIV1_N8 + * @arg @ref FL_ATIM_BREAK_FILTER_DIV2_N6 + * @arg @ref FL_ATIM_BREAK_FILTER_DIV2_N8 + * @arg @ref FL_ATIM_BREAK_FILTER_DIV4_N6 + * @arg @ref FL_ATIM_BREAK_FILTER_DIV4_N8 + * @arg @ref FL_ATIM_BREAK_FILTER_DIV8_N6 + * @arg @ref FL_ATIM_BREAK_FILTER_DIV8_N8 + * @arg @ref FL_ATIM_BREAK_FILTER_DIV16_N5 + * @arg @ref FL_ATIM_BREAK_FILTER_DIV16_N6 + * @arg @ref FL_ATIM_BREAK_FILTER_DIV16_N8 + * @arg @ref FL_ATIM_BREAK_FILTER_DIV32_N5 + * @arg @ref FL_ATIM_BREAK_FILTER_DIV32_N6 + * @arg @ref FL_ATIM_BREAK_FILTER_DIV32_N8 + * @retval None + */ +__STATIC_INLINE void FL_ATIM_SetBreakFilter(ATIM_Type *TIMx, uint32_t filter) +{ + MODIFY_REG(TIMx->BKCR, ATIM_BKCR_BRKF_Msk, filter); +} + +/** + * @brief 读取刹车信号的滤波时钟和长度选择 + * @note + * @rmtoll BKCR BRKF FL_ATIM_GetBreakFilter + * @param TIMx TIM instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_ATIM_BREAK_FILTER_DIV1 + * @arg @ref FL_ATIM_BREAK_FILTER_DIV1_N2 + * @arg @ref FL_ATIM_BREAK_FILTER_DIV1_N4 + * @arg @ref FL_ATIM_BREAK_FILTER_DIV1_N8 + * @arg @ref FL_ATIM_BREAK_FILTER_DIV2_N6 + * @arg @ref FL_ATIM_BREAK_FILTER_DIV2_N8 + * @arg @ref FL_ATIM_BREAK_FILTER_DIV4_N6 + * @arg @ref FL_ATIM_BREAK_FILTER_DIV4_N8 + * @arg @ref FL_ATIM_BREAK_FILTER_DIV8_N6 + * @arg @ref FL_ATIM_BREAK_FILTER_DIV8_N8 + * @arg @ref FL_ATIM_BREAK_FILTER_DIV16_N5 + * @arg @ref FL_ATIM_BREAK_FILTER_DIV16_N6 + * @arg @ref FL_ATIM_BREAK_FILTER_DIV16_N8 + * @arg @ref FL_ATIM_BREAK_FILTER_DIV32_N5 + * @arg @ref FL_ATIM_BREAK_FILTER_DIV32_N6 + * @arg @ref FL_ATIM_BREAK_FILTER_DIV32_N8 + */ +__STATIC_INLINE uint32_t FL_ATIM_GetBreakFilter(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->BKCR, ATIM_BKCR_BRKF_Msk)); +} + +/** + * @brief 刹车组合控制 + * @note + * @rmtoll BKCR BRKCOMB FL_ATIM_SetBreakSignalCombination + * @param TIMx TIM instance + * @param filter This parameter can be one of the following values: + * @arg @ref FL_ATIM_BREAK_COMBINATION_OR + * @arg @ref FL_ATIM_BREAK_COMBINATION_AND + * @retval None + */ +__STATIC_INLINE void FL_ATIM_SetBreakSignalCombination(ATIM_Type *TIMx, uint32_t filter) +{ + MODIFY_REG(TIMx->BKCR, ATIM_BKCR_BRKCOMB_Msk, filter); +} + +/** + * @brief 读取刹车组合控制状态 + * @note + * @rmtoll BKCR BRKCOMB FL_ATIM_GetBreakSignalCombination + * @param TIMx TIM instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_ATIM_BREAK_COMBINATION_OR + * @arg @ref FL_ATIM_BREAK_COMBINATION_AND + */ +__STATIC_INLINE uint32_t FL_ATIM_GetBreakSignalCombination(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->BKCR, ATIM_BKCR_BRKCOMB_Msk)); +} + +/** + * @brief XTHF停振检测刹车信号使能 + * @note + * @rmtoll BKCR HFDET_BRKEN FL_ATIM_EnableHFDETBreak + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_ATIM_EnableHFDETBreak(ATIM_Type *TIMx) +{ + SET_BIT(TIMx->BKCR, ATIM_BKCR_HFDET_BRKEN_Msk); +} + +/** + * @brief 读取XTHF停振检测刹车信号使能状态 + * @note + * @rmtoll BKCR HFDET_BRKEN FL_ATIM_IsEnabledHFDETBreak + * @param TIMx TIM instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ATIM_IsEnabledHFDETBreak(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->BKCR, ATIM_BKCR_HFDET_BRKEN_Msk) == ATIM_BKCR_HFDET_BRKEN_Msk); +} + +/** + * @brief XTHF停振检测刹车信号禁用 + * @note + * @rmtoll BKCR HFDET_BRKEN FL_ATIM_DisableHFDETBreak + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_ATIM_DisableHFDETBreak(ATIM_Type *TIMx) +{ + CLEAR_BIT(TIMx->BKCR, ATIM_BKCR_HFDET_BRKEN_Msk); +} + +/** + * @brief SVD刹车信号使能 + * @note + * @rmtoll BKCR SVD_BRKEN FL_ATIM_EnableSVDBreak + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_ATIM_EnableSVDBreak(ATIM_Type *TIMx) +{ + SET_BIT(TIMx->BKCR, ATIM_BKCR_SVD_BRKEN_Msk); +} + +/** + * @brief 读取SVD刹车信号使能状态 + * @note + * @rmtoll BKCR SVD_BRKEN FL_ATIM_IsEnabledSVDBreak + * @param TIMx TIM instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ATIM_IsEnabledSVDBreak(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->BKCR, ATIM_BKCR_SVD_BRKEN_Msk) == ATIM_BKCR_SVD_BRKEN_Msk); +} + +/** + * @brief SVD刹车信号禁用 + * @note + * @rmtoll BKCR SVD_BRKEN FL_ATIM_DisableSVDBreak + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_ATIM_DisableSVDBreak(ATIM_Type *TIMx) +{ + CLEAR_BIT(TIMx->BKCR, ATIM_BKCR_SVD_BRKEN_Msk); +} + +/** + * @brief 比较器输出刹车信号使能 + * @note + * @rmtoll BKCR COMP_BRKEN FL_ATIM_EnableCOMPBreak + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_ATIM_EnableCOMPBreak(ATIM_Type *TIMx) +{ + SET_BIT(TIMx->BKCR, ATIM_BKCR_COMP_BRKEN_Msk); +} + +/** + * @brief 读取比较器输出刹车信号使能状态 + * @note + * @rmtoll BKCR COMP_BRKEN FL_ATIM_IsEnabledCOMPBreak + * @param TIMx TIM instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_ATIM_IsEnabledCOMPBreak(ATIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->BKCR, ATIM_BKCR_COMP_BRKEN_Msk) == ATIM_BKCR_COMP_BRKEN_Msk); +} + +/** + * @brief 比较器输出刹车信号禁用 + * @note + * @rmtoll BKCR COMP_BRKEN FL_ATIM_DisableCOMPBreak + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_ATIM_DisableCOMPBreak(ATIM_Type *TIMx) +{ + CLEAR_BIT(TIMx->BKCR, ATIM_BKCR_COMP_BRKEN_Msk); +} + +/** + * @} + */ + +/** @defgroup ATIM_FL_EF_Init Initialization and de-initialization functions + * @{ + */ + +FL_ErrorStatus FL_ATIM_DeInit(ATIM_Type *TIMx); + +void FL_ATIM_StructInit(FL_ATIM_InitTypeDef *TIM_InitStruct); +void FL_ATIM_SlaveModeStructInit(FL_ATIM_SlaveInitTypeDef *TIM_InitStruct); +void FL_ATIM_IC_StructInit(FL_ATIM_IC_InitTypeDef *TIM_ICInitStruct); +void FL_ATIM_OC_StructInit(FL_ATIM_OC_InitTypeDef *TIM_OC_InitStruct); +void FL_ATIM_ETRStructInit(FL_ATIM_ETR_InitTypeDef *TIM_InitStruct); +void FL_ATIM_BDTR_StructInit(FL_ATIM_BDTR_InitTypeDef *TIM_BDTR_InitStruct); + +FL_ErrorStatus FL_ATIM_Init(ATIM_Type *TIMx, FL_ATIM_InitTypeDef *TIM_InitStruct); +FL_ErrorStatus FL_ATIM_IC_Init(ATIM_Type *TIMx, uint32_t Channel, FL_ATIM_IC_InitTypeDef *IC_InitStruct); +FL_ErrorStatus FL_ATIM_ETR_Init(ATIM_Type *TIMx, FL_ATIM_ETR_InitTypeDef *TIM_InitStruct); +FL_ErrorStatus FL_ATIM_SlaveMode_Init(ATIM_Type *TIMx, FL_ATIM_SlaveInitTypeDef *TIM_InitStruct); +FL_ErrorStatus FL_ATIM_OC_Init(ATIM_Type *TIMx, uint32_t Channel, FL_ATIM_OC_InitTypeDef *TIM_OC_InitStruct); +FL_ErrorStatus FL_ATIM_BDTR_Init(ATIM_Type *TIMx, FL_ATIM_BDTR_InitTypeDef *TIM_BDTR_InitStruct); + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif /* __FM33LG0XX_FL_ATIM_H*/ + +/*************************Py_Code_Generator Version: 0.1-0.11-0.1 @ 2020-09-12*************************/ +/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/ diff --git a/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_bstim16.h b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_bstim16.h new file mode 100644 index 0000000..3fadc78 --- /dev/null +++ b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_bstim16.h @@ -0,0 +1,506 @@ + /** + ******************************************************************************************************* + * @file fm33lg0xx_fl_bstim16.h + * @author FMSH Application Team + * @brief Head file of BSTIM16 FL Module + ******************************************************************************************************* + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + + + +/* Define to prevent recursive inclusion---------------------------------------------------------------*/ +#ifndef __FM33LG0XX_FL_BSTIM16_H +#define __FM33LG0XX_FL_BSTIM16_H + +#ifdef __cplusplus +extern "C" { +#endif +/* Includes -------------------------------------------------------------------------------------------*/ +#include "fm33lg0xx_fl_def.h" +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @defgroup BSTIM16 BSTIM16 + * @brief BSTIM16 FL driver + * @{ + */ + +/* Exported types -------------------------------------------------------------------------------------*/ +/** @defgroup BSTIM16_FL_ES_INIT BSTIM16 Exported Init structures + * @{ + */ + +/** + * @brief FL BSTIM16 Init Sturcture definition + */ + +typedef struct +{ + /* 预分频系数 */ + uint32_t prescaler; + /* 自动重装载值 */ + uint32_t autoReload; + /* 自动重装载值 */ + uint32_t autoReloadState; + + uint32_t clockSource; + +} FL_BSTIM16_InitTypeDef; + +/** + * @} + */ +/* Exported constants ---------------------------------------------------------------------------------*/ +/** @defgroup BSTIM16_FL_Exported_Constants BSTIM16 Exported Constants + * @{ + */ + +#define BSTIM16_CR1_ARPE_Pos (7U) +#define BSTIM16_CR1_ARPE_Msk (0x1U << BSTIM16_CR1_ARPE_Pos) +#define BSTIM16_CR1_ARPE BSTIM16_CR1_ARPE_Msk + +#define BSTIM16_CR1_OPM_Pos (3U) +#define BSTIM16_CR1_OPM_Msk (0x1U << BSTIM16_CR1_OPM_Pos) +#define BSTIM16_CR1_OPM BSTIM16_CR1_OPM_Msk + +#define BSTIM16_CR1_URS_Pos (2U) +#define BSTIM16_CR1_URS_Msk (0x1U << BSTIM16_CR1_URS_Pos) +#define BSTIM16_CR1_URS BSTIM16_CR1_URS_Msk + +#define BSTIM16_CR1_UDIS_Pos (1U) +#define BSTIM16_CR1_UDIS_Msk (0x1U << BSTIM16_CR1_UDIS_Pos) +#define BSTIM16_CR1_UDIS BSTIM16_CR1_UDIS_Msk + +#define BSTIM16_CR1_CEN_Pos (0U) +#define BSTIM16_CR1_CEN_Msk (0x1U << BSTIM16_CR1_CEN_Pos) +#define BSTIM16_CR1_CEN BSTIM16_CR1_CEN_Msk + +#define BSTIM16_CR2_MMS_Pos (4U) +#define BSTIM16_CR2_MMS_Msk (0x7U << BSTIM16_CR2_MMS_Pos) +#define BSTIM16_CR2_MMS BSTIM16_CR2_MMS_Msk + +#define BSTIM16_IER_UIE_Pos (0U) +#define BSTIM16_IER_UIE_Msk (0x1U << BSTIM16_IER_UIE_Pos) +#define BSTIM16_IER_UIE BSTIM16_IER_UIE_Msk + +#define BSTIM16_ISR_UIF_Pos (0U) +#define BSTIM16_ISR_UIF_Msk (0x1U << BSTIM16_ISR_UIF_Pos) +#define BSTIM16_ISR_UIF BSTIM16_ISR_UIF_Msk + +#define BSTIM16_EGR_UG_Pos (0U) +#define BSTIM16_EGR_UG_Msk (0x1U << BSTIM16_EGR_UG_Pos) +#define BSTIM16_EGR_UG BSTIM16_EGR_UG_Msk + + + + + + +#define FL_BSTIM16_ONE_PULSE_MODE_CONTINUOUS (0x0U << BSTIM16_CR1_OPM_Pos) +#define FL_BSTIM16_ONE_PULSE_MODE_SINGLE (0x1U << BSTIM16_CR1_OPM_Pos) + + +#define FL_BSTIM16_UPDATE_SOURCE_REGULAR (0x0U << BSTIM16_CR1_URS_Pos) +#define FL_BSTIM16_UPDATE_SOURCE_COUNTER (0x1U << BSTIM16_CR1_URS_Pos) + + +#define FL_BSTIM16_TRGO_UG (0x0U << BSTIM16_CR2_MMS_Pos) +#define FL_BSTIM16_TRGO_ENABLE (0x1U << BSTIM16_CR2_MMS_Pos) +#define FL_BSTIM16_TRGO_UPDATE (0x2U << BSTIM16_CR2_MMS_Pos) + + +/** + * @} + */ +/* Exported functions ---------------------------------------------------------------------------------*/ +/** @defgroup BSTIM16_FL_Exported_Functions BSTIM16 Exported Functions + * @{ + */ + +/** + * @brief Auto-Reload preload enable + * @rmtoll CR1 ARPE FL_BSTIM16_EnableARRPreload + * @param BSTIM16x BSTIM16 instance + * @retval None + */ +__STATIC_INLINE void FL_BSTIM16_EnableARRPreload(BSTIM16_Type *BSTIM16x) +{ + SET_BIT(BSTIM16x->CR1, BSTIM16_CR1_ARPE_Msk); +} + +/** + * @brief Get Auto-Reload preload enable status + * @rmtoll CR1 ARPE FL_BSTIM16_IsEnabledARRPreload + * @param BSTIM16x BSTIM16 instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_BSTIM16_IsEnabledARRPreload(BSTIM16_Type *BSTIM16x) +{ + return (uint32_t)(READ_BIT(BSTIM16x->CR1, BSTIM16_CR1_ARPE_Msk) == BSTIM16_CR1_ARPE_Msk); +} + +/** + * @brief Auto-Reload preload disable + * @rmtoll CR1 ARPE FL_BSTIM16_DisableARRPreload + * @param BSTIM16x BSTIM16 instance + * @retval None + */ +__STATIC_INLINE void FL_BSTIM16_DisableARRPreload(BSTIM16_Type *BSTIM16x) +{ + CLEAR_BIT(BSTIM16x->CR1, BSTIM16_CR1_ARPE_Msk); +} + +/** + * @brief Set one pulse mode + * @rmtoll CR1 OPM FL_BSTIM16_SetOnePulseMode + * @param BSTIM16x BSTIM16 instance + * @param mode This parameter can be one of the following values: + * @arg @ref FL_BSTIM16_ONE_PULSE_MODE_CONTINUOUS + * @arg @ref FL_BSTIM16_ONE_PULSE_MODE_SINGLE + * @retval None + */ +__STATIC_INLINE void FL_BSTIM16_SetOnePulseMode(BSTIM16_Type *BSTIM16x, uint32_t mode) +{ + MODIFY_REG(BSTIM16x->CR1, BSTIM16_CR1_OPM_Msk, mode); +} + +/** + * @brief Get one pulse mode + * @rmtoll CR1 OPM FL_BSTIM16_GetOnePulseMode + * @param BSTIM16x BSTIM16 instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_BSTIM16_ONE_PULSE_MODE_CONTINUOUS + * @arg @ref FL_BSTIM16_ONE_PULSE_MODE_SINGLE + */ +__STATIC_INLINE uint32_t FL_BSTIM16_GetOnePulseMode(BSTIM16_Type *BSTIM16x) +{ + return (uint32_t)(READ_BIT(BSTIM16x->CR1, BSTIM16_CR1_OPM_Msk)); +} + +/** + * @brief Set update request + * @rmtoll CR1 URS FL_BSTIM16_SetUpdateSource + * @param BSTIM16x BSTIM16 instance + * @param source This parameter can be one of the following values: + * @arg @ref FL_BSTIM16_UPDATE_SOURCE_REGULAR + * @arg @ref FL_BSTIM16_UPDATE_SOURCE_COUNTER + * @retval None + */ +__STATIC_INLINE void FL_BSTIM16_SetUpdateSource(BSTIM16_Type *BSTIM16x, uint32_t source) +{ + MODIFY_REG(BSTIM16x->CR1, BSTIM16_CR1_URS_Msk, source); +} + +/** + * @brief Get update request status + * @rmtoll CR1 URS FL_BSTIM16_GetUpdateSource + * @param BSTIM16x BSTIM16 instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_BSTIM16_UPDATE_SOURCE_REGULAR + * @arg @ref FL_BSTIM16_UPDATE_SOURCE_COUNTER + */ +__STATIC_INLINE uint32_t FL_BSTIM16_GetUpdateSource(BSTIM16_Type *BSTIM16x) +{ + return (uint32_t)(READ_BIT(BSTIM16x->CR1, BSTIM16_CR1_URS_Msk)); +} + +/** + * @brief Update event enable + * @rmtoll CR1 UDIS FL_BSTIM16_EnableUpdateEvent + * @param BSTIM16x BSTIM16 instance + * @retval None + */ +__STATIC_INLINE void FL_BSTIM16_EnableUpdateEvent(BSTIM16_Type *BSTIM16x) +{ + CLEAR_BIT(BSTIM16x->CR1, BSTIM16_CR1_UDIS_Msk); +} + +/** + * @brief Get update event disable status + * @rmtoll CR1 UDIS FL_BSTIM16_IsEnabledUpdateEvent + * @param BSTIM16x BSTIM16 instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_BSTIM16_IsEnabledUpdateEvent(BSTIM16_Type *BSTIM16x) +{ + return (uint32_t)!(READ_BIT(BSTIM16x->CR1, BSTIM16_CR1_UDIS_Msk) == BSTIM16_CR1_UDIS_Msk); +} + +/** + * @brief Update event disable + * @rmtoll CR1 UDIS FL_BSTIM16_DisableUpdateEvent + * @param BSTIM16x BSTIM16 instance + * @retval None + */ +__STATIC_INLINE void FL_BSTIM16_DisableUpdateEvent(BSTIM16_Type *BSTIM16x) +{ + SET_BIT(BSTIM16x->CR1, BSTIM16_CR1_UDIS_Msk); +} + +/** + * @brief Counter enable + * @rmtoll CR1 CEN FL_BSTIM16_Enable + * @param BSTIM16x BSTIM16 instance + * @retval None + */ +__STATIC_INLINE void FL_BSTIM16_Enable(BSTIM16_Type *BSTIM16x) +{ + SET_BIT(BSTIM16x->CR1, BSTIM16_CR1_CEN_Msk); +} + +/** + * @brief Get counter enable status + * @rmtoll CR1 CEN FL_BSTIM16_IsEnabled + * @param BSTIM16x BSTIM16 instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_BSTIM16_IsEnabled(BSTIM16_Type *BSTIM16x) +{ + return (uint32_t)(READ_BIT(BSTIM16x->CR1, BSTIM16_CR1_CEN_Msk) == BSTIM16_CR1_CEN_Msk); +} + +/** + * @brief Counter disable + * @rmtoll CR1 CEN FL_BSTIM16_Disable + * @param BSTIM16x BSTIM16 instance + * @retval None + */ +__STATIC_INLINE void FL_BSTIM16_Disable(BSTIM16_Type *BSTIM16x) +{ + CLEAR_BIT(BSTIM16x->CR1, BSTIM16_CR1_CEN_Msk); +} + +/** + * @brief Set master Trigger Output mode + * @rmtoll CR2 MMS FL_BSTIM16_SetTriggerOutput + * @param BSTIM16x BSTIM16 instance + * @param triggerOutput This parameter can be one of the following values: + * @arg @ref FL_BSTIM16_TRGO_UG + * @arg @ref FL_BSTIM16_TRGO_ENABLE + * @arg @ref FL_BSTIM16_TRGO_UPDATE + * @retval None + */ +__STATIC_INLINE void FL_BSTIM16_SetTriggerOutput(BSTIM16_Type *BSTIM16x, uint32_t triggerOutput) +{ + MODIFY_REG(BSTIM16x->CR2, BSTIM16_CR2_MMS_Msk, triggerOutput); +} + +/** + * @brief Get master Trigger Output mode + * @rmtoll CR2 MMS FL_BSTIM16_GetTriggerOutput + * @param BSTIM16x BSTIM16 instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_BSTIM16_TRGO_UG + * @arg @ref FL_BSTIM16_TRGO_ENABLE + * @arg @ref FL_BSTIM16_TRGO_UPDATE + */ +__STATIC_INLINE uint32_t FL_BSTIM16_GetTriggerOutput(BSTIM16_Type *BSTIM16x) +{ + return (uint32_t)(READ_BIT(BSTIM16x->CR2, BSTIM16_CR2_MMS_Msk)); +} + +/** + * @brief Update event interrupt disable + * @rmtoll IER UIE FL_BSTIM16_DisableIT_Update + * @param BSTIM16x BSTIM16 instance + * @retval None + */ +__STATIC_INLINE void FL_BSTIM16_DisableIT_Update(BSTIM16_Type *BSTIM16x) +{ + CLEAR_BIT(BSTIM16x->IER, BSTIM16_IER_UIE_Msk); +} + +/** + * @brief Update event interrupt enable + * @rmtoll IER UIE FL_BSTIM16_EnableIT_Update + * @param BSTIM16x BSTIM16 instance + * @retval None + */ +__STATIC_INLINE void FL_BSTIM16_EnableIT_Update(BSTIM16_Type *BSTIM16x) +{ + SET_BIT(BSTIM16x->IER, BSTIM16_IER_UIE_Msk); +} + +/** + * @brief Get update event interrupt enable status + * @rmtoll IER UIE FL_BSTIM16_IsEnabledIT_Update + * @param BSTIM16x BSTIM16 instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_BSTIM16_IsEnabledIT_Update(BSTIM16_Type *BSTIM16x) +{ + return (uint32_t)(READ_BIT(BSTIM16x->IER, BSTIM16_IER_UIE_Msk) == BSTIM16_IER_UIE_Msk); +} + +/** + * @brief Get update event interrupt flag + * @rmtoll ISR UIF FL_BSTIM16_IsActiveFlag_Update + * @param BSTIM16x BSTIM16 instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_BSTIM16_IsActiveFlag_Update(BSTIM16_Type *BSTIM16x) +{ + return (uint32_t)(READ_BIT(BSTIM16x->ISR, BSTIM16_ISR_UIF_Msk) == (BSTIM16_ISR_UIF_Msk)); +} + +/** + * @brief Clear update event interrupt flag + * @rmtoll ISR UIF FL_BSTIM16_ClearFlag_Update + * @param BSTIM16x BSTIM16 instance + * @retval None + */ +__STATIC_INLINE void FL_BSTIM16_ClearFlag_Update(BSTIM16_Type *BSTIM16x) +{ + WRITE_REG(BSTIM16x->ISR, BSTIM16_ISR_UIF_Msk); +} + +/** + * @brief Software update event enable + * @rmtoll EGR UG FL_BSTIM16_GenerateUpdateEvent + * @param BSTIM16x BSTIM16 instance + * @retval None + */ +__STATIC_INLINE void FL_BSTIM16_GenerateUpdateEvent(BSTIM16_Type *BSTIM16x) +{ + SET_BIT(BSTIM16x->EGR, BSTIM16_EGR_UG_Msk); +} + +/** + * @brief Set counter value + * @rmtoll CNT FL_BSTIM16_WriteCounter + * @param BSTIM16x BSTIM16 instance + * @param count + * @retval None + */ +__STATIC_INLINE void FL_BSTIM16_WriteCounter(BSTIM16_Type *BSTIM16x, uint32_t count) +{ + MODIFY_REG(BSTIM16x->CNT, (0xffffU << 0U), (count << 0U)); +} + +/** + * @brief Get counter value + * @rmtoll CNT FL_BSTIM16_ReadCounter + * @param BSTIM16x BSTIM16 instance + * @retval + */ +__STATIC_INLINE uint32_t FL_BSTIM16_ReadCounter(BSTIM16_Type *BSTIM16x) +{ + return (uint32_t)(READ_BIT(BSTIM16x->CNT, 0xffffU) >> 0U); +} + +/** + * @brief Set counter Clock prescaler value + * @rmtoll PSC FL_BSTIM16_WritePrescaler + * @param BSTIM16x BSTIM16 instance + * @param psc + * @retval None + */ +__STATIC_INLINE void FL_BSTIM16_WritePrescaler(BSTIM16_Type *BSTIM16x, uint32_t psc) +{ + MODIFY_REG(BSTIM16x->PSC, (0xffffU << 0U), (psc << 0U)); +} + +/** + * @brief Get counter Clock prescaler value + * @rmtoll PSC FL_BSTIM16_ReadPrescaler + * @param BSTIM16x BSTIM16 instance + * @retval + */ +__STATIC_INLINE uint32_t FL_BSTIM16_ReadPrescaler(BSTIM16_Type *BSTIM16x) +{ + return (uint32_t)(READ_BIT(BSTIM16x->PSC, 0xffffU) >> 0U); +} + +/** + * @brief Set Auto-Reload register value + * @rmtoll ARR FL_BSTIM16_WriteAutoReload + * @param BSTIM16x BSTIM16 instance + * @param value + * @retval None + */ +__STATIC_INLINE void FL_BSTIM16_WriteAutoReload(BSTIM16_Type *BSTIM16x, uint32_t value) +{ + MODIFY_REG(BSTIM16x->ARR, (0xffffU << 0U), (value << 0U)); +} + +/** + * @brief Get Auto-Reload register value + * @rmtoll ARR FL_BSTIM16_ReadAutoReload + * @param BSTIM16x BSTIM16 instance + * @retval + */ +__STATIC_INLINE uint32_t FL_BSTIM16_ReadAutoReload(BSTIM16_Type *BSTIM16x) +{ + return (uint32_t)(READ_BIT(BSTIM16x->ARR, 0xffffU) >> 0U); +} + +/** + * @} + */ + +/** @defgroup BSTIM16_FL_EF_Init Initialization and de-initialization functions + * @{ + */ + +FL_ErrorStatus FL_BSTIM16_DeInit(BSTIM16_Type *BSTIM16x); +FL_ErrorStatus FL_BSTIM16_Init(BSTIM16_Type *BSTIM16x, FL_BSTIM16_InitTypeDef *init); +void FL_BSTIM16_StructInit(FL_BSTIM16_InitTypeDef *init); + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif /* __FM33LG0XX_FL_BSTIM16_H*/ + +/*************************Py_Code_Generator Version: 0.1-0.11-0.1 @ 2020-09-12*************************/ +/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/ diff --git a/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_bstim32.h b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_bstim32.h new file mode 100644 index 0000000..cd7dfd4 --- /dev/null +++ b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_bstim32.h @@ -0,0 +1,509 @@ + /** + ******************************************************************************************************* + * @file fm33lg0xx_fl_bstim32.h + * @author FMSH Application Team + * @brief Head file of BSTIM32 FL Module + ******************************************************************************************************* + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + + + +/* Define to prevent recursive inclusion---------------------------------------------------------------*/ +#ifndef __FM33LG0XX_FL_BSTIM32_H +#define __FM33LG0XX_FL_BSTIM32_H + +#ifdef __cplusplus +extern "C" { +#endif +/* Includes -------------------------------------------------------------------------------------------*/ +#include "fm33lg0xx_fl_def.h" +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @defgroup BSTIM32 BSTIM32 + * @brief BSTIM32 FL driver + * @{ + */ + +/* Exported types -------------------------------------------------------------------------------------*/ +/** @defgroup BSTIM32_FL_ES_INIT BSTIM32 Exported Init structures + * @{ + */ + +/** + * @brief FL BSTIM32 Init Sturcture definition + */ + +typedef struct +{ + /* 时钟源 */ + uint32_t clockSource; + + /* 预分频系数 */ + uint32_t prescaler; + + /* 自动重装载值 */ + uint32_t autoReload; + + /* 自动重装载值 */ + uint32_t autoReloadState; + +} FL_BSTIM32_InitTypeDef; + +/** + * @} + */ +/* Exported constants ---------------------------------------------------------------------------------*/ +/** @defgroup BSTIM32_FL_Exported_Constants BSTIM32 Exported Constants + * @{ + */ + +#define BSTIM32_CR1_ARPE_Pos (7U) +#define BSTIM32_CR1_ARPE_Msk (0x1U << BSTIM32_CR1_ARPE_Pos) +#define BSTIM32_CR1_ARPE BSTIM32_CR1_ARPE_Msk + +#define BSTIM32_CR1_OPM_Pos (3U) +#define BSTIM32_CR1_OPM_Msk (0x1U << BSTIM32_CR1_OPM_Pos) +#define BSTIM32_CR1_OPM BSTIM32_CR1_OPM_Msk + +#define BSTIM32_CR1_URS_Pos (2U) +#define BSTIM32_CR1_URS_Msk (0x1U << BSTIM32_CR1_URS_Pos) +#define BSTIM32_CR1_URS BSTIM32_CR1_URS_Msk + +#define BSTIM32_CR1_UDIS_Pos (1U) +#define BSTIM32_CR1_UDIS_Msk (0x1U << BSTIM32_CR1_UDIS_Pos) +#define BSTIM32_CR1_UDIS BSTIM32_CR1_UDIS_Msk + +#define BSTIM32_CR1_CEN_Pos (0U) +#define BSTIM32_CR1_CEN_Msk (0x1U << BSTIM32_CR1_CEN_Pos) +#define BSTIM32_CR1_CEN BSTIM32_CR1_CEN_Msk + +#define BSTIM32_CR2_MMS_Pos (4U) +#define BSTIM32_CR2_MMS_Msk (0x7U << BSTIM32_CR2_MMS_Pos) +#define BSTIM32_CR2_MMS BSTIM32_CR2_MMS_Msk + +#define BSTIM32_IER_UIE_Pos (0U) +#define BSTIM32_IER_UIE_Msk (0x1U << BSTIM32_IER_UIE_Pos) +#define BSTIM32_IER_UIE BSTIM32_IER_UIE_Msk + +#define BSTIM32_ISR_UIF_Pos (0U) +#define BSTIM32_ISR_UIF_Msk (0x1U << BSTIM32_ISR_UIF_Pos) +#define BSTIM32_ISR_UIF BSTIM32_ISR_UIF_Msk + +#define BSTIM32_EGR_UG_Pos (0U) +#define BSTIM32_EGR_UG_Msk (0x1U << BSTIM32_EGR_UG_Pos) +#define BSTIM32_EGR_UG BSTIM32_EGR_UG_Msk + + + + + + +#define FL_BSTIM32_ONE_PULSE_MODE_CONTINUOUS (0x0U << BSTIM32_CR1_OPM_Pos) +#define FL_BSTIM32_ONE_PULSE_MODE_SINGLE (0x1U << BSTIM32_CR1_OPM_Pos) + + +#define FL_BSTIM32_UPDATE_SOURCE_REGULAR (0x0U << BSTIM32_CR1_URS_Pos) +#define FL_BSTIM32_UPDATE_SOURCE_COUNTER (0x1U << BSTIM32_CR1_URS_Pos) + + +#define FL_BSTIM32_TRGO_UG (0x0U << BSTIM32_CR2_MMS_Pos) +#define FL_BSTIM32_TRGO_ENABLE (0x1U << BSTIM32_CR2_MMS_Pos) +#define FL_BSTIM32_TRGO_UPDATE (0x2U << BSTIM32_CR2_MMS_Pos) + + +/** + * @} + */ +/* Exported functions ---------------------------------------------------------------------------------*/ +/** @defgroup BSTIM32_FL_Exported_Functions BSTIM32 Exported Functions + * @{ + */ + +/** + * @brief Auto-Reload preload enable + * @rmtoll CR1 ARPE FL_BSTIM32_EnableARRPreload + * @param BSTIM32x BSTIM32 instance + * @retval None + */ +__STATIC_INLINE void FL_BSTIM32_EnableARRPreload(BSTIM32_Type *BSTIM32x) +{ + SET_BIT(BSTIM32x->CR1, BSTIM32_CR1_ARPE_Msk); +} + +/** + * @brief Get Auto-Reload preload enable status + * @rmtoll CR1 ARPE FL_BSTIM32_IsEnabledARRPreload + * @param BSTIM32x BSTIM32 instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_BSTIM32_IsEnabledARRPreload(BSTIM32_Type *BSTIM32x) +{ + return (uint32_t)(READ_BIT(BSTIM32x->CR1, BSTIM32_CR1_ARPE_Msk) == BSTIM32_CR1_ARPE_Msk); +} + +/** + * @brief Auto-Reload preload disable + * @rmtoll CR1 ARPE FL_BSTIM32_DisableARRPreload + * @param BSTIM32x BSTIM32 instance + * @retval None + */ +__STATIC_INLINE void FL_BSTIM32_DisableARRPreload(BSTIM32_Type *BSTIM32x) +{ + CLEAR_BIT(BSTIM32x->CR1, BSTIM32_CR1_ARPE_Msk); +} + +/** + * @brief Set one pulse mode + * @rmtoll CR1 OPM FL_BSTIM32_SetOnePulseMode + * @param BSTIM32x BSTIM32 instance + * @param mode This parameter can be one of the following values: + * @arg @ref FL_BSTIM32_ONE_PULSE_MODE_CONTINUOUS + * @arg @ref FL_BSTIM32_ONE_PULSE_MODE_SINGLE + * @retval None + */ +__STATIC_INLINE void FL_BSTIM32_SetOnePulseMode(BSTIM32_Type *BSTIM32x, uint32_t mode) +{ + MODIFY_REG(BSTIM32x->CR1, BSTIM32_CR1_OPM_Msk, mode); +} + +/** + * @brief Get one pulse mode + * @rmtoll CR1 OPM FL_BSTIM32_GetOnePulseMode + * @param BSTIM32x BSTIM32 instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_BSTIM32_ONE_PULSE_MODE_CONTINUOUS + * @arg @ref FL_BSTIM32_ONE_PULSE_MODE_SINGLE + */ +__STATIC_INLINE uint32_t FL_BSTIM32_GetOnePulseMode(BSTIM32_Type *BSTIM32x) +{ + return (uint32_t)(READ_BIT(BSTIM32x->CR1, BSTIM32_CR1_OPM_Msk)); +} + +/** + * @brief Set update request + * @rmtoll CR1 URS FL_BSTIM32_SetUpdateSource + * @param BSTIM32x BSTIM32 instance + * @param source This parameter can be one of the following values: + * @arg @ref FL_BSTIM32_UPDATE_SOURCE_REGULAR + * @arg @ref FL_BSTIM32_UPDATE_SOURCE_COUNTER + * @retval None + */ +__STATIC_INLINE void FL_BSTIM32_SetUpdateSource(BSTIM32_Type *BSTIM32x, uint32_t source) +{ + MODIFY_REG(BSTIM32x->CR1, BSTIM32_CR1_URS_Msk, source); +} + +/** + * @brief Get update request status + * @rmtoll CR1 URS FL_BSTIM32_GetUpdateSource + * @param BSTIM32x BSTIM32 instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_BSTIM32_UPDATE_SOURCE_REGULAR + * @arg @ref FL_BSTIM32_UPDATE_SOURCE_COUNTER + */ +__STATIC_INLINE uint32_t FL_BSTIM32_GetUpdateSource(BSTIM32_Type *BSTIM32x) +{ + return (uint32_t)(READ_BIT(BSTIM32x->CR1, BSTIM32_CR1_URS_Msk)); +} + +/** + * @brief Update event enable + * @rmtoll CR1 UDIS FL_BSTIM32_EnableUpdateEvent + * @param BSTIM32x BSTIM32 instance + * @retval None + */ +__STATIC_INLINE void FL_BSTIM32_EnableUpdateEvent(BSTIM32_Type *BSTIM32x) +{ + CLEAR_BIT(BSTIM32x->CR1, BSTIM32_CR1_UDIS_Msk); +} + +/** + * @brief Get update event disable status + * @rmtoll CR1 UDIS FL_BSTIM32_IsEnabledUpdateEvent + * @param BSTIM32x BSTIM32 instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_BSTIM32_IsEnabledUpdateEvent(BSTIM32_Type *BSTIM32x) +{ + return (uint32_t)!(READ_BIT(BSTIM32x->CR1, BSTIM32_CR1_UDIS_Msk) == BSTIM32_CR1_UDIS_Msk); +} + +/** + * @brief Update event disable + * @rmtoll CR1 UDIS FL_BSTIM32_DisableUpdateEvent + * @param BSTIM32x BSTIM32 instance + * @retval None + */ +__STATIC_INLINE void FL_BSTIM32_DisableUpdateEvent(BSTIM32_Type *BSTIM32x) +{ + SET_BIT(BSTIM32x->CR1, BSTIM32_CR1_UDIS_Msk); +} + +/** + * @brief Counter enable + * @rmtoll CR1 CEN FL_BSTIM32_Enable + * @param BSTIM32x BSTIM32 instance + * @retval None + */ +__STATIC_INLINE void FL_BSTIM32_Enable(BSTIM32_Type *BSTIM32x) +{ + SET_BIT(BSTIM32x->CR1, BSTIM32_CR1_CEN_Msk); +} + +/** + * @brief Get counter enable status + * @rmtoll CR1 CEN FL_BSTIM32_IsEnabled + * @param BSTIM32x BSTIM32 instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_BSTIM32_IsEnabled(BSTIM32_Type *BSTIM32x) +{ + return (uint32_t)(READ_BIT(BSTIM32x->CR1, BSTIM32_CR1_CEN_Msk) == BSTIM32_CR1_CEN_Msk); +} + +/** + * @brief Counter disable + * @rmtoll CR1 CEN FL_BSTIM32_Disable + * @param BSTIM32x BSTIM32 instance + * @retval None + */ +__STATIC_INLINE void FL_BSTIM32_Disable(BSTIM32_Type *BSTIM32x) +{ + CLEAR_BIT(BSTIM32x->CR1, BSTIM32_CR1_CEN_Msk); +} + +/** + * @brief Set master trigger mode + * @rmtoll CR2 MMS FL_BSTIM32_SetTriggerOutput + * @param BSTIM32x BSTIM32 instance + * @param triggerOutput This parameter can be one of the following values: + * @arg @ref FL_BSTIM32_TRGO_UG + * @arg @ref FL_BSTIM32_TRGO_ENABLE + * @arg @ref FL_BSTIM32_TRGO_UPDATE + * @retval None + */ +__STATIC_INLINE void FL_BSTIM32_SetTriggerOutput(BSTIM32_Type *BSTIM32x, uint32_t triggerOutput) +{ + MODIFY_REG(BSTIM32x->CR2, BSTIM32_CR2_MMS_Msk, triggerOutput); +} + +/** + * @brief Get master trigger mode status + * @rmtoll CR2 MMS FL_BSTIM32_GetTriggerOutput + * @param BSTIM32x BSTIM32 instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_BSTIM32_TRGO_UG + * @arg @ref FL_BSTIM32_TRGO_ENABLE + * @arg @ref FL_BSTIM32_TRGO_UPDATE + */ +__STATIC_INLINE uint32_t FL_BSTIM32_GetTriggerOutput(BSTIM32_Type *BSTIM32x) +{ + return (uint32_t)(READ_BIT(BSTIM32x->CR2, BSTIM32_CR2_MMS_Msk)); +} + +/** + * @brief Update event interrupt disable + * @rmtoll IER UIE FL_BSTIM32_DisableIT_Update + * @param BSTIM32x BSTIM32 instance + * @retval None + */ +__STATIC_INLINE void FL_BSTIM32_DisableIT_Update(BSTIM32_Type *BSTIM32x) +{ + CLEAR_BIT(BSTIM32x->IER, BSTIM32_IER_UIE_Msk); +} + +/** + * @brief Update event interrupt enable + * @rmtoll IER UIE FL_BSTIM32_EnableIT_Update + * @param BSTIM32x BSTIM32 instance + * @retval None + */ +__STATIC_INLINE void FL_BSTIM32_EnableIT_Update(BSTIM32_Type *BSTIM32x) +{ + SET_BIT(BSTIM32x->IER, BSTIM32_IER_UIE_Msk); +} + +/** + * @brief Get update event interrupt enable status + * @rmtoll IER UIE FL_BSTIM32_IsEnabledIT_Update + * @param BSTIM32x BSTIM32 instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_BSTIM32_IsEnabledIT_Update(BSTIM32_Type *BSTIM32x) +{ + return (uint32_t)(READ_BIT(BSTIM32x->IER, BSTIM32_IER_UIE_Msk) == BSTIM32_IER_UIE_Msk); +} + +/** + * @brief Get update event interrupt flag + * @rmtoll ISR UIF FL_BSTIM32_IsActiveFlag_Update + * @param BSTIM32x BSTIM32 instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_BSTIM32_IsActiveFlag_Update(BSTIM32_Type *BSTIM32x) +{ + return (uint32_t)(READ_BIT(BSTIM32x->ISR, BSTIM32_ISR_UIF_Msk) == (BSTIM32_ISR_UIF_Msk)); +} + +/** + * @brief Clear update event interrupt flag + * @rmtoll ISR UIF FL_BSTIM32_ClearFlag_Update + * @param BSTIM32x BSTIM32 instance + * @retval None + */ +__STATIC_INLINE void FL_BSTIM32_ClearFlag_Update(BSTIM32_Type *BSTIM32x) +{ + WRITE_REG(BSTIM32x->ISR, BSTIM32_ISR_UIF_Msk); +} + +/** + * @brief Software update event enable + * @rmtoll EGR UG FL_BSTIM32_GenerateUpdateEvent + * @param BSTIM32x BSTIM32 instance + * @retval None + */ +__STATIC_INLINE void FL_BSTIM32_GenerateUpdateEvent(BSTIM32_Type *BSTIM32x) +{ + SET_BIT(BSTIM32x->EGR, BSTIM32_EGR_UG_Msk); +} + +/** + * @brief Set counter value + * @rmtoll CNT FL_BSTIM32_WriteCounter + * @param BSTIM32x BSTIM32 instance + * @param count + * @retval None + */ +__STATIC_INLINE void FL_BSTIM32_WriteCounter(BSTIM32_Type *BSTIM32x, uint32_t count) +{ + MODIFY_REG(BSTIM32x->CNT, (0xffffffffU << 0U), (count << 0U)); +} + +/** + * @brief Get counter value + * @rmtoll CNT FL_BSTIM32_ReadCounter + * @param BSTIM32x BSTIM32 instance + * @retval + */ +__STATIC_INLINE uint32_t FL_BSTIM32_ReadCounter(BSTIM32_Type *BSTIM32x) +{ + return (uint32_t)(READ_BIT(BSTIM32x->CNT, 0xffffffffU) >> 0U); +} + +/** + * @brief Set counter Clock prescaler value + * @rmtoll PSC FL_BSTIM32_WritePrescaler + * @param BSTIM32x BSTIM32 instance + * @param psc + * @retval None + */ +__STATIC_INLINE void FL_BSTIM32_WritePrescaler(BSTIM32_Type *BSTIM32x, uint32_t psc) +{ + MODIFY_REG(BSTIM32x->PSC, (0xffffffffU << 0U), (psc << 0U)); +} + +/** + * @brief Get counter Clock prescaler value + * @rmtoll PSC FL_BSTIM32_ReadPrescaler + * @param BSTIM32x BSTIM32 instance + * @retval + */ +__STATIC_INLINE uint32_t FL_BSTIM32_ReadPrescaler(BSTIM32_Type *BSTIM32x) +{ + return (uint32_t)(READ_BIT(BSTIM32x->PSC, 0xffffffffU) >> 0U); +} + +/** + * @brief Set Auto-Reload register value + * @rmtoll ARR FL_BSTIM32_WriteAutoReload + * @param BSTIM32x BSTIM32 instance + * @param value + * @retval None + */ +__STATIC_INLINE void FL_BSTIM32_WriteAutoReload(BSTIM32_Type *BSTIM32x, uint32_t value) +{ + MODIFY_REG(BSTIM32x->ARR, (0xffffffffU << 0U), (value << 0U)); +} + +/** + * @brief Get Auto-Reload register value + * @rmtoll ARR FL_BSTIM32_ReadAutoReload + * @param BSTIM32x BSTIM32 instance + * @retval + */ +__STATIC_INLINE uint32_t FL_BSTIM32_ReadAutoReload(BSTIM32_Type *BSTIM32x) +{ + return (uint32_t)(READ_BIT(BSTIM32x->ARR, 0xffffffffU) >> 0U); +} + +/** + * @} + */ + +/** @defgroup BSTIM32_FL_EF_Init Initialization and de-initialization functions + * @{ + */ + +FL_ErrorStatus FL_BSTIM32_DeInit(BSTIM32_Type *BSTIM32x); +FL_ErrorStatus FL_BSTIM32_Init(BSTIM32_Type *BSTIM32x, FL_BSTIM32_InitTypeDef *init); +void FL_BSTIM32_StructInit(FL_BSTIM32_InitTypeDef *init); + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif /* __FM33LG0XX_FL_BSTIM32_H*/ + +/*************************Py_Code_Generator Version: 0.1-0.11-0.1 @ 2020-09-12*************************/ +/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/ diff --git a/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_can.h b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_can.h new file mode 100644 index 0000000..c6e0c80 --- /dev/null +++ b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_can.h @@ -0,0 +1,2240 @@ + /** + ******************************************************************************************************* + * @file fm33lg0xx_fl_can.h + * @author FMSH Application Team + * @brief Head file of CAN FL Module + ******************************************************************************************************* + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + + + +/* Define to prevent recursive inclusion---------------------------------------------------------------*/ +#ifndef __FM33LG0XX_FL_CAN_H +#define __FM33LG0XX_FL_CAN_H + +#ifdef __cplusplus +extern "C" { +#endif +/* Includes -------------------------------------------------------------------------------------------*/ +#include "fm33lg0xx_fl_def.h" +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @defgroup CAN CAN + * @brief CAN FL driver + * @{ + */ + +/* Exported types -------------------------------------------------------------------------------------*/ +/** @defgroup CAN_FL_ES_INIT CAN Exported Init structures + * @{ + */ + +/** + * @brief FL CAN Init Sturcture definition + */ +typedef struct +{ + /*工作模式*/ + uint8_t mode; + /*同步段长度*/ + uint8_t SJW; + /*时间段1*/ + uint8_t TS1; + /*时间段2*/ + uint8_t TS2; + /*波特率预分频*/ + uint8_t BRP; + /*时钟源选择*/ + uint8_t clockSource; + +} FL_CAN_InitTypeDef; + +/** + * @brief CAN filter init structure definition + */ +typedef struct +{ + + /*滤波器SRR位*/ + uint32_t filterIdSRR; + /*滤波器IDE位*/ + uint32_t filterIdIDE; + /*滤波器RTR位*/ + uint32_t filterIdRTR; + /*滤波器使能*/ + uint32_t filterEn; + /*滤波器标准ID*/ + uint32_t filterIdStandard; + /*滤波器扩展ID*/ + uint32_t filterIdExtend; + /*滤波器ID高11位掩码*/ + uint32_t filterMaskIdHigh; + /*滤波器SRR位掩码*/ + uint32_t filterMaskIdSRR; + /*滤波器IDE位掩码*/ + uint32_t filterMaskIdIDE; + /*滤波器ID低18位掩码*/ + uint32_t filterMaskIdLow; + /*滤波器RTR位掩码*/ + uint32_t filterMaskIdRTR; + +} FL_CAN_FilterInitTypeDef; + + +/** + * @} + */ +/* Exported constants ---------------------------------------------------------------------------------*/ +/** @defgroup CAN_FL_Exported_Constants CAN Exported Constants + * @{ + */ + +#define CAN_CR_CEN_Pos (1U) +#define CAN_CR_CEN_Msk (0x1Ul << CAN_CR_CEN_Pos) +#define CAN_CR_CEN CAN_CR_CEN_Msk + +#define CAN_CR_SRST_Pos (0U) +#define CAN_CR_SRST_Msk (0x1Ul << CAN_CR_SRST_Pos) +#define CAN_CR_SRST CAN_CR_SRST_Msk + +#define CAN_MSR_LPBACK_Pos (1U) +#define CAN_MSR_LPBACK_Msk (0x1Ul << CAN_MSR_LPBACK_Pos) +#define CAN_MSR_LPBACK CAN_MSR_LPBACK_Msk + +#define CAN_BRPR_BRP_Pos (0U) +#define CAN_BRPR_BRP_Msk (0xffUl << CAN_BRPR_BRP_Pos) +#define CAN_BRPR_BRP CAN_BRPR_BRP_Msk + +#define CAN_BTR_SJW_Pos (7U) +#define CAN_BTR_SJW_Msk (0x3Ul << CAN_BTR_SJW_Pos) +#define CAN_BTR_SJW CAN_BTR_SJW_Msk + +#define CAN_BTR_TS2_Pos (4U) +#define CAN_BTR_TS2_Msk (0x7Ul << CAN_BTR_TS2_Pos) +#define CAN_BTR_TS2 CAN_BTR_TS2_Msk + +#define CAN_BTR_TS1_Pos (0U) +#define CAN_BTR_TS1_Msk (0xfUl << CAN_BTR_TS1_Pos) +#define CAN_BTR_TS1 CAN_BTR_TS1_Msk + +#define CAN_ECR_REC_Pos (8U) +#define CAN_ECR_REC_Msk (0xffUl << CAN_ECR_REC_Pos) +#define CAN_ECR_REC CAN_ECR_REC_Msk + +#define CAN_ECR_TEC_Pos (0U) +#define CAN_ECR_TEC_Msk (0xffUl << CAN_ECR_TEC_Pos) +#define CAN_ECR_TEC CAN_ECR_TEC_Msk + +#define CAN_ESR_ACKER_Pos (4U) +#define CAN_ESR_ACKER_Msk (0x1Ul << CAN_ESR_ACKER_Pos) +#define CAN_ESR_ACKER CAN_ESR_ACKER_Msk + +#define CAN_ESR_BERR_Pos (3U) +#define CAN_ESR_BERR_Msk (0x1Ul << CAN_ESR_BERR_Pos) +#define CAN_ESR_BERR CAN_ESR_BERR_Msk + +#define CAN_ESR_STER_Pos (2U) +#define CAN_ESR_STER_Msk (0x1Ul << CAN_ESR_STER_Pos) +#define CAN_ESR_STER CAN_ESR_STER_Msk + +#define CAN_ESR_FMER_Pos (1U) +#define CAN_ESR_FMER_Msk (0x1Ul << CAN_ESR_FMER_Pos) +#define CAN_ESR_FMER CAN_ESR_FMER_Msk + +#define CAN_ESR_CRCER_Pos (0U) +#define CAN_ESR_CRCER_Msk (0x1Ul << CAN_ESR_CRCER_Pos) +#define CAN_ESR_CRCER CAN_ESR_CRCER_Msk + +#define CAN_SR_ACFBSY_Pos (11U) +#define CAN_SR_ACFBSY_Msk (0x1Ul << CAN_SR_ACFBSY_Pos) +#define CAN_SR_ACFBSY CAN_SR_ACFBSY_Msk + +#define CAN_SR_TXFLL_Pos (10Ul) +#define CAN_SR_TXFLL_Msk (0x1Ul << CAN_SR_TXFLL_Pos) +#define CAN_SR_TXFLL CAN_SR_TXFLL_Msk + +#define CAN_SR_TXBFLL_Pos (9U) +#define CAN_SR_TXBFLL_Msk (0x1Ul << CAN_SR_TXBFLL_Pos) +#define CAN_SR_TXBFLL CAN_SR_TXBFLL_Msk + +#define CAN_SR_ESTAT_Pos (7U) +#define CAN_SR_ESTAT_Msk (0x3Ul << CAN_SR_ESTAT_Pos) +#define CAN_SR_ESTAT CAN_SR_ESTAT_Msk + +#define CAN_SR_ERRWRN_Pos (6U) +#define CAN_SR_ERRWRN_Msk (0x1Ul << CAN_SR_ERRWRN_Pos) +#define CAN_SR_ERRWRN CAN_SR_ERRWRN_Msk + +#define CAN_SR_BBSY_Pos (5U) +#define CAN_SR_BBSY_Msk (0x1Ul << CAN_SR_BBSY_Pos) +#define CAN_SR_BBSY CAN_SR_BBSY_Msk + +#define CAN_SR_BIDLE_Pos (4U) +#define CAN_SR_BIDLE_Msk (0x1Ul << CAN_SR_BIDLE_Pos) +#define CAN_SR_BIDLE CAN_SR_BIDLE_Msk + +#define CAN_SR_NORMAL_Pos (3U) +#define CAN_SR_NORMAL_Msk (0x1Ul << CAN_SR_NORMAL_Pos) +#define CAN_SR_NORMAL CAN_SR_NORMAL_Msk + +#define CAN_SR_LBACK_Pos (1U) +#define CAN_SR_LBACK_Msk (0x1Ul << CAN_SR_LBACK_Pos) +#define CAN_SR_LBACK CAN_SR_LBACK_Msk + +#define CAN_SR_CONFIG_Pos (0U) +#define CAN_SR_CONFIG_Msk (0x1Ul << CAN_SR_CONFIG_Pos) +#define CAN_SR_CONFIG CAN_SR_CONFIG_Msk + +#define CAN_ISR_BSOFF_Pos (9U) +#define CAN_ISR_BSOFF_Msk (0x1Ul << CAN_ISR_BSOFF_Pos) +#define CAN_ISR_BSOFF CAN_ISR_BSOFF_Msk + +#define CAN_ISR_ERROR_Pos (8U) +#define CAN_ISR_ERROR_Msk (0x1Ul << CAN_ISR_ERROR_Pos) +#define CAN_ISR_ERROR CAN_ISR_ERROR_Msk + +#define CAN_ISR_RXNEMP_Pos (7U) +#define CAN_ISR_RXNEMP_Msk (0x1Ul << CAN_ISR_RXNEMP_Pos) +#define CAN_ISR_RXNEMP CAN_ISR_RXNEMP_Msk + +#define CAN_ISR_RXOFLW_Pos (6U) +#define CAN_ISR_RXOFLW_Msk (0x1Ul << CAN_ISR_RXOFLW_Pos) +#define CAN_ISR_RXOFLW CAN_ISR_RXOFLW_Msk + +#define CAN_ISR_RXUFLW_Pos (5U) +#define CAN_ISR_RXUFLW_Msk (0x1Ul << CAN_ISR_RXUFLW_Pos) +#define CAN_ISR_RXUFLW CAN_ISR_RXUFLW_Msk + +#define CAN_ISR_RXOK_Pos (4U) +#define CAN_ISR_RXOK_Msk (0x1Ul << CAN_ISR_RXOK_Pos) +#define CAN_ISR_RXOK CAN_ISR_RXOK_Msk + +#define CAN_ISR_TXBFLL_Pos (3U) +#define CAN_ISR_TXBFLL_Msk (0x1Ul << CAN_ISR_TXBFLL_Pos) +#define CAN_ISR_TXBFLL CAN_ISR_TXBFLL_Msk + +#define CAN_ISR_TXFLL_Pos (2U) +#define CAN_ISR_TXFLL_Msk (0x1Ul << CAN_ISR_TXFLL_Pos) +#define CAN_ISR_TXFLL CAN_ISR_TXFLL_Msk + +#define CAN_ISR_TXOK_Pos (1U) +#define CAN_ISR_TXOK_Msk (0x1Ul << CAN_ISR_TXOK_Pos) +#define CAN_ISR_TXOK CAN_ISR_TXOK_Msk + +#define CAN_ISR_ARBLST_Pos (0U) +#define CAN_ISR_ARBLST_Msk (0x1Ul << CAN_ISR_ARBLST_Pos) +#define CAN_ISR_ARBLST CAN_ISR_ARBLST_Msk + +#define CAN_IER_BSOFFIE_Pos (9U) +#define CAN_IER_BSOFFIE_Msk (0x1Ul << CAN_IER_BSOFFIE_Pos) +#define CAN_IER_BSOFFIE CAN_IER_BSOFFIE_Msk + +#define CAN_IER_ERRORIE_Pos (8U) +#define CAN_IER_ERRORIE_Msk (0x1Ul << CAN_IER_ERRORIE_Pos) +#define CAN_IER_ERRORIE CAN_IER_ERRORIE_Msk + +#define CAN_IER_RXNEMPIE_Pos (7U) +#define CAN_IER_RXNEMPIE_Msk (0x1Ul << CAN_IER_RXNEMPIE_Pos) +#define CAN_IER_RXNEMPIE CAN_IER_RXNEMPIE_Msk + +#define CAN_IER_RXOFLWIE_Pos (6U) +#define CAN_IER_RXOFLWIE_Msk (0x1Ul << CAN_IER_RXOFLWIE_Pos) +#define CAN_IER_RXOFLWIE CAN_IER_RXOFLWIE_Msk + +#define CAN_IER_RXUFLWIE_Pos (5U) +#define CAN_IER_RXUFLWIE_Msk (0x1Ul << CAN_IER_RXUFLWIE_Pos) +#define CAN_IER_RXUFLWIE CAN_IER_RXUFLWIE_Msk + +#define CAN_IER_RXOKIE_Pos (4U) +#define CAN_IER_RXOKIE_Msk (0x1Ul << CAN_IER_RXOKIE_Pos) +#define CAN_IER_RXOKIE CAN_IER_RXOKIE_Msk + +#define CAN_IER_TXBFLLIE_Pos (3U) +#define CAN_IER_TXBFLLIE_Msk (0x1Ul << CAN_IER_TXBFLLIE_Pos) +#define CAN_IER_TXBFLLIE CAN_IER_TXBFLLIE_Msk + +#define CAN_IER_TXFLLIE_Pos (2U) +#define CAN_IER_TXFLLIE_Msk (0x1Ul << CAN_IER_TXFLLIE_Pos) +#define CAN_IER_TXFLLIE CAN_IER_TXFLLIE_Msk + +#define CAN_IER_TXOKIE_Pos (1Ul) +#define CAN_IER_TXOKIE_Msk (0x1Ul << CAN_IER_TXOKIE_Pos) +#define CAN_IER_TXOKIE CAN_IER_TXOKIE_Msk + +#define CAN_IER_ARBLSTIE_Pos (0U) +#define CAN_IER_ARBLSTIE_Msk (0x1Ul << CAN_IER_ARBLSTIE_Pos) +#define CAN_IER_ARBLSTIE CAN_IER_ARBLSTIE_Msk + +#define CAN_ICR_CBSOFF_Pos (9Ul) +#define CAN_ICR_CBSOFF_Msk (0x1Ul << CAN_ICR_CBSOFF_Pos) +#define CAN_ICR_CBSOFF CAN_ICR_CBSOFF_Msk + +#define CAN_ICR_CERROR_Pos (8U) +#define CAN_ICR_CERROR_Msk (0x1Ul << CAN_ICR_CERROR_Pos) +#define CAN_ICR_CERROR CAN_ICR_CERROR_Msk + +#define CAN_ICR_CRXNEMP_Pos (7Ul) +#define CAN_ICR_CRXNEMP_Msk (0x1Ul << CAN_ICR_CRXNEMP_Pos) +#define CAN_ICR_CRXNEMP CAN_ICR_CRXNEMP_Msk + +#define CAN_ICR_CRXOFLW_Pos (6U) +#define CAN_ICR_CRXOFLW_Msk (0x1Ul << CAN_ICR_CRXOFLW_Pos) +#define CAN_ICR_CRXOFLW CAN_ICR_CRXOFLW_Msk + +#define CAN_ICR_CRXUFLW_Pos (5U) +#define CAN_ICR_CRXUFLW_Msk (0x1Ul << CAN_ICR_CRXUFLW_Pos) +#define CAN_ICR_CRXUFLW CAN_ICR_CRXUFLW_Msk + +#define CAN_ICR_CRXOK_Pos (4U) +#define CAN_ICR_CRXOK_Msk (0x1Ul << CAN_ICR_CRXOK_Pos) +#define CAN_ICR_CRXOK CAN_ICR_CRXOK_Msk + +#define CAN_ICR_CTXBFLL_Pos (3U) +#define CAN_ICR_CTXBFLL_Msk (0x1Ul << CAN_ICR_CTXBFLL_Pos) +#define CAN_ICR_CTXBFLL CAN_ICR_CTXBFLL_Msk + +#define CAN_ICR_CTXFLL_Pos (2U) +#define CAN_ICR_CTXFLL_Msk (0x1Ul << CAN_ICR_CTXFLL_Pos) +#define CAN_ICR_CTXFLL CAN_ICR_CTXFLL_Msk + +#define CAN_ICR_CTXOK_Pos (1U) +#define CAN_ICR_CTXOK_Msk (0x1Ul << CAN_ICR_CTXOK_Pos) +#define CAN_ICR_CTXOK CAN_ICR_CTXOK_Msk + +#define CAN_ICR_CARBLST_Pos (0U) +#define CAN_ICR_CARBLST_Msk (0x1Ul << CAN_ICR_CARBLST_Pos) +#define CAN_ICR_CARBLST CAN_ICR_CARBLST_Msk + +#define CAN_TXFIDR_IDR_Pos (0U) +#define CAN_TXFIDR_IDR_Msk (0xffffffffUl << CAN_TXFIDR_IDR_Pos) +#define CAN_TXFIDR_IDR CAN_TXFIDR_IDR_Msk + +#define CAN_TXFDLCR_DLC_Pos (0U) +#define CAN_TXFDLCR_DLC_Msk (0xfUl << CAN_TXFDLCR_DLC_Pos) +#define CAN_TXFDLCR_DLC CAN_TXFDLCR_DLC_Msk + +#define CAN_TXFDW1R_DB_Pos (0U) +#define CAN_TXFDW1R_DB_Msk (0xffffffffUl << CAN_TXFDW1R_DB_Pos) +#define CAN_TXFDW1R_DB CAN_TXFDW1R_DB_Msk + +#define CAN_TXFDW2R_DB_Pos (0U) +#define CAN_TXFDW2R_DB_Msk (0xffffffffUl << CAN_TXFDW2R_DB_Pos) +#define CAN_TXFDW2R_DB CAN_TXFDW2R_DB_Msk + +#define CAN_HPBIDR_IDR_Pos (0U) +#define CAN_HPBIDR_IDR_Msk (0xffffffffUl << CAN_HPBIDR_IDR_Pos) +#define CAN_HPBIDR_IDR CAN_HPBIDR_IDR_Msk + +#define CAN_HPBDLCR_DLC_Pos (0U) +#define CAN_HPBDLCR_DLC_Msk (0xfUl << CAN_HPBDLCR_DLC_Pos) +#define CAN_HPBDLCR_DLC CAN_HPBDLCR_DLC_Msk + +#define CAN_HPBDW1R_DB_Pos (0U) +#define CAN_HPBDW1R_DB_Msk (0xffffffffUl << CAN_HPBDW1R_DB_Pos) +#define CAN_HPBDW1R_DB CAN_HPBDW1R_DB_Msk + +#define CAN_HPBDW2R_DB_Pos (0U) +#define CAN_HPBDW2R_DB_Msk (0xffffffffUl << CAN_HPBDW2R_DB_Pos) +#define CAN_HPBDW2R_DB CAN_HPBDW2R_DB_Msk + +#define CAN_RXFIDR_IDR_Pos (0U) +#define CAN_RXFIDR_IDR_Msk (0xffffffffUl << CAN_RXFIDR_IDR_Pos) +#define CAN_RXFIDR_IDR CAN_RXFIDR_IDR_Msk + +#define CAN_RXFDLCR_DLC_Pos (0U) +#define CAN_RXFDLCR_DLC_Msk (0xfUl << CAN_RXFDLCR_DLC_Pos) +#define CAN_RXFDLCR_DLC CAN_RXFDLCR_DLC_Msk + +#define CAN_RXFDW1R_DB_Pos (0U) +#define CAN_RXFDW1R_DB_Msk (0xffffffffUl << CAN_RXFDW1R_DB_Pos) +#define CAN_RXFDW1R_DB CAN_RXFDW1R_DB_Msk + +#define CAN_RXFDW2R_DB_Pos (0U) +#define CAN_RXFDW2R_DB_Msk (0xffffffffUl << CAN_RXFDW2R_DB_Pos) +#define CAN_RXFDW2R_DB CAN_RXFDW2R_DB_Msk + +#define CAN_AFR_UAF_Pos (0U) +#define CAN_AFR_UAF_Msk (0xfUl << CAN_AFR_UAF_Pos) +#define CAN_AFR_UAF CAN_AFR_UAF_Msk + +#define CAN_AFMR_AMRTR_Pos (31U) +#define CAN_AFMR_AMRTR_Msk (0x1Ul << CAN_AFMR_AMRTR_Pos) +#define CAN_AFMR_AMRTR CAN_AFMR_AMRTR_Msk + +#define CAN_AFMR_AMID18_Pos (13U) +#define CAN_AFMR_AMID18_Msk (0x3ffffUl << CAN_AFMR_AMID18_Pos) +#define CAN_AFMR_AMID18 CAN_AFMR_AMID18_Msk + +#define CAN_AFMR_AMIDE_Pos (12U) +#define CAN_AFMR_AMIDE_Msk (0x1Ul << CAN_AFMR_AMIDE_Pos) +#define CAN_AFMR_AMIDE CAN_AFMR_AMIDE_Msk + +#define CAN_AFMR_AMSRR_Pos (11U) +#define CAN_AFMR_AMSRR_Msk (0x1Ul << CAN_AFMR_AMSRR_Pos) +#define CAN_AFMR_AMSRR CAN_AFMR_AMSRR_Msk + +#define CAN_AFMR_AMID11_Pos (0U) +#define CAN_AFMR_AMID11_Msk (0x7ffUl << CAN_AFMR_AMID11_Pos) +#define CAN_AFMR_AMID11 CAN_AFMR_AMID11_Msk + +#define CAN_AFIR_AIRTR_Pos (31U) +#define CAN_AFIR_AIRTR_Msk (0x1Ul << CAN_AFIR_AIRTR_Pos) +#define CAN_AFIR_AIRTR CAN_AFIR_AIRTR_Msk + +#define CAN_AFIR_AIID18_Pos (13U) +#define CAN_AFIR_AIID18_Msk (0x3ffffUl << CAN_AFIR_AIID18_Pos) +#define CAN_AFIR_AIID18 CAN_AFIR_AIID18_Msk + +#define CAN_AFIR_AIIDE_Pos (12U) +#define CAN_AFIR_AIIDE_Msk (0x1Ul << CAN_AFIR_AIIDE_Pos) +#define CAN_AFIR_AIIDE CAN_AFIR_AIIDE_Msk + +#define CAN_AFIR_AISRR_Pos (11U) +#define CAN_AFIR_AISRR_Msk (0x1Ul << CAN_AFIR_AISRR_Pos) +#define CAN_AFIR_AISRR CAN_AFIR_AISRR_Msk + +#define CAN_AFIR_AIID11_Pos (0U) +#define CAN_AFIR_AIID11_Msk (0x7ffUl << CAN_AFIR_AIID11_Pos) +#define CAN_AFIR_AIID11 CAN_AFIR_AIID11_Msk + + + +#define FL_CAN_ERROR_STATUS_CONFIG (0x0Ul << CAN_SR_ESTAT_Pos) +#define FL_CAN_ERROR_STATUS_ACTIVE (0x1Ul << CAN_SR_ESTAT_Pos) +#define FL_CAN_ERROR_STATUS_BUSOFF (0x2Ul << CAN_SR_ESTAT_Pos) +#define FL_CAN_ERROR_STATUS_PASSIVE (0x3Ul << CAN_SR_ESTAT_Pos) + + +#define FL_CAN_RTR_BIT_LOW (0x0Ul << CAN_AFIR_AIRTR_Pos) +#define FL_CAN_RTR_BIT_HIGH (0x1Ul << CAN_AFIR_AIRTR_Pos) + + +#define FL_CAN_IDE_BIT_LOW (0x0Ul << CAN_AFIR_AIIDE_Pos) +#define FL_CAN_IDE_BIT_HIGH (0x1Ul << CAN_AFIR_AIIDE_Pos) + +#define FL_CAN_SRR_BIT_LOW (0x0Ul << CAN_AFIR_AISRR_Pos) +#define FL_CAN_SRR_BIT_HIGH (0x1Ul << CAN_AFIR_AISRR_Pos) + + +#define FL_CAN_SOFTWARE_NO_RESET (0x0Ul << CAN_CR_SRST_Pos) +#define FL_CAN_SOFTWARE_RESET (0x1Ul << CAN_CR_SRST_Pos) + + + +#define FL_CAN_TS1_1Tq (0Ul) +#define FL_CAN_TS1_2Tq (1Ul) +#define FL_CAN_TS1_3Tq (2Ul) +#define FL_CAN_TS1_4Tq (3Ul) +#define FL_CAN_TS1_5Tq (4Ul) +#define FL_CAN_TS1_6Tq (5Ul) +#define FL_CAN_TS1_7Tq (6Ul) +#define FL_CAN_TS1_8Tq (7Ul) +#define FL_CAN_TS1_9Tq (8Ul) +#define FL_CAN_TS1_10Tq (9Ul) +#define FL_CAN_TS1_11Tq (10Ul) +#define FL_CAN_TS1_12Tq (11Ul) +#define FL_CAN_TS1_13Tq (12Ul) +#define FL_CAN_TS1_14Tq (13Ul) +#define FL_CAN_TS1_15Tq (14Ul) +#define FL_CAN_TS1_16Tq (15Ul) + +#define FL_CAN_TS2_1Tq (0Ul) +#define FL_CAN_TS2_2Tq (1Ul) +#define FL_CAN_TS2_3Tq (2Ul) +#define FL_CAN_TS2_4Tq (3Ul) +#define FL_CAN_TS2_5Tq (4Ul) +#define FL_CAN_TS2_6Tq (5Ul) +#define FL_CAN_TS2_7Tq (6Ul) +#define FL_CAN_TS2_8Tq (7Ul) + + +#define FL_CAN_SJW_1Tq (0Ul) +#define FL_CAN_SJW_2Tq (1Ul) +#define FL_CAN_SJW_3Tq (2Ul) +#define FL_CAN_SJW_4Tq (3Ul) + +#define FL_CAN_MODE_NORMAL (0Ul) +#define FL_CAN_MODE_LOOPBACK (1Ul) +#define FL_CAN_MODE_CONFIG (2Ul) + +#define FL_CAN_FIL1_EN (1Ul << 0U) +#define FL_CAN_FIL2_EN (1Ul << 1U) +#define FL_CAN_FIL3_EN (1Ul << 2U) +#define FL_CAN_FIL4_EN (1Ul << 3U) + +#define FL_CAN_FIL1_MSK (1Ul << 0U) +#define FL_CAN_FIL2_MSK (1Ul << 1U) +#define FL_CAN_FIL3_MSK (1Ul << 2U) +#define FL_CAN_FIL4_MSK (1Ul << 3U) + + +#define FL_CAN_FILTER1 (0x0Ul << 0U) +#define FL_CAN_FILTER2 (0x1Ul << 0U) +#define FL_CAN_FILTER3 (0x2Ul << 0U) +#define FL_CAN_FILTER4 (0x3Ul << 0U) + + + +#define FL_CAN_FORMAT_STANDARD_DATA (0U) +#define FL_CAN_FORMAT_STANDARD_REMOTE (1U) +#define FL_CAN_FORMAT_EXTEND_DATA (2U) +#define FL_CAN_FORMAT_EXTEND_REMOTE (3U) + + +#define CAN_TIMEOUT 0xFFFFFU + +/** + * @} + */ +/* Exported functions ---------------------------------------------------------------------------------*/ +/** @defgroup CAN_FL_Exported_Functions CAN Exported Functions + * @{ + */ + +/** + * @brief CAN enable + * @rmtoll CR CEN FL_CAN_Enable + * @param CANx CAN instance + * @retval None + */ +__STATIC_INLINE void FL_CAN_Enable(CAN_Type *CANx) +{ + SET_BIT(CANx->CR, CAN_CR_CEN_Msk); +} + +/** + * @brief Get CAN enable status + * @rmtoll CR CEN FL_CAN_IsEnabled + * @param CANx CAN instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CAN_IsEnabled(CAN_Type *CANx) +{ + return (uint32_t)(READ_BIT(CANx->CR, CAN_CR_CEN_Msk) == CAN_CR_CEN_Msk); +} + +/** + * @brief CAN disable + * @rmtoll CR CEN FL_CAN_Disable + * @param CANx CAN instance + * @retval None + */ +__STATIC_INLINE void FL_CAN_Disable(CAN_Type *CANx) +{ + CLEAR_BIT(CANx->CR, CAN_CR_CEN_Msk); +} + +/** + * @brief Set CAN software reset + * @rmtoll CR SRST FL_CAN_SetSoftwareReset + * @param CANx CAN instance + * @param reset This parameter can be one of the following values: + * @arg @ref FL_CAN_SOFTWARE_NO_RESET + * @arg @ref FL_CAN_SOFTWARE_RESET + * @retval None + */ +__STATIC_INLINE void FL_CAN_SetSoftwareReset(CAN_Type *CANx, uint32_t reset) +{ + MODIFY_REG(CANx->CR, CAN_CR_SRST_Msk, reset); +} + +/** + * @brief Get CAN software reset + * @rmtoll CR SRST FL_CAN_GetSoftwareReset + * @param CANx CAN instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_CAN_SOFTWARE_NO_RESET + * @arg @ref FL_CAN_SOFTWARE_RESET + */ +__STATIC_INLINE uint32_t FL_CAN_GetSoftwareReset(CAN_Type *CANx) +{ + return (uint32_t)(READ_BIT(CANx->CR, CAN_CR_SRST_Msk)); +} + +/** + * @brief Enable loop back mode + * @rmtoll MSR LPBACK FL_CAN_EnableLoopBackMode + * @param CANx CAN instance + * @retval None + */ +__STATIC_INLINE void FL_CAN_EnableLoopBackMode(CAN_Type *CANx) +{ + SET_BIT(CANx->MSR, CAN_MSR_LPBACK_Msk); +} +/** + * @brief CAN disable + * @rmtoll CR CEN FL_CAN_Disable + * @param CANx CAN instance + * @retval None + */ +__STATIC_INLINE void FL_CAN_DisableLoopBackMode(CAN_Type *CANx) +{ + CLEAR_BIT(CANx->MSR, CAN_MSR_LPBACK_Msk); +} +/** + * @brief Get loop back mode Enable Status + * @rmtoll MSR LPBACK FL_CAN_IsEnabledLoopBackMode + * @param CANx CAN instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CAN_IsEnabledLoopBackMode(CAN_Type *CANx) +{ + return (uint32_t)(READ_BIT(CANx->MSR, CAN_MSR_LPBACK_Msk) == CAN_MSR_LPBACK_Msk); +} + +/** + * @brief Set baud rate prescaler + * @rmtoll BRPR BRP FL_CAN_WriteBaudRatePrescaler + * @param CANx CAN instance + * @param psc + * @retval None + */ +__STATIC_INLINE void FL_CAN_WriteBaudRatePrescaler(CAN_Type *CANx, uint32_t psc) +{ + MODIFY_REG(CANx->BRPR, CAN_BRPR_BRP_Msk, (psc << CAN_BRPR_BRP_Pos)); +} + +/** + * @brief Get baud rate prescaler + * @rmtoll BRPR BRP FL_CAN_ReadBaudRatePrescaler + * @param CANx CAN instance + * @retval + */ +__STATIC_INLINE uint32_t FL_CAN_ReadBaudRatePrescaler(CAN_Type *CANx) +{ + return (uint32_t)(READ_BIT(CANx->BRPR, CAN_BRPR_BRP_Msk) >> CAN_BRPR_BRP_Pos); +} + +/** + * @brief Set synchronization jump width + * @rmtoll BTR SJW FL_CAN_WriteSyncJumpWidth + * @param CANx CAN instance + * @param width + * @retval None + */ +__STATIC_INLINE void FL_CAN_WriteSyncJumpWidth(CAN_Type *CANx, uint32_t width) +{ + MODIFY_REG(CANx->BTR, CAN_BTR_SJW_Msk, (width << CAN_BTR_SJW_Pos)); +} + +/** + * @brief Get synchronization jump width + * @rmtoll BTR SJW FL_CAN_ReadSyncJumpWidth + * @param CANx CAN instance + * @retval + */ +__STATIC_INLINE uint32_t FL_CAN_ReadSyncJumpWidth(CAN_Type *CANx) +{ + return (uint32_t)(READ_BIT(CANx->BTR, CAN_BTR_SJW_Msk) >> CAN_BTR_SJW_Pos); +} + +/** + * @brief Set time segment2 length + * @rmtoll BTR TS2 FL_CAN_WriteTimeSegment2Length + * @param CANx CAN instance + * @param length + * @retval None + */ +__STATIC_INLINE void FL_CAN_WriteTimeSegment2Length(CAN_Type *CANx, uint32_t length) +{ + MODIFY_REG(CANx->BTR, CAN_BTR_TS2_Msk, (length << CAN_BTR_TS2_Pos)); +} + +/** + * @brief Get time segment2 length + * @rmtoll BTR TS2 FL_CAN_ReadTimeSegment2Length + * @param CANx CAN instance + * @retval + */ +__STATIC_INLINE uint32_t FL_CAN_ReadTimeSegment2Length(CAN_Type *CANx) +{ + return (uint32_t)(READ_BIT(CANx->BTR, CAN_BTR_TS2_Msk) >> CAN_BTR_TS2_Pos); +} + +/** + * @brief Set time segment2 length + * @rmtoll BTR TS1 FL_CAN_WriteTimeSegment1Length + * @param CANx CAN instance + * @param length + * @retval None + */ +__STATIC_INLINE void FL_CAN_WriteTimeSegment1Length(CAN_Type *CANx, uint32_t length) +{ + MODIFY_REG(CANx->BTR, CAN_BTR_TS1_Msk, (length << CAN_BTR_TS1_Pos)); +} + +/** + * @brief Get time segment2 length + * @rmtoll BTR TS1 FL_CAN_ReadTimeSegment1Length + * @param CANx CAN instance + * @retval + */ +__STATIC_INLINE uint32_t FL_CAN_ReadTimeSegment1Length(CAN_Type *CANx) +{ + return (uint32_t)(READ_BIT(CANx->BTR, CAN_BTR_TS1_Msk) >> CAN_BTR_TS1_Pos); +} + +/** + * @brief Get receive error number + * @rmtoll ECR REC FL_CAN_ReadRXErrorCount + * @param CANx CAN instance + * @retval + */ +__STATIC_INLINE uint32_t FL_CAN_ReadRXErrorCount(CAN_Type *CANx) +{ + return (uint32_t)(READ_BIT(CANx->ECR, CAN_ECR_REC_Msk) >> CAN_ECR_REC_Pos); +} + +/** + * @brief Get transmit error number + * @rmtoll ECR TEC FL_CAN_ReadTXErrorCount + * @param CANx CAN instance + * @retval + */ +__STATIC_INLINE uint32_t FL_CAN_ReadTXErrorCount(CAN_Type *CANx) +{ + return (uint32_t)(READ_BIT(CANx->ECR, CAN_ECR_TEC_Msk) >> CAN_ECR_TEC_Pos); +} + +/** + * @brief Get ACK error flag + * @rmtoll ESR ACKER FL_CAN_IsActiveFlag_AckError + * @param CANx CAN instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CAN_IsActiveFlag_AckError(CAN_Type *CANx) +{ + return (uint32_t)(READ_BIT(CANx->ESR, CAN_ESR_ACKER_Msk) == (CAN_ESR_ACKER_Msk)); +} + +/** + * @brief Clear ACK error flag + * @rmtoll ESR ACKER FL_CAN_ClearFlag_AckError + * @param CANx CAN instance + * @retval None + */ +__STATIC_INLINE void FL_CAN_ClearFlag_AckError(CAN_Type *CANx) +{ + WRITE_REG(CANx->ESR, CAN_ESR_ACKER_Msk); +} + +/** + * @brief Get receive bit error flag + * @rmtoll ESR BERR FL_CAN_IsActiveFlag_BitError + * @param CANx CAN instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CAN_IsActiveFlag_BitError(CAN_Type *CANx) +{ + return (uint32_t)(READ_BIT(CANx->ESR, CAN_ESR_BERR_Msk) == (CAN_ESR_BERR_Msk)); +} + +/** + * @brief Clear receive bit error flag + * @rmtoll ESR BERR FL_CAN_ClearFlag_BitError + * @param CANx CAN instance + * @retval None + */ +__STATIC_INLINE void FL_CAN_ClearFlag_BitError(CAN_Type *CANx) +{ + WRITE_REG(CANx->ESR, CAN_ESR_BERR_Msk); +} + +/** + * @brief Get stuffing error flag + * @rmtoll ESR STER FL_CAN_IsActiveFlag_StuffError + * @param CANx CAN instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CAN_IsActiveFlag_StuffError(CAN_Type *CANx) +{ + return (uint32_t)(READ_BIT(CANx->ESR, CAN_ESR_STER_Msk) == (CAN_ESR_STER_Msk)); +} + +/** + * @brief Clear stuffing error flag + * @rmtoll ESR STER FL_CAN_ClearFlag_StuffError + * @param CANx CAN instance + * @retval None + */ +__STATIC_INLINE void FL_CAN_ClearFlag_StuffError(CAN_Type *CANx) +{ + WRITE_REG(CANx->ESR, CAN_ESR_STER_Msk); +} + +/** + * @brief Get form error flag + * @rmtoll ESR FMER FL_CAN_IsActiveFlag_FormatError + * @param CANx CAN instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CAN_IsActiveFlag_FormatError(CAN_Type *CANx) +{ + return (uint32_t)(READ_BIT(CANx->ESR, CAN_ESR_FMER_Msk) == (CAN_ESR_FMER_Msk)); +} + +/** + * @brief Clear form error flag + * @rmtoll ESR FMER FL_CAN_ClearFlag_FormatError + * @param CANx CAN instance + * @retval None + */ +__STATIC_INLINE void FL_CAN_ClearFlag_FormatError(CAN_Type *CANx) +{ + WRITE_REG(CANx->ESR, CAN_ESR_FMER_Msk); +} + +/** + * @brief Get CRC error fiag + * @rmtoll ESR CRCER FL_CAN_IsActiveFlag_CRCError + * @param CANx CAN instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CAN_IsActiveFlag_CRCError(CAN_Type *CANx) +{ + return (uint32_t)(READ_BIT(CANx->ESR, CAN_ESR_CRCER_Msk) == (CAN_ESR_CRCER_Msk)); +} + +/** + * @brief Clear CRC error flag + * @rmtoll ESR CRCER FL_CAN_ClearFlag_CRCError + * @param CANx CAN instance + * @retval None + */ +__STATIC_INLINE void FL_CAN_ClearFlag_CRCError(CAN_Type *CANx) +{ + WRITE_REG(CANx->ESR, CAN_ESR_CRCER_Msk); +} + +/** + * @brief Get acceptance filter busy flag + * @rmtoll SR ACFBSY FL_CAN_IsActiveFlag_FilterBusy + * @param CANx CAN instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CAN_IsActiveFlag_FilterBusy(CAN_Type *CANx) +{ + return (uint32_t)(READ_BIT(CANx->SR, CAN_SR_ACFBSY_Msk) == (CAN_SR_ACFBSY_Msk)); +} + +/** + * @brief Get transmit FIFO FULL interrupt flag + * @rmtoll SR TXFLL FL_CAN_IsActiveFlag_TXBuffFullSignal + * @param CANx CAN instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CAN_IsActiveFlag_TXBuffFullSignal(CAN_Type* CANx) +{ + return (uint32_t)(READ_BIT(CANx->SR, CAN_SR_TXFLL_Msk) == (CAN_SR_TXFLL_Msk)); +} + +/** + * @brief Get high priority transmit buffer FULL interrupt flag + * @rmtoll SR TXBFLL FL_CAN_IsActiveFlag_TXHighPriorBuffFullSignal + * @param CANx CAN instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CAN_IsActiveFlag_TXHighPriorBuffFullSignal(CAN_Type* CANx) +{ + return (uint32_t)(READ_BIT(CANx->SR, CAN_SR_TXBFLL_Msk) == (CAN_SR_TXBFLL_Msk)); +} + +/** + * @brief Get error status flag + * @rmtoll SR ESTAT FL_CAN_GetErrorStatus + * @param CANx CAN instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_CAN_ERROR_STATUS_CONFIG + * @arg @ref FL_CAN_ERROR_STATUS_ACTIVE + * @arg @ref FL_CAN_ERROR_STATUS_BUSOFF + * @arg @ref FL_CAN_ERROR_STATUS_PASSIVE + */ +__STATIC_INLINE uint32_t FL_CAN_GetErrorStatus(CAN_Type *CANx) +{ + return (uint32_t)(READ_BIT(CANx->SR, CAN_SR_ESTAT_Msk)); +} + +/** + * @brief Get error warning + * @rmtoll SR ERRWRN FL_CAN_IsActiveFlag_ErrorWarning + * @param CANx CAN instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CAN_IsActiveFlag_ErrorWarning(CAN_Type *CANx) +{ + return (uint32_t)(READ_BIT(CANx->SR, CAN_SR_ERRWRN_Msk) == (CAN_SR_ERRWRN_Msk)); +} + +/** + * @brief Get bus busy flag + * @rmtoll SR BBSY FL_CAN_IsActiveFlag_BusBusy + * @param CANx CAN instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CAN_IsActiveFlag_BusBusy(CAN_Type *CANx) +{ + return (uint32_t)(READ_BIT(CANx->SR, CAN_SR_BBSY_Msk) == (CAN_SR_BBSY_Msk)); +} + +/** + * @brief Get bus IDLE flag + * @rmtoll SR BIDLE FL_CAN_IsActiveFlag_BusIdle + * @param CANx CAN instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CAN_IsActiveFlag_BusIdle(CAN_Type *CANx) +{ + return (uint32_t)(READ_BIT(CANx->SR, CAN_SR_BIDLE_Msk) == (CAN_SR_BIDLE_Msk)); +} + +/** + * @brief Get normal mode flag + * @rmtoll SR NORMAL FL_CAN_IsActiveFlag_NormalMode + * @param CANx CAN instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CAN_IsActiveFlag_NormalMode(CAN_Type *CANx) +{ + return (uint32_t)(READ_BIT(CANx->SR, CAN_SR_NORMAL_Msk) == (CAN_SR_NORMAL_Msk)); +} + +/** + * @brief Get loop back mode flag + * @rmtoll SR LBACK FL_CAN_IsActiveFlag_LoopbackMode + * @param CANx CAN instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CAN_IsActiveFlag_LoopbackMode(CAN_Type *CANx) +{ + return (uint32_t)(READ_BIT(CANx->SR, CAN_SR_LBACK_Msk) == (CAN_SR_LBACK_Msk)); +} + +/** + * @brief Get configuration mode flag + * @rmtoll SR CONFIG FL_CAN_IsActiveFlag_ConfigMode + * @param CANx CAN instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CAN_IsActiveFlag_ConfigMode(CAN_Type *CANx) +{ + return (uint32_t)(READ_BIT(CANx->SR, CAN_SR_CONFIG_Msk) == (CAN_SR_CONFIG_Msk)); +} + +/** + * @brief Get bus off interrupt flag + * @rmtoll ISR BSOFF FL_CAN_IsActiveFlag_BusOff + * @param CANx CAN instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CAN_IsActiveFlag_BusOff(CAN_Type *CANx) +{ + return (uint32_t)(READ_BIT(CANx->ISR, CAN_ISR_BSOFF_Msk) == (CAN_ISR_BSOFF_Msk)); +} + +/** + * @brief Get error interrupt flag + * @rmtoll ISR ERROR FL_CAN_IsActiveFlag_Error + * @param CANx CAN instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CAN_IsActiveFlag_Error(CAN_Type *CANx) +{ + return (uint32_t)(READ_BIT(CANx->ISR, CAN_ISR_ERROR_Msk) == (CAN_ISR_ERROR_Msk)); +} + +/** + * @brief Get receive FIFO not empty interrupt flag + * @rmtoll ISR RXNEMP FL_CAN_IsActiveFlag_RXNotEmpty + * @param CANx CAN instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CAN_IsActiveFlag_RXNotEmpty(CAN_Type *CANx) +{ + return (uint32_t)(READ_BIT(CANx->ISR, CAN_ISR_RXNEMP_Msk) == (CAN_ISR_RXNEMP_Msk)); +} + +/** + * @brief Get receive FIFO overflow interrupt flag + * @rmtoll ISR RXOFLW FL_CAN_IsActiveFlag_RXOverflow + * @param CANx CAN instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CAN_IsActiveFlag_RXOverflow(CAN_Type *CANx) +{ + return (uint32_t)(READ_BIT(CANx->ISR, CAN_ISR_RXOFLW_Msk) == (CAN_ISR_RXOFLW_Msk)); +} + +/** + * @brief Get receive FIFO empty interrupt flag + * @rmtoll ISR RXUFLW FL_CAN_IsActiveFlag_RXEmpty + * @param CANx CAN instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CAN_IsActiveFlag_RXEmpty(CAN_Type *CANx) +{ + return (uint32_t)(READ_BIT(CANx->ISR, CAN_ISR_RXUFLW_Msk) == (CAN_ISR_RXUFLW_Msk)); +} + +/** + * @brief Get receive Ok interrupt flag + * @rmtoll ISR RXOK FL_CAN_IsActiveFlag_RXOK + * @param CANx CAN instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CAN_IsActiveFlag_RXOK(CAN_Type *CANx) +{ + return (uint32_t)(READ_BIT(CANx->ISR, CAN_ISR_RXOK_Msk) == (CAN_ISR_RXOK_Msk)); +} + +/** + * @brief Get high priority transmit buffer FULL interrupt flag + * @rmtoll ISR TXBFLL FL_CAN_IsActiveFlag_TXHighPriorBuffFull + * @param CANx CAN instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CAN_IsActiveFlag_TXHighPriorBuffFull(CAN_Type *CANx) +{ + return (uint32_t)(READ_BIT(CANx->ISR, CAN_ISR_TXBFLL_Msk) == (CAN_ISR_TXBFLL_Msk)); +} + +/** + * @brief Get transmit FIFO FULL interrupt flag + * @rmtoll ISR TXFLL FL_CAN_IsActiveFlag_TXBuffFull + * @param CANx CAN instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CAN_IsActiveFlag_TXBuffFull(CAN_Type *CANx) +{ + return (uint32_t)(READ_BIT(CANx->ISR, CAN_ISR_TXFLL_Msk) == (CAN_ISR_TXFLL_Msk)); +} + +/** + * @brief Get transmission OK interrupt flag + * @rmtoll ISR TXOK FL_CAN_IsActiveFlag_TXOK + * @param CANx CAN instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CAN_IsActiveFlag_TXOK(CAN_Type *CANx) +{ + return (uint32_t)(READ_BIT(CANx->ISR, CAN_ISR_TXOK_Msk) == (CAN_ISR_TXOK_Msk)); +} + +/** + * @brief Get arbitration lost interrupt flag + * @rmtoll ISR ARBLST FL_CAN_IsActiveFlag_ArbitrationLost + * @param CANx CAN instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CAN_IsActiveFlag_ArbitrationLost(CAN_Type *CANx) +{ + return (uint32_t)(READ_BIT(CANx->ISR, CAN_ISR_ARBLST_Msk) == (CAN_ISR_ARBLST_Msk)); +} + +/** + * @brief Bus OFF interrupt enable + * @rmtoll IER BSOFFIE FL_CAN_EnableIT_BusOff + * @param CANx CAN instance + * @retval None + */ +__STATIC_INLINE void FL_CAN_EnableIT_BusOff(CAN_Type *CANx) +{ + SET_BIT(CANx->IER, CAN_IER_BSOFFIE_Msk); +} + +/** + * @brief Get bus OFF interrupt enable status + * @rmtoll IER BSOFFIE FL_CAN_IsEnabledIT_BusOff + * @param CANx CAN instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CAN_IsEnabledIT_BusOff(CAN_Type *CANx) +{ + return (uint32_t)(READ_BIT(CANx->IER, CAN_IER_BSOFFIE_Msk) == CAN_IER_BSOFFIE_Msk); +} + +/** + * @brief Bus OFF interrupt disable + * @rmtoll IER BSOFFIE FL_CAN_DisableIT_BusOff + * @param CANx CAN instance + * @retval None + */ +__STATIC_INLINE void FL_CAN_DisableIT_BusOff(CAN_Type *CANx) +{ + CLEAR_BIT(CANx->IER, CAN_IER_BSOFFIE_Msk); +} + +/** + * @brief Error interrupt enable + * @rmtoll IER ERRORIE FL_CAN_EnableIT_Error + * @param CANx CAN instance + * @retval None + */ +__STATIC_INLINE void FL_CAN_EnableIT_Error(CAN_Type *CANx) +{ + SET_BIT(CANx->IER, CAN_IER_ERRORIE_Msk); +} + +/** + * @brief Get error interrupt enable status + * @rmtoll IER ERRORIE FL_CAN_IsEnabledIT_Error + * @param CANx CAN instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CAN_IsEnabledIT_Error(CAN_Type *CANx) +{ + return (uint32_t)(READ_BIT(CANx->IER, CAN_IER_ERRORIE_Msk) == CAN_IER_ERRORIE_Msk); +} + +/** + * @brief Error interrupt disable + * @rmtoll IER ERRORIE FL_CAN_DisableIT_Error + * @param CANx CAN instance + * @retval None + */ +__STATIC_INLINE void FL_CAN_DisableIT_Error(CAN_Type *CANx) +{ + CLEAR_BIT(CANx->IER, CAN_IER_ERRORIE_Msk); +} + +/** + * @brief Receive FIFO not empty interrupt enable + * @rmtoll IER RXNEMPIE FL_CAN_EnableIT_RXNotEmpty + * @param CANx CAN instance + * @retval None + */ +__STATIC_INLINE void FL_CAN_EnableIT_RXNotEmpty(CAN_Type *CANx) +{ + SET_BIT(CANx->IER, CAN_IER_RXNEMPIE_Msk); +} + +/** + * @brief Get receive FIFO not empty interrupt enable status + * @rmtoll IER RXNEMPIE FL_CAN_IsEnabledIT_RXNotEmpty + * @param CANx CAN instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CAN_IsEnabledIT_RXNotEmpty(CAN_Type *CANx) +{ + return (uint32_t)(READ_BIT(CANx->IER, CAN_IER_RXNEMPIE_Msk) == CAN_IER_RXNEMPIE_Msk); +} + +/** + * @brief Receive FIFO not empty interrupt disable + * @rmtoll IER RXNEMPIE FL_CAN_DisableIT_RXNotEmpty + * @param CANx CAN instance + * @retval None + */ +__STATIC_INLINE void FL_CAN_DisableIT_RXNotEmpty(CAN_Type *CANx) +{ + CLEAR_BIT(CANx->IER, CAN_IER_RXNEMPIE_Msk); +} + +/** + * @brief Receive FIFO overflow interrupt ennable + * @rmtoll IER RXOFLWIE FL_CAN_EnableIT_RXOverflow + * @param CANx CAN instance + * @retval None + */ +__STATIC_INLINE void FL_CAN_EnableIT_RXOverflow(CAN_Type *CANx) +{ + SET_BIT(CANx->IER, CAN_IER_RXOFLWIE_Msk); +} + +/** + * @brief Get receive FIFO overflow interrupt enable status + * @rmtoll IER RXOFLWIE FL_CAN_IsEnabledIT_RXOverflow + * @param CANx CAN instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CAN_IsEnabledIT_RXOverflow(CAN_Type *CANx) +{ + return (uint32_t)(READ_BIT(CANx->IER, CAN_IER_RXOFLWIE_Msk) == CAN_IER_RXOFLWIE_Msk); +} + +/** + * @brief Receive FIFO overflow interrupt disable + * @rmtoll IER RXOFLWIE FL_CAN_DisableIT_RXOverflow + * @param CANx CAN instance + * @retval None + */ +__STATIC_INLINE void FL_CAN_DisableIT_RXOverflow(CAN_Type *CANx) +{ + CLEAR_BIT(CANx->IER, CAN_IER_RXOFLWIE_Msk); +} + +/** + * @brief Receive FIFO empty interrupt enable + * @rmtoll IER RXUFLWIE FL_CAN_EnableIT_RXEmpty + * @param CANx CAN instance + * @retval None + */ +__STATIC_INLINE void FL_CAN_EnableIT_RXEmpty(CAN_Type *CANx) +{ + SET_BIT(CANx->IER, CAN_IER_RXUFLWIE_Msk); +} + +/** + * @brief Get receive FIFO empty interrupt enable status + * @rmtoll IER RXUFLWIE FL_CAN_IsEnabledIT_RXEmpty + * @param CANx CAN instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CAN_IsEnabledIT_RXEmpty(CAN_Type *CANx) +{ + return (uint32_t)(READ_BIT(CANx->IER, CAN_IER_RXUFLWIE_Msk) == CAN_IER_RXUFLWIE_Msk); +} + +/** + * @brief Receive FIFO empty interrupt disable + * @rmtoll IER RXUFLWIE FL_CAN_DisableIT_RXEmpty + * @param CANx CAN instance + * @retval None + */ +__STATIC_INLINE void FL_CAN_DisableIT_RXEmpty(CAN_Type *CANx) +{ + CLEAR_BIT(CANx->IER, CAN_IER_RXUFLWIE_Msk); +} + +/** + * @brief Receive OK interrupt enable + * @rmtoll IER RXOKIE FL_CAN_EnableIT_RXOK + * @param CANx CAN instance + * @retval None + */ +__STATIC_INLINE void FL_CAN_EnableIT_RXOK(CAN_Type *CANx) +{ + SET_BIT(CANx->IER, CAN_IER_RXOKIE_Msk); +} + +/** + * @brief Get receive OK interrupt enable + * @rmtoll IER RXOKIE FL_CAN_IsEnabledIT_RXOK + * @param CANx CAN instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CAN_IsEnabledIT_RXOK(CAN_Type *CANx) +{ + return (uint32_t)(READ_BIT(CANx->IER, CAN_IER_RXOKIE_Msk) == CAN_IER_RXOKIE_Msk); +} + +/** + * @brief Receive OK interrupt disable + * @rmtoll IER RXOKIE FL_CAN_DisableIT_RXOK + * @param CANx CAN instance + * @retval None + */ +__STATIC_INLINE void FL_CAN_DisableIT_RXOK(CAN_Type *CANx) +{ + CLEAR_BIT(CANx->IER, CAN_IER_RXOKIE_Msk); +} + +/** + * @brief High priority transmit buffer FULL interrupt enable + * @rmtoll IER TXBFLLIE FL_CAN_EnableIT_TXHighPriorBuffFull + * @param CANx CAN instance + * @retval None + */ +__STATIC_INLINE void FL_CAN_EnableIT_TXHighPriorBuffFull(CAN_Type *CANx) +{ + SET_BIT(CANx->IER, CAN_IER_TXBFLLIE_Msk); +} + +/** + * @brief Get high priority transmit buffer FULL interrupt enable status + * @rmtoll IER TXBFLLIE FL_CAN_IsEnabledIT_TXHighPriorBuffFull + * @param CANx CAN instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CAN_IsEnabledIT_TXHighPriorBuffFull(CAN_Type *CANx) +{ + return (uint32_t)(READ_BIT(CANx->IER, CAN_IER_TXBFLLIE_Msk) == CAN_IER_TXBFLLIE_Msk); +} + +/** + * @brief High priority transmit buffer FULL interrupt disable + * @rmtoll IER TXBFLLIE FL_CAN_DisableIT_TXHighPriorBuffFull + * @param CANx CAN instance + * @retval None + */ +__STATIC_INLINE void FL_CAN_DisableIT_TXHighPriorBuffFull(CAN_Type *CANx) +{ + CLEAR_BIT(CANx->IER, CAN_IER_TXBFLLIE_Msk); +} + +/** + * @brief Transmit FIFO FULL interrupt enable + * @rmtoll IER TXFLLIE FL_CAN_EnableIT_TXBuffFull + * @param CANx CAN instance + * @retval None + */ +__STATIC_INLINE void FL_CAN_EnableIT_TXBuffFull(CAN_Type *CANx) +{ + SET_BIT(CANx->IER, CAN_IER_TXFLLIE_Msk); +} + +/** + * @brief Get transmit FIFO FULL interrupt enable + * @rmtoll IER TXFLLIE FL_CAN_IsEnabledIT_TXBuffFull + * @param CANx CAN instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CAN_IsEnabledIT_TXBuffFull(CAN_Type *CANx) +{ + return (uint32_t)(READ_BIT(CANx->IER, CAN_IER_TXFLLIE_Msk) == CAN_IER_TXFLLIE_Msk); +} + +/** + * @brief Transmit FIFO FULL interrupt disable + * @rmtoll IER TXFLLIE FL_CAN_DisableIT_TXBuffFull + * @param CANx CAN instance + * @retval None + */ +__STATIC_INLINE void FL_CAN_DisableIT_TXBuffFull(CAN_Type *CANx) +{ + CLEAR_BIT(CANx->IER, CAN_IER_TXFLLIE_Msk); +} + +/** + * @brief Transmission OK interrupt enable + * @rmtoll IER TXOKIE FL_CAN_EnableIT_TXOK + * @param CANx CAN instance + * @retval None + */ +__STATIC_INLINE void FL_CAN_EnableIT_TXOK(CAN_Type *CANx) +{ + SET_BIT(CANx->IER, CAN_IER_TXOKIE_Msk); +} + +/** + * @brief Get transmission OK interrupt enable status + * @rmtoll IER TXOKIE FL_CAN_IsEnabledIT_TXOK + * @param CANx CAN instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CAN_IsEnabledIT_TXOK(CAN_Type *CANx) +{ + return (uint32_t)(READ_BIT(CANx->IER, CAN_IER_TXOKIE_Msk) == CAN_IER_TXOKIE_Msk); +} + +/** + * @brief Transmission OK interrupt disable + * @rmtoll IER TXOKIE FL_CAN_DisableIT_TXOK + * @param CANx CAN instance + * @retval None + */ +__STATIC_INLINE void FL_CAN_DisableIT_TXOK(CAN_Type *CANx) +{ + CLEAR_BIT(CANx->IER, CAN_IER_TXOKIE_Msk); +} + +/** + * @brief Arbitration lost interrupt enable + * @rmtoll IER ARBLSTIE FL_CAN_EnableIT_ArbitrationLost + * @param CANx CAN instance + * @retval None + */ +__STATIC_INLINE void FL_CAN_EnableIT_ArbitrationLost(CAN_Type *CANx) +{ + SET_BIT(CANx->IER, CAN_IER_ARBLSTIE_Msk); +} + +/** + * @brief Get arbitration lost interrupt enable + * @rmtoll IER ARBLSTIE FL_CAN_IsEnabledIT_ArbitrationLost + * @param CANx CAN instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CAN_IsEnabledIT_ArbitrationLost(CAN_Type *CANx) +{ + return (uint32_t)(READ_BIT(CANx->IER, CAN_IER_ARBLSTIE_Msk) == CAN_IER_ARBLSTIE_Msk); +} + +/** + * @brief Arbitration lost interrupt disable + * @rmtoll IER ARBLSTIE FL_CAN_DisableIT_ArbitrationLost + * @param CANx CAN instance + * @retval None + */ +__STATIC_INLINE void FL_CAN_DisableIT_ArbitrationLost(CAN_Type *CANx) +{ + CLEAR_BIT(CANx->IER, CAN_IER_ARBLSTIE_Msk); +} + +/** + * @brief Clear bus off interrupt flag + * @rmtoll ICR CBSOFF FL_CAN_ClearFlag_BusOff + * @param CANx CAN instance + * @retval None + */ +__STATIC_INLINE void FL_CAN_ClearFlag_BusOff(CAN_Type *CANx) +{ + WRITE_REG(CANx->ICR, CAN_ICR_CBSOFF_Msk); +} + +/** + * @brief Clear error interrupt flag + * @rmtoll ICR CERROR FL_CAN_ClearFlag_Error + * @param CANx CAN instance + * @retval None + */ +__STATIC_INLINE void FL_CAN_ClearFlag_Error(CAN_Type *CANx) +{ + WRITE_REG(CANx->ICR, CAN_ICR_CERROR_Msk); +} + +/** + * @brief Clear receive FIFO not empty interrupt flag + * @rmtoll ICR CRXNEMP FL_CAN_ClearFlag_RXNotEmpty + * @param CANx CAN instance + * @retval None + */ +__STATIC_INLINE void FL_CAN_ClearFlag_RXNotEmpty(CAN_Type *CANx) +{ + WRITE_REG(CANx->ICR, CAN_ICR_CRXNEMP_Msk); +} + +/** + * @brief Clear receive FIFO overflow interrupt flag + * @rmtoll ICR CRXOFLW FL_CAN_ClearFlag_RXOverflow + * @param CANx CAN instance + * @retval None + */ +__STATIC_INLINE void FL_CAN_ClearFlag_RXOverflow(CAN_Type *CANx) +{ + WRITE_REG(CANx->ICR, CAN_ICR_CRXOFLW_Msk); +} + +/** + * @brief Clear receive FIFO underflow interrupt flag + * @rmtoll ICR CRXUFLW FL_CAN_ClearFlag_RXEmpty + * @param CANx CAN instance + * @retval None + */ +__STATIC_INLINE void FL_CAN_ClearFlag_RXEmpty(CAN_Type *CANx) +{ + WRITE_REG(CANx->ICR, CAN_ICR_CRXUFLW_Msk); +} + +/** + * @brief Clear receive OK interrupt flag + * @rmtoll ICR CRXOK FL_CAN_ClearFlag_RXOK + * @param CANx CAN instance + * @retval None + */ +__STATIC_INLINE void FL_CAN_ClearFlag_RXOK(CAN_Type* CANx) +{ + WRITE_REG(CANx->ICR, CAN_ICR_CRXOK_Msk); +} + +/** + * @brief Clear high priority transmit buffer FULL interrupt flag + * @rmtoll ICR CTXBFLL FL_CAN_ClearFlag_TXHighPriorBuffFull + * @param CANx CAN instance + * @retval None + */ +__STATIC_INLINE void FL_CAN_ClearFlag_TXHighPriorBuffFull(CAN_Type *CANx) +{ + WRITE_REG(CANx->ICR, CAN_ICR_CTXBFLL_Msk); +} + +/** + * @brief Clear transmit FIFO FULL interrupt flag + * @rmtoll ICR CTXFLL FL_CAN_ClearFlag_TXBuffFull + * @param CANx CAN instance + * @retval None + */ +__STATIC_INLINE void FL_CAN_ClearFlag_TXBuffFull(CAN_Type *CANx) +{ + WRITE_REG(CANx->ICR, CAN_ICR_CTXFLL_Msk); +} + +/** + * @brief Clear transmission OK interrupt flag + * @rmtoll ICR CTXOK FL_CAN_ClearFlag_TXOK + * @param CANx CAN instance + * @retval None + */ +__STATIC_INLINE void FL_CAN_ClearFlag_TXOK(CAN_Type *CANx) +{ + WRITE_REG(CANx->ICR, CAN_ICR_CTXOK_Msk); +} + +/** + * @brief Clear arbitration lost interrupt flag + * @rmtoll ICR CARBLST FL_CAN_ClearFlag_ArbitrationLost + * @param CANx CAN instance + * @retval None + */ +__STATIC_INLINE void FL_CAN_ClearFlag_ArbitrationLost(CAN_Type *CANx) +{ + WRITE_REG(CANx->ICR, CAN_ICR_CARBLST_Msk); +} + +/** + * @brief Set TXFIFO message identifier code + * @rmtoll TXFIDR IDR FL_CAN_WriteTXMessageID + * @param CANx CAN instance + * @param id + * @retval None + */ +__STATIC_INLINE void FL_CAN_WriteTXMessageID(CAN_Type *CANx, uint32_t id) +{ + MODIFY_REG(CANx->TXFIDR, (0xffffffffU << 0U), (id << 0U)); +} + +/** + * @brief Get TXFIFO message identifier code + * @rmtoll TXFIDR IDR FL_CAN_ReadTXMessageID + * @param CANx CAN instance + * @retval + */ +__STATIC_INLINE uint32_t FL_CAN_ReadTXMessageID(CAN_Type *CANx) +{ + return (uint32_t)(READ_BIT(CANx->TXFIDR, 0xffffffffU) >> 0U); +} + +/** + * @brief Set TXFIFO data length code + * @rmtoll TXFDLCR DLC FL_CAN_WriteTXMessageLength + * @param CANx CAN instance + * @param length + * @retval None + */ +__STATIC_INLINE void FL_CAN_WriteTXMessageLength(CAN_Type *CANx, uint32_t length) +{ + MODIFY_REG(CANx->TXFDLCR, (0xfU << 0U), (length << 0U)); +} + +/** + * @brief Get TXFIFO data length code + * @rmtoll TXFDLCR DLC FL_CAN_ReadTXMessageLength + * @param CANx CAN instance + * @retval + */ +__STATIC_INLINE uint32_t FL_CAN_ReadTXMessageLength(CAN_Type *CANx) +{ + return (uint32_t)(READ_BIT(CANx->TXFDLCR, 0xfU) >> 0U); +} + +/** + * @brief Set TXFIFO data word1 + * @rmtoll TXFDW1R DB FL_CAN_WriteTXMessageWord1 + * @param CANx CAN instance + * @param word + * @retval None + */ +__STATIC_INLINE void FL_CAN_WriteTXMessageWord1(CAN_Type *CANx, uint32_t word) +{ + MODIFY_REG(CANx->TXFDW1R, (0xffffffffU << 0U), (word << 0U)); +} + +/** + * @brief Get TXFIFO data word1 + * @rmtoll TXFDW1R DB FL_CAN_ReadTXMessageWord1 + * @param CANx CAN instance + * @retval + */ +__STATIC_INLINE uint32_t FL_CAN_ReadTXMessageWord1(CAN_Type *CANx) +{ + return (uint32_t)(READ_BIT(CANx->TXFDW1R, 0xffffffffU) >> 0U); +} + +/** + * @brief Set TXFIFO data word2 + * @rmtoll TXFDW2R DB FL_CAN_WriteTXMessageWord2 + * @param CANx CAN instance + * @param word + * @retval None + */ +__STATIC_INLINE void FL_CAN_WriteTXMessageWord2(CAN_Type *CANx, uint32_t word) +{ + MODIFY_REG(CANx->TXFDW2R, (0xffffffffU << 0U), (word << 0U)); +} + +/** + * @brief Get TXFIFO data word2 + * @rmtoll TXFDW2R DB FL_CAN_ReadTXMessageWord2 + * @param CANx CAN instance + * @retval + */ +__STATIC_INLINE uint32_t FL_CAN_ReadTXMessageWord2(CAN_Type *CANx) +{ + return (uint32_t)(READ_BIT(CANx->TXFDW2R, 0xffffffffU) >> 0U); +} + +/** + * @brief Set HPB identifier code + * @rmtoll HPBIDR IDR FL_CAN_WriteHighPriorTXMessageID + * @param CANx CAN instance + * @param id + * @retval None + */ +__STATIC_INLINE void FL_CAN_WriteHighPriorTXMessageID(CAN_Type *CANx, uint32_t id) +{ + MODIFY_REG(CANx->HPBIDR, (0xffffffffU << 0U), (id << 0U)); +} + +/** + * @brief Get HPB identifier code + * @rmtoll HPBIDR IDR FL_CAN_ReadHighPriorTXMessageID + * @param CANx CAN instance + * @retval + */ +__STATIC_INLINE uint32_t FL_CAN_ReadHighPriorTXMessageID(CAN_Type *CANx) +{ + return (uint32_t)(READ_BIT(CANx->HPBIDR, 0xffffffffU) >> 0U); +} + +/** + * @brief Set HPB data length code + * @rmtoll HPBDLCR DLC FL_CAN_WriteHighPriorMessageLength + * @param CANx CAN instance + * @param length + * @retval None + */ +__STATIC_INLINE void FL_CAN_WriteHighPriorMessageLength(CAN_Type *CANx, uint32_t length) +{ + MODIFY_REG(CANx->HPBDLCR, (0xfU << 0U), (length << 0U)); +} + +/** + * @brief Get HPB data length code + * @rmtoll HPBDLCR DLC FL_CAN_ReadHighPriorMessageLength + * @param CANx CAN instance + * @retval + */ +__STATIC_INLINE uint32_t FL_CAN_ReadHighPriorMessageLength(CAN_Type *CANx) +{ + return (uint32_t)(READ_BIT(CANx->HPBDLCR, 0xfU) >> 0U); +} + +/** + * @brief Set HPB data word1 + * @rmtoll HPBDW1R DB FL_CAN_WriteHighPriorMessageWord1 + * @param CANx CAN instance + * @param word + * @retval None + */ +__STATIC_INLINE void FL_CAN_WriteHighPriorMessageWord1(CAN_Type *CANx, uint32_t word) +{ + MODIFY_REG(CANx->HPBDW1R, (0xffffffffU << 0U), (word << 0U)); +} + +/** + * @brief Get HPB data word1 + * @rmtoll HPBDW1R DB FL_CAN_ReadHighPriorMessageWord1 + * @param CANx CAN instance + * @retval + */ +__STATIC_INLINE uint32_t FL_CAN_ReadHighPriorMessageWord1(CAN_Type *CANx) +{ + return (uint32_t)(READ_BIT(CANx->HPBDW1R, 0xffffffffU) >> 0U); +} + +/** + * @brief Set HPB data word2 + * @rmtoll HPBDW2R DB FL_CAN_WriteHighPriorMessageWord2 + * @param CANx CAN instance + * @param word + * @retval None + */ +__STATIC_INLINE void FL_CAN_WriteHighPriorMessageWord2(CAN_Type *CANx, uint32_t word) +{ + MODIFY_REG(CANx->HPBDW2R, (0xffffffffU << 0U), (word << 0U)); +} + +/** + * @brief Get HPB data word2 + * @rmtoll HPBDW2R DB FL_CAN_ReadHighPriorMessageWord2 + * @param CANx CAN instance + * @retval + */ +__STATIC_INLINE uint32_t FL_CAN_ReadHighPriorMessageWord2(CAN_Type *CANx) +{ + return (uint32_t)(READ_BIT(CANx->HPBDW2R, 0xffffffffU) >> 0U); +} + +/** + * @brief Set RXFIFO message identifier code + * @rmtoll RXFIDR IDR FL_CAN_WriteRXMessageID + * @param CANx CAN instance + * @param id + * @retval None + */ +__STATIC_INLINE void FL_CAN_WriteRXMessageID(CAN_Type *CANx, uint32_t id) +{ + MODIFY_REG(CANx->RXFIDR, (0xffffffffU << 0U), (id << 0U)); +} + +/** + * @brief Get RXFIFO message identifier code + * @rmtoll RXFIDR IDR FL_CAN_ReadRXMessageID + * @param CANx CAN instance + * @retval + */ +__STATIC_INLINE uint32_t FL_CAN_ReadRXMessageID(CAN_Type *CANx) +{ + return (uint32_t)(READ_BIT(CANx->RXFIDR, 0xffffffffU) >> 0U); +} + +/** + * @brief Set RXFIFO data length code + * @rmtoll RXFDLCR DLC FL_CAN_WriteRXMessageLength + * @param CANx CAN instance + * @param length + * @retval None + */ +__STATIC_INLINE void FL_CAN_WriteRXMessageLength(CAN_Type *CANx, uint32_t length) +{ + MODIFY_REG(CANx->RXFDLCR, (0xfU << 0U), (length << 0U)); +} + +/** + * @brief Get RXFIFO data length code + * @rmtoll RXFDLCR DLC FL_CAN_ReadRXMessageLength + * @param CANx CAN instance + * @retval + */ +__STATIC_INLINE uint32_t FL_CAN_ReadRXMessageLength(CAN_Type *CANx) +{ + return (uint32_t)(READ_BIT(CANx->RXFDLCR, 0xfU) >> 0U); +} + +/** + * @brief Set RXFIFO data word1 + * @rmtoll RXFDW1R DB FL_CAN_WriteRXMessageWord1 + * @param CANx CAN instance + * @param word + * @retval None + */ +__STATIC_INLINE void FL_CAN_WriteRXMessageWord1(CAN_Type *CANx, uint32_t word) +{ + MODIFY_REG(CANx->RXFDW1R, (0xffffffffU << 0U), (word << 0U)); +} + +/** + * @brief Get RXFIFO data word1 + * @rmtoll RXFDW1R DB FL_CAN_ReadRXMessageWord1 + * @param CANx CAN instance + * @retval + */ +__STATIC_INLINE uint32_t FL_CAN_ReadRXMessageWord1(CAN_Type *CANx) +{ + return (uint32_t)(READ_BIT(CANx->RXFDW1R, 0xffffffffU) >> 0U); +} + +/** + * @brief Set RXFIFO data word2 + * @rmtoll RXFDW2R DB FL_CAN_WriteRXMessageWord2 + * @param CANx CAN instance + * @param word + * @retval None + */ +__STATIC_INLINE void FL_CAN_WriteRXMessageWord2(CAN_Type *CANx, uint32_t word) +{ + MODIFY_REG(CANx->RXFDW2R, (0xffffffffU << 0U), (word << 0U)); +} + +/** + * @brief Get RXFIFO data word2 + * @rmtoll RXFDW2R DB FL_CAN_ReadRXMessageWord2 + * @param CANx CAN instance + * @retval + */ +__STATIC_INLINE uint32_t FL_CAN_ReadRXMessageWord2(CAN_Type *CANx) +{ + return (uint32_t)(READ_BIT(CANx->RXFDW2R, 0xffffffffU) >> 0U); +} + +/** + * @brief Acceptance filter 4 enable + * @rmtoll AFR UAF FL_CAN_Filter_Enable + * @param CANx CAN instance + * @param filterX This parameter can be one of the following values: + * @arg @ref FL_CAN_FILTER1 + * @arg @ref FL_CAN_FILTER2 + * @arg @ref FL_CAN_FILTER3 + * @arg @ref FL_CAN_FILTER4 + * @retval None + */ +__STATIC_INLINE void FL_CAN_Filter_Enable(CAN_Type *CANx, uint32_t filterX) +{ + SET_BIT(CANx->AFR, 0x1U << filterX); +} + +/** + * @brief Get acceptance filter 4 enable status + * @rmtoll AFR UAF FL_CAN_Filter_IsEnabled + * @param CANx CAN instance + * @param filterX This parameter can be one of the following values: + * @arg @ref FL_CAN_FILTER1 + * @arg @ref FL_CAN_FILTER2 + * @arg @ref FL_CAN_FILTER3 + * @arg @ref FL_CAN_FILTER4 + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CAN_Filter_IsEnabled(CAN_Type *CANx, uint32_t filterX) +{ + return (uint32_t)(READ_BIT(CANx->AFR, (((0x1U << filterX) & 0xf) << CAN_AFR_UAF_Pos)) == (((0x1U << filterX) & 0xf) << CAN_AFR_UAF_Pos)); +} + +/** + * @brief Acceptance filter 4 disable + * @rmtoll AFR UAF FL_CAN_Filter_Disable + * @param CANx CAN instance + * @param filterX This parameter can be one of the following values: + * @arg @ref FL_CAN_FILTER1 + * @arg @ref FL_CAN_FILTER2 + * @arg @ref FL_CAN_FILTER3 + * @arg @ref FL_CAN_FILTER4 + * @retval None + */ +__STATIC_INLINE void FL_CAN_Filter_Disable(CAN_Type *CANx, uint32_t filterX) +{ + CLEAR_BIT(CANx->AFR, (((0x1U << filterX) & 0xf) << CAN_AFR_UAF_Pos)); +} + +/** + * @brief Enable RTR participate filter compare + * @rmtoll AFMR AMRTR FL_CAN_Filter_EnableRTRCompare + * @param CANx CAN instance + * @param filterX This parameter can be one of the following values: + * @arg @ref FL_CAN_FILTER1 + * @arg @ref FL_CAN_FILTER2 + * @arg @ref FL_CAN_FILTER3 + * @arg @ref FL_CAN_FILTER4 + * @retval None + */ +__STATIC_INLINE void FL_CAN_Filter_EnableRTRCompare(CAN_Type *CANx, uint32_t filterX) +{ + SET_BIT(*(&(CANx->AFMR0) + 2 * filterX), CAN_AFMR_AMRTR_Msk); +} + +/** + * @brief Disable RTR participate filter compare + * @rmtoll AFMR AMRTR FL_CAN_Filter_DisableRTRCompare + * @param CANx CAN instance + * @param filterX This parameter can be one of the following values: + * @arg @ref FL_CAN_FILTER1 + * @arg @ref FL_CAN_FILTER2 + * @arg @ref FL_CAN_FILTER3 + * @arg @ref FL_CAN_FILTER4 + * @retval Returned value can be one of the following values: + */ +__STATIC_INLINE void FL_CAN_Filter_DisableRTRCompare(CAN_Type *CANx, uint32_t filterX) +{ + CLEAR_BIT(*(&(CANx->AFMR0) + 2 * filterX), CAN_AFMR_AMRTR_Msk); +} + +/** + * @brief Get RTR participate filter compare Enable Status + * @rmtoll AFMR AMRTR FL_CAN_Filter_IsEnabledRTRCompare + * @param CANx CAN instance + * @param filterX This parameter can be one of the following values: + * @arg @ref FL_CAN_FILTER1 + * @arg @ref FL_CAN_FILTER2 + * @arg @ref FL_CAN_FILTER3 + * @arg @ref FL_CAN_FILTER4 + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CAN_Filter_IsEnabledRTRCompare(CAN_Type *CANx, uint32_t filterX) +{ + return (uint32_t)(READ_BIT(*(&(CANx->AFMR0) + 2 * filterX), CAN_AFMR_AMRTR_Msk) == CAN_AFMR_AMRTR_Msk); +} + +/** + * @brief Set ID low 18bit participate filter compare + * @rmtoll AFMR AMID18 FL_CAN_Filter_WriteEXTIDCompareMask + * @param CANx CAN instance + * @param filterX This parameter can be one of the following values: + * @arg @ref FL_CAN_FILTER1 + * @arg @ref FL_CAN_FILTER2 + * @arg @ref FL_CAN_FILTER3 + * @arg @ref FL_CAN_FILTER4 + * @retval None + */ +__STATIC_INLINE void FL_CAN_Filter_WriteEXTIDCompareMask(CAN_Type *CANx, uint32_t filterX, uint32_t id18) +{ + MODIFY_REG(*(&(CANx->AFMR0) + 2 * filterX), (0x3ffffU << CAN_AFMR_AMID18_Pos), (id18 << CAN_AFMR_AMID18_Pos)); +} + +/** + * @brief Get ID low 18bit participate filter compare + * @rmtoll AFMR AMID18 FL_CAN_Filter_ReadEXTIDCompareMask + * @param CANx CAN instance + * @param filterX This parameter can be one of the following values: + * @arg @ref FL_CAN_FILTER1 + * @arg @ref FL_CAN_FILTER2 + * @arg @ref FL_CAN_FILTER3 + * @arg @ref FL_CAN_FILTER4 + * @retval None + */ +__STATIC_INLINE uint32_t FL_CAN_Filter_ReadEXTIDCompareMask(CAN_Type *CANx, uint32_t filterX) +{ + return (uint32_t)(READ_BIT(*(&(CANx->AFMR0) + 2 * filterX), (0x3ffffU << CAN_AFMR_AMID18_Pos)) >> CAN_AFMR_AMID18_Pos); +} + +/** + * @brief Enable IDE participate filter compare + * @rmtoll AFMR AMIDE FL_CAN_Filter_EnableIDECompare + * @param CANx CAN instance + * @param filterX This parameter can be one of the following values: + * @arg @ref FL_CAN_FILTER1 + * @arg @ref FL_CAN_FILTER2 + * @arg @ref FL_CAN_FILTER3 + * @arg @ref FL_CAN_FILTER4 + * @retval None + */ +__STATIC_INLINE void FL_CAN_Filter_EnableIDECompare(CAN_Type *CANx, uint32_t filterX) +{ + SET_BIT(*(&(CANx->AFMR0) + 2 * filterX), CAN_AFMR_AMIDE_Msk); +} + +/** + * @brief Disable IDE participate filter compare + * @rmtoll AFMR AMIDE FL_CAN_Filter_DisableIDECompare + * @param CANx CAN instance + * @param filterX This parameter can be one of the following values: + * @arg @ref FL_CAN_FILTER1 + * @arg @ref FL_CAN_FILTER2 + * @arg @ref FL_CAN_FILTER3 + * @arg @ref FL_CAN_FILTER4 + * @retval Returned value can be one of the following values: + */ +__STATIC_INLINE void FL_CAN_Filter_DisableIDECompare(CAN_Type *CANx, uint32_t filterX) +{ + CLEAR_BIT(*(&(CANx->AFMR0) + 2 * filterX), CAN_AFMR_AMIDE_Msk); +} + +/** + * @brief Get IDE participate filter compare Enable Status + * @rmtoll AFMR AMIDE FL_CAN_Filter_IsEnabledIDECompare + * @param CANx CAN instance + * @param filterX This parameter can be one of the following values: + * @arg @ref FL_CAN_FILTER1 + * @arg @ref FL_CAN_FILTER2 + * @arg @ref FL_CAN_FILTER3 + * @arg @ref FL_CAN_FILTER4 + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CAN_Filter_IsEnabledIDECompare(CAN_Type *CANx, uint32_t filterX) +{ + return (uint32_t)(READ_BIT(*(&(CANx->AFMR0) + 2 * filterX), CAN_AFMR_AMIDE_Msk) == CAN_AFMR_AMIDE_Msk); +} + +/** + * @brief Enable SRR participate filter compare + * @rmtoll AFMR AMSRR FL_CAN_Filter_EnableSRRCompare + * @param CANx CAN instance + * @param filterX This parameter can be one of the following values: + * @arg @ref FL_CAN_FILTER1 + * @arg @ref FL_CAN_FILTER2 + * @arg @ref FL_CAN_FILTER3 + * @arg @ref FL_CAN_FILTER4 + * @retval None + */ +__STATIC_INLINE void FL_CAN_Filter_EnableSRRCompare(CAN_Type *CANx, uint32_t filterX) +{ + SET_BIT(*(&(CANx->AFMR0) + 2 * filterX), CAN_AFMR_AMSRR_Msk); +} + +/** + * @brief Disable SRR participate filter compare + * @rmtoll AFMR AMSRR FL_CAN_Filter_DisableSRRCompare + * @param CANx CAN instance + * @param filterX This parameter can be one of the following values: + * @arg @ref FL_CAN_FILTER1 + * @arg @ref FL_CAN_FILTER2 + * @arg @ref FL_CAN_FILTER3 + * @arg @ref FL_CAN_FILTER4 + * @retval Returned value can be one of the following values: + */ +__STATIC_INLINE void FL_CAN_Filter_DisableSRRCompare(CAN_Type *CANx, uint32_t filterX) +{ + CLEAR_BIT(*(&(CANx->AFMR0) + 2 * filterX), CAN_AFMR_AMSRR_Msk); +} + +/** + * @brief Get SRR participate filter compare Enable Status + * @rmtoll AFMR AMSRR FL_CAN_Filter_IsEnabledSRRCompare + * @param CANx CAN instance + * @param filterX This parameter can be one of the following values: + * @arg @ref FL_CAN_FILTER1 + * @arg @ref FL_CAN_FILTER2 + * @arg @ref FL_CAN_FILTER3 + * @arg @ref FL_CAN_FILTER4 + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CAN_Filter_IsEnabledSRRCompare(CAN_Type *CANx, uint32_t filterX) +{ + return (uint32_t)(READ_BIT(*(&(CANx->AFMR0) + 2 * filterX), CAN_AFMR_AMSRR_Msk) == CAN_AFMR_AMSRR_Msk); +} + +/** + * @brief Set ID high 11bit participate filter compare + * @rmtoll AFMR AMID11 FL_CAN_Filter_WriteIDCompareMask + * @param CANx CAN instance + * @param filterX + * @param id11 + * @retval None + */ +__STATIC_INLINE void FL_CAN_Filter_WriteIDCompareMask(CAN_Type *CANx, uint32_t filterX, uint32_t id11) +{ + MODIFY_REG(*((&(CANx->AFMR0)) + 2 * filterX), (0x7ffU << CAN_AFMR_AMID11_Pos), id11 << CAN_AFMR_AMID11_Pos); +} + +/** + * @brief Get ID high 11bit participate filter compare + * @rmtoll AFMR AMID11 FL_CAN_Filter_ReadIDCompareMask + * @param CANx CAN instance + * @param filterX This parameter can be one of the following values: + * @arg @ref FL_CAN_FILTER1 + * @arg @ref FL_CAN_FILTER2 + * @arg @ref FL_CAN_FILTER3 + * @arg @ref FL_CAN_FILTER4 + * @retval + */ +__STATIC_INLINE uint32_t FL_CAN_Filter_ReadIDCompareMask(CAN_Type *CANx, uint32_t filterX) +{ + return (uint32_t)(READ_BIT(*((&(CANx->AFMR0)) + 2 * filterX), (0x7ffU << CAN_AFMR_AMID11_Pos)) >> CAN_AFMR_AMID11_Pos); +} + +/** + * @brief Set filter RTR + * @rmtoll AFIR AIRTR FL_CAN_Filter_SetRTRCompare + * @param CANx CAN instance + * @param filterX This parameter can be one of the following values: + * @arg @ref FL_CAN_FILTER1 + * @arg @ref FL_CAN_FILTER2 + * @arg @ref FL_CAN_FILTER3 + * @arg @ref FL_CAN_FILTER4 + * @param rtr This parameter can be one of the following values: + * @arg @ref FL_CAN_RTR_BIT_LOW + * @arg @ref FL_CAN_RTR_BIT_HIGH + * @retval None + */ +__STATIC_INLINE void FL_CAN_Filter_SetRTRCompare(CAN_Type *CANx, uint32_t filterX, uint32_t rtr) +{ + MODIFY_REG(*((&(CANx->AFIR0)) + 2 * filterX), CAN_AFIR_AIRTR_Msk, rtr ); +} + +/** + * @brief Get filter RTR + * @rmtoll AFIR AIRTR FL_CAN_Filter_GetRTRCompare + * @param CANx CAN instance + * @param filterX This parameter can be one of the following values: + * @arg @ref FL_CAN_FILTER1 + * @arg @ref FL_CAN_FILTER2 + * @arg @ref FL_CAN_FILTER3 + * @arg @ref FL_CAN_FILTER4 + * @retval Returned value can be one of the following values: + * @arg @ref FL_CAN_RTR_BIT_LOW + * @arg @ref FL_CAN_RTR_BIT_HIGH + */ +__STATIC_INLINE uint32_t FL_CAN_Filter_GetRTRCompare(CAN_Type *CANx, uint32_t filterX) +{ + return (uint32_t)(READ_BIT(*((&(CANx->AFIR0)) + 2 * filterX), CAN_AFIR_AIRTR_Msk)); +} + +/** + * @brief Set filter ID[17:0] + * @rmtoll AFIR AIID18 FL_CAN_Filter_WriteEXTIDCompare + * @param CANx CAN instance + * @param filterX + * @param id18 + * @retval None + */ +__STATIC_INLINE void FL_CAN_Filter_WriteEXTIDCompare(CAN_Type *CANx, uint32_t filterX, uint32_t id18) +{ + MODIFY_REG(*(&(CANx->AFIR0) + 2 * filterX), (0x3ffffU << CAN_AFIR_AIID18_Pos), (id18 << CAN_AFIR_AIID18_Pos)); +} + +/** + * @brief Get filter ID[17:0] + * @rmtoll AFIR AIID18 FL_CAN_Filter_ReadEXTIDCompare + * @param CANx CAN instance + * @param filterX This parameter can be one of the following values: + * @arg @ref FL_CAN_FILTER1 + * @arg @ref FL_CAN_FILTER2 + * @arg @ref FL_CAN_FILTER3 + * @arg @ref FL_CAN_FILTER4 + * @retval + */ +__STATIC_INLINE uint32_t FL_CAN_Filter_ReadEXTIDCompare(CAN_Type *CANx, uint32_t filterX) +{ + return (uint32_t)(READ_BIT(*(&(CANx->AFIR0) + 2 * filterX), (0x3ffffU << CAN_AFIR_AIID18_Pos)) >> CAN_AFIR_AIID18_Pos); +} + +/** + * @brief Set filter IDE + * @rmtoll AFIR AIIDE FL_CAN_Filter_SetIDECompare + * @param CANx CAN instance + * @param filterX This parameter can be one of the following values: + * @arg @ref FL_CAN_FILTER1 + * @arg @ref FL_CAN_FILTER2 + * @arg @ref FL_CAN_FILTER3 + * @arg @ref FL_CAN_FILTER4 + * @param ide This parameter can be one of the following values: + * @arg @ref FL_CAN_IDE_BIT_LOW + * @arg @ref FL_CAN_IDE_BIT_HIGH + * @retval None + */ +__STATIC_INLINE void FL_CAN_Filter_SetIDECompare(CAN_Type *CANx, uint32_t filterX, uint32_t ide) +{ + MODIFY_REG(*((&(CANx->AFIR0)) + 2 * filterX), CAN_AFIR_AIIDE_Msk, ide); +} + +/** + * @brief Get filter IDE + * @rmtoll AFIR AIIDE FL_CAN_Filter_GetIDECompare + * @param CANx CAN instance + * @param filterX This parameter can be one of the following values: + * @arg @ref FL_CAN_FILTER1 + * @arg @ref FL_CAN_FILTER2 + * @arg @ref FL_CAN_FILTER3 + * @arg @ref FL_CAN_FILTER4 + * @retval Returned value can be one of the following values: + * @arg @ref FL_CAN_IDE_BIT_LOW + * @arg @ref FL_CAN_IDE_BIT_HIGH + */ +__STATIC_INLINE uint32_t FL_CAN_Filter_GetIDECompare(CAN_Type *CANx, uint32_t filterX) +{ + return (uint32_t)(READ_BIT(*((&(CANx->AFIR0)) + 2 * filterX), CAN_AFIR_AIIDE_Msk)); +} + +/** + * @brief Set filter SRR + * @rmtoll AFIR AISRR FL_CAN_Filter_SetSRRCompare + * @param CANx CAN instance + * @param filterX This parameter can be one of the following values: + * @arg @ref FL_CAN_FILTER1 + * @arg @ref FL_CAN_FILTER2 + * @arg @ref FL_CAN_FILTER3 + * @arg @ref FL_CAN_FILTER4 + * @param srr This parameter can be one of the following values: + * @arg @ref FL_CAN_SRR_BIT_LOW + * @arg @ref FL_CAN_SRR_BIT_HIGH + * @retval None + */ +__STATIC_INLINE void FL_CAN_Filter_SetSRRCompare(CAN_Type *CANx, uint32_t filterX, uint32_t srr) +{ + MODIFY_REG(*((&(CANx->AFIR0)) + 2 * filterX), CAN_AFIR_AISRR_Msk, srr); +} + +/** + * @brief Get filter SRR + * @rmtoll AFIR AISRR FL_CAN_Filter_GetSRRCompare + * @param CANx CAN instance + * @param filterX This parameter can be one of the following values: + * @arg @ref FL_CAN_FILTER1 + * @arg @ref FL_CAN_FILTER2 + * @arg @ref FL_CAN_FILTER3 + * @arg @ref FL_CAN_FILTER4 + * @retval Returned value can be one of the following values: + * @arg @ref FL_CAN_SRR_BIT_LOW + * @arg @ref FL_CAN_SRR_BIT_HIGH + */ +__STATIC_INLINE uint32_t FL_CAN_Filter_GetSRRCompare(CAN_Type *CANx, uint32_t filterX) +{ + return (uint32_t)(READ_BIT(*((&(CANx->AFIR0)) + 2 * filterX), CAN_AFIR_AISRR_Msk)); +} + +/** + * @brief Set filterID[28:18] + * @rmtoll AFIR AIID11 FL_CAN_Filter_WriteIDCompare + * @param CANx CAN instance + * @param filterX + * @param id11 + * @retval None + */ +__STATIC_INLINE void FL_CAN_Filter_WriteIDCompare(CAN_Type *CANx, uint32_t filterX, uint32_t id11) +{ + MODIFY_REG(*((&(CANx->AFIR0)) + 2 * filterX), (0x7ffU << CAN_AFIR_AIID11_Pos), id11 << CAN_AFIR_AIID11_Pos); +} + +/** + * @brief Get filter ID[28:18] + * @rmtoll AFIR AIID11 FL_CAN_Filter_ReadIDCompare + * @param CANx CAN instance + * @param filterX This parameter can be one of the following values: + * @arg @ref FL_CAN_FILTER1 + * @arg @ref FL_CAN_FILTER2 + * @arg @ref FL_CAN_FILTER3 + * @arg @ref FL_CAN_FILTER4 + * @retval + */ +__STATIC_INLINE uint32_t FL_CAN_Filter_ReadIDCompare(CAN_Type *CANx, uint32_t filterX) +{ + return (uint32_t)(READ_BIT(*((&(CANx->AFIR0)) + 2 * filterX), 0x7ffU) >> CAN_AFIR_AIID11_Pos); +} + +/** + * @} + */ + +/** @defgroup CAN_FL_EF_Init Initialization and de-initialization functions + * @{ + */ +FL_ErrorStatus FL_CAN_Init(CAN_Type *CANx, FL_CAN_InitTypeDef *CAN_InitStructure); +FL_ErrorStatus FL_CAN_FilterInit(CAN_Type *CANx, FL_CAN_FilterInitTypeDef *CAN_FilterInitStructure, uint32_t filterX); +void FL_CAN_StructInit(FL_CAN_InitTypeDef *CAN_InitStruct); +void FL_CAN_StructFilterInit(FL_CAN_FilterInitTypeDef *CAN_FilterInitStruct); +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif /* __FM33LG0XX_FL_CAN_H*/ + +/*************************Py_Code_Generator Version: 0.1-0.11-0.1 @ 2020-09-12*************************/ +/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/ diff --git a/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_cdif.h b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_cdif.h new file mode 100644 index 0000000..14a0bb4 --- /dev/null +++ b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_cdif.h @@ -0,0 +1,247 @@ + /** + ******************************************************************************************************* + * @file fm33lg0xx_fl_cdif.h + * @author FMSH Application Team + * @brief Head file of CDIF FL Module + ******************************************************************************************************* + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + + + +/* Define to prevent recursive inclusion---------------------------------------------------------------*/ +#ifndef __FM33LG0XX_FL_CDIF_H +#define __FM33LG0XX_FL_CDIF_H + +#ifdef __cplusplus +extern "C" { +#endif +/* Includes -------------------------------------------------------------------------------------------*/ +#include "fm33lg0xx_fl_def.h" +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @defgroup CDIF CDIF + * @brief CDIF FL driver + * @{ + */ + +/* Exported types -------------------------------------------------------------------------------------*/ +/** @defgroup CDIF_FL_ES_INIT CDIF Exported Init structures + * @{ + */ + +/** + * @brief FL CDIF Init Sturcture definition + */ + +/** + * @} + */ +/* Exported constants ---------------------------------------------------------------------------------*/ +/** @defgroup CDIF_FL_Exported_Constants CDIF Exported Constants + * @{ + */ + +#define CDIF_CR_INTF_IEN_Pos (1U) +#define CDIF_CR_INTF_IEN_Msk (0x1U << CDIF_CR_INTF_IEN_Pos) +#define CDIF_CR_INTF_IEN CDIF_CR_INTF_IEN_Msk + +#define CDIF_CR_INTF_OEN_Pos (0U) +#define CDIF_CR_INTF_OEN_Msk (0x1U << CDIF_CR_INTF_OEN_Pos) +#define CDIF_CR_INTF_OEN CDIF_CR_INTF_OEN_Msk + +#define CDIF_PRSC_PRSC_Pos (0U) +#define CDIF_PRSC_PRSC_Msk (0x7U << CDIF_PRSC_PRSC_Pos) +#define CDIF_PRSC_PRSC CDIF_PRSC_PRSC_Msk + + + +#define FL_CDIF_PSC_DIV1 (0x0Ul << CDIF_PRSC_PRSC_Pos) +#define FL_CDIF_PSC_DIV2 (0x1Ul << CDIF_PRSC_PRSC_Pos) +#define FL_CDIF_PSC_DIV4 (0x2Ul << CDIF_PRSC_PRSC_Pos) +#define FL_CDIF_PSC_DIV8 (0x3Ul << CDIF_PRSC_PRSC_Pos) +#define FL_CDIF_PSC_DIV16 (0x4Ul << CDIF_PRSC_PRSC_Pos) +#define FL_CDIF_PSC_DIV32 (0x5Ul << CDIF_PRSC_PRSC_Pos) +#define FL_CDIF_PSC_DIV64 (0x6Ul << CDIF_PRSC_PRSC_Pos) +#define FL_CDIF_PSC_DIV128 (0x7Ul << CDIF_PRSC_PRSC_Pos) + + +/** + * @} + */ +/* Exported functions ---------------------------------------------------------------------------------*/ +/** @defgroup CDIF_FL_Exported_Functions CDIF Exported Functions + * @{ + */ + +/** + * @brief VAO To CPU input enable + * @rmtoll CR INTF_IEN FL_CDIF_EnableVAOToCPU + * @param CDIFx CDIF instance + * @retval None + */ +__STATIC_INLINE void FL_CDIF_EnableVAOToCPU(CDIF_Type *CDIFx) +{ + SET_BIT(CDIFx->CR, CDIF_CR_INTF_IEN_Msk); +} + +/** + * @brief Get VAO To CPU input enable status + * @rmtoll CR INTF_IEN FL_CDIF_IsEnabledVAOToCPU + * @param CDIFx CDIF instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CDIF_IsEnabledVAOToCPU(CDIF_Type *CDIFx) +{ + return (uint32_t)(READ_BIT(CDIFx->CR, CDIF_CR_INTF_IEN_Msk) == CDIF_CR_INTF_IEN_Msk); +} + +/** + * @brief VAO To CPU input disable + * @rmtoll CR INTF_IEN FL_CDIF_DisableVAOToCPU + * @param CDIFx CDIF instance + * @retval None + */ +__STATIC_INLINE void FL_CDIF_DisableVAOToCPU(CDIF_Type *CDIFx) +{ + CLEAR_BIT(CDIFx->CR, CDIF_CR_INTF_IEN_Msk); +} + +/** + * @brief CPU To VAO enable + * @rmtoll CR INTF_OEN FL_CDIF_EnableCPUToVAO + * @param CDIFx CDIF instance + * @retval None + */ +__STATIC_INLINE void FL_CDIF_EnableCPUToVAO(CDIF_Type *CDIFx) +{ + SET_BIT(CDIFx->CR, CDIF_CR_INTF_OEN_Msk); +} + +/** + * @brief Get CPU To VAO output enable status + * @rmtoll CR INTF_OEN FL_CDIF_IsEnabledCPUToVAO + * @param CDIFx CDIF instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CDIF_IsEnabledCPUToVAO(CDIF_Type *CDIFx) +{ + return (uint32_t)(READ_BIT(CDIFx->CR, CDIF_CR_INTF_OEN_Msk) == CDIF_CR_INTF_OEN_Msk); +} + +/** + * @brief CPU To VAO output disable + * @rmtoll CR INTF_OEN FL_CDIF_DisableCPUToVAO + * @param CDIFx CDIF instance + * @retval None + */ +__STATIC_INLINE void FL_CDIF_DisableCPUToVAO(CDIF_Type *CDIFx) +{ + CLEAR_BIT(CDIFx->CR, CDIF_CR_INTF_OEN_Msk); +} + +/** + * @brief Set CDIF prescaler + * @rmtoll PRSC PRSC FL_CDIF_SetPrescaler + * @param CDIFx CDIF instance + * @param psc This parameter can be one of the following values: + * @arg @ref FL_CDIF_PSC_DIV1 + * @arg @ref FL_CDIF_PSC_DIV2 + * @arg @ref FL_CDIF_PSC_DIV4 + * @arg @ref FL_CDIF_PSC_DIV8 + * @arg @ref FL_CDIF_PSC_DIV16 + * @arg @ref FL_CDIF_PSC_DIV32 + * @arg @ref FL_CDIF_PSC_DIV64 + * @arg @ref FL_CDIF_PSC_DIV128 + * @retval None + */ +__STATIC_INLINE void FL_CDIF_SetPrescaler(CDIF_Type *CDIFx, uint32_t psc) +{ + MODIFY_REG(CDIFx->PRSC, CDIF_PRSC_PRSC_Msk, psc); +} + +/** + * @brief Get CDIF prescaler + * @rmtoll PRSC PRSC FL_CDIF_GetPrescaler + * @param CDIFx CDIF instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_CDIF_PSC_DIV1 + * @arg @ref FL_CDIF_PSC_DIV2 + * @arg @ref FL_CDIF_PSC_DIV4 + * @arg @ref FL_CDIF_PSC_DIV8 + * @arg @ref FL_CDIF_PSC_DIV16 + * @arg @ref FL_CDIF_PSC_DIV32 + * @arg @ref FL_CDIF_PSC_DIV64 + * @arg @ref FL_CDIF_PSC_DIV128 + */ +__STATIC_INLINE uint32_t FL_CDIF_GetPrescaler(CDIF_Type *CDIFx) +{ + return (uint32_t)(READ_BIT(CDIFx->PRSC, CDIF_PRSC_PRSC_Msk)); +} + +/** + * @} + */ + +/** @defgroup CDIF_FL_EF_Init Initialization and de-initialization functions + * @{ + */ + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif /* __FM33LG0XX_FL_CDIF_H*/ + +/*************************Py_Code_Generator Version: 0.1-0.11-0.1 @ 2020-09-11*************************/ +/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/ diff --git a/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_cmu.h b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_cmu.h new file mode 100644 index 0000000..a6f79db --- /dev/null +++ b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_cmu.h @@ -0,0 +1,2310 @@ + /** + ******************************************************************************************************* + * @file fm33lg0xx_fl_cmu.h + * @author FMSH Application Team + * @brief Head file of CMU FL Module + ******************************************************************************************************* + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + + + +/* Define to prevent recursive inclusion---------------------------------------------------------------*/ +#ifndef __FM33LG0XX_FL_CMU_H +#define __FM33LG0XX_FL_CMU_H + +#ifdef __cplusplus +extern "C" { +#endif +/* Includes -------------------------------------------------------------------------------------------*/ +#include "fm33lg0xx_fl_def.h" +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @defgroup CMU CMU + * @brief CMU FL driver + * @{ + */ + +/* Exported types -------------------------------------------------------------------------------------*/ +/** @defgroup CMU_FL_ES_INIT CMU Exported Init structures + * @{ + */ + +/** + * @brief FL CMU Init Sturcture definition + */ + +typedef enum +{ + FL_SYSTEM_CLOCK_RCHF_8M = 0, + FL_SYSTEM_CLOCK_RCHF_16M, + FL_SYSTEM_CLOCK_RCHF_24M, + FL_SYSTEM_CLOCK_PLL_RCHF_32M, + FL_SYSTEM_CLOCK_PLL_RCHF_48M, + FL_SYSTEM_CLOCK_PLL_RCHF_64M, + FL_SYSTEM_CLOCK_RCLP, + FL_SYSTEM_CLOCK_RCLF, + FL_SYSTEM_CLOCK_XTLF, + FL_SYSTEM_CLOCK_XTHF, +} FL_SystemClock; + +/** + * @} + */ +/* Exported constants ---------------------------------------------------------------------------------*/ +/** @defgroup CMU_FL_Exported_Constants CMU Exported Constants + * @{ + */ + +#define CMU_IER_HFDET_IE_Pos (1U) +#define CMU_IER_HFDET_IE_Msk (0x1UL << CMU_IER_HFDET_IE_Pos) +#define CMU_IER_HFDET_IE CMU_IER_HFDET_IE_Msk + +#define CMU_ISR_HFDETO_Pos (9U) +#define CMU_ISR_HFDETO_Msk (0x1UL << CMU_ISR_HFDETO_Pos) +#define CMU_ISR_HFDETO CMU_ISR_HFDETO_Msk + +#define CMU_ISR_HFDET_IF_Pos (1U) +#define CMU_ISR_HFDET_IF_Msk (0x1UL << CMU_ISR_HFDET_IF_Pos) +#define CMU_ISR_HFDET_IF CMU_ISR_HFDET_IF_Msk + +#define CMU_IER_SYSCES_IE_Pos (2U) +#define CMU_IER_SYSCES_IE_Msk (0x1UL << CMU_IER_SYSCES_IE_Pos) +#define CMU_IER_SYSCES_IE CMU_IER_SYSCES_IE_Msk + +#define CMU_ISR_SYSCES_IF_Pos (2U) +#define CMU_ISR_SYSCES_IF_Msk (0x1UL << CMU_ISR_SYSCES_IF_Pos) +#define CMU_ISR_SYSCES_IF CMU_ISR_SYSCES_IF_Msk + +#define CMU_SYSCLKCR_LSCATS_Pos (27U) +#define CMU_SYSCLKCR_LSCATS_Msk (0x1UL << CMU_SYSCLKCR_LSCATS_Pos) +#define CMU_SYSCLKCR_LSCATS CMU_SYSCLKCR_LSCATS_Msk + +#define CMU_SYSCLKCR_SLP_ENEXTI_Pos (25U) +#define CMU_SYSCLKCR_SLP_ENEXTI_Msk (0x1UL << CMU_SYSCLKCR_SLP_ENEXTI_Pos) +#define CMU_SYSCLKCR_SLP_ENEXTI CMU_SYSCLKCR_SLP_ENEXTI_Msk + +#define CMU_SYSCLKCR_APBPRES_Pos (16U) +#define CMU_SYSCLKCR_APBPRES_Msk (0x7UL << CMU_SYSCLKCR_APBPRES_Pos) +#define CMU_SYSCLKCR_APBPRES CMU_SYSCLKCR_APBPRES_Msk + +#define CMU_SYSCLKCR_AHBPRES_Pos (8U) +#define CMU_SYSCLKCR_AHBPRES_Msk (0x7UL << CMU_SYSCLKCR_AHBPRES_Pos) +#define CMU_SYSCLKCR_AHBPRES CMU_SYSCLKCR_AHBPRES_Msk + +#define CMU_SYSCLKCR_STCLKSEL_Pos (6U) +#define CMU_SYSCLKCR_STCLKSEL_Msk (0x3UL << CMU_SYSCLKCR_STCLKSEL_Pos) +#define CMU_SYSCLKCR_STCLKSEL CMU_SYSCLKCR_STCLKSEL_Msk + +#define CMU_SYSCLKCR_SYSCLKSEL_Pos (0U) +#define CMU_SYSCLKCR_SYSCLKSEL_Msk (0x7UL << CMU_SYSCLKCR_SYSCLKSEL_Pos) +#define CMU_SYSCLKCR_SYSCLKSEL CMU_SYSCLKCR_SYSCLKSEL_Msk + +#define CMU_RCHFCR_FSEL_Pos (16U) +#define CMU_RCHFCR_FSEL_Msk (0xfUL << CMU_RCHFCR_FSEL_Pos) +#define CMU_RCHFCR_FSEL CMU_RCHFCR_FSEL_Msk + +#define CMU_RCHFCR_EN_Pos (0U) +#define CMU_RCHFCR_EN_Msk (0x1UL << CMU_RCHFCR_EN_Pos) +#define CMU_RCHFCR_EN CMU_RCHFCR_EN_Msk + +#define CMU_RCHFTR_TRIM_Pos (0U) +#define CMU_RCHFTR_TRIM_Msk (0xffUL << CMU_RCHFTR_TRIM_Pos) +#define CMU_RCHFTR_TRIM CMU_RCHFTR_TRIM_Msk + +#define CMU_PLLCR_EN_Pos (0U) +#define CMU_PLLCR_EN_Msk (0x1UL << CMU_PLLCR_EN_Pos) +#define CMU_PLLCR_EN CMU_PLLCR_EN_Msk + +#define CMU_PLLCR_LOCKED_Pos (7U) +#define CMU_PLLCR_LOCKED_Msk (0x1UL << CMU_PLLCR_LOCKED_Pos) +#define CMU_PLLCR_LOCKED CMU_PLLCR_LOCKED_Msk + +#define CMU_PLLCR_INSEL_Pos (1U) +#define CMU_PLLCR_INSEL_Msk (0x1UL << CMU_PLLCR_INSEL_Pos) +#define CMU_PLLCR_INSEL CMU_PLLCR_INSEL_Msk + +#define CMU_PLLCR_DB_Pos (16U) +#define CMU_PLLCR_DB_Msk (0x7fUL << CMU_PLLCR_DB_Pos) +#define CMU_PLLCR_DB CMU_PLLCR_DB_Msk + +#define CMU_PLLCR_REFPRSC_Pos (4U) +#define CMU_PLLCR_REFPRSC_Msk (0x7UL << CMU_PLLCR_REFPRSC_Pos) +#define CMU_PLLCR_REFPRSC CMU_PLLCR_REFPRSC_Msk + +#define CMU_PLLCR_OSEL_Pos (3U) +#define CMU_PLLCR_OSEL_Msk (0x1UL << CMU_PLLCR_OSEL_Pos) +#define CMU_PLLCR_OSEL CMU_PLLCR_OSEL_Msk + +#define CMU_RCLPCR_ENB_Pos (0U) +#define CMU_RCLPCR_ENB_Msk (0x1UL << CMU_RCLPCR_ENB_Pos) +#define CMU_RCLPCR_ENB CMU_RCLPCR_ENB_Msk + +#define CMU_RCLPTR_TRIM_Pos (0U) +#define CMU_RCLPTR_TRIM_Msk (0xffUL << CMU_RCLPTR_TRIM_Pos) +#define CMU_RCLPTR_TRIM CMU_RCLPTR_TRIM_Msk + +#define CMU_LSCLKSEL_SEL_Pos (0U) +#define CMU_LSCLKSEL_SEL_Msk (0xffUL << CMU_LSCLKSEL_SEL_Pos) +#define CMU_LSCLKSEL_SEL CMU_LSCLKSEL_SEL_Msk + +#define CMU_XTHFCR_CFG_Pos (8U) +#define CMU_XTHFCR_CFG_Msk (0x1fUL << CMU_XTHFCR_CFG_Pos) +#define CMU_XTHFCR_CFG CMU_XTHFCR_CFG_Msk + +#define CMU_XTHFCR_EN_Pos (0U) +#define CMU_XTHFCR_EN_Msk (0x1UL << CMU_XTHFCR_EN_Pos) +#define CMU_XTHFCR_EN CMU_XTHFCR_EN_Msk + +#define CMU_RCLFCR_PSC_Pos (16U) +#define CMU_RCLFCR_PSC_Msk (0x3UL << CMU_RCLFCR_PSC_Pos) +#define CMU_RCLFCR_PSC CMU_RCLFCR_PSC_Msk + +#define CMU_RCLFCR_EN_Pos (0U) +#define CMU_RCLFCR_EN_Msk (0x1UL << CMU_RCLFCR_EN_Pos) +#define CMU_RCLFCR_EN CMU_RCLFCR_EN_Msk + +#define CMU_RCLFTR_TRIM_Pos (0U) +#define CMU_RCLFTR_TRIM_Msk (0xffUL << CMU_RCLFTR_TRIM_Pos) +#define CMU_RCLFTR_TRIM CMU_RCLFTR_TRIM_Msk + +#define CMU_OPCCR1_EXTICKS_Pos (30Ul) +#define CMU_OPCCR1_EXTICKS_Msk (0x1Ul << CMU_OPCCR1_EXTICKS_Pos) +#define CMU_OPCCR1_EXTICKS CMU_OPCCR1_EXTICKS_Msk + +#define CMU_OPCCR1_LPUART1CKS_Pos (26U) +#define CMU_OPCCR1_LPUART1CKS_Msk (0x3UL << CMU_OPCCR1_LPUART1CKS_Pos) +#define CMU_OPCCR1_LPUART1CKS CMU_OPCCR1_LPUART1CKS_Msk + +#define CMU_OPCCR1_LPUART0CKS_Pos (24Ul) +#define CMU_OPCCR1_LPUART0CKS_Msk (0x3Ul << CMU_OPCCR1_LPUART0CKS_Pos) +#define CMU_OPCCR1_LPUART0CKS CMU_OPCCR1_LPUART0CKS_Msk + +#define CMU_OPCCR1_LPUART2CKS_Pos (22U) +#define CMU_OPCCR1_LPUART2CKS_Msk (0x3UL << CMU_OPCCR1_LPUART2CKS_Pos) +#define CMU_OPCCR1_LPUART2CKS CMU_OPCCR1_LPUART2CKS_Msk + +#define CMU_OPCCR1_I2CCKS_Pos (16U) +#define CMU_OPCCR1_I2CCKS_Msk (0x3UL << CMU_OPCCR1_I2CCKS_Pos) +#define CMU_OPCCR1_I2CCKS CMU_OPCCR1_I2CCKS_Msk + +#define CMU_OPCCR1_BT16CKS_Pos (14U) +#define CMU_OPCCR1_BT16CKS_Msk (0x3UL << CMU_OPCCR1_BT16CKS_Pos) +#define CMU_OPCCR1_BT16CKS CMU_OPCCR1_BT16CKS_Msk + +#define CMU_OPCCR1_BT32CKS_Pos (12U) +#define CMU_OPCCR1_BT32CKS_Msk (0x3UL << CMU_OPCCR1_BT32CKS_Pos) +#define CMU_OPCCR1_BT32CKS CMU_OPCCR1_BT32CKS_Msk + +#define CMU_OPCCR1_LPT16CKS_Pos (10U) +#define CMU_OPCCR1_LPT16CKS_Msk (0x3UL << CMU_OPCCR1_LPT16CKS_Pos) +#define CMU_OPCCR1_LPT16CKS CMU_OPCCR1_LPT16CKS_Msk + +#define CMU_OPCCR1_LPT32CKS_Pos (8U) +#define CMU_OPCCR1_LPT32CKS_Msk (0x3UL << CMU_OPCCR1_LPT32CKS_Pos) +#define CMU_OPCCR1_LPT32CKS CMU_OPCCR1_LPT32CKS_Msk + +#define CMU_OPCCR1_ATCKS_Pos (7U) +#define CMU_OPCCR1_ATCKS_Msk (0x1UL << CMU_OPCCR1_ATCKS_Pos) +#define CMU_OPCCR1_ATCKS CMU_OPCCR1_ATCKS_Msk + +#define CMU_OPCCR1_CANCKS_Pos (4U) +#define CMU_OPCCR1_CANCKS_Msk (0x3UL << CMU_OPCCR1_CANCKS_Pos) +#define CMU_OPCCR1_CANCKS CMU_OPCCR1_CANCKS_Msk + +#define CMU_OPCCR1_UART1CKS_Pos (2U) +#define CMU_OPCCR1_UART1CKS_Msk (0x3UL << CMU_OPCCR1_UART1CKS_Pos) +#define CMU_OPCCR1_UART1CKS CMU_OPCCR1_UART1CKS_Msk + +#define CMU_OPCCR1_UART0CKS_Pos (0U) +#define CMU_OPCCR1_UART0CKS_Msk (0x3UL << CMU_OPCCR1_UART0CKS_Pos) +#define CMU_OPCCR1_UART0CKS CMU_OPCCR1_UART0CKS_Msk + +#define CMU_OPCCR2_RNGPRSC_Pos (10Ul) +#define CMU_OPCCR2_RNGPRSC_Msk (0x7UL << CMU_OPCCR2_RNGPRSC_Pos) +#define CMU_OPCCR2_RNGPRSC CMU_OPCCR2_RNGPRSC_Msk + +#define CMU_OPCCR2_ADCPRSC_Pos (2U) +#define CMU_OPCCR2_ADCPRSC_Msk (0x7UL << CMU_OPCCR2_ADCPRSC_Pos) +#define CMU_OPCCR2_ADCPRSC CMU_OPCCR2_ADCPRSC_Msk + +#define CMU_OPCCR2_ADCCKS_Pos (0U) +#define CMU_OPCCR2_ADCCKS_Msk (0x3UL << CMU_OPCCR2_ADCCKS_Pos) +#define CMU_OPCCR2_ADCCKS CMU_OPCCR2_ADCCKS_Msk + +#define CMU_CCCR_CCLIE_Pos (1U) +#define CMU_CCCR_CCLIE_Msk (0x1UL << CMU_CCCR_CCLIE_Pos) +#define CMU_CCCR_CCLIE CMU_CCCR_CCLIE_Msk + +#define CMU_CCCR_EN_Pos (0U) +#define CMU_CCCR_EN_Msk (0x1UL << CMU_CCCR_EN_Pos) +#define CMU_CCCR_EN CMU_CCCR_EN_Msk + +#define CMU_CCFR_CALPSC_Pos (10U) +#define CMU_CCFR_CALPSC_Msk (0x3UL << CMU_CCFR_CALPSC_Pos) +#define CMU_CCFR_CALPSC CMU_CCFR_CALPSC_Msk + +#define CMU_CCFR_REFPSC_Pos (8U) +#define CMU_CCFR_REFPSC_Msk (0x3UL << CMU_CCFR_REFPSC_Pos) +#define CMU_CCFR_REFPSC CMU_CCFR_REFPSC_Msk + +#define CMU_CCFR_CALSEL_Pos (1U) +#define CMU_CCFR_CALSEL_Msk (0x3UL << CMU_CCFR_CALSEL_Pos) +#define CMU_CCFR_CALSEL CMU_CCFR_CALSEL_Msk + +#define CMU_CCFR_REFSEL_Pos (0U) +#define CMU_CCFR_REFSEL_Msk (0x1UL << CMU_CCFR_REFSEL_Pos) +#define CMU_CCFR_REFSEL CMU_CCFR_REFSEL_Msk + +#define CMU_CCNR_CCNT_Pos (0U) +#define CMU_CCNR_CCNT_Msk (0xffffUL << CMU_CCNR_CCNT_Pos) +#define CMU_CCNR_CCNT CMU_CCNR_CCNT_Msk + +#define CMU_CCISR_CCLIF_Pos (0U) +#define CMU_CCISR_CCLIF_Msk (0x1UL << CMU_CCISR_CCLIF_Pos) +#define CMU_CCISR_CCLIF CMU_CCISR_CCLIF_Msk + + + +#define FL_CMU_GROUP1_BUSCLK_LPTIM32 (0x1UL << 0U) +#define FL_CMU_GROUP1_BUSCLK_LPTIM16 (0x1UL << 1U) +#define FL_CMU_GROUP1_BUSCLK_RTCA (0x1UL << 2U) +#define FL_CMU_GROUP1_BUSCLK_PMU (0x1UL << 3U) +#define FL_CMU_GROUP1_BUSCLK_SCU (0x1UL << 4U) +#define FL_CMU_GROUP1_BUSCLK_IWDT (0x1UL << 5U) +#define FL_CMU_GROUP1_BUSCLK_ANAC (0x1UL << 6U) +#define FL_CMU_GROUP1_BUSCLK_PAD (0x1UL << 7U) +#define FL_CMU_GROUP1_BUSCLK_SVD (0x1UL << 8U) +#define FL_CMU_GROUP1_BUSCLK_COMP (0x1UL << 9U) +#define FL_CMU_GROUP1_BUSCLK_ATT (0x1UL << 10U) +#define FL_CMU_GROUP1_BUSCLK_VREF1P2 (0x1UL << 12U) +#define FL_CMU_GROUP2_BUSCLK_CRC (0x1UL << 0U) +#define FL_CMU_GROUP2_BUSCLK_RNG (0x1UL << 1U) +#define FL_CMU_GROUP2_BUSCLK_AES (0x1UL << 2U) +#define FL_CMU_GROUP2_BUSCLK_LCD (0x1UL << 3U) +#define FL_CMU_GROUP2_BUSCLK_DMA (0x1UL << 4U) +#define FL_CMU_GROUP2_BUSCLK_FLASH (0x1UL << 5U) +#define FL_CMU_GROUP2_BUSCLK_RAMBIST (0x1UL << 6U) +#define FL_CMU_GROUP2_BUSCLK_WWDT (0x1UL << 7U) +#define FL_CMU_GROUP2_BUSCLK_ADC (0x1UL << 8U) +#define FL_CMU_GROUP2_BUSCLK_DIVAS (0x1UL << 9U) +#define FL_CMU_GROUP2_BUSCLK_DAC (0x1UL << 10U) +#define FL_CMU_GROUP3_BUSCLK_SPI0 (0x1UL << 0U) +#define FL_CMU_GROUP3_BUSCLK_SPI1 (0x1UL << 1U) +#define FL_CMU_GROUP3_BUSCLK_SPI2 (0x1UL << 2U) +#define FL_CMU_GROUP3_BUSCLK_UART0 (0x1UL << 8U) +#define FL_CMU_GROUP3_BUSCLK_UART1 (0x1UL << 9U) +#define FL_CMU_GROUP3_BUSCLK_UART3 (0x1UL << 11U) +#define FL_CMU_GROUP3_BUSCLK_UART4 (0x1UL << 12U) +#define FL_CMU_GROUP3_BUSCLK_UART5 (0x1UL << 13U) +#define FL_CMU_GROUP3_BUSCLK_UARTIR (0x1UL << 14U) +#define FL_CMU_GROUP3_BUSCLK_LPUART0 (0x1UL << 16U) +#define FL_CMU_GROUP3_BUSCLK_LPUART1 (0x1UL << 17U) +#define FL_CMU_GROUP3_BUSCLK_LPUART2 (0x1UL << 18U) +#define FL_CMU_GROUP3_BUSCLK_CAN (0x1Ul << 19U) +#define FL_CMU_GROUP3_BUSCLK_I2C (0x1Ul << 24U) +#define FL_CMU_GROUP4_BUSCLK_BSTIM32 (0x1Ul << 0U) +#define FL_CMU_GROUP4_BUSCLK_GPTIM0 (0x1Ul << 1U) +#define FL_CMU_GROUP4_BUSCLK_GPTIM1 (0x1Ul << 2U) +#define FL_CMU_GROUP4_BUSCLK_GPTIM2 (0x1Ul << 3U) +#define FL_CMU_GROUP4_BUSCLK_ATIM (0x1Ul << 4U) +#define FL_CMU_GROUP4_BUSCLK_BSTIM16 (0x1Ul << 8U) +#define FL_CMU_GROUP3_OPCLK_EXTI (0x1Ul << 31U) +#define FL_CMU_GROUP3_OPCLK_FLASH (0x1Ul << 30U) +#define FL_CMU_GROUP3_OPCLK_LPUART1 (0x1Ul << 29U) +#define FL_CMU_GROUP3_OPCLK_LPUART0 (0x1Ul << 28U) +#define FL_CMU_GROUP3_OPCLK_RNG (0x1Ul << 24U) +#define FL_CMU_GROUP3_OPCLK_LPUART2 (0x1Ul << 21U) +#define FL_CMU_GROUP3_OPCLK_I2C (0x1Ul << 20U) +#define FL_CMU_GROUP3_OPCLK_ADC (0x1Ul << 16U) +#define FL_CMU_GROUP3_OPCLK_ATIM (0x1Ul << 15U) +#define FL_CMU_GROUP3_OPCLK_CAN (0x1Ul << 14U) +#define FL_CMU_GROUP3_OPCLK_UART1 (0x1Ul << 9U) +#define FL_CMU_GROUP3_OPCLK_UART0 (0x1Ul << 8U) +#define FL_CMU_GROUP3_OPCLK_BSTIM16 (0x1Ul << 3U) +#define FL_CMU_GROUP3_OPCLK_BSTIM32 (0x1Ul << 2U) +#define FL_CMU_GROUP3_OPCLK_LPTIM16 (0x1Ul << 1U) +#define FL_CMU_GROUP3_OPCLK_LPTIM32 (0x1Ul << 0U) + + + +#define FL_CMU_APBCLK_PSC_DIV1 (0x0UL << CMU_SYSCLKCR_APBPRES_Pos) +#define FL_CMU_APBCLK_PSC_DIV2 (0x4UL << CMU_SYSCLKCR_APBPRES_Pos) +#define FL_CMU_APBCLK_PSC_DIV4 (0x5UL << CMU_SYSCLKCR_APBPRES_Pos) +#define FL_CMU_APBCLK_PSC_DIV8 (0x6UL << CMU_SYSCLKCR_APBPRES_Pos) +#define FL_CMU_APBCLK_PSC_DIV16 (0x7UL << CMU_SYSCLKCR_APBPRES_Pos) + + +#define FL_CMU_AHBCLK_PSC_DIV1 (0x0Ul << CMU_SYSCLKCR_AHBPRES_Pos) +#define FL_CMU_AHBCLK_PSC_DIV2 (0x4Ul << CMU_SYSCLKCR_AHBPRES_Pos) +#define FL_CMU_AHBCLK_PSC_DIV4 (0x5Ul << CMU_SYSCLKCR_AHBPRES_Pos) +#define FL_CMU_AHBCLK_PSC_DIV8 (0x6Ul << CMU_SYSCLKCR_AHBPRES_Pos) +#define FL_CMU_AHBCLK_PSC_DIV16 (0x7Ul << CMU_SYSCLKCR_AHBPRES_Pos) + + +#define FL_CMU_SYSTICK_CLK_SOURCE_SCLK (0x0UL << CMU_SYSCLKCR_STCLKSEL_Pos) +#define FL_CMU_SYSTICK_CLK_SOURCE_LSCLK (0x1UL << CMU_SYSCLKCR_STCLKSEL_Pos) +#define FL_CMU_SYSTICK_CLK_SOURCE_RCLF (0x2UL << CMU_SYSCLKCR_STCLKSEL_Pos) +#define FL_CMU_SYSTICK_CLK_SOURCE_SYSCLK (0x3UL << CMU_SYSCLKCR_STCLKSEL_Pos) + + +#define FL_CMU_SYSTEM_CLK_SOURCE_RCHF (0x0Ul << CMU_SYSCLKCR_SYSCLKSEL_Pos) +#define FL_CMU_SYSTEM_CLK_SOURCE_XTHF (0x1Ul << CMU_SYSCLKCR_SYSCLKSEL_Pos) +#define FL_CMU_SYSTEM_CLK_SOURCE_PLL (0x2Ul << CMU_SYSCLKCR_SYSCLKSEL_Pos) +#define FL_CMU_SYSTEM_CLK_SOURCE_RCLF (0x4Ul << CMU_SYSCLKCR_SYSCLKSEL_Pos) +#define FL_CMU_SYSTEM_CLK_SOURCE_XTLF (0x5Ul << CMU_SYSCLKCR_SYSCLKSEL_Pos) +#define FL_CMU_SYSTEM_CLK_SOURCE_RCLP (0x6Ul << CMU_SYSCLKCR_SYSCLKSEL_Pos) + + +#define FL_CMU_RCHF_FREQUENCY_8MHZ (0x0Ul << CMU_RCHFCR_FSEL_Pos) +#define FL_CMU_RCHF_FREQUENCY_16MHZ (0x1Ul << CMU_RCHFCR_FSEL_Pos) +#define FL_CMU_RCHF_FREQUENCY_24MHZ (0x2Ul << CMU_RCHFCR_FSEL_Pos) +#define FL_CMU_RCHF_FREQUENCY_32MHZ (0x3Ul << CMU_RCHFCR_FSEL_Pos) + + +#define FL_CMU_PLL_CLK_SOURCE_RCHF (0x0Ul << CMU_PLLCR_INSEL_Pos) +#define FL_CMU_PLL_CLK_SOURCE_XTHF (0x1Ul << CMU_PLLCR_INSEL_Pos) + + +#define FL_CMU_PLL_PSC_DIV1 (0x0Ul << CMU_PLLCR_REFPRSC_Pos) +#define FL_CMU_PLL_PSC_DIV2 (0x1Ul << CMU_PLLCR_REFPRSC_Pos) +#define FL_CMU_PLL_PSC_DIV4 (0x2Ul << CMU_PLLCR_REFPRSC_Pos) +#define FL_CMU_PLL_PSC_DIV8 (0x3Ul << CMU_PLLCR_REFPRSC_Pos) +#define FL_CMU_PLL_PSC_DIV12 (0x4Ul << CMU_PLLCR_REFPRSC_Pos) +#define FL_CMU_PLL_PSC_DIV16 (0x5Ul << CMU_PLLCR_REFPRSC_Pos) +#define FL_CMU_PLL_PSC_DIV24 (0x6Ul << CMU_PLLCR_REFPRSC_Pos) +#define FL_CMU_PLL_PSC_DIV32 (0x7Ul << CMU_PLLCR_REFPRSC_Pos) + + +#define FL_CMU_PLL_OUTPUT_X1 (0x0Ul << CMU_PLLCR_OSEL_Pos) +#define FL_CMU_PLL_OUTPUT_X2 (0x1Ul << CMU_PLLCR_OSEL_Pos) + + +#define FL_CMU_LSCLK_CLK_SOURCE_RCLP (0x55U << CMU_LSCLKSEL_SEL_Pos) +#define FL_CMU_LSCLK_CLK_SOURCE_XTLF (0xAAU << CMU_LSCLKSEL_SEL_Pos) + +#define FL_CMU_RCLF_PSC_DIV1 (0x0Ul << CMU_RCLFCR_PSC_Pos) +#define FL_CMU_RCLF_PSC_DIV4 (0x1Ul << CMU_RCLFCR_PSC_Pos) +#define FL_CMU_RCLF_PSC_DIV8 (0x2Ul << CMU_RCLFCR_PSC_Pos) +#define FL_CMU_RCLF_PSC_DIV16 (0x3Ul << CMU_RCLFCR_PSC_Pos) + + +#define FL_CMU_EXTI_CLK_SOURCE_LSCLK (0x1Ul << CMU_OPCCR1_EXTICKS_Pos) +#define FL_CMU_EXTI_CLK_SOURCE_HCLK (0x0Ul << CMU_OPCCR1_EXTICKS_Pos) + + +#define FL_CMU_LPUART1_CLK_SOURCE_LSCLK (0x0Ul << CMU_OPCCR1_LPUART1CKS_Pos) +#define FL_CMU_LPUART1_CLK_SOURCE_RCHF (0x1Ul << CMU_OPCCR1_LPUART1CKS_Pos) +#define FL_CMU_LPUART1_CLK_SOURCE_RCLF (0x2Ul << CMU_OPCCR1_LPUART1CKS_Pos) + + +#define FL_CMU_LPUART0_CLK_SOURCE_LSCLK (0x0Ul << CMU_OPCCR1_LPUART0CKS_Pos) +#define FL_CMU_LPUART0_CLK_SOURCE_RCHF (0x1Ul << CMU_OPCCR1_LPUART0CKS_Pos) +#define FL_CMU_LPUART0_CLK_SOURCE_RCLF (0x2Ul << CMU_OPCCR1_LPUART0CKS_Pos) + + +#define FL_CMU_LPUART2_CLK_SOURCE_LSCLK (0x0Ul << CMU_OPCCR1_LPUART2CKS_Pos) +#define FL_CMU_LPUART2_CLK_SOURCE_RCHF (0x1Ul << CMU_OPCCR1_LPUART2CKS_Pos) +#define FL_CMU_LPUART2_CLK_SOURCE_RCLF (0x2Ul << CMU_OPCCR1_LPUART2CKS_Pos) + +#define FL_CMU_LPUART_CLK_SOURCE_LSCLK (0x0Ul) +#define FL_CMU_LPUART_CLK_SOURCE_RCHF (0x1Ul) +#define FL_CMU_LPUART_CLK_SOURCE_RCLF (0x2Ul) + + +#define FL_CMU_I2C_CLK_SOURCE_APBCLK (0x0UL << CMU_OPCCR1_I2CCKS_Pos) +#define FL_CMU_I2C_CLK_SOURCE_RCHF (0x1UL << CMU_OPCCR1_I2CCKS_Pos) +#define FL_CMU_I2C_CLK_SOURCE_SYSCLK (0x2UL << CMU_OPCCR1_I2CCKS_Pos) +#define FL_CMU_I2C_CLK_SOURCE_RCLF (0x3UL << CMU_OPCCR1_I2CCKS_Pos) + + +#define FL_CMU_BSTIM16_CLK_SOURCE_APBCLK (0x0Ul << CMU_OPCCR1_BT16CKS_Pos) +#define FL_CMU_BSTIM16_CLK_SOURCE_LSCLK (0x1Ul << CMU_OPCCR1_BT16CKS_Pos) +#define FL_CMU_BSTIM16_CLK_SOURCE_RCLP (0x2Ul << CMU_OPCCR1_BT16CKS_Pos) +#define FL_CMU_BSTIM16_CLK_SOURCE_RCLF (0x3Ul << CMU_OPCCR1_BT16CKS_Pos) + + +#define FL_CMU_BSTIM32_CLK_SOURCE_APBCLK (0x0Ul << CMU_OPCCR1_BT32CKS_Pos) +#define FL_CMU_BSTIM32_CLK_SOURCE_LSCLK (0x1Ul << CMU_OPCCR1_BT32CKS_Pos) +#define FL_CMU_BSTIM32_CLK_SOURCE_RCLP (0x2Ul << CMU_OPCCR1_BT32CKS_Pos) +#define FL_CMU_BSTIM32_CLK_SOURCE_RCLF (0x3Ul << CMU_OPCCR1_BT32CKS_Pos) + + +#define FL_CMU_LPTIM16_CLK_SOURCE_APBCLK (0x0Ul << CMU_OPCCR1_LPT16CKS_Pos) +#define FL_CMU_LPTIM16_CLK_SOURCE_LSCLK (0x1Ul << CMU_OPCCR1_LPT16CKS_Pos) +#define FL_CMU_LPTIM16_CLK_SOURCE_RCLP (0x2Ul << CMU_OPCCR1_LPT16CKS_Pos) +#define FL_CMU_LPTIM16_CLK_SOURCE_RCLF (0x3Ul << CMU_OPCCR1_LPT16CKS_Pos) + + +#define FL_CMU_LPTIM32_CLK_SOURCE_APBCLK (0x0Ul << CMU_OPCCR1_LPT32CKS_Pos) +#define FL_CMU_LPTIM32_CLK_SOURCE_LSCLK (0x1Ul << CMU_OPCCR1_LPT32CKS_Pos) +#define FL_CMU_LPTIM32_CLK_SOURCE_RCLP (0x2Ul << CMU_OPCCR1_LPT32CKS_Pos) +#define FL_CMU_LPTIM32_CLK_SOURCE_RCLF (0x3Ul << CMU_OPCCR1_LPT32CKS_Pos) + + +#define FL_CMU_ATIM_CLK_SOURCE_APBCLK (0x0Ul << CMU_OPCCR1_ATCKS_Pos) +#define FL_CMU_ATIM_CLK_SOURCE_PLL_X2 (0x1Ul << CMU_OPCCR1_ATCKS_Pos) + + +#define FL_CMU_CAN_CLK_SOURCE_RCHF (0x0Ul << CMU_OPCCR1_CANCKS_Pos) +#define FL_CMU_CAN_CLK_SOURCE_XTHF (0x1Ul << CMU_OPCCR1_CANCKS_Pos) +#define FL_CMU_CAN_CLK_SOURCE_PLL (0x2Ul << CMU_OPCCR1_CANCKS_Pos) +#define FL_CMU_CAN_CLK_SOURCE_APBCLK (0x3Ul << CMU_OPCCR1_CANCKS_Pos) + + +#define FL_CMU_UART1_CLK_SOURCE_APBCLK (0x0Ul << CMU_OPCCR1_UART1CKS_Pos) +#define FL_CMU_UART1_CLK_SOURCE_RCHF (0x1Ul << CMU_OPCCR1_UART1CKS_Pos) +#define FL_CMU_UART1_CLK_SOURCE_SYSCLK (0x2Ul << CMU_OPCCR1_UART1CKS_Pos) +#define FL_CMU_UART1_CLK_SOURCE_XTHF (0x3Ul << CMU_OPCCR1_UART1CKS_Pos) + + +#define FL_CMU_UART0_CLK_SOURCE_APBCLK (0x0Ul << CMU_OPCCR1_UART0CKS_Pos) +#define FL_CMU_UART0_CLK_SOURCE_RCHF (0x1Ul << CMU_OPCCR1_UART0CKS_Pos) +#define FL_CMU_UART0_CLK_SOURCE_SYSCLK (0x2Ul << CMU_OPCCR1_UART0CKS_Pos) +#define FL_CMU_UART0_CLK_SOURCE_XTHF (0x3Ul << CMU_OPCCR1_UART0CKS_Pos) + + +#define FL_CMU_RNG_PSC_DIV1 (0x0Ul << CMU_OPCCR2_RNGPRSC_Pos) +#define FL_CMU_RNG_PSC_DIV2 (0x1Ul << CMU_OPCCR2_RNGPRSC_Pos) +#define FL_CMU_RNG_PSC_DIV4 (0x2Ul << CMU_OPCCR2_RNGPRSC_Pos) +#define FL_CMU_RNG_PSC_DIV8 (0x3Ul << CMU_OPCCR2_RNGPRSC_Pos) +#define FL_CMU_RNG_PSC_DIV16 (0x4Ul << CMU_OPCCR2_RNGPRSC_Pos) +#define FL_CMU_RNG_PSC_DIV32 (0x5Ul << CMU_OPCCR2_RNGPRSC_Pos) + + +#define FL_CMU_ADC_PSC_DIV1 (0x0Ul << CMU_OPCCR2_ADCPRSC_Pos) +#define FL_CMU_ADC_PSC_DIV2 (0x1Ul << CMU_OPCCR2_ADCPRSC_Pos) +#define FL_CMU_ADC_PSC_DIV4 (0x2Ul << CMU_OPCCR2_ADCPRSC_Pos) +#define FL_CMU_ADC_PSC_DIV8 (0x3Ul << CMU_OPCCR2_ADCPRSC_Pos) +#define FL_CMU_ADC_PSC_DIV16 (0x4Ul << CMU_OPCCR2_ADCPRSC_Pos) +#define FL_CMU_ADC_PSC_DIV32 (0x5Ul << CMU_OPCCR2_ADCPRSC_Pos) + + +#define FL_CMU_ADC_CLK_SOURCE_RCLF (0x0Ul << CMU_OPCCR2_ADCCKS_Pos) +#define FL_CMU_ADC_CLK_SOURCE_RCHF (0x1Ul << CMU_OPCCR2_ADCCKS_Pos) +#define FL_CMU_ADC_CLK_SOURCE_XTHF (0x2Ul << CMU_OPCCR2_ADCCKS_Pos) +#define FL_CMU_ADC_CLK_SOURCE_PLL (0x3Ul << CMU_OPCCR2_ADCCKS_Pos) + + +#define FL_CMU_CCL_CALCLK_PSC_DIV1 (0x0Ul << CMU_CCFR_CALPSC_Pos) +#define FL_CMU_CCL_CALCLK_PSC_DIV2 (0x1Ul << CMU_CCFR_CALPSC_Pos) +#define FL_CMU_CCL_CALCLK_PSC_DIV4 (0x2Ul << CMU_CCFR_CALPSC_Pos) +#define FL_CMU_CCL_CALCLK_PSC_DIV8 (0x3Ul << CMU_CCFR_CALPSC_Pos) + + +#define FL_CMU_CCL_REFCLK_PSC_DIV8 (0x0Ul << CMU_CCFR_REFPSC_Pos) +#define FL_CMU_CCL_REFCLK_PSC_DIV16 (0x1Ul << CMU_CCFR_REFPSC_Pos) +#define FL_CMU_CCL_REFCLK_PSC_DIV32 (0x2Ul << CMU_CCFR_REFPSC_Pos) +#define FL_CMU_CCL_REFCLK_PSC_DIV64 (0x3Ul << CMU_CCFR_REFPSC_Pos) + + +#define FL_CMU_CCL_CALCLK_SOURCE_RCHF (0x1Ul << CMU_CCFR_CALSEL_Pos) +#define FL_CMU_CCL_CALCLK_SOURCE_RCLF (0x2Ul << CMU_CCFR_CALSEL_Pos) +#define FL_CMU_CCL_CALCLK_SOURCE_XTHF (0x3Ul << CMU_CCFR_CALSEL_Pos) + + +#define FL_CMU_CCL_REFCLK_SOURCE_XTLF (0x0Ul << CMU_CCFR_REFSEL_Pos) +#define FL_CMU_CCL_REFCLK_SOURCE_RCLP (0x1Ul << CMU_CCFR_REFSEL_Pos) + + +/** + * @} + */ +/* Exported functions ---------------------------------------------------------------------------------*/ +/** @defgroup CMU_FL_Exported_Functions CMU Exported Functions + * @{ + */ + +/** + * @brief Enable XTHF Fail Interrupt + * @rmtoll IER HFDET_IE FL_CMU_EnableIT_XTHFFail + * @retval None + */ +__STATIC_INLINE void FL_CMU_EnableIT_XTHFFail(void) +{ + SET_BIT(CMU->IER, CMU_IER_HFDET_IE_Msk); +} + +/** + * @brief Get XTHF Fail Interrupt Enable Status + * @rmtoll IER HFDET_IE FL_CMU_IsEnabledIT_XTHFFail + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CMU_IsEnabledIT_XTHFFail(void) +{ + return (uint32_t)(READ_BIT(CMU->IER, CMU_IER_HFDET_IE_Msk) == CMU_IER_HFDET_IE_Msk); +} + +/** + * @brief Disable XTHF Fail Interrupt + * @rmtoll IER HFDET_IE FL_CMU_DisableIT_XTHFFail + * @retval None + */ +__STATIC_INLINE void FL_CMU_DisableIT_XTHFFail(void) +{ + CLEAR_BIT(CMU->IER, CMU_IER_HFDET_IE_Msk); +} + +/** + * @brief Get XTHF Vibrating Output + * @rmtoll ISR HFDETO FL_CMU_IsActiveFlag_XTHFFailOutput + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CMU_IsActiveFlag_XTHFFailOutput(void) +{ + return (uint32_t)(READ_BIT(CMU->ISR, CMU_ISR_HFDETO_Msk) == (CMU_ISR_HFDETO_Msk)); +} + +/** + * @brief Get XTHF Vibrating Flag + * @rmtoll ISR HFDET_IF FL_CMU_IsActiveFlag_XTHFFail + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CMU_IsActiveFlag_XTHFFail(void) +{ + return (uint32_t)(READ_BIT(CMU->ISR, CMU_ISR_HFDET_IF_Msk) == (CMU_ISR_HFDET_IF_Msk)); +} + +/** + * @brief Clear XTHF Vibrating Flag + * @rmtoll ISR HFDET_IF FL_CMU_ClearFlag_XTHFFail + * @retval None + */ +__STATIC_INLINE void FL_CMU_ClearFlag_XTHFFail(void) +{ + WRITE_REG(CMU->ISR, CMU_ISR_HFDET_IF_Msk); +} + +/** + * @brief Enable SYSCLK select Fail Interrupt + * @rmtoll IER SYSCES_IE FL_CMU_EnableIT_SYSCLKSELError + * @retval None + */ +__STATIC_INLINE void FL_CMU_EnableIT_SYSCLKSELError(void) +{ + SET_BIT(CMU->IER, CMU_IER_SYSCES_IE_Msk); +} + +/** + * @brief Get SYSCLK select Fail Interrupt Enable Status + * @rmtoll IER SYSCES_IE FL_CMU_IsEnabledIT_SYSCLKSELError + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CMU_IsEnabledIT_SYSCLKSELError(void) +{ + return (uint32_t)(READ_BIT(CMU->IER, CMU_IER_SYSCES_IE_Msk) == CMU_IER_SYSCES_IE_Msk); +} + +/** + * @brief Disable SYSCLK select Fail Interrupt + * @rmtoll IER SYSCES_IE FL_CMU_DisableIT_SYSCLKSELError + * @retval None + */ +__STATIC_INLINE void FL_CMU_DisableIT_SYSCLKSELError(void) +{ + CLEAR_BIT(CMU->IER, CMU_IER_SYSCES_IE_Msk); +} + +/** + * @brief Get SYSCLK select Vibrating Flag + * @rmtoll ISR SYSCES_IF FL_CMU_IsActiveFlag_SYSCLKSELError + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CMU_IsActiveFlag_SYSCLKSELError(void) +{ + return (uint32_t)(READ_BIT(CMU->ISR, CMU_ISR_SYSCES_IF_Msk) == (CMU_ISR_SYSCES_IF_Msk)); +} + +/** + * @brief Clear SYSCLK select Vibrating Flag + * @rmtoll ISR SYSCES_IF FL_CMU_ClearFlag_SYSCLKSELError + * @retval None + */ +__STATIC_INLINE void FL_CMU_ClearFlag_SYSCLKSELError(void) +{ + WRITE_REG(CMU->ISR, CMU_ISR_SYSCES_IF_Msk); +} + +/** + * @brief Enable LSCLK Auto Switch + * @rmtoll SYSCLKCR LSCATS FL_CMU_EnableLSCLKAutoSwitch + * @retval None + */ +__STATIC_INLINE void FL_CMU_EnableLSCLKAutoSwitch(void) +{ + SET_BIT(CMU->SYSCLKCR, CMU_SYSCLKCR_LSCATS_Msk); +} + +/** + * @brief Get LSCLK Auto Switch Enable Status + * @rmtoll SYSCLKCR LSCATS FL_CMU_IsEnabledLSCLKAutoSwitch + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CMU_IsEnabledLSCLKAutoSwitch(void) +{ + return (uint32_t)(READ_BIT(CMU->SYSCLKCR, CMU_SYSCLKCR_LSCATS_Msk) == CMU_SYSCLKCR_LSCATS_Msk); +} + +/** + * @brief Disable LSCLK Auto Switch + * @rmtoll SYSCLKCR LSCATS FL_CMU_DisableLSCLKAutoSwitch + * @retval None + */ +__STATIC_INLINE void FL_CMU_DisableLSCLKAutoSwitch(void) +{ + CLEAR_BIT(CMU->SYSCLKCR, CMU_SYSCLKCR_LSCATS_Msk); +} + +/** + * @brief Enable Sleep/DeepSleep Mode External Interrupt + * @rmtoll SYSCLKCR SLP_ENEXTI FL_CMU_EnableEXTIOnSleep + * @retval None + */ +__STATIC_INLINE void FL_CMU_EnableEXTIOnSleep(void) +{ + SET_BIT(CMU->SYSCLKCR, CMU_SYSCLKCR_SLP_ENEXTI_Msk); +} + +/** + * @brief Get Sleep/DeepSleep Mode External Interrupt Enable Status + * @rmtoll SYSCLKCR SLP_ENEXTI FL_CMU_IsEnabledEXTIOnSleep + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CMU_IsEnabledEXTIOnSleep(void) +{ + return (uint32_t)(READ_BIT(CMU->SYSCLKCR, CMU_SYSCLKCR_SLP_ENEXTI_Msk) == CMU_SYSCLKCR_SLP_ENEXTI_Msk); +} + +/** + * @brief Disable Sleep/DeepSleep Mode External Interrupt + * @rmtoll SYSCLKCR SLP_ENEXTI FL_CMU_DisableEXTIOnSleep + * @retval None + */ +__STATIC_INLINE void FL_CMU_DisableEXTIOnSleep(void) +{ + CLEAR_BIT(CMU->SYSCLKCR, CMU_SYSCLKCR_SLP_ENEXTI_Msk); +} + +/** + * @brief Set APB Prescaler + * @rmtoll SYSCLKCR APBPRES FL_CMU_SetAPBPrescaler + * @param prescaler This parameter can be one of the following values: + * @arg @ref FL_CMU_APBCLK_PSC_DIV1 + * @arg @ref FL_CMU_APBCLK_PSC_DIV2 + * @arg @ref FL_CMU_APBCLK_PSC_DIV4 + * @arg @ref FL_CMU_APBCLK_PSC_DIV8 + * @arg @ref FL_CMU_APBCLK_PSC_DIV16 + * @retval None + */ +__STATIC_INLINE void FL_CMU_SetAPBPrescaler(uint32_t prescaler) +{ + MODIFY_REG(CMU->SYSCLKCR, CMU_SYSCLKCR_APBPRES_Msk, prescaler); +} + +/** + * @brief Get APB Prescaler + * @rmtoll SYSCLKCR APBPRES FL_CMU_GetAPBPrescaler + * @retval Returned value can be one of the following values: + * @arg @ref FL_CMU_APBCLK_PSC_DIV1 + * @arg @ref FL_CMU_APBCLK_PSC_DIV2 + * @arg @ref FL_CMU_APBCLK_PSC_DIV4 + * @arg @ref FL_CMU_APBCLK_PSC_DIV8 + * @arg @ref FL_CMU_APBCLK_PSC_DIV16 + */ +__STATIC_INLINE uint32_t FL_CMU_GetAPBPrescaler(void) +{ + return (uint32_t)(READ_BIT(CMU->SYSCLKCR, CMU_SYSCLKCR_APBPRES_Msk)); +} + +/** + * @brief Set AHB Prescaler + * @rmtoll SYSCLKCR AHBPRES FL_CMU_SetAHBPrescaler + * @param prescaler This parameter can be one of the following values: + * @arg @ref FL_CMU_AHBCLK_PSC_DIV1 + * @arg @ref FL_CMU_AHBCLK_PSC_DIV2 + * @arg @ref FL_CMU_AHBCLK_PSC_DIV4 + * @arg @ref FL_CMU_AHBCLK_PSC_DIV8 + * @arg @ref FL_CMU_AHBCLK_PSC_DIV16 + * @retval None + */ +__STATIC_INLINE void FL_CMU_SetAHBPrescaler(uint32_t prescaler) +{ + MODIFY_REG(CMU->SYSCLKCR, CMU_SYSCLKCR_AHBPRES_Msk, prescaler); +} + +/** + * @brief Get AHB Prescaler + * @rmtoll SYSCLKCR AHBPRES FL_CMU_GetAHBPrescaler + * @retval Returned value can be one of the following values: + * @arg @ref FL_CMU_AHBCLK_PSC_DIV1 + * @arg @ref FL_CMU_AHBCLK_PSC_DIV2 + * @arg @ref FL_CMU_AHBCLK_PSC_DIV4 + * @arg @ref FL_CMU_AHBCLK_PSC_DIV8 + * @arg @ref FL_CMU_AHBCLK_PSC_DIV16 + */ +__STATIC_INLINE uint32_t FL_CMU_GetAHBPrescaler(void) +{ + return (uint32_t)(READ_BIT(CMU->SYSCLKCR, CMU_SYSCLKCR_AHBPRES_Msk)); +} + +/** + * @brief Set SysTick Clock Source + * @rmtoll SYSCLKCR STCLKSEL FL_CMU_SetSysTickClockSource + * @param clock This parameter can be one of the following values: + * @arg @ref FL_CMU_SYSTICK_CLK_SOURCE_SCLK + * @arg @ref FL_CMU_SYSTICK_CLK_SOURCE_LSCLK + * @arg @ref FL_CMU_SYSTICK_CLK_SOURCE_RCLF + * @arg @ref FL_CMU_SYSTICK_CLK_SOURCE_SYSCLK + * @retval None + */ +__STATIC_INLINE void FL_CMU_SetSysTickClockSource(uint32_t clock) +{ + MODIFY_REG(CMU->SYSCLKCR, CMU_SYSCLKCR_STCLKSEL_Msk, clock); +} + +/** + * @brief Get SysTick Clock Source + * @rmtoll SYSCLKCR STCLKSEL FL_CMU_GetSysTickClockSource + * @retval Returned value can be one of the following values: + * @arg @ref FL_CMU_SYSTICK_CLK_SOURCE_SCLK + * @arg @ref FL_CMU_SYSTICK_CLK_SOURCE_LSCLK + * @arg @ref FL_CMU_SYSTICK_CLK_SOURCE_RCLF + * @arg @ref FL_CMU_SYSTICK_CLK_SOURCE_SYSCLK + */ +__STATIC_INLINE uint32_t FL_CMU_GetSysTickClockSource(void) +{ + return (uint32_t)(READ_BIT(CMU->SYSCLKCR, CMU_SYSCLKCR_STCLKSEL_Msk)); +} + +/** + * @brief Set System Clock Source + * @rmtoll SYSCLKCR SYSCLKSEL FL_CMU_SetSystemClockSource + * @param clock This parameter can be one of the following values: + * @arg @ref FL_CMU_SYSTEM_CLK_SOURCE_RCHF + * @arg @ref FL_CMU_SYSTEM_CLK_SOURCE_XTHF + * @arg @ref FL_CMU_SYSTEM_CLK_SOURCE_PLL + * @arg @ref FL_CMU_SYSTEM_CLK_SOURCE_RCLF + * @arg @ref FL_CMU_SYSTEM_CLK_SOURCE_XTLF + * @arg @ref FL_CMU_SYSTEM_CLK_SOURCE_RCLP + * @retval None + */ +__STATIC_INLINE void FL_CMU_SetSystemClockSource(uint32_t clock) +{ + MODIFY_REG(CMU->SYSCLKCR, CMU_SYSCLKCR_SYSCLKSEL_Msk, clock); +} + +/** + * @brief Set System Clock Source Setting + * @rmtoll SYSCLKCR SYSCLKSEL FL_CMU_GetSystemClockSource + * @retval Returned value can be one of the following values: + * @arg @ref FL_CMU_SYSTEM_CLK_SOURCE_RCHF + * @arg @ref FL_CMU_SYSTEM_CLK_SOURCE_XTHF + * @arg @ref FL_CMU_SYSTEM_CLK_SOURCE_PLL + * @arg @ref FL_CMU_SYSTEM_CLK_SOURCE_RCLF + * @arg @ref FL_CMU_SYSTEM_CLK_SOURCE_XTLF + * @arg @ref FL_CMU_SYSTEM_CLK_SOURCE_RCLP + */ +__STATIC_INLINE uint32_t FL_CMU_GetSystemClockSource(void) +{ + return (uint32_t)(READ_BIT(CMU->SYSCLKCR, CMU_SYSCLKCR_SYSCLKSEL_Msk)); +} + +/** + * @brief Set RCHF Frequency + * @rmtoll RCHFCR FSEL FL_CMU_RCHF_SetFrequency + * @param frequency This parameter can be one of the following values: + * @arg @ref FL_CMU_RCHF_FREQUENCY_8MHZ + * @arg @ref FL_CMU_RCHF_FREQUENCY_16MHZ + * @arg @ref FL_CMU_RCHF_FREQUENCY_24MHZ + * @arg @ref FL_CMU_RCHF_FREQUENCY_32MHZ + * @retval None + */ +__STATIC_INLINE void FL_CMU_RCHF_SetFrequency(uint32_t frequency) +{ + MODIFY_REG(CMU->RCHFCR, CMU_RCHFCR_FSEL_Msk, frequency); +} + +/** + * @brief Get RCHF Frequency Setting + * @rmtoll RCHFCR FSEL FL_CMU_RCHF_GetFrequency + * @retval Returned value can be one of the following values: + * @arg @ref FL_CMU_RCHF_FREQUENCY_8MHZ + * @arg @ref FL_CMU_RCHF_FREQUENCY_16MHZ + * @arg @ref FL_CMU_RCHF_FREQUENCY_24MHZ + * @arg @ref FL_CMU_RCHF_FREQUENCY_32MHZ + */ +__STATIC_INLINE uint32_t FL_CMU_RCHF_GetFrequency(void) +{ + return (uint32_t)(READ_BIT(CMU->RCHFCR, CMU_RCHFCR_FSEL_Msk)); +} + +/** + * @brief Enable RCHF + * @rmtoll RCHFCR EN FL_CMU_RCHF_Enable + * @retval None + */ +__STATIC_INLINE void FL_CMU_RCHF_Enable(void) +{ + SET_BIT(CMU->RCHFCR, CMU_RCHFCR_EN_Msk); +} + +/** + * @brief Get RCHF Enable Status + * @rmtoll RCHFCR EN FL_CMU_RCHF_IsEnabled + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CMU_RCHF_IsEnabled(void) +{ + return (uint32_t)(READ_BIT(CMU->RCHFCR, CMU_RCHFCR_EN_Msk) == CMU_RCHFCR_EN_Msk); +} + +/** + * @brief Disable RCHF + * @rmtoll RCHFCR EN FL_CMU_RCHF_Disable + * @retval None + */ +__STATIC_INLINE void FL_CMU_RCHF_Disable(void) +{ + CLEAR_BIT(CMU->RCHFCR, CMU_RCHFCR_EN_Msk); +} + +/** + * @brief Set RCHF Freqency Trim Value + * @rmtoll RCHFTR TRIM FL_CMU_RCHF_WriteTrimValue + * @param value TrimValue The value of RCHF trim + * @retval None + */ +__STATIC_INLINE void FL_CMU_RCHF_WriteTrimValue(uint32_t value) +{ + MODIFY_REG(CMU->RCHFTR, (0xffU << 0U), (value << 0U)); +} + +/** + * @brief Get RCHF Freqency Trim Value + * @rmtoll RCHFTR TRIM FL_CMU_RCHF_ReadTrimValue + * @retval The value of RCHF trim + */ +__STATIC_INLINE uint32_t FL_CMU_RCHF_ReadTrimValue(void) +{ + return (uint32_t)(READ_BIT(CMU->RCHFTR, (0xffU << 0U)) >> 0U); +} + +/** + * @brief Enable PLL + * @rmtoll PLLCR EN FL_CMU_PLL_Enable + * @retval None + */ +__STATIC_INLINE void FL_CMU_PLL_Enable(void) +{ + SET_BIT(CMU->PLLCR, CMU_PLLCR_EN_Msk); +} + +/** + * @brief Get PLL Enable Status + * @rmtoll PLLCR EN FL_CMU_PLL_Disable + * @retval None + */ +__STATIC_INLINE void FL_CMU_PLL_Disable(void) +{ + CLEAR_BIT(CMU->PLLCR, CMU_PLLCR_EN_Msk); +} + +/** + * @brief Disable PLL + * @rmtoll PLLCR EN FL_CMU_PLL_IsEnabled + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CMU_PLL_IsEnabled(void) +{ + return (uint32_t)(READ_BIT(CMU->PLLCR, CMU_PLLCR_EN_Msk) == CMU_PLLCR_EN_Msk); +} + +/** + * @brief Get PLL Ready Status + * @rmtoll PLLCR LOCKED FL_CMU_IsActiveFlag_PLLReady + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CMU_IsActiveFlag_PLLReady(void) +{ + return (uint32_t)(READ_BIT(CMU->PLLCR, CMU_PLLCR_LOCKED_Msk) == (CMU_PLLCR_LOCKED_Msk)); +} + +/** + * @brief Set PLL Input Source + * @rmtoll PLLCR INSEL FL_CMU_PLL_SetClockSource + * @param clock This parameter can be one of the following values: + * @arg @ref FL_CMU_PLL_CLK_SOURCE_RCHF + * @arg @ref FL_CMU_PLL_CLK_SOURCE_XTHF + * @retval None + */ +__STATIC_INLINE void FL_CMU_PLL_SetClockSource(uint32_t clock) +{ + MODIFY_REG(CMU->PLLCR, CMU_PLLCR_INSEL_Msk, clock); +} + +/** + * @brief Get PLL Input Source Setting + * @rmtoll PLLCR INSEL FL_CMU_PLL_GetClockSource + * @retval Returned value can be one of the following values: + * @arg @ref FL_CMU_PLL_CLK_SOURCE_RCHF + * @arg @ref FL_CMU_PLL_CLK_SOURCE_XTHF + */ +__STATIC_INLINE uint32_t FL_CMU_PLL_GetClockSource(void) +{ + return (uint32_t)(READ_BIT(CMU->PLLCR, CMU_PLLCR_INSEL_Msk)); +} + +/** + * @brief Set PLL Multiplier + * @rmtoll PLLCR DB FL_CMU_PLL_WriteMultiplier + * @param multiplier + * @retval None + */ +__STATIC_INLINE void FL_CMU_PLL_WriteMultiplier(uint32_t multiplier) +{ + MODIFY_REG(CMU->PLLCR, (0x7fUl << 16U), (multiplier << 16U)); +} + +/** + * @brief Get PLL Multiplier Setting + * @rmtoll PLLCR DB FL_CMU_PLL_ReadMultiplier + * @retval + */ +__STATIC_INLINE uint32_t FL_CMU_PLL_ReadMultiplier(void) +{ + return (uint32_t)(READ_BIT(CMU->PLLCR, (0x7fUl << 16U)) >> 16U); +} + +/** + * @brief Set PLL Prescaler + * @rmtoll PLLCR REFPRSC FL_CMU_PLL_SetPrescaler + * @param prescaler This parameter can be one of the following values: + * @arg @ref FL_CMU_PLL_PSC_DIV1 + * @arg @ref FL_CMU_PLL_PSC_DIV2 + * @arg @ref FL_CMU_PLL_PSC_DIV4 + * @arg @ref FL_CMU_PLL_PSC_DIV8 + * @arg @ref FL_CMU_PLL_PSC_DIV12 + * @arg @ref FL_CMU_PLL_PSC_DIV16 + * @arg @ref FL_CMU_PLL_PSC_DIV24 + * @arg @ref FL_CMU_PLL_PSC_DIV32 + * @retval None + */ +__STATIC_INLINE void FL_CMU_PLL_SetPrescaler(uint32_t prescaler) +{ + MODIFY_REG(CMU->PLLCR, CMU_PLLCR_REFPRSC_Msk, prescaler); +} + +/** + * @brief Get PLL Prescaler Setting + * @rmtoll PLLCR REFPRSC FL_CMU_PLL_GetPrescaler + * @retval Returned value can be one of the following values: + * @arg @ref FL_CMU_PLL_PSC_DIV1 + * @arg @ref FL_CMU_PLL_PSC_DIV2 + * @arg @ref FL_CMU_PLL_PSC_DIV4 + * @arg @ref FL_CMU_PLL_PSC_DIV8 + * @arg @ref FL_CMU_PLL_PSC_DIV12 + * @arg @ref FL_CMU_PLL_PSC_DIV16 + * @arg @ref FL_CMU_PLL_PSC_DIV24 + * @arg @ref FL_CMU_PLL_PSC_DIV32 + */ +__STATIC_INLINE uint32_t FL_CMU_PLL_GetPrescaler(void) +{ + return (uint32_t)(READ_BIT(CMU->PLLCR, CMU_PLLCR_REFPRSC_Msk)); +} + +/** + * @brief Set PLL Digital Domain Output + * @rmtoll PLLCR OSEL FL_CMU_PLL_SetOutputMultiplier + * @param multiplier This parameter can be one of the following values: + * @arg @ref FL_CMU_PLL_OUTPUT_X1 + * @arg @ref FL_CMU_PLL_OUTPUT_X2 + * @retval None + */ +__STATIC_INLINE void FL_CMU_PLL_SetOutputMultiplier(uint32_t multiplier) +{ + MODIFY_REG(CMU->PLLCR, CMU_PLLCR_OSEL_Msk, multiplier); +} + +/** + * @brief Get PLL Digital Domain Output Setting + * @rmtoll PLLCR OSEL FL_CMU_PLL_GetOutputMultiplier + * @retval Returned value can be one of the following values: + * @arg @ref FL_CMU_PLL_OUTPUT_X1 + * @arg @ref FL_CMU_PLL_OUTPUT_X2 + */ +__STATIC_INLINE uint32_t FL_CMU_PLL_GetOutputMultiplier(void) +{ + return (uint32_t)(READ_BIT(CMU->PLLCR, CMU_PLLCR_OSEL_Msk)); /*PRQA S 3469 */ +} + +/** + * @brief Set RCLP Enable + * @rmtoll RCLPCR ENB FL_CMU_RCLP_Enable + * @retval None + */ +__STATIC_INLINE void FL_CMU_RCLP_Enable(void) +{ + CLEAR_BIT(CMU->RCLPCR, CMU_RCLPCR_ENB_Msk); +} + +/** + * @brief Get RCLP Enable Flag + * @rmtoll RCLPCR ENB FL_CMU_RCLP_IsEnabled + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CMU_RCLP_IsEnabled(void) +{ + return (uint32_t)!(READ_BIT(CMU->RCLPCR, CMU_RCLPCR_ENB_Msk) == CMU_RCLPCR_ENB_Msk); +} + +/** + * @brief Set RCLP Disable + * @rmtoll RCLPCR ENB FL_CMU_RCLP_Disable + * @retval None + */ +__STATIC_INLINE void FL_CMU_RCLP_Disable(void) +{ + SET_BIT(CMU->RCLPCR, CMU_RCLPCR_ENB_Msk); +} + +/** + * @brief Set RCLP Frequency Trim Value + * @rmtoll RCLPTR TRIM FL_CMU_RCLP_WriteTrimValue + * @param value TrimValue The value of RCLP trim + * @retval None + */ +__STATIC_INLINE void FL_CMU_RCLP_WriteTrimValue(uint32_t value) +{ + MODIFY_REG(CMU->RCLPTR, (0xffU << 0U), (value << 0U)); +} + +/** + * @brief Get RCLP Frequency Trim Value + * @rmtoll RCLPTR TRIM FL_CMU_RCLP_ReadTrimValue + * @retval The Value of RCLP trim + */ +__STATIC_INLINE uint32_t FL_CMU_RCLP_ReadTrimValue(void) +{ + return (uint32_t)(READ_BIT(CMU->RCLPTR, (0xffU << 0U)) >> 0U); +} + +/** + * @brief Set LSCLK Clock Source + * @rmtoll LSCLKSEL SEL FL_CMU_SetLSCLKClockSource + * @param clock This parameter can be one of the following values: + * @arg @ref FL_CMU_LSCLK_CLK_SOURCE_RCLP + * @arg @ref FL_CMU_LSCLK_CLK_SOURCE_XTLF + * @retval None + */ +__STATIC_INLINE void FL_CMU_SetLSCLKClockSource(uint32_t clock) +{ + MODIFY_REG(CMU->LSCLKSEL, CMU_LSCLKSEL_SEL_Msk, clock); +} + +/** + * @brief Set XTHF Oscillation Strength + * @rmtoll XTHFCR CFG FL_CMU_XTHF_WriteDriverStrength + * @param strength + * @retval None + */ +__STATIC_INLINE void FL_CMU_XTHF_WriteDriverStrength(uint32_t strength) +{ + MODIFY_REG(CMU->XTHFCR, (0x1fU << 8U), (strength << 8U)); +} + +/** + * @brief Get XTHF Oscillation Strength Setting + * @rmtoll XTHFCR CFG FL_CMU_XTHF_ReadDriverStrength + * @retval + */ +__STATIC_INLINE uint32_t FL_CMU_XTHF_ReadDriverStrength(void) +{ + return (uint32_t)(READ_BIT(CMU->XTHFCR, (0x1fU << 8U)) >> 8U); +} + +/** + * @brief Enable XTHF + * @rmtoll XTHFCR EN FL_CMU_XTHF_Enable + * @retval None + */ +__STATIC_INLINE void FL_CMU_XTHF_Enable(void) +{ + SET_BIT(CMU->XTHFCR, CMU_XTHFCR_EN_Msk); +} + +/** + * @brief Get XTHF Enable Status + * @rmtoll XTHFCR EN FL_CMU_XTHF_IsEnabled + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CMU_XTHF_IsEnabled(void) +{ + return (uint32_t)(READ_BIT(CMU->XTHFCR, CMU_XTHFCR_EN_Msk) == CMU_XTHFCR_EN_Msk); +} + +/** + * @brief Disable XTHF + * @rmtoll XTHFCR EN FL_CMU_XTHF_Disable + * @retval None + */ +__STATIC_INLINE void FL_CMU_XTHF_Disable(void) +{ + CLEAR_BIT(CMU->XTHFCR, CMU_XTHFCR_EN_Msk); +} + +/** + * @brief Set RCLF Output Prescaler + * @rmtoll RCLFCR PSC FL_CMU_RCLF_SetPrescaler + * @param prescaler This parameter can be one of the following values: + * @arg @ref FL_CMU_RCLF_PSC_DIV1 + * @arg @ref FL_CMU_RCLF_PSC_DIV4 + * @arg @ref FL_CMU_RCLF_PSC_DIV8 + * @arg @ref FL_CMU_RCLF_PSC_DIV16 + * @retval None + */ +__STATIC_INLINE void FL_CMU_RCLF_SetPrescaler(uint32_t prescaler) +{ + MODIFY_REG(CMU->RCLFCR, CMU_RCLFCR_PSC_Msk, prescaler); +} + +/** + * @brief Get RCLF Output Prescaler Setting + * @rmtoll RCLFCR PSC FL_CMU_RCLF_GetPrescaler + * @retval Returned value can be one of the following values: + * @arg @ref FL_CMU_RCLF_PSC_DIV1 + * @arg @ref FL_CMU_RCLF_PSC_DIV4 + * @arg @ref FL_CMU_RCLF_PSC_DIV8 + * @arg @ref FL_CMU_RCLF_PSC_DIV16 + */ +__STATIC_INLINE uint32_t FL_CMU_RCLF_GetPrescaler(void) +{ + return (uint32_t)(READ_BIT(CMU->RCLFCR, CMU_RCLFCR_PSC_Msk)); +} + +/** + * @brief Enable RCLF + * @rmtoll RCLFCR EN FL_CMU_RCLF_Enable + * @retval None + */ +__STATIC_INLINE void FL_CMU_RCLF_Enable(void) +{ + SET_BIT(CMU->RCLFCR, CMU_RCLFCR_EN_Msk); +} + +/** + * @brief Get RCLF Enable Status + * @rmtoll RCLFCR EN FL_CMU_RCLF_IsEnabled + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CMU_RCLF_IsEnabled(void) +{ + return (uint32_t)(READ_BIT(CMU->RCLFCR, CMU_RCLFCR_EN_Msk) == CMU_RCLFCR_EN_Msk); +} + +/** + * @brief Disable RCLF + * @rmtoll RCLFCR EN FL_CMU_RCLF_Disable + * @retval None + */ +__STATIC_INLINE void FL_CMU_RCLF_Disable(void) +{ + CLEAR_BIT(CMU->RCLFCR, CMU_RCLFCR_EN_Msk); +} + +/** + * @brief Set RCLF Frequency Trim Value + * @rmtoll RCLFTR TRIM FL_CMU_RCLF_WriteTrimValue + * @param value TrimValue The value of RCLF trim + * @retval None + */ +__STATIC_INLINE void FL_CMU_RCLF_WriteTrimValue(uint32_t value) +{ + MODIFY_REG(CMU->RCLFTR, (0xffU << 0U), (value << 0U)); +} + +/** + * @brief Get RCLF Frequency Trim Value + * @rmtoll RCLFTR TRIM FL_CMU_RCLF_ReadTrimValue + * @retval The Value of RCLF trim + */ +__STATIC_INLINE uint32_t FL_CMU_RCLF_ReadTrimValue(void) +{ + return (uint32_t)(READ_BIT(CMU->RCLFTR, (0xffU << 0U)) >> 0U); +} + +/** + * @brief Enable Group1 Periph Bus Clock + * @rmtoll PCLKCR1 FL_CMU_EnableGroup1BusClock + * @param peripheral This parameter can be one of the following values: + * @arg @ref FL_CMU_GROUP1_BUSCLK_LPTIM32 + * @arg @ref FL_CMU_GROUP1_BUSCLK_LPTIM16 + * @arg @ref FL_CMU_GROUP1_BUSCLK_RTCA + * @arg @ref FL_CMU_GROUP1_BUSCLK_PMU + * @arg @ref FL_CMU_GROUP1_BUSCLK_SCU + * @arg @ref FL_CMU_GROUP1_BUSCLK_IWDT + * @arg @ref FL_CMU_GROUP1_BUSCLK_ANAC + * @arg @ref FL_CMU_GROUP1_BUSCLK_PAD + * @arg @ref FL_CMU_GROUP1_BUSCLK_SVD + * @arg @ref FL_CMU_GROUP1_BUSCLK_COMP + * @arg @ref FL_CMU_GROUP1_BUSCLK_ATT + * @arg @ref FL_CMU_GROUP1_BUSCLK_VREF1P2 + * @retval None + */ +__STATIC_INLINE void FL_CMU_EnableGroup1BusClock(uint32_t peripheral) +{ + SET_BIT(CMU->PCLKCR1, ((peripheral & 0xffffffff) << 0x0U)); +} + +/** + * @brief Enable Group2 Periph Bus Clock + * @rmtoll PCLKCR2 FL_CMU_EnableGroup2BusClock + * @param peripheral This parameter can be one of the following values: + * @arg @ref FL_CMU_GROUP2_BUSCLK_CRC + * @arg @ref FL_CMU_GROUP2_BUSCLK_RNG + * @arg @ref FL_CMU_GROUP2_BUSCLK_AES + * @arg @ref FL_CMU_GROUP2_BUSCLK_LCD + * @arg @ref FL_CMU_GROUP2_BUSCLK_DMA + * @arg @ref FL_CMU_GROUP2_BUSCLK_FLASH + * @arg @ref FL_CMU_GROUP2_BUSCLK_RAMBIST + * @arg @ref FL_CMU_GROUP2_BUSCLK_WWDT + * @arg @ref FL_CMU_GROUP2_BUSCLK_ADC + * @arg @ref FL_CMU_GROUP2_BUSCLK_DIVAS + * @arg @ref FL_CMU_GROUP2_BUSCLK_DAC + * @retval None + */ +__STATIC_INLINE void FL_CMU_EnableGroup2BusClock(uint32_t peripheral) +{ + SET_BIT(CMU->PCLKCR2, ((peripheral & 0xffffffff) << 0x0U)); +} + +/** + * @brief Enable Group3 Periph Bus Clock + * @rmtoll PCLKCR3 FL_CMU_EnableGroup3BusClock + * @param peripheral This parameter can be one of the following values: + * @arg @ref FL_CMU_GROUP3_BUSCLK_SPI0 + * @arg @ref FL_CMU_GROUP3_BUSCLK_SPI1 + * @arg @ref FL_CMU_GROUP3_BUSCLK_SPI2 + * @arg @ref FL_CMU_GROUP3_BUSCLK_UART0 + * @arg @ref FL_CMU_GROUP3_BUSCLK_UART1 + * @arg @ref FL_CMU_GROUP3_BUSCLK_UART3 + * @arg @ref FL_CMU_GROUP3_BUSCLK_UART4 + * @arg @ref FL_CMU_GROUP3_BUSCLK_UART5 + * @arg @ref FL_CMU_GROUP3_BUSCLK_UARTIR + * @arg @ref FL_CMU_GROUP3_BUSCLK_LPUART0 + * @arg @ref FL_CMU_GROUP3_BUSCLK_LPUART1 + * @arg @ref FL_CMU_GROUP3_BUSCLK_LPUART2 + * @arg @ref FL_CMU_GROUP3_BUSCLK_CAN + * @arg @ref FL_CMU_GROUP3_BUSCLK_I2C + * @retval None + */ +__STATIC_INLINE void FL_CMU_EnableGroup3BusClock(uint32_t peripheral) +{ + SET_BIT(CMU->PCLKCR3, ((peripheral & 0xffffffff) << 0x0U)); +} + +/** + * @brief Enable Group4 Periph Bus Clock + * @rmtoll PCLKCR4 FL_CMU_EnableGroup4BusClock + * @param peripheral This parameter can be one of the following values: + * @arg @ref FL_CMU_GROUP4_BUSCLK_BSTIM32 + * @arg @ref FL_CMU_GROUP4_BUSCLK_GPTIM0 + * @arg @ref FL_CMU_GROUP4_BUSCLK_GPTIM1 + * @arg @ref FL_CMU_GROUP4_BUSCLK_GPTIM2 + * @arg @ref FL_CMU_GROUP4_BUSCLK_ATIM + * @arg @ref FL_CMU_GROUP4_BUSCLK_BSTIM16 + * @retval None + */ +__STATIC_INLINE void FL_CMU_EnableGroup4BusClock(uint32_t peripheral) +{ + SET_BIT(CMU->PCLKCR4, ((peripheral & 0xffffffff) << 0x0U)); +} + +/** + * @brief Disable Group1 Periph Bus Clock + * @rmtoll PCLKCR1 FL_CMU_DisableGroup1BusClock + * @param peripheral This parameter can be one of the following values: + * @arg @ref FL_CMU_GROUP1_BUSCLK_LPTIM32 + * @arg @ref FL_CMU_GROUP1_BUSCLK_LPTIM16 + * @arg @ref FL_CMU_GROUP1_BUSCLK_RTCA + * @arg @ref FL_CMU_GROUP1_BUSCLK_PMU + * @arg @ref FL_CMU_GROUP1_BUSCLK_SCU + * @arg @ref FL_CMU_GROUP1_BUSCLK_IWDT + * @arg @ref FL_CMU_GROUP1_BUSCLK_ANAC + * @arg @ref FL_CMU_GROUP1_BUSCLK_PAD + * @arg @ref FL_CMU_GROUP1_BUSCLK_SVD + * @arg @ref FL_CMU_GROUP1_BUSCLK_COMP + * @arg @ref FL_CMU_GROUP1_BUSCLK_ATT + * @arg @ref FL_CMU_GROUP1_BUSCLK_VREF1P2 + * @retval None + */ +__STATIC_INLINE void FL_CMU_DisableGroup1BusClock(uint32_t peripheral) +{ + CLEAR_BIT(CMU->PCLKCR1, ((peripheral & 0xffffffff) << 0x0U)); +} + +/** + * @brief Disable Group2 Periph Bus Clock + * @rmtoll PCLKCR2 FL_CMU_DisableGroup2BusClock + * @param peripheral This parameter can be one of the following values: + * @arg @ref FL_CMU_GROUP2_BUSCLK_CRC + * @arg @ref FL_CMU_GROUP2_BUSCLK_RNG + * @arg @ref FL_CMU_GROUP2_BUSCLK_AES + * @arg @ref FL_CMU_GROUP2_BUSCLK_LCD + * @arg @ref FL_CMU_GROUP2_BUSCLK_DMA + * @arg @ref FL_CMU_GROUP2_BUSCLK_FLASH + * @arg @ref FL_CMU_GROUP2_BUSCLK_RAMBIST + * @arg @ref FL_CMU_GROUP2_BUSCLK_WWDT + * @arg @ref FL_CMU_GROUP2_BUSCLK_ADC + * @arg @ref FL_CMU_GROUP2_BUSCLK_DIVAS + * @arg @ref FL_CMU_GROUP2_BUSCLK_DAC + * @retval None + */ +__STATIC_INLINE void FL_CMU_DisableGroup2BusClock(uint32_t peripheral) +{ + CLEAR_BIT(CMU->PCLKCR2, ((peripheral & 0xffffffff) << 0x0U)); +} + +/** + * @brief Disable Group3 Periph Bus Clock + * @rmtoll PCLKCR3 FL_CMU_DisableGroup3BusClock + * @param peripheral This parameter can be one of the following values: + * @arg @ref FL_CMU_GROUP3_BUSCLK_SPI0 + * @arg @ref FL_CMU_GROUP3_BUSCLK_SPI1 + * @arg @ref FL_CMU_GROUP3_BUSCLK_SPI2 + * @arg @ref FL_CMU_GROUP3_BUSCLK_UART0 + * @arg @ref FL_CMU_GROUP3_BUSCLK_UART1 + * @arg @ref FL_CMU_GROUP3_BUSCLK_UART3 + * @arg @ref FL_CMU_GROUP3_BUSCLK_UART4 + * @arg @ref FL_CMU_GROUP3_BUSCLK_UART5 + * @arg @ref FL_CMU_GROUP3_BUSCLK_UARTIR + * @arg @ref FL_CMU_GROUP3_BUSCLK_LPUART0 + * @arg @ref FL_CMU_GROUP3_BUSCLK_LPUART1 + * @arg @ref FL_CMU_GROUP3_BUSCLK_LPUART2 + * @arg @ref FL_CMU_GROUP3_BUSCLK_CAN + * @arg @ref FL_CMU_GROUP3_BUSCLK_I2C + * @retval None + */ +__STATIC_INLINE void FL_CMU_DisableGroup3BusClock(uint32_t peripheral) +{ + CLEAR_BIT(CMU->PCLKCR3, ((peripheral & 0xffffffff) << 0x0U)); +} + +/** + * @brief Disable Group4 Periph Bus Clock + * @rmtoll PCLKCR4 FL_CMU_DisableGroup4BusClock + * @param peripheral This parameter can be one of the following values: + * @arg @ref FL_CMU_GROUP4_BUSCLK_BSTIM32 + * @arg @ref FL_CMU_GROUP4_BUSCLK_GPTIM0 + * @arg @ref FL_CMU_GROUP4_BUSCLK_GPTIM1 + * @arg @ref FL_CMU_GROUP4_BUSCLK_GPTIM2 + * @arg @ref FL_CMU_GROUP4_BUSCLK_ATIM + * @arg @ref FL_CMU_GROUP4_BUSCLK_BSTIM16 + * @retval None + */ +__STATIC_INLINE void FL_CMU_DisableGroup4BusClock(uint32_t peripheral) +{ + CLEAR_BIT(CMU->PCLKCR4, ((peripheral & 0xffffffff) << 0x0U)); +} + +/** + * @brief Get Group1 Periph Bus Clock Enable Status + * @rmtoll PCLKCR1 FL_CMU_IsEnabledGroup1BusClock + * @param peripheral This parameter can be one of the following values: + * @arg @ref FL_CMU_GROUP1_BUSCLK_LPTIM32 + * @arg @ref FL_CMU_GROUP1_BUSCLK_LPTIM16 + * @arg @ref FL_CMU_GROUP1_BUSCLK_RTCA + * @arg @ref FL_CMU_GROUP1_BUSCLK_PMU + * @arg @ref FL_CMU_GROUP1_BUSCLK_SCU + * @arg @ref FL_CMU_GROUP1_BUSCLK_IWDT + * @arg @ref FL_CMU_GROUP1_BUSCLK_ANAC + * @arg @ref FL_CMU_GROUP1_BUSCLK_PAD + * @arg @ref FL_CMU_GROUP1_BUSCLK_SVD + * @arg @ref FL_CMU_GROUP1_BUSCLK_COMP + * @arg @ref FL_CMU_GROUP1_BUSCLK_ATT + * @arg @ref FL_CMU_GROUP1_BUSCLK_VREF1P2 + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CMU_IsEnabledGroup1BusClock(uint32_t peripheral) +{ + return (uint32_t)(READ_BIT(CMU->PCLKCR1, ((peripheral & 0xffffffff) << 0x0U)) == ((peripheral & 0xffffffff) << 0x0U)); +} + +/** + * @brief Get Group2 Periph Bus Clock Enable Status + * @rmtoll PCLKCR2 FL_CMU_IsEnabledGroup2BusClock + * @param peripheral This parameter can be one of the following values: + * @arg @ref FL_CMU_GROUP2_BUSCLK_CRC + * @arg @ref FL_CMU_GROUP2_BUSCLK_RNG + * @arg @ref FL_CMU_GROUP2_BUSCLK_AES + * @arg @ref FL_CMU_GROUP2_BUSCLK_LCD + * @arg @ref FL_CMU_GROUP2_BUSCLK_DMA + * @arg @ref FL_CMU_GROUP2_BUSCLK_FLASH + * @arg @ref FL_CMU_GROUP2_BUSCLK_RAMBIST + * @arg @ref FL_CMU_GROUP2_BUSCLK_WWDT + * @arg @ref FL_CMU_GROUP2_BUSCLK_ADC + * @arg @ref FL_CMU_GROUP2_BUSCLK_DIVAS + * @arg @ref FL_CMU_GROUP2_BUSCLK_DAC + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CMU_IsEnabledGroup2BusClock(uint32_t peripheral) +{ + return (uint32_t)(READ_BIT(CMU->PCLKCR2, ((peripheral & 0xffffffff) << 0x0U)) == ((peripheral & 0xffffffff) << 0x0U)); +} + +/** + * @brief Get Group3 Periph Bus Clock Enable Status + * @rmtoll PCLKCR3 FL_CMU_IsEnabledGroup3BusClock + * @param peripheral This parameter can be one of the following values: + * @arg @ref FL_CMU_GROUP3_BUSCLK_SPI0 + * @arg @ref FL_CMU_GROUP3_BUSCLK_SPI1 + * @arg @ref FL_CMU_GROUP3_BUSCLK_SPI2 + * @arg @ref FL_CMU_GROUP3_BUSCLK_UART0 + * @arg @ref FL_CMU_GROUP3_BUSCLK_UART1 + * @arg @ref FL_CMU_GROUP3_BUSCLK_UART3 + * @arg @ref FL_CMU_GROUP3_BUSCLK_UART4 + * @arg @ref FL_CMU_GROUP3_BUSCLK_UART5 + * @arg @ref FL_CMU_GROUP3_BUSCLK_UARTIR + * @arg @ref FL_CMU_GROUP3_BUSCLK_LPUART0 + * @arg @ref FL_CMU_GROUP3_BUSCLK_LPUART1 + * @arg @ref FL_CMU_GROUP3_BUSCLK_LPUART2 + * @arg @ref FL_CMU_GROUP3_BUSCLK_CAN + * @arg @ref FL_CMU_GROUP3_BUSCLK_I2C + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CMU_IsEnabledGroup3BusClock(uint32_t peripheral) +{ + return (uint32_t)(READ_BIT(CMU->PCLKCR3, ((peripheral & 0xffffffff) << 0x0U)) == ((peripheral & 0xffffffff) << 0x0U)); +} + +/** + * @brief Get Group4 Periph Bus Clock Enable Status + * @rmtoll PCLKCR4 FL_CMU_IsEnabledGroup4BusClock + * @param peripheral This parameter can be one of the following values: + * @arg @ref FL_CMU_GROUP4_BUSCLK_BSTIM32 + * @arg @ref FL_CMU_GROUP4_BUSCLK_GPTIM0 + * @arg @ref FL_CMU_GROUP4_BUSCLK_GPTIM1 + * @arg @ref FL_CMU_GROUP4_BUSCLK_GPTIM2 + * @arg @ref FL_CMU_GROUP4_BUSCLK_ATIM + * @arg @ref FL_CMU_GROUP4_BUSCLK_BSTIM16 + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CMU_IsEnabledGroup4BusClock(uint32_t peripheral) +{ + return (uint32_t)(READ_BIT(CMU->PCLKCR4, ((peripheral & 0xffffffff) << 0x0U)) == ((peripheral & 0xffffffff) << 0x0U)); +} + +/** + * @brief Enable Group3 Periph Operation Clock + * @rmtoll OPCCR3 FL_CMU_EnableGroup3OperationClock + * @param peripheral This parameter can be one of the following values: + * @arg @ref FL_CMU_GROUP3_OPCLK_EXTI + * @arg @ref FL_CMU_GROUP3_OPCLK_FLASH + * @arg @ref FL_CMU_GROUP3_OPCLK_LPUART1 + * @arg @ref FL_CMU_GROUP3_OPCLK_LPUART0 + * @arg @ref FL_CMU_GROUP3_OPCLK_RNG + * @arg @ref FL_CMU_GROUP3_OPCLK_LPUART2 + * @arg @ref FL_CMU_GROUP3_OPCLK_I2C + * @arg @ref FL_CMU_GROUP3_OPCLK_ADC + * @arg @ref FL_CMU_GROUP3_OPCLK_ATIM + * @arg @ref FL_CMU_GROUP3_OPCLK_CAN + * @arg @ref FL_CMU_GROUP3_OPCLK_UART1 + * @arg @ref FL_CMU_GROUP3_OPCLK_UART0 + * @arg @ref FL_CMU_GROUP3_OPCLK_BSTIM16 + * @arg @ref FL_CMU_GROUP3_OPCLK_BSTIM32 + * @arg @ref FL_CMU_GROUP3_OPCLK_LPTIM16 + * @arg @ref FL_CMU_GROUP3_OPCLK_LPTIM32 + * @retval None + */ +__STATIC_INLINE void FL_CMU_EnableGroup3OperationClock(uint32_t peripheral) +{ + SET_BIT(CMU->OPCCR3, ((peripheral & 0xffffffff) << 0x0U)); +} + +/** + * @brief Disable Group3 Periph Operation Clock + * @rmtoll OPCCR3 FL_CMU_DisableGroup3OperationClock + * @param peripheral This parameter can be one of the following values: + * @arg @ref FL_CMU_GROUP3_OPCLK_EXTI + * @arg @ref FL_CMU_GROUP3_OPCLK_FLASH + * @arg @ref FL_CMU_GROUP3_OPCLK_LPUART1 + * @arg @ref FL_CMU_GROUP3_OPCLK_LPUART0 + * @arg @ref FL_CMU_GROUP3_OPCLK_RNG + * @arg @ref FL_CMU_GROUP3_OPCLK_LPUART2 + * @arg @ref FL_CMU_GROUP3_OPCLK_I2C + * @arg @ref FL_CMU_GROUP3_OPCLK_ADC + * @arg @ref FL_CMU_GROUP3_OPCLK_ATIM + * @arg @ref FL_CMU_GROUP3_OPCLK_CAN + * @arg @ref FL_CMU_GROUP3_OPCLK_UART1 + * @arg @ref FL_CMU_GROUP3_OPCLK_UART0 + * @arg @ref FL_CMU_GROUP3_OPCLK_BSTIM16 + * @arg @ref FL_CMU_GROUP3_OPCLK_BSTIM32 + * @arg @ref FL_CMU_GROUP3_OPCLK_LPTIM16 + * @arg @ref FL_CMU_GROUP3_OPCLK_LPTIM32 + * @retval None + */ +__STATIC_INLINE void FL_CMU_DisableGroup3OperationClock(uint32_t peripheral) +{ + CLEAR_BIT(CMU->OPCCR3, ((peripheral & 0xffffffff) << 0x0U)); +} + +/** + * @brief Get Group3 Periph Operation Clock Enable Status + * @rmtoll OPCCR3 FL_CMU_IsEnabledGroup3OperationClock + * @param peripheral This parameter can be one of the following values: + * @arg @ref FL_CMU_GROUP3_OPCLK_EXTI + * @arg @ref FL_CMU_GROUP3_OPCLK_FLASH + * @arg @ref FL_CMU_GROUP3_OPCLK_LPUART1 + * @arg @ref FL_CMU_GROUP3_OPCLK_LPUART0 + * @arg @ref FL_CMU_GROUP3_OPCLK_RNG + * @arg @ref FL_CMU_GROUP3_OPCLK_LPUART2 + * @arg @ref FL_CMU_GROUP3_OPCLK_I2C + * @arg @ref FL_CMU_GROUP3_OPCLK_ADC + * @arg @ref FL_CMU_GROUP3_OPCLK_ATIM + * @arg @ref FL_CMU_GROUP3_OPCLK_CAN + * @arg @ref FL_CMU_GROUP3_OPCLK_UART1 + * @arg @ref FL_CMU_GROUP3_OPCLK_UART0 + * @arg @ref FL_CMU_GROUP3_OPCLK_BSTIM16 + * @arg @ref FL_CMU_GROUP3_OPCLK_BSTIM32 + * @arg @ref FL_CMU_GROUP3_OPCLK_LPTIM16 + * @arg @ref FL_CMU_GROUP3_OPCLK_LPTIM32 + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CMU_IsEnabledGroup3OperationClock(uint32_t peripheral) +{ + return (uint32_t)(READ_BIT(CMU->OPCCR3, ((peripheral & 0xffffffff) << 0x0U)) == ((peripheral & 0xffffffff) << 0x0U)); +} + +/** + * @brief Set EXTI Clock Source + * @rmtoll OPCCR1 EXTICKS FL_CMU_SetEXTIClockSource + * @param clock This parameter can be one of the following values: + * @arg @ref FL_CMU_EXTI_CLK_SOURCE_LSCLK + * @arg @ref FL_CMU_EXTI_CLK_SOURCE_HCLK + * @retval None + */ +__STATIC_INLINE void FL_CMU_SetEXTIClockSource(uint32_t clock) +{ + MODIFY_REG(CMU->OPCCR1, CMU_OPCCR1_EXTICKS_Msk, clock); +} + +/** + * @brief Get EXTI Clock Source Setting + * @rmtoll OPCCR1 EXTICKS FL_CMU_GetEXTIClockSource + * @retval Returned value can be one of the following values: + * @arg @ref FL_CMU_EXTI_CLK_SOURCE_LSCLK + * @arg @ref FL_CMU_EXTI_CLK_SOURCE_HCLK + */ +__STATIC_INLINE uint32_t FL_CMU_GetEXTIClockSource(void) +{ + return (uint32_t)(READ_BIT(CMU->OPCCR1, CMU_OPCCR1_EXTICKS_Msk)); +} + +/** + * @brief Set LPUART1 Clock Source + * @rmtoll OPCCR1 LPUART1CKS FL_CMU_SetLPUART1ClockSource + * @param clock This parameter can be one of the following values: + * @arg @ref FL_CMU_LPUART1_CLK_SOURCE_LSCLK + * @arg @ref FL_CMU_LPUART1_CLK_SOURCE_RCHF + * @arg @ref FL_CMU_LPUART1_CLK_SOURCE_RCLF + * @retval None + */ +__STATIC_INLINE void FL_CMU_SetLPUART1ClockSource(uint32_t clock) +{ + MODIFY_REG(CMU->OPCCR1, CMU_OPCCR1_LPUART1CKS_Msk, clock); +} + +/** + * @brief Get LPUART1 Clock Source Setting + * @rmtoll OPCCR1 LPUART1CKS FL_CMU_GetLPUART1ClockSource + * @retval Returned value can be one of the following values: + * @arg @ref FL_CMU_LPUART1_CLK_SOURCE_LSCLK + * @arg @ref FL_CMU_LPUART1_CLK_SOURCE_RCHF + * @arg @ref FL_CMU_LPUART1_CLK_SOURCE_RCLF + */ +__STATIC_INLINE uint32_t FL_CMU_GetLPUART1ClockSource(void) +{ + return (uint32_t)(READ_BIT(CMU->OPCCR1, CMU_OPCCR1_LPUART1CKS_Msk)); +} + +/** + * @brief Set LPUART0 Clock Source + * @rmtoll OPCCR1 LPUART0CKS FL_CMU_SetLPUART0ClockSource + * @param clock This parameter can be one of the following values: + * @arg @ref FL_CMU_LPUART0_CLK_SOURCE_LSCLK + * @arg @ref FL_CMU_LPUART0_CLK_SOURCE_RCHF + * @arg @ref FL_CMU_LPUART0_CLK_SOURCE_RCLF + * @retval None + */ +__STATIC_INLINE void FL_CMU_SetLPUART0ClockSource(uint32_t clock) +{ + MODIFY_REG(CMU->OPCCR1, CMU_OPCCR1_LPUART0CKS_Msk, clock); +} + +/** + * @brief Get LPUART0 Clock Source Setting + * @rmtoll OPCCR1 LPUART0CKS FL_CMU_GetLPUART0ClockSource + * @retval Returned value can be one of the following values: + * @arg @ref FL_CMU_LPUART0_CLK_SOURCE_LSCLK + * @arg @ref FL_CMU_LPUART0_CLK_SOURCE_RCHF + * @arg @ref FL_CMU_LPUART0_CLK_SOURCE_RCLF + */ +__STATIC_INLINE uint32_t FL_CMU_GetLPUART0ClockSource(void) +{ + return (uint32_t)(READ_BIT(CMU->OPCCR1, CMU_OPCCR1_LPUART0CKS_Msk)); +} + +/** + * @brief Set LPUART2 Clock Source + * @rmtoll OPCCR1 LPUART2CKS FL_CMU_SetLPUART2ClockSource + * @param clock This parameter can be one of the following values: + * @arg @ref FL_CMU_LPUART2_CLK_SOURCE_LSCLK + * @arg @ref FL_CMU_LPUART2_CLK_SOURCE_RCHF + * @arg @ref FL_CMU_LPUART2_CLK_SOURCE_RCLF + * @retval None + */ +__STATIC_INLINE void FL_CMU_SetLPUART2ClockSource(uint32_t clock) +{ + MODIFY_REG(CMU->OPCCR1, CMU_OPCCR1_LPUART2CKS_Msk, clock); +} + +/** + * @brief Get LPUART2 Clock Source Setting + * @rmtoll OPCCR1 LPUART2CKS FL_CMU_GetLPUART2ClockSource + * @retval Returned value can be one of the following values: + * @arg @ref FL_CMU_LPUART2_CLK_SOURCE_LSCLK + * @arg @ref FL_CMU_LPUART2_CLK_SOURCE_RCHF + * @arg @ref FL_CMU_LPUART2_CLK_SOURCE_RCLF + */ +__STATIC_INLINE uint32_t FL_CMU_GetLPUART2ClockSource(void) +{ + return (uint32_t)(READ_BIT(CMU->OPCCR1, CMU_OPCCR1_LPUART2CKS_Msk)); +} + +/** + * @brief Set I2C Clock Source + * @rmtoll OPCCR1 I2CCKS FL_CMU_SetI2CClockSource + * @param clock This parameter can be one of the following values: + * @arg @ref FL_CMU_I2C_CLK_SOURCE_APBCLK + * @arg @ref FL_CMU_I2C_CLK_SOURCE_RCHF + * @arg @ref FL_CMU_I2C_CLK_SOURCE_SYSCLK + * @arg @ref FL_CMU_I2C_CLK_SOURCE_RCLF + * @retval None + */ +__STATIC_INLINE void FL_CMU_SetI2CClockSource(uint32_t clock) +{ + MODIFY_REG(CMU->OPCCR1, CMU_OPCCR1_I2CCKS_Msk, clock); +} + +/** + * @brief Get I2C Clock Source Setting + * @rmtoll OPCCR1 I2CCKS FL_CMU_GetI2CClockSource + * @retval Returned value can be one of the following values: + * @arg @ref FL_CMU_I2C_CLK_SOURCE_APBCLK + * @arg @ref FL_CMU_I2C_CLK_SOURCE_RCHF + * @arg @ref FL_CMU_I2C_CLK_SOURCE_SYSCLK + * @arg @ref FL_CMU_I2C_CLK_SOURCE_RCLF + */ +__STATIC_INLINE uint32_t FL_CMU_GetI2CClockSource(void) +{ + return (uint32_t)(READ_BIT(CMU->OPCCR1, CMU_OPCCR1_I2CCKS_Msk)); +} + +/** + * @brief Set BSTIM16 Clock Source + * @rmtoll OPCCR1 BT16CKS FL_CMU_SetBSTIM16ClockSource + * @param clock This parameter can be one of the following values: + * @arg @ref FL_CMU_BSTIM16_CLK_SOURCE_APBCLK + * @arg @ref FL_CMU_BSTIM16_CLK_SOURCE_LSCLK + * @arg @ref FL_CMU_BSTIM16_CLK_SOURCE_RCLP + * @arg @ref FL_CMU_BSTIM16_CLK_SOURCE_RCLF + * @retval None + */ +__STATIC_INLINE void FL_CMU_SetBSTIM16ClockSource(uint32_t clock) +{ + MODIFY_REG(CMU->OPCCR1, CMU_OPCCR1_BT16CKS_Msk, clock); +} + +/** + * @brief Get BSTIM16 Clock Source Setting + * @rmtoll OPCCR1 BT16CKS FL_CMU_GetBSTIM16ClockSource + * @retval Returned value can be one of the following values: + * @arg @ref FL_CMU_BSTIM16_CLK_SOURCE_APBCLK + * @arg @ref FL_CMU_BSTIM16_CLK_SOURCE_LSCLK + * @arg @ref FL_CMU_BSTIM16_CLK_SOURCE_RCLP + * @arg @ref FL_CMU_BSTIM16_CLK_SOURCE_RCLF + */ +__STATIC_INLINE uint32_t FL_CMU_GetBSTIM16ClockSource(void) +{ + return (uint32_t)(READ_BIT(CMU->OPCCR1, CMU_OPCCR1_BT16CKS_Msk)); +} + +/** + * @brief Set BSTIM32 Clock Source + * @rmtoll OPCCR1 BT32CKS FL_CMU_SetBSTIM32ClockSource + * @param clock This parameter can be one of the following values: + * @arg @ref FL_CMU_BSTIM32_CLK_SOURCE_APBCLK + * @arg @ref FL_CMU_BSTIM32_CLK_SOURCE_LSCLK + * @arg @ref FL_CMU_BSTIM32_CLK_SOURCE_RCLP + * @arg @ref FL_CMU_BSTIM32_CLK_SOURCE_RCLF + * @retval None + */ +__STATIC_INLINE void FL_CMU_SetBSTIM32ClockSource(uint32_t clock) +{ + MODIFY_REG(CMU->OPCCR1, CMU_OPCCR1_BT32CKS_Msk, clock); +} + +/** + * @brief Get BSTIM32 Clock Source Setting + * @rmtoll OPCCR1 BT32CKS FL_CMU_GetBSTIM32ClockSource + * @retval Returned value can be one of the following values: + * @arg @ref FL_CMU_BSTIM32_CLK_SOURCE_APBCLK + * @arg @ref FL_CMU_BSTIM32_CLK_SOURCE_LSCLK + * @arg @ref FL_CMU_BSTIM32_CLK_SOURCE_RCLP + * @arg @ref FL_CMU_BSTIM32_CLK_SOURCE_RCLF + */ +__STATIC_INLINE uint32_t FL_CMU_GetBSTIM32ClockSource(void) +{ + return (uint32_t)(READ_BIT(CMU->OPCCR1, CMU_OPCCR1_BT32CKS_Msk)); +} + +/** + * @brief Set LPTIM16 Clock Source + * @rmtoll OPCCR1 LPT16CKS FL_CMU_SetLPTIM16ClockSource + * @param clock This parameter can be one of the following values: + * @arg @ref FL_CMU_LPTIM16_CLK_SOURCE_APBCLK + * @arg @ref FL_CMU_LPTIM16_CLK_SOURCE_LSCLK + * @arg @ref FL_CMU_LPTIM16_CLK_SOURCE_RCLP + * @arg @ref FL_CMU_LPTIM16_CLK_SOURCE_RCLF + * @retval None + */ +__STATIC_INLINE void FL_CMU_SetLPTIM16ClockSource(uint32_t clock) +{ + MODIFY_REG(CMU->OPCCR1, CMU_OPCCR1_LPT16CKS_Msk, clock); +} + +/** + * @brief Get LPTIM16 Clock Source Setting + * @rmtoll OPCCR1 LPT16CKS FL_CMU_GetLPTIM16ClockSource + * @retval Returned value can be one of the following values: + * @arg @ref FL_CMU_LPTIM16_CLK_SOURCE_APBCLK + * @arg @ref FL_CMU_LPTIM16_CLK_SOURCE_LSCLK + * @arg @ref FL_CMU_LPTIM16_CLK_SOURCE_RCLP + * @arg @ref FL_CMU_LPTIM16_CLK_SOURCE_RCLF + */ +__STATIC_INLINE uint32_t FL_CMU_GetLPTIM16ClockSource(void) +{ + return (uint32_t)(READ_BIT(CMU->OPCCR1, CMU_OPCCR1_LPT16CKS_Msk)); +} + +/** + * @brief Set LPTIM32 Clock Source + * @rmtoll OPCCR1 LPT32CKS FL_CMU_SetLPTIM32ClockSource + * @param clock This parameter can be one of the following values: + * @arg @ref FL_CMU_LPTIM32_CLK_SOURCE_APBCLK + * @arg @ref FL_CMU_LPTIM32_CLK_SOURCE_LSCLK + * @arg @ref FL_CMU_LPTIM32_CLK_SOURCE_RCLP + * @arg @ref FL_CMU_LPTIM32_CLK_SOURCE_RCLF + * @retval None + */ +__STATIC_INLINE void FL_CMU_SetLPTIM32ClockSource(uint32_t clock) +{ + MODIFY_REG(CMU->OPCCR1, CMU_OPCCR1_LPT32CKS_Msk, clock); +} + +/** + * @brief Get LPTIM32 Clock Source Setting + * @rmtoll OPCCR1 LPT32CKS FL_CMU_GetLPTIM32ClockSource + * @retval Returned value can be one of the following values: + * @arg @ref FL_CMU_LPTIM32_CLK_SOURCE_APBCLK + * @arg @ref FL_CMU_LPTIM32_CLK_SOURCE_LSCLK + * @arg @ref FL_CMU_LPTIM32_CLK_SOURCE_RCLP + * @arg @ref FL_CMU_LPTIM32_CLK_SOURCE_RCLF + */ +__STATIC_INLINE uint32_t FL_CMU_GetLPTIM32ClockSource(void) +{ + return (uint32_t)(READ_BIT(CMU->OPCCR1, CMU_OPCCR1_LPT32CKS_Msk)); +} + +/** + * @brief Set ATIM Clock Source + * @rmtoll OPCCR1 ATCKS FL_CMU_SetATIMClockSource + * @param clock This parameter can be one of the following values: + * @arg @ref FL_CMU_ATIM_CLK_SOURCE_APBCLK + * @arg @ref FL_CMU_ATIM_CLK_SOURCE_PLL_X2 + * @retval None + */ +__STATIC_INLINE void FL_CMU_SetATIMClockSource(uint32_t clock) +{ + MODIFY_REG(CMU->OPCCR1, CMU_OPCCR1_ATCKS_Msk, clock); +} + +/** + * @brief Get ATIM Clock Source Setting + * @rmtoll OPCCR1 ATCKS FL_CMU_GetATIMClockSource + * @param clock This parameter can be one of the following values: + * @arg @ref FL_CMU_ATIM_CLK_SOURCE_APBCLK + * @arg @ref FL_CMU_ATIM_CLK_SOURCE_PLL_X2 + * @retval Returned value can be one of the following values: + * @arg @ref FL_CMU_ATIM_CLK_SOURCE_APBCLK + * @arg @ref FL_CMU_ATIM_CLK_SOURCE_PLL_X2 + */ +__STATIC_INLINE uint32_t FL_CMU_GetATIMClockSource(void) +{ + return (uint32_t)(READ_BIT(CMU->OPCCR1, CMU_OPCCR1_ATCKS_Msk)); +} + +/** + * @brief Set CAN Clock Source + * @rmtoll OPCCR1 CANCKS FL_CMU_SetCANClockSource + * @param clock This parameter can be one of the following values: + * @arg @ref FL_CMU_CAN_CLK_SOURCE_RCHF + * @arg @ref FL_CMU_CAN_CLK_SOURCE_XTHF + * @arg @ref FL_CMU_CAN_CLK_SOURCE_PLL + * @arg @ref FL_CMU_CAN_CLK_SOURCE_APBCLK + * @retval None + */ +__STATIC_INLINE void FL_CMU_SetCANClockSource(uint32_t clock) +{ + MODIFY_REG(CMU->OPCCR1, CMU_OPCCR1_CANCKS_Msk, clock); +} + +/** + * @brief Get CAN Clock Source Setting + * @rmtoll OPCCR1 CANCKS FL_CMU_GetCANClockSource + * @retval Returned value can be one of the following values: + * @arg @ref FL_CMU_CAN_CLK_SOURCE_RCHF + * @arg @ref FL_CMU_CAN_CLK_SOURCE_XTHF + * @arg @ref FL_CMU_CAN_CLK_SOURCE_PLL + * @arg @ref FL_CMU_CAN_CLK_SOURCE_APBCLK + */ +__STATIC_INLINE uint32_t FL_CMU_GetCANClockSource(void) +{ + return (uint32_t)(READ_BIT(CMU->OPCCR1, CMU_OPCCR1_CANCKS_Msk)); +} + +/** + * @brief Set UART1 Clock Source + * @rmtoll OPCCR1 UART1CKS FL_CMU_SetUART1ClockSource + * @param clock This parameter can be one of the following values: + * @arg @ref FL_CMU_UART1_CLK_SOURCE_APBCLK + * @arg @ref FL_CMU_UART1_CLK_SOURCE_RCHF + * @arg @ref FL_CMU_UART1_CLK_SOURCE_SYSCLK + * @arg @ref FL_CMU_UART1_CLK_SOURCE_XTHF + * @retval None + */ +__STATIC_INLINE void FL_CMU_SetUART1ClockSource(uint32_t clock) +{ + MODIFY_REG(CMU->OPCCR1, CMU_OPCCR1_UART1CKS_Msk, clock); +} + +/** + * @brief Get UART1 Clock Source Setting + * @rmtoll OPCCR1 UART1CKS FL_CMU_GetUART1ClockSource + * @retval Returned value can be one of the following values: + * @arg @ref FL_CMU_UART1_CLK_SOURCE_APBCLK + * @arg @ref FL_CMU_UART1_CLK_SOURCE_RCHF + * @arg @ref FL_CMU_UART1_CLK_SOURCE_SYSCLK + * @arg @ref FL_CMU_UART1_CLK_SOURCE_XTHF + */ +__STATIC_INLINE uint32_t FL_CMU_GetUART1ClockSource(void) +{ + return (uint32_t)(READ_BIT(CMU->OPCCR1, CMU_OPCCR1_UART1CKS_Msk)); +} + +/** + * @brief Set UART0 Clock Source + * @rmtoll OPCCR1 UART0CKS FL_CMU_SetUART0ClockSource + * @param clock This parameter can be one of the following values: + * @arg @ref FL_CMU_UART0_CLK_SOURCE_APBCLK + * @arg @ref FL_CMU_UART0_CLK_SOURCE_RCHF + * @arg @ref FL_CMU_UART0_CLK_SOURCE_SYSCLK + * @arg @ref FL_CMU_UART0_CLK_SOURCE_XTHF + * @retval None + */ +__STATIC_INLINE void FL_CMU_SetUART0ClockSource(uint32_t clock) +{ + MODIFY_REG(CMU->OPCCR1, CMU_OPCCR1_UART0CKS_Msk, clock); +} + +/** + * @brief Get UART0 Clock Source Setting + * @rmtoll OPCCR1 UART0CKS FL_CMU_GetUART0ClockSource + * @retval Returned value can be one of the following values: + * @arg @ref FL_CMU_UART0_CLK_SOURCE_APBCLK + * @arg @ref FL_CMU_UART0_CLK_SOURCE_RCHF + * @arg @ref FL_CMU_UART0_CLK_SOURCE_SYSCLK + * @arg @ref FL_CMU_UART0_CLK_SOURCE_XTHF + */ +__STATIC_INLINE uint32_t FL_CMU_GetUART0ClockSource(void) +{ + return (uint32_t)(READ_BIT(CMU->OPCCR1, CMU_OPCCR1_UART0CKS_Msk)); +} + +/** + * @brief Set RNG Prescaler + * @rmtoll OPCCR2 RNGPRSC FL_CMU_SetRNGPrescaler + * @param prescaler This parameter can be one of the following values: + * @arg @ref FL_CMU_RNG_PSC_DIV1 + * @arg @ref FL_CMU_RNG_PSC_DIV2 + * @arg @ref FL_CMU_RNG_PSC_DIV4 + * @arg @ref FL_CMU_RNG_PSC_DIV8 + * @arg @ref FL_CMU_RNG_PSC_DIV16 + * @arg @ref FL_CMU_RNG_PSC_DIV32 + * @retval None + */ +__STATIC_INLINE void FL_CMU_SetRNGPrescaler(uint32_t prescaler) +{ + MODIFY_REG(CMU->OPCCR2, CMU_OPCCR2_RNGPRSC_Msk, prescaler); +} + +/** + * @brief Get RNG Prescaler Setting + * @rmtoll OPCCR2 RNGPRSC FL_CMU_GetRNGPrescaler + * @retval Returned value can be one of the following values: + * @arg @ref FL_CMU_RNG_PSC_DIV1 + * @arg @ref FL_CMU_RNG_PSC_DIV2 + * @arg @ref FL_CMU_RNG_PSC_DIV4 + * @arg @ref FL_CMU_RNG_PSC_DIV8 + * @arg @ref FL_CMU_RNG_PSC_DIV16 + * @arg @ref FL_CMU_RNG_PSC_DIV32 + */ +__STATIC_INLINE uint32_t FL_CMU_GetRNGPrescaler(void) +{ + return (uint32_t)(READ_BIT(CMU->OPCCR2, CMU_OPCCR2_RNGPRSC_Msk)); +} + +/** + * @brief Set ADC Prescaler + * @rmtoll OPCCR2 ADCPRSC FL_CMU_SetADCPrescaler + * @param prescaler This parameter can be one of the following values: + * @arg @ref FL_CMU_ADC_PSC_DIV1 + * @arg @ref FL_CMU_ADC_PSC_DIV2 + * @arg @ref FL_CMU_ADC_PSC_DIV4 + * @arg @ref FL_CMU_ADC_PSC_DIV8 + * @arg @ref FL_CMU_ADC_PSC_DIV16 + * @arg @ref FL_CMU_ADC_PSC_DIV32 + * @retval None + */ +__STATIC_INLINE void FL_CMU_SetADCPrescaler(uint32_t prescaler) +{ + MODIFY_REG(CMU->OPCCR2, CMU_OPCCR2_ADCPRSC_Msk, prescaler); +} + +/** + * @brief Get ADC Prescaler Setting + * @rmtoll OPCCR2 ADCPRSC FL_CMU_GetADCPrescaler + * @retval Returned value can be one of the following values: + * @arg @ref FL_CMU_ADC_PSC_DIV1 + * @arg @ref FL_CMU_ADC_PSC_DIV2 + * @arg @ref FL_CMU_ADC_PSC_DIV4 + * @arg @ref FL_CMU_ADC_PSC_DIV8 + * @arg @ref FL_CMU_ADC_PSC_DIV16 + * @arg @ref FL_CMU_ADC_PSC_DIV32 + */ +__STATIC_INLINE uint32_t FL_CMU_GetADCPrescaler(void) +{ + return (uint32_t)(READ_BIT(CMU->OPCCR2, CMU_OPCCR2_ADCPRSC_Msk)); +} + +/** + * @brief Set ADC Clock Source + * @rmtoll OPCCR2 ADCCKS FL_CMU_SetADCClockSource + * @param clock This parameter can be one of the following values: + * @arg @ref FL_CMU_ADC_CLK_SOURCE_RCLF + * @arg @ref FL_CMU_ADC_CLK_SOURCE_RCHF + * @arg @ref FL_CMU_ADC_CLK_SOURCE_XTHF + * @arg @ref FL_CMU_ADC_CLK_SOURCE_PLL + * @retval None + */ +__STATIC_INLINE void FL_CMU_SetADCClockSource(uint32_t clock) +{ + MODIFY_REG(CMU->OPCCR2, CMU_OPCCR2_ADCCKS_Msk, clock); +} + +/** + * @brief Get ADC Clock Source Setting + * @rmtoll OPCCR2 ADCCKS FL_CMU_GetADCClockSource + * @retval Returned value can be one of the following values: + * @arg @ref FL_CMU_ADC_CLK_SOURCE_RCLF + * @arg @ref FL_CMU_ADC_CLK_SOURCE_RCHF + * @arg @ref FL_CMU_ADC_CLK_SOURCE_XTHF + * @arg @ref FL_CMU_ADC_CLK_SOURCE_PLL + */ +__STATIC_INLINE uint32_t FL_CMU_GetADCClockSource(void) +{ + return (uint32_t)(READ_BIT(CMU->OPCCR2, CMU_OPCCR2_ADCCKS_Msk)); +} + +/** + * @brief Disable CCL Interrupt + * @rmtoll CCCR CCLIE FL_CMU_CCL_DisableIT + * @retval None + */ +__STATIC_INLINE void FL_CMU_CCL_DisableIT(void) +{ + CLEAR_BIT(CMU->CCCR, CMU_CCCR_CCLIE_Msk); +} + +/** + * @brief Enable CCL Interrupt + * @rmtoll CCCR CCLIE FL_CMU_CCL_EnableIT + * @retval None + */ +__STATIC_INLINE void FL_CMU_CCL_EnableIT(void) +{ + SET_BIT(CMU->CCCR, CMU_CCCR_CCLIE_Msk); +} + +/** + * @brief Get CCL Interrupt Enable Status + * @rmtoll CCCR CCLIE FL_CMU_CCL_IsEnabledIT + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CMU_CCL_IsEnabledIT(void) +{ + return (uint32_t)(READ_BIT(CMU->CCCR, CMU_CCCR_CCLIE_Msk) == CMU_CCCR_CCLIE_Msk); +} + +/** + * @brief Enable CCL + * @rmtoll CCCR EN FL_CMU_CCL_Enable + * @retval None + */ +__STATIC_INLINE void FL_CMU_CCL_Enable(void) +{ + SET_BIT(CMU->CCCR, CMU_CCCR_EN_Msk); +} + +/** + * @brief Get CCL Enable Status + * @rmtoll CCCR EN FL_CMU_CCL_IsEnabled + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CMU_CCL_IsEnabled(void) +{ + return (uint32_t)(READ_BIT(CMU->CCCR, CMU_CCCR_EN_Msk) == CMU_CCCR_EN_Msk); +} + +/** + * @brief Disable CCL + * @rmtoll CCCR EN FL_CMU_CCL_Disable + * @retval None + */ +__STATIC_INLINE void FL_CMU_CCL_Disable(void) +{ + CLEAR_BIT(CMU->CCCR, CMU_CCCR_EN_Msk); +} + +/** + * @brief Set CCL Calibration Clock Prescaler + * @rmtoll CCFR CALPSC FL_CMU_CCL_SetCalibrationClockPrescaler + * @param prescaler This parameter can be one of the following values: + * @arg @ref FL_CMU_CCL_CALCLK_PSC_DIV1 + * @arg @ref FL_CMU_CCL_CALCLK_PSC_DIV2 + * @arg @ref FL_CMU_CCL_CALCLK_PSC_DIV4 + * @arg @ref FL_CMU_CCL_CALCLK_PSC_DIV8 + * @retval None + */ +__STATIC_INLINE void FL_CMU_CCL_SetCalibrationClockPrescaler(uint32_t prescaler) +{ + MODIFY_REG(CMU->CCFR, CMU_CCFR_CALPSC_Msk, prescaler); +} + +/** + * @brief Get CCL Calibration Clock Prescaler + * @rmtoll CCFR CALPSC FL_CMU_CCL_GetCalibrationClockPrescaler + * @retval Returned value can be one of the following values: + * @arg @ref FL_CMU_CCL_CALCLK_PSC_DIV1 + * @arg @ref FL_CMU_CCL_CALCLK_PSC_DIV2 + * @arg @ref FL_CMU_CCL_CALCLK_PSC_DIV4 + * @arg @ref FL_CMU_CCL_CALCLK_PSC_DIV8 + */ +__STATIC_INLINE uint32_t FL_CMU_CCL_GetCalibrationClockPrescaler(void) +{ + return (uint32_t)(READ_BIT(CMU->CCFR, CMU_CCFR_CALPSC_Msk)); +} + +/** + * @brief Set CCL Reference Clock Prescaler + * @rmtoll CCFR REFPSC FL_CMU_CCL_SetReferenceClockPrescaler + * @param prescaler This parameter can be one of the following values: + * @arg @ref FL_CMU_CCL_REFCLK_PSC_DIV8 + * @arg @ref FL_CMU_CCL_REFCLK_PSC_DIV16 + * @arg @ref FL_CMU_CCL_REFCLK_PSC_DIV32 + * @arg @ref FL_CMU_CCL_REFCLK_PSC_DIV64 + * @retval None + */ +__STATIC_INLINE void FL_CMU_CCL_SetReferenceClockPrescaler(uint32_t prescaler) +{ + MODIFY_REG(CMU->CCFR, CMU_CCFR_REFPSC_Msk, prescaler); +} + +/** + * @brief Get CCL Reference Clock Prescaler + * @rmtoll CCFR REFPSC FL_CMU_CCL_GetReferenceClockPrescaler + * @retval Returned value can be one of the following values: + * @arg @ref FL_CMU_CCL_REFCLK_PSC_DIV8 + * @arg @ref FL_CMU_CCL_REFCLK_PSC_DIV16 + * @arg @ref FL_CMU_CCL_REFCLK_PSC_DIV32 + * @arg @ref FL_CMU_CCL_REFCLK_PSC_DIV64 + */ +__STATIC_INLINE uint32_t FL_CMU_CCL_GetReferenceClockPrescaler(void) +{ + return (uint32_t)(READ_BIT(CMU->CCFR, CMU_CCFR_REFPSC_Msk)); +} + +/** + * @brief Set CCL Calibration Clock Source + * @rmtoll CCFR CALSEL FL_CMU_CCL_SetCalibrationClockSource + * @param clock This parameter can be one of the following values: + * @arg @ref FL_CMU_CCL_CALCLK_SOURCE_RCHF + * @arg @ref FL_CMU_CCL_CALCLK_SOURCE_RCLF + * @arg @ref FL_CMU_CCL_CALCLK_SOURCE_XTHF + * @retval None + */ +__STATIC_INLINE void FL_CMU_CCL_SetCalibrationClockSource(uint32_t clock) +{ + MODIFY_REG(CMU->CCFR, CMU_CCFR_CALSEL_Msk, clock); +} + +/** + * @brief Get CCL Calibration Clock Source Setting + * @rmtoll CCFR CALSEL FL_CMU_CCL_GetCalibrationClockSource + * @retval Returned value can be one of the following values: + * @arg @ref FL_CMU_CCL_CALCLK_SOURCE_RCHF + * @arg @ref FL_CMU_CCL_CALCLK_SOURCE_RCLF + * @arg @ref FL_CMU_CCL_CALCLK_SOURCE_XTHF + */ +__STATIC_INLINE uint32_t FL_CMU_CCL_GetCalibrationClockSource(void) +{ + return (uint32_t)(READ_BIT(CMU->CCFR, CMU_CCFR_CALSEL_Msk)); +} + +/** + * @brief Set CCL Reference Clock Source + * @rmtoll CCFR REFSEL FL_CMU_CCL_SetReferenceClockSource + * @param clock This parameter can be one of the following values: + * @arg @ref FL_CMU_CCL_REFCLK_SOURCE_XTLF + * @arg @ref FL_CMU_CCL_REFCLK_SOURCE_RCLP + * @retval None + */ +__STATIC_INLINE void FL_CMU_CCL_SetReferenceClockSource(uint32_t clock) +{ + MODIFY_REG(CMU->CCFR, CMU_CCFR_REFSEL_Msk, clock); +} + +/** + * @brief Get CCL Reference Clock Source Setting + * @rmtoll CCFR REFSEL FL_CMU_CCL_GetReferenceClockSource + * @retval Returned value can be one of the following values: + * @arg @ref FL_CMU_CCL_REFCLK_SOURCE_XTLF + * @arg @ref FL_CMU_CCL_REFCLK_SOURCE_RCLP + */ +__STATIC_INLINE uint32_t FL_CMU_CCL_GetReferenceClockSource(void) +{ + return (uint32_t)(READ_BIT(CMU->CCFR, CMU_CCFR_REFSEL_Msk)); +} + +/** + * @brief Get CCL Counter value + * @rmtoll CCNR CCNT FL_CMU_CCL_ReadCounter + * @retval + */ +__STATIC_INLINE uint32_t FL_CMU_CCL_ReadCounter(void) +{ + return (uint32_t)(READ_BIT(CMU->CCNR, (0xffffU << 0U)) >> 0U); +} + +/** + * @brief Get CCL interrupt flag + * @rmtoll CCISR CCLIF FL_CMU_IsActiveFlag_CCLComplete + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CMU_IsActiveFlag_CCLComplete(void) +{ + return (uint32_t)(READ_BIT(CMU->CCISR, CMU_CCISR_CCLIF_Msk) == (CMU_CCISR_CCLIF_Msk)); +} + +/** + * @brief Clear CCL interrupt flag + * @rmtoll CCISR CCLIF FL_CMU_ClearFlag_CCLComplete + * @retval None + */ +__STATIC_INLINE void FL_CMU_ClearFlag_CCLComplete(void) +{ + WRITE_REG(CMU->CCISR, CMU_CCISR_CCLIF_Msk); +} + +/** + * @} + */ + +/** @defgroup CMU_FL_EF_QUERY Clock frequency query functions + * @{ + */ + +uint32_t FL_CMU_GetPLLClockFreq(void); +uint32_t FL_CMU_GetRCHFClockFreq(void); +uint32_t FL_CMU_GetRCLFClockFreq(void); +uint32_t FL_CMU_GetSystemClockFreq(void); +uint32_t FL_CMU_GetAPBClockFreq(void); +uint32_t FL_CMU_GetAHBClockFreq(void); + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif /* __FM33LG0XX_FL_CMU_H*/ + +/*************************Py_Code_Generator Version: 0.1-0.14-0.1 @ 2020-10-20*************************/ +/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/ diff --git a/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_comp.h b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_comp.h new file mode 100644 index 0000000..f08eca9 --- /dev/null +++ b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_comp.h @@ -0,0 +1,1135 @@ + /** + ******************************************************************************************************* + * @file fm33lg0xx_fl_comp.h + * @author FMSH Application Team + * @brief Head file of COMP FL Module + ******************************************************************************************************* + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + + + +/* Define to prevent recursive inclusion---------------------------------------------------------------*/ +#ifndef __FM33LG0XX_FL_COMP_H +#define __FM33LG0XX_FL_COMP_H + +#ifdef __cplusplus +extern "C" { +#endif +/* Includes -------------------------------------------------------------------------------------------*/ +#include "fm33lg0xx_fl_def.h" +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @defgroup COMP COMP + * @brief COMP FL driver + * @{ + */ + +/* Exported types -------------------------------------------------------------------------------------*/ +/** @defgroup COMP_FL_ES_INIT COMP Exported Init structures + * @{ + */ + +/** + * @brief FL COMP Init Sturcture definition + */ +typedef struct +{ + /** 比较器正向输入选择 */ + uint32_t positiveInput; + /** 比较器反向输入选择 */ + uint32_t negativeInput; + /** 结果输出极性 */ + uint32_t polarity; + /** 中断触发边沿选择 */ + uint32_t edge; + /** 数字滤波器使能 */ + uint32_t digitalFilter; + /** 数字滤波器长度 */ + uint32_t digitalFilterLen; +} FL_COMP_InitTypeDef; +/** + * @} + */ +/* Exported constants ---------------------------------------------------------------------------------*/ +/** @defgroup COMP_FL_Exported_Constants COMP Exported Constants + * @{ + */ + +#define COMP_CR_TRGOEN_Pos (24U) +#define COMP_CR_TRGOEN_Msk (0x1U << COMP_CR_TRGOEN_Pos) +#define COMP_CR_TRGOEN COMP_CR_TRGOEN_Msk + +#define COMP_CR_DFLEN_Pos (19U) +#define COMP_CR_DFLEN_Msk (0x1fU << COMP_CR_DFLEN_Pos) +#define COMP_CR_DFLEN COMP_CR_DFLEN_Msk + +#define COMP_CR_WINMODE_Pos (18U) +#define COMP_CR_WINMODE_Msk (0x1U << COMP_CR_WINMODE_Pos) +#define COMP_CR_WINMODE COMP_CR_WINMODE_Msk + +#define COMP_CR_POLAR_Pos (17U) +#define COMP_CR_POLAR_Msk (0x1U << COMP_CR_POLAR_Pos) +#define COMP_CR_POLAR COMP_CR_POLAR_Msk + +#define COMP_CR_DFEN_Pos (16U) +#define COMP_CR_DFEN_Msk (0x1U << COMP_CR_DFEN_Pos) +#define COMP_CR_DFEN COMP_CR_DFEN_Msk + +#define COMP_CR_MODE_Pos (14U) +#define COMP_CR_MODE_Msk (0x3U << COMP_CR_MODE_Pos) +#define COMP_CR_MODE COMP_CR_MODE_Msk + +#define COMP_CR_CMPO_Pos (8U) +#define COMP_CR_CMPO_Msk (0x1U << COMP_CR_CMPO_Pos) +#define COMP_CR_CMPO COMP_CR_CMPO_Msk + +#define COMP_CR_VPSEL_Pos (4U) +#define COMP_CR_VPSEL_Msk (0x7U << COMP_CR_VPSEL_Pos) +#define COMP_CR_VPSEL COMP_CR_VPSEL_Msk + +#define COMP_CR_VNSEL_Pos (1U) +#define COMP_CR_VNSEL_Msk (0x7U << COMP_CR_VNSEL_Pos) +#define COMP_CR_VNSEL COMP_CR_VNSEL_Msk + +#define COMP_CR_CMPEN_Pos (0U) +#define COMP_CR_CMPEN_Msk (0x1U << COMP_CR_CMPEN_Pos) +#define COMP_CR_CMPEN COMP_CR_CMPEN_Msk + +#define COMP_ICR_OWW_IE_Pos (25U) +#define COMP_ICR_OWW_IE_Msk (0x1U << COMP_ICR_OWW_IE_Pos) +#define COMP_ICR_OWW_IE COMP_ICR_OWW_IE_Msk + +#define COMP_ICR_WIN_IE_Pos (24U) +#define COMP_ICR_WIN_IE_Msk (0x1U << COMP_ICR_WIN_IE_Pos) +#define COMP_ICR_WIN_IE COMP_ICR_WIN_IE_Msk + +#define COMP_ICR_CMP3SEL_Pos (18U) +#define COMP_ICR_CMP3SEL_Msk (0x3U << COMP_ICR_CMP3SEL_Pos) +#define COMP_ICR_CMP3SEL COMP_ICR_CMP3SEL_Msk + +#define COMP_ICR_CMP3IE_Pos (16U) +#define COMP_ICR_CMP3IE_Msk (0x1U << COMP_ICR_CMP3IE_Pos) +#define COMP_ICR_CMP3IE COMP_ICR_CMP3IE_Msk + +#define COMP_ICR_CMP2SEL_Pos (10U) +#define COMP_ICR_CMP2SEL_Msk (0x3U << COMP_ICR_CMP2SEL_Pos) +#define COMP_ICR_CMP2SEL COMP_ICR_CMP2SEL_Msk + +#define COMP_ICR_CMP2IE_Pos (8U) +#define COMP_ICR_CMP2IE_Msk (0x1U << COMP_ICR_CMP2IE_Pos) +#define COMP_ICR_CMP2IE COMP_ICR_CMP2IE_Msk + +#define COMP_ICR_CMP1SEL_Pos (2U) +#define COMP_ICR_CMP1SEL_Msk (0x3U << COMP_ICR_CMP1SEL_Pos) +#define COMP_ICR_CMP1SEL COMP_ICR_CMP1SEL_Msk + +#define COMP_ICR_CMP1IE_Pos (0U) +#define COMP_ICR_CMP1IE_Msk (0x1U << COMP_ICR_CMP1IE_Pos) +#define COMP_ICR_CMP1IE COMP_ICR_CMP1IE_Msk + +#define COMP_ISR_OOW_IF_Pos (4U) +#define COMP_ISR_OOW_IF_Msk (0x1U << COMP_ISR_OOW_IF_Pos) +#define COMP_ISR_OOW_IF COMP_ISR_OOW_IF_Msk + +#define COMP_ISR_WIN_IF_Pos (3U) +#define COMP_ISR_WIN_IF_Msk (0x1U << COMP_ISR_WIN_IF_Pos) +#define COMP_ISR_WIN_IF COMP_ISR_WIN_IF_Msk + +#define COMP_ISR_CMP3IF_Pos (2U) +#define COMP_ISR_CMP3IF_Msk (0x1U << COMP_ISR_CMP3IF_Pos) +#define COMP_ISR_CMP3IF COMP_ISR_CMP3IF_Msk + +#define COMP_ISR_CMP2IF_Pos (1U) +#define COMP_ISR_CMP2IF_Msk (0x1U << COMP_ISR_CMP2IF_Pos) +#define COMP_ISR_CMP2IF COMP_ISR_CMP2IF_Msk + +#define COMP_ISR_CMP1IF_Pos (0U) +#define COMP_ISR_CMP1IF_Msk (0x1U << COMP_ISR_CMP1IF_Pos) +#define COMP_ISR_CMP1IF COMP_ISR_CMP1IF_Msk + +#define COMP_BUFCR_BUFBYP_Pos (2U) +#define COMP_BUFCR_BUFBYP_Msk (0x1U << COMP_BUFCR_BUFBYP_Pos) +#define COMP_BUFCR_BUFBYP COMP_BUFCR_BUFBYP_Msk + +#define COMP_BUFCR_BUFSEL_Pos (1U) +#define COMP_BUFCR_BUFSEL_Msk (0x1U << COMP_BUFCR_BUFSEL_Pos) +#define COMP_BUFCR_BUFSEL COMP_BUFCR_BUFSEL_Msk + +#define COMP_BUFCR_BUFENB_Pos (0U) +#define COMP_BUFCR_BUFENB_Msk (0x1U << COMP_BUFCR_BUFENB_Pos) +#define COMP_BUFCR_BUFENB COMP_BUFCR_BUFENB_Msk + + + + + + +#define FL_COMP_OUTPUT_FILTER_WINDOW_3APBCLK (0x0U << COMP_CR_DFLEN_Pos) +#define FL_COMP_OUTPUT_FILTER_WINDOW_4APBCLK (0x3U << COMP_CR_DFLEN_Pos) +#define FL_COMP_OUTPUT_FILTER_WINDOW_5APBCLK (0x4U << COMP_CR_DFLEN_Pos) +#define FL_COMP_OUTPUT_FILTER_WINDOW_6APBCLK (0x5U << COMP_CR_DFLEN_Pos) +#define FL_COMP_OUTPUT_FILTER_WINDOW_7APBCLK (0x6U << COMP_CR_DFLEN_Pos) +#define FL_COMP_OUTPUT_FILTER_WINDOW_8APBCLK (0x7U << COMP_CR_DFLEN_Pos) +#define FL_COMP_OUTPUT_FILTER_WINDOW_9APBCLK (0x8U << COMP_CR_DFLEN_Pos) +#define FL_COMP_OUTPUT_FILTER_WINDOW_10APBCLK (0x9U << COMP_CR_DFLEN_Pos) +#define FL_COMP_OUTPUT_FILTER_WINDOW_11APBCLK (0xaU << COMP_CR_DFLEN_Pos) +#define FL_COMP_OUTPUT_FILTER_WINDOW_12APBCLK (0xbU << COMP_CR_DFLEN_Pos) +#define FL_COMP_OUTPUT_FILTER_WINDOW_13APBCLK (0xcU << COMP_CR_DFLEN_Pos) +#define FL_COMP_OUTPUT_FILTER_WINDOW_14APBCLK (0xdU << COMP_CR_DFLEN_Pos) +#define FL_COMP_OUTPUT_FILTER_WINDOW_15APBCLK (0xeU << COMP_CR_DFLEN_Pos) +#define FL_COMP_OUTPUT_FILTER_WINDOW_16APBCLK (0xfU << COMP_CR_DFLEN_Pos) +#define FL_COMP_OUTPUT_FILTER_WINDOW_17APBCLK (0x10U << COMP_CR_DFLEN_Pos) +#define FL_COMP_OUTPUT_FILTER_WINDOW_18APBCLK (0x11U << COMP_CR_DFLEN_Pos) +#define FL_COMP_OUTPUT_FILTER_WINDOW_19APBCLK (0x12U << COMP_CR_DFLEN_Pos) +#define FL_COMP_OUTPUT_FILTER_WINDOW_20APBCLK (0x13U << COMP_CR_DFLEN_Pos) +#define FL_COMP_OUTPUT_FILTER_WINDOW_21APBCLK (0x14U << COMP_CR_DFLEN_Pos) +#define FL_COMP_OUTPUT_FILTER_WINDOW_22APBCLK (0x15U << COMP_CR_DFLEN_Pos) +#define FL_COMP_OUTPUT_FILTER_WINDOW_23APBCLK (0x16U << COMP_CR_DFLEN_Pos) +#define FL_COMP_OUTPUT_FILTER_WINDOW_24APBCLK (0x17U << COMP_CR_DFLEN_Pos) +#define FL_COMP_OUTPUT_FILTER_WINDOW_25APBCLK (0x18U << COMP_CR_DFLEN_Pos) +#define FL_COMP_OUTPUT_FILTER_WINDOW_26APBCLK (0x19U << COMP_CR_DFLEN_Pos) +#define FL_COMP_OUTPUT_FILTER_WINDOW_27APBCLK (0x1aU << COMP_CR_DFLEN_Pos) +#define FL_COMP_OUTPUT_FILTER_WINDOW_28APBCLK (0x1bU << COMP_CR_DFLEN_Pos) +#define FL_COMP_OUTPUT_FILTER_WINDOW_29APBCLK (0x1cU << COMP_CR_DFLEN_Pos) +#define FL_COMP_OUTPUT_FILTER_WINDOW_30APBCLK (0x1dU << COMP_CR_DFLEN_Pos) +#define FL_COMP_OUTPUT_FILTER_WINDOW_31APBCLK (0x1eU << COMP_CR_DFLEN_Pos) +#define FL_COMP_OUTPUT_FILTER_WINDOW_32APBCLK (0x1fU << COMP_CR_DFLEN_Pos) + + +#define FL_COMP_OUTPUT_POLARITY_NORMAL (0x0U << COMP_CR_POLAR_Pos) +#define FL_COMP_OUTPUT_POLARITY_INVERT (0x1U << COMP_CR_POLAR_Pos) + + +#define FL_COMP_POWER_MODE_LOW (0x0U << COMP_CR_MODE_Pos) +#define FL_COMP_POWER_MODE_MEDIUM (0x1U << COMP_CR_MODE_Pos) +#define FL_COMP_POWER_MODE_HIGH (0x2U << COMP_CR_MODE_Pos) + + +#define FL_COMP_OUTPUT_LOW (0x0U << COMP_CR_CMPO_Pos) +#define FL_COMP_OUTPUT_HIGH (0x1U << COMP_CR_CMPO_Pos) + +#define FL_COMP_INP_SOURCE_INP1 (0x0U << COMP_CR_VPSEL_Pos) +#define FL_COMP_INP_SOURCE_INP2 (0x1U << COMP_CR_VPSEL_Pos) +#define FL_COMP_INP_SOURCE_AVREF (0x2U << COMP_CR_VPSEL_Pos) +#define FL_COMP_INP_SOURCE_ULPBG_REF (0x3U << COMP_CR_VPSEL_Pos) +#define FL_COMP_INP_SOURCE_VDD15 (0x4U << COMP_CR_VPSEL_Pos) +#define FL_COMP_INP_SOURCE_VREFP (0x5U << COMP_CR_VPSEL_Pos) + + +#define FL_COMP_INN_SOURCE_INN1 (0x0U << COMP_CR_VNSEL_Pos) +#define FL_COMP_INN_SOURCE_INN2 (0x1U << COMP_CR_VNSEL_Pos) +#define FL_COMP_INN_SOURCE_VREF (0x2U << COMP_CR_VNSEL_Pos) +#define FL_COMP_INN_SOURCE_VREF_DIV_2 (0x3U << COMP_CR_VNSEL_Pos) +#define FL_COMP_INN_SOURCE_VREFP (0x4U << COMP_CR_VNSEL_Pos) +#define FL_COMP_INN_SOURCE_DAC (0x5U << COMP_CR_VNSEL_Pos) + + +#define FL_COMP_COMP3_INTERRUPT_EDGE_BOTH (0x0U << COMP_ICR_CMP3SEL_Pos) +#define FL_COMP_COMP3_INTERRUPT_EDGE_RISING (0x1U << COMP_ICR_CMP3SEL_Pos) +#define FL_COMP_COMP3_INTERRUPT_EDGE_FALLING (0x2U << COMP_ICR_CMP3SEL_Pos) + + +#define FL_COMP_COMP2_INTERRUPT_EDGE_BOTH (0x0U << COMP_ICR_CMP2SEL_Pos) +#define FL_COMP_COMP2_INTERRUPT_EDGE_RISING (0x1U << COMP_ICR_CMP2SEL_Pos) +#define FL_COMP_COMP2_INTERRUPT_EDGE_FALLING (0x2U << COMP_ICR_CMP2SEL_Pos) + + +#define FL_COMP_COMP1_INTERRUPT_EDGE_BOTH (0x0U << COMP_ICR_CMP1SEL_Pos) +#define FL_COMP_COMP1_INTERRUPT_EDGE_RISING (0x1U << COMP_ICR_CMP1SEL_Pos) +#define FL_COMP_COMP1_INTERRUPT_EDGE_FALLING (0x2U << COMP_ICR_CMP1SEL_Pos) + +#define FL_COMP_INTERRUPT_EDGE_BOTH (0x0U) +#define FL_COMP_INTERRUPT_EDGE_RISING (0x1U) +#define FL_COMP_INTERRUPT_EDGE_FALLING (0x2U) + +#define FL_COMP_BUFF_REFERENCE_AVREF (0x0U << COMP_BUFCR_BUFSEL_Pos) +#define FL_COMP_BUFF_REFERENCE_VREF1P2 (0x1U << COMP_BUFCR_BUFSEL_Pos) + + +/** + * @} + */ +/* Exported functions ---------------------------------------------------------------------------------*/ +/** @defgroup COMP_FL_Exported_Functions COMP Exported Functions + * @{ + */ + +/** + * @brief COMPx trigger output enable + * @rmtoll CR TRGOEN FL_COMP_EnableTriggerOutput + * @param COMPx COMP instance + * @retval None + */ +__STATIC_INLINE void FL_COMP_EnableTriggerOutput(COMP_Type *COMPx) +{ + SET_BIT(COMPx->CR, COMP_CR_TRGOEN_Msk); +} + +/** + * @brief Get COMPx trigger output enable status + * @rmtoll CR TRGOEN FL_COMP_IsEnabledTriggerOutput + * @param COMPx COMP instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_COMP_IsEnabledTriggerOutput(COMP_Type *COMPx) +{ + return (uint32_t)(READ_BIT(COMPx->CR, COMP_CR_TRGOEN_Msk) == COMP_CR_TRGOEN_Msk); +} + +/** + * @brief COMPx trigger output disable + * @rmtoll CR TRGOEN FL_COMP_DisableTriggerOutput + * @param COMPx COMP instance + * @retval None + */ +__STATIC_INLINE void FL_COMP_DisableTriggerOutput(COMP_Type *COMPx) +{ + CLEAR_BIT(COMPx->CR, COMP_CR_TRGOEN_Msk); +} + +/** + * @brief Set COMPx Output Digital Filter Length + * @rmtoll CR DFLEN FL_COMP_SetOutputFilterWindow + * @param COMPx COMP instance + * @param length This parameter can be one of the following values: + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_3APBCLK + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_4APBCLK + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_5APBCLK + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_6APBCLK + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_7APBCLK + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_8APBCLK + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_9APBCLK + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_10APBCLK + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_11APBCLK + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_12APBCLK + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_13APBCLK + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_14APBCLK + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_15APBCLK + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_16APBCLK + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_17APBCLK + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_18APBCLK + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_19APBCLK + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_20APBCLK + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_21APBCLK + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_22APBCLK + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_23APBCLK + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_24APBCLK + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_25APBCLK + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_26APBCLK + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_27APBCLK + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_28APBCLK + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_29APBCLK + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_30APBCLK + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_31APBCLK + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_32APBCLK + * @retval None + */ +__STATIC_INLINE void FL_COMP_SetOutputFilterWindow(COMP_Type *COMPx, uint32_t length) +{ + MODIFY_REG(COMPx->CR, COMP_CR_DFLEN_Msk, length); +} + +/** + * @brief Get COMPx Output Digital Filter Length + * @rmtoll CR DFLEN FL_COMP_GetOutputFilterWindow + * @param COMPx COMP instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_3APBCLK + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_4APBCLK + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_5APBCLK + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_6APBCLK + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_7APBCLK + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_8APBCLK + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_9APBCLK + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_10APBCLK + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_11APBCLK + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_12APBCLK + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_13APBCLK + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_14APBCLK + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_15APBCLK + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_16APBCLK + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_17APBCLK + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_18APBCLK + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_19APBCLK + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_20APBCLK + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_21APBCLK + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_22APBCLK + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_23APBCLK + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_24APBCLK + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_25APBCLK + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_26APBCLK + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_27APBCLK + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_28APBCLK + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_29APBCLK + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_30APBCLK + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_31APBCLK + * @arg @ref FL_COMP_OUTPUT_FILTER_WINDOW_32APBCLK + */ +__STATIC_INLINE uint32_t FL_COMP_GetOutputFilterWindow(COMP_Type *COMPx) +{ + return (uint32_t)(READ_BIT(COMPx->CR, COMP_CR_DFLEN_Msk)); +} + +/** + * @brief COMPx Window Mode enable + * @rmtoll CR WINMODE FL_COMP_EnableWindowMode + * @param COMPx COMP instance + * @retval None + */ +__STATIC_INLINE void FL_COMP_EnableWindowMode(COMP_Type *COMPx) +{ + SET_BIT(COMPx->CR, COMP_CR_WINMODE_Msk); +} + +/** + * @brief Get COMPx Window Mode enable status + * @rmtoll CR WINMODE FL_COMP_IsEnabledWindowMode + * @param COMPx COMP instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_COMP_IsEnabledWindowMode(COMP_Type *COMPx) +{ + return (uint32_t)(READ_BIT(COMPx->CR, COMP_CR_WINMODE_Msk) == COMP_CR_WINMODE_Msk); +} + +/** + * @brief COMPx Window Mode disable + * @rmtoll CR WINMODE FL_COMP_DisableWindowMode + * @param COMPx COMP instance + * @retval None + */ +__STATIC_INLINE void FL_COMP_DisableWindowMode(COMP_Type *COMPx) +{ + CLEAR_BIT(COMPx->CR, COMP_CR_WINMODE_Msk); +} + +/** + * @brief Set COMPx output polarity + * @rmtoll CR POLAR FL_COMP_SetOutputPolarity + * @param COMPx COMP instance + * @param polarity This parameter can be one of the following values: + * @arg @ref FL_COMP_OUTPUT_POLARITY_NORMAL + * @arg @ref FL_COMP_OUTPUT_POLARITY_INVERT + * @retval None + */ +__STATIC_INLINE void FL_COMP_SetOutputPolarity(COMP_Type *COMPx, uint32_t polarity) +{ + MODIFY_REG(COMPx->CR, COMP_CR_POLAR_Msk, polarity); +} + +/** + * @brief Get COMPx output polarity + * @rmtoll CR POLAR FL_COMP_GetOutputPolarity + * @param COMPx COMP instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_COMP_OUTPUT_POLARITY_NORMAL + * @arg @ref FL_COMP_OUTPUT_POLARITY_INVERT + */ +__STATIC_INLINE uint32_t FL_COMP_GetOutputPolarity(COMP_Type *COMPx) +{ + return (uint32_t)(READ_BIT(COMPx->CR, COMP_CR_POLAR_Msk)); +} + +/** + * @brief COMPx DigitalFilter enable + * @rmtoll CR DFEN FL_COMP_EnableOutputFilter + * @param COMPx COMP instance + * @retval None + */ +__STATIC_INLINE void FL_COMP_EnableOutputFilter(COMP_Type *COMPx) +{ + SET_BIT(COMPx->CR, COMP_CR_DFEN_Msk); +} + +/** + * @brief Get COMPx DigitalFilter enable status + * @rmtoll CR DFEN FL_COMP_IsEnabledOutputFilter + * @param COMPx COMP instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_COMP_IsEnabledOutputFilter(COMP_Type *COMPx) +{ + return (uint32_t)(READ_BIT(COMPx->CR, COMP_CR_DFEN_Msk) == COMP_CR_DFEN_Msk); +} + +/** + * @brief COMPx DigitalFilter disable + * @rmtoll CR DFEN FL_COMP_DisableOutputFilter + * @param COMPx COMP instance + * @retval None + */ +__STATIC_INLINE void FL_COMP_DisableOutputFilter(COMP_Type *COMPx) +{ + CLEAR_BIT(COMPx->CR, COMP_CR_DFEN_Msk); +} + +/** + * @brief Set COMPx Power mode + * @rmtoll CR MODE FL_COMP_SetPowerMode + * @param COMPx COMP instance + * @param mode This parameter can be one of the following values: + * @arg @ref FL_COMP_POWER_MODE_LOW + * @arg @ref FL_COMP_POWER_MODE_MEDIUM + * @arg @ref FL_COMP_POWER_MODE_HIGH + * @retval None + */ +__STATIC_INLINE void FL_COMP_SetPowerMode(COMP_Type *COMPx, uint32_t mode) +{ + MODIFY_REG(COMPx->CR, COMP_CR_MODE_Msk, mode); +} + +/** + * @brief Get COMPx Power mode + * @rmtoll CR MODE FL_COMP_GetPowerMode + * @param COMPx COMP instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_COMP_POWER_MODE_LOW + * @arg @ref FL_COMP_POWER_MODE_MEDIUM + * @arg @ref FL_COMP_POWER_MODE_HIGH + */ +__STATIC_INLINE uint32_t FL_COMP_GetPowerMode(COMP_Type *COMPx) +{ + return (uint32_t)(READ_BIT(COMPx->CR, COMP_CR_MODE_Msk)); +} + +/** + * @brief Get comparator output channel + * @rmtoll CR CMPO FL_COMP_GetOutput + * @param COMPx COMP instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_COMP_OUTPUT_LOW + * @arg @ref FL_COMP_OUTPUT_HIGH + */ +__STATIC_INLINE uint32_t FL_COMP_GetOutput(COMP_Type *COMPx) +{ + return (uint32_t)(READ_BIT(COMPx->CR, COMP_CR_CMPO_Msk)); +} + +/** + * @brief Set COMPx positive input + * @rmtoll CR VPSEL FL_COMP_SetINPSource + * @param COMPx COMP instance + * @param source This parameter can be one of the following values: + * @arg @ref FL_COMP_INP_SOURCE_INP1 + * @arg @ref FL_COMP_INP_SOURCE_INP2 + * @arg @ref FL_COMP_INP_SOURCE_AVREF + * @arg @ref FL_COMP_INP_SOURCE_ULPBG_AREF + * @arg @ref FL_COMP_INP_SOURCE_VDD15 + * @arg @ref FL_COMP_INP_SOURCE_VREFP + * @retval None + */ +__STATIC_INLINE void FL_COMP_SetINPSource(COMP_Type *COMPx, uint32_t source) +{ + MODIFY_REG(COMPx->CR, COMP_CR_VPSEL_Msk, source); +} + +/** + * @brief Get COMPx positive input status + * @rmtoll CR VPSEL FL_COMP_GetINPSource + * @param COMPx COMP instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_COMP_INP_SOURCE_INP1 + * @arg @ref FL_COMP_INP_SOURCE_INP2 + * @arg @ref FL_COMP_INP_SOURCE_AVREF + * @arg @ref FL_COMP_INP_SOURCE_ULPBG_AREF + * @arg @ref FL_COMP_INP_SOURCE_VDD15 + * @arg @ref FL_COMP_INP_SOURCE_VREFP + */ +__STATIC_INLINE uint32_t FL_COMP_GetINPSource(COMP_Type *COMPx) +{ + return (uint32_t)(READ_BIT(COMPx->CR, COMP_CR_VPSEL_Msk)); +} + +/** + * @brief Set COMPx negative input + * @rmtoll CR VNSEL FL_COMP_SetINNSource + * @param COMPx COMP instance + * @param source This parameter can be one of the following values: + * @arg @ref FL_COMP_INN_SOURCE_INN1 + * @arg @ref FL_COMP_INN_SOURCE_INN2 + * @arg @ref FL_COMP_INN_SOURCE_VREF + * @arg @ref FL_COMP_INN_SOURCE_VREF_DIV_2 + * @arg @ref FL_COMP_INN_SOURCE_VREFP + * @arg @ref FL_COMP_INN_SOURCE_DAC + * @retval None + */ +__STATIC_INLINE void FL_COMP_SetINNSource(COMP_Type *COMPx, uint32_t source) +{ + MODIFY_REG(COMPx->CR, COMP_CR_VNSEL_Msk, source); +} + +/** + * @brief Get COMPx negative input status + * @rmtoll CR VNSEL FL_COMP_GetINNSource + * @param COMPx COMP instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_COMP_INN_SOURCE_INN1 + * @arg @ref FL_COMP_INN_SOURCE_INN2 + * @arg @ref FL_COMP_INN_SOURCE_VREF + * @arg @ref FL_COMP_INN_SOURCE_VREF_DIV_2 + * @arg @ref FL_COMP_INN_SOURCE_VREFP + * @arg @ref FL_COMP_INN_SOURCE_DAC + */ +__STATIC_INLINE uint32_t FL_COMP_GetINNSource(COMP_Type *COMPx) +{ + return (uint32_t)(READ_BIT(COMPx->CR, COMP_CR_VNSEL_Msk)); +} + +/** + * @brief COMPx enable + * @rmtoll CR CMPEN FL_COMP_Enable + * @param COMPx COMP instance + * @retval None + */ +__STATIC_INLINE void FL_COMP_Enable(COMP_Type *COMPx) +{ + SET_BIT(COMPx->CR, COMP_CR_CMPEN_Msk); +} + +/** + * @brief Get COMPx enable status + * @rmtoll CR CMPEN FL_COMP_IsEnabled + * @param COMPx COMP instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_COMP_IsEnabled(COMP_Type *COMPx) +{ + return (uint32_t)(READ_BIT(COMPx->CR, COMP_CR_CMPEN_Msk) == COMP_CR_CMPEN_Msk); +} + +/** + * @brief COMPx disable + * @rmtoll CR CMPEN FL_COMP_Disable + * @param COMPx COMP instance + * @retval None + */ +__STATIC_INLINE void FL_COMP_Disable(COMP_Type *COMPx) +{ + CLEAR_BIT(COMPx->CR, COMP_CR_CMPEN_Msk); +} + +/** + * @brief Comparator Out Of Window interrupt enable + * @rmtoll ICR OWW_IE FL_COMP_EnableIT_OutOfWindow + * @param COMPx COMP instance + * @retval None + */ +__STATIC_INLINE void FL_COMP_EnableIT_OutOfWindow(COMP_COMMON_Type *COMPx) +{ + SET_BIT(COMPx->ICR, COMP_ICR_OWW_IE_Msk); +} + +/** + * @brief Get Comparator Out Of Window interrupt enable status + * @rmtoll ICR OWW_IE FL_COMP_IsEnabledIT_OutOfWindow + * @param COMPx COMP instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_COMP_IsEnabledIT_OutOfWindow(COMP_COMMON_Type *COMPx) +{ + return (uint32_t)(READ_BIT(COMPx->ICR, COMP_ICR_OWW_IE_Msk) == COMP_ICR_OWW_IE_Msk); +} + +/** + * @brief Comparator Out Of Window interrupt disable + * @rmtoll ICR OWW_IE FL_COMP_DisableIT_OutOfWindow + * @param COMPx COMP instance + * @retval None + */ +__STATIC_INLINE void FL_COMP_DisableIT_OutOfWindow(COMP_COMMON_Type *COMPx) +{ + CLEAR_BIT(COMPx->ICR, COMP_ICR_OWW_IE_Msk); +} + +/** + * @brief Comparator Across Window interrupt enable + * @rmtoll ICR WIN_IE FL_COMP_EnableIT_AcrossWindowThreshold + * @param COMPx COMP instance + * @retval None + */ +__STATIC_INLINE void FL_COMP_EnableIT_AcrossWindowThreshold(COMP_COMMON_Type *COMPx) +{ + SET_BIT(COMPx->ICR, COMP_ICR_WIN_IE_Msk); +} + +/** + * @brief Get comparator Across Window interrupt enable status + * @rmtoll ICR WIN_IE FL_COMP_IsEnabledIT_AcrossWindowThreshold + * @param COMPx COMP instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_COMP_IsEnabledIT_AcrossWindowThreshold(COMP_COMMON_Type *COMPx) +{ + return (uint32_t)(READ_BIT(COMPx->ICR, COMP_ICR_WIN_IE_Msk) == COMP_ICR_WIN_IE_Msk); +} + +/** + * @brief Comparator Across Window interrupt disable + * @rmtoll ICR WIN_IE FL_COMP_DisableIT_AcrossWindowThreshold + * @param COMPx COMP instance + * @retval None + */ +__STATIC_INLINE void FL_COMP_DisableIT_AcrossWindowThreshold(COMP_COMMON_Type *COMPx) +{ + CLEAR_BIT(COMPx->ICR, COMP_ICR_WIN_IE_Msk); +} + +/** + * @brief Set comparator3 interrupt edge + * @rmtoll ICR CMP3SEL FL_COMP_SetComparator3InterruptEdge + * @param COMPx COMP instance + * @param edge This parameter can be one of the following values: + * @arg @ref FL_COMP_COMP3_INTERRUPT_EDGE_BOTH + * @arg @ref FL_COMP_COMP3_INTERRUPT_EDGE_RISING + * @arg @ref FL_COMP_COMP3_INTERRUPT_EDGE_FALLING + * @retval None + */ +__STATIC_INLINE void FL_COMP_SetComparator3InterruptEdge(COMP_COMMON_Type *COMPx, uint32_t edge) +{ + MODIFY_REG(COMPx->ICR, COMP_ICR_CMP3SEL_Msk, edge); +} + +/** + * @brief Get comparator3 interrupt edge + * @rmtoll ICR CMP3SEL FL_COMP_GetComparator3InterruptEdge + * @param COMPx COMP instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_COMP_COMP3_INTERRUPT_EDGE_BOTH + * @arg @ref FL_COMP_COMP3_INTERRUPT_EDGE_RISING + * @arg @ref FL_COMP_COMP3_INTERRUPT_EDGE_FALLING + */ +__STATIC_INLINE uint32_t FL_COMP_GetComparator3InterruptEdge(COMP_COMMON_Type *COMPx) +{ + return (uint32_t)(READ_BIT(COMPx->ICR, COMP_ICR_CMP3SEL_Msk)); +} + +/** + * @brief Comparator3 interrupt enable + * @rmtoll ICR CMP3IE FL_COMP_EnableIT_Comparator3 + * @param COMPx COMP instance + * @retval None + */ +__STATIC_INLINE void FL_COMP_EnableIT_Comparator3(COMP_COMMON_Type *COMPx) +{ + SET_BIT(COMPx->ICR, COMP_ICR_CMP3IE_Msk); +} + +/** + * @brief Get comparator3 interrupt enable status + * @rmtoll ICR CMP3IE FL_COMP_IsEnabledIT_Comparator3 + * @param COMPx COMP instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_COMP_IsEnabledIT_Comparator3(COMP_COMMON_Type *COMPx) +{ + return (uint32_t)(READ_BIT(COMPx->ICR, COMP_ICR_CMP3IE_Msk) == COMP_ICR_CMP3IE_Msk); +} + +/** + * @brief Comparator3 interrupt disable + * @rmtoll ICR CMP3IE FL_COMP_DisableIT_Comparator3 + * @param COMPx COMP instance + * @retval None + */ +__STATIC_INLINE void FL_COMP_DisableIT_Comparator3(COMP_COMMON_Type *COMPx) +{ + CLEAR_BIT(COMPx->ICR, COMP_ICR_CMP3IE_Msk); +} + +/** + * @brief Set comparator2 interrupt edge + * @rmtoll ICR CMP2SEL FL_COMP_SetComparator2InterruptEdge + * @param COMPx COMP instance + * @param edge This parameter can be one of the following values: + * @arg @ref FL_COMP_COMP2_INTERRUPT_EDGE_BOTH + * @arg @ref FL_COMP_COMP2_INTERRUPT_EDGE_RISING + * @arg @ref FL_COMP_COMP2_INTERRUPT_EDGE_FALLING + * @retval None + */ +__STATIC_INLINE void FL_COMP_SetComparator2InterruptEdge(COMP_COMMON_Type *COMPx, uint32_t edge) +{ + MODIFY_REG(COMPx->ICR, COMP_ICR_CMP2SEL_Msk, edge); +} + +/** + * @brief Get comparator2 interrupt edge + * @rmtoll ICR CMP2SEL FL_COMP_GetComparator2InterruptEdge + * @param COMPx COMP instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_COMP_COMP2_INTERRUPT_EDGE_BOTH + * @arg @ref FL_COMP_COMP2_INTERRUPT_EDGE_RISING + * @arg @ref FL_COMP_COMP2_INTERRUPT_EDGE_FALLING + */ +__STATIC_INLINE uint32_t FL_COMP_GetComparator2InterruptEdge(COMP_COMMON_Type *COMPx) +{ + return (uint32_t)(READ_BIT(COMPx->ICR, COMP_ICR_CMP2SEL_Msk)); +} + +/** + * @brief Comparator2 interrupt enable + * @rmtoll ICR CMP2IE FL_COMP_EnableIT_Comparator2 + * @param COMPx COMP instance + * @retval None + */ +__STATIC_INLINE void FL_COMP_EnableIT_Comparator2(COMP_COMMON_Type *COMPx) +{ + SET_BIT(COMPx->ICR, COMP_ICR_CMP2IE_Msk); +} + +/** + * @brief Get comparator2 interrupt enable status + * @rmtoll ICR CMP2IE FL_COMP_IsEnabledIT_Comparator2 + * @param COMPx COMP instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_COMP_IsEnabledIT_Comparator2(COMP_COMMON_Type *COMPx) +{ + return (uint32_t)(READ_BIT(COMPx->ICR, COMP_ICR_CMP2IE_Msk) == COMP_ICR_CMP2IE_Msk); +} + +/** + * @brief Comparator2 interrupt disable + * @rmtoll ICR CMP2IE FL_COMP_DisableIT_Comparator2 + * @param COMPx COMP instance + * @retval None + */ +__STATIC_INLINE void FL_COMP_DisableIT_Comparator2(COMP_COMMON_Type *COMPx) +{ + CLEAR_BIT(COMPx->ICR, COMP_ICR_CMP2IE_Msk); +} + +/** + * @brief Set comparator1 interrupt edge + * @rmtoll ICR CMP1SEL FL_COMP_SetComparator1InterruptEdge + * @param COMPx COMP instance + * @param edge This parameter can be one of the following values: + * @arg @ref FL_COMP_COMP1_INTERRUPT_EDGE_BOTH + * @arg @ref FL_COMP_COMP1_INTERRUPT_EDGE_RISING + * @arg @ref FL_COMP_COMP1_INTERRUPT_EDGE_FALLING + * @retval None + */ +__STATIC_INLINE void FL_COMP_SetComparator1InterruptEdge(COMP_COMMON_Type *COMPx, uint32_t edge) +{ + MODIFY_REG(COMPx->ICR, COMP_ICR_CMP1SEL_Msk, edge); +} + +/** + * @brief Get comparator1 interrupt edge + * @rmtoll ICR CMP1SEL FL_COMP_GetComparator1InterruptEdge + * @param COMPx COMP instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_COMP_COMP1_INTERRUPT_EDGE_BOTH + * @arg @ref FL_COMP_COMP1_INTERRUPT_EDGE_RISING + * @arg @ref FL_COMP_COMP1_INTERRUPT_EDGE_FALLING + */ +__STATIC_INLINE uint32_t FL_COMP_GetComparator1InterruptEdge(COMP_COMMON_Type *COMPx) +{ + return (uint32_t)(READ_BIT(COMPx->ICR, COMP_ICR_CMP1SEL_Msk)); +} + +/** + * @brief Comparator1 interrupt enable + * @rmtoll ICR CMP1IE FL_COMP_EnableIT_Comparator1 + * @param COMPx COMP instance + * @retval None + */ +__STATIC_INLINE void FL_COMP_EnableIT_Comparator1(COMP_COMMON_Type *COMPx) +{ + SET_BIT(COMPx->ICR, COMP_ICR_CMP1IE_Msk); +} + +/** + * @brief Get comparator1 interrupt enable status + * @rmtoll ICR CMP1IE FL_COMP_IsEnabledIT_Comparator1 + * @param COMPx COMP instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_COMP_IsEnabledIT_Comparator1(COMP_COMMON_Type *COMPx) +{ + return (uint32_t)(READ_BIT(COMPx->ICR, COMP_ICR_CMP1IE_Msk) == COMP_ICR_CMP1IE_Msk); +} + +/** + * @brief Comparator1 interrupt disable + * @rmtoll ICR CMP1IE FL_COMP_DisableIT_Comparator1 + * @param COMPx COMP instance + * @retval None + */ +__STATIC_INLINE void FL_COMP_DisableIT_Comparator1(COMP_COMMON_Type *COMPx) +{ + CLEAR_BIT(COMPx->ICR, COMP_ICR_CMP1IE_Msk); +} + +/** + * @brief Get outof window interrupt flag + * @rmtoll ISR OOW_IF FL_COMP_IsActiveFlag_OutOfWindow + * @param COMPx COMP instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_COMP_IsActiveFlag_OutOfWindow(COMP_COMMON_Type *COMPx) +{ + return (uint32_t)(READ_BIT(COMPx->ISR, COMP_ISR_OOW_IF_Msk) == (COMP_ISR_OOW_IF_Msk)); +} + +/** + * @brief Clear outof window interrupt flag + * @rmtoll ISR OOW_IF FL_COMP_ClearFlag_OutOfWindow + * @param COMPx COMP instance + * @retval None + */ +__STATIC_INLINE void FL_COMP_ClearFlag_OutOfWindow(COMP_COMMON_Type *COMPx) +{ + WRITE_REG(COMPx->ISR, COMP_ISR_OOW_IF_Msk); +} + +/** + * @brief Get across window interrupt flag + * @rmtoll ISR WIN_IF FL_COMP_IsActiveFlag_AcrossWindowThreshold + * @param COMPx COMP instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_COMP_IsActiveFlag_AcrossWindowThreshold(COMP_COMMON_Type *COMPx) +{ + return (uint32_t)(READ_BIT(COMPx->ISR, COMP_ISR_WIN_IF_Msk) == (COMP_ISR_WIN_IF_Msk)); +} + +/** + * @brief Clear across window interrupt flag + * @rmtoll ISR WIN_IF FL_COMP_ClearFlag_AcrossWindowThreshold + * @param COMPx COMP instance + * @retval None + */ +__STATIC_INLINE void FL_COMP_ClearFlag_AcrossWindowThreshold(COMP_COMMON_Type *COMPx) +{ + WRITE_REG(COMPx->ISR, COMP_ISR_WIN_IF_Msk); +} + +/** + * @brief Get comparator3 interrupt flag + * @rmtoll ISR CMP3IF FL_COMP_IsActiveFlag_Comparator3 + * @param COMPx COMP instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_COMP_IsActiveFlag_Comparator3(COMP_COMMON_Type *COMPx) +{ + return (uint32_t)(READ_BIT(COMPx->ISR, COMP_ISR_CMP3IF_Msk) == (COMP_ISR_CMP3IF_Msk)); +} + +/** + * @brief Clear comparator3 interrupt flag + * @rmtoll ISR CMP3IF FL_COMP_ClearFlag_Comparator3 + * @param COMPx COMP instance + * @retval None + */ +__STATIC_INLINE void FL_COMP_ClearFlag_Comparator3(COMP_COMMON_Type *COMPx) +{ + WRITE_REG(COMPx->ISR, COMP_ISR_CMP3IF_Msk); +} + +/** + * @brief Get comparator2 interrupt flag + * @rmtoll ISR CMP2IF FL_COMP_IsActiveFlag_Comparator2 + * @param COMPx COMP instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_COMP_IsActiveFlag_Comparator2(COMP_COMMON_Type *COMPx) +{ + return (uint32_t)(READ_BIT(COMPx->ISR, COMP_ISR_CMP2IF_Msk) == (COMP_ISR_CMP2IF_Msk)); +} + +/** + * @brief Clear comparator2 interrupt flag + * @rmtoll ISR CMP2IF FL_COMP_ClearFlag_Comparator2 + * @param COMPx COMP instance + * @retval None + */ +__STATIC_INLINE void FL_COMP_ClearFlag_Comparator2(COMP_COMMON_Type *COMPx) +{ + WRITE_REG(COMPx->ISR, COMP_ISR_CMP2IF_Msk); +} + +/** + * @brief Get comparator1 interrupt flag + * @rmtoll ISR CMP1IF FL_COMP_IsActiveFlag_Comparator1 + * @param COMPx COMP instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_COMP_IsActiveFlag_Comparator1(COMP_COMMON_Type *COMPx) +{ + return (uint32_t)(READ_BIT(COMPx->ISR, COMP_ISR_CMP1IF_Msk) == (COMP_ISR_CMP1IF_Msk)); +} + +/** + * @brief Clear comparator1 interrupt flag + * @rmtoll ISR CMP1IF FL_COMP_ClearFlag_Comparator1 + * @param COMPx COMP instance + * @retval None + */ +__STATIC_INLINE void FL_COMP_ClearFlag_Comparator1(COMP_COMMON_Type *COMPx) +{ + WRITE_REG(COMPx->ISR, COMP_ISR_CMP1IF_Msk); +} + +/** + * @brief COMPx bypass buffer enable + * @rmtoll BUFCR BUFBYP FL_COMP_EnableBufferBypass + * @param COMPx COMP instance + * @retval None + */ +__STATIC_INLINE void FL_COMP_EnableBufferBypass(COMP_COMMON_Type *COMPx) +{ + SET_BIT(COMPx->BUFCR, COMP_BUFCR_BUFBYP_Msk); +} + +/** + * @brief Get COMPx bypass buffer enable status + * @rmtoll BUFCR BUFBYP FL_COMP_IsEnabledBufferBypass + * @param COMPx COMP instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_COMP_IsEnabledBufferBypass(COMP_COMMON_Type *COMPx) +{ + return (uint32_t)(READ_BIT(COMPx->BUFCR, COMP_BUFCR_BUFBYP_Msk) == COMP_BUFCR_BUFBYP_Msk); +} + +/** + * @brief COMPx bypass buffer disable + * @rmtoll BUFCR BUFBYP FL_COMP_DisableBufferBypass + * @param COMPx COMP instance + * @retval None + */ +__STATIC_INLINE void FL_COMP_DisableBufferBypass(COMP_COMMON_Type *COMPx) +{ + CLEAR_BIT(COMPx->BUFCR, COMP_BUFCR_BUFBYP_Msk); +} + +/** + * @brief Set COMPx buffer select + * @rmtoll BUFCR BUFSEL FL_COMP_SetBufferReference + * @param COMPx COMP instance + * @param select This parameter can be one of the following values: + * @arg @ref FL_COMP_BUFF_REFERENCE_VREF1P2 + * @arg @ref FL_COMP_BUFF_REFERENCE_AVREF + * @retval None + */ +__STATIC_INLINE void FL_COMP_SetBufferReference(COMP_COMMON_Type *COMPx, uint32_t select) +{ + MODIFY_REG(COMPx->BUFCR, COMP_BUFCR_BUFSEL_Msk, select); +} + +/** + * @brief Get COMPx buffer select + * @rmtoll BUFCR BUFSEL FL_COMP_GetBufferReference + * @param COMPx COMP instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_COMP_BUFF_REFERENCE_VREF1P2 + * @arg @ref FL_COMP_BUFF_REFERENCE_AVREF + */ +__STATIC_INLINE uint32_t FL_COMP_GetBufferReference(COMP_COMMON_Type *COMPx) +{ + return (uint32_t)(READ_BIT(COMPx->BUFCR, COMP_BUFCR_BUFSEL_Msk)); +} + +/** + * @brief COMPx close buffer enable + * @rmtoll BUFCR BUFENB FL_COMP_EnableBuffer + * @param COMPx COMP instance + * @retval None + */ +__STATIC_INLINE void FL_COMP_EnableBuffer(COMP_COMMON_Type *COMPx) +{ + CLEAR_BIT(COMPx->BUFCR, COMP_BUFCR_BUFENB_Msk); +} + +/** + * @brief Get COMPx close buffer enable status + * @rmtoll BUFCR BUFENB FL_COMP_IsEnabledBuffer + * @param COMPx COMP instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_COMP_IsEnabledBuffer(COMP_COMMON_Type *COMPx) +{ + return (uint32_t)(READ_BIT(COMPx->BUFCR, COMP_BUFCR_BUFENB_Msk) == COMP_BUFCR_BUFENB_Msk); +} + +/** + * @brief COMPx close buffer disable + * @rmtoll BUFCR BUFENB FL_COMP_DisableBuffer + * @param COMPx COMP instance + * @retval None + */ +__STATIC_INLINE void FL_COMP_DisableBuffer(COMP_COMMON_Type *COMPx) +{ + SET_BIT(COMPx->BUFCR, COMP_BUFCR_BUFENB_Msk); +} + +/** + * @} + */ + +/** @defgroup COMP_FL_EF_Init Initialization and de-initialization functions + * @{ + */ +FL_ErrorStatus FL_COMP_DeInit(COMP_Type *COMPx); +void FL_COMP_StructInit(FL_COMP_InitTypeDef *initStruct); +FL_ErrorStatus FL_COMP_Init(COMP_Type *COMPx, FL_COMP_InitTypeDef *initStruct); + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif /* __FM33LG0XX_FL_COMP_H*/ + +/*************************Py_Code_Generator Version: 0.1-0.11-0.1 @ 2020-09-14*************************/ +/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/ diff --git a/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_conf.h b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_conf.h new file mode 100644 index 0000000..5240497 --- /dev/null +++ b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_conf.h @@ -0,0 +1,245 @@ + /** + ******************************************************************************************************* + * @file fm33lg0xx_fl_conf.h + * @author FMSH Application Team + * @brief Header file of FL Driver Library Configurations + ******************************************************************************************************* + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + + +/* Define to prevent recursive inclusion --------------------------------------------------------------*/ +#ifndef __FM33LG0XX_FL_CONF_H +#define __FM33LG0XX_FL_CONF_H + +#ifdef __cplusplus +extern "C" { +#endif + +/* Defines -------------------------------------------------------------------------------------------*/ + +/** + * @brief List of drivers to be used. + * + * @note Uncomment following lines to disable specified driver. + */ +#define FL_ADC_DRIVER_ENABLED +#define FL_AES_DRIVER_ENABLED +#define FL_ATIM_DRIVER_ENABLED +#define FL_BSTIM16_DRIVER_ENABLED +#define FL_BSTIM32_DRIVER_ENABLED +#define FL_CAN_DRIVER_ENABLED +#define FL_CDIF_DRIVER_ENABLED +#define FL_CMU_DRIVER_ENABLED +#define FL_COMP_DRIVER_ENABLED +#define FL_CRC_DRIVER_ENABLED +#define FL_DAC_DRIVER_ENABLED +#define FL_DIVAS_DRIVER_ENABLED +#define FL_DMA_DRIVER_ENABLED +#define FL_EXTI_DRIVER_ENABLED +#define FL_FLASH_DRIVER_ENABLED +#define FL_GPIO_DRIVER_ENABLED +#define FL_GPTIM_DRIVER_ENABLED +#define FL_I2C_DRIVER_ENABLED +#define FL_IWDT_DRIVER_ENABLED +#define FL_LCD_DRIVER_ENABLED +#define FL_LPTIM16_DRIVER_ENABLED +#define FL_LPTIM32_DRIVER_ENABLED +#define FL_LPUART_DRIVER_ENABLED +#define FL_PMU_DRIVER_ENABLED +#define FL_RMU_DRIVER_ENABLED +#define FL_RNG_DRIVER_ENABLED +#define FL_RTCA_DRIVER_ENABLED +#define FL_SPI_DRIVER_ENABLED +#define FL_SVD_DRIVER_ENABLED +#define FL_UART_DRIVER_ENABLED +#define FL_VAO_DRIVER_ENABLED +#define FL_VREF_DRIVER_ENABLED +#define FL_VREFP_DRIVER_ENABLED +#define FL_WWDT_DRIVER_ENABLED + +/* Device Includes ------------------------------------------------------------------------------------*/ +/** + * @brief Include peripheral's header file + */ + +#if defined(FL_ADC_DRIVER_ENABLED) +#include "fm33lg0xx_fl_adc.h" +#endif /* FL_ADC_DRIVER_ENABLED */ + +#if defined(FL_AES_DRIVER_ENABLED) +#include "fm33lg0xx_fl_aes.h" +#endif /* FL_AES_DRIVER_ENABLED */ + +#if defined(FL_ATIM_DRIVER_ENABLED) +#include "fm33lg0xx_fl_atim.h" +#endif /* FL_ATIM_DRIVER_ENABLED */ + +#if defined(FL_BSTIM16_DRIVER_ENABLED) +#include "fm33lg0xx_fl_bstim16.h" +#endif /* FL_BSTIM16_DRIVER_ENABLED */ + +#if defined(FL_BSTIM32_DRIVER_ENABLED) +#include "fm33lg0xx_fl_bstim32.h" +#endif /* FL_BSTIM32_DRIVER_ENABLED */ + +#if defined(FL_CAN_DRIVER_ENABLED) +#include "fm33lg0xx_fl_can.h" +#endif /* FL_CAN_DRIVER_ENABLED */ + +#if defined(FL_CDIF_DRIVER_ENABLED) +#include "fm33lg0xx_fl_cdif.h" +#endif /* FL_CDIF_DRIVER_ENABLED */ + +#if defined(FL_CMU_DRIVER_ENABLED) +#include "fm33lg0xx_fl_cmu.h" +#endif /* FL_CMU_DRIVER_ENABLED */ + +#if defined(FL_COMP_DRIVER_ENABLED) +#include "fm33lg0xx_fl_comp.h" +#endif /* FL_COMP_DRIVER_ENABLED */ + +#if defined(FL_CRC_DRIVER_ENABLED) +#include "fm33lg0xx_fl_crc.h" +#endif /* FL_CRC_DRIVER_ENABLED */ + +#if defined(FL_DAC_DRIVER_ENABLED) +#include "fm33lg0xx_fl_dac.h" +#endif /* FL_DAC_DRIVER_ENABLED */ + +#if defined(FL_DIVAS_DRIVER_ENABLED) +#include "fm33lg0xx_fl_divas.h" +#endif /* FL_DIVAS_DRIVER_ENABLED */ + +#if defined(FL_DMA_DRIVER_ENABLED) +#include "fm33lg0xx_fl_dma.h" +#endif /* FL_DMA_DRIVER_ENABLED */ + +#if defined(FL_EXTI_DRIVER_ENABLED) +#include "fm33lg0xx_fl_exti.h" +#endif /* FL_EXTI_DRIVER_ENABLED */ + +#if defined(FL_FLASH_DRIVER_ENABLED) +#include "fm33lg0xx_fl_flash.h" +#endif /* FL_FLASH_DRIVER_ENABLED */ + +#if defined(FL_GPIO_DRIVER_ENABLED) +#include "fm33lg0xx_fl_gpio.h" +#endif /* FL_GPIO_DRIVER_ENABLED */ + +#if defined(FL_GPTIM_DRIVER_ENABLED) +#include "fm33lg0xx_fl_gptim.h" +#endif /* FL_GPTIM_DRIVER_ENABLED */ + +#if defined(FL_I2C_DRIVER_ENABLED) +#include "fm33lg0xx_fl_i2c.h" +#endif /* FL_I2C_DRIVER_ENABLED */ + +#if defined(FL_IWDT_DRIVER_ENABLED) +#include "fm33lg0xx_fl_iwdt.h" +#endif /* FL_IWDT_DRIVER_ENABLED */ + +#if defined(FL_LCD_DRIVER_ENABLED) +#include "fm33lg0xx_fl_lcd.h" +#endif /* FL_LCD_DRIVER_ENABLED */ + +#if defined(FL_LPTIM16_DRIVER_ENABLED) +#include "fm33lg0xx_fl_lptim16.h" +#endif /* FL_LPTIM16_DRIVER_ENABLED */ + +#if defined(FL_LPTIM32_DRIVER_ENABLED) +#include "fm33lg0xx_fl_lptim32.h" +#endif /* FL_LPTIM32_DRIVER_ENABLED */ + +#if defined(FL_LPUART_DRIVER_ENABLED) +#include "fm33lg0xx_fl_lpuart.h" +#endif /* FL_LPUART_DRIVER_ENABLED */ + + +#if defined(FL_PMU_DRIVER_ENABLED) +#include "fm33lg0xx_fl_pmu.h" +#endif /* FL_PMU_DRIVER_ENABLED */ + +#if defined(FL_RMU_DRIVER_ENABLED) +#include "fm33lg0xx_fl_rmu.h" +#endif /* FL_RMU_DRIVER_ENABLED */ + +#if defined(FL_RNG_DRIVER_ENABLED) +#include "fm33lg0xx_fl_rng.h" +#endif /* FL_RNG_DRIVER_ENABLED */ + +#if defined(FL_RTCA_DRIVER_ENABLED) +#include "fm33lg0xx_fl_rtca.h" +#endif /* FL_RTCA_DRIVER_ENABLED */ + +#if defined(FL_SPI_DRIVER_ENABLED) +#include "fm33lg0xx_fl_spi.h" +#endif /* FL_SPI_DRIVER_ENABLED */ + +#if defined(FL_SVD_DRIVER_ENABLED) +#include "fm33lg0xx_fl_svd.h" +#endif /* FL_SVD_DRIVER_ENABLED */ + +#if defined(FL_UART_DRIVER_ENABLED) +#include "fm33lg0xx_fl_uart.h" +#endif /* FL_UART_DRIVER_ENABLED */ + +#if defined(FL_VAO_DRIVER_ENABLED) +#include "fm33lg0xx_fl_vao.h" +#endif /* FL_VAO_DRIVER_ENABLED */ + +#if defined(FL_VREF_DRIVER_ENABLED) +#include "fm33lg0xx_fl_vref.h" +#endif /* FL_VREF_DRIVER_ENABLED */ + +#if defined(FL_VREFP_DRIVER_ENABLED) +#include "fm33lg0xx_fl_vrefp.h" +#endif /* FL_VREFP_DRIVER_ENABLED */ + +#if defined(FL_WWDT_DRIVER_ENABLED) +#include "fm33lg0xx_fl_wwdt.h" +#endif /* FL_WWDT_DRIVER_ENABLED */ + +#ifdef __cplusplus +} +#endif + +#endif /* __FM33LG0XX_FL_CONF_H */ + +/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/ diff --git a/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_crc.h b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_crc.h new file mode 100644 index 0000000..b7d39c9 --- /dev/null +++ b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_crc.h @@ -0,0 +1,494 @@ + /** + ******************************************************************************************************* + * @file fm33lg0xx_fl_crc.h + * @author FMSH Application Team + * @brief Head file of CRC FL Module + ******************************************************************************************************* + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + + + +/* Define to prevent recursive inclusion---------------------------------------------------------------*/ +#ifndef __FM33LG0XX_FL_CRC_H +#define __FM33LG0XX_FL_CRC_H + +#ifdef __cplusplus +extern "C" { +#endif +/* Includes -------------------------------------------------------------------------------------------*/ +#include "fm33lg0xx_fl_def.h" +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @defgroup CRC CRC + * @brief CRC FL driver + * @{ + */ + +/* Exported types -------------------------------------------------------------------------------------*/ +/** @defgroup CRC_FL_ES_INIT CRC Exported Init structures + * @{ + */ + +/** + * @brief FL CRC Init Sturcture definition + */ +typedef struct +{ + /*! CRC初值 */ + uint32_t initVal; + /*! 计算数据宽度 */ + uint32_t dataWidth; + /*! 输入数据翻转 */ + uint32_t reflectIn; + /*! 输出数据翻转 */ + uint32_t reflectOut; + /*! 输出结果异或寄存器 */ + uint32_t xorReg; + /*! 输出结果异或使能 */ + uint32_t xorRegState; + /*! CRC多项式宽 */ + uint32_t polynomialWidth; + /*! CRC多项式 */ + uint32_t polynomial; + /*! 计算模式 串行或并行 */ + uint32_t calculatMode; + +} FL_CRC_InitTypeDef; + +/** + * @} + */ +/* Exported constants ---------------------------------------------------------------------------------*/ +/** @defgroup CRC_FL_Exported_Constants CRC Exported Constants + * @{ + */ + +#define CRC_CR_OPWD_Pos (9U) +#define CRC_CR_OPWD_Msk (0x1U << CRC_CR_OPWD_Pos) +#define CRC_CR_OPWD CRC_CR_OPWD_Msk + +#define CRC_CR_PARA_Pos (8U) +#define CRC_CR_PARA_Msk (0x1U << CRC_CR_PARA_Pos) +#define CRC_CR_PARA CRC_CR_PARA_Msk + +#define CRC_CR_RFLTIN_Pos (6U) +#define CRC_CR_RFLTIN_Msk (0x3U << CRC_CR_RFLTIN_Pos) +#define CRC_CR_RFLTIN CRC_CR_RFLTIN_Msk + +#define CRC_CR_RFLTO_Pos (5U) +#define CRC_CR_RFLTO_Msk (0x1U << CRC_CR_RFLTO_Pos) +#define CRC_CR_RFLTO CRC_CR_RFLTO_Msk + +#define CRC_CR_RES_Pos (4U) +#define CRC_CR_RES_Msk (0x1U << CRC_CR_RES_Pos) +#define CRC_CR_RES CRC_CR_RES_Msk + +#define CRC_CR_BUSY_Pos (3U) +#define CRC_CR_BUSY_Msk (0x1U << CRC_CR_BUSY_Pos) +#define CRC_CR_BUSY CRC_CR_BUSY_Msk + +#define CRC_CR_XOR_Pos (2U) +#define CRC_CR_XOR_Msk (0x1U << CRC_CR_XOR_Pos) +#define CRC_CR_XOR CRC_CR_XOR_Msk + +#define CRC_CR_SEL_Pos (0U) +#define CRC_CR_SEL_Msk (0x3U << CRC_CR_SEL_Pos) +#define CRC_CR_SEL CRC_CR_SEL_Msk + + + + + + +#define FL_CRC_DATA_WIDTH_8B (0x0Ul << CRC_CR_OPWD_Pos) +#define FL_CRC_DATA_WIDTH_32B (0x1Ul << CRC_CR_OPWD_Pos) + + +#define FL_CRC_CALCULATE_SERIAL (0x0Ul << CRC_CR_PARA_Pos) +#define FL_CRC_CALCULATE_PARALLEL (0x1Ul << CRC_CR_PARA_Pos) + + +#define FL_CRC_INPUT_INVERT_NONE (0x0Ul << CRC_CR_RFLTIN_Pos) +#define FL_CRC_INPUT_INVERT_BYTE (0x1Ul << CRC_CR_RFLTIN_Pos) +#define FL_CRC_INPUT_INVERT_HALF_WORD (0x2Ul << CRC_CR_RFLTIN_Pos) +#define FL_CRC_INPUT_INVERT_WORD (0x3Ul << CRC_CR_RFLTIN_Pos) + + +#define FL_CRC_OUPUT_INVERT_NONE (0x0Ul << CRC_CR_RFLTO_Pos) +#define FL_CRC_OUPUT_INVERT_BYTE (0x1Ul << CRC_CR_RFLTO_Pos) + + +#define FL_CRC_POLYNOMIAL_32B (0x0Ul << CRC_CR_SEL_Pos) +#define FL_CRC_POLYNOMIAL_16B (0x1Ul << CRC_CR_SEL_Pos) +#define FL_CRC_POLYNOMIAL_8B (0x2Ul << CRC_CR_SEL_Pos) +#define FL_CRC_POLYNOMIAL_7B (0x3Ul << CRC_CR_SEL_Pos) + + +/** + * @} + */ +/* Exported functions ---------------------------------------------------------------------------------*/ +/** @defgroup CRC_FL_Exported_Functions CRC Exported Functions + * @{ + */ + +/** + * @brief Set CRC data register + * @rmtoll DR FL_CRC_WriteData + * @param CRCx CRC instance + * @param data + * @retval None + */ +__STATIC_INLINE void FL_CRC_WriteData(CRC_Type *CRCx, uint32_t data) +{ + MODIFY_REG(CRCx->DR, (0xffffffffU << 0U), (data << 0U)); +} + +/** + * @brief Get CRC data register value + * @rmtoll DR FL_CRC_ReadData + * @param CRCx CRC instance + * @retval + */ +__STATIC_INLINE uint32_t FL_CRC_ReadData(CRC_Type *CRCx) +{ + return (uint32_t)(READ_BIT(CRCx->DR, (0xffffffffU << 0U)) >> 0U); +} + +/** + * @brief Set CRC calculate operation width + * @rmtoll CR OPWD FL_CRC_SetDataWidth + * @param CRCx CRC instance + * @param dataWidth This parameter can be one of the following values: + * @arg @ref FL_CRC_DATA_WIDTH_8B + * @arg @ref FL_CRC_DATA_WIDTH_32B + * @retval None + */ +__STATIC_INLINE void FL_CRC_SetDataWidth(CRC_Type *CRCx, uint32_t dataWidth) +{ + MODIFY_REG(CRCx->CR, CRC_CR_OPWD_Msk, dataWidth); +} + +/** + * @brief Get CRC calculate operation width + * @rmtoll CR OPWD FL_CRC_GetDataWidth + * @param CRCx CRC instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_CRC_DATA_WIDTH_8B + * @arg @ref FL_CRC_DATA_WIDTH_32B + */ +__STATIC_INLINE uint32_t FL_CRC_GetDataWidth(CRC_Type *CRCx) +{ + return (uint32_t)(READ_BIT(CRCx->CR, CRC_CR_OPWD_Msk)); +} + +/** + * @brief Set CRC parallel calculation mode + * @rmtoll CR PARA FL_CRC_SetCalculateMode + * @param CRCx CRC instance + * @param mode This parameter can be one of the following values: + * @arg @ref FL_CRC_CALCULATE_SERIAL + * @arg @ref FL_CRC_CALCULATE_PARALLEL + * @retval None + */ +__STATIC_INLINE void FL_CRC_SetCalculateMode(CRC_Type *CRCx, uint32_t mode) +{ + MODIFY_REG(CRCx->CR, CRC_CR_PARA_Msk, mode); +} + +/** + * @brief Get CRC parallel calculation mode + * @rmtoll CR PARA FL_CRC_GetCalculateMode + * @param CRCx CRC instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_CRC_CALCULATE_SERIAL + * @arg @ref FL_CRC_CALCULATE_PARALLEL + */ +__STATIC_INLINE uint32_t FL_CRC_GetCalculateMode(CRC_Type *CRCx) +{ + return (uint32_t)(READ_BIT(CRCx->CR, CRC_CR_PARA_Msk)); +} + +/** + * @brief Set CRC reflected input + * @rmtoll CR RFLTIN FL_CRC_SetInputInvertMode + * @param CRCx CRC instance + * @param mode This parameter can be one of the following values: + * @arg @ref FL_CRC_INPUT_INVERT_NONE + * @arg @ref FL_CRC_INPUT_INVERT_BYTE + * @arg @ref FL_CRC_INPUT_INVERT_HALF_WORD + * @arg @ref FL_CRC_INPUT_INVERT_WORD + * @retval None + */ +__STATIC_INLINE void FL_CRC_SetInputInvertMode(CRC_Type *CRCx, uint32_t mode) +{ + MODIFY_REG(CRCx->CR, CRC_CR_RFLTIN_Msk, mode); +} + +/** + * @brief Get CRC reflected input status + * @rmtoll CR RFLTIN FL_CRC_GetInputInvertMode + * @param CRCx CRC instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_CRC_INPUT_INVERT_NONE + * @arg @ref FL_CRC_INPUT_INVERT_BYTE + * @arg @ref FL_CRC_INPUT_INVERT_HALF_WORD + * @arg @ref FL_CRC_INPUT_INVERT_WORD + */ +__STATIC_INLINE uint32_t FL_CRC_GetInputInvertMode(CRC_Type *CRCx) +{ + return (uint32_t)(READ_BIT(CRCx->CR, CRC_CR_RFLTIN_Msk)); +} + +/** + * @brief Set CRC reflected output + * @rmtoll CR RFLTO FL_CRC_SetOutputInvertMode + * @param CRCx CRC instance + * @param mode This parameter can be one of the following values: + * @arg @ref FL_CRC_OUPUT_INVERT_NONE + * @arg @ref FL_CRC_OUPUT_INVERT_BYTE + * @retval None + */ +__STATIC_INLINE void FL_CRC_SetOutputInvertMode(CRC_Type *CRCx, uint32_t mode) +{ + MODIFY_REG(CRCx->CR, CRC_CR_RFLTO_Msk, mode); +} + +/** + * @brief Get CRC feflected output status + * @rmtoll CR RFLTO FL_CRC_GetOutputInvertMode + * @param CRCx CRC instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_CRC_OUPUT_INVERT_NONE + * @arg @ref FL_CRC_OUPUT_INVERT_BYTE + */ +__STATIC_INLINE uint32_t FL_CRC_GetOutputInvertMode(CRC_Type *CRCx) +{ + return (uint32_t)(READ_BIT(CRCx->CR, CRC_CR_RFLTO_Msk)); +} + +/** + * @brief Get CRC result flag + * @rmtoll CR RES FL_CRC_IsActiveFlag_Zero + * @param CRCx CRC instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CRC_IsActiveFlag_Zero(CRC_Type *CRCx) +{ + return (uint32_t)(READ_BIT(CRCx->CR, CRC_CR_RES_Msk) == (CRC_CR_RES_Msk)); +} + +/** + * @brief Get CRC operational flag + * @rmtoll CR BUSY FL_CRC_IsActiveFlag_Busy + * @param CRCx CRC instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CRC_IsActiveFlag_Busy(CRC_Type *CRCx) +{ + return (uint32_t)(READ_BIT(CRCx->CR, CRC_CR_BUSY_Msk) == (CRC_CR_BUSY_Msk)); +} + +/** + * @brief Output XORed with CRC_XOR register enable + * @rmtoll CR XOR FL_CRC_EnableOutputXOR + * @param CRCx CRC instance + * @retval None + */ +__STATIC_INLINE void FL_CRC_EnableOutputXOR(CRC_Type *CRCx) +{ + SET_BIT(CRCx->CR, CRC_CR_XOR_Msk); +} + +/** + * @brief Get output XORed with CRC_XOR register enable status + * @rmtoll CR XOR FL_CRC_IsEnabledOutputXOR + * @param CRCx CRC instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_CRC_IsEnabledOutputXOR(CRC_Type *CRCx) +{ + return (uint32_t)(READ_BIT(CRCx->CR, CRC_CR_XOR_Msk) == CRC_CR_XOR_Msk); +} + +/** + * @brief Output XORed with CRC_XOR register disable + * @rmtoll CR XOR FL_CRC_DisableOutputXOR + * @param CRCx CRC instance + * @retval None + */ +__STATIC_INLINE void FL_CRC_DisableOutputXOR(CRC_Type *CRCx) +{ + CLEAR_BIT(CRCx->CR, CRC_CR_XOR_Msk); +} + +/** + * @brief Polynomial width selection + * @rmtoll CR SEL FL_CRC_SetPolynomialWidth + * @param CRCx CRC instance + * @param width This parameter can be one of the following values: + * @arg @ref FL_CRC_POLYNOMIAL_32B + * @arg @ref FL_CRC_POLYNOMIAL_16B + * @arg @ref FL_CRC_POLYNOMIAL_8B + * @arg @ref FL_CRC_POLYNOMIAL_7B + * @retval None + */ +__STATIC_INLINE void FL_CRC_SetPolynomialWidth(CRC_Type *CRCx, uint32_t width) +{ + MODIFY_REG(CRCx->CR, CRC_CR_SEL_Msk, width); +} + +/** + * @brief Get Polynomial width Selection status + * @rmtoll CR SEL FL_CRC_GetPolynomialWidth + * @param CRCx CRC instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_CRC_POLYNOMIAL_32B + * @arg @ref FL_CRC_POLYNOMIAL_16B + * @arg @ref FL_CRC_POLYNOMIAL_8B + * @arg @ref FL_CRC_POLYNOMIAL_7B + */ +__STATIC_INLINE uint32_t FL_CRC_GetPolynomialWidth(CRC_Type *CRCx) +{ + return (uint32_t)(READ_BIT(CRCx->CR, CRC_CR_SEL_Msk)); +} + +/** + * @brief Set linear feedback shift register + * @rmtoll LFSR FL_CRC_WriteInitialValue + * @param CRCx CRC instance + * @param data + * @retval None + */ +__STATIC_INLINE void FL_CRC_WriteInitialValue(CRC_Type *CRCx, uint32_t data) +{ + MODIFY_REG(CRCx->LFSR, (0xffffffffU << 0U), (data << 0U)); +} + +/** + * @brief Get linear feedback shift register value + * @rmtoll LFSR FL_CRC_ReadInitialValue + * @param CRCx CRC instance + * @retval + */ +__STATIC_INLINE uint32_t FL_CRC_ReadInitialValue(CRC_Type *CRCx) +{ + return (uint32_t)(READ_BIT(CRCx->LFSR, (0xffffffffU << 0U)) >> 0U); +} + +/** + * @brief Set eXclusive XOR register + * @rmtoll XOR FL_CRC_WriteXORValue + * @param CRCx CRC instance + * @param data + * @retval None + */ +__STATIC_INLINE void FL_CRC_WriteXORValue(CRC_Type *CRCx, uint32_t data) +{ + MODIFY_REG(CRCx->XOR, (0xffffffffU << 0U), (data << 0U)); +} + +/** + * @brief Get eXclusive XOR register value + * @rmtoll XOR FL_CRC_ReadXORValue + * @param CRCx CRC instance + * @retval + */ +__STATIC_INLINE uint32_t FL_CRC_ReadXORValue(CRC_Type *CRCx) +{ + return (uint32_t)(READ_BIT(CRCx->XOR, (0xffffffffU << 0U)) >> 0U); +} + +/** + * @brief Set CRC Polynominals + * @rmtoll POLY FL_CRC_WritePolynominalParam + * @param CRCx CRC instance + * @param data + * @retval None + */ +__STATIC_INLINE void FL_CRC_WritePolynominalParam(CRC_Type *CRCx, uint32_t data) +{ + MODIFY_REG(CRCx->POLY, (0xffffffffU << 0U), (data << 0U)); +} + +/** + * @brief Get CRC Polynominals + * @rmtoll POLY FL_CRC_ReadPolynominalParam + * @param CRCx CRC instance + * @retval + */ +__STATIC_INLINE uint32_t FL_CRC_ReadPolynominalParam(CRC_Type *CRCx) +{ + return (uint32_t)(READ_BIT(CRCx->POLY, (0xffffffffU << 0U)) >> 0U); +} + +/** + * @} + */ + +/** @defgroup CRC_FL_EF_Init Initialization and de-initialization functions + * @{ + */ +FL_ErrorStatus FL_CRC_DeInit(CRC_Type *CRCx); +void FL_CRC_StructInit(FL_CRC_InitTypeDef *CRC_InitStruct); +FL_ErrorStatus FL_CRC_Init(CRC_Type *CRCx, FL_CRC_InitTypeDef *CRC_InitStruct); + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif /* __FM33LG0XX_FL_CRC_H*/ + +/*************************Py_Code_Generator Version: 0.1-0.11-0.1 @ 2020-09-14*************************/ +/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/ diff --git a/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_dac.h b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_dac.h new file mode 100644 index 0000000..746ee10 --- /dev/null +++ b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_dac.h @@ -0,0 +1,777 @@ + /** + ******************************************************************************************************* + * @file fm33lg0xx_fl_dac.h + * @author FMSH Application Team + * @brief Head file of DAC FL Module + ******************************************************************************************************* + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + + + +/* Define to prevent recursive inclusion---------------------------------------------------------------*/ +#ifndef __FM33LG0XX_FL_DAC_H +#define __FM33LG0XX_FL_DAC_H + +#ifdef __cplusplus +extern "C" { +#endif +/* Includes -------------------------------------------------------------------------------------------*/ +#include "fm33lg0xx_fl_def.h" +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @defgroup DAC DAC + * @brief DAC FL driver + * @{ + */ + +/* Exported types -------------------------------------------------------------------------------------*/ +/** @defgroup DAC_FL_ES_INIT DAC Exported Init structures + * @{ + */ + +/** + * @brief FL DAC Init Sturcture definition + */ +typedef struct +{ + /*DAC触发模式使能配置*/ + uint32_t triggerMode; + /*DAC触发源配置*/ + uint32_t triggerSource; + /*DAC采样保持模式配置*/ + uint32_t sampleHoldMode; + /*DAC保持时间配置*/ + uint32_t holdTime; + /*DAC采样时间配置*/ + uint32_t sampleTime; + /*DAC_Buffer模式配置*/ + uint32_t bufferMode; + /*DAC反馈开关配置*/ + uint32_t switchMode; + + +} FL_DAC_InitTypeDef; +/** + * @} + */ +/* Exported constants ---------------------------------------------------------------------------------*/ +/** @defgroup DAC_FL_Exported_Constants DAC Exported Constants + * @{ + */ + +#define DAC_CR1_EN_Pos (0U) +#define DAC_CR1_EN_Msk (0x1U << DAC_CR1_EN_Pos) +#define DAC_CR1_EN DAC_CR1_EN_Msk + +#define DAC_CR2_DMAEN_Pos (1U) +#define DAC_CR2_DMAEN_Msk (0x1U << DAC_CR2_DMAEN_Pos) +#define DAC_CR2_DMAEN DAC_CR2_DMAEN_Msk + +#define DAC_CR2_TRGEN_Pos (0U) +#define DAC_CR2_TRGEN_Msk (0x1U << DAC_CR2_TRGEN_Pos) +#define DAC_CR2_TRGEN DAC_CR2_TRGEN_Msk + +#define DAC_CFGR_SHEN_Pos (8U) +#define DAC_CFGR_SHEN_Msk (0x1U << DAC_CFGR_SHEN_Pos) +#define DAC_CFGR_SHEN DAC_CFGR_SHEN_Msk + +#define DAC_CFGR_BUFEN_Pos (7U) +#define DAC_CFGR_BUFEN_Msk (0x1U << DAC_CFGR_BUFEN_Pos) +#define DAC_CFGR_BUFEN DAC_CFGR_BUFEN_Msk + +#define DAC_CFGR_TRGSEL_Pos (2U) +#define DAC_CFGR_TRGSEL_Msk (0xfU << DAC_CFGR_TRGSEL_Pos) +#define DAC_CFGR_TRGSEL DAC_CFGR_TRGSEL_Msk + +#define DAC_CFGR_SWIEN_Pos (0U) +#define DAC_CFGR_SWIEN_Msk (0x1U << DAC_CFGR_SWIEN_Pos) +#define DAC_CFGR_SWIEN DAC_CFGR_SWIEN_Msk + +#define DAC_SWTRGR_SWTRIG_Pos (0U) +#define DAC_SWTRGR_SWTRIG_Msk (0x1U << DAC_SWTRGR_SWTRIG_Pos) +#define DAC_SWTRGR_SWTRIG DAC_SWTRGR_SWTRIG_Msk + +#define DAC_DHR_DHR_Pos (0U) +#define DAC_DHR_DHR_Msk (0xfffU << DAC_DHR_DHR_Pos) +#define DAC_DHR_DHR DAC_DHR_DHR_Msk + +#define DAC_IER_DMAE_IE_Pos (3U) +#define DAC_IER_DMAE_IE_Msk (0x1U << DAC_IER_DMAE_IE_Pos) +#define DAC_IER_DMAE_IE DAC_IER_DMAE_IE_Msk + +#define DAC_IER_EOH_IE_Pos (2U) +#define DAC_IER_EOH_IE_Msk (0x1U << DAC_IER_EOH_IE_Pos) +#define DAC_IER_EOH_IE DAC_IER_EOH_IE_Msk + +#define DAC_IER_EOS_IE_Pos (1U) +#define DAC_IER_EOS_IE_Msk (0x1U << DAC_IER_EOS_IE_Pos) +#define DAC_IER_EOS_IE DAC_IER_EOS_IE_Msk + +#define DAC_IER_DOU_IE_Pos (0U) +#define DAC_IER_DOU_IE_Msk (0x1U << DAC_IER_DOU_IE_Pos) +#define DAC_IER_DOU_IE DAC_IER_DOU_IE_Msk + +#define DAC_ISR_DMAERR_Pos (3U) +#define DAC_ISR_DMAERR_Msk (0x1U << DAC_ISR_DMAERR_Pos) +#define DAC_ISR_DMAERR DAC_ISR_DMAERR_Msk + +#define DAC_ISR_EOH_Pos (2U) +#define DAC_ISR_EOH_Msk (0x1U << DAC_ISR_EOH_Pos) +#define DAC_ISR_EOH DAC_ISR_EOH_Msk + +#define DAC_ISR_EOS_Pos (1U) +#define DAC_ISR_EOS_Msk (0x1U << DAC_ISR_EOS_Pos) +#define DAC_ISR_EOS DAC_ISR_EOS_Msk + +#define DAC_ISR_DOU_Pos (0U) +#define DAC_ISR_DOU_Msk (0x1U << DAC_ISR_DOU_Pos) +#define DAC_ISR_DOU DAC_ISR_DOU_Msk + +#define DAC_SHTR_THLD_Pos (8U) +#define DAC_SHTR_THLD_Msk (0xffffU << DAC_SHTR_THLD_Pos) +#define DAC_SHTR_THLD DAC_SHTR_THLD_Msk + +#define DAC_SHTR_TSMPL_Pos (0U) +#define DAC_SHTR_TSMPL_Msk (0xffU << DAC_SHTR_TSMPL_Pos) +#define DAC_SHTR_TSMPL DAC_SHTR_TSMPL_Msk + + + + + + +#define FL_DAC_TRGI_SOFTWARE (0x0U << DAC_CFGR_TRGSEL_Pos) +#define FL_DAC_TRGI_ATIM (0x1U << DAC_CFGR_TRGSEL_Pos) +#define FL_DAC_TRGI_GPTIM1 (0x2U << DAC_CFGR_TRGSEL_Pos) +#define FL_DAC_TRGI_GPTIM2 (0x3U << DAC_CFGR_TRGSEL_Pos) +#define FL_DAC_TRGI_BSTIM16 (0x4U << DAC_CFGR_TRGSEL_Pos) +#define FL_DAC_TRGI_LPTIM16 (0x5U << DAC_CFGR_TRGSEL_Pos) +#define FL_DAC_TRGI_EXTI0 (0xcU << DAC_CFGR_TRGSEL_Pos) +#define FL_DAC_TRGI_EXTI4 (0xdU << DAC_CFGR_TRGSEL_Pos) +#define FL_DAC_TRGI_EXTI8 (0xeU << DAC_CFGR_TRGSEL_Pos) +#define FL_DAC_TRGI_EXTI12 (0xfU << DAC_CFGR_TRGSEL_Pos) + + +/** + * @} + */ +/* Exported functions ---------------------------------------------------------------------------------*/ +/** @defgroup DAC_FL_Exported_Functions DAC Exported Functions + * @{ + */ + +/** + * @brief Enable DAC + * @rmtoll CR1 EN FL_DAC_Enable + * @param DACx DAC instance + * @retval None + */ +__STATIC_INLINE void FL_DAC_Enable(DAC_Type *DACx) +{ + SET_BIT(DACx->CR1, DAC_CR1_EN_Msk); +} + +/** + * @brief Disable DAC + * @rmtoll CR1 EN FL_DAC_Disable + * @param DACx DAC instance + * @retval None + */ +__STATIC_INLINE void FL_DAC_Disable(DAC_Type *DACx) +{ + CLEAR_BIT(DACx->CR1, DAC_CR1_EN_Msk); +} + +/** + * @brief Get DAC Enable Status + * @rmtoll CR1 EN FL_DAC_IsEnabled + * @param DACx DAC instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_DAC_IsEnabled(DAC_Type *DACx) +{ + return (uint32_t)(READ_BIT(DACx->CR1, DAC_CR1_EN_Msk) == DAC_CR1_EN_Msk); +} + +/** + * @brief Enable DAC DMA + * @rmtoll CR2 DMAEN FL_DAC_EnableDMAReq + * @param DACx DAC instance + * @retval None + */ +__STATIC_INLINE void FL_DAC_EnableDMAReq(DAC_Type *DACx) +{ + SET_BIT(DACx->CR2, DAC_CR2_DMAEN_Msk); +} + +/** + * @brief Disable DAC DMA + * @rmtoll CR2 DMAEN FL_DAC_DisableDMAReq + * @param DACx DAC instance + * @retval None + */ +__STATIC_INLINE void FL_DAC_DisableDMAReq(DAC_Type *DACx) +{ + CLEAR_BIT(DACx->CR2, DAC_CR2_DMAEN_Msk); +} + +/** + * @brief Get DAC DMA Enable Status + * @rmtoll CR2 DMAEN FL_DAC_IsEnabledDMAReq + * @param DACx DAC instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_DAC_IsEnabledDMAReq(DAC_Type *DACx) +{ + return (uint32_t)(READ_BIT(DACx->CR2, DAC_CR2_DMAEN_Msk) == DAC_CR2_DMAEN_Msk); +} + +/** + * @brief Enable DAC Trigger + * @rmtoll CR2 TRGEN FL_DAC_EnableTriggerMode + * @param DACx DAC instance + * @retval None + */ +__STATIC_INLINE void FL_DAC_EnableTriggerMode(DAC_Type *DACx) +{ + SET_BIT(DACx->CR2, DAC_CR2_TRGEN_Msk); +} + +/** + * @brief Disable DAC Trigger + * @rmtoll CR2 TRGEN FL_DAC_DisableTriggerMode + * @param DACx DAC instance + * @retval None + */ +__STATIC_INLINE void FL_DAC_DisableTriggerMode(DAC_Type *DACx) +{ + CLEAR_BIT(DACx->CR2, DAC_CR2_TRGEN_Msk); +} + +/** + * @brief Get DAC Trigger Enable Status + * @rmtoll CR2 TRGEN FL_DAC_IsEnabledTriggerMode + * @param DACx DAC instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_DAC_IsEnabledTriggerMode(DAC_Type *DACx) +{ + return (uint32_t)(READ_BIT(DACx->CR2, DAC_CR2_TRGEN_Msk) == DAC_CR2_TRGEN_Msk); +} + +/** + * @brief Enable DAC Sample Hold + * @rmtoll CFGR SHEN FL_DAC_EnableSampleHoldMode + * @param DACx DAC instance + * @retval None + */ +__STATIC_INLINE void FL_DAC_EnableSampleHoldMode(DAC_Type *DACx) +{ + SET_BIT(DACx->CFGR, DAC_CFGR_SHEN_Msk); +} + +/** + * @brief Disable DAC Sample Hold + * @rmtoll CFGR SHEN FL_DAC_DisableSampleHoldMode + * @param DACx DAC instance + * @retval None + */ +__STATIC_INLINE void FL_DAC_DisableSampleHoldMode(DAC_Type *DACx) +{ + CLEAR_BIT(DACx->CFGR, DAC_CFGR_SHEN_Msk); +} + +/** + * @brief Get DAC Sample Hold Enable Status + * @rmtoll CFGR SHEN FL_DAC_IsEnabledSampleHoldMode + * @param DACx DAC instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_DAC_IsEnabledSampleHoldMode(DAC_Type *DACx) +{ + return (uint32_t)(READ_BIT(DACx->CFGR, DAC_CFGR_SHEN_Msk) == DAC_CFGR_SHEN_Msk); +} + +/** + * @brief Enable DAC Output Buffer + * @rmtoll CFGR BUFEN FL_DAC_EnableOutputBuffer + * @param DACx DAC instance + * @retval None + */ +__STATIC_INLINE void FL_DAC_EnableOutputBuffer(DAC_Type *DACx) +{ + SET_BIT(DACx->CFGR, DAC_CFGR_BUFEN_Msk); +} + +/** + * @brief Disable DAC Output Buffer + * @rmtoll CFGR BUFEN FL_DAC_DisableOutputBuffer + * @param DACx DAC instance + * @retval None + */ +__STATIC_INLINE void FL_DAC_DisableOutputBuffer(DAC_Type *DACx) +{ + CLEAR_BIT(DACx->CFGR, DAC_CFGR_BUFEN_Msk); +} + +/** + * @brief Get DAC Output Buffer Status + * @rmtoll CFGR BUFEN FL_DAC_IsEnabledOutputBuffer + * @param DACx DAC instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_DAC_IsEnabledOutputBuffer(DAC_Type *DACx) +{ + return (uint32_t)(READ_BIT(DACx->CFGR, DAC_CFGR_BUFEN_Msk) == DAC_CFGR_BUFEN_Msk); +} + +/** + * @brief Set DAC Trigger Source + * @note Can Only Be Modified When TRGEN=0 + * @rmtoll CFGR TRGSEL FL_DAC_SetTriggerSource + * @param DACx DAC instance + * @param source This parameter can be one of the following values: + * @arg @ref FL_DAC_TRGI_SOFTWARE + * @arg @ref FL_DAC_TRGI_ATIM + * @arg @ref FL_DAC_TRGI_GPTIM1 + * @arg @ref FL_DAC_TRGI_GPTIM2 + * @arg @ref FL_DAC_TRGI_BSTIM16 + * @arg @ref FL_DAC_TRGI_LPTIM16 + * @arg @ref FL_DAC_TRGI_EXTI0 + * @arg @ref FL_DAC_TRGI_EXTI4 + * @arg @ref FL_DAC_TRGI_EXTI8 + * @arg @ref FL_DAC_TRGI_EXTI12 + * @retval None + */ +__STATIC_INLINE void FL_DAC_SetTriggerSource(DAC_Type *DACx, uint32_t source) +{ + MODIFY_REG(DACx->CFGR, DAC_CFGR_TRGSEL_Msk, source); +} + +/** + * @brief Get DAC Trigger Source + * @rmtoll CFGR TRGSEL FL_DAC_GetTriggerSource + * @param DACx DAC instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_DAC_TRGI_SOFTWARE + * @arg @ref FL_DAC_TRGI_ATIM + * @arg @ref FL_DAC_TRGI_GPTIM1 + * @arg @ref FL_DAC_TRGI_GPTIM2 + * @arg @ref FL_DAC_TRGI_BSTIM16 + * @arg @ref FL_DAC_TRGI_LPTIM16 + * @arg @ref FL_DAC_TRGI_EXTI0 + * @arg @ref FL_DAC_TRGI_EXTI4 + * @arg @ref FL_DAC_TRGI_EXTI8 + * @arg @ref FL_DAC_TRGI_EXTI12 + */ +__STATIC_INLINE uint32_t FL_DAC_GetTriggerSource(DAC_Type *DACx) +{ + return (uint32_t)(READ_BIT(DACx->CFGR, DAC_CFGR_TRGSEL_Msk)); +} + +/** + * @brief Enable DAC DAC Feedback Switch + * @rmtoll CFGR SWIEN FL_DAC_EnableFeedbackSwitch + * @param DACx DAC instance + * @retval None + */ +__STATIC_INLINE void FL_DAC_EnableFeedbackSwitch(DAC_Type *DACx) +{ + SET_BIT(DACx->CFGR, DAC_CFGR_SWIEN_Msk); +} + +/** + * @brief Disable DAC DAC Feedback Switch + * @rmtoll CFGR SWIEN FL_DAC_DisableFeedbackSwitch + * @param DACx DAC instance + * @retval None + */ +__STATIC_INLINE void FL_DAC_DisableFeedbackSwitch(DAC_Type *DACx) +{ + CLEAR_BIT(DACx->CFGR, DAC_CFGR_SWIEN_Msk); +} + +/** + * @brief Get DAC Feedback Switch + * @rmtoll CFGR SWIEN FL_DAC_IsEnabledFeedbackSwitch + * @param DACx DAC instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_DAC_IsEnabledFeedbackSwitch(DAC_Type *DACx) +{ + return (uint32_t)(READ_BIT(DACx->CFGR, DAC_CFGR_SWIEN_Msk) == DAC_CFGR_SWIEN_Msk); +} + +/** + * @brief Trigger DAC + * @rmtoll SWTRGR SWTRIG FL_DAC_EnableSoftwareTrigger + * @param DACx DAC instance + * @retval None + */ +__STATIC_INLINE void FL_DAC_EnableSoftwareTrigger(DAC_Type *DACx) +{ + SET_BIT(DACx->SWTRGR, DAC_SWTRGR_SWTRIG_Msk); +} + +/** + * @brief Write DAC Data + * @rmtoll DHR DHR FL_DAC_WriteData + * @param DACx DAC instance + * @param data + * @retval None + */ +__STATIC_INLINE void FL_DAC_WriteData(DAC_Type *DACx, uint32_t data) +{ + MODIFY_REG(DACx->DHR, (0xfffU << 0U), (data << 0U)); +} + +/** + * @brief Read DAC Data + * @rmtoll DHR DHR FL_DAC_ReadData + * @param DACx DAC instance + * @retval + */ +__STATIC_INLINE uint32_t FL_DAC_ReadData(DAC_Type *DACx) +{ + return (uint32_t)(READ_BIT(DACx->DHR, 0xfffU) >> 0U); +} + +/** + * @brief Enable DAC DMA Error interrupt + * @rmtoll IER DMAE_IE FL_DAC_EnableIT_DMAError + * @param DACx DAC instance + * @retval None + */ +__STATIC_INLINE void FL_DAC_EnableIT_DMAError(DAC_Type *DACx) +{ + SET_BIT(DACx->IER, DAC_IER_DMAE_IE_Msk); +} + +/** + * @brief Disable DAC DMA Error interrupt + * @rmtoll IER DMAE_IE FL_DAC_DisableIT_DMAError + * @param DACx DAC instance + * @retval None + */ +__STATIC_INLINE void FL_DAC_DisableIT_DMAError(DAC_Type *DACx) +{ + CLEAR_BIT(DACx->IER, DAC_IER_DMAE_IE_Msk); +} + +/** + * @brief Get DAC DMA Error interrupt Enable Status + * @rmtoll IER DMAE_IE FL_DAC_IsEnabledIT_DMAError + * @param DACx DAC instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_DAC_IsEnabledIT_DMAError(DAC_Type *DACx) +{ + return (uint32_t)(READ_BIT(DACx->IER, DAC_IER_DMAE_IE_Msk) == DAC_IER_DMAE_IE_Msk); +} + +/** + * @brief Enable DAC End Of Holding Phase Interrupt + * @rmtoll IER EOH_IE FL_DAC_EnableIT_EndOfHolding + * @param DACx DAC instance + * @retval None + */ +__STATIC_INLINE void FL_DAC_EnableIT_EndOfHolding(DAC_Type *DACx) +{ + SET_BIT(DACx->IER, DAC_IER_EOH_IE_Msk); +} + +/** + * @brief Disable DAC End Of Holding Phase Interrupt + * @rmtoll IER EOH_IE FL_DAC_DisableIT_EndOfHolding + * @param DACx DAC instance + * @retval None + */ +__STATIC_INLINE void FL_DAC_DisableIT_EndOfHolding(DAC_Type *DACx) +{ + CLEAR_BIT(DACx->IER, DAC_IER_EOH_IE_Msk); +} + +/** + * @brief Get DAC End Of Holding Phase Interrupt Enable Status + * @rmtoll IER EOH_IE FL_DAC_IsEnabledIT_EndOfHolding + * @param DACx DAC instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_DAC_IsEnabledIT_EndOfHolding(DAC_Type *DACx) +{ + return (uint32_t)(READ_BIT(DACx->IER, DAC_IER_EOH_IE_Msk) == DAC_IER_EOH_IE_Msk); +} + +/** + * @brief Enable DAC End Of Sampling Phase Interrupt + * @rmtoll IER EOS_IE FL_DAC_EnableIT_EndOfSampling + * @param DACx DAC instance + * @retval None + */ +__STATIC_INLINE void FL_DAC_EnableIT_EndOfSampling(DAC_Type *DACx) +{ + SET_BIT(DACx->IER, DAC_IER_EOS_IE_Msk); +} + +/** + * @brief Disable DAC End Of Sampling Phase Interrupt + * @rmtoll IER EOS_IE FL_DAC_DisableIT_EndOfSampling + * @param DACx DAC instance + * @retval None + */ +__STATIC_INLINE void FL_DAC_DisableIT_EndOfSampling(DAC_Type *DACx) +{ + CLEAR_BIT(DACx->IER, DAC_IER_EOS_IE_Msk); +} + +/** + * @brief Get DAC End Of Sampling Phase Interrupt Enable Status + * @rmtoll IER EOS_IE FL_DAC_IsEnabledIT_EndOfSampling + * @param DACx DAC instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_DAC_IsEnabledIT_EndOfSampling(DAC_Type *DACx) +{ + return (uint32_t)(READ_BIT(DACx->IER, DAC_IER_EOS_IE_Msk) == DAC_IER_EOS_IE_Msk); +} + +/** + * @brief Enable DAC Data Output Updated Interrupt + * @rmtoll IER DOU_IE FL_DAC_EnableIT_DataOutputUpdate + * @param DACx DAC instance + * @retval None + */ +__STATIC_INLINE void FL_DAC_EnableIT_DataOutputUpdate(DAC_Type *DACx) +{ + SET_BIT(DACx->IER, DAC_IER_DOU_IE_Msk); +} + +/** + * @brief Disable DAC Data Output Updated Interrupt + * @rmtoll IER DOU_IE FL_DAC_DisableIT_DataOutputUpdate + * @param DACx DAC instance + * @retval None + */ +__STATIC_INLINE void FL_DAC_DisableIT_DataOutputUpdate(DAC_Type *DACx) +{ + CLEAR_BIT(DACx->IER, DAC_IER_DOU_IE_Msk); +} + +/** + * @brief Get DAC Data Output Updated Interrupt Enable Status + * @rmtoll IER DOU_IE FL_DAC_IsEnabledIT_DataOutputUpdate + * @param DACx DAC instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_DAC_IsEnabledIT_DataOutputUpdate(DAC_Type *DACx) +{ + return (uint32_t)(READ_BIT(DACx->IER, DAC_IER_DOU_IE_Msk) == DAC_IER_DOU_IE_Msk); +} + +/** + * @brief Get DAC DMA Error Flag + * @rmtoll ISR DMAERR FL_DAC_IsActiveFlag_DMAError + * @param DACx DAC instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_DAC_IsActiveFlag_DMAError(DAC_Type *DACx) +{ + return (uint32_t)(READ_BIT(DACx->ISR, DAC_ISR_DMAERR_Msk) == (DAC_ISR_DMAERR_Msk)); +} + +/** + * @brief Clear DAC DMA Error Flag + * @rmtoll ISR DMAERR FL_DAC_ClearFlag_DMAError + * @param DACx DAC instance + * @retval None + */ +__STATIC_INLINE void FL_DAC_ClearFlag_DMAError(DAC_Type *DACx) +{ + WRITE_REG(DACx->ISR, DAC_ISR_DMAERR_Msk); +} + +/** + * @brief Get DAC End Of Holding Phase Flag + * @rmtoll ISR EOH FL_DAC_IsActiveFlag_EndOfHolding + * @param DACx DAC instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_DAC_IsActiveFlag_EndOfHolding(DAC_Type *DACx) +{ + return (uint32_t)(READ_BIT(DACx->ISR, DAC_ISR_EOH_Msk) == (DAC_ISR_EOH_Msk)); +} + +/** + * @brief Clear DAC End Of Holding Phase Flag + * @rmtoll ISR EOH FL_DAC_ClearFlag_EndOfHolding + * @param DACx DAC instance + * @retval None + */ +__STATIC_INLINE void FL_DAC_ClearFlag_EndOfHolding(DAC_Type *DACx) +{ + WRITE_REG(DACx->ISR, DAC_ISR_EOH_Msk); +} + +/** + * @brief Get DAC End Of Sampling Phase Flag + * @rmtoll ISR EOS FL_DAC_IsActiveFlag_EndOfSampling + * @param DACx DAC instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_DAC_IsActiveFlag_EndOfSampling(DAC_Type *DACx) +{ + return (uint32_t)(READ_BIT(DACx->ISR, DAC_ISR_EOS_Msk) == (DAC_ISR_EOS_Msk)); +} + +/** + * @brief Clear DAC End Of Sampling Phase Flag + * @rmtoll ISR EOS FL_DAC_ClearFlag_EndOfSampling + * @param DACx DAC instance + * @retval None + */ +__STATIC_INLINE void FL_DAC_ClearFlag_EndOfSampling(DAC_Type *DACx) +{ + WRITE_REG(DACx->ISR, DAC_ISR_EOS_Msk); +} + +/** + * @brief Get DAC Data Output Updated Flag + * @rmtoll ISR DOU FL_DAC_IsActiveFlag_DataOutputUpdate + * @param DACx DAC instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_DAC_IsActiveFlag_DataOutputUpdate(DAC_Type *DACx) +{ + return (uint32_t)(READ_BIT(DACx->ISR, DAC_ISR_DOU_Msk) == (DAC_ISR_DOU_Msk)); +} + +/** + * @brief Clear DAC Data Output Updated Flag + * @rmtoll ISR DOU FL_DAC_ClearFlag_DataOutputUpdate + * @param DACx DAC instance + * @retval None + */ +__STATIC_INLINE void FL_DAC_ClearFlag_DataOutputUpdate(DAC_Type *DACx) +{ + WRITE_REG(DACx->ISR, DAC_ISR_DOU_Msk); +} + +/** + * @brief Set DAC Holding Time + * @note Modification IS NOT ALLOWED When SHEN=1 + * @rmtoll SHTR THLD FL_DAC_WriteHoldingTime + * @param DACx DAC instance + * @param time + * @retval None + */ +__STATIC_INLINE void FL_DAC_WriteHoldingTime(DAC_Type *DACx, uint32_t time) +{ + MODIFY_REG(DACx->SHTR, (0xffffU << 8U), (time << 8U)); +} + +/** + * @brief Read DAC Holding Time + * @rmtoll SHTR THLD FL_DAC_ReadHoldingTime + * @param DACx DAC instance + * @retval + */ +__STATIC_INLINE uint32_t FL_DAC_ReadHoldingTime(DAC_Type *DACx) +{ + return (uint32_t)(READ_BIT(DACx->SHTR, 0xffffU) >> 8U); +} + +/** + * @brief Set DAC Sampling Time Under Sample&Hold Mode + * @note Modification IS NOT ALLOWED When SHEN=1 + * @rmtoll SHTR TSMPL FL_DAC_WriteSamplingTime + * @param DACx DAC instance + * @param time + * @retval None + */ +__STATIC_INLINE void FL_DAC_WriteSamplingTime(DAC_Type *DACx, uint32_t time) +{ + MODIFY_REG(DACx->SHTR, (0xffU << 0U), (time << 0U)); +} + +/** + * @brief Read DAC Sampling Time Under Sample&Hold Mode + * @rmtoll SHTR TSMPL FL_DAC_ReadSamplingTime + * @param DACx DAC instance + * @retval + */ +__STATIC_INLINE uint32_t FL_DAC_ReadSamplingTime(DAC_Type *DACx) +{ + return (uint32_t)(READ_BIT(DACx->SHTR, 0xffU) >> 0U); +} + + +/** + * @} + */ + +/** @defgroup DAC_FL_EF_Init Initialization and de-initialization functions + * @{ + */ +FL_ErrorStatus FL_DAC_DeInit(DAC_Type *DACx); +FL_ErrorStatus FL_DAC_Init(DAC_Type *DACx, FL_DAC_InitTypeDef *DAC_InitStruct); +void FL_DAC_StructInit(FL_DAC_InitTypeDef *DAC_InitStruct); + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif /* __FM33LG0XX_FL_DAC_H*/ + +/*************************Py_Code_Generator Version: 0.1-0.11-0.1 @ 2020-09-12*************************/ +/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/ diff --git a/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_def.h b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_def.h new file mode 100644 index 0000000..46335a2 --- /dev/null +++ b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_def.h @@ -0,0 +1,121 @@ + /** + ******************************************************************************************************* + * @file fm33lg0xx_fl_def.h + * @author FMSH Application Team + * @brief Header file of FL Driver Library Defines + ******************************************************************************************************* + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + + + +/* Define to prevent recursive inclusion --------------------------------------------------------------*/ +#ifndef __FM33LG0XX_FL_DEF_H +#define __FM33LG0XX_FL_DEF_H + +#ifdef __cplusplus +extern "C" { +#endif + +/* Includes -------------------------------------------------------------------------------------------*/ +#include "fm33lg0xx.h" +#include "fm33_assert.h" +#if 0 +#include +#include +#include +#endif +#include "common_types.h" + + +/* Macros ---------------------------------------------------------------------------------------------*/ +/** @defgroup FL_Exported_Macros FL Driver Library Private Macros + * @{ + */ + +/** + * @brief Bit-wise operation macros used by FL driver library functions + */ +#define SET_BIT(REG, BIT) ((REG) |= (BIT)) +#define CLEAR_BIT(REG, BIT) ((REG) &= ~(BIT)) +#define READ_BIT(REG, BIT) ((REG) & (BIT)) +#define CLEAR_REG(REG) ((REG) = (0x0)) +#define WRITE_REG(REG, VAL) ((REG) = (VAL)) +#define READ_REG(REG) ((REG)) +#define MODIFY_REG(REG, CLEARMASK, SETMASK) WRITE_REG((REG), (((READ_REG(REG)) & (~(CLEARMASK))) | (SETMASK))) + +/** + * @} + */ + +/* Types ----------------------------------------------------------------------------------------------*/ +/** @defgroup FL_PT_Return FL Driver Library Private Return Type Defines + * @{ + */ + +typedef enum +{ + FL_RESET = 0U, + FL_SET = !FL_RESET +} FL_FlagStatus, FL_ITStatus; + +typedef enum +{ + FL_DISABLE = 0U, + FL_ENABLE = !FL_DISABLE +} FL_FunState; +#define IS_FUNCTIONAL_STATE(STATE) (((STATE) == FL_DISABLE) || ((STATE) == FL_ENABLE)) + +typedef enum +{ + FL_FAIL = 0U, + FL_PASS = !FL_FAIL +} FL_ErrorStatus; + +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif /* __FM33LG0XX_FL_DEF_H */ + +/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/ diff --git a/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_divas.h b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_divas.h new file mode 100644 index 0000000..aea240c --- /dev/null +++ b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_divas.h @@ -0,0 +1,272 @@ + /** + ******************************************************************************************************* + * @file fm33lg0xx_fl_divas.h + * @author FMSH Application Team + * @brief Head file of DIVAS FL Module + ******************************************************************************************************* + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + + + +/* Define to prevent recursive inclusion---------------------------------------------------------------*/ +#ifndef __FM33LG0XX_FL_DIVAS_H +#define __FM33LG0XX_FL_DIVAS_H + +#ifdef __cplusplus +extern "C" { +#endif +/* Includes -------------------------------------------------------------------------------------------*/ +#include "fm33lg0xx_fl_def.h" +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @defgroup DIVAS DIVAS + * @brief DIVAS FL driver + * @{ + */ + +/* Exported types -------------------------------------------------------------------------------------*/ +/** @defgroup DIVAS_FL_ES_INIT DIVAS Exported Init structures + * @{ + */ + +/** + * @brief FL DIVAS Init Sturcture definition + */ + +/** + * @} + */ +/* Exported constants ---------------------------------------------------------------------------------*/ +/** @defgroup DIVAS_FL_Exported_Constants DIVAS Exported Constants + * @{ + */ +#define FL_DIVAS_SR_BUSY_TIMEOUT (0xFFFU) + +#define DIVAS_SR_DIV0_Pos (1U) +#define DIVAS_SR_DIV0_Msk (0x1U << DIVAS_SR_DIV0_Pos) +#define DIVAS_SR_DIV0 DIVAS_SR_DIV0_Msk + +#define DIVAS_SR_BUSY_Pos (0U) +#define DIVAS_SR_BUSY_Msk (0x1U << DIVAS_SR_BUSY_Pos) +#define DIVAS_SR_BUSY DIVAS_SR_BUSY_Msk + +#define DIVAS_CR_MODE_Pos (0U) +#define DIVAS_CR_MODE_Msk (0x1U << DIVAS_CR_MODE_Pos) +#define DIVAS_CR_MODE DIVAS_CR_MODE_Msk + + + + + + +#define FL_DIVAS_MODE_DIV (0x0U << DIVAS_CR_MODE_Pos) +#define FL_DIVAS_MODE_ROOT (0x1U << DIVAS_CR_MODE_Pos) + + +/** + * @} + */ +/* Exported functions ---------------------------------------------------------------------------------*/ +/** @defgroup DIVAS_FL_Exported_Functions DIVAS Exported Functions + * @{ + */ + +/** + * @brief Write Operator Register + * @rmtoll OPRD FL_DIVAS_WriteOperand + * @param DIVASx DIVAS instance + * @param number + * @retval None + */ +__STATIC_INLINE void FL_DIVAS_WriteOperand(DIVAS_Type *DIVASx, uint32_t number) +{ + WRITE_REG(DIVASx->OPRD,(number << 0U)); +} + +/** + * @brief Read Operator Register + * @rmtoll OPRD FL_DIVAS_ReadOperand + * @param DIVASx DIVAS instance + * @retval + */ +__STATIC_INLINE int32_t FL_DIVAS_ReadOperand(DIVAS_Type *DIVASx) +{ + return (int32_t)(READ_REG(DIVASx->OPRD)); +} + +/** + * @brief Write 16bit Signed Dividend + * @rmtoll DIVSOR FL_DIVAS_WriteDivisor + * @param DIVASx DIVAS instance + * @param number + * @retval None + */ +__STATIC_INLINE void FL_DIVAS_WriteDivisor(DIVAS_Type *DIVASx, uint32_t number) +{ + MODIFY_REG(DIVASx->DIVSOR, (0xffffU << 0U), (number << 0U)); +} + +/** + * @brief Read 16bit Signed Dividend + * @rmtoll DIVSOR FL_DIVAS_ReadDivisor + * @param DIVASx DIVAS instance + * @retval + */ +__STATIC_INLINE int32_t FL_DIVAS_ReadDivisor(DIVAS_Type *DIVASx) +{ + return (int32_t)(READ_BIT(DIVASx->DIVSOR, 0xffffU) >> 0U); +} + +/** + * @brief Read 32bit Signed QUTO + * @rmtoll QUOT FL_DIVAS_ReadQuotient + * @param DIVASx DIVAS instance + * @retval + */ +__STATIC_INLINE int32_t FL_DIVAS_ReadQuotient(DIVAS_Type *DIVASx) +{ + return (int32_t)(READ_REG(DIVASx->QUOT)); +} + +/** + * @brief Read 16bit Signed Reminder + * @rmtoll REMD FL_DIVAS_ReadResidue + * @param DIVASx DIVAS instance + * @retval + */ +__STATIC_INLINE int16_t FL_DIVAS_ReadResidue(DIVAS_Type *DIVASx) +{ + return (int16_t)(READ_BIT(DIVASx->REMD, 0xffffU) >> 0U); +} + +/** + * @brief Read 16bit Unsigned Square Root + * @rmtoll ROOT FL_DIVAS_ReadRoot + * @param DIVASx DIVAS instance + * @retval + */ +__STATIC_INLINE uint16_t FL_DIVAS_ReadRoot(DIVAS_Type *DIVASx) +{ + return (uint16_t)(READ_BIT(DIVASx->ROOT, 0xffffU) >> 0U); +} + +/** + * @brief Get divided by 0 flag + * @rmtoll SR DIV0 FL_DIVAS_IsActiveFlag_DividedZero + * @param DIVASx DIVAS instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_DIVAS_IsActiveFlag_DividedZero(DIVAS_Type *DIVASx) +{ + return (uint32_t)(READ_BIT(DIVASx->SR, DIVAS_SR_DIV0_Msk) == (DIVAS_SR_DIV0_Msk)); +} + +/** + * @brief Get Busy flag + * @rmtoll SR BUSY FL_DIVAS_IsActiveFlag_Busy + * @param DIVASx DIVAS instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_DIVAS_IsActiveFlag_Busy(DIVAS_Type *DIVASx) +{ + return (uint32_t)(READ_BIT(DIVASx->SR, DIVAS_SR_BUSY_Msk) == (DIVAS_SR_BUSY_Msk)); +} + +/** + * @brief Set Work Mode + * @rmtoll CR MODE FL_DIVAS_SetMode + * @param DIVASx DIVAS instance + * @param mode This parameter can be one of the following values: + * @arg @ref FL_DIVAS_MODE_DIV + * @arg @ref FL_DIVAS_MODE_ROOT + * @retval None + */ +__STATIC_INLINE void FL_DIVAS_SetMode(DIVAS_Type *DIVASx, uint32_t mode) +{ + MODIFY_REG(DIVASx->CR, DIVAS_CR_MODE_Msk, mode); +} + +/** + * @brief Get Work Mode + * @rmtoll CR MODE FL_DIVAS_GetMode + * @param DIVASx DIVAS instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_DIVAS_MODE_DIV + * @arg @ref FL_DIVAS_MODE_ROOT + */ +__STATIC_INLINE uint32_t FL_DIVAS_GetMode(DIVAS_Type *DIVASx) +{ + return (uint32_t)(READ_BIT(DIVASx->CR, DIVAS_CR_MODE_Msk)); +} + +/** + * @} + */ + +/** @defgroup DIVAS_FL_EF_Init Initialization and de-initialization functions + * @{ + */ +FL_ErrorStatus FL_DIVAS_DeInit(DIVAS_Type *DIVASx); +FL_ErrorStatus FL_DIVAS_Init(DIVAS_Type *DIVASx); +uint32_t FL_DIVAS_Hdiv_Calculation(DIVAS_Type *DIVASx, int32_t DivisorEnd, int16_t Divisor, int32_t *Quotient, int16_t *Residue); +uint32_t FL_DIVAS_Root_Calculation(DIVAS_Type *DIVASx, uint32_t Root, uint16_t *Result); + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif /* __FM33LG0XX_FL_DIVAS_H*/ + +/*************************Py_Code_Generator Version: 0.1-0.11-0.1 @ 2020-09-14*************************/ +/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/ diff --git a/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_dma.h b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_dma.h new file mode 100644 index 0000000..45bdbc4 --- /dev/null +++ b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_dma.h @@ -0,0 +1,1282 @@ + /** + ******************************************************************************************************* + * @file fm33lg0xx_fl_dma.h + * @author FMSH Application Team + * @brief Head file of DMA FL Module + ******************************************************************************************************* + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + + + +/* Define to prevent recursive inclusion---------------------------------------------------------------*/ +#ifndef __FM33LG0XX_FL_DMA_H +#define __FM33LG0XX_FL_DMA_H + +#ifdef __cplusplus +extern "C" { +#endif +/* Includes -------------------------------------------------------------------------------------------*/ +#include "fm33lg0xx_fl_def.h" +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @defgroup DMA DMA + * @brief DMA FL driver + * @{ + */ + +/* Exported types -------------------------------------------------------------------------------------*/ +/** @defgroup DMA_FL_ES_INIT DMA Exported Init structures + * @{ + */ + +/** + * @brief FL DMA Init Sturcture definition + */ +typedef struct +{ + /*! DMA外设映射地址 */ + uint32_t periphAddress; + /*! DMA传输方向 */ + uint32_t direction; + /*! RAM地址增长方向 */ + uint32_t memoryAddressIncMode; + /*! RAM地址增长方向 */ + uint32_t flashAddressIncMode; + /*! DAM传输通道数据位宽 */ + uint32_t dataSize; + /*! DMA通道优先级 */ + uint32_t priority; + /*! 循环模式使能 */ + uint32_t circMode; + +} FL_DMA_InitTypeDef; + +/** + * @brief FL DMA Config Sturcture definition + */ +typedef struct +{ + /*! RAM地址 */ + uint32_t memoryAddress; + /*! DMA传输数据字节个数 */ + uint32_t transmissionCount; + +} FL_DMA_ConfigTypeDef; + +/** + * @brief Configuration with temporary structure variable users will not be used directly + */ +typedef struct +{ + __IO uint32_t CHCR; + __IO uint32_t CHMAD; +} CHANNEL; + +/** + * @brief Configuration with temporary structure variable users will not be used directly + */ +typedef struct +{ + __IO uint32_t RESV; + __IO CHANNEL Channel[7]; + __IO uint32_t CH7CR; + __IO uint32_t CH7FLSAD; + __IO uint32_t CH7MAD; +} DMA_ADDR; + +/** + * @} + */ +/* Exported constants ---------------------------------------------------------------------------------*/ +/** @defgroup DMA_FL_Exported_Constants DMA Exported Constants + * @{ + */ + +#define DMA_GCR_ADDRERR_IE_Pos (1U) +#define DMA_GCR_ADDRERR_IE_Msk (0x1Ul << DMA_GCR_ADDRERR_IE_Pos) +#define DMA_GCR_ADDRERR_IE DMA_GCR_ADDRERR_IE_Msk + +#define DMA_GCR_EN_Pos (0U) +#define DMA_GCR_EN_Msk (0x1Ul << DMA_GCR_EN_Pos) +#define DMA_GCR_EN DMA_GCR_EN_Msk + +#define DMA_CHCR_TSIZE_Pos (16U) +#define DMA_CHCR_TSIZE_Msk (0xffffUl << DMA_CHCR_TSIZE_Pos) +#define DMA_CHCR_TSIZE DMA_CHCR_TSIZE_Msk + +#define DMA_CHCR_PRI_Pos (12U) +#define DMA_CHCR_PRI_Msk (0x3Ul << DMA_CHCR_PRI_Pos) +#define DMA_CHCR_PRI DMA_CHCR_PRI_Msk + +#define DMA_CHCR_INC_Pos (11U) +#define DMA_CHCR_INC_Msk (0x1Ul << DMA_CHCR_INC_Pos) +#define DMA_CHCR_INC DMA_CHCR_INC_Msk + +#define DMA_CH7CR_RAM_INC_Pos (9Ul) +#define DMA_CH7CR_RAM_INC_Msk (0x1UL << DMA_CH7CR_RAM_INC_Pos) +#define DMA_CH7CR_RAM_INC DMA_CH7CR_RAM_INC_Msk + +#define DMA_CH7CR_FLASH_INC_Pos (8U) +#define DMA_CH7CR_FLASH_INC_Msk (0x1UL << DMA_CH7CR_FLASH_INC_Pos) +#define DMA_CH7CR_INC DMA_CH7CR_FLASH_INC_Msk + +#define DMA_CHCR_SSEL_Pos (8U) +#define DMA_CHCR_SSEL_Msk (0x7Ul << DMA_CHCR_SSEL_Pos) +#define DMA_CHCR_SSEL DMA_CHCR_SSEL_Msk + +#define DMA_CHCR_DIR_Pos (6U) +#define DMA_CHCR_DIR_Msk (0x1Ul << DMA_CHCR_DIR_Pos) +#define DMA_CHCR_DIR DMA_CHCR_DIR_Msk + +#define DMA_CH7CR_DIR_Pos (10U) +#define DMA_CH7CR_DIR_Msk (0x1UL << DMA_CH7CR_DIR_Pos) +#define DMA_CH7CR_DIR DMA_CH7CR_DIR_Msk + +#define DMA_CHCR_BDW_Pos (4U) +#define DMA_CHCR_BDW_Msk (0x3Ul << DMA_CHCR_BDW_Pos) +#define DMA_CHCR_BDW DMA_CHCR_BDW_Msk + +#define DMA_CHCR_CIRC_Pos (3U) +#define DMA_CHCR_CIRC_Msk (0x1Ul << DMA_CHCR_CIRC_Pos) +#define DMA_CHCR_CIRC DMA_CHCR_CIRC_Msk + +#define DMA_CHCR_FTIE_Pos (2U) +#define DMA_CHCR_FTIE_Msk (0x1Ul << DMA_CHCR_FTIE_Pos) +#define DMA_CHCR_FTIE DMA_CHCR_FTIE_Msk + +#define DMA_CHCR_HTIE_Pos (1U) +#define DMA_CHCR_HTIE_Msk (0x1Ul << DMA_CHCR_HTIE_Pos) +#define DMA_CHCR_HTIE DMA_CHCR_HTIE_Msk + +#define DMA_CHCR_EN_Pos (0U) +#define DMA_CHCR_EN_Msk (0x1Ul << DMA_CHCR_EN_Pos) +#define DMA_CHCR_EN DMA_CHCR_EN_Msk + +#define DMA_ISR_ADDRERR_Pos (16U) +#define DMA_ISR_ADDRERR_Msk (0x1Ul << DMA_ISR_ADDRERR_Pos) +#define DMA_ISR_ADDRERR DMA_ISR_ADDRERR_Msk + +#define DMA_ISR_CHFT_Pos (8U) +#define DMA_ISR_CHFT_Msk (0x1Ul << DMA_ISR_CHFT_Pos) +#define DMA_ISR_CHFT DMA_ISR_CHFT_Msk + +#define DMA_ISR_CHHT_Pos (0U) +#define DMA_ISR_CHHT_Msk (0x1Ul << DMA_ISR_CHHT_Pos) +#define DMA_ISR_CHHT DMA_ISR_CHHT_Msk + + + +#define FL_DMA_CHANNEL_0 (0x0Ul << 0U) +#define FL_DMA_CHANNEL_1 (0x1Ul << 0U) +#define FL_DMA_CHANNEL_2 (0x2Ul << 0U) +#define FL_DMA_CHANNEL_3 (0x3Ul << 0U) +#define FL_DMA_CHANNEL_4 (0x4Ul << 0U) +#define FL_DMA_CHANNEL_5 (0x5Ul << 0U) +#define FL_DMA_CHANNEL_6 (0x6Ul << 0U) +#define FL_DMA_CHANNEL_7 (0x7Ul << 0U) + + + +#define FL_DMA_PRIORITY_LOW (0x0Ul << DMA_CHCR_PRI_Pos) +#define FL_DMA_PRIORITY_MEDIUM (0x1Ul << DMA_CHCR_PRI_Pos) +#define FL_DMA_PRIORITY_HIGH (0x2Ul << DMA_CHCR_PRI_Pos) +#define FL_DMA_PRIORITY_VERYHIGH (0x3Ul << DMA_CHCR_PRI_Pos) + + +#define FL_DMA_MEMORY_INC_MODE_INCREASE (0x1Ul << DMA_CHCR_INC_Pos) +#define FL_DMA_MEMORY_INC_MODE_DECREASE (0x0Ul << DMA_CHCR_INC_Pos) +#define FL_DMA_CH7_RAM_INC_MODE_INCREASE (0x1Ul << DMA_CH7CR_RAM_INC_Pos) +#define FL_DMA_CH7_RAM_INC_MODE_DECREASE (0x0Ul << DMA_CH7CR_RAM_INC_Pos) +#define FL_DMA_CH7_FLASH_INC_MODE_INCREASE (0x1Ul << DMA_CH7CR_FLASH_INC_Pos) +#define FL_DMA_CH7_FLASH_INC_MODE_DECREASE (0x0Ul << DMA_CH7CR_FLASH_INC_Pos) + + +#define FL_DMA_PERIPHERAL_FUNCTION1 (0x0Ul << DMA_CHCR_SSEL_Pos) +#define FL_DMA_PERIPHERAL_FUNCTION2 (0x1Ul << DMA_CHCR_SSEL_Pos) +#define FL_DMA_PERIPHERAL_FUNCTION3 (0x2Ul << DMA_CHCR_SSEL_Pos) +#define FL_DMA_PERIPHERAL_FUNCTION4 (0x3Ul << DMA_CHCR_SSEL_Pos) +#define FL_DMA_PERIPHERAL_FUNCTION5 (0x4Ul << DMA_CHCR_SSEL_Pos) +#define FL_DMA_PERIPHERAL_FUNCTION6 (0x5Ul << DMA_CHCR_SSEL_Pos) +#define FL_DMA_PERIPHERAL_FUNCTION7 (0x6Ul << DMA_CHCR_SSEL_Pos) +#define FL_DMA_PERIPHERAL_FUNCTION8 (0x7Ul << DMA_CHCR_SSEL_Pos) + + +#define FL_DMA_DIR_PERIPHERAL_TO_RAM (0x0Ul << DMA_CHCR_DIR_Pos) +#define FL_DMA_DIR_RAM_TO_PERIPHERAL (0x1Ul << DMA_CHCR_DIR_Pos) +#define FL_DMA_DIR_FLASH_TO_RAM (0x1Ul << DMA_CH7CR_DIR_Pos) +#define FL_DMA_DIR_RAM_TO_FLASH (0x0Ul << DMA_CH7CR_DIR_Pos) + + +#define FL_DMA_BANDWIDTH_8B (0x0Ul << DMA_CHCR_BDW_Pos) +#define FL_DMA_BANDWIDTH_16B (0x1Ul << DMA_CHCR_BDW_Pos) +#define FL_DMA_BANDWIDTH_32B (0x2Ul << DMA_CHCR_BDW_Pos) + + +/** + * @} + */ +/* Exported functions ---------------------------------------------------------------------------------*/ +/** @defgroup DMA_FL_Exported_Functions DMA Exported Functions + * @{ + */ + +/** + * @brief DMA address error interrupt enable + * @rmtoll GCR ADDRERR_IE FL_DMA_EnableIT_AddressError + * @param DMAx DMA instance + * @retval None + */ +__STATIC_INLINE void FL_DMA_EnableIT_AddressError(DMA_Type *DMAx) +{ + SET_BIT(DMAx->GCR, DMA_GCR_ADDRERR_IE_Msk); +} + +/** + * @brief Get DMA address error interrupt enable status + * @rmtoll GCR ADDRERR_IE FL_DMA_IsEnabledIT_AddressError + * @param DMAx DMA instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_DMA_IsEnabledIT_AddressError(DMA_Type *DMAx) +{ + return (uint32_t)(READ_BIT(DMAx->GCR, DMA_GCR_ADDRERR_IE_Msk) == DMA_GCR_ADDRERR_IE_Msk); +} + +/** + * @brief DMA address error interrupt disable + * @rmtoll GCR ADDRERR_IE FL_DMA_DisableIT_AddressError + * @param DMAx DMA instance + * @retval None + */ +__STATIC_INLINE void FL_DMA_DisableIT_AddressError(DMA_Type *DMAx) +{ + CLEAR_BIT(DMAx->GCR, DMA_GCR_ADDRERR_IE_Msk); +} + +/** + * @brief DMA enable + * @rmtoll GCR EN FL_DMA_Enable + * @param DMAx DMA instance + * @retval None + */ +__STATIC_INLINE void FL_DMA_Enable(DMA_Type *DMAx) +{ + SET_BIT(DMAx->GCR, DMA_GCR_EN_Msk); +} + +/** + * @brief Get DMA enable status + * @rmtoll GCR EN FL_DMA_IsEnabled + * @param DMAx DMA instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_DMA_IsEnabled(DMA_Type *DMAx) +{ + return (uint32_t)(READ_BIT(DMAx->GCR, DMA_GCR_EN_Msk) == DMA_GCR_EN_Msk); +} + +/** + * @brief DMA disable + * @rmtoll GCR EN FL_DMA_Disable + * @param DMAx DMA instance + * @retval None + */ +__STATIC_INLINE void FL_DMA_Disable(DMA_Type *DMAx) +{ + CLEAR_BIT(DMAx->GCR, DMA_GCR_EN_Msk); +} + +/** + * @brief Set channelx transmission length + * @rmtoll CHCR TSIZE FL_DMA_WriteTransmissionSize + * @param DMAx DMA instance + * @param size + * @param channel This parameter can be one of the following values: + * @arg @ref FL_DMA_CHANNEL_0 + * @arg @ref FL_DMA_CHANNEL_1 + * @arg @ref FL_DMA_CHANNEL_2 + * @arg @ref FL_DMA_CHANNEL_3 + * @arg @ref FL_DMA_CHANNEL_4 + * @arg @ref FL_DMA_CHANNEL_5 + * @arg @ref FL_DMA_CHANNEL_6 + * @arg @ref FL_DMA_CHANNEL_7 + * @retval None + */ +__STATIC_INLINE void FL_DMA_WriteTransmissionSize(DMA_Type *DMAx, uint32_t size, uint32_t channel) +{ + DMA_ADDR *Temp = (DMA_ADDR *)DMAx; + if(channel <= FL_DMA_CHANNEL_6) + { + MODIFY_REG(Temp->Channel[channel].CHCR, (0xffffU << 16U), (size << 16U)); + } + else + { + MODIFY_REG(Temp->CH7CR, (0xfffU << 16U), (size << 16U)); + } +} + +/** + * @brief Get channelx transmission length + * @rmtoll CHCR TSIZE FL_DMA_ReadTransmissionSize + * @param DMAx DMA instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_DMA_CHANNEL_0 + * @arg @ref FL_DMA_CHANNEL_1 + * @arg @ref FL_DMA_CHANNEL_2 + * @arg @ref FL_DMA_CHANNEL_3 + * @arg @ref FL_DMA_CHANNEL_4 + * @arg @ref FL_DMA_CHANNEL_5 + * @arg @ref FL_DMA_CHANNEL_6 + * @arg @ref FL_DMA_CHANNEL_7 + * @retval + */ +__STATIC_INLINE uint32_t FL_DMA_ReadTransmissionSize(DMA_Type *DMAx, uint32_t channel) +{ + DMA_ADDR *Temp = (DMA_ADDR *)DMAx; + if(channel <= FL_DMA_CHANNEL_6) + { + return (uint32_t)(READ_BIT(Temp->Channel[channel].CHCR, (0xffffU << 16)) >> 16U); + } + else + { + return (uint32_t)(READ_BIT(Temp->CH7CR, (0xffffU << 16)) >> 16U); + } +} + +/** + * @brief Set channelx priority + * @rmtoll CHCR PRI FL_DMA_SetPriority + * @param DMAx DMA instance + * @param priority This parameter can be one of the following values: + * @arg @ref FL_DMA_PRIORITY_LOW + * @arg @ref FL_DMA_PRIORITY_MEDIUM + * @arg @ref FL_DMA_PRIORITY_HIGH + * @arg @ref FL_DMA_PRIORITY_VERYHIGH + * @param channel This parameter can be one of the following values: + * @arg @ref FL_DMA_CHANNEL_0 + * @arg @ref FL_DMA_CHANNEL_1 + * @arg @ref FL_DMA_CHANNEL_2 + * @arg @ref FL_DMA_CHANNEL_3 + * @arg @ref FL_DMA_CHANNEL_4 + * @arg @ref FL_DMA_CHANNEL_5 + * @arg @ref FL_DMA_CHANNEL_6 + * @arg @ref FL_DMA_CHANNEL_7 + * @retval None + */ +__STATIC_INLINE void FL_DMA_SetPriority(DMA_Type *DMAx, uint32_t priority, uint32_t channel) +{ + DMA_ADDR *Temp = (DMA_ADDR *)DMAx; + if(channel <= FL_DMA_CHANNEL_6) + { + MODIFY_REG(Temp->Channel[channel].CHCR, DMA_CHCR_PRI_Msk, priority); + } + else + { + MODIFY_REG(Temp->CH7CR, DMA_CHCR_PRI_Msk, priority); + } +} + +/** + * @brief Get channelx priority + * @rmtoll CHCR PRI FL_DMA_GetPriority + * @param DMAx DMA instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_DMA_CHANNEL_0 + * @arg @ref FL_DMA_CHANNEL_1 + * @arg @ref FL_DMA_CHANNEL_2 + * @arg @ref FL_DMA_CHANNEL_3 + * @arg @ref FL_DMA_CHANNEL_4 + * @arg @ref FL_DMA_CHANNEL_5 + * @arg @ref FL_DMA_CHANNEL_6 + * @arg @ref FL_DMA_CHANNEL_7 + * @retval Returned value can be one of the following values: + * @arg @ref FL_DMA_PRIORITY_LOW + * @arg @ref FL_DMA_PRIORITY_MEDIUM + * @arg @ref FL_DMA_PRIORITY_HIGH + * @arg @ref FL_DMA_PRIORITY_VERYHIGH + */ +__STATIC_INLINE uint32_t FL_DMA_GetPriority(DMA_Type *DMAx, uint32_t channel) +{ + DMA_ADDR *Temp = (DMA_ADDR *)DMAx; + if(channel <= FL_DMA_CHANNEL_6) + { + return (uint32_t)(READ_BIT(Temp->Channel[channel].CHCR, DMA_CHCR_PRI_Msk)); + } + else + { + return (uint32_t)(READ_BIT(Temp->CH7CR, DMA_CHCR_PRI_Msk)); + } +} + +/** + * @brief Set channelx RAM address incremental + * @rmtoll CHCR INC FL_DMA_SetMemoryIncrementMode + + * @param DMAx DMA instance + * @param mode This parameter can be one of the following values: + * @arg @ref FL_DMA_MEMORY_INC_MODE_INCREASE + * @arg @ref FL_DMA_MEMORY_INC_MODE_DECREASE + * @param channel This parameter can be one of the following values: + * @arg @ref FL_DMA_CHANNEL_0 + * @arg @ref FL_DMA_CHANNEL_1 + * @arg @ref FL_DMA_CHANNEL_2 + * @arg @ref FL_DMA_CHANNEL_3 + * @arg @ref FL_DMA_CHANNEL_4 + * @arg @ref FL_DMA_CHANNEL_5 + * @arg @ref FL_DMA_CHANNEL_6 + * @arg @ref FL_DMA_CHANNEL_7 + * @retval None + */ +__STATIC_INLINE void FL_DMA_SetMemoryIncrementMode(DMA_Type *DMAx, uint32_t mode, uint32_t channel) +{ + DMA_ADDR *Temp = (DMA_ADDR *)DMAx; + if(channel <= FL_DMA_CHANNEL_6) + { + MODIFY_REG(Temp->Channel[channel].CHCR, DMA_CHCR_INC_Msk, mode); + } + else + { + MODIFY_REG(Temp->CH7CR, DMA_CH7CR_RAM_INC_Msk, mode); + } +} + +/** + * @brief Get channelx RAM address incremental status + * @rmtoll CHCR INC FL_DMA_GetMemoryIncrementMode + * @param DMAx DMA instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_DMA_CHANNEL_0 + * @arg @ref FL_DMA_CHANNEL_1 + * @arg @ref FL_DMA_CHANNEL_2 + * @arg @ref FL_DMA_CHANNEL_3 + * @arg @ref FL_DMA_CHANNEL_4 + * @arg @ref FL_DMA_CHANNEL_5 + * @arg @ref FL_DMA_CHANNEL_6 + * @arg @ref FL_DMA_CHANNEL_7 + * @retval Returned value can be one of the following values: + * @arg @ref FL_DMA_MEMORY_INC_MODE_INCREASE + * @arg @ref FL_DMA_MEMORY_INC_MODE_DECREASE + * @arg @ref FL_DMA_CH7_RAM_INC_MODE_INCREASE + * @arg @ref FL_DMA_CH7_RAM_INC_MODE_REDUCE + */ +__STATIC_INLINE uint32_t FL_DMA_GetMemoryIncrementMode(DMA_Type *DMAx, uint32_t channel) +{ + DMA_ADDR *Temp = (DMA_ADDR *)DMAx; + if(channel <= FL_DMA_CHANNEL_6) + { + return (uint32_t)(READ_BIT(Temp->Channel[channel].CHCR, DMA_CHCR_INC_Msk)); + } + else + { + return (uint32_t)(READ_BIT(Temp->CH7CR, DMA_CH7CR_RAM_INC_Msk)); + } +} + +/** + * @brief + * @rmtoll CH7CR INC FL_DMA_SetFlashAddrIncremental + * @param DMAx DMA instance + * @param Incremental This parameter can be one of the following values: + * @arg @ref FL_DMA_CH7_FLASH_INC_MODE_INCREASE + * @arg @ref FL_DMA_CH7_FLASH_INC_MODE_REDUCE + * @retval None + */ +__STATIC_INLINE void FL_DMA_SetFlashAddrIncremental(DMA_Type *DMAx, uint32_t Incremental) +{ + DMA_ADDR *Temp = (DMA_ADDR *)DMAx; + MODIFY_REG(Temp->CH7CR, DMA_CH7CR_FLASH_INC_Msk, Incremental); +} + +/** + * @brief + * @rmtoll CHCR INC FL_DMA_GetFlashAddrIncremental + * @param DMAx DMA instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_DMA_CH7_FLASH_ADDR_INCREASE + * @arg @ref FL_DMA_CH7_FLASH_ADDR_REDUCE + */ +__STATIC_INLINE uint32_t FL_DMA_GetFlashAddrIncremental(DMA_Type *DMAx) +{ + DMA_ADDR *Temp = (DMA_ADDR *)DMAx; + return (uint32_t)(READ_BIT(Temp->CH7CR, DMA_CH7CR_FLASH_INC_Msk)); +} + +/** + * @brief Channelx request source select + * @rmtoll CHCR SSEL FL_DMA_SetPeripheralMap + * @param DMAx DMA instance + * @param peripheral This parameter can be one of the following values: + * @arg @ref FL_DMA_PERIPHERAL_FUNCTION1 + * @arg @ref FL_DMA_PERIPHERAL_FUNCTION2 + * @arg @ref FL_DMA_PERIPHERAL_FUNCTION3 + * @arg @ref FL_DMA_PERIPHERAL_FUNCTION4 + * @arg @ref FL_DMA_PERIPHERAL_FUNCTION5 + * @arg @ref FL_DMA_PERIPHERAL_FUNCTION6 + * @arg @ref FL_DMA_PERIPHERAL_FUNCTION7 + * @arg @ref FL_DMA_PERIPHERAL_FUNCTION8 + * @param channel This parameter can be one of the following values: + * @arg @ref FL_DMA_CHANNEL_0 + * @arg @ref FL_DMA_CHANNEL_1 + * @arg @ref FL_DMA_CHANNEL_2 + * @arg @ref FL_DMA_CHANNEL_3 + * @arg @ref FL_DMA_CHANNEL_4 + * @arg @ref FL_DMA_CHANNEL_5 + * @arg @ref FL_DMA_CHANNEL_6 + * @arg @ref FL_DMA_CHANNEL_7 + * @retval None + */ +__STATIC_INLINE void FL_DMA_SetPeripheralMap(DMA_Type *DMAx, uint32_t peripheral, uint32_t channel) +{ + DMA_ADDR *Temp = (DMA_ADDR *)DMAx; + if(channel <= FL_DMA_CHANNEL_6) + { + MODIFY_REG(Temp->Channel[channel].CHCR, DMA_CHCR_SSEL_Msk, peripheral); + } +} + +/** + * @brief Get Channelx request source select status + * @rmtoll CHCR SSEL FL_DMA_GetPeripheralMap + * @param DMAx DMA instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_DMA_CHANNEL_0 + * @arg @ref FL_DMA_CHANNEL_1 + * @arg @ref FL_DMA_CHANNEL_2 + * @arg @ref FL_DMA_CHANNEL_3 + * @arg @ref FL_DMA_CHANNEL_4 + * @arg @ref FL_DMA_CHANNEL_5 + * @arg @ref FL_DMA_CHANNEL_6 + * @arg @ref FL_DMA_CHANNEL_7 + * @retval Returned value can be one of the following values: + * @arg @ref FL_DMA_PERIPHERAL_FUNCTION1 + * @arg @ref FL_DMA_PERIPHERAL_FUNCTION2 + * @arg @ref FL_DMA_PERIPHERAL_FUNCTION3 + * @arg @ref FL_DMA_PERIPHERAL_FUNCTION4 + * @arg @ref FL_DMA_PERIPHERAL_FUNCTION5 + * @arg @ref FL_DMA_PERIPHERAL_FUNCTION6 + * @arg @ref FL_DMA_PERIPHERAL_FUNCTION7 + * @arg @ref FL_DMA_PERIPHERAL_FUNCTION8 + */ +__STATIC_INLINE uint32_t FL_DMA_GetPeripheralMap(DMA_Type *DMAx, uint32_t channel) +{ + DMA_ADDR *Temp = (DMA_ADDR *)DMAx; + if(channel <= FL_DMA_CHANNEL_6) + { + return (uint32_t)(READ_BIT(Temp->Channel[channel].CHCR, DMA_CHCR_SSEL_Msk)); + } + return 0; +} + +/** + * @brief Set channelx transmit direction + * @rmtoll CHCR DIR FL_DMA_SetTransmissionDirection + * @param DMAx DMA instance + * @param direction This parameter can be one of the following values: + * @arg @ref FL_DMA_DIR_PERIPHERAL_TO_RAM + * @arg @ref FL_DMA_DIR_RAM_TO_PERIPHERAL + * @param channel This parameter can be one of the following values: + * @arg @ref FL_DMA_CHANNEL_0 + * @arg @ref FL_DMA_CHANNEL_1 + * @arg @ref FL_DMA_CHANNEL_2 + * @arg @ref FL_DMA_CHANNEL_3 + * @arg @ref FL_DMA_CHANNEL_4 + * @arg @ref FL_DMA_CHANNEL_5 + * @arg @ref FL_DMA_CHANNEL_6 + * @arg @ref FL_DMA_CHANNEL_7 + * @retval None + */ +__STATIC_INLINE void FL_DMA_SetTransmissionDirection(DMA_Type *DMAx, uint32_t direction, uint32_t channel) +{ + DMA_ADDR *Temp = (DMA_ADDR *)DMAx; + if(channel <= FL_DMA_CHANNEL_6) + { + MODIFY_REG(Temp->Channel[channel].CHCR, DMA_CHCR_DIR_Msk, direction); + } + else + { + MODIFY_REG(Temp->CH7CR, DMA_CH7CR_DIR_Msk, direction); + } +} + +/** + * @brief Get channelx transmit direction + * @rmtoll CHCR DIR FL_DMA_GetTransmissionDirection + * @param DMAx DMA instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_DMA_CHANNEL_0 + * @arg @ref FL_DMA_CHANNEL_1 + * @arg @ref FL_DMA_CHANNEL_2 + * @arg @ref FL_DMA_CHANNEL_3 + * @arg @ref FL_DMA_CHANNEL_4 + * @arg @ref FL_DMA_CHANNEL_5 + * @arg @ref FL_DMA_CHANNEL_6 + * @arg @ref FL_DMA_CHANNEL_7 + * @retval Returned value can be one of the following values: + * @arg @ref FL_DMA_DIR_PERIPHERAL_TO_RAM + * @arg @ref FL_DMA_DIR_RAM_TO_PERIPHERAL + */ +__STATIC_INLINE uint32_t FL_DMA_GetTransmissionDirection(DMA_Type *DMAx, uint32_t channel) +{ + DMA_ADDR *Temp = (DMA_ADDR *)DMAx; + if(channel <= FL_DMA_CHANNEL_6) + { + return (uint32_t)(READ_BIT(Temp->Channel[channel].CHCR, DMA_CHCR_DIR_Msk)); + } + else + { + return (uint32_t)(READ_BIT(Temp->CH7CR, DMA_CH7CR_DIR_Msk)); + } +} + +/** + * @brief Set transmit bandwidth + * @rmtoll CHCR BDW FL_DMA_SetBandwidth + * @param DMAx DMA instance + * @param bandwidth This parameter can be one of the following values: + * @arg @ref FL_DMA_BANDWIDTH_8B + * @arg @ref FL_DMA_BANDWIDTH_16B + * @arg @ref FL_DMA_BANDWIDTH_32B + * @param channel This parameter can be one of the following values: + * @arg @ref FL_DMA_CHANNEL_0 + * @arg @ref FL_DMA_CHANNEL_1 + * @arg @ref FL_DMA_CHANNEL_2 + * @arg @ref FL_DMA_CHANNEL_3 + * @arg @ref FL_DMA_CHANNEL_4 + * @arg @ref FL_DMA_CHANNEL_5 + * @arg @ref FL_DMA_CHANNEL_6 + * @arg @ref FL_DMA_CHANNEL_7 + * @retval None + */ +__STATIC_INLINE void FL_DMA_SetBandwidth(DMA_Type *DMAx, uint32_t bandwidth, uint32_t channel) +{ + DMA_ADDR *Temp = (DMA_ADDR *)DMAx; + if(channel <= FL_DMA_CHANNEL_6) + { + MODIFY_REG(Temp->Channel[channel].CHCR, DMA_CHCR_BDW_Msk, bandwidth); + } +} + +/** + * @brief Get transmit bandwidth + * @rmtoll CHCR BDW FL_DMA_GetBandwidth + * @param DMAx DMA instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_DMA_CHANNEL_0 + * @arg @ref FL_DMA_CHANNEL_1 + * @arg @ref FL_DMA_CHANNEL_2 + * @arg @ref FL_DMA_CHANNEL_3 + * @arg @ref FL_DMA_CHANNEL_4 + * @arg @ref FL_DMA_CHANNEL_5 + * @arg @ref FL_DMA_CHANNEL_6 + * @arg @ref FL_DMA_CHANNEL_7 + * @retval Returned value can be one of the following values: + * @arg @ref FL_DMA_BANDWIDTH_8B + * @arg @ref FL_DMA_BANDWIDTH_16B + * @arg @ref FL_DMA_BANDWIDTH_32B + */ +__STATIC_INLINE uint32_t FL_DMA_GetBandwidth(DMA_Type *DMAx, uint32_t channel) +{ + DMA_ADDR *Temp = (DMA_ADDR *)DMAx; + if(channel <= FL_DMA_CHANNEL_6) + { + return (uint32_t)(READ_BIT(Temp->Channel[channel].CHCR, DMA_CHCR_BDW_Msk)); + } + else + { + /* FLASH 通道 默认位宽32Bit */ + return FL_DMA_BANDWIDTH_32B; + } +} + +/** + * @brief Circular mode enable + * @rmtoll CHCR CIRC FL_DMA_EnableCircularMode + * @param DMAx DMA instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_DMA_CHANNEL_0 + * @arg @ref FL_DMA_CHANNEL_1 + * @arg @ref FL_DMA_CHANNEL_2 + * @arg @ref FL_DMA_CHANNEL_3 + * @arg @ref FL_DMA_CHANNEL_4 + * @arg @ref FL_DMA_CHANNEL_5 + * @arg @ref FL_DMA_CHANNEL_6 + * @arg @ref FL_DMA_CHANNEL_7 + * @retval None + */ +__STATIC_INLINE void FL_DMA_EnableCircularMode(DMA_Type *DMAx, uint32_t channel) +{ + DMA_ADDR *Temp = (DMA_ADDR *)DMAx; + if(channel <= FL_DMA_CHANNEL_6) + { + SET_BIT(Temp->Channel[channel].CHCR, DMA_CHCR_CIRC_Msk); + } + else + { + SET_BIT(Temp->CH7CR, DMA_CHCR_CIRC_Msk); + } +} + +/** + * @brief Get circular mode enable status + * @rmtoll CHCR CIRC FL_DMA_IsEnabledCircularMode + * @param DMAx DMA instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_DMA_CHANNEL_0 + * @arg @ref FL_DMA_CHANNEL_1 + * @arg @ref FL_DMA_CHANNEL_2 + * @arg @ref FL_DMA_CHANNEL_3 + * @arg @ref FL_DMA_CHANNEL_4 + * @arg @ref FL_DMA_CHANNEL_5 + * @arg @ref FL_DMA_CHANNEL_6 + * @arg @ref FL_DMA_CHANNEL_7 + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_DMA_IsEnabledCircularMode(DMA_Type *DMAx, uint32_t channel) +{ + DMA_ADDR *Temp = (DMA_ADDR *)DMAx; + if(channel <= FL_DMA_CHANNEL_6) + { + return (uint32_t)(READ_BIT(Temp->Channel[channel].CHCR, DMA_CHCR_CIRC_Msk) == DMA_CHCR_CIRC_Msk); + } + else + { + return (uint32_t)(READ_BIT(Temp->CH7CR, DMA_CHCR_CIRC_Msk) == DMA_CHCR_CIRC_Msk); + } +} + +/** + * @brief Circular mode disable + * @rmtoll CHCR CIRC FL_DMA_DisableCircularMode + * @param DMAx DMA instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_DMA_CHANNEL_0 + * @arg @ref FL_DMA_CHANNEL_1 + * @arg @ref FL_DMA_CHANNEL_2 + * @arg @ref FL_DMA_CHANNEL_3 + * @arg @ref FL_DMA_CHANNEL_4 + * @arg @ref FL_DMA_CHANNEL_5 + * @arg @ref FL_DMA_CHANNEL_6 + * @arg @ref FL_DMA_CHANNEL_7 + * @retval None + */ +__STATIC_INLINE void FL_DMA_DisableCircularMode(DMA_Type *DMAx, uint32_t channel) +{ + DMA_ADDR *Temp = (DMA_ADDR *)DMAx; + if(channel <= FL_DMA_CHANNEL_6) + { + CLEAR_BIT(Temp->Channel[channel].CHCR, DMA_CHCR_CIRC_Msk); + } + else + { + CLEAR_BIT(Temp->CH7CR, DMA_CHCR_CIRC_Msk); + } +} + +/** + * @brief channelx transmit finished interrupt enable + * @rmtoll CHCR FTIE FL_DMA_EnableIT_TransferComplete + * @param DMAx DMA instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_DMA_CHANNEL_0 + * @arg @ref FL_DMA_CHANNEL_1 + * @arg @ref FL_DMA_CHANNEL_2 + * @arg @ref FL_DMA_CHANNEL_3 + * @arg @ref FL_DMA_CHANNEL_4 + * @arg @ref FL_DMA_CHANNEL_5 + * @arg @ref FL_DMA_CHANNEL_6 + * @arg @ref FL_DMA_CHANNEL_7 + * @retval None + */ +__STATIC_INLINE void FL_DMA_EnableIT_TransferComplete(DMA_Type *DMAx, uint32_t channel) +{ + DMA_ADDR *Temp = (DMA_ADDR *)DMAx; + if(channel <= FL_DMA_CHANNEL_6) + { + SET_BIT(Temp->Channel[channel].CHCR, DMA_CHCR_FTIE_Msk); + } + else + { + SET_BIT(Temp->CH7CR, DMA_CHCR_FTIE_Msk); + } +} + +/** + * @brief Get channelx transmit finished interrupt enable status + * @rmtoll CHCR FTIE FL_DMA_IsEnabledIT_TransferComplete + * @param DMAx DMA instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_DMA_CHANNEL_0 + * @arg @ref FL_DMA_CHANNEL_1 + * @arg @ref FL_DMA_CHANNEL_2 + * @arg @ref FL_DMA_CHANNEL_3 + * @arg @ref FL_DMA_CHANNEL_4 + * @arg @ref FL_DMA_CHANNEL_5 + * @arg @ref FL_DMA_CHANNEL_6 + * @arg @ref FL_DMA_CHANNEL_7 + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_DMA_IsEnabledIT_TransferComplete(DMA_Type *DMAx, uint32_t channel) +{ + DMA_ADDR *Temp = (DMA_ADDR *)DMAx; + if(channel <= FL_DMA_CHANNEL_6) + { + return (uint32_t)(READ_BIT(Temp->Channel[channel].CHCR, DMA_CHCR_FTIE_Msk) == DMA_CHCR_FTIE_Msk); + } + else + { + return (uint32_t)(READ_BIT(Temp->CH7CR, DMA_CHCR_FTIE_Msk) == DMA_CHCR_FTIE_Msk); + } +} + +/** + * @brief channelx transmit finished interrupt disable + * @rmtoll CHCR FTIE FL_DMA_DisableIT_TransferComplete + * @param DMAx DMA instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_DMA_CHANNEL_0 + * @arg @ref FL_DMA_CHANNEL_1 + * @arg @ref FL_DMA_CHANNEL_2 + * @arg @ref FL_DMA_CHANNEL_3 + * @arg @ref FL_DMA_CHANNEL_4 + * @arg @ref FL_DMA_CHANNEL_5 + * @arg @ref FL_DMA_CHANNEL_6 + * @arg @ref FL_DMA_CHANNEL_7 + * @retval None + */ +__STATIC_INLINE void FL_DMA_DisableIT_TransferComplete(DMA_Type *DMAx, uint32_t channel) +{ + DMA_ADDR *Temp = (DMA_ADDR *)DMAx; + if(channel <= FL_DMA_CHANNEL_6) + { + CLEAR_BIT(Temp->Channel[channel].CHCR, DMA_CHCR_FTIE_Msk); + } + else + { + CLEAR_BIT(Temp->CH7CR, DMA_CHCR_FTIE_Msk); + } +} + +/** + * @brief Channelx Half-transfer interrupt enable + * @rmtoll CHCR HTIE FL_DMA_EnableIT_TransferHalfComplete + * @param DMAx DMA instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_DMA_CHANNEL_0 + * @arg @ref FL_DMA_CHANNEL_1 + * @arg @ref FL_DMA_CHANNEL_2 + * @arg @ref FL_DMA_CHANNEL_3 + * @arg @ref FL_DMA_CHANNEL_4 + * @arg @ref FL_DMA_CHANNEL_5 + * @arg @ref FL_DMA_CHANNEL_6 + * @arg @ref FL_DMA_CHANNEL_7 + * @retval None + */ +__STATIC_INLINE void FL_DMA_EnableIT_TransferHalfComplete(DMA_Type *DMAx, uint32_t channel) +{ + DMA_ADDR *Temp = (DMA_ADDR *)DMAx; + if(channel <= FL_DMA_CHANNEL_6) + { + SET_BIT(Temp->Channel[channel].CHCR, DMA_CHCR_HTIE_Msk); + } + else + { + SET_BIT(Temp->CH7CR, DMA_CHCR_HTIE_Msk); + } +} + +/** + * @brief Get Channelx Half-transfer interrupt enable status + * @rmtoll CHCR HTIE FL_DMA_IsEnabledIT_TransferHalfComplete + * @param DMAx DMA instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_DMA_CHANNEL_0 + * @arg @ref FL_DMA_CHANNEL_1 + * @arg @ref FL_DMA_CHANNEL_2 + * @arg @ref FL_DMA_CHANNEL_3 + * @arg @ref FL_DMA_CHANNEL_4 + * @arg @ref FL_DMA_CHANNEL_5 + * @arg @ref FL_DMA_CHANNEL_6 + * @arg @ref FL_DMA_CHANNEL_7 + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_DMA_IsEnabledIT_TransferHalfComplete(DMA_Type *DMAx, uint32_t channel) +{ + DMA_ADDR *Temp = (DMA_ADDR *)DMAx; + if(channel <= FL_DMA_CHANNEL_6) + { + return (uint32_t)(READ_BIT(Temp->Channel[channel].CHCR, DMA_CHCR_HTIE_Msk) == DMA_CHCR_HTIE_Msk); + } + else + { + return (uint32_t)(READ_BIT(Temp->CH7CR, DMA_CHCR_HTIE_Msk) == DMA_CHCR_HTIE_Msk); + } +} + +/** + * @brief Channelx Half-transfer interrupt disable + * @rmtoll CHCR HTIE FL_DMA_DisableIT_TransferHalfComplete + * @param DMAx DMA instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_DMA_CHANNEL_0 + * @arg @ref FL_DMA_CHANNEL_1 + * @arg @ref FL_DMA_CHANNEL_2 + * @arg @ref FL_DMA_CHANNEL_3 + * @arg @ref FL_DMA_CHANNEL_4 + * @arg @ref FL_DMA_CHANNEL_5 + * @arg @ref FL_DMA_CHANNEL_6 + * @arg @ref FL_DMA_CHANNEL_7 + * @retval None + */ +__STATIC_INLINE void FL_DMA_DisableIT_TransferHalfComplete(DMA_Type *DMAx, uint32_t channel) +{ + DMA_ADDR *Temp = (DMA_ADDR *)DMAx; + if(channel <= FL_DMA_CHANNEL_6) + { + CLEAR_BIT(Temp->Channel[channel].CHCR, DMA_CHCR_HTIE_Msk); + } + else + { + CLEAR_BIT(Temp->CH7CR, DMA_CHCR_HTIE_Msk); + } +} + +/** + * @brief Channelx enable + * @rmtoll CHCR EN FL_DMA_EnableChannel + * @param DMAx DMA instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_DMA_CHANNEL_0 + * @arg @ref FL_DMA_CHANNEL_1 + * @arg @ref FL_DMA_CHANNEL_2 + * @arg @ref FL_DMA_CHANNEL_3 + * @arg @ref FL_DMA_CHANNEL_4 + * @arg @ref FL_DMA_CHANNEL_5 + * @arg @ref FL_DMA_CHANNEL_6 + * @arg @ref FL_DMA_CHANNEL_7 + * @retval None + */ +__STATIC_INLINE void FL_DMA_EnableChannel(DMA_Type *DMAx, uint32_t channel) +{ + DMA_ADDR *Temp = (DMA_ADDR *)DMAx; + if(channel <= FL_DMA_CHANNEL_6) + { + SET_BIT(Temp->Channel[channel].CHCR, DMA_CHCR_EN_Msk); + } + else + { + SET_BIT(Temp->CH7CR, DMA_CHCR_EN_Msk); + } +} + +/** + * @brief Get channelx enable status + * @rmtoll CHCR EN FL_DMA_IsEnabledChannel + * @param DMAx DMA instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_DMA_CHANNEL_0 + * @arg @ref FL_DMA_CHANNEL_1 + * @arg @ref FL_DMA_CHANNEL_2 + * @arg @ref FL_DMA_CHANNEL_3 + * @arg @ref FL_DMA_CHANNEL_4 + * @arg @ref FL_DMA_CHANNEL_5 + * @arg @ref FL_DMA_CHANNEL_6 + * @arg @ref FL_DMA_CHANNEL_7 + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_DMA_IsEnabledChannel(DMA_Type *DMAx, uint32_t channel) +{ + DMA_ADDR *Temp = (DMA_ADDR *)DMAx; + if(channel <= FL_DMA_CHANNEL_6) + { + return (uint32_t)(READ_BIT(Temp->Channel[channel].CHCR, DMA_CHCR_EN_Msk) == DMA_CHCR_EN_Msk); + } + else + { + return (uint32_t)(READ_BIT(Temp->CH7CR, DMA_CHCR_CIRC_Msk) == DMA_CHCR_EN_Msk); + } +} + +/** + * @brief Channelx disable + * @rmtoll CHCR EN FL_DMA_DisableChannel + * @param DMAx DMA instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_DMA_CHANNEL_0 + * @arg @ref FL_DMA_CHANNEL_1 + * @arg @ref FL_DMA_CHANNEL_2 + * @arg @ref FL_DMA_CHANNEL_3 + * @arg @ref FL_DMA_CHANNEL_4 + * @arg @ref FL_DMA_CHANNEL_5 + * @arg @ref FL_DMA_CHANNEL_6 + * @arg @ref FL_DMA_CHANNEL_7 + * @retval None + */ +__STATIC_INLINE void FL_DMA_DisableChannel(DMA_Type *DMAx, uint32_t channel) +{ + DMA_ADDR *Temp = (DMA_ADDR *)DMAx; + if(channel <= FL_DMA_CHANNEL_6) + { + CLEAR_BIT(Temp->Channel[channel].CHCR, DMA_CHCR_EN_Msk); + } + else + { + CLEAR_BIT(Temp->CH7CR, DMA_CHCR_EN_Msk); + } +} + +/** + * @brief Set channelx memory pointer address + * @rmtoll MEMAD FL_DMA_WriteMemoryAddress + * @param DMAx DMA instance + * @param data + * @param channel This parameter can be one of the following values: + * @arg @ref FL_DMA_CHANNEL_0 + * @arg @ref FL_DMA_CHANNEL_1 + * @arg @ref FL_DMA_CHANNEL_2 + * @arg @ref FL_DMA_CHANNEL_3 + * @arg @ref FL_DMA_CHANNEL_4 + * @arg @ref FL_DMA_CHANNEL_5 + * @arg @ref FL_DMA_CHANNEL_6 + * @arg @ref FL_DMA_CHANNEL_7 + * @retval None + */ +__STATIC_INLINE void FL_DMA_WriteMemoryAddress(DMA_Type *DMAx, uint32_t data, uint32_t channel) +{ + DMA_ADDR *Temp = (DMA_ADDR *)DMAx; + if(channel <= FL_DMA_CHANNEL_6) + { + MODIFY_REG(Temp->Channel[channel].CHMAD, (0xffffffffU), (data)); + } + else + { + MODIFY_REG(Temp->CH7MAD, (0xfffU), (data)); + } +} + +/** + * @brief Get channelx memory pointer address + * @rmtoll MEMAD FL_DMA_ReadMemoryAddress + * @param DMAx DMA instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_DMA_CHANNEL_0 + * @arg @ref FL_DMA_CHANNEL_1 + * @arg @ref FL_DMA_CHANNEL_2 + * @arg @ref FL_DMA_CHANNEL_3 + * @arg @ref FL_DMA_CHANNEL_4 + * @arg @ref FL_DMA_CHANNEL_5 + * @arg @ref FL_DMA_CHANNEL_6 + * @arg @ref FL_DMA_CHANNEL_7 + * @retval + */ +__STATIC_INLINE uint32_t FL_DMA_ReadMemoryAddress(DMA_Type *DMAx, uint32_t channel) +{ + DMA_ADDR *Temp = (DMA_ADDR *)DMAx; + if(channel <= FL_DMA_CHANNEL_6) + { + return (uint32_t)(READ_BIT(Temp->Channel[channel].CHMAD, (0xffffffffU))); + } + else + { + return (uint32_t)(READ_BIT(Temp->CH7MAD, (0xfffU))); + } +} + +/** + * @brief Set channel7 flash pointer address + * @rmtoll CH7FLSAD FL_DMA_WriteFlashAddress + * @param DMAx DMA instance + * @param data + * @retval None + */ +__STATIC_INLINE void FL_DMA_WriteFlashAddress(DMA_Type *DMAx, uint32_t data) +{ + MODIFY_REG(DMAx->CH7FLSAD, (0x7fffU << 0U), (data << 0U)); +} + +/** + * @brief Get channel7 flash pointer address + * @rmtoll CH7FLSAD FL_DMA_ReadFlashAddress + * @param DMAx DMA instance + * @retval + */ +__STATIC_INLINE uint32_t FL_DMA_ReadFlashAddress(DMA_Type *DMAx) +{ + return (uint32_t)(READ_BIT(DMAx->CH7FLSAD, (0x7fffU << 0U)) >> 0U); +} + +/** + * @brief Get DMA address error flag + * @rmtoll ISR ADDRERR FL_DMA_IsActiveFlag_AddressError + * @param DMAx DMA instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_DMA_IsActiveFlag_AddressError(DMA_Type *DMAx) +{ + return (uint32_t)(READ_BIT(DMAx->ISR, DMA_ISR_ADDRERR_Msk) == (DMA_ISR_ADDRERR_Msk)); +} + +/** + * @brief Clear DMA address error flag + * @rmtoll ISR ADDRERR FL_DMA_ClearFlag_AddressError + * @param DMAx DMA instance + * @retval None + */ +__STATIC_INLINE void FL_DMA_ClearFlag_AddressError(DMA_Type *DMAx) +{ + WRITE_REG(DMAx->ISR, DMA_ISR_ADDRERR_Msk); +} + +/** + * @brief Get DMA channelx finished-transfer flag + * @rmtoll ISR CHFT FL_DMA_IsActiveFlag_TransferComplete + * @param DMAx DMA instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_DMA_CHANNEL_0 + * @arg @ref FL_DMA_CHANNEL_1 + * @arg @ref FL_DMA_CHANNEL_2 + * @arg @ref FL_DMA_CHANNEL_3 + * @arg @ref FL_DMA_CHANNEL_4 + * @arg @ref FL_DMA_CHANNEL_5 + * @arg @ref FL_DMA_CHANNEL_6 + * @arg @ref FL_DMA_CHANNEL_7 + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_DMA_IsActiveFlag_TransferComplete(DMA_Type *DMAx, uint32_t channel) +{ + return (uint32_t)(uint32_t)(READ_BIT(DMAx->ISR, (DMA_ISR_CHFT_Msk << channel)) + == (DMA_ISR_CHFT_Msk << channel)); +} + +/** + * @brief Clear DMA channelx finished-transfer flag + * @rmtoll ISR CHFT FL_DMA_ClearFlag_TransferComplete + * @param DMAx DMA instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_DMA_CHANNEL_0 + * @arg @ref FL_DMA_CHANNEL_1 + * @arg @ref FL_DMA_CHANNEL_2 + * @arg @ref FL_DMA_CHANNEL_3 + * @arg @ref FL_DMA_CHANNEL_4 + * @arg @ref FL_DMA_CHANNEL_5 + * @arg @ref FL_DMA_CHANNEL_6 + * @arg @ref FL_DMA_CHANNEL_7 + * @retval None + */ +__STATIC_INLINE void FL_DMA_ClearFlag_TransferComplete(DMA_Type *DMAx, uint32_t channel) +{ + WRITE_REG(DMAx->ISR, (DMA_ISR_CHFT_Msk << channel)); +} + +/** + * @brief Get DMA channel half-transfer flag + * @rmtoll ISR CHHT FL_DMA_IsActiveFlag_TransferHalfComplete + * @param DMAx DMA instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_DMA_CHANNEL_0 + * @arg @ref FL_DMA_CHANNEL_1 + * @arg @ref FL_DMA_CHANNEL_2 + * @arg @ref FL_DMA_CHANNEL_3 + * @arg @ref FL_DMA_CHANNEL_4 + * @arg @ref FL_DMA_CHANNEL_5 + * @arg @ref FL_DMA_CHANNEL_6 + * @arg @ref FL_DMA_CHANNEL_7 + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_DMA_IsActiveFlag_TransferHalfComplete(DMA_Type *DMAx, uint32_t channel) +{ + return (uint32_t)(uint32_t)(READ_BIT(DMAx->ISR, (DMA_ISR_CHHT_Msk << channel)) + == (DMA_ISR_CHHT_Msk << channel)); +} + +/** + * @brief Clear DMA channel half-transfer flag + * @rmtoll ISR CHHT FL_DMA_ClearFlag_TransferHalfComplete + * @param DMAx DMA instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_DMA_CHANNEL_0 + * @arg @ref FL_DMA_CHANNEL_1 + * @arg @ref FL_DMA_CHANNEL_2 + * @arg @ref FL_DMA_CHANNEL_3 + * @arg @ref FL_DMA_CHANNEL_4 + * @arg @ref FL_DMA_CHANNEL_5 + * @arg @ref FL_DMA_CHANNEL_6 + * @arg @ref FL_DMA_CHANNEL_7 + * @retval None + */ +__STATIC_INLINE void FL_DMA_ClearFlag_TransferHalfComplete(DMA_Type *DMAx, uint32_t channel) +{ + WRITE_REG(DMAx->ISR, (DMA_ISR_CHHT_Msk << channel)); +} + +/** + * @} + */ + +/** @defgroup DMA_FL_EF_Init Initialization and de-initialization functions + * @{ + */ +FL_ErrorStatus FL_DMA_DeInit(DMA_Type *DMAx); +FL_ErrorStatus FL_DMA_Init(DMA_Type *DMAx, FL_DMA_InitTypeDef *initStruct, uint32_t channel); +void FL_DMA_StructInit(FL_DMA_InitTypeDef *InitStruct); + +FL_ErrorStatus FL_DMA_StartTransmission(DMA_Type *DMAx, FL_DMA_ConfigTypeDef *configStruct, uint32_t channel); + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif /* __FM33LG0XX_FL_DMA_H*/ + +/*************************Py_Code_Generator Version: 0.1-0.14-0.1 @ 2020-10-20*************************/ +/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/ diff --git a/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_exti.h b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_exti.h new file mode 100644 index 0000000..e8721c9 --- /dev/null +++ b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_exti.h @@ -0,0 +1,157 @@ + /** + ******************************************************************************************************* + * @file fm33lg0xx_fl_exti.h + * @author FMSH Application Team + * @brief Head file of EXTI FL Module + ******************************************************************************************************* + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + + + +/* Define to prevent recursive inclusion---------------------------------------------------------------*/ +#ifndef __FM33LG0XX_FL_EXTI_H +#define __FM33LG0XX_FL_EXTI_H + +#ifdef __cplusplus +extern "C" { +#endif +/* Includes -------------------------------------------------------------------------------------------*/ +#include "fm33lg0xx_fl_def.h" +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @defgroup EXTI EXTI + * @brief EXTI FL driver + * @{ + */ + +/* Exported types -------------------------------------------------------------------------------------*/ +/** @defgroup EXTI_FL_ES_INIT EXTI Exported Init structures + * @{ + */ + +/** + * @brief FL EXTI Common Init Sturcture definition + */ +typedef struct +{ + /*! EXTI时钟源配置 */ + uint32_t clockSource; + +} FL_EXTI_CommonInitTypeDef; + +/** + * @brief FL EXTI Init Sturcture definition + */ +typedef struct +{ + /*! EXTI输入配置 */ + uint32_t input; + + /*! EXTI触发边沿配置 */ + uint32_t triggerEdge; + + /*! EXTI数字滤波配置 */ + uint32_t filter; + +} FL_EXTI_InitTypeDef; + +/** + * @} + */ +/* Exported constants ---------------------------------------------------------------------------------*/ +/** @defgroup EXTI_FL_Exported_Constants EXTI Exported Constants + * @{ + */ + + + +#define FL_GPIO_EXTI_INPUT_GROUP0 (0x0Ul << 0U) +#define FL_GPIO_EXTI_INPUT_GROUP1 (0x1Ul << 0U) +#define FL_GPIO_EXTI_INPUT_GROUP2 (0x2Ul << 0U) +#define FL_GPIO_EXTI_INPUT_GROUP3 (0x3Ul << 0U) + + + +/** + * @} + */ +/* Exported functions ---------------------------------------------------------------------------------*/ +/** @defgroup EXTI_FL_Exported_Functions EXTI Exported Functions + * @{ + */ + +/** + * @} + */ + +/** @defgroup EXTI_FL_EF_Init Initialization and de-initialization functions + * @{ + */ + +FL_ErrorStatus FL_EXTI_CommonInit(FL_EXTI_CommonInitTypeDef *init); +FL_ErrorStatus FL_EXTI_CommonDeinit(void); +void FL_EXTI_CommonStructInit(FL_EXTI_CommonInitTypeDef *init); + +FL_ErrorStatus FL_EXTI_Init(uint32_t extiLineX, FL_EXTI_InitTypeDef *init); +FL_ErrorStatus FL_EXTI_DeInit(uint32_t extiLineX); +void FL_EXTI_StructInit(FL_EXTI_InitTypeDef *init); + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif /* __FM33LG0XX_FL_EXTI_H*/ + +/*************************Py_Code_Generator Version: 0.1-0.14-0.2 @ 2021-03-16*************************/ +/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/ diff --git a/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_flash.h b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_flash.h new file mode 100644 index 0000000..2db044f --- /dev/null +++ b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_flash.h @@ -0,0 +1,1045 @@ + /** + ******************************************************************************************************* + * @file fm33lg0xx_fl_flash.h + * @author FMSH Application Team + * @brief Head file of FLASH FL Module + ******************************************************************************************************* + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + + + +/* Define to prevent recursive inclusion---------------------------------------------------------------*/ +#ifndef __FM33LG0XX_FL_FLASH_H +#define __FM33LG0XX_FL_FLASH_H + +#ifdef __cplusplus +extern "C" { +#endif +/* Includes -------------------------------------------------------------------------------------------*/ +#include "fm33lg0xx_fl_def.h" +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @defgroup FLASH FLASH + * @brief FLASH FL driver + * @{ + */ + +/* Exported types -------------------------------------------------------------------------------------*/ +/** @defgroup FLASH_FL_ES_INIT FLASH Exported Init structures + * @{ + */ + +/** + * @brief FL FLASH Init Sturcture definition + */ + +/** + * @} + */ +/* Exported constants ---------------------------------------------------------------------------------*/ +/** @defgroup FLASH_FL_Exported_Constants FLASH Exported Constants + * @{ + */ + +#define FLASH_RDCR_WAIT_Pos (0U) +#define FLASH_RDCR_WAIT_Msk (0x3Ul << FLASH_RDCR_WAIT_Pos) +#define FLASH_RDCR_WAIT FLASH_RDCR_WAIT_Msk + +#define FLASH_PFCR_PFTBUF_Pos (1U) +#define FLASH_PFCR_PFTBUF_Msk (0x1Ul << FLASH_PFCR_PFTBUF_Pos) +#define FLASH_PFCR_PFTBUF FLASH_PFCR_PFTBUF_Msk + +#define FLASH_PFCR_PRFTEN_Pos (0U) +#define FLASH_PFCR_PRFTEN_Msk (0x1Ul << FLASH_PFCR_PRFTEN_Pos) +#define FLASH_PFCR_PRFTEN FLASH_PFCR_PRFTEN_Msk + +#define FLASH_OPTBR_IWDTSLP_Pos (31U) +#define FLASH_OPTBR_IWDTSLP_Msk (0x1Ul << FLASH_OPTBR_IWDTSLP_Pos) +#define FLASH_OPTBR_IWDTSLP FLASH_OPTBR_IWDTSLP_Msk + +#define FLASH_OPTBR_IFLOCK_Pos (17U) +#define FLASH_OPTBR_IFLOCK_Msk (0x3Ul << FLASH_OPTBR_IFLOCK_Pos) +#define FLASH_OPTBR_IFLOCK FLASH_OPTBR_IFLOCK_Msk + +#define FLASH_OPTBR_DFLSEN_Pos (10U) +#define FLASH_OPTBR_DFLSEN_Msk (0x1Ul << FLASH_OPTBR_DFLSEN_Pos) +#define FLASH_OPTBR_DFLSEN FLASH_OPTBR_DFLSEN_Msk + +#define FLASH_OPTBR_BTSEN_Pos (8U) +#define FLASH_OPTBR_BTSEN_Msk (0x3Ul << FLASH_OPTBR_BTSEN_Pos) +#define FLASH_OPTBR_BTSEN FLASH_OPTBR_BTSEN_Msk + +#define FLASH_OPTBR_ACLOCKEN_Pos (2U) +#define FLASH_OPTBR_ACLOCKEN_Msk (0x3Ul << FLASH_OPTBR_ACLOCKEN_Pos) +#define FLASH_OPTBR_ACLOCKEN FLASH_OPTBR_ACLOCKEN_Msk + +#define FLASH_OPTBR_DBRDPEN_Pos (0U) +#define FLASH_OPTBR_DBRDPEN_Msk (0x3Ul << FLASH_OPTBR_DBRDPEN_Pos) +#define FLASH_OPTBR_DBRDPEN FLASH_OPTBR_DBRDPEN_Msk + +#define FLASH_EPCR_ERTYPE_Pos (8U) +#define FLASH_EPCR_ERTYPE_Msk (0x3Ul << FLASH_EPCR_ERTYPE_Pos) +#define FLASH_EPCR_ERTYPE FLASH_EPCR_ERTYPE_Msk + +#define FLASH_EPCR_PREQ_Pos (1U) +#define FLASH_EPCR_PREQ_Msk (0x1Ul << FLASH_EPCR_PREQ_Pos) +#define FLASH_EPCR_PREQ FLASH_EPCR_PREQ_Msk + +#define FLASH_EPCR_EREQ_Pos (0U) +#define FLASH_EPCR_EREQ_Msk (0x1Ul << FLASH_EPCR_EREQ_Pos) +#define FLASH_EPCR_EREQ FLASH_EPCR_EREQ_Msk + +#define FLASH_IER_OPTIE_Pos (11U) +#define FLASH_IER_OPTIE_Msk (0x1Ul << FLASH_IER_OPTIE_Pos) +#define FLASH_IER_OPTIE FLASH_IER_OPTIE_Msk + +#define FLASH_IER_AUTHIE_Pos (10U) +#define FLASH_IER_AUTHIE_Msk (0x1Ul << FLASH_IER_AUTHIE_Pos) +#define FLASH_IER_AUTHIE FLASH_IER_AUTHIE_Msk + +#define FLASH_IER_KEYIE_Pos (9U) +#define FLASH_IER_KEYIE_Msk (0x1Ul << FLASH_IER_KEYIE_Pos) +#define FLASH_IER_KEYIE FLASH_IER_KEYIE_Msk + +#define FLASH_IER_CKIE_Pos (8U) +#define FLASH_IER_CKIE_Msk (0x1Ul << FLASH_IER_CKIE_Pos) +#define FLASH_IER_CKIE FLASH_IER_CKIE_Msk + +#define FLASH_IER_PRDIE_Pos (1U) +#define FLASH_IER_PRDIE_Msk (0x1Ul << FLASH_IER_PRDIE_Pos) +#define FLASH_IER_PRDIE FLASH_IER_PRDIE_Msk + +#define FLASH_IER_ERDIE_Pos (0U) +#define FLASH_IER_ERDIE_Msk (0x1Ul << FLASH_IER_ERDIE_Pos) +#define FLASH_IER_ERDIE FLASH_IER_ERDIE_Msk + +#define FLASH_ISR_KEYSTA_Pos (17U) +#define FLASH_ISR_KEYSTA_Msk (0x7Ul << FLASH_ISR_KEYSTA_Pos) +#define FLASH_ISR_KEYSTA FLASH_ISR_KEYSTA_Msk + +#define FLASH_ISR_BTSF_Pos (16U) +#define FLASH_ISR_BTSF_Msk (0x1Ul << FLASH_ISR_BTSF_Pos) +#define FLASH_ISR_BTSF FLASH_ISR_BTSF_Msk + +#define FLASH_ISR_OPTERR_Pos (11U) +#define FLASH_ISR_OPTERR_Msk (0x1Ul << FLASH_ISR_OPTERR_Pos) +#define FLASH_ISR_OPTERR FLASH_ISR_OPTERR_Msk + +#define FLASH_ISR_AUTHERR_Pos (10U) +#define FLASH_ISR_AUTHERR_Msk (0x1Ul << FLASH_ISR_AUTHERR_Pos) +#define FLASH_ISR_AUTHERR FLASH_ISR_AUTHERR_Msk + +#define FLASH_ISR_KEYERR_Pos (9U) +#define FLASH_ISR_KEYERR_Msk (0x1Ul << FLASH_ISR_KEYERR_Pos) +#define FLASH_ISR_KEYERR FLASH_ISR_KEYERR_Msk + +#define FLASH_ISR_CKERR_Pos (8U) +#define FLASH_ISR_CKERR_Msk (0x1Ul << FLASH_ISR_CKERR_Pos) +#define FLASH_ISR_CKERR FLASH_ISR_CKERR_Msk + +#define FLASH_ISR_PRD_Pos (1U) +#define FLASH_ISR_PRD_Msk (0x1Ul << FLASH_ISR_PRD_Pos) +#define FLASH_ISR_PRD FLASH_ISR_PRD_Msk + +#define FLASH_ISR_ERD_Pos (0U) +#define FLASH_ISR_ERD_Msk (0x1Ul << FLASH_ISR_ERD_Pos) +#define FLASH_ISR_ERD FLASH_ISR_ERD_Msk + + +#define FL_FLASH_ERASE_KEY (0x96969696U) +#define FL_FLASH_CHIP_ERASE_KEY (0x7D7D7D7DU) +#define FL_FLASH_PGAE_ERASE_KEY (0xEAEAEAEAU) +#define FL_FLASH_SECTOR_ERASE_KEY (0x3C3C3C3CU) +#define FL_FLASH_ERASE_REQUEST (0x1234ABCDU) +#define FL_FLASH_PROGRAM_KEY1 (0xA5A5A5A5U) +#define FL_FLASH_PROGRAM_KEY2 (0xF1F1F1F1U) +/*8M*/ +#define FL_FLASH_ERASE_TIMEOUT (0x0000FFFFU) +#define FL_FLASH_ADDRS_ALIGN (0x00000004U) + +#define FL_FLASH_MAX_PAGE_NUM (0x00000200U) +#define FL_FLASH_MAX_SECTOR_NUM (0x00000080U) +#define FL_FLASH_SECTOR_SIZE_BYTE (0x00000800U) +#define FL_FLASH_PGAE_SIZE_BYTE (0x00000200U) +#define FL_FLASH_ADDR_MAXPROGRAM (0x0003FFFFU) + + +#define FL_FLASH_INFORMATION1_REGIN (0x1Ul << 17U) +#define FL_FLASH_INFORMATION2_REGIN (0x1Ul << 18U) +#define FL_FLASH_BLOCK_0 (0x1Ul << 0U) +#define FL_FLASH_BLOCK_1 (0x1Ul << 1U) +#define FL_FLASH_BLOCK_2 (0x1Ul << 2U) +#define FL_FLASH_BLOCK_3 (0x1Ul << 3U) +#define FL_FLASH_BLOCK_4 (0x1Ul << 4U) +#define FL_FLASH_BLOCK_5 (0x1Ul << 5U) +#define FL_FLASH_BLOCK_6 (0x1Ul << 6U) +#define FL_FLASH_BLOCK_7 (0x1Ul << 7U) +#define FL_FLASH_BLOCK_8 (0x1Ul << 8U) +#define FL_FLASH_BLOCK_9 (0x1Ul << 9U) +#define FL_FLASH_BLOCK_10 (0x1Ul << 10U) +#define FL_FLASH_BLOCK_11 (0x1Ul << 11U) +#define FL_FLASH_BLOCK_12 (0x1Ul << 12U) +#define FL_FLASH_BLOCK_13 (0x1Ul << 13U) +#define FL_FLASH_BLOCK_14 (0x1Ul << 14U) +#define FL_FLASH_BLOCK_15 (0x1Ul << 15U) +#define FL_FLASH_LOCK_ALL (0x0Ul << 0U) +#define FL_FLASH_LOCK_SOFTWARE (0x2Ul << 0U) +#define FL_FLASH_LOCK_NONE (0x3Ul << 0U) +#define FL_FLASH_BOOTSWAP_ENABLE (0x2Ul << 8U) +#define FL_FLASH_BOOTSWAP_DISABLE (0x0Ul << 8U) +#define FL_FLASH_APPCODE_LOCK_ENABLE (0x2Ul << 2U) +#define FL_FLASH_APPCODE_LOCK_DISABLE (0x0Ul << 2U) +#define FL_FLASH_DEBUG_READ_ENABLE (0x2Ul << 0U) +#define FL_FLASH_DEBUG_READ_DISABLE (0x0Ul << 0U) + + + +#define FL_FLASH_READ_WAIT_0CYCLE (0x0Ul << FLASH_RDCR_WAIT_Pos) +#define FL_FLASH_READ_WAIT_1CYCLE (0x1Ul << FLASH_RDCR_WAIT_Pos) +#define FL_FLASH_READ_WAIT_2CYCLE (0x2Ul << FLASH_RDCR_WAIT_Pos) + + +#define FL_FLASH_IWDT_STOP_UNDER_SLEEP (0x0Ul << FLASH_OPTBR_IWDTSLP_Pos) +#define FL_FLASH_IWDT_WORK_UNDER_SLEEP (0x1Ul << FLASH_OPTBR_IWDTSLP_Pos) + +#define FL_FLASH_IF_UNLOCK (0x0Ul << FLASH_OPTBR_IFLOCK_Pos) +#define FL_FLASH_IF_LOCK (0x1Ul << FLASH_OPTBR_IFLOCK_Pos) + +#define FL_FLASH_DATA_FLASH_DISABLE (0x0Ul << FLASH_OPTBR_DFLSEN_Pos) +#define FL_FLASH_DATA_FLASH_ENABLE (0x1Ul << FLASH_OPTBR_DFLSEN_Pos) + +#define FL_FLASH_BOOT_SWAP_DISABLE (0x0Ul << FLASH_OPTBR_BTSEN_Pos) +#define FL_FLASH_BOOT_SWAP_ENABLE (0x1Ul << FLASH_OPTBR_BTSEN_Pos) + +#define FL_FLASH_FLASH_LOCK_DISABLE (0x0Ul << FLASH_OPTBR_ACLOCKEN_Pos) +#define FL_FLASH_FLASH_LOCK_ENABLE (0x1Ul << FLASH_OPTBR_ACLOCKEN_Pos) + +#define FL_FLASH_SWD_READ_PEOTECTION_DISABLE (0x0Ul << FLASH_OPTBR_DBRDPEN_Pos) +#define FL_FLASH_SWD_READ_PEOTECTION_ENABLE (0x1Ul << FLASH_OPTBR_DBRDPEN_Pos) + +#define FL_FLASH_ERASE_TYPE_PAGE (0x0Ul << FLASH_EPCR_ERTYPE_Pos) +#define FL_FLASH_ERASE_TYPE_SECTOR (0x1Ul << FLASH_EPCR_ERTYPE_Pos) + + +#define FL_FLASH_KEY_STATUS_LOCK (0x0Ul << FLASH_ISR_KEYSTA_Pos) +#define FL_FLASH_KEY_STATUS_PAGE_ERASE (0x2Ul << FLASH_ISR_KEYSTA_Pos) +#define FL_FLASH_KEY_STATUS_PROGRAM (0x3Ul << FLASH_ISR_KEYSTA_Pos) +#define FL_FLASH_KEY_STATUS_ERROR (0x4Ul << FLASH_ISR_KEYSTA_Pos) +#define FL_FLASH_KEY_STATUS_SECTOR_ERASE (0x5Ul << FLASH_ISR_KEYSTA_Pos) + +#define FL_FLASH_BOOT_SECTOR_0000H_1FFFH (0x0Ul << FLASH_ISR_BTSF_Pos) +#define FL_FLASH_BOOT_SECTOR_2000H_3FFFH (0x1Ul << FLASH_ISR_BTSF_Pos) + +/** + * @} + */ +/* Exported functions ---------------------------------------------------------------------------------*/ +/** @defgroup FLASH_FL_Exported_Functions FLASH Exported Functions + * @{ + */ + +/** + * @brief Flash wait cycles config + * @rmtoll RDCR WAIT FL_FLASH_SetReadWait + * @param FLASHx FLASH instance + * @param wait This parameter can be one of the following values: + * @arg @ref FL_FLASH_READ_WAIT_0CYCLE + * @arg @ref FL_FLASH_READ_WAIT_1CYCLE + * @arg @ref FL_FLASH_READ_WAIT_2CYCLE + * @retval None + */ +__STATIC_INLINE void FL_FLASH_SetReadWait(FLASH_Type *FLASHx, uint32_t wait) +{ + MODIFY_REG(FLASHx->RDCR, FLASH_RDCR_WAIT_Msk, wait); +} + +/** + * @brief Get flash wait cycles config status + * @rmtoll RDCR WAIT FL_FLASH_GetReadWait + * @param FLASHx FLASH instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_FLASH_READ_WAIT_0CYCLE + * @arg @ref FL_FLASH_READ_WAIT_1CYCLE + * @arg @ref FL_FLASH_READ_WAIT_2CYCLE + */ +__STATIC_INLINE uint32_t FL_FLASH_GetReadWait(FLASH_Type *FLASHx) +{ + return (uint32_t)(READ_BIT(FLASHx->RDCR, FLASH_RDCR_WAIT_Msk)); +} + +/** + * @brief Prefetch buffer Enable + * @rmtoll PFCR PFTBUF FL_FLASH_EnablePrefetchBuffer + * @param FLASHx FLASH instance + * @retval None + */ +__STATIC_INLINE void FL_FLASH_EnablePrefetchBuffer(FLASH_Type *FLASHx) +{ + SET_BIT(FLASHx->PFCR, FLASH_PFCR_PFTBUF_Msk); +} + +/** + * @brief Get prefetch buffer enable status + * @rmtoll PFCR PFTBUF FL_FLASH_IsEnabledPrefetchBuffer + * @param FLASHx FLASH instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_FLASH_IsEnabledPrefetchBuffer(FLASH_Type *FLASHx) +{ + return (uint32_t)(READ_BIT(FLASHx->PFCR, FLASH_PFCR_PFTBUF_Msk) == FLASH_PFCR_PFTBUF_Msk); +} + +/** + * @brief Prefetch buffer disable + * @rmtoll PFCR PFTBUF FL_FLASH_DisablePrefetchBuffer + * @param FLASHx FLASH instance + * @retval None + */ +__STATIC_INLINE void FL_FLASH_DisablePrefetchBuffer(FLASH_Type *FLASHx) +{ + CLEAR_BIT(FLASHx->PFCR, FLASH_PFCR_PFTBUF_Msk); +} + +/** + * @brief Prefetch Enable + * @rmtoll PFCR PRFTEN FL_FLASH_EnablePrefetch + * @param FLASHx FLASH instance + * @retval None + */ +__STATIC_INLINE void FL_FLASH_EnablePrefetch(FLASH_Type *FLASHx) +{ + SET_BIT(FLASHx->PFCR, FLASH_PFCR_PRFTEN_Msk); +} + +/** + * @brief Get prefetch enable status + * @rmtoll PFCR PRFTEN FL_FLASH_IsEnabledPrefetch + * @param FLASHx FLASH instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_FLASH_IsEnabledPrefetch(FLASH_Type *FLASHx) +{ + return (uint32_t)(READ_BIT(FLASHx->PFCR, FLASH_PFCR_PRFTEN_Msk) == FLASH_PFCR_PRFTEN_Msk); +} + +/** + * @brief Prefetch disable + * @rmtoll PFCR PRFTEN FL_FLASH_DisablePrefetch + * @param FLASHx FLASH instance + * @retval None + */ +__STATIC_INLINE void FL_FLASH_DisablePrefetch(FLASH_Type *FLASHx) +{ + CLEAR_BIT(FLASHx->PFCR, FLASH_PFCR_PRFTEN_Msk); +} + +/** + * @brief Get IWDT sleep enable status + * @rmtoll OPTBR IWDTSLP FL_FLASH_GetIWDTStateUnderSleep + * @param FLASHx FLASH instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_FLASH_IWDT_STOP_UNDER_SLEEP + * @arg @ref FL_FLASH_IWDT_WORK_UNDER_SLEEP + */ +__STATIC_INLINE uint32_t FL_FLASH_GetIWDTStateUnderSleep(FLASH_Type *FLASHx) +{ + return (uint32_t)(READ_BIT(FLASHx->OPTBR, FLASH_OPTBR_IWDTSLP_Msk)); +} + +/** + * @brief Get information2 lock enable flag + * @rmtoll OPTBR IFLOCK FL_FLASH_IsActiveFlag_IFLockedState + * @param FLASHx FLASH instance + * @param region This parameter can be one of the following values: + * @arg @ref FL_FLASH_INFORMATION1_REGIN + * @arg @ref FL_FLASH_INFORMATION2_REGIN + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_FLASH_IsActiveFlag_IFLockedState(FLASH_Type *FLASHx, uint32_t region) +{ + return (uint32_t)(READ_BIT(FLASHx->OPTBR, FLASH_OPTBR_IFLOCK_Msk) == (region)); +} + +/** + * @brief Get dataflash enable status + * @rmtoll OPTBR DFLSEN FL_FLASH_GetDataFlashState + * @param FLASHx FLASH instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_FLASH_DATA_FLASH_DISABLE + * @arg @ref FL_FLASH_DATA_FLASH_ENABLE + */ +__STATIC_INLINE uint32_t FL_FLASH_GetDataFlashState(FLASH_Type *FLASHx) +{ + return (uint32_t)(READ_BIT(FLASHx->OPTBR, FLASH_OPTBR_DFLSEN_Msk)); +} + +/** + * @brief Get BootSwap enable status + * @rmtoll OPTBR BTSEN FL_FLASH_GetBootSwapState + * @param FLASHx FLASH instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_FLASH_BOOT_SWAP_DISABLE + * @arg @ref FL_FLASH_BOOT_SWAP_ENABLE + */ +__STATIC_INLINE uint32_t FL_FLASH_GetBootSwapState(FLASH_Type *FLASHx) +{ + return (uint32_t)(READ_BIT(FLASHx->OPTBR, FLASH_OPTBR_BTSEN_Msk)); +} + +/** + * @brief Get AppCode lock enable + * @rmtoll OPTBR ACLOCKEN FL_FLASH_GetFlashLockState + * @param FLASHx FLASH instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_FLASH_FLASH_LOCK_DISABLE + * @arg @ref FL_FLASH_FLASH_LOCK_ENABLE + */ +__STATIC_INLINE uint32_t FL_FLASH_GetFlashLockState(FLASH_Type *FLASHx) +{ + return (uint32_t)(READ_BIT(FLASHx->OPTBR, FLASH_OPTBR_ACLOCKEN_Msk)); +} + +/** + * @brief Get debug read protection enable status + * @rmtoll OPTBR DBRDPEN FL_FLASH_GetSWDReadProtectionState + * @param FLASHx FLASH instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_FLASH_SWD_READ_PEOTECTION_DISABLE + * @arg @ref FL_FLASH_SWD_READ_PEOTECTION_ENABLE + */ +__STATIC_INLINE uint32_t FL_FLASH_GetSWDReadProtectionState(FLASH_Type *FLASHx) +{ + return (uint32_t)(READ_BIT(FLASHx->OPTBR, FLASH_OPTBR_DBRDPEN_Msk)); +} + +/** + * @brief Set ACLOCK register low 32 bit + * @rmtoll ACLOCK1 FL_FLASH_SetFlashLowRegionLock + * @param FLASHx FLASH instance + * @param region This parameter can be one of the following values: + * @arg @ref FL_FLASH_BLOCK_0 + * @arg @ref FL_FLASH_BLOCK_1 + * @arg @ref FL_FLASH_BLOCK_2 + * @arg @ref FL_FLASH_BLOCK_3 + * @arg @ref FL_FLASH_BLOCK_4 + * @arg @ref FL_FLASH_BLOCK_5 + * @arg @ref FL_FLASH_BLOCK_6 + * @arg @ref FL_FLASH_BLOCK_7 + * @arg @ref FL_FLASH_BLOCK_8 + * @arg @ref FL_FLASH_BLOCK_9 + * @arg @ref FL_FLASH_BLOCK_10 + * @arg @ref FL_FLASH_BLOCK_11 + * @arg @ref FL_FLASH_BLOCK_12 + * @arg @ref FL_FLASH_BLOCK_13 + * @arg @ref FL_FLASH_BLOCK_14 + * @arg @ref FL_FLASH_BLOCK_15 + * @param mode This parameter can be one of the following values: + * @arg @ref FL_FLASH_LOCK_ALL + * @arg @ref FL_FLASH_LOCK_SOFTWARE + * @arg @ref FL_FLASH_LOCK_NONE + * @retval None + */ +__STATIC_INLINE void FL_FLASH_SetFlashLowRegionLock(FLASH_Type *FLASHx, uint32_t region, uint32_t mode) +{ + CLEAR_BIT(FLASHx->ACLOCK1, ((region * region) * (((mode == 3) ? 0 : (~mode)) & 0x03))); +} + +/** + * @brief Get ACLOCK register low 32 bit status + * @rmtoll ACLOCK1 FL_FLASH_GetFlashLowRegionLock + * @param FLASHx FLASH instance + * @param region This parameter can be one of the following values: + * @arg @ref FL_FLASH_BLOCK_0 + * @arg @ref FL_FLASH_BLOCK_1 + * @arg @ref FL_FLASH_BLOCK_2 + * @arg @ref FL_FLASH_BLOCK_3 + * @arg @ref FL_FLASH_BLOCK_4 + * @arg @ref FL_FLASH_BLOCK_5 + * @arg @ref FL_FLASH_BLOCK_6 + * @arg @ref FL_FLASH_BLOCK_7 + * @arg @ref FL_FLASH_BLOCK_8 + * @arg @ref FL_FLASH_BLOCK_9 + * @arg @ref FL_FLASH_BLOCK_10 + * @arg @ref FL_FLASH_BLOCK_11 + * @arg @ref FL_FLASH_BLOCK_12 + * @arg @ref FL_FLASH_BLOCK_13 + * @arg @ref FL_FLASH_BLOCK_14 + * @arg @ref FL_FLASH_BLOCK_15 + * @retval Returned value can be one of the following values: + */ +__STATIC_INLINE uint32_t FL_FLASH_GetFlashLowRegionLock(FLASH_Type *FLASHx, uint32_t region) +{ + return (uint32_t)(READ_BIT(FLASHx->ACLOCK1, ((region * region) * 0x03)) / (region * region)); +} + +/** + * @brief Set ACLOCK register high 32 bit + * @rmtoll ACLOCK2 FL_FLASH_SetFlashHighRegionLock + * @param FLASHx FLASH instance + * @param region This parameter can be one of the following values: + * @arg @ref FL_FLASH_BLOCK_0 + * @arg @ref FL_FLASH_BLOCK_1 + * @arg @ref FL_FLASH_BLOCK_2 + * @arg @ref FL_FLASH_BLOCK_3 + * @arg @ref FL_FLASH_BLOCK_4 + * @arg @ref FL_FLASH_BLOCK_5 + * @arg @ref FL_FLASH_BLOCK_6 + * @arg @ref FL_FLASH_BLOCK_7 + * @arg @ref FL_FLASH_BLOCK_8 + * @arg @ref FL_FLASH_BLOCK_9 + * @arg @ref FL_FLASH_BLOCK_10 + * @arg @ref FL_FLASH_BLOCK_11 + * @arg @ref FL_FLASH_BLOCK_12 + * @arg @ref FL_FLASH_BLOCK_13 + * @arg @ref FL_FLASH_BLOCK_14 + * @arg @ref FL_FLASH_BLOCK_15 + * @param mode This parameter can be one of the following values: + * @arg @ref FL_FLASH_LOCK_ALL + * @arg @ref FL_FLASH_LOCK_SOFTWARE + * @arg @ref FL_FLASH_LOCK_NONE + * @retval None + */ +__STATIC_INLINE void FL_FLASH_SetFlashHighRegionLock(FLASH_Type *FLASHx, uint32_t region, uint32_t mode) +{ + CLEAR_BIT(FLASHx->ACLOCK2, ((region * region) * (((mode == 3) ? 0 : (~mode)) & 0x03))); +} + +/** + * @brief Get ACLOCK register high 32 bit status + * @rmtoll ACLOCK2 FL_FLASH_GetFlashHighRegionLock + * @param FLASHx FLASH instance + * @param region This parameter can be one of the following values: + * @arg @ref FL_FLASH_BLOCK_0 + * @arg @ref FL_FLASH_BLOCK_1 + * @arg @ref FL_FLASH_BLOCK_2 + * @arg @ref FL_FLASH_BLOCK_3 + * @arg @ref FL_FLASH_BLOCK_4 + * @arg @ref FL_FLASH_BLOCK_5 + * @arg @ref FL_FLASH_BLOCK_6 + * @arg @ref FL_FLASH_BLOCK_7 + * @arg @ref FL_FLASH_BLOCK_8 + * @arg @ref FL_FLASH_BLOCK_9 + * @arg @ref FL_FLASH_BLOCK_10 + * @arg @ref FL_FLASH_BLOCK_11 + * @arg @ref FL_FLASH_BLOCK_12 + * @arg @ref FL_FLASH_BLOCK_13 + * @arg @ref FL_FLASH_BLOCK_14 + * @arg @ref FL_FLASH_BLOCK_15 + * @retval Returned value can be one of the following values: + */ +__STATIC_INLINE uint32_t FL_FLASH_GetFlashHighRegionLock(FLASH_Type *FLASHx, uint32_t region) +{ + return (uint32_t)(READ_BIT(FLASHx->ACLOCK2, ((region * region) * 0x03)) / (region * region)); +} + +/** + * @brief Set flash erase type + * @rmtoll EPCR ERTYPE FL_FLASH_SetFlashEraseType + * @param FLASHx FLASH instance + * @param type This parameter can be one of the following values: + * @arg @ref FL_FLASH_ERASE_TYPE_PAGE + * @arg @ref FL_FLASH_ERASE_TYPE_SECTOR + * @retval None + */ +__STATIC_INLINE void FL_FLASH_SetFlashEraseType(FLASH_Type *FLASHx, uint32_t type) +{ + MODIFY_REG(FLASHx->EPCR, FLASH_EPCR_ERTYPE_Msk, type); +} + +/** + * @brief Get flash erase type + * @rmtoll EPCR ERTYPE FL_FLASH_GetFlashEraseType + * @param FLASHx FLASH instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_FLASH_ERASE_TYPE_PAGE + * @arg @ref FL_FLASH_ERASE_TYPE_SECTOR + */ +__STATIC_INLINE uint32_t FL_FLASH_GetFlashEraseType(FLASH_Type *FLASHx) +{ + return (uint32_t)(READ_BIT(FLASHx->EPCR, FLASH_EPCR_ERTYPE_Msk)); +} + +/** + * @brief Program request enable + * @rmtoll EPCR PREQ FL_FLASH_EnableProgram + * @param FLASHx FLASH instance + * @retval None + */ +__STATIC_INLINE void FL_FLASH_EnableProgram(FLASH_Type *FLASHx) +{ + CLEAR_BIT(FLASHx->EPCR, FLASH_EPCR_EREQ_Msk); + SET_BIT(FLASHx->EPCR, FLASH_EPCR_PREQ_Msk); +} + +/** + * @brief Erase request enable + * @rmtoll EPCR EREQ FL_FLASH_EnableErase + * @param FLASHx FLASH instance + * @retval None + */ +__STATIC_INLINE void FL_FLASH_EnableErase(FLASH_Type *FLASHx) +{ + CLEAR_BIT(FLASHx->EPCR, FLASH_EPCR_PREQ_Msk); + SET_BIT(FLASHx->EPCR, FLASH_EPCR_EREQ_Msk); +} + +/** + * @brief Set flash key + * @rmtoll KEY FL_FLASH_UnlockFlash + * @param FLASHx FLASH instance + * @param key + * @retval None + */ +__STATIC_INLINE void FL_FLASH_UnlockFlash(FLASH_Type *FLASHx, uint32_t key) +{ + WRITE_REG(FLASHx->KEY, key); +} + +/** + * @brief Reset flash key + * @rmtoll KEY FL_FLASH_LockFlash + * @param FLASHx FLASH instance + * @retval None + */ +__STATIC_INLINE void FL_FLASH_LockFlash(FLASH_Type *FLASHx) +{ + WRITE_REG(FLASHx->KEY, 0xFFFFFFFF); +} + +/** + * @brief OTP program error interrupt enable + * @rmtoll IER OPTIE FL_FLASH_EnableIT_OTPProgramError + * @param FLASHx FLASH instance + * @retval None + */ +__STATIC_INLINE void FL_FLASH_EnableIT_OTPProgramError(FLASH_Type *FLASHx) +{ + SET_BIT(FLASHx->IER, FLASH_IER_OPTIE_Msk); +} + +/** + * @brief OTP program error interrupt disable + * @rmtoll IER OPTIE FL_FLASH_DisableIT_OTPProgramError + * @param FLASHx FLASH instance + * @retval None + */ +__STATIC_INLINE void FL_FLASH_DisableIT_OTPProgramError(FLASH_Type *FLASHx) +{ + CLEAR_BIT(FLASHx->IER, FLASH_IER_OPTIE_Msk); +} + +/** + * @brief Get OTP program error interrupt enable status + * @rmtoll IER OPTIE FL_FLASH_IsEnabledIT_OTPProgramError + * @param FLASHx FLASH instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_FLASH_IsEnabledIT_OTPProgramError(FLASH_Type *FLASHx) +{ + return (uint32_t)(READ_BIT(FLASHx->IER, FLASH_IER_OPTIE_Msk) == FLASH_IER_OPTIE_Msk); +} + +/** + * @brief Flash authentication error interrupt enable + * @rmtoll IER AUTHIE FL_FLASH_EnableIT_AuthenticationError + * @param FLASHx FLASH instance + * @retval None + */ +__STATIC_INLINE void FL_FLASH_EnableIT_AuthenticationError(FLASH_Type *FLASHx) +{ + SET_BIT(FLASHx->IER, FLASH_IER_AUTHIE_Msk); +} + +/** + * @brief Flash authentication error interrupt disable + * @rmtoll IER AUTHIE FL_FLASH_DisableIT_AuthenticationError + * @param FLASHx FLASH instance + * @retval None + */ +__STATIC_INLINE void FL_FLASH_DisableIT_AuthenticationError(FLASH_Type *FLASHx) +{ + CLEAR_BIT(FLASHx->IER, FLASH_IER_AUTHIE_Msk); +} + +/** + * @brief Get flash authentication error interrupt enable status + * @rmtoll IER AUTHIE FL_FLASH_IsEnabledIT_AuthenticationError + * @param FLASHx FLASH instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_FLASH_IsEnabledIT_AuthenticationError(FLASH_Type *FLASHx) +{ + return (uint32_t)(READ_BIT(FLASHx->IER, FLASH_IER_AUTHIE_Msk) == FLASH_IER_AUTHIE_Msk); +} + +/** + * @brief Flash key error interrupt enable + * @rmtoll IER KEYIE FL_FLASH_EnableIT_KeyError + * @param FLASHx FLASH instance + * @retval None + */ +__STATIC_INLINE void FL_FLASH_EnableIT_KeyError(FLASH_Type *FLASHx) +{ + SET_BIT(FLASHx->IER, FLASH_IER_KEYIE_Msk); +} + +/** + * @brief Flash key error interrupt disable + * @rmtoll IER KEYIE FL_FLASH_DisableIT_KeyError + * @param FLASHx FLASH instance + * @retval None + */ +__STATIC_INLINE void FL_FLASH_DisableIT_KeyError(FLASH_Type *FLASHx) +{ + CLEAR_BIT(FLASHx->IER, FLASH_IER_KEYIE_Msk); +} + +/** + * @brief Get Flash key error interrupt enable status + * @rmtoll IER KEYIE FL_FLASH_IsEnabledIT_KeyError + * @param FLASHx FLASH instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_FLASH_IsEnabledIT_KeyError(FLASH_Type *FLASHx) +{ + return (uint32_t)(READ_BIT(FLASHx->IER, FLASH_IER_KEYIE_Msk) == FLASH_IER_KEYIE_Msk); +} + +/** + * @brief Erase/Program clock error interrupt enable + * @rmtoll IER CKIE FL_FLASH_EnableIT_ClockError + * @param FLASHx FLASH instance + * @retval None + */ +__STATIC_INLINE void FL_FLASH_EnableIT_ClockError(FLASH_Type *FLASHx) +{ + SET_BIT(FLASHx->IER, FLASH_IER_CKIE_Msk); +} + +/** + * @brief Erase/Program clock error interrupt disable + * @rmtoll IER CKIE FL_FLASH_DisableIT_ClockError + * @param FLASHx FLASH instance + * @retval None + */ +__STATIC_INLINE void FL_FLASH_DisableIT_ClockError(FLASH_Type *FLASHx) +{ + CLEAR_BIT(FLASHx->IER, FLASH_IER_CKIE_Msk); +} + +/** + * @brief Get Erase/Program clock error interrupt enable status + * @rmtoll IER CKIE FL_FLASH_IsEnabledIT_ClockError + * @param FLASHx FLASH instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_FLASH_IsEnabledIT_ClockError(FLASH_Type *FLASHx) +{ + return (uint32_t)(READ_BIT(FLASHx->IER, FLASH_IER_CKIE_Msk) == FLASH_IER_CKIE_Msk); +} + +/** + * @brief Program done interrupt enable + * @rmtoll IER PRDIE FL_FLASH_EnableIT_ProgramComplete + * @param FLASHx FLASH instance + * @retval None + */ +__STATIC_INLINE void FL_FLASH_EnableIT_ProgramComplete(FLASH_Type *FLASHx) +{ + SET_BIT(FLASHx->IER, FLASH_IER_PRDIE_Msk); +} + +/** + * @brief Program done interrupt disable + * @rmtoll IER PRDIE FL_FLASH_DisableIT_ProgramComplete + * @param FLASHx FLASH instance + * @retval None + */ +__STATIC_INLINE void FL_FLASH_DisableIT_ProgramComplete(FLASH_Type *FLASHx) +{ + CLEAR_BIT(FLASHx->IER, FLASH_IER_PRDIE_Msk); +} + +/** + * @brief Get program done interrupt enable status + * @rmtoll IER PRDIE FL_FLASH_IsEnabledIT_ProgramComplete + * @param FLASHx FLASH instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_FLASH_IsEnabledIT_ProgramComplete(FLASH_Type *FLASHx) +{ + return (uint32_t)(READ_BIT(FLASHx->IER, FLASH_IER_PRDIE_Msk) == FLASH_IER_PRDIE_Msk); +} + +/** + * @brief Erase done interrupt enable + * @rmtoll IER ERDIE FL_FLASH_EnableIT_EraseComplete + * @param FLASHx FLASH instance + * @retval None + */ +__STATIC_INLINE void FL_FLASH_EnableIT_EraseComplete(FLASH_Type *FLASHx) +{ + SET_BIT(FLASHx->IER, FLASH_IER_ERDIE_Msk); +} + +/** + * @brief Erase done interrupt disable + * @rmtoll IER ERDIE FL_FLASH_DisableIT_EraseComplete + * @param FLASHx FLASH instance + * @retval None + */ +__STATIC_INLINE void FL_FLASH_DisableIT_EraseComplete(FLASH_Type *FLASHx) +{ + CLEAR_BIT(FLASHx->IER, FLASH_IER_ERDIE_Msk); +} + +/** + * @brief Get erase done interrupt enable status + * @rmtoll IER ERDIE FL_FLASH_IsEnabledIT_EraseComplete + * @param FLASHx FLASH instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_FLASH_IsEnabledIT_EraseComplete(FLASH_Type *FLASHx) +{ + return (uint32_t)(READ_BIT(FLASHx->IER, FLASH_IER_ERDIE_Msk) == FLASH_IER_ERDIE_Msk); +} + +/** + * @brief Get flash key status + * @rmtoll ISR KEYSTA FL_FLASH_GetFlashLockStatus + * @param FLASHx FLASH instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_FLASH_KEY_STATUS_LOCK + * @arg @ref FL_FLASH_KEY_STATUS_PAGE_ERASE + * @arg @ref FL_FLASH_KEY_STATUS_PROGRAM + * @arg @ref FL_FLASH_KEY_STATUS_ERROR + * @arg @ref FL_FLASH_KEY_STATUS_SECTOR_ERASE + */ +__STATIC_INLINE uint32_t FL_FLASH_GetFlashLockStatus(FLASH_Type *FLASHx) +{ + return (uint32_t)(READ_BIT(FLASHx->ISR, FLASH_ISR_KEYSTA_Msk)); +} + +/** + * @brief Get BootSwap +register value + * @rmtoll ISR BTSF FL_FLASH_GetFlashSwapStatus + * @param FLASHx FLASH instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_FLASH_BOOT_SECTOR_0000H_1FFFH + * @arg @ref FL_FLASH_BOOT_SECTOR_2000H_3FFFH + */ +__STATIC_INLINE uint32_t FL_FLASH_GetFlashSwapStatus(FLASH_Type *FLASHx) +{ + return (uint32_t)(READ_BIT(FLASHx->ISR, FLASH_ISR_BTSF_Msk)); +} + +/** + * @brief Get OTP program Error Flag + * @rmtoll ISR OPTERR FL_FLASH_IsActiveFlag_OPTProgramError + * @param FLASHx FLASH instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_FLASH_IsActiveFlag_OPTProgramError(FLASH_Type *FLASHx) +{ + return (uint32_t)(READ_BIT(FLASHx->ISR, FLASH_ISR_OPTERR_Msk) == (FLASH_ISR_OPTERR_Msk)); +} + +/** + * @brief Clear OTP program Error Flag + * @rmtoll ISR OPTERR FL_FLASH_ClearFlag_OPTProgramError + * @param FLASH_Type FLASH instance + * @retval None + */ +__STATIC_INLINE void FL_FLASH_ClearFlag_OPTProgramError(FLASH_Type *FLASHx) +{ + WRITE_REG(FLASHx->ISR, FLASH_ISR_OPTERR_Msk); +} + +/** + * @brief Get Flash Authentication Error Flag + * @rmtoll ISR AUTHERR FL_FLASH_IsActiveFlag_AuthenticationError + * @param FLASHx FLASH instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_FLASH_IsActiveFlag_AuthenticationError(FLASH_Type *FLASHx) +{ + return (uint32_t)(READ_BIT(FLASHx->ISR, FLASH_ISR_AUTHERR_Msk) == (FLASH_ISR_AUTHERR_Msk)); +} + +/** + * @brief ClearFlash Authentication Error Flag + * @rmtoll ISR AUTHERR FL_FLASH_ClearFlag_AuthenticationError + * @param FLASHx FLASH instance + * @retval None + */ +__STATIC_INLINE void FL_FLASH_ClearFlag_AuthenticationError(FLASH_Type *FLASHx) +{ + WRITE_REG(FLASHx->ISR, FLASH_ISR_AUTHERR_Msk); +} + +/** + * @brief Get Flash Key Error Flag + * @rmtoll ISR KEYERR FL_FLASH_IsActiveFlag_KeyError + * @param FLASHx FLASH instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_FLASH_IsActiveFlag_KeyError(FLASH_Type *FLASHx) +{ + return (uint32_t)(READ_BIT(FLASHx->ISR, FLASH_ISR_KEYERR_Msk) == (FLASH_ISR_KEYERR_Msk)); +} + +/** + * @brief Clear Flash Key Error Flag + * @rmtoll ISR KEYERR FL_FLASH_ClearFlag_KeyError + * @param FLASHx FLASH instance + * @retval None + */ +__STATIC_INLINE void FL_FLASH_ClearFlag_KeyError(FLASH_Type *FLASHx) +{ + WRITE_REG(FLASHx->ISR, FLASH_ISR_KEYERR_Msk); +} + +/** + * @brief Get Erase/Program Clock Error Flag + * @rmtoll ISR CKERR FL_FLASH_IsActiveFlag_ClockError + * @param FLASHx FLASH instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_FLASH_IsActiveFlag_ClockError(FLASH_Type *FLASHx) +{ + return (uint32_t)(READ_BIT(FLASHx->ISR, FLASH_ISR_CKERR_Msk) == (FLASH_ISR_CKERR_Msk)); +} + +/** + * @brief Clear Erase/Program Clock Error Flag + * @rmtoll ISR CKERR FL_FLASH_ClearFlag_ClockError + * @param FLASHx FLASH instance + * @retval None + */ +__STATIC_INLINE void FL_FLASH_ClearFlag_ClockError(FLASH_Type *FLASHx) +{ + WRITE_REG(FLASHx->ISR, FLASH_ISR_CKERR_Msk); +} + +/** + * @brief Get Program Done Flag + * @rmtoll ISR PRD FL_FLASH_IsActiveFlag_ProgramComplete + * @param FLASHx FLASH instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_FLASH_IsActiveFlag_ProgramComplete(FLASH_Type *FLASHx) +{ + return (uint32_t)(READ_BIT(FLASHx->ISR, FLASH_ISR_PRD_Msk) == (FLASH_ISR_PRD_Msk)); +} + +/** + * @brief Clear Program Done Flag + * @rmtoll ISR PRD FL_FLASH_ClearFlag_ProgramComplete + * @param FLASHx FLASH instance + * @retval None + */ +__STATIC_INLINE void FL_FLASH_ClearFlag_ProgramComplete(FLASH_Type *FLASHx) +{ + WRITE_REG(FLASHx->ISR, FLASH_ISR_PRD_Msk); +} + +/** + * @brief Get Erase Done Flag + * @rmtoll ISR ERD FL_FLASH_IsActiveFlag_EraseComplete + * @param FLASHx FLASH instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_FLASH_IsActiveFlag_EraseComplete(FLASH_Type *FLASHx) +{ + return (uint32_t)(READ_BIT(FLASHx->ISR, FLASH_ISR_ERD_Msk) == (FLASH_ISR_ERD_Msk)); +} + +/** + * @brief Clear Erase Done Flag + * @rmtoll ISR ERD FL_FLASH_ClearFlag_EraseComplete + * @param FLASHx FLASH instance + * @retval None + */ +__STATIC_INLINE void FL_FLASH_ClearFlag_EraseComplete(FLASH_Type *FLASHx) +{ + WRITE_REG(FLASHx->ISR, FLASH_ISR_ERD_Msk); +} + +/** + * @} + */ + +/** @defgroup FLASH_FL_EF_Init Initialization and de-initialization functions + * @{ + */ +FL_ErrorStatus FL_FLASH_PageErase(FLASH_Type *FLASHx, uint32_t address); +FL_ErrorStatus FL_FLASH_SectorErase(FLASH_Type *FLASHx, uint32_t address); + +FL_ErrorStatus FL_FLASH_Program_Word(FLASH_Type *FLASHx, uint32_t address, uint32_t data); +FL_ErrorStatus FL_FLASH_Program_Page(FLASH_Type *FLASHx, uint32_t pageNum, uint32_t *data); +FL_ErrorStatus FL_FLASH_Program_Sector(FLASH_Type *FLASHx, uint32_t sectorNum, uint32_t *data); + +FL_ErrorStatus FL_FLASH_Write_Dma(FLASH_Type *FLASHx, uint32_t address, uint32_t *data); +FL_ErrorStatus FL_FLASH_Read_Dma(FLASH_Type *FLASHx, uint32_t address, uint32_t *data, uint16_t length); + + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif /* __FM33LG0XX_FL_FLASH_H*/ + +/*************************Py_Code_Generator Version: 0.1-0.14-0.1 @ 2020-12-15*************************/ +/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/ diff --git a/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_gpio.h b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_gpio.h new file mode 100644 index 0000000..a972d72 --- /dev/null +++ b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_gpio.h @@ -0,0 +1,2191 @@ + /** + ******************************************************************************************************* + * @file fm33lg0xx_fl_gpio.h + * @author FMSH Application Team + * @brief Head file of GPIO FL Module + ******************************************************************************************************* + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + + + +/* Define to prevent recursive inclusion---------------------------------------------------------------*/ +#ifndef __FM33LG0XX_FL_GPIO_H +#define __FM33LG0XX_FL_GPIO_H + +#ifdef __cplusplus +extern "C" { +#endif +/* Includes -------------------------------------------------------------------------------------------*/ +#include "fm33lg0xx_fl_def.h" +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @defgroup GPIO GPIO + * @brief GPIO FL driver + * @{ + */ + +/* Exported types -------------------------------------------------------------------------------------*/ +/** @defgroup GPIO_FL_ES_INIT GPIO Exported Init structures + * @{ + */ + +/** + * @brief FL GPIO Init Sturcture definition + */ +typedef struct +{ + /*! PIN */ + uint32_t pin; + /*! 功能模式 */ + uint32_t mode; + /*! 输出类型 */ + uint32_t outputType; + /*! 上拉使能 */ + uint32_t pull; + /*! 数字功能重定向 */ + uint32_t remapPin; + /*! 模拟开关使能 */ + uint32_t analogSwitch; + +} FL_GPIO_InitTypeDef; + +typedef struct +{ + /*! 触发边沿 */ + uint32_t polarity; + +} FL_WKUP_InitTypeDef; + +/** + * @} + */ +/* Exported constants ---------------------------------------------------------------------------------*/ +/** @defgroup GPIO_FL_Exported_Constants GPIO Exported Constants + * @{ + */ + +#define GPIO_FCR_Pos (0U) +#define GPIO_FCR_Msk (0x3Ul << GPIO_FCR_Pos) +#define GPIO_FCR GPIO_FCR_Msk + +#define GPIO_EXTIEDS0_Pos (0U) +#define GPIO_EXTIEDS0_Msk (0x3Ul << GPIO_EXTIEDS0_Pos) +#define GPIO_EXTIEDS0 GPIO_EXTIEDS0_Msk + +#define GPIO_EXTIEDS1_Pos (0U) +#define GPIO_EXTIEDS1_Msk (0x3Ul << GPIO_EXTIEDS1_Pos) +#define GPIO_EXTIEDS1 GPIO_EXTIEDS1_Msk + +#define GPIO_FOUTSEL_FOUT0_Pos (0U) +#define GPIO_FOUTSEL_FOUT0_Msk (0xfUl << GPIO_FOUTSEL_FOUT0_Pos) +#define GPIO_FOUTSEL_FOUT0 GPIO_FOUTSEL_FOUT0_Msk + +#define GPIO_FOUTSEL_FOUT1_Pos (4U) +#define GPIO_FOUTSEL_FOUT1_Msk (0xfUl << GPIO_FOUTSEL_FOUT1_Pos) +#define GPIO_FOUTSEL_FOUT1 GPIO_FOUTSEL_FOUT1_Msk + +#define GPIO_EXTISEL0_EXTI0_Pos (0U) +#define GPIO_EXTISEL0_EXTI0_Msk (0x3Ul << GPIO_EXTISEL0_EXTI0_Pos) +#define GPIO_EXTISEL0_EXTI0 GPIO_EXTISEL0_EXTI0_Msk + +#define GPIO_EXTISEL0_EXTI1_Pos (2U) +#define GPIO_EXTISEL0_EXTI1_Msk (0x3Ul << GPIO_EXTISEL0_EXTI1_Pos) +#define GPIO_EXTISEL0_EXTI1 GPIO_EXTISEL0_EXTI1_Msk + +#define GPIO_EXTISEL0_EXTI2_Pos (4U) +#define GPIO_EXTISEL0_EXTI2_Msk (0x3Ul << GPIO_EXTISEL0_EXTI2_Pos) +#define GPIO_EXTISEL0_EXTI2 GPIO_EXTISEL0_EXTI2_Msk + +#define GPIO_EXTISEL0_EXTI3_Pos (6U) +#define GPIO_EXTISEL0_EXTI3_Msk (0x3Ul << GPIO_EXTISEL0_EXTI3_Pos) +#define GPIO_EXTISEL0_EXTI3 GPIO_EXTISEL0_EXTI3_Msk + +#define GPIO_EXTISEL0_EXTI4_Pos (8U) +#define GPIO_EXTISEL0_EXTI4_Msk (0x3Ul << GPIO_EXTISEL0_EXTI4_Pos) +#define GPIO_EXTISEL0_EXTI4 GPIO_EXTISEL0_EXTI4_Msk + +#define GPIO_EXTISEL0_EXTI5_Pos (10U) +#define GPIO_EXTISEL0_EXTI5_Msk (0x3Ul << GPIO_EXTISEL0_EXTI5_Pos) +#define GPIO_EXTISEL0_EXTI5 GPIO_EXTISEL0_EXTI5_Msk + +#define GPIO_EXTISEL0_EXTI6_Pos (12U) +#define GPIO_EXTISEL0_EXTI6_Msk (0x3Ul << GPIO_EXTISEL0_EXTI6_Pos) +#define GPIO_EXTISEL0_EXTI6 GPIO_EXTISEL0_EXTI6_Msk + +#define GPIO_EXTISEL0_EXTI7_Pos (14U) +#define GPIO_EXTISEL0_EXTI7_Msk (0x3Ul << GPIO_EXTISEL0_EXTI7_Pos) +#define GPIO_EXTISEL0_EXTI7 GPIO_EXTISEL0_EXTI7_Msk + +#define GPIO_EXTISEL0_EXTI8_Pos (16U) +#define GPIO_EXTISEL0_EXTI8_Msk (0x3Ul << GPIO_EXTISEL0_EXTI8_Pos) +#define GPIO_EXTISEL0_EXTI8 GPIO_EXTISEL0_EXTI8_Msk + +#define GPIO_EXTISEL0_EXTI9_Pos (18U) +#define GPIO_EXTISEL0_EXTI9_Msk (0x3Ul << GPIO_EXTISEL0_EXTI9_Pos) +#define GPIO_EXTISEL0_EXTI9 GPIO_EXTISEL0_EXTI9_Msk + +#define GPIO_EXTISEL0_EXTI10_Pos (20U) +#define GPIO_EXTISEL0_EXTI10_Msk (0x3Ul << GPIO_EXTISEL0_EXTI10_Pos) +#define GPIO_EXTISEL0_EXTI10 GPIO_EXTISEL0_EXTI10_Msk + +#define GPIO_EXTISEL0_EXTI11_Pos (22U) +#define GPIO_EXTISEL0_EXTI11_Msk (0x3Ul << GPIO_EXTISEL0_EXTI11_Pos) +#define GPIO_EXTISEL0_EXTI11 GPIO_EXTISEL0_EXTI11_Msk + +#define GPIO_EXTISEL0_EXTI12_Pos (24U) +#define GPIO_EXTISEL0_EXTI12_Msk (0x3Ul << GPIO_EXTISEL0_EXTI12_Pos) +#define GPIO_EXTISEL0_EXTI12 GPIO_EXTISEL0_EXTI12_Msk + +#define GPIO_EXTISEL0_EXTI13_Pos (26U) +#define GPIO_EXTISEL0_EXTI13_Msk (0x3Ul << GPIO_EXTISEL0_EXTI13_Pos) +#define GPIO_EXTISEL0_EXTI13 GPIO_EXTISEL0_EXTI13_Msk + +#define GPIO_EXTISEL0_EXTI14_Pos (28U) +#define GPIO_EXTISEL0_EXTI14_Msk (0x3Ul << GPIO_EXTISEL0_EXTI14_Pos) +#define GPIO_EXTISEL0_EXTI14 GPIO_EXTISEL0_EXTI14_Msk + +#define GPIO_EXTISEL0_EXTI15_Pos (30U) +#define GPIO_EXTISEL0_EXTI15_Msk (0x3Ul << GPIO_EXTISEL0_EXTI15_Pos) +#define GPIO_EXTISEL0_EXTI15 GPIO_EXTISEL0_EXTI15_Msk + +#define GPIO_EXTISEL1_EXTI16_Pos (0U) +#define GPIO_EXTISEL1_EXTI16_Msk (0x3Ul << GPIO_EXTISEL1_EXTI16_Pos) +#define GPIO_EXTISEL1_EXTI16 GPIO_EXTISEL1_EXTI16_Msk + +#define GPIO_EXTISEL1_EXTI17_Pos (2U) +#define GPIO_EXTISEL1_EXTI17_Msk (0x3Ul << GPIO_EXTISEL1_EXTI17_Pos) +#define GPIO_EXTISEL1_EXTI17 GPIO_EXTISEL1_EXTI17_Msk + +#define GPIO_EXTISEL1_EXTI18_Pos (4U) +#define GPIO_EXTISEL1_EXTI18_Msk (0x3Ul << GPIO_EXTISEL1_EXTI18_Pos) +#define GPIO_EXTISEL1_EXTI18 GPIO_EXTISEL1_EXTI18_Msk + +#define GPIO_PINWKEN_EN_Pos (0U) +#define GPIO_PINWKEN_EN_Msk (0x3ffUl << GPIO_PINWKEN_EN_Pos) +#define GPIO_PINWKEN_EN GPIO_PINWKEN_EN_Msk + +#define GPIO_PINWKEN_WKISEL_Pos (31U) +#define GPIO_PINWKEN_WKISEL_Msk (0x1Ul << GPIO_PINWKEN_WKISEL_Pos) +#define GPIO_PINWKEN_WKISEL GPIO_PINWKEN_WKISEL_Msk + +#define GPIO_PINWKEN_SEL_Pos (10U) +#define GPIO_PINWKEN_SEL_Msk (0x3Ul << GPIO_PINWKEN_SEL_Pos) +#define GPIO_PINWKEN_SEL GPIO_PINWKEN_SEL_Msk + + + +#define FL_GPIO_PIN_0 (0x1Ul << 0U) +#define FL_GPIO_PIN_1 (0x1Ul << 1U) +#define FL_GPIO_PIN_2 (0x1Ul << 2U) +#define FL_GPIO_PIN_3 (0x1Ul << 3U) +#define FL_GPIO_PIN_4 (0x1Ul << 4U) +#define FL_GPIO_PIN_5 (0x1Ul << 5U) +#define FL_GPIO_PIN_6 (0x1Ul << 6U) +#define FL_GPIO_PIN_7 (0x1Ul << 7U) +#define FL_GPIO_PIN_8 (0x1Ul << 8U) +#define FL_GPIO_PIN_9 (0x1Ul << 9U) +#define FL_GPIO_PIN_10 (0x1Ul << 10U) +#define FL_GPIO_PIN_11 (0x1Ul << 11U) +#define FL_GPIO_PIN_12 (0x1Ul << 12U) +#define FL_GPIO_PIN_13 (0x1Ul << 13U) +#define FL_GPIO_PIN_14 (0x1Ul << 14U) +#define FL_GPIO_PIN_15 (0x1Ul << 15U) +#define FL_GPIO_PIN_ALL (0xffffU << 0U) +#define FL_GPIO_EXTI_LINE_0 (0x1Ul << 0U) +#define FL_GPIO_EXTI_LINE_1 (0x1Ul << 1U) +#define FL_GPIO_EXTI_LINE_2 (0x1Ul << 2U) +#define FL_GPIO_EXTI_LINE_3 (0x1Ul << 3U) +#define FL_GPIO_EXTI_LINE_4 (0x1Ul << 4U) +#define FL_GPIO_EXTI_LINE_5 (0x1Ul << 5U) +#define FL_GPIO_EXTI_LINE_6 (0x1Ul << 6U) +#define FL_GPIO_EXTI_LINE_7 (0x1Ul << 7U) +#define FL_GPIO_EXTI_LINE_8 (0x1Ul << 8U) +#define FL_GPIO_EXTI_LINE_9 (0x1Ul << 9U) +#define FL_GPIO_EXTI_LINE_10 (0x1Ul << 10U) +#define FL_GPIO_EXTI_LINE_11 (0x1Ul << 11U) +#define FL_GPIO_EXTI_LINE_12 (0x1Ul << 12U) +#define FL_GPIO_EXTI_LINE_13 (0x1Ul << 13U) +#define FL_GPIO_EXTI_LINE_14 (0x1Ul << 14U) +#define FL_GPIO_EXTI_LINE_15 (0x1Ul << 15U) +#define FL_GPIO_EXTI_LINE_16 (0x1Ul << 16U) +#define FL_GPIO_EXTI_LINE_17 (0x1Ul << 17U) +#define FL_GPIO_EXTI_LINE_18 (0x1Ul << 18U) +#define FL_GPIO_EXTI_LINE_ALL (0x7ffffUl << 0U) +#define FL_GPIO_EXTI_LINE_0_PA0 (0x0Ul << 0U) +#define FL_GPIO_EXTI_LINE_0_PA1 (0x1Ul << 0U) +#define FL_GPIO_EXTI_LINE_0_PA2 (0x2Ul << 0U) +#define FL_GPIO_EXTI_LINE_0_PA3 (0x3Ul << 0U) +#define FL_GPIO_EXTI_LINE_1_PA4 (0x0Ul << 2U) +#define FL_GPIO_EXTI_LINE_1_PA5 (0x1Ul << 2U) +#define FL_GPIO_EXTI_LINE_1_PA6 (0x2Ul << 2U) +#define FL_GPIO_EXTI_LINE_1_PA7 (0x3Ul << 2U) +#define FL_GPIO_EXTI_LINE_2_PA8 (0x0Ul << 4U) +#define FL_GPIO_EXTI_LINE_2_PA9 (0x1Ul << 4U) +#define FL_GPIO_EXTI_LINE_2_PA10 (0x2Ul << 4U) +#define FL_GPIO_EXTI_LINE_2_PA11 (0x3Ul << 4U) +#define FL_GPIO_EXTI_LINE_3_PA12 (0x0Ul << 6U) +#define FL_GPIO_EXTI_LINE_3_PA13 (0x1Ul << 6U) +#define FL_GPIO_EXTI_LINE_3_PA14 (0x2Ul << 6U) +#define FL_GPIO_EXTI_LINE_3_PA15 (0x3Ul << 6U) +#define FL_GPIO_EXTI_LINE_4_PB0 (0x0Ul << 8U) +#define FL_GPIO_EXTI_LINE_4_PB1 (0x1Ul << 8U) +#define FL_GPIO_EXTI_LINE_4_PB2 (0x2Ul << 8U) +#define FL_GPIO_EXTI_LINE_4_PB3 (0x3Ul << 8U) +#define FL_GPIO_EXTI_LINE_5_PB4 (0x0Ul << 10U) +#define FL_GPIO_EXTI_LINE_5_PB5 (0x1Ul << 10U) +#define FL_GPIO_EXTI_LINE_5_PB6 (0x2Ul << 10U) +#define FL_GPIO_EXTI_LINE_5_PB7 (0x3Ul << 10U) +#define FL_GPIO_EXTI_LINE_6_PB8 (0x0Ul << 12U) +#define FL_GPIO_EXTI_LINE_6_PB9 (0x1Ul << 12U) +#define FL_GPIO_EXTI_LINE_6_PB10 (0x2Ul << 12U) +#define FL_GPIO_EXTI_LINE_6_PB11 (0x3Ul << 12U) +#define FL_GPIO_EXTI_LINE_7_PB12 (0x0Ul << 14U) +#define FL_GPIO_EXTI_LINE_7_PB13 (0x1Ul << 14U) +#define FL_GPIO_EXTI_LINE_7_PB14 (0x2Ul << 14U) +#define FL_GPIO_EXTI_LINE_7_PB15 (0x3Ul << 14U) +#define FL_GPIO_EXTI_LINE_8_PC0 (0x0Ul << 16U) +#define FL_GPIO_EXTI_LINE_8_PC1 (0x1Ul << 16U) +#define FL_GPIO_EXTI_LINE_8_PC2 (0x2Ul << 16U) +#define FL_GPIO_EXTI_LINE_8_PC3 (0x3Ul << 16U) +#define FL_GPIO_EXTI_LINE_9_PC4 (0x0Ul << 18U) +#define FL_GPIO_EXTI_LINE_9_PC5 (0x1Ul << 18U) +#define FL_GPIO_EXTI_LINE_9_PC6 (0x2Ul << 18U) +#define FL_GPIO_EXTI_LINE_9_PC7 (0x3Ul << 18U) +#define FL_GPIO_EXTI_LINE_10_PC8 (0x0Ul << 20U) +#define FL_GPIO_EXTI_LINE_10_PC9 (0x1Ul << 20U) +#define FL_GPIO_EXTI_LINE_10_PC10 (0x2Ul << 20U) +#define FL_GPIO_EXTI_LINE_10_PC11 (0x3Ul << 20U) +#define FL_GPIO_EXTI_LINE_11_PC12 (0x0Ul << 22U) +#define FL_GPIO_EXTI_LINE_11_PC13 (0x1Ul << 22U) +#define FL_GPIO_EXTI_LINE_11_PC14 (0x2Ul << 22U) +#define FL_GPIO_EXTI_LINE_11_PC15 (0x3Ul << 22U) +#define FL_GPIO_EXTI_LINE_12_PD0 (0x0Ul << 24U) +#define FL_GPIO_EXTI_LINE_12_PD1 (0x1Ul << 24U) +#define FL_GPIO_EXTI_LINE_12_PD2 (0x2Ul << 24U) +#define FL_GPIO_EXTI_LINE_12_PD3 (0x3Ul << 24U) +#define FL_GPIO_EXTI_LINE_13_PD4 (0x0Ul << 26U) +#define FL_GPIO_EXTI_LINE_13_PD5 (0x1Ul << 26U) +#define FL_GPIO_EXTI_LINE_13_PD6 (0x2Ul << 26U) +#define FL_GPIO_EXTI_LINE_13_PD7 (0x3Ul << 26U) +#define FL_GPIO_EXTI_LINE_14_PD8 (0x0Ul << 28U) +#define FL_GPIO_EXTI_LINE_14_PD9 (0x1Ul << 28U) +#define FL_GPIO_EXTI_LINE_14_PD10 (0x2Ul << 28U) +#define FL_GPIO_EXTI_LINE_14_PD11 (0x3Ul << 28U) +#define FL_GPIO_EXTI_LINE_15_PD12 (0x0Ul << 30U) +#define FL_GPIO_EXTI_LINE_16_PE0 (0x0Ul << 0U) +#define FL_GPIO_EXTI_LINE_16_PE1 (0x1Ul << 0U) +#define FL_GPIO_EXTI_LINE_16_PE2 (0x2Ul << 0U) +#define FL_GPIO_EXTI_LINE_16_PE3 (0x3Ul << 0U) +#define FL_GPIO_EXTI_LINE_17_PE5 (0x1Ul << 2U) +#define FL_GPIO_EXTI_LINE_17_PE6 (0x2Ul << 2U) +#define FL_GPIO_EXTI_LINE_17_PE7 (0x3Ul << 2U) +#define FL_GPIO_EXTI_LINE_18_PE8 (0x0Ul << 4U) +#define FL_GPIO_EXTI_LINE_18_PE9 (0x1Ul << 4U) +#define FL_GPIO_WAKEUP_0 (0x1Ul << 0U) +#define FL_GPIO_WAKEUP_1 (0x1Ul << 1U) +#define FL_GPIO_WAKEUP_2 (0x1Ul << 2U) +#define FL_GPIO_WAKEUP_3 (0x1Ul << 3U) +#define FL_GPIO_WAKEUP_4 (0x1Ul << 4U) +#define FL_GPIO_WAKEUP_5 (0x1Ul << 5U) +#define FL_GPIO_WAKEUP_6 (0x1Ul << 6U) +#define FL_GPIO_WAKEUP_7 (0x1Ul << 7U) +#define FL_GPIO_WAKEUP_8 (0x1Ul << 8U) +#define FL_GPIO_WAKEUP_9 (0x1Ul << 9U) + + +#define FL_GPIO_OUTPUT_PUSHPULL (0) +#define FL_GPIO_OUTPUT_OPENDRAIN (1) + + +#define FL_GPIO_MODE_INPUT (0x0Ul << GPIO_FCR_Pos) +#define FL_GPIO_MODE_OUTPUT (0x1Ul << GPIO_FCR_Pos) +#define FL_GPIO_MODE_DIGITAL (0x2Ul << GPIO_FCR_Pos) +#define FL_GPIO_MODE_ANALOG (0x3Ul << GPIO_FCR_Pos) + + +#define FL_GPIO_EXTI_TRIGGER_EDGE_RISING (0x0Ul << GPIO_EXTIEDS0_Pos) +#define FL_GPIO_EXTI_TRIGGER_EDGE_FALLING (0x1Ul << GPIO_EXTIEDS0_Pos) +#define FL_GPIO_EXTI_TRIGGER_EDGE_BOTH (0x2Ul << GPIO_EXTIEDS0_Pos) +#define FL_GPIO_EXTI_TRIGGER_EDGE_DISABLE (0x3Ul << GPIO_EXTIEDS0_Pos) + + +#define FL_GPIO_FOUT0_SELECT_XTLF (0x0Ul << GPIO_FOUTSEL_FOUT0_Pos) +#define FL_GPIO_FOUT0_SELECT_RCLP (0x1Ul << GPIO_FOUTSEL_FOUT0_Pos) +#define FL_GPIO_FOUT0_SELECT_RCHF_DIV64 (0x2Ul << GPIO_FOUTSEL_FOUT0_Pos) +#define FL_GPIO_FOUT0_SELECT_LSCLK (0x3Ul << GPIO_FOUTSEL_FOUT0_Pos) +#define FL_GPIO_FOUT0_SELECT_AHBCLK_DIV64 (0x4Ul << GPIO_FOUTSEL_FOUT0_Pos) +#define FL_GPIO_FOUT0_SELECT_RTCTM (0x5Ul << GPIO_FOUTSEL_FOUT0_Pos) +#define FL_GPIO_FOUT0_SELECT_PLLOUTPUT_DIV64 (0x6Ul << GPIO_FOUTSEL_FOUT0_Pos) +#define FL_GPIO_FOUT0_SELECT_RTCCLK64HZ (0x7Ul << GPIO_FOUTSEL_FOUT0_Pos) +#define FL_GPIO_FOUT0_SELECT_APBCLK_DIV64 (0x8Ul << GPIO_FOUTSEL_FOUT0_Pos) +#define FL_GPIO_FOUT0_SELECT_PLLOUTPUT (0x9Ul << GPIO_FOUTSEL_FOUT0_Pos) +#define FL_GPIO_FOUT0_SELECT_RCLF (0xaUl << GPIO_FOUTSEL_FOUT0_Pos) +#define FL_GPIO_FOUT0_SELECT_RCHF (0xbUl << GPIO_FOUTSEL_FOUT0_Pos) +#define FL_GPIO_FOUT0_SELECT_XTHF_DIV64 (0xcUl << GPIO_FOUTSEL_FOUT0_Pos) +#define FL_GPIO_FOUT0_SELECT_COMP1O (0xdUl << GPIO_FOUTSEL_FOUT0_Pos) +#define FL_GPIO_FOUT0_SELECT_CLK_8K (0xeUl << GPIO_FOUTSEL_FOUT0_Pos) +#define FL_GPIO_FOUT0_SELECT_ADC_CLK (0xfUl << GPIO_FOUTSEL_FOUT0_Pos) + + +#define FL_GPIO_FOUT1_SELECT_XTLF (0x0U << GPIO_FOUTSEL_FOUT1_Pos) +#define FL_GPIO_FOUT1_SELECT_RCLP (0x1U << GPIO_FOUTSEL_FOUT1_Pos) +#define FL_GPIO_FOUT1_SELECT_ADCCLK (0x2U << GPIO_FOUTSEL_FOUT1_Pos) +#define FL_GPIO_FOUT1_SELECT_LSCLK (0x3U << GPIO_FOUTSEL_FOUT1_Pos) +#define FL_GPIO_FOUT1_SELECT_EOC (0x4U << GPIO_FOUTSEL_FOUT1_Pos) +#define FL_GPIO_FOUT1_SELECT_RTCTM (0x5U << GPIO_FOUTSEL_FOUT1_Pos) +#define FL_GPIO_FOUT1_SELECT_PLLOUTPUT_DIV64 (0x6U << GPIO_FOUTSEL_FOUT1_Pos) +#define FL_GPIO_FOUT1_SELECT_EOCAL (0x7U << GPIO_FOUTSEL_FOUT1_Pos) +#define FL_GPIO_FOUT1_SELECT_APBCLK_DIV64 (0x8U << GPIO_FOUTSEL_FOUT1_Pos) +#define FL_GPIO_FOUT1_SELECT_ROSC_TDLV (0x9U << GPIO_FOUTSEL_FOUT1_Pos) +#define FL_GPIO_FOUT1_SELECT_RCLF (0xaU << GPIO_FOUTSEL_FOUT1_Pos) +#define FL_GPIO_FOUT1_SELECT_RCHF (0xbU << GPIO_FOUTSEL_FOUT1_Pos) +#define FL_GPIO_FOUT1_SELECT_XTHF_DIV64 (0xcU << GPIO_FOUTSEL_FOUT1_Pos) +#define FL_GPIO_FOUT1_SELECT_ADCCLK_DIV64 (0xdU << GPIO_FOUTSEL_FOUT1_Pos) +#define FL_GPIO_FOUT1_SELECT_CLK_8K (0xeU << GPIO_FOUTSEL_FOUT1_Pos) +#define FL_GPIO_FOUT1_SELECT_ROSC_TDHV (0xfU << GPIO_FOUTSEL_FOUT1_Pos) + + +#define FL_GPIO_WAKEUP_INT_ENTRY_NMI (0x0U << GPIO_PINWKEN_WKISEL_Pos) +#define FL_GPIO_WAKEUP_INT_ENTRY_38 (0x1U << GPIO_PINWKEN_WKISEL_Pos) + + +#define FL_GPIO_WAKEUP_TRIGGER_RISING (0x1U << GPIO_PINWKEN_SEL_Pos) +#define FL_GPIO_WAKEUP_TRIGGER_FALLING (0x0U << GPIO_PINWKEN_SEL_Pos) +#define FL_GPIO_WAKEUP_TRIGGER_BOTH (0x2U << GPIO_PINWKEN_SEL_Pos) + + +/** + * @} + */ +/* Exported functions ---------------------------------------------------------------------------------*/ +/** @defgroup GPIO_FL_Exported_Functions GPIO Exported Functions + * @{ + */ + +/** + * @brief GPIOx input enable + * @rmtoll INEN FL_GPIO_EnablePinInput + * @param GPIOx GPIO Port + * @param pin This parameter can be one of the following values: + * @arg @ref FL_GPIO_PIN_0 + * @arg @ref FL_GPIO_PIN_1 + * @arg @ref FL_GPIO_PIN_2 + * @arg @ref FL_GPIO_PIN_3 + * @arg @ref FL_GPIO_PIN_4 + * @arg @ref FL_GPIO_PIN_5 + * @arg @ref FL_GPIO_PIN_6 + * @arg @ref FL_GPIO_PIN_7 + * @arg @ref FL_GPIO_PIN_8 + * @arg @ref FL_GPIO_PIN_9 + * @arg @ref FL_GPIO_PIN_10 + * @arg @ref FL_GPIO_PIN_11 + * @arg @ref FL_GPIO_PIN_12 + * @arg @ref FL_GPIO_PIN_13 + * @arg @ref FL_GPIO_PIN_14 + * @arg @ref FL_GPIO_PIN_15 + * @arg @ref FL_GPIO_PIN_ALL + * @retval None + */ +__STATIC_INLINE void FL_GPIO_EnablePinInput(GPIO_Type *GPIOx, uint32_t pin) +{ + SET_BIT(GPIOx->INEN, ((pin & 0xffff) << 0x0U)); +} + +/** + * @brief CPIOx input disable + * @rmtoll INEN FL_GPIO_DisablePinInput + * @param GPIOx GPIO Port + * @param pin This parameter can be one of the following values: + * @arg @ref FL_GPIO_PIN_0 + * @arg @ref FL_GPIO_PIN_1 + * @arg @ref FL_GPIO_PIN_2 + * @arg @ref FL_GPIO_PIN_3 + * @arg @ref FL_GPIO_PIN_4 + * @arg @ref FL_GPIO_PIN_5 + * @arg @ref FL_GPIO_PIN_6 + * @arg @ref FL_GPIO_PIN_7 + * @arg @ref FL_GPIO_PIN_8 + * @arg @ref FL_GPIO_PIN_9 + * @arg @ref FL_GPIO_PIN_10 + * @arg @ref FL_GPIO_PIN_11 + * @arg @ref FL_GPIO_PIN_12 + * @arg @ref FL_GPIO_PIN_13 + * @arg @ref FL_GPIO_PIN_14 + * @arg @ref FL_GPIO_PIN_15 + * @arg @ref FL_GPIO_PIN_ALL + * @retval None + */ +__STATIC_INLINE void FL_GPIO_DisablePinInput(GPIO_Type *GPIOx, uint32_t pin) +{ + CLEAR_BIT(GPIOx->INEN, ((pin & 0xffff) << 0x0U)); +} + +/** + * @brief Get GPIOx input enable status + * @rmtoll INEN FL_GPIO_IsEnabledPinInput + * @param GPIOx GPIO Port + * @param pin This parameter can be one of the following values: + * @arg @ref FL_GPIO_PIN_0 + * @arg @ref FL_GPIO_PIN_1 + * @arg @ref FL_GPIO_PIN_2 + * @arg @ref FL_GPIO_PIN_3 + * @arg @ref FL_GPIO_PIN_4 + * @arg @ref FL_GPIO_PIN_5 + * @arg @ref FL_GPIO_PIN_6 + * @arg @ref FL_GPIO_PIN_7 + * @arg @ref FL_GPIO_PIN_8 + * @arg @ref FL_GPIO_PIN_9 + * @arg @ref FL_GPIO_PIN_10 + * @arg @ref FL_GPIO_PIN_11 + * @arg @ref FL_GPIO_PIN_12 + * @arg @ref FL_GPIO_PIN_13 + * @arg @ref FL_GPIO_PIN_14 + * @arg @ref FL_GPIO_PIN_15 + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_GPIO_IsEnabledPinInput(GPIO_Type *GPIOx, uint32_t pin) +{ + return (uint32_t)(READ_BIT(GPIOx->INEN, ((pin & 0xffff) << 0x0U)) == ((pin & 0xffff) << 0x0U)); +} + +/** + * @brief GPIOx Pull-Up enable + * @rmtoll PUEN FL_GPIO_EnablePinPullup + * @param GPIOx GPIO Port + * @param pin This parameter can be one of the following values: + * @arg @ref FL_GPIO_PIN_0 + * @arg @ref FL_GPIO_PIN_1 + * @arg @ref FL_GPIO_PIN_2 + * @arg @ref FL_GPIO_PIN_3 + * @arg @ref FL_GPIO_PIN_4 + * @arg @ref FL_GPIO_PIN_5 + * @arg @ref FL_GPIO_PIN_6 + * @arg @ref FL_GPIO_PIN_7 + * @arg @ref FL_GPIO_PIN_8 + * @arg @ref FL_GPIO_PIN_9 + * @arg @ref FL_GPIO_PIN_10 + * @arg @ref FL_GPIO_PIN_11 + * @arg @ref FL_GPIO_PIN_12 + * @arg @ref FL_GPIO_PIN_13 + * @arg @ref FL_GPIO_PIN_14 + * @arg @ref FL_GPIO_PIN_15 + * @arg @ref FL_GPIO_PIN_ALL + * @retval None + */ +__STATIC_INLINE void FL_GPIO_EnablePinPullup(GPIO_Type *GPIOx, uint32_t pin) +{ + SET_BIT(GPIOx->PUEN, ((pin & 0xffff) << 0x0U)); +} + +/** + * @brief GPIOx Pull-Up disable + * @rmtoll PUEN FL_GPIO_DisablePinPullup + * @param GPIOx GPIO Port + * @param pin This parameter can be one of the following values: + * @arg @ref FL_GPIO_PIN_0 + * @arg @ref FL_GPIO_PIN_1 + * @arg @ref FL_GPIO_PIN_2 + * @arg @ref FL_GPIO_PIN_3 + * @arg @ref FL_GPIO_PIN_4 + * @arg @ref FL_GPIO_PIN_5 + * @arg @ref FL_GPIO_PIN_6 + * @arg @ref FL_GPIO_PIN_7 + * @arg @ref FL_GPIO_PIN_8 + * @arg @ref FL_GPIO_PIN_9 + * @arg @ref FL_GPIO_PIN_10 + * @arg @ref FL_GPIO_PIN_11 + * @arg @ref FL_GPIO_PIN_12 + * @arg @ref FL_GPIO_PIN_13 + * @arg @ref FL_GPIO_PIN_14 + * @arg @ref FL_GPIO_PIN_15 + * @arg @ref FL_GPIO_PIN_ALL + * @retval None + */ +__STATIC_INLINE void FL_GPIO_DisablePinPullup(GPIO_Type *GPIOx, uint32_t pin) +{ + CLEAR_BIT(GPIOx->PUEN, ((pin & 0xffff) << 0x0U)); +} + +/** + * @brief Get GPIOx Pull-Up enable status + * @rmtoll PUEN FL_GPIO_IsEnabledPinPullup + * @param GPIOx GPIO Port + * @param pin This parameter can be one of the following values: + * @arg @ref FL_GPIO_PIN_0 + * @arg @ref FL_GPIO_PIN_1 + * @arg @ref FL_GPIO_PIN_2 + * @arg @ref FL_GPIO_PIN_3 + * @arg @ref FL_GPIO_PIN_4 + * @arg @ref FL_GPIO_PIN_5 + * @arg @ref FL_GPIO_PIN_6 + * @arg @ref FL_GPIO_PIN_7 + * @arg @ref FL_GPIO_PIN_8 + * @arg @ref FL_GPIO_PIN_9 + * @arg @ref FL_GPIO_PIN_10 + * @arg @ref FL_GPIO_PIN_11 + * @arg @ref FL_GPIO_PIN_12 + * @arg @ref FL_GPIO_PIN_13 + * @arg @ref FL_GPIO_PIN_14 + * @arg @ref FL_GPIO_PIN_15 + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_GPIO_IsEnabledPinPullup(GPIO_Type *GPIOx, uint32_t pin) +{ + return (uint32_t)(READ_BIT(GPIOx->PUEN, ((pin & 0xffff) << 0x0U)) == ((pin & 0xffff) << 0x0U)); +} + +/** + * @brief GPIOx Open-Drain enable + * @rmtoll ODEN FL_GPIO_EnablePinOpenDrain + * @param GPIOx GPIO Port + * @param pin This parameter can be one of the following values: + * @arg @ref FL_GPIO_PIN_0 + * @arg @ref FL_GPIO_PIN_1 + * @arg @ref FL_GPIO_PIN_2 + * @arg @ref FL_GPIO_PIN_3 + * @arg @ref FL_GPIO_PIN_4 + * @arg @ref FL_GPIO_PIN_5 + * @arg @ref FL_GPIO_PIN_6 + * @arg @ref FL_GPIO_PIN_7 + * @arg @ref FL_GPIO_PIN_8 + * @arg @ref FL_GPIO_PIN_9 + * @arg @ref FL_GPIO_PIN_10 + * @arg @ref FL_GPIO_PIN_11 + * @arg @ref FL_GPIO_PIN_12 + * @arg @ref FL_GPIO_PIN_13 + * @arg @ref FL_GPIO_PIN_14 + * @arg @ref FL_GPIO_PIN_15 + * @arg @ref FL_GPIO_PIN_ALL + * @retval None + */ +__STATIC_INLINE void FL_GPIO_EnablePinOpenDrain(GPIO_Type *GPIOx, uint32_t pin) +{ + SET_BIT(GPIOx->ODEN, ((pin & 0xffff) << 0x0U)); +} + +/** + * @brief Open-Drain disable + * @rmtoll ODEN FL_GPIO_DisablePinOpenDrain + * @param GPIOx GPIO Port + * @param pin This parameter can be one of the following values: + * @arg @ref FL_GPIO_PIN_0 + * @arg @ref FL_GPIO_PIN_1 + * @arg @ref FL_GPIO_PIN_2 + * @arg @ref FL_GPIO_PIN_3 + * @arg @ref FL_GPIO_PIN_4 + * @arg @ref FL_GPIO_PIN_5 + * @arg @ref FL_GPIO_PIN_6 + * @arg @ref FL_GPIO_PIN_7 + * @arg @ref FL_GPIO_PIN_8 + * @arg @ref FL_GPIO_PIN_9 + * @arg @ref FL_GPIO_PIN_10 + * @arg @ref FL_GPIO_PIN_11 + * @arg @ref FL_GPIO_PIN_12 + * @arg @ref FL_GPIO_PIN_13 + * @arg @ref FL_GPIO_PIN_14 + * @arg @ref FL_GPIO_PIN_15 + * @arg @ref FL_GPIO_PIN_ALL + * @retval None + */ +__STATIC_INLINE void FL_GPIO_DisablePinOpenDrain(GPIO_Type *GPIOx, uint32_t pin) +{ + CLEAR_BIT(GPIOx->ODEN, ((pin & 0xffff) << 0x0U)); +} + +/** + * @brief Get Open-Drain enable status + * @rmtoll ODEN FL_GPIO_IsEnabledPinOpenDrain + * @param GPIOx GPIO Port + * @param pin This parameter can be one of the following values: + * @arg @ref FL_GPIO_PIN_0 + * @arg @ref FL_GPIO_PIN_1 + * @arg @ref FL_GPIO_PIN_2 + * @arg @ref FL_GPIO_PIN_3 + * @arg @ref FL_GPIO_PIN_4 + * @arg @ref FL_GPIO_PIN_5 + * @arg @ref FL_GPIO_PIN_6 + * @arg @ref FL_GPIO_PIN_7 + * @arg @ref FL_GPIO_PIN_8 + * @arg @ref FL_GPIO_PIN_9 + * @arg @ref FL_GPIO_PIN_10 + * @arg @ref FL_GPIO_PIN_11 + * @arg @ref FL_GPIO_PIN_12 + * @arg @ref FL_GPIO_PIN_13 + * @arg @ref FL_GPIO_PIN_14 + * @arg @ref FL_GPIO_PIN_15 + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_GPIO_IsEnabledPinOpenDrain(GPIO_Type *GPIOx, uint32_t pin) +{ + return (uint32_t)(READ_BIT(GPIOx->ODEN, ((pin & 0xffff) << 0x0U)) == ((pin & 0xffff) << 0x0U)); +} + +/** + * @brief GPIOx digital function enable + * @rmtoll DFS FL_GPIO_EnablePinRemap + * @param GPIOx GPIO Port + * @param pin This parameter can be one of the following values: + * @arg @ref FL_GPIO_PIN_0 + * @arg @ref FL_GPIO_PIN_1 + * @arg @ref FL_GPIO_PIN_2 + * @arg @ref FL_GPIO_PIN_3 + * @arg @ref FL_GPIO_PIN_4 + * @arg @ref FL_GPIO_PIN_5 + * @arg @ref FL_GPIO_PIN_6 + * @arg @ref FL_GPIO_PIN_7 + * @arg @ref FL_GPIO_PIN_8 + * @arg @ref FL_GPIO_PIN_9 + * @arg @ref FL_GPIO_PIN_10 + * @arg @ref FL_GPIO_PIN_11 + * @arg @ref FL_GPIO_PIN_12 + * @arg @ref FL_GPIO_PIN_13 + * @arg @ref FL_GPIO_PIN_14 + * @arg @ref FL_GPIO_PIN_15 + * @arg @ref FL_GPIO_PIN_ALL + * @retval None + */ +__STATIC_INLINE void FL_GPIO_EnablePinRemap(GPIO_Type *GPIOx, uint32_t pin) +{ + SET_BIT(GPIOx->DFS, ((pin & 0xffff) << 0x0U)); +} + +/** + * @brief GPIOx digital function disable + * @rmtoll DFS FL_GPIO_DisablePinRemap + * @param GPIOx GPIO Port + * @param pin This parameter can be one of the following values: + * @arg @ref FL_GPIO_PIN_0 + * @arg @ref FL_GPIO_PIN_1 + * @arg @ref FL_GPIO_PIN_2 + * @arg @ref FL_GPIO_PIN_3 + * @arg @ref FL_GPIO_PIN_4 + * @arg @ref FL_GPIO_PIN_5 + * @arg @ref FL_GPIO_PIN_6 + * @arg @ref FL_GPIO_PIN_7 + * @arg @ref FL_GPIO_PIN_8 + * @arg @ref FL_GPIO_PIN_9 + * @arg @ref FL_GPIO_PIN_10 + * @arg @ref FL_GPIO_PIN_11 + * @arg @ref FL_GPIO_PIN_12 + * @arg @ref FL_GPIO_PIN_13 + * @arg @ref FL_GPIO_PIN_14 + * @arg @ref FL_GPIO_PIN_15 + * @arg @ref FL_GPIO_PIN_ALL + * @retval None + */ +__STATIC_INLINE void FL_GPIO_DisablePinRemap(GPIO_Type *GPIOx, uint32_t pin) +{ + CLEAR_BIT(GPIOx->DFS, ((pin & 0xffff) << 0x0U)); +} + +/** + * @brief Get GPIOx digital function enable status + * @rmtoll DFS FL_GPIO_IsEnabledPinRemap + * @param GPIOx GPIO Port + * @param pin This parameter can be one of the following values: + * @arg @ref FL_GPIO_PIN_0 + * @arg @ref FL_GPIO_PIN_1 + * @arg @ref FL_GPIO_PIN_2 + * @arg @ref FL_GPIO_PIN_3 + * @arg @ref FL_GPIO_PIN_4 + * @arg @ref FL_GPIO_PIN_5 + * @arg @ref FL_GPIO_PIN_6 + * @arg @ref FL_GPIO_PIN_7 + * @arg @ref FL_GPIO_PIN_8 + * @arg @ref FL_GPIO_PIN_9 + * @arg @ref FL_GPIO_PIN_10 + * @arg @ref FL_GPIO_PIN_11 + * @arg @ref FL_GPIO_PIN_12 + * @arg @ref FL_GPIO_PIN_13 + * @arg @ref FL_GPIO_PIN_14 + * @arg @ref FL_GPIO_PIN_15 + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_GPIO_IsEnabledPinRemap(GPIO_Type *GPIOx, uint32_t pin) +{ + return (uint32_t)(READ_BIT(GPIOx->DFS, ((pin & 0xffff) << 0x0U)) == ((pin & 0xffff) << 0x0U)); +} + +/** + * @brief GPIOx analog channel enable + * @rmtoll ANEN FL_GPIO_EnablePinAnalogSwitch + * @param GPIOx GPIO Port + * @param pin This parameter can be one of the following values: + * @arg @ref FL_GPIO_PIN_0 + * @arg @ref FL_GPIO_PIN_1 + * @arg @ref FL_GPIO_PIN_2 + * @arg @ref FL_GPIO_PIN_3 + * @arg @ref FL_GPIO_PIN_4 + * @arg @ref FL_GPIO_PIN_5 + * @arg @ref FL_GPIO_PIN_6 + * @arg @ref FL_GPIO_PIN_7 + * @arg @ref FL_GPIO_PIN_8 + * @arg @ref FL_GPIO_PIN_9 + * @arg @ref FL_GPIO_PIN_10 + * @arg @ref FL_GPIO_PIN_11 + * @arg @ref FL_GPIO_PIN_12 + * @arg @ref FL_GPIO_PIN_13 + * @arg @ref FL_GPIO_PIN_14 + * @arg @ref FL_GPIO_PIN_15 + * @arg @ref FL_GPIO_PIN_ALL + * @retval None + */ +__STATIC_INLINE void FL_GPIO_EnablePinAnalogSwitch(GPIO_Type *GPIOx, uint32_t pin) +{ + SET_BIT(GPIOx->ANEN, ((pin & 0xffff) << 0x0U)); +} + +/** + * @brief GPIOx analog channel disable + * @rmtoll ANEN FL_GPIO_DisablePinAnalogSwitch + * @param GPIOx GPIO Port + * @param pin This parameter can be one of the following values: + * @arg @ref FL_GPIO_PIN_0 + * @arg @ref FL_GPIO_PIN_1 + * @arg @ref FL_GPIO_PIN_2 + * @arg @ref FL_GPIO_PIN_3 + * @arg @ref FL_GPIO_PIN_4 + * @arg @ref FL_GPIO_PIN_5 + * @arg @ref FL_GPIO_PIN_6 + * @arg @ref FL_GPIO_PIN_7 + * @arg @ref FL_GPIO_PIN_8 + * @arg @ref FL_GPIO_PIN_9 + * @arg @ref FL_GPIO_PIN_10 + * @arg @ref FL_GPIO_PIN_11 + * @arg @ref FL_GPIO_PIN_12 + * @arg @ref FL_GPIO_PIN_13 + * @arg @ref FL_GPIO_PIN_14 + * @arg @ref FL_GPIO_PIN_15 + * @arg @ref FL_GPIO_PIN_ALL + * @retval None + */ +__STATIC_INLINE void FL_GPIO_DisablePinAnalogSwitch(GPIO_Type *GPIOx, uint32_t pin) +{ + CLEAR_BIT(GPIOx->ANEN, ((pin & 0xffff) << 0x0U)); +} + +/** + * @brief Get GPIOx analog channel enable status + * @rmtoll ANEN FL_GPIO_IsEnabledPinAnalogSwitch + * @param GPIOx GPIO Port + * @param pin This parameter can be one of the following values: + * @arg @ref FL_GPIO_PIN_0 + * @arg @ref FL_GPIO_PIN_1 + * @arg @ref FL_GPIO_PIN_2 + * @arg @ref FL_GPIO_PIN_3 + * @arg @ref FL_GPIO_PIN_4 + * @arg @ref FL_GPIO_PIN_5 + * @arg @ref FL_GPIO_PIN_6 + * @arg @ref FL_GPIO_PIN_7 + * @arg @ref FL_GPIO_PIN_8 + * @arg @ref FL_GPIO_PIN_9 + * @arg @ref FL_GPIO_PIN_10 + * @arg @ref FL_GPIO_PIN_11 + * @arg @ref FL_GPIO_PIN_12 + * @arg @ref FL_GPIO_PIN_13 + * @arg @ref FL_GPIO_PIN_14 + * @arg @ref FL_GPIO_PIN_15 + * @arg @ref FL_GPIO_PIN_ALL + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_GPIO_IsEnabledPinAnalogSwitch(GPIO_Type *GPIOx, uint32_t pin) +{ + return (uint32_t)(READ_BIT(GPIOx->ANEN, ((pin & 0xffff) << 0x0U)) == ((pin & 0xffff) << 0x0U)); +} + +/** + * @brief Set Portx mode + * @rmtoll FCR FL_GPIO_SetPinMode + * @param GPIOx GPIO Port + * @param pin This parameter can be one of the following values: + * @arg @ref FL_GPIO_PIN_0 + * @arg @ref FL_GPIO_PIN_1 + * @arg @ref FL_GPIO_PIN_2 + * @arg @ref FL_GPIO_PIN_3 + * @arg @ref FL_GPIO_PIN_4 + * @arg @ref FL_GPIO_PIN_5 + * @arg @ref FL_GPIO_PIN_6 + * @arg @ref FL_GPIO_PIN_7 + * @arg @ref FL_GPIO_PIN_8 + * @arg @ref FL_GPIO_PIN_9 + * @arg @ref FL_GPIO_PIN_10 + * @arg @ref FL_GPIO_PIN_11 + * @arg @ref FL_GPIO_PIN_12 + * @arg @ref FL_GPIO_PIN_13 + * @arg @ref FL_GPIO_PIN_14 + * @arg @ref FL_GPIO_PIN_15 + * @param mode This parameter can be one of the following values: + * @arg @ref FL_GPIO_MODE_INPUT + * @arg @ref FL_GPIO_MODE_OUTPUT + * @arg @ref FL_GPIO_MODE_DIGITAL + * @arg @ref FL_GPIO_MODE_ANALOG + * @retval None + */ +__STATIC_INLINE void FL_GPIO_SetPinMode(GPIO_Type *GPIOx, uint32_t pin, uint32_t mode) +{ + MODIFY_REG(GPIOx->FCR, ((pin * pin) * GPIO_FCR), ((pin * pin) * mode)); +} + +/** + * @brief Get Portx mode + * @rmtoll FCR FL_GPIO_GetPinMode + * @param GPIOx GPIO Port + * @param Pin This parameter can be one of the following values: + * @arg @ref FL_GPIO_PIN_0 + * @arg @ref FL_GPIO_PIN_1 + * @arg @ref FL_GPIO_PIN_2 + * @arg @ref FL_GPIO_PIN_3 + * @arg @ref FL_GPIO_PIN_4 + * @arg @ref FL_GPIO_PIN_5 + * @arg @ref FL_GPIO_PIN_6 + * @arg @ref FL_GPIO_PIN_7 + * @arg @ref FL_GPIO_PIN_8 + * @arg @ref FL_GPIO_PIN_9 + * @arg @ref FL_GPIO_PIN_10 + * @arg @ref FL_GPIO_PIN_11 + * @arg @ref FL_GPIO_PIN_12 + * @arg @ref FL_GPIO_PIN_13 + * @arg @ref FL_GPIO_PIN_14 + * @arg @ref FL_GPIO_PIN_15 + * @retval Returned value can be one of the following values: + * @arg @ref FL_GPIO_MODE_INPUT + * @arg @ref FL_GPIO_MODE_OUTPUT + * @arg @ref FL_GPIO_MODE_DIGITAL + * @arg @ref FL_GPIO_MODE_ANALOG + */ +__STATIC_INLINE uint32_t FL_GPIO_GetPinMode(GPIO_Type *GPIOx, uint32_t Pin) +{ + return (uint32_t)(READ_BIT(GPIOx->FCR, ((Pin * Pin) * GPIO_FCR)) / (Pin * Pin)); +} + +/** + * @brief Set GPIO output data + * @rmtoll DO FL_GPIO_WriteOutputPort + * @param GPIOx GPIO Port + * @param output Level value for each pin of the port + * @retval None + */ +__STATIC_INLINE void FL_GPIO_WriteOutputPort(GPIO_Type *GPIOx, uint32_t output) +{ + MODIFY_REG(GPIOx->DO, (0xffffU << 0U), (output << 0U)); +} + +/** + * @brief Get GPIO output data + * @rmtoll DO FL_GPIO_ReadOutputPort + * @param GPIOx GPIO Port + * @retval Output data register value of port + */ +__STATIC_INLINE uint32_t FL_GPIO_ReadOutputPort(GPIO_Type *GPIOx) +{ + return (uint32_t)(READ_BIT(GPIOx->DO, (0xffffU << 0U)) >> 0U); +} + +/** + * @brief Get GPIO output pin status + * @rmtoll DO FL_GPIO_GetOutputPin + * @param GPIOx GPIO Port + * @param pin This parameter can be one of the following values: + * @arg @ref FL_GPIO_PIN_0 + * @arg @ref FL_GPIO_PIN_1 + * @arg @ref FL_GPIO_PIN_2 + * @arg @ref FL_GPIO_PIN_3 + * @arg @ref FL_GPIO_PIN_4 + * @arg @ref FL_GPIO_PIN_5 + * @arg @ref FL_GPIO_PIN_6 + * @arg @ref FL_GPIO_PIN_7 + * @arg @ref FL_GPIO_PIN_8 + * @arg @ref FL_GPIO_PIN_9 + * @arg @ref FL_GPIO_PIN_10 + * @arg @ref FL_GPIO_PIN_11 + * @arg @ref FL_GPIO_PIN_12 + * @arg @ref FL_GPIO_PIN_13 + * @arg @ref FL_GPIO_PIN_14 + * @arg @ref FL_GPIO_PIN_15 + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_GPIO_GetOutputPin(GPIO_Type *GPIOx, uint32_t pin) +{ + return (uint32_t)(READ_BIT(GPIOx->DO, ((pin & 0xffff) << 0x0U)) == ((pin & 0xffff) << 0x0U)); +} + +/** + * @brief Toggle output pin + * @rmtoll DO FL_GPIO_ToggleOutputPin + * @param GPIOx GPIO Port + * @param pin This parameter can be one of the following values: + * @arg @ref FL_GPIO_PIN_0 + * @arg @ref FL_GPIO_PIN_1 + * @arg @ref FL_GPIO_PIN_2 + * @arg @ref FL_GPIO_PIN_3 + * @arg @ref FL_GPIO_PIN_4 + * @arg @ref FL_GPIO_PIN_5 + * @arg @ref FL_GPIO_PIN_6 + * @arg @ref FL_GPIO_PIN_7 + * @arg @ref FL_GPIO_PIN_8 + * @arg @ref FL_GPIO_PIN_9 + * @arg @ref FL_GPIO_PIN_10 + * @arg @ref FL_GPIO_PIN_11 + * @arg @ref FL_GPIO_PIN_12 + * @arg @ref FL_GPIO_PIN_13 + * @arg @ref FL_GPIO_PIN_14 + * @arg @ref FL_GPIO_PIN_15 + * @arg @ref FL_GPIO_PIN_ALL + * @retval None + */ +__STATIC_INLINE void FL_GPIO_ToggleOutputPin(GPIO_Type *GPIOx, uint32_t pin) +{ + if(pin&GPIOx->DO) + { + WRITE_REG(GPIOx->DRST, pin); + } + else + { + WRITE_REG(GPIOx->DSET, pin); + } +} + +/** + * @brief Get input data + * @rmtoll DIN FL_GPIO_ReadInputPort + * @param GPIOx GPIO Port + * @retval Input data register value of port + */ +__STATIC_INLINE uint32_t FL_GPIO_ReadInputPort(GPIO_Type *GPIOx) +{ + return (uint32_t)(READ_BIT(GPIOx->DIN, (0xffffU << 0U)) >> 0U); +} + +/** + * @brief Get GPIO input set status + * @rmtoll DIN FL_GPIO_GetInputPin + * @param GPIOx GPIO Port + * @param pin This parameter can be one of the following values: + * @arg @ref FL_GPIO_PIN_0 + * @arg @ref FL_GPIO_PIN_1 + * @arg @ref FL_GPIO_PIN_2 + * @arg @ref FL_GPIO_PIN_3 + * @arg @ref FL_GPIO_PIN_4 + * @arg @ref FL_GPIO_PIN_5 + * @arg @ref FL_GPIO_PIN_6 + * @arg @ref FL_GPIO_PIN_7 + * @arg @ref FL_GPIO_PIN_8 + * @arg @ref FL_GPIO_PIN_9 + * @arg @ref FL_GPIO_PIN_10 + * @arg @ref FL_GPIO_PIN_11 + * @arg @ref FL_GPIO_PIN_12 + * @arg @ref FL_GPIO_PIN_13 + * @arg @ref FL_GPIO_PIN_14 + * @arg @ref FL_GPIO_PIN_15 + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_GPIO_GetInputPin(GPIO_Type *GPIOx, uint32_t pin) +{ + return (uint32_t)(READ_BIT(GPIOx->DIN, ((pin & 0xffff) << 0x0U)) == ((pin & 0xffff) << 0x0U)); +} + +/** + * @brief Set pin output 1 + * @rmtoll DSET FL_GPIO_SetOutputPin + * @param GPIOx GPIO Port + * @param pin This parameter can be one of the following values: + * @arg @ref FL_GPIO_PIN_0 + * @arg @ref FL_GPIO_PIN_1 + * @arg @ref FL_GPIO_PIN_2 + * @arg @ref FL_GPIO_PIN_3 + * @arg @ref FL_GPIO_PIN_4 + * @arg @ref FL_GPIO_PIN_5 + * @arg @ref FL_GPIO_PIN_6 + * @arg @ref FL_GPIO_PIN_7 + * @arg @ref FL_GPIO_PIN_8 + * @arg @ref FL_GPIO_PIN_9 + * @arg @ref FL_GPIO_PIN_10 + * @arg @ref FL_GPIO_PIN_11 + * @arg @ref FL_GPIO_PIN_12 + * @arg @ref FL_GPIO_PIN_13 + * @arg @ref FL_GPIO_PIN_14 + * @arg @ref FL_GPIO_PIN_15 + * @arg @ref FL_GPIO_PIN_ALL + * @retval None + */ +__STATIC_INLINE void FL_GPIO_SetOutputPin(GPIO_Type *GPIOx, uint32_t pin) +{ + SET_BIT(GPIOx->DSET, ((pin & 0xffff) << 0x0U)); +} + +/** + * @brief Set pin output 0 + * @rmtoll DRST FL_GPIO_ResetOutputPin + * @param GPIOx GPIO Port + * @param pin This parameter can be one of the following values: + * @arg @ref FL_GPIO_PIN_0 + * @arg @ref FL_GPIO_PIN_1 + * @arg @ref FL_GPIO_PIN_2 + * @arg @ref FL_GPIO_PIN_3 + * @arg @ref FL_GPIO_PIN_4 + * @arg @ref FL_GPIO_PIN_5 + * @arg @ref FL_GPIO_PIN_6 + * @arg @ref FL_GPIO_PIN_7 + * @arg @ref FL_GPIO_PIN_8 + * @arg @ref FL_GPIO_PIN_9 + * @arg @ref FL_GPIO_PIN_10 + * @arg @ref FL_GPIO_PIN_11 + * @arg @ref FL_GPIO_PIN_12 + * @arg @ref FL_GPIO_PIN_13 + * @arg @ref FL_GPIO_PIN_14 + * @arg @ref FL_GPIO_PIN_15 + * @arg @ref FL_GPIO_PIN_ALL + * @retval None + */ +__STATIC_INLINE void FL_GPIO_ResetOutputPin(GPIO_Type *GPIOx, uint32_t pin) +{ + SET_BIT(GPIOx->DRST, ((pin & 0xffff) << 0x0U)); +} + +/** + * @brief EXTI edge0 select + * @rmtoll EXTIEDS0 FL_GPIO_SetTriggerEdge0 + * @param GPIOx GPIO Port + * @param line This parameter can be one of the following values: + * @arg @ref FL_GPIO_EXTI_LINE_0 + * @arg @ref FL_GPIO_EXTI_LINE_1 + * @arg @ref FL_GPIO_EXTI_LINE_2 + * @arg @ref FL_GPIO_EXTI_LINE_3 + * @arg @ref FL_GPIO_EXTI_LINE_4 + * @arg @ref FL_GPIO_EXTI_LINE_5 + * @arg @ref FL_GPIO_EXTI_LINE_6 + * @arg @ref FL_GPIO_EXTI_LINE_7 + * @arg @ref FL_GPIO_EXTI_LINE_8 + * @arg @ref FL_GPIO_EXTI_LINE_9 + * @arg @ref FL_GPIO_EXTI_LINE_10 + * @arg @ref FL_GPIO_EXTI_LINE_11 + * @arg @ref FL_GPIO_EXTI_LINE_12 + * @arg @ref FL_GPIO_EXTI_LINE_13 + * @arg @ref FL_GPIO_EXTI_LINE_14 + * @arg @ref FL_GPIO_EXTI_LINE_15 + * @param edge This parameter can be one of the following values: + * @arg @ref FL_GPIO_EXTI_TRIGGER_EDGE_RISING + * @arg @ref FL_GPIO_EXTI_TRIGGER_EDGE_FALLING + * @arg @ref FL_GPIO_EXTI_TRIGGER_EDGE_BOTH + * @arg @ref FL_GPIO_EXTI_TRIGGER_EDGE_DISABLE + * @retval None + */ +__STATIC_INLINE void FL_GPIO_SetTriggerEdge0(GPIO_COMMON_Type *GPIOx, uint32_t line, uint32_t edge) +{ + MODIFY_REG(GPIOx->EXTIEDS0, ((line * line) * GPIO_EXTIEDS0), ((line * line) * edge)); +} + +/** + * @brief Get EXTI edge0 select + * @rmtoll EXTIEDS0 FL_GPIO_GetTriggerEdge0 + * @param GPIOx GPIO Port + * @param line This parameter can be one of the following values: + * @arg @ref FL_GPIO_EXTI_LINE_0 + * @arg @ref FL_GPIO_EXTI_LINE_1 + * @arg @ref FL_GPIO_EXTI_LINE_2 + * @arg @ref FL_GPIO_EXTI_LINE_3 + * @arg @ref FL_GPIO_EXTI_LINE_4 + * @arg @ref FL_GPIO_EXTI_LINE_5 + * @arg @ref FL_GPIO_EXTI_LINE_6 + * @arg @ref FL_GPIO_EXTI_LINE_7 + * @arg @ref FL_GPIO_EXTI_LINE_8 + * @arg @ref FL_GPIO_EXTI_LINE_9 + * @arg @ref FL_GPIO_EXTI_LINE_10 + * @arg @ref FL_GPIO_EXTI_LINE_11 + * @arg @ref FL_GPIO_EXTI_LINE_12 + * @arg @ref FL_GPIO_EXTI_LINE_13 + * @arg @ref FL_GPIO_EXTI_LINE_14 + * @arg @ref FL_GPIO_EXTI_LINE_15 + * @retval Returned value can be one of the following values: + * @arg @ref FL_GPIO_EXTI_TRIGGER_EDGE_RISING + * @arg @ref FL_GPIO_EXTI_TRIGGER_EDGE_FALLING + * @arg @ref FL_GPIO_EXTI_TRIGGER_EDGE_BOTH + * @arg @ref FL_GPIO_EXTI_TRIGGER_EDGE_DISABLE + */ +__STATIC_INLINE uint32_t FL_GPIO_GetTriggerEdge0(GPIO_COMMON_Type *GPIOx, uint32_t line) +{ + return (uint32_t)(READ_BIT(GPIOx->EXTIEDS0, ((line * line) * GPIO_EXTIEDS0)) / (line * line)); +} + +/** + * @brief EXTI edge1 select + * @rmtoll EXTIEDS1 FL_GPIO_SetTriggerEdge1 + * @param GPIOx GPIO Port + * @param line This parameter can be one of the following values: + * @arg @ref FL_GPIO_EXTI_LINE_16 + * @arg @ref FL_GPIO_EXTI_LINE_17 + * @arg @ref FL_GPIO_EXTI_LINE_18 + * @param edge This parameter can be one of the following values: + * @arg @ref FL_GPIO_EXTI_TRIGGER_EDGE_RISING + * @arg @ref FL_GPIO_EXTI_TRIGGER_EDGE_FALLING + * @arg @ref FL_GPIO_EXTI_TRIGGER_EDGE_BOTH + * @arg @ref FL_GPIO_EXTI_TRIGGER_EDGE_DISABLE + * @retval None + */ +__STATIC_INLINE void FL_GPIO_SetTriggerEdge1(GPIO_COMMON_Type *GPIOx, uint32_t line, uint32_t edge) +{ + MODIFY_REG(GPIOx->EXTIEDS1, (((line >> 16) * (line >> 16)) * GPIO_EXTIEDS1), + (((line >> 16) * (line >> 16)) * edge)); +} + +/** + * @brief Get EXTI edge1 select + * @rmtoll EXTIEDS1 FL_GPIO_GetTriggerEdge1 + * @param GPIOx GPIO Port + * @param line This parameter can be one of the following values: + * @arg @ref FL_GPIO_EXTI_LINE_16 + * @arg @ref FL_GPIO_EXTI_LINE_17 + * @arg @ref FL_GPIO_EXTI_LINE_18 + * @retval Returned value can be one of the following values: + * @arg @ref FL_GPIO_EXTI_TRIGGER_EDGE_RISING + * @arg @ref FL_GPIO_EXTI_TRIGGER_EDGE_FALLING + * @arg @ref FL_GPIO_EXTI_TRIGGER_EDGE_BOTH + * @arg @ref FL_GPIO_EXTI_TRIGGER_EDGE_DISABLE + */ +__STATIC_INLINE uint32_t FL_GPIO_GetTriggerEdge1(GPIO_COMMON_Type *GPIOx, uint32_t line) +{ + return (uint32_t)(READ_BIT(GPIOx->EXTIEDS1, + (((line>>16) * (line>>16)) * GPIO_EXTIEDS1)) / ((line>>16) * (line>>16))); +} + +/** + * @brief EXTI digital filter enable + * @rmtoll EXTIDF FL_GPIO_EnableDigitalFilter + * @param GPIOx GPIO Port + * @param line This parameter can be one of the following values: + * @arg @ref FL_GPIO_EXTI_LINE_0 + * @arg @ref FL_GPIO_EXTI_LINE_1 + * @arg @ref FL_GPIO_EXTI_LINE_2 + * @arg @ref FL_GPIO_EXTI_LINE_3 + * @arg @ref FL_GPIO_EXTI_LINE_4 + * @arg @ref FL_GPIO_EXTI_LINE_5 + * @arg @ref FL_GPIO_EXTI_LINE_6 + * @arg @ref FL_GPIO_EXTI_LINE_7 + * @arg @ref FL_GPIO_EXTI_LINE_8 + * @arg @ref FL_GPIO_EXTI_LINE_9 + * @arg @ref FL_GPIO_EXTI_LINE_10 + * @arg @ref FL_GPIO_EXTI_LINE_11 + * @arg @ref FL_GPIO_EXTI_LINE_12 + * @arg @ref FL_GPIO_EXTI_LINE_13 + * @arg @ref FL_GPIO_EXTI_LINE_14 + * @arg @ref FL_GPIO_EXTI_LINE_15 + * @arg @ref FL_GPIO_EXTI_LINE_16 + * @arg @ref FL_GPIO_EXTI_LINE_17 + * @arg @ref FL_GPIO_EXTI_LINE_18 + * @arg @ref FL_GPIO_EXTI_LINE_ALL + * @retval None + */ +__STATIC_INLINE void FL_GPIO_EnableDigitalFilter(GPIO_COMMON_Type *GPIOx, uint32_t line) +{ + SET_BIT(GPIOx->EXTIDF, ((line & 0x7ffff) << 0x0U)); +} + +/** + * @brief EXTI digital filter disable + * @rmtoll EXTIDF FL_GPIO_DisableDigitalFilter + * @param GPIOx GPIO Port + * @param line This parameter can be one of the following values: + * @arg @ref FL_GPIO_EXTI_LINE_0 + * @arg @ref FL_GPIO_EXTI_LINE_1 + * @arg @ref FL_GPIO_EXTI_LINE_2 + * @arg @ref FL_GPIO_EXTI_LINE_3 + * @arg @ref FL_GPIO_EXTI_LINE_4 + * @arg @ref FL_GPIO_EXTI_LINE_5 + * @arg @ref FL_GPIO_EXTI_LINE_6 + * @arg @ref FL_GPIO_EXTI_LINE_7 + * @arg @ref FL_GPIO_EXTI_LINE_8 + * @arg @ref FL_GPIO_EXTI_LINE_9 + * @arg @ref FL_GPIO_EXTI_LINE_10 + * @arg @ref FL_GPIO_EXTI_LINE_11 + * @arg @ref FL_GPIO_EXTI_LINE_12 + * @arg @ref FL_GPIO_EXTI_LINE_13 + * @arg @ref FL_GPIO_EXTI_LINE_14 + * @arg @ref FL_GPIO_EXTI_LINE_15 + * @arg @ref FL_GPIO_EXTI_LINE_16 + * @arg @ref FL_GPIO_EXTI_LINE_17 + * @arg @ref FL_GPIO_EXTI_LINE_18 + * @arg @ref FL_GPIO_EXTI_LINE_ALL + * @retval None + */ +__STATIC_INLINE void FL_GPIO_DisableDigitalFilter(GPIO_COMMON_Type *GPIOx, uint32_t line) +{ + CLEAR_BIT(GPIOx->EXTIDF, ((line & 0x7ffff) << 0x0U)); +} + +/** + * @brief Get EXTI digital filter enable status + * @rmtoll EXTIDF FL_GPIO_IsEnabledDigitalFilter + * @param GPIOx GPIO Port + * @param line This parameter can be one of the following values: + * @arg @ref FL_GPIO_EXTI_LINE_0 + * @arg @ref FL_GPIO_EXTI_LINE_1 + * @arg @ref FL_GPIO_EXTI_LINE_2 + * @arg @ref FL_GPIO_EXTI_LINE_3 + * @arg @ref FL_GPIO_EXTI_LINE_4 + * @arg @ref FL_GPIO_EXTI_LINE_5 + * @arg @ref FL_GPIO_EXTI_LINE_6 + * @arg @ref FL_GPIO_EXTI_LINE_7 + * @arg @ref FL_GPIO_EXTI_LINE_8 + * @arg @ref FL_GPIO_EXTI_LINE_9 + * @arg @ref FL_GPIO_EXTI_LINE_10 + * @arg @ref FL_GPIO_EXTI_LINE_11 + * @arg @ref FL_GPIO_EXTI_LINE_12 + * @arg @ref FL_GPIO_EXTI_LINE_13 + * @arg @ref FL_GPIO_EXTI_LINE_14 + * @arg @ref FL_GPIO_EXTI_LINE_15 + * @arg @ref FL_GPIO_EXTI_LINE_16 + * @arg @ref FL_GPIO_EXTI_LINE_17 + * @arg @ref FL_GPIO_EXTI_LINE_18 + * @arg @ref FL_GPIO_EXTI_LINE_ALL + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_GPIO_IsEnabledDigitalFilter(GPIO_COMMON_Type *GPIOx, uint32_t line) +{ + return (uint32_t)(READ_BIT(GPIOx->EXTIDF, ((line & 0x7ffff) << 0x0U)) == ((line & 0x7ffff) << 0x0U)); +} + +/** + * @brief Get external interrupt flag status + * @rmtoll EXTIISR FL_GPIO_IsActiveFlag_EXTI + * @param GPIOx GPIO Port + * @param line This parameter can be one of the following values: + * @arg @ref FL_GPIO_EXTI_LINE_0 + * @arg @ref FL_GPIO_EXTI_LINE_1 + * @arg @ref FL_GPIO_EXTI_LINE_2 + * @arg @ref FL_GPIO_EXTI_LINE_3 + * @arg @ref FL_GPIO_EXTI_LINE_4 + * @arg @ref FL_GPIO_EXTI_LINE_5 + * @arg @ref FL_GPIO_EXTI_LINE_6 + * @arg @ref FL_GPIO_EXTI_LINE_7 + * @arg @ref FL_GPIO_EXTI_LINE_8 + * @arg @ref FL_GPIO_EXTI_LINE_9 + * @arg @ref FL_GPIO_EXTI_LINE_10 + * @arg @ref FL_GPIO_EXTI_LINE_11 + * @arg @ref FL_GPIO_EXTI_LINE_12 + * @arg @ref FL_GPIO_EXTI_LINE_13 + * @arg @ref FL_GPIO_EXTI_LINE_14 + * @arg @ref FL_GPIO_EXTI_LINE_15 + * @arg @ref FL_GPIO_EXTI_LINE_16 + * @arg @ref FL_GPIO_EXTI_LINE_17 + * @arg @ref FL_GPIO_EXTI_LINE_18 + * @arg @ref FL_GPIO_EXTI_LINE_ALL + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_GPIO_IsActiveFlag_EXTI(GPIO_COMMON_Type *GPIOx, uint32_t line) +{ + return (uint32_t)(READ_BIT(GPIOx->EXTIISR, ((line & 0x7ffff) << 0x0U)) == ((line & 0x7ffff) << 0x0U)); +} + +/** + * @brief Clear external interrupt flag + * @rmtoll EXTIISR FL_GPIO_ClearFlag_EXTI + * @param GPIOx GPIO Port + * @param line This parameter can be one of the following values: + * @arg @ref FL_GPIO_EXTI_LINE_0 + * @arg @ref FL_GPIO_EXTI_LINE_1 + * @arg @ref FL_GPIO_EXTI_LINE_2 + * @arg @ref FL_GPIO_EXTI_LINE_3 + * @arg @ref FL_GPIO_EXTI_LINE_4 + * @arg @ref FL_GPIO_EXTI_LINE_5 + * @arg @ref FL_GPIO_EXTI_LINE_6 + * @arg @ref FL_GPIO_EXTI_LINE_7 + * @arg @ref FL_GPIO_EXTI_LINE_8 + * @arg @ref FL_GPIO_EXTI_LINE_9 + * @arg @ref FL_GPIO_EXTI_LINE_10 + * @arg @ref FL_GPIO_EXTI_LINE_11 + * @arg @ref FL_GPIO_EXTI_LINE_12 + * @arg @ref FL_GPIO_EXTI_LINE_13 + * @arg @ref FL_GPIO_EXTI_LINE_14 + * @arg @ref FL_GPIO_EXTI_LINE_15 + * @arg @ref FL_GPIO_EXTI_LINE_16 + * @arg @ref FL_GPIO_EXTI_LINE_17 + * @arg @ref FL_GPIO_EXTI_LINE_18 + * @arg @ref FL_GPIO_EXTI_LINE_ALL + * @retval None + */ +__STATIC_INLINE void FL_GPIO_ClearFlag_EXTI(GPIO_COMMON_Type *GPIOx, uint32_t line) +{ + WRITE_REG(GPIOx->EXTIISR, ((line & 0x7ffff) << 0x0U)); +} + +/** + * @brief Get EXTI input set status + * @rmtoll EXTIDI FL_GPIO_GetEXTILine + * @param GPIOx GPIO Port + * @param line This parameter can be one of the following values: + * @arg @ref FL_GPIO_EXTI_LINE_0 + * @arg @ref FL_GPIO_EXTI_LINE_1 + * @arg @ref FL_GPIO_EXTI_LINE_2 + * @arg @ref FL_GPIO_EXTI_LINE_3 + * @arg @ref FL_GPIO_EXTI_LINE_4 + * @arg @ref FL_GPIO_EXTI_LINE_5 + * @arg @ref FL_GPIO_EXTI_LINE_6 + * @arg @ref FL_GPIO_EXTI_LINE_7 + * @arg @ref FL_GPIO_EXTI_LINE_8 + * @arg @ref FL_GPIO_EXTI_LINE_9 + * @arg @ref FL_GPIO_EXTI_LINE_10 + * @arg @ref FL_GPIO_EXTI_LINE_11 + * @arg @ref FL_GPIO_EXTI_LINE_12 + * @arg @ref FL_GPIO_EXTI_LINE_13 + * @arg @ref FL_GPIO_EXTI_LINE_14 + * @arg @ref FL_GPIO_EXTI_LINE_15 + * @arg @ref FL_GPIO_EXTI_LINE_16 + * @arg @ref FL_GPIO_EXTI_LINE_17 + * @arg @ref FL_GPIO_EXTI_LINE_18 + * @arg @ref FL_GPIO_EXTI_LINE_ALL + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_GPIO_GetEXTILine(GPIO_COMMON_Type *GPIOx, uint32_t line) +{ + return (uint32_t)(READ_BIT(GPIOx->EXTIDI, ((line & 0x7ffff) << 0x0U)) == ((line & 0x7ffff) << 0x0U)); +} + +/** + * @brief Get EXTI input status + * @rmtoll EXTIDI FL_GPIO_ReadEXTILines + * @param GPIOx GPIO Port + * @retval EXTI data register value of port + */ +__STATIC_INLINE uint32_t FL_GPIO_ReadEXTILines(GPIO_COMMON_Type *GPIOx) +{ + return (uint32_t)(READ_BIT(GPIOx->EXTIDI, (0x7ffffU << 0U)) >> 0U); +} + +/** + * @brief Set FOUT0 frequency output + * @rmtoll FOUTSEL FOUT0 FL_GPIO_SetFOUT0 + * @param GPIOx GPIO Port + * @param select This parameter can be one of the following values: + * @arg @ref FL_GPIO_FOUT0_SELECT_XTLF + * @arg @ref FL_GPIO_FOUT0_SELECT_RCLP + * @arg @ref FL_GPIO_FOUT0_SELECT_RCHF_DIV64 + * @arg @ref FL_GPIO_FOUT0_SELECT_LSCLK + * @arg @ref FL_GPIO_FOUT0_SELECT_AHBCLK_DIV64 + * @arg @ref FL_GPIO_FOUT0_SELECT_RTCTM + * @arg @ref FL_GPIO_FOUT0_SELECT_PLLOUTPUT_DIV64 + * @arg @ref FL_GPIO_FOUT0_SELECT_RTCCLK64HZ + * @arg @ref FL_GPIO_FOUT0_SELECT_APBCLK_DIV64 + * @arg @ref FL_GPIO_FOUT0_SELECT_PLLOUTPUT + * @arg @ref FL_GPIO_FOUT0_SELECT_RCLF + * @arg @ref FL_GPIO_FOUT0_SELECT_RCHF + * @arg @ref FL_GPIO_FOUT0_SELECT_XTHF_DIV64 + * @arg @ref FL_GPIO_FOUT0_SELECT_COMP1O + * @arg @ref FL_GPIO_FOUT0_SELECT_CLK_8K + * @arg @ref FL_GPIO_FOUT0_SELECT_ADC_CLK + * @retval None + */ +__STATIC_INLINE void FL_GPIO_SetFOUT0(GPIO_COMMON_Type *GPIOx, uint32_t select) +{ + MODIFY_REG(GPIOx->FOUTSEL, GPIO_FOUTSEL_FOUT0_Msk, select); +} + +/** + * @brief Get FOUT0 frequency output + * @rmtoll FOUTSEL FOUT0 FL_GPIO_GetFOUT0 + * @param GPIOx GPIO Port + * @retval Returned value can be one of the following values: + * @arg @ref FL_GPIO_FOUT0_SELECT_XTLF + * @arg @ref FL_GPIO_FOUT0_SELECT_RCLP + * @arg @ref FL_GPIO_FOUT0_SELECT_RCHF_DIV64 + * @arg @ref FL_GPIO_FOUT0_SELECT_LSCLK + * @arg @ref FL_GPIO_FOUT0_SELECT_AHBCLK_DIV64 + * @arg @ref FL_GPIO_FOUT0_SELECT_RTCTM + * @arg @ref FL_GPIO_FOUT0_SELECT_PLLOUTPUT_DIV64 + * @arg @ref FL_GPIO_FOUT0_SELECT_RTCCLK64HZ + * @arg @ref FL_GPIO_FOUT0_SELECT_APBCLK_DIV64 + * @arg @ref FL_GPIO_FOUT0_SELECT_PLLOUTPUT + * @arg @ref FL_GPIO_FOUT0_SELECT_RCLF + * @arg @ref FL_GPIO_FOUT0_SELECT_RCHF + * @arg @ref FL_GPIO_FOUT0_SELECT_XTHF_DIV64 + * @arg @ref FL_GPIO_FOUT0_SELECT_COMP1O + * @arg @ref FL_GPIO_FOUT0_SELECT_CLK_8K + * @arg @ref FL_GPIO_FOUT0_SELECT_ADC_CLK + */ +__STATIC_INLINE uint32_t FL_GPIO_GetFOUT0(GPIO_COMMON_Type *GPIOx) +{ + return (uint32_t)(READ_BIT(GPIOx->FOUTSEL, GPIO_FOUTSEL_FOUT0_Msk)); +} + +/** + * @brief Set FOUT1 frequency output + * @rmtoll FOUTSEL FOUT1 FL_GPIO_SetFOUT1 + * @param GPIOx GPIO Port + * @param select This parameter can be one of the following values: + * @arg @ref FL_GPIO_FOUT1_SELECT_XTLF + * @arg @ref FL_GPIO_FOUT1_SELECT_RCLP + * @arg @ref FL_GPIO_FOUT1_SELECT_ADCCLK + * @arg @ref FL_GPIO_FOUT1_SELECT_LSCLK + * @arg @ref FL_GPIO_FOUT1_SELECT_EOC + * @arg @ref FL_GPIO_FOUT1_SELECT_RTCTM + * @arg @ref FL_GPIO_FOUT1_SELECT_PLLOUTPUT_DIV64 + * @arg @ref FL_GPIO_FOUT1_SELECT_EOCAL + * @arg @ref FL_GPIO_FOUT1_SELECT_APBCLK_DIV64 + * @arg @ref FL_GPIO_FOUT1_SELECT_ROSC_TDLV + * @arg @ref FL_GPIO_FOUT1_SELECT_RCLF + * @arg @ref FL_GPIO_FOUT1_SELECT_RCHF + * @arg @ref FL_GPIO_FOUT1_SELECT_XTHF_DIV64 + * @arg @ref FL_GPIO_FOUT1_SELECT_ADCCLK_DIV64 + * @arg @ref FL_GPIO_FOUT1_SELECT_CLK_8K + * @arg @ref FL_GPIO_FOUT1_SELECT_ROSC_TDHV + * @retval None + */ +__STATIC_INLINE void FL_GPIO_SetFOUT1(GPIO_COMMON_Type *GPIOx, uint32_t select) +{ + MODIFY_REG(GPIOx->FOUTSEL, GPIO_FOUTSEL_FOUT1_Msk, select); +} + +/** + * @brief Get FOUT1 frequency output + * @rmtoll FOUTSEL FOUT1 FL_GPIO_GetFOUT1 + * @param GPIOx GPIO Port + * @retval Returned value can be one of the following values: + * @arg @ref FL_GPIO_FOUT1_SELECT_XTLF + * @arg @ref FL_GPIO_FOUT1_SELECT_RCLP + * @arg @ref FL_GPIO_FOUT1_SELECT_ADCCLK + * @arg @ref FL_GPIO_FOUT1_SELECT_LSCLK + * @arg @ref FL_GPIO_FOUT1_SELECT_EOC + * @arg @ref FL_GPIO_FOUT1_SELECT_RTCTM + * @arg @ref FL_GPIO_FOUT1_SELECT_PLLOUTPUT_DIV64 + * @arg @ref FL_GPIO_FOUT1_SELECT_EOCAL + * @arg @ref FL_GPIO_FOUT1_SELECT_APBCLK_DIV64 + * @arg @ref FL_GPIO_FOUT1_SELECT_ROSC_TDLV + * @arg @ref FL_GPIO_FOUT1_SELECT_RCLF + * @arg @ref FL_GPIO_FOUT1_SELECT_RCHF + * @arg @ref FL_GPIO_FOUT1_SELECT_XTHF_DIV64 + * @arg @ref FL_GPIO_FOUT1_SELECT_ADCCLK_DIV64 + * @arg @ref FL_GPIO_FOUT1_SELECT_CLK_8K + * @arg @ref FL_GPIO_FOUT1_SELECT_ROSC_TDHV + */ +__STATIC_INLINE uint32_t FL_GPIO_GetFOUT1(GPIO_COMMON_Type *GPIOx) +{ + return (uint32_t)(READ_BIT(GPIOx->FOUTSEL, GPIO_FOUTSEL_FOUT1_Msk)); +} + +/** + * @brief Set EXTI0 interrupt input + * @rmtoll EXTISEL0 EXTI0 FL_GPIO_SetExtiLine0 + * @param GPIOx GPIO Port + * @param EXTIPin This parameter can be one of the following values: + * @arg @ref FL_GPIO_EXTI_LINE_0_PA0 + * @arg @ref FL_GPIO_EXTI_LINE_0_PA1 + * @arg @ref FL_GPIO_EXTI_LINE_0_PA2 + * @arg @ref FL_GPIO_EXTI_LINE_0_PA3 + * @retval None + */ +__STATIC_INLINE void FL_GPIO_SetExtiLine0(GPIO_COMMON_Type *GPIOx, uint32_t EXTIPin) +{ + MODIFY_REG(GPIOx->EXTISEL0, GPIO_EXTISEL0_EXTI0_Msk, EXTIPin); +} + +/** + * @brief Get EXTI0 interrupt input + * @rmtoll EXTISEL0 EXTI0 FL_GPIO_GetExtiLine0 + * @param GPIOx GPIO Port + * @retval Returned value can be one of the following values: + */ +__STATIC_INLINE uint32_t FL_GPIO_GetExtiLine0(GPIO_COMMON_Type *GPIOx) +{ + return (uint32_t)(READ_BIT(GPIOx->EXTISEL0, GPIO_EXTISEL0_EXTI0_Msk)); +} + +/** + * @brief Set EXTI1 interrupt input + * @rmtoll EXTISEL0 EXTI1 FL_GPIO_SetExtiLine1 + * @param GPIOx GPIO Port + * @param EXTIPin This parameter can be one of the following values: + * @arg @ref FL_GPIO_EXTI_LINE_1_PA4 + * @arg @ref FL_GPIO_EXTI_LINE_1_PA5 + * @arg @ref FL_GPIO_EXTI_LINE_1_PA6 + * @arg @ref FL_GPIO_EXTI_LINE_1_PA7 + * @retval None + */ +__STATIC_INLINE void FL_GPIO_SetExtiLine1(GPIO_COMMON_Type *GPIOx, uint32_t EXTIPin) +{ + MODIFY_REG(GPIOx->EXTISEL0, GPIO_EXTISEL0_EXTI1_Msk, EXTIPin); +} + +/** + * @brief Get EXTI1 interrupt input + * @rmtoll EXTISEL0 EXTI1 FL_GPIO_GetExtiLine1 + * @param GPIOx GPIO Port + * @retval Returned value can be one of the following values: + */ +__STATIC_INLINE uint32_t FL_GPIO_GetExtiLine1(GPIO_COMMON_Type *GPIOx) +{ + return (uint32_t)(READ_BIT(GPIOx->EXTISEL0, GPIO_EXTISEL0_EXTI1_Msk)); +} + +/** + * @brief Set EXTI2 interrupt input + * @rmtoll EXTISEL0 EXTI2 FL_GPIO_SetExtiLine2 + * @param GPIOx GPIO Port + * @param EXTIPin This parameter can be one of the following values: + * @arg @ref FL_GPIO_EXTI_LINE_2_PA8 + * @arg @ref FL_GPIO_EXTI_LINE_2_PA9 + * @arg @ref FL_GPIO_EXTI_LINE_2_PA10 + * @arg @ref FL_GPIO_EXTI_LINE_2_PA11 + * @retval None + */ +__STATIC_INLINE void FL_GPIO_SetExtiLine2(GPIO_COMMON_Type *GPIOx, uint32_t EXTIPin) +{ + MODIFY_REG(GPIOx->EXTISEL0, GPIO_EXTISEL0_EXTI2_Msk, EXTIPin); +} + +/** + * @brief Get EXTI2 interrupt input + * @rmtoll EXTISEL0 EXTI2 FL_GPIO_GetExtiLine2 + * @param GPIOx GPIO Port + * @retval Returned value can be one of the following values: + */ +__STATIC_INLINE uint32_t FL_GPIO_GetExtiLine2(GPIO_COMMON_Type *GPIOx) +{ + return (uint32_t)(READ_BIT(GPIOx->EXTISEL0, GPIO_EXTISEL0_EXTI2_Msk)); +} + +/** + * @brief Set EXTI3 interrupt input + * @rmtoll EXTISEL0 EXTI3 FL_GPIO_SetExtiLine3 + * @param GPIOx GPIO Port + * @param EXTIPin This parameter can be one of the following values: + * @arg @ref FL_GPIO_EXTI_LINE_3_PA12 + * @arg @ref FL_GPIO_EXTI_LINE_3_PA13 + * @arg @ref FL_GPIO_EXTI_LINE_3_PA14 + * @arg @ref FL_GPIO_EXTI_LINE_3_PA15 + * @retval None + */ +__STATIC_INLINE void FL_GPIO_SetExtiLine3(GPIO_COMMON_Type *GPIOx, uint32_t EXTIPin) +{ + MODIFY_REG(GPIOx->EXTISEL0, GPIO_EXTISEL0_EXTI3_Msk, EXTIPin); +} + +/** + * @brief Get EXTI3 interrupt input + * @rmtoll EXTISEL0 EXTI3 FL_GPIO_GetExtiLine3 + * @param GPIOx GPIO Port + * @retval Returned value can be one of the following values: + */ +__STATIC_INLINE uint32_t FL_GPIO_GetExtiLine3(GPIO_COMMON_Type *GPIOx) +{ + return (uint32_t)(READ_BIT(GPIOx->EXTISEL0, GPIO_EXTISEL0_EXTI3_Msk)); +} + +/** + * @brief Set EXTI4 interrupt input + * @rmtoll EXTISEL0 EXTI4 FL_GPIO_SetExtiLine4 + * @param GPIOx GPIO Port + * @param EXTIPin This parameter can be one of the following values: + * @arg @ref FL_GPIO_EXTI_LINE_4_PB0 + * @arg @ref FL_GPIO_EXTI_LINE_4_PB1 + * @arg @ref FL_GPIO_EXTI_LINE_4_PB2 + * @arg @ref FL_GPIO_EXTI_LINE_4_PB3 + * @retval None + */ +__STATIC_INLINE void FL_GPIO_SetExtiLine4(GPIO_COMMON_Type *GPIOx, uint32_t EXTIPin) +{ + MODIFY_REG(GPIOx->EXTISEL0, GPIO_EXTISEL0_EXTI4_Msk, EXTIPin); +} + +/** + * @brief Get EXTI4 interrupt input + * @rmtoll EXTISEL0 EXTI4 FL_GPIO_GetExtiLine4 + * @param GPIOx GPIO Port + * @retval Returned value can be one of the following values: + */ +__STATIC_INLINE uint32_t FL_GPIO_GetExtiLine4(GPIO_COMMON_Type *GPIOx) +{ + return (uint32_t)(READ_BIT(GPIOx->EXTISEL0, GPIO_EXTISEL0_EXTI4_Msk)); +} + +/** + * @brief Set EXTI5 interrupt input + * @rmtoll EXTISEL0 EXTI5 FL_GPIO_SetExtiLine5 + * @param GPIOx GPIO Port + * @param EXTIPin This parameter can be one of the following values: + * @arg @ref FL_GPIO_EXTI_LINE_5_PB4 + * @arg @ref FL_GPIO_EXTI_LINE_5_PB5 + * @arg @ref FL_GPIO_EXTI_LINE_5_PB6 + * @arg @ref FL_GPIO_EXTI_LINE_5_PB7 + * @retval None + */ +__STATIC_INLINE void FL_GPIO_SetExtiLine5(GPIO_COMMON_Type *GPIOx, uint32_t EXTIPin) +{ + MODIFY_REG(GPIOx->EXTISEL0, GPIO_EXTISEL0_EXTI5_Msk, EXTIPin); +} + +/** + * @brief Get EXTI5 interrupt input + * @rmtoll EXTISEL0 EXTI5 FL_GPIO_GetExtiLine5 + * @param GPIOx GPIO Port + * @retval Returned value can be one of the following values: + */ +__STATIC_INLINE uint32_t FL_GPIO_GetExtiLine5(GPIO_COMMON_Type *GPIOx) +{ + return (uint32_t)(READ_BIT(GPIOx->EXTISEL0, GPIO_EXTISEL0_EXTI5_Msk)); +} + +/** + * @brief Set EXTI6 interrupt input + * @rmtoll EXTISEL0 EXTI6 FL_GPIO_SetExtiLine6 + * @param GPIOx GPIO Port + * @param EXTIPin This parameter can be one of the following values: + * @arg @ref FL_GPIO_EXTI_LINE_6_PB8 + * @arg @ref FL_GPIO_EXTI_LINE_6_PB9 + * @arg @ref FL_GPIO_EXTI_LINE_6_PB10 + * @arg @ref FL_GPIO_EXTI_LINE_6_PB11 + * @retval None + */ +__STATIC_INLINE void FL_GPIO_SetExtiLine6(GPIO_COMMON_Type *GPIOx, uint32_t EXTIPin) +{ + MODIFY_REG(GPIOx->EXTISEL0, GPIO_EXTISEL0_EXTI6_Msk, EXTIPin); +} + +/** + * @brief Get EXTI6 interrupt input + * @rmtoll EXTISEL0 EXTI6 FL_GPIO_GetExtiLine6 + * @param GPIOx GPIO Port + * @retval Returned value can be one of the following values: + */ +__STATIC_INLINE uint32_t FL_GPIO_GetExtiLine6(GPIO_COMMON_Type *GPIOx) +{ + return (uint32_t)(READ_BIT(GPIOx->EXTISEL0, GPIO_EXTISEL0_EXTI6_Msk)); +} + +/** + * @brief Set EXTI7 interrupt input + * @rmtoll EXTISEL0 EXTI7 FL_GPIO_SetExtiLine7 + * @param GPIOx GPIO Port + * @param EXTIPin This parameter can be one of the following values: + * @arg @ref FL_GPIO_EXTI_LINE_7_PB12 + * @arg @ref FL_GPIO_EXTI_LINE_7_PB13 + * @arg @ref FL_GPIO_EXTI_LINE_7_PB14 + * @arg @ref FL_GPIO_EXTI_LINE_7_PB15 + * @retval None + */ +__STATIC_INLINE void FL_GPIO_SetExtiLine7(GPIO_COMMON_Type *GPIOx, uint32_t EXTIPin) +{ + MODIFY_REG(GPIOx->EXTISEL0, GPIO_EXTISEL0_EXTI7_Msk, EXTIPin); +} + +/** + * @brief Get EXTI7 interrupt input + * @rmtoll EXTISEL0 EXTI7 FL_GPIO_GetExtiLine7 + * @param GPIOx GPIO Port + * @retval Returned value can be one of the following values: + */ +__STATIC_INLINE uint32_t FL_GPIO_GetExtiLine7(GPIO_COMMON_Type *GPIOx) +{ + return (uint32_t)(READ_BIT(GPIOx->EXTISEL0, GPIO_EXTISEL0_EXTI7_Msk)); +} + +/** + * @brief Set EXTI8 interrupt input + * @rmtoll EXTISEL0 EXTI8 FL_GPIO_SetExtiLine8 + * @param GPIOx GPIO Port + * @param EXTIPin This parameter can be one of the following values: + * @arg @ref FL_GPIO_EXTI_LINE_8_PC0 + * @arg @ref FL_GPIO_EXTI_LINE_8_PC1 + * @arg @ref FL_GPIO_EXTI_LINE_8_PC2 + * @arg @ref FL_GPIO_EXTI_LINE_8_PC3 + * @retval None + */ +__STATIC_INLINE void FL_GPIO_SetExtiLine8(GPIO_COMMON_Type *GPIOx, uint32_t EXTIPin) +{ + MODIFY_REG(GPIOx->EXTISEL0, GPIO_EXTISEL0_EXTI8_Msk, EXTIPin); +} + +/** + * @brief Get EXTI8 interrupt input + * @rmtoll EXTISEL0 EXTI8 FL_GPIO_GetExtiLine8 + * @param GPIOx GPIO Port + * @retval Returned value can be one of the following values: + */ +__STATIC_INLINE uint32_t FL_GPIO_GetExtiLine8(GPIO_COMMON_Type *GPIOx) +{ + return (uint32_t)(READ_BIT(GPIOx->EXTISEL0, GPIO_EXTISEL0_EXTI8_Msk)); +} + +/** + * @brief Set EXTI9 interrupt input + * @rmtoll EXTISEL0 EXTI9 FL_GPIO_SetExtiLine9 + * @param GPIOx GPIO Port + * @param EXTIPin This parameter can be one of the following values: + * @arg @ref FL_GPIO_EXTI_LINE_9_PC4 + * @arg @ref FL_GPIO_EXTI_LINE_9_PC5 + * @arg @ref FL_GPIO_EXTI_LINE_9_PC6 + * @arg @ref FL_GPIO_EXTI_LINE_9_PC7 + * @retval None + */ +__STATIC_INLINE void FL_GPIO_SetExtiLine9(GPIO_COMMON_Type *GPIOx, uint32_t EXTIPin) +{ + MODIFY_REG(GPIOx->EXTISEL0, GPIO_EXTISEL0_EXTI9_Msk, EXTIPin); +} + +/** + * @brief Get EXTI9 interrupt input + * @rmtoll EXTISEL0 EXTI9 FL_GPIO_GetExtiLine9 + * @param GPIOx GPIO Port + * @retval Returned value can be one of the following values: + */ +__STATIC_INLINE uint32_t FL_GPIO_GetExtiLine9(GPIO_COMMON_Type *GPIOx) +{ + return (uint32_t)(READ_BIT(GPIOx->EXTISEL0, GPIO_EXTISEL0_EXTI9_Msk)); +} + +/** + * @brief Set EXTI10 interrupt input + * @rmtoll EXTISEL0 EXTI10 FL_GPIO_SetExtiLine10 + * @param GPIOx GPIO Port + * @param EXTIPin This parameter can be one of the following values: + * @arg @ref FL_GPIO_EXTI_LINE_10_PC8 + * @arg @ref FL_GPIO_EXTI_LINE_10_PC9 + * @arg @ref FL_GPIO_EXTI_LINE_10_PC10 + * @arg @ref FL_GPIO_EXTI_LINE_10_PC11 + * @retval None + */ +__STATIC_INLINE void FL_GPIO_SetExtiLine10(GPIO_COMMON_Type *GPIOx, uint32_t EXTIPin) +{ + MODIFY_REG(GPIOx->EXTISEL0, GPIO_EXTISEL0_EXTI10_Msk, EXTIPin); +} + +/** + * @brief Get EXTI10 interrupt input + * @rmtoll EXTISEL0 EXTI10 FL_GPIO_GetExtiLine10 + * @param GPIOx GPIO Port + * @retval Returned value can be one of the following values: + */ +__STATIC_INLINE uint32_t FL_GPIO_GetExtiLine10(GPIO_COMMON_Type *GPIOx) +{ + return (uint32_t)(READ_BIT(GPIOx->EXTISEL0, GPIO_EXTISEL0_EXTI10_Msk)); +} + +/** + * @brief Set EXTI11 interrupt input + * @rmtoll EXTISEL0 EXTI11 FL_GPIO_SetExtiLine11 + * @param GPIOx GPIO Port + * @param EXTIPin This parameter can be one of the following values: + * @arg @ref FL_GPIO_EXTI_LINE_11_PC12 + * @arg @ref FL_GPIO_EXTI_LINE_11_PC13 + * @arg @ref FL_GPIO_EXTI_LINE_11_PC14 + * @arg @ref FL_GPIO_EXTI_LINE_11_PC15 + * @retval None + */ +__STATIC_INLINE void FL_GPIO_SetExtiLine11(GPIO_COMMON_Type *GPIOx, uint32_t EXTIPin) +{ + MODIFY_REG(GPIOx->EXTISEL0, GPIO_EXTISEL0_EXTI11_Msk, EXTIPin); +} + +/** + * @brief Get EXTI11 interrupt input + * @rmtoll EXTISEL0 EXTI11 FL_GPIO_GetExtiLine11 + * @param GPIOx GPIO Port + * @retval Returned value can be one of the following values: + */ +__STATIC_INLINE uint32_t FL_GPIO_GetExtiLine11(GPIO_COMMON_Type *GPIOx) +{ + return (uint32_t)(READ_BIT(GPIOx->EXTISEL0, GPIO_EXTISEL0_EXTI11_Msk)); +} + +/** + * @brief Set EXTI12 interrupt input + * @rmtoll EXTISEL0 EXTI12 FL_GPIO_SetExtiLine12 + * @param GPIOx GPIO Port + * @param EXTIPin This parameter can be one of the following values: + * @arg @ref FL_GPIO_EXTI_LINE_12_PD0 + * @arg @ref FL_GPIO_EXTI_LINE_12_PD1 + * @arg @ref FL_GPIO_EXTI_LINE_12_PD2 + * @arg @ref FL_GPIO_EXTI_LINE_12_PD3 + * @retval None + */ +__STATIC_INLINE void FL_GPIO_SetExtiLine12(GPIO_COMMON_Type *GPIOx, uint32_t EXTIPin) +{ + MODIFY_REG(GPIOx->EXTISEL0, GPIO_EXTISEL0_EXTI12_Msk, EXTIPin); +} + +/** + * @brief Get EXTI12 interrupt input + * @rmtoll EXTISEL0 EXTI12 FL_GPIO_GetExtiLine12 + * @param GPIOx GPIO Port + * @retval Returned value can be one of the following values: + */ +__STATIC_INLINE uint32_t FL_GPIO_GetExtiLine12(GPIO_COMMON_Type *GPIOx) +{ + return (uint32_t)(READ_BIT(GPIOx->EXTISEL0, GPIO_EXTISEL0_EXTI12_Msk)); +} + +/** + * @brief Set EXTI13 interrupt input + * @rmtoll EXTISEL0 EXTI13 FL_GPIO_SetExtiLine13 + * @param GPIOx GPIO Port + * @param EXTIPin This parameter can be one of the following values: + * @arg @ref FL_GPIO_EXTI_LINE_13_PD4 + * @arg @ref FL_GPIO_EXTI_LINE_13_PD5 + * @arg @ref FL_GPIO_EXTI_LINE_13_PD6 + * @arg @ref FL_GPIO_EXTI_LINE_13_PD7 + * @retval None + */ +__STATIC_INLINE void FL_GPIO_SetExtiLine13(GPIO_COMMON_Type *GPIOx, uint32_t EXTIPin) +{ + MODIFY_REG(GPIOx->EXTISEL0, GPIO_EXTISEL0_EXTI13_Msk, EXTIPin); +} + +/** + * @brief Get EXTI13 interrupt input + * @rmtoll EXTISEL0 EXTI13 FL_GPIO_GetExtiLine13 + * @param GPIOx GPIO Port + * @retval Returned value can be one of the following values: + */ +__STATIC_INLINE uint32_t FL_GPIO_GetExtiLine13(GPIO_COMMON_Type *GPIOx) +{ + return (uint32_t)(READ_BIT(GPIOx->EXTISEL0, GPIO_EXTISEL0_EXTI13_Msk)); +} + +/** + * @brief Set EXTI14 interrupt input + * @rmtoll EXTISEL0 EXTI14 FL_GPIO_SetExtiLine14 + * @param GPIOx GPIO Port + * @param EXTIPin This parameter can be one of the following values: + * @arg @ref FL_GPIO_EXTI_LINE_14_PD8 + * @retval None + */ +__STATIC_INLINE void FL_GPIO_SetExtiLine14(GPIO_COMMON_Type *GPIOx, uint32_t EXTIPin) +{ + MODIFY_REG(GPIOx->EXTISEL0, GPIO_EXTISEL0_EXTI14_Msk, EXTIPin); +} + +/** + * @brief Get EXTI14 interrupt input + * @rmtoll EXTISEL0 EXTI14 FL_GPIO_GetExtiLine14 + * @param GPIOx GPIO Port + * @retval Returned value can be one of the following values: + */ +__STATIC_INLINE uint32_t FL_GPIO_GetExtiLine14(GPIO_COMMON_Type *GPIOx) +{ + return (uint32_t)(READ_BIT(GPIOx->EXTISEL0, GPIO_EXTISEL0_EXTI14_Msk)); +} + +/** + * @brief Set EXTI15 interrupt input + * @rmtoll EXTISEL0 EXTI15 FL_GPIO_SetExtiLine15 + * @param GPIOx GPIO Port + * @param EXTIPin This parameter can be one of the following values: + * @arg @ref FL_GPIO_EXTI_LINE_14_PD9 + * @arg @ref FL_GPIO_EXTI_LINE_14_PD10 + * @arg @ref FL_GPIO_EXTI_LINE_14_PD11 + * @arg @ref FL_GPIO_EXTI_LINE_15_PD12 + * @retval None + */ +__STATIC_INLINE void FL_GPIO_SetExtiLine15(GPIO_COMMON_Type *GPIOx, uint32_t EXTIPin) +{ + MODIFY_REG(GPIOx->EXTISEL0, GPIO_EXTISEL0_EXTI15_Msk, EXTIPin); +} + +/** + * @brief Get EXTI15 interrupt input + * @rmtoll EXTISEL0 EXTI15 FL_GPIO_GetExtiLine15 + * @param GPIOx GPIO Port + * @retval Returned value can be one of the following values: + */ +__STATIC_INLINE uint32_t FL_GPIO_GetExtiLine15(GPIO_COMMON_Type *GPIOx) +{ + return (uint32_t)(READ_BIT(GPIOx->EXTISEL0, GPIO_EXTISEL0_EXTI15_Msk)); +} + +/** + * @brief Set EXTI16 interrupt input + * @rmtoll EXTISEL1 EXTI16 FL_GPIO_SetExtiLine16 + * @param GPIOx GPIO Port + * @param EXTIPin This parameter can be one of the following values: + * @arg @ref FL_GPIO_EXTI_LINE_16_PE0 + * @arg @ref FL_GPIO_EXTI_LINE_16_PE1 + * @arg @ref FL_GPIO_EXTI_LINE_16_PE2 + * @arg @ref FL_GPIO_EXTI_LINE_16_PE3 + * @retval None + */ +__STATIC_INLINE void FL_GPIO_SetExtiLine16(GPIO_COMMON_Type *GPIOx, uint32_t EXTIPin) +{ + MODIFY_REG(GPIOx->EXTISEL1, GPIO_EXTISEL1_EXTI16_Msk, EXTIPin); +} + +/** + * @brief Get EXTI16 interrupt input + * @rmtoll EXTISEL1 EXTI16 FL_GPIO_GetExtiLine16 + * @param GPIOx GPIO Port + * @retval Returned value can be one of the following values: + */ +__STATIC_INLINE uint32_t FL_GPIO_GetExtiLine16(GPIO_COMMON_Type *GPIOx) +{ + return (uint32_t)(READ_BIT(GPIOx->EXTISEL1, GPIO_EXTISEL1_EXTI16_Msk)); +} + +/** + * @brief Set EXTI17 interrupt input + * @rmtoll EXTISEL1 EXTI17 FL_GPIO_SetExtiLine17 + * @param GPIOx GPIO Port + * @param EXTIPin This parameter can be one of the following values: + * @arg @ref FL_GPIO_EXTI_LINE_17_PE4 + * @arg @ref FL_GPIO_EXTI_LINE_17_PE5 + * @arg @ref FL_GPIO_EXTI_LINE_17_PE6 + * @arg @ref FL_GPIO_EXTI_LINE_17_PE7 + * @retval None + */ +__STATIC_INLINE void FL_GPIO_SetExtiLine17(GPIO_COMMON_Type *GPIOx, uint32_t EXTIPin) +{ + MODIFY_REG(GPIOx->EXTISEL1, GPIO_EXTISEL1_EXTI17_Msk, EXTIPin); +} + +/** + * @brief Get EXTI17 interrupt input + * @rmtoll EXTISEL1 EXTI17 FL_GPIO_GetExtiLine17 + * @param GPIOx GPIO Port + * @retval Returned value can be one of the following values: + */ +__STATIC_INLINE uint32_t FL_GPIO_GetExtiLine17(GPIO_COMMON_Type *GPIOx) +{ + return (uint32_t)(READ_BIT(GPIOx->EXTISEL1, GPIO_EXTISEL1_EXTI17_Msk)); +} + +/** + * @brief Set EXTI18 interrupt input + * @rmtoll EXTISEL1 EXTI18 FL_GPIO_SetExtiLine18 + * @param GPIOx GPIO Port + * @param EXTIPin This parameter can be one of the following values: + * @arg @ref FL_GPIO_EXTI_LINE_18_PE8 + * @arg @ref FL_GPIO_EXTI_LINE_18_PE9 + * @retval None + */ +__STATIC_INLINE void FL_GPIO_SetExtiLine18(GPIO_COMMON_Type *GPIOx, uint32_t EXTIPin) +{ + MODIFY_REG(GPIOx->EXTISEL1, GPIO_EXTISEL1_EXTI18_Msk, EXTIPin); +} + +/** + * @brief Get EXTI18 interrupt input + * @rmtoll EXTISEL1 EXTI18 FL_GPIO_GetExtiLine18 + * @param GPIOx GPIO Port + * @retval Returned value can be one of the following values: + */ +__STATIC_INLINE uint32_t FL_GPIO_GetExtiLine18(GPIO_COMMON_Type *GPIOx) +{ + return (uint32_t)(READ_BIT(GPIOx->EXTISEL1, GPIO_EXTISEL1_EXTI18_Msk)); +} + +/** + * @brief Get WKUP enable status + * @rmtoll PINWKEN EN FL_GPIO_IsEnabledWakeup + * @param GPIOx GPIO Port + * @param wakeup This parameter can be one of the following values: + * @arg @ref FL_GPIO_WAKEUP_0 + * @arg @ref FL_GPIO_WAKEUP_1 + * @arg @ref FL_GPIO_WAKEUP_2 + * @arg @ref FL_GPIO_WAKEUP_3 + * @arg @ref FL_GPIO_WAKEUP_4 + * @arg @ref FL_GPIO_WAKEUP_5 + * @arg @ref FL_GPIO_WAKEUP_6 + * @arg @ref FL_GPIO_WAKEUP_7 + * @arg @ref FL_GPIO_WAKEUP_8 + * @arg @ref FL_GPIO_WAKEUP_9 + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_GPIO_IsEnabledWakeup(GPIO_COMMON_Type *GPIOx, uint32_t wakeup) +{ + return (uint32_t)(READ_BIT(GPIOx->PINWKEN, ((wakeup & 0x3ff) << 0x0U)) == ((wakeup & 0x3ff) << 0x0U)); +} + +/** + * @brief WKUP enable + * @rmtoll PINWKEN EN FL_GPIO_EnableWakeup + * @param GPIOx GPIO Port + * @param wakeup This parameter can be one of the following values: + * @arg @ref FL_GPIO_WAKEUP_0 + * @arg @ref FL_GPIO_WAKEUP_1 + * @arg @ref FL_GPIO_WAKEUP_2 + * @arg @ref FL_GPIO_WAKEUP_3 + * @arg @ref FL_GPIO_WAKEUP_4 + * @arg @ref FL_GPIO_WAKEUP_5 + * @arg @ref FL_GPIO_WAKEUP_6 + * @arg @ref FL_GPIO_WAKEUP_7 + * @arg @ref FL_GPIO_WAKEUP_8 + * @arg @ref FL_GPIO_WAKEUP_9 + * @retval None + */ +__STATIC_INLINE void FL_GPIO_EnableWakeup(GPIO_COMMON_Type *GPIOx, uint32_t wakeup) +{ + SET_BIT(GPIOx->PINWKEN, ((wakeup & 0x3ff) << 0x0U)); +} + +/** + * @brief WKUP disable + * @rmtoll PINWKEN EN FL_GPIO_DisableWakeup + * @param GPIOx GPIO Port + * @param wakeup This parameter can be one of the following values: + * @arg @ref FL_GPIO_WAKEUP_0 + * @arg @ref FL_GPIO_WAKEUP_1 + * @arg @ref FL_GPIO_WAKEUP_2 + * @arg @ref FL_GPIO_WAKEUP_3 + * @arg @ref FL_GPIO_WAKEUP_4 + * @arg @ref FL_GPIO_WAKEUP_5 + * @arg @ref FL_GPIO_WAKEUP_6 + * @arg @ref FL_GPIO_WAKEUP_7 + * @arg @ref FL_GPIO_WAKEUP_8 + * @arg @ref FL_GPIO_WAKEUP_9 + * @retval None + */ +__STATIC_INLINE void FL_GPIO_DisableWakeup(GPIO_COMMON_Type *GPIOx, uint32_t wakeup) +{ + CLEAR_BIT(GPIOx->PINWKEN, ((wakeup & 0x3ff) << 0x0U)); +} + +/** + * @brief Get WKUP interrupt entry + * @rmtoll PINWKEN WKISEL FL_GPIO_GetWakeupInterruptEntry + * @param GPIOx GPIO Port + * @retval Returned value can be one of the following values: + * @arg @ref FL_GPIO_WAKEUP_INT_ENTRY_NMI + * @arg @ref FL_GPIO_WAKEUP_INT_ENTRY_38 + */ +__STATIC_INLINE uint32_t FL_GPIO_GetWakeupInterruptEntry(GPIO_COMMON_Type *GPIOx) +{ + return (uint32_t)(READ_BIT(GPIOx->PINWKEN, GPIO_PINWKEN_WKISEL_Msk)); +} + +/** + * @brief Set wkup interrupt entry + * @rmtoll PINWKEN WKISEL FL_GPIO_SetWakeupInterruptEntry + * @param GPIOx GPIO Port + * @param wakeup This parameter can be one of the following values: + * @arg @ref FL_GPIO_WAKEUP_INT_ENTRY_NMI + * @arg @ref FL_GPIO_WAKEUP_INT_ENTRY_38 + * @retval None + */ +__STATIC_INLINE void FL_GPIO_SetWakeupInterruptEntry(GPIO_COMMON_Type *GPIOx, uint32_t wakeup) +{ + MODIFY_REG(GPIOx->PINWKEN, GPIO_PINWKEN_WKISEL_Msk, wakeup); +} + +/** + * @brief Set WKUP edge polarity + * @rmtoll PINWKEN SEL FL_GPIO_SetWakeupEdge + * @param GPIOx GPIO Port + * @param wakeup This parameter can be one of the following values: + * @arg @ref FL_GPIO_WAKEUP_0 + * @arg @ref FL_GPIO_WAKEUP_1 + * @arg @ref FL_GPIO_WAKEUP_2 + * @arg @ref FL_GPIO_WAKEUP_3 + * @arg @ref FL_GPIO_WAKEUP_4 + * @arg @ref FL_GPIO_WAKEUP_5 + * @arg @ref FL_GPIO_WAKEUP_6 + * @arg @ref FL_GPIO_WAKEUP_7 + * @arg @ref FL_GPIO_WAKEUP_8 + * @arg @ref FL_GPIO_WAKEUP_9 + * @param mode This parameter can be one of the following values: + * @arg @ref FL_GPIO_WAKEUP_TRIGGER_RISING + * @arg @ref FL_GPIO_WAKEUP_TRIGGER_FALLING + * @arg @ref FL_GPIO_WAKEUP_TRIGGER_BOTH + * @retval None + */ +__STATIC_INLINE void FL_GPIO_SetWakeupEdge(GPIO_COMMON_Type *GPIOx, uint32_t wakeup, uint32_t mode) +{ + MODIFY_REG(GPIOx->PINWKEN, ((wakeup * wakeup) * GPIO_PINWKEN_SEL), ((wakeup * wakeup) * mode)); +} + +/** + * @brief Get WKUP edge polarity + * @rmtoll PINWKEN SEL FL_GPIO_GetWakeupEdge + * @param GPIOx GPIO Port + * @param wakeup This parameter can be one of the following values: + * @arg @ref FL_GPIO_WAKEUP_0 + * @arg @ref FL_GPIO_WAKEUP_1 + * @arg @ref FL_GPIO_WAKEUP_2 + * @arg @ref FL_GPIO_WAKEUP_3 + * @arg @ref FL_GPIO_WAKEUP_4 + * @arg @ref FL_GPIO_WAKEUP_5 + * @arg @ref FL_GPIO_WAKEUP_6 + * @arg @ref FL_GPIO_WAKEUP_7 + * @arg @ref FL_GPIO_WAKEUP_8 + * @arg @ref FL_GPIO_WAKEUP_9 + * @retval Returned value can be one of the following values: + * @arg @ref FL_GPIO_WAKEUP_TRIGGER_RISING + * @arg @ref FL_GPIO_WAKEUP_TRIGGER_FALLING + * @arg @ref FL_GPIO_WAKEUP_TRIGGER_BOTH + */ +__STATIC_INLINE uint32_t FL_GPIO_GetWakeupEdge(GPIO_COMMON_Type *GPIOx, uint32_t wakeup) +{ + return (uint32_t)(READ_BIT(GPIOx->PINWKEN, ((wakeup * wakeup) * GPIO_PINWKEN_SEL)) / (wakeup * wakeup)); +} + +/** + * @} + */ + +/** @defgroup GPIO_FL_EF_Init Initialization and de-initialization functions + * @{ + */ +FL_ErrorStatus FL_GPIO_Init(GPIO_Type *GPIOx, FL_GPIO_InitTypeDef *initStruct); +FL_ErrorStatus FL_GPIO_DeInit(GPIO_Type *GPIOx, uint32_t pin); +void FL_GPIO_StructInit(FL_GPIO_InitTypeDef *initStruct); + +FL_ErrorStatus FL_WKUP_Init(FL_WKUP_InitTypeDef *initStruct, uint32_t wakeup); +FL_ErrorStatus FL_WKUP_DeInit(uint32_t wakeup); +void FL_WKUP_StructInit(FL_WKUP_InitTypeDef *initStruct); + +void FL_GPIO_ALLPIN_LPM_MODE(void); + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif /* __FM33LG0XX_FL_GPIO_H*/ + +/*************************Py_Code_Generator Version: 0.1-0.14-0.1 @ 2020-10-20*************************/ +/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/ diff --git a/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_gptim.h b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_gptim.h new file mode 100644 index 0000000..26db05b --- /dev/null +++ b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_gptim.h @@ -0,0 +1,2988 @@ + /** + ******************************************************************************************************* + * @file fm33lg0xx_fl_gptim.h + * @author FMSH Application Team + * @brief Head file of GPTIM FL Module + ******************************************************************************************************* + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + + + +/* Define to prevent recursive inclusion---------------------------------------------------------------*/ +#ifndef __FM33LG0XX_FL_GPTIM_H +#define __FM33LG0XX_FL_GPTIM_H + +#ifdef __cplusplus +extern "C" { +#endif +/* Includes -------------------------------------------------------------------------------------------*/ +#include "fm33lg0xx_fl_def.h" +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @defgroup GPTIM GPTIM + * @brief GPTIM FL driver + * @{ + */ + +/* Exported types -------------------------------------------------------------------------------------*/ +/** @defgroup GPTIM_FL_ES_INIT GPTIM Exported Init structures + * @{ + */ + +/** + * @brief FL GPTIM Init Sturcture definition + */ +typedef struct +{ + /*! 预分频系数 */ + uint32_t prescaler; + /*! 计数模式 */ + uint32_t counterMode; + /*! 自动重装载值 */ + uint32_t autoReload; + /*! 预装载使能 */ + uint32_t autoReloadState; + /*!定时器分频系数与数字滤波器所使用的采样时钟分频比*/ + uint32_t clockDivision; + +} FL_GPTIM_InitTypeDef; +/** + * @brief GTIM SlaveMode Init Sturcture definition + */ +typedef struct +{ + /*! ITRx 源*/ + uint32_t ITRSourceGroup; + /*! 外部时钟源模式 */ + uint32_t slaveMode; + /*! 输入触发信号选择 */ + uint32_t triggerSrc; + /*! Trigger 延迟*/ + uint32_t triggerDelay; + +} FL_GPTIM_SlaveInitTypeDef; +/** + * @brief TIM Input Capture configuration structure definition. + */ + +typedef struct +{ + /*! 输入捕获使能 */ + uint32_t captureState; + /*! 输入捕获极性 */ + uint32_t ICPolarity; + /*! 通道映射激活的输入选择 */ + uint32_t ICActiveInput; + /*! 输入分频 */ + uint32_t ICPrescaler; + /*! 输入滤波 */ + uint32_t ICFilter; + +} FL_GPTIM_IC_InitTypeDef; +/** + * @brief TIM ETR configuration structure definition. + */ + +typedef struct +{ + /*! 外部触发使能 */ + uint32_t useExternalTrigger; + /*! 外部时钟滤波 */ + uint32_t ETRFilter; + /*! 外部时钟分频 */ + uint32_t ETRClockDivision; + /*! 外部时钟触发极性 */ + uint32_t ETRPolarity; + +} FL_GPTIM_ETR_InitTypeDef; + +/** + * @brief TIM Output Compare configuration structure definition. + */ +typedef struct +{ + /*! 比较输出模式 */ + uint32_t OCMode; + /*! 比较输出通道快速模式使能 */ + uint32_t OCFastMode; + /*! 输出比较预装载 */ + uint32_t OCPreload; + /*! 通道比较值 */ + uint32_t compareValue; + /*! 比较输出极性 */ + uint32_t OCPolarity; + /*! ETR清0使能 */ + uint32_t OCETRFStatus; + +} FL_GPTIM_OC_InitTypeDef; + +/** + * @} + */ + +/** + * GPTIM0~GPTIM2 ITRSEL_Group 映射表 + * + * ===================== GPTIM0 ====================== + * --------------------------------------------------- + * ITRx | Group | Function Name | Function Type + * --------------------------------------------------- + * ITR0 | 0 | ATIM_TRGO | 计数触发 + * | 1 | UART0_RX | 宽度捕捉 + * | 2 | UART1_RX | 宽度捕捉 + * | 3 | UART3_RX | 宽度捕捉 + * --------------------------------------------------- + * ITR1 | 0 | GPTIM2_TRGO | 计数触发 + * | 1 | XTHF | 周期捕捉 + * | 2 | RCHF | 周期捕捉 + * | 3 | LPUART1_RX | 周期捕捉 + * --------------------------------------------------- + * ITR2 | 0 | BSTIM32_TRGO | 计数触发 + * | 1 | LPUART2_RX | 宽度捕捉 + * | 2 | RCLP | 周期捕捉 + * | 3 | XTLF | 周期捕捉 + * --------------------------------------------------- + * ITR3 | 0 | COMP1_TRGO | 计数触发 + * | 1 | RCLF | 周期捕捉 + * | 2 | COMP2_TRGO | 计数触发 + * | 3 | LPT32_TRGO | 计数触发 + * --------------------------------------------------- + * + * ===================== GPTIM1 ====================== + * --------------------------------------------------- + * ITRx | Group | Function Name | Function Type + * --------------------------------------------------- + * ITR0 | 0 | ATIM_TRGO | 计数触发 + * | 1 | UART0_RX | 宽度捕捉 + * | 2 | UART1_RX | 宽度捕捉 + * | 3 | UART3_RX | 宽度捕捉 + * --------------------------------------------------- + * ITR1 | 0 | GPTIM0_TRGO | 计数触发 + * | 1 | LUT1_TRGO | 周期捕捉 + * | 2 | RCHF | 周期捕捉 + * | 3 | ADC_EOC_TRGO | 计数触发 + * --------------------------------------------------- + * ITR2 | 0 | BSTIM32_TRGO | 计数触发 + * | 1 | LSCLK | 周期捕捉 + * | 2 | RCLP | 周期捕捉 + * | 3 | XTLF | 周期捕捉 + * --------------------------------------------------- + * ITR3 | 0 | COMP1_TRGO | 计数触发 + * | 1 | LUT3_TRGO | 周期捕捉 + * | 2 | COMP2_TRGO | 计数触发 + * | 3 | LPT32_TRGO | 计数触发 + * --------------------------------------------------- + * + * ===================== GPTIM2 ====================== + * --------------------------------------------------- + * ITRx | Group | Function Name | Function Type + * --------------------------------------------------- + * ITR0 | 0 | ATIM_TRGO | 计数触发 + * | 1 | UART3_RX | 宽度捕捉 + * | 2 | UART4_RX | 宽度捕捉 + * | 3 | LUT0_TRGO | 宽度捕捉 + * --------------------------------------------------- + * ITR1 | 0 | GPTIM1_TRGO | 计数触发 + * | 1 | XTHF | 周期捕捉 + * | 2 | RCHF | 周期捕捉 + * | 3 | ADC_EOC_TRGO | 计数触发 + * --------------------------------------------------- + * ITR2 | 0 | BSTIM16_TRGO | 计数触发 + * | 1 | LSCLK | 周期捕捉 + * | 2 | RCLP | 周期捕捉 + * | 3 | XTLF | 周期捕捉 + * --------------------------------------------------- + * ITR3 | 0 | COMP1_TRGO | 计数触发 + * | 1 | LUT2_TRGO | 周期捕捉 + * | 2 | COMP2_TRGO | 计数触发 + * | 3 | LPT16_TRGO | 计数触发 + * --------------------------------------------------- + * + */ + +/* Exported constants ---------------------------------------------------------------------------------*/ +/** @defgroup GPTIM_FL_Exported_Constants GPTIM Exported Constants + * @{ + */ + +#define GPTIM_CR1_CKD_Pos (8U) +#define GPTIM_CR1_CKD_Msk (0x3Ul << GPTIM_CR1_CKD_Pos) +#define GPTIM_CR1_CKD GPTIM_CR1_CKD_Msk + +#define GPTIM_CR1_ARPE_Pos (7U) +#define GPTIM_CR1_ARPE_Msk (0x1Ul << GPTIM_CR1_ARPE_Pos) +#define GPTIM_CR1_ARPE GPTIM_CR1_ARPE_Msk + +#define GPTIM_CR1_CMS_Pos (5U) +#define GPTIM_CR1_CMS_Msk (0x3Ul << GPTIM_CR1_CMS_Pos) +#define GPTIM_CR1_CMS GPTIM_CR1_CMS_Msk + +#define GPTIM_CR1_DIR_Pos (4U) +#define GPTIM_CR1_DIR_Msk (0x1Ul << GPTIM_CR1_DIR_Pos) +#define GPTIM_CR1_DIR GPTIM_CR1_DIR_Msk + +#define GPTIM_CR1_OPM_Pos (3U) +#define GPTIM_CR1_OPM_Msk (0x1Ul << GPTIM_CR1_OPM_Pos) +#define GPTIM_CR1_OPM GPTIM_CR1_OPM_Msk + +#define GPTIM_CR1_URS_Pos (2U) +#define GPTIM_CR1_URS_Msk (0x1Ul << GPTIM_CR1_URS_Pos) +#define GPTIM_CR1_URS GPTIM_CR1_URS_Msk + +#define GPTIM_CR1_UDIS_Pos (1U) +#define GPTIM_CR1_UDIS_Msk (0x1Ul << GPTIM_CR1_UDIS_Pos) +#define GPTIM_CR1_UDIS GPTIM_CR1_UDIS_Msk + +#define GPTIM_CR1_CEN_Pos (0U) +#define GPTIM_CR1_CEN_Msk (0x1Ul << GPTIM_CR1_CEN_Pos) +#define GPTIM_CR1_CEN GPTIM_CR1_CEN_Msk + +#define GPTIM_CR2_TI1S_Pos (7U) +#define GPTIM_CR2_TI1S_Msk (0x1Ul << GPTIM_CR2_TI1S_Pos) +#define GPTIM_CR2_TI1S GPTIM_CR2_TI1S_Msk + +#define GPTIM_CR2_MMS_Pos (4U) +#define GPTIM_CR2_MMS_Msk (0x7Ul << GPTIM_CR2_MMS_Pos) +#define GPTIM_CR2_MMS GPTIM_CR2_MMS_Msk + +#define GPTIM_CR2_CCDS_Pos (3U) +#define GPTIM_CR2_CCDS_Msk (0x1Ul << GPTIM_CR2_CCDS_Pos) +#define GPTIM_CR2_CCDS GPTIM_CR2_CCDS_Msk + +#define GPTIM_SMCR_ETP_Pos (15U) +#define GPTIM_SMCR_ETP_Msk (0x1Ul << GPTIM_SMCR_ETP_Pos) +#define GPTIM_SMCR_ETP GPTIM_SMCR_ETP_Msk + +#define GPTIM_SMCR_ECE_Pos (14U) +#define GPTIM_SMCR_ECE_Msk (0x1Ul << GPTIM_SMCR_ECE_Pos) +#define GPTIM_SMCR_ECE GPTIM_SMCR_ECE_Msk + +#define GPTIM_SMCR_ETPS_Pos (12U) +#define GPTIM_SMCR_ETPS_Msk (0x3Ul << GPTIM_SMCR_ETPS_Pos) +#define GPTIM_SMCR_ETPS GPTIM_SMCR_ETPS_Msk + +#define GPTIM_SMCR_ETF_Pos (8U) +#define GPTIM_SMCR_ETF_Msk (0xfUl << GPTIM_SMCR_ETF_Pos) +#define GPTIM_SMCR_ETF GPTIM_SMCR_ETF_Msk + +#define GPTIM_SMCR_MSM_Pos (7U) +#define GPTIM_SMCR_MSM_Msk (0x1Ul << GPTIM_SMCR_MSM_Pos) +#define GPTIM_SMCR_MSM GPTIM_SMCR_MSM_Msk + +#define GPTIM_SMCR_TS_Pos (4U) +#define GPTIM_SMCR_TS_Msk (0x7Ul << GPTIM_SMCR_TS_Pos) +#define GPTIM_SMCR_TS GPTIM_SMCR_TS_Msk + +#define GPTIM_SMCR_SMS_Pos (0U) +#define GPTIM_SMCR_SMS_Msk (0x7Ul << GPTIM_SMCR_SMS_Pos) +#define GPTIM_SMCR_SMS GPTIM_SMCR_SMS_Msk + +#define GPTIM_DIER_CC1BURSTEN_Pos (16U) +#define GPTIM_DIER_CC1BURSTEN_Msk (0x1Ul << GPTIM_DIER_CC1BURSTEN_Pos) +#define GPTIM_DIER_CC1BURSTEN GPTIM_DIER_CC1BURSTEN_Msk + +#define GPTIM_DIER_CC2BURSTEN_Pos (17U) +#define GPTIM_DIER_CC2BURSTEN_Msk (0x1Ul << GPTIM_DIER_CC2BURSTEN_Pos) +#define GPTIM_DIER_CC2BURSTEN GPTIM_DIER_CC2BURSTEN_Msk + +#define GPTIM_DIER_CC3BURSTEN_Pos (18U) +#define GPTIM_DIER_CC3BURSTEN_Msk (0x1Ul << GPTIM_DIER_CC3BURSTEN_Pos) +#define GPTIM_DIER_CC3BURSTEN GPTIM_DIER_CC3BURSTEN_Msk + +#define GPTIM_DIER_CC4BURSTEN_Pos (19U) +#define GPTIM_DIER_CC4BURSTEN_Msk (0x1Ul << GPTIM_DIER_CC4BURSTEN_Pos) +#define GPTIM_DIER_CC4BURSTEN GPTIM_DIER_CC4BURSTEN_Msk + +#define GPTIM_DIER_TDE_Pos (14U) +#define GPTIM_DIER_TDE_Msk (0x1Ul << GPTIM_DIER_TDE_Pos) +#define GPTIM_DIER_TDE GPTIM_DIER_TDE_Msk + +#define GPTIM_DIER_CCDE_Pos (9U) +#define GPTIM_DIER_CCDE_Msk (0xfUl << GPTIM_DIER_CCDE_Pos) +#define GPTIM_DIER_CCDE GPTIM_DIER_CCDE_Msk + +#define GPTIM_DIER_UDE_Pos (8U) +#define GPTIM_DIER_UDE_Msk (0x1Ul << GPTIM_DIER_UDE_Pos) +#define GPTIM_DIER_UDE GPTIM_DIER_UDE_Msk + +#define GPTIM_DIER_TIE_Pos (6U) +#define GPTIM_DIER_TIE_Msk (0x1Ul << GPTIM_DIER_TIE_Pos) +#define GPTIM_DIER_TIE GPTIM_DIER_TIE_Msk + +#define GPTIM_DIER_CCIE_Pos (1U) +#define GPTIM_DIER_CCIE_Msk (0xfUl << GPTIM_DIER_CCIE_Pos) +#define GPTIM_DIER_CCIE GPTIM_DIER_CCIE_Msk + +#define GPTIM_DIER_UIE_Pos (0U) +#define GPTIM_DIER_UIE_Msk (0x1Ul << GPTIM_DIER_UIE_Pos) +#define GPTIM_DIER_UIE GPTIM_DIER_UIE_Msk + +#define GPTIM_ISR_CCOF_Pos (9U) +#define GPTIM_ISR_CCOF_Msk (0xfUl << GPTIM_ISR_CCOF_Pos) +#define GPTIM_ISR_CCOF GPTIM_ISR_CCOF_Msk + +#define GPTIM_ISR_TIF_Pos (6U) +#define GPTIM_ISR_TIF_Msk (0x1Ul << GPTIM_ISR_TIF_Pos) +#define GPTIM_ISR_TIF GPTIM_ISR_TIF_Msk + +#define GPTIM_ISR_CCIF_Pos (1U) +#define GPTIM_ISR_CCIF_Msk (0xfUl << GPTIM_ISR_CCIF_Pos) +#define GPTIM_ISR_CCIF GPTIM_ISR_CCIF_Msk + +#define GPTIM_ISR_UIF_Pos (0U) +#define GPTIM_ISR_UIF_Msk (0x1Ul << GPTIM_ISR_UIF_Pos) +#define GPTIM_ISR_UIF GPTIM_ISR_UIF_Msk + +#define GPTIM_EGR_TG_Pos (6U) +#define GPTIM_EGR_TG_Msk (0x1Ul << GPTIM_EGR_TG_Pos) +#define GPTIM_EGR_TG GPTIM_EGR_TG_Msk + +#define GPTIM_EGR_CCG_Pos (1U) +#define GPTIM_EGR_CCG_Msk (0x3Ul << GPTIM_EGR_CCG_Pos) +#define GPTIM_EGR_CCG GPTIM_EGR_CCG_Msk + +#define GPTIM_EGR_UG_Pos (0U) +#define GPTIM_EGR_UG_Msk (0x1Ul << GPTIM_EGR_UG_Pos) +#define GPTIM_EGR_UG GPTIM_EGR_UG_Msk + +#define GPTIM_DCR_DBL_Pos (8U) +#define GPTIM_DCR_DBL_Msk (0x1fUl << GPTIM_DCR_DBL_Pos) +#define GPTIM_DCR_DBL GPTIM_DCR_DBL_Msk + +#define GPTIM_DCR_DBA_Pos (0U) +#define GPTIM_DCR_DBA_Msk (0x1fUl << GPTIM_DCR_DBA_Pos) +#define GPTIM_DCR_DBA GPTIM_DCR_DBA_Msk + +#define GPTIM_ITRSEL_Pos (0U) +#define GPTIM_ITRSEL_Msk (0x3Ul << GPTIM_ITRSEL_Pos) +#define GPTIM_ITRSEL GPTIM_ITRSEL_Msk + +#define GPTIM_CCMR_OCCE_Pos (7U) +#define GPTIM_CCMR_OCCE_Msk (0x1Ul << GPTIM_CCMR_OCCE_Pos) +#define GPTIM_CCMR_OCCE GPTIM_CCMR_OCCE_Msk + +#define GPTIM_CCMR_OCM_Pos (4U) +#define GPTIM_CCMR_OCM_Msk (0x7Ul << GPTIM_CCMR_OCM_Pos) +#define GPTIM_CCMR_OCM GPTIM_CCMR_OCM_Msk + +#define GPTIM_CCMR_OCPE_Pos (3U) +#define GPTIM_CCMR_OCPE_Msk (0x1Ul << GPTIM_CCMR_OCPE_Pos) +#define GPTIM_CCMR_OCPE GPTIM_CCMR_OCPE_Msk + +#define GPTIM_CCMR_OCFE_Pos (2U) +#define GPTIM_CCMR_OCFE_Msk (0x1Ul << GPTIM_CCMR_OCFE_Pos) +#define GPTIM_CCMR_OCFE GPTIM_CCMR_OCFE_Msk + +#define GPTIM_CCMR_ICF_Pos (4U) +#define GPTIM_CCMR_ICF_Msk (0xfUl << GPTIM_CCMR_ICF_Pos) +#define GPTIM_CCMR_ICF GPTIM_CCMR_ICF_Msk + +#define GPTIM_CCMR_ICPSC_Pos (2U) +#define GPTIM_CCMR_ICPSC_Msk (0x3Ul << GPTIM_CCMR_ICPSC_Pos) +#define GPTIM_CCMR_ICPSC GPTIM_CCMR_ICPSC_Msk + +#define GPTIM_CCMR_CCS_Pos (0U) +#define GPTIM_CCMR_CCS_Msk (0x3Ul << GPTIM_CCMR_CCS_Pos) +#define GPTIM_CCMR_CCS GPTIM_CCMR_CCS_Msk + +#define GPTIM_CCER_CCOP_Pos (1U) +#define GPTIM_CCER_CCOP_Msk (0x1Ul << GPTIM_CCER_CCOP_Pos) +#define GPTIM_CCER_CCOP GPTIM_CCER_CCOP_Msk + +#define GPTIM_CCER_CCIP_Pos (1U) +#define GPTIM_CCER_CCIP_Msk (0x1Ul << GPTIM_CCER_CCIP_Pos) +#define GPTIM_CCER_CCIP GPTIM_CCER_CCIP_Msk + +#define GPTIM_CCER_CCE_Pos (0U) +#define GPTIM_CCER_CCE_Msk (0x1Ul << GPTIM_CCER_CCE_Pos) +#define GPTIM_CCER_CCE GPTIM_CCER_CCE_Msk + + + +#define FL_GPTIM_CHANNEL_1 (0x1Ul << 0U) +#define FL_GPTIM_CHANNEL_2 (0x1Ul << 1U) +#define FL_GPTIM_CHANNEL_3 (0x1Ul << 2U) +#define FL_GPTIM_CHANNEL_4 (0x1Ul << 3U) +#define FL_GPTIM_ITR0 (0x1Ul << 0U) +#define FL_GPTIM_ITR1 (0x1Ul << 1U) +#define FL_GPTIM_ITR2 (0x1Ul << 2U) +#define FL_GPTIM_ITR3 (0x1Ul << 3U) + + + +#define FL_GPTIM_CLK_DIVISION_DIV1 (0x0Ul << GPTIM_CR1_CKD_Pos) +#define FL_GPTIM_CLK_DIVISION_DIV2 (0x1Ul << GPTIM_CR1_CKD_Pos) +#define FL_GPTIM_CLK_DIVISION_DIV4 (0x2Ul << GPTIM_CR1_CKD_Pos) + + +#define FL_GPTIM_COUNTER_ALIGNED_EDGE (0x0Ul << GPTIM_CR1_CMS_Pos) +#define FL_GPTIM_COUNTER_ALIGNED_CENTER_DOWN (0x1Ul << GPTIM_CR1_CMS_Pos) +#define FL_GPTIM_COUNTER_ALIGNED_CENTER_UP (0x2Ul << GPTIM_CR1_CMS_Pos) +#define FL_GPTIM_COUNTER_ALIGNED_CENTER_UP_DOWN (0x3Ul << GPTIM_CR1_CMS_Pos) + + +#define FL_GPTIM_COUNTER_DIR_UP (0x0Ul << GPTIM_CR1_DIR_Pos) +#define FL_GPTIM_COUNTER_DIR_DOWN (0x1Ul << GPTIM_CR1_DIR_Pos) + + +#define FL_GPTIM_ONE_PULSE_MODE_CONTINUOUS (0x0Ul << GPTIM_CR1_OPM_Pos) +#define FL_GPTIM_ONE_PULSE_MODE_SINGLE (0x1Ul << GPTIM_CR1_OPM_Pos) + + +#define FL_GPTIM_UPDATE_SOURCE_REGULAR (0x0Ul << GPTIM_CR1_URS_Pos) +#define FL_GPTIM_UPDATE_SOURCE_COUNTER (0x1Ul << GPTIM_CR1_URS_Pos) + + +#define FL_GPTIM_TRGO_RESET (0x0Ul << GPTIM_CR2_MMS_Pos) +#define FL_GPTIM_TRGO_ENABLE (0x1Ul << GPTIM_CR2_MMS_Pos) +#define FL_GPTIM_TRGO_UPDATE (0x2Ul << GPTIM_CR2_MMS_Pos) +#define FL_GPTIM_TRGO_CC1IF (0x3Ul << GPTIM_CR2_MMS_Pos) +#define FL_GPTIM_TRGO_OC1REF (0x4Ul << GPTIM_CR2_MMS_Pos) +#define FL_GPTIM_TRGO_OC2REF (0x5Ul << GPTIM_CR2_MMS_Pos) +#define FL_GPTIM_TRGO_OC3REF (0x6Ul << GPTIM_CR2_MMS_Pos) +#define FL_GPTIM_TRGO_OC4REF (0x7Ul << GPTIM_CR2_MMS_Pos) + + +#define FL_GPTIM_DMA_REQ_CC (0x0Ul << GPTIM_CR2_CCDS_Pos) +#define FL_GPTIM_DMA_REQ_UPDATE (0x1Ul << GPTIM_CR2_CCDS_Pos) + + +#define FL_GPTIM_ETR_POLARITY_NORMAL (0x0Ul << GPTIM_SMCR_ETP_Pos) +#define FL_GPTIM_ETR_POLARITY_INVERT (0x1Ul << GPTIM_SMCR_ETP_Pos) + + +#define FL_GPTIM_ETR_PSC_DIV1 (0x0Ul << GPTIM_SMCR_ETPS_Pos) +#define FL_GPTIM_ETR_PSC_DIV2 (0x1Ul << GPTIM_SMCR_ETPS_Pos) +#define FL_GPTIM_ETR_PSC_DIV4 (0x2Ul << GPTIM_SMCR_ETPS_Pos) +#define FL_GPTIM_ETR_PSC_DIV8 (0x3Ul << GPTIM_SMCR_ETPS_Pos) + + +#define FL_GPTIM_ETR_FILTER_DIV1 (0x0Ul << GPTIM_SMCR_ETF_Pos) +#define FL_GPTIM_ETR_FILTER_DIV1_N2 (0x1Ul << GPTIM_SMCR_ETF_Pos) +#define FL_GPTIM_ETR_FILTER_DIV1_N4 (0x2Ul << GPTIM_SMCR_ETF_Pos) +#define FL_GPTIM_ETR_FILTER_DIV1_N8 (0x3Ul << GPTIM_SMCR_ETF_Pos) +#define FL_GPTIM_ETR_FILTER_DIV2_N6 (0x4Ul << GPTIM_SMCR_ETF_Pos) +#define FL_GPTIM_ETR_FILTER_DIV2_N8 (0x5Ul << GPTIM_SMCR_ETF_Pos) +#define FL_GPTIM_ETR_FILTER_DIV4_N6 (0x6Ul << GPTIM_SMCR_ETF_Pos) +#define FL_GPTIM_ETR_FILTER_DIV4_N8 (0x7Ul << GPTIM_SMCR_ETF_Pos) +#define FL_GPTIM_ETR_FILTER_DIV8_N6 (0x8Ul << GPTIM_SMCR_ETF_Pos) +#define FL_GPTIM_ETR_FILTER_DIV8_N8 (0x9Ul << GPTIM_SMCR_ETF_Pos) +#define FL_GPTIM_ETR_FILTER_DIV16_N5 (0xaUl << GPTIM_SMCR_ETF_Pos) +#define FL_GPTIM_ETR_FILTER_DIV16_N6 (0xbUl << GPTIM_SMCR_ETF_Pos) +#define FL_GPTIM_ETR_FILTER_DIV16_N8 (0xcUl << GPTIM_SMCR_ETF_Pos) +#define FL_GPTIM_ETR_FILTER_DIV32_N5 (0xdUl << GPTIM_SMCR_ETF_Pos) +#define FL_GPTIM_ETR_FILTER_DIV32_N6 (0xeUl << GPTIM_SMCR_ETF_Pos) +#define FL_GPTIM_ETR_FILTER_DIV32_N8 (0xfUl << GPTIM_SMCR_ETF_Pos) + + +#define FL_GPTIM_TIM_TS_ITR0 (0x0Ul << GPTIM_SMCR_TS_Pos) +#define FL_GPTIM_TIM_TS_ITR1 (0x1Ul << GPTIM_SMCR_TS_Pos) +#define FL_GPTIM_TIM_TS_ITR2 (0x2Ul << GPTIM_SMCR_TS_Pos) +#define FL_GPTIM_TIM_TS_ITR3 (0x3Ul << GPTIM_SMCR_TS_Pos) +#define FL_GPTIM_TIM_TS_TI1F_ED (0x4Ul << GPTIM_SMCR_TS_Pos) +#define FL_GPTIM_TIM_TS_TI1FP1 (0x5Ul << GPTIM_SMCR_TS_Pos) +#define FL_GPTIM_TIM_TS_TI2FP2 (0x6Ul << GPTIM_SMCR_TS_Pos) +#define FL_GPTIM_TIM_TS_ETRF (0x7Ul << GPTIM_SMCR_TS_Pos) + + +#define FL_GPTIM_SLAVE_MODE_PROHIBITED (0x0Ul << GPTIM_SMCR_SMS_Pos) +#define FL_GPTIM_SLAVE_MODE_ENCODER_X2_TI1 (0x1Ul << GPTIM_SMCR_SMS_Pos) +#define FL_GPTIM_SLAVE_MODE_ENCODER_X2_TI2 (0x2Ul << GPTIM_SMCR_SMS_Pos) +#define FL_GPTIM_SLAVE_MODE_ENCODER_X4_TI1TI2 (0x3Ul << GPTIM_SMCR_SMS_Pos) +#define FL_GPTIM_SLAVE_MODE_TRGI_RISE_RST (0x4Ul << GPTIM_SMCR_SMS_Pos) +#define FL_GPTIM_SLAVE_MODE_TRGI_HIGH_RUN (0x5Ul << GPTIM_SMCR_SMS_Pos) +#define FL_GPTIM_SLAVE_MODE_TRGI_RISE_RUN (0x6Ul << GPTIM_SMCR_SMS_Pos) +#define FL_GPTIM_SLAVE_MODE_TRGI_CLK (0x7Ul << GPTIM_SMCR_SMS_Pos) + + +#define FL_GPTIM_DMA_BURST_LENGTH_1 (0x0Ul << GPTIM_DCR_DBL_Pos) +#define FL_GPTIM_DMA_BURST_LENGTH_2 (0x1Ul << GPTIM_DCR_DBL_Pos) +#define FL_GPTIM_DMA_BURST_LENGTH_3 (0x2Ul << GPTIM_DCR_DBL_Pos) +#define FL_GPTIM_DMA_BURST_LENGTH_4 (0x3Ul << GPTIM_DCR_DBL_Pos) +#define FL_GPTIM_DMA_BURST_LENGTH_5 (0x4Ul << GPTIM_DCR_DBL_Pos) +#define FL_GPTIM_DMA_BURST_LENGTH_6 (0x5Ul << GPTIM_DCR_DBL_Pos) +#define FL_GPTIM_DMA_BURST_LENGTH_7 (0x6Ul << GPTIM_DCR_DBL_Pos) +#define FL_GPTIM_DMA_BURST_LENGTH_8 (0x7Ul << GPTIM_DCR_DBL_Pos) +#define FL_GPTIM_DMA_BURST_LENGTH_9 (0x8Ul << GPTIM_DCR_DBL_Pos) +#define FL_GPTIM_DMA_BURST_LENGTH_10 (0x9Ul << GPTIM_DCR_DBL_Pos) +#define FL_GPTIM_DMA_BURST_LENGTH_11 (0xaUl << GPTIM_DCR_DBL_Pos) +#define FL_GPTIM_DMA_BURST_LENGTH_12 (0xbUl << GPTIM_DCR_DBL_Pos) +#define FL_GPTIM_DMA_BURST_LENGTH_13 (0xcUl << GPTIM_DCR_DBL_Pos) +#define FL_GPTIM_DMA_BURST_LENGTH_14 (0xdUl << GPTIM_DCR_DBL_Pos) +#define FL_GPTIM_DMA_BURST_LENGTH_15 (0xeUl << GPTIM_DCR_DBL_Pos) +#define FL_GPTIM_DMA_BURST_LENGTH_16 (0xfUl << GPTIM_DCR_DBL_Pos) +#define FL_GPTIM_DMA_BURST_LENGTH_17 (0x10Ul << GPTIM_DCR_DBL_Pos) +#define FL_GPTIM_DMA_BURST_LENGTH_18 (0x11Ul << GPTIM_DCR_DBL_Pos) + + +#define FL_GPTIM_DMA_BURST_ADDR_CR1 (0x0Ul << GPTIM_DCR_DBA_Pos) +#define FL_GPTIM_DMA_BURST_ADDR_CR2 (0x1Ul << GPTIM_DCR_DBA_Pos) +#define FL_GPTIM_DMA_BURST_ADDR_SMCR (0x2Ul << GPTIM_DCR_DBA_Pos) +#define FL_GPTIM_DMA_BURST_ADDR_DIER (0x3Ul << GPTIM_DCR_DBA_Pos) +#define FL_GPTIM_DMA_BURST_ADDR_SR (0x4Ul << GPTIM_DCR_DBA_Pos) +#define FL_GPTIM_DMA_BURST_ADDR_EGR (0x5Ul << GPTIM_DCR_DBA_Pos) +#define FL_GPTIM_DMA_BURST_ADDR_CCMR1 (0x6Ul << GPTIM_DCR_DBA_Pos) +#define FL_GPTIM_DMA_BURST_ADDR_CCMR2 (0x7Ul << GPTIM_DCR_DBA_Pos) +#define FL_GPTIM_DMA_BURST_ADDR_CCER (0x8Ul << GPTIM_DCR_DBA_Pos) +#define FL_GPTIM_DMA_BURST_ADDR_CNT (0x9Ul << GPTIM_DCR_DBA_Pos) +#define FL_GPTIM_DMA_BURST_ADDR_PSC (0xaUl << GPTIM_DCR_DBA_Pos) +#define FL_GPTIM_DMA_BURST_ADDR_ARR (0xbUl << GPTIM_DCR_DBA_Pos) +#define FL_GPTIM_DMA_BURST_ADDR_RCR (0xcUl << GPTIM_DCR_DBA_Pos) +#define FL_GPTIM_DMA_BURST_ADDR_CCR1 (0xdUl << GPTIM_DCR_DBA_Pos) +#define FL_GPTIM_DMA_BURST_ADDR_CCR2 (0xeUl << GPTIM_DCR_DBA_Pos) +#define FL_GPTIM_DMA_BURST_ADDR_CCR3 (0xfUl << GPTIM_DCR_DBA_Pos) +#define FL_GPTIM_DMA_BURST_ADDR_CCR4 (0x10Ul << GPTIM_DCR_DBA_Pos) +#define FL_GPTIM_DMA_BURST_ADDR_BDTR (0x11Ul << GPTIM_DCR_DBA_Pos) + + +#define FL_GPTIM_ITRSEL_GROUP0 (0x0Ul << GPTIM_ITRSEL_Pos) +#define FL_GPTIM_ITRSEL_GROUP1 (0x1Ul << GPTIM_ITRSEL_Pos) +#define FL_GPTIM_ITRSEL_GROUP2 (0x2Ul << GPTIM_ITRSEL_Pos) +#define FL_GPTIM_ITRSEL_GROUP3 (0x3Ul << GPTIM_ITRSEL_Pos) + + +#define FL_GPTIM_OC_MODE_FROZEN (0x0Ul << GPTIM_CCMR_OCM_Pos) +#define FL_GPTIM_OC_MODE_ACTIVE (0x1Ul << GPTIM_CCMR_OCM_Pos) +#define FL_GPTIM_OC_MODE_INACTIVE (0x2Ul << GPTIM_CCMR_OCM_Pos) +#define FL_GPTIM_OC_MODE_TOGGLE (0x3Ul << GPTIM_CCMR_OCM_Pos) +#define FL_GPTIM_OC_MODE_FORCED_INACTIVE (0x4Ul << GPTIM_CCMR_OCM_Pos) +#define FL_GPTIM_OC_MODE_FORCED_ACTIVE (0x5Ul << GPTIM_CCMR_OCM_Pos) +#define FL_GPTIM_OC_MODE_PWM1 (0x6Ul << GPTIM_CCMR_OCM_Pos) +#define FL_GPTIM_OC_MODE_PWM2 (0x7Ul << GPTIM_CCMR_OCM_Pos) + + +#define FL_GPTIM_IC_FILTER_DIV1 (0x0Ul << GPTIM_CCMR_ICF_Pos) +#define FL_GPTIM_IC_FILTER_DIV1_N2 (0x1Ul << GPTIM_CCMR_ICF_Pos) +#define FL_GPTIM_IC_FILTER_DIV1_N4 (0x2Ul << GPTIM_CCMR_ICF_Pos) +#define FL_GPTIM_IC_FILTER_DIV1_N8 (0x3Ul << GPTIM_CCMR_ICF_Pos) +#define FL_GPTIM_IC_FILTER_DIV2_N6 (0x4Ul << GPTIM_CCMR_ICF_Pos) +#define FL_GPTIM_IC_FILTER_DIV2_N8 (0x5Ul << GPTIM_CCMR_ICF_Pos) +#define FL_GPTIM_IC_FILTER_DIV4_N6 (0x6Ul << GPTIM_CCMR_ICF_Pos) +#define FL_GPTIM_IC_FILTER_DIV4_N8 (0x7Ul << GPTIM_CCMR_ICF_Pos) +#define FL_GPTIM_IC_FILTER_DIV8_N6 (0x8Ul << GPTIM_CCMR_ICF_Pos) +#define FL_GPTIM_IC_FILTER_DIV8_N8 (0x9Ul << GPTIM_CCMR_ICF_Pos) +#define FL_GPTIM_IC_FILTER_DIV16_N5 (0xaUl << GPTIM_CCMR_ICF_Pos) +#define FL_GPTIM_IC_FILTER_DIV16_N6 (0xbUl << GPTIM_CCMR_ICF_Pos) +#define FL_GPTIM_IC_FILTER_DIV16_N8 (0xcUl << GPTIM_CCMR_ICF_Pos) +#define FL_GPTIM_IC_FILTER_DIV32_N5 (0xdUl << GPTIM_CCMR_ICF_Pos) +#define FL_GPTIM_IC_FILTER_DIV32_N6 (0xeUl << GPTIM_CCMR_ICF_Pos) +#define FL_GPTIM_IC_FILTER_DIV32_N8 (0xfUl << GPTIM_CCMR_ICF_Pos) + + +#define FL_GPTIM_IC_PSC_DIV1 (0x0Ul << GPTIM_CCMR_ICPSC_Pos) +#define FL_GPTIM_IC_PSC_DIV2 (0x1Ul << GPTIM_CCMR_ICPSC_Pos) +#define FL_GPTIM_IC_PSC_DIV4 (0x2Ul << GPTIM_CCMR_ICPSC_Pos) +#define FL_GPTIM_IC_PSC_DIV8 (0x3Ul << GPTIM_CCMR_ICPSC_Pos) + + +#define FL_GPTIM_CHANNEL_MODE_OUTPUT (0x0Ul << GPTIM_CCMR_CCS_Pos) +#define FL_GPTIM_CHANNEL_MODE_INPUT_NORMAL (0x1Ul << GPTIM_CCMR_CCS_Pos) +#define FL_GPTIM_CHANNEL_MODE_INPUT_CROSSOVER (0x2Ul << GPTIM_CCMR_CCS_Pos) +#define FL_GPTIM_CHANNEL_MODE_INPUT_TRC (0x3Ul << GPTIM_CCMR_CCS_Pos) + + +#define FL_GPTIM_OC_POLARITY_NORMAL (0x0Ul << GPTIM_CCER_CCOP_Pos) +#define FL_GPTIM_OC_POLARITY_INVERT (0x1Ul << GPTIM_CCER_CCOP_Pos) + + +#define FL_GPTIM_IC_POLARITY_NORMAL (0x0Ul << GPTIM_CCER_CCIP_Pos) +#define FL_GPTIM_IC_POLARITY_INVERT (0x1Ul << GPTIM_CCER_CCIP_Pos) + + +/** + * @} + */ +/* Exported functions ---------------------------------------------------------------------------------*/ +/** @defgroup GPTIM_FL_Exported_Functions GPTIM Exported Functions + * @{ + */ + +/** + * @brief + * @rmtoll CR1 CKD FL_GPTIM_SetClockDivision + * @param TIMx TIM instance + * @param div This parameter can be one of the following values: + * @arg @ref FL_GPTIM_CLK_DIVISION_DIV1 + * @arg @ref FL_GPTIM_CLK_DIVISION_DIV2 + * @arg @ref FL_GPTIM_CLK_DIVISION_DIV4 + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_SetClockDivision(GPTIM_Type *TIMx, uint32_t div) +{ + MODIFY_REG(TIMx->CR1, GPTIM_CR1_CKD_Msk, div); +} + +/** + * @brief + * @rmtoll CR1 CKD FL_GPTIM_GetClockDivision + * @param TIMx TIM instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_GPTIM_CLK_DIVISION_DIV1 + * @arg @ref FL_GPTIM_CLK_DIVISION_DIV2 + * @arg @ref FL_GPTIM_CLK_DIVISION_DIV4 + */ +__STATIC_INLINE uint32_t FL_GPTIM_GetClockDivision(GPTIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->CR1, GPTIM_CR1_CKD_Msk)); +} + +/** + * @brief + * @rmtoll CR1 ARPE FL_GPTIM_EnableARRPreload + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_EnableARRPreload(GPTIM_Type *TIMx) +{ + SET_BIT(TIMx->CR1, GPTIM_CR1_ARPE_Msk); +} + +/** + * @brief + * @rmtoll CR1 ARPE FL_GPTIM_IsEnabledARRPreload + * @param TIMx TIM instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_GPTIM_IsEnabledARRPreload(GPTIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->CR1, GPTIM_CR1_ARPE_Msk) == GPTIM_CR1_ARPE_Msk); +} + +/** + * @brief + * @rmtoll CR1 ARPE FL_GPTIM_DisableARRPreload + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_DisableARRPreload(GPTIM_Type *TIMx) +{ + CLEAR_BIT(TIMx->CR1, GPTIM_CR1_ARPE_Msk); +} + +/** + * @brief + * @rmtoll CR1 CMS FL_GPTIM_SetCounterAlignedMode + * @param TIMx TIM instance + * @param mode This parameter can be one of the following values: + * @arg @ref FL_GPTIM_COUNTER_ALIGNED_EDGE + * @arg @ref FL_GPTIM_COUNTER_ALIGNED_CENTER_DOWN + * @arg @ref FL_GPTIM_COUNTER_ALIGNED_CENTER_UP + * @arg @ref FL_GPTIM_COUNTER_ALIGNED_CENTER_UP_DOWN + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_SetCounterAlignedMode(GPTIM_Type *TIMx, uint32_t mode) +{ + MODIFY_REG(TIMx->CR1, GPTIM_CR1_CMS_Msk, mode); +} + +/** + * @brief + * @rmtoll CR1 CMS FL_GPTIM_GetCounterAlignedMode + * @param TIMx TIM instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_GPTIM_COUNTER_ALIGNED_EDGE + * @arg @ref FL_GPTIM_COUNTER_ALIGNED_CENTER_DOWN + * @arg @ref FL_GPTIM_COUNTER_ALIGNED_CENTER_UP + * @arg @ref FL_GPTIM_COUNTER_ALIGNED_CENTER_UP_DOWN + */ +__STATIC_INLINE uint32_t FL_GPTIM_GetCounterAlignedMode(GPTIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->CR1, GPTIM_CR1_CMS_Msk)); +} + +/** + * @brief + * @rmtoll CR1 DIR FL_GPTIM_SetCounterDirection + * @param TIMx TIM instance + * @param dir This parameter can be one of the following values: + * @arg @ref FL_GPTIM_COUNTER_DIR_UP + * @arg @ref FL_GPTIM_COUNTER_DIR_DOWN + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_SetCounterDirection(GPTIM_Type *TIMx, uint32_t dir) +{ + MODIFY_REG(TIMx->CR1, GPTIM_CR1_DIR_Msk, dir); +} + +/** + * @brief + * @rmtoll CR1 DIR FL_GPTIM_GetCounterDirection + * @param TIMx TIM instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_GPTIM_COUNTER_DIR_UP + * @arg @ref FL_GPTIM_COUNTER_DIR_DOWN + */ +__STATIC_INLINE uint32_t FL_GPTIM_GetCounterDirection(GPTIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->CR1, GPTIM_CR1_DIR_Msk)); +} + +/** + * @brief + * @rmtoll CR1 OPM FL_GPTIM_SetOnePulseMode + * @param TIMx TIM instance + * @param mode This parameter can be one of the following values: + * @arg @ref FL_GPTIM_ONE_PULSE_MODE_CONTINUOUS + * @arg @ref FL_GPTIM_ONE_PULSE_MODE_SINGLE + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_SetOnePulseMode(GPTIM_Type *TIMx, uint32_t mode) +{ + MODIFY_REG(TIMx->CR1, GPTIM_CR1_OPM_Msk, mode); +} + +/** + * @brief + * @rmtoll CR1 OPM FL_GPTIM_GetOnePulseMode + * @param TIMx TIM instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_GPTIM_ONE_PULSE_MODE_CONTINUOUS + * @arg @ref FL_GPTIM_ONE_PULSE_MODE_SINGLE + */ +__STATIC_INLINE uint32_t FL_GPTIM_GetOnePulseMode(GPTIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->CR1, GPTIM_CR1_OPM_Msk)); +} + +/** + * @brief + * @rmtoll CR1 URS FL_GPTIM_SetUpdateSource + * @param TIMx TIM instance + * @param source This parameter can be one of the following values: + * @arg @ref FL_GPTIM_UPDATE_SOURCE_REGULAR + * @arg @ref FL_GPTIM_UPDATE_SOURCE_COUNTER + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_SetUpdateSource(GPTIM_Type *TIMx, uint32_t source) +{ + MODIFY_REG(TIMx->CR1, GPTIM_CR1_URS_Msk, source); +} + +/** + * @brief + * @rmtoll CR1 URS FL_GPTIM_GetUpdateSource + * @param TIMx TIM instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_GPTIM_UPDATE_SOURCE_REGULAR + * @arg @ref FL_GPTIM_UPDATE_SOURCE_COUNTER + */ +__STATIC_INLINE uint32_t FL_GPTIM_GetUpdateSource(GPTIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->CR1, GPTIM_CR1_URS_Msk)); +} + +/** + * @brief + * @rmtoll CR1 UDIS FL_GPTIM_EnableUpdateEvent + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_EnableUpdateEvent(GPTIM_Type *TIMx) +{ + CLEAR_BIT(TIMx->CR1, GPTIM_CR1_UDIS_Msk); +} + +/** + * @brief + * @rmtoll CR1 UDIS FL_GPTIM_IsEnabledUpdateEvent + * @param TIMx TIM instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_GPTIM_IsEnabledUpdateEvent(GPTIM_Type *TIMx) +{ + return (uint32_t)!(READ_BIT(TIMx->CR1, GPTIM_CR1_UDIS_Msk) == GPTIM_CR1_UDIS_Msk); +} + +/** + * @brief + * @rmtoll CR1 UDIS FL_GPTIM_DisableUpdateEvent + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_DisableUpdateEvent(GPTIM_Type *TIMx) +{ + SET_BIT(TIMx->CR1, GPTIM_CR1_UDIS_Msk); +} + +/** + * @brief + * @rmtoll CR1 CEN FL_GPTIM_Enable + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_Enable(GPTIM_Type *TIMx) +{ + SET_BIT(TIMx->CR1, GPTIM_CR1_CEN_Msk); +} + +/** + * @brief + * @rmtoll CR1 CEN FL_GPTIM_IsEnabled + * @param TIMx TIM instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_GPTIM_IsEnabled(GPTIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->CR1, GPTIM_CR1_CEN_Msk) == GPTIM_CR1_CEN_Msk); +} + +/** + * @brief + * @rmtoll CR1 CEN FL_GPTIM_Disable + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_Disable(GPTIM_Type *TIMx) +{ + CLEAR_BIT(TIMx->CR1, GPTIM_CR1_CEN_Msk); +} + +/** + * @brief + * @rmtoll CR2 TI1S FL_GPTIM_IC_EnableXORCombination + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_IC_EnableXORCombination(GPTIM_Type *TIMx) +{ + SET_BIT(TIMx->CR2, GPTIM_CR2_TI1S_Msk); +} + +/** + * @brief + * @rmtoll CR2 TI1S FL_GPTIM_IC_IsEnabledXORCombination + * @param TIMx TIM instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_GPTIM_IC_IsEnabledXORCombination(GPTIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->CR2, GPTIM_CR2_TI1S_Msk) == GPTIM_CR2_TI1S_Msk); +} + +/** + * @brief + * @rmtoll CR2 TI1S FL_GPTIM_IC_DisableXORCombination + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_IC_DisableXORCombination(GPTIM_Type *TIMx) +{ + CLEAR_BIT(TIMx->CR2, GPTIM_CR2_TI1S_Msk); +} + +/** + * @brief + * @rmtoll CR2 MMS FL_GPTIM_SetTriggerOutput + * @param TIMx TIM instance + * @param triggerOutput This parameter can be one of the following values: + * @arg @ref FL_GPTIM_TRGO_RESET + * @arg @ref FL_GPTIM_TRGO_ENABLE + * @arg @ref FL_GPTIM_TRGO_UPDATE + * @arg @ref FL_GPTIM_TRGO_CC1IF + * @arg @ref FL_GPTIM_TRGO_OC1REF + * @arg @ref FL_GPTIM_TRGO_OC2REF + * @arg @ref FL_GPTIM_TRGO_OC3REF + * @arg @ref FL_GPTIM_TRGO_OC4REF + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_SetTriggerOutput(GPTIM_Type *TIMx, uint32_t triggerOutput) +{ + MODIFY_REG(TIMx->CR2, GPTIM_CR2_MMS_Msk, triggerOutput); +} + +/** + * @brief + * @rmtoll CR2 MMS FL_GPTIM_GetTriggerOutput + * @param TIMx TIM instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_GPTIM_TRGO_RESET + * @arg @ref FL_GPTIM_TRGO_ENABLE + * @arg @ref FL_GPTIM_TRGO_UPDATE + * @arg @ref FL_GPTIM_TRGO_CC1IF + * @arg @ref FL_GPTIM_TRGO_OC1REF + * @arg @ref FL_GPTIM_TRGO_OC2REF + * @arg @ref FL_GPTIM_TRGO_OC3REF + * @arg @ref FL_GPTIM_TRGO_OC4REF + */ +__STATIC_INLINE uint32_t FL_GPTIM_GetTriggerOutput(GPTIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->CR2, GPTIM_CR2_MMS_Msk)); +} + +/** + * @brief + * @rmtoll CR2 CCDS FL_GPTIM_CC_SetDMAReqTrigger + * @param TIMx TIM instance + * @param trigger This parameter can be one of the following values: + * @arg @ref FL_GPTIM_DMA_REQ_CC + * @arg @ref FL_GPTIM_DMA_REQ_UPDATE + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_CC_SetDMAReqTrigger(GPTIM_Type *TIMx, uint32_t trigger) +{ + MODIFY_REG(TIMx->CR2, GPTIM_CR2_CCDS_Msk, trigger); +} + +/** + * @brief + * @rmtoll CR2 CCDS FL_GPTIM_CC_GetDMAReqTrigger + * @param TIMx TIM instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_GPTIM_DMA_REQ_CC + * @arg @ref FL_GPTIM_DMA_REQ_UPDATE + */ +__STATIC_INLINE uint32_t FL_GPTIM_CC_GetDMAReqTrigger(GPTIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->CR2, GPTIM_CR2_CCDS_Msk)); +} + +/** + * @brief + * @rmtoll SMCR ETP FL_GPTIM_SetETRPolarity + * @param TIMx TIM instance + * @param polarity This parameter can be one of the following values: + * @arg @ref FL_GPTIM_ETR_POLARITY_NORMAL + * @arg @ref FL_GPTIM_ETR_POLARITY_INVERT + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_SetETRPolarity(GPTIM_Type *TIMx, uint32_t polarity) +{ + MODIFY_REG(TIMx->SMCR, GPTIM_SMCR_ETP_Msk, polarity); +} + +/** + * @brief + * @rmtoll SMCR ETP FL_GPTIM_GetETRPolarity + * @param TIMx TIM instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_GPTIM_ETR_POLARITY_NORMAL + * @arg @ref FL_GPTIM_ETR_POLARITY_INVERT + */ +__STATIC_INLINE uint32_t FL_GPTIM_GetETRPolarity(GPTIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->SMCR, GPTIM_SMCR_ETP_Msk)); +} + +/** + * @brief + * @rmtoll SMCR ECE FL_GPTIM_EnableExternalClock + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_EnableExternalClock(GPTIM_Type *TIMx) +{ + SET_BIT(TIMx->SMCR, GPTIM_SMCR_ECE_Msk); +} + +/** + * @brief + * @rmtoll SMCR ECE FL_GPTIM_IsEnabledExternalClock + * @param TIMx TIM instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_GPTIM_IsEnabledExternalClock(GPTIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->SMCR, GPTIM_SMCR_ECE_Msk) == GPTIM_SMCR_ECE_Msk); +} + +/** + * @brief + * @rmtoll SMCR ECE FL_GPTIM_DisableExternalClock + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_DisableExternalClock(GPTIM_Type *TIMx) +{ + CLEAR_BIT(TIMx->SMCR, GPTIM_SMCR_ECE_Msk); +} + +/** + * @brief + * @rmtoll SMCR ETPS FL_GPTIM_SetETRPrescaler + * @param TIMx TIM instance + * @param psc This parameter can be one of the following values: + * @arg @ref FL_GPTIM_ETR_PSC_DIV1 + * @arg @ref FL_GPTIM_ETR_PSC_DIV2 + * @arg @ref FL_GPTIM_ETR_PSC_DIV4 + * @arg @ref FL_GPTIM_ETR_PSC_DIV8 + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_SetETRPrescaler(GPTIM_Type *TIMx, uint32_t psc) +{ + MODIFY_REG(TIMx->SMCR, GPTIM_SMCR_ETPS_Msk, psc); +} + +/** + * @brief + * @rmtoll SMCR ETPS FL_GPTIM_GetETRPrescaler + * @param TIMx TIM instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_GPTIM_ETR_PSC_DIV1 + * @arg @ref FL_GPTIM_ETR_PSC_DIV2 + * @arg @ref FL_GPTIM_ETR_PSC_DIV4 + * @arg @ref FL_GPTIM_ETR_PSC_DIV8 + */ +__STATIC_INLINE uint32_t FL_GPTIM_GetETRPrescaler(GPTIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->SMCR, GPTIM_SMCR_ETPS_Msk)); +} + +/** + * @brief + * @rmtoll SMCR ETF FL_GPTIM_SetETRFilter + * @param TIMx TIM instance + * @param filter This parameter can be one of the following values: + * @arg @ref FL_GPTIM_ETR_FILTER_DIV1 + * @arg @ref FL_GPTIM_ETR_FILTER_DIV1_N2 + * @arg @ref FL_GPTIM_ETR_FILTER_DIV1_N4 + * @arg @ref FL_GPTIM_ETR_FILTER_DIV1_N8 + * @arg @ref FL_GPTIM_ETR_FILTER_DIV2_N6 + * @arg @ref FL_GPTIM_ETR_FILTER_DIV2_N8 + * @arg @ref FL_GPTIM_ETR_FILTER_DIV4_N6 + * @arg @ref FL_GPTIM_ETR_FILTER_DIV4_N8 + * @arg @ref FL_GPTIM_ETR_FILTER_DIV8_N6 + * @arg @ref FL_GPTIM_ETR_FILTER_DIV8_N8 + * @arg @ref FL_GPTIM_ETR_FILTER_DIV16_N5 + * @arg @ref FL_GPTIM_ETR_FILTER_DIV16_N6 + * @arg @ref FL_GPTIM_ETR_FILTER_DIV16_N8 + * @arg @ref FL_GPTIM_ETR_FILTER_DIV32_N5 + * @arg @ref FL_GPTIM_ETR_FILTER_DIV32_N6 + * @arg @ref FL_GPTIM_ETR_FILTER_DIV32_N8 + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_SetETRFilter(GPTIM_Type *TIMx, uint32_t filter) +{ + MODIFY_REG(TIMx->SMCR, GPTIM_SMCR_ETF_Msk, filter); +} + +/** + * @brief + * @rmtoll SMCR ETF FL_GPTIM_GetETRFilter + * @param TIMx TIM instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_GPTIM_ETR_FILTER_DIV1 + * @arg @ref FL_GPTIM_ETR_FILTER_DIV1_N2 + * @arg @ref FL_GPTIM_ETR_FILTER_DIV1_N4 + * @arg @ref FL_GPTIM_ETR_FILTER_DIV1_N8 + * @arg @ref FL_GPTIM_ETR_FILTER_DIV2_N6 + * @arg @ref FL_GPTIM_ETR_FILTER_DIV2_N8 + * @arg @ref FL_GPTIM_ETR_FILTER_DIV4_N6 + * @arg @ref FL_GPTIM_ETR_FILTER_DIV4_N8 + * @arg @ref FL_GPTIM_ETR_FILTER_DIV8_N6 + * @arg @ref FL_GPTIM_ETR_FILTER_DIV8_N8 + * @arg @ref FL_GPTIM_ETR_FILTER_DIV16_N5 + * @arg @ref FL_GPTIM_ETR_FILTER_DIV16_N6 + * @arg @ref FL_GPTIM_ETR_FILTER_DIV16_N8 + * @arg @ref FL_GPTIM_ETR_FILTER_DIV32_N5 + * @arg @ref FL_GPTIM_ETR_FILTER_DIV32_N6 + * @arg @ref FL_GPTIM_ETR_FILTER_DIV32_N8 + */ +__STATIC_INLINE uint32_t FL_GPTIM_GetETRFilter(GPTIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->SMCR, GPTIM_SMCR_ETF_Msk)); +} + +/** + * @brief + * @rmtoll SMCR MSM FL_GPTIM_EnableMasterSlaveMode + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_EnableMasterSlaveMode(GPTIM_Type *TIMx) +{ + SET_BIT(TIMx->SMCR, GPTIM_SMCR_MSM_Msk); +} + +/** + * @brief + * @rmtoll SMCR MSM FL_GPTIM_IsEnabledMasterSlaveMode + * @param TIMx TIM instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_GPTIM_IsEnabledMasterSlaveMode(GPTIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->SMCR, GPTIM_SMCR_MSM_Msk) == GPTIM_SMCR_MSM_Msk); +} + +/** + * @brief + * @rmtoll SMCR MSM FL_GPTIM_DisableMasterSlaveMode + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_DisableMasterSlaveMode(GPTIM_Type *TIMx) +{ + CLEAR_BIT(TIMx->SMCR, GPTIM_SMCR_MSM_Msk); +} + +/** + * @brief + * @rmtoll SMCR TS FL_GPTIM_SetTriggerInput + * @param TIMx TIM instance + * @param triggerInput This parameter can be one of the following values: + * @arg @ref FL_GPTIM_TIM_TS_ITR0 + * @arg @ref FL_GPTIM_TIM_TS_ITR1 + * @arg @ref FL_GPTIM_TIM_TS_ITR2 + * @arg @ref FL_GPTIM_TIM_TS_ITR3 + * @arg @ref FL_GPTIM_TIM_TS_TI1F_ED + * @arg @ref FL_GPTIM_TIM_TS_TI1FP1 + * @arg @ref FL_GPTIM_TIM_TS_TI2FP2 + * @arg @ref FL_GPTIM_TIM_TS_ETRF + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_SetTriggerInput(GPTIM_Type *TIMx, uint32_t triggerInput) +{ + MODIFY_REG(TIMx->SMCR, GPTIM_SMCR_TS_Msk, triggerInput); +} + +/** + * @brief + * @rmtoll SMCR TS FL_GPTIM_GetTriggerInput + * @param TIMx TIM instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_GPTIM_TIM_TS_ITR0 + * @arg @ref FL_GPTIM_TIM_TS_ITR1 + * @arg @ref FL_GPTIM_TIM_TS_ITR2 + * @arg @ref FL_GPTIM_TIM_TS_ITR3 + * @arg @ref FL_GPTIM_TIM_TS_TI1F_ED + * @arg @ref FL_GPTIM_TIM_TS_TI1FP1 + * @arg @ref FL_GPTIM_TIM_TS_TI2FP2 + * @arg @ref FL_GPTIM_TIM_TS_ETRF + */ +__STATIC_INLINE uint32_t FL_GPTIM_GetTriggerInput(GPTIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->SMCR, GPTIM_SMCR_TS_Msk)); +} + +/** + * @brief + * @rmtoll SMCR SMS FL_GPTIM_SetSlaveMode + * @param TIMx TIM instance + * @param encoderMode This parameter can be one of the following values: + * @arg @ref FL_GPTIM_SLAVE_MODE_PROHIBITED + * @arg @ref FL_GPTIM_SLAVE_MODE_ENCODER_X2_TI1 + * @arg @ref FL_GPTIM_SLAVE_MODE_ENCODER_X2_TI2 + * @arg @ref FL_GPTIM_SLAVE_MODE_ENCODER_X4_TI1TI2 + * @arg @ref FL_GPTIM_SLAVE_MODE_TRGI_RISE_RST + * @arg @ref FL_GPTIM_SLAVE_MODE_TRGI_HIGH_RUN + * @arg @ref FL_GPTIM_SLAVE_MODE_TRGI_RISE_RUN + * @arg @ref FL_GPTIM_SLAVE_MODE_TRGI_CLK + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_SetSlaveMode(GPTIM_Type *TIMx, uint32_t encoderMode) +{ + MODIFY_REG(TIMx->SMCR, GPTIM_SMCR_SMS_Msk, encoderMode); +} + +/** + * @brief + * @rmtoll SMCR SMS FL_GPTIM_GetSlaveMode + * @param TIMx TIM instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_GPTIM_SLAVE_MODE_PROHIBITED + * @arg @ref FL_GPTIM_SLAVE_MODE_ENCODER_X2_TI1 + * @arg @ref FL_GPTIM_SLAVE_MODE_ENCODER_X2_TI2 + * @arg @ref FL_GPTIM_SLAVE_MODE_ENCODER_X4_TI1TI2 + * @arg @ref FL_GPTIM_SLAVE_MODE_TRGI_RISE_RST + * @arg @ref FL_GPTIM_SLAVE_MODE_TRGI_HIGH_RUN + * @arg @ref FL_GPTIM_SLAVE_MODE_TRGI_RISE_RUN + * @arg @ref FL_GPTIM_SLAVE_MODE_TRGI_CLK + */ +__STATIC_INLINE uint32_t FL_GPTIM_GetSlaveMode(GPTIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->SMCR, GPTIM_SMCR_SMS_Msk)); +} + +/** + * @brief + * @rmtoll DIER CC1BURSTEN FL_GPTIM_EnableCC1DMABurstMode + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_EnableCC1DMABurstMode(GPTIM_Type *TIMx) +{ + SET_BIT(TIMx->DIER, GPTIM_DIER_CC1BURSTEN_Msk); +} + +/** + * @brief + * @rmtoll DIER CC1BURSTEN FL_GPTIM_IsEnabledCC1DMABurstMode + * @param TIMx TIM instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_GPTIM_IsEnabledCC1DMABurstMode(GPTIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->DIER, GPTIM_DIER_CC1BURSTEN_Msk) == GPTIM_DIER_CC1BURSTEN_Msk); +} + +/** + * @brief + * @rmtoll DIER CC1BURSTEN FL_GPTIM_DisableCC1DMABurstMode + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_DisableCC1DMABurstMode(GPTIM_Type *TIMx) +{ + CLEAR_BIT(TIMx->DIER, GPTIM_DIER_CC1BURSTEN_Msk); +} + +/** + * @brief + * @rmtoll DIER CC2BURSTEN FL_GPTIM_EnableCC2DMABurstMode + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_EnableCC2DMABurstMode(GPTIM_Type *TIMx) +{ + SET_BIT(TIMx->DIER, GPTIM_DIER_CC2BURSTEN_Msk); +} + +/** + * @brief + * @rmtoll DIER CC2BURSTEN FL_GPTIM_IsEnabledCC2DMABurstMode + * @param TIMx TIM instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_GPTIM_IsEnabledCC2DMABurstMode(GPTIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->DIER, GPTIM_DIER_CC2BURSTEN_Msk) == GPTIM_DIER_CC2BURSTEN_Msk); +} + +/** + * @brief + * @rmtoll DIER CC2BURSTEN FL_GPTIM_DisableCC2DMABurstMode + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_DisableCC2DMABurstMode(GPTIM_Type *TIMx) +{ + CLEAR_BIT(TIMx->DIER, GPTIM_DIER_CC2BURSTEN_Msk); +} + +/** + * @brief + * @rmtoll DIER CC3BURSTEN FL_GPTIM_EnableCC3DMABurstMode + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_EnableCC3DMABurstMode(GPTIM_Type *TIMx) +{ + SET_BIT(TIMx->DIER, GPTIM_DIER_CC3BURSTEN_Msk); +} + +/** + * @brief + * @rmtoll DIER CC3BURSTEN FL_GPTIM_IsEnabledCC3DMABurstMode + * @param TIMx TIM instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_GPTIM_IsEnabledCC3DMABurstMode(GPTIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->DIER, GPTIM_DIER_CC3BURSTEN_Msk) == GPTIM_DIER_CC3BURSTEN_Msk); +} + +/** + * @brief + * @rmtoll DIER CC3BURSTEN FL_GPTIM_DisableCC3DMABurstMode + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_DisableCC3DMABurstMode(GPTIM_Type *TIMx) +{ + CLEAR_BIT(TIMx->DIER, GPTIM_DIER_CC3BURSTEN_Msk); +} + +/** + * @brief + * @rmtoll DIER CC4BURSTEN FL_GPTIM_EnableCC4DMABurstMode + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_EnableCC4DMABurstMode(GPTIM_Type *TIMx) +{ + SET_BIT(TIMx->DIER, GPTIM_DIER_CC4BURSTEN_Msk); +} + +/** + * @brief + * @rmtoll DIER CC4BURSTEN FL_GPTIM_IsEnabledCC4DMABurstMode + * @param TIMx TIM instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_GPTIM_IsEnabledCC4DMABurstMode(GPTIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->DIER, GPTIM_DIER_CC4BURSTEN_Msk) == GPTIM_DIER_CC4BURSTEN_Msk); +} + +/** + * @brief + * @rmtoll DIER CC4BURSTEN FL_GPTIM_DisableCC4DMABurstMode + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_DisableCC4DMABurstMode(GPTIM_Type *TIMx) +{ + CLEAR_BIT(TIMx->DIER, GPTIM_DIER_CC4BURSTEN_Msk); +} + +/** + * @brief + * @rmtoll DIER TDE FL_GPTIM_EnableDMAReq_Trigger + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_EnableDMAReq_Trigger(GPTIM_Type *TIMx) +{ + SET_BIT(TIMx->DIER, GPTIM_DIER_TDE_Msk); +} + +/** + * @brief + * @rmtoll DIER TDE FL_GPTIM_IsEnabledDMAReq_Trigger + * @param TIMx TIM instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_GPTIM_IsEnabledDMAReq_Trigger(GPTIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->DIER, GPTIM_DIER_TDE_Msk) == GPTIM_DIER_TDE_Msk); +} + +/** + * @brief + * @rmtoll DIER TDE FL_GPTIM_DisableDMAReq_Trigger + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_DisableDMAReq_Trigger(GPTIM_Type *TIMx) +{ + CLEAR_BIT(TIMx->DIER, GPTIM_DIER_TDE_Msk); +} + +/** + * @brief + * @rmtoll DIER CCDE FL_GPTIM_EnableDMAReq_CC + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_GPTIM_CHANNEL_1 + * @arg @ref FL_GPTIM_CHANNEL_2 + * @arg @ref FL_GPTIM_CHANNEL_3 + * @arg @ref FL_GPTIM_CHANNEL_4 + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_EnableDMAReq_CC(GPTIM_Type *TIMx, uint32_t channel) +{ + SET_BIT(TIMx->DIER, ((channel & 0xf) << 0x9U)); +} + +/** + * @brief + * @rmtoll DIER CCDE FL_GPTIM_IsEnabledDMAReq_CC + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_GPTIM_CHANNEL_1 + * @arg @ref FL_GPTIM_CHANNEL_2 + * @arg @ref FL_GPTIM_CHANNEL_3 + * @arg @ref FL_GPTIM_CHANNEL_4 + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_GPTIM_IsEnabledDMAReq_CC(GPTIM_Type *TIMx, uint32_t channel) +{ + return (uint32_t)(READ_BIT(TIMx->DIER, ((channel & 0xf) << 0x9U)) == ((channel & 0xf) << 0x9U)); +} + +/** + * @brief + * @rmtoll DIER CCDE FL_GPTIM_DisableDMAReq_CC + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_GPTIM_CHANNEL_1 + * @arg @ref FL_GPTIM_CHANNEL_2 + * @arg @ref FL_GPTIM_CHANNEL_3 + * @arg @ref FL_GPTIM_CHANNEL_4 + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_DisableDMAReq_CC(GPTIM_Type *TIMx, uint32_t channel) +{ + CLEAR_BIT(TIMx->DIER, ((channel & 0xf) << 0x9U)); +} + +/** + * @brief + * @rmtoll DIER UDE FL_GPTIM_EnableDMAReq_Update + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_EnableDMAReq_Update(GPTIM_Type *TIMx) +{ + SET_BIT(TIMx->DIER, GPTIM_DIER_UDE_Msk); +} + +/** + * @brief + * @rmtoll DIER UDE FL_GPTIM_IsEnabledDMAReq_Update + * @param TIMx TIM instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_GPTIM_IsEnabledDMAReq_Update(GPTIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->DIER, GPTIM_DIER_UDE_Msk) == GPTIM_DIER_UDE_Msk); +} + +/** + * @brief + * @rmtoll DIER UDE FL_GPTIM_DisableDMAReq_Update + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_DisableDMAReq_Update(GPTIM_Type *TIMx) +{ + CLEAR_BIT(TIMx->DIER, GPTIM_DIER_UDE_Msk); +} + +/** + * @brief + * @rmtoll DIER TIE FL_GPTIM_EnableIT_Trigger + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_EnableIT_Trigger(GPTIM_Type *TIMx) +{ + SET_BIT(TIMx->DIER, GPTIM_DIER_TIE_Msk); +} + +/** + * @brief + * @rmtoll DIER TIE FL_GPTIM_IsEnabledIT_Trigger + * @param TIMx TIM instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_GPTIM_IsEnabledIT_Trigger(GPTIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->DIER, GPTIM_DIER_TIE_Msk) == GPTIM_DIER_TIE_Msk); +} + +/** + * @brief + * @rmtoll DIER TIE FL_GPTIM_DisableIT_Trigger + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_DisableIT_Trigger(GPTIM_Type *TIMx) +{ + CLEAR_BIT(TIMx->DIER, GPTIM_DIER_TIE_Msk); +} + +/** + * @brief + * @rmtoll DIER CCIE FL_GPTIM_EnableIT_CC + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_GPTIM_CHANNEL_1 + * @arg @ref FL_GPTIM_CHANNEL_2 + * @arg @ref FL_GPTIM_CHANNEL_3 + * @arg @ref FL_GPTIM_CHANNEL_4 + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_EnableIT_CC(GPTIM_Type *TIMx, uint32_t channel) +{ + SET_BIT(TIMx->DIER, ((channel & 0xf) << 0x1U)); +} + +/** + * @brief + * @rmtoll DIER CCIE FL_GPTIM_IsEnabledIT_CC + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_GPTIM_CHANNEL_1 + * @arg @ref FL_GPTIM_CHANNEL_2 + * @arg @ref FL_GPTIM_CHANNEL_3 + * @arg @ref FL_GPTIM_CHANNEL_4 + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_GPTIM_IsEnabledIT_CC(GPTIM_Type *TIMx, uint32_t channel) +{ + return (uint32_t)(READ_BIT(TIMx->DIER, ((channel & 0xf) << 0x1U)) == ((channel & 0xf) << 0x1U)); +} + +/** + * @brief + * @rmtoll DIER CCIE FL_GPTIM_DisableIT_CC + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_GPTIM_CHANNEL_1 + * @arg @ref FL_GPTIM_CHANNEL_2 + * @arg @ref FL_GPTIM_CHANNEL_3 + * @arg @ref FL_GPTIM_CHANNEL_4 + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_DisableIT_CC(GPTIM_Type *TIMx, uint32_t channel) +{ + CLEAR_BIT(TIMx->DIER, ((channel & 0xf) << 0x1U)); +} + +/** + * @brief + * @rmtoll DIER UIE FL_GPTIM_EnableIT_Update + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_EnableIT_Update(GPTIM_Type *TIMx) +{ + SET_BIT(TIMx->DIER, GPTIM_DIER_UIE_Msk); +} + +/** + * @brief + * @rmtoll DIER UIE FL_GPTIM_IsEnabledIT_Update + * @param TIMx TIM instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_GPTIM_IsEnabledIT_Update(GPTIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->DIER, GPTIM_DIER_UIE_Msk) == GPTIM_DIER_UIE_Msk); +} + +/** + * @brief + * @rmtoll DIER UIE FL_GPTIM_DisableIT_Update + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_DisableIT_Update(GPTIM_Type *TIMx) +{ + CLEAR_BIT(TIMx->DIER, GPTIM_DIER_UIE_Msk); +} + +/** + * @brief + * @rmtoll ISR CCOF FL_GPTIM_IsActiveFlag_CCOverflow + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_GPTIM_CHANNEL_1 + * @arg @ref FL_GPTIM_CHANNEL_2 + * @arg @ref FL_GPTIM_CHANNEL_3 + * @arg @ref FL_GPTIM_CHANNEL_4 + * @retval Returned value can be one of the following values: + */ +__STATIC_INLINE uint32_t FL_GPTIM_IsActiveFlag_CCOverflow(GPTIM_Type *TIMx, uint32_t channel) +{ + return (uint32_t)(READ_BIT(TIMx->ISR, ((channel & 0xf) << 0x9U)) == ((channel & 0xf) << 0x9U)); +} + +/** + * @brief + * @rmtoll ISR CCOF FL_GPTIM_ClearFlag_CCOverflow + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_GPTIM_CHANNEL_1 + * @arg @ref FL_GPTIM_CHANNEL_2 + * @arg @ref FL_GPTIM_CHANNEL_3 + * @arg @ref FL_GPTIM_CHANNEL_4 + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_ClearFlag_CCOverflow(GPTIM_Type *TIMx, uint32_t channel) +{ + WRITE_REG(TIMx->ISR, ((channel & 0xf) << 0x9U)); +} + +/** + * @brief + * @rmtoll ISR TIF FL_GPTIM_IsActiveFlag_Trigger + * @param TIMx TIM instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_GPTIM_IsActiveFlag_Trigger(GPTIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->ISR, GPTIM_ISR_TIF_Msk) == (GPTIM_ISR_TIF_Msk)); +} + +/** + * @brief + * @rmtoll ISR TIF FL_GPTIM_ClearFlag_Trigger + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_ClearFlag_Trigger(GPTIM_Type *TIMx) +{ + WRITE_REG(TIMx->ISR, GPTIM_ISR_TIF_Msk); +} + +/** + * @brief + * @rmtoll ISR CCIF FL_GPTIM_IsActiveFlag_CC + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_GPTIM_CHANNEL_1 + * @arg @ref FL_GPTIM_CHANNEL_2 + * @arg @ref FL_GPTIM_CHANNEL_3 + * @arg @ref FL_GPTIM_CHANNEL_4 + * @retval Returned value can be one of the following values: + */ +__STATIC_INLINE uint32_t FL_GPTIM_IsActiveFlag_CC(GPTIM_Type *TIMx, uint32_t channel) +{ + return (uint32_t)(READ_BIT(TIMx->ISR, ((channel & 0xf) << 0x1U)) == ((channel & 0xf) << 0x1U)); +} + +/** + * @brief + * @rmtoll ISR CCIF FL_GPTIM_ClearFlag_CC + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_GPTIM_CHANNEL_1 + * @arg @ref FL_GPTIM_CHANNEL_2 + * @arg @ref FL_GPTIM_CHANNEL_3 + * @arg @ref FL_GPTIM_CHANNEL_4 + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_ClearFlag_CC(GPTIM_Type *TIMx, uint32_t channel) +{ + WRITE_REG(TIMx->ISR, ((channel & 0xf) << 0x1U)); +} + +/** + * @brief + * @rmtoll ISR UIF FL_GPTIM_IsActiveFlag_Update + * @param TIMx TIM instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_GPTIM_IsActiveFlag_Update(GPTIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->ISR, GPTIM_ISR_UIF_Msk) == (GPTIM_ISR_UIF_Msk)); +} + +/** + * @brief + * @rmtoll ISR UIF FL_GPTIM_ClearFlag_Update + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_ClearFlag_Update(GPTIM_Type *TIMx) +{ + WRITE_REG(TIMx->ISR, GPTIM_ISR_UIF_Msk); +} + +/** + * @brief + * @rmtoll EGR TG FL_GPTIM_GenerateTriggerEvent + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_GenerateTriggerEvent(GPTIM_Type *TIMx) +{ + SET_BIT(TIMx->EGR, GPTIM_EGR_TG_Msk); +} + +/** + * @brief + * @rmtoll EGR CCG FL_GPTIM_GenerateCCEvent + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_GPTIM_CHANNEL_1 + * @arg @ref FL_GPTIM_CHANNEL_2 + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_GenerateCCEvent(GPTIM_Type *TIMx, uint32_t channel) +{ + SET_BIT(TIMx->EGR, ((channel & 0x3) << 0x1U)); +} + +/** + * @brief + * @rmtoll EGR UG FL_GPTIM_GenerateUpdateEvent + * @param TIMx TIM instance + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_GenerateUpdateEvent(GPTIM_Type *TIMx) +{ + SET_BIT(TIMx->EGR, GPTIM_EGR_UG_Msk); +} + +/** + * @brief + * @rmtoll CNT FL_GPTIM_WriteCounter + * @param TIMx TIM instance + * @param counter + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_WriteCounter(GPTIM_Type *TIMx, uint32_t counter) +{ + MODIFY_REG(TIMx->CNT, (0xffffU << 0U), (counter << 0U)); +} + +/** + * @brief + * @rmtoll CNT FL_GPTIM_ReadCounter + * @param TIMx TIM instance + * @retval + */ +__STATIC_INLINE uint32_t FL_GPTIM_ReadCounter(GPTIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->CNT, 0xffffU) >> 0U); +} + +/** + * @brief + * @rmtoll PSC FL_GPTIM_WritePrescaler + * @param TIMx TIM instance + * @param psc + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_WritePrescaler(GPTIM_Type *TIMx, uint32_t psc) +{ + MODIFY_REG(TIMx->PSC, (0xffffU << 0U), (psc << 0U)); +} + +/** + * @brief + * @rmtoll PSC FL_GPTIM_ReadPrescaler + * @param TIMx TIM instance + * @retval + */ +__STATIC_INLINE uint32_t FL_GPTIM_ReadPrescaler(GPTIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->PSC, 0xffffU) >> 0U); +} + +/** + * @brief + * @rmtoll ARR FL_GPTIM_WriteAutoReload + * @param TIMx TIM instance + * @param autoReload + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_WriteAutoReload(GPTIM_Type *TIMx, uint32_t autoReload) +{ + MODIFY_REG(TIMx->ARR, (0xffffU << 0U), (autoReload << 0U)); +} + +/** + * @brief + * @rmtoll ARR FL_GPTIM_ReadAutoReload + * @param TIMx TIM instance + * @retval + */ +__STATIC_INLINE uint32_t FL_GPTIM_ReadAutoReload(GPTIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->ARR, 0xffffU) >> 0U); +} + +/** + * @brief + * @rmtoll CCR1 FL_GPTIM_WriteCompareCH1 + * @param TIMx TIM instance + * @param compareValue + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_WriteCompareCH1(GPTIM_Type *TIMx, uint32_t compareValue) +{ + MODIFY_REG(TIMx->CCR1, (0xffffU << 0U), (compareValue << 0U)); +} + +/** + * @brief + * @rmtoll CCR1 FL_GPTIM_ReadCompareCH1 + * @param TIMx TIM instance + * @retval + */ +__STATIC_INLINE uint32_t FL_GPTIM_ReadCompareCH1(GPTIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->CCR1, 0xffffU) >> 0U); +} + +/** + * @brief + * @rmtoll CCR2 FL_GPTIM_WriteCompareCH2 + * @param TIMx TIM instance + * @param compareValue + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_WriteCompareCH2(GPTIM_Type *TIMx, uint32_t compareValue) +{ + MODIFY_REG(TIMx->CCR2, (0xffffU << 0U), (compareValue << 0U)); +} + +/** + * @brief + * @rmtoll CCR2 FL_GPTIM_ReadCompareCH2 + * @param TIMx TIM instance + * @retval + */ +__STATIC_INLINE uint32_t FL_GPTIM_ReadCompareCH2(GPTIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->CCR2, 0xffffU) >> 0U); +} + +/** + * @brief + * @rmtoll CCR3 FL_GPTIM_WriteCompareCH3 + * @param TIMx TIM instance + * @param compareValue + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_WriteCompareCH3(GPTIM_Type *TIMx, uint32_t compareValue) +{ + MODIFY_REG(TIMx->CCR3, (0xffffU << 0U), (compareValue << 0U)); +} + +/** + * @brief + * @rmtoll CCR3 FL_GPTIM_ReadCompareCH3 + * @param TIMx TIM instance + * @retval + */ +__STATIC_INLINE uint32_t FL_GPTIM_ReadCompareCH3(GPTIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->CCR3, 0xffffU) >> 0U); +} + +/** + * @brief + * @rmtoll CCR4 FL_GPTIM_WriteCompareCH4 + * @param TIMx TIM instance + * @param compareValue + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_WriteCompareCH4(GPTIM_Type *TIMx, uint32_t compareValue) +{ + MODIFY_REG(TIMx->CCR4, (0xffffU << 0U), (compareValue << 0U)); +} + +/** + * @brief + * @rmtoll CCR4 FL_GPTIM_ReadCompareCH4 + * @param TIMx TIM instance + * @retval + */ +__STATIC_INLINE uint32_t FL_GPTIM_ReadCompareCH4(GPTIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->CCR4, 0xffffU) >> 0U); +} + +/** + * @brief + * @rmtoll DCR DBL FL_GPTIM_SetDMABurstLength + * @param TIMx TIM instance + * @param length This parameter can be one of the following values: + * @arg @ref FL_GPTIM_DMA_BURST_LENGTH_1 + * @arg @ref FL_GPTIM_DMA_BURST_LENGTH_2 + * @arg @ref FL_GPTIM_DMA_BURST_LENGTH_3 + * @arg @ref FL_GPTIM_DMA_BURST_LENGTH_4 + * @arg @ref FL_GPTIM_DMA_BURST_LENGTH_5 + * @arg @ref FL_GPTIM_DMA_BURST_LENGTH_6 + * @arg @ref FL_GPTIM_DMA_BURST_LENGTH_7 + * @arg @ref FL_GPTIM_DMA_BURST_LENGTH_8 + * @arg @ref FL_GPTIM_DMA_BURST_LENGTH_9 + * @arg @ref FL_GPTIM_DMA_BURST_LENGTH_10 + * @arg @ref FL_GPTIM_DMA_BURST_LENGTH_11 + * @arg @ref FL_GPTIM_DMA_BURST_LENGTH_12 + * @arg @ref FL_GPTIM_DMA_BURST_LENGTH_13 + * @arg @ref FL_GPTIM_DMA_BURST_LENGTH_14 + * @arg @ref FL_GPTIM_DMA_BURST_LENGTH_15 + * @arg @ref FL_GPTIM_DMA_BURST_LENGTH_16 + * @arg @ref FL_GPTIM_DMA_BURST_LENGTH_17 + * @arg @ref FL_GPTIM_DMA_BURST_LENGTH_18 + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_SetDMABurstLength(GPTIM_Type *TIMx, uint32_t length) +{ + MODIFY_REG(TIMx->DCR, GPTIM_DCR_DBL_Msk, length); +} + +/** + * @brief + * @rmtoll DCR DBL FL_GPTIM_GetDMABurstLength + * @param TIMx TIM instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_GPTIM_DMA_BURST_LENGTH_1 + * @arg @ref FL_GPTIM_DMA_BURST_LENGTH_2 + * @arg @ref FL_GPTIM_DMA_BURST_LENGTH_3 + * @arg @ref FL_GPTIM_DMA_BURST_LENGTH_4 + * @arg @ref FL_GPTIM_DMA_BURST_LENGTH_5 + * @arg @ref FL_GPTIM_DMA_BURST_LENGTH_6 + * @arg @ref FL_GPTIM_DMA_BURST_LENGTH_7 + * @arg @ref FL_GPTIM_DMA_BURST_LENGTH_8 + * @arg @ref FL_GPTIM_DMA_BURST_LENGTH_9 + * @arg @ref FL_GPTIM_DMA_BURST_LENGTH_10 + * @arg @ref FL_GPTIM_DMA_BURST_LENGTH_11 + * @arg @ref FL_GPTIM_DMA_BURST_LENGTH_12 + * @arg @ref FL_GPTIM_DMA_BURST_LENGTH_13 + * @arg @ref FL_GPTIM_DMA_BURST_LENGTH_14 + * @arg @ref FL_GPTIM_DMA_BURST_LENGTH_15 + * @arg @ref FL_GPTIM_DMA_BURST_LENGTH_16 + * @arg @ref FL_GPTIM_DMA_BURST_LENGTH_17 + * @arg @ref FL_GPTIM_DMA_BURST_LENGTH_18 + */ +__STATIC_INLINE uint32_t FL_GPTIM_GetDMABurstLength(GPTIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->DCR, GPTIM_DCR_DBL_Msk)); +} + +/** + * @brief + * @rmtoll DCR DBA FL_GPTIM_SetDMABurstAddress + * @param TIMx TIM instance + * @param address This parameter can be one of the following values: + * @arg @ref FL_GPTIM_DMA_BURST_ADDR_CR1 + * @arg @ref FL_GPTIM_DMA_BURST_ADDR_CR2 + * @arg @ref FL_GPTIM_DMA_BURST_ADDR_SMCR + * @arg @ref FL_GPTIM_DMA_BURST_ADDR_DIER + * @arg @ref FL_GPTIM_DMA_BURST_ADDR_SR + * @arg @ref FL_GPTIM_DMA_BURST_ADDR_EGR + * @arg @ref FL_GPTIM_DMA_BURST_ADDR_CCMR1 + * @arg @ref FL_GPTIM_DMA_BURST_ADDR_CCMR2 + * @arg @ref FL_GPTIM_DMA_BURST_ADDR_CCER + * @arg @ref FL_GPTIM_DMA_BURST_ADDR_CNT + * @arg @ref FL_GPTIM_DMA_BURST_ADDR_PSC + * @arg @ref FL_GPTIM_DMA_BURST_ADDR_ARR + * @arg @ref FL_GPTIM_DMA_BURST_ADDR_RCR + * @arg @ref FL_GPTIM_DMA_BURST_ADDR_CCR1 + * @arg @ref FL_GPTIM_DMA_BURST_ADDR_CCR2 + * @arg @ref FL_GPTIM_DMA_BURST_ADDR_CCR3 + * @arg @ref FL_GPTIM_DMA_BURST_ADDR_CCR4 + * @arg @ref FL_GPTIM_DMA_BURST_ADDR_BDTR + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_SetDMABurstAddress(GPTIM_Type *TIMx, uint32_t address) +{ + MODIFY_REG(TIMx->DCR, GPTIM_DCR_DBA_Msk, address); +} + +/** + * @brief + * @rmtoll DCR DBA FL_GPTIM_GetDMABurstAddress + * @param TIMx TIM instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_GPTIM_DMA_BURST_ADDR_CR1 + * @arg @ref FL_GPTIM_DMA_BURST_ADDR_CR2 + * @arg @ref FL_GPTIM_DMA_BURST_ADDR_SMCR + * @arg @ref FL_GPTIM_DMA_BURST_ADDR_DIER + * @arg @ref FL_GPTIM_DMA_BURST_ADDR_SR + * @arg @ref FL_GPTIM_DMA_BURST_ADDR_EGR + * @arg @ref FL_GPTIM_DMA_BURST_ADDR_CCMR1 + * @arg @ref FL_GPTIM_DMA_BURST_ADDR_CCMR2 + * @arg @ref FL_GPTIM_DMA_BURST_ADDR_CCER + * @arg @ref FL_GPTIM_DMA_BURST_ADDR_CNT + * @arg @ref FL_GPTIM_DMA_BURST_ADDR_PSC + * @arg @ref FL_GPTIM_DMA_BURST_ADDR_ARR + * @arg @ref FL_GPTIM_DMA_BURST_ADDR_RCR + * @arg @ref FL_GPTIM_DMA_BURST_ADDR_CCR1 + * @arg @ref FL_GPTIM_DMA_BURST_ADDR_CCR2 + * @arg @ref FL_GPTIM_DMA_BURST_ADDR_CCR3 + * @arg @ref FL_GPTIM_DMA_BURST_ADDR_CCR4 + * @arg @ref FL_GPTIM_DMA_BURST_ADDR_BDTR + */ +__STATIC_INLINE uint32_t FL_GPTIM_GetDMABurstAddress(GPTIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->DCR, GPTIM_DCR_DBA_Msk)); +} + +/** + * @brief + * @rmtoll DMAR FL_GPTIM_WriteDMAAddress + * @param TIMx TIM instance + * @param address + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_WriteDMAAddress(GPTIM_Type *TIMx, uint32_t address) +{ + MODIFY_REG(TIMx->DMAR, (0xffffU << 0U), (address << 0U)); +} + +/** + * @brief + * @rmtoll DMAR FL_GPTIM_ReadDMAAddress + * @param TIMx TIM instance + * @retval + */ +__STATIC_INLINE uint32_t FL_GPTIM_ReadDMAAddress(GPTIM_Type *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->DMAR, 0xffffU) >> 0U); +} + +/** + * @brief + * @rmtoll ITRSEL FL_GPTIM_SetITRInput + * @param TIMx TIM instance + * @param ITRx This parameter can be one of the following values: + * @arg @ref FL_GPTIM_ITR0 + * @arg @ref FL_GPTIM_ITR1 + * @arg @ref FL_GPTIM_ITR2 + * @arg @ref FL_GPTIM_ITR3 + * @param input This parameter can be one of the following values: + * @arg @ref FL_GPTIM_ITRSEL_GROUP0 + * @arg @ref FL_GPTIM_ITRSEL_GROUP1 + * @arg @ref FL_GPTIM_ITRSEL_GROUP2 + * @arg @ref FL_GPTIM_ITRSEL_GROUP3 + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_SetITRInput(GPTIM_Type *TIMx, uint32_t ITRx, uint32_t input) +{ + MODIFY_REG(TIMx->ITRSEL, ((ITRx * ITRx) * GPTIM_ITRSEL), ((ITRx * ITRx) * input)); +} + +/** + * @brief + * @rmtoll ITRSEL FL_GPTIM_GetITRInput + * @param TIMx TIM instance + * @param ITRx This parameter can be one of the following values: + * @arg @ref FL_GPTIM_ITR0 + * @arg @ref FL_GPTIM_ITR1 + * @arg @ref FL_GPTIM_ITR2 + * @arg @ref FL_GPTIM_ITR3 + * @retval Returned value can be one of the following values: + * @arg @ref FL_GPTIM_ITRSEL_GROUP0 + * @arg @ref FL_GPTIM_ITRSEL_GROUP1 + * @arg @ref FL_GPTIM_ITRSEL_GROUP2 + * @arg @ref FL_GPTIM_ITRSEL_GROUP3 + */ +__STATIC_INLINE uint32_t FL_GPTIM_GetITRInput(GPTIM_Type *TIMx, uint32_t ITRx) +{ + return (uint32_t)(READ_BIT(TIMx->ITRSEL, ((ITRx * ITRx) * GPTIM_ITRSEL)) / (ITRx * ITRx)); +} + +/** + * @brief OCx clear enable + * @rmtoll CCMR OCCE FL_GPTIM_OC_EnableClear + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_GPTIM_CHANNEL_1 + * @arg @ref FL_GPTIM_CHANNEL_2 + * @arg @ref FL_GPTIM_CHANNEL_3 + * @arg @ref FL_GPTIM_CHANNEL_4 + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_OC_EnableClear(GPTIM_Type *TIMx, uint32_t channel) +{ + switch(channel) + { + case FL_GPTIM_CHANNEL_1: + MODIFY_REG(TIMx->CCMR1, (0x1U << 7U), (0x1U << 7U)); + break; + case FL_GPTIM_CHANNEL_2: + MODIFY_REG(TIMx->CCMR1, (0x1U << 15U), (0x1U << 15U)); + break; + case FL_GPTIM_CHANNEL_3: + MODIFY_REG(TIMx->CCMR2, (0x1U << 7U), (0x1U << 7U)); + break; + case FL_GPTIM_CHANNEL_4: + MODIFY_REG(TIMx->CCMR2, (0x1U << 15U), (0x1U << 15U)); + break; + } +} + +/** + * @brief Get OCx Clear enable status + * @rmtoll CCMR OCCE FL_GPTIM_OC_IsEnabledClear + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_GPTIM_CHANNEL_1 + * @arg @ref FL_GPTIM_CHANNEL_2 + * @arg @ref FL_GPTIM_CHANNEL_3 + * @arg @ref FL_GPTIM_CHANNEL_4 + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_GPTIM_OC_IsEnabledClear(GPTIM_Type *TIMx, uint32_t channel) +{ + switch(channel) + { + case FL_GPTIM_CHANNEL_1: + return (uint32_t)(READ_BIT(TIMx->CCMR1, (0x1Ul << 7U)) >> 7U); + case FL_GPTIM_CHANNEL_2: + return (uint32_t)(READ_BIT(TIMx->CCMR1, (0x1Ul << 15U)) >> 15U); + case FL_GPTIM_CHANNEL_3: + return (uint32_t)(READ_BIT(TIMx->CCMR2, (0x1Ul << 7U)) >> 7U); + case FL_GPTIM_CHANNEL_4: + return (uint32_t)(READ_BIT(TIMx->CCMR2, (0x1Ul << 15U)) >> 15U); + default: + return 0; + } +} + +/** + * @brief OCx clear disable + * @rmtoll CCMR OCCE FL_GPTIM_OC_DisableClear + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_GPTIM_CHANNEL_1 + * @arg @ref FL_GPTIM_CHANNEL_2 + * @arg @ref FL_GPTIM_CHANNEL_3 + * @arg @ref FL_GPTIM_CHANNEL_4 + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_OC_DisableClear(GPTIM_Type *TIMx, uint32_t channel) +{ + switch(channel) + { + case FL_GPTIM_CHANNEL_1: + CLEAR_BIT(TIMx->CCMR1, (0x1U << 7U)); + break; + case FL_GPTIM_CHANNEL_2: + CLEAR_BIT(TIMx->CCMR1, (0x1U << 15U)); + break; + case FL_GPTIM_CHANNEL_3: + CLEAR_BIT(TIMx->CCMR2, (0x1U << 7U)); + break; + case FL_GPTIM_CHANNEL_4: + CLEAR_BIT(TIMx->CCMR2, (0x1U << 15U)); + break; + } +} + +/** + * @brief Set OCx mode + * @rmtoll CCMR OCM FL_GPTIM_OC_SetMode + * @param TIMx TIM instance + * @param mode This parameter can be one of the following values: + * @arg @ref FL_GPTIM_OC_MODE_FROZEN + * @arg @ref FL_GPTIM_OC_MODE_ACTIVE + * @arg @ref FL_GPTIM_OC_MODE_INACTIVE + * @arg @ref FL_GPTIM_OC_MODE_TOGGLE + * @arg @ref FL_GPTIM_OC_MODE_FORCED_INACTIVE + * @arg @ref FL_GPTIM_OC_MODE_FORCED_ACTIVE + * @arg @ref FL_GPTIM_OC_MODE_PWM1 + * @arg @ref FL_GPTIM_OC_MODE_PWM2 + * @param channel This parameter can be one of the following values: + * @arg @ref FL_GPTIM_CHANNEL_1 + * @arg @ref FL_GPTIM_CHANNEL_2 + * @arg @ref FL_GPTIM_CHANNEL_3 + * @arg @ref FL_GPTIM_CHANNEL_4 + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_OC_SetMode(GPTIM_Type *TIMx, uint32_t mode, uint32_t channel) +{ + switch(channel) + { + case FL_GPTIM_CHANNEL_1: + MODIFY_REG(TIMx->CCMR1, (0x7U << 4U), (mode)); + break; + case FL_GPTIM_CHANNEL_2: + MODIFY_REG(TIMx->CCMR1, (0x7U << 12U), (mode << 8U)); + break; + case FL_GPTIM_CHANNEL_3: + MODIFY_REG(TIMx->CCMR2, (0x7U << 4U), (mode)); + break; + case FL_GPTIM_CHANNEL_4: + MODIFY_REG(TIMx->CCMR2, (0x7U << 12U), (mode << 8U)); + break; + } +} + +/** + * @brief Get OCx mode value + * @rmtoll CCMR OCM FL_GPTIM_OC_GetMode + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_GPTIM_CHANNEL_1 + * @arg @ref FL_GPTIM_CHANNEL_2 + * @arg @ref FL_GPTIM_CHANNEL_3 + * @arg @ref FL_GPTIM_CHANNEL_4 + * @retval Returned value can be one of the following values: + * @arg @ref FL_GPTIM_OC_MODE_FROZEN + * @arg @ref FL_GPTIM_OC_MODE_ACTIVE + * @arg @ref FL_GPTIM_OC_MODE_INACTIVE + * @arg @ref FL_GPTIM_OC_MODE_TOGGLE + * @arg @ref FL_GPTIM_OC_MODE_FORCED_INACTIVE + * @arg @ref FL_GPTIM_OC_MODE_FORCED_ACTIVE + * @arg @ref FL_GPTIM_OC_MODE_PWM1 + * @arg @ref FL_GPTIM_OC_MODE_PWM2 + */ +__STATIC_INLINE uint32_t FL_GPTIM_OC_GetMode(GPTIM_Type *TIMx, uint32_t channel) +{ + switch(channel) + { + case FL_GPTIM_CHANNEL_1: + return (uint32_t)(READ_BIT(TIMx->CCMR1, (0x7U << 4U)) >> 0U); + case FL_GPTIM_CHANNEL_2: + return (uint32_t)(READ_BIT(TIMx->CCMR1, (0x7U << 12U)) >> 8U); + case FL_GPTIM_CHANNEL_3: + return (uint32_t)(READ_BIT(TIMx->CCMR2, (0x7U << 4U)) >> 0U); + case FL_GPTIM_CHANNEL_4: + return (uint32_t)(READ_BIT(TIMx->CCMR2, (0x7U << 12U)) >> 8U); + default: + return 0; + } +} + +/** + * @brief + * @rmtoll CCMR OCPE FL_GPTIM_OC_EnablePreload + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_GPTIM_CHANNEL_1 + * @arg @ref FL_GPTIM_CHANNEL_2 + * @arg @ref FL_GPTIM_CHANNEL_3 + * @arg @ref FL_GPTIM_CHANNEL_4 + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_OC_EnablePreload(GPTIM_Type *TIMx, uint32_t channel) +{ + switch(channel) + { + case FL_GPTIM_CHANNEL_1: + SET_BIT(TIMx->CCMR1, (0x1U << 3U)); + break; + case FL_GPTIM_CHANNEL_2: + SET_BIT(TIMx->CCMR1, (0x1U << 11U)); + break; + case FL_GPTIM_CHANNEL_3: + SET_BIT(TIMx->CCMR2, (0x1U << 3U)); + break; + case FL_GPTIM_CHANNEL_4: + SET_BIT(TIMx->CCMR2, (0x1U << 11U)); + break; + } +} + +/** + * @brief + * @rmtoll CCMR OCPE FL_GPTIM_OC_IsEnabledPreload + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_GPTIM_CHANNEL_1 + * @arg @ref FL_GPTIM_CHANNEL_2 + * @arg @ref FL_GPTIM_CHANNEL_3 + * @arg @ref FL_GPTIM_CHANNEL_4 + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_GPTIM_OC_IsEnabledPreload(GPTIM_Type *TIMx, uint32_t channel) +{ + switch(channel) + { + case FL_GPTIM_CHANNEL_1: + return (uint32_t)(READ_BIT(TIMx->CCMR1, (0x1Ul << 3U)) >> 3U); + case FL_GPTIM_CHANNEL_2: + return (uint32_t)(READ_BIT(TIMx->CCMR1, (0x1Ul << 11U)) >> 11U); + case FL_GPTIM_CHANNEL_3: + return (uint32_t)(READ_BIT(TIMx->CCMR2, (0x1Ul << 3U)) >> 3U); + case FL_GPTIM_CHANNEL_4: + return (uint32_t)(READ_BIT(TIMx->CCMR2, (0x1Ul << 11U)) >> 11U); + default: + return 0; + } +} + +/** + * @brief + * @rmtoll CCMR OCPE FL_GPTIM_OC_DisablePreload + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_GPTIM_CHANNEL_1 + * @arg @ref FL_GPTIM_CHANNEL_2 + * @arg @ref FL_GPTIM_CHANNEL_3 + * @arg @ref FL_GPTIM_CHANNEL_4 + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_OC_DisablePreload(GPTIM_Type *TIMx, uint32_t channel) +{ + switch(channel) + { + case FL_GPTIM_CHANNEL_1: + CLEAR_BIT(TIMx->CCMR1, (0x1U << 3U)); + break; + case FL_GPTIM_CHANNEL_2: + CLEAR_BIT(TIMx->CCMR1, (0x1U << 11U)); + break; + case FL_GPTIM_CHANNEL_3: + CLEAR_BIT(TIMx->CCMR2, (0x1U << 3U)); + break; + case FL_GPTIM_CHANNEL_4: + CLEAR_BIT(TIMx->CCMR2, (0x1U << 11U)); + break; + } +} + +/** + * @brief + * @rmtoll CCMR OCFE FL_GPTIM_OC_EnableFastMode + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_GPTIM_CHANNEL_1 + * @arg @ref FL_GPTIM_CHANNEL_2 + * @arg @ref FL_GPTIM_CHANNEL_3 + * @arg @ref FL_GPTIM_CHANNEL_4 + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_OC_EnableFastMode(GPTIM_Type *TIMx, uint32_t channel) +{ + switch(channel) + { + case FL_GPTIM_CHANNEL_1: + SET_BIT(TIMx->CCMR1, (0x1Ul << 2U)); + break; + case FL_GPTIM_CHANNEL_2: + SET_BIT(TIMx->CCMR1, (0x1Ul << 10U)); + break; + case FL_GPTIM_CHANNEL_3: + SET_BIT(TIMx->CCMR2, (0x1Ul << 2U)); + break; + case FL_GPTIM_CHANNEL_4: + SET_BIT(TIMx->CCMR2, (0x1Ul << 10U)); + break; + } +} + +/** + * @brief + * @rmtoll CCMR OCFE FL_GPTIM_OC_IsEnabledFastMode + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_GPTIM_CHANNEL_1 + * @arg @ref FL_GPTIM_CHANNEL_2 + * @arg @ref FL_GPTIM_CHANNEL_3 + * @arg @ref FL_GPTIM_CHANNEL_4 + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_GPTIM_OC_IsEnabledFastMode(GPTIM_Type *TIMx, uint32_t channel) +{ + switch(channel) + { + case FL_GPTIM_CHANNEL_1: + return (uint32_t)(READ_BIT(TIMx->CCMR1, (0x1Ul << 2U)) >> 2U); + case FL_GPTIM_CHANNEL_2: + return (uint32_t)(READ_BIT(TIMx->CCMR1, (0x1Ul << 10U)) >> 10U); + case FL_GPTIM_CHANNEL_3: + return (uint32_t)(READ_BIT(TIMx->CCMR2, (0x1Ul << 2U)) >> 2U); + case FL_GPTIM_CHANNEL_4: + return (uint32_t)(READ_BIT(TIMx->CCMR2, (0x1Ul << 10U)) >> 10U); + default: + return 0; + } +} + +/** + * @brief + * @rmtoll CCMR OCFE FL_GPTIM_OC_DisableFastMode + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_GPTIM_CHANNEL_1 + * @arg @ref FL_GPTIM_CHANNEL_2 + * @arg @ref FL_GPTIM_CHANNEL_3 + * @arg @ref FL_GPTIM_CHANNEL_4 + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_OC_DisableFastMode(GPTIM_Type *TIMx, uint32_t channel) +{ + switch(channel) + { + case FL_GPTIM_CHANNEL_1: + CLEAR_BIT(TIMx->CCMR1, (0x1U << 2U)); + break; + case FL_GPTIM_CHANNEL_2: + CLEAR_BIT(TIMx->CCMR1, (0x1U << 10U)); + break; + case FL_GPTIM_CHANNEL_3: + CLEAR_BIT(TIMx->CCMR2, (0x1U << 2U)); + break; + case FL_GPTIM_CHANNEL_4: + CLEAR_BIT(TIMx->CCMR2, (0x1U << 10U)); + break; + } +} + +/** + * @brief + * @rmtoll CCMR ICF FL_GPTIM_IC_SetFilter + * @param TIMx TIM instance + * @param filter This parameter can be one of the following values: + * @arg @ref FL_GPTIM_IC_FILTER_DIV1 + * @arg @ref FL_GPTIM_IC_FILTER_DIV1_N2 + * @arg @ref FL_GPTIM_IC_FILTER_DIV1_N4 + * @arg @ref FL_GPTIM_IC_FILTER_DIV1_N8 + * @arg @ref FL_GPTIM_IC_FILTER_DIV2_N6 + * @arg @ref FL_GPTIM_IC_FILTER_DIV2_N8 + * @arg @ref FL_GPTIM_IC_FILTER_DIV4_N6 + * @arg @ref FL_GPTIM_IC_FILTER_DIV4_N8 + * @arg @ref FL_GPTIM_IC_FILTER_DIV8_N6 + * @arg @ref FL_GPTIM_IC_FILTER_DIV8_N8 + * @arg @ref FL_GPTIM_IC_FILTER_DIV16_N5 + * @arg @ref FL_GPTIM_IC_FILTER_DIV16_N6 + * @arg @ref FL_GPTIM_IC_FILTER_DIV16_N8 + * @arg @ref FL_GPTIM_IC_FILTER_DIV32_N5 + * @arg @ref FL_GPTIM_IC_FILTER_DIV32_N6 + * @arg @ref FL_GPTIM_IC_FILTER_DIV32_N8 + * @param channel This parameter can be one of the following values: + * @arg @ref FL_GPTIM_CHANNEL_1 + * @arg @ref FL_GPTIM_CHANNEL_2 + * @arg @ref FL_GPTIM_CHANNEL_3 + * @arg @ref FL_GPTIM_CHANNEL_4 + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_IC_SetFilter(GPTIM_Type *TIMx, uint32_t filter, uint32_t channel) +{ + switch(channel) + { + case FL_GPTIM_CHANNEL_1: + MODIFY_REG(TIMx->CCMR1, (0xFU << 4U), (filter)); + break; + case FL_GPTIM_CHANNEL_2: + MODIFY_REG(TIMx->CCMR1, (0xFU << 12U), (filter << 8U)); + break; + case FL_GPTIM_CHANNEL_3: + MODIFY_REG(TIMx->CCMR2, (0xFU << 4U), (filter)); + break; + case FL_GPTIM_CHANNEL_4: + MODIFY_REG(TIMx->CCMR2, (0xFU << 12U), (filter << 8U)); + break; + } +} + +/** + * @brief + * @rmtoll CCMR ICF FL_GPTIM_IC_GetFilter + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_GPTIM_CHANNEL_1 + * @arg @ref FL_GPTIM_CHANNEL_2 + * @arg @ref FL_GPTIM_CHANNEL_3 + * @arg @ref FL_GPTIM_CHANNEL_4 + * @retval Returned value can be one of the following values: + * @arg @ref FL_GPTIM_IC_FILTER_DIV1 + * @arg @ref FL_GPTIM_IC_FILTER_DIV1_N2 + * @arg @ref FL_GPTIM_IC_FILTER_DIV1_N4 + * @arg @ref FL_GPTIM_IC_FILTER_DIV1_N8 + * @arg @ref FL_GPTIM_IC_FILTER_DIV2_N6 + * @arg @ref FL_GPTIM_IC_FILTER_DIV2_N8 + * @arg @ref FL_GPTIM_IC_FILTER_DIV4_N6 + * @arg @ref FL_GPTIM_IC_FILTER_DIV4_N8 + * @arg @ref FL_GPTIM_IC_FILTER_DIV8_N6 + * @arg @ref FL_GPTIM_IC_FILTER_DIV8_N8 + * @arg @ref FL_GPTIM_IC_FILTER_DIV16_N5 + * @arg @ref FL_GPTIM_IC_FILTER_DIV16_N6 + * @arg @ref FL_GPTIM_IC_FILTER_DIV16_N8 + * @arg @ref FL_GPTIM_IC_FILTER_DIV32_N5 + * @arg @ref FL_GPTIM_IC_FILTER_DIV32_N6 + * @arg @ref FL_GPTIM_IC_FILTER_DIV32_N8 + */ +__STATIC_INLINE uint32_t FL_GPTIM_IC_GetFilter(GPTIM_Type *TIMx, uint32_t channel) +{ + switch(channel) + { + case FL_GPTIM_CHANNEL_1: + return (uint32_t)(READ_BIT(TIMx->CCMR1, (0xFU << 4U)) >> 0U); + case FL_GPTIM_CHANNEL_2: + return (uint32_t)(READ_BIT(TIMx->CCMR1, (0xFU << 12U)) >> 8U); + case FL_GPTIM_CHANNEL_3: + return (uint32_t)(READ_BIT(TIMx->CCMR2, (0xFU << 4U)) >> 0U); + case FL_GPTIM_CHANNEL_4: + return (uint32_t)(READ_BIT(TIMx->CCMR2, (0xFU << 12U)) >> 8U); + default: + return 0; + } +} + +/** + * @brief + * @rmtoll CCMR ICPSC FL_GPTIM_IC_SetPrescaler + * @param TIMx TIM instance + * @param psc This parameter can be one of the following values: + * @arg @ref FL_GPTIM_IC_PSC_DIV1 + * @arg @ref FL_GPTIM_IC_PSC_DIV2 + * @arg @ref FL_GPTIM_IC_PSC_DIV4 + * @arg @ref FL_GPTIM_IC_PSC_DIV8 + * @param channel This parameter can be one of the following values: + * @arg @ref FL_GPTIM_CHANNEL_1 + * @arg @ref FL_GPTIM_CHANNEL_2 + * @arg @ref FL_GPTIM_CHANNEL_3 + * @arg @ref FL_GPTIM_CHANNEL_4 + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_IC_SetPrescaler(GPTIM_Type *TIMx, uint32_t psc, uint32_t channel) +{ + switch(channel) + { + case FL_GPTIM_CHANNEL_1: + MODIFY_REG(TIMx->CCMR1, (0x3U << 2U), (psc)); + break; + case FL_GPTIM_CHANNEL_2: + MODIFY_REG(TIMx->CCMR1, (0x3U << 10U), (psc << 8U)); + break; + case FL_GPTIM_CHANNEL_3: + MODIFY_REG(TIMx->CCMR2, (0x3U << 2U), (psc)); + break; + case FL_GPTIM_CHANNEL_4: + MODIFY_REG(TIMx->CCMR2, (0x3U << 10U), (psc << 8U)); + break; + } +} + +/** + * @brief + * @rmtoll CCMR ICPSC FL_GPTIM_IC_GetPrescaler + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_GPTIM_CHANNEL_1 + * @arg @ref FL_GPTIM_CHANNEL_2 + * @arg @ref FL_GPTIM_CHANNEL_3 + * @arg @ref FL_GPTIM_CHANNEL_4 + * @retval Returned value can be one of the following values: + * @arg @ref FL_GPTIM_IC_PSC_DIV1 + * @arg @ref FL_GPTIM_IC_PSC_DIV2 + * @arg @ref FL_GPTIM_IC_PSC_DIV4 + * @arg @ref FL_GPTIM_IC_PSC_DIV8 + */ +__STATIC_INLINE uint32_t FL_GPTIM_IC_GetPrescaler(GPTIM_Type *TIMx, uint32_t channel) +{ + switch(channel) + { + case FL_GPTIM_CHANNEL_1: + return (uint32_t)(READ_BIT(TIMx->CCMR1, (0x3UL << 2U)) >> 0U); + case FL_GPTIM_CHANNEL_2: + return (uint32_t)(READ_BIT(TIMx->CCMR1, (0x3UL << 10U)) >> 8U); + case FL_GPTIM_CHANNEL_3: + return (uint32_t)(READ_BIT(TIMx->CCMR2, (0x3UL << 2U)) >> 0U); + case FL_GPTIM_CHANNEL_4: + return (uint32_t)(READ_BIT(TIMx->CCMR2, (0x3UL << 10U)) >> 8U); + default: + return 0; + } +} + +/** + * @brief + * @rmtoll CCMR CCS FL_GPTIM_CC_SetChannelMode + * @param TIMx TIM instance + * @param mode This parameter can be one of the following values: + * @arg @ref FL_GPTIM_CHANNEL_MODE_OUTPUT + * @arg @ref FL_GPTIM_CHANNEL_MODE_INPUT_NORMAL + * @arg @ref FL_GPTIM_CHANNEL_MODE_INPUT_CROSSOVER + * @arg @ref FL_GPTIM_CHANNEL_MODE_INPUT_TRC + * @param channel This parameter can be one of the following values: + * @arg @ref FL_GPTIM_CHANNEL_1 + * @arg @ref FL_GPTIM_CHANNEL_2 + * @arg @ref FL_GPTIM_CHANNEL_3 + * @arg @ref FL_GPTIM_CHANNEL_4 + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_CC_SetChannelMode(GPTIM_Type *TIMx, uint32_t mode, uint32_t channel) +{ + switch(channel) + { + case FL_GPTIM_CHANNEL_1: + MODIFY_REG(TIMx->CCMR1, (0x3U << 0U), (mode)); + break; + case FL_GPTIM_CHANNEL_2: + MODIFY_REG(TIMx->CCMR1, (0x3U << 8U), (mode << 8U)); + break; + case FL_GPTIM_CHANNEL_3: + MODIFY_REG(TIMx->CCMR2, (0x3U << 0U), (mode)); + break; + case FL_GPTIM_CHANNEL_4: + MODIFY_REG(TIMx->CCMR2, (0x3U << 8U), (mode << 8U)); + break; + } +} + +/** + * @brief + * @rmtoll CCMR CCS FL_GPTIM_CC_GetChannelMode + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_GPTIM_CHANNEL_1 + * @arg @ref FL_GPTIM_CHANNEL_2 + * @arg @ref FL_GPTIM_CHANNEL_3 + * @arg @ref FL_GPTIM_CHANNEL_4 + * @retval Returned value can be one of the following values: + * @arg @ref FL_GPTIM_CHANNEL_MODE_OUTPUT + * @arg @ref FL_GPTIM_CHANNEL_MODE_INPUT_NORMAL + * @arg @ref FL_GPTIM_CHANNEL_MODE_INPUT_CROSSOVER + * @arg @ref FL_GPTIM_CHANNEL_MODE_INPUT_TRC + */ +__STATIC_INLINE uint32_t FL_GPTIM_CC_GetChannelMode(GPTIM_Type *TIMx, uint32_t channel) +{ + switch(channel) + { + case FL_GPTIM_CHANNEL_1: + return (uint32_t)(READ_BIT(TIMx->CCMR1, (0x3U << 0U)) >> 0U); + case FL_GPTIM_CHANNEL_2: + return (uint32_t)(READ_BIT(TIMx->CCMR1, (0x3U << 8U)) >> 8U); + case FL_GPTIM_CHANNEL_3: + return (uint32_t)(READ_BIT(TIMx->CCMR2, (0x3U << 0U)) >> 0U); + case FL_GPTIM_CHANNEL_4: + return (uint32_t)(READ_BIT(TIMx->CCMR2, (0x3U << 8U)) >> 8U); + default: + return 0; + } +} + +/** + * @brief + * @rmtoll CCER CCOP FL_GPTIM_OC_SetChannelPolarity + * @param TIMx TIM instance + * @param polarity This parameter can be one of the following values: + * @arg @ref FL_GPTIM_OC_POLARITY_NORMAL + * @arg @ref FL_GPTIM_OC_POLARITY_INVERT + * @param channel This parameter can be one of the following values: + * @arg @ref FL_GPTIM_CHANNEL_1 + * @arg @ref FL_GPTIM_CHANNEL_2 + * @arg @ref FL_GPTIM_CHANNEL_3 + * @arg @ref FL_GPTIM_CHANNEL_4 + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_OC_SetChannelPolarity(GPTIM_Type *TIMx, uint32_t polarity, uint32_t channel) +{ + switch(channel) + { + case FL_GPTIM_CHANNEL_1: + MODIFY_REG(TIMx->CCER, (0x1U << 1U), (polarity)); + break; + case FL_GPTIM_CHANNEL_2: + MODIFY_REG(TIMx->CCER, (0x1U << 5U), (polarity << 4U)); + break; + case FL_GPTIM_CHANNEL_3: + MODIFY_REG(TIMx->CCER, (0x1U << 9U), (polarity << 8U)); + break; + case FL_GPTIM_CHANNEL_4: + MODIFY_REG(TIMx->CCER, (0x1U << 13U), (polarity << 12U)); + break; + } +} + +/** + * @brief + * @rmtoll CCER CCOP FL_GPTIM_OC_GetChannelPolarity + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_GPTIM_CHANNEL_1 + * @arg @ref FL_GPTIM_CHANNEL_2 + * @arg @ref FL_GPTIM_CHANNEL_3 + * @arg @ref FL_GPTIM_CHANNEL_4 + * @retval Returned value can be one of the following values: + * @arg @ref FL_GPTIM_OC_POLARITY_NORMAL + * @arg @ref FL_GPTIM_OC_POLARITY_INVERT + */ +__STATIC_INLINE uint32_t FL_GPTIM_OC_GetChannelPolarity(GPTIM_Type *TIMx, uint32_t channel) +{ + switch(channel) + { + case FL_GPTIM_CHANNEL_1: + return (uint32_t)(READ_BIT(TIMx->CCER, (0x1U << 1U)) >> 0U); + case FL_GPTIM_CHANNEL_2: + return (uint32_t)(READ_BIT(TIMx->CCER, (0x1U << 5U)) >> 4U); + case FL_GPTIM_CHANNEL_3: + return (uint32_t)(READ_BIT(TIMx->CCER, (0x1U << 9U)) >> 8U); + case FL_GPTIM_CHANNEL_4: + return (uint32_t)(READ_BIT(TIMx->CCER, (0x1U << 13U)) >> 12U); + default: + return 0; + } +} + +/** + * @brief + * @rmtoll CCER CCIP FL_GPTIM_IC_SetChannelPolarity + * @param TIMx TIM instance + * @param polarity This parameter can be one of the following values: + * @arg @ref FL_GPTIM_IC_POLARITY_NORMAL + * @arg @ref FL_GPTIM_IC_POLARITY_INVERT + * @param channel This parameter can be one of the following values: + * @arg @ref FL_GPTIM_CHANNEL_1 + * @arg @ref FL_GPTIM_CHANNEL_2 + * @arg @ref FL_GPTIM_CHANNEL_3 + * @arg @ref FL_GPTIM_CHANNEL_4 + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_IC_SetChannelPolarity(GPTIM_Type *TIMx, uint32_t polarity, uint32_t channel) +{ + switch(channel) + { + case FL_GPTIM_CHANNEL_1: + MODIFY_REG(TIMx->CCER, (0x1U << 1U), (polarity)); + break; + case FL_GPTIM_CHANNEL_2: + MODIFY_REG(TIMx->CCER, (0x1U << 5U), (polarity << 4U)); + break; + case FL_GPTIM_CHANNEL_3: + MODIFY_REG(TIMx->CCER, (0x1U << 9U), (polarity << 8U)); + break; + case FL_GPTIM_CHANNEL_4: + MODIFY_REG(TIMx->CCER, (0x1U << 13U), (polarity << 12U)); + break; + } +} + +/** + * @brief + * @rmtoll CCER CCIP FL_GPTIM_IC_GetChannelPolarity + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_GPTIM_CHANNEL_1 + * @arg @ref FL_GPTIM_CHANNEL_2 + * @arg @ref FL_GPTIM_CHANNEL_3 + * @arg @ref FL_GPTIM_CHANNEL_4 + * @retval Returned value can be one of the following values: + * @arg @ref FL_GPTIM_IC_POLARITY_NORMAL + * @arg @ref FL_GPTIM_IC_POLARITY_INVERT + */ +__STATIC_INLINE uint32_t FL_GPTIM_IC_GetChannelPolarity(GPTIM_Type *TIMx, uint32_t channel) +{ + switch(channel) + { + case FL_GPTIM_CHANNEL_1: + return (uint32_t)(READ_BIT(TIMx->CCER, (0x1U << 1U)) >> 0U); + case FL_GPTIM_CHANNEL_2: + return (uint32_t)(READ_BIT(TIMx->CCER, (0x1U << 5U)) >> 4U); + case FL_GPTIM_CHANNEL_3: + return (uint32_t)(READ_BIT(TIMx->CCER, (0x1U << 9U)) >> 8U); + case FL_GPTIM_CHANNEL_4: + return (uint32_t)(READ_BIT(TIMx->CCER, (0x1U << 13U)) >> 12U); + default: + return 0; + } +} + +/** + * @brief + * @rmtoll CCER CCE FL_GPTIM_OC_EnableChannel + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_GPTIM_CHANNEL_1 + * @arg @ref FL_GPTIM_CHANNEL_2 + * @arg @ref FL_GPTIM_CHANNEL_3 + * @arg @ref FL_GPTIM_CHANNEL_4 + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_OC_EnableChannel(GPTIM_Type *TIMx, uint32_t channel) +{ + switch(channel) + { + case FL_GPTIM_CHANNEL_1: + SET_BIT(TIMx->CCER, (0x1U << 0U)); + break; + case FL_GPTIM_CHANNEL_2: + SET_BIT(TIMx->CCER, (0x1U << 4U)); + break; + case FL_GPTIM_CHANNEL_3: + SET_BIT(TIMx->CCER, (0x1U << 8U)); + break; + case FL_GPTIM_CHANNEL_4: + SET_BIT(TIMx->CCER, (0x1U << 12U)); + break; + } +} + +/** + * @brief + * @rmtoll CCER CCE FL_GPTIM_OC_IsEnabledChannel + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_GPTIM_CHANNEL_1 + * @arg @ref FL_GPTIM_CHANNEL_2 + * @arg @ref FL_GPTIM_CHANNEL_3 + * @arg @ref FL_GPTIM_CHANNEL_4 + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_GPTIM_OC_IsEnabledChannel(GPTIM_Type *TIMx, uint32_t channel) +{ + switch(channel) + { + case FL_GPTIM_CHANNEL_1: + return (uint32_t)(READ_BIT(TIMx->CCER, (0x1Ul << 0U)) >> 0U); + case FL_GPTIM_CHANNEL_2: + return (uint32_t)(READ_BIT(TIMx->CCER, (0x1Ul << 4U)) >> 4U); + case FL_GPTIM_CHANNEL_3: + return (uint32_t)(READ_BIT(TIMx->CCER, (0x1Ul << 8U)) >> 8U); + case FL_GPTIM_CHANNEL_4: + return (uint32_t)(READ_BIT(TIMx->CCER, (0x1Ul << 12U)) >> 12U); + default: + return 0; + } +} + +/** + * @brief + * @rmtoll CCER CCE FL_GPTIM_OC_DisableChannel + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_GPTIM_CHANNEL_1 + * @arg @ref FL_GPTIM_CHANNEL_2 + * @arg @ref FL_GPTIM_CHANNEL_3 + * @arg @ref FL_GPTIM_CHANNEL_4 + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_OC_DisableChannel(GPTIM_Type *TIMx, uint32_t channel) +{ + switch(channel) + { + case FL_GPTIM_CHANNEL_1: + CLEAR_BIT(TIMx->CCER, (0x1U << 0U)); + break; + case FL_GPTIM_CHANNEL_2: + CLEAR_BIT(TIMx->CCER, (0x1U << 4U)); + break; + case FL_GPTIM_CHANNEL_3: + CLEAR_BIT(TIMx->CCER, (0x1U << 8U)); + break; + case FL_GPTIM_CHANNEL_4: + CLEAR_BIT(TIMx->CCER, (0x1U << 12U)); + break; + } +} + +/** + * @brief + * @rmtoll CCER CCE FL_GPTIM_IC_EnableChannel + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_GPTIM_CHANNEL_1 + * @arg @ref FL_GPTIM_CHANNEL_2 + * @arg @ref FL_GPTIM_CHANNEL_3 + * @arg @ref FL_GPTIM_CHANNEL_4 + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_IC_EnableChannel(GPTIM_Type *TIMx, uint32_t channel) +{ + switch(channel) + { + case FL_GPTIM_CHANNEL_1: + SET_BIT(TIMx->CCER, (0x1U << 0U)); + break; + case FL_GPTIM_CHANNEL_2: + SET_BIT(TIMx->CCER, (0x1U << 4U)); + break; + case FL_GPTIM_CHANNEL_3: + SET_BIT(TIMx->CCER, (0x1U << 8U)); + break; + case FL_GPTIM_CHANNEL_4: + SET_BIT(TIMx->CCER, (0x1U << 12U)); + break; + } +} + +/** + * @brief + * @rmtoll CCER CCE FL_GPTIM_IC_IsEnabledChannel + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_GPTIM_CHANNEL_1 + * @arg @ref FL_GPTIM_CHANNEL_2 + * @arg @ref FL_GPTIM_CHANNEL_3 + * @arg @ref FL_GPTIM_CHANNEL_4 + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_GPTIM_IC_IsEnabledChannel(GPTIM_Type *TIMx, uint32_t channel) +{ + switch(channel) + { + case FL_GPTIM_CHANNEL_1: + return (uint32_t)(READ_BIT(TIMx->CCER, (0x1U << 0U)) >> 0U); + case FL_GPTIM_CHANNEL_2: + return (uint32_t)(READ_BIT(TIMx->CCER, (0x1U << 4U)) >> 4U); + case FL_GPTIM_CHANNEL_3: + return (uint32_t)(READ_BIT(TIMx->CCER, (0x1U << 8U)) >> 8U); + case FL_GPTIM_CHANNEL_4: + return (uint32_t)(READ_BIT(TIMx->CCER, (0x1U << 12U)) >> 12U); + default: + return 0; + } +} + +/** + * @brief + * @rmtoll CCER CCE FL_GPTIM_IC_DisableChannel + * @param TIMx TIM instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_GPTIM_CHANNEL_1 + * @arg @ref FL_GPTIM_CHANNEL_2 + * @arg @ref FL_GPTIM_CHANNEL_3 + * @arg @ref FL_GPTIM_CHANNEL_4 + * @retval None + */ +__STATIC_INLINE void FL_GPTIM_IC_DisableChannel(GPTIM_Type *TIMx, uint32_t channel) +{ + switch(channel) + { + case FL_GPTIM_CHANNEL_1: + CLEAR_BIT(TIMx->CCER, (0x1U << 0U)); + break; + case FL_GPTIM_CHANNEL_2: + CLEAR_BIT(TIMx->CCER, (0x1U << 4U)); + break; + case FL_GPTIM_CHANNEL_3: + CLEAR_BIT(TIMx->CCER, (0x1U << 8U)); + break; + case FL_GPTIM_CHANNEL_4: + CLEAR_BIT(TIMx->CCER, (0x1U << 12U)); + break; + } +} + +/** + * @} + */ + +/** @defgroup GPTIM_FL_EF_Init Initialization and de-initialization functions + * @{ + */ +FL_ErrorStatus FL_GPTIM_DeInit(GPTIM_Type *TIMx); + +void FL_GPTIM_StructInit(FL_GPTIM_InitTypeDef *init); +void FL_GPTIM_SlaveMode_StructInit(FL_GPTIM_SlaveInitTypeDef *slave_init); +void FL_GPTIM_OC_StructInit(FL_GPTIM_OC_InitTypeDef *oc_init); +void FL_GPTIM_IC_StructInit(FL_GPTIM_IC_InitTypeDef *ic_init); +void FL_GPTIM_ETR_StructInit(FL_GPTIM_ETR_InitTypeDef *etr_init); + +FL_ErrorStatus FL_GPTIM_Init(GPTIM_Type *TIMx, FL_GPTIM_InitTypeDef *init); +FL_ErrorStatus FL_GPTIM_SlaveMode_Init(GPTIM_Type *TIMx, FL_GPTIM_SlaveInitTypeDef *slave_init); +FL_ErrorStatus FL_GPTIM_OC_Init(GPTIM_Type *TIMx, uint32_t channel, FL_GPTIM_OC_InitTypeDef *oc_init); +FL_ErrorStatus FL_GPTIM_IC_Init(GPTIM_Type *TIMx, uint32_t channel, FL_GPTIM_IC_InitTypeDef *ic_init); +FL_ErrorStatus FL_GPTIM_ETR_Init(GPTIM_Type *TIMx, FL_GPTIM_ETR_InitTypeDef *etr_init); + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif /* __FM33LG0XX_FL_GPTIM_H*/ + +/*************************Py_Code_Generator Version: 0.1-0.11-0.1 @ 2020-09-23*************************/ +/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/ diff --git a/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_i2c.h b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_i2c.h new file mode 100644 index 0000000..6919fc4 --- /dev/null +++ b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_i2c.h @@ -0,0 +1,1886 @@ + /** + ******************************************************************************************************* + * @file fm33lg0xx_fl_i2c.h + * @author FMSH Application Team + * @brief Head file of I2C FL Module + ******************************************************************************************************* + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + + + +/* Define to prevent recursive inclusion---------------------------------------------------------------*/ +#ifndef __FM33LG0XX_FL_I2C_H +#define __FM33LG0XX_FL_I2C_H + +#ifdef __cplusplus +extern "C" { +#endif +/* Includes -------------------------------------------------------------------------------------------*/ +#include "fm33lg0xx_fl_def.h" +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @defgroup I2C I2C + * @brief I2C FL driver + * @{ + */ + +/* Exported types -------------------------------------------------------------------------------------*/ +/** @defgroup I2C_FL_ES_INIT I2C Exported Init structures + * @{ + */ + +/** + * @brief FL I2C Init Sturcture definition + */ +typedef struct +{ + /** 主机时使用的时钟源*/ + uint32_t clockSource; + /** I2C通讯速率*/ + uint32_t baudRate; + +} FL_I2C_MasterMode_InitTypeDef; +/** + * @brief FL I2C Slavemode Init Sturcture definition + */ +typedef struct +{ + /** 从机模式从机地址 */ + uint32_t ownAddr; + /** 从机模式自动回应ACK */ + uint32_t ACK; + /** 从机模式地址位宽 */ + uint32_t ownAddrSize10bit; + /** 从机时钟延展*/ + uint32_t SCLSEN; + +} FL_I2C_SlaveMode_InitTypeDef; +/** + * @} + */ +/* Exported constants ---------------------------------------------------------------------------------*/ +/** @defgroup I2C_FL_Exported_Constants I2C Exported Constants + * @{ + */ + +#define I2C_MSPCFGR_MSPEN_Pos (0U) +#define I2C_MSPCFGR_MSPEN_Msk (0x1Ul << I2C_MSPCFGR_MSPEN_Pos) +#define I2C_MSPCFGR_MSPEN I2C_MSPCFGR_MSPEN_Msk + +#define I2C_MSPCFGR_TOEN_Pos (1U) +#define I2C_MSPCFGR_TOEN_Msk (0x1Ul << I2C_MSPCFGR_TOEN_Pos) +#define I2C_MSPCFGR_TOEN I2C_MSPCFGR_TOEN_Msk + +#define I2C_MSPCFGR_DMAEN_Pos (16U) +#define I2C_MSPCFGR_DMAEN_Msk (0x1Ul << I2C_MSPCFGR_DMAEN_Pos) +#define I2C_MSPCFGR_DMAEN I2C_MSPCFGR_DMAEN_Msk + +#define I2C_MSPCFGR_AUTOEND_Pos (17U) +#define I2C_MSPCFGR_AUTOEND_Msk (0x1Ul << I2C_MSPCFGR_AUTOEND_Pos) +#define I2C_MSPCFGR_AUTOEND I2C_MSPCFGR_AUTOEND_Msk + +#define I2C_MSPCR_RCEN_Pos (3U) +#define I2C_MSPCR_RCEN_Msk (0x1Ul << I2C_MSPCR_RCEN_Pos) +#define I2C_MSPCR_RCEN I2C_MSPCR_RCEN_Msk + +#define I2C_MSPCR_PEN_Pos (2U) +#define I2C_MSPCR_PEN_Msk (0x1Ul << I2C_MSPCR_PEN_Pos) +#define I2C_MSPCR_PEN I2C_MSPCR_PEN_Msk + +#define I2C_MSPCR_RSEN_Pos (1U) +#define I2C_MSPCR_RSEN_Msk (0x1Ul << I2C_MSPCR_RSEN_Pos) +#define I2C_MSPCR_RSEN I2C_MSPCR_RSEN_Msk + +#define I2C_MSPCR_SEN_Pos (0U) +#define I2C_MSPCR_SEN_Msk (0x1Ul << I2C_MSPCR_SEN_Pos) +#define I2C_MSPCR_SEN I2C_MSPCR_SEN_Msk + +#define I2C_MSPIER_WCOLIE_Pos (6U) +#define I2C_MSPIER_WCOLIE_Msk (0x1Ul << I2C_MSPIER_WCOLIE_Pos) +#define I2C_MSPIER_WCOLIE I2C_MSPIER_WCOLIE_Msk + +#define I2C_MSPIER_TOIE_Pos (5U) +#define I2C_MSPIER_TOIE_Msk (0x1Ul << I2C_MSPIER_TOIE_Pos) +#define I2C_MSPIER_TOIE I2C_MSPIER_TOIE_Msk + +#define I2C_MSPIER_SIE_Pos (4U) +#define I2C_MSPIER_SIE_Msk (0x1Ul << I2C_MSPIER_SIE_Pos) +#define I2C_MSPIER_SIE I2C_MSPIER_SIE_Msk + +#define I2C_MSPIER_PIE_Pos (3U) +#define I2C_MSPIER_PIE_Msk (0x1Ul << I2C_MSPIER_PIE_Pos) +#define I2C_MSPIER_PIE I2C_MSPIER_PIE_Msk + +#define I2C_MSPIER_NACKIE_Pos (2U) +#define I2C_MSPIER_NACKIE_Msk (0x1Ul << I2C_MSPIER_NACKIE_Pos) +#define I2C_MSPIER_NACKIE I2C_MSPIER_NACKIE_Msk + +#define I2C_MSPIER_TXIE_Pos (1U) +#define I2C_MSPIER_TXIE_Msk (0x1Ul << I2C_MSPIER_TXIE_Pos) +#define I2C_MSPIER_TXIE I2C_MSPIER_TXIE_Msk + +#define I2C_MSPIER_RXIE_Pos (0U) +#define I2C_MSPIER_RXIE_Msk (0x1Ul << I2C_MSPIER_RXIE_Pos) +#define I2C_MSPIER_RXIE I2C_MSPIER_RXIE_Msk + +#define I2C_MSPISR_WCOL_Pos (6U) +#define I2C_MSPISR_WCOL_Msk (0x1Ul << I2C_MSPISR_WCOL_Pos) +#define I2C_MSPISR_WCOL I2C_MSPISR_WCOL_Msk + +#define I2C_MSPISR_TO_Pos (5U) +#define I2C_MSPISR_TO_Msk (0x1Ul << I2C_MSPISR_TO_Pos) +#define I2C_MSPISR_TO I2C_MSPISR_TO_Msk + +#define I2C_MSPISR_S_Pos (4U) +#define I2C_MSPISR_S_Msk (0x1Ul << I2C_MSPISR_S_Pos) +#define I2C_MSPISR_S I2C_MSPISR_S_Msk + +#define I2C_MSPISR_P_Pos (3U) +#define I2C_MSPISR_P_Msk (0x1Ul << I2C_MSPISR_P_Pos) +#define I2C_MSPISR_P I2C_MSPISR_P_Msk + +#define I2C_MSPISR_ACKSTA_Pos (2U) +#define I2C_MSPISR_ACKSTA_Msk (0x1Ul << I2C_MSPISR_ACKSTA_Pos) +#define I2C_MSPISR_ACKSTA I2C_MSPISR_ACKSTA_Msk + +#define I2C_MSPISR_TXIF_Pos (1U) +#define I2C_MSPISR_TXIF_Msk (0x1Ul << I2C_MSPISR_TXIF_Pos) +#define I2C_MSPISR_TXIF I2C_MSPISR_TXIF_Msk + +#define I2C_MSPISR_RXIF_Pos (0U) +#define I2C_MSPISR_RXIF_Msk (0x1Ul << I2C_MSPISR_RXIF_Pos) +#define I2C_MSPISR_RXIF I2C_MSPISR_RXIF_Msk + +#define I2C_MSPSR_BUSY_Pos (5U) +#define I2C_MSPSR_BUSY_Msk (0x1Ul << I2C_MSPSR_BUSY_Pos) +#define I2C_MSPSR_BUSY I2C_MSPSR_BUSY_Msk + +#define I2C_MSPSR_RW_Pos (4U) +#define I2C_MSPSR_RW_Msk (0x1Ul << I2C_MSPSR_RW_Pos) +#define I2C_MSPSR_RW I2C_MSPSR_RW_Msk + +#define I2C_MSPSR_BF_Pos (2U) +#define I2C_MSPSR_BF_Msk (0x1Ul << I2C_MSPSR_BF_Pos) +#define I2C_MSPSR_BF I2C_MSPSR_BF_Msk + +#define I2C_MSPSR_ACKMO_Pos (0U) +#define I2C_MSPSR_ACKMO_Msk (0x1Ul << I2C_MSPSR_ACKMO_Pos) +#define I2C_MSPSR_ACKMO I2C_MSPSR_ACKMO_Msk + +#define I2C_MSPBGR_MSPBGRH_Pos (16U) +#define I2C_MSPBGR_MSPBGRH_Msk (0x1ffUl << I2C_MSPBGR_MSPBGRH_Pos) +#define I2C_MSPBGR_MSPBGRH I2C_MSPBGR_MSPBGRH_Msk + +#define I2C_MSPBGR_MSPBGRL_Pos (0U) +#define I2C_MSPBGR_MSPBGRL_Msk (0x1ffUl << I2C_MSPBGR_MSPBGRL_Pos) +#define I2C_MSPBGR_MSPBGRL I2C_MSPBGR_MSPBGRL_Msk + +#define I2C_MSPBUF_MSPBUF_Pos (0U) +#define I2C_MSPBUF_MSPBUF_Msk (0xffUl << I2C_MSPBUF_MSPBUF_Pos) +#define I2C_MSPBUF_MSPBUF I2C_MSPBUF_MSPBUF_Msk + +#define I2C_MSPTCR_SDAHD_Pos (0U) +#define I2C_MSPTCR_SDAHD_Msk (0x1ffUl << I2C_MSPTCR_SDAHD_Pos) +#define I2C_MSPTCR_SDAHD I2C_MSPTCR_SDAHD_Msk + +#define I2C_MSPTOR_TIMEOUT_Pos (0U) +#define I2C_MSPTOR_TIMEOUT_Msk (0xfffUl << I2C_MSPTOR_TIMEOUT_Pos) +#define I2C_MSPTOR_TIMEOUT I2C_MSPTOR_TIMEOUT_Msk + +#define I2C_SSPCR_SCLSEN_Pos (9U) +#define I2C_SSPCR_SCLSEN_Msk (0x1Ul << I2C_SSPCR_SCLSEN_Pos) +#define I2C_SSPCR_SCLSEN I2C_SSPCR_SCLSEN_Msk + +#define I2C_SSPCR_DMAEN_Pos (8U) +#define I2C_SSPCR_DMAEN_Msk (0x1Ul << I2C_SSPCR_DMAEN_Pos) +#define I2C_SSPCR_DMAEN I2C_SSPCR_DMAEN_Msk + +#define I2C_SSPCR_ACKEN_Pos (4U) +#define I2C_SSPCR_ACKEN_Msk (0x1Ul << I2C_SSPCR_ACKEN_Pos) +#define I2C_SSPCR_ACKEN I2C_SSPCR_ACKEN_Msk + +#define I2C_SSPCR_SDAO_DLYEN_Pos (3U) +#define I2C_SSPCR_SDAO_DLYEN_Msk (0x1Ul << I2C_SSPCR_SDAO_DLYEN_Pos) +#define I2C_SSPCR_SDAO_DLYEN I2C_SSPCR_SDAO_DLYEN_Msk + +#define I2C_SSPCR_SCLI_ANFEN_Pos (2U) +#define I2C_SSPCR_SCLI_ANFEN_Msk (0x1Ul << I2C_SSPCR_SCLI_ANFEN_Pos) +#define I2C_SSPCR_SCLI_ANFEN I2C_SSPCR_SCLI_ANFEN_Msk + +#define I2C_SSPCR_A10EN_Pos (1U) +#define I2C_SSPCR_A10EN_Msk (0x1Ul << I2C_SSPCR_A10EN_Pos) +#define I2C_SSPCR_A10EN I2C_SSPCR_A10EN_Msk + +#define I2C_SSPCR_SSPEN_Pos (0U) +#define I2C_SSPCR_SSPEN_Msk (0x1Ul << I2C_SSPCR_SSPEN_Pos) +#define I2C_SSPCR_SSPEN I2C_SSPCR_SSPEN_Msk + +#define I2C_SSPIER_ADEIE_Pos (7U) +#define I2C_SSPIER_ADEIE_Msk (0x1Ul << I2C_SSPIER_ADEIE_Pos) +#define I2C_SSPIER_ADEIE I2C_SSPIER_ADEIE_Msk + +#define I2C_SSPIER_SIE_Pos (6U) +#define I2C_SSPIER_SIE_Msk (0x1Ul << I2C_SSPIER_SIE_Pos) +#define I2C_SSPIER_SIE I2C_SSPIER_SIE_Msk + +#define I2C_SSPIER_PIE_Pos (5U) +#define I2C_SSPIER_PIE_Msk (0x1Ul << I2C_SSPIER_PIE_Pos) +#define I2C_SSPIER_PIE I2C_SSPIER_PIE_Msk + +#define I2C_SSPIER_WCOLIE_Pos (4U) +#define I2C_SSPIER_WCOLIE_Msk (0x1Ul << I2C_SSPIER_WCOLIE_Pos) +#define I2C_SSPIER_WCOLIE I2C_SSPIER_WCOLIE_Msk + +#define I2C_SSPIER_SSPOVIE_Pos (3U) +#define I2C_SSPIER_SSPOVIE_Msk (0x1Ul << I2C_SSPIER_SSPOVIE_Pos) +#define I2C_SSPIER_SSPOVIE I2C_SSPIER_SSPOVIE_Msk + +#define I2C_SSPIER_ADMIE_Pos (2U) +#define I2C_SSPIER_ADMIE_Msk (0x1Ul << I2C_SSPIER_ADMIE_Pos) +#define I2C_SSPIER_ADMIE I2C_SSPIER_ADMIE_Msk + +#define I2C_SSPIER_TXIE_Pos (1U) +#define I2C_SSPIER_TXIE_Msk (0x1Ul << I2C_SSPIER_TXIE_Pos) +#define I2C_SSPIER_TXIE I2C_SSPIER_TXIE_Msk + +#define I2C_SSPIER_RXIE_Pos (0U) +#define I2C_SSPIER_RXIE_Msk (0x1Ul << I2C_SSPIER_RXIE_Pos) +#define I2C_SSPIER_RXIE I2C_SSPIER_RXIE_Msk + +#define I2C_SSPISR_ADE_Pos (7U) +#define I2C_SSPISR_ADE_Msk (0x1Ul << I2C_SSPISR_ADE_Pos) +#define I2C_SSPISR_ADE I2C_SSPISR_ADE_Msk + +#define I2C_SSPISR_S_Pos (6U) +#define I2C_SSPISR_S_Msk (0x1Ul << I2C_SSPISR_S_Pos) +#define I2C_SSPISR_S I2C_SSPISR_S_Msk + +#define I2C_SSPISR_P_Pos (5U) +#define I2C_SSPISR_P_Msk (0x1Ul << I2C_SSPISR_P_Pos) +#define I2C_SSPISR_P I2C_SSPISR_P_Msk + +#define I2C_SSPISR_WCOL_Pos (4U) +#define I2C_SSPISR_WCOL_Msk (0x1Ul << I2C_SSPISR_WCOL_Pos) +#define I2C_SSPISR_WCOL I2C_SSPISR_WCOL_Msk + +#define I2C_SSPISR_SSPOV_Pos (3U) +#define I2C_SSPISR_SSPOV_Msk (0x1Ul << I2C_SSPISR_SSPOV_Pos) +#define I2C_SSPISR_SSPOV I2C_SSPISR_SSPOV_Msk + +#define I2C_SSPISR_ADM_Pos (2U) +#define I2C_SSPISR_ADM_Msk (0x1Ul << I2C_SSPISR_ADM_Pos) +#define I2C_SSPISR_ADM I2C_SSPISR_ADM_Msk + +#define I2C_SSPISR_TXIF_Pos (1U) +#define I2C_SSPISR_TXIF_Msk (0x1Ul << I2C_SSPISR_TXIF_Pos) +#define I2C_SSPISR_TXIF I2C_SSPISR_TXIF_Msk + +#define I2C_SSPISR_RXIF_Pos (0U) +#define I2C_SSPISR_RXIF_Msk (0x1Ul << I2C_SSPISR_RXIF_Pos) +#define I2C_SSPISR_RXIF I2C_SSPISR_RXIF_Msk + +#define I2C_SSPSR_BUSY_Pos (3U) +#define I2C_SSPSR_BUSY_Msk (0x1Ul << I2C_SSPSR_BUSY_Pos) +#define I2C_SSPSR_BUSY I2C_SSPSR_BUSY_Msk + +#define I2C_SSPSR_RW_Pos (2U) +#define I2C_SSPSR_RW_Msk (0x1Ul << I2C_SSPSR_RW_Pos) +#define I2C_SSPSR_RW I2C_SSPSR_RW_Msk + +#define I2C_SSPSR_DA_Pos (1U) +#define I2C_SSPSR_DA_Msk (0x1Ul << I2C_SSPSR_DA_Pos) +#define I2C_SSPSR_DA I2C_SSPSR_DA_Msk + +#define I2C_SSPSR_BF_Pos (0U) +#define I2C_SSPSR_BF_Msk (0x1Ul << I2C_SSPSR_BF_Pos) +#define I2C_SSPSR_BF I2C_SSPSR_BF_Msk + + + + + + +#define FL_I2C_MSP_DATA_DIRECTION_SLAVE_TO_MASTER (0x0Ul << I2C_MSPSR_RW_Pos) +#define FL_I2C_MSP_DATA_DIRECTION_MASTER_TO_SLAVE (0x1Ul << I2C_MSPSR_RW_Pos) + +#define FL_I2C_MSP_DATA_BUFF_STATUS_FULL (0x0Ul << I2C_MSPSR_BF_Pos) +#define FL_I2C_MSP_DATA_BUFF_STATUS_EMPTY (0x1Ul << I2C_MSPSR_BF_Pos) + +#define FL_I2C_MASTER_RESPOND_ACK (0x0Ul << I2C_MSPSR_ACKMO_Pos) +#define FL_I2C_MASTER_RESPOND_NACK (0x1Ul << I2C_MSPSR_ACKMO_Pos) + + +#define FL_I2C_SSP_DATA_DIRECTION_SLAVE_TO_MASTER (0x1Ul << I2C_SSPSR_RW_Pos) +#define FL_I2C_SSP_DATA_DIRECTION_MASTER_TO_SLAVE (0x0Ul << I2C_SSPSR_RW_Pos) + +#define FL_I2C_SSP_DATA_TYPE_DATA (0x1Ul << I2C_SSPSR_DA_Pos) +#define FL_I2C_SSP_DATA_TYPE_ADDR (0x0Ul << I2C_SSPSR_DA_Pos) + +#define FL_I2C_SSP_DATA_BUFF_STATUS_FULL (0x1Ul << I2C_SSPSR_BF_Pos) +#define FL_I2C_SSP_DATA_BUFF_STATUS_EMPTY (0x0Ul << I2C_SSPSR_BF_Pos) + +/** + * @} + */ +/* Exported functions ---------------------------------------------------------------------------------*/ +/** @defgroup I2C_FL_Exported_Functions I2C Exported Functions + * @{ + */ + +/** + * @brief + * @rmtoll MSPCFGR MSPEN FL_I2C_Master_Enable + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Master_Enable(I2C_Type *I2Cx) +{ + SET_BIT(I2Cx->MSPCFGR, I2C_MSPCFGR_MSPEN_Msk); +} + +/** + * @brief + * @rmtoll MSPCFGR MSPEN FL_I2C_Master_IsEnabled + * @param I2Cx I2C instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_I2C_Master_IsEnabled(I2C_Type *I2Cx) +{ + return (uint32_t)(READ_BIT(I2Cx->MSPCFGR, I2C_MSPCFGR_MSPEN_Msk) == I2C_MSPCFGR_MSPEN_Msk); +} + +/** + * @brief + * @rmtoll MSPCFGR MSPEN FL_I2C_Master_Disable + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Master_Disable(I2C_Type *I2Cx) +{ + CLEAR_BIT(I2Cx->MSPCFGR, I2C_MSPCFGR_MSPEN_Msk); +} + +/** + * @brief + * @rmtoll MSPCFGR TOEN FL_I2C_Master_EnableTimeout + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Master_EnableTimeout(I2C_Type *I2Cx) +{ + SET_BIT(I2Cx->MSPCFGR, I2C_MSPCFGR_TOEN_Msk); +} + +/** + * @brief + * @rmtoll MSPCFGR TOEN FL_I2C_Master_IsEnabledTimeout + * @param I2Cx I2C instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_I2C_Master_IsEnabledTimeout(I2C_Type *I2Cx) +{ + return (uint32_t)(READ_BIT(I2Cx->MSPCFGR, I2C_MSPCFGR_TOEN_Msk) == I2C_MSPCFGR_TOEN_Msk); +} + +/** + * @brief + * @rmtoll MSPCFGR TOEN FL_I2C_Master_DisableTimeout + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Master_DisableTimeout(I2C_Type *I2Cx) +{ + CLEAR_BIT(I2Cx->MSPCFGR, I2C_MSPCFGR_TOEN_Msk); +} + +/** + * @brief + * @rmtoll MSPCFGR DMAEN FL_I2C_Master_EnableDMAReq + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Master_EnableDMAReq(I2C_Type *I2Cx) +{ + SET_BIT(I2Cx->MSPCFGR, I2C_MSPCFGR_DMAEN_Msk); +} + +/** + * @brief + * @rmtoll MSPCFGR DMAEN FL_I2C_Master_IsEnabledDMAReq + * @param I2Cx I2C instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_I2C_Master_IsEnabledDMAReq(I2C_Type *I2Cx) +{ + return (uint32_t)(READ_BIT(I2Cx->MSPCFGR, I2C_MSPCFGR_DMAEN_Msk) == I2C_MSPCFGR_DMAEN_Msk); +} + +/** + * @brief + * @rmtoll MSPCFGR DMAEN FL_I2C_Master_DisableDMAReq + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Master_DisableDMAReq(I2C_Type *I2Cx) +{ + CLEAR_BIT(I2Cx->MSPCFGR, I2C_MSPCFGR_DMAEN_Msk); +} + +/** + * @brief + * @rmtoll MSPCFGR AUTOEND FL_I2C_Master_EnableAutoStop + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Master_EnableAutoStop(I2C_Type *I2Cx) +{ + SET_BIT(I2Cx->MSPCFGR, I2C_MSPCFGR_AUTOEND_Msk); +} + +/** + * @brief + * @rmtoll MSPCFGR AUTOEND FL_I2C_Master_IsEnabledAutoStop + * @param I2Cx I2C instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_I2C_Master_IsEnabledAutoStop(I2C_Type *I2Cx) +{ + return (uint32_t)(READ_BIT(I2Cx->MSPCFGR, I2C_MSPCFGR_AUTOEND_Msk) == I2C_MSPCFGR_AUTOEND_Msk); +} + +/** + * @brief + * @rmtoll MSPCFGR AUTOEND FL_I2C_Master_DisableAutoStop + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Master_DisableAutoStop(I2C_Type *I2Cx) +{ + CLEAR_BIT(I2Cx->MSPCFGR, I2C_MSPCFGR_AUTOEND_Msk); +} + +/** + * @brief + * @rmtoll MSPCR RCEN FL_I2C_Master_EnableRX + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Master_EnableRX(I2C_Type *I2Cx) +{ + SET_BIT(I2Cx->MSPCR, I2C_MSPCR_RCEN_Msk); +} + +/** + * @brief + * @rmtoll MSPCR RCEN FL_I2C_Master_IsEnabledRX + * @param I2Cx I2C instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_I2C_Master_IsEnabledRX(I2C_Type *I2Cx) +{ + return (uint32_t)(READ_BIT(I2Cx->MSPCR, I2C_MSPCR_RCEN_Msk) == I2C_MSPCR_RCEN_Msk); +} + +/** + * @brief + * @rmtoll MSPCR RCEN FL_I2C_Master_DisableRX + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Master_DisableRX(I2C_Type *I2Cx) +{ + CLEAR_BIT(I2Cx->MSPCR, I2C_MSPCR_RCEN_Msk); +} + +/** + * @brief + * @rmtoll MSPCR PEN FL_I2C_Master_EnableI2CStop + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Master_EnableI2CStop(I2C_Type *I2Cx) +{ + SET_BIT(I2Cx->MSPCR, I2C_MSPCR_PEN_Msk); +} + +/** + * @brief + * @rmtoll MSPCR RSEN FL_I2C_Master_EnableI2CRestart + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Master_EnableI2CRestart(I2C_Type *I2Cx) +{ + SET_BIT(I2Cx->MSPCR, I2C_MSPCR_RSEN_Msk); +} + +/** + * @brief + * @rmtoll MSPCR SEN FL_I2C_Master_EnableI2CStart + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Master_EnableI2CStart(I2C_Type *I2Cx) +{ + SET_BIT(I2Cx->MSPCR, I2C_MSPCR_SEN_Msk); +} + +/** + * @brief + * @rmtoll MSPIER WCOLIE FL_I2C_Master_EnableIT_WriteConflict + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Master_EnableIT_WriteConflict(I2C_Type *I2Cx) +{ + SET_BIT(I2Cx->MSPIER, I2C_MSPIER_WCOLIE_Msk); +} + +/** + * @brief + * @rmtoll MSPIER WCOLIE FL_I2C_Master_IsEnabledIT_WriteConflict + * @param I2Cx I2C instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_I2C_Master_IsEnabledIT_WriteConflict(I2C_Type *I2Cx) +{ + return (uint32_t)(READ_BIT(I2Cx->MSPIER, I2C_MSPIER_WCOLIE_Msk) == I2C_MSPIER_WCOLIE_Msk); +} + +/** + * @brief + * @rmtoll MSPIER WCOLIE FL_I2C_Master_DisableIT_WriteConflict + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Master_DisableIT_WriteConflict(I2C_Type *I2Cx) +{ + CLEAR_BIT(I2Cx->MSPIER, I2C_MSPIER_WCOLIE_Msk); +} + +/** + * @brief + * @rmtoll MSPIER TOIE FL_I2C_Master_EnableIT_Timeout + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Master_EnableIT_Timeout(I2C_Type *I2Cx) +{ + SET_BIT(I2Cx->MSPIER, I2C_MSPIER_TOIE_Msk); +} + +/** + * @brief + * @rmtoll MSPIER TOIE FL_I2C_Master_IsEnabledIT_Timeout + * @param I2Cx I2C instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_I2C_Master_IsEnabledIT_Timeout(I2C_Type *I2Cx) +{ + return (uint32_t)(READ_BIT(I2Cx->MSPIER, I2C_MSPIER_TOIE_Msk) == I2C_MSPIER_TOIE_Msk); +} + +/** + * @brief + * @rmtoll MSPIER TOIE FL_I2C_Master_DisableIT_Timeout + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Master_DisableIT_Timeout(I2C_Type *I2Cx) +{ + CLEAR_BIT(I2Cx->MSPIER, I2C_MSPIER_TOIE_Msk); +} + +/** + * @brief + * @rmtoll MSPIER SIE FL_I2C_Master_EnableIT_Start + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Master_EnableIT_Start(I2C_Type *I2Cx) +{ + SET_BIT(I2Cx->MSPIER, I2C_MSPIER_SIE_Msk); +} + +/** + * @brief + * @rmtoll MSPIER SIE FL_I2C_Master_IsEnabledIT_Start + * @param I2Cx I2C instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_I2C_Master_IsEnabledIT_Start(I2C_Type *I2Cx) +{ + return (uint32_t)(READ_BIT(I2Cx->MSPIER, I2C_MSPIER_SIE_Msk) == I2C_MSPIER_SIE_Msk); +} + +/** + * @brief + * @rmtoll MSPIER SIE FL_I2C_Master_DisableIT_Start + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Master_DisableIT_Start(I2C_Type *I2Cx) +{ + CLEAR_BIT(I2Cx->MSPIER, I2C_MSPIER_SIE_Msk); +} + +/** + * @brief + * @rmtoll MSPIER PIE FL_I2C_Master_EnableIT_Stop + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Master_EnableIT_Stop(I2C_Type *I2Cx) +{ + SET_BIT(I2Cx->MSPIER, I2C_MSPIER_PIE_Msk); +} + +/** + * @brief + * @rmtoll MSPIER PIE FL_I2C_Master_IsEnabledIT_Stop + * @param I2Cx I2C instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_I2C_Master_IsEnabledIT_Stop(I2C_Type *I2Cx) +{ + return (uint32_t)(READ_BIT(I2Cx->MSPIER, I2C_MSPIER_PIE_Msk) == I2C_MSPIER_PIE_Msk); +} + +/** + * @brief + * @rmtoll MSPIER PIE FL_I2C_Master_DisableIT_Stop + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Master_DisableIT_Stop(I2C_Type *I2Cx) +{ + CLEAR_BIT(I2Cx->MSPIER, I2C_MSPIER_PIE_Msk); +} + +/** + * @brief + * @rmtoll MSPIER NACKIE FL_I2C_Master_EnableIT_NACK + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Master_EnableIT_NACK(I2C_Type *I2Cx) +{ + SET_BIT(I2Cx->MSPIER, I2C_MSPIER_NACKIE_Msk); +} + +/** + * @brief + * @rmtoll MSPIER NACKIE FL_I2C_Master_IsEnabledIT_NACK + * @param I2Cx I2C instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_I2C_Master_IsEnabledIT_NACK(I2C_Type *I2Cx) +{ + return (uint32_t)(READ_BIT(I2Cx->MSPIER, I2C_MSPIER_NACKIE_Msk) == I2C_MSPIER_NACKIE_Msk); +} + +/** + * @brief + * @rmtoll MSPIER NACKIE FL_I2C_Master_DisableIT_NACK + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Master_DisableIT_NACK(I2C_Type *I2Cx) +{ + CLEAR_BIT(I2Cx->MSPIER, I2C_MSPIER_NACKIE_Msk); +} + +/** + * @brief + * @rmtoll MSPIER TXIE FL_I2C_Master_EnableIT_TXComplete + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Master_EnableIT_TXComplete(I2C_Type *I2Cx) +{ + SET_BIT(I2Cx->MSPIER, I2C_MSPIER_TXIE_Msk); +} + +/** + * @brief + * @rmtoll MSPIER TXIE FL_I2C_Master_IsEnabledIT_TXComplete + * @param I2Cx I2C instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_I2C_Master_IsEnabledIT_TXComplete(I2C_Type *I2Cx) +{ + return (uint32_t)(READ_BIT(I2Cx->MSPIER, I2C_MSPIER_TXIE_Msk) == I2C_MSPIER_TXIE_Msk); +} + +/** + * @brief + * @rmtoll MSPIER TXIE FL_I2C_Master_DisableIT_TXComplete + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Master_DisableIT_TXComplete(I2C_Type *I2Cx) +{ + CLEAR_BIT(I2Cx->MSPIER, I2C_MSPIER_TXIE_Msk); +} + +/** + * @brief + * @rmtoll MSPIER RXIE FL_I2C_Master_EnableIT_RXComplete + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Master_EnableIT_RXComplete(I2C_Type *I2Cx) +{ + SET_BIT(I2Cx->MSPIER, I2C_MSPIER_RXIE_Msk); +} + +/** + * @brief + * @rmtoll MSPIER RXIE FL_I2C_Master_IsEnabledIT_RXComplete + * @param I2Cx I2C instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_I2C_Master_IsEnabledIT_RXComplete(I2C_Type *I2Cx) +{ + return (uint32_t)(READ_BIT(I2Cx->MSPIER, I2C_MSPIER_RXIE_Msk) == I2C_MSPIER_RXIE_Msk); +} + +/** + * @brief + * @rmtoll MSPIER RXIE FL_I2C_Master_DisableIT_RXComplete + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Master_DisableIT_RXComplete(I2C_Type *I2Cx) +{ + CLEAR_BIT(I2Cx->MSPIER, I2C_MSPIER_RXIE_Msk); +} + +/** + * @brief + * @rmtoll MSPISR WCOL FL_I2C_Master_IsActiveFlag_WriteConflict + * @param I2Cx I2C instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_I2C_Master_IsActiveFlag_WriteConflict(I2C_Type *I2Cx) +{ + return (uint32_t)(READ_BIT(I2Cx->MSPISR, I2C_MSPISR_WCOL_Msk) == (I2C_MSPISR_WCOL_Msk)); +} + +/** + * @brief + * @rmtoll MSPISR WCOL FL_I2C_Master_ClearFlag_WriteConflict + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Master_ClearFlag_WriteConflict(I2C_Type *I2Cx) +{ + WRITE_REG(I2Cx->MSPISR, I2C_MSPISR_WCOL_Msk); +} + +/** + * @brief + * @rmtoll MSPISR TO FL_I2C_Master_IsActiveFlag_Timeout + * @param I2Cx I2C instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_I2C_Master_IsActiveFlag_Timeout(I2C_Type *I2Cx) +{ + return (uint32_t)(READ_BIT(I2Cx->MSPISR, I2C_MSPISR_TO_Msk) == (I2C_MSPISR_TO_Msk)); +} + +/** + * @brief + * @rmtoll MSPISR TO FL_I2C_Master_ClearFlag_Timeout + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Master_ClearFlag_Timeout(I2C_Type *I2Cx) +{ + WRITE_REG(I2Cx->MSPISR, I2C_MSPISR_TO_Msk); +} + +/** + * @brief + * @rmtoll MSPISR S FL_I2C_Master_IsActiveFlag_Start + * @param I2Cx I2C instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_I2C_Master_IsActiveFlag_Start(I2C_Type *I2Cx) +{ + return (uint32_t)(READ_BIT(I2Cx->MSPISR, I2C_MSPISR_S_Msk) == (I2C_MSPISR_S_Msk)); +} + +/** + * @brief + * @rmtoll MSPISR P FL_I2C_Master_IsActiveFlag_Stop + * @param I2Cx I2C instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_I2C_Master_IsActiveFlag_Stop(I2C_Type *I2Cx) +{ + return (uint32_t)(READ_BIT(I2Cx->MSPISR, I2C_MSPISR_P_Msk) == (I2C_MSPISR_P_Msk)); +} + +/** + * @brief + * @rmtoll MSPISR ACKSTA FL_I2C_Master_IsActiveFlag_NACK + * @param I2Cx I2C instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_I2C_Master_IsActiveFlag_NACK(I2C_Type *I2Cx) +{ + return (uint32_t)(READ_BIT(I2Cx->MSPISR, I2C_MSPISR_ACKSTA_Msk) == (I2C_MSPISR_ACKSTA_Msk)); +} + +/** + * @brief + * @rmtoll MSPISR ACKSTA FL_I2C_Master_ClearFlag_NACK + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Master_ClearFlag_NACK(I2C_Type *I2Cx) +{ + WRITE_REG(I2Cx->MSPISR, I2C_MSPISR_ACKSTA_Msk); +} + +/** + * @brief + * @rmtoll MSPISR TXIF FL_I2C_Master_IsActiveFlag_TXComplete + * @param I2Cx I2C instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_I2C_Master_IsActiveFlag_TXComplete(I2C_Type *I2Cx) +{ + return (uint32_t)(READ_BIT(I2Cx->MSPISR, I2C_MSPISR_TXIF_Msk) == (I2C_MSPISR_TXIF_Msk)); +} + +/** + * @brief + * @rmtoll MSPISR TXIF FL_I2C_Master_ClearFlag_TXComplete + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Master_ClearFlag_TXComplete(I2C_Type *I2Cx) +{ + WRITE_REG(I2Cx->MSPISR, I2C_MSPISR_TXIF_Msk); +} + +/** + * @brief + * @rmtoll MSPISR RXIF FL_I2C_Master_IsActiveFlag_RXComplete + * @param I2Cx I2C instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_I2C_Master_IsActiveFlag_RXComplete(I2C_Type *I2Cx) +{ + return (uint32_t)(READ_BIT(I2Cx->MSPISR, I2C_MSPISR_RXIF_Msk) == (I2C_MSPISR_RXIF_Msk)); +} + +/** + * @brief + * @rmtoll MSPISR RXIF FL_I2C_Master_ClearFlag_RXComplete + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Master_ClearFlag_RXComplete(I2C_Type *I2Cx) +{ + WRITE_REG(I2Cx->MSPISR, I2C_MSPISR_RXIF_Msk); +} + +/** + * @brief + * @rmtoll MSPSR BUSY FL_I2C_Master_IsActiveFlag_Busy + * @param I2Cx I2C instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_I2C_Master_IsActiveFlag_Busy(I2C_Type *I2Cx) +{ + return (uint32_t)(READ_BIT(I2Cx->MSPSR, I2C_MSPSR_BUSY_Msk) == (I2C_MSPSR_BUSY_Msk)); +} + +/** + * @brief + * @rmtoll MSPSR RW FL_I2C_Master_GetDirection + * @param I2Cx I2C instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_I2C_MSP_DATA_DIRECTION_SLAVE_TO_MASTER + * @arg @ref FL_I2C_MSP_DATA_DIRECTION_MASTER_TO_SLAVE + */ +__STATIC_INLINE uint32_t FL_I2C_Master_GetDirection(I2C_Type *I2Cx) +{ + return (uint32_t)(READ_BIT(I2Cx->MSPSR, I2C_MSPSR_RW_Msk)); +} + +/** + * @brief + * @rmtoll MSPSR BF FL_I2C_Master_GetBuffStatus + * @param I2Cx I2C instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_I2C_MSP_DATA_BUFF_STATUS_FULL + * @arg @ref FL_I2C_MSP_DATA_BUFF_STATUS_EMPTY + */ +__STATIC_INLINE uint32_t FL_I2C_Master_GetBuffStatus(I2C_Type *I2Cx) +{ + return (uint32_t)(READ_BIT(I2Cx->MSPSR, I2C_MSPSR_BF_Msk)); +} + +/** + * @brief + * @rmtoll MSPSR ACKMO FL_I2C_Master_SetRespond + * @param I2Cx I2C instance + * @param mode This parameter can be one of the following values: + * @arg @ref FL_I2C_MASTER_RESPOND_ACK + * @arg @ref FL_I2C_MASTER_RESPOND_NACK + * @retval None + */ +__STATIC_INLINE void FL_I2C_Master_SetRespond(I2C_Type *I2Cx, uint32_t mode) +{ + MODIFY_REG(I2Cx->MSPSR, I2C_MSPSR_ACKMO_Msk, mode); +} + +/** + * @brief + * @rmtoll MSPSR ACKMO FL_I2C_Master_GetRespond + * @param I2Cx I2C instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_I2C_MASTER_RESPOND_ACK + * @arg @ref FL_I2C_MASTER_RESPOND_NACK + */ +__STATIC_INLINE uint32_t FL_I2C_Master_GetRespond(I2C_Type *I2Cx) +{ + return (uint32_t)(READ_BIT(I2Cx->MSPSR, I2C_MSPSR_ACKMO_Msk)); +} + +/** + * @brief + * @rmtoll MSPBGR MSPBGRH FL_I2C_Master_WriteSCLHighWidth + * @param I2Cx I2C instance + * @param width + * @retval None + */ +__STATIC_INLINE void FL_I2C_Master_WriteSCLHighWidth(I2C_Type *I2Cx, uint32_t width) +{ + MODIFY_REG(I2Cx->MSPBGR, (0x1ffU << 16U), (width << 16U)); +} + +/** + * @brief + * @rmtoll MSPBGR MSPBGRH FL_I2C_Master_ReadSCLHighWidth + * @param I2Cx I2C instance + * @retval + */ +__STATIC_INLINE uint32_t FL_I2C_Master_ReadSCLHighWidth(I2C_Type *I2Cx) +{ + return (uint32_t)(READ_BIT(I2Cx->MSPBGR, (0x1ffU << 16U)) >> 16U); +} + +/** + * @brief + * @rmtoll MSPBGR MSPBGRL FL_I2C_Master_WriteSCLLowWidth + * @param I2Cx I2C instance + * @param width + * @retval None + */ +__STATIC_INLINE void FL_I2C_Master_WriteSCLLowWidth(I2C_Type *I2Cx, uint32_t width) +{ + MODIFY_REG(I2Cx->MSPBGR, (0x1ffU << 0U), (width << 0U)); +} + +/** + * @brief + * @rmtoll MSPBGR MSPBGRL FL_I2C_Master_ReadSCLLowWidth + * @param I2Cx I2C instance + * @retval + */ +__STATIC_INLINE uint32_t FL_I2C_Master_ReadSCLLowWidth(I2C_Type *I2Cx) +{ + return (uint32_t)(READ_BIT(I2Cx->MSPBGR, (0x1ffU << 0U)) >> 0U); +} + +/** + * @brief + * @rmtoll MSPBUF MSPBUF FL_I2C_Master_WriteTXBuff + * @param I2Cx I2C instance + * @param data + * @retval None + */ +__STATIC_INLINE void FL_I2C_Master_WriteTXBuff(I2C_Type *I2Cx, uint32_t data) +{ + MODIFY_REG(I2Cx->MSPBUF, (0xffU << 0U), (data << 0U)); +} + +/** + * @brief + * @rmtoll MSPBUF MSPBUF FL_I2C_Master_ReadRXBuff + * @param I2Cx I2C instance + * @retval + */ +__STATIC_INLINE uint32_t FL_I2C_Master_ReadRXBuff(I2C_Type *I2Cx) +{ + return (uint32_t)(READ_BIT(I2Cx->MSPBUF, 0xffU) >> 0U); +} + +/** + * @brief + * @rmtoll MSPTCR SDAHD FL_I2C_Master_WriteSDAHoldTime + * @param I2Cx I2C instance + * @param time + * @retval None + */ +__STATIC_INLINE void FL_I2C_Master_WriteSDAHoldTime(I2C_Type *I2Cx, uint32_t time) +{ + MODIFY_REG(I2Cx->MSPTCR, (0x1ffU << 0U), (time << 0U)); +} + +/** + * @brief + * @rmtoll MSPTCR SDAHD FL_I2C_Master_ReadSDAHoldTime + * @param I2Cx I2C instance + * @retval + */ +__STATIC_INLINE uint32_t FL_I2C_Master_ReadSDAHoldTime(I2C_Type *I2Cx) +{ + return (uint32_t)(READ_BIT(I2Cx->MSPTCR, 0x1ffU) >> 0U); +} + +/** + * @brief + * @rmtoll MSPTOR TIMEOUT FL_I2C_Master_WriteSlaveSCLTimeout + * @param I2Cx I2C instance + * @param time + * @retval None + */ +__STATIC_INLINE void FL_I2C_Master_WriteSlaveSCLTimeout(I2C_Type *I2Cx, uint32_t time) +{ + MODIFY_REG(I2Cx->MSPTOR, (0xfffU << 0U), (time << 0U)); +} + +/** + * @brief + * @rmtoll MSPTOR TIMEOUT FL_I2C_Master_ReadSlaveSCLTimeout + * @param I2Cx I2C instance + * @retval + */ +__STATIC_INLINE uint32_t FL_I2C_Master_ReadSlaveSCLTimeout(I2C_Type *I2Cx) +{ + return (uint32_t)(READ_BIT(I2Cx->MSPTOR, 0xfffU) >> 0U); +} + +/** + * @brief + * @rmtoll SSPCR SCLSEN FL_I2C_Slave_EnableSCLStretching + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Slave_EnableSCLStretching(I2C_Type *I2Cx) +{ + SET_BIT(I2Cx->SSPCR, I2C_SSPCR_SCLSEN_Msk); +} + +/** + * @brief + * @rmtoll SSPCR SCLSEN FL_I2C_Slave_IsEnabledSCLStretching + * @param I2Cx I2C instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_I2C_Slave_IsEnabledSCLStretching(I2C_Type *I2Cx) +{ + return (uint32_t)(READ_BIT(I2Cx->SSPCR, I2C_SSPCR_SCLSEN_Msk) == I2C_SSPCR_SCLSEN_Msk); +} + +/** + * @brief + * @rmtoll SSPCR SCLSEN FL_I2C_Slave_DisableSCLStretching + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Slave_DisableSCLStretching(I2C_Type *I2Cx) +{ + CLEAR_BIT(I2Cx->SSPCR, I2C_SSPCR_SCLSEN_Msk); +} + +/** + * @brief + * @rmtoll SSPCR DMAEN FL_I2C_Slave_EnableDMAReq + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Slave_EnableDMAReq(I2C_Type *I2Cx) +{ + SET_BIT(I2Cx->SSPCR, I2C_SSPCR_DMAEN_Msk); +} + +/** + * @brief + * @rmtoll SSPCR DMAEN FL_I2C_Slave_IsEnabledDMAReq + * @param I2Cx I2C instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_I2C_Slave_IsEnabledDMAReq(I2C_Type *I2Cx) +{ + return (uint32_t)(READ_BIT(I2Cx->SSPCR, I2C_SSPCR_DMAEN_Msk) == I2C_SSPCR_DMAEN_Msk); +} + +/** + * @brief + * @rmtoll SSPCR DMAEN FL_I2C_Slave_DisableDMAReq + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Slave_DisableDMAReq(I2C_Type *I2Cx) +{ + CLEAR_BIT(I2Cx->SSPCR, I2C_SSPCR_DMAEN_Msk); +} + +/** + * @brief + * @rmtoll SSPCR ACKEN FL_I2C_Slave_EnableACK + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Slave_EnableACK(I2C_Type *I2Cx) +{ + SET_BIT(I2Cx->SSPCR, I2C_SSPCR_ACKEN_Msk); +} + +/** + * @brief + * @rmtoll SSPCR ACKEN FL_I2C_Slave_IsEnabledACK + * @param I2Cx I2C instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_I2C_Slave_IsEnabledACK(I2C_Type *I2Cx) +{ + return (uint32_t)(READ_BIT(I2Cx->SSPCR, I2C_SSPCR_ACKEN_Msk) == I2C_SSPCR_ACKEN_Msk); +} + +/** + * @brief + * @rmtoll SSPCR ACKEN FL_I2C_Slave_DisableACK + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Slave_DisableACK(I2C_Type *I2Cx) +{ + CLEAR_BIT(I2Cx->SSPCR, I2C_SSPCR_ACKEN_Msk); +} + +/** + * @brief + * @rmtoll SSPCR SDAO_DLYEN FL_I2C_Slave_EnableSDAStretching + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Slave_EnableSDAStretching(I2C_Type *I2Cx) +{ + SET_BIT(I2Cx->SSPCR, I2C_SSPCR_SDAO_DLYEN_Msk); +} + +/** + * @brief + * @rmtoll SSPCR SDAO_DLYEN FL_I2C_Slave_IsEnabledSDAStretching + * @param I2Cx I2C instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_I2C_Slave_IsEnabledSDAStretching(I2C_Type *I2Cx) +{ + return (uint32_t)(READ_BIT(I2Cx->SSPCR, I2C_SSPCR_SDAO_DLYEN_Msk) == I2C_SSPCR_SDAO_DLYEN_Msk); +} + +/** + * @brief + * @rmtoll SSPCR SDAO_DLYEN FL_I2C_Slave_DisableSDAStretching + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Slave_DisableSDAStretching(I2C_Type *I2Cx) +{ + CLEAR_BIT(I2Cx->SSPCR, I2C_SSPCR_SDAO_DLYEN_Msk); +} + +/** + * @brief + * @rmtoll SSPCR SCLI_ANFEN FL_I2C_Slave_EnableSCLAnalogFilter + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Slave_EnableSCLAnalogFilter(I2C_Type *I2Cx) +{ + SET_BIT(I2Cx->SSPCR, I2C_SSPCR_SCLI_ANFEN_Msk); +} + +/** + * @brief + * @rmtoll SSPCR SCLI_ANFEN FL_I2C_Slave_IsEnabledSCLAnalogFilter + * @param I2Cx I2C instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_I2C_Slave_IsEnabledSCLAnalogFilter(I2C_Type *I2Cx) +{ + return (uint32_t)(READ_BIT(I2Cx->SSPCR, I2C_SSPCR_SCLI_ANFEN_Msk) == I2C_SSPCR_SCLI_ANFEN_Msk); +} + +/** + * @brief + * @rmtoll SSPCR SCLI_ANFEN FL_I2C_Slave_DisableSCLAnalogFilter + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Slave_DisableSCLAnalogFilter(I2C_Type *I2Cx) +{ + CLEAR_BIT(I2Cx->SSPCR, I2C_SSPCR_SCLI_ANFEN_Msk); +} + +/** + * @brief + * @rmtoll SSPCR A10EN FL_I2C_Slave_Enable10BitAddress + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Slave_Enable10BitAddress(I2C_Type *I2Cx) +{ + SET_BIT(I2Cx->SSPCR, I2C_SSPCR_A10EN_Msk); +} + +/** + * @brief + * @rmtoll SSPCR A10EN FL_I2C_Slave_IsEnabled10BitAddress + * @param I2Cx I2C instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_I2C_Slave_IsEnabled10BitAddress(I2C_Type *I2Cx) +{ + return (uint32_t)(READ_BIT(I2Cx->SSPCR, I2C_SSPCR_A10EN_Msk) == I2C_SSPCR_A10EN_Msk); +} + +/** + * @brief + * @rmtoll SSPCR A10EN FL_I2C_Slave_Disable10BitAddress + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Slave_Disable10BitAddress(I2C_Type *I2Cx) +{ + CLEAR_BIT(I2Cx->SSPCR, I2C_SSPCR_A10EN_Msk); +} + +/** + * @brief + * @rmtoll SSPCR SSPEN FL_I2C_Slave_Enable + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Slave_Enable(I2C_Type *I2Cx) +{ + SET_BIT(I2Cx->SSPCR, I2C_SSPCR_SSPEN_Msk); +} + +/** + * @brief + * @rmtoll SSPCR SSPEN FL_I2C_Slave_IsEnabled + * @param I2Cx I2C instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_I2C_Slave_IsEnabled(I2C_Type *I2Cx) +{ + return (uint32_t)(READ_BIT(I2Cx->SSPCR, I2C_SSPCR_SSPEN_Msk) == I2C_SSPCR_SSPEN_Msk); +} + +/** + * @brief + * @rmtoll SSPCR SSPEN FL_I2C_Slave_Disable + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Slave_Disable(I2C_Type *I2Cx) +{ + CLEAR_BIT(I2Cx->SSPCR, I2C_SSPCR_SSPEN_Msk); +} + +/** + * @brief + * @rmtoll SSPIER ADEIE FL_I2C_Slave_EnableIT_AddressError + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Slave_EnableIT_AddressError(I2C_Type *I2Cx) +{ + SET_BIT(I2Cx->SSPIER, I2C_SSPIER_ADEIE_Msk); +} + +/** + * @brief + * @rmtoll SSPIER ADEIE FL_I2C_Slave_IsEnabledIT_AddressError + * @param I2Cx I2C instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_I2C_Slave_IsEnabledIT_AddressError(I2C_Type *I2Cx) +{ + return (uint32_t)(READ_BIT(I2Cx->SSPIER, I2C_SSPIER_ADEIE_Msk) == I2C_SSPIER_ADEIE_Msk); +} + +/** + * @brief + * @rmtoll SSPIER ADEIE FL_I2C_Slave_DisableIT_AddressError + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Slave_DisableIT_AddressError(I2C_Type *I2Cx) +{ + CLEAR_BIT(I2Cx->SSPIER, I2C_SSPIER_ADEIE_Msk); +} + +/** + * @brief + * @rmtoll SSPIER SIE FL_I2C_Slave_EnableIT_Start + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Slave_EnableIT_Start(I2C_Type *I2Cx) +{ + SET_BIT(I2Cx->SSPIER, I2C_SSPIER_SIE_Msk); +} + +/** + * @brief + * @rmtoll SSPIER SIE FL_I2C_Slave_IsEnabledIT_Start + * @param I2Cx I2C instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_I2C_Slave_IsEnabledIT_Start(I2C_Type *I2Cx) +{ + return (uint32_t)(READ_BIT(I2Cx->SSPIER, I2C_SSPIER_SIE_Msk) == I2C_SSPIER_SIE_Msk); +} + +/** + * @brief + * @rmtoll SSPIER SIE FL_I2C_Slave_DisableIT_Start + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Slave_DisableIT_Start(I2C_Type *I2Cx) +{ + CLEAR_BIT(I2Cx->SSPIER, I2C_SSPIER_SIE_Msk); +} + +/** + * @brief + * @rmtoll SSPIER PIE FL_I2C_Slave_EnableIT_Stop + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Slave_EnableIT_Stop(I2C_Type *I2Cx) +{ + SET_BIT(I2Cx->SSPIER, I2C_SSPIER_PIE_Msk); +} + +/** + * @brief + * @rmtoll SSPIER PIE FL_I2C_Slave_IsEnabledIT_Stop + * @param I2Cx I2C instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_I2C_Slave_IsEnabledIT_Stop(I2C_Type *I2Cx) +{ + return (uint32_t)(READ_BIT(I2Cx->SSPIER, I2C_SSPIER_PIE_Msk) == I2C_SSPIER_PIE_Msk); +} + +/** + * @brief + * @rmtoll SSPIER PIE FL_I2C_Slave_DisableIT_Stop + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Slave_DisableIT_Stop(I2C_Type *I2Cx) +{ + CLEAR_BIT(I2Cx->SSPIER, I2C_SSPIER_PIE_Msk); +} + +/** + * @brief + * @rmtoll SSPIER WCOLIE FL_I2C_Slave_EnableIT_WriteConflict + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Slave_EnableIT_WriteConflict(I2C_Type *I2Cx) +{ + SET_BIT(I2Cx->SSPIER, I2C_SSPIER_WCOLIE_Msk); +} + +/** + * @brief + * @rmtoll SSPIER WCOLIE FL_I2C_Slave_IsEnabledIT_WriteConflict + * @param I2Cx I2C instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_I2C_Slave_IsEnabledIT_WriteConflict(I2C_Type *I2Cx) +{ + return (uint32_t)(READ_BIT(I2Cx->SSPIER, I2C_SSPIER_WCOLIE_Msk) == I2C_SSPIER_WCOLIE_Msk); +} + +/** + * @brief + * @rmtoll SSPIER WCOLIE FL_I2C_Slave_DisableIT_WriteConflict + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Slave_DisableIT_WriteConflict(I2C_Type *I2Cx) +{ + CLEAR_BIT(I2Cx->SSPIER, I2C_SSPIER_WCOLIE_Msk); +} + +/** + * @brief + * @rmtoll SSPIER SSPOVIE FL_I2C_Slave_EnableIT_BuffOverflow + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Slave_EnableIT_BuffOverflow(I2C_Type *I2Cx) +{ + SET_BIT(I2Cx->SSPIER, I2C_SSPIER_SSPOVIE_Msk); +} + +/** + * @brief + * @rmtoll SSPIER SSPOVIE FL_I2C_Slave_IsEnabledIT_BuffOverflow + * @param I2Cx I2C instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_I2C_Slave_IsEnabledIT_BuffOverflow(I2C_Type *I2Cx) +{ + return (uint32_t)(READ_BIT(I2Cx->SSPIER, I2C_SSPIER_SSPOVIE_Msk) == I2C_SSPIER_SSPOVIE_Msk); +} + +/** + * @brief + * @rmtoll SSPIER SSPOVIE FL_I2C_Slave_DisableIT_BuffOverflow + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Slave_DisableIT_BuffOverflow(I2C_Type *I2Cx) +{ + CLEAR_BIT(I2Cx->SSPIER, I2C_SSPIER_SSPOVIE_Msk); +} + +/** + * @brief + * @rmtoll SSPIER ADMIE FL_I2C_Slave_EnableIT_AddressMatch + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Slave_EnableIT_AddressMatch(I2C_Type *I2Cx) +{ + SET_BIT(I2Cx->SSPIER, I2C_SSPIER_ADMIE_Msk); +} + +/** + * @brief + * @rmtoll SSPIER ADMIE FL_I2C_Slave_IsEnabledIT_AddressMatch + * @param I2Cx I2C instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_I2C_Slave_IsEnabledIT_AddressMatch(I2C_Type *I2Cx) +{ + return (uint32_t)(READ_BIT(I2Cx->SSPIER, I2C_SSPIER_ADMIE_Msk) == I2C_SSPIER_ADMIE_Msk); +} + +/** + * @brief + * @rmtoll SSPIER ADMIE FL_I2C_Slave_DisableIT_AddressMatch + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Slave_DisableIT_AddressMatch(I2C_Type *I2Cx) +{ + CLEAR_BIT(I2Cx->SSPIER, I2C_SSPIER_ADMIE_Msk); +} + +/** + * @brief + * @rmtoll SSPIER TXIE FL_I2C_Slave_EnableIT_TXComplete + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Slave_EnableIT_TXComplete(I2C_Type *I2Cx) +{ + SET_BIT(I2Cx->SSPIER, I2C_SSPIER_TXIE_Msk); +} + +/** + * @brief + * @rmtoll SSPIER TXIE FL_I2C_Slave_IsEnabledIT_TXComplete + * @param I2Cx I2C instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_I2C_Slave_IsEnabledIT_TXComplete(I2C_Type *I2Cx) +{ + return (uint32_t)(READ_BIT(I2Cx->SSPIER, I2C_SSPIER_TXIE_Msk) == I2C_SSPIER_TXIE_Msk); +} + +/** + * @brief + * @rmtoll SSPIER TXIE FL_I2C_Slave_DisableIT_TXComplete + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Slave_DisableIT_TXComplete(I2C_Type *I2Cx) +{ + CLEAR_BIT(I2Cx->SSPIER, I2C_SSPIER_TXIE_Msk); +} + +/** + * @brief + * @rmtoll SSPIER RXIE FL_I2C_Slave_EnableIT_RXComplete + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Slave_EnableIT_RXComplete(I2C_Type *I2Cx) +{ + SET_BIT(I2Cx->SSPIER, I2C_SSPIER_RXIE_Msk); +} + +/** + * @brief + * @rmtoll SSPIER RXIE FL_I2C_Slave_IsEnabledIT_RXComplete + * @param I2Cx I2C instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_I2C_Slave_IsEnabledIT_RXComplete(I2C_Type *I2Cx) +{ + return (uint32_t)(READ_BIT(I2Cx->SSPIER, I2C_SSPIER_RXIE_Msk) == I2C_SSPIER_RXIE_Msk); +} + +/** + * @brief + * @rmtoll SSPIER RXIE FL_I2C_Slave_DisableIT_RXComplete + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Slave_DisableIT_RXComplete(I2C_Type *I2Cx) +{ + CLEAR_BIT(I2Cx->SSPIER, I2C_SSPIER_RXIE_Msk); +} + +/** + * @brief + * @rmtoll SSPISR ADE FL_I2C_Slave_IsActiveFlag_AddressError + * @param I2Cx I2C instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_I2C_Slave_IsActiveFlag_AddressError(I2C_Type *I2Cx) +{ + return (uint32_t)(READ_BIT(I2Cx->SSPISR, I2C_SSPISR_ADE_Msk) == (I2C_SSPISR_ADE_Msk)); +} + +/** + * @brief + * @rmtoll SSPISR ADE FL_I2C_Slave_ClearFlag_AddressError + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Slave_ClearFlag_AddressError(I2C_Type *I2Cx) +{ + WRITE_REG(I2Cx->SSPISR, I2C_SSPISR_ADE_Msk); +} + +/** + * @brief + * @rmtoll SSPISR S FL_I2C_Slave_IsActiveFlag_Start + * @param I2Cx I2C instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_I2C_Slave_IsActiveFlag_Start(I2C_Type *I2Cx) +{ + return (uint32_t)(READ_BIT(I2Cx->SSPISR, I2C_SSPISR_S_Msk) == (I2C_SSPISR_S_Msk)); +} + +/** + * @brief + * @rmtoll SSPISR P FL_I2C_Slave_IsActiveFlag_Stop + * @param I2Cx I2C instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_I2C_Slave_IsActiveFlag_Stop(I2C_Type *I2Cx) +{ + return (uint32_t)(READ_BIT(I2Cx->SSPISR, I2C_SSPISR_P_Msk) == (I2C_SSPISR_P_Msk)); +} + +/** + * @brief + * @rmtoll SSPISR WCOL FL_I2C_Slave_IsActiveFlag_WriteConflict + * @param I2Cx I2C instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_I2C_Slave_IsActiveFlag_WriteConflict(I2C_Type *I2Cx) +{ + return (uint32_t)(READ_BIT(I2Cx->SSPISR, I2C_SSPISR_WCOL_Msk) == (I2C_SSPISR_WCOL_Msk)); +} + +/** + * @brief + * @rmtoll SSPISR WCOL FL_I2C_Slave_ClearFlag_WriteConflict + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Slave_ClearFlag_WriteConflict(I2C_Type *I2Cx) +{ + WRITE_REG(I2Cx->SSPISR, I2C_SSPISR_WCOL_Msk); +} + +/** + * @brief + * @rmtoll SSPISR SSPOV FL_I2C_Slave_IsActiveFlag_BuffOverflow + * @param I2Cx I2C instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_I2C_Slave_IsActiveFlag_BuffOverflow(I2C_Type *I2Cx) +{ + return (uint32_t)(READ_BIT(I2Cx->SSPISR, I2C_SSPISR_SSPOV_Msk) == (I2C_SSPISR_SSPOV_Msk)); +} + +/** + * @brief + * @rmtoll SSPISR SSPOV FL_I2C_Slave_ClearFlag_BuffOverflow + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Slave_ClearFlag_BuffOverflow(I2C_Type *I2Cx) +{ + WRITE_REG(I2Cx->SSPISR, I2C_SSPISR_SSPOV_Msk); +} + +/** + * @brief + * @rmtoll SSPISR ADM FL_I2C_Slave_IsActiveFlag_AddressMatch + * @param I2Cx I2C instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_I2C_Slave_IsActiveFlag_AddressMatch(I2C_Type *I2Cx) +{ + return (uint32_t)(READ_BIT(I2Cx->SSPISR, I2C_SSPISR_ADM_Msk) == (I2C_SSPISR_ADM_Msk)); +} + +/** + * @brief + * @rmtoll SSPISR ADM FL_I2C_Slave_ClearFlag_AddressMatch + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Slave_ClearFlag_AddressMatch(I2C_Type *I2Cx) +{ + WRITE_REG(I2Cx->SSPISR, I2C_SSPISR_ADM_Msk); +} + +/** + * @brief + * @rmtoll SSPISR TXIF FL_I2C_Slave_IsActiveFlag_TXComplete + * @param I2Cx I2C instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_I2C_Slave_IsActiveFlag_TXComplete(I2C_Type *I2Cx) +{ + return (uint32_t)(READ_BIT(I2Cx->SSPISR, I2C_SSPISR_TXIF_Msk) == (I2C_SSPISR_TXIF_Msk)); +} + +/** + * @brief + * @rmtoll SSPISR TXIF FL_I2C_Slave_ClearFlag_TXComplete + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Slave_ClearFlag_TXComplete(I2C_Type *I2Cx) +{ + WRITE_REG(I2Cx->SSPISR, I2C_SSPISR_TXIF_Msk); +} + +/** + * @brief + * @rmtoll SSPISR RXIF FL_I2C_Slave_IsActiveFlag_RXComplete + * @param I2Cx I2C instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_I2C_Slave_IsActiveFlag_RXComplete(I2C_Type *I2Cx) +{ + return (uint32_t)(READ_BIT(I2Cx->SSPISR, I2C_SSPISR_RXIF_Msk) == (I2C_SSPISR_RXIF_Msk)); +} + +/** + * @brief + * @rmtoll SSPISR RXIF FL_I2C_Slave_ClearFlag_RXComplete + * @param I2Cx I2C instance + * @retval None + */ +__STATIC_INLINE void FL_I2C_Slave_ClearFlag_RXComplete(I2C_Type *I2Cx) +{ + WRITE_REG(I2Cx->SSPISR, I2C_SSPISR_RXIF_Msk); +} + +/** + * @brief + * @rmtoll SSPSR BUSY FL_I2C_Slave_IsActiveFlag_Busy + * @param I2Cx I2C instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_I2C_Slave_IsActiveFlag_Busy(I2C_Type *I2Cx) +{ + return (uint32_t)(READ_BIT(I2Cx->SSPSR, I2C_SSPSR_BUSY_Msk) == (I2C_SSPSR_BUSY_Msk)); +} + +/** + * @brief + * @rmtoll SSPSR RW FL_I2C_Slave_GetDataDirection + * @param I2Cx I2C instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_I2C_SSP_DATA_DIRECTION_SLAVE_TO_MASTER + * @arg @ref FL_I2C_SSP_DATA_DIRECTION_MASTER_TO_SLAVE + */ +__STATIC_INLINE uint32_t FL_I2C_Slave_GetDataDirection(I2C_Type *I2Cx) +{ + return (uint32_t)(READ_BIT(I2Cx->SSPSR, I2C_SSPSR_RW_Msk)); +} + +/** + * @brief + * @rmtoll SSPSR DA FL_I2C_Slave_GetDataType + * @param I2Cx I2C instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_I2C_SSP_DATA_TYPE_DATA + * @arg @ref FL_I2C_SSP_DATA_TYPE_ADDR + */ +__STATIC_INLINE uint32_t FL_I2C_Slave_GetDataType(I2C_Type *I2Cx) +{ + return (uint32_t)(READ_BIT(I2Cx->SSPSR, I2C_SSPSR_DA_Msk)); +} + +/** + * @brief + * @rmtoll SSPSR BF FL_I2C_Slave_GetBuffStatus + * @param I2Cx I2C instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_I2C_SSP_DATA_BUFF_STATUS_FULL + * @arg @ref FL_I2C_SSP_DATA_BUFF_STATUS_EMPTY + */ +__STATIC_INLINE uint32_t FL_I2C_Slave_GetBuffStatus(I2C_Type *I2Cx) +{ + return (uint32_t)(READ_BIT(I2Cx->SSPSR, I2C_SSPSR_BF_Msk)); +} + +/** + * @brief + * @rmtoll SSPBUF FL_I2C_Slave_WriteTXBuff + * @param I2Cx I2C instance + * @param data + * @retval None + */ +__STATIC_INLINE void FL_I2C_Slave_WriteTXBuff(I2C_Type *I2Cx, uint32_t data) +{ + MODIFY_REG(I2Cx->SSPBUF, (0xffU << 0U), (data << 0U)); +} + +/** + * @brief + * @rmtoll SSPBUF FL_I2C_Slave_ReadRXBuff + * @param I2Cx I2C instance + * @retval + */ +__STATIC_INLINE uint32_t FL_I2C_Slave_ReadRXBuff(I2C_Type *I2Cx) +{ + return (uint32_t)(READ_BIT(I2Cx->SSPBUF, 0xffU) >> 0U); +} + +/** + * @brief + * @rmtoll SSPADR FL_I2C_Slave_WriteSlaveAddress + * @param I2Cx I2C instance + * @param address + * @retval None + */ +__STATIC_INLINE void FL_I2C_Slave_WriteSlaveAddress(I2C_Type *I2Cx, uint32_t address) +{ + MODIFY_REG(I2Cx->SSPADR, (0x3ffU << 0U), (address << 0U)); +} + +/** + * @brief + * @rmtoll SSPADR FL_I2C_Slave_ReadSlaveAddress + * @param I2Cx I2C instance + * @retval + */ +__STATIC_INLINE uint32_t FL_I2C_Slave_ReadSlaveAddress(I2C_Type *I2Cx) +{ + return (uint32_t)(READ_BIT(I2Cx->SSPADR, 0x3ffU) >> 0U); +} + +/** + * @} + */ + +/** @defgroup I2C_FL_EF_Init Initialization and de-initialization functions + * @{ + */ +FL_ErrorStatus FL_I2C_DeInit(I2C_Type *I2Cx); +void FL_I2C_SlaveMode_StructInit(FL_I2C_SlaveMode_InitTypeDef *I2C_InitStruct); +void FL_I2C_MasterMode_StructInit(FL_I2C_MasterMode_InitTypeDef *I2C_InitStruct); +FL_ErrorStatus FL_I2C_SlaveMode_Init(I2C_Type *I2cx, FL_I2C_SlaveMode_InitTypeDef *I2C_InitStruct); +FL_ErrorStatus FL_I2C_MasterMode_Init(I2C_Type *I2Cx, FL_I2C_MasterMode_InitTypeDef *I2C_InitStruct); + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif /* __FM33LG0XX_FL_I2C_H*/ + +/*************************Py_Code_Generator Version: 0.1-0.11-0.1 @ 2020-09-27*************************/ +/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/ diff --git a/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_iwdt.h b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_iwdt.h new file mode 100644 index 0000000..041af0c --- /dev/null +++ b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_iwdt.h @@ -0,0 +1,373 @@ + /** + ******************************************************************************************************* + * @file fm33lg0xx_fl_iwdt.h + * @author FMSH Application Team + * @brief Head file of IWDT FL Module + ******************************************************************************************************* + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + + + +/* Define to prevent recursive inclusion---------------------------------------------------------------*/ +#ifndef __FM33LG0XX_FL_IWDT_H +#define __FM33LG0XX_FL_IWDT_H + +#ifdef __cplusplus +extern "C" { +#endif +/* Includes -------------------------------------------------------------------------------------------*/ +#include "fm33lg0xx_fl_def.h" +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @defgroup IWDT IWDT + * @brief IWDT FL driver + * @{ + */ + +/* Exported types -------------------------------------------------------------------------------------*/ +/** @defgroup IWDT_FL_ES_INIT IWDT Exported Init structures + * @{ + */ + +/** + * @brief FL IWDT Init Sturcture definition + */ +typedef struct +{ + /* 看门狗溢出时间 */ + uint32_t overflowPeriod; + /* 清狗窗口 */ + uint32_t iwdtWindows; + +} FL_IWDT_InitTypeDef; +/** + * @} + */ +/* Exported constants ---------------------------------------------------------------------------------*/ +/** @defgroup IWDT_FL_Exported_Constants IWDT Exported Constants + * @{ + */ + +#define IWDT_RELOAD_KEY (0x12345A5AUL) + +#define IWDT_CR_FREEZE_Pos (11Ul) +#define IWDT_CR_FREEZE_Msk (0x1Ul << IWDT_CR_FREEZE_Pos) +#define IWDT_CR_FREEZE IWDT_CR_FREEZE_Msk + +#define IWDT_CR_CFG_Pos (0U) +#define IWDT_CR_CFG_Msk (0x7U << IWDT_CR_CFG_Pos) +#define IWDT_CR_CFG IWDT_CR_CFG_Msk + +#define IWDT_IER_IE_Pos (0U) +#define IWDT_IER_IE_Msk (0x1U << IWDT_IER_IE_Pos) +#define IWDT_IER_IE IWDT_IER_IE_Msk + +#define IWDT_ISR_WINF_Pos (0U) +#define IWDT_ISR_WINF_Msk (0x1U << IWDT_ISR_WINF_Pos) +#define IWDT_ISR_WINF IWDT_ISR_WINF_Msk + + + + + + +#define FL_IWDT_PERIOD_125MS (0x0Ul << IWDT_CR_CFG_Pos) +#define FL_IWDT_PERIOD_250MS (0x1Ul << IWDT_CR_CFG_Pos) +#define FL_IWDT_PERIOD_500MS (0x2Ul << IWDT_CR_CFG_Pos) +#define FL_IWDT_PERIOD_1000MS (0x3Ul << IWDT_CR_CFG_Pos) +#define FL_IWDT_PERIOD_2000MS (0x4Ul << IWDT_CR_CFG_Pos) +#define FL_IWDT_PERIOD_4000MS (0x5Ul << IWDT_CR_CFG_Pos) +#define FL_IWDT_PERIOD_8000MS (0x6Ul << IWDT_CR_CFG_Pos) +#define FL_IWDT_PERIOD_16000MS (0x7Ul << IWDT_CR_CFG_Pos) + + +/** + * @} + */ +/* Exported functions ---------------------------------------------------------------------------------*/ +/** @defgroup IWDT_FL_Exported_Functions IWDT Exported Functions + * @{ + */ + +/** + * @brief Set IWDT service register + * @rmtoll SERV FL_IWDT_ReloadCounter + * @param IWDTx IWDT instance + * @retval None + */ +__STATIC_INLINE void FL_IWDT_ReloadCounter(IWDT_Type *IWDTx) +{ + volatile uint32_t val = 0; + IWDTx->SERV = IWDT_RELOAD_KEY; + val = READ_REG(IWDTx->SERV); +} + +/** + * @brief Set freeze in sleep enable + * @rmtoll CR FREEZE FL_IWDT_EnableFreezeWhileSleep + * @param IWDTx IWDT instance + * @retval None + */ +__STATIC_INLINE void FL_IWDT_EnableFreezeWhileSleep(IWDT_Type *IWDTx) +{ + volatile uint32_t val = 0; + SET_BIT(IWDTx->CR, IWDT_CR_FREEZE_Msk); + val = READ_REG(IWDTx->SERV); +} + +/** + * @brief Set freeze in sleep disable + * @rmtoll CR FREEZE FL_IWDT_DisableFreezeWhileSleep + * @param IWDTx IWDT instance + * @retval None + */ +__STATIC_INLINE void FL_IWDT_DisableFreezeWhileSleep(IWDT_Type *IWDTx) +{ + volatile uint32_t val = 0; + CLEAR_BIT(IWDTx->CR, IWDT_CR_FREEZE_Msk); + val = READ_REG(IWDTx->SERV); +} + +/** + * @brief Get freeze in sleep enable status + * @rmtoll CR FREEZE FL_IWDT_IsEnabledFreezeWhileSleep + * @param IWDTx IWDT instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_IWDT_IsEnabledFreezeWhileSleep(IWDT_Type *IWDTx) +{ + volatile uint32_t val = 0; + uint32_t temp; + temp = (uint32_t)(READ_BIT(IWDTx->CR, IWDT_CR_FREEZE_Msk) == IWDT_CR_FREEZE_Msk); + val = READ_REG(IWDTx->SERV); + return temp; +} + +/** + * @brief Set IWDT overflow period + * @rmtoll CR CFG FL_IWDT_SetPeriod + * @param IWDTx IWDT instance + * @param period This parameter can be one of the following values: + * @arg @ref FL_IWDT_PERIOD_125MS + * @arg @ref FL_IWDT_PERIOD_250MS + * @arg @ref FL_IWDT_PERIOD_500MS + * @arg @ref FL_IWDT_PERIOD_1000MS + * @arg @ref FL_IWDT_PERIOD_2000MS + * @arg @ref FL_IWDT_PERIOD_4000MS + * @arg @ref FL_IWDT_PERIOD_8000MS + * @arg @ref FL_IWDT_PERIOD_16000MS + * @retval None + */ +__STATIC_INLINE void FL_IWDT_SetPeriod(IWDT_Type *IWDTx, uint32_t period) +{ + volatile uint32_t val = 0; + MODIFY_REG(IWDTx->CR, IWDT_CR_CFG_Msk, period); + val = READ_REG(IWDTx->SERV); +} + +/** + * @brief Get IWDT overflow period + * @rmtoll CR CFG FL_IWDT_GetPeriod + * @param IWDTx IWDT instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_IWDT_PERIOD_125MS + * @arg @ref FL_IWDT_PERIOD_250MS + * @arg @ref FL_IWDT_PERIOD_500MS + * @arg @ref FL_IWDT_PERIOD_1000MS + * @arg @ref FL_IWDT_PERIOD_2000MS + * @arg @ref FL_IWDT_PERIOD_4000MS + * @arg @ref FL_IWDT_PERIOD_8000MS + * @arg @ref FL_IWDT_PERIOD_16000MS + */ +__STATIC_INLINE uint32_t FL_IWDT_GetPeriod(IWDT_Type *IWDTx) +{ + volatile uint32_t val = 0; + uint32_t temp; + temp = (uint32_t)(READ_BIT(IWDTx->CR, IWDT_CR_CFG_Msk)); + val = READ_REG(IWDTx->SERV); + return temp; +} + +/** + * @brief Get IWDT current counter value + * @rmtoll CNT FL_IWDT_ReadCounter + * @param IWDTx IWDT instance + * @retval + */ +__STATIC_INLINE uint32_t FL_IWDT_ReadCounter(IWDT_Type *IWDTx) +{ + volatile uint32_t val = 0; + uint32_t temp; + temp = (uint32_t)(READ_BIT(IWDTx->CNT, (0xfffU << 0U)) >> 0U); + val = READ_REG(IWDTx->SERV); + return temp; +} + +/** + * @brief Set IWDT window register + * @rmtoll WIN FL_IWDT_WriteWindow + * @param IWDTx IWDT instance + * @param value + * @retval None + */ +__STATIC_INLINE void FL_IWDT_WriteWindow(IWDT_Type *IWDTx, uint32_t value) +{ + volatile uint32_t val = 0; + IWDTx->WIN = (value & 0xFFF); + val = READ_REG(IWDTx->SERV); +} + +/** + * @brief Get IWDT window register + * @rmtoll WIN FL_IWDT_ReadWindow + * @param IWDTx IWDT instance + * @retval + */ +__STATIC_INLINE uint32_t FL_IWDT_ReadWindow(IWDT_Type *IWDTx) +{ + volatile uint32_t val = 0; + uint32_t temp; + temp = (uint32_t)(READ_BIT(IWDTx->WIN, (0xfffU << 0U)) >> 0U); + val = READ_REG(IWDTx->SERV); + return temp; +} + +/** + * @brief IWDT interrupt enable + * @rmtoll IER IE FL_IWDT_EnableIT_EnterWindow + * @param IWDTx IWDT instance + * @retval None + */ +__STATIC_INLINE void FL_IWDT_EnableIT_EnterWindow(IWDT_Type *IWDTx) +{ + volatile uint32_t val = 0; + IWDTx->IER = FL_ENABLE; + val = READ_REG(IWDTx->SERV); +} + +/** + * @brief IWDT interrupt disable + * @rmtoll IER IE FL_IWDT_DisableIT_EnterWindow + * @param IWDTx IWDT instance + * @retval None + */ +__STATIC_INLINE void FL_IWDT_DisableIT_EnterWindow(IWDT_Type *IWDTx) +{ + volatile uint32_t val = 0; + IWDTx->IER = FL_DISABLE; + val = READ_REG(IWDTx->SERV); +} + +/** + * @brief Get IWDT interrupt enable status + * @rmtoll IER IE FL_IWDT_IsEnabledIT_EnterWindow + * @param IWDTx IWDT instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_IWDT_IsEnabledIT_EnterWindow(IWDT_Type *IWDTx) +{ + volatile uint32_t val = 0; + uint32_t temp; + temp = (uint32_t)(READ_BIT(IWDTx->IER, IWDT_IER_IE_Msk) == IWDT_IER_IE_Msk); + val = READ_REG(IWDTx->SERV); + return temp; +} + +/** + * @brief Get IWDT window interrupt flag + * @rmtoll ISR WINF FL_IWDT_IsActiveFlag_EnterWindow + * @param IWDTx IWDT instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_IWDT_IsActiveFlag_EnterWindow(IWDT_Type *IWDTx) +{ + volatile uint32_t val = 0; + uint32_t temp; + temp = (uint32_t)(READ_BIT(IWDTx->ISR, IWDT_ISR_WINF_Msk)); + val = READ_REG(IWDTx->SERV); + return temp; +} + +/** + * @brief Clear IWDT window interrupt flag + * @rmtoll ISR WINF FL_IWDT_ClearFlag_EnterWindow + * @param IWDTx IWDT instance + * @retval None + */ +__STATIC_INLINE void FL_IWDT_ClearFlag_EnterWindow(IWDT_Type *IWDTx) +{ + volatile uint32_t val = 0; + IWDTx->ISR = IWDT_ISR_WINF_Msk; + val = READ_REG(IWDTx->SERV); +} + +/** + * @} + */ + +/** @defgroup IWDT_FL_EF_Init Initialization and de-initialization functions + * @{ + */ +FL_ErrorStatus FL_IWDT_DeInit(IWDT_Type *IWDTx); +void FL_IWDT_StructInit(FL_IWDT_InitTypeDef *IWDT_InitStruct); +FL_ErrorStatus FL_IWDT_Init(IWDT_Type *IWDTx, FL_IWDT_InitTypeDef *IWDT_InitStruct); + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif /* __FM33LG0XX_FL_IWDT_H*/ + +/*************************Py_Code_Generator Version: 0.1-0.11-0.1 @ 2020-09-14*************************/ +/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/ diff --git a/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_lcd.h b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_lcd.h new file mode 100644 index 0000000..9b1d0ba --- /dev/null +++ b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_lcd.h @@ -0,0 +1,1217 @@ + /** + ******************************************************************************************************* + * @file fm33lg0xx_fl_lcd.h + * @author FMSH Application Team + * @brief Head file of LCD FL Module + ******************************************************************************************************* + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + + + +/* Define to prevent recursive inclusion---------------------------------------------------------------*/ +#ifndef __FM33LG0XX_FL_LCD_H +#define __FM33LG0XX_FL_LCD_H + +#ifdef __cplusplus +extern "C" { +#endif +/* Includes -------------------------------------------------------------------------------------------*/ +#include "fm33lg0xx_fl_def.h" +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @defgroup LCD LCD + * @brief LCD FL driver + * @{ + */ + +/* Exported types -------------------------------------------------------------------------------------*/ +/** @defgroup LCD_FL_ES_INIT LCD Exported Init structures + * @{ + */ + +/** + * @brief FL LCD Init Sturcture definition + */ +typedef struct +{ + /*! 电流源大小控制 */ + uint32_t biasCurrent; + /*! 驱动模式 */ + uint32_t mode; + /*! 偏执电平 */ + uint32_t biasVoltage; + /*! 偏执类型 */ + uint32_t biasMode; + /*! 驱动波形 */ + uint32_t waveform; + /*! COM数目 */ + uint32_t COMxNum; + /*! 显示频率 */ + uint32_t displayFreq; + /*! 显示闪烁点亮时间(ms) */ + uint32_t flickOnTime; + /*! 显示闪烁熄灭时间(ms) */ + uint32_t flickOffTime; +} FL_LCD_InitTypeDef; + +/** + * @} + */ +/* Exported constants ---------------------------------------------------------------------------------*/ +/** @defgroup LCD_FL_Exported_Constants LCD Exported Constants + * @{ + */ + +#define LCD_CR_SCFSEL_Pos (20U) +#define LCD_CR_SCFSEL_Msk (0x7Ul << LCD_CR_SCFSEL_Pos) +#define LCD_CR_SCFSEL LCD_CR_SCFSEL_Msk + +#define LCD_CR_SC_CTRL_Pos (18U) +#define LCD_CR_SC_CTRL_Msk (0x3Ul << LCD_CR_SC_CTRL_Pos) +#define LCD_CR_SC_CTRL LCD_CR_SC_CTRL_Msk + +#define LCD_CR_IC_CTRL_Pos (16U) +#define LCD_CR_IC_CTRL_Msk (0x3Ul << LCD_CR_IC_CTRL_Pos) +#define LCD_CR_IC_CTRL LCD_CR_IC_CTRL_Msk + +#define LCD_CR_ENMODE_Pos (15U) +#define LCD_CR_ENMODE_Msk (0x1Ul << LCD_CR_ENMODE_Pos) +#define LCD_CR_ENMODE LCD_CR_ENMODE_Msk + +#define LCD_CR_FLICK_Pos (14Ul) +#define LCD_CR_FLICK_Msk (0x1Ul << LCD_CR_FLICK_Pos) +#define LCD_CR_FLICK LCD_CR_FLICK_Msk + +#define LCD_CR_BIAS_Pos (8U) +#define LCD_CR_BIAS_Msk (0xfU << LCD_CR_BIAS_Pos) +#define LCD_CR_BIAS LCD_CR_BIAS_Msk + +#define LCD_CR_BIASMD_Pos (5U) +#define LCD_CR_BIASMD_Msk (0x1U << LCD_CR_BIASMD_Pos) +#define LCD_CR_BIASMD LCD_CR_BIASMD_Msk + +#define LCD_CR_ANTIPOLAR_Pos (4U) +#define LCD_CR_ANTIPOLAR_Msk (0x1U << LCD_CR_ANTIPOLAR_Pos) +#define LCD_CR_ANTIPOLAR LCD_CR_ANTIPOLAR_Msk + +#define LCD_CR_WFT_Pos (3U) +#define LCD_CR_WFT_Msk (0x1U << LCD_CR_WFT_Pos) +#define LCD_CR_WFT LCD_CR_WFT_Msk + +#define LCD_CR_LMUX_Pos (1U) +#define LCD_CR_LMUX_Msk (0x3U << LCD_CR_LMUX_Pos) +#define LCD_CR_LMUX LCD_CR_LMUX_Msk + +#define LCD_CR_EN_Pos (0U) +#define LCD_CR_EN_Msk (0x1U << LCD_CR_EN_Pos) +#define LCD_CR_EN LCD_CR_EN_Msk + +#define LCD_FCR_DF_Pos (0U) +#define LCD_FCR_DF_Msk (0xffU << LCD_FCR_DF_Pos) +#define LCD_FCR_DF LCD_FCR_DF_Msk + +#define LCD_FLKT_TOFF_Pos (8U) +#define LCD_FLKT_TOFF_Msk (0xffU << LCD_FLKT_TOFF_Pos) +#define LCD_FLKT_TOFF LCD_FLKT_TOFF_Msk + +#define LCD_FLKT_TON_Pos (0U) +#define LCD_FLKT_TON_Msk (0xffU << LCD_FLKT_TON_Pos) +#define LCD_FLKT_TON LCD_FLKT_TON_Msk + +#define LCD_IER_DONIE_Pos (1U) +#define LCD_IER_DONIE_Msk (0x1U << LCD_IER_DONIE_Pos) +#define LCD_IER_DONIE LCD_IER_DONIE_Msk + +#define LCD_IER_DOFFIE_Pos (0U) +#define LCD_IER_DOFFIE_Msk (0x1U << LCD_IER_DOFFIE_Pos) +#define LCD_IER_DOFFIE LCD_IER_DOFFIE_Msk + +#define LCD_ISR_DONIF_Pos (1U) +#define LCD_ISR_DONIF_Msk (0x1U << LCD_ISR_DONIF_Pos) +#define LCD_ISR_DONIF LCD_ISR_DONIF_Msk + +#define LCD_ISR_DOFFIF_Pos (0U) +#define LCD_ISR_DOFFIF_Msk (0x1U << LCD_ISR_DOFFIF_Pos) +#define LCD_ISR_DOFFIF LCD_ISR_DOFFIF_Msk + +#define LCD_DATA0_DSDA_Pos (0U) +#define LCD_DATA0_DSDA_Msk (0xffffffffU << LCD_DATA0_DSDA_Pos) +#define LCD_DATA0_DSDA LCD_DATA0_DSDA_Msk + + + +#define FL_LCD_DATA_REG0 (0x0U << 0U) +#define FL_LCD_DATA_REG1 (0x1U << 0U) +#define FL_LCD_DATA_REG2 (0x2U << 0U) +#define FL_LCD_DATA_REG3 (0x3U << 0U) +#define FL_LCD_DATA_REG4 (0x4U << 0U) +#define FL_LCD_DATA_REG5 (0x5U << 0U) +#define FL_LCD_DATA_REG6 (0x6U << 0U) +#define FL_LCD_DATA_REG7 (0x7U << 0U) +#define FL_LCD_DATA_REG8 (0x8U << 0U) +#define FL_LCD_DATA_REG9 (0x9U << 0U) +#define FL_LCD_COMEN_COM0 (0x1U << 0U) +#define FL_LCD_COMEN_COM1 (0x1U << 1U) +#define FL_LCD_COMEN_COM2 (0x1U << 2U) +#define FL_LCD_COMEN_COM3 (0x1U << 3U) +#define FL_LCD_COMEN_COM4 (0x1U << 28U) +#define FL_LCD_COMEN_COM5 (0x1U << 29U) +#define FL_LCD_COMEN_COM6 (0x1U << 30U) +#define FL_LCD_COMEN_COM7 (0x1U << 31U) +#define FL_LCD_SEGEN0_SEG0 (0x1U << 0U) +#define FL_LCD_SEGEN0_SEG1 (0x1U << 1U) +#define FL_LCD_SEGEN0_SEG2 (0x1U << 2U) +#define FL_LCD_SEGEN0_SEG3 (0x1U << 3U) +#define FL_LCD_SEGEN0_SEG4 (0x1U << 4U) +#define FL_LCD_SEGEN0_SEG5 (0x1U << 5U) +#define FL_LCD_SEGEN0_SEG6 (0x1U << 6U) +#define FL_LCD_SEGEN0_SEG7 (0x1U << 7U) +#define FL_LCD_SEGEN0_SEG8 (0x1U << 8U) +#define FL_LCD_SEGEN0_SEG9 (0x1U << 9U) +#define FL_LCD_SEGEN0_SEG10 (0x1U << 10U) +#define FL_LCD_SEGEN0_SEG11 (0x1U << 11U) +#define FL_LCD_SEGEN0_SEG12 (0x1U << 12U) +#define FL_LCD_SEGEN0_SEG13 (0x1U << 13U) +#define FL_LCD_SEGEN0_SEG14 (0x1U << 14U) +#define FL_LCD_SEGEN0_SEG15 (0x1U << 15U) +#define FL_LCD_SEGEN0_SEG16 (0x1U << 16U) +#define FL_LCD_SEGEN0_SEG17 (0x1U << 17U) +#define FL_LCD_SEGEN0_SEG18 (0x1U << 18U) +#define FL_LCD_SEGEN0_SEG19 (0x1U << 19U) +#define FL_LCD_SEGEN0_SEG20 (0x1U << 20U) +#define FL_LCD_SEGEN0_SEG21 (0x1U << 21U) +#define FL_LCD_SEGEN0_SEG22 (0x1U << 22U) +#define FL_LCD_SEGEN0_SEG23 (0x1U << 23U) +#define FL_LCD_SEGEN0_SEG24 (0x1U << 24U) +#define FL_LCD_SEGEN0_SEG25 (0x1U << 25U) +#define FL_LCD_SEGEN0_SEG26 (0x1U << 26U) +#define FL_LCD_SEGEN0_SEG27 (0x1U << 27U) +#define FL_LCD_SEGEN0_SEG28 (0x1U << 28U) +#define FL_LCD_SEGEN0_SEG29 (0x1U << 29U) +#define FL_LCD_SEGEN0_SEG30 (0x1U << 30U) +#define FL_LCD_SEGEN0_SEG31 (0x1U << 31U) +#define FL_LCD_SEGEN1_SEG0 (0x1U << 0U) +#define FL_LCD_SEGEN1_SEG1 (0x1U << 1U) +#define FL_LCD_SEGEN1_SEG2 (0x1U << 2U) +#define FL_LCD_SEGEN1_SEG3 (0x1U << 3U) +#define FL_LCD_SEGEN1_SEG4 (0x1U << 4U) +#define FL_LCD_SEGEN1_SEG5 (0x1U << 5U) +#define FL_LCD_SEGEN1_SEG6 (0x1U << 6U) +#define FL_LCD_SEGEN1_SEG7 (0x1U << 7U) +#define FL_LCD_SEGEN1_SEG8 (0x1U << 8U) +#define FL_LCD_SEGEN1_SEG9 (0x1U << 9U) +#define FL_LCD_SEGEN1_SEG10 (0x1U << 10U) +#define FL_LCD_SEGEN1_SEG11 (0x1U << 11U) + + + +#define FL_LCD_CAP_DRIVER_FREQ_FRAME_COM (0x0U << LCD_CR_SCFSEL_Pos) +#define FL_LCD_CAP_DRIVER_FREQ_LSCLK_DIV8 (0x1U << LCD_CR_SCFSEL_Pos) +#define FL_LCD_CAP_DRIVER_FREQ_LSCLK_DIV16 (0x2U << LCD_CR_SCFSEL_Pos) +#define FL_LCD_CAP_DRIVER_FREQ_LSCLK_DIV32 (0x3U << LCD_CR_SCFSEL_Pos) +#define FL_LCD_CAP_DRIVER_FREQ_LSCLK_DIV64 (0x4U << LCD_CR_SCFSEL_Pos) +#define FL_LCD_CAP_DRIVER_FREQ_LSCLK_DIV128 (0x5U << LCD_CR_SCFSEL_Pos) +#define FL_LCD_CAP_DRIVER_FREQ_LSCLK_DIV256 (0x6U << LCD_CR_SCFSEL_Pos) +#define FL_LCD_CAP_DRIVER_FREQ_LSCLK_DIV512 (0x7U << LCD_CR_SCFSEL_Pos) + + +#define FL_LCD_CAP_DRIVER_MODE_ONE (0x0U << LCD_CR_SC_CTRL_Pos) +#define FL_LCD_CAP_DRIVER_MODE_TWO (0x1U << LCD_CR_SC_CTRL_Pos) +#define FL_LCD_CAP_DRIVER_MODE_FOUR (0x2U << LCD_CR_SC_CTRL_Pos) +#define FL_LCD_CAP_DRIVER_MODE_MANY (0x3U << LCD_CR_SC_CTRL_Pos) + + +#define FL_LCD_BIAS_CURRENT_VERYHIGH (0x0Ul << LCD_CR_IC_CTRL_Pos) +#define FL_LCD_BIAS_CURRENT_HIGH (0x1Ul << LCD_CR_IC_CTRL_Pos) +#define FL_LCD_BIAS_CURRENT_MEDIUM (0x2Ul << LCD_CR_IC_CTRL_Pos) +#define FL_LCD_BIAS_CURRENT_LOW (0x3Ul << LCD_CR_IC_CTRL_Pos) + + +#define FL_LCD_DRIVER_MODE_INNER_RESISTER (0x1Ul << LCD_CR_ENMODE_Pos) +#define FL_LCD_DRIVER_MODE_OUTER_CAPACITY (0x0Ul << LCD_CR_ENMODE_Pos) + + +#define FL_LCD_BIAS_VOLTAGE_LEVEL0 (0x0Ul << LCD_CR_BIAS_Pos) +#define FL_LCD_BIAS_VOLTAGE_LEVEL1 (0x1Ul << LCD_CR_BIAS_Pos) +#define FL_LCD_BIAS_VOLTAGE_LEVEL2 (0x2Ul << LCD_CR_BIAS_Pos) +#define FL_LCD_BIAS_VOLTAGE_LEVEL3 (0x3Ul << LCD_CR_BIAS_Pos) +#define FL_LCD_BIAS_VOLTAGE_LEVEL4 (0x4Ul << LCD_CR_BIAS_Pos) +#define FL_LCD_BIAS_VOLTAGE_LEVEL5 (0x5Ul << LCD_CR_BIAS_Pos) +#define FL_LCD_BIAS_VOLTAGE_LEVEL6 (0x6Ul << LCD_CR_BIAS_Pos) +#define FL_LCD_BIAS_VOLTAGE_LEVEL7 (0x7Ul << LCD_CR_BIAS_Pos) +#define FL_LCD_BIAS_VOLTAGE_LEVEL8 (0x8Ul << LCD_CR_BIAS_Pos) +#define FL_LCD_BIAS_VOLTAGE_LEVEL9 (0x9Ul << LCD_CR_BIAS_Pos) +#define FL_LCD_BIAS_VOLTAGE_LEVEL10 (0xaUl << LCD_CR_BIAS_Pos) +#define FL_LCD_BIAS_VOLTAGE_LEVEL11 (0xbUl << LCD_CR_BIAS_Pos) +#define FL_LCD_BIAS_VOLTAGE_LEVEL12 (0xcUl << LCD_CR_BIAS_Pos) +#define FL_LCD_BIAS_VOLTAGE_LEVEL13 (0xdUl << LCD_CR_BIAS_Pos) +#define FL_LCD_BIAS_VOLTAGE_LEVEL14 (0xeUl << LCD_CR_BIAS_Pos) +#define FL_LCD_BIAS_VOLTAGE_LEVEL15 (0xfUl << LCD_CR_BIAS_Pos) + + +#define FL_LCD_BIAS_MODE_4BIAS (0x0U << LCD_CR_BIASMD_Pos) +#define FL_LCD_BIAS_MODE_3BIAS (0x1U << LCD_CR_BIASMD_Pos) + + +#define FL_LCD_ANTIPOLAR_FLOATING (0x0U << LCD_CR_ANTIPOLAR_Pos) +#define FL_LCD_ANTIPOLAR_GND (0x1U << LCD_CR_ANTIPOLAR_Pos) + +#define FL_LCD_WAVEFORM_TYPEA (0x0U << LCD_CR_WFT_Pos) +#define FL_LCD_WAVEFORM_TYPEB (0x1U << LCD_CR_WFT_Pos) + + +#define FL_LCD_COM_NUM_4COM (0x0U << LCD_CR_LMUX_Pos) +#define FL_LCD_COM_NUM_6COM (0x1U << LCD_CR_LMUX_Pos) +#define FL_LCD_COM_NUM_8COM (0x2U << LCD_CR_LMUX_Pos) + + +/** + * @} + */ +/* Exported functions ---------------------------------------------------------------------------------*/ +/** @defgroup LCD_FL_Exported_Functions LCD Exported Functions + * @{ + */ + +/** + * @brief Set Capacity Driver Freq + * @rmtoll CR SCFSEL FL_LCD_SetCapDriverFreq + * @param LCDx LCD instance + * @param freq This parameter can be one of the following values: + * @arg @ref FL_LCD_CAP_DRIVER_FREQ_FRAME_COM + * @arg @ref FL_LCD_CAP_DRIVER_FREQ_LSCLK_DIV8 + * @arg @ref FL_LCD_CAP_DRIVER_FREQ_LSCLK_DIV16 + * @arg @ref FL_LCD_CAP_DRIVER_FREQ_LSCLK_DIV32 + * @arg @ref FL_LCD_CAP_DRIVER_FREQ_LSCLK_DIV64 + * @arg @ref FL_LCD_CAP_DRIVER_FREQ_LSCLK_DIV128 + * @arg @ref FL_LCD_CAP_DRIVER_FREQ_LSCLK_DIV256 + * @arg @ref FL_LCD_CAP_DRIVER_FREQ_LSCLK_DIV512 + * @retval None + */ +__STATIC_INLINE void FL_LCD_SetCapDriverFreq(LCD_Type *LCDx, uint32_t freq) +{ + MODIFY_REG(LCDx->CR, LCD_CR_SCFSEL_Msk, freq); +} + +/** + * @brief Get Capacity Driver Freq + * @rmtoll CR SCFSEL FL_LCD_GetCapDriverFreq + * @param LCDx LCD instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_LCD_CAP_DRIVER_FREQ_FRAME_COM + * @arg @ref FL_LCD_CAP_DRIVER_FREQ_LSCLK_DIV8 + * @arg @ref FL_LCD_CAP_DRIVER_FREQ_LSCLK_DIV16 + * @arg @ref FL_LCD_CAP_DRIVER_FREQ_LSCLK_DIV32 + * @arg @ref FL_LCD_CAP_DRIVER_FREQ_LSCLK_DIV64 + * @arg @ref FL_LCD_CAP_DRIVER_FREQ_LSCLK_DIV128 + * @arg @ref FL_LCD_CAP_DRIVER_FREQ_LSCLK_DIV256 + * @arg @ref FL_LCD_CAP_DRIVER_FREQ_LSCLK_DIV512 + */ +__STATIC_INLINE uint32_t FL_LCD_GetCapDriverFreq(LCD_Type *LCDx) +{ + return (uint32_t)(READ_BIT(LCDx->CR, LCD_CR_SCFSEL_Msk)); +} + +/** + * @brief Set Capacity Driver Mode + * @rmtoll CR SC_CTRL FL_LCD_SetCapDriverMode + * @param LCDx LCD instance + * @param mode This parameter can be one of the following values: + * @arg @ref FL_LCD_CAP_DRIVER_MODE_ONE + * @arg @ref FL_LCD_CAP_DRIVER_MODE_TWO + * @arg @ref FL_LCD_CAP_DRIVER_MODE_FOUR + * @arg @ref FL_LCD_CAP_DRIVER_MODE_MANY + * @retval None + */ +__STATIC_INLINE void FL_LCD_SetCapDriverMode(LCD_Type *LCDx, uint32_t mode) +{ + MODIFY_REG(LCDx->CR, LCD_CR_SC_CTRL_Msk, mode); +} + +/** + * @brief Get Capacity Driver Mode + * @rmtoll CR SC_CTRL FL_LCD_GetCapDriverMode + * @param LCDx LCD instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_LCD_CAP_DRIVER_MODE_ONE + * @arg @ref FL_LCD_CAP_DRIVER_MODE_TWO + * @arg @ref FL_LCD_CAP_DRIVER_MODE_FOUR + * @arg @ref FL_LCD_CAP_DRIVER_MODE_MANY + */ +__STATIC_INLINE uint32_t FL_LCD_GetCapDriverMode(LCD_Type *LCDx) +{ + return (uint32_t)(READ_BIT(LCDx->CR, LCD_CR_SC_CTRL_Msk)); +} + +/** + * @brief Set Input Bias Current + * @rmtoll CR IC_CTRL FL_LCD_SetBiasCurrent + * @param LCDx LCD instance + * @param current This parameter can be one of the following values: + * @arg @ref FL_LCD_BIAS_CURRENT_VERYHIGH + * @arg @ref FL_LCD_BIAS_CURRENT_HIGH + * @arg @ref FL_LCD_BIAS_CURRENT_MEDIUM + * @arg @ref FL_LCD_BIAS_CURRENT_LOW + * @retval None + */ +__STATIC_INLINE void FL_LCD_SetBiasCurrent(LCD_Type *LCDx, uint32_t current) +{ + MODIFY_REG(LCDx->CR, LCD_CR_IC_CTRL_Msk, current); +} + +/** + * @brief Set Input Bias Current + * @rmtoll CR IC_CTRL FL_LCD_GetBiasCurrent + * @param LCDx LCD instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_LCD_BIAS_CURRENT_VERYHIGH + * @arg @ref FL_LCD_BIAS_CURRENT_HIGH + * @arg @ref FL_LCD_BIAS_CURRENT_MEDIUM + * @arg @ref FL_LCD_BIAS_CURRENT_LOW + */ +__STATIC_INLINE uint32_t FL_LCD_GetBiasCurrent(LCD_Type *LCDx) +{ + return (uint32_t)(READ_BIT(LCDx->CR, LCD_CR_IC_CTRL_Msk)); +} + +/** + * @brief Set LCD Enabling Mode + * @rmtoll CR ENMODE FL_LCD_SetDriverMode + * @param LCDx LCD instance + * @param mode This parameter can be one of the following values: + * @arg @ref FL_LCD_DRIVER_MODE_INNER_RESISTER + * @arg @ref FL_LCD_DRIVER_MODE_OUTER_CAPACITY + * @retval None + */ +__STATIC_INLINE void FL_LCD_SetDriverMode(LCD_Type *LCDx, uint32_t mode) +{ + MODIFY_REG(LCDx->CR, LCD_CR_ENMODE_Msk, mode); +} + +/** + * @brief Get LCD Enabling Mode + * @rmtoll CR ENMODE FL_LCD_GetDriverMode + * @param LCDx LCD instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_LCD_DRIVER_MODE_INNER_RESISTER + * @arg @ref FL_LCD_DRIVER_MODE_OUTER_CAPACITY + */ +__STATIC_INLINE uint32_t FL_LCD_GetDriverMode(LCD_Type *LCDx) +{ + return (uint32_t)(READ_BIT(LCDx->CR, LCD_CR_ENMODE_Msk)); +} + +/** + * @brief Enable LCD Blink + * @rmtoll CR FLICK FL_LCD_EnableDisplayBlink + * @param LCDx LCD instance + * @retval None + */ +__STATIC_INLINE void FL_LCD_EnableDisplayBlink(LCD_Type *LCDx) +{ + SET_BIT(LCDx->CR, LCD_CR_FLICK_Msk); +} + +/** + * @brief Disable LCD Blink + * @rmtoll CR FLICK FL_LCD_DisableDisplayBlink + * @param LCDx LCD instance + * @retval None + */ +__STATIC_INLINE void FL_LCD_DisableDisplayBlink(LCD_Type *LCDx) +{ + CLEAR_BIT(LCDx->CR, LCD_CR_FLICK_Msk); +} + +/** + * @brief Get LCD Blink State + * @rmtoll CR FLICK FL_LCD_IsEnabledDisplayBlink + * @param LCDx LCD instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_LCD_IsEnabledDisplayBlink(LCD_Type *LCDx) +{ + return (uint32_t)(READ_BIT(LCDx->CR, LCD_CR_FLICK_Msk) == LCD_CR_FLICK_Msk); +} + +/** + * @brief Set LCD Bias Voltage Select + * @rmtoll CR BIAS FL_LCD_SetBiasVoltage + * @param LCDx LCD instance + * @param voltage This parameter can be one of the following values: + * @arg @ref FL_LCD_BIAS_VOLTAGE_LEVEL0 + * @arg @ref FL_LCD_BIAS_VOLTAGE_LEVEL1 + * @arg @ref FL_LCD_BIAS_VOLTAGE_LEVEL2 + * @arg @ref FL_LCD_BIAS_VOLTAGE_LEVEL3 + * @arg @ref FL_LCD_BIAS_VOLTAGE_LEVEL4 + * @arg @ref FL_LCD_BIAS_VOLTAGE_LEVEL5 + * @arg @ref FL_LCD_BIAS_VOLTAGE_LEVEL6 + * @arg @ref FL_LCD_BIAS_VOLTAGE_LEVEL7 + * @arg @ref FL_LCD_BIAS_VOLTAGE_LEVEL8 + * @arg @ref FL_LCD_BIAS_VOLTAGE_LEVEL9 + * @arg @ref FL_LCD_BIAS_VOLTAGE_LEVEL10 + * @arg @ref FL_LCD_BIAS_VOLTAGE_LEVEL11 + * @arg @ref FL_LCD_BIAS_VOLTAGE_LEVEL12 + * @arg @ref FL_LCD_BIAS_VOLTAGE_LEVEL13 + * @arg @ref FL_LCD_BIAS_VOLTAGE_LEVEL14 + * @arg @ref FL_LCD_BIAS_VOLTAGE_LEVEL15 + * @retval None + */ +__STATIC_INLINE void FL_LCD_SetBiasVoltage(LCD_Type *LCDx, uint32_t voltage) +{ + MODIFY_REG(LCDx->CR, LCD_CR_BIAS_Msk, voltage); +} + +/** + * @brief Get LCD Bias Voltage Select + * @rmtoll CR BIAS FL_LCD_GetBiasVoltage + * @param LCDx LCD instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_LCD_BIAS_VOLTAGE_LEVEL0 + * @arg @ref FL_LCD_BIAS_VOLTAGE_LEVEL1 + * @arg @ref FL_LCD_BIAS_VOLTAGE_LEVEL2 + * @arg @ref FL_LCD_BIAS_VOLTAGE_LEVEL3 + * @arg @ref FL_LCD_BIAS_VOLTAGE_LEVEL4 + * @arg @ref FL_LCD_BIAS_VOLTAGE_LEVEL5 + * @arg @ref FL_LCD_BIAS_VOLTAGE_LEVEL6 + * @arg @ref FL_LCD_BIAS_VOLTAGE_LEVEL7 + * @arg @ref FL_LCD_BIAS_VOLTAGE_LEVEL8 + * @arg @ref FL_LCD_BIAS_VOLTAGE_LEVEL9 + * @arg @ref FL_LCD_BIAS_VOLTAGE_LEVEL10 + * @arg @ref FL_LCD_BIAS_VOLTAGE_LEVEL11 + * @arg @ref FL_LCD_BIAS_VOLTAGE_LEVEL12 + * @arg @ref FL_LCD_BIAS_VOLTAGE_LEVEL13 + * @arg @ref FL_LCD_BIAS_VOLTAGE_LEVEL14 + * @arg @ref FL_LCD_BIAS_VOLTAGE_LEVEL15 + */ +__STATIC_INLINE uint32_t FL_LCD_GetBiasVoltage(LCD_Type *LCDx) +{ + return (uint32_t)(READ_BIT(LCDx->CR, LCD_CR_BIAS_Msk)); +} + +/** + * @brief Set LCD Bias Mode + * @rmtoll CR BIASMD FL_LCD_SetBiasMode + * @param LCDx LCD instance + * @param mode This parameter can be one of the following values: + * @arg @ref FL_LCD_BIAS_MODE_4BIAS + * @arg @ref FL_LCD_BIAS_MODE_3BIAS + * @retval None + */ +__STATIC_INLINE void FL_LCD_SetBiasMode(LCD_Type *LCDx, uint32_t mode) +{ + MODIFY_REG(LCDx->CR, LCD_CR_BIASMD_Msk, mode); +} + +/** + * @brief Get LCD Bias Mode + * @rmtoll CR BIASMD FL_LCD_GetBiasMode + * @param LCDx LCD instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_LCD_BIAS_MODE_4BIAS + * @arg @ref FL_LCD_BIAS_MODE_3BIAS + */ +__STATIC_INLINE uint32_t FL_LCD_GetBiasMode(LCD_Type *LCDx) +{ + return (uint32_t)(READ_BIT(LCDx->CR, LCD_CR_BIASMD_Msk)); +} + +/** + * @brief Set LCD Anti-Polarization + * @rmtoll CR ANTIPOLAR FL_LCD_SetAntiPolar + * @param LCDx LCD instance + * @param state This parameter can be one of the following values: + * @arg @ref FL_LCD_ANTIPOLAR_FLOATING + * @arg @ref FL_LCD_ANTIPOLAR_GND + * @retval None + */ +__STATIC_INLINE void FL_LCD_SetAntiPolar(LCD_Type *LCDx, uint32_t state) +{ + MODIFY_REG(LCDx->CR, LCD_CR_ANTIPOLAR_Msk, state); +} + +/** + * @brief Get LCD Anti-Polarization + * @rmtoll CR ANTIPOLAR FL_LCD_GetAntiPolar + * @param LCDx LCD instance + * @retval Returned value can be one of the following values: + */ +__STATIC_INLINE uint32_t FL_LCD_GetAntiPolar(LCD_Type *LCDx) +{ + return (uint32_t)(READ_BIT(LCDx->CR, LCD_CR_ANTIPOLAR_Msk)); +} + +/** + * @brief Set LCD Waveform Format + * @rmtoll CR WFT FL_LCD_SetWaveform + * @param LCDx LCD instance + * @param state This parameter can be one of the following values: + * @arg @ref FL_LCD_WAVEFORM_TYPEA + * @arg @ref FL_LCD_WAVEFORM_TYPEB + * @retval None + */ +__STATIC_INLINE void FL_LCD_SetWaveform(LCD_Type *LCDx, uint32_t state) +{ + MODIFY_REG(LCDx->CR, LCD_CR_WFT_Msk, state); +} + +/** + * @brief Get LCD Waveform Format + * @rmtoll CR WFT FL_LCD_GetWaveform + * @param LCDx LCD instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_LCD_WAVEFORM_TYPEA + * @arg @ref FL_LCD_WAVEFORM_TYPEB + */ +__STATIC_INLINE uint32_t FL_LCD_GetWaveform(LCD_Type *LCDx) +{ + return (uint32_t)(READ_BIT(LCDx->CR, LCD_CR_WFT_Msk)); +} + +/** + * @brief Set LCD Segment Line Mux + * @rmtoll CR LMUX FL_LCD_SetCOMNumber + * @param LCDx LCD instance + * @param number This parameter can be one of the following values: + * @arg @ref FL_LCD_COM_NUM_4COM + * @arg @ref FL_LCD_COM_NUM_6COM + * @arg @ref FL_LCD_COM_NUM_8COM + * @retval None + */ +__STATIC_INLINE void FL_LCD_SetCOMNumber(LCD_Type *LCDx, uint32_t number) +{ + MODIFY_REG(LCDx->CR, LCD_CR_LMUX_Msk, number); +} + +/** + * @brief Get LCD Segment Line Mux + * @rmtoll CR LMUX FL_LCD_GetCOMNumber + * @param LCDx LCD instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_LCD_COM_NUM_4COM + * @arg @ref FL_LCD_COM_NUM_6COM + * @arg @ref FL_LCD_COM_NUM_8COM + */ +__STATIC_INLINE uint32_t FL_LCD_GetCOMNumber(LCD_Type *LCDx) +{ + return (uint32_t)(READ_BIT(LCDx->CR, LCD_CR_LMUX_Msk)); +} + +/** + * @brief Enable LCD + * @rmtoll CR EN FL_LCD_Enable + * @param LCDx LCD instance + * @retval None + */ +__STATIC_INLINE void FL_LCD_Enable(LCD_Type *LCDx) +{ + SET_BIT(LCDx->CR, LCD_CR_EN_Msk); +} + +/** + * @brief Get LCD State + * @rmtoll CR EN FL_LCD_IsEnabled + * @param LCDx LCD instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_LCD_IsEnabled(LCD_Type *LCDx) +{ + return (uint32_t)(READ_BIT(LCDx->CR, LCD_CR_EN_Msk) == LCD_CR_EN_Msk); +} + +/** + * @brief Disable LCD + * @rmtoll CR EN FL_LCD_Disable + * @param LCDx LCD instance + * @retval None + */ +__STATIC_INLINE void FL_LCD_Disable(LCD_Type *LCDx) +{ + CLEAR_BIT(LCDx->CR, LCD_CR_EN_Msk); +} + +/** + * @brief Set LCD Display Frequency + * @rmtoll FCR DF FL_LCD_WriteDisplayFrequency + * @param LCDx LCD instance + * @param frequency + * @retval None + */ +__STATIC_INLINE void FL_LCD_WriteDisplayFrequency(LCD_Type *LCDx, uint32_t frequency) +{ + MODIFY_REG(LCDx->FCR, (0xffU << 0U), (frequency << 0U)); +} + +/** + * @brief Get LCD Display Frequency + * @rmtoll FCR DF FL_LCD_ReadDisplayFrequency + * @param LCDx LCD instance + * @retval + */ +__STATIC_INLINE uint32_t FL_LCD_ReadDisplayFrequency(LCD_Type *LCDx) +{ + return (uint32_t)(READ_BIT(LCDx->FCR, (0xffU << 0U)) >> 0U); +} + +/** + * @brief Set LCD Display Off Time + * @rmtoll FLKT TOFF FL_LCD_WriteDisplayOffTime + * @param LCDx LCD instance + * @param time + * @retval None + */ +__STATIC_INLINE void FL_LCD_WriteDisplayOffTime(LCD_Type *LCDx, uint32_t time) +{ + MODIFY_REG(LCDx->FLKT, (0xffU << 8U), (time << 8U)); +} + +/** + * @brief Get LCD Display Off Time + * @rmtoll FLKT TOFF FL_LCD_ReadDisplayOffTime + * @param LCDx LCD instance + * @retval + */ +__STATIC_INLINE uint32_t FL_LCD_ReadDisplayOffTime(LCD_Type *LCDx) +{ + return (uint32_t)(READ_BIT(LCDx->FLKT, (0xffU << 8U)) >> 8U); +} + +/** + * @brief Set LCD Display On Time + * @rmtoll FLKT TON FL_LCD_WriteDisplayOnTime + * @param LCDx LCD instance + * @param time + * @retval None + */ +__STATIC_INLINE void FL_LCD_WriteDisplayOnTime(LCD_Type *LCDx, uint32_t time) +{ + MODIFY_REG(LCDx->FLKT, (0xffU << 0U), (time << 0U)); +} + +/** + * @brief Get LCD Display On Time + * @rmtoll FLKT TON FL_LCD_ReadDisplayOnTime + * @param LCDx LCD instance + * @retval + */ +__STATIC_INLINE uint32_t FL_LCD_ReadDisplayOnTime(LCD_Type *LCDx) +{ + return (uint32_t)(READ_BIT(LCDx->FLKT, (0xffU << 0U)) >> 0U); +} + +/** + * @brief Enable LCD Display OFF IRQ + * @rmtoll IER DONIE FL_LCD_EnableIT_DisplayOff + * @param LCDx LCD instance + * @retval None + */ +__STATIC_INLINE void FL_LCD_EnableIT_DisplayOff(LCD_Type *LCDx) +{ + SET_BIT(LCDx->IER, LCD_IER_DONIE_Msk); +} + +/** + * @brief Disable LCD Display OFF IRQ + * @rmtoll IER DONIE FL_LCD_DisableIT_DisplayOff + * @param LCDx LCD instance + * @retval None + */ +__STATIC_INLINE void FL_LCD_DisableIT_DisplayOff(LCD_Type *LCDx) +{ + CLEAR_BIT(LCDx->IER, LCD_IER_DONIE_Msk); +} + +/** + * @brief Getable LCD Display OFF IRQ + * @rmtoll IER DONIE FL_LCD_IsEnabledIT_DisplayOff + * @param LCDx LCD instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_LCD_IsEnabledIT_DisplayOff(LCD_Type *LCDx) +{ + return (uint32_t)(READ_BIT(LCDx->IER, LCD_IER_DONIE_Msk) == LCD_IER_DONIE_Msk); +} + +/** + * @brief Enable LCD Display ON Interrupt + * @rmtoll IER DOFFIE FL_LCD_EnableIT_DisplayOn + * @param LCDx LCD instance + * @retval None + */ +__STATIC_INLINE void FL_LCD_EnableIT_DisplayOn(LCD_Type *LCDx) +{ + SET_BIT(LCDx->IER, LCD_IER_DOFFIE_Msk); +} + +/** + * @brief Disable LCD Display ON Interrupt + * @rmtoll IER DOFFIE FL_LCD_DisableIT_DisplayOn + * @param LCDx LCD instance + * @retval None + */ +__STATIC_INLINE void FL_LCD_DisableIT_DisplayOn(LCD_Type *LCDx) +{ + CLEAR_BIT(LCDx->IER, LCD_IER_DOFFIE_Msk); +} + +/** + * @brief Getable LCD Display ON Interrupt + * @rmtoll IER DOFFIE FL_LCD_IsEnabledIT_DisplayOn + * @param LCDx LCD instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_LCD_IsEnabledIT_DisplayOn(LCD_Type *LCDx) +{ + return (uint32_t)(READ_BIT(LCDx->IER, LCD_IER_DOFFIE_Msk) == LCD_IER_DOFFIE_Msk); +} + +/** + * @brief Get LCD Display OFF Flag + * @rmtoll ISR DONIF FL_LCD_IsActiveFlag_DisplayOff + * @param LCDx LCD instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_LCD_IsActiveFlag_DisplayOff(LCD_Type *LCDx) +{ + return (uint32_t)(READ_BIT(LCDx->ISR, LCD_ISR_DONIF_Msk) == (LCD_ISR_DONIF_Msk)); +} + +/** + * @brief Clear LCD Display OFF Flag + * @rmtoll ISR DONIF FL_LCD_ClearFlag_DisplayOff + * @param LCDx LCD instance + * @retval None + */ +__STATIC_INLINE void FL_LCD_ClearFlag_DisplayOff(LCD_Type *LCDx) +{ + WRITE_REG(LCDx->ISR, LCD_ISR_DONIF_Msk); +} + +/** + * @brief Get LCD Display On Flag + * @rmtoll ISR DOFFIF FL_LCD_IsActiveFlag_DisplayOn + * @param LCDx LCD instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_LCD_IsActiveFlag_DisplayOn(LCD_Type *LCDx) +{ + return (uint32_t)(READ_BIT(LCDx->ISR, LCD_ISR_DOFFIF_Msk) == (LCD_ISR_DOFFIF_Msk)); +} + +/** + * @brief Clear LCD Display On Flag + * @rmtoll ISR DOFFIF FL_LCD_ClearFlag_DisplayOn + * @param LCDx LCD instance + * @retval None + */ +__STATIC_INLINE void FL_LCD_ClearFlag_DisplayOn(LCD_Type *LCDx) +{ + WRITE_REG(LCDx->ISR, LCD_ISR_DOFFIF_Msk); +} + +/** + * @brief Write LCD Display Data + * @rmtoll DATA0 DSDA FL_LCD_WriteData + * @param LCDx LCD instance + * @param reg This parameter can be one of the following values: + * @arg @ref FL_LCD_DATA_REG0 + * @arg @ref FL_LCD_DATA_REG1 + * @arg @ref FL_LCD_DATA_REG2 + * @arg @ref FL_LCD_DATA_REG3 + * @arg @ref FL_LCD_DATA_REG4 + * @arg @ref FL_LCD_DATA_REG5 + * @arg @ref FL_LCD_DATA_REG6 + * @arg @ref FL_LCD_DATA_REG7 + * @arg @ref FL_LCD_DATA_REG8 + * @arg @ref FL_LCD_DATA_REG9 + * @param data + * @retval None + */ +__STATIC_INLINE void FL_LCD_WriteData(LCD_Type *LCDx, uint32_t reg, uint32_t data) +{ + volatile uint32_t *pData = &(LCDx->DATA0); + MODIFY_REG(pData[reg], LCD_DATA0_DSDA_Msk, data); +} + +/** + * @brief Read LCD Display Data + * @rmtoll DATA0 DSDA FL_LCD_ReadData + * @param LCDx LCD instance + * @param reg This parameter can be one of the following values: + * @arg @ref FL_LCD_DATA_REG0 + * @arg @ref FL_LCD_DATA_REG1 + * @arg @ref FL_LCD_DATA_REG2 + * @arg @ref FL_LCD_DATA_REG3 + * @arg @ref FL_LCD_DATA_REG4 + * @arg @ref FL_LCD_DATA_REG5 + * @arg @ref FL_LCD_DATA_REG6 + * @arg @ref FL_LCD_DATA_REG7 + * @arg @ref FL_LCD_DATA_REG8 + * @arg @ref FL_LCD_DATA_REG9 + * @retval + */ +__STATIC_INLINE uint32_t FL_LCD_ReadData(LCD_Type *LCDx, uint32_t reg) +{ + volatile uint32_t *pData = &(LCDx->DATA0); + return (uint32_t)(READ_BIT(pData[reg], LCD_DATA0_DSDA_Msk)); +} + +/** + * @brief Get LCD COMx State + * @rmtoll COMEN FL_LCD_IsEnabledCOMEN + * @param LCDx LCD instance + * @param COM This parameter can be one of the following values: + * @arg @ref FL_LCD_COMEN_COM0 + * @arg @ref FL_LCD_COMEN_COM1 + * @arg @ref FL_LCD_COMEN_COM2 + * @arg @ref FL_LCD_COMEN_COM3 + * @arg @ref FL_LCD_COMEN_COM4 + * @arg @ref FL_LCD_COMEN_COM5 + * @arg @ref FL_LCD_COMEN_COM6 + * @arg @ref FL_LCD_COMEN_COM7 + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_LCD_IsEnabledCOMEN(LCD_Type *LCDx, uint32_t COM) +{ + if(COM < FL_LCD_COMEN_COM4) + { + return (uint32_t)(READ_BIT(LCDx->COMEN, ((COM & 0xffffffff) << 0x0U)) == ((COM & 0xffffffff) << 0x0U)); + } + else + { + return (uint32_t)(READ_BIT(LCDx->SEGEN0, ((COM & 0xffffffff) << 0x0U)) == ((COM & 0xffffffff) << 0x0U)); + } +} + +/** + * @brief Enable LCD COMx + * @rmtoll COMEN FL_LCD_EnableCOMEN + * @param LCDx LCD instance + * @param COM This parameter can be one of the following values: + * @arg @ref FL_LCD_COMEN_COM0 + * @arg @ref FL_LCD_COMEN_COM1 + * @arg @ref FL_LCD_COMEN_COM2 + * @arg @ref FL_LCD_COMEN_COM3 + * @arg @ref FL_LCD_COMEN_COM4 + * @arg @ref FL_LCD_COMEN_COM5 + * @arg @ref FL_LCD_COMEN_COM6 + * @arg @ref FL_LCD_COMEN_COM7 + * @retval None + */ +__STATIC_INLINE void FL_LCD_EnableCOMEN(LCD_Type *LCDx, uint32_t COM) +{ + if(COM < FL_LCD_COMEN_COM4) + { + SET_BIT(LCDx->COMEN, ((COM & 0xffffffff) << 0x0U)); + } + else + { + SET_BIT(LCDx->SEGEN0, ((COM & 0xffffffff) << 0x0U)); + } +} + +/** + * @brief Disable LCD COMx + * @rmtoll COMEN FL_LCD_DisableCOMEN + * @param LCDx LCD instance + * @param COM This parameter can be one of the following values: + * @arg @ref FL_LCD_COMEN_COM0 + * @arg @ref FL_LCD_COMEN_COM1 + * @arg @ref FL_LCD_COMEN_COM2 + * @arg @ref FL_LCD_COMEN_COM3 + * @arg @ref FL_LCD_COMEN_COM4 + * @arg @ref FL_LCD_COMEN_COM5 + * @arg @ref FL_LCD_COMEN_COM6 + * @arg @ref FL_LCD_COMEN_COM7 + * @retval None + */ +__STATIC_INLINE void FL_LCD_DisableCOMEN(LCD_Type *LCDx, uint32_t COM) +{ + if(COM < FL_LCD_COMEN_COM4) + { + CLEAR_BIT(LCDx->COMEN, ((COM & 0xffffffff) << 0x0U)); + } + else + { + CLEAR_BIT(LCDx->SEGEN0, ((COM & 0xffffffff) << 0x0U)); + } +} + +/** + * @brief Get LCD SEGx State + * @rmtoll SEGEN0 FL_LCD_IsEnabledSEGEN0 + * @param LCDx LCD instance + * @param SEG This parameter can be one of the following values: + * @arg @ref FL_LCD_SEGEN0_SEG0 + * @arg @ref FL_LCD_SEGEN0_SEG1 + * @arg @ref FL_LCD_SEGEN0_SEG2 + * @arg @ref FL_LCD_SEGEN0_SEG3 + * @arg @ref FL_LCD_SEGEN0_SEG4 + * @arg @ref FL_LCD_SEGEN0_SEG5 + * @arg @ref FL_LCD_SEGEN0_SEG6 + * @arg @ref FL_LCD_SEGEN0_SEG7 + * @arg @ref FL_LCD_SEGEN0_SEG8 + * @arg @ref FL_LCD_SEGEN0_SEG9 + * @arg @ref FL_LCD_SEGEN0_SEG10 + * @arg @ref FL_LCD_SEGEN0_SEG11 + * @arg @ref FL_LCD_SEGEN0_SEG12 + * @arg @ref FL_LCD_SEGEN0_SEG13 + * @arg @ref FL_LCD_SEGEN0_SEG14 + * @arg @ref FL_LCD_SEGEN0_SEG15 + * @arg @ref FL_LCD_SEGEN0_SEG16 + * @arg @ref FL_LCD_SEGEN0_SEG17 + * @arg @ref FL_LCD_SEGEN0_SEG18 + * @arg @ref FL_LCD_SEGEN0_SEG19 + * @arg @ref FL_LCD_SEGEN0_SEG20 + * @arg @ref FL_LCD_SEGEN0_SEG21 + * @arg @ref FL_LCD_SEGEN0_SEG22 + * @arg @ref FL_LCD_SEGEN0_SEG23 + * @arg @ref FL_LCD_SEGEN0_SEG24 + * @arg @ref FL_LCD_SEGEN0_SEG25 + * @arg @ref FL_LCD_SEGEN0_SEG26 + * @arg @ref FL_LCD_SEGEN0_SEG27 + * @arg @ref FL_LCD_SEGEN0_SEG28 + * @arg @ref FL_LCD_SEGEN0_SEG29 + * @arg @ref FL_LCD_SEGEN0_SEG30 + * @arg @ref FL_LCD_SEGEN0_SEG31 + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_LCD_IsEnabledSEGEN0(LCD_Type *LCDx, uint32_t SEG) +{ + return (uint32_t)(READ_BIT(LCDx->SEGEN0, ((SEG & 0xffffffff) << 0x0U)) == ((SEG & 0xffffffff) << 0x0U)); +} + +/** + * @brief Enable LCD SEGx + * @rmtoll SEGEN0 FL_LCD_EnableSEGEN0 + * @param LCDx LCD instance + * @param SEG This parameter can be one of the following values: + * @arg @ref FL_LCD_SEGEN0_SEG0 + * @arg @ref FL_LCD_SEGEN0_SEG1 + * @arg @ref FL_LCD_SEGEN0_SEG2 + * @arg @ref FL_LCD_SEGEN0_SEG3 + * @arg @ref FL_LCD_SEGEN0_SEG4 + * @arg @ref FL_LCD_SEGEN0_SEG5 + * @arg @ref FL_LCD_SEGEN0_SEG6 + * @arg @ref FL_LCD_SEGEN0_SEG7 + * @arg @ref FL_LCD_SEGEN0_SEG8 + * @arg @ref FL_LCD_SEGEN0_SEG9 + * @arg @ref FL_LCD_SEGEN0_SEG10 + * @arg @ref FL_LCD_SEGEN0_SEG11 + * @arg @ref FL_LCD_SEGEN0_SEG12 + * @arg @ref FL_LCD_SEGEN0_SEG13 + * @arg @ref FL_LCD_SEGEN0_SEG14 + * @arg @ref FL_LCD_SEGEN0_SEG15 + * @arg @ref FL_LCD_SEGEN0_SEG16 + * @arg @ref FL_LCD_SEGEN0_SEG17 + * @arg @ref FL_LCD_SEGEN0_SEG18 + * @arg @ref FL_LCD_SEGEN0_SEG19 + * @arg @ref FL_LCD_SEGEN0_SEG20 + * @arg @ref FL_LCD_SEGEN0_SEG21 + * @arg @ref FL_LCD_SEGEN0_SEG22 + * @arg @ref FL_LCD_SEGEN0_SEG23 + * @arg @ref FL_LCD_SEGEN0_SEG24 + * @arg @ref FL_LCD_SEGEN0_SEG25 + * @arg @ref FL_LCD_SEGEN0_SEG26 + * @arg @ref FL_LCD_SEGEN0_SEG27 + * @arg @ref FL_LCD_SEGEN0_SEG28 + * @arg @ref FL_LCD_SEGEN0_SEG29 + * @arg @ref FL_LCD_SEGEN0_SEG30 + * @arg @ref FL_LCD_SEGEN0_SEG31 + * @retval None + */ +__STATIC_INLINE void FL_LCD_EnableSEGEN0(LCD_Type *LCDx, uint32_t SEG) +{ + SET_BIT(LCDx->SEGEN0, ((SEG & 0xffffffff) << 0x0U)); +} + +/** + * @brief Disable LCD SEGx + * @rmtoll SEGEN0 FL_LCD_DisableSEGEN0 + * @param LCDx LCD instance + * @param SEG This parameter can be one of the following values: + * @arg @ref FL_LCD_SEGEN0_SEG0 + * @arg @ref FL_LCD_SEGEN0_SEG1 + * @arg @ref FL_LCD_SEGEN0_SEG2 + * @arg @ref FL_LCD_SEGEN0_SEG3 + * @arg @ref FL_LCD_SEGEN0_SEG4 + * @arg @ref FL_LCD_SEGEN0_SEG5 + * @arg @ref FL_LCD_SEGEN0_SEG6 + * @arg @ref FL_LCD_SEGEN0_SEG7 + * @arg @ref FL_LCD_SEGEN0_SEG8 + * @arg @ref FL_LCD_SEGEN0_SEG9 + * @arg @ref FL_LCD_SEGEN0_SEG10 + * @arg @ref FL_LCD_SEGEN0_SEG11 + * @arg @ref FL_LCD_SEGEN0_SEG12 + * @arg @ref FL_LCD_SEGEN0_SEG13 + * @arg @ref FL_LCD_SEGEN0_SEG14 + * @arg @ref FL_LCD_SEGEN0_SEG15 + * @arg @ref FL_LCD_SEGEN0_SEG16 + * @arg @ref FL_LCD_SEGEN0_SEG17 + * @arg @ref FL_LCD_SEGEN0_SEG18 + * @arg @ref FL_LCD_SEGEN0_SEG19 + * @arg @ref FL_LCD_SEGEN0_SEG20 + * @arg @ref FL_LCD_SEGEN0_SEG21 + * @arg @ref FL_LCD_SEGEN0_SEG22 + * @arg @ref FL_LCD_SEGEN0_SEG23 + * @arg @ref FL_LCD_SEGEN0_SEG24 + * @arg @ref FL_LCD_SEGEN0_SEG25 + * @arg @ref FL_LCD_SEGEN0_SEG26 + * @arg @ref FL_LCD_SEGEN0_SEG27 + * @arg @ref FL_LCD_SEGEN0_SEG28 + * @arg @ref FL_LCD_SEGEN0_SEG29 + * @arg @ref FL_LCD_SEGEN0_SEG30 + * @arg @ref FL_LCD_SEGEN0_SEG31 + * @retval None + */ +__STATIC_INLINE void FL_LCD_DisableSEGEN0(LCD_Type *LCDx, uint32_t SEG) +{ + CLEAR_BIT(LCDx->SEGEN0, ((SEG & 0xffffffff) << 0x0U)); +} + +/** + * @brief Get LCD SEGx State + * @rmtoll SEGEN1 FL_LCD_IsEnabledSEGEN1 + * @param LCDx LCD instance + * @param SEG This parameter can be one of the following values: + * @arg @ref FL_LCD_SEGEN1_SEG0 + * @arg @ref FL_LCD_SEGEN1_SEG1 + * @arg @ref FL_LCD_SEGEN1_SEG2 + * @arg @ref FL_LCD_SEGEN1_SEG3 + * @arg @ref FL_LCD_SEGEN1_SEG4 + * @arg @ref FL_LCD_SEGEN1_SEG5 + * @arg @ref FL_LCD_SEGEN1_SEG6 + * @arg @ref FL_LCD_SEGEN1_SEG7 + * @arg @ref FL_LCD_SEGEN1_SEG8 + * @arg @ref FL_LCD_SEGEN1_SEG9 + * @arg @ref FL_LCD_SEGEN1_SEG10 + * @arg @ref FL_LCD_SEGEN1_SEG11 + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_LCD_IsEnabledSEGEN1(LCD_Type *LCDx, uint32_t SEG) +{ + return (uint32_t)(READ_BIT(LCDx->SEGEN1, ((SEG & 0xffffffff) << 0x0U)) == ((SEG & 0xffffffff) << 0x0U)); +} + +/** + * @brief Enable LCD SEGx + * @rmtoll SEGEN1 FL_LCD_EnableSEGEN1 + * @param LCDx LCD instance + * @param SEG This parameter can be one of the following values: + * @arg @ref FL_LCD_SEGEN1_SEG0 + * @arg @ref FL_LCD_SEGEN1_SEG1 + * @arg @ref FL_LCD_SEGEN1_SEG2 + * @arg @ref FL_LCD_SEGEN1_SEG3 + * @arg @ref FL_LCD_SEGEN1_SEG4 + * @arg @ref FL_LCD_SEGEN1_SEG5 + * @arg @ref FL_LCD_SEGEN1_SEG6 + * @arg @ref FL_LCD_SEGEN1_SEG7 + * @arg @ref FL_LCD_SEGEN1_SEG8 + * @arg @ref FL_LCD_SEGEN1_SEG9 + * @arg @ref FL_LCD_SEGEN1_SEG10 + * @arg @ref FL_LCD_SEGEN1_SEG11 + * @retval None + */ +__STATIC_INLINE void FL_LCD_EnableSEGEN1(LCD_Type *LCDx, uint32_t SEG) +{ + SET_BIT(LCDx->SEGEN1, ((SEG & 0xffffffff) << 0x0U)); +} + +/** + * @brief Disable LCD SEGx + * @rmtoll SEGEN1 FL_LCD_DisableSEGEN1 + * @param LCDx LCD instance + * @param SEG This parameter can be one of the following values: + * @arg @ref FL_LCD_SEGEN1_SEG0 + * @arg @ref FL_LCD_SEGEN1_SEG1 + * @arg @ref FL_LCD_SEGEN1_SEG2 + * @arg @ref FL_LCD_SEGEN1_SEG3 + * @arg @ref FL_LCD_SEGEN1_SEG4 + * @arg @ref FL_LCD_SEGEN1_SEG5 + * @arg @ref FL_LCD_SEGEN1_SEG6 + * @arg @ref FL_LCD_SEGEN1_SEG7 + * @arg @ref FL_LCD_SEGEN1_SEG8 + * @arg @ref FL_LCD_SEGEN1_SEG9 + * @arg @ref FL_LCD_SEGEN1_SEG10 + * @arg @ref FL_LCD_SEGEN1_SEG11 + * @retval None + */ +__STATIC_INLINE void FL_LCD_DisableSEGEN1(LCD_Type *LCDx, uint32_t SEG) +{ + CLEAR_BIT(LCDx->SEGEN1, ((SEG & 0xffffffff) << 0x0U)); +} + +/** + * @} + */ + +/** @defgroup LCD_FL_EF_Init Initialization and de-initialization functions + * @{ + */ +FL_ErrorStatus FL_LCD_DeInit(LCD_Type *LCDx); +void FL_LCD_StructInit(FL_LCD_InitTypeDef *initStruct); +FL_ErrorStatus FL_LCD_Init(LCD_Type *LCDx, FL_LCD_InitTypeDef *initStruct); + +void FL_LCD_4COMDisplay(uint32_t *display, uint8_t com, uint8_t seg, uint8_t state); +void FL_LCD_6COMDisplay(uint32_t *display, uint8_t com, uint8_t seg, uint8_t state); +void FL_LCD_8COMDisplay(uint32_t *display, uint8_t com, uint8_t seg, uint8_t state); + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif /* __FM33LG0XX_FL_LCD_H*/ + +/*************************Py_Code_Generator Version: 0.1-0.14-0.1 @ 2021-04-25*************************/ +/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/ diff --git a/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_lptim16.h b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_lptim16.h new file mode 100644 index 0000000..c49b3d3 --- /dev/null +++ b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_lptim16.h @@ -0,0 +1,1344 @@ + /** + ******************************************************************************************************* + * @file fm33lg0xx_fl_lptim16.h + * @author FMSH Application Team + * @brief Head file of LPTIM16 FL Module + ******************************************************************************************************* + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + + + +/* Define to prevent recursive inclusion---------------------------------------------------------------*/ +#ifndef __FM33LG0XX_FL_LPTIM16_H +#define __FM33LG0XX_FL_LPTIM16_H + +#ifdef __cplusplus +extern "C" { +#endif +/* Includes -------------------------------------------------------------------------------------------*/ +#include "fm33lg0xx_fl_def.h" +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @defgroup LPTIM16 LPTIM16 + * @brief LPTIM16 FL driver + * @{ + */ + +/* Exported types -------------------------------------------------------------------------------------*/ +/** @defgroup LPTIM16_FL_ES_INIT LPTIM16 Exported Init structures + * @{ + */ + +/** + * @brief FL LPTIM16 Init Sturcture definition + */ + +/** + * @brief LPTIM16 Init Sturcture Definition + */ +typedef struct +{ + /* 内部时钟源 */ + uint32_t clockSource; + + /* 预分频器的时钟源 可选择内部时钟, 也可选择外部时钟 */ + uint32_t prescalerClockSource; + + /* 预分频系数 */ + uint32_t prescaler; + + /* 重装值 */ + uint32_t autoReload; + + /* 定时器工作模式选择 */ + uint32_t mode; + + /* 定时器编码器模式 */ + uint32_t encoderMode; + + /* 单次计数使能 */ + uint32_t onePulseMode; + + /* ETR异步计数边沿 */ + uint32_t countEdge; + + /* ETR触发计数边沿 */ + uint32_t triggerEdge; + +} FL_LPTIM16_InitTypeDef; + +/** + * @brief LPTIM16 Output Compare Configuration Structure Definition + */ +typedef struct +{ + uint32_t compareValue; + + uint32_t OCPolarity; + +} FL_LPTIM16_OC_InitTypeDef; + +/** + * @brief LPTIM16 Input Capture Configuration Structure Definition + */ +typedef struct +{ + uint32_t channel1Prescaler; + + uint32_t channel1CaptureSource; + + uint32_t ICInputDigitalFilter; + + uint32_t ICInputPolarity; + + uint32_t ICEdge; + +} FL_LPTIM16_IC_InitTypeDef; +/** + * @} + */ +/* Exported constants ---------------------------------------------------------------------------------*/ +/** @defgroup LPTIM16_FL_Exported_Constants LPTIM16 Exported Constants + * @{ + */ + +#define LPTIM16_CR_EN_Pos (0U) +#define LPTIM16_CR_EN_Msk (0x1U << LPTIM16_CR_EN_Pos) +#define LPTIM16_CR_EN LPTIM16_CR_EN_Msk + +#define LPTIM16_CFGR_ETR_AFEN_Pos (24U) +#define LPTIM16_CFGR_ETR_AFEN_Msk (0x1U << LPTIM16_CFGR_ETR_AFEN_Pos) +#define LPTIM16_CFGR_ETR_AFEN LPTIM16_CFGR_ETR_AFEN_Msk + +#define LPTIM16_CFGR_PSCSEL_Pos (14U) +#define LPTIM16_CFGR_PSCSEL_Msk (0x1U << LPTIM16_CFGR_PSCSEL_Pos) +#define LPTIM16_CFGR_PSCSEL LPTIM16_CFGR_PSCSEL_Msk + +#define LPTIM16_CFGR_DIVSEL_Pos (10U) +#define LPTIM16_CFGR_DIVSEL_Msk (0x7Ul << LPTIM16_CFGR_DIVSEL_Pos) +#define LPTIM16_CFGR_DIVSEL LPTIM16_CFGR_DIVSEL_Msk + +#define LPTIM16_CFGR_EDGESEL_Pos (7U) +#define LPTIM16_CFGR_EDGESEL_Msk (0x1Ul << LPTIM16_CFGR_EDGESEL_Pos) +#define LPTIM16_CFGR_EDGESEL LPTIM16_CFGR_EDGESEL_Msk + +#define LPTIM16_CFGR_TRIGCFG_Pos (5U) +#define LPTIM16_CFGR_TRIGCFG_Msk (0x3Ul << LPTIM16_CFGR_TRIGCFG_Pos) +#define LPTIM16_CFGR_TRIGCFG LPTIM16_CFGR_TRIGCFG_Msk + +#define LPTIM16_CFGR_QEMD_Pos (3U) +#define LPTIM16_CFGR_QEMD_Msk (0x3Ul << LPTIM16_CFGR_QEMD_Pos) +#define LPTIM16_CFGR_QEMD LPTIM16_CFGR_QEMD_Msk + +#define LPTIM16_CFGR_MMS_Pos (16U) +#define LPTIM16_CFGR_MMS_Msk (0x7Ul << LPTIM16_CFGR_MMS_Pos) +#define LPTIM16_CFGR_MMS LPTIM16_CFGR_MMS_Msk + +#define LPTIM16_CFGR_ONST_Pos (2U) +#define LPTIM16_CFGR_ONST_Msk (0x1Ul << LPTIM16_CFGR_ONST_Pos) +#define LPTIM16_CFGR_ONST LPTIM16_CFGR_ONST_Msk + +#define LPTIM16_CFGR_TMODE_Pos (0U) +#define LPTIM16_CFGR_TMODE_Msk (0x3Ul << LPTIM16_CFGR_TMODE_Pos) +#define LPTIM16_CFGR_TMODE LPTIM16_CFGR_TMODE_Msk + +#define LPTIM16_IER_CCIE_Pos (0U) +#define LPTIM16_IER_CCIE_Msk (0x3Ul << LPTIM16_IER_CCIE_Pos) +#define LPTIM16_IER_CCIE LPTIM16_IER_CCIE_Msk + +#define LPTIM16_IER_OVIE_Pos (6U) +#define LPTIM16_IER_OVIE_Msk (0x1Ul << LPTIM16_IER_OVIE_Pos) +#define LPTIM16_IER_OVIE LPTIM16_IER_OVIE_Msk + +#define LPTIM16_IER_TRIGIE_Pos (7U) +#define LPTIM16_IER_TRIGIE_Msk (0x1Ul << LPTIM16_IER_TRIGIE_Pos) +#define LPTIM16_IER_TRIGIE LPTIM16_IER_TRIGIE_Msk + +#define LPTIM16_IER_OVRIE_Pos (8U) +#define LPTIM16_IER_OVRIE_Msk (0x3Ul << LPTIM16_IER_OVRIE_Pos) +#define LPTIM16_IER_OVRIE LPTIM16_IER_OVRIE_Msk + +#define LPTIM16_ISR_CCIF_Pos (0U) +#define LPTIM16_ISR_CCIF_Msk (0x3Ul << LPTIM16_ISR_CCIF_Pos) +#define LPTIM16_ISR_CCIF LPTIM16_ISR_CCIF_Msk + +#define LPTIM16_ISR_OVIF_Pos (6U) +#define LPTIM16_ISR_OVIF_Msk (0x1U << LPTIM16_ISR_OVIF_Pos) +#define LPTIM16_ISR_OVIF LPTIM16_ISR_OVIF_Msk + +#define LPTIM16_ISR_TRIGIF_Pos (7U) +#define LPTIM16_ISR_TRIGIF_Msk (0x1U << LPTIM16_ISR_TRIGIF_Pos) +#define LPTIM16_ISR_TRIGIF LPTIM16_ISR_TRIGIF_Msk + +#define LPTIM16_ISR_OVRIF_Pos (8U) +#define LPTIM16_ISR_OVRIF_Msk (0x3U << LPTIM16_ISR_OVRIF_Pos) +#define LPTIM16_ISR_OVRIF LPTIM16_ISR_OVRIF_Msk + +#define LPTIM16_CCSR_CAPCFG_Pos (8U) +#define LPTIM16_CCSR_CAPCFG_Msk (0x3U << LPTIM16_CCSR_CAPCFG_Pos) +#define LPTIM16_CCSR_CAPCFG LPTIM16_CCSR_CAPCFG_Msk + +#define LPTIM16_CCSR_CCP_Pos (16U) +#define LPTIM16_CCSR_CCP_Msk (0x1U << LPTIM16_CCSR_CCP_Pos) +#define LPTIM16_CCSR_CCP LPTIM16_CCSR_CCP_Msk + +#define LPTIM16_CCSR_CAP1PSC_Pos (26U) +#define LPTIM16_CCSR_CAP1PSC_Msk (0x3fU << LPTIM16_CCSR_CAP1PSC_Pos) +#define LPTIM16_CCSR_CAP1PSC LPTIM16_CCSR_CAP1PSC_Msk + +#define LPTIM16_CCSR_CCS_Pos (0U) +#define LPTIM16_CCSR_CCS_Msk (0x3U << LPTIM16_CCSR_CCS_Pos) +#define LPTIM16_CCSR_CCS LPTIM16_CCSR_CCS_Msk + +#define LPTIM16_CCSR_CAPEDGE_Pos (20U) +#define LPTIM16_CCSR_CAPEDGE_Msk (0x1U << LPTIM16_CCSR_CAPEDGE_Pos) +#define LPTIM16_CCSR_CAPEDGE LPTIM16_CCSR_CAPEDGE_Msk + +#define LPTIM16_CCSR_CAP1SSEL_Pos (24U) +#define LPTIM16_CCSR_CAP1SSEL_Msk (0x3U << LPTIM16_CCSR_CAP1SSEL_Pos) +#define LPTIM16_CCSR_CAP1SSEL LPTIM16_CCSR_CAP1SSEL_Msk + + + +#define FL_LPTIM16_CHANNEL_1 (0x1U << 0U) +#define FL_LPTIM16_CHANNEL_2 (0x1U << 1U) + + + +#define FL_LPTIM16_CLK_SOURCE_INTERNAL (0x0UL << LPTIM16_CFGR_PSCSEL_Pos) +#define FL_LPTIM16_CLK_SOURCE_EXTERNAL (0x1UL << LPTIM16_CFGR_PSCSEL_Pos) + + +#define FL_LPTIM16_PSC_DIV1 (0x0UL << LPTIM16_CFGR_DIVSEL_Pos) +#define FL_LPTIM16_PSC_DIV2 (0x1UL << LPTIM16_CFGR_DIVSEL_Pos) +#define FL_LPTIM16_PSC_DIV4 (0x2UL << LPTIM16_CFGR_DIVSEL_Pos) +#define FL_LPTIM16_PSC_DIV8 (0x3UL << LPTIM16_CFGR_DIVSEL_Pos) +#define FL_LPTIM16_PSC_DIV16 (0x4UL << LPTIM16_CFGR_DIVSEL_Pos) +#define FL_LPTIM16_PSC_DIV32 (0x5UL << LPTIM16_CFGR_DIVSEL_Pos) +#define FL_LPTIM16_PSC_DIV64 (0x6UL << LPTIM16_CFGR_DIVSEL_Pos) +#define FL_LPTIM16_PSC_DIV128 (0x7UL << LPTIM16_CFGR_DIVSEL_Pos) + + +#define FL_LPTIM16_ETR_COUNT_EDGE_RISING (0x0Ul << LPTIM16_CFGR_EDGESEL_Pos) +#define FL_LPTIM16_ETR_COUNT_EDGE_FALLING (0x1Ul << LPTIM16_CFGR_EDGESEL_Pos) + + +#define FL_LPTIM16_ETR_TRIGGER_EDGE_RISING (0x0Ul << LPTIM16_CFGR_TRIGCFG_Pos) +#define FL_LPTIM16_ETR_TRIGGER_EDGE_FALLING (0x1Ul << LPTIM16_CFGR_TRIGCFG_Pos) +#define FL_LPTIM16_ETR_TRIGGER_EDGE_BOTH (0x2Ul << LPTIM16_CFGR_TRIGCFG_Pos) + + +#define FL_LPTIM16_ENCODER_MODE_DISABLE (0x0Ul << LPTIM16_CFGR_QEMD_Pos) +#define FL_LPTIM16_ENCODER_MODE_TI1FP1_TI2FP2_CNT (0x1Ul << LPTIM16_CFGR_QEMD_Pos) +#define FL_LPTIM16_ENCODER_MODE_TI2FP2_TI1FP1_CNT (0x2Ul << LPTIM16_CFGR_QEMD_Pos) +#define FL_LPTIM16_ENCODER_MODE_TI2FP2_CNT_TI1FP1_CNT (0x3Ul << LPTIM16_CFGR_QEMD_Pos) + + +#define FL_LPTIM16_TRGO_ENABLE (0x1Ul << LPTIM16_CFGR_MMS_Pos) +#define FL_LPTIM16_TRGO_UPDATE (0x2Ul << LPTIM16_CFGR_MMS_Pos) +#define FL_LPTIM16_TRGO_OC1REF (0x3Ul << LPTIM16_CFGR_MMS_Pos) +#define FL_LPTIM16_TRGO_IC1 (0x4Ul << LPTIM16_CFGR_MMS_Pos) +#define FL_LPTIM16_TRGO_IC2 (0x5Ul << LPTIM16_CFGR_MMS_Pos) + + +#define FL_LPTIM16_ONE_PULSE_MODE_CONTINUOUS (0x0Ul << LPTIM16_CFGR_ONST_Pos) +#define FL_LPTIM16_ONE_PULSE_MODE_SINGLE (0x1Ul << LPTIM16_CFGR_ONST_Pos) + + +#define FL_LPTIM16_OPERATION_MODE_NORMAL (0x0Ul << LPTIM16_CFGR_TMODE_Pos) +#define FL_LPTIM16_OPERATION_MODE_EXTERNAL_TRIGGER_CNT (0x1Ul << LPTIM16_CFGR_TMODE_Pos) +#define FL_LPTIM16_OPERATION_MODE_EXTERNAL_ASYNC_PULSE_CNT (0x2Ul << LPTIM16_CFGR_TMODE_Pos) +#define FL_LPTIM16_OPERATION_MODE_TIMEOUT (0x3Ul << LPTIM16_CFGR_TMODE_Pos) + + +#define FL_LPTIM16_IC_EDGE_RISING (0x0Ul << LPTIM16_CCSR_CAPCFG_Pos) +#define FL_LPTIM16_IC_EDGE_FALLING (0x1Ul << LPTIM16_CCSR_CAPCFG_Pos) +#define FL_LPTIM16_IC_EDGE_BOTH (0x2Ul << LPTIM16_CCSR_CAPCFG_Pos) + + +#define FL_LPTIM16_OC_POLARITY_NORMAL (0x0Ul << LPTIM16_CCSR_CCP_Pos) +#define FL_LPTIM16_OC_POLARITY_INVERT (0x1Ul << LPTIM16_CCSR_CCP_Pos) + + +#define FL_LPTIM16_IC_POLARITY_NORMAL (0x0Ul << LPTIM16_CCSR_CCP_Pos) +#define FL_LPTIM16_IC_POLARITY_INVERT (0x1Ul << LPTIM16_CCSR_CCP_Pos) + + +#define FL_LPTIM16_CHANNEL_MODE_DISABLE (0x0Ul << LPTIM16_CCSR_CCS_Pos) +#define FL_LPTIM16_CHANNEL_MODE_INPUT (0x1Ul << LPTIM16_CCSR_CCS_Pos) +#define FL_LPTIM16_CHANNEL_MODE_OUTPUT (0x2Ul << LPTIM16_CCSR_CCS_Pos) + + +#define FL_LPTIM16_IC_CAPCTURED_EDGE_RISING (0x0Ul << LPTIM16_CCSR_CAPEDGE_Pos) +#define FL_LPTIM16_IC_CAPCTURED_EDGE_FALLING (0x1Ul << LPTIM16_CCSR_CAPEDGE_Pos) + +#define FL_LPTIM16_IC1_CAPTURE_SOURCE_GROUP0 (0x0Ul << LPTIM16_CCSR_CAP1SSEL_Pos) +#define FL_LPTIM16_IC1_CAPTURE_SOURCE_GROUP1 (0x1Ul << LPTIM16_CCSR_CAP1SSEL_Pos) +#define FL_LPTIM16_IC1_CAPTURE_SOURCE_GROUP2 (0x2Ul << LPTIM16_CCSR_CAP1SSEL_Pos) +#define FL_LPTIM16_IC1_CAPTURE_SOURCE_GROUP3 (0x3Ul << LPTIM16_CCSR_CAP1SSEL_Pos) + + +/** + * @} + */ +/* Exported functions ---------------------------------------------------------------------------------*/ +/** @defgroup LPTIM16_FL_Exported_Functions LPTIM16 Exported Functions + * @{ + */ + +/** + * @brief Enable LPTIM16 + * @rmtoll CR EN FL_LPTIM16_Enable + * @param LPTIM16x LPTIM16 instance + * @retval None + */ +__STATIC_INLINE void FL_LPTIM16_Enable(LPTIM16_Type *LPTIM16x) +{ + SET_BIT(LPTIM16x->CR, LPTIM16_CR_EN_Msk); +} + +/** + * @brief Disable LPTIM16 + * @rmtoll CR EN FL_LPTIM16_Disable + * @param LPTIM16x LPTIM16 instance + * @retval None + */ +__STATIC_INLINE void FL_LPTIM16_Disable(LPTIM16_Type *LPTIM16x) +{ + CLEAR_BIT(LPTIM16x->CR, LPTIM16_CR_EN_Msk); +} + +/** + * @brief Get LPTIM16 Enable Status + * @rmtoll CR EN FL_LPTIM16_IsEnabled + * @param LPTIM16x LPTIM16 instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_LPTIM16_IsEnabled(LPTIM16_Type *LPTIM16x) +{ + return (uint32_t)(READ_BIT(LPTIM16x->CR, LPTIM16_CR_EN_Msk) == LPTIM16_CR_EN_Msk); +} + +/** + * @brief Enable External Input Analog Filter + * @rmtoll CFGR ETR_AFEN FL_LPTIM16_EnableETRFilter + * @param LPTIM16x LPTIM16 instance + * @retval None + */ +__STATIC_INLINE void FL_LPTIM16_EnableETRFilter(LPTIM16_Type *LPTIM16x) +{ + SET_BIT(LPTIM16x->CFGR, LPTIM16_CFGR_ETR_AFEN_Msk); +} + +/** + * @brief Disable External Input Analog Filter + * @rmtoll CFGR ETR_AFEN FL_LPTIM16_DisableETRFilter + * @param LPTIM16x LPTIM16 instance + * @retval None + */ +__STATIC_INLINE void FL_LPTIM16_DisableETRFilter(LPTIM16_Type *LPTIM16x) +{ + CLEAR_BIT(LPTIM16x->CFGR, LPTIM16_CFGR_ETR_AFEN_Msk); +} + +/** + * @brief Get External Input Analog Filter Enable Status + * @rmtoll CFGR ETR_AFEN FL_LPTIM16_IsEnabledETRFilter + * @param LPTIM16x LPTIM16 instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_LPTIM16_IsEnabledETRFilter(LPTIM16_Type *LPTIM16x) +{ + return (uint32_t)(READ_BIT(LPTIM16x->CFGR, LPTIM16_CFGR_ETR_AFEN_Msk) == LPTIM16_CFGR_ETR_AFEN_Msk); +} + +/** + * @brief Set Prescaler Input + * @rmtoll CFGR PSCSEL FL_LPTIM16_SetClockSource + * @param LPTIM16x LPTIM16 instance + * @param source This parameter can be one of the following values: + * @arg @ref FL_LPTIM16_CLK_SOURCE_INTERNAL + * @arg @ref FL_LPTIM16_CLK_SOURCE_EXTERNAL + * @retval None + */ +__STATIC_INLINE void FL_LPTIM16_SetClockSource(LPTIM16_Type *LPTIM16x, uint32_t source) +{ + MODIFY_REG(LPTIM16x->CFGR, LPTIM16_CFGR_PSCSEL_Msk, source); +} + +/** + * @brief Get Prescaler Input Setting + * @rmtoll CFGR PSCSEL FL_LPTIM16_GetClockSource + * @param LPTIM16x LPTIM16 instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_LPTIM16_CLK_SOURCE_INTERNAL + * @arg @ref FL_LPTIM16_CLK_SOURCE_EXTERNAL + */ +__STATIC_INLINE uint32_t FL_LPTIM16_GetClockSource(LPTIM16_Type *LPTIM16x) +{ + return (uint32_t)(READ_BIT(LPTIM16x->CFGR, LPTIM16_CFGR_PSCSEL_Msk)); +} + +/** + * @brief Set Counter Clock Division + * @rmtoll CFGR DIVSEL FL_LPTIM16_SetPrescaler + * @param LPTIM16x LPTIM16 instance + * @param psc This parameter can be one of the following values: + * @arg @ref FL_LPTIM16_PSC_DIV1 + * @arg @ref FL_LPTIM16_PSC_DIV2 + * @arg @ref FL_LPTIM16_PSC_DIV4 + * @arg @ref FL_LPTIM16_PSC_DIV8 + * @arg @ref FL_LPTIM16_PSC_DIV16 + * @arg @ref FL_LPTIM16_PSC_DIV32 + * @arg @ref FL_LPTIM16_PSC_DIV64 + * @arg @ref FL_LPTIM16_PSC_DIV128 + * @retval None + */ +__STATIC_INLINE void FL_LPTIM16_SetPrescaler(LPTIM16_Type *LPTIM16x, uint32_t psc) +{ + MODIFY_REG(LPTIM16x->CFGR, LPTIM16_CFGR_DIVSEL_Msk, psc); +} + +/** + * @brief Get Counter Clock Division Setting + * @rmtoll CFGR DIVSEL FL_LPTIM16_GetPrescaler + * @param LPTIM16x LPTIM16 instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_LPTIM16_PSC_DIV1 + * @arg @ref FL_LPTIM16_PSC_DIV2 + * @arg @ref FL_LPTIM16_PSC_DIV4 + * @arg @ref FL_LPTIM16_PSC_DIV8 + * @arg @ref FL_LPTIM16_PSC_DIV16 + * @arg @ref FL_LPTIM16_PSC_DIV32 + * @arg @ref FL_LPTIM16_PSC_DIV64 + * @arg @ref FL_LPTIM16_PSC_DIV128 + */ +__STATIC_INLINE uint32_t FL_LPTIM16_GetPrescaler(LPTIM16_Type *LPTIM16x) +{ + return (uint32_t)(READ_BIT(LPTIM16x->CFGR, LPTIM16_CFGR_DIVSEL_Msk)); +} + +/** + * @brief Set ETR Count Edge + * @rmtoll CFGR EDGESEL FL_LPTIM16_SetETRCountEdge + * @param LPTIM16x LPTIM16 instance + * @param edge This parameter can be one of the following values: + * @arg @ref FL_LPTIM16_ETR_COUNT_EDGE_RISING + * @arg @ref FL_LPTIM16_ETR_COUNT_EDGE_FALLING + * @retval None + */ +__STATIC_INLINE void FL_LPTIM16_SetETRCountEdge(LPTIM16_Type *LPTIM16x, uint32_t edge) +{ + MODIFY_REG(LPTIM16x->CFGR, LPTIM16_CFGR_EDGESEL_Msk, edge); +} + +/** + * @brief Get ETR Count Edge Setting + * @rmtoll CFGR EDGESEL FL_LPTIM16_GetETRCountEdge + * @param LPTIM16x LPTIM16 instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_LPTIM16_ETR_COUNT_EDGE_RISING + * @arg @ref FL_LPTIM16_ETR_COUNT_EDGE_FALLING + */ +__STATIC_INLINE uint32_t FL_LPTIM16_GetETRCountEdge(LPTIM16_Type *LPTIM16x) +{ + return (uint32_t)(READ_BIT(LPTIM16x->CFGR, LPTIM16_CFGR_EDGESEL_Msk)); +} + +/** + * @brief Set ETR Trigger Edge + * @rmtoll CFGR TRIGCFG FL_LPTIM16_SetETRTriggerEdge + * @param LPTIM16x LPTIM16 instance + * @param edge This parameter can be one of the following values: + * @arg @ref FL_LPTIM16_ETR_TRIGGER_EDGE_RISING + * @arg @ref FL_LPTIM16_ETR_TRIGGER_EDGE_FALLING + * @arg @ref FL_LPTIM16_ETR_TRIGGER_EDGE_BOTH + * @retval None + */ +__STATIC_INLINE void FL_LPTIM16_SetETRTriggerEdge(LPTIM16_Type *LPTIM16x, uint32_t edge) +{ + MODIFY_REG(LPTIM16x->CFGR, LPTIM16_CFGR_TRIGCFG_Msk, edge); +} + +/** + * @brief Get ETR Trigger Edge Setting + * @rmtoll CFGR TRIGCFG FL_LPTIM16_GetETRTriggerEdge + * @param LPTIM16x LPTIM16 instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_LPTIM16_ETR_TRIGGER_EDGE_RISING + * @arg @ref FL_LPTIM16_ETR_TRIGGER_EDGE_FALLING + * @arg @ref FL_LPTIM16_ETR_TRIGGER_EDGE_BOTH + */ +__STATIC_INLINE uint32_t FL_LPTIM16_GetETRTriggerEdge(LPTIM16_Type *LPTIM16x) +{ + return (uint32_t)(READ_BIT(LPTIM16x->CFGR, LPTIM16_CFGR_TRIGCFG_Msk)); +} + +/** + * @brief Set Quad Encoder Mode + * @rmtoll CFGR QEMD FL_LPTIM16_SetEncoderMode + * @param LPTIM16x LPTIM16 instance + * @param mode This parameter can be one of the following values: + * @arg @ref FL_LPTIM16_ENCODER_MODE_DISABLE + * @arg @ref FL_LPTIM16_ENCODER_MODE_TI1FP1_TI2FP2_CNT + * @arg @ref FL_LPTIM16_ENCODER_MODE_TI2FP2_TI1FP1_CNT + * @arg @ref FL_LPTIM16_ENCODER_MODE_TI2FP2_CNT_TI1FP1_CNT + * @retval None + */ +__STATIC_INLINE void FL_LPTIM16_SetEncoderMode(LPTIM16_Type *LPTIM16x, uint32_t mode) +{ + MODIFY_REG(LPTIM16x->CFGR, LPTIM16_CFGR_QEMD_Msk, mode); +} + +/** + * @brief Get Quad Encoder Mode Setting + * @rmtoll CFGR QEMD FL_LPTIM16_GetEncoderMode + * @param LPTIM16x LPTIM16 instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_LPTIM16_ENCODER_MODE_DISABLE + * @arg @ref FL_LPTIM16_ENCODER_MODE_TI1FP1_TI2FP2_CNT + * @arg @ref FL_LPTIM16_ENCODER_MODE_TI2FP2_TI1FP1_CNT + * @arg @ref FL_LPTIM16_ENCODER_MODE_TI2FP2_CNT_TI1FP1_CNT + */ +__STATIC_INLINE uint32_t FL_LPTIM16_GetEncoderMode(LPTIM16_Type *LPTIM16x) +{ + return (uint32_t)(READ_BIT(LPTIM16x->CFGR, LPTIM16_CFGR_QEMD_Msk)); +} + +/** + * @brief Set Sync Trigger Signal Output Source + * @rmtoll CFGR MMS FL_LPTIM16_SetTriggerOutput + * @param LPTIM16x LPTIM16 instance + * @param triggerOutput This parameter can be one of the following values: + * @arg @ref FL_LPTIM16_TRGO_ENABLE + * @arg @ref FL_LPTIM16_TRGO_UPDATE + * @arg @ref FL_LPTIM16_TRGO_OC1REF + * @arg @ref FL_LPTIM16_TRGO_IC1 + * @arg @ref FL_LPTIM16_TRGO_IC2 + * @retval None + */ +__STATIC_INLINE void FL_LPTIM16_SetTriggerOutput(LPTIM16_Type *LPTIM16x, uint32_t triggerOutput) +{ + MODIFY_REG(LPTIM16x->CFGR, LPTIM16_CFGR_MMS_Msk, triggerOutput); +} + +/** + * @brief Get Sync Trigger Signal Output Source Setting + * @rmtoll CFGR MMS FL_LPTIM16_GetTriggerOutput + * @param LPTIM16x LPTIM16 instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_LPTIM16_TRGO_ENABLE + * @arg @ref FL_LPTIM16_TRGO_UPDATE + * @arg @ref FL_LPTIM16_TRGO_OC1REF + * @arg @ref FL_LPTIM16_TRGO_IC1 + * @arg @ref FL_LPTIM16_TRGO_IC2 + */ +__STATIC_INLINE uint32_t FL_LPTIM16_GetTriggerOutput(LPTIM16_Type *LPTIM16x) +{ + return (uint32_t)(READ_BIT(LPTIM16x->CFGR, LPTIM16_CFGR_MMS_Msk)); +} + +/** + * @brief Set One Pulse Mode + * @rmtoll CFGR ONST FL_LPTIM16_SetOnePulseMode + * @param LPTIM16x LPTIM16 instance + * @param mode This parameter can be one of the following values: + * @arg @ref FL_LPTIM16_ONE_PULSE_MODE_CONTINUOUS + * @arg @ref FL_LPTIM16_ONE_PULSE_MODE_SINGLE + * @retval None + */ +__STATIC_INLINE void FL_LPTIM16_SetOnePulseMode(LPTIM16_Type *LPTIM16x, uint32_t mode) +{ + MODIFY_REG(LPTIM16x->CFGR, LPTIM16_CFGR_ONST_Msk, mode); +} + +/** + * @brief Get One Pulse Mode Setting + * @rmtoll CFGR ONST FL_LPTIM16_GetOnePulseMode + * @param LPTIM16x LPTIM16 instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_LPTIM16_ONE_PULSE_MODE_CONTINUOUS + * @arg @ref FL_LPTIM16_ONE_PULSE_MODE_SINGLE + */ +__STATIC_INLINE uint32_t FL_LPTIM16_GetOnePulseMode(LPTIM16_Type *LPTIM16x) +{ + return (uint32_t)(READ_BIT(LPTIM16x->CFGR, LPTIM16_CFGR_ONST_Msk)); +} + +/** + * @brief Set Operation Mode + * @rmtoll CFGR TMODE FL_LPTIM16_SetOperationMode + * @param LPTIM16x LPTIM16 instance + * @param mode This parameter can be one of the following values: + * @arg @ref FL_LPTIM16_OPERATION_MODE_NORMAL + * @arg @ref FL_LPTIM16_OPERATION_MODE_EXTERNAL_TRIGGER_CNT + * @arg @ref FL_LPTIM16_OPERATION_MODE_EXTERNAL_ASYNC_PULSE_CNT + * @arg @ref FL_LPTIM16_OPERATION_MODE_TIMEOUT + * @retval None + */ +__STATIC_INLINE void FL_LPTIM16_SetOperationMode(LPTIM16_Type *LPTIM16x, uint32_t mode) +{ + MODIFY_REG(LPTIM16x->CFGR, LPTIM16_CFGR_TMODE_Msk, mode); +} + +/** + * @brief Get Operation Mode Setting + * @rmtoll CFGR TMODE FL_LPTIM16_GetOperationMode + * @param LPTIM16x LPTIM16 instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_LPTIM16_OPERATION_MODE_NORMAL + * @arg @ref FL_LPTIM16_OPERATION_MODE_EXTERNAL_TRIGGER_CNT + * @arg @ref FL_LPTIM16_OPERATION_MODE_EXTERNAL_ASYNC_PULSE_CNT + * @arg @ref FL_LPTIM16_OPERATION_MODE_TIMEOUT + */ +__STATIC_INLINE uint32_t FL_LPTIM16_GetOperationMode(LPTIM16_Type *LPTIM16x) +{ + return (uint32_t)(READ_BIT(LPTIM16x->CFGR, LPTIM16_CFGR_TMODE_Msk)); +} + +/** + * @brief Set Channel 1 Output Compare Value + * @rmtoll CCR1 FL_LPTIM16_WriteCompareCH1 + * @param LPTIM16x LPTIM16 instance + * @param compareValue + * @retval None + */ +__STATIC_INLINE void FL_LPTIM16_WriteCompareCH1(LPTIM16_Type *LPTIM16x, uint32_t compareValue) +{ + MODIFY_REG(LPTIM16x->CCR1, (0xffffU << 0U), (compareValue << 0U)); +} + +/** + * @brief Get Channel 1 Output Compare Value + * @rmtoll CCR1 FL_LPTIM16_ReadCompareCH1 + * @param LPTIM16x LPTIM16 instance + * @retval + */ +__STATIC_INLINE uint32_t FL_LPTIM16_ReadCompareCH1(LPTIM16_Type *LPTIM16x) +{ + return (uint32_t)(READ_BIT(LPTIM16x->CCR1, (0xffffU << 0U)) >> 0U); +} + +/** + * @brief Set Channel 2 Output Compare Value + * @rmtoll CCR2 FL_LPTIM16_WriteCompareCH2 + * @param LPTIM16x LPTIM16 instance + * @param compareValue + * @retval None + */ +__STATIC_INLINE void FL_LPTIM16_WriteCompareCH2(LPTIM16_Type *LPTIM16x, uint32_t compareValue) +{ + MODIFY_REG(LPTIM16x->CCR2, (0xffffU << 0U), (compareValue << 0U)); +} + +/** + * @brief Get Channel 2 Output Compare Value + * @rmtoll CCR2 FL_LPTIM16_ReadCompareCH2 + * @param LPTIM16x LPTIM16 instance + * @retval + */ +__STATIC_INLINE uint32_t FL_LPTIM16_ReadCompareCH2(LPTIM16_Type *LPTIM16x) +{ + return (uint32_t)(READ_BIT(LPTIM16x->CCR2, (0xffffU << 0U)) >> 0U); +} + +/** + * @brief Get Channel 1 Input Capture Value + * @rmtoll CCR1 FL_LPTIM16_ReadCaptureCH1 + * @param LPTIM16x LPTIM16 instance + * @retval + */ +__STATIC_INLINE uint32_t FL_LPTIM16_ReadCaptureCH1(LPTIM16_Type *LPTIM16x) +{ + return (uint32_t)(READ_BIT(LPTIM16x->CCR1, (0xffffU << 0U)) >> 0U); +} + +/** + * @brief Get Channel 2 Input Capture Value + * @rmtoll CCR2 FL_LPTIM16_ReadCaptureCH2 + * @param LPTIM16x LPTIM16 instance + * @retval + */ +__STATIC_INLINE uint32_t FL_LPTIM16_ReadCaptureCH2(LPTIM16_Type *LPTIM16x) +{ + return (uint32_t)(READ_BIT(LPTIM16x->CCR2, (0xffffU << 0U)) >> 0U); +} + +/** + * @brief Enable Channel Capture/Compare Interrupt + * @rmtoll IER CCIE FL_LPTIM16_EnableIT_CC + * @param LPTIM16x LPTIM16 instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_LPTIM16_CHANNEL_1 + * @arg @ref FL_LPTIM16_CHANNEL_2 + * @retval None + */ +__STATIC_INLINE void FL_LPTIM16_EnableIT_CC(LPTIM16_Type *LPTIM16x, uint32_t channel) +{ + SET_BIT(LPTIM16x->IER, ((channel & 0x3) << 0x0U)); +} + +/** + * @brief Enable Update Event Interrupt + * @rmtoll IER OVIE FL_LPTIM16_EnableIT_Update + * @param LPTIM16x LPTIM16 instance + * @retval None + */ +__STATIC_INLINE void FL_LPTIM16_EnableIT_Update(LPTIM16_Type *LPTIM16x) +{ + SET_BIT(LPTIM16x->IER, LPTIM16_IER_OVIE_Msk); +} + +/** + * @brief Enable External Trigger Interrupt + * @rmtoll IER TRIGIE FL_LPTIM16_EnableIT_Trigger + * @param LPTIM16x LPTIM16 instance + * @retval None + */ +__STATIC_INLINE void FL_LPTIM16_EnableIT_Trigger(LPTIM16_Type *LPTIM16x) +{ + SET_BIT(LPTIM16x->IER, LPTIM16_IER_TRIGIE_Msk); +} + +/** + * @brief Enable Channel Capture Overflow Interrupt + * @rmtoll IER OVRIE FL_LPTIM16_EnableIT_CCOverflow + * @param LPTIM16x LPTIM16 instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_LPTIM16_CHANNEL_1 + * @arg @ref FL_LPTIM16_CHANNEL_2 + * @retval None + */ +__STATIC_INLINE void FL_LPTIM16_EnableIT_CCOverflow(LPTIM16_Type *LPTIM16x, uint32_t channel) +{ + SET_BIT(LPTIM16x->IER, ((channel & 0x3) << 0x8U)); +} + +/** + * @brief Disable Channel Capture/Compare Interrupt + * @rmtoll IER CCIE FL_LPTIM16_DisableIT_CC + * @param LPTIM16x LPTIM16 instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_LPTIM16_CHANNEL_1 + * @arg @ref FL_LPTIM16_CHANNEL_2 + * @retval None + */ +__STATIC_INLINE void FL_LPTIM16_DisableIT_CC(LPTIM16_Type *LPTIM16x, uint32_t channel) +{ + CLEAR_BIT(LPTIM16x->IER, ((channel & 0x3) << 0x0U)); +} + +/** + * @brief Disable Update Event Interrupt + * @rmtoll IER OVIE FL_LPTIM16_DisableIT_Update + * @param LPTIM16x LPTIM16 instance + * @retval None + */ +__STATIC_INLINE void FL_LPTIM16_DisableIT_Update(LPTIM16_Type *LPTIM16x) +{ + CLEAR_BIT(LPTIM16x->IER, LPTIM16_IER_OVIE_Msk); +} + +/** + * @brief Disable External Trigger Interrupt + * @rmtoll IER TRIGIE FL_LPTIM16_DisableIT_Trigger + * @param LPTIM16x LPTIM16 instance + * @retval None + */ +__STATIC_INLINE void FL_LPTIM16_DisableIT_Trigger(LPTIM16_Type *LPTIM16x) +{ + CLEAR_BIT(LPTIM16x->IER, LPTIM16_IER_TRIGIE_Msk); +} + +/** + * @brief Disable Channel Capture Overflow Interrupt + * @rmtoll IER OVRIE FL_LPTIM16_DisableIT_CCOverflow + * @param LPTIM16x LPTIM16 instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_LPTIM16_CHANNEL_1 + * @arg @ref FL_LPTIM16_CHANNEL_2 + * @retval None + */ +__STATIC_INLINE void FL_LPTIM16_DisableIT_CCOverflow(LPTIM16_Type *LPTIM16x, uint32_t channel) +{ + CLEAR_BIT(LPTIM16x->IER, ((channel & 0x3) << 0x8U)); +} + +/** + * @brief Get Channel Capture/Compare Interrupt Enable Status + * @rmtoll IER CCIE FL_LPTIM16_IsEnabledIT_CC + * @param LPTIM16x LPTIM16 instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_LPTIM16_CHANNEL_1 + * @arg @ref FL_LPTIM16_CHANNEL_2 + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_LPTIM16_IsEnabledIT_CC(LPTIM16_Type *LPTIM16x, uint32_t channel) +{ + return (uint32_t)(READ_BIT(LPTIM16x->IER, ((channel & 0x3) << 0x0U)) == ((channel & 0x3) << 0x0U)); +} + +/** + * @brief Get Counter Update Event Interrupt Enable Status + * @rmtoll IER OVIE FL_LPTIM16_IsEnabledIT_Update + * @param LPTIM16x LPTIM16 instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_LPTIM16_IsEnabledIT_Update(LPTIM16_Type *LPTIM16x) +{ + return (uint32_t)(READ_BIT(LPTIM16x->IER, LPTIM16_IER_OVIE_Msk) == LPTIM16_IER_OVIE_Msk); +} + +/** + * @brief Get External Trigger Interrupt Enable Status + * @rmtoll IER TRIGIE FL_LPTIM16_IsEnabledIT_Trigger + * @param LPTIM16x LPTIM16 instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_LPTIM16_IsEnabledIT_Trigger(LPTIM16_Type *LPTIM16x) +{ + return (uint32_t)(READ_BIT(LPTIM16x->IER, LPTIM16_IER_TRIGIE_Msk) == LPTIM16_IER_TRIGIE_Msk); +} + +/** + * @brief Get Channel Capture Overflow Interrupt Enable Status + * @rmtoll IER OVRIE FL_LPTIM16_IsEnabledIT_CCOverflow + * @param LPTIM16x LPTIM16 instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_LPTIM16_CHANNEL_1 + * @arg @ref FL_LPTIM16_CHANNEL_2 + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_LPTIM16_IsEnabledIT_CCOverflow(LPTIM16_Type *LPTIM16x, uint32_t channel) +{ + return (uint32_t)(READ_BIT(LPTIM16x->IER, ((channel & 0x3) << 0x8U)) == ((channel & 0x3) << 0x8U)); +} + +/** + * @brief Get Capture/Compare Channel Interrupt Flag + * @rmtoll ISR CCIF FL_LPTIM16_IsActiveFlag_CC + * @param LPTIM16x LPTIM16 instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_LPTIM16_CHANNEL_1 + * @arg @ref FL_LPTIM16_CHANNEL_2 + * @retval Returned value can be one of the following values: + */ +__STATIC_INLINE uint32_t FL_LPTIM16_IsActiveFlag_CC(LPTIM16_Type *LPTIM16x, uint32_t channel) +{ + return (uint32_t)(READ_BIT(LPTIM16x->ISR, ((channel & 0x3) << 0x0U)) == ((channel & 0x3) << 0x0U)); +} + +/** + * @brief Get Update Event Interrupt Flag + * @rmtoll ISR OVIF FL_LPTIM16_IsActiveFlag_Update + * @param LPTIM16x LPTIM16 instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_LPTIM16_IsActiveFlag_Update(LPTIM16_Type *LPTIM16x) +{ + return (uint32_t)(READ_BIT(LPTIM16x->ISR, LPTIM16_ISR_OVIF_Msk) == (LPTIM16_ISR_OVIF_Msk)); +} + +/** + * @brief Get External Trigger Interrupt Flag + * @rmtoll ISR TRIGIF FL_LPTIM16_IsActiveFlag_Trigger + * @param LPTIM16x LPTIM16 instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_LPTIM16_IsActiveFlag_Trigger(LPTIM16_Type *LPTIM16x) +{ + return (uint32_t)(READ_BIT(LPTIM16x->ISR, LPTIM16_ISR_TRIGIF_Msk) == (LPTIM16_ISR_TRIGIF_Msk)); +} + +/** + * @brief Get Channel Capture Overflow Interrupt Flag + * @rmtoll ISR OVRIF FL_LPTIM16_IsActiveFlag_CCOverflow + * @param LPTIM16x LPTIM16 instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_LPTIM16_CHANNEL_1 + * @arg @ref FL_LPTIM16_CHANNEL_2 + * @retval Returned value can be one of the following values: + */ +__STATIC_INLINE uint32_t FL_LPTIM16_IsActiveFlag_CCOverflow(LPTIM16_Type *LPTIM16x, uint32_t channel) +{ + return (uint32_t)(READ_BIT(LPTIM16x->ISR, ((channel & 0x3) << 0x8U)) == ((channel & 0x3) << 0x8U)); +} + +/** + * @brief Clear Capture/Compare Channel Interrupt Flag + * @rmtoll ISR CCIF FL_LPTIM16_ClearFlag_CC + * @param LPTIM16x LPTIM16 instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_LPTIM16_CHANNEL_1 + * @arg @ref FL_LPTIM16_CHANNEL_2 + * @retval None + */ +__STATIC_INLINE void FL_LPTIM16_ClearFlag_CC(LPTIM16_Type *LPTIM16x, uint32_t channel) +{ + WRITE_REG(LPTIM16x->ISR, ((channel & 0x3) << 0x0U)); +} + +/** + * @brief Clear Update Event Interrupt Flag + * @rmtoll ISR OVIF FL_LPTIM16_ClearFlag_Update + * @param LPTIM16x LPTIM16 instance + * @retval None + */ +__STATIC_INLINE void FL_LPTIM16_ClearFlag_Update(LPTIM16_Type *LPTIM16x) +{ + WRITE_REG(LPTIM16x->ISR, LPTIM16_ISR_OVIF_Msk); +} + +/** + * @brief Clear External Trigger Interrupt Flag + * @rmtoll ISR TRIGIF FL_LPTIM16_ClearFlag_Trigger + * @param LPTIM16x LPTIM16 instance + * @retval None + */ +__STATIC_INLINE void FL_LPTIM16_ClearFlag_Trigger(LPTIM16_Type *LPTIM16x) +{ + WRITE_REG(LPTIM16x->ISR, LPTIM16_ISR_TRIGIF_Msk); +} + +/** + * @brief Clear Channel Capture Overflow Interrupt Flag + * @rmtoll ISR OVRIF FL_LPTIM16_ClearFlag_CCOverflow + * @param LPTIM16x LPTIM16 instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_LPTIM16_CHANNEL_1 + * @arg @ref FL_LPTIM16_CHANNEL_2 + * @retval None + */ +__STATIC_INLINE void FL_LPTIM16_ClearFlag_CCOverflow(LPTIM16_Type *LPTIM16x, uint32_t channel) +{ + WRITE_REG(LPTIM16x->ISR, ((channel & 0x3) << 0x8U)); +} + +/** + * @brief Set Auto Reload Value + * @rmtoll ARR FL_LPTIM16_WriteAutoReload + * @param LPTIM16x LPTIM16 instance + * @param autoReload + * @retval None + */ +__STATIC_INLINE void FL_LPTIM16_WriteAutoReload(LPTIM16_Type *LPTIM16x, uint32_t autoReload) +{ + MODIFY_REG(LPTIM16x->ARR, (0xffffU << 0U), (autoReload << 0U)); +} + +/** + * @brief Get Auto Reload Value + * @rmtoll ARR FL_LPTIM16_ReadAutoReload + * @param LPTIM16x LPTIM16 instance + * @retval + */ +__STATIC_INLINE uint32_t FL_LPTIM16_ReadAutoReload(LPTIM16_Type *LPTIM16x) +{ + return (uint32_t)(READ_BIT(LPTIM16x->ARR, (0xffffU << 0U)) >> 0U); +} + +/** + * @brief Set Input Capture Channel Capture Edge + * @rmtoll CCSR CAPCFG FL_LPTIM16_IC_SetCaptureEdge + * @param LPTIM16x LPTIM16 instance + * @param polarity This parameter can be one of the following values: + * @arg @ref FL_LPTIM16_IC_EDGE_RISING + * @arg @ref FL_LPTIM16_IC_EDGE_FALLING + * @arg @ref FL_LPTIM16_IC_EDGE_BOTH + * @param channel This parameter can be one of the following values: + * @arg @ref FL_LPTIM16_CHANNEL_1 + * @arg @ref FL_LPTIM16_CHANNEL_2 + * @retval None + */ +__STATIC_INLINE void FL_LPTIM16_IC_SetCaptureEdge(LPTIM16_Type *LPTIM16x, uint32_t polarity, uint32_t channel) +{ + switch(channel) + { + case FL_LPTIM16_CHANNEL_1: + MODIFY_REG(LPTIM16x->CCSR, (0x3U << 8U), (polarity << 0U)); + break; + case FL_LPTIM16_CHANNEL_2: + MODIFY_REG(LPTIM16x->CCSR, (0x3U << 10U), (polarity << 2U)); + break; + } +} + +/** + * @brief Get Input Capture Channel Capture Edge + * @rmtoll CCSR CAPCFG FL_LPTIM16_IC_GetCaptureEdge + * @param LPTIM16x LPTIM16 instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_LPTIM16_CHANNEL_1 + * @arg @ref FL_LPTIM16_CHANNEL_2 + * @retval Returned value can be one of the following values: + * @arg @ref FL_LPTIM16_IC_EDGE_RISING + * @arg @ref FL_LPTIM16_IC_EDGE_FALLING + * @arg @ref FL_LPTIM16_IC_EDGE_BOTH + */ +__STATIC_INLINE uint32_t FL_LPTIM16_IC_GetCaptureEdge(LPTIM16_Type *LPTIM16x, uint32_t channel) +{ + switch(channel) + { + case FL_LPTIM16_CHANNEL_1: + return (uint32_t)(READ_BIT(LPTIM16x->CCSR, (0x3U << 8U)) >> 0U); + case FL_LPTIM16_CHANNEL_2: + return (uint32_t)(READ_BIT(LPTIM16x->CCSR, (0x3U << 10U)) >> 2U); + default: + return 0; + } +} + +/** + * @brief Set Channel Output Compare Polarity + * @rmtoll CCSR CCP FL_LPTIM16_OC_SetPolarity + * @param LPTIM16x LPTIM16 instance + * @param polarity This parameter can be one of the following values: + * @arg @ref FL_LPTIM16_OC_POLARITY_NORMAL + * @arg @ref FL_LPTIM16_OC_POLARITY_INVERT + * @param channel This parameter can be one of the following values: + * @arg @ref FL_LPTIM16_CHANNEL_1 + * @arg @ref FL_LPTIM16_CHANNEL_2 + * @retval None + */ +__STATIC_INLINE void FL_LPTIM16_OC_SetPolarity(LPTIM16_Type *LPTIM16x, uint32_t polarity, uint32_t channel) +{ + switch(channel) + { + case FL_LPTIM16_CHANNEL_1: + MODIFY_REG(LPTIM16x->CCSR, (0x1U << 16U), (polarity << 0U)); + break; + case FL_LPTIM16_CHANNEL_2: + MODIFY_REG(LPTIM16x->CCSR, (0x1U << 17U), (polarity << 1U)); + break; + } +} + +/** + * @brief Get Channel Output Compare Polarity + * @rmtoll CCSR CCP FL_LPTIM16_OC_GetPolarity + * @param LPTIM16x LPTIM16 instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_LPTIM16_CHANNEL_1 + * @arg @ref FL_LPTIM16_CHANNEL_2 + * @retval Returned value can be one of the following values: + * @arg @ref FL_LPTIM16_OC_POLARITY_NORMAL + * @arg @ref FL_LPTIM16_OC_POLARITY_INVERT + */ +__STATIC_INLINE uint32_t FL_LPTIM16_OC_GetPolarity(LPTIM16_Type *LPTIM16x, uint32_t channel) +{ + switch(channel) + { + case FL_LPTIM16_CHANNEL_1: + return (uint32_t)(READ_BIT(LPTIM16x->CCSR, (0x1Ul << 16U)) >> 0U); + case FL_LPTIM16_CHANNEL_2: + return (uint32_t)(READ_BIT(LPTIM16x->CCSR, (0x1Ul << 17U)) >> 1U); + default: + return 0; + } +} + +/** + * @brief Set Input Capture Channel Input Polarity + * @rmtoll CCSR CCP FL_LPTIM16_IC_SetInputPolarity + * @param LPTIM16x LPTIM16 instance + * @param polarity This parameter can be one of the following values: + * @arg @ref FL_LPTIM16_IC_POLARITY_NORMAL + * @arg @ref FL_LPTIM16_IC_POLARITY_INVERT + * @param channel This parameter can be one of the following values: + * @arg @ref FL_LPTIM16_CHANNEL_1 + * @arg @ref FL_LPTIM16_CHANNEL_2 + * @retval None + */ +__STATIC_INLINE void FL_LPTIM16_IC_SetInputPolarity(LPTIM16_Type *LPTIM16x, uint32_t polarity, uint32_t channel) +{ + switch(channel) + { + case FL_LPTIM16_CHANNEL_1: + MODIFY_REG(LPTIM16x->CCSR, (0x1U << 16U), (polarity << 0U)); + break; + case FL_LPTIM16_CHANNEL_2: + MODIFY_REG(LPTIM16x->CCSR, (0x1U << 17U), (polarity << 1U)); + break; + } +} + +/** + * @brief Get Input Capture Channel Input Polarity + * @rmtoll CCSR CCP FL_LPTIM16_IC_GetInputPolarity + * @param LPTIM16x LPTIM16 instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_LPTIM16_CHANNEL_1 + * @arg @ref FL_LPTIM16_CHANNEL_2 + * @retval Returned value can be one of the following values: + * @arg @ref FL_LPTIM16_IC_POLARITY_NORMAL + * @arg @ref FL_LPTIM16_IC_POLARITY_INVERT + */ +__STATIC_INLINE uint32_t FL_LPTIM16_IC_GetInputPolarity(LPTIM16_Type *LPTIM16x, uint32_t channel) +{ + switch(channel) + { + case FL_LPTIM16_CHANNEL_1: + return (uint32_t)(READ_BIT(LPTIM16x->CCSR, (0x1U << 16U)) >> 0U); + case FL_LPTIM16_CHANNEL_2: + return (uint32_t)(READ_BIT(LPTIM16x->CCSR, (0x1U << 17U)) >> 1U); + default: + return 0; + } +} + +/** + * @brief Enable Channel Input Digital Filter + * @rmtoll CCSR FL_LPTIM16_EnableDigitalFilter + * @param LPTIM16x LPTIM16 instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_LPTIM16_CHANNEL_1 + * @arg @ref FL_LPTIM16_CHANNEL_2 + * @retval None + */ +__STATIC_INLINE void FL_LPTIM16_EnableDigitalFilter(LPTIM16_Type *LPTIM16x, uint32_t channel) +{ + SET_BIT(LPTIM16x->CCSR, ((channel & 0x3) << 0xcU)); +} + +/** + * @brief Disable Channel Input Digital Filter + * @rmtoll CCSR FL_LPTIM16_DisableDigitalFilter + * @param LPTIM16x LPTIM16 instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_LPTIM16_CHANNEL_1 + * @arg @ref FL_LPTIM16_CHANNEL_2 + * @retval None + */ +__STATIC_INLINE void FL_LPTIM16_DisableDigitalFilter(LPTIM16_Type *LPTIM16x, uint32_t channel) +{ + CLEAR_BIT(LPTIM16x->CCSR, ((channel & 0x3) << 0xcU)); +} + +/** + * @brief Get Channel Input Digital Filter Enable Status + * @rmtoll CCSR FL_LPTIM16_IsEnabledDigitalFilter + * @param LPTIM16x LPTIM16 instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_LPTIM16_CHANNEL_1 + * @arg @ref FL_LPTIM16_CHANNEL_2 + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_LPTIM16_IsEnabledDigitalFilter(LPTIM16_Type *LPTIM16x, uint32_t channel) +{ + return (uint32_t)(READ_BIT(LPTIM16x->CCSR, ((channel & 0x3) << 0xcU)) == ((channel & 0x3) << 0xcU)); +} + +/** + * @brief Set Channel 1 Input Prescaler + * @rmtoll CCSR CAP1PSC FL_LPTIM16_IC_WriteChannel1Prescaler + * @param LPTIM16x LPTIM16 instance + * @param psc + * @retval None + */ +__STATIC_INLINE void FL_LPTIM16_IC_WriteChannel1Prescaler(LPTIM16_Type *LPTIM16x, uint32_t psc) +{ + MODIFY_REG(LPTIM16x->CCSR, (0x3fU << 26U), (psc << 26U)); +} + +/** + * @brief Get Channel 1 Input Prescaler Setting + * @rmtoll CCSR CAP1PSC FL_LPTIM16_IC_ReadChannel1Prescaler + * @param LPTIM16x LPTIM16 instance + * @retval + */ +__STATIC_INLINE uint32_t FL_LPTIM16_IC_ReadChannel1Prescaler(LPTIM16_Type *LPTIM16x) +{ + return (uint32_t)(READ_BIT(LPTIM16x->CCSR, (0x3fU << 26U)) >> 26U); +} + +/** + * @brief Set Channel Operation Mode + * @rmtoll CCSR CCS FL_LPTIM16_SetChannelMode + * @param LPTIM16x LPTIM16 instance + * @param mode This parameter can be one of the following values: + * @arg @ref FL_LPTIM16_CHANNEL_MODE_DISABLE + * @arg @ref FL_LPTIM16_CHANNEL_MODE_INPUT + * @arg @ref FL_LPTIM16_CHANNEL_MODE_OUTPUT + * @param channel This parameter can be one of the following values: + * @arg @ref FL_LPTIM16_CHANNEL_1 + * @arg @ref FL_LPTIM16_CHANNEL_2 + * @retval None + */ +__STATIC_INLINE void FL_LPTIM16_SetChannelMode(LPTIM16_Type *LPTIM16x, uint32_t mode, uint32_t channel) +{ + switch(channel) + { + case FL_LPTIM16_CHANNEL_1: + MODIFY_REG(LPTIM16x->CCSR, (0x3U << 0U), (mode << 0U)); + break; + case FL_LPTIM16_CHANNEL_2: + MODIFY_REG(LPTIM16x->CCSR, (0x3U << 2U), (mode << 2U)); + break; + } +} + +/** + * @brief Get Channel Operation Mode + * @rmtoll CCSR CCS FL_LPTIM16_GetChannelMode + * @param LPTIM16x LPTIM16 instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_LPTIM16_CHANNEL_1 + * @arg @ref FL_LPTIM16_CHANNEL_2 + * @retval Returned value can be one of the following values: + * @arg @ref FL_LPTIM16_CHANNEL_MODE_DISABLE + * @arg @ref FL_LPTIM16_CHANNEL_MODE_INPUT + * @arg @ref FL_LPTIM16_CHANNEL_MODE_OUTPUT + */ +__STATIC_INLINE uint32_t FL_LPTIM16_GetChannelMode(LPTIM16_Type *LPTIM16x, uint32_t channel) +{ + switch(channel) + { + case FL_LPTIM16_CHANNEL_1: + return (uint32_t)(READ_BIT(LPTIM16x->CCSR, (0x3U << 0U)) >> 0U); + case FL_LPTIM16_CHANNEL_2: + return (uint32_t)(READ_BIT(LPTIM16x->CCSR, (0x3U << 2U)) >> 2U); + default: + return 0; + } +} + +/** + * @brief Get Channel Captured Edge + * @rmtoll CCSR CAPEDGE FL_LPTIM16_IC_GetCapturedEdge + * @param LPTIM16x LPTIM16 instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_LPTIM16_CHANNEL_1 + * @arg @ref FL_LPTIM16_CHANNEL_2 + * @retval Returned value can be one of the following values: + * @arg @ref FL_LPTIM16_IC_CAPCTURED_EDGE_RISING + * @arg @ref FL_LPTIM16_IC_CAPCTURED_EDGE_FALLING + */ +__STATIC_INLINE uint32_t FL_LPTIM16_IC_GetCapturedEdge(LPTIM16_Type *LPTIM16x, uint32_t channel) +{ + switch(channel) + { + case FL_LPTIM16_CHANNEL_1: + return (uint32_t)(READ_BIT(LPTIM16x->CCSR, (0x1U << 20U)) >> 0U); + case FL_LPTIM16_CHANNEL_2: + return (uint32_t)(READ_BIT(LPTIM16x->CCSR, (0x1U << 21U)) >> 1U); + default: + return 0; + } +} + +/** + * @brief Set Channel 1 Capture Source + * @rmtoll CCSR CAP1SSEL FL_LPTIM16_IC_SetChannel1CaptureSource + * @param LPTIM16x LPTIM16 instance + * @param source This parameter can be one of the following values: + * @arg @ref FL_LPTIM16_IC1_CAPTURE_SOURCE_GROUP0 + * @arg @ref FL_LPTIM16_IC1_CAPTURE_SOURCE_GROUP1 + * @arg @ref FL_LPTIM16_IC1_CAPTURE_SOURCE_GROUP2 + * @arg @ref FL_LPTIM16_IC1_CAPTURE_SOURCE_GROUP3 + * @retval None + */ +__STATIC_INLINE void FL_LPTIM16_IC_SetChannel1CaptureSource(LPTIM16_Type *LPTIM16x, uint32_t source) +{ + MODIFY_REG(LPTIM16x->CCSR, LPTIM16_CCSR_CAP1SSEL_Msk, source); +} + +/** + * @brief Get Channel 1 Capture Source Setting + * @rmtoll CCSR CAP1SSEL FL_LPTIM16_IC_GetChannel1CaptureSource + * @param LPTIM16x LPTIM16 instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_LPTIM16_IC1_CAPTURE_SOURCE_GROUP0 + * @arg @ref FL_LPTIM16_IC1_CAPTURE_SOURCE_GROUP1 + * @arg @ref FL_LPTIM16_IC1_CAPTURE_SOURCE_GROUP2 + * @arg @ref FL_LPTIM16_IC1_CAPTURE_SOURCE_GROUP3 + */ +__STATIC_INLINE uint32_t FL_LPTIM16_IC_GetChannel1CaptureSource(LPTIM16_Type *LPTIM16x) +{ + return (uint32_t)(READ_BIT(LPTIM16x->CCSR, LPTIM16_CCSR_CAP1SSEL_Msk)); +} + +/** + * @brief Read LPTIM16 Counter Value + * @rmtoll CNT FL_LPTIM16_ReadCounter + * @param LPTIM16x LPTIM16 instance + * @retval + */ +__STATIC_INLINE uint32_t FL_LPTIM16_ReadCounter(LPTIM16_Type *LPTIM16x) +{ + return (uint32_t)(READ_BIT(LPTIM16x->CNT, (0xffffU << 0U)) >> 0U); +} + +/** + * @} + */ + +/** @defgroup LPTIM16_FL_EF_Init Initialization and de-initialization functions + * @{ + */ +FL_ErrorStatus FL_LPTIM16_DeInit(LPTIM16_Type *LPTIM16x); +FL_ErrorStatus FL_LPTIM16_Init(LPTIM16_Type *LPTIM16x, FL_LPTIM16_InitTypeDef *init); +void FL_LPTIM16_StructInit(FL_LPTIM16_InitTypeDef *init); +FL_ErrorStatus FL_LPTIM16_IC_Init(LPTIM16_Type *LPTIM16x, uint32_t channel, FL_LPTIM16_IC_InitTypeDef *ic_init); +void FL_LPTIM16_IC_StructInit(FL_LPTIM16_IC_InitTypeDef *ic_init); +FL_ErrorStatus FL_LPTIM16_OC_Init(LPTIM16_Type *LPTIM16x, uint32_t channel, FL_LPTIM16_OC_InitTypeDef *oc_init); +void FL_LPTIM16_OC_StructInit(FL_LPTIM16_OC_InitTypeDef *oc_init); + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif /* __FM33LG0XX_FL_LPTIM16_H*/ + +/*************************Py_Code_Generator Version: 0.1-0.14-0.1 @ 2020-12-14*************************/ +/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/ diff --git a/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_lptim32.h b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_lptim32.h new file mode 100644 index 0000000..a379b53 --- /dev/null +++ b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_lptim32.h @@ -0,0 +1,1321 @@ + /** + ******************************************************************************************************* + * @file fm33lg0xx_fl_lptim32.h + * @author FMSH Application Team + * @brief Head file of LPTIM32 FL Module + ******************************************************************************************************* + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + + + +/* Define to prevent recursive inclusion---------------------------------------------------------------*/ +#ifndef __FM33LG0XX_FL_LPTIM32_H +#define __FM33LG0XX_FL_LPTIM32_H + +#ifdef __cplusplus +extern "C" { +#endif +/* Includes -------------------------------------------------------------------------------------------*/ +#include "fm33lg0xx_fl_def.h" +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @defgroup LPTIM32 LPTIM32 + * @brief LPTIM32 FL driver + * @{ + */ + +/* Exported types -------------------------------------------------------------------------------------*/ +/** @defgroup LPTIM32_FL_ES_INIT LPTIM32 Exported Init structures + * @{ + */ + +/** + * @brief FL LPTIM32 Init Sturcture definition + */ + +/** + * @brief LPTIM32 Init Sturcture Definition + */ +typedef struct +{ + /* 内部时钟源 */ + uint32_t clockSource; + + /* 预分频器的时钟源 可选择内部时钟, 也可选择外部时钟 */ + uint32_t prescalerClockSource; + + /* 预分频系数 */ + uint32_t prescaler; + + /* 重装值 */ + uint32_t autoReload; + + /* 定时器工作模式选择 */ + uint32_t mode; + + /* 单次计数使能 */ + uint32_t onePulseMode; + + /* ETR异步计数边沿 */ + uint32_t countEdge; + + /* ETR触发计数边沿 */ + uint32_t triggerEdge; + +} FL_LPTIM32_InitTypeDef; + +/** + * @brief LPTIM32 Output Compare Configuration Structure Definition + */ +typedef struct +{ + /* 比较值 */ + uint32_t compareValue; + + /* 比较输出极性 */ + uint32_t OCPolarity; + +} FL_LPTIM32_OC_InitTypeDef; + +/** + * @brief LPTIM32 Input Capture Configuration Structure Definition + */ +typedef struct +{ + /* 通道1捕获源 */ + uint32_t ICSource; + + /* 输入捕获极性 */ + uint32_t ICEdge; + +} FL_LPTIM32_IC_InitTypeDef; + +/** + * @} + */ +/* Exported constants ---------------------------------------------------------------------------------*/ +/** @defgroup LPTIM32_FL_Exported_Constants LPTIM32 Exported Constants + * @{ + */ + +#define LPTIM32_CR_EN_Pos (0U) +#define LPTIM32_CR_EN_Msk (0x1Ul << LPTIM32_CR_EN_Pos) +#define LPTIM32_CR_EN LPTIM32_CR_EN_Msk + +#define LPTIM32_CFGR_ETR_AFEN_Pos (24U) +#define LPTIM32_CFGR_ETR_AFEN_Msk (0x1Ul << LPTIM32_CFGR_ETR_AFEN_Pos) +#define LPTIM32_CFGR_ETR_AFEN LPTIM32_CFGR_ETR_AFEN_Msk + +#define LPTIM32_CFGR_PSCSEL_Pos (14U) +#define LPTIM32_CFGR_PSCSEL_Msk (0x1Ul << LPTIM32_CFGR_PSCSEL_Pos) +#define LPTIM32_CFGR_PSCSEL LPTIM32_CFGR_PSCSEL_Msk + +#define LPTIM32_CFGR_DIVSEL_Pos (10U) +#define LPTIM32_CFGR_DIVSEL_Msk (0x7Ul << LPTIM32_CFGR_DIVSEL_Pos) +#define LPTIM32_CFGR_DIVSEL LPTIM32_CFGR_DIVSEL_Msk + +#define LPTIM32_CFGR_EDGESEL_Pos (7U) +#define LPTIM32_CFGR_EDGESEL_Msk (0x1Ul << LPTIM32_CFGR_EDGESEL_Pos) +#define LPTIM32_CFGR_EDGESEL LPTIM32_CFGR_EDGESEL_Msk + +#define LPTIM32_CFGR_TRIGCFG_Pos (5U) +#define LPTIM32_CFGR_TRIGCFG_Msk (0x3Ul << LPTIM32_CFGR_TRIGCFG_Pos) +#define LPTIM32_CFGR_TRIGCFG LPTIM32_CFGR_TRIGCFG_Msk + +#define LPTIM32_CFGR_ONST_Pos (2U) +#define LPTIM32_CFGR_ONST_Msk (0x1Ul << LPTIM32_CFGR_ONST_Pos) +#define LPTIM32_CFGR_ONST LPTIM32_CFGR_ONST_Msk + +#define LPTIM32_CFGR_TMOD_Pos (0U) +#define LPTIM32_CFGR_TMOD_Msk (0x3Ul << LPTIM32_CFGR_TMOD_Pos) +#define LPTIM32_CFGR_TMOD LPTIM32_CFGR_TMOD_Msk + +#define LPTIM32_IER_CCIE_Pos (0U) +#define LPTIM32_IER_CCIE_Msk (0xfUl << LPTIM32_IER_CCIE_Pos) +#define LPTIM32_IER_CCIE LPTIM32_IER_CCIE_Msk + +#define LPTIM32_IER_OVIE_Pos (6U) +#define LPTIM32_IER_OVIE_Msk (0x1Ul << LPTIM32_IER_OVIE_Pos) +#define LPTIM32_IER_OVIE LPTIM32_IER_OVIE_Msk + +#define LPTIM32_IER_TRIGIE_Pos (7U) +#define LPTIM32_IER_TRIGIE_Msk (0x1Ul << LPTIM32_IER_TRIGIE_Pos) +#define LPTIM32_IER_TRIGIE LPTIM32_IER_TRIGIE_Msk + +#define LPTIM32_IER_OVRIE_Pos (8U) +#define LPTIM32_IER_OVRIE_Msk (0xfUl << LPTIM32_IER_OVRIE_Pos) +#define LPTIM32_IER_OVRIE LPTIM32_IER_OVRIE_Msk + +#define LPTIM32_ISR_CCIF_Pos (0U) +#define LPTIM32_ISR_CCIF_Msk (0xfUl << LPTIM32_ISR_CCIF_Pos) +#define LPTIM32_ISR_CCIF LPTIM32_ISR_CCIF_Msk + +#define LPTIM32_ISR_OVIF_Pos (6U) +#define LPTIM32_ISR_OVIF_Msk (0x1Ul << LPTIM32_ISR_OVIF_Pos) +#define LPTIM32_ISR_OVIF LPTIM32_ISR_OVIF_Msk + +#define LPTIM32_ISR_TRIGIF_Pos (7U) +#define LPTIM32_ISR_TRIGIF_Msk (0x1Ul << LPTIM32_ISR_TRIGIF_Pos) +#define LPTIM32_ISR_TRIGIF LPTIM32_ISR_TRIGIF_Msk + +#define LPTIM32_ISR_OVRIF_Pos (8U) +#define LPTIM32_ISR_OVRIF_Msk (0xfUl << LPTIM32_ISR_OVRIF_Pos) +#define LPTIM32_ISR_OVRIF LPTIM32_ISR_OVRIF_Msk + +#define LPTIM32_CCSR_CAPCFG_Pos (8U) +#define LPTIM32_CCSR_CAPCFG_Msk (0x3Ul << LPTIM32_CCSR_CAPCFG_Pos) +#define LPTIM32_CCSR_CAPCFG LPTIM32_CCSR_CAPCFG_Msk + +#define LPTIM32_CCSR_CCS_Pos (0U) +#define LPTIM32_CCSR_CCS_Msk (0x3Ul << LPTIM32_CCSR_CCS_Pos) +#define LPTIM32_CCSR_CCS LPTIM32_CCSR_CCS_Msk + +#define LPTIM32_CCSR_CAPEDGE_Pos (20U) +#define LPTIM32_CCSR_CAPEDGE_Msk (0x1Ul << LPTIM32_CCSR_CAPEDGE_Pos) +#define LPTIM32_CCSR_CAPEDGE LPTIM32_CCSR_CAPEDGE_Msk + +#define LPTIM32_CCSR_CAP1SSEL_Pos (24U) +#define LPTIM32_CCSR_CAP1SSEL_Msk (0x3Ul << LPTIM32_CCSR_CAP1SSEL_Pos) +#define LPTIM32_CCSR_CAP1SSEL LPTIM32_CCSR_CAP1SSEL_Msk + +#define LPTIM32_CCSR_POLAR_Pos (16U) +#define LPTIM32_CCSR_POLAR_Msk (0x1Ul << LPTIM32_CCSR_POLAR_Pos) +#define LPTIM32_CCSR_POLAR LPTIM32_CCSR_POLAR_Msk + +#define LPTIM32_CFGR_MMS_Pos (16U) +#define LPTIM32_CFGR_MMS_Msk (0x7Ul << LPTIM32_CFGR_MMS_Pos) +#define LPTIM32_CFGR_MMS LPTIM32_CFGR_MMS_Msk + + + +#define FL_LPTIM32_CHANNEL_1 (0x1U << 0U) +#define FL_LPTIM32_CHANNEL_2 (0x1U << 1U) +#define FL_LPTIM32_CHANNEL_3 (0x1U << 2U) +#define FL_LPTIM32_CHANNEL_4 (0x1U << 3U) + + + +#define FL_LPTIM32_CLK_SOURCE_INTERNAL (0x0Ul << LPTIM32_CFGR_PSCSEL_Pos) +#define FL_LPTIM32_CLK_SOURCE_EXTERNAL (0x1Ul << LPTIM32_CFGR_PSCSEL_Pos) + + +#define FL_LPTIM32_PSC_DIV1 (0x0Ul << LPTIM32_CFGR_DIVSEL_Pos) +#define FL_LPTIM32_PSC_DIV2 (0x1Ul << LPTIM32_CFGR_DIVSEL_Pos) +#define FL_LPTIM32_PSC_DIV4 (0x2Ul << LPTIM32_CFGR_DIVSEL_Pos) +#define FL_LPTIM32_PSC_DIV8 (0x3Ul << LPTIM32_CFGR_DIVSEL_Pos) +#define FL_LPTIM32_PSC_DIV16 (0x4Ul << LPTIM32_CFGR_DIVSEL_Pos) +#define FL_LPTIM32_PSC_DIV32 (0x5Ul << LPTIM32_CFGR_DIVSEL_Pos) +#define FL_LPTIM32_PSC_DIV64 (0x6Ul << LPTIM32_CFGR_DIVSEL_Pos) +#define FL_LPTIM32_PSC_DIV128 (0x7Ul << LPTIM32_CFGR_DIVSEL_Pos) + + +#define FL_LPTIM32_ETR_COUNT_EDGE_RISING (0x0Ul << LPTIM32_CFGR_EDGESEL_Pos) +#define FL_LPTIM32_ETR_COUNT_EDGE_FALLING (0x1Ul << LPTIM32_CFGR_EDGESEL_Pos) + + +#define FL_LPTIM32_ETR_TRIGGER_EDGE_RISING (0x0Ul << LPTIM32_CFGR_TRIGCFG_Pos) +#define FL_LPTIM32_ETR_TRIGGER_EDGE_FALLING (0x1Ul << LPTIM32_CFGR_TRIGCFG_Pos) +#define FL_LPTIM32_ETR_TRIGGER_EDGE_BOTH (0x2Ul << LPTIM32_CFGR_TRIGCFG_Pos) + + +#define FL_LPTIM32_ONE_PULSE_MODE_CONTINUOUS (0x0Ul << LPTIM32_CFGR_ONST_Pos) +#define FL_LPTIM32_ONE_PULSE_MODE_SINGLE (0x1Ul << LPTIM32_CFGR_ONST_Pos) + + +#define FL_LPTIM32_OPERATION_MODE_NORMAL (0x0Ul << LPTIM32_CFGR_TMOD_Pos) +#define FL_LPTIM32_OPERATION_MODE_EXTERNAL_TRIGGER_CNT (0x1Ul << LPTIM32_CFGR_TMOD_Pos) +#define FL_LPTIM32_OPERATION_MODE_EXTERNAL_ASYNC_PULSE_CNT (0x2Ul << LPTIM32_CFGR_TMOD_Pos) +#define FL_LPTIM32_OPERATION_MODE_TIMEOUT (0x3Ul << LPTIM32_CFGR_TMOD_Pos) + + +#define FL_LPTIM32_IC_EDGE_RISING (0x0Ul << LPTIM32_CCSR_CAPCFG_Pos) +#define FL_LPTIM32_IC_EDGE_FALLING (0x1Ul << LPTIM32_CCSR_CAPCFG_Pos) +#define FL_LPTIM32_IC_EDGE_BOTH (0x2Ul << LPTIM32_CCSR_CAPCFG_Pos) + + +#define FL_LPTIM32_CHANNEL_MODE_DISABLE (0x0U << LPTIM32_CCSR_CCS_Pos) +#define FL_LPTIM32_CHANNEL_MODE_INPUT (0x1U << LPTIM32_CCSR_CCS_Pos) +#define FL_LPTIM32_CHANNEL_MODE_OUTPUT (0x2U << LPTIM32_CCSR_CCS_Pos) + + +#define FL_LPTIM32_IC_CAPTURED_EDGE_RISING (0x0U << LPTIM32_CCSR_CAPEDGE_Pos) +#define FL_LPTIM32_IC_CAPTURED_EDGE_FALLING (0x1U << LPTIM32_CCSR_CAPEDGE_Pos) + +#define FL_LPTIM32_IC1_CAPTURE_SOURCE_GROUP0 (0x0Ul << LPTIM32_CCSR_CAP1SSEL_Pos) +#define FL_LPTIM32_IC1_CAPTURE_SOURCE_GROUP1 (0x1Ul << LPTIM32_CCSR_CAP1SSEL_Pos) +#define FL_LPTIM32_IC1_CAPTURE_SOURCE_GROUP2 (0x2Ul << LPTIM32_CCSR_CAP1SSEL_Pos) +#define FL_LPTIM32_IC1_CAPTURE_SOURCE_GROUP3 (0x3Ul << LPTIM32_CCSR_CAP1SSEL_Pos) + + +#define FL_LPTIM32_OC_POLARITY_NORMAL (0x0Ul << LPTIM32_CCSR_POLAR_Pos) +#define FL_LPTIM32_OC_POLARITY_INVERT (0x1Ul << LPTIM32_CCSR_POLAR_Pos) + + +#define FL_LPTIM32_TRGO_ENABLE (0x1U << LPTIM32_CFGR_MMS_Pos) +#define FL_LPTIM32_TRGO_UPDATE (0x2U << LPTIM32_CFGR_MMS_Pos) +#define FL_LPTIM32_TRGO_OC1REF (0x3U << LPTIM32_CFGR_MMS_Pos) +#define FL_LPTIM32_TRGO_IC1 (0x4U << LPTIM32_CFGR_MMS_Pos) +#define FL_LPTIM32_TRGO_IC2 (0x5U << LPTIM32_CFGR_MMS_Pos) +#define FL_LPTIM32_TRGO_IC3 (0x6U << LPTIM32_CFGR_MMS_Pos) +#define FL_LPTIM32_TRGO_IC4 (0x7U << LPTIM32_CFGR_MMS_Pos) + + +/** + * @} + */ +/* Exported functions ---------------------------------------------------------------------------------*/ +/** @defgroup LPTIM32_FL_Exported_Functions LPTIM32 Exported Functions + * @{ + */ + +/** + * @brief Enable LPTIM32 + * @rmtoll CR EN FL_LPTIM32_Enable + * @param LPTIM32x LPTIM32 instance + * @retval None + */ +__STATIC_INLINE void FL_LPTIM32_Enable(LPTIM32_Type *LPTIM32x) +{ + SET_BIT(LPTIM32x->CR, LPTIM32_CR_EN_Msk); +} + +/** + * @brief Disable LPTIM32 + * @rmtoll CR EN FL_LPTIM32_Disable + * @param LPTIM32x LPTIM32 instance + * @retval None + */ +__STATIC_INLINE void FL_LPTIM32_Disable(LPTIM32_Type *LPTIM32x) +{ + CLEAR_BIT(LPTIM32x->CR, LPTIM32_CR_EN_Msk); +} + +/** + * @brief Get LPTIM32 Enable Status + * @rmtoll CR EN FL_LPTIM32_IsEnabled + * @param LPTIM32x LPTIM32 instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_LPTIM32_IsEnabled(LPTIM32_Type *LPTIM32x) +{ + return (uint32_t)(READ_BIT(LPTIM32x->CR, LPTIM32_CR_EN_Msk) == LPTIM32_CR_EN_Msk); +} + +/** + * @brief Enable External Input Analog Filter + * @rmtoll CFGR ETR_AFEN FL_LPTIM32_EnableETRFilter + * @param LPTIM32x LPTIM32 instance + * @retval None + */ +__STATIC_INLINE void FL_LPTIM32_EnableETRFilter(LPTIM32_Type *LPTIM32x) +{ + SET_BIT(LPTIM32x->CFGR, LPTIM32_CFGR_ETR_AFEN_Msk); +} + +/** + * @brief Disable External Input Analog Filter + * @rmtoll CFGR ETR_AFEN FL_LPTIM32_DisableETRFilter + * @param LPTIM32x LPTIM32 instance + * @retval None + */ +__STATIC_INLINE void FL_LPTIM32_DisableETRFilter(LPTIM32_Type *LPTIM32x) +{ + CLEAR_BIT(LPTIM32x->CFGR, LPTIM32_CFGR_ETR_AFEN_Msk); +} + +/** + * @brief Get External Input Analog Filter Enable Status + * @rmtoll CFGR ETR_AFEN FL_LPTIM32_IsEnabledETRFilter + * @param LPTIM32x LPTIM32 instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_LPTIM32_IsEnabledETRFilter(LPTIM32_Type *LPTIM32x) +{ + return (uint32_t)(READ_BIT(LPTIM32x->CFGR, LPTIM32_CFGR_ETR_AFEN_Msk) == LPTIM32_CFGR_ETR_AFEN_Msk); +} + +/** + * @brief Set Clock Source + * @rmtoll CFGR PSCSEL FL_LPTIM32_SetClockSource + * @param LPTIM32x LPTIM32 instance + * @param source This parameter can be one of the following values: + * @arg @ref FL_LPTIM32_CLK_SOURCE_INTERNAL + * @arg @ref FL_LPTIM32_CLK_SOURCE_EXTERNAL + * @retval None + */ +__STATIC_INLINE void FL_LPTIM32_SetClockSource(LPTIM32_Type *LPTIM32x, uint32_t source) +{ + MODIFY_REG(LPTIM32x->CFGR, LPTIM32_CFGR_PSCSEL_Msk, source); +} + +/** + * @brief Get Clock Source Setting + * @rmtoll CFGR PSCSEL FL_LPTIM32_GetClockSource + * @param LPTIM32x LPTIM32 instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_LPTIM32_CLK_SOURCE_INTERNAL + * @arg @ref FL_LPTIM32_CLK_SOURCE_EXTERNAL + */ +__STATIC_INLINE uint32_t FL_LPTIM32_GetClockSource(LPTIM32_Type *LPTIM32x) +{ + return (uint32_t)(READ_BIT(LPTIM32x->CFGR, LPTIM32_CFGR_PSCSEL_Msk)); +} + +/** + * @brief Set Counter Clock Prescaler + * @rmtoll CFGR DIVSEL FL_LPTIM32_SetPrescaler + * @param LPTIM32x LPTIM32 instance + * @param psc This parameter can be one of the following values: + * @arg @ref FL_LPTIM32_PSC_DIV1 + * @arg @ref FL_LPTIM32_PSC_DIV2 + * @arg @ref FL_LPTIM32_PSC_DIV4 + * @arg @ref FL_LPTIM32_PSC_DIV8 + * @arg @ref FL_LPTIM32_PSC_DIV16 + * @arg @ref FL_LPTIM32_PSC_DIV32 + * @arg @ref FL_LPTIM32_PSC_DIV64 + * @arg @ref FL_LPTIM32_PSC_DIV128 + * @retval None + */ +__STATIC_INLINE void FL_LPTIM32_SetPrescaler(LPTIM32_Type *LPTIM32x, uint32_t psc) +{ + MODIFY_REG(LPTIM32x->CFGR, LPTIM32_CFGR_DIVSEL_Msk, psc); +} + +/** + * @brief Get Counter Clock Prescaler Setting + * @rmtoll CFGR DIVSEL FL_LPTIM32_GetPrescaler + * @param LPTIM32x LPTIM32 instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_LPTIM32_PSC_DIV1 + * @arg @ref FL_LPTIM32_PSC_DIV2 + * @arg @ref FL_LPTIM32_PSC_DIV4 + * @arg @ref FL_LPTIM32_PSC_DIV8 + * @arg @ref FL_LPTIM32_PSC_DIV16 + * @arg @ref FL_LPTIM32_PSC_DIV32 + * @arg @ref FL_LPTIM32_PSC_DIV64 + * @arg @ref FL_LPTIM32_PSC_DIV128 + */ +__STATIC_INLINE uint32_t FL_LPTIM32_GetPrescaler(LPTIM32_Type *LPTIM32x) +{ + return (uint32_t)(READ_BIT(LPTIM32x->CFGR, LPTIM32_CFGR_DIVSEL_Msk)); +} + +/** + * @brief Set ETR Count Edge + * @rmtoll CFGR EDGESEL FL_LPTIM32_SetETRCountEdge + * @param LPTIM32x LPTIM32 instance + * @param edge This parameter can be one of the following values: + * @arg @ref FL_LPTIM32_ETR_COUNT_EDGE_RISING + * @arg @ref FL_LPTIM32_ETR_COUNT_EDGE_FALLING + * @retval None + */ +__STATIC_INLINE void FL_LPTIM32_SetETRCountEdge(LPTIM32_Type *LPTIM32x, uint32_t edge) +{ + MODIFY_REG(LPTIM32x->CFGR, LPTIM32_CFGR_EDGESEL_Msk, edge); +} + +/** + * @brief Get ETR Count Edge Setting + * @rmtoll CFGR EDGESEL FL_LPTIM32_GetETRCountEdge + * @param LPTIM32x LPTIM32 instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_LPTIM32_ETR_COUNT_EDGE_RISING + * @arg @ref FL_LPTIM32_ETR_COUNT_EDGE_FALLING + */ +__STATIC_INLINE uint32_t FL_LPTIM32_GetETRCountEdge(LPTIM32_Type *LPTIM32x) +{ + return (uint32_t)(READ_BIT(LPTIM32x->CFGR, LPTIM32_CFGR_EDGESEL_Msk)); +} + +/** + * @brief Set ETR Trigger Edge + * @rmtoll CFGR TRIGCFG FL_LPTIM32_SetETRTriggerEdge + * @param LPTIM32x LPTIM32 instance + * @param edge This parameter can be one of the following values: + * @arg @ref FL_LPTIM32_ETR_TRIGGER_EDGE_RISING + * @arg @ref FL_LPTIM32_ETR_TRIGGER_EDGE_FALLING + * @arg @ref FL_LPTIM32_ETR_TRIGGER_EDGE_BOTH + * @retval None + */ +__STATIC_INLINE void FL_LPTIM32_SetETRTriggerEdge(LPTIM32_Type *LPTIM32x, uint32_t edge) +{ + MODIFY_REG(LPTIM32x->CFGR, LPTIM32_CFGR_TRIGCFG_Msk, edge); +} + +/** + * @brief Get ETR Trigger Edge Setting + * @rmtoll CFGR TRIGCFG FL_LPTIM32_GetETRTriggerEdge + * @param LPTIM32x LPTIM32 instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_LPTIM32_ETR_TRIGGER_EDGE_RISING + * @arg @ref FL_LPTIM32_ETR_TRIGGER_EDGE_FALLING + * @arg @ref FL_LPTIM32_ETR_TRIGGER_EDGE_BOTH + */ +__STATIC_INLINE uint32_t FL_LPTIM32_GetETRTriggerEdge(LPTIM32_Type *LPTIM32x) +{ + return (uint32_t)(READ_BIT(LPTIM32x->CFGR, LPTIM32_CFGR_TRIGCFG_Msk)); +} + +/** + * @brief Set One Pulse Mode + * @rmtoll CFGR ONST FL_LPTIM32_SetOnePulseMode + * @param LPTIM32x LPTIM32 instance + * @param mode This parameter can be one of the following values: + * @arg @ref FL_LPTIM32_ONE_PULSE_MODE_CONTINUOUS + * @arg @ref FL_LPTIM32_ONE_PULSE_MODE_SINGLE + * @retval None + */ +__STATIC_INLINE void FL_LPTIM32_SetOnePulseMode(LPTIM32_Type *LPTIM32x, uint32_t mode) +{ + MODIFY_REG(LPTIM32x->CFGR, LPTIM32_CFGR_ONST_Msk, mode); +} + +/** + * @brief Get One Pulse Mode Setting + * @rmtoll CFGR ONST FL_LPTIM32_GetOnePulseMode + * @param LPTIM32x LPTIM32 instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_LPTIM32_ONE_PULSE_MODE_CONTINUOUS + * @arg @ref FL_LPTIM32_ONE_PULSE_MODE_SINGLE + */ +__STATIC_INLINE uint32_t FL_LPTIM32_GetOnePulseMode(LPTIM32_Type *LPTIM32x) +{ + return (uint32_t)(READ_BIT(LPTIM32x->CFGR, LPTIM32_CFGR_ONST_Msk)); +} + +/** + * @brief Set Operation Mode + * @rmtoll CFGR TMOD FL_LPTIM32_SetOperationMode + * @param LPTIM32x LPTIM32 instance + * @param mode This parameter can be one of the following values: + * @arg @ref FL_LPTIM32_OPERATION_MODE_NORMAL + * @arg @ref FL_LPTIM32_OPERATION_MODE_EXTERNAL_TRIGGER_CNT + * @arg @ref FL_LPTIM32_OPERATION_MODE_EXTERNAL_ASYNC_PULSE_CNT + * @arg @ref FL_LPTIM32_OPERATION_MODE_TIMEOUT + * @retval None + */ +__STATIC_INLINE void FL_LPTIM32_SetOperationMode(LPTIM32_Type *LPTIM32x, uint32_t mode) +{ + MODIFY_REG(LPTIM32x->CFGR, LPTIM32_CFGR_TMOD_Msk, mode); +} + +/** + * @brief Get Operation Mode Setting + * @rmtoll CFGR TMOD FL_LPTIM32_GetOperationMode + * @param LPTIM32x LPTIM32 instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_LPTIM32_OPERATION_MODE_NORMAL + * @arg @ref FL_LPTIM32_OPERATION_MODE_EXTERNAL_TRIGGER_CNT + * @arg @ref FL_LPTIM32_OPERATION_MODE_EXTERNAL_ASYNC_PULSE_CNT + * @arg @ref FL_LPTIM32_OPERATION_MODE_TIMEOUT + */ +__STATIC_INLINE uint32_t FL_LPTIM32_GetOperationMode(LPTIM32_Type *LPTIM32x) +{ + return (uint32_t)(READ_BIT(LPTIM32x->CFGR, LPTIM32_CFGR_TMOD_Msk)); +} + +/** + * @brief Set Channel 1 Output Compare Value + * @rmtoll CCR1 FL_LPTIM32_WriteCompareCH1 + * @param LPTIM32x LPTIM32 instance + * @param compareVal + * @retval None + */ +__STATIC_INLINE void FL_LPTIM32_WriteCompareCH1(LPTIM32_Type *LPTIM32x, uint32_t compareVal) +{ + MODIFY_REG(LPTIM32x->CCR1, (0xffffffffU << 0U), (compareVal << 0U)); +} + +/** + * @brief Get Channel 1 Output Compare Value + * @rmtoll CCR1 FL_LPTIM32_ReadCompareCH1 + * @param LPTIM32x LPTIM32 instance + * @retval + */ +__STATIC_INLINE uint32_t FL_LPTIM32_ReadCompareCH1(LPTIM32_Type *LPTIM32x) +{ + return (uint32_t)(READ_BIT(LPTIM32x->CCR1, (0xffffffffU << 0U)) >> 0U); +} + +/** + * @brief Set Channel 2 Output Compare Value + * @rmtoll CCR2 FL_LPTIM32_WriteCompareCH2 + * @param LPTIM32x LPTIM32 instance + * @param compareVal + * @retval None + */ +__STATIC_INLINE void FL_LPTIM32_WriteCompareCH2(LPTIM32_Type *LPTIM32x, uint32_t compareVal) +{ + MODIFY_REG(LPTIM32x->CCR2, (0xffffffffU << 0U), (compareVal << 0U)); +} + +/** + * @brief Get Channel 2 Output Compare Value + * @rmtoll CCR2 FL_LPTIM32_ReadCompareCH2 + * @param LPTIM32x LPTIM32 instance + * @retval + */ +__STATIC_INLINE uint32_t FL_LPTIM32_ReadCompareCH2(LPTIM32_Type *LPTIM32x) +{ + return (uint32_t)(READ_BIT(LPTIM32x->CCR2, (0xffffffffU << 0U)) >> 0U); +} + +/** + * @brief Set Channel 3 Output Compare Value + * @rmtoll CCR3 FL_LPTIM32_WriteCompareCH3 + * @param LPTIM32x LPTIM32 instance + * @param compareVal + * @retval None + */ +__STATIC_INLINE void FL_LPTIM32_WriteCompareCH3(LPTIM32_Type *LPTIM32x, uint32_t compareVal) +{ + MODIFY_REG(LPTIM32x->CCR3, (0xffffffffU << 0U), (compareVal << 0U)); +} + +/** + * @brief Get Channel 3 Output Compare Value + * @rmtoll CCR3 FL_LPTIM32_ReadCompareCH3 + * @param LPTIM32x LPTIM32 instance + * @retval + */ +__STATIC_INLINE uint32_t FL_LPTIM32_ReadCompareCH3(LPTIM32_Type *LPTIM32x) +{ + return (uint32_t)(READ_BIT(LPTIM32x->CCR3, (0xffffffffU << 0U)) >> 0U); +} + +/** + * @brief Set Channel 4 Output Compare Value + * @rmtoll CCR4 FL_LPTIM32_WriteCompareCH4 + * @param LPTIM32x LPTIM32 instance + * @param compareVal + * @retval None + */ +__STATIC_INLINE void FL_LPTIM32_WriteCompareCH4(LPTIM32_Type *LPTIM32x, uint32_t compareVal) +{ + MODIFY_REG(LPTIM32x->CCR4, (0xffffffffU << 0U), (compareVal << 0U)); +} + +/** + * @brief Get Channel 4 Output Compare Value + * @rmtoll CCR4 FL_LPTIM32_ReadCompareCH4 + * @param LPTIM32x LPTIM32 instance + * @retval + */ +__STATIC_INLINE uint32_t FL_LPTIM32_ReadCompareCH4(LPTIM32_Type *LPTIM32x) +{ + return (uint32_t)(READ_BIT(LPTIM32x->CCR4, (0xffffffffU << 0U)) >> 0U); +} + +/** + * @brief Get Channel 1 Input Capture Value + * @rmtoll CCR1 FL_LPTIM32_ReadCaptureCH1 + * @param LPTIM32x LPTIM32 instance + * @retval + */ +__STATIC_INLINE uint32_t FL_LPTIM32_ReadCaptureCH1(LPTIM32_Type *LPTIM32x) +{ + return (uint32_t)(READ_BIT(LPTIM32x->CCR1, (0xffffffffU << 0U)) >> 0U); +} + +/** + * @brief Get Channel 2 Input Capture Value + * @rmtoll CCR2 FL_LPTIM32_ReadCaptureCH2 + * @param LPTIM32x LPTIM32 instance + * @retval + */ +__STATIC_INLINE uint32_t FL_LPTIM32_ReadCaptureCH2(LPTIM32_Type *LPTIM32x) +{ + return (uint32_t)(READ_BIT(LPTIM32x->CCR2, (0xffffffffU << 0U)) >> 0U); +} + +/** + * @brief Get Channel 3 Input Capture Value + * @rmtoll CCR3 FL_LPTIM32_ReadCaptureCH3 + * @param LPTIM32x LPTIM32 instance + * @retval + */ +__STATIC_INLINE uint32_t FL_LPTIM32_ReadCaptureCH3(LPTIM32_Type *LPTIM32x) +{ + return (uint32_t)(READ_BIT(LPTIM32x->CCR3, (0xffffffffU << 0U)) >> 0U); +} + +/** + * @brief Get Channel 4 Input Capture Value + * @rmtoll CCR4 FL_LPTIM32_ReadCaptureCH4 + * @param LPTIM32x LPTIM32 instance + * @retval + */ +__STATIC_INLINE uint32_t FL_LPTIM32_ReadCaptureCH4(LPTIM32_Type *LPTIM32x) +{ + return (uint32_t)(READ_BIT(LPTIM32x->CCR4, (0xffffffffU << 0U)) >> 0U); +} + +/** + * @brief Enable Channel Capture/Compare Interrupt + * @rmtoll IER CCIE FL_LPTIM32_EnableIT_CC + * @param LPTIM32x LPTIM32 instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_LPTIM32_CHANNEL_1 + * @arg @ref FL_LPTIM32_CHANNEL_2 + * @arg @ref FL_LPTIM32_CHANNEL_3 + * @arg @ref FL_LPTIM32_CHANNEL_4 + * @retval None + */ +__STATIC_INLINE void FL_LPTIM32_EnableIT_CC(LPTIM32_Type *LPTIM32x, uint32_t channel) +{ + SET_BIT(LPTIM32x->IER, ((channel & 0xf) << 0x0U)); +} + +/** + * @brief Enable Update Event Interrupt + * @rmtoll IER OVIE FL_LPTIM32_EnableIT_Update + * @param LPTIM32x LPTIM32 instance + * @retval None + */ +__STATIC_INLINE void FL_LPTIM32_EnableIT_Update(LPTIM32_Type *LPTIM32x) +{ + SET_BIT(LPTIM32x->IER, LPTIM32_IER_OVIE_Msk); +} + +/** + * @brief Enable External Trigger Interrupt + * @rmtoll IER TRIGIE FL_LPTIM32_EnableIT_Trigger + * @param LPTIM32x LPTIM32 instance + * @retval None + */ +__STATIC_INLINE void FL_LPTIM32_EnableIT_Trigger(LPTIM32_Type *LPTIM32x) +{ + SET_BIT(LPTIM32x->IER, LPTIM32_IER_TRIGIE_Msk); +} + +/** + * @brief Enable Channel Capture Overflow Interrupt + * @rmtoll IER OVRIE FL_LPTIM32_EnableIT_CCOverflow + * @param LPTIM32x LPTIM32 instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_LPTIM32_CHANNEL_1 + * @arg @ref FL_LPTIM32_CHANNEL_2 + * @arg @ref FL_LPTIM32_CHANNEL_3 + * @arg @ref FL_LPTIM32_CHANNEL_4 + * @retval None + */ +__STATIC_INLINE void FL_LPTIM32_EnableIT_CCOverflow(LPTIM32_Type *LPTIM32x, uint32_t channel) +{ + SET_BIT(LPTIM32x->IER, ((channel & 0xf) << 0x8U)); +} + +/** + * @brief Disable Channel Capture/Compare Interrupt + * @rmtoll IER CCIE FL_LPTIM32_DisableIT_CC + * @param LPTIM32x LPTIM32 instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_LPTIM32_CHANNEL_1 + * @arg @ref FL_LPTIM32_CHANNEL_2 + * @arg @ref FL_LPTIM32_CHANNEL_3 + * @arg @ref FL_LPTIM32_CHANNEL_4 + * @retval None + */ +__STATIC_INLINE void FL_LPTIM32_DisableIT_CC(LPTIM32_Type *LPTIM32x, uint32_t channel) +{ + CLEAR_BIT(LPTIM32x->IER, ((channel & 0xf) << 0x0U)); +} + +/** + * @brief Disable Update Event Interrupt + * @rmtoll IER OVIE FL_LPTIM32_DisableIT_Update + * @param LPTIM32x LPTIM32 instance + * @retval None + */ +__STATIC_INLINE void FL_LPTIM32_DisableIT_Update(LPTIM32_Type *LPTIM32x) +{ + CLEAR_BIT(LPTIM32x->IER, LPTIM32_IER_OVIE_Msk); +} + +/** + * @brief Disable External Trigger Interrupt + * @rmtoll IER TRIGIE FL_LPTIM32_DisableIT_Trigger + * @param LPTIM32x LPTIM32 instance + * @retval None + */ +__STATIC_INLINE void FL_LPTIM32_DisableIT_Trigger(LPTIM32_Type *LPTIM32x) +{ + CLEAR_BIT(LPTIM32x->IER, LPTIM32_IER_TRIGIE_Msk); +} + +/** + * @brief Disable Channel Capture Overflow Interrupt + * @rmtoll IER OVRIE FL_LPTIM32_DisableIT_CCOverflow + * @param LPTIM32x LPTIM32 instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_LPTIM32_CHANNEL_1 + * @arg @ref FL_LPTIM32_CHANNEL_2 + * @arg @ref FL_LPTIM32_CHANNEL_3 + * @arg @ref FL_LPTIM32_CHANNEL_4 + * @retval None + */ +__STATIC_INLINE void FL_LPTIM32_DisableIT_CCOverflow(LPTIM32_Type *LPTIM32x, uint32_t channel) +{ + CLEAR_BIT(LPTIM32x->IER, ((channel & 0xf) << 0x8U)); +} + +/** + * @brief Get Channel Capture/Compare Interrupt Enable Status + * @rmtoll IER CCIE FL_LPTIM32_IsEnabledIT_CC + * @param LPTIM32x LPTIM32 instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_LPTIM32_CHANNEL_1 + * @arg @ref FL_LPTIM32_CHANNEL_2 + * @arg @ref FL_LPTIM32_CHANNEL_3 + * @arg @ref FL_LPTIM32_CHANNEL_4 + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_LPTIM32_IsEnabledIT_CC(LPTIM32_Type *LPTIM32x, uint32_t channel) +{ + return (uint32_t)(READ_BIT(LPTIM32x->IER, ((channel & 0xf) << 0x0U)) == ((channel & 0xf) << 0x0U)); +} + +/** + * @brief Get Counter Update Event Interrupt Enable Status + * @rmtoll IER OVIE FL_LPTIM32_IsEnabledIT_Update + * @param LPTIM32x LPTIM32 instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_LPTIM32_IsEnabledIT_Update(LPTIM32_Type *LPTIM32x) +{ + return (uint32_t)(READ_BIT(LPTIM32x->IER, LPTIM32_IER_OVIE_Msk) == LPTIM32_IER_OVIE_Msk); +} + +/** + * @brief Get External Trigger Interrupt Enable Status + * @rmtoll IER TRIGIE FL_LPTIM32_IsEnabledIT_Trigger + * @param LPTIM32x LPTIM32 instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_LPTIM32_IsEnabledIT_Trigger(LPTIM32_Type *LPTIM32x) +{ + return (uint32_t)(READ_BIT(LPTIM32x->IER, LPTIM32_IER_TRIGIE_Msk) == LPTIM32_IER_TRIGIE_Msk); +} + +/** + * @brief Get Channel Capture Overflow Interrupt Enable Status + * @rmtoll IER OVRIE FL_LPTIM32_IsEnabledIT_CCOverflow + * @param LPTIM32x LPTIM32 instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_LPTIM32_CHANNEL_1 + * @arg @ref FL_LPTIM32_CHANNEL_2 + * @arg @ref FL_LPTIM32_CHANNEL_3 + * @arg @ref FL_LPTIM32_CHANNEL_4 + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_LPTIM32_IsEnabledIT_CCOverflow(LPTIM32_Type *LPTIM32x, uint32_t channel) +{ + return (uint32_t)(READ_BIT(LPTIM32x->IER, ((channel & 0xf) << 0x8U)) == ((channel & 0xf) << 0x8U)); +} + +/** + * @brief Get Capture/Compare Channel Interrupt Flag + * @rmtoll ISR CCIF FL_LPTIM32_IsActiveFlag_CC + * @param LPTIM32x LPTIM32 instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_LPTIM32_CHANNEL_1 + * @arg @ref FL_LPTIM32_CHANNEL_2 + * @arg @ref FL_LPTIM32_CHANNEL_3 + * @arg @ref FL_LPTIM32_CHANNEL_4 + * @retval Returned value can be one of the following values: + */ +__STATIC_INLINE uint32_t FL_LPTIM32_IsActiveFlag_CC(LPTIM32_Type *LPTIM32x, uint32_t channel) +{ + return (uint32_t)(READ_BIT(LPTIM32x->ISR, ((channel & 0xf) << 0x0U)) == ((channel & 0xf) << 0x0U)); +} + +/** + * @brief Get Update Event Interrupt Flag + * @rmtoll ISR OVIF FL_LPTIM32_IsActiveFlag_Update + * @param LPTIM32x LPTIM32 instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_LPTIM32_IsActiveFlag_Update(LPTIM32_Type *LPTIM32x) +{ + return (uint32_t)(READ_BIT(LPTIM32x->ISR, LPTIM32_ISR_OVIF_Msk) == (LPTIM32_ISR_OVIF_Msk)); +} + +/** + * @brief Get External Trigger Interrupt Flag + * @rmtoll ISR TRIGIF FL_LPTIM32_IsActiveFlag_Trigger + * @param LPTIM32x LPTIM32 instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_LPTIM32_IsActiveFlag_Trigger(LPTIM32_Type *LPTIM32x) +{ + return (uint32_t)(READ_BIT(LPTIM32x->ISR, LPTIM32_ISR_TRIGIF_Msk) == (LPTIM32_ISR_TRIGIF_Msk)); +} + +/** + * @brief Get Channel Capture Overflow Interrupt Flag + * @rmtoll ISR OVRIF FL_LPTIM32_IsActiveFlag_CCOverflow + * @param LPTIM32x LPTIM32 instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_LPTIM32_CHANNEL_1 + * @arg @ref FL_LPTIM32_CHANNEL_2 + * @arg @ref FL_LPTIM32_CHANNEL_3 + * @arg @ref FL_LPTIM32_CHANNEL_4 + * @retval Returned value can be one of the following values: + */ +__STATIC_INLINE uint32_t FL_LPTIM32_IsActiveFlag_CCOverflow(LPTIM32_Type *LPTIM32x, uint32_t channel) +{ + return (uint32_t)(READ_BIT(LPTIM32x->ISR, ((channel & 0xf) << 0x8U)) == ((channel & 0xf) << 0x8U)); +} + +/** + * @brief Clear Capture/Compare Channel Interrupt Flag + * @rmtoll ISR CCIF FL_LPTIM32_ClearFlag_CC + * @param LPTIM32x LPTIM32 instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_LPTIM32_CHANNEL_1 + * @arg @ref FL_LPTIM32_CHANNEL_2 + * @arg @ref FL_LPTIM32_CHANNEL_3 + * @arg @ref FL_LPTIM32_CHANNEL_4 + * @retval None + */ +__STATIC_INLINE void FL_LPTIM32_ClearFlag_CC(LPTIM32_Type *LPTIM32x, uint32_t channel) +{ + WRITE_REG(LPTIM32x->ISR, ((channel & 0xf) << 0x0U)); +} + +/** + * @brief Clear Update Event Interrupt Flag + * @rmtoll ISR OVIF FL_LPTIM32_ClearFlag_Update + * @param LPTIM32x LPTIM32 instance + * @retval None + */ +__STATIC_INLINE void FL_LPTIM32_ClearFlag_Update(LPTIM32_Type *LPTIM32x) +{ + WRITE_REG(LPTIM32x->ISR, LPTIM32_ISR_OVIF_Msk); +} + +/** + * @brief Clear External Trigger Interrupt Flag + * @rmtoll ISR TRIGIF FL_LPTIM32_ClearFlag_Trigger + * @param LPTIM32x LPTIM32 instance + * @retval None + */ +__STATIC_INLINE void FL_LPTIM32_ClearFlag_Trigger(LPTIM32_Type *LPTIM32x) +{ + WRITE_REG(LPTIM32x->ISR, LPTIM32_ISR_TRIGIF_Msk); +} + +/** + * @brief Clear Channel Capture Overflow Interrupt Flag + * @rmtoll ISR OVRIF FL_LPTIM32_ClearFlag_CCOverflow + * @param LPTIM32x LPTIM32 instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_LPTIM32_CHANNEL_1 + * @arg @ref FL_LPTIM32_CHANNEL_2 + * @arg @ref FL_LPTIM32_CHANNEL_3 + * @arg @ref FL_LPTIM32_CHANNEL_4 + * @retval None + */ +__STATIC_INLINE void FL_LPTIM32_ClearFlag_CCOverflow(LPTIM32_Type *LPTIM32x, uint32_t channel) +{ + WRITE_REG(LPTIM32x->ISR, ((channel & 0xf) << 0x8U)); +} + +/** + * @brief Set Auto Reload Value + * @rmtoll ARR FL_LPTIM32_WriteAutoReload + * @param LPTIM32x LPTIM32 instance + * @param autoReload + * @retval None + */ +__STATIC_INLINE void FL_LPTIM32_WriteAutoReload(LPTIM32_Type *LPTIM32x, uint32_t autoReload) +{ + MODIFY_REG(LPTIM32x->ARR, (0xffffffffU << 0U), (autoReload << 0U)); +} + +/** + * @brief Get Auto Reload Value + * @rmtoll ARR FL_LPTIM32_ReadAutoReload + * @param LPTIM32x LPTIM32 instance + * @retval + */ +__STATIC_INLINE uint32_t FL_LPTIM32_ReadAutoReload(LPTIM32_Type *LPTIM32x) +{ + return (uint32_t)(READ_BIT(LPTIM32x->ARR, (0xffffffffU << 0U)) >> 0U); +} + +/** + * @brief Set Input Capture Channel Capture Edge + * @rmtoll CCSR CAPCFG FL_LPTIM32_IC_SetCaptureEdge + * @param LPTIM32x LPTIM32 instance + * @param polarity This parameter can be one of the following values: + * @arg @ref FL_LPTIM32_IC_EDGE_RISING + * @arg @ref FL_LPTIM32_IC_EDGE_FALLING + * @arg @ref FL_LPTIM32_IC_EDGE_BOTH + * @param channel This parameter can be one of the following values: + * @arg @ref FL_LPTIM32_CHANNEL_1 + * @arg @ref FL_LPTIM32_CHANNEL_2 + * @arg @ref FL_LPTIM32_CHANNEL_3 + * @arg @ref FL_LPTIM32_CHANNEL_4 + * @retval None + */ +__STATIC_INLINE void FL_LPTIM32_IC_SetCaptureEdge(LPTIM32_Type *LPTIM32x, uint32_t polarity, uint32_t channel) +{ + switch(channel) + { + case FL_LPTIM32_CHANNEL_1: + MODIFY_REG(LPTIM32x->CCSR, (0x3U << 8U), (polarity << 0U)); + break; + case FL_LPTIM32_CHANNEL_2: + MODIFY_REG(LPTIM32x->CCSR, (0x3U << 10U), (polarity << 2U)); + break; + case FL_LPTIM32_CHANNEL_3: + MODIFY_REG(LPTIM32x->CCSR, (0x3U << 12U), (polarity << 4U)); + break; + case FL_LPTIM32_CHANNEL_4: + MODIFY_REG(LPTIM32x->CCSR, (0x3U << 14U), (polarity << 6U)); + break; + } +} + +/** + * @brief Get Input Capture Channel Capture Edge + * @rmtoll CCSR CAPCFG FL_LPTIM32_IC_GetCaptureEdge + * @param LPTIM32x LPTIM32 instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_LPTIM32_CHANNEL_1 + * @arg @ref FL_LPTIM32_CHANNEL_2 + * @arg @ref FL_LPTIM32_CHANNEL_3 + * @arg @ref FL_LPTIM32_CHANNEL_4 + * @retval Returned value can be one of the following values: + * @arg @ref FL_LPTIM32_IC_EDGE_RISING + * @arg @ref FL_LPTIM32_IC_EDGE_FALLING + * @arg @ref FL_LPTIM32_IC_EDGE_BOTH + */ +__STATIC_INLINE uint32_t FL_LPTIM32_IC_GetCaptureEdge(LPTIM32_Type *LPTIM32x, uint32_t channel) +{ + switch(channel) + { + case FL_LPTIM32_CHANNEL_1: + return (uint32_t)(READ_BIT(LPTIM32x->CCSR, (0x3U << 8U)) >> 0U); + case FL_LPTIM32_CHANNEL_2: + return (uint32_t)(READ_BIT(LPTIM32x->CCSR, (0x3U << 10U)) >> 2U); + case FL_LPTIM32_CHANNEL_3: + return (uint32_t)(READ_BIT(LPTIM32x->CCSR, (0x3U << 12U)) >> 4U); + case FL_LPTIM32_CHANNEL_4: + return (uint32_t)(READ_BIT(LPTIM32x->CCSR, (0x3U << 14U)) >> 6U); + default: + return 0; + } +} + +/** + * @brief Set Channel Operation Mode + * @rmtoll CCSR CCS FL_LPTIM32_SetChannelMode + * @param LPTIM32x LPTIM32 instance + * @param mode This parameter can be one of the following values: + * @arg @ref FL_LPTIM32_CHANNEL_MODE_DISABLE + * @arg @ref FL_LPTIM32_CHANNEL_MODE_INPUT + * @arg @ref FL_LPTIM32_CHANNEL_MODE_OUTPUT + * @param channel This parameter can be one of the following values: + * @arg @ref FL_LPTIM32_CHANNEL_1 + * @arg @ref FL_LPTIM32_CHANNEL_2 + * @arg @ref FL_LPTIM32_CHANNEL_3 + * @arg @ref FL_LPTIM32_CHANNEL_4 + * @retval None + */ +__STATIC_INLINE void FL_LPTIM32_SetChannelMode(LPTIM32_Type *LPTIM32x, uint32_t mode, uint32_t channel) +{ + switch(channel) + { + case FL_LPTIM32_CHANNEL_1: + MODIFY_REG(LPTIM32x->CCSR, (0x3U << 0U), (mode << 0U)); + break; + case FL_LPTIM32_CHANNEL_2: + MODIFY_REG(LPTIM32x->CCSR, (0x3U << 2U), (mode << 2U)); + break; + case FL_LPTIM32_CHANNEL_3: + MODIFY_REG(LPTIM32x->CCSR, (0x3U << 4U), (mode << 4U)); + break; + case FL_LPTIM32_CHANNEL_4: + MODIFY_REG(LPTIM32x->CCSR, (0x3U << 6U), (mode << 6U)); + break; + } +} + +/** + * @brief Get Channel Operation Mode + * @rmtoll CCSR CCS FL_LPTIM32_GetChannelMode + * @param LPTIM32x LPTIM32 instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_LPTIM32_CHANNEL_1 + * @arg @ref FL_LPTIM32_CHANNEL_2 + * @arg @ref FL_LPTIM32_CHANNEL_3 + * @arg @ref FL_LPTIM32_CHANNEL_4 + * @retval Returned value can be one of the following values: + * @arg @ref FL_LPTIM32_CHANNEL_MODE_DISABLE + * @arg @ref FL_LPTIM32_CHANNEL_MODE_INPUT + * @arg @ref FL_LPTIM32_CHANNEL_MODE_OUTPUT + */ +__STATIC_INLINE uint32_t FL_LPTIM32_GetChannelMode(LPTIM32_Type *LPTIM32x, uint32_t channel) +{ + switch(channel) + { + case FL_LPTIM32_CHANNEL_1: + return (uint32_t)(READ_BIT(LPTIM32x->CCSR, (0x3U << 0U)) >> 0U); + case FL_LPTIM32_CHANNEL_2: + return (uint32_t)(READ_BIT(LPTIM32x->CCSR, (0x3U << 2U)) >> 2U); + case FL_LPTIM32_CHANNEL_3: + return (uint32_t)(READ_BIT(LPTIM32x->CCSR, (0x3U << 4U)) >> 4U); + case FL_LPTIM32_CHANNEL_4: + return (uint32_t)(READ_BIT(LPTIM32x->CCSR, (0x3U << 6U)) >> 6U); + default: + return 0; + } +} + +/** + * @brief Get Channel Captured Edge + * @rmtoll CCSR CAPEDGE FL_LPTIM32_IC_GetCapturedEdge + * @param LPTIM32x LPTIM32 instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_LPTIM32_CHANNEL_1 + * @arg @ref FL_LPTIM32_CHANNEL_2 + * @arg @ref FL_LPTIM32_CHANNEL_3 + * @arg @ref FL_LPTIM32_CHANNEL_4 + * @retval Returned value can be one of the following values: + * @arg @ref FL_LPTIM32_IC_CAPTURED_EDGE_RISING + * @arg @ref FL_LPTIM32_IC_CAPTURED_EDGE_FALLING + */ +__STATIC_INLINE uint32_t FL_LPTIM32_IC_GetCapturedEdge(LPTIM32_Type *LPTIM32x, uint32_t channel) +{ + switch(channel) + { + case FL_LPTIM32_CHANNEL_1: + return (uint32_t)(READ_BIT(LPTIM32x->CCSR, (0x1Ul << 20U)) >> 0U); + case FL_LPTIM32_CHANNEL_2: + return (uint32_t)(READ_BIT(LPTIM32x->CCSR, (0x1Ul << 21U)) >> 1U); + case FL_LPTIM32_CHANNEL_3: + return (uint32_t)(READ_BIT(LPTIM32x->CCSR, (0x1Ul << 22U)) >> 2U); + case FL_LPTIM32_CHANNEL_4: + return (uint32_t)(READ_BIT(LPTIM32x->CCSR, (0x1Ul << 23U)) >> 3U); + default: + return 0; + } +} + +/** + * @brief Set Channel 1 Capture Source + * @rmtoll CCSR CAP1SSEL FL_LPTIM32_IC_SetChannel1CaptureSource + * @param LPTIM32x LPTIM32 instance + * @param source This parameter can be one of the following values: + * @arg @ref FL_LPTIM32_IC1_CAPTURE_SOURCE_GROUP0 + * @arg @ref FL_LPTIM32_IC1_CAPTURE_SOURCE_GROUP1 + * @arg @ref FL_LPTIM32_IC1_CAPTURE_SOURCE_GROUP2 + * @arg @ref FL_LPTIM32_IC1_CAPTURE_SOURCE_GROUP3 + * @retval None + */ +__STATIC_INLINE void FL_LPTIM32_IC_SetChannel1CaptureSource(LPTIM32_Type *LPTIM32x, uint32_t source) +{ + MODIFY_REG(LPTIM32x->CCSR, LPTIM32_CCSR_CAP1SSEL_Msk, source); +} + +/** + * @brief Get Channel 1 Capture Source Setting + * @rmtoll CCSR CAP1SSEL FL_LPTIM32_IC_GetChannel1CaptureSource + * @param LPTIM32x LPTIM32 instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_LPTIM32_IC1_CAPTURE_SOURCE_GROUP0 + * @arg @ref FL_LPTIM32_IC1_CAPTURE_SOURCE_GROUP1 + * @arg @ref FL_LPTIM32_IC1_CAPTURE_SOURCE_GROUP2 + * @arg @ref FL_LPTIM32_IC1_CAPTURE_SOURCE_GROUP3 + */ +__STATIC_INLINE uint32_t FL_LPTIM32_IC_GetChannel1CaptureSource(LPTIM32_Type *LPTIM32x) +{ + return (uint32_t)(READ_BIT(LPTIM32x->CCSR, LPTIM32_CCSR_CAP1SSEL_Msk)); +} + +/** + * @brief Set Channel Output Compare Polarity + * @rmtoll CCSR POLAR FL_LPTIM32_OC_SetPolarity + * @param LPTIM32x LPTIM32 instance + * @param polarity This parameter can be one of the following values: + * @arg @ref FL_LPTIM32_OC_POLARITY_NORMAL + * @arg @ref FL_LPTIM32_OC_POLARITY_INVERT + * @param channel This parameter can be one of the following values: + * @arg @ref FL_LPTIM32_CHANNEL_1 + * @arg @ref FL_LPTIM32_CHANNEL_2 + * @arg @ref FL_LPTIM32_CHANNEL_3 + * @arg @ref FL_LPTIM32_CHANNEL_4 + * @retval None + */ +__STATIC_INLINE void FL_LPTIM32_OC_SetPolarity(LPTIM32_Type *LPTIM32x, uint32_t polarity, uint32_t channel) +{ + switch(channel) + { + case FL_LPTIM32_CHANNEL_1: + MODIFY_REG(LPTIM32x->CCSR, (0x1U << 16U), (polarity << 0U)); + break; + case FL_LPTIM32_CHANNEL_2: + MODIFY_REG(LPTIM32x->CCSR, (0x1U << 17U), (polarity << 1U)); + break; + case FL_LPTIM32_CHANNEL_3: + MODIFY_REG(LPTIM32x->CCSR, (0x1U << 18U), (polarity << 2U)); + break; + case FL_LPTIM32_CHANNEL_4: + MODIFY_REG(LPTIM32x->CCSR, (0x1U << 19U), (polarity << 3U)); + break; + } +} + +/** + * @brief Get Channel Output Compare Polarity + * @rmtoll CCSR POLAR FL_LPTIM32_OC_GetPolarity + * @param LPTIM32x LPTIM32 instance + * @param channel This parameter can be one of the following values: + * @arg @ref FL_LPTIM32_CHANNEL_1 + * @arg @ref FL_LPTIM32_CHANNEL_2 + * @arg @ref FL_LPTIM32_CHANNEL_3 + * @arg @ref FL_LPTIM32_CHANNEL_4 + * @retval Returned value can be one of the following values: + * @arg @ref FL_LPTIM32_OC_POLARITY_NORMAL + * @arg @ref FL_LPTIM32_OC_POLARITY_INVERT + */ +__STATIC_INLINE uint32_t FL_LPTIM32_OC_GetPolarity(LPTIM32_Type *LPTIM32x, uint32_t channel) +{ + switch(channel) + { + case FL_LPTIM32_CHANNEL_1: + return (uint32_t)(READ_BIT(LPTIM32x->CCSR, (0x1U << 16U)) >> 0U); + case FL_LPTIM32_CHANNEL_2: + return (uint32_t)(READ_BIT(LPTIM32x->CCSR, (0x1U << 17U)) >> 1U); + case FL_LPTIM32_CHANNEL_3: + return (uint32_t)(READ_BIT(LPTIM32x->CCSR, (0x1U << 18U)) >> 2U); + case FL_LPTIM32_CHANNEL_4: + return (uint32_t)(READ_BIT(LPTIM32x->CCSR, (0x1U << 19U)) >> 3U); + default: + return 0; + } +} + +/** + * @brief Set Sync Trigger Signal Output Source + * @rmtoll CFGR MMS FL_LPTIM32_SetTriggerOutput + * @param LPTIM32x LPTIM32 instance + * @param triggerOutput This parameter can be one of the following values: + * @arg @ref FL_LPTIM32_TRGO_ENABLE + * @arg @ref FL_LPTIM32_TRGO_UPDATE + * @arg @ref FL_LPTIM32_TRGO_OC1REF + * @arg @ref FL_LPTIM32_TRGO_IC1 + * @arg @ref FL_LPTIM32_TRGO_IC2 + * @arg @ref FL_LPTIM32_TRGO_IC3 + * @arg @ref FL_LPTIM32_TRGO_IC4 + * @retval None + */ +__STATIC_INLINE void FL_LPTIM32_SetTriggerOutput(LPTIM32_Type *LPTIM32x, uint32_t triggerOutput) +{ + MODIFY_REG(LPTIM32x->CFGR, LPTIM32_CFGR_MMS_Msk, triggerOutput); +} + +/** + * @brief Get Sync Trigger Signal Output Source Setting + * @rmtoll CFGR MMS FL_LPTIM32_GetTriggerOutput + * @param LPTIM32x LPTIM32 instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_LPTIM32_TRGO_ENABLE + * @arg @ref FL_LPTIM32_TRGO_UPDATE + * @arg @ref FL_LPTIM32_TRGO_OC1REF + * @arg @ref FL_LPTIM32_TRGO_IC1 + * @arg @ref FL_LPTIM32_TRGO_IC2 + * @arg @ref FL_LPTIM32_TRGO_IC3 + * @arg @ref FL_LPTIM32_TRGO_IC4 + */ +__STATIC_INLINE uint32_t FL_LPTIM32_GetTriggerOutput(LPTIM32_Type *LPTIM32x) +{ + return (uint32_t)(READ_BIT(LPTIM32x->CFGR, LPTIM32_CFGR_MMS_Msk)); +} + +/** + * @brief Read LPTIM32 Counter Value + * @rmtoll CNT FL_LPTIM32_ReadCounter + * @param LPTIM32x LPTIM32 instance + * @retval + */ +__STATIC_INLINE uint32_t FL_LPTIM32_ReadCounter(LPTIM32_Type *LPTIM32x) +{ + return (uint32_t)(READ_BIT(LPTIM32x->CNT, (0xffffffffU << 0U)) >> 0U); +} + +/** + * @} + */ + +/** @defgroup LPTIM32_FL_EF_Init Initialization and de-initialization functions + * @{ + */ +FL_ErrorStatus FL_LPTIM32_DeInit(LPTIM32_Type *LPTIM32x); +FL_ErrorStatus FL_LPTIM32_Init(LPTIM32_Type *LPTIM32x, FL_LPTIM32_InitTypeDef *init); +void FL_LPTIM32_StructInit(FL_LPTIM32_InitTypeDef *init); +FL_ErrorStatus FL_LPTIM32_IC_Init(LPTIM32_Type *LPTIM32x, uint32_t channel, FL_LPTIM32_IC_InitTypeDef *ic_init); +void FL_LPTIM32_IC_StructInit(FL_LPTIM32_IC_InitTypeDef *ic_init); +FL_ErrorStatus FL_LPTIM32_OC_Init(LPTIM32_Type *LPTIM32x, uint32_t channel, FL_LPTIM32_OC_InitTypeDef *oc_init); +void FL_LPTIM32_OC_StructInit(FL_LPTIM32_OC_InitTypeDef *oc_init); + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif /* __FM33LG0XX_FL_LPTIM32_H*/ + +/*************************Py_Code_Generator Version: 0.1-0.14-0.1 @ 2020-12-14*************************/ +/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/ diff --git a/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_lpuart.h b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_lpuart.h new file mode 100644 index 0000000..c901285 --- /dev/null +++ b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_lpuart.h @@ -0,0 +1,1153 @@ + /** + ******************************************************************************************************* + * @file fm33lg0xx_fl_lpuart.h + * @author FMSH Application Team + * @brief Head file of LPUART FL Module + ******************************************************************************************************* + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + + + +/* Define to prevent recursive inclusion---------------------------------------------------------------*/ +#ifndef __FM33LG0XX_FL_LPUART_H +#define __FM33LG0XX_FL_LPUART_H + +#ifdef __cplusplus +extern "C" { +#endif +/* Includes -------------------------------------------------------------------------------------------*/ +#include "fm33lg0xx_fl_def.h" +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @defgroup LPUART LPUART + * @brief LPUART FL driver + * @{ + */ + +/* Exported types -------------------------------------------------------------------------------------*/ +/** @defgroup LPUART_FL_ES_INIT LPUART Exported Init structures + * @{ + */ + +/** + * @brief FL LPUART Init Sturcture definition + */ +typedef struct +{ + /** 时钟源选择 */ + uint32_t clockSrc; + /** 通讯波特率*/ + uint32_t baudRate; + /** 数据位宽*/ + uint32_t dataWidth; + /** 停止位 */ + uint32_t stopBits; + /** 奇偶校验 */ + uint32_t parity; + /** 传输方向 */ + uint32_t transferDirection; + +} FL_LPUART_InitTypeDef; + +/** + * @} + */ +/* Exported constants ---------------------------------------------------------------------------------*/ +/** @defgroup LPUART_FL_Exported_Constants LPUART Exported Constants + * @{ + */ + +#define LPUART_CSR_BUSY_Pos (24U) +#define LPUART_CSR_BUSY_Msk (0x1UL << LPUART_CSR_BUSY_Pos) +#define LPUART_CSR_BUSY LPUART_CSR_BUSY_Msk + +#define LPUART_CSR_WKBYTE_CFG_Pos (19U) +#define LPUART_CSR_WKBYTE_CFG_Msk (0x1Ul << LPUART_CSR_WKBYTE_CFG_Pos) +#define LPUART_CSR_WKBYTE_CFG LPUART_CSR_WKBYTE_CFG_Msk + +#define LPUART_CSR_RXEV_Pos (16U) +#define LPUART_CSR_RXEV_Msk (0x3Ul << LPUART_CSR_RXEV_Pos) +#define LPUART_CSR_RXEV LPUART_CSR_RXEV_Msk + +#define LPUART_CSR_IOSWAP_Pos (11U) +#define LPUART_CSR_IOSWAP_Msk (0x1Ul << LPUART_CSR_IOSWAP_Pos) +#define LPUART_CSR_IOSWAP LPUART_CSR_IOSWAP_Msk + +#define LPUART_CSR_DMATXIFCFG_Pos (10U) +#define LPUART_CSR_DMATXIFCFG_Msk (0x1Ul << LPUART_CSR_DMATXIFCFG_Pos) +#define LPUART_CSR_DMATXIFCFG LPUART_CSR_DMATXIFCFG_Msk + +#define LPUART_CSR_BITORD_Pos (9U) +#define LPUART_CSR_BITORD_Msk (0x1UL << LPUART_CSR_BITORD_Pos) +#define LPUART_CSR_BITORD LPUART_CSR_BITORD_Msk + +#define LPUART_CSR_STOPCFG_Pos (8U) +#define LPUART_CSR_STOPCFG_Msk (0x1UL << LPUART_CSR_STOPCFG_Pos) +#define LPUART_CSR_STOPCFG LPUART_CSR_STOPCFG_Msk + +#define LPUART_CSR_PDSEL_Pos (6U) +#define LPUART_CSR_PDSEL_Msk (0x3UL << LPUART_CSR_PDSEL_Pos) +#define LPUART_CSR_PDSEL LPUART_CSR_PDSEL_Msk + +#define LPUART_CSR_PARITY_Pos (4U) +#define LPUART_CSR_PARITY_Msk (0x3UL << LPUART_CSR_PARITY_Pos) +#define LPUART_CSR_PARITY LPUART_CSR_PARITY_Msk + +#define LPUART_CSR_RXPOL_Pos (3U) +#define LPUART_CSR_RXPOL_Msk (0x1UL << LPUART_CSR_RXPOL_Pos) +#define LPUART_CSR_RXPOL LPUART_CSR_RXPOL_Msk + +#define LPUART_CSR_TXPOL_Pos (2U) +#define LPUART_CSR_TXPOL_Msk (0x1UL << LPUART_CSR_TXPOL_Pos) +#define LPUART_CSR_TXPOL LPUART_CSR_TXPOL_Msk + +#define LPUART_CSR_RXEN_Pos (1U) +#define LPUART_CSR_RXEN_Msk (0x1UL << LPUART_CSR_RXEN_Pos) +#define LPUART_CSR_RXEN LPUART_CSR_RXEN_Msk + +#define LPUART_CSR_TXEN_Pos (0U) +#define LPUART_CSR_TXEN_Msk (0x1UL << LPUART_CSR_TXEN_Pos) +#define LPUART_CSR_TXEN LPUART_CSR_TXEN_Msk + +#define LPUART_IER_RXEV_IE_Pos (12U) +#define LPUART_IER_RXEV_IE_Msk (0x1UL << LPUART_IER_RXEV_IE_Pos) +#define LPUART_IER_RXEV_IE LPUART_IER_RXEV_IE_Msk + +#define LPUART_IER_RXERR_IE_Pos (10U) +#define LPUART_IER_RXERR_IE_Msk (0x1UL << LPUART_IER_RXERR_IE_Pos) +#define LPUART_IER_RXERR_IE LPUART_IER_RXERR_IE_Msk + +#define LPUART_IER_RXBF_IE_Pos (8U) +#define LPUART_IER_RXBF_IE_Msk (0x1UL << LPUART_IER_RXBF_IE_Pos) +#define LPUART_IER_RXBF_IE LPUART_IER_RXBF_IE_Msk + +#define LPUART_IER_TXBE_IE_Pos (1U) +#define LPUART_IER_TXBE_IE_Msk (0x1UL << LPUART_IER_TXBE_IE_Pos) +#define LPUART_IER_TXBE_IE LPUART_IER_TXBE_IE_Msk + +#define LPUART_IER_TXSE_IE_Pos (0U) +#define LPUART_IER_TXSE_IE_Msk (0x1UL << LPUART_IER_TXSE_IE_Pos) +#define LPUART_IER_TXSE_IE LPUART_IER_TXSE_IE_Msk + +#define LPUART_ISR_RXEVF_Pos (24U) +#define LPUART_ISR_RXEVF_Msk (0x1UL << LPUART_ISR_RXEVF_Pos) +#define LPUART_ISR_RXEVF LPUART_ISR_RXEVF_Msk + +#define LPUART_ISR_TXOV_Pos (19U) +#define LPUART_ISR_TXOV_Msk (0x1UL << LPUART_ISR_TXOV_Pos) +#define LPUART_ISR_TXOV LPUART_ISR_TXOV_Msk + +#define LPUART_ISR_PERR_Pos (18U) +#define LPUART_ISR_PERR_Msk (0x1UL << LPUART_ISR_PERR_Pos) +#define LPUART_ISR_PERR LPUART_ISR_PERR_Msk + +#define LPUART_ISR_FERR_Pos (17U) +#define LPUART_ISR_FERR_Msk (0x1UL << LPUART_ISR_FERR_Pos) +#define LPUART_ISR_FERR LPUART_ISR_FERR_Msk + +#define LPUART_ISR_OERR_Pos (16U) +#define LPUART_ISR_OERR_Msk (0x1UL << LPUART_ISR_OERR_Pos) +#define LPUART_ISR_OERR LPUART_ISR_OERR_Msk + +#define LPUART_ISR_RXBF_Pos (8U) +#define LPUART_ISR_RXBF_Msk (0x1UL << LPUART_ISR_RXBF_Pos) +#define LPUART_ISR_RXBF LPUART_ISR_RXBF_Msk + +#define LPUART_ISR_TXBE_Pos (1U) +#define LPUART_ISR_TXBE_Msk (0x1UL << LPUART_ISR_TXBE_Pos) +#define LPUART_ISR_TXBE LPUART_ISR_TXBE_Msk + +#define LPUART_ISR_TXSE_Pos (0U) +#define LPUART_ISR_TXSE_Msk (0x1UL << LPUART_ISR_TXSE_Pos) +#define LPUART_ISR_TXSE LPUART_ISR_TXSE_Msk + +#define LPUART_BMR_MCTL_EN_Pos (31U) +#define LPUART_BMR_MCTL_EN_Msk (0x1UL << LPUART_BMR_MCTL_EN_Pos) +#define LPUART_BMR_MCTL_EN LPUART_BMR_MCTL_EN_Msk + +#define LPUART_BMR_BAUD_Pos (0U) +#define LPUART_BMR_BAUD_Msk (0x7UL << LPUART_BMR_BAUD_Pos) +#define LPUART_BMR_BAUD LPUART_BMR_BAUD_Msk + +#define LPUART_BMR_MCTL_Pos (16U) +#define LPUART_BMR_MCTL_Msk (0x1fffUL << LPUART_BMR_MCTL_Pos) +#define LPUART_BMR_MCTL LPUART_BMR_MCTL_Msk + + + + + + +#define FL_LPUART_WAKEUP_NO_CHECK (0x0UL << LPUART_CSR_WKBYTE_CFG_Pos) +#define FL_LPUART_WAKEUP_CHECK (0x1UL << LPUART_CSR_WKBYTE_CFG_Pos) + + +#define FL_LPUART_WAKEUP_EVENT_START (0x0UL << LPUART_CSR_RXEV_Pos) +#define FL_LPUART_WAKEUP_EVENT_RECV_1BYTE (0x1UL << LPUART_CSR_RXEV_Pos) +#define FL_LPUART_WAKEUP_EVENT_RECV_MATCH (0x2UL << LPUART_CSR_RXEV_Pos) +#define FL_LPUART_WAKEUP_EVENT_RX_FALLING (0x3UL << LPUART_CSR_RXEV_Pos) + + +#define FL_LPUART_TXIF_MODE_ALWAYS (0x0UL << LPUART_CSR_DMATXIFCFG_Pos) +#define FL_LPUART_TXIF_MODE_AFTER_DMA (0x1UL << LPUART_CSR_DMATXIFCFG_Pos) + + +#define FL_LPUART_BIT_ORDER_LSB_FIRST (0x0UL << LPUART_CSR_BITORD_Pos) +#define FL_LPUART_BIT_ORDER_MSB_FIRST (0x1UL << LPUART_CSR_BITORD_Pos) + + +#define FL_LPUART_STOP_BIT_WIDTH_1B (0x0UL << LPUART_CSR_STOPCFG_Pos) +#define FL_LPUART_STOP_BIT_WIDTH_2B (0x1UL << LPUART_CSR_STOPCFG_Pos) + + +#define FL_LPUART_DATA_WIDTH_7B (0x0UL << LPUART_CSR_PDSEL_Pos) +#define FL_LPUART_DATA_WIDTH_8B (0x1UL << LPUART_CSR_PDSEL_Pos) +#define FL_LPUART_DATA_WIDTH_9B (0x2UL << LPUART_CSR_PDSEL_Pos) +#define FL_LPUART_DATA_WIDTH_6B (0x3UL << LPUART_CSR_PDSEL_Pos) + + +#define FL_LPUART_PARITY_NONE (0x0UL << LPUART_CSR_PARITY_Pos) +#define FL_LPUART_PARITY_EVEN (0x1UL << LPUART_CSR_PARITY_Pos) +#define FL_LPUART_PARITY_ODD (0x2UL << LPUART_CSR_PARITY_Pos) + + +#define FL_LPUART_RX_POLARITY_NORMAL (0x0UL << LPUART_CSR_RXPOL_Pos) +#define FL_LPUART_RX_POLARITY_INVERT (0x1UL << LPUART_CSR_RXPOL_Pos) + + +#define FL_LPUART_TX_POLARITY_NORMAL (0x0UL << LPUART_CSR_TXPOL_Pos) +#define FL_LPUART_TX_POLARITY_INVERT (0x1UL << LPUART_CSR_TXPOL_Pos) + + +#define FL_LPUART_BAUDRATE_9600 (0x0UL << LPUART_BMR_BAUD_Pos) +#define FL_LPUART_BAUDRATE_4800 (0x1UL << LPUART_BMR_BAUD_Pos) +#define FL_LPUART_BAUDRATE_2400 (0x2UL << LPUART_BMR_BAUD_Pos) +#define FL_LPUART_BAUDRATE_1200 (0x3UL << LPUART_BMR_BAUD_Pos) +#define FL_LPUART_BAUDRATE_600 (0x4UL << LPUART_BMR_BAUD_Pos) +#define FL_LPUART_BAUDRATE_300 (0x5UL << LPUART_BMR_BAUD_Pos) + + +#define FL_LPUART_DIRECTION_NONE 0x00000000U +#define FL_LPUART_DIRECTION_RX LPUART_CSR_RXEN +#define FL_LPUART_DIRECTION_TX LPUART_CSR_TXEN +#define FL_LPUART_DIRECTION_TX_RX (LPUART_CSR_RXEN|LPUART_CSR_TXEN) +/** + * @} + */ +/* Exported functions ---------------------------------------------------------------------------------*/ +/** @defgroup LPUART_FL_Exported_Functions LPUART Exported Functions + * @{ + */ + +/** + * @brief Get LPUART Busy Flag + * @rmtoll CSR BUSY FL_LPUART_IsActiveFlag_Busy + * @param LPUARTx LPUART instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_LPUART_IsActiveFlag_Busy(LPUART_Type *LPUARTx) +{ + return (uint32_t)(READ_BIT(LPUARTx->CSR, LPUART_CSR_BUSY_Msk) == (LPUART_CSR_BUSY_Msk)); +} + +/** + * @brief Set Data Receive Wakeup Mode + * @rmtoll CSR WKBYTE_CFG FL_LPUART_SetRXWakeupMode + * @param LPUARTx LPUART instance + * @param mode This parameter can be one of the following values: + * @arg @ref FL_LPUART_WAKEUP_NO_CHECK + * @arg @ref FL_LPUART_WAKEUP_CHECK + * @retval None + */ +__STATIC_INLINE void FL_LPUART_SetRXWakeupMode(LPUART_Type *LPUARTx, uint32_t mode) +{ + MODIFY_REG(LPUARTx->CSR, LPUART_CSR_WKBYTE_CFG_Msk, mode); +} + +/** + * @brief Get Data Receive Wakeup Mode Setting + * @rmtoll CSR WKBYTE_CFG FL_LPUART_GetRXWakeupMode + * @param LPUARTx LPUART instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_LPUART_WAKEUP_NO_CHECK + * @arg @ref FL_LPUART_WAKEUP_CHECK + */ +__STATIC_INLINE uint32_t FL_LPUART_GetRXWakeupMode(LPUART_Type *LPUARTx) +{ + return (uint32_t)(READ_BIT(LPUARTx->CSR, LPUART_CSR_WKBYTE_CFG_Msk)); +} + +/** + * @brief Set Receive Wakeup Event + * @rmtoll CSR RXEV FL_LPUART_SetWakeup + * @param LPUARTx LPUART instance + * @param event This parameter can be one of the following values: + * @arg @ref FL_LPUART_WAKEUP_EVENT_START + * @arg @ref FL_LPUART_WAKEUP_EVENT_RECV_1BYTE + * @arg @ref FL_LPUART_WAKEUP_EVENT_RECV_MATCH + * @arg @ref FL_LPUART_WAKEUP_EVENT_RX_FALLING + * @retval None + */ +__STATIC_INLINE void FL_LPUART_SetWakeup(LPUART_Type *LPUARTx, uint32_t event) +{ + MODIFY_REG(LPUARTx->CSR, LPUART_CSR_RXEV_Msk, event); +} + +/** + * @brief Get Receive Wakeup Event Setting + * @rmtoll CSR RXEV FL_LPUART_GetWakeup + * @param LPUARTx LPUART instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_LPUART_WAKEUP_EVENT_START + * @arg @ref FL_LPUART_WAKEUP_EVENT_RECV_1BYTE + * @arg @ref FL_LPUART_WAKEUP_EVENT_RECV_MATCH + * @arg @ref FL_LPUART_WAKEUP_EVENT_RX_FALLING + */ +__STATIC_INLINE uint32_t FL_LPUART_GetWakeup(LPUART_Type *LPUARTx) +{ + return (uint32_t)(READ_BIT(LPUARTx->CSR, LPUART_CSR_RXEV_Msk)); +} + +/** + * @brief Enable LPUART Pin Swap Between TX Pin and RX Pin + * @rmtoll CSR IOSWAP FL_LPUART_EnablePinSwap + * @param LPUARTx LPUART instance + * @retval None + */ +__STATIC_INLINE void FL_LPUART_EnablePinSwap(LPUART_Type *LPUARTx) +{ + SET_BIT(LPUARTx->CSR, LPUART_CSR_IOSWAP_Msk); +} + +/** + * @brief Disable LPUART Pin Swap Between TX Pin and RX Pin + * @rmtoll CSR IOSWAP FL_LPUART_DisablePinSwap + * @param LPUARTx LPUART instance + * @retval None + */ +__STATIC_INLINE void FL_LPUART_DisablePinSwap(LPUART_Type *LPUARTx) +{ + CLEAR_BIT(LPUARTx->CSR, LPUART_CSR_IOSWAP_Msk); +} + +/** + * @brief Get UART Pin Swap Enable Status Between UART TX Pin and RX Pin + + * @rmtoll CSR IOSWAP FL_LPUART_IsEnabledPinSwap + * @param LPUARTx LPUART instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_LPUART_IsEnabledPinSwap(LPUART_Type *LPUARTx) +{ + return (uint32_t)(READ_BIT(LPUARTx->CSR, LPUART_CSR_IOSWAP_Msk) == LPUART_CSR_IOSWAP_Msk); +} + +/** + * @brief Enable DMA TX Complete Interrupt + * @rmtoll CSR DMATXIFCFG FL_LPUART_SetTXIFMode + * @param LPUARTx LPUART instance + * @param txifMode This parameter can be one of the following values: + * @arg @ref FL_LPUART_TXIF_MODE_ALWAYS + * @arg @ref FL_LPUART_TXIF_MODE_AFTER_DMA + * @retval None + */ +__STATIC_INLINE void FL_LPUART_SetTXIFMode(LPUART_Type *LPUARTx, uint32_t txifMode) +{ + MODIFY_REG(LPUARTx->CSR, LPUART_CSR_DMATXIFCFG_Msk, txifMode); +} + +/** + * @brief Disable DMA TX Complete Interrupt + * @rmtoll CSR DMATXIFCFG FL_LPUART_GetTXIFMode + * @param LPUARTx LPUART instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_LPUART_TXIF_MODE_ALWAYS + * @arg @ref FL_LPUART_TXIF_MODE_AFTER_DMA + */ +__STATIC_INLINE uint32_t FL_LPUART_GetTXIFMode(LPUART_Type *LPUARTx) +{ + return (uint32_t)(READ_BIT(LPUARTx->CSR, LPUART_CSR_DMATXIFCFG_Msk)); +} + +/** + * @brief Set LPUART Transfer Bit Order + * @rmtoll CSR BITORD FL_LPUART_SetBitOrder + * @param LPUARTx LPUART instance + * @param bitOrder This parameter can be one of the following values: + * @arg @ref FL_LPUART_BIT_ORDER_LSB_FIRST + * @arg @ref FL_LPUART_BIT_ORDER_MSB_FIRST + * @retval None + */ +__STATIC_INLINE void FL_LPUART_SetBitOrder(LPUART_Type *LPUARTx, uint32_t bitOrder) +{ + MODIFY_REG(LPUARTx->CSR, LPUART_CSR_BITORD_Msk, bitOrder); +} + +/** + * @brief Get LPUART Transfer Bit Order Setting + * @rmtoll CSR BITORD FL_LPUART_GetBitOrder + * @param LPUARTx LPUART instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_LPUART_BIT_ORDER_LSB_FIRST + * @arg @ref FL_LPUART_BIT_ORDER_MSB_FIRST + */ +__STATIC_INLINE uint32_t FL_LPUART_GetBitOrder(LPUART_Type *LPUARTx) +{ + return (uint32_t)(READ_BIT(LPUARTx->CSR, LPUART_CSR_BITORD_Msk)); +} + +/** + * @brief Set LPUART Stop Bits Length + * @rmtoll CSR STOPCFG FL_LPUART_SetStopBitsWidth + * @param LPUARTx LPUART instance + * @param stopBits This parameter can be one of the following values: + * @arg @ref FL_LPUART_STOP_BIT_WIDTH_1B + * @arg @ref FL_LPUART_STOP_BIT_WIDTH_2B + * @retval None + */ +__STATIC_INLINE void FL_LPUART_SetStopBitsWidth(LPUART_Type *LPUARTx, uint32_t stopBits) +{ + MODIFY_REG(LPUARTx->CSR, LPUART_CSR_STOPCFG_Msk, stopBits); +} + +/** + * @brief Get LPUART Stop Bits Length Setting + * @rmtoll CSR STOPCFG FL_LPUART_GetStopBitsWidth + * @param LPUARTx LPUART instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_LPUART_STOP_BIT_WIDTH_1B + * @arg @ref FL_LPUART_STOP_BIT_WIDTH_2B + */ +__STATIC_INLINE uint32_t FL_LPUART_GetStopBitsWidth(LPUART_Type *LPUARTx) +{ + return (uint32_t)(READ_BIT(LPUARTx->CSR, LPUART_CSR_STOPCFG_Msk)); +} + +/** + * @brief Set LPUART Data Width + * @rmtoll CSR PDSEL FL_LPUART_SetDataWidth + * @param LPUARTx LPUART instance + * @param dataWidth This parameter can be one of the following values: + * @arg @ref FL_LPUART_DATA_WIDTH_7B + * @arg @ref FL_LPUART_DATA_WIDTH_8B + * @arg @ref FL_LPUART_DATA_WIDTH_9B + * @arg @ref FL_LPUART_DATA_WIDTH_6B + * @retval None + */ +__STATIC_INLINE void FL_LPUART_SetDataWidth(LPUART_Type *LPUARTx, uint32_t dataWidth) +{ + MODIFY_REG(LPUARTx->CSR, LPUART_CSR_PDSEL_Msk, dataWidth); +} + +/** + * @brief Get LPUART Stop Bits Length Setting + * @rmtoll CSR PDSEL FL_LPUART_GetDataWidth + * @param LPUARTx LPUART instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_LPUART_DATA_WIDTH_7B + * @arg @ref FL_LPUART_DATA_WIDTH_8B + * @arg @ref FL_LPUART_DATA_WIDTH_9B + * @arg @ref FL_LPUART_DATA_WIDTH_6B + */ +__STATIC_INLINE uint32_t FL_LPUART_GetDataWidth(LPUART_Type *LPUARTx) +{ + return (uint32_t)(READ_BIT(LPUARTx->CSR, LPUART_CSR_PDSEL_Msk)); +} + +/** + * @brief Set LPUART Parity + * @rmtoll CSR PARITY FL_LPUART_SetParity + * @param LPUARTx LPUART instance + * @param parity This parameter can be one of the following values: + * @arg @ref FL_LPUART_PARITY_NONE + * @arg @ref FL_LPUART_PARITY_EVEN + * @arg @ref FL_LPUART_PARITY_ODD + * @retval None + */ +__STATIC_INLINE void FL_LPUART_SetParity(LPUART_Type *LPUARTx, uint32_t parity) +{ + MODIFY_REG(LPUARTx->CSR, LPUART_CSR_PARITY_Msk, parity); +} + +/** + * @brief Get LPUART Parity Setting + * @rmtoll CSR PARITY FL_LPUART_GetParity + * @param LPUARTx LPUART instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_LPUART_PARITY_NONE + * @arg @ref FL_LPUART_PARITY_EVEN + * @arg @ref FL_LPUART_PARITY_ODD + */ +__STATIC_INLINE uint32_t FL_LPUART_GetParity(LPUART_Type *LPUARTx) +{ + return (uint32_t)(READ_BIT(LPUARTx->CSR, LPUART_CSR_PARITY_Msk)); +} + +/** + * @brief Set LPUART Receive Polarity + * @rmtoll CSR RXPOL FL_LPUART_SetRXPolarity + * @param LPUARTx LPUART instance + * @param polarity This parameter can be one of the following values: + * @arg @ref FL_LPUART_RX_POLARITY_NORMAL + * @arg @ref FL_LPUART_RX_POLARITY_INVERT + * @retval None + */ +__STATIC_INLINE void FL_LPUART_SetRXPolarity(LPUART_Type *LPUARTx, uint32_t polarity) +{ + MODIFY_REG(LPUARTx->CSR, LPUART_CSR_RXPOL_Msk, polarity); +} + +/** + * @brief Get LPUART Receive Polarity Setting + * @rmtoll CSR RXPOL FL_LPUART_GetRXPolarity + * @param LPUARTx LPUART instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_LPUART_RX_POLARITY_NORMAL + * @arg @ref FL_LPUART_RX_POLARITY_INVERT + */ +__STATIC_INLINE uint32_t FL_LPUART_GetRXPolarity(LPUART_Type *LPUARTx) +{ + return (uint32_t)(READ_BIT(LPUARTx->CSR, LPUART_CSR_RXPOL_Msk)); +} + +/** + * @brief Set LPUART Transmit Polarity + * @rmtoll CSR TXPOL FL_LPUART_SetTXPolarity + * @param LPUARTx LPUART instance + * @param polarity This parameter can be one of the following values: + * @arg @ref FL_LPUART_TX_POLARITY_NORMAL + * @arg @ref FL_LPUART_TX_POLARITY_INVERT + * @retval None + */ +__STATIC_INLINE void FL_LPUART_SetTXPolarity(LPUART_Type *LPUARTx, uint32_t polarity) +{ + MODIFY_REG(LPUARTx->CSR, LPUART_CSR_TXPOL_Msk, polarity); +} + +/** + * @brief Get LPUART Transmit Polarity Setting + * @rmtoll CSR TXPOL FL_LPUART_GetTXPolarity + * @param LPUARTx LPUART instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_LPUART_TX_POLARITY_NORMAL + * @arg @ref FL_LPUART_TX_POLARITY_INVERT + */ +__STATIC_INLINE uint32_t FL_LPUART_GetTXPolarity(LPUART_Type *LPUARTx) +{ + return (uint32_t)(READ_BIT(LPUARTx->CSR, LPUART_CSR_TXPOL_Msk)); +} + +/** + * @brief Enable LPUART Receive + * @rmtoll CSR RXEN FL_LPUART_EnableRX + * @param LPUARTx LPUART instance + * @retval None + */ +__STATIC_INLINE void FL_LPUART_EnableRX(LPUART_Type *LPUARTx) +{ + SET_BIT(LPUARTx->CSR, LPUART_CSR_RXEN_Msk); +} + +/** + * @brief Get LPUART Receive Enable Status + * @rmtoll CSR RXEN FL_LPUART_IsEnabledRX + * @param LPUARTx LPUART instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_LPUART_IsEnabledRX(LPUART_Type *LPUARTx) +{ + return (uint32_t)(READ_BIT(LPUARTx->CSR, LPUART_CSR_RXEN_Msk) == LPUART_CSR_RXEN_Msk); +} + +/** + * @brief Disable LPUART Receive + * @rmtoll CSR RXEN FL_LPUART_DisableRX + * @param LPUARTx LPUART instance + * @retval None + */ +__STATIC_INLINE void FL_LPUART_DisableRX(LPUART_Type *LPUARTx) +{ + CLEAR_BIT(LPUARTx->CSR, LPUART_CSR_RXEN_Msk); +} + +/** + * @brief Enable LPUART Receive + * @rmtoll CSR TXEN FL_LPUART_EnableTX + * @param LPUARTx LPUART instance + * @retval None + */ +__STATIC_INLINE void FL_LPUART_EnableTX(LPUART_Type *LPUARTx) +{ + SET_BIT(LPUARTx->CSR, LPUART_CSR_TXEN_Msk); +} + +/** + * @brief Get LPUART Receive Enable Status + * @rmtoll CSR TXEN FL_LPUART_IsEnabledTX + * @param LPUARTx LPUART instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_LPUART_IsEnabledTX(LPUART_Type *LPUARTx) +{ + return (uint32_t)(READ_BIT(LPUARTx->CSR, LPUART_CSR_TXEN_Msk) == LPUART_CSR_TXEN_Msk); +} + +/** + * @brief Disable LPUART Receive + * @rmtoll CSR TXEN FL_LPUART_DisableTX + * @param LPUARTx LPUART instance + * @retval None + */ +__STATIC_INLINE void FL_LPUART_DisableTX(LPUART_Type *LPUARTx) +{ + CLEAR_BIT(LPUARTx->CSR, LPUART_CSR_TXEN_Msk); +} + +/** + * @brief Enable LPUART Receive Event Interrupt + * @rmtoll IER RXEV_IE FL_LPUART_EnableIT_RXWakeup + * @param LPUARTx LPUART instance + * @retval None + */ +__STATIC_INLINE void FL_LPUART_EnableIT_RXWakeup(LPUART_Type *LPUARTx) +{ + SET_BIT(LPUARTx->IER, LPUART_IER_RXEV_IE_Msk); +} + +/** + * @brief Get LPUART Receive Event Interrupt Enable Status + * @rmtoll IER RXEV_IE FL_LPUART_IsEnabledIT_RXWakeup + * @param LPUARTx LPUART instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_LPUART_IsEnabledIT_RXWakeup(LPUART_Type *LPUARTx) +{ + return (uint32_t)(READ_BIT(LPUARTx->IER, LPUART_IER_RXEV_IE_Msk) == LPUART_IER_RXEV_IE_Msk); +} + +/** + * @brief Disable LPUART Receive Event Interrupt + * @rmtoll IER RXEV_IE FL_LPUART_DisableIT_RXWakeup + * @param LPUARTx LPUART instance + * @retval None + */ +__STATIC_INLINE void FL_LPUART_DisableIT_RXWakeup(LPUART_Type *LPUARTx) +{ + CLEAR_BIT(LPUARTx->IER, LPUART_IER_RXEV_IE_Msk); +} + +/** + * @brief Enable LPUART Receive Error Interrupt + * @rmtoll IER RXERR_IE FL_LPUART_EnableIT_RXError + * @param LPUARTx LPUART instance + * @retval None + */ +__STATIC_INLINE void FL_LPUART_EnableIT_RXError(LPUART_Type *LPUARTx) +{ + SET_BIT(LPUARTx->IER, LPUART_IER_RXERR_IE_Msk); +} + +/** + * @brief Get LPUART Receive Error Interrupt Enable Status + * @rmtoll IER RXERR_IE FL_LPUART_IsEnabledIT_RXError + * @param LPUARTx LPUART instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_LPUART_IsEnabledIT_RXError(LPUART_Type *LPUARTx) +{ + return (uint32_t)(READ_BIT(LPUARTx->IER, LPUART_IER_RXERR_IE_Msk) == LPUART_IER_RXERR_IE_Msk); +} + +/** + * @brief Disable LPUART Receive Error Interrupt + * @rmtoll IER RXERR_IE FL_LPUART_DisableIT_RXError + * @param LPUARTx LPUART instance + * @retval None + */ +__STATIC_INLINE void FL_LPUART_DisableIT_RXError(LPUART_Type *LPUARTx) +{ + CLEAR_BIT(LPUARTx->IER, LPUART_IER_RXERR_IE_Msk); +} + +/** + * @brief Enable LPUART Receive Buffer Full Interrupt + * @rmtoll IER RXBF_IE FL_LPUART_EnableIT_RXBuffFull + * @param LPUARTx LPUART instance + * @retval None + */ +__STATIC_INLINE void FL_LPUART_EnableIT_RXBuffFull(LPUART_Type *LPUARTx) +{ + SET_BIT(LPUARTx->IER, LPUART_IER_RXBF_IE_Msk); +} + +/** + * @brief Get LPUART Receive Buffer Full Interrupt Enable Status + * @rmtoll IER RXBF_IE FL_LPUART_IsEnabledIT_RXBuffFull + * @param LPUARTx LPUART instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_LPUART_IsEnabledIT_RXBuffFull(LPUART_Type *LPUARTx) +{ + return (uint32_t)(READ_BIT(LPUARTx->IER, LPUART_IER_RXBF_IE_Msk) == LPUART_IER_RXBF_IE_Msk); +} + +/** + * @brief Disable LPUART Receive Buffer Full Interrupt + * @rmtoll IER RXBF_IE FL_LPUART_DisableIT_RXBufFull + * @param LPUARTx LPUART instance + * @retval None + */ +__STATIC_INLINE void FL_LPUART_DisableIT_RXBufFull(LPUART_Type *LPUARTx) +{ + CLEAR_BIT(LPUARTx->IER, LPUART_IER_RXBF_IE_Msk); +} + +/** + * @brief Enable LPUART Transmit Buffer Empty Interrupt + * @rmtoll IER TXBE_IE FL_LPUART_EnableIT_TXBuffEmpty + * @param LPUARTx LPUART instance + * @retval None + */ +__STATIC_INLINE void FL_LPUART_EnableIT_TXBuffEmpty(LPUART_Type *LPUARTx) +{ + SET_BIT(LPUARTx->IER, LPUART_IER_TXBE_IE_Msk); +} + +/** + * @brief Get LPUART Transmit Buffer Empty Interrupt Enable Status + * @rmtoll IER TXBE_IE FL_LPUART_IsEnabledIT_TXBuffEmpty + * @param LPUARTx LPUART instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_LPUART_IsEnabledIT_TXBuffEmpty(LPUART_Type *LPUARTx) +{ + return (uint32_t)(READ_BIT(LPUARTx->IER, LPUART_IER_TXBE_IE_Msk) == LPUART_IER_TXBE_IE_Msk); +} + +/** + * @brief Disable LPUART Transmit Buffer Empty Interrupt + * @rmtoll IER TXBE_IE FL_LPUART_DisableIT_TXBuffEmpty + * @param LPUARTx LPUART instance + * @retval None + */ +__STATIC_INLINE void FL_LPUART_DisableIT_TXBuffEmpty(LPUART_Type *LPUARTx) +{ + CLEAR_BIT(LPUARTx->IER, LPUART_IER_TXBE_IE_Msk); +} + +/** + * @brief Enable LPUART Transmit Shift Register Interrupt + * @rmtoll IER TXSE_IE FL_LPUART_EnableIT_TXShiftBuffEmpty + * @param LPUARTx LPUART instance + * @retval None + */ +__STATIC_INLINE void FL_LPUART_EnableIT_TXShiftBuffEmpty(LPUART_Type *LPUARTx) +{ + SET_BIT(LPUARTx->IER, LPUART_IER_TXSE_IE_Msk); +} + +/** + * @brief Get LPUART Transmit Shift Register Interrupt Enable Status + * @rmtoll IER TXSE_IE FL_LPUART_IsEnabledIT_TXShiftBuffEmpty + * @param LPUARTx LPUART instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_LPUART_IsEnabledIT_TXShiftBuffEmpty(LPUART_Type *LPUARTx) +{ + return (uint32_t)(READ_BIT(LPUARTx->IER, LPUART_IER_TXSE_IE_Msk) == LPUART_IER_TXSE_IE_Msk); +} + +/** + * @brief Disable LPUART Transmit Shift Register Interrupt + * @rmtoll IER TXSE_IE FL_LPUART_DisableIT_TXShiftBuffEmpty + * @param LPUARTx LPUART instance + * @retval None + */ +__STATIC_INLINE void FL_LPUART_DisableIT_TXShiftBuffEmpty(LPUART_Type *LPUARTx) +{ + CLEAR_BIT(LPUARTx->IER, LPUART_IER_TXSE_IE_Msk); +} + +/** + * @brief Get LPUART Receive Event Interrupt Flag + * @rmtoll ISR RXEVF FL_LPUART_IsActiveFlag_RXWakeup + * @param LPUARTx LPUART instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_LPUART_IsActiveFlag_RXWakeup(LPUART_Type *LPUARTx) +{ + return (uint32_t)(READ_BIT(LPUARTx->ISR, LPUART_ISR_RXEVF_Msk) == (LPUART_ISR_RXEVF_Msk)); +} + +/** + * @brief Clear LPUART Receive Event Interrupt Flag + * @rmtoll ISR RXEVF FL_LPUART_ClearFlag_RXWakeup + * @param LPUARTx LPUART instance + * @retval None + */ +__STATIC_INLINE void FL_LPUART_ClearFlag_RXWakeup(LPUART_Type *LPUARTx) +{ + WRITE_REG(LPUARTx->ISR, LPUART_ISR_RXEVF_Msk); +} + +/** + * @brief Get LPUART Transmit Overflow Error Flag + * @rmtoll ISR TXOV FL_LPUART_IsActiveFlag_TXBuffOverflow + * @param LPUARTx LPUART instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_LPUART_IsActiveFlag_TXBuffOverflow(LPUART_Type *LPUARTx) +{ + return (uint32_t)(READ_BIT(LPUARTx->ISR, LPUART_ISR_TXOV_Msk) == (LPUART_ISR_TXOV_Msk)); +} + +/** + * @brief Clear LPUART Transmit Overflow Error Flag + * @rmtoll ISR TXOV FL_LPUART_ClearFlag_TXBuffOverflow + * @param LPUARTx LPUART instance + * @retval None + */ +__STATIC_INLINE void FL_LPUART_ClearFlag_TXBuffOverflow(LPUART_Type *LPUARTx) +{ + WRITE_REG(LPUARTx->ISR, LPUART_ISR_TXOV_Msk); +} + +/** + * @brief Get LPUART Parity Error Flag + * @rmtoll ISR PERR FL_LPUART_IsActiveFlag_ParityError + * @param LPUARTx LPUART instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_LPUART_IsActiveFlag_ParityError(LPUART_Type *LPUARTx) +{ + return (uint32_t)(READ_BIT(LPUARTx->ISR, LPUART_ISR_PERR_Msk) == (LPUART_ISR_PERR_Msk)); +} + +/** + * @brief Clear LPUART Parity Error Flag + * @rmtoll ISR PERR FL_LPUART_ClearFlag_ParityError + * @param LPUARTx LPUART instance + * @retval None + */ +__STATIC_INLINE void FL_LPUART_ClearFlag_ParityError(LPUART_Type *LPUARTx) +{ + WRITE_REG(LPUARTx->ISR, LPUART_ISR_PERR_Msk); +} + +/** + * @brief Get LPUART Frame Error Flag + * @rmtoll ISR FERR FL_LPUART_IsActiveFlag_FrameError + * @param LPUARTx LPUART instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_LPUART_IsActiveFlag_FrameError(LPUART_Type *LPUARTx) +{ + return (uint32_t)(READ_BIT(LPUARTx->ISR, LPUART_ISR_FERR_Msk) == (LPUART_ISR_FERR_Msk)); +} + +/** + * @brief Clear LPUART Frame Error Flag + * @rmtoll ISR FERR FL_LPUART_ClearFlag_FrameError + * @param LPUARTx LPUART instance + * @retval None + */ +__STATIC_INLINE void FL_LPUART_ClearFlag_FrameError(LPUART_Type *LPUARTx) +{ + WRITE_REG(LPUARTx->ISR, LPUART_ISR_FERR_Msk); +} + +/** + * @brief Get LPUART Receive Buffer Overflow Error Flag + * @rmtoll ISR OERR FL_LPUART_IsActiveFlag_RXBuffOverflow + * @param LPUARTx LPUART instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_LPUART_IsActiveFlag_RXBuffOverflow(LPUART_Type *LPUARTx) +{ + return (uint32_t)(READ_BIT(LPUARTx->ISR, LPUART_ISR_OERR_Msk) == (LPUART_ISR_OERR_Msk)); +} + +/** + * @brief Clear LPUART Receive Buffer Overflow Error Flag + * @rmtoll ISR OERR FL_LPUART_ClearFlag_RXBuffOverflow + * @param LPUARTx LPUART instance + * @retval None + */ +__STATIC_INLINE void FL_LPUART_ClearFlag_RXBuffOverflow(LPUART_Type *LPUARTx) +{ + WRITE_REG(LPUARTx->ISR, LPUART_ISR_OERR_Msk); +} + +/** + * @brief Get LPUART Receive Buffer Full Flag + * @rmtoll ISR RXBF FL_LPUART_IsActiveFlag_RXBuffFull + * @param LPUARTx LPUART instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_LPUART_IsActiveFlag_RXBuffFull(LPUART_Type *LPUARTx) +{ + return (uint32_t)(READ_BIT(LPUARTx->ISR, LPUART_ISR_RXBF_Msk) == (LPUART_ISR_RXBF_Msk)); +} + +/** + * @brief Clear LPUART Receive Buffer Full Flag + * @rmtoll ISR RXBF FL_LPUART_ClearFlag_RXBuffFull + * @param LPUARTx LPUART instance + * @retval None + */ +__STATIC_INLINE void FL_LPUART_ClearFlag_RXBuffFull(LPUART_Type *LPUARTx) +{ + WRITE_REG(LPUARTx->ISR, LPUART_ISR_RXBF_Msk); +} + +/** + * @brief Get LPUART Transmit Buffer Empty Flag + * @rmtoll ISR TXBE FL_LPUART_IsActiveFlag_TXBuffEmpty + * @param LPUARTx LPUART instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_LPUART_IsActiveFlag_TXBuffEmpty(LPUART_Type *LPUARTx) +{ + return (uint32_t)(READ_BIT(LPUARTx->ISR, LPUART_ISR_TXBE_Msk) == (LPUART_ISR_TXBE_Msk)); +} + +/** + * @brief Clear LPUART Transmit Buffer Empty Flag + * @rmtoll ISR TXBE FL_LPUART_ClearFlag_TXBuffEmpty + * @param LPUARTx LPUART instance + * @retval None + */ +__STATIC_INLINE void FL_LPUART_ClearFlag_TXBuffEmpty(LPUART_Type *LPUARTx) +{ + WRITE_REG(LPUARTx->ISR, LPUART_ISR_TXBE_Msk); +} + +/** + * @brief Get LPUART Transmit Shift register Empty Flag + * @rmtoll ISR TXSE FL_LPUART_IsActiveFlag_TXShiftBuffEmpty + * @param LPUARTx LPUART instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_LPUART_IsActiveFlag_TXShiftBuffEmpty(LPUART_Type *LPUARTx) +{ + return (uint32_t)(READ_BIT(LPUARTx->ISR, LPUART_ISR_TXSE_Msk) == (LPUART_ISR_TXSE_Msk)); +} + +/** + * @brief Clear LPUART Transmit Shift register Empty Flag + * @rmtoll ISR TXSE FL_LPUART_ClearFlag_TXShiftBuffEmpty + * @param LPUARTx LPUART instance + * @retval None + */ +__STATIC_INLINE void FL_LPUART_ClearFlag_TXShiftBuffEmpty(LPUART_Type *LPUARTx) +{ + WRITE_REG(LPUARTx->ISR, LPUART_ISR_TXSE_Msk); +} + +/** + * @brief Enable LPUART BaudRate Modulation + * @rmtoll BMR MCTL_EN FL_LPUART_EnableBaudRateModulation + * @param LPUARTx LPUART instance + * @retval None + */ +__STATIC_INLINE void FL_LPUART_EnableBaudRateModulation(LPUART_Type *LPUARTx) +{ + SET_BIT(LPUARTx->BMR, LPUART_BMR_MCTL_EN_Msk); +} + +/** + * @brief Get LPUART BaudRate Modulation Enable Status + * @rmtoll BMR MCTL_EN FL_LPUART_IsEnabledBaudRateModulation + * @param LPUARTx LPUART instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_LPUART_IsEnabledBaudRateModulation(LPUART_Type *LPUARTx) +{ + return (uint32_t)(READ_BIT(LPUARTx->BMR, LPUART_BMR_MCTL_EN_Msk) == LPUART_BMR_MCTL_EN_Msk); +} + +/** + * @brief Disable LPUART BaudRate Modulation + * @rmtoll BMR MCTL_EN FL_LPUART_DisableBaudRateModulation + * @param LPUARTx LPUART instance + * @retval None + */ +__STATIC_INLINE void FL_LPUART_DisableBaudRateModulation(LPUART_Type *LPUARTx) +{ + CLEAR_BIT(LPUARTx->BMR, LPUART_BMR_MCTL_EN_Msk); +} + +/** + * @brief Set LPUART BaudRate + * @rmtoll BMR BAUD FL_LPUART_SetBaudRate + * @param LPUARTx LPUART instance + * @param baudRate This parameter can be one of the following values: + * @arg @ref FL_LPUART_BAUDRATE_9600 + * @arg @ref FL_LPUART_BAUDRATE_4800 + * @arg @ref FL_LPUART_BAUDRATE_2400 + * @arg @ref FL_LPUART_BAUDRATE_1200 + * @arg @ref FL_LPUART_BAUDRATE_600 + * @arg @ref FL_LPUART_BAUDRATE_300 + * @retval None + */ +__STATIC_INLINE void FL_LPUART_SetBaudRate(LPUART_Type *LPUARTx, uint32_t baudRate) +{ + MODIFY_REG(LPUARTx->BMR, LPUART_BMR_BAUD_Msk, baudRate); +} + +/** + * @brief Get LPUART BaudRate + * @rmtoll BMR BAUD FL_LPUART_GetBaudRate + * @param LPUARTx LPUART instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_LPUART_BAUDRATE_9600 + * @arg @ref FL_LPUART_BAUDRATE_4800 + * @arg @ref FL_LPUART_BAUDRATE_2400 + * @arg @ref FL_LPUART_BAUDRATE_1200 + * @arg @ref FL_LPUART_BAUDRATE_600 + * @arg @ref FL_LPUART_BAUDRATE_300 + */ +__STATIC_INLINE uint32_t FL_LPUART_GetBaudRate(LPUART_Type *LPUARTx) +{ + return (uint32_t)(READ_BIT(LPUARTx->BMR, LPUART_BMR_BAUD_Msk)); +} + +/** + * @brief LPUART Receive 1 byte of data + * @rmtoll RXBUF FL_LPUART_ReadRXBuff + * @param LPUARTx LPUART instance + * @retval The LPUart received data + */ +__STATIC_INLINE uint32_t FL_LPUART_ReadRXBuff(LPUART_Type *LPUARTx) +{ + return (uint32_t)(READ_BIT(LPUARTx->RXBUF, 0x1ffU)); +} + +/** + * @brief LPUART Transmit 1 byte of data + * @rmtoll TXBUF FL_LPUART_WriteTXBuff + * @param LPUARTx LPUART instance + * @param data The data need to transmit through the LPUart + * @retval None + */ +__STATIC_INLINE void FL_LPUART_WriteTXBuff(LPUART_Type *LPUARTx, uint8_t data) +{ + MODIFY_REG(LPUARTx->TXBUF, 0x1ffU, data); +} + +/** + * @brief Set LPUART Matched Data + * @rmtoll DMR FL_LPUART_WriteMatchData + * @param LPUARTx LPUART instance + * @param data The value of match under SLEEP MODE + * @retval None + */ +__STATIC_INLINE void FL_LPUART_WriteMatchData(LPUART_Type *LPUARTx, uint8_t data) +{ + MODIFY_REG(LPUARTx->DMR, 0x1ffU, data); +} + +/** + * @brief Get LPUART Matched Data + * @rmtoll DMR FL_LPUART_ReadMatchData + * @param LPUARTx LPUART instance + * @retval The value of match data under SLEEP MODE + */ +__STATIC_INLINE uint32_t FL_LPUART_ReadMatchData(LPUART_Type *LPUARTx) +{ + return (uint32_t)(READ_BIT(LPUARTx->DMR, 0x1ffU)); +} + +/** + * @brief Set LPUART Bit Modulation + * @rmtoll BMR MCTL FL_LPUART_WriteBitModulation + * @param LPUARTx LPUART instance + * @param bitModulation The value of Bit Modulation Control + * @retval None + */ +__STATIC_INLINE void FL_LPUART_WriteBitModulation(LPUART_Type *LPUARTx, uint32_t bitModulation) +{ + MODIFY_REG(LPUARTx->BMR, (0xfffU << 16U), (bitModulation << 16U)); +} + +/** + * @brief Get LPUART Bit Modulation + * @rmtoll BMR MCTL FL_LPUART_ReadBitModulation + * @param LPUARTx LPUART instance + * @retval The value of Bit Modulation Control + */ +__STATIC_INLINE uint32_t FL_LPUART_ReadBitModulation(LPUART_Type *LPUARTx) +{ + return (uint32_t)(READ_BIT(LPUARTx->BMR, (0xfffU << 16U)) >> 16U); +} + +/** + * @} + */ + +/** @defgroup LPUART_FL_EF_Init Initialization and de-initialization functions + * @{ + */ +FL_ErrorStatus FL_LPUART_DeInit(LPUART_Type *LPUARTx); +void FL_LPUART_StructInit(FL_LPUART_InitTypeDef *initStruct); +FL_ErrorStatus FL_LPUART_Init(LPUART_Type *LPUARTx, FL_LPUART_InitTypeDef *initStruct); + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif /* __FM33LG0XX_FL_LPUART_H*/ + +/*************************Py_Code_Generator Version: 0.1-0.11-0.1 @ 2020-09-14*************************/ +/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/ diff --git a/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_pmu.h b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_pmu.h new file mode 100644 index 0000000..b2ab4aa --- /dev/null +++ b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_pmu.h @@ -0,0 +1,1042 @@ + /** + ******************************************************************************************************* + * @file fm33lg0xx_fl_pmu.h + * @author FMSH Application Team + * @brief Head file of PMU FL Module + ******************************************************************************************************* + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + + + +/* Define to prevent recursive inclusion---------------------------------------------------------------*/ +#ifndef __FM33LG0XX_FL_PMU_H +#define __FM33LG0XX_FL_PMU_H + +#ifdef __cplusplus +extern "C" { +#endif +/* Includes -------------------------------------------------------------------------------------------*/ +#include "fm33lg0xx_fl_def.h" +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @defgroup PMU PMU + * @brief PMU FL driver + * @{ + */ + +/* Exported types -------------------------------------------------------------------------------------*/ +/** @defgroup PMU_FL_ES_INIT PMU Exported Init structures + * @{ + */ + +/** + * @brief FL PMU Init Sturcture definition + */ +typedef struct +{ + /*! 低功耗模式配置 */ + uint32_t powerMode; + /*! 低功耗模式下内核电压降低与否 */ + FL_FunState coreVoltageScaling; + /*! 睡眠模式配置 */ + uint32_t deepSleep; + /*! 唤醒后的系统频率，仅对RCHF */ + uint32_t wakeupFrequency; + /*! 芯片LDO是否进入低功耗 */ + uint32_t LDOLowPowerMode; + /*! 额外唤醒延迟 */ + uint32_t wakeupDelay; +} FL_PMU_SleepInitTypeDef; + +/** + * @} + */ +/* Exported constants ---------------------------------------------------------------------------------*/ +/** @defgroup PMU_FL_Exported_Constants PMU Exported Constants + * @{ + */ + +#define PMU_CR_LDO_LPM_Pos (18U) +#define PMU_CR_LDO_LPM_Msk (0x3U << PMU_CR_LDO_LPM_Pos) +#define PMU_CR_LDO_LPM PMU_CR_LDO_LPM_Msk + +#define PMU_CR_LDO15EN_Pos (17U) +#define PMU_CR_LDO15EN_Msk (0x1U << PMU_CR_LDO15EN_Pos) +#define PMU_CR_LDO15EN PMU_CR_LDO15EN_Msk + +#define PMU_CR_LDO15EN_B_Pos (16U) +#define PMU_CR_LDO15EN_B_Msk (0x1U << PMU_CR_LDO15EN_B_Pos) +#define PMU_CR_LDO15EN_B PMU_CR_LDO15EN_B_Msk + +#define PMU_CR_WKFSEL_Pos (10U) +#define PMU_CR_WKFSEL_Msk (0x3U << PMU_CR_WKFSEL_Pos) +#define PMU_CR_WKFSEL PMU_CR_WKFSEL_Msk + +#define PMU_CR_SLPDP_Pos (9U) +#define PMU_CR_SLPDP_Msk (0x1U << PMU_CR_SLPDP_Pos) +#define PMU_CR_SLPDP PMU_CR_SLPDP_Msk + +#define PMU_CR_CVS_Pos (8U) +#define PMU_CR_CVS_Msk (0x1U << PMU_CR_CVS_Pos) +#define PMU_CR_CVS PMU_CR_CVS_Msk + +#define PMU_CR_PMOD_Pos (0U) +#define PMU_CR_PMOD_Msk (0x3U << PMU_CR_PMOD_Pos) +#define PMU_CR_PMOD PMU_CR_PMOD_Msk + +#define PMU_WKTR_VREFDLY_Pos (3U) +#define PMU_WKTR_VREFDLY_Msk (0x1U << PMU_WKTR_VREFDLY_Pos) +#define PMU_WKTR_VREFDLY PMU_WKTR_VREFDLY_Msk + +#define PMU_WKTR_STPCLR_Pos (2U) +#define PMU_WKTR_STPCLR_Msk (0x1U << PMU_WKTR_STPCLR_Pos) +#define PMU_WKTR_STPCLR PMU_WKTR_STPCLR_Msk + +#define PMU_WKTR_T1A_Pos (0U) +#define PMU_WKTR_T1A_Msk (0x3U << PMU_WKTR_T1A_Pos) +#define PMU_WKTR_T1A PMU_WKTR_T1A_Msk + +#define PMU_WKFR_ADCWKF_Pos (31U) +#define PMU_WKFR_ADCWKF_Msk (0x1U << PMU_WKFR_ADCWKF_Pos) +#define PMU_WKFR_ADCWKF PMU_WKFR_ADCWKF_Msk + +#define PMU_WKFR_UART1WKF_Pos (30U) +#define PMU_WKFR_UART1WKF_Msk (0x1U << PMU_WKFR_UART1WKF_Pos) +#define PMU_WKFR_UART1WKF PMU_WKFR_UART1WKF_Msk + +#define PMU_WKFR_UART0WKF_Pos (29U) +#define PMU_WKFR_UART0WKF_Msk (0x1U << PMU_WKFR_UART0WKF_Pos) +#define PMU_WKFR_UART0WKF PMU_WKFR_UART0WKF_Msk + +#define PMU_WKFR_RTCWKF_Pos (28U) +#define PMU_WKFR_RTCWKF_Msk (0x1U << PMU_WKFR_RTCWKF_Pos) +#define PMU_WKFR_RTCWKF PMU_WKFR_RTCWKF_Msk + +#define PMU_WKFR_SVDWKF_Pos (27U) +#define PMU_WKFR_SVDWKF_Msk (0x1Ul << PMU_WKFR_SVDWKF_Pos) +#define PMU_WKFR_SVDWKF PMU_WKFR_SVDWKF_Msk + +#define PMU_WKFR_LFDETWKF_Pos (26U) +#define PMU_WKFR_LFDETWKF_Msk (0x1U << PMU_WKFR_LFDETWKF_Pos) +#define PMU_WKFR_LFDETWKF PMU_WKFR_LFDETWKF_Msk + +#define PMU_WKFR_VREFWKF_Pos (25U) +#define PMU_WKFR_VREFWKF_Msk (0x1U << PMU_WKFR_VREFWKF_Pos) +#define PMU_WKFR_VREFWKF PMU_WKFR_VREFWKF_Msk + +#define PMU_WKFR_IOWKF_Pos (24U) +#define PMU_WKFR_IOWKF_Msk (0x1U << PMU_WKFR_IOWKF_Pos) +#define PMU_WKFR_IOWKF PMU_WKFR_IOWKF_Msk + +#define PMU_WKFR_IICWKF_Pos (23U) +#define PMU_WKFR_IICWKF_Msk (0x1U << PMU_WKFR_IICWKF_Pos) +#define PMU_WKFR_IICWKF PMU_WKFR_IICWKF_Msk + +#define PMU_WKFR_LPU2WKF_Pos (22U) +#define PMU_WKFR_LPU2WKF_Msk (0x1U << PMU_WKFR_LPU2WKF_Pos) +#define PMU_WKFR_LPU2WKF PMU_WKFR_LPU2WKF_Msk + +#define PMU_WKFR_LPU1WKF_Pos (21U) +#define PMU_WKFR_LPU1WKF_Msk (0x1U << PMU_WKFR_LPU1WKF_Pos) +#define PMU_WKFR_LPU1WKF PMU_WKFR_LPU1WKF_Msk + +#define PMU_WKFR_LPU0WKF_Pos (20U) +#define PMU_WKFR_LPU0WKF_Msk (0x1Ul << PMU_WKFR_LPU0WKF_Pos) +#define PMU_WKFR_LPU0WKF PMU_WKFR_LPU0WKF_Msk + +#define PMU_WKFR_COMP3WKF_Pos (18U) +#define PMU_WKFR_COMP3WKF_Msk (0x1U << PMU_WKFR_COMP3WKF_Pos) +#define PMU_WKFR_COMP3WKF PMU_WKFR_COMP3WKF_Msk + +#define PMU_WKFR_COMP2WKF_Pos (17U) +#define PMU_WKFR_COMP2WKF_Msk (0x1U << PMU_WKFR_COMP2WKF_Pos) +#define PMU_WKFR_COMP2WKF PMU_WKFR_COMP2WKF_Msk + +#define PMU_WKFR_COMP1WKF_Pos (16U) +#define PMU_WKFR_COMP1WKF_Msk (0x1U << PMU_WKFR_COMP1WKF_Pos) +#define PMU_WKFR_COMP1WKF PMU_WKFR_COMP1WKF_Msk + +#define PMU_WKFR_LPT32WKF_Pos (14U) +#define PMU_WKFR_LPT32WKF_Msk (0x1Ul << PMU_WKFR_LPT32WKF_Pos) +#define PMU_WKFR_LPT32WKF PMU_WKFR_LPT32WKF_Msk + +#define PMU_WKFR_LPT16WKF_Pos (13U) +#define PMU_WKFR_LPT16WKF_Msk (0x1U << PMU_WKFR_LPT16WKF_Pos) +#define PMU_WKFR_LPT16WKF PMU_WKFR_LPT16WKF_Msk + +#define PMU_WKFR_BST32WKF_Pos (12U) +#define PMU_WKFR_BST32WKF_Msk (0x1U << PMU_WKFR_BST32WKF_Pos) +#define PMU_WKFR_BST32WKF PMU_WKFR_BST32WKF_Msk + +#define PMU_WKFR_BST16WKF_Pos (11U) +#define PMU_WKFR_BST16WKF_Msk (0x1U << PMU_WKFR_BST16WKF_Pos) +#define PMU_WKFR_BST16WKF PMU_WKFR_BST16WKF_Msk + +#define PMU_WKFR_DBGWKF_Pos (10U) +#define PMU_WKFR_DBGWKF_Msk (0x1U << PMU_WKFR_DBGWKF_Pos) +#define PMU_WKFR_DBGWKF PMU_WKFR_DBGWKF_Msk + +#define PMU_WKFR_WKPXF_Pos (0U) +#define PMU_WKFR_WKPXF_Msk (0x3ffU << PMU_WKFR_WKPXF_Pos) +#define PMU_WKFR_WKPXF PMU_WKFR_WKPXF_Msk + +#define PMU_IER_LPACTIE_Pos (2U) +#define PMU_IER_LPACTIE_Msk (0x1U << PMU_IER_LPACTIE_Pos) +#define PMU_IER_LPACTIE PMU_IER_LPACTIE_Msk + +#define PMU_IER_SLPEIE_Pos (1U) +#define PMU_IER_SLPEIE_Msk (0x1U << PMU_IER_SLPEIE_Pos) +#define PMU_IER_SLPEIE PMU_IER_SLPEIE_Msk + +#define PMU_IER_LPREIE_Pos (0U) +#define PMU_IER_LPREIE_Msk (0x1U << PMU_IER_LPREIE_Pos) +#define PMU_IER_LPREIE PMU_IER_LPREIE_Msk + +#define PMU_ISR_LPACTIF_Pos (2U) +#define PMU_ISR_LPACTIF_Msk (0x1U << PMU_ISR_LPACTIF_Pos) +#define PMU_ISR_LPACTIF PMU_ISR_LPACTIF_Msk + +#define PMU_ISR_SLPEIF_Pos (1U) +#define PMU_ISR_SLPEIF_Msk (0x1U << PMU_ISR_SLPEIF_Pos) +#define PMU_ISR_SLPEIF PMU_ISR_SLPEIF_Msk + +#define PMU_ISR_LPREIF_Pos (0U) +#define PMU_ISR_LPREIF_Msk (0x1U << PMU_ISR_LPREIF_Pos) +#define PMU_ISR_LPREIF PMU_ISR_LPREIF_Msk + + + +#define FL_PMU_WAKEUP0_PIN (0x1U << 0U) +#define FL_PMU_WAKEUP1_PIN (0x1U << 1U) +#define FL_PMU_WAKEUP2_PIN (0x1U << 2U) +#define FL_PMU_WAKEUP3_PIN (0x1U << 3U) +#define FL_PMU_WAKEUP4_PIN (0x1U << 4U) +#define FL_PMU_WAKEUP5_PIN (0x1U << 5U) +#define FL_PMU_WAKEUP6_PIN (0x1U << 6U) +#define FL_PMU_WAKEUP7_PIN (0x1U << 7U) +#define FL_PMU_WAKEUP8_PIN (0x1U << 8U) +#define FL_PMU_WAKEUP9_PIN (0x1U << 9U) + + + +#define FL_PMU_LDO_LPM_DISABLE (0x0Ul << PMU_CR_LDO_LPM_Pos) +#define FL_PMU_LDO_LPM_ENABLE (0x2Ul << PMU_CR_LDO_LPM_Pos) + + +#define FL_PMU_RCHF_WAKEUP_FREQ_8MHZ (0x0Ul << PMU_CR_WKFSEL_Pos) +#define FL_PMU_RCHF_WAKEUP_FREQ_16MHZ (0x1Ul << PMU_CR_WKFSEL_Pos) +#define FL_PMU_RCHF_WAKEUP_FREQ_24MHZ (0x2Ul << PMU_CR_WKFSEL_Pos) + + +#define FL_PMU_SLEEP_MODE_DEEP (0x1Ul << PMU_CR_SLPDP_Pos) +#define FL_PMU_SLEEP_MODE_NORMAL (0x0Ul << PMU_CR_SLPDP_Pos) + + +#define FL_PMU_POWER_MODE_ACTIVE_OR_LPACTIVE (0x0Ul << PMU_CR_PMOD_Pos) +#define FL_PMU_POWER_MODE_LPRUN_ONLY (0x1Ul << PMU_CR_PMOD_Pos) +#define FL_PMU_POWER_MODE_SLEEP_OR_DEEPSLEEP (0x2Ul << PMU_CR_PMOD_Pos) + +#define FL_PMU_WAKEUP_DELAY_MODE_IMMEDIATE (0x0U << PMU_WKTR_VREFDLY_Pos) +#define FL_PMU_WAKEUP_DELAY_MODE_WAIT_VREF1P2 (0x1U << PMU_WKTR_VREFDLY_Pos) + + +#define FL_PMU_FLASH_STOP_CLEAR_MODE_SYNCHRONOUS (0x0U << PMU_WKTR_STPCLR_Pos) +#define FL_PMU_FLASH_STOP_CLEAR_MODE_ASYNCHRONOUS (0x1U << PMU_WKTR_STPCLR_Pos) + + +#define FL_PMU_WAKEUP_DELAY_0US (0x0U << PMU_WKTR_T1A_Pos) +#define FL_PMU_WAKEUP_DELAY_2US (0x1Ul << PMU_WKTR_T1A_Pos) +#define FL_PMU_WAKEUP_DELAY_4US (0x2U << PMU_WKTR_T1A_Pos) +#define FL_PMU_WAKEUP_DELAY_8US (0x3U << PMU_WKTR_T1A_Pos) + + +/** + * @} + */ +/* Exported functions ---------------------------------------------------------------------------------*/ +/** @defgroup PMU_FL_Exported_Functions PMU Exported Functions + * @{ + */ + +/** + * @brief Set LDO Low Power Mode + * @rmtoll CR LDO_LPM FL_PMU_SetLDOLowPowerMode + * @param PMUx PMU instance + * @param mode This parameter can be one of the following values: + * @arg @ref FL_PMU_LDO_LPM_DISABLE + * @arg @ref FL_PMU_LDO_LPM_ENABLE + * @retval None + */ +__STATIC_INLINE void FL_PMU_SetLDOLowPowerMode(PMU_Type *PMUx, uint32_t mode) +{ + MODIFY_REG(PMUx->CR, PMU_CR_LDO_LPM_Msk, mode); +} + +/** + * @brief Get LDO Low Power Mode Setting + * @rmtoll CR LDO_LPM FL_PMU_GetLDOLowPowerMode + * @param PMUx PMU instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_PMU_LDO_LPM_DISABLE + * @arg @ref FL_PMU_LDO_LPM_ENABLE + */ +__STATIC_INLINE uint32_t FL_PMU_GetLDOLowPowerMode(PMU_Type *PMUx) +{ + return (uint32_t)(READ_BIT(PMUx->CR, PMU_CR_LDO_LPM_Msk)); +} + +/** + * @brief Get LDO15 Enable Status + * @rmtoll CR LDO15EN FL_PMU_GetLDO15Status + * @param PMUx PMU instance + * @retval Returned value can be one of the following values: + */ +__STATIC_INLINE uint32_t FL_PMU_GetLDO15Status(PMU_Type *PMUx) +{ + return (uint32_t)(READ_BIT(PMUx->CR, PMU_CR_LDO15EN_Msk)); +} + +/** + * @brief Get LDO15 Inverse check bit + * @rmtoll CR LDO15EN_B FL_PMU_GetLDO15StatusInvert + * @param PMUx PMU instance + * @retval Returned value can be one of the following values: + */ +__STATIC_INLINE uint32_t FL_PMU_GetLDO15StatusInvert(PMU_Type *PMUx) +{ + return (uint32_t)(READ_BIT(PMUx->CR, PMU_CR_LDO15EN_B_Msk)); +} + +/** + * @brief Set RCHF Frequency After Wakeup + * @rmtoll CR WKFSEL FL_PMU_SetRCHFWakeupFrequency + * @param PMUx PMU instance + * @param Freq This parameter can be one of the following values: + * @arg @ref FL_PMU_RCHF_WAKEUP_FREQ_8MHZ + * @arg @ref FL_PMU_RCHF_WAKEUP_FREQ_16MHZ + * @arg @ref FL_PMU_RCHF_WAKEUP_FREQ_24MHZ + * @retval None + */ +__STATIC_INLINE void FL_PMU_SetRCHFWakeupFrequency(PMU_Type *PMUx, uint32_t Freq) +{ + MODIFY_REG(PMUx->CR, PMU_CR_WKFSEL_Msk, Freq); +} + +/** + * @brief Get RCHF Frequency After Wakeup Setting + * @rmtoll CR WKFSEL FL_PMU_GetRCHFWakeupFrequency + * @param PMUx PMU instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_PMU_RCHF_WAKEUP_FREQ_8MHZ + * @arg @ref FL_PMU_RCHF_WAKEUP_FREQ_16MHZ + * @arg @ref FL_PMU_RCHF_WAKEUP_FREQ_24MHZ + */ +__STATIC_INLINE uint32_t FL_PMU_GetRCHFWakeupFrequency(PMU_Type *PMUx) +{ + return (uint32_t)(READ_BIT(PMUx->CR, PMU_CR_WKFSEL_Msk)); +} + +/** + * @brief Set Sleep Mode + * @rmtoll CR SLPDP FL_PMU_SetSleepMode + * @param PMUx PMU instance + * @param mode This parameter can be one of the following values: + * @arg @ref FL_PMU_SLEEP_MODE_DEEP + * @arg @ref FL_PMU_SLEEP_MODE_NORMAL + * @retval None + */ +__STATIC_INLINE void FL_PMU_SetSleepMode(PMU_Type *PMUx, uint32_t mode) +{ + MODIFY_REG(PMUx->CR, PMU_CR_SLPDP_Msk, mode); +} + +/** + * @brief Get Sleep Mode Setting + * @rmtoll CR SLPDP FL_PMU_GetSleepMode + * @param PMUx PMU instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_PMU_SLEEP_MODE_DEEP + * @arg @ref FL_PMU_SLEEP_MODE_NORMAL + */ +__STATIC_INLINE uint32_t FL_PMU_GetSleepMode(PMU_Type *PMUx) +{ + return (uint32_t)(READ_BIT(PMUx->CR, PMU_CR_SLPDP_Msk)); +} + +/** + * @brief Enable Core Voltage Scaling Under Low Power Mode + * @rmtoll CR CVS FL_PMU_EnableCoreVoltageScaling + * @param PMUx PMU instance + * @retval None + */ +__STATIC_INLINE void FL_PMU_EnableCoreVoltageScaling(PMU_Type *PMUx) +{ + SET_BIT(PMUx->CR, PMU_CR_CVS_Msk); +} + +/** + * @brief Get Core Voltage Scaling Under Low Power Mode Enable Status + * @rmtoll CR CVS FL_PMU_IsEnabledCoreVoltageScaling + * @param PMUx PMU instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_PMU_IsEnabledCoreVoltageScaling(PMU_Type *PMUx) +{ + return (uint32_t)(READ_BIT(PMUx->CR, PMU_CR_CVS_Msk) == PMU_CR_CVS_Msk); +} + +/** + * @brief Disable Core Voltage Scaling Under Low Power Mode + * @rmtoll CR CVS FL_PMU_DisableCoreVoltageScaling + * @param PMUx PMU instance + * @retval None + */ +__STATIC_INLINE void FL_PMU_DisableCoreVoltageScaling(PMU_Type *PMUx) +{ + CLEAR_BIT(PMUx->CR, PMU_CR_CVS_Msk); +} + +/** + * @brief Set Low Power Mode + * @rmtoll CR PMOD FL_PMU_SetLowPowerMode + * @param PMUx PMU instance + * @param mode This parameter can be one of the following values: + * @arg @ref FL_PMU_POWER_MODE_ACTIVE_OR_LPACTIVE + * @arg @ref FL_PMU_POWER_MODE_LPRUN_ONLY + * @arg @ref FL_PMU_POWER_MODE_SLEEP_OR_DEEPSLEEP + * @retval None + */ +__STATIC_INLINE void FL_PMU_SetLowPowerMode(PMU_Type *PMUx, uint32_t mode) +{ + MODIFY_REG(PMUx->CR, PMU_CR_PMOD_Msk, mode); +} + +/** + * @brief Get Low Power Mode Setting + * @rmtoll CR PMOD FL_PMU_GetLowPowerMode + * @param PMUx PMU instance + * @retval Returned value can be one of the following values: + */ +__STATIC_INLINE uint32_t FL_PMU_GetLowPowerMode(PMU_Type *PMUx) +{ + return (uint32_t)(READ_BIT(PMUx->CR, PMU_CR_PMOD_Msk)); +} + +/** + * @brief Set VREF delay wakeup mode + * @rmtoll WKTR VREFDLY FL_PMU_SetVREFWakeupDelayMode + * @param PMUx PMU instance + * @param VREFDelay This parameter can be one of the following values: + * @arg @ref FL_PMU_WAKEUP_DELAY_MODE_IMMEDIATE + * @arg @ref FL_PMU_WAKEUP_DELAY_MODE_WAIT_VREF1P2 + * @retval None + */ +__STATIC_INLINE void FL_PMU_SetVREFWakeupDelayMode(PMU_Type *PMUx, uint32_t VREFDelay) +{ + MODIFY_REG(PMUx->WKTR, PMU_WKTR_VREFDLY_Msk, VREFDelay); +} + +/** + * @brief Get VREF delay wakeup status + * @rmtoll WKTR VREFDLY FL_PMU_GetVREFWakeupDelayMode + * @param PMUx PMU instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_PMU_WAKEUP_DELAY_MODE_IMMEDIATE + * @arg @ref FL_PMU_WAKEUP_DELAY_MODE_WAIT_VREF1P2 + */ +__STATIC_INLINE uint32_t FL_PMU_GetVREFWakeupDelayMode(PMU_Type *PMUx) +{ + return (uint32_t)(READ_BIT(PMUx->WKTR, PMU_WKTR_VREFDLY_Msk)); +} + +/** + * @brief Set Flash Stop Signal Clear Way + * @rmtoll WKTR STPCLR FL_PMU_SetFlashStopSignalClearMode + * @param PMUx PMU instance + * @param config This parameter can be one of the following values: + * @arg @ref FL_PMU_FLASH_STOP_CLEAR_MODE_ASYNCHRONOUS + * @arg @ref FL_PMU_FLASH_STOP_CLEAR_MODE_SYNCHRONOUS + * @retval None + */ +__STATIC_INLINE void FL_PMU_SetFlashStopSignalClearMode(PMU_Type *PMUx, uint32_t config) +{ + MODIFY_REG(PMUx->WKTR, PMU_WKTR_STPCLR_Msk, config); +} + +/** + * @brief Get Flash Stop Signal Clear Way Setting + * @rmtoll WKTR STPCLR FL_PMU_GetFlashStopSignalClearMode + * @param PMUx PMU instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_PMU_FLASH_STOP_CLEAR_MODE_ASYNCHRONOUS + * @arg @ref FL_PMU_FLASH_STOP_CLEAR_MODE_SYNCHRONOUS + */ +__STATIC_INLINE uint32_t FL_PMU_GetFlashStopSignalClearMode(PMU_Type *PMUx) +{ + return (uint32_t)(READ_BIT(PMUx->WKTR, PMU_WKTR_STPCLR_Msk)); +} + +/** + * @brief Set Extra Wakeup Delay Under Sleep/DeepSleep Mode + * @rmtoll WKTR T1A FL_PMU_SetWakeupDelay + * @param PMUx PMU instance + * @param time This parameter can be one of the following values: + * @arg @ref FL_PMU_WAKEUP_DELAY_0US + * @arg @ref FL_PMU_WAKEUP_DELAY_2US + * @arg @ref FL_PMU_WAKEUP_DELAY_4US + * @arg @ref FL_PMU_WAKEUP_DELAY_8US + * @retval None + */ +__STATIC_INLINE void FL_PMU_SetWakeupDelay(PMU_Type *PMUx, uint32_t time) +{ + MODIFY_REG(PMUx->WKTR, PMU_WKTR_T1A_Msk, time); +} + +/** + * @brief Get Extra Wakeup Delay Under Sleep/DeepSleep Mode Setting + * @rmtoll WKTR T1A FL_PMU_GetWakeupDelay + * @param PMUx PMU instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_PMU_WAKEUP_DELAY_0US + * @arg @ref FL_PMU_WAKEUP_DELAY_2US + * @arg @ref FL_PMU_WAKEUP_DELAY_4US + * @arg @ref FL_PMU_WAKEUP_DELAY_8US + */ +__STATIC_INLINE uint32_t FL_PMU_GetWakeupDelay(PMU_Type *PMUx) +{ + return (uint32_t)(READ_BIT(PMUx->WKTR, PMU_WKTR_T1A_Msk)); +} + +/** + * @brief Get ADC interrupt wakeup flag + * @rmtoll WKFR ADCWKF FL_PMU_IsActiveFlag_WakeupADC + * @param PMUx PMU instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_PMU_IsActiveFlag_WakeupADC(PMU_Type *PMUx) +{ + return (uint32_t)(READ_BIT(PMUx->WKFR, PMU_WKFR_ADCWKF_Msk) == (PMU_WKFR_ADCWKF_Msk)); +} + +/** + * @brief Get UART1 interrupt wakeup flag + * @rmtoll WKFR UART1WKF FL_PMU_IsActiveFlag_WakeupUART1 + * @param PMUx PMU instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_PMU_IsActiveFlag_WakeupUART1(PMU_Type *PMUx) +{ + return (uint32_t)(READ_BIT(PMUx->WKFR, PMU_WKFR_UART1WKF_Msk) == (PMU_WKFR_UART1WKF_Msk)); +} + +/** + * @brief Get UART0 interrupt wakeup flag + * @rmtoll WKFR UART0WKF FL_PMU_IsActiveFlag_WakeupUART0 + * @param PMUx PMU instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_PMU_IsActiveFlag_WakeupUART0(PMU_Type *PMUx) +{ + return (uint32_t)(READ_BIT(PMUx->WKFR, PMU_WKFR_UART0WKF_Msk) == (PMU_WKFR_UART0WKF_Msk)); +} + +/** + * @brief Get RTC interrupt wakeup flag + * @rmtoll WKFR RTCWKF FL_PMU_IsActiveFlag_WakeupRTC + * @param PMUx PMU instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_PMU_IsActiveFlag_WakeupRTC(PMU_Type *PMUx) +{ + return (uint32_t)(READ_BIT(PMUx->WKFR, PMU_WKFR_RTCWKF_Msk) == (PMU_WKFR_RTCWKF_Msk)); +} + +/** + * @brief Get SVD interrupt wakeup flag + * @rmtoll WKFR SVDWKF FL_PMU_IsActiveFlag_WakeupSVD + * @param PMUx PMU instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_PMU_IsActiveFlag_WakeupSVD(PMU_Type *PMUx) +{ + return (uint32_t)(READ_BIT(PMUx->WKFR, PMU_WKFR_SVDWKF_Msk) == (PMU_WKFR_SVDWKF_Msk)); +} + +/** + * @brief Get LFDET interrupt wakeup flag + * @rmtoll WKFR LFDETWKF FL_PMU_IsActiveFlag_WakeupLFDET + * @param PMUx PMU instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_PMU_IsActiveFlag_WakeupLFDET(PMU_Type *PMUx) +{ + return (uint32_t)(READ_BIT(PMUx->WKFR, PMU_WKFR_LFDETWKF_Msk) == (PMU_WKFR_LFDETWKF_Msk)); +} + +/** + * @brief Get VREF interrupt wakeup flag + * @rmtoll WKFR VREFWKF FL_PMU_IsActiveFlag_WakeupVREF + * @param PMUx PMU instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_PMU_IsActiveFlag_WakeupVREF(PMU_Type *PMUx) +{ + return (uint32_t)(READ_BIT(PMUx->WKFR, PMU_WKFR_VREFWKF_Msk) == (PMU_WKFR_VREFWKF_Msk)); +} + +/** + * @brief Get IO interrupt wakeup flag + * @rmtoll WKFR IOWKF FL_PMU_IsActiveFlag_WakeupEXTI + * @param PMUx PMU instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_PMU_IsActiveFlag_WakeupEXTI(PMU_Type *PMUx) +{ + return (uint32_t)(READ_BIT(PMUx->WKFR, PMU_WKFR_IOWKF_Msk) == (PMU_WKFR_IOWKF_Msk)); +} + +/** + * @brief Get I2C interrupt wakeup flag + * @rmtoll WKFR IICWKF FL_PMU_IsActiveFlag_WakeupI2C + * @param PMUx PMU instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_PMU_IsActiveFlag_WakeupI2C(PMU_Type *PMUx) +{ + return (uint32_t)(READ_BIT(PMUx->WKFR, PMU_WKFR_IICWKF_Msk) == (PMU_WKFR_IICWKF_Msk)); +} + +/** + * @brief Get LPUART2 interrupt wakeup flag + * @rmtoll WKFR LPU2WKF FL_PMU_IsActiveFlag_WakeupLPUART2 + * @param PMUx PMU instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_PMU_IsActiveFlag_WakeupLPUART2(PMU_Type *PMUx) +{ + return (uint32_t)(READ_BIT(PMUx->WKFR, PMU_WKFR_LPU2WKF_Msk) == (PMU_WKFR_LPU2WKF_Msk)); +} + +/** + * @brief Get LPUART1 interrupt wakeup flag + * @rmtoll WKFR LPU1WKF FL_PMU_IsActiveFlag_WakeupLPUART1 + * @param PMUx PMU instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_PMU_IsActiveFlag_WakeupLPUART1(PMU_Type *PMUx) +{ + return (uint32_t)(READ_BIT(PMUx->WKFR, PMU_WKFR_LPU1WKF_Msk) == (PMU_WKFR_LPU1WKF_Msk)); +} + +/** + * @brief Get LPUART0 interrupt wakeup flag + * @rmtoll WKFR LPU0WKF FL_PMU_IsActiveFlag_WakeupLPUART0 + * @param PMUx PMU instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_PMU_IsActiveFlag_WakeupLPUART0(PMU_Type *PMUx) +{ + return (uint32_t)(READ_BIT(PMUx->WKFR, PMU_WKFR_LPU0WKF_Msk) == (PMU_WKFR_LPU0WKF_Msk)); +} + +/** + * @brief Get COMP3 interrrupt wakeup flag + * @rmtoll WKFR COMP3WKF FL_PMU_IsActiveFlag_WakeupCOMP3 + * @param PMUx PMU instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_PMU_IsActiveFlag_WakeupCOMP3(PMU_Type *PMUx) +{ + return (uint32_t)(READ_BIT(PMUx->WKFR, PMU_WKFR_COMP3WKF_Msk) == (PMU_WKFR_COMP3WKF_Msk)); +} + +/** + * @brief Get COMP2 interrrupt wakeup flag + * @rmtoll WKFR COMP2WKF FL_PMU_IsActiveFlag_WakeupCOMP2 + * @param PMUx PMU instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_PMU_IsActiveFlag_WakeupCOMP2(PMU_Type *PMUx) +{ + return (uint32_t)(READ_BIT(PMUx->WKFR, PMU_WKFR_COMP2WKF_Msk) == (PMU_WKFR_COMP2WKF_Msk)); +} + +/** + * @brief Get COMP1 interrrupt wakeup flag + * @rmtoll WKFR COMP1WKF FL_PMU_IsActiveFlag_WakeupCOMP1 + * @param PMUx PMU instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_PMU_IsActiveFlag_WakeupCOMP1(PMU_Type *PMUx) +{ + return (uint32_t)(READ_BIT(PMUx->WKFR, PMU_WKFR_COMP1WKF_Msk) == (PMU_WKFR_COMP1WKF_Msk)); +} + +/** + * @brief Get LPTIM32 interrupt wakeup flag + * @rmtoll WKFR LPT32WKF FL_PMU_IsActiveFlag_WakeupLPTIM32 + * @param PMUx PMU instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_PMU_IsActiveFlag_WakeupLPTIM32(PMU_Type *PMUx) +{ + return (uint32_t)(READ_BIT(PMUx->WKFR, PMU_WKFR_LPT32WKF_Msk) == (PMU_WKFR_LPT32WKF_Msk)); +} + +/** + * @brief Get LPTIM16 interrupt wakeup flag + * @rmtoll WKFR LPT16WKF FL_PMU_IsActiveFlag_WakeupLPTIM16 + * @param PMUx PMU instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_PMU_IsActiveFlag_WakeupLPTIM16(PMU_Type *PMUx) +{ + return (uint32_t)(READ_BIT(PMUx->WKFR, PMU_WKFR_LPT16WKF_Msk) == (PMU_WKFR_LPT16WKF_Msk)); +} + +/** + * @brief Get BSTIM32 interrupt wakeup flag + * @rmtoll WKFR BST32WKF FL_PMU_IsActiveFlag_WakeupBSTIM32 + * @param PMUx PMU instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_PMU_IsActiveFlag_WakeupBSTIM32(PMU_Type *PMUx) +{ + return (uint32_t)(READ_BIT(PMUx->WKFR, PMU_WKFR_BST32WKF_Msk) == (PMU_WKFR_BST32WKF_Msk)); +} + +/** + * @brief Get BSTIM16 interrupt wakeup flag + * @rmtoll WKFR BST16WKF FL_PMU_IsActiveFlag_WakeupBSTIM16 + * @param PMUx PMU instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_PMU_IsActiveFlag_WakeupBSTIM16(PMU_Type *PMUx) +{ + return (uint32_t)(READ_BIT(PMUx->WKFR, PMU_WKFR_BST16WKF_Msk) == (PMU_WKFR_BST16WKF_Msk)); +} + +/** + * @brief Get CPU Debugger wakeup flag + * @rmtoll WKFR DBGWKF FL_PMU_IsActiveFlag_WakeupDBG + * @param PMUx PMU instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_PMU_IsActiveFlag_WakeupDBG(PMU_Type *PMUx) +{ + return (uint32_t)(READ_BIT(PMUx->WKFR, PMU_WKFR_DBGWKF_Msk) == (PMU_WKFR_DBGWKF_Msk)); +} + +/** + * @brief Clear CPU Debugger wakeup flag + * @rmtoll WKFR DBGWKF FL_PMU_ClearFlag_WakeupDBG + * @param PMUx PMU instance + * @retval None + */ +__STATIC_INLINE void FL_PMU_ClearFlag_WakeupDBG(PMU_Type *PMUx) +{ + WRITE_REG(PMUx->WKFR, PMU_WKFR_DBGWKF_Msk); +} + +/** + * @brief Get pinx wakeup flag + * @rmtoll WKFR WKPXF FL_PMU_IsActiveFlag_WakeupPIN + * @param PMUx PMU instance + * @param Pin This parameter can be one of the following values: + * @arg @ref FL_PMU_WAKEUP0_PIN + * @arg @ref FL_PMU_WAKEUP1_PIN + * @arg @ref FL_PMU_WAKEUP2_PIN + * @arg @ref FL_PMU_WAKEUP3_PIN + * @arg @ref FL_PMU_WAKEUP4_PIN + * @arg @ref FL_PMU_WAKEUP5_PIN + * @arg @ref FL_PMU_WAKEUP6_PIN + * @arg @ref FL_PMU_WAKEUP7_PIN + * @arg @ref FL_PMU_WAKEUP8_PIN + * @arg @ref FL_PMU_WAKEUP9_PIN + * @retval Returned value can be one of the following values: + */ +__STATIC_INLINE uint32_t FL_PMU_IsActiveFlag_WakeupPIN(PMU_Type *PMUx, uint32_t Pin) +{ + return (uint32_t)(READ_BIT(PMUx->WKFR, ((Pin & 0x3ff) << 0x0U)) == ((Pin & 0x3ff) << 0x0U)); +} + +/** + * @brief Clear pinx wakeup flag + * @rmtoll WKFR WKPXF FL_PMU_ClearFlag_WakeupPIN + * @param PMUx PMU instance + * @param Pin This parameter can be one of the following values: + * @arg @ref FL_PMU_WAKEUP0_PIN + * @arg @ref FL_PMU_WAKEUP1_PIN + * @arg @ref FL_PMU_WAKEUP2_PIN + * @arg @ref FL_PMU_WAKEUP3_PIN + * @arg @ref FL_PMU_WAKEUP4_PIN + * @arg @ref FL_PMU_WAKEUP5_PIN + * @arg @ref FL_PMU_WAKEUP6_PIN + * @arg @ref FL_PMU_WAKEUP7_PIN + * @arg @ref FL_PMU_WAKEUP8_PIN + * @arg @ref FL_PMU_WAKEUP9_PIN + * @retval None + */ +__STATIC_INLINE void FL_PMU_ClearFlag_WakeupPIN(PMU_Type *PMUx, uint32_t Pin) +{ + WRITE_REG(PMUx->WKFR, ((Pin & 0x3ff) << 0x0U)); +} + +/** + * @brief LPActive error interrupt enable + * @rmtoll IER LPACTIE FL_PMU_EnableIT_LPActiveError + * @param PMUx PMU instance + * @retval None + */ +__STATIC_INLINE void FL_PMU_EnableIT_LPActiveError(PMU_Type *PMUx) +{ + SET_BIT(PMUx->IER, PMU_IER_LPACTIE_Msk); +} + +/** + * @brief Get LPActive error interrupt enable status + * @rmtoll IER LPACTIE FL_PMU_IsEnabledIT_LPActiveError + * @param PMUx PMU instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_PMU_IsEnabledIT_LPActiveError(PMU_Type *PMUx) +{ + return (uint32_t)(READ_BIT(PMUx->IER, PMU_IER_LPACTIE_Msk) == PMU_IER_LPACTIE_Msk); +} + +/** + * @brief LPActive error interrupt disable + * @rmtoll IER LPACTIE FL_PMU_DisableIT_LPActiveError + * @param PMUx PMU instance + * @retval None + */ +__STATIC_INLINE void FL_PMU_DisableIT_LPActiveError(PMU_Type *PMUx) +{ + CLEAR_BIT(PMUx->IER, PMU_IER_LPACTIE_Msk); +} + +/** + * @brief Sleep error interrupt enable + * @rmtoll IER SLPEIE FL_PMU_EnableIT_SleepError + * @param PMUx PMU instance + * @retval None + */ +__STATIC_INLINE void FL_PMU_EnableIT_SleepError(PMU_Type *PMUx) +{ + SET_BIT(PMUx->IER, PMU_IER_SLPEIE_Msk); +} + +/** + * @brief Get sleep error interrupt enable status + * @rmtoll IER SLPEIE FL_PMU_IsEnabledIT_SleepError + * @param PMUx PMU instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_PMU_IsEnabledIT_SleepError(PMU_Type *PMUx) +{ + return (uint32_t)(READ_BIT(PMUx->IER, PMU_IER_SLPEIE_Msk) == PMU_IER_SLPEIE_Msk); +} + +/** + * @brief Sleep error interrupt disable + * @rmtoll IER SLPEIE FL_PMU_DisableIT_SleepError + * @param PMUx PMU instance + * @retval None + */ +__STATIC_INLINE void FL_PMU_DisableIT_SleepError(PMU_Type *PMUx) +{ + CLEAR_BIT(PMUx->IER, PMU_IER_SLPEIE_Msk); +} + +/** + * @brief LPREIE error interrupt enable + * @rmtoll IER LPREIE FL_PMU_EnableIT_LPRunError + * @param PMUx PMU instance + * @retval None + */ +__STATIC_INLINE void FL_PMU_EnableIT_LPRunError(PMU_Type *PMUx) +{ + SET_BIT(PMUx->IER, PMU_IER_LPREIE_Msk); +} + +/** + * @brief Get LPREIE error interrupt enable status + * @rmtoll IER LPREIE FL_PMU_IsEnabledIT_LPRunError + * @param PMUx PMU instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_PMU_IsEnabledIT_LPRunError(PMU_Type *PMUx) +{ + return (uint32_t)(READ_BIT(PMUx->IER, PMU_IER_LPREIE_Msk) == PMU_IER_LPREIE_Msk); +} + +/** + * @brief LPREIE error interrupt disable + * @rmtoll IER LPREIE FL_PMU_DisableIT_LPRunError + * @param PMUx PMU instance + * @retval None + */ +__STATIC_INLINE void FL_PMU_DisableIT_LPRunError(PMU_Type *PMUx) +{ + CLEAR_BIT(PMUx->IER, PMU_IER_LPREIE_Msk); +} + +/** + * @brief Get LPACTIF error interrupt flag + * @rmtoll ISR LPACTIF FL_PMU_IsActiveFlag_LPActiveError + * @param PMUx PMU instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_PMU_IsActiveFlag_LPActiveError(PMU_Type *PMUx) +{ + return (uint32_t)(READ_BIT(PMUx->ISR, PMU_ISR_LPACTIF_Msk) == (PMU_ISR_LPACTIF_Msk)); +} + +/** + * @brief Clear LPACTIF error interrupt flag + * @rmtoll ISR LPACTIF FL_PMU_ClearFlag_LPActiveError + * @param PMUx PMU instance + * @retval None + */ +__STATIC_INLINE void FL_PMU_ClearFlag_LPActiveError(PMU_Type *PMUx) +{ + WRITE_REG(PMUx->ISR, PMU_ISR_LPACTIF_Msk); +} + +/** + * @brief Get SLEEP error interrupt flag + * @rmtoll ISR SLPEIF FL_PMU_IsActiveFlag_SleepError + * @param PMUx PMU instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_PMU_IsActiveFlag_SleepError(PMU_Type *PMUx) +{ + return (uint32_t)(READ_BIT(PMUx->ISR, PMU_ISR_SLPEIF_Msk) == (PMU_ISR_SLPEIF_Msk)); +} + +/** + * @brief Clear SLEEP error interrupt flag + * @rmtoll ISR SLPEIF FL_PMU_ClearFlag_SleepError + * @param PMUx PMU instance + * @retval None + */ +__STATIC_INLINE void FL_PMU_ClearFlag_SleepError(PMU_Type *PMUx) +{ + WRITE_REG(PMUx->ISR, PMU_ISR_SLPEIF_Msk); +} + +/** + * @brief Get LPRUN error interrupt flag + * @rmtoll ISR LPREIF FL_PMU_IsActiveFlag_LPRunError + * @param PMUx PMU instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_PMU_IsActiveFlag_LPRunError(PMU_Type *PMUx) +{ + return (uint32_t)(READ_BIT(PMUx->ISR, PMU_ISR_LPREIF_Msk) == (PMU_ISR_LPREIF_Msk)); +} + +/** + * @brief Clear LPRUN error interrupt flag + * @rmtoll ISR LPREIF FL_PMU_ClearFlag_LPRunError + * @param PMUx PMU instance + * @retval None + */ +__STATIC_INLINE void FL_PMU_ClearFlag_LPRunError(PMU_Type *PMUx) +{ + WRITE_REG(PMUx->ISR, PMU_ISR_LPREIF_Msk); +} + +/** + * @brief Set ULPBG output VREF + * @rmtoll ULPB_TR FL_PMU_WriteULPBGOutputTrim + * @param PMUx PMU instance + * @param trim + * @retval None + */ +__STATIC_INLINE void FL_PMU_WriteULPBGOutputTrim(PMU_Type *PMUx, uint32_t trim) +{ + MODIFY_REG(PMUx->ULPB_TR, (0x1fU << 0U), (trim << 0U)); +} + +/** + * @brief Get ULPBG output VREF + * @rmtoll ULPB_TR FL_PMU_ReadULPBGOutputTrim + * @param PMUx PMU instance + * @retval + */ +__STATIC_INLINE uint32_t FL_PMU_ReadULPBGOutputTrim(PMU_Type *PMUx) +{ + return (uint32_t)(READ_BIT(PMUx->ULPB_TR, (0x1fU << 0U)) >> 0U); +} + +/** + * @} + */ + +/** @defgroup PMU_FL_EF_Init Initialization and de-initialization functions + * @{ + */ +FL_ErrorStatus FL_PMU_Sleep_DeInit(PMU_Type *PMUx); +FL_ErrorStatus FL_PMU_Sleep_Init(PMU_Type *PMUx, FL_PMU_SleepInitTypeDef *LPM_InitStruct); +void FL_PMU_StructInit(FL_PMU_SleepInitTypeDef *LPM_InitStruct); + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif /* __FM33LG0XX_FL_PMU_H*/ + +/*************************Py_Code_Generator Version: 0.1-0.14-0.1 @ 2020-10-20*************************/ +/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/ diff --git a/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_rmu.h b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_rmu.h new file mode 100644 index 0000000..74fb259 --- /dev/null +++ b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_rmu.h @@ -0,0 +1,783 @@ + /** + ******************************************************************************************************* + * @file fm33lg0xx_fl_rmu.h + * @author FMSH Application Team + * @brief Head file of RMU FL Module + ******************************************************************************************************* + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + + + +/* Define to prevent recursive inclusion---------------------------------------------------------------*/ +#ifndef __FM33LG0XX_FL_RMU_H +#define __FM33LG0XX_FL_RMU_H + +#ifdef __cplusplus +extern "C" { +#endif +/* Includes -------------------------------------------------------------------------------------------*/ +#include "fm33lg0xx_fl_def.h" +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @defgroup RMU RMU + * @brief RMU FL driver + * @{ + */ + +/* Exported types -------------------------------------------------------------------------------------*/ +/** @defgroup RMU_FL_ES_INIT RMU Exported Init structures + * @{ + */ + +/** + * @brief FL RMU Init Sturcture definition + */ + +/** + * @} + */ +/* Exported constants ---------------------------------------------------------------------------------*/ +/** @defgroup RMU_FL_Exported_Constants RMU Exported Constants + * @{ + */ + +#define RMU_PDRCR_CFG_Pos (1U) +#define RMU_PDRCR_CFG_Msk (0x3U << RMU_PDRCR_CFG_Pos) +#define RMU_PDRCR_CFG RMU_PDRCR_CFG_Msk + +#define RMU_PDRCR_EN_Pos (0U) +#define RMU_PDRCR_EN_Msk (0x1U << RMU_PDRCR_EN_Pos) +#define RMU_PDRCR_EN RMU_PDRCR_EN_Msk + +#define RMU_BORCR_CFG_Pos (2U) +#define RMU_BORCR_CFG_Msk (0x3U << RMU_BORCR_CFG_Pos) +#define RMU_BORCR_CFG RMU_BORCR_CFG_Msk + +#define RMU_BORCR_ENB_Pos (0U) +#define RMU_BORCR_ENB_Msk (0x1U << RMU_BORCR_ENB_Pos) +#define RMU_BORCR_ENB RMU_BORCR_ENB_Msk + +#define RMU_LKPCR_EN_Pos (1U) +#define RMU_LKPCR_EN_Msk (0x1U << RMU_LKPCR_EN_Pos) +#define RMU_LKPCR_EN RMU_LKPCR_EN_Msk + +#define RMU_RSTFR_MDFN_FLAG_Pos (12Ul) +#define RMU_RSTFR_MDFN_FLAG_Msk (0x1Ul << RMU_RSTFR_MDFN_FLAG_Pos) +#define RMU_RSTFR_MDFN_FLAG RMU_RSTFR_MDFN_FLAG_Msk + +#define RMU_RSTFR_NRSTN_FLAG_Pos (11Ul) +#define RMU_RSTFR_NRSTN_FLAG_Msk (0x1Ul << RMU_RSTFR_NRSTN_FLAG_Pos) +#define RMU_RSTFR_NRSTN_FLAG RMU_RSTFR_NRSTN_FLAG_Msk + +#define RMU_RSTFR_PRC_FLAG_Pos (10U) +#define RMU_RSTFR_PRC_FLAG_Msk (0x1Ul << RMU_RSTFR_PRC_FLAG_Pos) +#define RMU_RSTFR_PRC_FLAG RMU_RSTFR_PRC_FLAG_Msk + +#define RMU_RSTFR_PORN_FLAG_Pos (9U) +#define RMU_RSTFR_PORN_FLAG_Msk (0x1Ul << RMU_RSTFR_PORN_FLAG_Pos) +#define RMU_RSTFR_PORN_FLAG RMU_RSTFR_PORN_FLAG_Msk + +#define RMU_RSTFR_PDRN_FLAG_Pos (8U) +#define RMU_RSTFR_PDRN_FLAG_Msk (0x1Ul << RMU_RSTFR_PDRN_FLAG_Pos) +#define RMU_RSTFR_PDRN_FLAG RMU_RSTFR_PDRN_FLAG_Msk + +#define RMU_RSTFR_SOFTN_FLAG_Pos (5U) +#define RMU_RSTFR_SOFTN_FLAG_Msk (0x1Ul << RMU_RSTFR_SOFTN_FLAG_Pos) +#define RMU_RSTFR_SOFTN_FLAG RMU_RSTFR_SOFTN_FLAG_Msk + +#define RMU_RSTFR_IWDTN_FLAG_Pos (4U) +#define RMU_RSTFR_IWDTN_FLAG_Msk (0x1Ul << RMU_RSTFR_IWDTN_FLAG_Pos) +#define RMU_RSTFR_IWDTN_FLAG RMU_RSTFR_IWDTN_FLAG_Msk + +#define RMU_RSTFR_WWDTN_FLAG_Pos (2U) +#define RMU_RSTFR_WWDTN_FLAG_Msk (0x1Ul << RMU_RSTFR_WWDTN_FLAG_Pos) +#define RMU_RSTFR_WWDTN_FLAG RMU_RSTFR_WWDTN_FLAG_Msk + +#define RMU_RSTFR_LKUPN_FLAG_Pos (1U) +#define RMU_RSTFR_LKUPN_FLAG_Msk (0x1Ul << RMU_RSTFR_LKUPN_FLAG_Pos) +#define RMU_RSTFR_LKUPN_FLAG RMU_RSTFR_LKUPN_FLAG_Msk + +#define RMU_RSTFR_NVICN_FLAG_Pos (0U) +#define RMU_RSTFR_NVICN_FLAG_Msk (0x1Ul << RMU_RSTFR_NVICN_FLAG_Pos) +#define RMU_RSTFR_NVICN_FLAG RMU_RSTFR_NVICN_FLAG_Msk + +#define PERHRSTEN_KEY (0x13579BDFUL) +#define SOFTWARERESET_KEY (0x5C5CAABBUL) + +#define FL_RMU_RSTAHB_DMA (0x1Ul << 0U) +#define FL_RMU_RSTAPB_UART5 (0x1fUl << 0U) +#define FL_RMU_RSTAPB_UART4 (0x1eUl << 0U) +#define FL_RMU_RSTAPB_UART3 (0x1dUl << 0U) +#define FL_RMU_RSTAPB_UART1 (0x1bUl << 0U) +#define FL_RMU_RSTAPB_UART0 (0x1aUl << 0U) +#define FL_RMU_RSTAPB_UCIR (0x19Ul << 0U) +#define FL_RMU_RSTAPB_U7816 (0x18Ul << 0U) +#define FL_RMU_RSTAPB_GPTIM2 (0x17Ul << 0U) +#define FL_RMU_RSTAPB_GPTIM1 (0x16Ul << 0U) +#define FL_RMU_RSTAPB_GPTIM0 (0x15Ul << 0U) +#define FL_RMU_RSTAPB_ATIM (0x14Ul << 0U) +#define FL_RMU_RSTAPB_BSTIM32 (0x13Ul << 0U) +#define FL_RMU_RSTAPB_BSTIM16 (0x12Ul << 0U) +#define FL_RMU_RSTAPB_SPI2 (0xfUl << 0U) +#define FL_RMU_RSTAPB_SPI1 (0xeUl << 0U) +#define FL_RMU_RSTAPB_SPI0 (0xdUl << 0U) +#define FL_RMU_RSTAPB_I2C (0xbUl << 0U) +#define FL_RMU_RSTAPB_LPUART2 (0xaUl << 0U) +#define FL_RMU_RSTAPB_LPUART1 (0x9Ul << 0U) +#define FL_RMU_RSTAPB_LPUART0 (0x8Ul << 0U) +#define FL_RMU_RSTAPB_VREF (0x6Ul << 0U) +#define FL_RMU_RSTAPB_PGL (0x5Ul << 0U) +#define FL_RMU_RSTAPB_LCD (0x4Ul << 0U) +#define FL_RMU_RSTAPB_DAC (0x3Ul << 0U) +#define FL_RMU_RSTAPB_OPA (0x2Ul << 0U) +#define FL_RMU_RSTAPB_LPTIM16 (0x1Ul << 0U) +#define FL_RMU_RSTAPB_LPTIM32 (0x0Ul << 0U) +#define FL_RMU_RSTAPB_ADCCR (0x38Ul << 0U) +#define FL_RMU_RSTAPB_ADC (0x37Ul << 0U) +#define FL_RMU_RSTAPB_AES (0x32Ul << 0U) +#define FL_RMU_RSTAPB_CRC (0x31Ul << 0U) +#define FL_RMU_RSTAPB_RNG (0x30Ul << 0U) +#define FL_RMU_RSTAPB_DIVAS (0x23Ul << 0U) +#define FL_RMU_RSTAPB_CAN (0x22Ul << 0U) +#define FL_RMU_RSTAPB_SVD (0x21Ul << 0U) +#define FL_RMU_RSTAPB_COMP (0x20Ul << 0U) + + + +#define FL_RMU_PDR_THRESHOLD_1P40V (0x0U << RMU_PDRCR_CFG_Pos) +#define FL_RMU_PDR_THRESHOLD_1P45V (0x1U << RMU_PDRCR_CFG_Pos) +#define FL_RMU_PDR_THRESHOLD_1P50V (0x2U << RMU_PDRCR_CFG_Pos) +#define FL_RMU_PDR_THRESHOLD_1P55V (0x3U << RMU_PDRCR_CFG_Pos) + + +#define FL_RMU_BOR_THRESHOLD_1P80V (0x0UL << RMU_BORCR_CFG_Pos) +#define FL_RMU_BOR_THRESHOLD_2P00V (0x1UL << RMU_BORCR_CFG_Pos) +#define FL_RMU_BOR_THRESHOLD_2P20V (0x2UL << RMU_BORCR_CFG_Pos) +#define FL_RMU_BOR_THRESHOLD_2P40V (0x3UL << RMU_BORCR_CFG_Pos) + + +/** + * @} + */ +/* Exported functions ---------------------------------------------------------------------------------*/ +/** @defgroup RMU_FL_Exported_Functions RMU Exported Functions + * @{ + */ + +/** + * @brief Set Power Down Reset Voltage + * @rmtoll PDRCR CFG FL_RMU_PDR_SetThreshold + * @param RMUx RMU instance + * @param threshold This parameter can be one of the following values: + * @arg @ref FL_RMU_PDR_THRESHOLD_1P40V + * @arg @ref FL_RMU_PDR_THRESHOLD_1P45V + * @arg @ref FL_RMU_PDR_THRESHOLD_1P50V + * @arg @ref FL_RMU_PDR_THRESHOLD_1P55V + * @retval None + */ +__STATIC_INLINE void FL_RMU_PDR_SetThreshold(RMU_Type *RMUx, uint32_t threshold) +{ + MODIFY_REG(RMUx->PDRCR, RMU_PDRCR_CFG_Msk, threshold); +} + +/** + * @brief Get Power Down Reset Voltage Setting + * @rmtoll PDRCR CFG FL_RMU_PDR_GetThreshold + * @param RMUx RMU instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_RMU_PDR_THRESHOLD_1P40V + * @arg @ref FL_RMU_PDR_THRESHOLD_1P45V + * @arg @ref FL_RMU_PDR_THRESHOLD_1P50V + * @arg @ref FL_RMU_PDR_THRESHOLD_1P55V + */ +__STATIC_INLINE uint32_t FL_RMU_PDR_GetThreshold(RMU_Type *RMUx) +{ + return (uint32_t)(READ_BIT(RMUx->PDRCR, RMU_PDRCR_CFG_Msk)); +} + +/** + * @brief Get Power Down Reset Enable Status + * @rmtoll PDRCR EN FL_RMU_PDR_IsEnabled + * @param RMUx RMU instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_RMU_PDR_IsEnabled(RMU_Type *RMUx) +{ + return (uint32_t)(READ_BIT(RMUx->PDRCR, RMU_PDRCR_EN_Msk) == RMU_PDRCR_EN_Msk); +} + +/** + * @brief Disable Power Down Reset + * @rmtoll PDRCR EN FL_RMU_PDR_Disable + * @param RMUx RMU instance + * @retval None + */ +__STATIC_INLINE void FL_RMU_PDR_Disable(RMU_Type *RMUx) +{ + CLEAR_BIT(RMUx->PDRCR, RMU_PDRCR_EN_Msk); +} + +/** + * @brief Enable Power Down Reset + * @rmtoll PDRCR EN FL_RMU_PDR_Enable + * @param RMUx RMU instance + * @retval None + */ +__STATIC_INLINE void FL_RMU_PDR_Enable(RMU_Type *RMUx) +{ + SET_BIT(RMUx->PDRCR, RMU_PDRCR_EN_Msk); +} + +/** + * @brief Set Brown Out Reset Voltage + * @rmtoll BORCR CFG FL_RMU_BOR_SetThreshold + * @param RMUx RMU instance + * @param threshold This parameter can be one of the following values: + * @arg @ref FL_RMU_BOR_THRESHOLD_1P80V + * @arg @ref FL_RMU_BOR_THRESHOLD_2P00V + * @arg @ref FL_RMU_BOR_THRESHOLD_2P20V + * @arg @ref FL_RMU_BOR_THRESHOLD_2P40V + * @retval None + */ +__STATIC_INLINE void FL_RMU_BOR_SetThreshold(RMU_Type *RMUx, uint32_t threshold) +{ + MODIFY_REG(RMUx->BORCR, RMU_BORCR_CFG_Msk, threshold); +} + +/** + * @brief Get Brown Out Reset Setting + * @rmtoll BORCR CFG FL_RMU_BOR_GetThreshold + * @param RMUx RMU instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_RMU_BOR_THRESHOLD_1P80V + * @arg @ref FL_RMU_BOR_THRESHOLD_2P00V + * @arg @ref FL_RMU_BOR_THRESHOLD_2P20V + * @arg @ref FL_RMU_BOR_THRESHOLD_2P40V + */ +__STATIC_INLINE uint32_t FL_RMU_BOR_GetThreshold(RMU_Type *RMUx) +{ + return (uint32_t)(READ_BIT(RMUx->BORCR, RMU_BORCR_CFG_Msk)); +} + +/** + * @brief Get Brown Out Reset Enable Status + * @rmtoll BORCR ENB FL_RMU_BOR_IsEnabled + * @param RMUx RMU instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_RMU_BOR_IsEnabled(RMU_Type *RMUx) +{ + return (uint32_t)!(READ_BIT(RMUx->BORCR, RMU_BORCR_ENB_Msk) == RMU_BORCR_ENB_Msk); +} + +/** + * @brief Disable Brown Out Reset + * @rmtoll BORCR ENB FL_RMU_BOR_Disable + * @param RMUx RMU instance + * @retval None + */ +__STATIC_INLINE void FL_RMU_BOR_Disable(RMU_Type *RMUx) +{ + SET_BIT(RMUx->BORCR, RMU_BORCR_ENB_Msk); +} + +/** + * @brief Enable Brown Out Reset + * @rmtoll BORCR ENB FL_RMU_BOR_Enable + * @param RMUx RMU instance + * @retval None + */ +__STATIC_INLINE void FL_RMU_BOR_Enable(RMU_Type *RMUx) +{ + CLEAR_BIT(RMUx->BORCR, RMU_BORCR_ENB_Msk); +} + +/** + * @brief Get LockUp Reset Enable Status + * @rmtoll LKPCR EN FL_RMU_IsEnabledLockUpReset + * @param RMUx RMU instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_RMU_IsEnabledLockUpReset(RMU_Type *RMUx) +{ + return (uint32_t)(READ_BIT(RMUx->LKPCR, RMU_LKPCR_EN_Msk) == RMU_LKPCR_EN_Msk); +} + +/** + * @brief Disable LockUp Reset + * @rmtoll LKPCR EN FL_RMU_DisableLockUpReset + * @param RMUx RMU instance + * @retval None + */ +__STATIC_INLINE void FL_RMU_DisableLockUpReset(RMU_Type *RMUx) +{ + CLEAR_BIT(RMUx->LKPCR, RMU_LKPCR_EN_Msk); +} + +/** + * @brief Enable LockUp Reset + * @rmtoll LKPCR EN FL_RMU_EnableLockUpReset + * @param RMUx RMU instance + * @retval None + */ +__STATIC_INLINE void FL_RMU_EnableLockUpReset(RMU_Type *RMUx) +{ + SET_BIT(RMUx->LKPCR, RMU_LKPCR_EN_Msk); +} + +/** + * @brief Soft Reset Chip + * @rmtoll SOFTRST FL_RMU_SetSoftReset + * @param RMUx RMU instance + * @retval None + */ +__STATIC_INLINE void FL_RMU_SetSoftReset(RMU_Type *RMUx) +{ + WRITE_REG(RMUx->SOFTRST, SOFTWARERESET_KEY); +} + +/** + * @brief Get MDF Reset Flag + * @rmtoll RSTFR MDFN_FLAG FL_RMU_IsActiveFlag_MDF + * @param RMUx RMU instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_RMU_IsActiveFlag_MDF(RMU_Type *RMUx) +{ + return (uint32_t)(READ_BIT(RMUx->RSTFR, RMU_RSTFR_MDFN_FLAG_Msk) == (RMU_RSTFR_MDFN_FLAG_Msk)); +} + +/** + * @brief Clear MDF Reset Flag + * @rmtoll RSTFR MDFN_FLAG FL_RMU_ClearFlag_MDF + * @param RMUx RMU instance + * @retval None + */ +__STATIC_INLINE void FL_RMU_ClearFlag_MDF(RMU_Type *RMUx) +{ + WRITE_REG(RMUx->RSTFR, RMU_RSTFR_MDFN_FLAG_Msk); +} + +/** + * @brief Get NRST Reset Flag + * @rmtoll RSTFR NRSTN_FLAG FL_RMU_IsActiveFlag_NRSTN + * @param RMUx RMU instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_RMU_IsActiveFlag_NRSTN(RMU_Type *RMUx) +{ + return (uint32_t)(READ_BIT(RMUx->RSTFR, RMU_RSTFR_NRSTN_FLAG_Msk) == (RMU_RSTFR_NRSTN_FLAG_Msk)); +} + +/** + * @brief Clear NRST Reset Flag + * @rmtoll RSTFR NRSTN_FLAG FL_RMU_ClearFlag_NRSTN + * @param RMUx RMU instance + * @retval None + */ +__STATIC_INLINE void FL_RMU_ClearFlag_NRSTN(RMU_Type *RMUx) +{ + WRITE_REG(RMUx->RSTFR, RMU_RSTFR_NRSTN_FLAG_Msk); +} + +/** + * @brief Get PRC Reset Flag + * @rmtoll RSTFR PRC_FLAG FL_RMU_IsActiveFlag_PRCN + * @param RMUx RMU instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_RMU_IsActiveFlag_PRCN(RMU_Type *RMUx) +{ + return (uint32_t)(READ_BIT(RMUx->RSTFR, RMU_RSTFR_PRC_FLAG_Msk) == (RMU_RSTFR_PRC_FLAG_Msk)); +} + +/** + * @brief Clear PRC Reset Flag + * @rmtoll RSTFR PRC_FLAG FL_RMU_ClearFlag_PRCN + * @param RMUx RMU instance + * @retval None + */ +__STATIC_INLINE void FL_RMU_ClearFlag_PRCN(RMU_Type *RMUx) +{ + WRITE_REG(RMUx->RSTFR, RMU_RSTFR_PRC_FLAG_Msk); +} + +/** + * @brief Get Power On Reset Flag + * @rmtoll RSTFR PORN_FLAG FL_RMU_IsActiveFlag_PORN + * @param RMUx RMU instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_RMU_IsActiveFlag_PORN(RMU_Type *RMUx) +{ + return (uint32_t)(READ_BIT(RMUx->RSTFR, RMU_RSTFR_PORN_FLAG_Msk) == (RMU_RSTFR_PORN_FLAG_Msk)); +} + +/** + * @brief Clear Power On Reset Flag + * @rmtoll RSTFR PORN_FLAG FL_RMU_ClearFlag_PORN + * @param RMUx RMU instance + * @retval None + */ +__STATIC_INLINE void FL_RMU_ClearFlag_PORN(RMU_Type *RMUx) +{ + WRITE_REG(RMUx->RSTFR, RMU_RSTFR_PORN_FLAG_Msk); +} + +/** + * @brief Get Power Down Reset Flag + * @rmtoll RSTFR PDRN_FLAG FL_RMU_IsActiveFlag_PDRN + * @param RMUx RMU instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_RMU_IsActiveFlag_PDRN(RMU_Type *RMUx) +{ + return (uint32_t)(READ_BIT(RMUx->RSTFR, RMU_RSTFR_PDRN_FLAG_Msk) == (RMU_RSTFR_PDRN_FLAG_Msk)); +} + +/** + * @brief Clear Power Down Reset Flag + * @rmtoll RSTFR PDRN_FLAG FL_RMU_ClearFlag_PDRN + * @param RMUx RMU instance + * @retval None + */ +__STATIC_INLINE void FL_RMU_ClearFlag_PDRN(RMU_Type *RMUx) +{ + WRITE_REG(RMUx->RSTFR, RMU_RSTFR_PDRN_FLAG_Msk); +} + +/** + * @brief Get Software Reset Flag + * @rmtoll RSTFR SOFTN_FLAG FL_RMU_IsActiveFlag_SOFTN + * @param RMUx RMU instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_RMU_IsActiveFlag_SOFTN(RMU_Type *RMUx) +{ + return (uint32_t)(READ_BIT(RMUx->RSTFR, RMU_RSTFR_SOFTN_FLAG_Msk) == (RMU_RSTFR_SOFTN_FLAG_Msk)); +} + +/** + * @brief Clear Software Reset Flag + * @rmtoll RSTFR SOFTN_FLAG FL_RMU_ClearFlag_SOFTN + * @param RMUx RMU instance + * @retval None + */ +__STATIC_INLINE void FL_RMU_ClearFlag_SOFTN(RMU_Type *RMUx) +{ + WRITE_REG(RMUx->RSTFR, RMU_RSTFR_SOFTN_FLAG_Msk); +} + +/** + * @brief Get IWDT Reset Flag + * @rmtoll RSTFR IWDTN_FLAG FL_RMU_IsActiveFlag_IWDTN + * @param RMUx RMU instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_RMU_IsActiveFlag_IWDTN(RMU_Type *RMUx) +{ + return (uint32_t)(READ_BIT(RMUx->RSTFR, RMU_RSTFR_IWDTN_FLAG_Msk) == (RMU_RSTFR_IWDTN_FLAG_Msk)); +} + +/** + * @brief Clear IWDT Reset Flag + * @rmtoll RSTFR IWDTN_FLAG FL_RMU_ClearFlag_IWDTN + * @param RMUx RMU instance + * @retval None + */ +__STATIC_INLINE void FL_RMU_ClearFlag_IWDTN(RMU_Type *RMUx) +{ + WRITE_REG(RMUx->RSTFR, RMU_RSTFR_IWDTN_FLAG_Msk); +} + +/** + * @brief Get WWDT Reset Flag + * @rmtoll RSTFR WWDTN_FLAG FL_RMU_IsActiveFlag_WWDTN + * @param RMUx RMU instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_RMU_IsActiveFlag_WWDTN(RMU_Type *RMUx) +{ + return (uint32_t)(READ_BIT(RMUx->RSTFR, RMU_RSTFR_WWDTN_FLAG_Msk) == (RMU_RSTFR_WWDTN_FLAG_Msk)); +} + +/** + * @brief Clear WWDT Reset Flag + * @rmtoll RSTFR WWDTN_FLAG FL_RMU_ClearFlag_WWDTN + * @param RMUx RMU instance + * @retval None + */ +__STATIC_INLINE void FL_RMU_ClearFlag_WWDTN(RMU_Type *RMUx) +{ + WRITE_REG(RMUx->RSTFR, RMU_RSTFR_WWDTN_FLAG_Msk); +} + +/** + * @brief Get LockUp Reset Flag + * @rmtoll RSTFR LKUPN_FLAG FL_RMU_IsActiveFlag_LKUPN + * @param RMUx RMU instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_RMU_IsActiveFlag_LKUPN(RMU_Type *RMUx) +{ + return (uint32_t)(READ_BIT(RMUx->RSTFR, RMU_RSTFR_LKUPN_FLAG_Msk) == (RMU_RSTFR_LKUPN_FLAG_Msk)); +} + +/** + * @brief Clear LockUp Reset Flag + * @rmtoll RSTFR LKUPN_FLAG FL_RMU_ClearFlag_LKUPN + * @param RMUx RMU instance + * @retval None + */ +__STATIC_INLINE void FL_RMU_ClearFlag_LKUPN(RMU_Type *RMUx) +{ + WRITE_REG(RMUx->RSTFR, RMU_RSTFR_LKUPN_FLAG_Msk); +} + +/** + * @brief Get NVIC Reset Flag + * @rmtoll RSTFR NVICN_FLAG FL_RMU_IsActiveFlag_NVICN + * @param RMUx RMU instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_RMU_IsActiveFlag_NVICN(RMU_Type *RMUx) +{ + return (uint32_t)(READ_BIT(RMUx->RSTFR, RMU_RSTFR_NVICN_FLAG_Msk) == (RMU_RSTFR_NVICN_FLAG_Msk)); +} + +/** + * @brief Clear NVIC Reset Flag + * @rmtoll RSTFR NVICN_FLAG FL_RMU_ClearFlag_NVICN + * @param RMUx RMU instance + * @retval None + */ +__STATIC_INLINE void FL_RMU_ClearFlag_NVICN(RMU_Type *RMUx) +{ + WRITE_REG(RMUx->RSTFR, RMU_RSTFR_NVICN_FLAG_Msk); +} + +/** + * @brief Disable Peripheral Reset + * @rmtoll PRSTEN FL_RMU_DisablePeripheralReset + * @param RMUx RMU instance + * @retval None + */ +__STATIC_INLINE void FL_RMU_DisablePeripheralReset(RMU_Type *RMUx) +{ + WRITE_REG(RMUx->PRSTEN, (~PERHRSTEN_KEY)); +} + +/** + * @brief Enable Peripheral Reset + * @rmtoll PRSTEN FL_RMU_EnablePeripheralReset + * @param RMUx RMU instance + * @retval None + */ +__STATIC_INLINE void FL_RMU_EnablePeripheralReset(RMU_Type *RMUx) +{ + WRITE_REG(RMUx->PRSTEN, PERHRSTEN_KEY); +} + +/** + * @brief Enable AHB Peripheral Reset + * @rmtoll AHBRSTCR FL_RMU_EnableResetAHBPeripheral + * @param RMUx RMU instance + * @param peripheral This parameter can be one of the following values: + * @arg @ref FL_RMU_RSTAHB_DMA + * @retval None + */ +__STATIC_INLINE void FL_RMU_EnableResetAHBPeripheral(RMU_Type *RMUx, uint32_t peripheral) +{ + SET_BIT(RMUx->AHBRSTCR, ((peripheral & 0xffffffff) << 0x0U)); +} + +/** + * @brief Enable APB Peripheral Reset1 + * @rmtoll APBRSTCR FL_RMU_EnableResetAPBPeripheral + * @param RMUx RMU instance + * @param peripheral This parameter can be one of the following values: + * @arg @ref FL_RMU_RSTAPB_UART5 + * @arg @ref FL_RMU_RSTAPB_UART4 + * @arg @ref FL_RMU_RSTAPB_UART3 + * @arg @ref FL_RMU_RSTAPB_UART1 + * @arg @ref FL_RMU_RSTAPB_UART0 + * @arg @ref FL_RMU_RSTAPB_UCIR + * @arg @ref FL_RMU_RSTAPB_U7816 + * @arg @ref FL_RMU_RSTAPB_GPTIM2 + * @arg @ref FL_RMU_RSTAPB_GPTIM1 + * @arg @ref FL_RMU_RSTAPB_GPTIM0 + * @arg @ref FL_RMU_RSTAPB_ATIM + * @arg @ref FL_RMU_RSTAPB_BSTIM32 + * @arg @ref FL_RMU_RSTAPB_BSTIM16 + * @arg @ref FL_RMU_RSTAPB_SPI2 + * @arg @ref FL_RMU_RSTAPB_SPI1 + * @arg @ref FL_RMU_RSTAPB_SPI0 + * @arg @ref FL_RMU_RSTAPB_I2C + * @arg @ref FL_RMU_RSTAPB_LPUART2 + * @arg @ref FL_RMU_RSTAPB_LPUART1 + * @arg @ref FL_RMU_RSTAPB_LPUART0 + * @arg @ref FL_RMU_RSTAPB_VREF + * @arg @ref FL_RMU_RSTAPB_PGL + * @arg @ref FL_RMU_RSTAPB_LCD + * @arg @ref FL_RMU_RSTAPB_DAC + * @arg @ref FL_RMU_RSTAPB_OPA + * @arg @ref FL_RMU_RSTAPB_LPTIM16 + * @arg @ref FL_RMU_RSTAPB_LPTIM32 + * @arg @ref FL_RMU_RSTAPB_ADCCR + * @arg @ref FL_RMU_RSTAPB_ADC + * @arg @ref FL_RMU_RSTAPB_AES + * @arg @ref FL_RMU_RSTAPB_CRC + * @arg @ref FL_RMU_RSTAPB_RNG + * @arg @ref FL_RMU_RSTAPB_DIVAS + * @arg @ref FL_RMU_RSTAPB_CAN + * @arg @ref FL_RMU_RSTAPB_SVD + * @arg @ref FL_RMU_RSTAPB_COMP + * @retval None + */ +__STATIC_INLINE void FL_RMU_EnableResetAPBPeripheral(RMU_Type *RMUx, uint32_t peripheral) +{ + if(peripheral < FL_RMU_RSTAPB_COMP) + { + SET_BIT(RMUx->APBRSTCR1, (0x1U << peripheral)); + } + else + { + SET_BIT(RMUx->APBRSTCR2, (0x1U << (peripheral - 32))); + } +} + +/** + * @brief Disable AHB Peripheral Reset + * @rmtoll AHBRSTCR FL_RMU_DisableResetAHBPeripheral + * @param RMUx RMU instance + * @param peripheral This parameter can be one of the following values: + * @arg @ref FL_RMU_RSTAHB_DMA + * @retval None + */ +__STATIC_INLINE void FL_RMU_DisableResetAHBPeripheral(RMU_Type *RMUx, uint32_t peripheral) +{ + CLEAR_BIT(RMUx->AHBRSTCR, ((peripheral & 0xffffffff) << 0x0U)); +} + +/** + * @brief Disable APB Peripheral Reset1 + * @rmtoll APBRSTCR FL_RMU_DisableResetAPBPeripheral + * @param RMUx RMU instance + * @param peripheral This parameter can be one of the following values: + * @arg @ref FL_RMU_RSTAPB_UART5 + * @arg @ref FL_RMU_RSTAPB_UART4 + * @arg @ref FL_RMU_RSTAPB_UART3 + * @arg @ref FL_RMU_RSTAPB_UART1 + * @arg @ref FL_RMU_RSTAPB_UART0 + * @arg @ref FL_RMU_RSTAPB_UCIR + * @arg @ref FL_RMU_RSTAPB_U7816 + * @arg @ref FL_RMU_RSTAPB_GPTIM2 + * @arg @ref FL_RMU_RSTAPB_GPTIM1 + * @arg @ref FL_RMU_RSTAPB_GPTIM0 + * @arg @ref FL_RMU_RSTAPB_ATIM + * @arg @ref FL_RMU_RSTAPB_BSTIM32 + * @arg @ref FL_RMU_RSTAPB_BSTIM16 + * @arg @ref FL_RMU_RSTAPB_SPI2 + * @arg @ref FL_RMU_RSTAPB_SPI1 + * @arg @ref FL_RMU_RSTAPB_SPI0 + * @arg @ref FL_RMU_RSTAPB_I2C + * @arg @ref FL_RMU_RSTAPB_LPUART2 + * @arg @ref FL_RMU_RSTAPB_LPUART1 + * @arg @ref FL_RMU_RSTAPB_LPUART0 + * @arg @ref FL_RMU_RSTAPB_VREF + * @arg @ref FL_RMU_RSTAPB_PGL + * @arg @ref FL_RMU_RSTAPB_LCD + * @arg @ref FL_RMU_RSTAPB_DAC + * @arg @ref FL_RMU_RSTAPB_OPA + * @arg @ref FL_RMU_RSTAPB_LPTIM16 + * @arg @ref FL_RMU_RSTAPB_LPTIM32 + * @arg @ref FL_RMU_RSTAPB_ADCCR + * @arg @ref FL_RMU_RSTAPB_ADC + * @arg @ref FL_RMU_RSTAPB_AES + * @arg @ref FL_RMU_RSTAPB_CRC + * @arg @ref FL_RMU_RSTAPB_RNG + * @arg @ref FL_RMU_RSTAPB_DIVAS + * @arg @ref FL_RMU_RSTAPB_CAN + * @arg @ref FL_RMU_RSTAPB_SVD + * @arg @ref FL_RMU_RSTAPB_COMP + * @retval None + */ +__STATIC_INLINE void FL_RMU_DisableResetAPBPeripheral(RMU_Type *RMUx, uint32_t peripheral) +{ + if(peripheral < FL_RMU_RSTAPB_COMP) + { + CLEAR_BIT(RMUx->APBRSTCR1, (0x1U << peripheral)); + } + else + { + CLEAR_BIT(RMUx->APBRSTCR2, (0x1U << (peripheral - 32))); + } +} + +/** + * @} + */ + +/** @defgroup RMU_FL_EF_Init Initialization and de-initialization functions + * @{ + */ + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif /* __FM33LG0XX_FL_RMU_H*/ + +/*************************Py_Code_Generator Version: 0.1-0.14-0.1 @ 2020-10-20*************************/ +/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/ diff --git a/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_rng.h b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_rng.h new file mode 100644 index 0000000..0ea1aa1 --- /dev/null +++ b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_rng.h @@ -0,0 +1,280 @@ + /** + ******************************************************************************************************* + * @file fm33lg0xx_fl_rng.h + * @author FMSH Application Team + * @brief Head file of RNG FL Module + ******************************************************************************************************* + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + + + +/* Define to prevent recursive inclusion---------------------------------------------------------------*/ +#ifndef __FM33LG0XX_FL_RNG_H +#define __FM33LG0XX_FL_RNG_H + +#ifdef __cplusplus +extern "C" { +#endif +/* Includes -------------------------------------------------------------------------------------------*/ +#include "fm33lg0xx_fl_def.h" +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @defgroup RNG RNG + * @brief RNG FL driver + * @{ + */ + +/* Exported types -------------------------------------------------------------------------------------*/ +/** @defgroup RNG_FL_ES_INIT RNG Exported Init structures + * @{ + */ + +/** + * @brief FL RNG Init Sturcture definition + */ + +/** + * @} + */ +/* Exported constants ---------------------------------------------------------------------------------*/ +/** @defgroup RNG_FL_Exported_Constants RNG Exported Constants + * @{ + */ + +#define RNG_CR_EN_Pos (0U) +#define RNG_CR_EN_Msk (0x1U << RNG_CR_EN_Pos) +#define RNG_CR_EN RNG_CR_EN_Msk + +#define RNG_SR_RBUSY_Pos (1U) +#define RNG_SR_RBUSY_Msk (0x1U << RNG_SR_RBUSY_Pos) +#define RNG_SR_RBUSY RNG_SR_RBUSY_Msk + +#define RNG_SR_RNF_Pos (0U) +#define RNG_SR_RNF_Msk (0x1U << RNG_SR_RNF_Pos) +#define RNG_SR_RNF RNG_SR_RNF_Msk + +#define RNG_CRCCR_CRCEN_Pos (0U) +#define RNG_CRCCR_CRCEN_Msk (0x1U << RNG_CRCCR_CRCEN_Pos) +#define RNG_CRCCR_CRCEN RNG_CRCCR_CRCEN_Msk + +#define RNG_CRCSR_CRCDONE_Pos (0U) +#define RNG_CRCSR_CRCDONE_Msk (0x1U << RNG_CRCSR_CRCDONE_Pos) +#define RNG_CRCSR_CRCDONE RNG_CRCSR_CRCDONE_Msk + + + + + + +/** + * @} + */ +/* Exported functions ---------------------------------------------------------------------------------*/ +/** @defgroup RNG_FL_Exported_Functions RNG Exported Functions + * @{ + */ + +/** + * @brief RNG enable + * @rmtoll CR EN FL_RNG_Enable + * @param RNGx RNG instance + * @retval None + */ +__STATIC_INLINE void FL_RNG_Enable(RNG_Type *RNGx) +{ + SET_BIT(RNGx->CR, RNG_CR_EN_Msk); +} + +/** + * @brief RNG enable status + * @rmtoll CR EN FL_RNG_IsEnabled + * @param RNGx RNG instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_RNG_IsEnabled(RNG_Type *RNGx) +{ + return (uint32_t)(READ_BIT(RNGx->CR, RNG_CR_EN_Msk) == RNG_CR_EN_Msk); +} + +/** + * @brief RNG disable + * @rmtoll CR EN FL_RNG_Disable + * @param RNGx RNG instance + * @retval None + */ +__STATIC_INLINE void FL_RNG_Disable(RNG_Type *RNGx) +{ + CLEAR_BIT(RNGx->CR, RNG_CR_EN_Msk); +} + +/** + * @brief Read RNG output data register + * @rmtoll DOR FL_RNG_ReadData + * @param RNGx RNG instance + * @retval + */ +__STATIC_INLINE uint32_t FL_RNG_ReadData(RNG_Type *RNGx) +{ + return (uint32_t)(READ_BIT(RNGx->DOR, (0xffffffffU << 0U)) >> 0U); +} + +/** + * @brief Get LFSR Flag + * @rmtoll SR RBUSY FL_RNG_IsActiveFlag_Busy + * @param RNGx RNG instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_RNG_IsActiveFlag_Busy(RNG_Type *RNGx) +{ + return (uint32_t)(READ_BIT(RNGx->SR, RNG_SR_RBUSY_Msk) == (RNG_SR_RBUSY_Msk)); +} + +/** + * @brief Get random number fail flag + * @rmtoll SR RNF FL_RNG_IsActiveFlag_RandomFail + * @param RNGx RNG instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_RNG_IsActiveFlag_RandomFail(RNG_Type *RNGx) +{ + return (uint32_t)(READ_BIT(RNGx->SR, RNG_SR_RNF_Msk) == (RNG_SR_RNF_Msk)); +} + +/** + * @brief Clear random number fail flag + * @rmtoll SR RNF FL_RNG_ClearFlag_RandomFail + * @param RNGx RNG instance + * @retval None + */ +__STATIC_INLINE void FL_RNG_ClearFlag_RandomFail(RNG_Type *RNGx) +{ + WRITE_REG(RNGx->SR, RNG_SR_RNF_Msk); +} + +/** + * @brief CRC enable + * @rmtoll CRCCR CRCEN FL_RNG_CRC_Enable + * @param RNGx RNG instance + * @retval None + */ +__STATIC_INLINE void FL_RNG_CRC_Enable(RNG_Type *RNGx) +{ + SET_BIT(RNGx->CRCCR, RNG_CRCCR_CRCEN_Msk); +} + +/** + * @brief Get CRC enable status + * @rmtoll CRCCR CRCEN FL_RNG_CRC_IsEnabled + * @param RNGx RNG instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_RNG_CRC_IsEnabled(RNG_Type *RNGx) +{ + return (uint32_t)(READ_BIT(RNGx->CRCCR, RNG_CRCCR_CRCEN_Msk) == RNG_CRCCR_CRCEN_Msk); +} + +/** + * @brief Write CRC data input + * @rmtoll CRCDIR FL_RNG_CRC_WriteData + * @param RNGx RNG instance + * @param data + * @retval None + */ +__STATIC_INLINE void FL_RNG_CRC_WriteData(RNG_Type *RNGx, uint32_t data) +{ + MODIFY_REG(RNGx->CRCDIR, (0xffffffffU << 0U), (data << 0U)); +} + +/** + * @brief Get CRC calculation done Flag + * @rmtoll CRCSR CRCDONE FL_RNG_IsActiveFlag_CRCComplete + * @param RNGx RNG instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_RNG_IsActiveFlag_CRCComplete(RNG_Type *RNGx) +{ + return (uint32_t)(READ_BIT(RNGx->CRCSR, RNG_CRCSR_CRCDONE_Msk) == (RNG_CRCSR_CRCDONE_Msk)); +} + +/** + * @brief Clear CRC calculation done Flag + * @rmtoll CRCSR CRCDONE FL_RNG_ClearFlag_CRCComplete + * @param RNGx RNG instance + * @retval None + */ +__STATIC_INLINE void FL_RNG_ClearFlag_CRCComplete(RNG_Type *RNGx) +{ + CLEAR_BIT(RNGx->CRCSR, RNG_CRCSR_CRCDONE_Msk); +} + +/** + * @} + */ + +/** @defgroup RNG_FL_EF_Init Initialization and de-initialization functions + * @{ + */ +FL_ErrorStatus FL_RNG_DeInit(RNG_Type *RNGx); +FL_ErrorStatus FL_RNG_Init(RNG_Type *RNGx); +uint32_t GetRandomNumber(void); +uint32_t GetCrc32(uint32_t dataIn); + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif /* __FM33LG0XX_FL_RNG_H*/ + +/*************************Py_Code_Generator Version: 0.1-0.11-0.1 @ 2020-09-12*************************/ +/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/ diff --git a/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_rtca.h b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_rtca.h new file mode 100644 index 0000000..5e0c0a4 --- /dev/null +++ b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_rtca.h @@ -0,0 +1,1399 @@ + /** + ******************************************************************************************************* + * @file fm33lg0xx_fl_rtca.h + * @author FMSH Application Team + * @brief Head file of RTCA FL Module + ******************************************************************************************************* + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + + + +/* Define to prevent recursive inclusion---------------------------------------------------------------*/ +#ifndef __FM33LG0XX_FL_RTCA_H +#define __FM33LG0XX_FL_RTCA_H + +#ifdef __cplusplus +extern "C" { +#endif +/* Includes -------------------------------------------------------------------------------------------*/ +#include "fm33lg0xx_fl_def.h" +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @defgroup RTCA RTCA + * @brief RTCA FL driver + * @{ + */ + +/* Exported types -------------------------------------------------------------------------------------*/ +/** @defgroup RTCA_FL_ES_INIT RTCA Exported Init structures + * @{ + */ + +/** + * @brief FL RTCA Init Sturcture definition + */ +typedef struct +{ + /** 年 */ + uint32_t year; + /** 月 */ + uint32_t month; + /** 日 */ + uint32_t day; + /** 周 */ + uint32_t week; + /** 时 */ + uint32_t hour; + /** 分 */ + uint32_t minute; + /** 秒 */ + uint32_t second; + +} FL_RTCA_InitTypeDef; +/** + * @} + */ +/* Exported constants ---------------------------------------------------------------------------------*/ +/** @defgroup RTCA_FL_Exported_Constants RTCA Exported Constants + * @{ + */ + +#define RTCA_IER_ADJ_IE_Pos (12Ul) +#define RTCA_IER_ADJ_IE_Msk (0x1Ul << RTCA_IER_ADJ_IE_Pos) +#define RTCA_IER_ADJ_IE RTCA_IER_ADJ_IE_Msk + +#define RTCA_IER_ALARM_IE_Pos (11U) +#define RTCA_IER_ALARM_IE_Msk (0x1Ul << RTCA_IER_ALARM_IE_Pos) +#define RTCA_IER_ALARM_IE RTCA_IER_ALARM_IE_Msk + +#define RTCA_IER_1KHZ_IE_Pos (10U) +#define RTCA_IER_1KHZ_IE_Msk (0x1Ul << RTCA_IER_1KHZ_IE_Pos) +#define RTCA_IER_1KHZ_IE RTCA_IER_1KHZ_IE_Msk + +#define RTCA_IER_256HZ_IE_Pos (9U) +#define RTCA_IER_256HZ_IE_Msk (0x1Ul << RTCA_IER_256HZ_IE_Pos) +#define RTCA_IER_256HZ_IE RTCA_IER_256HZ_IE_Msk + +#define RTCA_IER_64HZ_IE_Pos (8U) +#define RTCA_IER_64HZ_IE_Msk (0x1Ul << RTCA_IER_64HZ_IE_Pos) +#define RTCA_IER_64HZ_IE RTCA_IER_64HZ_IE_Msk + +#define RTCA_IER_16HZ_IE_Pos (7U) +#define RTCA_IER_16HZ_IE_Msk (0x1Ul << RTCA_IER_16HZ_IE_Pos) +#define RTCA_IER_16HZ_IE RTCA_IER_16HZ_IE_Msk + +#define RTCA_IER_8HZ_IE_Pos (6U) +#define RTCA_IER_8HZ_IE_Msk (0x1Ul << RTCA_IER_8HZ_IE_Pos) +#define RTCA_IER_8HZ_IE RTCA_IER_8HZ_IE_Msk + +#define RTCA_IER_4HZ_IE_Pos (5U) +#define RTCA_IER_4HZ_IE_Msk (0x1Ul << RTCA_IER_4HZ_IE_Pos) +#define RTCA_IER_4HZ_IE RTCA_IER_4HZ_IE_Msk + +#define RTCA_IER_2HZ_IE_Pos (4U) +#define RTCA_IER_2HZ_IE_Msk (0x1Ul << RTCA_IER_2HZ_IE_Pos) +#define RTCA_IER_2HZ_IE RTCA_IER_2HZ_IE_Msk + +#define RTCA_IER_SEC_IE_Pos (3U) +#define RTCA_IER_SEC_IE_Msk (0x1Ul << RTCA_IER_SEC_IE_Pos) +#define RTCA_IER_SEC_IE RTCA_IER_SEC_IE_Msk + +#define RTCA_IER_MIN_IE_Pos (2U) +#define RTCA_IER_MIN_IE_Msk (0x1Ul << RTCA_IER_MIN_IE_Pos) +#define RTCA_IER_MIN_IE RTCA_IER_MIN_IE_Msk + +#define RTCA_IER_HOUR_IE_Pos (1U) +#define RTCA_IER_HOUR_IE_Msk (0x1Ul << RTCA_IER_HOUR_IE_Pos) +#define RTCA_IER_HOUR_IE RTCA_IER_HOUR_IE_Msk + +#define RTCA_IER_DAY_IE_Pos (0U) +#define RTCA_IER_DAY_IE_Msk (0x1Ul << RTCA_IER_DAY_IE_Pos) +#define RTCA_IER_DAY_IE RTCA_IER_DAY_IE_Msk + +#define RTCA_ISR_ADJ_IF_Pos (12U) +#define RTCA_ISR_ADJ_IF_Msk (0x1Ul << RTCA_ISR_ADJ_IF_Pos) +#define RTCA_ISR_ADJ_IF RTCA_ISR_ADJ_IF_Msk + +#define RTCA_ISR_ALARM_IF_Pos (11U) +#define RTCA_ISR_ALARM_IF_Msk (0x1Ul << RTCA_ISR_ALARM_IF_Pos) +#define RTCA_ISR_ALARM_IF RTCA_ISR_ALARM_IF_Msk + +#define RTCA_ISR_1KHZ_IF_Pos (10U) +#define RTCA_ISR_1KHZ_IF_Msk (0x1Ul << RTCA_ISR_1KHZ_IF_Pos) +#define RTCA_ISR_1KHZ_IF RTCA_ISR_1KHZ_IF_Msk + +#define RTCA_ISR_256HZ_IF_Pos (9U) +#define RTCA_ISR_256HZ_IF_Msk (0x1Ul << RTCA_ISR_256HZ_IF_Pos) +#define RTCA_ISR_256HZ_IF RTCA_ISR_256HZ_IF_Msk + +#define RTCA_ISR_64HZ_IF_Pos (8U) +#define RTCA_ISR_64HZ_IF_Msk (0x1Ul << RTCA_ISR_64HZ_IF_Pos) +#define RTCA_ISR_64HZ_IF RTCA_ISR_64HZ_IF_Msk + +#define RTCA_ISR_16HZ_IF_Pos (7U) +#define RTCA_ISR_16HZ_IF_Msk (0x1Ul << RTCA_ISR_16HZ_IF_Pos) +#define RTCA_ISR_16HZ_IF RTCA_ISR_16HZ_IF_Msk + +#define RTCA_ISR_8HZ_IF_Pos (6U) +#define RTCA_ISR_8HZ_IF_Msk (0x1Ul << RTCA_ISR_8HZ_IF_Pos) +#define RTCA_ISR_8HZ_IF RTCA_ISR_8HZ_IF_Msk + +#define RTCA_ISR_4HZ_IF_Pos (5U) +#define RTCA_ISR_4HZ_IF_Msk (0x1Ul << RTCA_ISR_4HZ_IF_Pos) +#define RTCA_ISR_4HZ_IF RTCA_ISR_4HZ_IF_Msk + +#define RTCA_ISR_2HZ_IF_Pos (4U) +#define RTCA_ISR_2HZ_IF_Msk (0x1Ul << RTCA_ISR_2HZ_IF_Pos) +#define RTCA_ISR_2HZ_IF RTCA_ISR_2HZ_IF_Msk + +#define RTCA_ISR_SEC_IF_Pos (3U) +#define RTCA_ISR_SEC_IF_Msk (0x1Ul << RTCA_ISR_SEC_IF_Pos) +#define RTCA_ISR_SEC_IF RTCA_ISR_SEC_IF_Msk + +#define RTCA_ISR_MIN_IF_Pos (2U) +#define RTCA_ISR_MIN_IF_Msk (0x1Ul << RTCA_ISR_MIN_IF_Pos) +#define RTCA_ISR_MIN_IF RTCA_ISR_MIN_IF_Msk + +#define RTCA_ISR_HOUR_IF_Pos (1U) +#define RTCA_ISR_HOUR_IF_Msk (0x1Ul << RTCA_ISR_HOUR_IF_Pos) +#define RTCA_ISR_HOUR_IF RTCA_ISR_HOUR_IF_Msk + +#define RTCA_ISR_DAY_IF_Pos (0U) +#define RTCA_ISR_DAY_IF_Msk (0x1Ul << RTCA_ISR_DAY_IF_Pos) +#define RTCA_ISR_DAY_IF RTCA_ISR_DAY_IF_Msk + +#define RTCA_TMSEL_TMSEL_Pos (0U) +#define RTCA_TMSEL_TMSEL_Msk (0xfUl << RTCA_TMSEL_TMSEL_Pos) +#define RTCA_TMSEL_TMSEL RTCA_TMSEL_TMSEL_Msk + +#define RTCA_ADJUST_ADSIGN_Pos (9U) +#define RTCA_ADJUST_ADSIGN_Msk (0x1Ul << RTCA_ADJUST_ADSIGN_Pos) +#define RTCA_ADJUST_ADSIGN RTCA_ADJUST_ADSIGN_Msk + +#define RTCA_CR_EN_Pos (0U) +#define RTCA_CR_EN_Msk (0x1Ul << RTCA_CR_EN_Pos) +#define RTCA_CR_EN RTCA_CR_EN_Msk + + + + + + +#define FL_RTCA_TIME_MARK_SECOND (0x2Ul << RTCA_TMSEL_TMSEL_Pos) +#define FL_RTCA_TIME_MARK_MINUTE (0x3Ul << RTCA_TMSEL_TMSEL_Pos) +#define FL_RTCA_TIME_MARK_HOUR (0x4Ul << RTCA_TMSEL_TMSEL_Pos) +#define FL_RTCA_TIME_MARK_DAY (0x5Ul << RTCA_TMSEL_TMSEL_Pos) +#define FL_RTCA_TIME_MARK_ALARM (0x6Ul << RTCA_TMSEL_TMSEL_Pos) +#define FL_RTCA_TIME_MARK_32_SEC (0x7Ul << RTCA_TMSEL_TMSEL_Pos) +#define FL_RTCA_TIME_MARK_SECOND_REVERSE (0x9Ul << RTCA_TMSEL_TMSEL_Pos) +#define FL_RTCA_TIME_MARK_MINUTE_REVERSE (0xaUl << RTCA_TMSEL_TMSEL_Pos) +#define FL_RTCA_TIME_MARK_HOUR_REVERSE (0xbUl << RTCA_TMSEL_TMSEL_Pos) +#define FL_RTCA_TIME_MARK_DAY_REVERSE (0xcUl << RTCA_TMSEL_TMSEL_Pos) +#define FL_RTCA_TIME_MARK_ALARM_REVERSE (0xdUl << RTCA_TMSEL_TMSEL_Pos) +#define FL_RTCA_TIME_MARK_SEC (0xfUl << RTCA_TMSEL_TMSEL_Pos) + + +#define FL_RTCA_ADJUST_DIR_INCREASE (0x0U << RTCA_ADJUST_ADSIGN_Pos) +#define FL_RTCA_ADJUST_DIR_DECREASE (0x1U << RTCA_ADJUST_ADSIGN_Pos) + + +/** + * @} + */ +/* Exported functions ---------------------------------------------------------------------------------*/ +/** @defgroup RTCA_FL_Exported_Functions RTCA Exported Functions + * @{ + */ + +/** + * @brief Enable RTCA Config Time + * @rmtoll WER FL_RTCA_WriteEnable + * @param RTCAx RTCA instance + * @retval None + */ +__STATIC_INLINE void FL_RTCA_WriteEnable(RTCA_Type *RTCAx) +{ + RTCAx->WER = 0xACACACAC; +} + +/** + * @brief Disable RTCA Config Time + * @rmtoll WER FL_RTCA_WriteDisable + * @param RTCAx RTCA instance + * @retval None + */ +__STATIC_INLINE void FL_RTCA_WriteDisable(RTCA_Type *RTCAx) +{ + RTCAx->WER = 0x5A5A5A5A; +} + +/** + * @brief Enable RTCA Time Adjust Interrupt + * @rmtoll IER ADJ_IE FL_RTCA_EnableIT_Adjust + * @param RTCAx RTCA instance + * @retval None + */ +__STATIC_INLINE void FL_RTCA_EnableIT_Adjust(RTCA_Type *RTCAx) +{ + SET_BIT(RTCAx->IER, RTCA_IER_ADJ_IE_Msk); +} + +/** + * @brief Get RTCA Time Adjust Interrupt Enable Status + * @rmtoll IER ADJ_IE FL_RTCA_IsEnabledIT_Adjust + * @param RTCAx RTCA instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_RTCA_IsEnabledIT_Adjust(RTCA_Type *RTCAx) +{ + return (uint32_t)(READ_BIT(RTCAx->IER, RTCA_IER_ADJ_IE_Msk) == RTCA_IER_ADJ_IE_Msk); +} + +/** + * @brief Disable RTCA Time Adjust Interrupt + * @rmtoll IER ADJ_IE FL_RTCA_DisableIT_Adjust + * @param RTCAx RTCA instance + * @retval None + */ +__STATIC_INLINE void FL_RTCA_DisableIT_Adjust(RTCA_Type *RTCAx) +{ + CLEAR_BIT(RTCAx->IER, RTCA_IER_ADJ_IE_Msk); +} + +/** + * @brief Enable RTCA Alarm Interrupt + * @rmtoll IER ALARM_IE FL_RTCA_EnableIT_Alarm + * @param RTCAx RTCA instance + * @retval None + */ +__STATIC_INLINE void FL_RTCA_EnableIT_Alarm(RTCA_Type *RTCAx) +{ + SET_BIT(RTCAx->IER, RTCA_IER_ALARM_IE_Msk); +} + +/** + * @brief Get RTCA Alarm Interrupt Enable Status + * @rmtoll IER ALARM_IE FL_RTCA_IsEnabledIT_Alarm + * @param RTCAx RTCA instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_RTCA_IsEnabledIT_Alarm(RTCA_Type *RTCAx) +{ + return (uint32_t)(READ_BIT(RTCAx->IER, RTCA_IER_ALARM_IE_Msk) == RTCA_IER_ALARM_IE_Msk); +} + +/** + * @brief Disable RTCA Alarm Interrupt + * @rmtoll IER ALARM_IE FL_RTCA_DisableIT_Alarm + * @param RTCAx RTCA instance + * @retval None + */ +__STATIC_INLINE void FL_RTCA_DisableIT_Alarm(RTCA_Type *RTCAx) +{ + CLEAR_BIT(RTCAx->IER, RTCA_IER_ALARM_IE_Msk); +} + +/** + * @brief Enable RTCA 1KHz Interrupt + * @rmtoll IER 1KHZ_IE FL_RTCA_EnableIT_1KHz + * @param RTCAx RTCA instance + * @retval None + */ +__STATIC_INLINE void FL_RTCA_EnableIT_1KHz(RTCA_Type *RTCAx) +{ + SET_BIT(RTCAx->IER, RTCA_IER_1KHZ_IE_Msk); +} + +/** + * @brief Get RTCA 1KHz Interrupt Enable Status + * @rmtoll IER 1KHZ_IE FL_RTCA_IsEnabledIT_1KHz + * @param RTCAx RTCA instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_RTCA_IsEnabledIT_1KHz(RTCA_Type *RTCAx) +{ + return (uint32_t)(READ_BIT(RTCAx->IER, RTCA_IER_1KHZ_IE_Msk) == RTCA_IER_1KHZ_IE_Msk); +} + +/** + * @brief Disable RTCA 1KHz Interrupt + * @rmtoll IER 1KHZ_IE FL_RTCA_DisableIT_1KHz + * @param RTCAx RTCA instance + * @retval None + */ +__STATIC_INLINE void FL_RTCA_DisableIT_1KHz(RTCA_Type *RTCAx) +{ + CLEAR_BIT(RTCAx->IER, RTCA_IER_1KHZ_IE_Msk); +} + +/** + * @brief Enable RTCA 256Hz Interrupt + * @rmtoll IER 256HZ_IE FL_RTCA_EnableIT_256Hz + * @param RTCAx RTCA instance + * @retval None + */ +__STATIC_INLINE void FL_RTCA_EnableIT_256Hz(RTCA_Type *RTCAx) +{ + SET_BIT(RTCAx->IER, RTCA_IER_256HZ_IE_Msk); +} + +/** + * @brief Get RTCA 256Hz Interrupt Enable Status + * @rmtoll IER 256HZ_IE FL_RTCA_IsEnabledIT_256Hz + * @param RTCAx RTCA instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_RTCA_IsEnabledIT_256Hz(RTCA_Type *RTCAx) +{ + return (uint32_t)(READ_BIT(RTCAx->IER, RTCA_IER_256HZ_IE_Msk) == RTCA_IER_256HZ_IE_Msk); +} + +/** + * @brief Disable RTCA 256Hz Interrupt + * @rmtoll IER 256HZ_IE FL_RTCA_DisableIT_256Hz + * @param RTCAx RTCA instance + * @retval None + */ +__STATIC_INLINE void FL_RTCA_DisableIT_256Hz(RTCA_Type *RTCAx) +{ + CLEAR_BIT(RTCAx->IER, RTCA_IER_256HZ_IE_Msk); +} + +/** + * @brief Enable RTCA 64Hz Interrupt + * @rmtoll IER 64HZ_IE FL_RTCA_EnableIT_64Hz + * @param RTCAx RTCA instance + * @retval None + */ +__STATIC_INLINE void FL_RTCA_EnableIT_64Hz(RTCA_Type *RTCAx) +{ + SET_BIT(RTCAx->IER, RTCA_IER_64HZ_IE_Msk); +} + +/** + * @brief Get RTCA 64Hz Interrupt Enable Status + * @rmtoll IER 64HZ_IE FL_RTCA_IsEnabledIT_64Hz + * @param RTCAx RTCA instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_RTCA_IsEnabledIT_64Hz(RTCA_Type *RTCAx) +{ + return (uint32_t)(READ_BIT(RTCAx->IER, RTCA_IER_64HZ_IE_Msk) == RTCA_IER_64HZ_IE_Msk); +} + +/** + * @brief Disable RTCA 64Hz Interrupt + * @rmtoll IER 64HZ_IE FL_RTCA_DisableIT_64Hz + * @param RTCAx RTCA instance + * @retval None + */ +__STATIC_INLINE void FL_RTCA_DisableIT_64Hz(RTCA_Type *RTCAx) +{ + CLEAR_BIT(RTCAx->IER, RTCA_IER_64HZ_IE_Msk); +} + +/** + * @brief Enable RTCA 16Hz Interrupt + * @rmtoll IER 16HZ_IE FL_RTCA_EnableIT_16Hz + * @param RTCAx RTCA instance + * @retval None + */ +__STATIC_INLINE void FL_RTCA_EnableIT_16Hz(RTCA_Type *RTCAx) +{ + SET_BIT(RTCAx->IER, RTCA_IER_16HZ_IE_Msk); +} + +/** + * @brief Get RTCA 16Hz Interrupt Enable Status + * @rmtoll IER 16HZ_IE FL_RTCA_IsEnabledIT_16Hz + * @param RTCAx RTCA instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_RTCA_IsEnabledIT_16Hz(RTCA_Type *RTCAx) +{ + return (uint32_t)(READ_BIT(RTCAx->IER, RTCA_IER_16HZ_IE_Msk) == RTCA_IER_16HZ_IE_Msk); +} + +/** + * @brief Disable RTCA 16Hz Interrupt + * @rmtoll IER 16HZ_IE FL_RTCA_DisableIT_16Hz + * @param RTCAx RTCA instance + * @retval None + */ +__STATIC_INLINE void FL_RTCA_DisableIT_16Hz(RTCA_Type *RTCAx) +{ + CLEAR_BIT(RTCAx->IER, RTCA_IER_16HZ_IE_Msk); +} + +/** + * @brief Enable RTCA 8Hz Interrupt + * @rmtoll IER 8HZ_IE FL_RTCA_EnableIT_8Hz + * @param RTCAx RTCA instance + * @retval None + */ +__STATIC_INLINE void FL_RTCA_EnableIT_8Hz(RTCA_Type *RTCAx) +{ + SET_BIT(RTCAx->IER, RTCA_IER_8HZ_IE_Msk); +} + +/** + * @brief Get RTCA 8Hz Interrupt Enable Status + * @rmtoll IER 8HZ_IE FL_RTCA_IsEnabledIT_8Hz + * @param RTCAx RTCA instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_RTCA_IsEnabledIT_8Hz(RTCA_Type *RTCAx) +{ + return (uint32_t)(READ_BIT(RTCAx->IER, RTCA_IER_8HZ_IE_Msk) == RTCA_IER_8HZ_IE_Msk); +} + +/** + * @brief Disable RTCA 8Hz Interrupt + * @rmtoll IER 8HZ_IE FL_RTCA_DisableIT_8Hz + * @param RTCAx RTCA instance + * @retval None + */ +__STATIC_INLINE void FL_RTCA_DisableIT_8Hz(RTCA_Type *RTCAx) +{ + CLEAR_BIT(RTCAx->IER, RTCA_IER_8HZ_IE_Msk); +} + +/** + * @brief Enable RTCA 4Hz Interrupt + * @rmtoll IER 4HZ_IE FL_RTCA_EnableIT_4Hz + * @param RTCAx RTCA instance + * @retval None + */ +__STATIC_INLINE void FL_RTCA_EnableIT_4Hz(RTCA_Type *RTCAx) +{ + SET_BIT(RTCAx->IER, RTCA_IER_4HZ_IE_Msk); +} + +/** + * @brief Get RTCA 4Hz Interrupt Enable Status + * @rmtoll IER 4HZ_IE FL_RTCA_IsEnabledIT_4Hz + * @param RTCAx RTCA instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_RTCA_IsEnabledIT_4Hz(RTCA_Type *RTCAx) +{ + return (uint32_t)(READ_BIT(RTCAx->IER, RTCA_IER_4HZ_IE_Msk) == RTCA_IER_4HZ_IE_Msk); +} + +/** + * @brief Disable RTCA 4Hz Interrupt + * @rmtoll IER 4HZ_IE FL_RTCA_DisableIT_4Hz + * @param RTCAx RTCA instance + * @retval None + */ +__STATIC_INLINE void FL_RTCA_DisableIT_4Hz(RTCA_Type *RTCAx) +{ + CLEAR_BIT(RTCAx->IER, RTCA_IER_4HZ_IE_Msk); +} + +/** + * @brief Enable RTCA 2Hz Interrupt + * @rmtoll IER 2HZ_IE FL_RTCA_EnableIT_2Hz + * @param RTCAx RTCA instance + * @retval None + */ +__STATIC_INLINE void FL_RTCA_EnableIT_2Hz(RTCA_Type *RTCAx) +{ + SET_BIT(RTCAx->IER, RTCA_IER_2HZ_IE_Msk); +} + +/** + * @brief Get RTCA 2Hz Interrupt Enable Status + * @rmtoll IER 2HZ_IE FL_RTCA_IsEnabledIT_2Hz + * @param RTCAx RTCA instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_RTCA_IsEnabledIT_2Hz(RTCA_Type *RTCAx) +{ + return (uint32_t)(READ_BIT(RTCAx->IER, RTCA_IER_2HZ_IE_Msk) == RTCA_IER_2HZ_IE_Msk); +} + +/** + * @brief Disable RTCA 2Hz Interrupt + * @rmtoll IER 2HZ_IE FL_RTCA_DisableIT_2Hz + * @param RTCAx RTCA instance + * @retval None + */ +__STATIC_INLINE void FL_RTCA_DisableIT_2Hz(RTCA_Type *RTCAx) +{ + CLEAR_BIT(RTCAx->IER, RTCA_IER_2HZ_IE_Msk); +} + +/** + * @brief Enable RTCA Second Interrupt + * @rmtoll IER SEC_IE FL_RTCA_EnableIT_Second + * @param RTCAx RTCA instance + * @retval None + */ +__STATIC_INLINE void FL_RTCA_EnableIT_Second(RTCA_Type *RTCAx) +{ + SET_BIT(RTCAx->IER, RTCA_IER_SEC_IE_Msk); +} + +/** + * @brief Get RTCA Second Interrupt Enable Status + * @rmtoll IER SEC_IE FL_RTCA_IsEnabledIT_Second + * @param RTCAx RTCA instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_RTCA_IsEnabledIT_Second(RTCA_Type *RTCAx) +{ + return (uint32_t)(READ_BIT(RTCAx->IER, RTCA_IER_SEC_IE_Msk) == RTCA_IER_SEC_IE_Msk); +} + +/** + * @brief Disable RTCA Second Interrupt + * @rmtoll IER SEC_IE FL_RTCA_DisableIT_Second + * @param RTCAx RTCA instance + * @retval None + */ +__STATIC_INLINE void FL_RTCA_DisableIT_Second(RTCA_Type *RTCAx) +{ + CLEAR_BIT(RTCAx->IER, RTCA_IER_SEC_IE_Msk); +} + +/** + * @brief Enable RTCA Minute Interrupt + * @rmtoll IER MIN_IE FL_RTCA_EnableIT_Minute + * @param RTCAx RTCA instance + * @retval None + */ +__STATIC_INLINE void FL_RTCA_EnableIT_Minute(RTCA_Type *RTCAx) +{ + SET_BIT(RTCAx->IER, RTCA_IER_MIN_IE_Msk); +} + +/** + * @brief Get RTCA Minute Interrupt Enable Status + * @rmtoll IER MIN_IE FL_RTCA_IsEnabledIT_Minute + * @param RTCAx RTCA instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_RTCA_IsEnabledIT_Minute(RTCA_Type *RTCAx) +{ + return (uint32_t)(READ_BIT(RTCAx->IER, RTCA_IER_MIN_IE_Msk) == RTCA_IER_MIN_IE_Msk); +} + +/** + * @brief Disable RTCA Minute Interrupt + * @rmtoll IER MIN_IE FL_RTCA_DisableIT_Minute + * @param RTCAx RTCA instance + * @retval None + */ +__STATIC_INLINE void FL_RTCA_DisableIT_Minute(RTCA_Type *RTCAx) +{ + CLEAR_BIT(RTCAx->IER, RTCA_IER_MIN_IE_Msk); +} + +/** + * @brief Enable RTCA Hour Interrupt + * @rmtoll IER HOUR_IE FL_RTCA_EnableIT_Hour + * @param RTCAx RTCA instance + * @retval None + */ +__STATIC_INLINE void FL_RTCA_EnableIT_Hour(RTCA_Type *RTCAx) +{ + SET_BIT(RTCAx->IER, RTCA_IER_HOUR_IE_Msk); +} + +/** + * @brief Get RTCA Hour Interrupt Enable Status + * @rmtoll IER HOUR_IE FL_RTCA_IsEnabledIT_Hour + * @param RTCAx RTCA instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_RTCA_IsEnabledIT_Hour(RTCA_Type *RTCAx) +{ + return (uint32_t)(READ_BIT(RTCAx->IER, RTCA_IER_HOUR_IE_Msk) == RTCA_IER_HOUR_IE_Msk); +} + +/** + * @brief Disable RTCA Hour Interrupt + * @rmtoll IER HOUR_IE FL_RTCA_DisableIT_Hour + * @param RTCAx RTCA instance + * @retval None + */ +__STATIC_INLINE void FL_RTCA_DisableIT_Hour(RTCA_Type *RTCAx) +{ + CLEAR_BIT(RTCAx->IER, RTCA_IER_HOUR_IE_Msk); +} + +/** + * @brief Enable RTCA Day Interrupt + * @rmtoll IER DAY_IE FL_RTCA_EnableIT_Day + * @param RTCAx RTCA instance + * @retval None + */ +__STATIC_INLINE void FL_RTCA_EnableIT_Day(RTCA_Type *RTCAx) +{ + SET_BIT(RTCAx->IER, RTCA_IER_DAY_IE_Msk); +} + +/** + * @brief Get RTCA Day Interrupt Enable Status + * @rmtoll IER DAY_IE FL_RTCA_IsEnabledIT_Day + * @param RTCAx RTCA instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_RTCA_IsEnabledIT_Day(RTCA_Type *RTCAx) +{ + return (uint32_t)(READ_BIT(RTCAx->IER, RTCA_IER_DAY_IE_Msk) == RTCA_IER_DAY_IE_Msk); +} + +/** + * @brief Disable RTCA Day Interrupt + * @rmtoll IER DAY_IE FL_RTCA_DisableIT_Day + * @param RTCAx RTCA instance + * @retval None + */ +__STATIC_INLINE void FL_RTCA_DisableIT_Day(RTCA_Type *RTCAx) +{ + CLEAR_BIT(RTCAx->IER, RTCA_IER_DAY_IE_Msk); +} + +/** + * @brief Clear RTCA Time Adjust Interrupt Flag + * @rmtoll ISR ADJ_IF FL_RTCA_ClearFlag_Adjust + * @param RTCAx RTCA instance + * @retval None + */ +__STATIC_INLINE void FL_RTCA_ClearFlag_Adjust(RTCA_Type *RTCAx) +{ + WRITE_REG(RTCAx->ISR, RTCA_ISR_ADJ_IF_Msk); +} + +/** + * @brief Get RTCA Time Adjust Interrupt Flag + * @rmtoll ISR ADJ_IF FL_RTCA_IsActiveFlag_Adjust + * @param RTCAx RTCA instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_RTCA_IsActiveFlag_Adjust(RTCA_Type *RTCAx) +{ + return (uint32_t)(READ_BIT(RTCAx->ISR, RTCA_ISR_ADJ_IF_Msk) == (RTCA_ISR_ADJ_IF_Msk)); +} + +/** + * @brief Clear RTCA Alarm Interrupt Flag + * @rmtoll ISR ALARM_IF FL_RTCA_ClearFlag_Alarm + * @param RTCAx RTCA instance + * @retval None + */ +__STATIC_INLINE void FL_RTCA_ClearFlag_Alarm(RTCA_Type *RTCAx) +{ + WRITE_REG(RTCAx->ISR, RTCA_ISR_ALARM_IF_Msk); +} + +/** + * @brief Get RTCA Alarm Interrupt Flag + * @rmtoll ISR ALARM_IF FL_RTCA_IsActiveFlag_Alarm + * @param RTCAx RTCA instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_RTCA_IsActiveFlag_Alarm(RTCA_Type *RTCAx) +{ + return (uint32_t)(READ_BIT(RTCAx->ISR, RTCA_ISR_ALARM_IF_Msk) == (RTCA_ISR_ALARM_IF_Msk)); +} + +/** + * @brief Clear RTCA 1KHz Interrupt Flag + * @rmtoll ISR 1KHZ_IF FL_RTCA_ClearFlag_1KHz + * @param RTCAx RTCA instance + * @retval None + */ +__STATIC_INLINE void FL_RTCA_ClearFlag_1KHz(RTCA_Type *RTCAx) +{ + WRITE_REG(RTCAx->ISR, RTCA_ISR_1KHZ_IF_Msk); +} + +/** + * @brief Get RTCA 1KHz Interrupt Flag + * @rmtoll ISR 1KHZ_IF FL_RTCA_IsActiveFlag_1KHz + * @param RTCAx RTCA instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_RTCA_IsActiveFlag_1KHz(RTCA_Type *RTCAx) +{ + return (uint32_t)(READ_BIT(RTCAx->ISR, RTCA_ISR_1KHZ_IF_Msk) == (RTCA_ISR_1KHZ_IF_Msk)); +} + +/** + * @brief Clear RTCA 256Hz Interrupt Flag + * @rmtoll ISR 256HZ_IF FL_RTCA_ClearFlag_256Hz + * @param RTCAx RTCA instance + * @retval None + */ +__STATIC_INLINE void FL_RTCA_ClearFlag_256Hz(RTCA_Type *RTCAx) +{ + WRITE_REG(RTCAx->ISR, RTCA_ISR_256HZ_IF_Msk); +} + +/** + * @brief Get RTCA 256Hz Interrupt Flag + * @rmtoll ISR 256HZ_IF FL_RTCA_IsActiveFlag_256Hz + * @param RTCAx RTCA instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_RTCA_IsActiveFlag_256Hz(RTCA_Type *RTCAx) +{ + return (uint32_t)(READ_BIT(RTCAx->ISR, RTCA_ISR_256HZ_IF_Msk) == (RTCA_ISR_256HZ_IF_Msk)); +} + +/** + * @brief Clear RTCA 64Hz Interrupt Flag + * @rmtoll ISR 64HZ_IF FL_RTCA_ClearFlag_64Hz + * @param RTCAx RTCA instance + * @retval None + */ +__STATIC_INLINE void FL_RTCA_ClearFlag_64Hz(RTCA_Type *RTCAx) +{ + WRITE_REG(RTCAx->ISR, RTCA_ISR_64HZ_IF_Msk); +} + +/** + * @brief Get RTCA 64Hz Interrupt Flag + * @rmtoll ISR 64HZ_IF FL_RTCA_IsActiveFlag_64Hz + * @param RTCAx RTCA instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_RTCA_IsActiveFlag_64Hz(RTCA_Type *RTCAx) +{ + return (uint32_t)(READ_BIT(RTCAx->ISR, RTCA_ISR_64HZ_IF_Msk) == (RTCA_ISR_64HZ_IF_Msk)); +} + +/** + * @brief Clear RTCA 16Hz Interrupt Flag + * @rmtoll ISR 16HZ_IF FL_RTCA_ClearFlag_16Hz + * @param RTCAx RTCA instance + * @retval None + */ +__STATIC_INLINE void FL_RTCA_ClearFlag_16Hz(RTCA_Type *RTCAx) +{ + WRITE_REG(RTCAx->ISR, RTCA_ISR_16HZ_IF_Msk); +} + +/** + * @brief Get RTCA 16Hz Interrupt Flag + * @rmtoll ISR 16HZ_IF FL_RTCA_IsActiveFlag_16Hz + * @param RTCAx RTCA instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_RTCA_IsActiveFlag_16Hz(RTCA_Type *RTCAx) +{ + return (uint32_t)(READ_BIT(RTCAx->ISR, RTCA_ISR_16HZ_IF_Msk) == (RTCA_ISR_16HZ_IF_Msk)); +} + +/** + * @brief Clear RTCA 8Hz Interrupt Flag + * @rmtoll ISR 8HZ_IF FL_RTCA_ClearFlag_8Hz + * @param RTCAx RTCA instance + * @retval None + */ +__STATIC_INLINE void FL_RTCA_ClearFlag_8Hz(RTCA_Type *RTCAx) +{ + WRITE_REG(RTCAx->ISR, RTCA_ISR_8HZ_IF_Msk); +} + +/** + * @brief Get RTCA 8Hz Interrupt Flag + * @rmtoll ISR 8HZ_IF FL_RTCA_IsActiveFlag_8Hz + * @param RTCAx RTCA instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_RTCA_IsActiveFlag_8Hz(RTCA_Type *RTCAx) +{ + return (uint32_t)(READ_BIT(RTCAx->ISR, RTCA_ISR_8HZ_IF_Msk) == (RTCA_ISR_8HZ_IF_Msk)); +} + +/** + * @brief Clear RTCA 4Hz Interrupt Flag + * @rmtoll ISR 4HZ_IF FL_RTCA_ClearFlag_4Hz + * @param RTCAx RTCA instance + * @retval None + */ +__STATIC_INLINE void FL_RTCA_ClearFlag_4Hz(RTCA_Type *RTCAx) +{ + WRITE_REG(RTCAx->ISR, RTCA_ISR_4HZ_IF_Msk); +} + +/** + * @brief Get RTCA 4Hz Interrupt Flag + * @rmtoll ISR 4HZ_IF FL_RTCA_IsActiveFlag_4Hz + * @param RTCAx RTCA instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_RTCA_IsActiveFlag_4Hz(RTCA_Type *RTCAx) +{ + return (uint32_t)(READ_BIT(RTCAx->ISR, RTCA_ISR_4HZ_IF_Msk) == (RTCA_ISR_4HZ_IF_Msk)); +} + +/** + * @brief Clear RTCA 2Hz Interrupt Flag + * @rmtoll ISR 2HZ_IF FL_RTCA_ClearFlag_2Hz + * @param RTCAx RTCA instance + * @retval None + */ +__STATIC_INLINE void FL_RTCA_ClearFlag_2Hz(RTCA_Type *RTCAx) +{ + WRITE_REG(RTCAx->ISR, RTCA_ISR_2HZ_IF_Msk); +} + +/** + * @brief Get RTCA 2Hz Interrupt Flag + * @rmtoll ISR 2HZ_IF FL_RTCA_IsActiveFlag_2Hz + * @param RTCAx RTCA instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_RTCA_IsActiveFlag_2Hz(RTCA_Type *RTCAx) +{ + return (uint32_t)(READ_BIT(RTCAx->ISR, RTCA_ISR_2HZ_IF_Msk) == (RTCA_ISR_2HZ_IF_Msk)); +} + +/** + * @brief Clear RTCA Second Interrupt Flag + * @rmtoll ISR SEC_IF FL_RTCA_ClearFlag_Second + * @param RTCAx RTCA instance + * @retval None + */ +__STATIC_INLINE void FL_RTCA_ClearFlag_Second(RTCA_Type *RTCAx) +{ + WRITE_REG(RTCAx->ISR, RTCA_ISR_SEC_IF_Msk); +} + +/** + * @brief Get RTCA Second Interrupt Flag + * @rmtoll ISR SEC_IF FL_RTCA_IsActiveFlag_Second + * @param RTCAx RTCA instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_RTCA_IsActiveFlag_Second(RTCA_Type *RTCAx) +{ + return (uint32_t)(READ_BIT(RTCAx->ISR, RTCA_ISR_SEC_IF_Msk) == (RTCA_ISR_SEC_IF_Msk)); +} + +/** + * @brief Clear RTCA Minute Interrupt Flag + * @rmtoll ISR MIN_IF FL_RTCA_ClearFlag_Minute + * @param RTCAx RTCA instance + * @retval None + */ +__STATIC_INLINE void FL_RTCA_ClearFlag_Minute(RTCA_Type *RTCAx) +{ + WRITE_REG(RTCAx->ISR, RTCA_ISR_MIN_IF_Msk); +} + +/** + * @brief Get RTCA Minute Interrupt Flag + * @rmtoll ISR MIN_IF FL_RTCA_IsActiveFlag_Minute + * @param RTCAx RTCA instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_RTCA_IsActiveFlag_Minute(RTCA_Type *RTCAx) +{ + return (uint32_t)(READ_BIT(RTCAx->ISR, RTCA_ISR_MIN_IF_Msk) == (RTCA_ISR_MIN_IF_Msk)); +} + +/** + * @brief Clear RTCA Hour Interrupt Flag + * @rmtoll ISR HOUR_IF FL_RTCA_ClearFlag_Hour + * @param RTCAx RTCA instance + * @retval None + */ +__STATIC_INLINE void FL_RTCA_ClearFlag_Hour(RTCA_Type *RTCAx) +{ + WRITE_REG(RTCAx->ISR, RTCA_ISR_HOUR_IF_Msk); +} + +/** + * @brief Get RTCA Hour Interrupt Flag + * @rmtoll ISR HOUR_IF FL_RTCA_IsActiveFlag_Hour + * @param RTCAx RTCA instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_RTCA_IsActiveFlag_Hour(RTCA_Type *RTCAx) +{ + return (uint32_t)(READ_BIT(RTCAx->ISR, RTCA_ISR_HOUR_IF_Msk) == (RTCA_ISR_HOUR_IF_Msk)); +} + +/** + * @brief Clear RTCA Day Interrupt Flag + * @rmtoll ISR DAY_IF FL_RTCA_ClearFlag_Day + * @param RTCAx RTCA instance + * @retval None + */ +__STATIC_INLINE void FL_RTCA_ClearFlag_Day(RTCA_Type *RTCAx) +{ + WRITE_REG(RTCAx->ISR, RTCA_ISR_DAY_IF_Msk); +} + +/** + * @brief Get RTCA Day Interrupt Flag + * @rmtoll ISR DAY_IF FL_RTCA_IsActiveFlag_Day + * @param RTCAx RTCA instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_RTCA_IsActiveFlag_Day(RTCA_Type *RTCAx) +{ + return (uint32_t)(READ_BIT(RTCAx->ISR, RTCA_ISR_DAY_IF_Msk) == (RTCA_ISR_DAY_IF_Msk)); +} + +/** + * @brief Get RTCA Second Value + * @rmtoll BCDSEC FL_RTCA_ReadSecond + * @param RTCAx RTCA instance + * @retval + */ +__STATIC_INLINE uint32_t FL_RTCA_ReadSecond(RTCA_Type *RTCAx) +{ + return (uint32_t)(READ_BIT(RTCAx->BCDSEC, (0x7fU << 0U)) >> 0U); +} + +/** + * @brief Set RTCA Second Value + * @rmtoll BCDSEC FL_RTCA_WriteSecond + * @param RTCAx RTCA instance + * @param second + * @retval None + */ +__STATIC_INLINE void FL_RTCA_WriteSecond(RTCA_Type *RTCAx, uint32_t second) +{ + MODIFY_REG(RTCAx->BCDSEC, (0x7fU << 0U), (second << 0U)); +} + +/** + * @brief Get RTCA Minute Value + * @rmtoll BCDMIN FL_RTCA_ReadMinute + * @param RTCAx RTCA instance + * @retval + */ +__STATIC_INLINE uint32_t FL_RTCA_ReadMinute(RTCA_Type *RTCAx) +{ + return (uint32_t)(READ_BIT(RTCAx->BCDMIN, (0x7fU << 0U)) >> 0U); +} + +/** + * @brief Set RTCA Minute Value + * @rmtoll BCDMIN FL_RTCA_WriteMinute + * @param RTCAx RTCA instance + * @param minute + * @retval None + */ +__STATIC_INLINE void FL_RTCA_WriteMinute(RTCA_Type *RTCAx, uint32_t minute) +{ + MODIFY_REG(RTCAx->BCDMIN, (0x7fU << 0U), (minute << 0U)); +} + +/** + * @brief Get RTCA Hour Value + * @rmtoll BCDHOUR FL_RTCA_ReadHour + * @param RTCAx RTCA instance + * @retval + */ +__STATIC_INLINE uint32_t FL_RTCA_ReadHour(RTCA_Type *RTCAx) +{ + return (uint32_t)(READ_BIT(RTCAx->BCDHOUR, (0x3fU << 0U)) >> 0U); +} + +/** + * @brief Set RTCA Hour Value + * @rmtoll BCDHOUR FL_RTCA_WriteHour + * @param RTCAx RTCA instance + * @param hour + * @retval None + */ +__STATIC_INLINE void FL_RTCA_WriteHour(RTCA_Type *RTCAx, uint32_t hour) +{ + MODIFY_REG(RTCAx->BCDHOUR, (0x3fU << 0U), (hour << 0U)); +} + +/** + * @brief Get RTCA Day Value + * @rmtoll BCDDAY FL_RTCA_ReadDay + * @param RTCAx RTCA instance + * @retval + */ +__STATIC_INLINE uint32_t FL_RTCA_ReadDay(RTCA_Type *RTCAx) +{ + return (uint32_t)(READ_BIT(RTCAx->BCDDAY, (0x3fU << 0U)) >> 0U); +} + +/** + * @brief Set RTCA Day Value + * @rmtoll BCDDAY FL_RTCA_WriteDay + * @param RTCAx RTCA instance + * @param day + * @retval None + */ +__STATIC_INLINE void FL_RTCA_WriteDay(RTCA_Type *RTCAx, uint32_t day) +{ + MODIFY_REG(RTCAx->BCDDAY, (0x3fU << 0U), (day << 0U)); +} + +/** + * @brief Get RTCA Week Value + * @rmtoll BCDWEEK FL_RTCA_ReadWeek + * @param RTCAx RTCA instance + * @retval + */ +__STATIC_INLINE uint32_t FL_RTCA_ReadWeek(RTCA_Type *RTCAx) +{ + return (uint32_t)(READ_BIT(RTCAx->BCDWEEK, (0x7U << 0U)) >> 0U); +} + +/** + * @brief Set RTCA Week Value + * @rmtoll BCDWEEK FL_RTCA_WriteWeek + * @param RTCAx RTCA instance + * @param week + * @retval None + */ +__STATIC_INLINE void FL_RTCA_WriteWeek(RTCA_Type *RTCAx, uint32_t week) +{ + MODIFY_REG(RTCAx->BCDWEEK, (0x7U << 0U), (week << 0U)); +} + +/** + * @brief Get RTCA Month Value + * @rmtoll BCDMONTH FL_RTCA_ReadMonth + * @param RTCAx RTCA instance + * @retval + */ +__STATIC_INLINE uint32_t FL_RTCA_ReadMonth(RTCA_Type *RTCAx) +{ + return (uint32_t)(READ_BIT(RTCAx->BCDMONTH, (0x1fU << 0U)) >> 0U); +} + +/** + * @brief Set RTCA Month Value + * @rmtoll BCDMONTH FL_RTCA_WriteMonth + * @param RTCAx RTCA instance + * @param month + * @retval None + */ +__STATIC_INLINE void FL_RTCA_WriteMonth(RTCA_Type *RTCAx, uint32_t month) +{ + MODIFY_REG(RTCAx->BCDMONTH, (0x1fU << 0U), (month << 0U)); +} + +/** + * @brief Get RTCA Year Value + * @rmtoll BCDYEAR FL_RTCA_ReadYear + * @param RTCAx RTCA instance + * @retval + */ +__STATIC_INLINE uint32_t FL_RTCA_ReadYear(RTCA_Type *RTCAx) +{ + return (uint32_t)(READ_BIT(RTCAx->BCDYEAR, (0xffU << 0U)) >> 0U); +} + +/** + * @brief Set RTCA Year Value + * @rmtoll BCDYEAR FL_RTCA_WriteYear + * @param RTCAx RTCA instance + * @param year + * @retval None + */ +__STATIC_INLINE void FL_RTCA_WriteYear(RTCA_Type *RTCAx, uint32_t year) +{ + MODIFY_REG(RTCAx->BCDYEAR, (0xffU << 0U), (year << 0U)); +} + +/** + * @brief Get RTCA Alarm Hour Value + * @rmtoll ALARM FL_RTCA_ReadHourAlarm + * @param RTCAx RTCA instance + * @retval + */ +__STATIC_INLINE uint32_t FL_RTCA_ReadHourAlarm(RTCA_Type *RTCAx) +{ + return (uint32_t)(READ_BIT(RTCAx->ALARM, (0x3fU << 16U)) >> 16U); +} + +/** + * @brief Set RTCA Alarm Hour Value + * @rmtoll ALARM FL_RTCA_WriteHourAlarm + * @param RTCAx RTCA instance + * @param hour + * @retval None + */ +__STATIC_INLINE void FL_RTCA_WriteHourAlarm(RTCA_Type *RTCAx, uint32_t hour) +{ + MODIFY_REG(RTCAx->ALARM, (0x3fU << 16U), (hour << 16U)); +} + +/** + * @brief Get RTCA Alarm Minute Value + * @rmtoll ALARM FL_RTCA_ReadMinuteAlarm + * @param RTCAx RTCA instance + * @retval + */ +__STATIC_INLINE uint32_t FL_RTCA_ReadMinuteAlarm(RTCA_Type *RTCAx) +{ + return (uint32_t)(READ_BIT(RTCAx->ALARM, (0x7fU << 8U)) >> 8U); +} + +/** + * @brief Set RTCA Alarm Minute Value + * @rmtoll ALARM FL_RTCA_WriteMinuteAlarm + * @param RTCAx RTCA instance + * @param minute + * @retval None + */ +__STATIC_INLINE void FL_RTCA_WriteMinuteAlarm(RTCA_Type *RTCAx, uint32_t minute) +{ + MODIFY_REG(RTCAx->ALARM, (0x7fU << 8U), (minute << 8U)); +} + +/** + * @brief Get RTCA Alarm Second Value + * @rmtoll ALARM FL_RTCA_ReadSecondAlarm + * @param RTCAx RTCA instance + * @retval + */ +__STATIC_INLINE uint32_t FL_RTCA_ReadSecondAlarm(RTCA_Type *RTCAx) +{ + return (uint32_t)(READ_BIT(RTCAx->ALARM, (0x7fU << 0U)) >> 0U); +} + +/** + * @brief Set RTCA Alarm Second Value + * @rmtoll ALARM FL_RTCA_WriteSecondAlarm + * @param RTCAx RTCA instance + * @param second + * @retval None + */ +__STATIC_INLINE void FL_RTCA_WriteSecondAlarm(RTCA_Type *RTCAx, uint32_t second) +{ + MODIFY_REG(RTCAx->ALARM, (0x7fU << 0U), (second << 0U)); +} + +/** + * @brief Set RTCA Output Time Mark Signal + * @rmtoll TMSEL TMSEL FL_RTCA_SetTimeMarkOutput + * @param RTCAx RTCA instance + * @param markSelect This parameter can be one of the following values: + * @arg @ref FL_RTCA_TIME_MARK_SECOND + * @arg @ref FL_RTCA_TIME_MARK_MINUTE + * @arg @ref FL_RTCA_TIME_MARK_HOUR + * @arg @ref FL_RTCA_TIME_MARK_DAY + * @arg @ref FL_RTCA_TIME_MARK_ALARM + * @arg @ref FL_RTCA_TIME_MARK_32_SEC + * @arg @ref FL_RTCA_TIME_MARK_SECOND_REVERSE + * @arg @ref FL_RTCA_TIME_MARK_MINUTE_REVERSE + * @arg @ref FL_RTCA_TIME_MARK_HOUR_REVERSE + * @arg @ref FL_RTCA_TIME_MARK_DAY_REVERSE + * @arg @ref FL_RTCA_TIME_MARK_ALARM_REVERSE + * @arg @ref FL_RTCA_TIME_MARK_SEC + * @retval None + */ +__STATIC_INLINE void FL_RTCA_SetTimeMarkOutput(RTCA_Type *RTCAx, uint32_t markSelect) +{ + MODIFY_REG(RTCAx->TMSEL, RTCA_TMSEL_TMSEL_Msk, markSelect); +} + +/** + * @brief Get RTCA Output Time Mark Signal Setting + * @rmtoll TMSEL TMSEL FL_RTCA_GetTimeMarkOutput + * @param RTCAx RTCA instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_RTCA_TIME_MARK_SECOND + * @arg @ref FL_RTCA_TIME_MARK_MINUTE + * @arg @ref FL_RTCA_TIME_MARK_HOUR + * @arg @ref FL_RTCA_TIME_MARK_DAY + * @arg @ref FL_RTCA_TIME_MARK_ALARM + * @arg @ref FL_RTCA_TIME_MARK_32_SEC + * @arg @ref FL_RTCA_TIME_MARK_SECOND_REVERSE + * @arg @ref FL_RTCA_TIME_MARK_MINUTE_REVERSE + * @arg @ref FL_RTCA_TIME_MARK_HOUR_REVERSE + * @arg @ref FL_RTCA_TIME_MARK_DAY_REVERSE + * @arg @ref FL_RTCA_TIME_MARK_ALARM_REVERSE + * @arg @ref FL_RTCA_TIME_MARK_SEC + */ +__STATIC_INLINE uint32_t FL_RTCA_GetTimeMarkOutput(RTCA_Type *RTCAx) +{ + return (uint32_t)(READ_BIT(RTCAx->TMSEL, RTCA_TMSEL_TMSEL_Msk)); +} + +/** + * @brief Get RTCA Adjust Value + * @rmtoll ADJUST FL_RTCA_ReadAdjustValue + * @param RTCAx RTCA instance + * @retval + */ +__STATIC_INLINE uint32_t FL_RTCA_ReadAdjustValue(RTCA_Type *RTCAx) +{ + return (uint32_t)(READ_BIT(RTCAx->ADJUST, (0x1ffU << 0U)) >> 0U); +} + +/** + * @brief Set RTCA Adjust Value + * @rmtoll ADJUST FL_RTCA_WriteAdjustValue + * @param RTCAx RTCA instance + * @param adjustValue + * @retval None + */ +__STATIC_INLINE void FL_RTCA_WriteAdjustValue(RTCA_Type *RTCAx, uint32_t adjustValue) +{ + MODIFY_REG(RTCAx->ADJUST, (0x1ffU << 0U), (adjustValue << 0U)); +} + +/** + * @brief Set RTCA Adjust Direction + * @rmtoll ADJUST ADSIGN FL_RTCA_SetAdjustDirection + * @param RTCAx RTCA instance + * @param adjustDir This parameter can be one of the following values: + * @arg @ref FL_RTCA_ADJUST_DIR_INCREASE + * @arg @ref FL_RTCA_ADJUST_DIR_DECREASE + * @retval None + */ +__STATIC_INLINE void FL_RTCA_SetAdjustDirection(RTCA_Type *RTCAx, uint32_t adjustDir) +{ + MODIFY_REG(RTCAx->ADJUST, RTCA_ADJUST_ADSIGN_Msk, adjustDir); +} + +/** + * @brief Get RTCA Adjust Direction + * @rmtoll ADJUST ADSIGN FL_RTCA_GetAdjustDirection + * @param RTCAx RTCA instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_RTCA_ADJUST_DIR_INCREASE + * @arg @ref FL_RTCA_ADJUST_DIR_DECREASE + */ +__STATIC_INLINE uint32_t FL_RTCA_GetAdjustDirection(RTCA_Type *RTCAx) +{ + return (uint32_t)(READ_BIT(RTCAx->ADJUST, RTCA_ADJUST_ADSIGN_Msk)); +} + +/** + * @brief Get RTCA MilliSecond Counter Value + * @rmtoll SBSCNT FL_RTCA_ReadMilliSecondCounter + * @param RTCAx RTCA instance + * @retval + */ +__STATIC_INLINE uint32_t FL_RTCA_ReadMilliSecondCounter(RTCA_Type *RTCAx) +{ + return (uint32_t)(READ_BIT(RTCAx->SBSCNT, (0xffU << 0U)) >> 0U); +} + +/** + * @brief Set RTCA MilliSecond Counter Value + * @rmtoll SBSCNT FL_RTCA_WriteMilliSecondCounter + * @param RTCAx RTCA instance + * @param milliSecondCount + * @retval None + */ +__STATIC_INLINE void FL_RTCA_WriteMilliSecondCounter(RTCA_Type *RTCAx, uint32_t milliSecondCount) +{ + MODIFY_REG(RTCAx->SBSCNT, (0xffU << 0U), (milliSecondCount << 0U)); +} + +/** + * @brief RTCA enable + * @rmtoll CR EN FL_RTCA_Enable + * @param RTCAx RTCA instance + * @retval None + */ +__STATIC_INLINE void FL_RTCA_Enable(RTCA_Type *RTCAx) +{ + SET_BIT(RTCAx->CR, RTCA_CR_EN_Msk); +} + +/** + * @brief Get RTCA enable status + * @rmtoll CR EN FL_RTCA_IsEnabled + * @param RTCAx RTCA instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_RTCA_IsEnabled(RTCA_Type *RTCAx) +{ + return (uint32_t)(READ_BIT(RTCAx->CR, RTCA_CR_EN_Msk) == RTCA_CR_EN_Msk); +} + +/** + * @brief RTCA disable + * @rmtoll CR EN FL_RTCA_Disable + * @param RTCAx RTCA instance + * @retval None + */ +__STATIC_INLINE void FL_RTCA_Disable(RTCA_Type *RTCAx) +{ + CLEAR_BIT(RTCAx->CR, RTCA_CR_EN_Msk); +} + +/** + * @} + */ + +/** @defgroup RTCA_FL_EF_Init Initialization and de-initialization functions + * @{ + */ +FL_ErrorStatus FL_RTCA_DeInit(RTCA_Type *RTCAx); +void FL_RTCA_StructInit(FL_RTCA_InitTypeDef *initStruct); +FL_ErrorStatus FL_RTCA_GetTime(RTCA_Type *RTCAx, FL_RTCA_InitTypeDef *initStruct); +FL_ErrorStatus FL_RTCA_Init(RTCA_Type *RTCAx, FL_RTCA_InitTypeDef *initStruct); +FL_ErrorStatus FL_RTCA_ConfigTime(RTCA_Type *RTCAx, FL_RTCA_InitTypeDef *initStruct); + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif /* __FM33LG0XX_FL_RTCA_H*/ + +/*************************Py_Code_Generator Version: 0.1-0.11-0.1 @ 2020-09-14*************************/ +/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/ diff --git a/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_spi.h b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_spi.h new file mode 100644 index 0000000..b215791 --- /dev/null +++ b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_spi.h @@ -0,0 +1,1276 @@ + /** + ******************************************************************************************************* + * @file fm33lg0xx_fl_spi.h + * @author FMSH Application Team + * @brief Head file of SPI FL Module + ******************************************************************************************************* + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + + + +/* Define to prevent recursive inclusion---------------------------------------------------------------*/ +#ifndef __FM33LG0XX_FL_SPI_H +#define __FM33LG0XX_FL_SPI_H + +#ifdef __cplusplus +extern "C" { +#endif +/* Includes -------------------------------------------------------------------------------------------*/ +#include "fm33lg0xx_fl_def.h" +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @defgroup SPI SPI + * @brief SPI FL driver + * @{ + */ + +/* Exported types -------------------------------------------------------------------------------------*/ +/** @defgroup SPI_FL_ES_INIT SPI Exported Init structures + * @{ + */ + +/** + * @brief FL SPI Init Sturcture definition + */ +typedef struct +{ + /*! 传输模式 单双工 */ + uint32_t transferMode; + /*! 主从模式 */ + uint32_t mode; + /*! 数据位宽 */ + uint32_t dataWidth; + /*! 时钟极性 */ + uint32_t clockPolarity; + /*! 时钟相位 */ + uint32_t clockPhase; + /*! NSS 脚使能软件控制 */ + uint32_t softControl; + /*! 通讯速率 */ + uint32_t baudRate; + /*! Bit方向 */ + uint32_t bitOrder; + +} FL_SPI_InitTypeDef; + +/** + * @} + */ +/* Exported constants ---------------------------------------------------------------------------------*/ +/** @defgroup SPI_FL_Exported_Constants SPI Exported Constants + * @{ + */ + +#define SPI_CR1_IOSWAP_Pos (11U) +#define SPI_CR1_IOSWAP_Msk (0x1Ul << SPI_CR1_IOSWAP_Pos) +#define SPI_CR1_IOSWAP SPI_CR1_IOSWAP_Msk + +#define SPI_CR1_MSPA_Pos (10U) +#define SPI_CR1_MSPA_Msk (0x1U << SPI_CR1_MSPA_Pos) +#define SPI_CR1_MSPA SPI_CR1_MSPA_Msk + +#define SPI_CR1_SSPA_Pos (9U) +#define SPI_CR1_SSPA_Msk (0x1Ul << SPI_CR1_SSPA_Pos) +#define SPI_CR1_SSPA SPI_CR1_SSPA_Msk + +#define SPI_CR1_MM_Pos (8U) +#define SPI_CR1_MM_Msk (0x1U << SPI_CR1_MM_Pos) +#define SPI_CR1_MM SPI_CR1_MM_Msk + +#define SPI_CR1_WAIT_Pos (6U) +#define SPI_CR1_WAIT_Msk (0x3U << SPI_CR1_WAIT_Pos) +#define SPI_CR1_WAIT SPI_CR1_WAIT_Msk + +#define SPI_CR1_BAUD_Pos (3U) +#define SPI_CR1_BAUD_Msk (0x7U << SPI_CR1_BAUD_Pos) +#define SPI_CR1_BAUD SPI_CR1_BAUD_Msk + +#define SPI_CR1_LSBF_Pos (2U) +#define SPI_CR1_LSBF_Msk (0x1U << SPI_CR1_LSBF_Pos) +#define SPI_CR1_LSBF SPI_CR1_LSBF_Msk + +#define SPI_CR1_CPOL_Pos (1U) +#define SPI_CR1_CPOL_Msk (0x1U << SPI_CR1_CPOL_Pos) +#define SPI_CR1_CPOL SPI_CR1_CPOL_Msk + +#define SPI_CR1_CPHA_Pos (0U) +#define SPI_CR1_CPHA_Msk (0x1U << SPI_CR1_CPHA_Pos) +#define SPI_CR1_CPHA SPI_CR1_CPHA_Msk + +#define SPI_CR2_DUMMY_EN_Pos (15U) +#define SPI_CR2_DUMMY_EN_Msk (0x1U << SPI_CR2_DUMMY_EN_Pos) +#define SPI_CR2_DUMMY_EN SPI_CR2_DUMMY_EN_Msk + +#define SPI_CR2_RXO_Pos (11U) +#define SPI_CR2_RXO_Msk (0x1U << SPI_CR2_RXO_Pos) +#define SPI_CR2_RXO SPI_CR2_RXO_Msk + +#define SPI_CR2_DLEN_Pos (9U) +#define SPI_CR2_DLEN_Msk (0x3U << SPI_CR2_DLEN_Pos) +#define SPI_CR2_DLEN SPI_CR2_DLEN_Msk + +#define SPI_CR2_HALFDUPLEX_Pos (8U) +#define SPI_CR2_HALFDUPLEX_Msk (0x1U << SPI_CR2_HALFDUPLEX_Pos) +#define SPI_CR2_HALFDUPLEX SPI_CR2_HALFDUPLEX_Msk + +#define SPI_CR2_HD_RW_Pos (7U) +#define SPI_CR2_HD_RW_Msk (0x1U << SPI_CR2_HD_RW_Pos) +#define SPI_CR2_HD_RW SPI_CR2_HD_RW_Msk + +#define SPI_CR2_CMD8B_Pos (6U) +#define SPI_CR2_CMD8B_Msk (0x1Ul << SPI_CR2_CMD8B_Pos) +#define SPI_CR2_CMD8B SPI_CR2_CMD8B_Msk + +#define SPI_CR2_SSNM_Pos (5U) +#define SPI_CR2_SSNM_Msk (0x1U << SPI_CR2_SSNM_Pos) +#define SPI_CR2_SSNM SPI_CR2_SSNM_Msk + +#define SPI_CR2_TXO_AC_Pos (4U) +#define SPI_CR2_TXO_AC_Msk (0x1U << SPI_CR2_TXO_AC_Pos) +#define SPI_CR2_TXO_AC SPI_CR2_TXO_AC_Msk + +#define SPI_CR2_TXO_Pos (3U) +#define SPI_CR2_TXO_Msk (0x1U << SPI_CR2_TXO_Pos) +#define SPI_CR2_TXO SPI_CR2_TXO_Msk + +#define SPI_CR2_SSN_Pos (2U) +#define SPI_CR2_SSN_Msk (0x1U << SPI_CR2_SSN_Pos) +#define SPI_CR2_SSN SPI_CR2_SSN_Msk + +#define SPI_CR2_SSNSEN_Pos (1U) +#define SPI_CR2_SSNSEN_Msk (0x1U << SPI_CR2_SSNSEN_Pos) +#define SPI_CR2_SSNSEN SPI_CR2_SSNSEN_Msk + +#define SPI_CR2_SPIEN_Pos (0U) +#define SPI_CR2_SPIEN_Msk (0x1U << SPI_CR2_SPIEN_Pos) +#define SPI_CR2_SPIEN SPI_CR2_SPIEN_Msk + +#define SPI_CR3_TXBFC_Pos (3U) +#define SPI_CR3_TXBFC_Msk (0x1U << SPI_CR3_TXBFC_Pos) +#define SPI_CR3_TXBFC SPI_CR3_TXBFC_Msk + +#define SPI_CR3_RXBFC_Pos (2U) +#define SPI_CR3_RXBFC_Msk (0x1U << SPI_CR3_RXBFC_Pos) +#define SPI_CR3_RXBFC SPI_CR3_RXBFC_Msk + +#define SPI_CR3_MERRC_Pos (1U) +#define SPI_CR3_MERRC_Msk (0x1U << SPI_CR3_MERRC_Pos) +#define SPI_CR3_MERRC SPI_CR3_MERRC_Msk + +#define SPI_CR3_SERRC_Pos (0U) +#define SPI_CR3_SERRC_Msk (0x1U << SPI_CR3_SERRC_Pos) +#define SPI_CR3_SERRC SPI_CR3_SERRC_Msk + +#define SPI_IER_ERRIE_Pos (2U) +#define SPI_IER_ERRIE_Msk (0x1U << SPI_IER_ERRIE_Pos) +#define SPI_IER_ERRIE SPI_IER_ERRIE_Msk + +#define SPI_IER_TXIE_Pos (1U) +#define SPI_IER_TXIE_Msk (0x1U << SPI_IER_TXIE_Pos) +#define SPI_IER_TXIE SPI_IER_TXIE_Msk + +#define SPI_IER_RXIE_Pos (0U) +#define SPI_IER_RXIE_Msk (0x1U << SPI_IER_RXIE_Pos) +#define SPI_IER_RXIE SPI_IER_RXIE_Msk + +#define SPI_ISR_DCN_TX_Pos (12U) +#define SPI_ISR_DCN_TX_Msk (0x1U << SPI_ISR_DCN_TX_Pos) +#define SPI_ISR_DCN_TX SPI_ISR_DCN_TX_Msk + +#define SPI_ISR_RXCOL_Pos (10U) +#define SPI_ISR_RXCOL_Msk (0x1U << SPI_ISR_RXCOL_Pos) +#define SPI_ISR_RXCOL SPI_ISR_RXCOL_Msk + +#define SPI_ISR_TXCOL_Pos (9U) +#define SPI_ISR_TXCOL_Msk (0x1U << SPI_ISR_TXCOL_Pos) +#define SPI_ISR_TXCOL SPI_ISR_TXCOL_Msk + +#define SPI_ISR_BUSY_Pos (8U) +#define SPI_ISR_BUSY_Msk (0x1U << SPI_ISR_BUSY_Pos) +#define SPI_ISR_BUSY SPI_ISR_BUSY_Msk + +#define SPI_ISR_MERR_Pos (6U) +#define SPI_ISR_MERR_Msk (0x1U << SPI_ISR_MERR_Pos) +#define SPI_ISR_MERR SPI_ISR_MERR_Msk + +#define SPI_ISR_SERR_Pos (5U) +#define SPI_ISR_SERR_Msk (0x1U << SPI_ISR_SERR_Pos) +#define SPI_ISR_SERR SPI_ISR_SERR_Msk + +#define SPI_ISR_TXBE_Pos (1U) +#define SPI_ISR_TXBE_Msk (0x1U << SPI_ISR_TXBE_Pos) +#define SPI_ISR_TXBE SPI_ISR_TXBE_Msk + +#define SPI_ISR_RXBF_Pos (0U) +#define SPI_ISR_RXBF_Msk (0x1U << SPI_ISR_RXBF_Pos) +#define SPI_ISR_RXBF SPI_ISR_RXBF_Msk + + + + + + +#define FL_SPI_MASTER_SAMPLING_NORMAL (0x0U << SPI_CR1_MSPA_Pos) +#define FL_SPI_MASTER_SAMPLING_DELAY_HALFCLK (0x1U << SPI_CR1_MSPA_Pos) + + +#define FL_SPI_SLAVE_SAMPLING_NORMAL (0x0U << SPI_CR1_SSPA_Pos) +#define FL_SPI_SLAVE_SAMPLING_ADVANCE_HALFCLK (0x1U << SPI_CR1_SSPA_Pos) + + +#define FL_SPI_WORK_MODE_SLAVE (0x0Ul << SPI_CR1_MM_Pos) +#define FL_SPI_WORK_MODE_MASTER (0x1Ul << SPI_CR1_MM_Pos) + + +#define FL_SPI_SEND_WAIT_1 (0x0U << SPI_CR1_WAIT_Pos) +#define FL_SPI_SEND_WAIT_2 (0x1U << SPI_CR1_WAIT_Pos) +#define FL_SPI_SEND_WAIT_3 (0x2U << SPI_CR1_WAIT_Pos) +#define FL_SPI_SEND_WAIT_4 (0x3U << SPI_CR1_WAIT_Pos) + + +#define FL_SPI_CLK_DIV2 (0x0U << SPI_CR1_BAUD_Pos) +#define FL_SPI_CLK_DIV4 (0x1U << SPI_CR1_BAUD_Pos) +#define FL_SPI_CLK_DIV8 (0x2U << SPI_CR1_BAUD_Pos) +#define FL_SPI_CLK_DIV16 (0x3U << SPI_CR1_BAUD_Pos) +#define FL_SPI_CLK_DIV32 (0x4U << SPI_CR1_BAUD_Pos) +#define FL_SPI_CLK_DIV64 (0x5U << SPI_CR1_BAUD_Pos) +#define FL_SPI_CLK_DIV128 (0x6U << SPI_CR1_BAUD_Pos) +#define FL_SPI_CLK_DIV256 (0x7U << SPI_CR1_BAUD_Pos) + +#define FL_SPI_BAUDRATE_DIV2 (0x0U << SPI_CR1_BAUD_Pos) +#define FL_SPI_BAUDRATE_DIV4 (0x1U << SPI_CR1_BAUD_Pos) +#define FL_SPI_BAUDRATE_DIV8 (0x2U << SPI_CR1_BAUD_Pos) +#define FL_SPI_BAUDRATE_DIV16 (0x3U << SPI_CR1_BAUD_Pos) +#define FL_SPI_BAUDRATE_DIV32 (0x4U << SPI_CR1_BAUD_Pos) +#define FL_SPI_BAUDRATE_DIV64 (0x5U << SPI_CR1_BAUD_Pos) +#define FL_SPI_BAUDRATE_DIV128 (0x6U << SPI_CR1_BAUD_Pos) +#define FL_SPI_BAUDRATE_DIV256 (0x7U << SPI_CR1_BAUD_Pos) + +#define FL_SPI_BIT_ORDER_MSB_FIRST (0x0U << SPI_CR1_LSBF_Pos) +#define FL_SPI_BIT_ORDER_LSB_FIRST (0x1U << SPI_CR1_LSBF_Pos) + + +#define FL_SPI_POLARITY_NORMAL (0x0U << SPI_CR1_CPOL_Pos) +#define FL_SPI_POLARITY_INVERT (0x1U << SPI_CR1_CPOL_Pos) + + +#define FL_SPI_PHASE_EDGE1 (0x0U << SPI_CR1_CPHA_Pos) +#define FL_SPI_PHASE_EDGE2 (0x1U << SPI_CR1_CPHA_Pos) + + +#define FL_SPI_DATA_WIDTH_8B (0x0U << SPI_CR2_DLEN_Pos) +#define FL_SPI_DATA_WIDTH_16B (0x1U << SPI_CR2_DLEN_Pos) +#define FL_SPI_DATA_WIDTH_24B (0x2U << SPI_CR2_DLEN_Pos) +#define FL_SPI_DATA_WIDTH_32B (0x3U << SPI_CR2_DLEN_Pos) + + +#define FL_SPI_TRANSFER_MODE_FULL_DUPLEX (0x0U << SPI_CR2_HALFDUPLEX_Pos) +#define FL_SPI_TRANSFER_MODE_HALF_DUPLEX (0x1U << SPI_CR2_HALFDUPLEX_Pos) + + +#define FL_SPI_HALF_DUPLEX_TX (0x0U << SPI_CR2_HD_RW_Pos) +#define FL_SPI_HALF_DUPLEX_RX (0x1U << SPI_CR2_HD_RW_Pos) + + +#define FL_SPI_HALF_DUPLEX_CMDLEN_DLEN (0x0U << SPI_CR2_CMD8B_Pos) +#define FL_SPI_HALF_DUPLEX_CMDLEN_8B (0x1U << SPI_CR2_CMD8B_Pos) + +#define FL_SPI_HALFDUPLEX_CMDLEN_DLEN (0x0U << SPI_CR2_CMD8B_Pos) +#define FL_SPI_HALFDUPLEX_CMDLEN_8B (0x1U << SPI_CR2_CMD8B_Pos) + +#define FL_SPI_HARDWARE_SSN_AUTO_HIGH (0x0U << SPI_CR2_SSNM_Pos) +#define FL_SPI_HARDWARE_SSN_KEEP_LOW (0x1U << SPI_CR2_SSNM_Pos) + + +#define FL_SPI_SSN_LOW (0x0U << SPI_CR2_SSN_Pos) +#define FL_SPI_SSN_HIGH (0x1U << SPI_CR2_SSN_Pos) + + +#define FL_SPI_FRAME_MODE_CMD (0x0U << SPI_ISR_DCN_TX_Pos) +#define FL_SPI_FRAME_MODE_DATA (0x1U << SPI_ISR_DCN_TX_Pos) + + +/** + * @} + */ +/* Exported functions ---------------------------------------------------------------------------------*/ +/** @defgroup SPI_FL_Exported_Functions SPI Exported Functions + * @{ + */ + +/** + * @brief Enable SPI IO Pin Swap + * @rmtoll CR1 IOSWAP FL_SPI_EnablePinSwap + * @param SPIx SPI instance + * @retval None + */ +__STATIC_INLINE void FL_SPI_EnablePinSwap(SPI_Type *SPIx) +{ + SET_BIT(SPIx->CR1, SPI_CR1_IOSWAP_Msk); +} + +/** + * @brief Get SPI IO Pin Swap State + * @rmtoll CR1 IOSWAP FL_SPI_IsEnabledPinSwap + * @param SPIx SPI instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_SPI_IsEnabledPinSwap(SPI_Type *SPIx) +{ + return (uint32_t)(READ_BIT(SPIx->CR1, SPI_CR1_IOSWAP_Msk) == SPI_CR1_IOSWAP_Msk); +} + +/** + * @brief Disable SPI IO Pin Swap + * @rmtoll CR1 IOSWAP FL_SPI_DisablePinSwap + * @param SPIx SPI instance + * @retval None + */ +__STATIC_INLINE void FL_SPI_DisablePinSwap(SPI_Type *SPIx) +{ + CLEAR_BIT(SPIx->CR1, SPI_CR1_IOSWAP_Msk); +} + +/** + * @brief Set Master Sampling Position Adjustment + * @rmtoll CR1 MSPA FL_SPI_SetMasterSamplingAdjust + * @param SPIx SPI instance + * @param adjust This parameter can be one of the following values: + * @arg @ref FL_SPI_MASTER_SAMPLING_NORMAL + * @arg @ref FL_SPI_MASTER_SAMPLING_DELAY_HALFCLK + * @retval None + */ +__STATIC_INLINE void FL_SPI_SetMasterSamplingAdjust(SPI_Type *SPIx, uint32_t adjust) +{ + MODIFY_REG(SPIx->CR1, SPI_CR1_MSPA_Msk, adjust); +} + +/** + * @brief Get Master Sampling Position Adjustment + * @rmtoll CR1 MSPA FL_SPI_GetMasterSamplingAdjust + * @param SPIx SPI instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_SPI_MASTER_SAMPLING_NORMAL + * @arg @ref FL_SPI_MASTER_SAMPLING_DELAY_HALFCLK + */ +__STATIC_INLINE uint32_t FL_SPI_GetMasterSamplingAdjust(SPI_Type *SPIx) +{ + return (uint32_t)(READ_BIT(SPIx->CR1, SPI_CR1_MSPA_Msk)); +} + +/** + * @brief Set Slave Sending Position Adjustment + * @rmtoll CR1 SSPA FL_SPI_SetSlaveSamplingAdjust + * @param SPIx SPI instance + * @param adjust This parameter can be one of the following values: + * @arg @ref FL_SPI_SLAVE_SAMPLING_NORMAL + * @arg @ref FL_SPI_SLAVE_SAMPLING_ADVANCE_HALFCLK + * @retval None + */ +__STATIC_INLINE void FL_SPI_SetSlaveSamplingAdjust(SPI_Type *SPIx, uint32_t adjust) +{ + MODIFY_REG(SPIx->CR1, SPI_CR1_SSPA_Msk, adjust); +} + +/** + * @brief Get Slave Sending Position Adjustment + * @rmtoll CR1 SSPA FL_SPI_GetSlaveSamplingAdjust + * @param SPIx SPI instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_SPI_SLAVE_SAMPLING_NORMAL + * @arg @ref FL_SPI_SLAVE_SAMPLING_ADVANCE_HALFCLK + */ +__STATIC_INLINE uint32_t FL_SPI_GetSlaveSamplingAdjust(SPI_Type *SPIx) +{ + return (uint32_t)(READ_BIT(SPIx->CR1, SPI_CR1_SSPA_Msk)); +} + +/** + * @brief Set SPI Working Mode + * @rmtoll CR1 MM FL_SPI_SetWorkMode + * @param SPIx SPI instance + * @param mode This parameter can be one of the following values: + * @arg @ref FL_SPI_WORK_MODE_SLAVE + * @arg @ref FL_SPI_WORK_MODE_MASTER + * @retval None + */ +__STATIC_INLINE void FL_SPI_SetWorkMode(SPI_Type *SPIx, uint32_t mode) +{ + MODIFY_REG(SPIx->CR1, SPI_CR1_MM_Msk, mode); +} + +/** + * @brief Get SPI Working Mode + * @rmtoll CR1 MM FL_SPI_GetWorkMode + * @param SPIx SPI instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_SPI_WORK_MODE_SLAVE + * @arg @ref FL_SPI_WORK_MODE_MASTER + */ +__STATIC_INLINE uint32_t FL_SPI_GetWorkMode(SPI_Type *SPIx) +{ + return (uint32_t)(READ_BIT(SPIx->CR1, SPI_CR1_MM_Msk)); +} + +/** + * @brief Set SPI Send Wait Cycle Length in Master Mode + * @rmtoll CR1 WAIT FL_SPI_SetSendWait + * @param SPIx SPI instance + * @param wait This parameter can be one of the following values: + * @arg @ref FL_SPI_SEND_WAIT_1 + * @arg @ref FL_SPI_SEND_WAIT_2 + * @arg @ref FL_SPI_SEND_WAIT_3 + * @arg @ref FL_SPI_SEND_WAIT_4 + * @retval None + */ +__STATIC_INLINE void FL_SPI_SetSendWait(SPI_Type *SPIx, uint32_t wait) +{ + MODIFY_REG(SPIx->CR1, SPI_CR1_WAIT_Msk, wait); +} + +/** + * @brief Get SPI Send Wait Cycle Length in Master Mode + * @rmtoll CR1 WAIT FL_SPI_GetSendWait + * @param SPIx SPI instance + * @retval Returned value can be one of the following values: + */ +__STATIC_INLINE uint32_t FL_SPI_GetSendWait(SPI_Type *SPIx) +{ + return (uint32_t)(READ_BIT(SPIx->CR1, SPI_CR1_WAIT_Msk)); +} + +/** + * @brief Set SPI Baudrate in Master Mode + * @rmtoll CR1 BAUD FL_SPI_SetClockDivision + * @param SPIx SPI instance + * @param clock This parameter can be one of the following values: + * @arg @ref FL_SPI_CLK_DIV2 + * @arg @ref FL_SPI_CLK_DIV4 + * @arg @ref FL_SPI_CLK_DIV8 + * @arg @ref FL_SPI_CLK_DIV16 + * @arg @ref FL_SPI_CLK_DIV32 + * @arg @ref FL_SPI_CLK_DIV64 + * @arg @ref FL_SPI_CLK_DIV128 + * @arg @ref FL_SPI_CLK_DIV256 + * @retval None + */ +__STATIC_INLINE void FL_SPI_SetClockDivision(SPI_Type *SPIx, uint32_t clock) +{ + MODIFY_REG(SPIx->CR1, SPI_CR1_BAUD_Msk, clock); +} + +/** + * @brief Get SPI Baudrate in Master Mode + * @rmtoll CR1 BAUD FL_SPI_GetClockDivision + * @param SPIx SPI instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_SPI_BAUDRATE_DIV2 + * @arg @ref FL_SPI_BAUDRATE_DIV4 + * @arg @ref FL_SPI_BAUDRATE_DIV8 + * @arg @ref FL_SPI_BAUDRATE_DIV16 + * @arg @ref FL_SPI_BAUDRATE_DIV32 + * @arg @ref FL_SPI_BAUDRATE_DIV64 + * @arg @ref FL_SPI_BAUDRATE_DIV128 + * @arg @ref FL_SPI_BAUDRATE_DIV256 + */ +__STATIC_INLINE uint32_t FL_SPI_GetClockDivision(SPI_Type *SPIx) +{ + return (uint32_t)(READ_BIT(SPIx->CR1, SPI_CR1_BAUD_Msk)); +} + +/** + * @brief Set SPI Bit Order + * @rmtoll CR1 LSBF FL_SPI_SetBitOrder + * @param SPIx SPI instance + * @param bitOrder This parameter can be one of the following values: + * @arg @ref FL_SPI_BIT_ORDER_MSB_FIRST + * @arg @ref FL_SPI_BIT_ORDER_LSB_FIRST + * @retval None + */ +__STATIC_INLINE void FL_SPI_SetBitOrder(SPI_Type *SPIx, uint32_t bitOrder) +{ + MODIFY_REG(SPIx->CR1, SPI_CR1_LSBF_Msk, bitOrder); +} + +/** + * @brief Get SPI Bit Order + * @rmtoll CR1 LSBF FL_SPI_GetBitOrder + * @param SPIx SPI instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_SPI_BIT_ORDER_MSB_FIRST + * @arg @ref FL_SPI_BIT_ORDER_LSB_FIRST + */ +__STATIC_INLINE uint32_t FL_SPI_GetBitOrder(SPI_Type *SPIx) +{ + return (uint32_t)(READ_BIT(SPIx->CR1, SPI_CR1_LSBF_Msk)); +} + +/** + * @brief Set SPI Clock Polarity + * @rmtoll CR1 CPOL FL_SPI_SetClockPolarity + * @param SPIx SPI instance + * @param polarity This parameter can be one of the following values: + * @arg @ref FL_SPI_POLARITY_NORMAL + * @arg @ref FL_SPI_POLARITY_INVERT + * @retval None + */ +__STATIC_INLINE void FL_SPI_SetClockPolarity(SPI_Type *SPIx, uint32_t polarity) +{ + MODIFY_REG(SPIx->CR1, SPI_CR1_CPOL_Msk, polarity); +} + +/** + * @brief Get SPI Clock Polarity + * @rmtoll CR1 CPOL FL_SPI_GetClockPolarity + * @param SPIx SPI instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_SPI_POLARITY_NORMAL + * @arg @ref FL_SPI_POLARITY_INVERT + */ +__STATIC_INLINE uint32_t FL_SPI_GetClockPolarity(SPI_Type *SPIx) +{ + return (uint32_t)(READ_BIT(SPIx->CR1, SPI_CR1_CPOL_Msk)); +} + +/** + * @brief Set SPI Clock Phase + * @rmtoll CR1 CPHA FL_SPI_SetClockPhase + * @param SPIx SPI instance + * @param phase This parameter can be one of the following values: + * @arg @ref FL_SPI_PHASE_EDGE1 + * @arg @ref FL_SPI_PHASE_EDGE2 + * @retval None + */ +__STATIC_INLINE void FL_SPI_SetClockPhase(SPI_Type *SPIx, uint32_t phase) +{ + MODIFY_REG(SPIx->CR1, SPI_CR1_CPHA_Msk, phase); +} + +/** + * @brief Get SPI Clock Phase + * @rmtoll CR1 CPHA FL_SPI_GetClockPhase + * @param SPIx SPI instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_SPI_PHASE_EDGE1 + * @arg @ref FL_SPI_PHASE_EDGE2 + */ +__STATIC_INLINE uint32_t FL_SPI_GetClockPhase(SPI_Type *SPIx) +{ + return (uint32_t)(READ_BIT(SPIx->CR1, SPI_CR1_CPHA_Msk)); +} + +/** + * @brief Enable SPI Dummy Cycle Setting Under 4-lines Half Duplex Mode + * @rmtoll CR2 DUMMY_EN FL_SPI_EnableDummyCycle + * @param SPIx SPI instance + * @retval None + */ +__STATIC_INLINE void FL_SPI_EnableDummyCycle(SPI_Type *SPIx) +{ + SET_BIT(SPIx->CR2, SPI_CR2_DUMMY_EN_Msk); +} + +/** + * @brief Disable SPI Dummy Cycle Setting Under 4-lines Half Duplex Mode + * @rmtoll CR2 DUMMY_EN FL_SPI_DisableDummyCycle + * @param SPIx SPI instance + * @retval None + */ +__STATIC_INLINE void FL_SPI_DisableDummyCycle(SPI_Type *SPIx) +{ + CLEAR_BIT(SPIx->CR2, SPI_CR2_DUMMY_EN_Msk); +} + +/** + * @brief Get SPI Dummy Cycle Mode Setting + * @rmtoll CR2 DUMMY_EN FL_SPI_IsEnabledDummyCycle + * @param SPIx SPI instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_SPI_IsEnabledDummyCycle(SPI_Type *SPIx) +{ + return (uint32_t)(READ_BIT(SPIx->CR2, SPI_CR2_DUMMY_EN_Msk) == SPI_CR2_DUMMY_EN_Msk); +} + +/** + * @brief Enable SPI Receive Only Mode + * @rmtoll CR2 RXO FL_SPI_EnableRXOnlyMode + * @param SPIx SPI instance + * @retval None + */ +__STATIC_INLINE void FL_SPI_EnableRXOnlyMode(SPI_Type *SPIx) +{ + SET_BIT(SPIx->CR2, SPI_CR2_RXO_Msk); +} + +/** + * @brief Disable SPI Receive Only Mode Setting + * @rmtoll CR2 RXO FL_SPI_DisableRXOnlyMode + * @param SPIx SPI instance + * @retval None + */ +__STATIC_INLINE void FL_SPI_DisableRXOnlyMode(SPI_Type *SPIx) +{ + CLEAR_BIT(SPIx->CR2, SPI_CR2_RXO_Msk); +} + +/** + * @brief Get SPI Receive Only Mode state + * @rmtoll CR2 RXO FL_SPI_IsEnabledRXOnlyMode + * @param SPIx SPI instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_SPI_IsEnabledRXOnlyMode(SPI_Type *SPIx) +{ + return (uint32_t)(READ_BIT(SPIx->CR2, SPI_CR2_RXO_Msk) == SPI_CR2_RXO_Msk); +} + +/** + * @brief Set SPI Data Width + * @rmtoll CR2 DLEN FL_SPI_SetDataWidth + * @param SPIx SPI instance + * @param width This parameter can be one of the following values: + * @arg @ref FL_SPI_DATA_WIDTH_8B + * @arg @ref FL_SPI_DATA_WIDTH_16B + * @arg @ref FL_SPI_DATA_WIDTH_24B + * @arg @ref FL_SPI_DATA_WIDTH_32B + * @retval None + */ +__STATIC_INLINE void FL_SPI_SetDataWidth(SPI_Type *SPIx, uint32_t width) +{ + MODIFY_REG(SPIx->CR2, SPI_CR2_DLEN_Msk, width); +} + +/** + * @brief Get SPI Data Width + * @rmtoll CR2 DLEN FL_SPI_GetDataWidth + * @param SPIx SPI instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_SPI_DATA_WIDTH_8B + * @arg @ref FL_SPI_DATA_WIDTH_16B + * @arg @ref FL_SPI_DATA_WIDTH_24B + * @arg @ref FL_SPI_DATA_WIDTH_32B + */ +__STATIC_INLINE uint32_t FL_SPI_GetDataWidth(SPI_Type *SPIx) +{ + return (uint32_t)(READ_BIT(SPIx->CR2, SPI_CR2_DLEN_Msk)); +} + +/** + * @brief Set SPI Transfer Mode + * @rmtoll CR2 HALFDUPLEX FL_SPI_SetTransferMode + * @param SPIx SPI instance + * @param mode This parameter can be one of the following values: + * @arg @ref FL_SPI_TRANSFER_MODE_FULL_DUPLEX + * @arg @ref FL_SPI_TRANSFER_MODE_HALF_DUPLEX + * @retval None + */ +__STATIC_INLINE void FL_SPI_SetTransferMode(SPI_Type *SPIx, uint32_t mode) +{ + MODIFY_REG(SPIx->CR2, SPI_CR2_HALFDUPLEX_Msk, mode); +} + +/** + * @brief Get SPI Transfer Mode + * @rmtoll CR2 HALFDUPLEX FL_SPI_GetTransferMode + * @param SPIx SPI instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_SPI_TRANSFER_MODE_FULL_DUPLEX + * @arg @ref FL_SPI_TRANSFER_MODE_HALF_DUPLEX + */ +__STATIC_INLINE uint32_t FL_SPI_GetTransferMode(SPI_Type *SPIx) +{ + return (uint32_t)(READ_BIT(SPIx->CR2, SPI_CR2_HALFDUPLEX_Msk)); +} + +/** + * @brief Set SPI Transfer Direction Under Half-Duplex Mode + * @rmtoll CR2 HD_RW FL_SPI_SetTransferDirection + * @param SPIx SPI instance + * @param direction This parameter can be one of the following values: + * @arg @ref FL_SPI_HALF_DUPLEX_TX + * @arg @ref FL_SPI_HALF_DUPLEX_RX + * @retval None + */ +__STATIC_INLINE void FL_SPI_SetTransferDirection(SPI_Type *SPIx, uint32_t direction) +{ + MODIFY_REG(SPIx->CR2, SPI_CR2_HD_RW_Msk, direction); +} + +/** + * @brief Get SPI Transfer Direction Under Half-Duplex Mode + * @rmtoll CR2 HD_RW FL_SPI_GetTransferDirection + * @param SPIx SPI instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_SPI_HALF_DUPLEX_TX + * @arg @ref FL_SPI_HALF_DUPLEX_RX + */ +__STATIC_INLINE uint32_t FL_SPI_GetTransferDirection(SPI_Type *SPIx) +{ + return (uint32_t)(READ_BIT(SPIx->CR2, SPI_CR2_HD_RW_Msk)); +} + +/** + * @brief Set Command Frame Length Under Half-Duplex Mode + * @rmtoll CR2 CMD8B FL_SPI_SetHalfDuplexCommandLength + * @param SPIx SPI instance + * @param mode This parameter can be one of the following values: + * @arg @ref FL_SPI_HALF_DUPLEX_CMDLEN_DLEN + * @arg @ref FL_SPI_HALF_DUPLEX_CMDLEN_8B + * @retval None + */ +__STATIC_INLINE void FL_SPI_SetHalfDuplexCommandLength(SPI_Type *SPIx, uint32_t mode) +{ + MODIFY_REG(SPIx->CR2, SPI_CR2_CMD8B_Msk, mode); +} + +/** + * @brief Get Command Frame Length Under Half-Duplex Mode + * @rmtoll CR2 CMD8B FL_SPI_GetHalfDuplexCommandLength + * @param SPIx SPI instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_SPI_HALFDUPLEX_CMDLEN_DLEN + * @arg @ref FL_SPI_HALFDUPLEX_CMDLEN_8B + */ +__STATIC_INLINE uint32_t FL_SPI_GetHalfDuplexCommandLength(SPI_Type *SPIx) +{ + return (uint32_t)(READ_BIT(SPIx->CR2, SPI_CR2_CMD8B_Msk)); +} + +/** + * @brief Set SPI SSN Hard Pin Mode + * @rmtoll CR2 SSNM FL_SPI_SetHardwareSSNMode + * @param SPIx SPI instance + * @param mode This parameter can be one of the following values: + * @arg @ref FL_SPI_HARDWARE_SSN_AUTO_HIGH + * @arg @ref FL_SPI_HARDWARE_SSN_KEEP_LOW + * @retval None + */ +__STATIC_INLINE void FL_SPI_SetHardwareSSNMode(SPI_Type *SPIx, uint32_t mode) +{ + MODIFY_REG(SPIx->CR2, SPI_CR2_SSNM_Msk, mode); +} + +/** + * @brief Get SPI SSN Hard Pin Mode + * @rmtoll CR2 SSNM FL_SPI_GetHardwareSSNMode + * @param SPIx SPI instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_SPI_HARDWARE_SSN_AUTO_HIGH + * @arg @ref FL_SPI_HARDWARE_SSN_KEEP_LOW + */ +__STATIC_INLINE uint32_t FL_SPI_GetHardwareSSNMode(SPI_Type *SPIx) +{ + return (uint32_t)(READ_BIT(SPIx->CR2, SPI_CR2_SSNM_Msk)); +} + +/** + * @brief Enabel TX Only Mode Auto Disable + * @rmtoll CR2 TXO_AC FL_SPI_EnableTXOnlyModeAutoDisable + * @param SPIx SPI instance + * @retval None + */ +__STATIC_INLINE void FL_SPI_EnableTXOnlyModeAutoDisable(SPI_Type *SPIx) +{ + SET_BIT(SPIx->CR2, SPI_CR2_TXO_AC_Msk); +} + +/** + * @brief Disable TX Only Mode Auto Disable + * @rmtoll CR2 TXO_AC FL_SPI_DisableTXOnlyModeAutoDisable + * @param SPIx SPI instance + * @retval None + */ +__STATIC_INLINE void FL_SPI_DisableTXOnlyModeAutoDisable(SPI_Type *SPIx) +{ + CLEAR_BIT(SPIx->CR2, SPI_CR2_TXO_AC_Msk); +} + +/** + * @brief Get TX Only Mode Auto Disable Setting + * @rmtoll CR2 TXO_AC FL_SPI_IsEnabledTXOnlyModeAutoDisable + * @param SPIx SPI instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_SPI_IsEnabledTXOnlyModeAutoDisable(SPI_Type *SPIx) +{ + return (uint32_t)(READ_BIT(SPIx->CR2, SPI_CR2_TXO_AC_Msk) == SPI_CR2_TXO_AC_Msk); +} + +/** + * @brief EnableSPI TX Only Mode + * @rmtoll CR2 TXO FL_SPI_EnableTXOnlyMode + * @param SPIx SPI instance + * @retval None + */ +__STATIC_INLINE void FL_SPI_EnableTXOnlyMode(SPI_Type *SPIx) +{ + SET_BIT(SPIx->CR2, SPI_CR2_TXO_Msk); +} + +/** + * @brief Get SPI TX Only Mode Setting State + * @rmtoll CR2 TXO FL_SPI_IsEnabledTXOnlyMode + * @param SPIx SPI instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_SPI_IsEnabledTXOnlyMode(SPI_Type *SPIx) +{ + return (uint32_t)(READ_BIT(SPIx->CR2, SPI_CR2_TXO_Msk) == SPI_CR2_TXO_Msk); +} + +/** + * @brief Set SSN Pin + * @rmtoll CR2 SSN FL_SPI_SetSSNPin + * @param SPIx SPI instance + * @param state This parameter can be one of the following values: + * @arg @ref FL_SPI_SSN_LOW + * @arg @ref FL_SPI_SSN_HIGH + * @retval None + */ +__STATIC_INLINE void FL_SPI_SetSSNPin(SPI_Type *SPIx, uint32_t state) +{ + MODIFY_REG(SPIx->CR2, SPI_CR2_SSN_Msk, state); +} + +/** + * @brief Reset SSN Pin + * @rmtoll CR2 SSN FL_SPI_GetSSNPin + * @param SPIx SPI instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_SPI_SSN_LOW + * @arg @ref FL_SPI_SSN_HIGH + */ +__STATIC_INLINE uint32_t FL_SPI_GetSSNPin(SPI_Type *SPIx) +{ + return (uint32_t)(READ_BIT(SPIx->CR2, SPI_CR2_SSN_Msk)); +} + +/** + * @brief Enable SNN Sofe Control Under Master Mode + * @rmtoll CR2 SSNSEN FL_SPI_EnableSSNSoftControl + * @param SPIx SPI instance + * @retval None + */ +__STATIC_INLINE void FL_SPI_EnableSSNSoftControl(SPI_Type *SPIx) +{ + SET_BIT(SPIx->CR2, SPI_CR2_SSNSEN_Msk); +} + +/** + * @brief Get SNN Sofe Control State Under Master Mode + * @rmtoll CR2 SSNSEN FL_SPI_IsEnabledSSNSoftControl + * @param SPIx SPI instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_SPI_IsEnabledSSNSoftControl(SPI_Type *SPIx) +{ + return (uint32_t)(READ_BIT(SPIx->CR2, SPI_CR2_SSNSEN_Msk) == SPI_CR2_SSNSEN_Msk); +} + +/** + * @brief Disable SNN Sofe Control Under Master Mode + * @rmtoll CR2 SSNSEN FL_SPI_DisableSSNSoftControl + * @param SPIx SPI instance + * @retval None + */ +__STATIC_INLINE void FL_SPI_DisableSSNSoftControl(SPI_Type *SPIx) +{ + CLEAR_BIT(SPIx->CR2, SPI_CR2_SSNSEN_Msk); +} + +/** + * @brief Enable SPI + * @rmtoll CR2 SPIEN FL_SPI_Enable + * @param SPIx SPI instance + * @retval None + */ +__STATIC_INLINE void FL_SPI_Enable(SPI_Type *SPIx) +{ + SET_BIT(SPIx->CR2, SPI_CR2_SPIEN_Msk); +} + +/** + * @brief Get SPI Enable Status + * @rmtoll CR2 SPIEN FL_SPI_IsEnabled + * @param SPIx SPI instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_SPI_IsEnabled(SPI_Type *SPIx) +{ + return (uint32_t)(READ_BIT(SPIx->CR2, SPI_CR2_SPIEN_Msk) == SPI_CR2_SPIEN_Msk); +} + +/** + * @brief Disable SPI + * @rmtoll CR2 SPIEN FL_SPI_Disable + * @param SPIx SPI instance + * @retval None + */ +__STATIC_INLINE void FL_SPI_Disable(SPI_Type *SPIx) +{ + CLEAR_BIT(SPIx->CR2, SPI_CR2_SPIEN_Msk); +} + +/** + * @brief Clear SPI TX Buffer + * @rmtoll CR3 TXBFC FL_SPI_ClearTXBuff + * @param SPIx SPI instance + * @retval None + */ +__STATIC_INLINE void FL_SPI_ClearTXBuff(SPI_Type *SPIx) +{ + WRITE_REG(SPIx->CR3, SPI_CR3_TXBFC_Msk); +} + +/** + * @brief Clear SPI RX Buffer + * @rmtoll CR3 RXBFC FL_SPI_ClearRXBuff + * @param SPIx SPI instance + * @retval None + */ +__STATIC_INLINE void FL_SPI_ClearRXBuff(SPI_Type *SPIx) +{ + WRITE_REG(SPIx->CR3, SPI_CR3_RXBFC_Msk); +} + +/** + * @brief Clear SPI Master Error Flag + * @rmtoll CR3 MERRC FL_SPI_ClearFlag_MasterError + * @param SPIx SPI instance + * @retval None + */ +__STATIC_INLINE void FL_SPI_ClearFlag_MasterError(SPI_Type *SPIx) +{ + WRITE_REG(SPIx->CR3, SPI_CR3_MERRC_Msk); +} + +/** + * @brief Clear SPI Slave Error Flag + * @rmtoll CR3 SERRC FL_SPI_ClearFlag_SlaveError + * @param SPIx SPI instance + * @retval None + */ +__STATIC_INLINE void FL_SPI_ClearFlag_SlaveError(SPI_Type *SPIx) +{ + WRITE_REG(SPIx->CR3, SPI_CR3_SERRC_Msk); +} + +/** + * @brief Disable SPI Error Interrupt + * @rmtoll IER ERRIE FL_SPI_DisableIT_Error + * @param SPIx SPI instance + * @retval None + */ +__STATIC_INLINE void FL_SPI_DisableIT_Error(SPI_Type *SPIx) +{ + CLEAR_BIT(SPIx->IER, SPI_IER_ERRIE_Msk); +} + +/** + * @brief Enable SPI Error Interrupt + * @rmtoll IER ERRIE FL_SPI_EnableIT_Error + * @param SPIx SPI instance + * @retval None + */ +__STATIC_INLINE void FL_SPI_EnableIT_Error(SPI_Type *SPIx) +{ + SET_BIT(SPIx->IER, SPI_IER_ERRIE_Msk); +} + +/** + * @brief Get SPI Error Interrupt Enable Status + * @rmtoll IER ERRIE FL_SPI_IsEnabledIT_Error + * @param SPIx SPI instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_SPI_IsEnabledIT_Error(SPI_Type *SPIx) +{ + return (uint32_t)(READ_BIT(SPIx->IER, SPI_IER_ERRIE_Msk) == SPI_IER_ERRIE_Msk); +} + +/** + * @brief Disable SPI Transmit Complete Interrupt + * @rmtoll IER TXIE FL_SPI_DisableIT_TXComplete + * @param SPIx SPI instance + * @retval None + */ +__STATIC_INLINE void FL_SPI_DisableIT_TXComplete(SPI_Type *SPIx) +{ + CLEAR_BIT(SPIx->IER, SPI_IER_TXIE_Msk); +} + +/** + * @brief Enable SPI Transmit Complete Interrupt + * @rmtoll IER TXIE FL_SPI_EnableIT_TXComplete + * @param SPIx SPI instance + * @retval None + */ +__STATIC_INLINE void FL_SPI_EnableIT_TXComplete(SPI_Type *SPIx) +{ + SET_BIT(SPIx->IER, SPI_IER_TXIE_Msk); +} + +/** + * @brief Get SPI Transmit Complete Interrupt Enable Status + * @rmtoll IER TXIE FL_SPI_IsEnabledIT_TXComplete + * @param SPIx SPI instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_SPI_IsEnabledIT_TXComplete(SPI_Type *SPIx) +{ + return (uint32_t)(READ_BIT(SPIx->IER, SPI_IER_TXIE_Msk) == SPI_IER_TXIE_Msk); +} + +/** + * @brief Disable SPI Receive Complete Interrupt + * @rmtoll IER RXIE FL_SPI_DisableIT_RXComplete + * @param SPIx SPI instance + * @retval None + */ +__STATIC_INLINE void FL_SPI_DisableIT_RXComplete(SPI_Type *SPIx) +{ + CLEAR_BIT(SPIx->IER, SPI_IER_RXIE_Msk); +} + +/** + * @brief Enable SPI Receive Complete Interrupt + * @rmtoll IER RXIE FL_SPI_EnableIT_RXComplete + * @param SPIx SPI instance + * @retval None + */ +__STATIC_INLINE void FL_SPI_EnableIT_RXComplete(SPI_Type *SPIx) +{ + SET_BIT(SPIx->IER, SPI_IER_RXIE_Msk); +} + +/** + * @brief Get SPI Receive Complete Interrupt Enable Status + * @rmtoll IER RXIE FL_SPI_IsEnabledIT_RXComplete + * @param SPIx SPI instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_SPI_IsEnabledIT_RXComplete(SPI_Type *SPIx) +{ + return (uint32_t)(READ_BIT(SPIx->IER, SPI_IER_RXIE_Msk) == SPI_IER_RXIE_Msk); +} + +/** + * @brief Set SPI Output Data/Command Under Half-Duplex Mode + * @rmtoll ISR DCN_TX FL_SPI_SetFrameMode + * @param SPIx SPI instance + * @param mode This parameter can be one of the following values: + * @arg @ref FL_SPI_FRAME_MODE_CMD + * @arg @ref FL_SPI_FRAME_MODE_DATA + * @retval None + */ +__STATIC_INLINE void FL_SPI_SetFrameMode(SPI_Type *SPIx, uint32_t mode) +{ + MODIFY_REG(SPIx->ISR, SPI_ISR_DCN_TX_Msk, mode); +} + +/** + * @brief Get SPI Output Data/Command Under Half-Duplex Mode Setting + * @rmtoll ISR DCN_TX FL_SPI_GetFrameMode + * @param SPIx SPI instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_SPI_FRAME_MODE_CMD + * @arg @ref FL_SPI_FRAME_MODE_DATA + */ +__STATIC_INLINE uint32_t FL_SPI_GetFrameMode(SPI_Type *SPIx) +{ + return (uint32_t)(READ_BIT(SPIx->ISR, SPI_ISR_DCN_TX_Msk)); +} + +/** + * @brief Get SPI Receive Collision Flag + * @rmtoll ISR RXCOL FL_SPI_IsActiveFlag_RXBuffOverflow + * @param SPIx SPI instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_SPI_IsActiveFlag_RXBuffOverflow(SPI_Type *SPIx) +{ + return (uint32_t)(READ_BIT(SPIx->ISR, SPI_ISR_RXCOL_Msk) == (SPI_ISR_RXCOL_Msk)); +} + +/** + * @brief Clear SPI Receive Collision Flag + * @rmtoll ISR RXCOL FL_SPI_ClearFlag_RXBuffOverflow + * @param SPIx SPI instance + * @retval None + */ +__STATIC_INLINE void FL_SPI_ClearFlag_RXBuffOverflow(SPI_Type *SPIx) +{ + WRITE_REG(SPIx->ISR, SPI_ISR_RXCOL_Msk); +} + +/** + * @brief Get SPI Transmit Collision Flag + * @rmtoll ISR TXCOL FL_SPI_IsActiveFlag_TXBuffOverflow + * @param SPIx SPI instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_SPI_IsActiveFlag_TXBuffOverflow(SPI_Type *SPIx) +{ + return (uint32_t)(READ_BIT(SPIx->ISR, SPI_ISR_TXCOL_Msk) == (SPI_ISR_TXCOL_Msk)); +} + +/** + * @brief Clear SPI Transmit Collision Flag + * @rmtoll ISR TXCOL FL_SPI_ClearFlag_TXBuffOverflow + * @param SPIx SPI instance + * @retval None + */ +__STATIC_INLINE void FL_SPI_ClearFlag_TXBuffOverflow(SPI_Type *SPIx) +{ + WRITE_REG(SPIx->ISR, SPI_ISR_TXCOL_Msk); +} + +/** + * @brief Get SPI Busy Flag + * @rmtoll ISR BUSY FL_SPI_IsActiveFlag_Busy + * @param SPIx SPI instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_SPI_IsActiveFlag_Busy(SPI_Type *SPIx) +{ + return (uint32_t)(READ_BIT(SPIx->ISR, SPI_ISR_BUSY_Msk) == (SPI_ISR_BUSY_Msk)); +} + +/** + * @brief Get SPI Master Error Flag + * @rmtoll ISR MERR FL_SPI_IsActiveFlag_MasterError + * @param SPIx SPI instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_SPI_IsActiveFlag_MasterError(SPI_Type *SPIx) +{ + return (uint32_t)(READ_BIT(SPIx->ISR, SPI_ISR_MERR_Msk) == (SPI_ISR_MERR_Msk)); +} + +/** + * @brief Get SPI Slave Error Flag + * @rmtoll ISR SERR FL_SPI_IsActiveFlag_SlaveError + * @param SPIx SPI instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_SPI_IsActiveFlag_SlaveError(SPI_Type *SPIx) +{ + return (uint32_t)(READ_BIT(SPIx->ISR, SPI_ISR_SERR_Msk) == (SPI_ISR_SERR_Msk)); +} + +/** + * @brief Get SPI TX Buffer Empty Flag + * @rmtoll ISR TXBE FL_SPI_IsActiveFlag_TXBuffEmpty + * @param SPIx SPI instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_SPI_IsActiveFlag_TXBuffEmpty(SPI_Type *SPIx) +{ + return (uint32_t)(READ_BIT(SPIx->ISR, SPI_ISR_TXBE_Msk) == (SPI_ISR_TXBE_Msk)); +} + +/** + * @brief Get SPI RX Buffer Full Flag + * @rmtoll ISR RXBF FL_SPI_IsActiveFlag_RXBuffFull + * @param SPIx SPI instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_SPI_IsActiveFlag_RXBuffFull(SPI_Type *SPIx) +{ + return (uint32_t)(READ_BIT(SPIx->ISR, SPI_ISR_RXBF_Msk) == (SPI_ISR_RXBF_Msk)); +} + +/** + * @brief Write SPI TX Buffer + * @rmtoll TXBUF FL_SPI_WriteTXBuff + * @param SPIx SPI instance + * @param data + * @retval None + */ +__STATIC_INLINE void FL_SPI_WriteTXBuff(SPI_Type *SPIx, uint32_t data) +{ + MODIFY_REG(SPIx->TXBUF, (0xffffffffU << 0U), (data << 0U)); +} + +/** + * @brief Read SPI TX Buffer + * @rmtoll RXBUF FL_SPI_ReadRXBuff + * @param SPIx SPI instance + * @retval + */ +__STATIC_INLINE uint32_t FL_SPI_ReadRXBuff(SPI_Type *SPIx) +{ + return (uint32_t)(READ_BIT(SPIx->RXBUF, (0xffffffffU << 0U)) >> 0U); +} + +/** + * @} + */ + +/** @defgroup SPI_FL_EF_Init Initialization and de-initialization functions + * @{ + */ +FL_ErrorStatus FL_SPI_DeInit(SPI_Type *SPIx); +FL_ErrorStatus FL_SPI_Init(SPI_Type *SPIx, FL_SPI_InitTypeDef *initStruct); +void FL_SPI_StructInit(FL_SPI_InitTypeDef *initStruct); + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif /* __FM33LG0XX_FL_SPI_H*/ + +/*************************Py_Code_Generator Version: 0.1-0.14-0.1 @ 2020-10-20*************************/ +/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/ diff --git a/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_svd.h b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_svd.h new file mode 100644 index 0000000..8a1145a --- /dev/null +++ b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_svd.h @@ -0,0 +1,631 @@ + /** + ******************************************************************************************************* + * @file fm33lg0xx_fl_svd.h + * @author FMSH Application Team + * @brief Head file of SVD FL Module + ******************************************************************************************************* + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + + + +/* Define to prevent recursive inclusion---------------------------------------------------------------*/ +#ifndef __FM33LG0XX_FL_SVD_H +#define __FM33LG0XX_FL_SVD_H + +#ifdef __cplusplus +extern "C" { +#endif +/* Includes -------------------------------------------------------------------------------------------*/ +#include "fm33lg0xx_fl_def.h" +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @defgroup SVD SVD + * @brief SVD FL driver + * @{ + */ + +/* Exported types -------------------------------------------------------------------------------------*/ +/** @defgroup SVD_FL_ES_INIT SVD Exported Init structures + * @{ + */ + +/** + * @brief FL SVD Init Sturcture definition + */ + +typedef struct +{ + /* 参考电压 */ + uint32_t referenceVoltage; + + /* 报警阈值 */ + uint32_t warningThreshold; + + /* 数字滤波 */ + uint32_t digitalFilter; + + /* 工作模式 */ + uint32_t workMode; + + /* 间歇使能间隔 */ + uint32_t enablePeriod; + + /* SVS通道选择 */ + uint32_t SVSChannel; + +} FL_SVD_InitTypeDef; + +/** + * @} + */ +/* Exported constants ---------------------------------------------------------------------------------*/ +/** @defgroup SVD_FL_Exported_Constants SVD Exported Constants + * @{ + */ + +#define SVD_CFGR_LVL_Pos (4U) +#define SVD_CFGR_LVL_Msk (0xfU << SVD_CFGR_LVL_Pos) +#define SVD_CFGR_LVL SVD_CFGR_LVL_Msk + +#define SVD_CFGR_DFEN_Pos (3U) +#define SVD_CFGR_DFEN_Msk (0x1U << SVD_CFGR_DFEN_Pos) +#define SVD_CFGR_DFEN SVD_CFGR_DFEN_Msk + +#define SVD_CFGR_MOD_Pos (2U) +#define SVD_CFGR_MOD_Msk (0x1U << SVD_CFGR_MOD_Pos) +#define SVD_CFGR_MOD SVD_CFGR_MOD_Msk + +#define SVD_CFGR_ITVL_Pos (0U) +#define SVD_CFGR_ITVL_Msk (0x3U << SVD_CFGR_ITVL_Pos) +#define SVD_CFGR_ITVL SVD_CFGR_ITVL_Msk + +#define SVD_CR_SVS0EN_Pos (1U) +#define SVD_CR_SVS0EN_Msk (0x1U << SVD_CR_SVS0EN_Pos) +#define SVD_CR_SVS0EN SVD_CR_SVS0EN_Msk + +#define SVD_CR_EN_Pos (0U) +#define SVD_CR_EN_Msk (0x1U << SVD_CR_EN_Pos) +#define SVD_CR_EN SVD_CR_EN_Msk + +#define SVD_IER_PFIE_Pos (1U) +#define SVD_IER_PFIE_Msk (0x1U << SVD_IER_PFIE_Pos) +#define SVD_IER_PFIE SVD_IER_PFIE_Msk + +#define SVD_IER_PRIE_Pos (0U) +#define SVD_IER_PRIE_Msk (0x1U << SVD_IER_PRIE_Pos) +#define SVD_IER_PRIE SVD_IER_PRIE_Msk + +#define SVD_ISR_SVDO_Pos (8U) +#define SVD_ISR_SVDO_Msk (0x1U << SVD_ISR_SVDO_Pos) +#define SVD_ISR_SVDO SVD_ISR_SVDO_Msk + +#define SVD_ISR_SVDR_Pos (7U) +#define SVD_ISR_SVDR_Msk (0x1U << SVD_ISR_SVDR_Pos) +#define SVD_ISR_SVDR SVD_ISR_SVDR_Msk + +#define SVD_ISR_PFF_Pos (1U) +#define SVD_ISR_PFF_Msk (0x1U << SVD_ISR_PFF_Pos) +#define SVD_ISR_PFF SVD_ISR_PFF_Msk + +#define SVD_ISR_PRF_Pos (0U) +#define SVD_ISR_PRF_Msk (0x1U << SVD_ISR_PRF_Pos) +#define SVD_ISR_PRF SVD_ISR_PRF_Msk + +#define SVD_VSR_EN_Pos (0U) +#define SVD_VSR_EN_Msk (0x7U << SVD_VSR_EN_Pos) +#define SVD_VSR_EN SVD_VSR_EN_Msk + + + +#define FL_SVD_REFERENCE_1P0V (0x1UL << 2U) +#define FL_SVD_REFERENCE_0P95V (0x1UL << 1U) +#define FL_SVD_REFERENCE_0P9V (0x1UL << 0U) + + + +#define FL_SVD_WARNING_THRESHOLD_GROUP0 (0x0UL << SVD_CFGR_LVL_Pos) +#define FL_SVD_WARNING_THRESHOLD_GROUP1 (0x1UL << SVD_CFGR_LVL_Pos) +#define FL_SVD_WARNING_THRESHOLD_GROUP2 (0x2UL << SVD_CFGR_LVL_Pos) +#define FL_SVD_WARNING_THRESHOLD_GROUP3 (0x3UL << SVD_CFGR_LVL_Pos) +#define FL_SVD_WARNING_THRESHOLD_GROUP4 (0x4UL << SVD_CFGR_LVL_Pos) +#define FL_SVD_WARNING_THRESHOLD_GROUP5 (0x5UL << SVD_CFGR_LVL_Pos) +#define FL_SVD_WARNING_THRESHOLD_GROUP6 (0x6UL << SVD_CFGR_LVL_Pos) +#define FL_SVD_WARNING_THRESHOLD_GROUP7 (0x7UL << SVD_CFGR_LVL_Pos) +#define FL_SVD_WARNING_THRESHOLD_GROUP8 (0x8UL << SVD_CFGR_LVL_Pos) +#define FL_SVD_WARNING_THRESHOLD_GROUP9 (0x9UL << SVD_CFGR_LVL_Pos) +#define FL_SVD_WARNING_THRESHOLD_GROUP10 (0xaUL << SVD_CFGR_LVL_Pos) +#define FL_SVD_WARNING_THRESHOLD_GROUP11 (0xbUL << SVD_CFGR_LVL_Pos) +#define FL_SVD_WARNING_THRESHOLD_GROUP12 (0xcUL << SVD_CFGR_LVL_Pos) +#define FL_SVD_WARNING_THRESHOLD_GROUP13 (0xdUL << SVD_CFGR_LVL_Pos) +#define FL_SVD_WARNING_THRESHOLD_GROUP14 (0xeUL << SVD_CFGR_LVL_Pos) +#define FL_SVD_WARNING_THRESHOLD_GROUP15 (0xfUL << SVD_CFGR_LVL_Pos) + + +#define FL_SVD_WORK_MODE_CONTINUOUS (0x0UL << SVD_CFGR_MOD_Pos) +#define FL_SVD_WORK_MODE_PERIODIC (0x1UL << SVD_CFGR_MOD_Pos) + + +#define FL_SVD_ENABLE_PERIOD_62P5MS (0x0UL << SVD_CFGR_ITVL_Pos) +#define FL_SVD_ENABLE_PERIOD_256MS (0x1UL << SVD_CFGR_ITVL_Pos) +#define FL_SVD_ENABLE_PERIOD_1000MS (0x2UL << SVD_CFGR_ITVL_Pos) +#define FL_SVD_ENABLE_PERIOD_4000MS (0x3UL << SVD_CFGR_ITVL_Pos) + + +#define FL_SVD_POWER_STATUS_FALLING (0x0U << SVD_ISR_SVDO_Pos) +#define FL_SVD_POWER_STATUS_RISING (0x1U << SVD_ISR_SVDO_Pos) + +#define FL_SVD_LATCHED_POWER_STATUS_FALLING (0x0U << SVD_ISR_SVDR_Pos) +#define FL_SVD_LATCHED_POWER_STATUS_RISING (0x1U << SVD_ISR_SVDR_Pos) + +/** + * @} + */ +/* Exported functions ---------------------------------------------------------------------------------*/ +/** @defgroup SVD_FL_Exported_Functions SVD Exported Functions + * @{ + */ + +/** + * @brief Set SVD Threshold Warning Level + * @rmtoll CFGR LVL FL_SVD_SetWarningThreshold + * @param SVDx SVD instance + * @param level This parameter can be one of the following values: + * @arg @ref FL_SVD_WARNING_THRESHOLD_GROUP0 + * @arg @ref FL_SVD_WARNING_THRESHOLD_GROUP1 + * @arg @ref FL_SVD_WARNING_THRESHOLD_GROUP2 + * @arg @ref FL_SVD_WARNING_THRESHOLD_GROUP3 + * @arg @ref FL_SVD_WARNING_THRESHOLD_GROUP4 + * @arg @ref FL_SVD_WARNING_THRESHOLD_GROUP5 + * @arg @ref FL_SVD_WARNING_THRESHOLD_GROUP6 + * @arg @ref FL_SVD_WARNING_THRESHOLD_GROUP7 + * @arg @ref FL_SVD_WARNING_THRESHOLD_GROUP8 + * @arg @ref FL_SVD_WARNING_THRESHOLD_GROUP9 + * @arg @ref FL_SVD_WARNING_THRESHOLD_GROUP10 + * @arg @ref FL_SVD_WARNING_THRESHOLD_GROUP11 + * @arg @ref FL_SVD_WARNING_THRESHOLD_GROUP12 + * @arg @ref FL_SVD_WARNING_THRESHOLD_GROUP13 + * @arg @ref FL_SVD_WARNING_THRESHOLD_GROUP14 + * @arg @ref FL_SVD_WARNING_THRESHOLD_GROUP15 + * @retval None + */ +__STATIC_INLINE void FL_SVD_SetWarningThreshold(SVD_Type *SVDx, uint32_t level) +{ + MODIFY_REG(SVDx->CFGR, SVD_CFGR_LVL_Msk, level); +} + +/** + * @brief Get SVD Warning Threshold Level + * @rmtoll CFGR LVL FL_SVD_GetWarningThreshold + * @param SVDx SVD instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_SVD_WARNING_THRESHOLD_GROUP0 + * @arg @ref FL_SVD_WARNING_THRESHOLD_GROUP1 + * @arg @ref FL_SVD_WARNING_THRESHOLD_GROUP2 + * @arg @ref FL_SVD_WARNING_THRESHOLD_GROUP3 + * @arg @ref FL_SVD_WARNING_THRESHOLD_GROUP4 + * @arg @ref FL_SVD_WARNING_THRESHOLD_GROUP5 + * @arg @ref FL_SVD_WARNING_THRESHOLD_GROUP6 + * @arg @ref FL_SVD_WARNING_THRESHOLD_GROUP7 + * @arg @ref FL_SVD_WARNING_THRESHOLD_GROUP8 + * @arg @ref FL_SVD_WARNING_THRESHOLD_GROUP9 + * @arg @ref FL_SVD_WARNING_THRESHOLD_GROUP10 + * @arg @ref FL_SVD_WARNING_THRESHOLD_GROUP11 + * @arg @ref FL_SVD_WARNING_THRESHOLD_GROUP12 + * @arg @ref FL_SVD_WARNING_THRESHOLD_GROUP13 + * @arg @ref FL_SVD_WARNING_THRESHOLD_GROUP14 + * @arg @ref FL_SVD_WARNING_THRESHOLD_GROUP15 + */ +__STATIC_INLINE uint32_t FL_SVD_GetWarningThreshold(SVD_Type *SVDx) +{ + return (uint32_t)(READ_BIT(SVDx->CFGR, SVD_CFGR_LVL_Msk)); +} + +/** + * @brief Enable SVD Digital Filter + * @rmtoll CFGR DFEN FL_SVD_EnableDigitalFilter + * @param SVDx SVD instance + * @retval None + */ +__STATIC_INLINE void FL_SVD_EnableDigitalFilter(SVD_Type *SVDx) +{ + SET_BIT(SVDx->CFGR, SVD_CFGR_DFEN_Msk); +} + +/** + * @brief Get SVD Digital Filter Enable Status + * @rmtoll CFGR DFEN FL_SVD_IsEnabledDigitalFilter + * @param SVDx SVD instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_SVD_IsEnabledDigitalFilter(SVD_Type *SVDx) +{ + return (uint32_t)(READ_BIT(SVDx->CFGR, SVD_CFGR_DFEN_Msk) == SVD_CFGR_DFEN_Msk); +} + +/** + * @brief Disable SVD Digital Filter + * @rmtoll CFGR DFEN FL_SVD_DisableDigitalFilter + * @param SVDx SVD instance + * @retval None + */ +__STATIC_INLINE void FL_SVD_DisableDigitalFilter(SVD_Type *SVDx) +{ + CLEAR_BIT(SVDx->CFGR, SVD_CFGR_DFEN_Msk); +} + +/** + * @brief Set SVD Work Mode + * @rmtoll CFGR MOD FL_SVD_SetWorkMode + * @param SVDx SVD instance + * @param mode This parameter can be one of the following values: + * @arg @ref FL_SVD_WORK_MODE_CONTINUOUS + * @arg @ref FL_SVD_WORK_MODE_PERIODIC + * @retval None + */ +__STATIC_INLINE void FL_SVD_SetWorkMode(SVD_Type *SVDx, uint32_t mode) +{ + MODIFY_REG(SVDx->CFGR, SVD_CFGR_MOD_Msk, mode); +} + +/** + * @brief Get SVD Work Mode + * @rmtoll CFGR MOD FL_SVD_GetWorkMode + * @param SVDx SVD instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_SVD_WORK_MODE_CONTINUOUS + * @arg @ref FL_SVD_WORK_MODE_PERIODIC + */ +__STATIC_INLINE uint32_t FL_SVD_GetWorkMode(SVD_Type *SVDx) +{ + return (uint32_t)(READ_BIT(SVDx->CFGR, SVD_CFGR_MOD_Msk)); +} + +/** + * @brief Set SVD Enable Period + * @rmtoll CFGR ITVL FL_SVD_SetEnablePeriod + * @param SVDx SVD instance + * @param period This parameter can be one of the following values: + * @arg @ref FL_SVD_ENABLE_PERIOD_62P5MS + * @arg @ref FL_SVD_ENABLE_PERIOD_256MS + * @arg @ref FL_SVD_ENABLE_PERIOD_1000MS + * @arg @ref FL_SVD_ENABLE_PERIOD_4000MS + * @retval None + */ +__STATIC_INLINE void FL_SVD_SetEnablePeriod(SVD_Type *SVDx, uint32_t period) +{ + MODIFY_REG(SVDx->CFGR, SVD_CFGR_ITVL_Msk, period); +} + +/** + * @brief Get SVD Work Interval + * @rmtoll CFGR ITVL FL_SVD_GetEnablePeriod + * @param SVDx SVD instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_SVD_ENABLE_PERIOD_62P5MS + * @arg @ref FL_SVD_ENABLE_PERIOD_256MS + * @arg @ref FL_SVD_ENABLE_PERIOD_1000MS + * @arg @ref FL_SVD_ENABLE_PERIOD_4000MS + */ +__STATIC_INLINE uint32_t FL_SVD_GetEnablePeriod(SVD_Type *SVDx) +{ + return (uint32_t)(READ_BIT(SVDx->CFGR, SVD_CFGR_ITVL_Msk)); +} + +/** + * @brief Enable External SVS Channel + * @rmtoll CR SVS0EN FL_SVD_EnableSVSChannel + * @param SVDx SVD instance + * @retval None + */ +__STATIC_INLINE void FL_SVD_EnableSVSChannel(SVD_Type *SVDx) +{ + SET_BIT(SVDx->CR, SVD_CR_SVS0EN_Msk); +} + +/** + * @brief Get External SVS Channel Enable Status + * @rmtoll CR SVS0EN FL_SVD_IsEnabledSVSChannel + * @param SVDx SVD instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_SVD_IsEnabledSVSChannel(SVD_Type *SVDx) +{ + return (uint32_t)(READ_BIT(SVDx->CR, SVD_CR_SVS0EN_Msk) == SVD_CR_SVS0EN_Msk); +} + +/** + * @brief Disable External SVS Channel + * @rmtoll CR SVS0EN FL_SVD_DisableSVSChannel + * @param SVDx SVD instance + * @retval None + */ +__STATIC_INLINE void FL_SVD_DisableSVSChannel(SVD_Type *SVDx) +{ + CLEAR_BIT(SVDx->CR, SVD_CR_SVS0EN_Msk); +} + +/** + * @brief Enable SVD + * @rmtoll CR EN FL_SVD_Enable + * @param SVDx SVD instance + * @retval None + */ +__STATIC_INLINE void FL_SVD_Enable(SVD_Type *SVDx) +{ + SET_BIT(SVDx->CR, SVD_CR_EN_Msk); +} + +/** + * @brief Get SVD Enable Status + * @rmtoll CR EN FL_SVD_IsEnabled + * @param SVDx SVD instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_SVD_IsEnabled(SVD_Type *SVDx) +{ + return (uint32_t)(READ_BIT(SVDx->CR, SVD_CR_EN_Msk) == SVD_CR_EN_Msk); +} + +/** + * @brief Disable SVD + * @rmtoll CR EN FL_SVD_Disable + * @param SVDx SVD instance + * @retval None + */ +__STATIC_INLINE void FL_SVD_Disable(SVD_Type *SVDx) +{ + CLEAR_BIT(SVDx->CR, SVD_CR_EN_Msk); +} + +/** + * @brief Enable Power Fall Interrupt + * @rmtoll IER PFIE FL_SVD_EnableIT_PowerFall + * @param SVDx SVD instance + * @retval None + */ +__STATIC_INLINE void FL_SVD_EnableIT_PowerFall(SVD_Type *SVDx) +{ + SET_BIT(SVDx->IER, SVD_IER_PFIE_Msk); +} + +/** + * @brief Get Power Fall Interrupt Status + * @rmtoll IER PFIE FL_SVD_IsEnabledIT_PowerFall + * @param SVDx SVD instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_SVD_IsEnabledIT_PowerFall(SVD_Type *SVDx) +{ + return (uint32_t)(READ_BIT(SVDx->IER, SVD_IER_PFIE_Msk) == SVD_IER_PFIE_Msk); +} + +/** + * @brief Disable Power Fall Interrupt + * @rmtoll IER PFIE FL_SVD_DisableIT_PowerFall + * @param SVDx SVD instance + * @retval None + */ +__STATIC_INLINE void FL_SVD_DisableIT_PowerFall(SVD_Type *SVDx) +{ + CLEAR_BIT(SVDx->IER, SVD_IER_PFIE_Msk); +} + +/** + * @brief Enable Power Rise Interrupt + * @rmtoll IER PRIE FL_SVD_EnableIT_PowerRise + * @param SVDx SVD instance + * @retval None + */ +__STATIC_INLINE void FL_SVD_EnableIT_PowerRise(SVD_Type *SVDx) +{ + SET_BIT(SVDx->IER, SVD_IER_PRIE_Msk); +} + +/** + * @brief Get Power Rise Interrupt Status + * @rmtoll IER PRIE FL_SVD_IsEnabledIT_PowerRise + * @param SVDx SVD instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_SVD_IsEnabledIT_PowerRise(SVD_Type *SVDx) +{ + return (uint32_t)(READ_BIT(SVDx->IER, SVD_IER_PRIE_Msk) == SVD_IER_PRIE_Msk); +} + +/** + * @brief Disable Power Rise Interrupt + * @rmtoll IER PRIE FL_SVD_DisableIT_PowerRise + * @param SVDx SVD instance + * @retval None + */ +__STATIC_INLINE void FL_SVD_DisableIT_PowerRise(SVD_Type *SVDx) +{ + CLEAR_BIT(SVDx->IER, SVD_IER_PRIE_Msk); +} + +/** + * @brief Get SVD Current Power Status + * @rmtoll ISR SVDO FL_SVD_GetCurrentPowerStatus + * @param SVDx SVD instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_SVD_POWER_STATUS_FALLING + * @arg @ref FL_SVD_POWER_STATUS_RISING + */ +__STATIC_INLINE uint32_t FL_SVD_GetCurrentPowerStatus(SVD_Type *SVDx) +{ + return (uint32_t)(READ_BIT(SVDx->ISR, SVD_ISR_SVDO_Msk)); +} + +/** + * @brief Get SVD Latched Power Status + * @rmtoll ISR SVDR FL_SVD_GetLatchedPowerStatus + * @param SVDx SVD instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_SVD_LATCHED_POWER_STATUS_FALLING + * @arg @ref FL_SVD_LATCHED_POWER_STATUS_RISING + */ +__STATIC_INLINE uint32_t FL_SVD_GetLatchedPowerStatus(SVD_Type *SVDx) +{ + return (uint32_t)(READ_BIT(SVDx->ISR, SVD_ISR_SVDR_Msk)); +} + +/** + * @brief Get SVD Power Fall Flag + * @rmtoll ISR PFF FL_SVD_IsActiveFlag_PowerFall + * @param SVDx SVD instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_SVD_IsActiveFlag_PowerFall(SVD_Type *SVDx) +{ + return (uint32_t)(READ_BIT(SVDx->ISR, SVD_ISR_PFF_Msk) == (SVD_ISR_PFF_Msk)); +} + +/** + * @brief Clear SVD Power Fall Flag + * @rmtoll ISR PFF FL_SVD_ClearFlag_PowerFall + * @param SVDx SVD instance + * @retval None + */ +__STATIC_INLINE void FL_SVD_ClearFlag_PowerFall(SVD_Type *SVDx) +{ + WRITE_REG(SVDx->ISR, SVD_ISR_PFF_Msk); +} + +/** + * @brief Get SVD Power Rise Flag + * @rmtoll ISR PRF FL_SVD_IsActiveFlag_PowerRise + * @param SVDx SVD instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_SVD_IsActiveFlag_PowerRise(SVD_Type *SVDx) +{ + return (uint32_t)(READ_BIT(SVDx->ISR, SVD_ISR_PRF_Msk) == (SVD_ISR_PRF_Msk)); +} + +/** + * @brief Clear SVD Power Rise Flag + * @rmtoll ISR PRF FL_SVD_ClearFlag_PowerRise + * @param SVDx SVD instance + * @retval None + */ +__STATIC_INLINE void FL_SVD_ClearFlag_PowerRise(SVD_Type *SVDx) +{ + WRITE_REG(SVDx->ISR, SVD_ISR_PRF_Msk); +} + +/** + * @brief Enable SVD Reference + * @rmtoll VSR EN FL_SVD_EnableReference + * @param SVDx SVD instance + * @param ref This parameter can be one of the following values: + * @arg @ref FL_SVD_REFERENCE_1P0V + * @arg @ref FL_SVD_REFERENCE_0P95V + * @arg @ref FL_SVD_REFERENCE_0P9V + * @retval None + */ +__STATIC_INLINE void FL_SVD_EnableReference(SVD_Type *SVDx, uint32_t ref) +{ + WRITE_REG(SVDx->VSR, ((ref & 0x7) << 0x0U)); +} + +/** + * @brief Get SVD Reference Enable Status + * @rmtoll VSR EN FL_SVD_IsEnabledReference + * @param SVDx SVD instance + * @param ref This parameter can be one of the following values: + * @arg @ref FL_SVD_REFERENCE_1P0V + * @arg @ref FL_SVD_REFERENCE_0P95V + * @arg @ref FL_SVD_REFERENCE_0P9V + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_SVD_IsEnabledReference(SVD_Type *SVDx, uint32_t ref) +{ + return (uint32_t)(READ_BIT(SVDx->VSR, ((ref & 0x7) << 0x0U)) == ((ref & 0x7) << 0x0U)); +} + +/** + * @brief Disable SVD Reference + * @rmtoll VSR EN FL_SVD_DisableReference + * @param SVDx SVD instance + * @param ref This parameter can be one of the following values: + * @arg @ref FL_SVD_REFERENCE_1P0V + * @arg @ref FL_SVD_REFERENCE_0P95V + * @arg @ref FL_SVD_REFERENCE_0P9V + * @retval None + */ +__STATIC_INLINE void FL_SVD_DisableReference(SVD_Type *SVDx, uint32_t ref) +{ + CLEAR_BIT(SVDx->VSR, ((ref & 0x7) << 0x0U)); +} + +/** + * @} + */ + +/** @defgroup SVD_FL_EF_Init Initialization and de-initialization functions + * @{ + */ + +FL_ErrorStatus FL_SVD_DeInit(SVD_Type *SVDx); +FL_ErrorStatus FL_SVD_Init(SVD_Type *SVDx, FL_SVD_InitTypeDef *init); +void FL_SVD_StructInit(FL_SVD_InitTypeDef *init); + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif /* __FM33LG0XX_FL_SVD_H*/ + +/*************************Py_Code_Generator Version: 0.1-0.11-0.1 @ 2020-09-22*************************/ +/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/ diff --git a/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_uart.h b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_uart.h new file mode 100644 index 0000000..3b316fa --- /dev/null +++ b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_uart.h @@ -0,0 +1,1316 @@ + /** + ******************************************************************************************************* + * @file fm33lg0xx_fl_uart.h + * @author FMSH Application Team + * @brief Head file of UART FL Module + ******************************************************************************************************* + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + + + +/* Define to prevent recursive inclusion---------------------------------------------------------------*/ +#ifndef __FM33LG0XX_FL_UART_H +#define __FM33LG0XX_FL_UART_H + +#ifdef __cplusplus +extern "C" { +#endif +/* Includes -------------------------------------------------------------------------------------------*/ +#include "fm33lg0xx_fl_def.h" +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @defgroup UART UART + * @brief UART FL driver + * @{ + */ + +/* Exported types -------------------------------------------------------------------------------------*/ +/** @defgroup UART_FL_ES_INIT UART Exported Init structures + * @{ + */ + +/** + * @brief FL UART Init Sturcture definition + */ +typedef struct +{ + /*! 时钟源选择 */ + uint32_t clockSrc; + /*! 通信波特率 */ + uint32_t baudRate; + /*! 数据宽度 */ + uint32_t dataWidth; + /*! 停止位 */ + uint32_t stopBits; + /*! 奇偶校验位 */ + uint32_t parity; + /*! 传输反向 */ + uint32_t transferDirection; + +} FL_UART_InitTypeDef; + +typedef struct +{ + /*! 调制极性默认bit1调制 */ + uint32_t polarity; + /*! 红外调制占空比 */ + uint32_t modulationDuty; + /*! 红外调制频率*/ + uint32_t modulationFrequency; + +} FL_UART_InfraRed_InitTypeDef; + +#define FL_UART_DIRECTION_NONE 0x00000000U +#define FL_UART_DIRECTION_RX UART_CSR_RXEN +#define FL_UART_DIRECTION_TX UART_CSR_TXEN +#define FL_UART_DIRECTION_TX_RX (UART_CSR_RXEN | UART_CSR_TXEN) +/** + * @} + */ +/* Exported constants ---------------------------------------------------------------------------------*/ +/** @defgroup UART_FL_Exported_Constants UART Exported Constants + * @{ + */ + +#define UART_IRCR_IRFLAG_Pos (15U) +#define UART_IRCR_IRFLAG_Msk (0x1UL << UART_IRCR_IRFLAG_Pos) +#define UART_IRCR_IRFLAG UART_IRCR_IRFLAG_Msk + +#define UART_IRCR_TH_Pos (11U) +#define UART_IRCR_TH_Msk (0xfUL << UART_IRCR_TH_Pos) +#define UART_IRCR_TH UART_IRCR_TH_Msk + +#define UART_IRCR_TZBRG_Pos (0U) +#define UART_IRCR_TZBRG_Msk (0x7ffUL << UART_IRCR_TZBRG_Pos) +#define UART_IRCR_TZBRG UART_IRCR_TZBRG_Msk + +#define UART_CSR_BUSY_Pos (24U) +#define UART_CSR_BUSY_Msk (0x1UL << UART_CSR_BUSY_Pos) +#define UART_CSR_BUSY UART_CSR_BUSY_Msk + +#define UART_CSR_TXIREN_Pos (17U) +#define UART_CSR_TXIREN_Msk (0x1UL << UART_CSR_TXIREN_Pos) +#define UART_CSR_TXIREN UART_CSR_TXIREN_Msk + +#define UART_CSR_RXTOEN_Pos (16U) +#define UART_CSR_RXTOEN_Msk (0x1UL << UART_CSR_RXTOEN_Pos) +#define UART_CSR_RXTOEN UART_CSR_RXTOEN_Msk + +#define UART_CSR_OVSM_Pos (13U) +#define UART_CSR_OVSM_Msk (0x1UL << UART_CSR_OVSM_Pos) +#define UART_CSR_OVSM UART_CSR_OVSM_Msk + +#define UART_CSR_IOSWAP_Pos (12U) +#define UART_CSR_IOSWAP_Msk (0x1UL << UART_CSR_IOSWAP_Pos) +#define UART_CSR_IOSWAP UART_CSR_IOSWAP_Msk + +#define UART_CSR_NEWUP_Pos (11U) +#define UART_CSR_NEWUP_Msk (0x1UL << UART_CSR_NEWUP_Pos) +#define UART_CSR_NEWUP UART_CSR_NEWUP_Msk + +#define UART_CSR_DMATXIFCFG_Pos (10U) +#define UART_CSR_DMATXIFCFG_Msk (0x1UL << UART_CSR_DMATXIFCFG_Pos) +#define UART_CSR_DMATXIFCFG UART_CSR_DMATXIFCFG_Msk + +#define UART_CSR_BITORD_Pos (9U) +#define UART_CSR_BITORD_Msk (0x1UL << UART_CSR_BITORD_Pos) +#define UART_CSR_BITORD UART_CSR_BITORD_Msk + +#define UART_CSR_STOPCFG_Pos (8U) +#define UART_CSR_STOPCFG_Msk (0x1UL << UART_CSR_STOPCFG_Pos) +#define UART_CSR_STOPCFG UART_CSR_STOPCFG_Msk + +#define UART_CSR_PDSEL_Pos (6U) +#define UART_CSR_PDSEL_Msk (0x3UL << UART_CSR_PDSEL_Pos) +#define UART_CSR_PDSEL UART_CSR_PDSEL_Msk + +#define UART_CSR_PARITY_Pos (4U) +#define UART_CSR_PARITY_Msk (0x3UL << UART_CSR_PARITY_Pos) +#define UART_CSR_PARITY UART_CSR_PARITY_Msk + +#define UART_CSR_RXPOL_Pos (3U) +#define UART_CSR_RXPOL_Msk (0x1UL << UART_CSR_RXPOL_Pos) +#define UART_CSR_RXPOL UART_CSR_RXPOL_Msk + +#define UART_CSR_TXPOL_Pos (2U) +#define UART_CSR_TXPOL_Msk (0x1UL << UART_CSR_TXPOL_Pos) +#define UART_CSR_TXPOL UART_CSR_TXPOL_Msk + +#define UART_CSR_RXEN_Pos (1U) +#define UART_CSR_RXEN_Msk (0x1UL << UART_CSR_RXEN_Pos) +#define UART_CSR_RXEN UART_CSR_RXEN_Msk + +#define UART_CSR_TXEN_Pos (0U) +#define UART_CSR_TXEN_Msk (0x1UL << UART_CSR_TXEN_Pos) +#define UART_CSR_TXEN UART_CSR_TXEN_Msk + +#define UART_IER_RXTOIE_Pos (11U) +#define UART_IER_RXTOIE_Msk (0x1UL << UART_IER_RXTOIE_Pos) +#define UART_IER_RXTOIE UART_IER_RXTOIE_Msk + +#define UART_IER_RXERRIE_Pos (10U) +#define UART_IER_RXERRIE_Msk (0x1UL << UART_IER_RXERRIE_Pos) +#define UART_IER_RXERRIE UART_IER_RXERRIE_Msk + +#define UART_IER_RXBFIE_Pos (8U) +#define UART_IER_RXBFIE_Msk (0x1UL << UART_IER_RXBFIE_Pos) +#define UART_IER_RXBFIE UART_IER_RXBFIE_Msk + +#define UART_IER_NEWUPIE_Pos (7U) +#define UART_IER_NEWUPIE_Msk (0x1UL << UART_IER_NEWUPIE_Pos) +#define UART_IER_NEWUPIE UART_IER_NEWUPIE_Msk + +#define UART_IER_TXBEIE_Pos (1U) +#define UART_IER_TXBEIE_Msk (0x1UL << UART_IER_TXBEIE_Pos) +#define UART_IER_TXBEIE UART_IER_TXBEIE_Msk + +#define UART_IER_TXSEIE_Pos (0U) +#define UART_IER_TXSEIE_Msk (0x1UL << UART_IER_TXSEIE_Pos) +#define UART_IER_TXSEIE UART_IER_TXSEIE_Msk + +#define UART_ISR_PERR_Pos (18U) +#define UART_ISR_PERR_Msk (0x1UL << UART_ISR_PERR_Pos) +#define UART_ISR_PERR UART_ISR_PERR_Msk + +#define UART_ISR_FERR_Pos (17U) +#define UART_ISR_FERR_Msk (0x1UL << UART_ISR_FERR_Pos) +#define UART_ISR_FERR UART_ISR_FERR_Msk + +#define UART_ISR_OERR_Pos (16U) +#define UART_ISR_OERR_Msk (0x1UL << UART_ISR_OERR_Pos) +#define UART_ISR_OERR UART_ISR_OERR_Msk + +#define UART_ISR_RXTO_Pos (11U) +#define UART_ISR_RXTO_Msk (0x1UL << UART_ISR_RXTO_Pos) +#define UART_ISR_RXTO UART_ISR_RXTO_Msk + +#define UART_ISR_RXBF_Pos (8U) +#define UART_ISR_RXBF_Msk (0x1UL << UART_ISR_RXBF_Pos) +#define UART_ISR_RXBF UART_ISR_RXBF_Msk + +#define UART_ISR_NEWKF_Pos (7U) +#define UART_ISR_NEWKF_Msk (0x1UL << UART_ISR_NEWKF_Pos) +#define UART_ISR_NEWKF UART_ISR_NEWKF_Msk + +#define UART_ISR_TXOERR_Pos (2U) +#define UART_ISR_TXOERR_Msk (0x1UL << UART_ISR_TXOERR_Pos) +#define UART_ISR_TXOERR UART_ISR_TXOERR_Msk + +#define UART_ISR_TXBE_Pos (1U) +#define UART_ISR_TXBE_Msk (0x1UL << UART_ISR_TXBE_Pos) +#define UART_ISR_TXBE UART_ISR_TXBE_Msk + +#define UART_ISR_TXSE_Pos (0U) +#define UART_ISR_TXSE_Msk (0x1UL << UART_ISR_TXSE_Pos) +#define UART_ISR_TXSE UART_ISR_TXSE_Msk + +#define UART_TODR_TXDLY_LEN_Pos (8U) +#define UART_TODR_TXDLY_LEN_Msk (0xffUL << UART_TODR_TXDLY_LEN_Pos) +#define UART_TODR_TXDLY_LEN UART_TODR_TXDLY_LEN_Msk + +#define UART_TODR_RXTO_LEN_Pos (0U) +#define UART_TODR_RXTO_LEN_Msk (0xffUL << UART_TODR_RXTO_LEN_Pos) +#define UART_TODR_RXTO_LEN UART_TODR_RXTO_LEN_Msk + + +#define FL_UART_INFRARED_POLARITY_NORMAL (0x0UL << UART_IRCR_IRFLAG_Pos) +#define FL_UART_INFRARED_POLARITY_INVERT (0x1UL << UART_IRCR_IRFLAG_Pos) + + +#define FL_UART_OVERSAMPLING_16 (0x0UL << UART_CSR_OVSM_Pos) +#define FL_UART_OVERSAMPLING_8 (0x1UL << UART_CSR_OVSM_Pos) + + +#define FL_UART_TXIF_MODE_ALWAYS (0x0UL << UART_CSR_DMATXIFCFG_Pos) +#define FL_UART_TXIF_MODE_AFTER_DMA (0x1UL << UART_CSR_DMATXIFCFG_Pos) + + +#define FL_UART_BIT_ORDER_LSB_FIRST (0x0UL << UART_CSR_BITORD_Pos) +#define FL_UART_BIT_ORDER_MSB_FIRST (0x1UL << UART_CSR_BITORD_Pos) + + +#define FL_UART_STOP_BIT_WIDTH_1B (0x0Ul << UART_CSR_STOPCFG_Pos) +#define FL_UART_STOP_BIT_WIDTH_2B (0x1Ul << UART_CSR_STOPCFG_Pos) + + +#define FL_UART_DATA_WIDTH_7B (0x0UL << UART_CSR_PDSEL_Pos) +#define FL_UART_DATA_WIDTH_8B (0x1UL << UART_CSR_PDSEL_Pos) +#define FL_UART_DATA_WIDTH_9B (0x2UL << UART_CSR_PDSEL_Pos) +#define FL_UART_DATA_WIDTH_6B (0x3UL << UART_CSR_PDSEL_Pos) + + +#define FL_UART_PARITY_NONE (0x0UL << UART_CSR_PARITY_Pos) +#define FL_UART_PARITY_EVEN (0x1UL << UART_CSR_PARITY_Pos) +#define FL_UART_PARITY_ODD (0x2UL << UART_CSR_PARITY_Pos) + + +#define FL_UART_RX_POLARITY_NORMAL (0x0UL << UART_CSR_RXPOL_Pos) +#define FL_UART_RX_POLARITY_INVERT (0x1UL << UART_CSR_RXPOL_Pos) + + +#define FL_UART_TX_POLARITY_NORMAL (0x0UL << UART_CSR_TXPOL_Pos) +#define FL_UART_TX_POLARITY_INVERT (0x1UL << UART_CSR_TXPOL_Pos) + + +/** + * @} + */ +/* Exported functions ---------------------------------------------------------------------------------*/ +/** @defgroup UART_FL_Exported_Functions UART Exported Functions + * @{ + */ + +/** + * @brief Set Infrared Polarity + * @rmtoll IRCR IRFLAG FL_UART_SetIRPolarity + * @param UART_Common UART_Common instance + * @param polarity This parameter can be one of the following values: + * @arg @ref FL_UART_INFRARED_POLARITY_NORMAL + * @arg @ref FL_UART_INFRARED_POLARITY_INVERT + * @retval None + */ +__STATIC_INLINE void FL_UART_SetIRPolarity(UART_COMMON_Type *UART_Common, uint32_t polarity) +{ + MODIFY_REG(UART_Common->IRCR, UART_IRCR_IRFLAG_Msk, polarity); +} + +/** + * @brief Get Infrared Polarity + * @rmtoll IRCR IRFLAG FL_UART_GetIRPolarity + * @param UART_Common UART_Common instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_UART_INFRARED_POLARITY_NORMAL + * @arg @ref FL_UART_INFRARED_POLARITY_INVERT + */ +__STATIC_INLINE uint32_t FL_UART_GetIRPolarity(UART_COMMON_Type *UART_Common) +{ + return (uint32_t)(READ_BIT(UART_Common->IRCR, UART_IRCR_IRFLAG_Msk)); +} + +/** + * @brief Set Infrared Modulation Duty + * @rmtoll IRCR TH FL_UART_WriteIRModulationDuty + * @param UART_Common UART_Common instance + * @param duty + * @retval None + */ +__STATIC_INLINE void FL_UART_WriteIRModulationDuty(UART_COMMON_Type *UART_Common, uint32_t duty) +{ + MODIFY_REG(UART_Common->IRCR, (0xfU << 11U), (duty << 11U)); +} + +/** + * @brief Get Infrared Modulation Duty + * @rmtoll IRCR TH FL_UART_ReadIRModulationDuty + * @param UART_Common UART_Common instance + * @retval + */ +__STATIC_INLINE uint32_t FL_UART_ReadIRModulationDuty(UART_COMMON_Type *UART_Common) +{ + return (uint32_t)(READ_BIT(UART_Common->IRCR, (0xfU << 11U)) >> 11U); +} + +/** + * @brief Set Infrared Modulation Frequency + * @rmtoll IRCR TZBRG FL_UART_WriteIRModulationFrequency + * @param UART_Common UART_Common instance + * @param freq + * @retval None + */ +__STATIC_INLINE void FL_UART_WriteIRModulationFrequency(UART_COMMON_Type *UART_Common, uint32_t freq) +{ + MODIFY_REG(UART_Common->IRCR, (0x7ffU << 0U), (freq << 0U)); +} + +/** + * @brief Get Infrared Modulation Frequency + * @rmtoll IRCR TZBRG FL_UART_ReadIRModulationFrequency + * @param UART_Common UART_Common instance + * @retval + */ +__STATIC_INLINE uint32_t FL_UART_ReadIRModulationFrequency(UART_COMMON_Type *UART_Common) +{ + return (uint32_t)(READ_BIT(UART_Common->IRCR, (0x7ffUl << 0U)) >> 0U); +} + +/** + * @brief Get UART Busy Flag + * @rmtoll CSR BUSY FL_UART_IsActiveFlag_Busy + * @param UARTx UART instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_UART_IsActiveFlag_Busy(UART_Type *UARTx) +{ + return (uint32_t)(READ_BIT(UARTx->CSR, UART_CSR_BUSY_Msk) == (UART_CSR_BUSY_Msk)); +} + +/** + * @brief Enable UART Infrared Modulation + * @rmtoll CSR TXIREN FL_UART_EnableIRModulation + * @param UARTx UART instance + * @retval None + */ +__STATIC_INLINE void FL_UART_EnableIRModulation(UART_Type *UARTx) +{ + SET_BIT(UARTx->CSR, UART_CSR_TXIREN_Msk); +} + +/** + * @brief Disable UART Infrared Modulation + * @rmtoll CSR TXIREN FL_UART_DisableIRModulation + * @param UARTx UART instance + * @retval None + */ +__STATIC_INLINE void FL_UART_DisableIRModulation(UART_Type *UARTx) +{ + CLEAR_BIT(UARTx->CSR, UART_CSR_TXIREN_Msk); +} + +/** + * @brief Get UART Infrared Modulation Enable Status + * @rmtoll CSR TXIREN FL_UART_IsEnabledIRModulation + * @param UARTx UART instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_UART_IsEnabledIRModulation(UART_Type *UARTx) +{ + return (uint32_t)(READ_BIT(UARTx->CSR, UART_CSR_TXIREN_Msk) == UART_CSR_TXIREN_Msk); +} + +/** + * @brief Enable UART Receive Time-Out Function + * @rmtoll CSR RXTOEN FL_UART_EnableRXTimeout + * @param UARTx UART instance + * @retval None + */ +__STATIC_INLINE void FL_UART_EnableRXTimeout(UART_Type *UARTx) +{ + SET_BIT(UARTx->CSR, UART_CSR_RXTOEN_Msk); +} + +/** + * @brief Disable UART Receive Time-Out Function + * @rmtoll CSR RXTOEN FL_UART_DisableRXTimeout + * @param UARTx UART instance + * @retval None + */ +__STATIC_INLINE void FL_UART_DisableRXTimeout(UART_Type *UARTx) +{ + CLEAR_BIT(UARTx->CSR, UART_CSR_RXTOEN_Msk); +} + +/** + * @brief Get UART Receive Time-Out Function Enable Status + * @rmtoll CSR RXTOEN FL_UART_IsEnabledRXTimeout + * @param UARTx UART instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_UART_IsEnabledRXTimeout(UART_Type *UARTx) +{ + return (uint32_t)(READ_BIT(UARTx->CSR, UART_CSR_RXTOEN_Msk) == UART_CSR_RXTOEN_Msk); +} + +/** + * @brief Set Oversampling Mode + * @rmtoll CSR OVSM FL_UART_SetOverSampling + * @param UARTx UART instance + * @param mode This parameter can be one of the following values: + * @arg @ref FL_UART_OVERSAMPLING_16 + * @arg @ref FL_UART_OVERSAMPLING_8 + * @retval None + */ +__STATIC_INLINE void FL_UART_SetOverSampling(UART_Type *UARTx, uint32_t mode) +{ + MODIFY_REG(UARTx->CSR, UART_CSR_OVSM_Msk, mode); +} + +/** + * @brief Get Oversampling Mode + * @rmtoll CSR OVSM FL_UART_GetOverSampling + * @param UARTx UART instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_UART_OVERSAMPLING_16 + * @arg @ref FL_UART_OVERSAMPLING_8 + */ +__STATIC_INLINE uint32_t FL_UART_GetOverSampling(UART_Type *UARTx) +{ + return (uint32_t)(READ_BIT(UARTx->CSR, UART_CSR_OVSM_Msk)); +} + +/** + * @brief Enable UART Pin Swap Between UART TX Pin and RX Pin + * @rmtoll CSR IOSWAP FL_UART_EnablePinSwap + * @param UARTx UART instance + * @retval None + */ +__STATIC_INLINE void FL_UART_EnablePinSwap(UART_Type *UARTx) +{ + SET_BIT(UARTx->CSR, UART_CSR_IOSWAP_Msk); +} + +/** + * @brief Disable UART Pin Swap Between UART TX Pin and RX Pin + * @rmtoll CSR IOSWAP FL_UART_DisablePinSwap + * @param UARTx UART instance + * @retval None + */ +__STATIC_INLINE void FL_UART_DisablePinSwap(UART_Type *UARTx) +{ + CLEAR_BIT(UARTx->CSR, UART_CSR_IOSWAP_Msk); +} + +/** + * @brief Get UART Pin Swap Enable Status Between UART TX Pin and RX Pin + * @rmtoll CSR IOSWAP FL_UART_IsEnabledPinSwap + * @param UARTx UART instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_UART_IsEnabledPinSwap(UART_Type *UARTx) +{ + return (uint32_t)(READ_BIT(UARTx->CSR, UART_CSR_IOSWAP_Msk) == UART_CSR_IOSWAP_Msk); +} + +/** + * @brief Enable UART Negtive Edge Wakeup Function + * @rmtoll CSR NEWUP FL_UART_EnableFallingEdgeWakeup + * @param UARTx UART instance + * @retval None + */ +__STATIC_INLINE void FL_UART_EnableFallingEdgeWakeup(UART_Type *UARTx) +{ + SET_BIT(UARTx->CSR, UART_CSR_NEWUP_Msk); +} + +/** + * @brief Disable UART Negtive Edge Wakeup Function + * @rmtoll CSR NEWUP FL_UART_DisableFallingEdgeWakeup + * @param UARTx UART instance + * @retval None + */ +__STATIC_INLINE void FL_UART_DisableFallingEdgeWakeup(UART_Type *UARTx) +{ + CLEAR_BIT(UARTx->CSR, UART_CSR_NEWUP_Msk); +} + +/** + * @brief Get UART Negtive Edge Wakeup Function Enable Status + * @rmtoll CSR NEWUP FL_UART_IsEnabledFallingEdgeWakeup + * @param UARTx UART instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_UART_IsEnabledFallingEdgeWakeup(UART_Type *UARTx) +{ + return (uint32_t)(READ_BIT(UARTx->CSR, UART_CSR_NEWUP_Msk) == UART_CSR_NEWUP_Msk); +} + +/** + * @brief Enable UART DMA Transmit Finish Interrupt + * @rmtoll CSR DMATXIFCFG FL_UART_SetTXIFMode + * @param UARTx UART instance + * @param mode This parameter can be one of the following values: + * @arg @ref FL_UART_TXIF_MODE_ALWAYS + * @arg @ref FL_UART_TXIF_MODE_AFTER_DMA + * @retval None + */ +__STATIC_INLINE void FL_UART_SetTXIFMode(UART_Type *UARTx, uint32_t mode) +{ + MODIFY_REG(UARTx->CSR, UART_CSR_DMATXIFCFG_Msk, mode); +} + +/** + * @brief Disable UART DMA Transmit Finish Interrupt + * @rmtoll CSR DMATXIFCFG FL_UART_GetTXIFMode + * @param UARTx UART instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_UART_TXIF_MODE_ALWAYS + * @arg @ref FL_UART_TXIF_MODE_AFTER_DMA + */ +__STATIC_INLINE uint32_t FL_UART_GetTXIFMode(UART_Type *UARTx) +{ + return (uint32_t)(READ_BIT(UARTx->CSR, UART_CSR_DMATXIFCFG_Msk)); +} + +/** + * @brief Set UART Transfer Bit Order + * @rmtoll CSR BITORD FL_UART_SetBitOrder + * @param UARTx UART instance + * @param order This parameter can be one of the following values: + * @arg @ref FL_UART_BIT_ORDER_LSB_FIRST + * @arg @ref FL_UART_BIT_ORDER_MSB_FIRST + * @retval None + */ +__STATIC_INLINE void FL_UART_SetBitOrder(UART_Type *UARTx, uint32_t order) +{ + MODIFY_REG(UARTx->CSR, UART_CSR_BITORD_Msk, order); +} + +/** + * @brief Get UART Transfer Bit Order + * @rmtoll CSR BITORD FL_UART_GetBitOrder + * @param UARTx UART instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_UART_BIT_ORDER_LSB_FIRST + * @arg @ref FL_UART_BIT_ORDER_MSB_FIRST + */ +__STATIC_INLINE uint32_t FL_UART_GetBitOrder(UART_Type *UARTx) +{ + return (uint32_t)(READ_BIT(UARTx->CSR, UART_CSR_BITORD_Msk)); +} + +/** + * @brief Set UART Stop Bits Length + * @rmtoll CSR STOPCFG FL_UART_SetStopBitsWidth + * @param UARTx UART instance + * @param length This parameter can be one of the following values: + * @arg @ref FL_UART_STOP_BIT_WIDTH_1B + * @arg @ref FL_UART_STOP_BIT_WIDTH_2B + * @retval None + */ +__STATIC_INLINE void FL_UART_SetStopBitsWidth(UART_Type *UARTx, uint32_t length) +{ + MODIFY_REG(UARTx->CSR, UART_CSR_STOPCFG_Msk, length); +} + +/** + * @brief Get UART Stop Bits Length + * @rmtoll CSR STOPCFG FL_UART_GetStopBitsWidth + * @param UARTx UART instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_UART_STOP_BIT_WIDTH_1B + * @arg @ref FL_UART_STOP_BIT_WIDTH_2B + */ +__STATIC_INLINE uint32_t FL_UART_GetStopBitsWidth(UART_Type *UARTx) +{ + return (uint32_t)(READ_BIT(UARTx->CSR, UART_CSR_STOPCFG_Msk)); +} + +/** + * @brief Set UART Data Width + * @rmtoll CSR PDSEL FL_UART_SetDataWidth + * @param UARTx UART instance + * @param dataWidth This parameter can be one of the following values: + * @arg @ref FL_UART_DATA_WIDTH_7B + * @arg @ref FL_UART_DATA_WIDTH_8B + * @arg @ref FL_UART_DATA_WIDTH_9B + * @arg @ref FL_UART_DATA_WIDTH_6B + * @retval None + */ +__STATIC_INLINE void FL_UART_SetDataWidth(UART_Type *UARTx, uint32_t dataWidth) +{ + MODIFY_REG(UARTx->CSR, UART_CSR_PDSEL_Msk, dataWidth); +} + +/** + * @brief Get UART Data Width + * @rmtoll CSR PDSEL FL_UART_GetDataWidth + * @param UARTx UART instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_UART_DATA_WIDTH_7B + * @arg @ref FL_UART_DATA_WIDTH_8B + * @arg @ref FL_UART_DATA_WIDTH_9B + * @arg @ref FL_UART_DATA_WIDTH_6B + */ +__STATIC_INLINE uint32_t FL_UART_GetDataWidth(UART_Type *UARTx) +{ + return (uint32_t)(READ_BIT(UARTx->CSR, UART_CSR_PDSEL_Msk)); +} + +/** + * @brief Set UART Parity + * @rmtoll CSR PARITY FL_UART_SetParity + * @param UARTx UART instance + * @param parity This parameter can be one of the following values: + * @arg @ref FL_UART_PARITY_NONE + * @arg @ref FL_UART_PARITY_EVEN + * @arg @ref FL_UART_PARITY_ODD + * @retval None + */ +__STATIC_INLINE void FL_UART_SetParity(UART_Type *UARTx, uint32_t parity) +{ + MODIFY_REG(UARTx->CSR, UART_CSR_PARITY_Msk, parity); +} + +/** + * @brief Get UART Parity + * @rmtoll CSR PARITY FL_UART_GetParity + * @param UARTx UART instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_UART_PARITY_NONE + * @arg @ref FL_UART_PARITY_EVEN + * @arg @ref FL_UART_PARITY_ODD + */ +__STATIC_INLINE uint32_t FL_UART_GetParity(UART_Type *UARTx) +{ + return (uint32_t)(READ_BIT(UARTx->CSR, UART_CSR_PARITY_Msk)); +} + +/** + * @brief Set UART Receive Polarity + * @rmtoll CSR RXPOL FL_UART_SetRXPolarity + * @param UARTx UART instance + * @param polarity This parameter can be one of the following values: + * @arg @ref FL_UART_RX_POLARITY_NORMAL + * @arg @ref FL_UART_RX_POLARITY_INVERT + * @retval None + */ +__STATIC_INLINE void FL_UART_SetRXPolarity(UART_Type *UARTx, uint32_t polarity) +{ + MODIFY_REG(UARTx->CSR, UART_CSR_RXPOL_Msk, polarity); +} + +/** + * @brief Get UART Receive Polarity + * @rmtoll CSR RXPOL FL_UART_GetRXPolarity + * @param UARTx UART instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_UART_RX_POLARITY_NORMAL + * @arg @ref FL_UART_RX_POLARITY_INVERT + */ +__STATIC_INLINE uint32_t FL_UART_GetRXPolarity(UART_Type *UARTx) +{ + return (uint32_t)(READ_BIT(UARTx->CSR, UART_CSR_RXPOL_Msk)); +} + +/** + * @brief Set UART Transmit Polarity + * @rmtoll CSR TXPOL FL_UART_SetTXPolarity + * @param UARTx UART instance + * @param polarity This parameter can be one of the following values: + * @arg @ref FL_UART_TX_POLARITY_NORMAL + * @arg @ref FL_UART_TX_POLARITY_INVERT + * @retval None + */ +__STATIC_INLINE void FL_UART_SetTXPolarity(UART_Type *UARTx, uint32_t polarity) +{ + MODIFY_REG(UARTx->CSR, UART_CSR_TXPOL_Msk, polarity); +} + +/** + * @brief Get UART Transmit Polarity + * @rmtoll CSR TXPOL FL_UART_GetTXPolarity + * @param UARTx UART instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_UART_TX_POLARITY_NORMAL + * @arg @ref FL_UART_TX_POLARITY_INVERT + */ +__STATIC_INLINE uint32_t FL_UART_GetTXPolarity(UART_Type *UARTx) +{ + return (uint32_t)(READ_BIT(UARTx->CSR, UART_CSR_TXPOL_Msk)); +} + +/** + * @brief Enable UART Receive + * @rmtoll CSR RXEN FL_UART_EnableRX + * @param UARTx UART instance + * @retval None + */ +__STATIC_INLINE void FL_UART_EnableRX(UART_Type *UARTx) +{ + SET_BIT(UARTx->CSR, UART_CSR_RXEN_Msk); +} + +/** + * @brief Disable UART Receive + * @rmtoll CSR RXEN FL_UART_DisableRX + * @param UARTx UART instance + * @retval None + */ +__STATIC_INLINE void FL_UART_DisableRX(UART_Type *UARTx) +{ + CLEAR_BIT(UARTx->CSR, UART_CSR_RXEN_Msk); +} + +/** + * @brief Get UART Receive Enable Status + * @rmtoll CSR RXEN FL_UART_IsEnabledRX + * @param UARTx UART instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_UART_IsEnabledRX(UART_Type *UARTx) +{ + return (uint32_t)(READ_BIT(UARTx->CSR, UART_CSR_RXEN_Msk) == UART_CSR_RXEN_Msk); +} + +/** + * @brief Enable UART Transmit + * @rmtoll CSR TXEN FL_UART_EnableTX + * @param UARTx UART instance + * @retval None + */ +__STATIC_INLINE void FL_UART_EnableTX(UART_Type *UARTx) +{ + SET_BIT(UARTx->CSR, UART_CSR_TXEN_Msk); +} + +/** + * @brief Disable UART Receive + * @rmtoll CSR TXEN FL_UART_DisableTX + * @param UARTx UART instance + * @retval None + */ +__STATIC_INLINE void FL_UART_DisableTX(UART_Type *UARTx) +{ + CLEAR_BIT(UARTx->CSR, UART_CSR_TXEN_Msk); +} + +/** + * @brief Get UART Receive Enable Status + * @rmtoll CSR TXEN FL_UART_IsEnabledTX + * @param UARTx UART instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_UART_IsEnabledTX(UART_Type *UARTx) +{ + return (uint32_t)(READ_BIT(UARTx->CSR, UART_CSR_TXEN_Msk) == UART_CSR_TXEN_Msk); +} + +/** + * @brief Enable UART Receive Time-Out Interrupt + * @rmtoll IER RXTOIE FL_UART_EnableIT_RXTimeout + * @param UARTx UART instance + * @retval None + */ +__STATIC_INLINE void FL_UART_EnableIT_RXTimeout(UART_Type *UARTx) +{ + SET_BIT(UARTx->IER, UART_IER_RXTOIE_Msk); +} + +/** + * @brief Disable UART Receive Time-Out Interrupt + * @rmtoll IER RXTOIE FL_UART_DisableIT_RXTimeout + * @param UARTx UART instance + * @retval None + */ +__STATIC_INLINE void FL_UART_DisableIT_RXTimeout(UART_Type *UARTx) +{ + CLEAR_BIT(UARTx->IER, UART_IER_RXTOIE_Msk); +} + +/** + * @brief Get UART Receive Time-Out Interrupt Enable Status + * @rmtoll IER RXTOIE FL_UART_IsEnabledIT_RXTimeout + * @param UARTx UART instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_UART_IsEnabledIT_RXTimeout(UART_Type *UARTx) +{ + return (uint32_t)(READ_BIT(UARTx->IER, UART_IER_RXTOIE_Msk) == UART_IER_RXTOIE_Msk); +} + +/** + * @brief Enable UART Receive Error Interrupt + * @rmtoll IER RXERRIE FL_UART_EnableIT_RXError + * @param UARTx UART instance + * @retval None + */ +__STATIC_INLINE void FL_UART_EnableIT_RXError(UART_Type *UARTx) +{ + SET_BIT(UARTx->IER, UART_IER_RXERRIE_Msk); +} + +/** + * @brief Disable UART Receive Error Interrupt + * @rmtoll IER RXERRIE FL_UART_DisableIT_RXError + * @param UARTx UART instance + * @retval None + */ +__STATIC_INLINE void FL_UART_DisableIT_RXError(UART_Type *UARTx) +{ + CLEAR_BIT(UARTx->IER, UART_IER_RXERRIE_Msk); +} + +/** + * @brief Get UART Receive Error Interrupt Enable Status + * @rmtoll IER RXERRIE FL_UART_IsEnabledIT_RXError + * @param UARTx UART instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_UART_IsEnabledIT_RXError(UART_Type *UARTx) +{ + return (uint32_t)(READ_BIT(UARTx->IER, UART_IER_RXERRIE_Msk) == UART_IER_RXERRIE_Msk); +} + +/** + * @brief Enable UART Receive Buffer Full Interrupt + * @rmtoll IER RXBFIE FL_UART_EnableIT_RXBuffFull + * @param UARTx UART instance + * @retval None + */ +__STATIC_INLINE void FL_UART_EnableIT_RXBuffFull(UART_Type *UARTx) +{ + SET_BIT(UARTx->IER, UART_IER_RXBFIE_Msk); +} + +/** + * @brief Disable UART Receive Buffer Full Interrupt + * @rmtoll IER RXBFIE FL_UART_DisableIT_RXBuffFull + * @param UARTx UART instance + * @retval None + */ +__STATIC_INLINE void FL_UART_DisableIT_RXBuffFull(UART_Type *UARTx) +{ + CLEAR_BIT(UARTx->IER, UART_IER_RXBFIE_Msk); +} + +/** + * @brief Get UART Receive Buffer Full Interrupt Enable Status + * @rmtoll IER RXBFIE FL_UART_IsEnabledIT_RXBuffFull + * @param UARTx UART instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_UART_IsEnabledIT_RXBuffFull(UART_Type *UARTx) +{ + return (uint32_t)(READ_BIT(UARTx->IER, UART_IER_RXBFIE_Msk) == UART_IER_RXBFIE_Msk); +} + +/** + * @brief Enable UART Negedge Wakeup Interrupt + * @rmtoll IER NEWUPIE FL_UART_EnableIT_FallingEdgeWakeup + * @param UARTx UART instance + * @retval None + */ +__STATIC_INLINE void FL_UART_EnableIT_FallingEdgeWakeup(UART_Type *UARTx) +{ + SET_BIT(UARTx->IER, UART_IER_NEWUPIE_Msk); +} + +/** + * @brief Disable UART Negedge Wakeup Interrupt + * @rmtoll IER NEWUPIE FL_UART_DisableIT_FallingEdgeWakeup + * @param UARTx UART instance + * @retval None + */ +__STATIC_INLINE void FL_UART_DisableIT_FallingEdgeWakeup(UART_Type *UARTx) +{ + CLEAR_BIT(UARTx->IER, UART_IER_NEWUPIE_Msk); +} + +/** + * @brief Get UART Negedge Wakeup Interrupt Enable Status + * @rmtoll IER NEWUPIE FL_UART_IsEnabledIT_FallingEdgeWakeup + * @param UARTx UART instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_UART_IsEnabledIT_FallingEdgeWakeup(UART_Type *UARTx) +{ + return (uint32_t)(READ_BIT(UARTx->IER, UART_IER_NEWUPIE_Msk) == UART_IER_NEWUPIE_Msk); +} + +/** + * @brief Enable UART Transmit Buffer Empty Interrupt + * @rmtoll IER TXBEIE FL_UART_EnableIT_TXBuffEmpty + * @param UARTx UART instance + * @retval None + */ +__STATIC_INLINE void FL_UART_EnableIT_TXBuffEmpty(UART_Type *UARTx) +{ + SET_BIT(UARTx->IER, UART_IER_TXBEIE_Msk); +} + +/** + * @brief Disable UART Transmit Buffer Empty Interrupt + * @rmtoll IER TXBEIE FL_UART_DisableIT_TXBuffEmpty + * @param UARTx UART instance + * @retval None + */ +__STATIC_INLINE void FL_UART_DisableIT_TXBuffEmpty(UART_Type *UARTx) +{ + CLEAR_BIT(UARTx->IER, UART_IER_TXBEIE_Msk); +} + +/** + * @brief Get UART Transmit Buffer Empty Interrupt Enable Status + * @rmtoll IER TXBEIE FL_UART_IsEnabledIT_TXBuffEmpty + * @param UARTx UART instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_UART_IsEnabledIT_TXBuffEmpty(UART_Type *UARTx) +{ + return (uint32_t)(READ_BIT(UARTx->IER, UART_IER_TXBEIE_Msk) == UART_IER_TXBEIE_Msk); +} + +/** + * @brief Enable UART Transmit Shift Register Empty Interrupt + * @rmtoll IER TXSEIE FL_UART_EnableIT_TXShiftBuffEmpty + * @param UARTx UART instance + * @retval None + */ +__STATIC_INLINE void FL_UART_EnableIT_TXShiftBuffEmpty(UART_Type *UARTx) +{ + SET_BIT(UARTx->IER, UART_IER_TXSEIE_Msk); +} + +/** + * @brief Disable UART Transmit Shift Register Empty Interrupt + * @rmtoll IER TXSEIE FL_UART_DisableIT_TXShiftBuffEmpty + * @param UARTx UART instance + * @retval None + */ +__STATIC_INLINE void FL_UART_DisableIT_TXShiftBuffEmpty(UART_Type *UARTx) +{ + CLEAR_BIT(UARTx->IER, UART_IER_TXSEIE_Msk); +} + +/** + * @brief Get UART Transmit Shift Register Empty Interrupt Enable Status + * @rmtoll IER TXSEIE FL_UART_IsEnabledIT_TXShiftBuffEmpty + * @param UARTx UART instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_UART_IsEnabledIT_TXShiftBuffEmpty(UART_Type *UARTx) +{ + return (uint32_t)(READ_BIT(UARTx->IER, UART_IER_TXSEIE_Msk) == UART_IER_TXSEIE_Msk); +} + +/** + * @brief Get UART Parity Error Flag + * @rmtoll ISR PERR FL_UART_IsActiveFlag_ParityError + * @param UARTx UART instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_UART_IsActiveFlag_ParityError(UART_Type *UARTx) +{ + return (uint32_t)(READ_BIT(UARTx->ISR, UART_ISR_PERR_Msk) == (UART_ISR_PERR_Msk)); +} + +/** + * @brief Clear UART Parity Error Flag + * @rmtoll ISR PERR FL_UART_ClearFlag_ParityError + * @param UARTx UART instance + * @retval None + */ +__STATIC_INLINE void FL_UART_ClearFlag_ParityError(UART_Type *UARTx) +{ + WRITE_REG(UARTx->ISR, UART_ISR_PERR_Msk); +} + +/** + * @brief Get UART Frame Error Flag + * @rmtoll ISR FERR FL_UART_IsActiveFlag_FrameError + * @param UARTx UART instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_UART_IsActiveFlag_FrameError(UART_Type *UARTx) +{ + return (uint32_t)(READ_BIT(UARTx->ISR, UART_ISR_FERR_Msk) == (UART_ISR_FERR_Msk)); +} + +/** + * @brief Clear UART Frame Error Flag + * @rmtoll ISR FERR FL_UART_ClearFlag_FrameError + * @param UARTx UART instance + * @retval None + */ +__STATIC_INLINE void FL_UART_ClearFlag_FrameError(UART_Type *UARTx) +{ + WRITE_REG(UARTx->ISR, UART_ISR_FERR_Msk); +} + +/** + * @brief Get UART RX buffer Overflow Error Flag + * @rmtoll ISR OERR FL_UART_IsActiveFlag_RXBuffOverflowError + * @param UARTx UART instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_UART_IsActiveFlag_RXBuffOverflowError(UART_Type *UARTx) +{ + return (uint32_t)(READ_BIT(UARTx->ISR, UART_ISR_OERR_Msk) == (UART_ISR_OERR_Msk)); +} + +/** + * @brief Clear UART RX buffer Overflow Error Flag + * @rmtoll ISR OERR FL_UART_ClearFlag_RXBuffOverflowError + * @param UARTx UART instance + * @retval None + */ +__STATIC_INLINE void FL_UART_ClearFlag_RXBuffOverflowError(UART_Type *UARTx) +{ + WRITE_REG(UARTx->ISR, UART_ISR_OERR_Msk); +} + +/** + * @brief Get UART Receive Time-Out Flag + * @rmtoll ISR RXTO FL_UART_IsActiveFlag_RXBuffTimeout + * @param UARTx UART instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_UART_IsActiveFlag_RXBuffTimeout(UART_Type *UARTx) +{ + return (uint32_t)(READ_BIT(UARTx->ISR, UART_ISR_RXTO_Msk) == (UART_ISR_RXTO_Msk)); +} + +/** + * @brief Clear UART Receive Time-Out Flag + * @rmtoll ISR RXTO FL_UART_ClearFlag_RXBuffTimeout + * @param UARTx UART instance + * @retval None + */ +__STATIC_INLINE void FL_UART_ClearFlag_RXBuffTimeout(UART_Type *UARTx) +{ + WRITE_REG(UARTx->ISR, UART_ISR_RXTO_Msk); +} + +/** + * @brief Get UART Receive Buffer Full Flag + * @rmtoll ISR RXBF FL_UART_IsActiveFlag_RXBuffFull + * @param UARTx UART instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_UART_IsActiveFlag_RXBuffFull(UART_Type *UARTx) +{ + return (uint32_t)(READ_BIT(UARTx->ISR, UART_ISR_RXBF_Msk) == (UART_ISR_RXBF_Msk)); +} + +/** + * @brief Clear UART Receive Buffer Full Flag + * @rmtoll ISR RXBF FL_UART_ClearFlag_RXBuffFull + * @param UARTx UART instance + * @retval None + */ +__STATIC_INLINE void FL_UART_ClearFlag_RXBuffFull(UART_Type *UARTx) +{ + WRITE_REG(UARTx->ISR, UART_ISR_RXBF_Msk); +} + +/** + * @brief Get UART Negedge Wakeup Flag + * @rmtoll ISR NEWKF FL_UART_IsActiveFlag_FallingEdgeWakeup + * @param UARTx UART instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_UART_IsActiveFlag_FallingEdgeWakeup(UART_Type *UARTx) +{ + return (uint32_t)(READ_BIT(UARTx->ISR, UART_ISR_NEWKF_Msk) == (UART_ISR_NEWKF_Msk)); +} + +/** + * @brief Clear UART Negedge Wakeup Flag + * @rmtoll ISR NEWKF FL_UART_ClearFlag_FallingEdgeWakeup + * @param UARTx UART instance + * @retval None + */ +__STATIC_INLINE void FL_UART_ClearFlag_FallingEdgeWakeup(UART_Type *UARTx) +{ + WRITE_REG(UARTx->ISR, UART_ISR_NEWKF_Msk); +} + +/** + * @brief Get UART TX Overflow Error Flag + * @rmtoll ISR TXOERR FL_UART_IsActiveFlag_TXBuffOverflow + * @param UARTx UART instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_UART_IsActiveFlag_TXBuffOverflow(UART_Type *UARTx) +{ + return (uint32_t)(READ_BIT(UARTx->ISR, UART_ISR_TXOERR_Msk) == (UART_ISR_TXOERR_Msk)); +} + +/** + * @brief Clear UART TX Overflow Error Flag + * @rmtoll ISR TXOERR FL_UART_ClearFlag_TXBuffOverflow + * @param UARTx UART instance + * @retval None + */ +__STATIC_INLINE void FL_UART_ClearFlag_TXBuffOverflow(UART_Type *UARTx) +{ + WRITE_REG(UARTx->ISR, UART_ISR_TXOERR_Msk); +} + +/** + * @brief Get UART Transmit Buffer Empty Flag + * @rmtoll ISR TXBE FL_UART_IsActiveFlag_TXBuffEmpty + * @param UARTx UART instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_UART_IsActiveFlag_TXBuffEmpty(UART_Type *UARTx) +{ + return (uint32_t)(READ_BIT(UARTx->ISR, UART_ISR_TXBE_Msk) == (UART_ISR_TXBE_Msk)); +} + +/** + * @brief Get UART Transmit Shift register Empty Flag + * @rmtoll ISR TXSE FL_UART_IsActiveFlag_TXShiftBuffEmpty + * @param UARTx UART instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_UART_IsActiveFlag_TXShiftBuffEmpty(UART_Type *UARTx) +{ + return (uint32_t)(READ_BIT(UARTx->ISR, UART_ISR_TXSE_Msk) == (UART_ISR_TXSE_Msk)); +} + +/** + * @brief Clear UART Transmit Shift register Empty Flag + * @rmtoll ISR TXSE FL_UART_ClearFlag_TXShiftBuffEmpty + * @param UARTx UART instance + * @retval None + */ +__STATIC_INLINE void FL_UART_ClearFlag_TXShiftBuffEmpty(UART_Type *UARTx) +{ + WRITE_REG(UARTx->ISR, UART_ISR_TXSE_Msk); +} + +/** + * @brief Set UART Transmit Delay Length + * @rmtoll TODR TXDLY_LEN FL_UART_WriteTXDelay + * @param UARTx UART instance + * @param time + * @retval None + */ +__STATIC_INLINE void FL_UART_WriteTXDelay(UART_Type *UARTx, uint32_t time) +{ + MODIFY_REG(UARTx->TODR, (0xffU << 8U), (time << 8U)); +} + +/** + * @brief Get UART Transmit Delay Length + * @rmtoll TODR TXDLY_LEN FL_UART_ReadTXDelay + * @param UARTx UART instance + * @retval + */ +__STATIC_INLINE uint32_t FL_UART_ReadTXDelay(UART_Type *UARTx) +{ + return (uint32_t)(READ_BIT(UARTx->TODR, (0xffU << 8U)) >> 8U); +} + +/** + * @brief Set UART Receive Time-Out Length + * @rmtoll TODR RXTO_LEN FL_UART_WriteRXTimeout + * @param UARTx UART instance + * @param time + * @retval None + */ +__STATIC_INLINE void FL_UART_WriteRXTimeout(UART_Type *UARTx, uint32_t time) +{ + MODIFY_REG(UARTx->TODR, (0xffU << 0U), (time << 0U)); +} + +/** + * @brief Get UART Receive Time-Out Length + * @rmtoll TODR RXTO_LEN FL_UART_ReadRXTimeout + * @param UARTx UART instance + * @retval + */ +__STATIC_INLINE uint32_t FL_UART_ReadRXTimeout(UART_Type *UARTx) +{ + return (uint32_t)(READ_BIT(UARTx->TODR, (0xffU << 0U)) >> 0U); +} + +/** + * @brief UART Receive 1 byte of data + * @rmtoll RXBUF FL_UART_ReadRXBuff + * @param UARTx UART instance + * @retval + */ +__STATIC_INLINE uint32_t FL_UART_ReadRXBuff(UART_Type *UARTx) +{ + return (uint32_t)(READ_BIT(UARTx->RXBUF, 0x1ffU)); +} + +/** + * @brief UART Transmit 1 byte of data + * @rmtoll TXBUF FL_UART_WriteTXBuff + * @param UARTx UART instance + * @param data + * @retval None + */ +__STATIC_INLINE void FL_UART_WriteTXBuff(UART_Type *UARTx, uint32_t data) +{ + MODIFY_REG(UARTx->TXBUF, 0x1ffU, data); +} + +/** + * @brief Set UART BaudRate + * @rmtoll BGR FL_UART_WriteBaudRate + * @param UARTx UART instance + * @param baudRate + * @retval None + */ +__STATIC_INLINE void FL_UART_WriteBaudRate(UART_Type *UARTx, uint32_t baudRate) +{ + MODIFY_REG(UARTx->BGR, (0xffffU << 0U), (baudRate << 0U)); +} + +/** + * @brief Get UART BaudRate + * @rmtoll BGR FL_UART_ReadBaudRate + * @param UARTx UART instance + * @retval + */ +__STATIC_INLINE uint32_t FL_UART_ReadBaudRate(UART_Type *UARTx) +{ + return (uint32_t)(READ_BIT(UARTx->BGR, (0xffffU << 0U)) >> 0U); +} + +/** + * @} + */ + +/** @defgroup UART_FL_EF_Init Initialization and de-initialization functions + * @{ + */ +FL_ErrorStatus FL_UART_DeInit(UART_Type *UARTx); +FL_ErrorStatus FL_UART_Init(UART_Type *UARTx, FL_UART_InitTypeDef *initStruct); +FL_ErrorStatus FL_UART_InfraRed_Init(UART_Type *UARTx, FL_UART_InfraRed_InitTypeDef *initStruct); +void FL_UART_InfraRed_StructInit(FL_UART_InfraRed_InitTypeDef *initStruct); +void FL_UART_StructInit(FL_UART_InitTypeDef *initStruct); + + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif /* __FM33LG0XX_FL_UART_H*/ + +/*************************Py_Code_Generator Version: 0.1-0.11-0.1 @ 2020-09-22*************************/ +/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/ diff --git a/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_vao.h b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_vao.h new file mode 100644 index 0000000..13e0f76 --- /dev/null +++ b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_vao.h @@ -0,0 +1,670 @@ + /** + ******************************************************************************************************* + * @file fm33lg0xx_fl_vao.h + * @author FMSH Application Team + * @brief Head file of VAO FL Module + ******************************************************************************************************* + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + + + +/* Define to prevent recursive inclusion---------------------------------------------------------------*/ +#ifndef __FM33LG0XX_FL_VAO_H +#define __FM33LG0XX_FL_VAO_H + +#ifdef __cplusplus +extern "C" { +#endif +/* Includes -------------------------------------------------------------------------------------------*/ +#include "fm33lg0xx_fl_def.h" +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @defgroup VAO VAO + * @brief VAO FL driver + * @{ + */ + +/* Exported types -------------------------------------------------------------------------------------*/ +/** @defgroup VAO_FL_ES_INIT VAO Exported Init structures + * @{ + */ + +/** + * @brief FL VAO Init Sturcture definition + */ + +/** +* @brief FL VAO Init Sturcture definition +*/ +typedef struct +{ + /*! PH15输入使能 */ + uint32_t input; + /*! PH15上拉使能 */ + uint32_t pullup; + /*! PH15开漏输出使能 */ + uint32_t opendrainOutput; + /*! PH15功能选择 */ + uint32_t mode; + +} FL_VAO_IO_InitTypeDef; +typedef struct +{ + /*! 驱动能力配置 */ + uint32_t driveMode; + /*! 工作电流大小*/ + uint32_t workingCurrentMode; + +} FL_VAO_XTLF_InitTypeDef; +/** + * @} + */ +/* Exported constants ---------------------------------------------------------------------------------*/ +/** @defgroup VAO_FL_Exported_Constants VAO Exported Constants + * @{ + */ + +#define VAO_RSTCR_VBAT_RST_Pos (0U) +#define VAO_RSTCR_VBAT_RST_Msk (0x1Ul << VAO_RSTCR_VBAT_RST_Pos) +#define VAO_RSTCR_VBAT_RST VAO_RSTCR_VBAT_RST_Msk + +#define VAO_XTLFCR_XTLFEN_Pos (0U) +#define VAO_XTLFCR_XTLFEN_Msk (0xfUl << VAO_XTLFCR_XTLFEN_Pos) +#define VAO_XTLFCR_XTLFEN VAO_XTLFCR_XTLFEN_Msk + +#define VAO_XTLFPR_DRVCFG_Pos (4U) +#define VAO_XTLFPR_DRVCFG_Msk (0x7Ul << VAO_XTLFPR_DRVCFG_Pos) +#define VAO_XTLFPR_DRVCFG VAO_XTLFPR_DRVCFG_Msk + +#define VAO_XTLFPR_XTLFIPW_Pos (0U) +#define VAO_XTLFPR_XTLFIPW_Msk (0xfUl << VAO_XTLFPR_XTLFIPW_Pos) +#define VAO_XTLFPR_XTLFIPW VAO_XTLFPR_XTLFIPW_Msk + +#define VAO_FDIER_LFDET_IE_Pos (0U) +#define VAO_FDIER_LFDET_IE_Msk (0x1Ul << VAO_FDIER_LFDET_IE_Pos) +#define VAO_FDIER_LFDET_IE VAO_FDIER_LFDET_IE_Msk + +#define VAO_FDISR_LFDETO_Pos (1U) +#define VAO_FDISR_LFDETO_Msk (0x1Ul << VAO_FDISR_LFDETO_Pos) +#define VAO_FDISR_LFDETO VAO_FDISR_LFDETO_Msk + +#define VAO_FDISR_LFDETIF_Pos (0U) +#define VAO_FDISR_LFDETIF_Msk (0x1Ul << VAO_FDISR_LFDETIF_Pos) +#define VAO_FDISR_LFDETIF VAO_FDISR_LFDETIF_Msk + +#define VAO_INEN_PHINEN_Pos (15U) +#define VAO_INEN_PHINEN_Msk (0x1Ul << VAO_INEN_PHINEN_Pos) +#define VAO_INEN_PHINEN VAO_INEN_PHINEN_Msk + +#define VAO_PUEN_PHPUEN_Pos (15U) +#define VAO_PUEN_PHPUEN_Msk (0x1Ul << VAO_PUEN_PHPUEN_Pos) +#define VAO_PUEN_PHPUEN VAO_PUEN_PHPUEN_Msk + +#define VAO_ODEN_PHODEN_Pos (15U) +#define VAO_ODEN_PHODEN_Msk (0x1Ul << VAO_ODEN_PHODEN_Pos) +#define VAO_ODEN_PHODEN VAO_ODEN_PHODEN_Msk + +#define VAO_FCR_PH15FCR_Pos (30U) +#define VAO_FCR_PH15FCR_Msk (0x3Ul << VAO_FCR_PH15FCR_Pos) +#define VAO_FCR_PH15FCR VAO_FCR_PH15FCR_Msk + +#define VAO_DOR_PHDO_Pos (15U) +#define VAO_DOR_PHDO_Msk (0x1Ul << VAO_DOR_PHDO_Pos) +#define VAO_DOR_PHDO VAO_DOR_PHDO_Msk + +#define VAO_DIR_PHDIN_Pos (15U) +#define VAO_DIR_PHDIN_Msk (0x1Ul << VAO_DIR_PHDIN_Pos) +#define VAO_DIR_PHDIN VAO_DIR_PHDIN_Msk + +#define VAO_VILR_PHVIL15_Pos (15U) +#define VAO_VILR_PHVIL15_Msk (0x1Ul << VAO_VILR_PHVIL15_Pos) +#define VAO_VILR_PHVIL15 VAO_VILR_PHVIL15_Msk + + + + + + +#define FL_VAO_XTLF_ENABLE (0x5Ul << VAO_XTLFCR_XTLFEN_Pos) +#define FL_VAO_XTLF_DISABLE (0xaUl << VAO_XTLFCR_XTLFEN_Pos) + +#define FL_VAO_XTLF_DRIVE_LEVEL_NONE (0x0Ul << VAO_XTLFPR_DRVCFG_Pos) +#define FL_VAO_XTLF_DRIVE_LEVEL_1 (0x1Ul << VAO_XTLFPR_DRVCFG_Pos) +#define FL_VAO_XTLF_DRIVE_LEVEL_2 (0x2Ul << VAO_XTLFPR_DRVCFG_Pos) +#define FL_VAO_XTLF_DRIVE_LEVEL_3 (0x3Ul << VAO_XTLFPR_DRVCFG_Pos) +#define FL_VAO_XTLF_DRIVE_LEVEL_4 (0x4Ul << VAO_XTLFPR_DRVCFG_Pos) +#define FL_VAO_XTLF_DRIVE_LEVEL_5 (0x5Ul << VAO_XTLFPR_DRVCFG_Pos) +#define FL_VAO_XTLF_DRIVE_LEVEL_6 (0x6Ul << VAO_XTLFPR_DRVCFG_Pos) +#define FL_VAO_XTLF_DRIVE_LEVEL_7 (0x7Ul << VAO_XTLFPR_DRVCFG_Pos) + +#define FL_VAO_XTLF_OUTPUT_LEVEL_NONE (0x0Ul << VAO_XTLFPR_DRVCFG_Pos) +#define FL_VAO_XTLF_OUTPUT_LEVEL_1 (0x1Ul << VAO_XTLFPR_DRVCFG_Pos) +#define FL_VAO_XTLF_OUTPUT_LEVEL_2 (0x2Ul << VAO_XTLFPR_DRVCFG_Pos) +#define FL_VAO_XTLF_OUTPUT_LEVEL_3 (0x3Ul << VAO_XTLFPR_DRVCFG_Pos) +#define FL_VAO_XTLF_OUTPUT_LEVEL_4 (0x4Ul << VAO_XTLFPR_DRVCFG_Pos) +#define FL_VAO_XTLF_OUTPUT_LEVEL_5 (0x5Ul << VAO_XTLFPR_DRVCFG_Pos) +#define FL_VAO_XTLF_OUTPUT_LEVEL_6 (0x6Ul << VAO_XTLFPR_DRVCFG_Pos) +#define FL_VAO_XTLF_OUTPUT_LEVEL_7 (0x7Ul << VAO_XTLFPR_DRVCFG_Pos) + +#define FL_VAO_XTLF_WORK_CURRENT_850NA (0x0Ul << VAO_XTLFPR_XTLFIPW_Pos) +#define FL_VAO_XTLF_WORK_CURRENT_800NA (0x1Ul << VAO_XTLFPR_XTLFIPW_Pos) +#define FL_VAO_XTLF_WORK_CURRENT_750NA (0x2Ul << VAO_XTLFPR_XTLFIPW_Pos) +#define FL_VAO_XTLF_WORK_CURRENT_700NA (0x3Ul << VAO_XTLFPR_XTLFIPW_Pos) +#define FL_VAO_XTLF_WORK_CURRENT_650NA (0x4Ul << VAO_XTLFPR_XTLFIPW_Pos) +#define FL_VAO_XTLF_WORK_CURRENT_600NA (0x5Ul << VAO_XTLFPR_XTLFIPW_Pos) +#define FL_VAO_XTLF_WORK_CURRENT_550NA (0x6Ul << VAO_XTLFPR_XTLFIPW_Pos) +#define FL_VAO_XTLF_WORK_CURRENT_500NA (0x7Ul << VAO_XTLFPR_XTLFIPW_Pos) +#define FL_VAO_XTLF_WORK_CURRENT_450NA (0x8Ul << VAO_XTLFPR_XTLFIPW_Pos) +#define FL_VAO_XTLF_WORK_CURRENT_400NA (0x9Ul << VAO_XTLFPR_XTLFIPW_Pos) +#define FL_VAO_XTLF_WORK_CURRENT_350NA (0xaUl << VAO_XTLFPR_XTLFIPW_Pos) +#define FL_VAO_XTLF_WORK_CURRENT_300NA (0xbUl << VAO_XTLFPR_XTLFIPW_Pos) +#define FL_VAO_XTLF_WORK_CURRENT_250NA (0xcUl << VAO_XTLFPR_XTLFIPW_Pos) +#define FL_VAO_XTLF_WORK_CURRENT_200NA (0xdUl << VAO_XTLFPR_XTLFIPW_Pos) +#define FL_VAO_XTLF_WORK_CURRENT_150NA (0xeUl << VAO_XTLFPR_XTLFIPW_Pos) +#define FL_VAO_XTLF_WORK_CURRENT_100NA (0xfUl << VAO_XTLFPR_XTLFIPW_Pos) + + +#define FL_VAO_PH15_MODE_INPUT (0x0Ul << VAO_FCR_PH15FCR_Pos) +#define FL_VAO_PH15_MODE_OUTPUT (0x1Ul << VAO_FCR_PH15FCR_Pos) +#define FL_VAO_PH15_MODE_RTCOUT (0x2Ul << VAO_FCR_PH15FCR_Pos) + + +#define FL_VAO_PH15_THRESHOLD_NORMAL (0x0Ul << VAO_VILR_PHVIL15_Pos) +#define FL_VAO_PH15_THRESHOLD_LOW (0x1Ul << VAO_VILR_PHVIL15_Pos) + + +/** + * @} + */ +/* Exported functions ---------------------------------------------------------------------------------*/ +/** @defgroup VAO_FL_Exported_Functions VAO Exported Functions + * @{ + */ + +/** + * @brief VBAT电源域寄存器复位使能 + * @rmtoll RSTCR VBAT_RST FL_VAO_EnableReset + * @param VAOx VAO instance + * @retval None + */ +__STATIC_INLINE void FL_VAO_EnableReset(VAO_Type *VAOx) +{ + SET_BIT(VAOx->RSTCR, VAO_RSTCR_VBAT_RST_Msk); +} + +/** + * @brief 获取VBAT电源域寄存器复位控制状态 + * @rmtoll RSTCR VBAT_RST FL_VAO_IsEnabledReset + * @param VAOx VAO instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_VAO_IsEnabledReset(VAO_Type *VAOx) +{ + return (uint32_t)(READ_BIT(VAOx->RSTCR, VAO_RSTCR_VBAT_RST_Msk) == VAO_RSTCR_VBAT_RST_Msk); +} + +/** + * @brief VBAT电源域寄存器复位撤销 + * @rmtoll RSTCR VBAT_RST FL_VAO_DisableReset + * @param VAOx VAO instance + * @retval None + */ +__STATIC_INLINE void FL_VAO_DisableReset(VAO_Type *VAOx) +{ + CLEAR_BIT(VAOx->RSTCR, VAO_RSTCR_VBAT_RST_Msk); +} + +/** + * @brief 使能XTLF + * @rmtoll XTLFCR XTLFEN FL_VAO_XTLF_Enable + * @param VAOx VAO instance + * @retval None + */ +__STATIC_INLINE void FL_VAO_XTLF_Enable(VAO_Type *VAOx) +{ + WRITE_REG(VAOx->XTLFCR, FL_VAO_XTLF_ENABLE); +} + +/** + * @brief 获取XTLF状态 + * @rmtoll XTLFCR XTLFEN FL_VAO_XTLF_IsEnabled + * @param VAOx VAO instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_VAO_XTLF_IsEnabled(VAO_Type *VAOx) +{ + return (uint32_t)(READ_REG(VAOx->XTLFCR)); +} + +/** + * @brief 禁止XTLF + * @rmtoll XTLFCR XTLFEN FL_VAO_XTLF_Disable + * @param VAOx VAO instance + * @retval None + */ +__STATIC_INLINE void FL_VAO_XTLF_Disable(VAO_Type *VAOx) +{ + WRITE_REG(VAOx->XTLFCR, FL_VAO_XTLF_DISABLE); +} + +/** + * @brief 设置输出级驱动等级 + * @rmtoll XTLFPR DRVCFG FL_VAO_XTLF_SetDriveLevel + * @param VAOx VAO instance + * @param level This parameter can be one of the following values: + * @arg @ref FL_VAO_XTLF_DRIVE_LEVEL_NONE + * @arg @ref FL_VAO_XTLF_DRIVE_LEVEL_1 + * @arg @ref FL_VAO_XTLF_DRIVE_LEVEL_2 + * @arg @ref FL_VAO_XTLF_DRIVE_LEVEL_3 + * @arg @ref FL_VAO_XTLF_DRIVE_LEVEL_4 + * @arg @ref FL_VAO_XTLF_DRIVE_LEVEL_5 + * @arg @ref FL_VAO_XTLF_DRIVE_LEVEL_6 + * @arg @ref FL_VAO_XTLF_DRIVE_LEVEL_7 + * @retval None + */ +__STATIC_INLINE void FL_VAO_XTLF_SetDriveLevel(VAO_Type *VAOx, uint32_t level) +{ + MODIFY_REG(VAOx->XTLFPR, VAO_XTLFPR_DRVCFG_Msk, level); +} + +/** + * @brief Get output drive Level + * @rmtoll XTLFPR DRVCFG FL_VAO_XTLF_GetDriveLevel + * @param VAOx VAO instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_VAO_XTLF_OUTPUT_LEVEL_NONE + * @arg @ref FL_VAO_XTLF_OUTPUT_LEVEL_1 + * @arg @ref FL_VAO_XTLF_OUTPUT_LEVEL_2 + * @arg @ref FL_VAO_XTLF_OUTPUT_LEVEL_3 + * @arg @ref FL_VAO_XTLF_OUTPUT_LEVEL_4 + * @arg @ref FL_VAO_XTLF_OUTPUT_LEVEL_5 + * @arg @ref FL_VAO_XTLF_OUTPUT_LEVEL_6 + * @arg @ref FL_VAO_XTLF_OUTPUT_LEVEL_7 + */ +__STATIC_INLINE uint32_t FL_VAO_XTLF_GetDriveLevel(VAO_Type *VAOx) +{ + return (uint32_t)(READ_BIT(VAOx->XTLFPR, VAO_XTLFPR_DRVCFG_Msk)); +} + +/** + * @brief Set XTLF working current + * @rmtoll XTLFPR XTLFIPW FL_VAO_XTLF_SetWorkCurrent + * @param VAOx VAO instance + * @param current This parameter can be one of the following values: + * @arg @ref FL_VAO_XTLF_WORK_CURRENT_850NA + * @arg @ref FL_VAO_XTLF_WORK_CURRENT_800NA + * @arg @ref FL_VAO_XTLF_WORK_CURRENT_750NA + * @arg @ref FL_VAO_XTLF_WORK_CURRENT_700NA + * @arg @ref FL_VAO_XTLF_WORK_CURRENT_650NA + * @arg @ref FL_VAO_XTLF_WORK_CURRENT_600NA + * @arg @ref FL_VAO_XTLF_WORK_CURRENT_550NA + * @arg @ref FL_VAO_XTLF_WORK_CURRENT_500NA + * @arg @ref FL_VAO_XTLF_WORK_CURRENT_450NA + * @arg @ref FL_VAO_XTLF_WORK_CURRENT_400NA + * @arg @ref FL_VAO_XTLF_WORK_CURRENT_350NA + * @arg @ref FL_VAO_XTLF_WORK_CURRENT_300NA + * @arg @ref FL_VAO_XTLF_WORK_CURRENT_250NA + * @arg @ref FL_VAO_XTLF_WORK_CURRENT_200NA + * @arg @ref FL_VAO_XTLF_WORK_CURRENT_150NA + * @arg @ref FL_VAO_XTLF_WORK_CURRENT_100NA + * @retval None + */ +__STATIC_INLINE void FL_VAO_XTLF_SetWorkCurrent(VAO_Type *VAOx, uint32_t current) +{ + MODIFY_REG(VAOx->XTLFPR, VAO_XTLFPR_XTLFIPW_Msk, current); +} + +/** + * @brief Get XTLF working current + * @rmtoll XTLFPR XTLFIPW FL_VAO_XTLF_GetWorkCurrent + * @param VAOx VAO instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_VAO_XTLF_WORK_CURRENT_850NA + * @arg @ref FL_VAO_XTLF_WORK_CURRENT_800NA + * @arg @ref FL_VAO_XTLF_WORK_CURRENT_750NA + * @arg @ref FL_VAO_XTLF_WORK_CURRENT_700NA + * @arg @ref FL_VAO_XTLF_WORK_CURRENT_650NA + * @arg @ref FL_VAO_XTLF_WORK_CURRENT_600NA + * @arg @ref FL_VAO_XTLF_WORK_CURRENT_550NA + * @arg @ref FL_VAO_XTLF_WORK_CURRENT_500NA + * @arg @ref FL_VAO_XTLF_WORK_CURRENT_450NA + * @arg @ref FL_VAO_XTLF_WORK_CURRENT_400NA + * @arg @ref FL_VAO_XTLF_WORK_CURRENT_350NA + * @arg @ref FL_VAO_XTLF_WORK_CURRENT_300NA + * @arg @ref FL_VAO_XTLF_WORK_CURRENT_250NA + * @arg @ref FL_VAO_XTLF_WORK_CURRENT_200NA + * @arg @ref FL_VAO_XTLF_WORK_CURRENT_150NA + * @arg @ref FL_VAO_XTLF_WORK_CURRENT_100NA + */ +__STATIC_INLINE uint32_t FL_VAO_XTLF_GetWorkCurrent(VAO_Type *VAOx) +{ + return (uint32_t)(READ_BIT(VAOx->XTLFPR, VAO_XTLFPR_XTLFIPW_Msk)); +} + +/** + * @brief XTLF detect interrupt enable + * @rmtoll FDIER LFDET_IE FL_VAO_EnableIT_XTLFFail + * @param VAOx VAO instance + * @retval None + */ +__STATIC_INLINE void FL_VAO_EnableIT_XTLFFail(VAO_Type *VAOx) +{ + SET_BIT(VAOx->FDIER, VAO_FDIER_LFDET_IE_Msk); +} + +/** + * @brief Get XTLF detect interrupt enable status + * @rmtoll FDIER LFDET_IE FL_VAO_IsEnabledIT_XTLFFail + * @param VAOx VAO instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_VAO_IsEnabledIT_XTLFFail(VAO_Type *VAOx) +{ + return (uint32_t)(READ_BIT(VAOx->FDIER, VAO_FDIER_LFDET_IE_Msk) == VAO_FDIER_LFDET_IE_Msk); +} + +/** + * @brief XTLF detect interrupt disable + * @rmtoll FDIER LFDET_IE FL_VAO_DisableIT_XTLFFail + * @param VAOx VAO instance + * @retval None + */ +__STATIC_INLINE void FL_VAO_DisableIT_XTLFFail(VAO_Type *VAOx) +{ + CLEAR_BIT(VAOx->FDIER, VAO_FDIER_LFDET_IE_Msk); +} + +/** + * @brief Get XTLF detect output + * @rmtoll FDISR LFDETO FL_VAO_GetXTLFFailOutput + * @param VAOx VAO instance + * @retval Returned value can be one of the following values: + */ +__STATIC_INLINE uint32_t FL_VAO_GetXTLFFailOutput(VAO_Type *VAOx) +{ + return (uint32_t)(READ_BIT(VAOx->FDISR, VAO_FDISR_LFDETO_Msk) >> VAO_FDISR_LFDETO_Pos); +} + +/** + * @brief Get XTLF detect interrupt flag + * @rmtoll FDISR LFDETIF FL_VAO_IsActiveFlag_XTLFFail + * @param VAOx VAO instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_VAO_IsActiveFlag_XTLFFail(VAO_Type *VAOx) +{ + return (uint32_t)(READ_BIT(VAOx->FDISR, VAO_FDISR_LFDETIF_Msk) == (VAO_FDISR_LFDETIF_Msk)); +} + +/** + * @brief Clear XTLF detect interrupt flag + * @rmtoll FDISR LFDETIF FL_VAO_ClearFlag_XTLFFail + * @param VAOx VAO instance + * @retval None + */ +__STATIC_INLINE void FL_VAO_ClearFlag_XTLFFail(VAO_Type *VAOx) +{ + WRITE_REG(VAOx->FDISR, VAO_FDISR_LFDETIF_Msk); +} + +/** + * @brief PH15 input enable + * @rmtoll INEN PHINEN FL_VAO_GPIO_EnablePH15Input + * @param VAOx VAO instance + * @retval None + */ +__STATIC_INLINE void FL_VAO_GPIO_EnablePH15Input(VAO_Type *VAOx) +{ + SET_BIT(VAOx->INEN, VAO_INEN_PHINEN_Msk); +} + +/** + * @brief Get PH15 input enable status + * @rmtoll INEN PHINEN FL_VAO_GPIO_IsEnabledPH15Input + * @param VAOx VAO instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_VAO_GPIO_IsEnabledPH15Input(VAO_Type *VAOx) +{ + return (uint32_t)(READ_BIT(VAOx->INEN, VAO_INEN_PHINEN_Msk) == VAO_INEN_PHINEN_Msk); +} + +/** + * @brief PH15 input disable + * @rmtoll INEN PHINEN FL_VAO_GPIO_DisablePH15Input + * @param VAOx VAO instance + * @retval None + */ +__STATIC_INLINE void FL_VAO_GPIO_DisablePH15Input(VAO_Type *VAOx) +{ + CLEAR_BIT(VAOx->INEN, VAO_INEN_PHINEN_Msk); +} + +/** + * @brief PH15 pullup enable + * @rmtoll PUEN PHPUEN FL_VAO_GPIO_EnablePH15Pullup + * @param VAOx VAO instance + * @retval None + */ +__STATIC_INLINE void FL_VAO_GPIO_EnablePH15Pullup(VAO_Type *VAOx) +{ + SET_BIT(VAOx->PUEN, VAO_PUEN_PHPUEN_Msk); +} + +/** + * @brief Get PH15 pullup enable status + * @rmtoll PUEN PHPUEN FL_VAO_GPIO_IsEnabledPH15Pullup + * @param VAOx VAO instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_VAO_GPIO_IsEnabledPH15Pullup(VAO_Type *VAOx) +{ + return (uint32_t)(READ_BIT(VAOx->PUEN, VAO_PUEN_PHPUEN_Msk) == VAO_PUEN_PHPUEN_Msk); +} + +/** + * @brief PH15 pullup disable + * @rmtoll PUEN PHPUEN FL_VAO_GPIO_DisablePH15Pullup + * @param VAOx VAO instance + * @retval None + */ +__STATIC_INLINE void FL_VAO_GPIO_DisablePH15Pullup(VAO_Type *VAOx) +{ + CLEAR_BIT(VAOx->PUEN, VAO_PUEN_PHPUEN_Msk); +} + +/** + * @brief PH15 pullup enable + * @rmtoll ODEN PHODEN FL_VAO_GPIO_EnablePH15OpenDrain + * @param VAOx VAO instance + * @retval None + */ +__STATIC_INLINE void FL_VAO_GPIO_EnablePH15OpenDrain(VAO_Type *VAOx) +{ + SET_BIT(VAOx->ODEN, VAO_ODEN_PHODEN_Msk); +} + +/** + * @brief Get PH15 pullup enable status + * @rmtoll ODEN PHODEN FL_VAO_GPIO_IsEnabledPH15OpenDrain + * @param VAOx VAO instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_VAO_GPIO_IsEnabledPH15OpenDrain(VAO_Type *VAOx) +{ + return (uint32_t)(READ_BIT(VAOx->ODEN, VAO_ODEN_PHODEN_Msk) == VAO_ODEN_PHODEN_Msk); +} + +/** + * @brief PH15 pullup disable + * @rmtoll ODEN PHODEN FL_VAO_GPIO_DisablePH15OpenDrain + * @param VAOx VAO instance + * @retval None + */ +__STATIC_INLINE void FL_VAO_GPIO_DisablePH15OpenDrain(VAO_Type *VAOx) +{ + CLEAR_BIT(VAOx->ODEN, VAO_ODEN_PHODEN_Msk); +} + +/** + * @brief Set PH15 mode + * @rmtoll FCR PH15FCR FL_VAO_GPIO_SetPH15Mode + * @param VAOx VAO instance + * @param mode This parameter can be one of the following values: + * @arg @ref FL_VAO_PH15_MODE_INPUT + * @arg @ref FL_VAO_PH15_MODE_OUTPUT + * @arg @ref FL_VAO_PH15_MODE_RTCOUT + * @retval None + */ +__STATIC_INLINE void FL_VAO_GPIO_SetPH15Mode(VAO_Type *VAOx, uint32_t mode) +{ + MODIFY_REG(VAOx->FCR, VAO_FCR_PH15FCR_Msk, mode); +} + +/** + * @brief Get PH15 mode + * @rmtoll FCR PH15FCR FL_VAO_GPIO_GetPH15Mode + * @param VAOx VAO instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_VAO_PH15_MODE_INPUT + * @arg @ref FL_VAO_PH15_MODE_OUTPUT + * @arg @ref FL_VAO_PH15_MODE_RTCOUT + */ +__STATIC_INLINE uint32_t FL_VAO_GPIO_GetPH15Mode(VAO_Type *VAOx) +{ + return (uint32_t)(READ_BIT(VAOx->FCR, VAO_FCR_PH15FCR_Msk)); +} + +/** + * @brief Set PH15 output data register + * @rmtoll DOR PHDO FL_VAO_GPIO_WritePH15Output + * @param VAOx VAO instance + * @param data + * @retval None + */ +__STATIC_INLINE void FL_VAO_GPIO_WritePH15Output(VAO_Type *VAOx, uint32_t data) +{ + MODIFY_REG(VAOx->DOR, (0x1U << 15U), (data << 15U)); +} + +/** + * @brief Get PH15 output data + * @rmtoll DOR PHDO FL_VAO_GPIO_ReadPH15Output + * @param VAOx VAO instance + * @retval + */ +__STATIC_INLINE uint32_t FL_VAO_GPIO_ReadPH15Output(VAO_Type *VAOx) +{ + return (uint32_t)(READ_BIT(VAOx->DOR, (0x1U << 15U)) >> 15U); +} + +/** + * @brief Get PH15 input data + * @rmtoll DIR PHDIN FL_VAO_GPIO_ReadPH15Input + * @param VAOx VAO instance + * @retval + */ +__STATIC_INLINE uint32_t FL_VAO_GPIO_ReadPH15Input(VAO_Type *VAOx) +{ + return (uint32_t)(READ_BIT(VAOx->DIR, (0x1U << 15U)) >> 15U); +} + +/** + * @brief Set PH15 input low threshold value + * @rmtoll VILR PHVIL15 FL_VAO_GPIO_SetPH15Threshold + * @param VAOx VAO instance + * @param value This parameter can be one of the following values: + * @arg @ref FL_VAO_PH15_THRESHOLD_NORMAL + * @arg @ref FL_VAO_PH15_THRESHOLD_LOW + * @retval None + */ +__STATIC_INLINE void FL_VAO_GPIO_SetPH15Threshold(VAO_Type *VAOx, uint32_t value) +{ + MODIFY_REG(VAOx->VILR, VAO_VILR_PHVIL15_Msk, value); +} + +/** + * @brief Get PH15 input low threshold value + * @rmtoll VILR PHVIL15 FL_VAO_GPIO_GetPH15Threshold + * @param VAOx VAO instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_VAO_PH15_THRESHOLD_NORMAL + * @arg @ref FL_VAO_PH15_THRESHOLD_LOW + */ +__STATIC_INLINE uint32_t FL_VAO_GPIO_GetPH15Threshold(VAO_Type *VAOx) +{ + return (uint32_t)(READ_BIT(VAOx->VILR, VAO_VILR_PHVIL15_Msk)); +} + +/** + * @} + */ + +/** @defgroup VAO_FL_EF_Init Initialization and de-initialization functions + * @{ + */ +//#warning "PLEASE ANNOUCE THE INIT AND DEINIT FUNCTIONS HERE!!!" +FL_ErrorStatus FL_VAO_DeInit(VAO_Type *VAOx); +FL_ErrorStatus FL_VAO_IO_Init(VAO_Type *VAOx, FL_VAO_IO_InitTypeDef *VAO_InitStruct); +FL_ErrorStatus FL_VAO_XTLF_Init(VAO_Type *VAOx, FL_VAO_XTLF_InitTypeDef *VAO_XTLF_InitStruct); +void FL_VAO_IO_StructInit(FL_VAO_IO_InitTypeDef *VAO_InitStruct); +void FL_VAO_XTLF_StructInit(FL_VAO_XTLF_InitTypeDef *VAO_XTLF_InitStruct); +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif /* __FM33LG0XX_FL_VAO_H*/ + +/*************************Py_Code_Generator Version: 0.1-0.11-0.1 @ 2020-09-14*************************/ +/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/ diff --git a/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_vref.h b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_vref.h new file mode 100644 index 0000000..4244aa6 --- /dev/null +++ b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_vref.h @@ -0,0 +1,513 @@ + /** + ******************************************************************************************************* + * @file fm33lg0xx_fl_vref.h + * @author FMSH Application Team + * @brief Head file of VREF FL Module + ******************************************************************************************************* + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + + + +/* Define to prevent recursive inclusion---------------------------------------------------------------*/ +#ifndef __FM33LG0XX_FL_VREF_H +#define __FM33LG0XX_FL_VREF_H + +#ifdef __cplusplus +extern "C" { +#endif +/* Includes -------------------------------------------------------------------------------------------*/ +#include "fm33lg0xx_fl_def.h" +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @defgroup VREF VREF + * @brief VREF FL driver + * @{ + */ + +/* Exported types -------------------------------------------------------------------------------------*/ +/** @defgroup VREF_FL_ES_INIT VREF Exported Init structures + * @{ + */ + +/** + * @brief FL VREF Init Sturcture definition + */ + +/** + * @} + */ +/* Exported constants ---------------------------------------------------------------------------------*/ +/** @defgroup VREF_FL_Exported_Constants VREF Exported Constants + * @{ + */ + +#define VREF_CR_VREF_EN_Pos (0U) +#define VREF_CR_VREF_EN_Msk (0x1U << VREF_CR_VREF_EN_Pos) +#define VREF_CR_VREF_EN VREF_CR_VREF_EN_Msk + +#define VREF_CR_PTAT_EN_Pos (1U) +#define VREF_CR_PTAT_EN_Msk (0x1U << VREF_CR_PTAT_EN_Pos) +#define VREF_CR_PTAT_EN VREF_CR_PTAT_EN_Msk + +#define VREF_ISR_FLAG_Pos (8U) +#define VREF_ISR_FLAG_Msk (0x1U << VREF_ISR_FLAG_Pos) +#define VREF_ISR_FLAG VREF_ISR_FLAG_Msk + +#define VREF_ISR_RDY_Pos (1U) +#define VREF_ISR_RDY_Msk (0x1U << VREF_ISR_RDY_Pos) +#define VREF_ISR_RDY VREF_ISR_RDY_Msk + +#define VREF_ISR_IF_Pos (0U) +#define VREF_ISR_IF_Msk (0x1U << VREF_ISR_IF_Pos) +#define VREF_ISR_IF VREF_ISR_IF_Msk + +#define VREF_IER_IE_Pos (0U) +#define VREF_IER_IE_Msk (0x1U << VREF_IER_IE_Pos) +#define VREF_IER_IE VREF_IER_IE_Msk + +#define VREF_BUFCR_AVREFBUF_OUTEN_Pos (5U) +#define VREF_BUFCR_AVREFBUF_OUTEN_Msk (0x1U << VREF_BUFCR_AVREFBUF_OUTEN_Pos) +#define VREF_BUFCR_AVREFBUF_OUTEN VREF_BUFCR_AVREFBUF_OUTEN_Msk + +#define VREF_BUFCR_AVREFBUF_EN_Pos (4U) +#define VREF_BUFCR_AVREFBUF_EN_Msk (0x1U << VREF_BUFCR_AVREFBUF_EN_Pos) +#define VREF_BUFCR_AVREFBUF_EN VREF_BUFCR_AVREFBUF_EN_Msk + +#define VREF_BUFCR_VPTATBUFFER_OUTEN_Pos (3U) +#define VREF_BUFCR_VPTATBUFFER_OUTEN_Msk (0x1U << VREF_BUFCR_VPTATBUFFER_OUTEN_Pos) +#define VREF_BUFCR_VPTATBUFFER_OUTEN VREF_BUFCR_VPTATBUFFER_OUTEN_Msk + +#define VREF_BUFCR_VPTATBUFFER_EN_Pos (2U) +#define VREF_BUFCR_VPTATBUFFER_EN_Msk (0x1U << VREF_BUFCR_VPTATBUFFER_EN_Pos) +#define VREF_BUFCR_VPTATBUFFER_EN VREF_BUFCR_VPTATBUFFER_EN_Msk + +#define VREF_BUFCR_VREFBUFFER_OUTEN_Pos (1U) +#define VREF_BUFCR_VREFBUFFER_OUTEN_Msk (0x1U << VREF_BUFCR_VREFBUFFER_OUTEN_Pos) +#define VREF_BUFCR_VREFBUFFER_OUTEN VREF_BUFCR_VREFBUFFER_OUTEN_Msk + +#define VREF_BUFCR_VREFBUFFER_EN_Pos (0U) +#define VREF_BUFCR_VREFBUFFER_EN_Msk (0x1U << VREF_BUFCR_VREFBUFFER_EN_Pos) +#define VREF_BUFCR_VREFBUFFER_EN VREF_BUFCR_VREFBUFFER_EN_Msk + + + + + + +/** + * @} + */ +/* Exported functions ---------------------------------------------------------------------------------*/ +/** @defgroup VREF_FL_Exported_Functions VREF Exported Functions + * @{ + */ + +/** + * @brief Enable VREF + * @rmtoll CR VREF_EN FL_VREF_Enable + * @param VREFx VREF instance + * @retval None + */ +__STATIC_INLINE void FL_VREF_Enable(VREF_Type *VREFx) +{ + SET_BIT(VREFx->CR, VREF_CR_VREF_EN_Msk); +} + +/** + * @brief Get VREF Enable Status + * @rmtoll CR VREF_EN FL_VREF_IsEnabled + * @param VREFx VREF instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_VREF_IsEnabled(VREF_Type *VREFx) +{ + return (uint32_t)(READ_BIT(VREFx->CR, VREF_CR_VREF_EN_Msk) == VREF_CR_VREF_EN_Msk); +} + +/** + * @brief Disable VREF + * @rmtoll CR VREF_EN FL_VREF_Disable + * @param VREFx VREF instance + * @retval None + */ +__STATIC_INLINE void FL_VREF_Disable(VREF_Type *VREFx) +{ + CLEAR_BIT(VREFx->CR, VREF_CR_VREF_EN_Msk); +} + +/** + * @brief Enable Temperatue Sensor + * @rmtoll CR PTAT_EN FL_VREF_EnableTemperatureSensor + * @param VREFx VREF instance + * @retval None + */ +__STATIC_INLINE void FL_VREF_EnableTemperatureSensor(VREF_Type *VREFx) +{ + SET_BIT(VREFx->CR, VREF_CR_PTAT_EN_Msk); +} + +/** + * @brief Get Temperatue Sensor Enable Status + * @rmtoll CR PTAT_EN FL_VREF_IsEnabledTemperatureSensor + * @param VREFx VREF instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_VREF_IsEnabledTemperatureSensor(VREF_Type *VREFx) +{ + return (uint32_t)(READ_BIT(VREFx->CR, VREF_CR_PTAT_EN_Msk) == VREF_CR_PTAT_EN_Msk); +} + +/** + * @brief Disable Temperatue Sensor + * @rmtoll CR PTAT_EN FL_VREF_DisableTemperatureSensor + * @param VREFx VREF instance + * @retval None + */ +__STATIC_INLINE void FL_VREF_DisableTemperatureSensor(VREF_Type *VREFx) +{ + CLEAR_BIT(VREFx->CR, VREF_CR_PTAT_EN_Msk); +} + +/** + * @brief Get VREF Setable Flag From Analog + * @rmtoll ISR FLAG FL_VREF_IsActiveFlag_AnalogReady + * @param VREFx VREF instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_VREF_IsActiveFlag_AnalogReady(VREF_Type *VREFx) +{ + return (uint32_t)(READ_BIT(VREFx->ISR, VREF_ISR_FLAG_Msk) == (VREF_ISR_FLAG_Msk)); +} + +/** + * @brief Get VREF Ready Flag + * @rmtoll ISR RDY FL_VREF_IsActiveFlag_DigitalReady + * @param VREFx VREF instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_VREF_IsActiveFlag_DigitalReady(VREF_Type *VREFx) +{ + return (uint32_t)(READ_BIT(VREFx->ISR, VREF_ISR_RDY_Msk) == (VREF_ISR_RDY_Msk)); +} + +/** + * @brief Get VREF Ready Interrupt Flag + * @rmtoll ISR IF FL_VREF_IsActiveFlag_Ready + * @param VREFx VREF instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_VREF_IsActiveFlag_Ready(VREF_Type *VREFx) +{ + return (uint32_t)(READ_BIT(VREFx->ISR, VREF_ISR_IF_Msk) == (VREF_ISR_IF_Msk)); +} + +/** + * @brief Clear VREF Ready Interrupt Flag + * @rmtoll ISR IF FL_VREF_ClearFlag_Ready + * @param VREFx VREF instance + * @retval None + */ +__STATIC_INLINE void FL_VREF_ClearFlag_Ready(VREF_Type *VREFx) +{ + WRITE_REG(VREFx->ISR, VREF_ISR_IF_Msk); +} + +/** + * @brief Enable VREF Ready Interrupt + * @rmtoll IER IE FL_VREF_EnableIT_Ready + * @param VREFx VREF instance + * @retval None + */ +__STATIC_INLINE void FL_VREF_EnableIT_Ready(VREF_Type *VREFx) +{ + SET_BIT(VREFx->IER, VREF_IER_IE_Msk); +} + +/** + * @brief Get VREF Ready Interrupt Enable Status + * @rmtoll IER IE FL_VREF_IsEnabledIT_Ready + * @param VREFx VREF instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_VREF_IsEnabledIT_Ready(VREF_Type *VREFx) +{ + return (uint32_t)(READ_BIT(VREFx->IER, VREF_IER_IE_Msk) == VREF_IER_IE_Msk); +} + +/** + * @brief Disable VREF Ready Interrupt + * @rmtoll IER IE FL_VREF_DisableIT_Ready + * @param VREFx VREF instance + * @retval None + */ +__STATIC_INLINE void FL_VREF_DisableIT_Ready(VREF_Type *VREFx) +{ + CLEAR_BIT(VREFx->IER, VREF_IER_IE_Msk); +} + +/** + * @brief Enable AVREF Buffer Output + * @rmtoll BUFCR AVREFBUF_OUTEN FL_VREF_EnableAVREFBufferOutput + * @param VREFx VREF instance + * @retval None + */ +__STATIC_INLINE void FL_VREF_EnableAVREFBufferOutput(VREF_Type *VREFx) +{ + SET_BIT(VREFx->BUFCR, VREF_BUFCR_AVREFBUF_OUTEN_Msk); +} + +/** + * @brief Get AVREF Buffer Output Enable Status + * @rmtoll BUFCR AVREFBUF_OUTEN FL_VREF_IsEnabledAVREFBufferOutput + * @param VREFx VREF instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_VREF_IsEnabledAVREFBufferOutput(VREF_Type *VREFx) +{ + return (uint32_t)(READ_BIT(VREFx->BUFCR, VREF_BUFCR_AVREFBUF_OUTEN_Msk) == VREF_BUFCR_AVREFBUF_OUTEN_Msk); +} + +/** + * @brief Disable AVREF Buffer Output + * @rmtoll BUFCR AVREFBUF_OUTEN FL_VREF_DisableAVREFBufferOutput + * @param VREFx VREF instance + * @retval None + */ +__STATIC_INLINE void FL_VREF_DisableAVREFBufferOutput(VREF_Type *VREFx) +{ + CLEAR_BIT(VREFx->BUFCR, VREF_BUFCR_AVREFBUF_OUTEN_Msk); +} + +/** + * @brief Enable AVREF Buffer + * @rmtoll BUFCR AVREFBUF_EN FL_VREF_EnableAVREFBuffer + * @param VREFx VREF instance + * @retval None + */ +__STATIC_INLINE void FL_VREF_EnableAVREFBuffer(VREF_Type *VREFx) +{ + SET_BIT(VREFx->BUFCR, VREF_BUFCR_AVREFBUF_EN_Msk); +} + +/** + * @brief Get AVREF Buffer Enable Status + * @rmtoll BUFCR AVREFBUF_EN FL_VREF_IsEnabledAVREFBuffer + * @param VREFx VREF instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_VREF_IsEnabledAVREFBuffer(VREF_Type *VREFx) +{ + return (uint32_t)(READ_BIT(VREFx->BUFCR, VREF_BUFCR_AVREFBUF_EN_Msk) == VREF_BUFCR_AVREFBUF_EN_Msk); +} + +/** + * @brief Disable AVREF Buffer + * @rmtoll BUFCR AVREFBUF_EN FL_VREF_DisableAVREFBuffer + * @param VREFx VREF instance + * @retval None + */ +__STATIC_INLINE void FL_VREF_DisableAVREFBuffer(VREF_Type *VREFx) +{ + CLEAR_BIT(VREFx->BUFCR, VREF_BUFCR_AVREFBUF_EN_Msk); +} + +/** + * @brief Enable VPTAT Buffer Output + * @rmtoll BUFCR VPTATBUFFER_OUTEN FL_VREF_EnableVPTATBufferOutput + * @param VREFx VREF instance + * @retval None + */ +__STATIC_INLINE void FL_VREF_EnableVPTATBufferOutput(VREF_Type *VREFx) +{ + SET_BIT(VREFx->BUFCR, VREF_BUFCR_VPTATBUFFER_OUTEN_Msk); +} + +/** + * @brief Get VPTAT Buffer Output Enable Status + * @rmtoll BUFCR VPTATBUFFER_OUTEN FL_VREF_IsEnabledVPTATBufferOutput + * @param VREFx VREF instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_VREF_IsEnabledVPTATBufferOutput(VREF_Type *VREFx) +{ + return (uint32_t)(READ_BIT(VREFx->BUFCR, VREF_BUFCR_VPTATBUFFER_OUTEN_Msk) == VREF_BUFCR_VPTATBUFFER_OUTEN_Msk); +} + +/** + * @brief Disable VPTAT Buffer Output + * @rmtoll BUFCR VPTATBUFFER_OUTEN FL_VREF_DisableVPTATBufferOutput + * @param VREFx VREF instance + * @retval None + */ +__STATIC_INLINE void FL_VREF_DisableVPTATBufferOutput(VREF_Type *VREFx) +{ + CLEAR_BIT(VREFx->BUFCR, VREF_BUFCR_VPTATBUFFER_OUTEN_Msk); +} + +/** + * @brief Enable VPTAT Buffer + * @rmtoll BUFCR VPTATBUFFER_EN FL_VREF_EnableVPTATBuffer + * @param VREFx VREF instance + * @retval None + */ +__STATIC_INLINE void FL_VREF_EnableVPTATBuffer(VREF_Type *VREFx) +{ + SET_BIT(VREFx->BUFCR, VREF_BUFCR_VPTATBUFFER_EN_Msk); +} + +/** + * @brief Get VPTAT Buffer Enable Status + * @rmtoll BUFCR VPTATBUFFER_EN FL_VREF_IsEnabledVPTATBuffer + * @param VREFx VREF instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_VREF_IsEnabledVPTATBuffer(VREF_Type *VREFx) +{ + return (uint32_t)(READ_BIT(VREFx->BUFCR, VREF_BUFCR_VPTATBUFFER_EN_Msk) == VREF_BUFCR_VPTATBUFFER_EN_Msk); +} + +/** + * @brief Disable VPTAT Buffer + * @rmtoll BUFCR VPTATBUFFER_EN FL_VREF_DisableVPTATBuffer + * @param VREFx VREF instance + * @retval None + */ +__STATIC_INLINE void FL_VREF_DisableVPTATBuffer(VREF_Type *VREFx) +{ + CLEAR_BIT(VREFx->BUFCR, VREF_BUFCR_VPTATBUFFER_EN_Msk); +} + +/** + * @brief Enable VREF Buffer Output + * @rmtoll BUFCR VREFBUFFER_OUTEN FL_VREF_EnableVREFBufferOutput + * @param VREFx VREF instance + * @retval None + */ +__STATIC_INLINE void FL_VREF_EnableVREFBufferOutput(VREF_Type *VREFx) +{ + SET_BIT(VREFx->BUFCR, VREF_BUFCR_VREFBUFFER_OUTEN_Msk); +} + +/** + * @brief Get VREF Buffer Output Enable Status + * @rmtoll BUFCR VREFBUFFER_OUTEN FL_VREF_IsEnabledVREFBufferOutput + * @param VREFx VREF instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_VREF_IsEnabledVREFBufferOutput(VREF_Type *VREFx) +{ + return (uint32_t)(READ_BIT(VREFx->BUFCR, VREF_BUFCR_VREFBUFFER_OUTEN_Msk) == VREF_BUFCR_VREFBUFFER_OUTEN_Msk); +} + +/** + * @brief Disable VREF Buffer Output + * @rmtoll BUFCR VREFBUFFER_OUTEN FL_VREF_DisableVREFBufferOutput + * @param VREFx VREF instance + * @retval None + */ +__STATIC_INLINE void FL_VREF_DisableVREFBufferOutput(VREF_Type *VREFx) +{ + CLEAR_BIT(VREFx->BUFCR, VREF_BUFCR_VREFBUFFER_OUTEN_Msk); +} + +/** + * @brief Enable VREF Buffer + * @rmtoll BUFCR VREFBUFFER_EN FL_VREF_EnableVREFBuffer + * @param VREFx VREF instance + * @retval None + */ +__STATIC_INLINE void FL_VREF_EnableVREFBuffer(VREF_Type *VREFx) +{ + SET_BIT(VREFx->BUFCR, VREF_BUFCR_VREFBUFFER_EN_Msk); +} + +/** + * @brief Get VREF Buffer Enable Status + * @rmtoll BUFCR VREFBUFFER_EN FL_VREF_IsEnabledVREFBuffer + * @param VREFx VREF instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_VREF_IsEnabledVREFBuffer(VREF_Type *VREFx) +{ + return (uint32_t)(READ_BIT(VREFx->BUFCR, VREF_BUFCR_VREFBUFFER_EN_Msk) == VREF_BUFCR_VREFBUFFER_EN_Msk); +} + +/** + * @brief Disable VREF Buffer + * @rmtoll BUFCR VREFBUFFER_EN FL_VREF_DisableVREFBuffer + * @param VREFx VREF instance + * @retval None + */ +__STATIC_INLINE void FL_VREF_DisableVREFBuffer(VREF_Type *VREFx) +{ + CLEAR_BIT(VREFx->BUFCR, VREF_BUFCR_VREFBUFFER_EN_Msk); +} + +/** + * @} + */ + +/** @defgroup VREF_FL_EF_Init Initialization and de-initialization functions + * @{ + */ + + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif /* __FM33LG0XX_FL_VREF_H*/ + +/*************************Py_Code_Generator Version: 0.1-0.11-0.1 @ 2020-09-12*************************/ +/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/ diff --git a/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_vrefp.h b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_vrefp.h new file mode 100644 index 0000000..752cae6 --- /dev/null +++ b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_vrefp.h @@ -0,0 +1,546 @@ + /** + ******************************************************************************************************* + * @file fm33lg0xx_fl_vrefp.h + * @author FMSH Application Team + * @brief Head file of VREFP FL Module + ******************************************************************************************************* + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + + + +/* Define to prevent recursive inclusion---------------------------------------------------------------*/ +#ifndef __FM33LG0XX_FL_VREFP_H +#define __FM33LG0XX_FL_VREFP_H + +#ifdef __cplusplus +extern "C" { +#endif +/* Includes -------------------------------------------------------------------------------------------*/ +#include "fm33lg0xx_fl_def.h" +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @defgroup VREFP VREFP + * @brief VREFP FL driver + * @{ + */ + +/* Exported types -------------------------------------------------------------------------------------*/ +/** @defgroup VREFP_FL_ES_INIT VREFP Exported Init structures + * @{ + */ + +/** + * @brief FL VREFP Init Sturcture definition + */ +typedef struct +{ + /* 输出电压的TRIM值 */ + uint32_t voltageTrim; + /* 输出电压值 */ + uint32_t outputVoltage; + /* VREFP输出模式 */ + uint32_t mode; + /* 间歇模式下单次驱动时间 */ + uint32_t timeOfDriving; + /* 间歇模式下使能周期 */ + uint32_t timeOfPeriod; + +} FL_VREFP_InitTypeDef; +/** + * @} + */ +/* Exported constants ---------------------------------------------------------------------------------*/ +/** @defgroup VREFP_FL_Exported_Constants VREFP Exported Constants + * @{ + */ + +#define VREFP_CR_DENDIE_Pos (2U) +#define VREFP_CR_DENDIE_Msk (0x1U << VREFP_CR_DENDIE_Pos) +#define VREFP_CR_DENDIE VREFP_CR_DENDIE_Msk + +#define VREFP_CR_POVIE_Pos (1U) +#define VREFP_CR_POVIE_Msk (0x1U << VREFP_CR_POVIE_Pos) +#define VREFP_CR_POVIE VREFP_CR_POVIE_Msk + +#define VREFP_CR_EN_Pos (0U) +#define VREFP_CR_EN_Msk (0x1U << VREFP_CR_EN_Pos) +#define VREFP_CR_EN VREFP_CR_EN_Msk + +#define VREFP_CFGR_VRS_Pos (8U) +#define VREFP_CFGR_VRS_Msk (0x7U << VREFP_CFGR_VRS_Pos) +#define VREFP_CFGR_VRS VREFP_CFGR_VRS_Msk + +#define VREFP_CFGR_TPERIOD_Pos (5U) +#define VREFP_CFGR_TPERIOD_Msk (0x7U << VREFP_CFGR_TPERIOD_Pos) +#define VREFP_CFGR_TPERIOD VREFP_CFGR_TPERIOD_Msk + +#define VREFP_CFGR_TDRV_Pos (2U) +#define VREFP_CFGR_TDRV_Msk (0x7U << VREFP_CFGR_TDRV_Pos) +#define VREFP_CFGR_TDRV VREFP_CFGR_TDRV_Msk + +#define VREFP_CFGR_LPM_Pos (1U) +#define VREFP_CFGR_LPM_Msk (0x1U << VREFP_CFGR_LPM_Pos) +#define VREFP_CFGR_LPM VREFP_CFGR_LPM_Msk + +#define VREFP_ISR_BUSY_Pos (2U) +#define VREFP_ISR_BUSY_Msk (0x1U << VREFP_ISR_BUSY_Pos) +#define VREFP_ISR_BUSY VREFP_ISR_BUSY_Msk + +#define VREFP_ISR_DEND_Pos (1U) +#define VREFP_ISR_DEND_Msk (0x1U << VREFP_ISR_DEND_Pos) +#define VREFP_ISR_DEND VREFP_ISR_DEND_Msk + +#define VREFP_ISR_POV_Pos (0U) +#define VREFP_ISR_POV_Msk (0x1U << VREFP_ISR_POV_Pos) +#define VREFP_ISR_POV VREFP_ISR_POV_Msk + + + + + + +#define FL_VREFP_OUTPUT_VOLTAGE_2P0V (0x0Ul << VREFP_CFGR_VRS_Pos) +#define FL_VREFP_OUTPUT_VOLTAGE_2P5V (0x1Ul << VREFP_CFGR_VRS_Pos) +#define FL_VREFP_OUTPUT_VOLTAGE_3P0V (0x2Ul << VREFP_CFGR_VRS_Pos) +#define FL_VREFP_OUTPUT_VOLTAGE_4P5V (0x3Ul << VREFP_CFGR_VRS_Pos) +#define FL_VREFP_OUTPUT_VOLTAGE_1P5V (0x4Ul << VREFP_CFGR_VRS_Pos) + + +#define FL_VREFP_ENABLE_PERIOD_1MS (0x0U << VREFP_CFGR_TPERIOD_Pos) +#define FL_VREFP_ENABLE_PERIOD_4MS (0x1U << VREFP_CFGR_TPERIOD_Pos) +#define FL_VREFP_ENABLE_PERIOD_16MS (0x2U << VREFP_CFGR_TPERIOD_Pos) +#define FL_VREFP_ENABLE_PERIOD_32MS (0x3U << VREFP_CFGR_TPERIOD_Pos) +#define FL_VREFP_ENABLE_PERIOD_64MS (0x4U << VREFP_CFGR_TPERIOD_Pos) +#define FL_VREFP_ENABLE_PERIOD_256MS (0x5U << VREFP_CFGR_TPERIOD_Pos) +#define FL_VREFP_ENABLE_PERIOD_1000MS (0x6U << VREFP_CFGR_TPERIOD_Pos) +#define FL_VREFP_ENABLE_PERIOD_4000MS (0x7U << VREFP_CFGR_TPERIOD_Pos) + + +#define FL_VREFP_DRIVING_TIME_4LSCLK (0x0U << VREFP_CFGR_TDRV_Pos) +#define FL_VREFP_DRIVING_TIME_8LSCLK (0x1U << VREFP_CFGR_TDRV_Pos) +#define FL_VREFP_DRIVING_TIME_16LSCLK (0x2U << VREFP_CFGR_TDRV_Pos) +#define FL_VREFP_DRIVING_TIME_32LSCLK (0x3U << VREFP_CFGR_TDRV_Pos) +#define FL_VREFP_DRIVING_TIME_64LSCLK (0x4U << VREFP_CFGR_TDRV_Pos) +#define FL_VREFP_DRIVING_TIME_128LSCLK (0x5U << VREFP_CFGR_TDRV_Pos) +#define FL_VREFP_DRIVING_TIME_256LSCLK (0x6U << VREFP_CFGR_TDRV_Pos) +#define FL_VREFP_DRIVING_TIME_512LSCLK (0x7U << VREFP_CFGR_TDRV_Pos) + + +#define FL_VREFP_WORK_MODE_CONTINUOUS (0x0Ul << VREFP_CFGR_LPM_Pos) +#define FL_VREFP_WORK_MODE_PERIODIC (0x1Ul << VREFP_CFGR_LPM_Pos) + + +/* 原始值 */ +#define VREFP_OUTPUT_VOLTAGE_2P0V_TRIM (*(uint32_t*)0x1FFFFA90) +#define VREFP_OUTPUT_VOLTAGE_2P5V_TRIM (*(uint32_t*)0x1FFFFA8C) +#define VREFP_OUTPUT_VOLTAGE_3P0V_TRIM (*(uint32_t*)0x1FFFFA88) +#define VREFP_OUTPUT_VOLTAGE_4P5V_TRIM (*(uint32_t*)0x1FFFFA84) +#define VREFP_OUTPUT_VOLTAGE_1P5V_TRIM (*(uint32_t*)0x1FFFFA94) + +/* 备份值 */ +#define VREFP_OUTPUT_VOLTAGE_2P0V_TRIM_BKP (*(uint16_t*)0x1FFFFBA6) +#define VREFP_OUTPUT_VOLTAGE_2P5V_TRIM_BKP (*(uint16_t*)0x1FFFFBA4) +#define VREFP_OUTPUT_VOLTAGE_3P0V_TRIM_BKP (*(uint16_t*)0x1FFFFBA2) +#define VREFP_OUTPUT_VOLTAGE_4P5V_TRIM_BKP (*(uint16_t*)0x1FFFFBA0) +#define VREFP_OUTPUT_VOLTAGE_1P5V_TRIM_BKP (*(uint16_t*)0x1FFFFBA8) + +/* 最终值 */ +#define FL_VREFP_OUTPUT_VOLTAGE_2P0V_TRIM (LDT_CHECK(VREFP_OUTPUT_VOLTAGE_2P0V_TRIM, VREFP_OUTPUT_VOLTAGE_2P0V_TRIM_BKP) & 0xff) +#define FL_VREFP_OUTPUT_VOLTAGE_2P5V_TRIM (LDT_CHECK(VREFP_OUTPUT_VOLTAGE_2P5V_TRIM, VREFP_OUTPUT_VOLTAGE_2P5V_TRIM_BKP) & 0xff) +#define FL_VREFP_OUTPUT_VOLTAGE_3P0V_TRIM (LDT_CHECK(VREFP_OUTPUT_VOLTAGE_3P0V_TRIM, VREFP_OUTPUT_VOLTAGE_3P0V_TRIM_BKP) & 0xff) +#define FL_VREFP_OUTPUT_VOLTAGE_4P5V_TRIM (LDT_CHECK(VREFP_OUTPUT_VOLTAGE_4P5V_TRIM, VREFP_OUTPUT_VOLTAGE_4P5V_TRIM_BKP) & 0xff) +#define FL_VREFP_OUTPUT_VOLTAGE_1P5V_TRIM (LDT_CHECK(VREFP_OUTPUT_VOLTAGE_1P5V_TRIM, VREFP_OUTPUT_VOLTAGE_1P5V_TRIM_BKP) & 0xff) + +/** + * @} + */ +/* Exported functions ---------------------------------------------------------------------------------*/ +/** @defgroup VREFP_FL_Exported_Functions VREFP Exported Functions + * @{ + */ + +/** + * @brief Driving end interrupt enable + * @rmtoll CR DENDIE FL_VREFP_EnableIT_DrivingEnd + * @param VREFPx VREFP instance + * @retval None + */ +__STATIC_INLINE void FL_VREFP_EnableIT_DrivingEnd(VREFP_Type *VREFPx) +{ + SET_BIT(VREFPx->CR, VREFP_CR_DENDIE_Msk); +} + +/** + * @brief Get Driving end interrupt enable status + * @rmtoll CR DENDIE FL_VREFP_IsEnabledIT_DrivingEnd + * @param VREFPx VREFP instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_VREFP_IsEnabledIT_DrivingEnd(VREFP_Type *VREFPx) +{ + return (uint32_t)(READ_BIT(VREFPx->CR, VREFP_CR_DENDIE_Msk) == VREFP_CR_DENDIE_Msk); +} + +/** + * @brief Driving end interrupt disable + * @rmtoll CR DENDIE FL_VREFP_DisableIT_DrivingEnd + * @param VREFPx VREFP instance + * @retval None + */ +__STATIC_INLINE void FL_VREFP_DisableIT_DrivingEnd(VREFP_Type *VREFPx) +{ + CLEAR_BIT(VREFPx->CR, VREFP_CR_DENDIE_Msk); +} + +/** + * @brief Periodic overflow interrupt enable + * @rmtoll CR POVIE FL_VREFP_EnableIT_EndOfPeriod + * @param VREFPx VREFP instance + * @retval None + */ +__STATIC_INLINE void FL_VREFP_EnableIT_EndOfPeriod(VREFP_Type *VREFPx) +{ + SET_BIT(VREFPx->CR, VREFP_CR_POVIE_Msk); +} + +/** + * @brief Get Periodic overflow interrupt enable status + * @rmtoll CR POVIE FL_VREFP_IsEnabledIT_EndOfPeriod + * @param VREFPx VREFP instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_VREFP_IsEnabledIT_EndOfPeriod(VREFP_Type *VREFPx) +{ + return (uint32_t)(READ_BIT(VREFPx->CR, VREFP_CR_POVIE_Msk) == VREFP_CR_POVIE_Msk); +} + +/** + * @brief Periodic overflow interrupt disable + * @rmtoll CR POVIE FL_VREFP_DisableIT_EndOfPeriod + * @param VREFPx VREFP instance + * @retval None + */ +__STATIC_INLINE void FL_VREFP_DisableIT_EndOfPeriod(VREFP_Type *VREFPx) +{ + CLEAR_BIT(VREFPx->CR, VREFP_CR_POVIE_Msk); +} + +/** + * @brief VREFP_VREG enable + * @rmtoll CR EN FL_VREFP_Enable + * @param VREFPx VREFP instance + * @retval None + */ +__STATIC_INLINE void FL_VREFP_Enable(VREFP_Type *VREFPx) +{ + SET_BIT(VREFPx->CR, VREFP_CR_EN_Msk); +} + +/** + * @brief Get VREFP_VREG enable status + * @rmtoll CR EN FL_VREFP_IsEnabled + * @param VREFPx VREFP instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_VREFP_IsEnabled(VREFP_Type *VREFPx) +{ + return (uint32_t)(READ_BIT(VREFPx->CR, VREFP_CR_EN_Msk) == VREFP_CR_EN_Msk); +} + +/** + * @brief VREFP_VREG disable + * @rmtoll CR EN FL_VREFP_Disable + * @param VREFPx VREFP instance + * @retval None + */ +__STATIC_INLINE void FL_VREFP_Disable(VREFP_Type *VREFPx) +{ + CLEAR_BIT(VREFPx->CR, VREFP_CR_EN_Msk); +} + +/** + * @brief Set output voltage + * @rmtoll CFGR VRS FL_VREFP_SetOutputVoltage + * @param VREFPx VREFP instance + * @param voltage This parameter can be one of the following values: + * @arg @ref FL_VREFP_OUTPUT_VOLTAGE_2P0V + * @arg @ref FL_VREFP_OUTPUT_VOLTAGE_2P5V + * @arg @ref FL_VREFP_OUTPUT_VOLTAGE_3P0V + * @arg @ref FL_VREFP_OUTPUT_VOLTAGE_4P5V + * @arg @ref FL_VREFP_OUTPUT_VOLTAGE_1P5V + * @retval None + */ +__STATIC_INLINE void FL_VREFP_SetOutputVoltage(VREFP_Type *VREFPx, uint32_t voltage) +{ + MODIFY_REG(VREFPx->CFGR, VREFP_CFGR_VRS_Msk, voltage); +} + +/** + * @brief Get output voltage + * @rmtoll CFGR VRS FL_VREFP_GetOutputVoltage + * @param VREFPx VREFP instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_VREFP_OUTPUT_VOLTAGE_2P0V + * @arg @ref FL_VREFP_OUTPUT_VOLTAGE_2P5V + * @arg @ref FL_VREFP_OUTPUT_VOLTAGE_3P0V + * @arg @ref FL_VREFP_OUTPUT_VOLTAGE_4P5V + * @arg @ref FL_VREFP_OUTPUT_VOLTAGE_1P5V + */ +__STATIC_INLINE uint32_t FL_VREFP_GetOutputVoltage(VREFP_Type *VREFPx) +{ + return (uint32_t)(READ_BIT(VREFPx->CFGR, VREFP_CFGR_VRS_Msk)); +} + +/** + * @brief Set period time on low power mode + * @rmtoll CFGR TPERIOD FL_VREFP_SetEnablePeriod + * @param VREFPx VREFP instance + * @param period This parameter can be one of the following values: + * @arg @ref FL_VREFP_ENABLE_PERIOD_1MS + * @arg @ref FL_VREFP_ENABLE_PERIOD_4MS + * @arg @ref FL_VREFP_ENABLE_PERIOD_16MS + * @arg @ref FL_VREFP_ENABLE_PERIOD_32MS + * @arg @ref FL_VREFP_ENABLE_PERIOD_64MS + * @arg @ref FL_VREFP_ENABLE_PERIOD_256MS + * @arg @ref FL_VREFP_ENABLE_PERIOD_1000MS + * @arg @ref FL_VREFP_ENABLE_PERIOD_4000MS + * @retval None + */ +__STATIC_INLINE void FL_VREFP_SetEnablePeriod(VREFP_Type *VREFPx, uint32_t period) +{ + MODIFY_REG(VREFPx->CFGR, VREFP_CFGR_TPERIOD_Msk, period); +} + +/** + * @brief Get period time on low power mode + * @rmtoll CFGR TPERIOD FL_VREFP_GetEnablePeriod + * @param VREFPx VREFP instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_VREFP_ENABLE_PERIOD_1MS + * @arg @ref FL_VREFP_ENABLE_PERIOD_4MS + * @arg @ref FL_VREFP_ENABLE_PERIOD_16MS + * @arg @ref FL_VREFP_ENABLE_PERIOD_32MS + * @arg @ref FL_VREFP_ENABLE_PERIOD_64MS + * @arg @ref FL_VREFP_ENABLE_PERIOD_256MS + * @arg @ref FL_VREFP_ENABLE_PERIOD_1000MS + * @arg @ref FL_VREFP_ENABLE_PERIOD_4000MS + */ +__STATIC_INLINE uint32_t FL_VREFP_GetEnablePeriod(VREFP_Type *VREFPx) +{ + return (uint32_t)(READ_BIT(VREFPx->CFGR, VREFP_CFGR_TPERIOD_Msk)); +} + +/** + * @brief Set driving time on low power mode + * @rmtoll CFGR TDRV FL_VREFP_SetDrivingTime + * @param VREFPx VREFP instance + * @param time This parameter can be one of the following values: + * @arg @ref FL_VREFP_DRIVING_TIME_4LSCLK + * @arg @ref FL_VREFP_DRIVING_TIME_8LSCLK + * @arg @ref FL_VREFP_DRIVING_TIME_16LSCLK + * @arg @ref FL_VREFP_DRIVING_TIME_32LSCLK + * @arg @ref FL_VREFP_DRIVING_TIME_64LSCLK + * @arg @ref FL_VREFP_DRIVING_TIME_128LSCLK + * @arg @ref FL_VREFP_DRIVING_TIME_256LSCLK + * @arg @ref FL_VREFP_DRIVING_TIME_512LSCLK + * @retval None + */ +__STATIC_INLINE void FL_VREFP_SetDrivingTime(VREFP_Type *VREFPx, uint32_t time) +{ + MODIFY_REG(VREFPx->CFGR, VREFP_CFGR_TDRV_Msk, time); +} + +/** + * @brief Get driving time on low power mode + * @rmtoll CFGR TDRV FL_VREFP_GetDrivingTime + * @param VREFPx VREFP instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_VREFP_DRIVING_TIME_4LSCLK + * @arg @ref FL_VREFP_DRIVING_TIME_8LSCLK + * @arg @ref FL_VREFP_DRIVING_TIME_16LSCLK + * @arg @ref FL_VREFP_DRIVING_TIME_32LSCLK + * @arg @ref FL_VREFP_DRIVING_TIME_64LSCLK + * @arg @ref FL_VREFP_DRIVING_TIME_128LSCLK + * @arg @ref FL_VREFP_DRIVING_TIME_256LSCLK + * @arg @ref FL_VREFP_DRIVING_TIME_512LSCLK + */ +__STATIC_INLINE uint32_t FL_VREFP_GetDrivingTime(VREFP_Type *VREFPx) +{ + return (uint32_t)(READ_BIT(VREFPx->CFGR, VREFP_CFGR_TDRV_Msk)); +} + +/** + * @brief Low power mode enable + * @rmtoll CFGR LPM FL_VREFP_SetWorkMode + * @param VREFPx VREFP instance + * @param mode This parameter can be one of the following values: + * @arg @ref FL_VREFP_WORK_MODE_CONTINUOUS + * @arg @ref FL_VREFP_WORK_MODE_PERIODIC + * @retval None + */ +__STATIC_INLINE void FL_VREFP_SetWorkMode(VREFP_Type *VREFPx, uint32_t mode) +{ + MODIFY_REG(VREFPx->CFGR, VREFP_CFGR_LPM_Msk, mode); +} + +/** + * @brief Get low power mode enablestatus + * @rmtoll CFGR LPM FL_VREFP_GetWorkMode + * @param VREFPx VREFP instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_VREFP_WORK_MODE_CONTINUOUS + * @arg @ref FL_VREFP_WORK_MODE_PERIODIC + */ +__STATIC_INLINE uint32_t FL_VREFP_GetWorkMode(VREFP_Type *VREFPx) +{ + return (uint32_t)(READ_BIT(VREFPx->CFGR, VREFP_CFGR_LPM_Msk)); +} + +/** + * @brief Get Driving busy flag + * @rmtoll ISR BUSY FL_VREFP_IsActiveFlag_DrivingBusy + * @param VREFPx VREFP instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_VREFP_IsActiveFlag_DrivingBusy(VREFP_Type *VREFPx) +{ + return (uint32_t)(READ_BIT(VREFPx->ISR, VREFP_ISR_BUSY_Msk) == (VREFP_ISR_BUSY_Msk)); +} + +/** + * @brief Get Driving end flag + * @rmtoll ISR DEND FL_VREFP_IsActiveFlag_DrivingEnd + * @param VREFPx VREFP instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_VREFP_IsActiveFlag_DrivingEnd(VREFP_Type *VREFPx) +{ + return (uint32_t)(READ_BIT(VREFPx->ISR, VREFP_ISR_DEND_Msk) == (VREFP_ISR_DEND_Msk)); +} + +/** + * @brief Clear Driving end flag + * @rmtoll ISR DEND FL_VREFP_ClearFlag_DrivingEnd + * @param VREFPx VREFP instance + * @retval None + */ +__STATIC_INLINE void FL_VREFP_ClearFlag_DrivingEnd(VREFP_Type *VREFPx) +{ + WRITE_REG(VREFPx->ISR, VREFP_ISR_DEND_Msk); +} + +/** + * @brief Get periodic overflow flag + * @rmtoll ISR POV FL_VREFP_IsActiveFlag_EndOfPeriod + * @param VREFPx VREFP instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_VREFP_IsActiveFlag_EndOfPeriod(VREFP_Type *VREFPx) +{ + return (uint32_t)(READ_BIT(VREFPx->ISR, VREFP_ISR_POV_Msk) == (VREFP_ISR_POV_Msk)); +} + +/** + * @brief Clear periodic overflow flag + * @rmtoll ISR POV FL_VREFP_ClearFlag_EndOfPeriod + * @param VREFPx VREFP instance + * @retval None + */ +__STATIC_INLINE void FL_VREFP_ClearFlag_EndOfPeriod(VREFP_Type *VREFPx) +{ + WRITE_REG(VREFPx->ISR, VREFP_ISR_POV_Msk); +} + +/** + * @brief Set VREFP output voltage + * @rmtoll TR FL_VREFP_WriteOutputVoltageTrim + * @param VREFPx VREFP instance + * @param voltage + * @retval None + */ +__STATIC_INLINE void FL_VREFP_WriteOutputVoltageTrim(VREFP_Type *VREFPx, uint32_t voltage) +{ + MODIFY_REG(VREFPx->TR, (0xffU << 0U), (voltage << 0U)); +} + +/** + * @brief Get VREFP output voltage + * @rmtoll TR FL_VREFP_ReadOutputVoltageTrim + * @param VREFPx VREFP instance + * @retval + */ +__STATIC_INLINE uint32_t FL_VREFP_ReadOutputVoltageTrim(VREFP_Type *VREFPx) +{ + return (uint32_t)(READ_BIT(VREFPx->TR, (0xffU << 0U)) >> 0U); +} + +/** + * @} + */ + +/** @defgroup VREFP_FL_EF_Init Initialization and de-initialization functions + * @{ + */ +FL_ErrorStatus FL_VREFP_Init(VREFP_Type *VREFPx, FL_VREFP_InitTypeDef *VREFP_InitStruct); +void FL_VREFP_StructInit(FL_VREFP_InitTypeDef *VREFP_InitStruct); +FL_ErrorStatus FL_VREFP_DeInit(VREFP_Type *VREFPx); + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif /* __FM33LG0XX_FL_VREFP_H*/ + +/*************************Py_Code_Generator Version: 0.1-0.14-0.1 @ 2021-06-25*************************/ +/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/ diff --git a/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_wwdt.h b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_wwdt.h new file mode 100644 index 0000000..4929a33 --- /dev/null +++ b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Inc/fm33lg0xx_fl_wwdt.h @@ -0,0 +1,288 @@ + /** + ******************************************************************************************************* + * @file fm33lg0xx_fl_wwdt.h + * @author FMSH Application Team + * @brief Head file of WWDT FL Module + ******************************************************************************************************* + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + + + +/* Define to prevent recursive inclusion---------------------------------------------------------------*/ +#ifndef __FM33LG0XX_FL_WWDT_H +#define __FM33LG0XX_FL_WWDT_H + +#ifdef __cplusplus +extern "C" { +#endif +/* Includes -------------------------------------------------------------------------------------------*/ +#include "fm33lg0xx_fl_def.h" +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @defgroup WWDT WWDT + * @brief WWDT FL driver + * @{ + */ + +/* Exported types -------------------------------------------------------------------------------------*/ +/** @defgroup WWDT_FL_ES_INIT WWDT Exported Init structures + * @{ + */ + +/** + * @brief FL WWDT Init Sturcture definition + */ +typedef struct +{ + /* 看门狗溢出周期 */ + uint32_t overflowPeriod; + +} FL_WWDT_InitTypeDef; +/** + * @} + */ +/* Exported constants ---------------------------------------------------------------------------------*/ +/** @defgroup WWDT_FL_Exported_Constants WWDT Exported Constants + * @{ + */ + +#define WWDT_CR_CON_Pos (0U) +#define WWDT_CR_CON_Msk (0xffU << WWDT_CR_CON_Pos) +#define WWDT_CR_CON WWDT_CR_CON_Msk + +#define WWDT_CFGR_CFG_Pos (0U) +#define WWDT_CFGR_CFG_Msk (0x7U << WWDT_CFGR_CFG_Pos) +#define WWDT_CFGR_CFG WWDT_CFGR_CFG_Msk + +#define WWDT_IER_IE_Pos (0U) +#define WWDT_IER_IE_Msk (0x1U << WWDT_IER_IE_Pos) +#define WWDT_IER_IE WWDT_IER_IE_Msk + +#define WWDT_ISR_IF_Pos (0U) +#define WWDT_ISR_IF_Msk (0x1U << WWDT_ISR_IF_Pos) +#define WWDT_ISR_IF WWDT_ISR_IF_Msk + + + + + + +#define FL_WWDT_KEY_ENABLE (0x5AU << WWDT_CR_CON_Pos) + +#define FL_WWDT_RELOAD_ENABLE (0xACU << WWDT_CR_CON_Pos) + +#define FL_WWDT_PERIOD_1CNT (0x0U << WWDT_CFGR_CFG_Pos) +#define FL_WWDT_PERIOD_4CNT (0x1U << WWDT_CFGR_CFG_Pos) +#define FL_WWDT_PERIOD_16CNT (0x2U << WWDT_CFGR_CFG_Pos) +#define FL_WWDT_PERIOD_64CNT (0x3U << WWDT_CFGR_CFG_Pos) +#define FL_WWDT_PERIOD_128CNT (0x4U << WWDT_CFGR_CFG_Pos) +#define FL_WWDT_PERIOD_256CNT (0x5U << WWDT_CFGR_CFG_Pos) +#define FL_WWDT_PERIOD_512CNT (0x6U << WWDT_CFGR_CFG_Pos) +#define FL_WWDT_PERIOD_1024CNT (0x7U << WWDT_CFGR_CFG_Pos) + + +/** + * @} + */ +/* Exported functions ---------------------------------------------------------------------------------*/ +/** @defgroup WWDT_FL_Exported_Functions WWDT Exported Functions + * @{ + */ + +/** + * @brief WWDT enable counter + * @rmtoll CR CON FL_WWDT_Enable + * @param WWDTx WWDT instance + * @retval None + */ +__STATIC_INLINE void FL_WWDT_Enable(WWDT_Type *WWDTx) +{ + WRITE_REG(WWDTx->CR, FL_WWDT_KEY_ENABLE); +} + +/** + * @brief WWDT reset counter + * @rmtoll CR CON FL_WWDT_ReloadCounter + * @param WWDTx WWDT instance + * @retval None + */ +__STATIC_INLINE void FL_WWDT_ReloadCounter(WWDT_Type *WWDTx) +{ + WRITE_REG(WWDTx->CR, FL_WWDT_RELOAD_ENABLE); +} + +/** + * @brief Set WWDT overflow period + * @rmtoll CFGR CFG FL_WWDT_SetPeriod + * @param WWDTx WWDT instance + * @param period This parameter can be one of the following values: + * @arg @ref FL_WWDT_PERIOD_1CNT + * @arg @ref FL_WWDT_PERIOD_4CNT + * @arg @ref FL_WWDT_PERIOD_16CNT + * @arg @ref FL_WWDT_PERIOD_64CNT + * @arg @ref FL_WWDT_PERIOD_128CNT + * @arg @ref FL_WWDT_PERIOD_256CNT + * @arg @ref FL_WWDT_PERIOD_512CNT + * @arg @ref FL_WWDT_PERIOD_1024CNT + * @retval None + */ +__STATIC_INLINE void FL_WWDT_SetPeriod(WWDT_Type *WWDTx, uint32_t period) +{ + MODIFY_REG(WWDTx->CFGR, WWDT_CFGR_CFG_Msk, period); +} + +/** + * @brief Get WWDT overflow period + * @rmtoll CFGR CFG FL_WWDT_GetPeriod + * @param WWDTx WWDT instance + * @retval Returned value can be one of the following values: + * @arg @ref FL_WWDT_PERIOD_1CNT + * @arg @ref FL_WWDT_PERIOD_4CNT + * @arg @ref FL_WWDT_PERIOD_16CNT + * @arg @ref FL_WWDT_PERIOD_64CNT + * @arg @ref FL_WWDT_PERIOD_128CNT + * @arg @ref FL_WWDT_PERIOD_256CNT + * @arg @ref FL_WWDT_PERIOD_512CNT + * @arg @ref FL_WWDT_PERIOD_1024CNT + */ +__STATIC_INLINE uint32_t FL_WWDT_GetPeriod(WWDT_Type *WWDTx) +{ + return (uint32_t)(READ_BIT(WWDTx->CFGR, WWDT_CFGR_CFG_Msk)); +} + +/** + * @brief Get WWDT Counter value + * @rmtoll CNT FL_WWDT_ReadCounter + * @param WWDTx WWDT instance + * @retval + */ +__STATIC_INLINE uint32_t FL_WWDT_ReadCounter(WWDT_Type *WWDTx) +{ + return (uint32_t)(READ_BIT(WWDTx->CNT, (0x3ffU << 0U)) >> 0U); +} + +/** + * @brief WWDT interrupt enable + * @rmtoll IER IE FL_WWDT_EnableIT_NearOverflow + * @param WWDTx WWDT instance + * @retval None + */ +__STATIC_INLINE void FL_WWDT_EnableIT_NearOverflow(WWDT_Type *WWDTx) +{ + SET_BIT(WWDTx->IER, WWDT_IER_IE_Msk); +} + +/** + * @brief WWDT interrupt enable status + * @rmtoll IER IE FL_WWDT_IsEnabledIT_NearOverflow + * @param WWDTx WWDT instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_WWDT_IsEnabledIT_NearOverflow(WWDT_Type *WWDTx) +{ + return (uint32_t)(READ_BIT(WWDTx->IER, WWDT_IER_IE_Msk) == WWDT_IER_IE_Msk); +} + +/** + * @brief WWDT interrupt disable + * @rmtoll IER IE FL_WWDT_DisableIT_NearOverflow + * @param WWDTx WWDT instance + * @retval None + */ +__STATIC_INLINE void FL_WWDT_DisableIT_NearOverflow(WWDT_Type *WWDTx) +{ + CLEAR_BIT(WWDTx->IER, WWDT_IER_IE_Msk); +} + +/** + * @brief Get WWDT 75% overflow flag + * @rmtoll ISR IF FL_WWDT_IsActiveFlag_NearOverflow + * @param WWDTx WWDT instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t FL_WWDT_IsActiveFlag_NearOverflow(WWDT_Type *WWDTx) +{ + return (uint32_t)(READ_BIT(WWDTx->ISR, WWDT_ISR_IF_Msk) == (WWDT_ISR_IF_Msk)); +} + +/** + * @brief Clear WWDT 75% overflow flag + * @rmtoll ISR IF FL_WWDT_ClearFlag_NearOverflow + * @param WWDTx WWDT instance + * @retval None + */ +__STATIC_INLINE void FL_WWDT_ClearFlag_NearOverflow(WWDT_Type *WWDTx) +{ + WRITE_REG(WWDTx->ISR, WWDT_ISR_IF_Msk); +} + +/** + * @} + */ + +/** @defgroup WWDT_FL_EF_Init Initialization and de-initialization functions + * @{ + */ +FL_ErrorStatus FL_WWDT_DeInit(WWDT_Type *WWDTx); +FL_ErrorStatus FL_WWDT_Init(WWDT_Type *WWDTx, FL_WWDT_InitTypeDef *WWDT_InitStruct); +void FL_WWDT_StructInit(FL_WWDT_InitTypeDef *WWDT_InitStruct); + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif /* __FM33LG0XX_FL_WWDT_H*/ + +/*************************Py_Code_Generator Version: 0.1-0.11-0.1 @ 2020-09-14*************************/ +/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/ diff --git a/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl.c b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl.c new file mode 100644 index 0000000..6ec7c90 --- /dev/null +++ b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl.c @@ -0,0 +1,188 @@ + /** + **************************************************************************************************** + * @file fm33lg0xx_fl.c + * @author FMSH Application Team + * @brief Source file of FL Driver Library + **************************************************************************************************** + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + + +/* Includes -------------------------------------------------------------------------------------------*/ +#include "fm33lg0xx_fl.h" + +/** @addtogroup FL_EF_DELAY + * @{ + */ + +/** + * @brief Initialize the timer(default is Systick) used as delay timer. + * @note The function is declared as __WEAK to be overwritten in case of other + * implementation in user file. + * @param None + * @retval None + */ +__WEAK void FL_DelayInit(void) +{ + SysTick->CTRL |= SysTick_CTRL_CLKSOURCE_Msk; + SysTick->CTRL |= SysTick_CTRL_ENABLE_Msk; +} + +/** + * @brief Provide block delay in microseconds. + * @note The function is declared as __WEAK to be overwritten in case of other + * implementation in user file. + * @param count specifies the delay count in microseconds. + * @retval None + */ +__WEAK void FL_DelayUs(uint32_t count) +{ + count = FL_DELAY_US * count; + count = count > 16777216 ? 16777216 : count; + SysTick->LOAD = count - 1; + SysTick->VAL = 0; + while(!((SysTick->CTRL >> 16) & 0x1)); +} + +/** + * @brief Provide blocking delay in milliseconds. + * @note The function is declared as __WEAK to be overwritten in case of other + * implementation in user file. + * @param count specifies the delay count in milliseconds. + * @retval None + */ +__WEAK void FL_DelayMs(uint32_t count) +{ + while(count--) + { + FL_DelayUs(1000); + } +} + +/** + * @brief Provide no-blocking delay initialization in microseconds. + * @note Should be follow By while(!FL_DelayEnd()){ ** user code ** } immediately. + The function is declared as __WEAK to be overwritten in case of other + * implementation in user file. + * @param count specifies the delay count in microseconds. + * @retval None + */ +__WEAK void FL_DelayUsStart(uint32_t count) +{ + count = FL_DELAY_US * count; + count = count > 16777216 ? 16777216 : count; + SysTick->LOAD = count - 1; + SysTick->VAL = 0; +} + +/** + * @brief Provide no-blocking delay initialization in milliseconds. + * @note Should be followed By while(!FL_DelayEnd()){ ** user code ** }. + * The function is declared as __WEAK to be overwritten in case of other + * implementation in user file. + * @param count specifies the delay count in milliseconds. + * @retval None + */ +__WEAK void FL_DelayMsStart(uint32_t count) +{ + FL_DelayUsStart(1000 * count); +} + +/** + * @brief Showing if the no-blocking delay has ended. + * @note Should be used with FL_DelayMs/UsStart() function. + The function is declared as __WEAK to be overwritten in case of other + * implementation in user file. + * @param count specifies the delay count in milliseconds. + * @retval true - delay has ended + * false - delay is in progress + */ +__WEAK bool FL_DelayEnd(void) +{ + return (((SysTick->CTRL >> 16) & 0x1) == 0x1); +} + +/** + *@} + */ + +/** @addtogroup FL_EF_DELAY + * @{ + */ + +void FL_Init(void) +{ + /* Init delay support function */ + FL_DelayInit(); +} + +/** + *@} + */ + +/** @addtogroup FL_EF_NVIC + * @{ + */ + +/** + * @brief Configure NVIC for specified Interrupt. + * @param configStruct NVIC configuration. + * @param irq Interrupt number. + * @retval None + */ +void FL_NVIC_Init(FL_NVIC_ConfigTypeDef *configStruct, IRQn_Type irq) +{ + /* Check parameter */ + if(configStruct->preemptPriority > 3) + { + configStruct->preemptPriority = 3; + } + NVIC_DisableIRQ(irq); + NVIC_SetPriority(irq, configStruct->preemptPriority); + NVIC_EnableIRQ(irq); +} + +/** + * @} + */ + +/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/ + + + diff --git a/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_adc.c b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_adc.c new file mode 100644 index 0000000..bc354a4 --- /dev/null +++ b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_adc.c @@ -0,0 +1,457 @@ + /** + **************************************************************************************************** + * @file fm33lg0xx_fl_adc.c + * @author FMSH Application Team + * @brief Src file of ADC FL Module + **************************************************************************************************** + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + + + +/* Includes ------------------------------------------------------------------*/ +#include "fm33lg0xx_fl.h" + +/** @addtogroup FM33LG0xx_FL_Driver + * @{ + */ + +/** @addtogroup ADC + * @{ + */ + +#ifdef FL_ADC_DRIVER_ENABLED + +/* Private macros ------------------------------------------------------------*/ +/** @addtogroup ADC_FL_Private_Macros + * @{ + */ + +#define IS_FL_ADC_INSTANCE(INSTANCE) ((INSTANCE) == ADC) + +#define IS_FL_ADC_CLK_SOURCE(__VALUE__) (((__VALUE__) == FL_CMU_ADC_CLK_SOURCE_RCLF)||\ + ((__VALUE__) == FL_CMU_ADC_CLK_SOURCE_RCHF)||\ + ((__VALUE__) == FL_CMU_ADC_CLK_SOURCE_XTHF)||\ + ((__VALUE__) == FL_CMU_ADC_CLK_SOURCE_PLL)||\ + ((__VALUE__) == FL_ADC_CLK_SOURCE_APBCLK)) + +#define IS_FL_ADC_CMUCLK_PRESCALER(__VALUE__) (((__VALUE__) == FL_ADC_CLK_PSC_DIV1)||\ + ((__VALUE__) == FL_ADC_CLK_PSC_DIV2)||\ + ((__VALUE__) == FL_ADC_CLK_PSC_DIV4)||\ + ((__VALUE__) == FL_ADC_CLK_PSC_DIV8)||\ + ((__VALUE__) == FL_ADC_CLK_PSC_DIV16)||\ + ((__VALUE__) == FL_ADC_CLK_PSC_DIV32)) + +#define IS_FL_ADC_APBCLK_PRESCALER(__VALUE__) (((__VALUE__) == FL_ADC_CLK_PSC_DIV1)||\ + ((__VALUE__) == FL_ADC_CLK_PSC_DIV2)||\ + ((__VALUE__) == FL_ADC_CLK_PSC_DIV4)||\ + ((__VALUE__) == FL_ADC_CLK_PSC_DIV8)) + +#define IS_FL_ADC_REFERENCE_SOURCE(__VALUE__) (((__VALUE__) == FL_ADC_REF_SOURCE_VDDA)||\ + ((__VALUE__) == FL_ADC_REF_SOURCE_VREFP)) + +#define IS_FL_ADC_BITWIDTH(__VALUE__) (((__VALUE__) == FL_ADC_BIT_WIDTH_12B)||\ + ((__VALUE__) == FL_ADC_BIT_WIDTH_10B)||\ + ((__VALUE__) == FL_ADC_BIT_WIDTH_8B)||\ + ((__VALUE__) == FL_ADC_BIT_WIDTH_6B)) + +#define IS_FL_ADC_CONTINUOUSCONVMODE(__VALUE__) (((__VALUE__) == FL_ADC_CONV_MODE_SINGLE)||\ + ((__VALUE__) == FL_ADC_CONV_MODE_CONTINUOUS)) + +#define IS_FL_ADC_AUTO_MODE(__VALUE__) (((__VALUE__) == FL_ADC_SINGLE_CONV_MODE_AUTO)||\ + ((__VALUE__) == FL_ADC_SINGLE_CONV_MODE_SEMIAUTO)) + + +#define IS_FL_ADC_SCANDIRECTION(__VALUE__) (((__VALUE__) == FL_ADC_SEQ_SCAN_DIR_FORWARD)||\ + ((__VALUE__) == FL_ADC_SEQ_SCAN_DIR_BACKWARD)) + + +#define IS_FL_ADC_EXTERNALTRIGCONV(__VALUE__) (((__VALUE__) == FL_ADC_TRIGGER_EDGE_NONE)||\ + ((__VALUE__) == FL_ADC_TRIGGER_EDGE_RISING)||\ + ((__VALUE__) == FL_ADC_TRIGGER_EDGE_FALLING)||\ + ((__VALUE__) == FL_ADC_TRIGGER_EDGE_BOTH)) + +#define IS_FL_ADC_EXTERNALTRIGSOURCE(__VALUE__) (((__VALUE__) == FL_ADC_TRGI_LUT0)||\ + ((__VALUE__) == FL_ADC_TRGI_LUT1)||\ + ((__VALUE__) == FL_ADC_TRGI_LUT2)||\ + ((__VALUE__) == FL_ADC_TRGI_ATIM)||\ + ((__VALUE__) == FL_ADC_TRGI_GPTIM1)||\ + ((__VALUE__) == FL_ADC_TRGI_GPTIM2)||\ + ((__VALUE__) == FL_ADC_TRGI_BSTIM16)||\ + ((__VALUE__) == FL_ADC_TRGI_LPTIM12)||\ + ((__VALUE__) == FL_ADC_TRGI_COMP1)||\ + ((__VALUE__) == FL_ADC_TRGI_COMP2)||\ + ((__VALUE__) == FL_ADC_TRGI_RTCA)||\ + ((__VALUE__) == FL_ADC_TRGI_LUT3)||\ + ((__VALUE__) == FL_ADC_TRGI_GPTIM0)||\ + ((__VALUE__) == FL_ADC_TRGI_COMP3)) + +#define IS_FL_ADC_CHANNEL_FAST_TIME(__VALUE__) (((__VALUE__) == FL_ADC_FAST_CH_SAMPLING_TIME_2_ADCCLK)||\ + ((__VALUE__) == FL_ADC_FAST_CH_SAMPLING_TIME_4_ADCCLK)||\ + ((__VALUE__) == FL_ADC_FAST_CH_SAMPLING_TIME_8_ADCCLK)||\ + ((__VALUE__) == FL_ADC_FAST_CH_SAMPLING_TIME_16_ADCCLK)||\ + ((__VALUE__) == FL_ADC_FAST_CH_SAMPLING_TIME_32_ADCCLK)||\ + ((__VALUE__) == FL_ADC_FAST_CH_SAMPLING_TIME_64_ADCCLK)||\ + ((__VALUE__) == FL_ADC_FAST_CH_SAMPLING_TIME_80_ADCCLK)||\ + ((__VALUE__) == FL_ADC_FAST_CH_SAMPLING_TIME_96_ADCCLK)||\ + ((__VALUE__) == FL_ADC_FAST_CH_SAMPLING_TIME_128_ADCCLK)||\ + ((__VALUE__) == FL_ADC_FAST_CH_SAMPLING_TIME_160_ADCCLK)||\ + ((__VALUE__) == FL_ADC_FAST_CH_SAMPLING_TIME_192_ADCCLK)||\ + ((__VALUE__) == FL_ADC_FAST_CH_SAMPLING_TIME_256_ADCCLK)||\ + ((__VALUE__) == FL_ADC_FAST_CH_SAMPLING_TIME_320_ADCCLK)||\ + ((__VALUE__) == FL_ADC_FAST_CH_SAMPLING_TIME_384_ADCCLK)||\ + ((__VALUE__) == FL_ADC_FAST_CH_SAMPLING_TIME_512_ADCCLK)) + +#define IS_FL_ADC_CHANNEL_SLOW_TIME(__VALUE__) (((__VALUE__) == FL_ADC_SLOW_CH_SAMPLING_TIME_2_ADCCLK)||\ + ((__VALUE__) == FL_ADC_SLOW_CH_SAMPLING_TIME_4_ADCCLK)||\ + ((__VALUE__) == FL_ADC_SLOW_CH_SAMPLING_TIME_8_ADCCLK)||\ + ((__VALUE__) == FL_ADC_SLOW_CH_SAMPLING_TIME_16_ADCCLK)||\ + ((__VALUE__) == FL_ADC_SLOW_CH_SAMPLING_TIME_32_ADCCLK)||\ + ((__VALUE__) == FL_ADC_SLOW_CH_SAMPLING_TIME_64_ADCCLK)||\ + ((__VALUE__) == FL_ADC_SLOW_CH_SAMPLING_TIME_80_ADCCLK)||\ + ((__VALUE__) == FL_ADC_SLOW_CH_SAMPLING_TIME_96_ADCCLK)||\ + ((__VALUE__) == FL_ADC_SLOW_CH_SAMPLING_TIME_128_ADCCLK)||\ + ((__VALUE__) == FL_ADC_SLOW_CH_SAMPLING_TIME_160_ADCCLK)||\ + ((__VALUE__) == FL_ADC_SLOW_CH_SAMPLING_TIME_192_ADCCLK)||\ + ((__VALUE__) == FL_ADC_SLOW_CH_SAMPLING_TIME_256_ADCCLK)||\ + ((__VALUE__) == FL_ADC_SLOW_CH_SAMPLING_TIME_320_ADCCLK)||\ + ((__VALUE__) == FL_ADC_SLOW_CH_SAMPLING_TIME_384_ADCCLK)||\ + ((__VALUE__) == FL_ADC_SLOW_CH_SAMPLING_TIME_512_ADCCLK)) + +#define IS_FL_ADC_OVERSAMPCOFIG(__VALUE__) (((__VALUE__) == FL_DISABLE)||\ + ((__VALUE__) == FL_ENABLE)) + +#define IS_FL_ADC_OVERSAMPINGRATIO(__VALUE__) (((__VALUE__) == FL_ADC_OVERSAMPLING_MUL_2X)||\ + ((__VALUE__) == FL_ADC_OVERSAMPLING_MUL_4X)||\ + ((__VALUE__) == FL_ADC_OVERSAMPLING_MUL_8X)||\ + ((__VALUE__) == FL_ADC_OVERSAMPLING_MUL_16X)||\ + ((__VALUE__) == FL_ADC_OVERSAMPLING_MUL_32X)||\ + ((__VALUE__) == FL_ADC_OVERSAMPLING_MUL_64X)||\ + ((__VALUE__) == FL_ADC_OVERSAMPLING_MUL_128X)||\ + ((__VALUE__) == FL_ADC_OVERSAMPLING_MUL_256X)) + +#define IS_FL_ADC_OVERSAMPINGSHIFT(__VALUE__) (((__VALUE__) == FL_ADC_OVERSAMPLING_SHIFT_0B)||\ + ((__VALUE__) == FL_ADC_OVERSAMPLING_SHIFT_1B)||\ + ((__VALUE__) == FL_ADC_OVERSAMPLING_SHIFT_2B)||\ + ((__VALUE__) == FL_ADC_OVERSAMPLING_SHIFT_3B)||\ + ((__VALUE__) == FL_ADC_OVERSAMPLING_SHIFT_4B)||\ + ((__VALUE__) == FL_ADC_OVERSAMPLING_SHIFT_5B)||\ + ((__VALUE__) == FL_ADC_OVERSAMPLING_SHIFT_6B)||\ + ((__VALUE__) == FL_ADC_OVERSAMPLING_SHIFT_7B)||\ + ((__VALUE__) == FL_ADC_OVERSAMPLING_SHIFT_8B)) + +#define ADC_CALIBRATIN_TIME_OUT (500000) + +/** + * @} + */ + +/* Exported functions --------------------------------------------------------*/ +/** @addtogroup ADC_FL_EF_Init + * @{ + */ + +/** + * @brief ADC外设寄存器值为复位值 + * @param 外设入口地址 + * @retval 返回错误状态，可能值： + * -FL_PASS 外设寄存器值恢复复位值 + * -FL_FAIL 未成功执行 + */ +FL_ErrorStatus FL_ADC_CommonDeInit(void) +{ + /* 关闭总线时钟 */ + FL_CMU_DisableGroup2BusClock(FL_CMU_GROUP2_BUSCLK_ADC); + /* 关闭操作时钟 */ + FL_CMU_DisableGroup3OperationClock(FL_CMU_GROUP3_OPCLK_ADC); + return FL_PASS; +} +/** + * @brief ADC共用寄存器设置以配置外设工作时钟 + * + * @note 其中FL_LPTIM_OPERATION_MODE_EXTERNAL_ASYN_PAUSE_CNT 模式需要外部脉冲提供给LPTIM模块作为工作时钟，此时 + * LPTIM完全工作在异步模式下。 + * @param LPTIM 外设入口地址 + * @param LPTIM_InitStruct指向FL_LPTIM_TimeInitTypeDef类的结构体，它包含指定LPTIM外设的配置信息 + * + * @retval ErrorStatus枚举值 + * -FL_FAIL 配置过程发生错误 + * -FL_PASS ADC配置成功 + */ +FL_ErrorStatus FL_ADC_CommonInit(FL_ADC_CommonInitTypeDef *ADC_CommonInitStruct) +{ + FL_ErrorStatus status = FL_PASS; + /* 入口参数检查 */ + assert_param(IS_FL_ADC_CLK_SOURCE(ADC_CommonInitStruct->clockSource)); + assert_param(IS_FL_ADC_REFERENCE_SOURCE(ADC_CommonInitStruct->referenceSource)); + assert_param(IS_FL_ADC_BITWIDTH(ADC_CommonInitStruct->bitWidth)); + if(ADC_CommonInitStruct->clockSource == FL_ADC_CLK_SOURCE_APBCLK) + { + assert_param(IS_FL_ADC_APBCLK_PRESCALER(ADC_CommonInitStruct->clockPrescaler)); + } + else + { + assert_param(IS_FL_ADC_CMUCLK_PRESCALER(ADC_CommonInitStruct->clockPrescaler)); + } + + /* 开启总线时钟 */ + FL_CMU_EnableGroup2BusClock(FL_CMU_GROUP2_BUSCLK_ADC); + /* 配置ADC时钟 */ + if(ADC_CommonInitStruct->clockSource == FL_ADC_CLK_SOURCE_APBCLK) + { + /* 设置ADC时钟来源于APBCLK */ + FL_ADC_SetClockSource(ADC, FL_ADC_CLK_SOURCE_APBCLK); + + /* 配置APBCLOCK时钟预分频 */ + FL_ADC_SetAPBPrescaler(ADC, ADC_CommonInitStruct->clockPrescaler << ADC_CFGR1_APBCLK_PSC_Pos); + } + else + { + /* 设置ADC时钟来源于ADCCLK */ + FL_ADC_SetClockSource(ADC, FL_ADC_CLK_SOURCE_ADCCLK); + + /* 设置ADCCLK时钟源 */ + FL_CMU_SetADCClockSource(ADC_CommonInitStruct->clockSource); + + /* 配置ADCCLK时钟预分频 */ + FL_CMU_SetADCPrescaler(ADC_CommonInitStruct->clockPrescaler << CMU_OPCCR2_ADCPRSC_Pos); + + /* 开启操作时钟 */ + FL_CMU_EnableGroup3OperationClock(FL_CMU_GROUP3_OPCLK_ADC); + } + /* 配置ADC基准电压*/ + FL_ADC_SetReferenceSource(ADC, ADC_CommonInitStruct->referenceSource); + /* 配置ADC输出位数*/ + FL_ADC_SetBitWidth(ADC, ADC_CommonInitStruct->bitWidth); + return status; +} +/** + * @brief 设置 ADC_CommonInitStruct 为默认配置 + * @param ADC_CommonInitStruct 指向需要将值设置为默认配置的结构体 @ref FL_ADC_CommonInitTypeDef 结构体 + * + * @retval None + */ +void FL_ADC_CommonStructInit(FL_ADC_CommonInitTypeDef *ADC_CommonInitStruct) +{ + /* 默认使用RCHF作为ADC时钟模块时钟源，预分频系数16 */ + ADC_CommonInitStruct->clockSource = FL_CMU_ADC_CLK_SOURCE_RCHF; + ADC_CommonInitStruct->clockPrescaler = FL_CMU_ADC_PSC_DIV16; + ADC_CommonInitStruct->referenceSource = FL_ADC_REF_SOURCE_VDDA; + ADC_CommonInitStruct->bitWidth = FL_ADC_BIT_WIDTH_12B; +} +/** + * @brief 恢复对应的ADC入口地址寄存器为默认值 + * + * @param ADCx 外设入口地址 + * + * @retval ErrorStatus枚举值 + * -FL_FAIL 配置过程发生错误 + * -FL_PASS ADC配置成功 + */ +FL_ErrorStatus FL_ADC_DeInit(ADC_Type *ADCx) +{ + FL_ErrorStatus status = FL_PASS; + /* 入口合法性检查 */ + assert_param(IS_FL_ADC_INSTANCE(ADCx)); + /* 外设复位使能 */ + FL_RMU_EnablePeripheralReset(RMU); + FL_RMU_EnableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_ADC); + FL_RMU_DisableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_ADC); + FL_RMU_EnableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_ADCCR); + FL_RMU_DisableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_ADCCR); + FL_RMU_DisablePeripheralReset(RMU); + return status; +} +/** + * @brief 初始化ADCx指定的入口地址的外设寄存器 + * + * @note 用户必须检查此函数的返回值，以确保自校准完成，否则转换结果精度无法保证，除此之外ADC使能过采样实际不会增加ADC的 + * 转换精度只会提高转换结果的稳定性（同时配置移位寄存器的情况下），同时过采样会降低转换速度。 + * @param ADCx 外设入口地址 + * @param ADC_InitStruct 指向一 @ref FL_ADC_InitTypeDef 结构体，它包含指定ADC外设的配置信息 + * + * @retval ErrorStatus枚举值 + * -FL_FAIL 配置过程发生错误 + * -FL_PASS ADC配置成功 + */ +FL_ErrorStatus FL_ADC_Init(ADC_Type *ADCx, FL_ADC_InitTypeDef *ADC_InitStruct) +{ + FL_ErrorStatus status = FL_PASS; + uint32_t i = 0,Calibration_Flag; + /* 入口合法性检查 */ + assert_param(IS_FL_ADC_INSTANCE(ADCx)); + assert_param(IS_FL_ADC_CONTINUOUSCONVMODE(ADC_InitStruct->conversionMode)); + assert_param(IS_FL_ADC_AUTO_MODE(ADC_InitStruct->autoMode)); + assert_param(IS_FL_ADC_SCANDIRECTION(ADC_InitStruct->scanDirection)); + assert_param(IS_FL_ADC_EXTERNALTRIGCONV(ADC_InitStruct->externalTrigConv)); + assert_param(IS_FL_ADC_OVERSAMPCOFIG(ADC_InitStruct->oversamplingMode)); + assert_param(IS_FL_ADC_OVERSAMPINGRATIO(ADC_InitStruct->overSampingMultiplier)); + assert_param(IS_FL_ADC_OVERSAMPINGSHIFT(ADC_InitStruct->oversamplingShift)); + FL_CMU_EnableGroup1BusClock(FL_CMU_GROUP1_BUSCLK_VREF1P2); + if(!FL_VREF_IsEnabled(VREF)) + { + FL_VREF_ClearFlag_Ready(VREF); + FL_VREF_Enable(VREF);//置位VREF_EN寄存器，使能VREF1p2模块 + } + FL_VREF_EnableTemperatureSensor(VREF);//置位PTAT_EN寄存器 + while(FL_VREF_IsActiveFlag_Ready(VREF) == 0) /* 等待VREF建立 */ + { + if(i >= 128000) + { + break; + } + i++; + } + FL_ADC_Disable(ADCx); + FL_ADC_DisableOverSampling(ADCx); + FL_ADC_Enable(ADCx); + FL_ADC_EnableCalibration(ADC); + + i = 0; + do + { + Calibration_Flag = FL_ADC_IsActiveFlag_EndOfCalibration(ADC); + i++; + }while((i != 0xFFFFFFFFU) && (Calibration_Flag == 0U)); //等待转换完成 + + if(Calibration_Flag == 0x01) + { + FL_ADC_ClearFlag_EndOfCalibration(ADC); + /* 关闭ADC，关闭后ADC自校准值依然保持 */ + FL_ADC_Disable(ADCx); + if(FL_ADC_IsEnabled(ADCx) == 0U) + { + /* 连续转换模式 */ + FL_ADC_SetConversionMode(ADCx, ADC_InitStruct->conversionMode); + /* 自动转换模式 */ + FL_ADC_SetSingleConversionAutoMode(ADCx, ADC_InitStruct->autoMode); + /* 通道等待使能 */ + if(ADC_InitStruct->waitMode) + { + FL_ADC_EnableWaitMode(ADCx); + } + else + { + FL_ADC_DisableWaitMode(ADCx); + } + /*数据冲突模式设置*/ + if(ADC_InitStruct->overrunMode) + { + FL_ADC_EnableOverrunMode(ADCx); + } + else + { + FL_ADC_DisableOverrunMode(ADCx); + } + /* 多通道扫描方向 */ + FL_ADC_SetSequenceScanDirection(ADCx, ADC_InitStruct->scanDirection); + /* 外部引脚触发 */ + FL_ADC_DisableExternalConversion(ADCx); + /* 触发模式 */ + FL_ADC_SetTriggerEdge(ADCx, ADC_InitStruct->externalTrigConv); + /* 触发源 */ + FL_ADC_SetTriggerSource(ADCx, ADC_InitStruct->triggerSource); + /*通道采样时间设置*/ + FL_ADC_SetFastChannelSamplingTime(ADCx, ADC_InitStruct->fastChannelTime); + FL_ADC_SetSlowChannelSamplingTime(ADCx, ADC_InitStruct->lowChannelTime); + if(ADC_InitStruct->oversamplingMode) + { + /*使能过采样倍数后，需要配置移位寄存器进行移位，这一过程是硬件自动完成的最终最大 + 可输出16位的结果值（即256被采样得到的结果是20bit的，右移4bit结果就是16bit的）*/ + FL_ADC_SetOverSamplingMultiplier(ADCx, ADC_InitStruct->overSampingMultiplier); + FL_ADC_SetOverSamplingShift(ADCx, ADC_InitStruct->oversamplingShift); + /* 过采样使能 */ + FL_ADC_EnableOverSampling(ADCx); + } + else + { + /* 关闭过采样 */ + FL_ADC_DisableOverSampling(ADCx); + } + } + else + { + status = FL_FAIL; + } + } + else + { + status = FL_FAIL; + } + return status; +} + +/** + * @brief 设置 ADC_InitStruct 为默认配置 + * @param ADC_InitStruct 指向需要将值设置为默认配置的结构体 @ref FL_ADC_InitTypeDef 结构体 + * + * @retval None + */ +void FL_ADC_StructInit(FL_ADC_InitTypeDef *ADC_InitStruct) +{ + ADC_InitStruct->conversionMode = FL_ADC_CONV_MODE_SINGLE; + ADC_InitStruct->autoMode = FL_ADC_SINGLE_CONV_MODE_AUTO; + ADC_InitStruct->scanDirection = FL_ADC_SEQ_SCAN_DIR_FORWARD; + ADC_InitStruct->externalTrigConv = FL_ADC_TRIGGER_EDGE_NONE; + ADC_InitStruct->overrunMode = FL_ENABLE; + ADC_InitStruct->waitMode = FL_ENABLE; + ADC_InitStruct->fastChannelTime = FL_ADC_FAST_CH_SAMPLING_TIME_2_ADCCLK; + ADC_InitStruct->lowChannelTime = FL_ADC_SLOW_CH_SAMPLING_TIME_512_ADCCLK; + ADC_InitStruct->oversamplingMode = FL_ENABLE; + ADC_InitStruct->overSampingMultiplier = FL_ADC_OVERSAMPLING_MUL_16X; + ADC_InitStruct->oversamplingShift = FL_ADC_OVERSAMPLING_SHIFT_4B; +} + +/** + * @} + */ + +#endif /* FL_ADC_DRIVER_ENABLED */ + +/** + * @} + */ + +/** + * @} + */ + +/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/ + + diff --git a/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_aes.c b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_aes.c new file mode 100644 index 0000000..47c3ffe --- /dev/null +++ b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_aes.c @@ -0,0 +1,180 @@ + /** + **************************************************************************************************** + * @file fm33lg0xx_fl_aes.c + * @author FMSH Application Team + * @brief Src file of AES FL Module + **************************************************************************************************** + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + +/* Includes ------------------------------------------------------------------*/ +#include "fm33lg0xx_fl.h" + +/** @addtogroup FM33LG0xx_FL_Driver + * @{ + */ + +/** @addtogroup AES + * @{ + */ + +#ifdef FL_AES_DRIVER_ENABLED + +/* Private macros ------------------------------------------------------------*/ +/** @addtogroup AES_FL_Private_Macros + * @{ + */ +#define IS_FL_AES_INSTANCE(INSTANCE) (((INSTANCE) == AES)) + +#define IS_FL_AES_KEYLENTH(__VALUE__) (((__VALUE__) == FL_AES_KEY_LENGTH_128B)||\ + ((__VALUE__) == FL_AES_KEY_LENGTH_192B)||\ + ((__VALUE__) == FL_AES_KEY_LENGTH_256B)) + +#define IS_FL_AES_CIPHERMODE(__VALUE__) (((__VALUE__) == FL_AES_CIPHER_ECB)||\ + ((__VALUE__) == FL_AES_CIPHER_CBC)||\ + ((__VALUE__) == FL_AES_CIPHER_CTR)||\ + ((__VALUE__) == FL_AES_CIPHER_MULTH)) + +#define IS_FL_AES_OPERATIONMODE(__VALUE__) (((__VALUE__) == FL_AES_OPERATION_MODE_ENCRYPTION)||\ + ((__VALUE__) == FL_AES_OPERATION_MODE_KEYDERIVATION)||\ + ((__VALUE__) == FL_AES_OPERATION_MODE_DECRYPTION)||\ + ((__VALUE__) == FL_AES_OPERATION_MODE_KEYDERIVATION_DECRYPTION)) + +#define IS_FL_AES_DATATYPE(__VALUE__) (((__VALUE__) == FL_AES_DATA_TYPE_32B)||\ + ((__VALUE__) == FL_AES_DATA_TYPE_16B)||\ + ((__VALUE__) == FL_AES_DATA_TYPE_8B)||\ + ((__VALUE__) == FL_AES_DATA_TYPE_1B)) +/** + *@} + */ + +/* Exported functions --------------------------------------------------------*/ +/** @addtogroup AES_FL_EF_Init + * @{ + */ + +/** + * @brief 复位AES 外设寄存器值为复位值 + * + * @param None + * + * @retval FL_ErrorStatus枚举值 + * -FL_PASS 配置成功 + * -FL_FAIL 配置过程发生错误 + */ +FL_ErrorStatus FL_AES_DeInit(void) +{ + /* 外设复位使能 */ + FL_RMU_EnablePeripheralReset(RMU); + /* 复位AES */ + FL_RMU_EnableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_AES); + FL_RMU_DisableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_AES); + /* 关闭总线时钟 */ + FL_CMU_DisableGroup2BusClock(FL_CMU_GROUP2_BUSCLK_AES); + /* 锁定外设复位功能 */ + FL_RMU_DisablePeripheralReset(RMU); + return FL_PASS; +} +/** + * @brief 根据 AES_InitStructer初始化对应外设入口地址的寄存器值. + * + * @param AESx 外设入口地址 + * @param AES_InitStructer 指向 @ref FL_AES_InitTypeDef 结构体的指针 + * + * @retval FL_ErrorStatus枚举值 + * -FL_PASS 配置成功 + * -FL_FAIL 配置过程发生错误 + */ +FL_ErrorStatus FL_AES_Init(AES_Type *AESx, FL_AES_InitTypeDef *AES_InitStructer) +{ + /* 入口合法性检查 */ + assert_param(IS_FL_AES_INSTANCE(AESx)); + assert_param(IS_FL_AES_KEYLENTH(AES_InitStructer->keyLength)); + assert_param(IS_FL_AES_CIPHERMODE(AES_InitStructer->cipherMode)); + assert_param(IS_FL_AES_OPERATIONMODE(AES_InitStructer->operationMode)); + assert_param(IS_FL_AES_DATATYPE(AES_InitStructer->dataType)); + if(FL_AES_IsEnabled(AESx) == 0) + { + /* 开启总线时钟 */ + FL_CMU_EnableGroup2BusClock(FL_CMU_GROUP2_BUSCLK_AES); + /* key长度 */ + FL_AES_SetKeySize(AESx, AES_InitStructer->keyLength); + /* 数据流处理模式 */ + FL_AES_SetCipherMode(AESx, AES_InitStructer->cipherMode); + /* 操作模式 */ + FL_AES_SetOperationMode(AESx, AES_InitStructer->operationMode); + /* 数据类型 */ + FL_AES_SetDataType(AESx, AES_InitStructer->dataType); + } + else + { + return FL_FAIL; + } + return FL_PASS; +} +/** + * @brief 设置 AES_InitStruct 为默认配置 + * + * @param AES_InitStruct 指向需要将值设置为默认配置的结构体 @ref FL_AES_InitTypeDef 结构体 + * + * @retval None + */ +void FL_AES_StructInit(FL_AES_InitTypeDef *AES_InitStructer) +{ + AES_InitStructer->keyLength = FL_AES_KEY_LENGTH_128B; + AES_InitStructer->cipherMode = FL_AES_CIPHER_ECB; + AES_InitStructer->operationMode = FL_AES_OPERATION_MODE_ENCRYPTION; + AES_InitStructer->dataType = FL_AES_DATA_TYPE_32B; +} + +/** + *@} + */ + +#endif /* FL_AES_DRIVER_ENABLED */ + +/** + *@} + */ + +/** + *@} + */ + +/*********************** (C) COPYRIGHT Fudan Microelectronics *****END OF FILE************************/ diff --git a/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_atim.c b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_atim.c new file mode 100644 index 0000000..5106a13 --- /dev/null +++ b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_atim.c @@ -0,0 +1,804 @@ + /** + ******************************************************************************************************* + * @file fm33lg0xx_fl_atim.c + * @author FMSH Application Team + * @brief Src file of ATIM FL Module + ******************************************************************************************************* + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ +/** + ******************************************************************************************************* + * @file fm33lg0xx_fl_atim.c + * @author FMSH Application Team + * @brief Src file of ATIM FL Module + ******************************************************************************************************* + * @attention + * + * Copyright (c) [2021] [Fudan Microelectronics] + * THIS SOFTWARE is licensed under Mulan PSL v2. + * You can use this software according to the terms and conditions of the Mulan PSL v2. + * You may obtain a copy of Mulan PSL v2 at: + * http://license.coscl.org.cn/MulanPSL2 + * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, + * EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, + * MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE. + * See the Mulan PSL v2 for more details. + * + ******************************************************************************************************* + */ +/* Includes ------------------------------------------------------------------*/ +#include "fm33lg0xx_fl.h" + +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @addtogroup ATIM + * @{ + */ + +#ifdef FL_ATIM_DRIVER_ENABLED + +/* Private macros ------------------------------------------------------------*/ +/** @addtogroup ATIM_FL_Private_Macros + * @{ + */ + + +#define IS_ATIM_INSTANCE(TIMx) ((TIMx) == ATIM) + +#define IS_ATIM_CLKSRC(__VALUE__) (((__VALUE__) == FL_CMU_ATIM_CLK_SOURCE_APBCLK) \ + || ((__VALUE__) == FL_CMU_ATIM_CLK_SOURCE_PLL_X2)) + + +#define IS_FL_ATIM_COUNTERMODE(__VALUE__) (((__VALUE__) == FL_ATIM_COUNTER_DIR_UP) \ + || ((__VALUE__) == FL_ATIM_COUNTER_DIR_DOWN) \ + || ((__VALUE__) == FL_ATIM_COUNTER_ALIGNED_CENTER_DOWN ) \ + || ((__VALUE__) == FL_ATIM_COUNTER_ALIGNED_CENTER_UP ) \ + || ((__VALUE__) == FL_ATIM_COUNTER_ALIGNED_CENTER_UP_DOWN)) + +#define IS_FL_ATIM_CLOCKDIVISION(__VALUE__) (((__VALUE__) == FL_ATIM_CLK_DIVISION_DIV1) \ + || ((__VALUE__) == FL_ATIM_CLK_DIVISION_DIV2) \ + || ((__VALUE__) == FL_ATIM_CLK_DIVISION_DIV4)) + + +#define IS_FL_ATIM_CC_MODE(__VALUE__) (((__VALUE__) == FL_ATIM_CHANNEL_MODE_OUTPUT) \ + || ((__VALUE__) == FL_ATIM_CHANNEL_MODE_INPUT_NORMAL) \ + || ((__VALUE__) == FL_ATIM_CHANNEL_MODE_INPUT_CROSSOVER) \ + || ((__VALUE__) == FL_ATIM_CHANNEL_MODE_INPUT_TRC)) + +#define IS_FL_ATIM_IC_FILTER(__VALUE__) (((__VALUE__) == FL_ATIM_IC_FILTER_DIV1 ) \ + || ((__VALUE__) ==FL_ATIM_IC_FILTER_DIV1_N2) \ + || ((__VALUE__) == FL_ATIM_IC_FILTER_DIV1_N4) \ + || ((__VALUE__) == FL_ATIM_IC_FILTER_DIV1_N8) \ + || ((__VALUE__) == FL_ATIM_IC_FILTER_DIV2_N6) \ + || ((__VALUE__) == FL_ATIM_IC_FILTER_DIV2_N8) \ + || ((__VALUE__) == FL_ATIM_IC_FILTER_DIV4_N6) \ + || ((__VALUE__) == FL_ATIM_IC_FILTER_DIV4_N8) \ + || ((__VALUE__) == FL_ATIM_IC_FILTER_DIV8_N6) \ + || ((__VALUE__) == FL_ATIM_IC_FILTER_DIV8_N8) \ + || ((__VALUE__) == FL_ATIM_IC_FILTER_DIV16_N5) \ + || ((__VALUE__) == FL_ATIM_IC_FILTER_DIV16_N6) \ + || ((__VALUE__) == FL_ATIM_IC_FILTER_DIV16_N8) \ + || ((__VALUE__) == FL_ATIM_IC_FILTER_DIV32_N5) \ + || ((__VALUE__) == FL_ATIM_IC_FILTER_DIV32_N6) \ + || ((__VALUE__) == FL_ATIM_IC_FILTER_DIV32_N8)) + +#define IS_FL_ATIM_CHANNEL(__VALUE__) (((__VALUE__) == FL_ATIM_CHANNEL_1)\ + || ((__VALUE__) == FL_ATIM_CHANNEL_2)\ + || ((__VALUE__) == FL_ATIM_CHANNEL_3)\ + || ((__VALUE__) == FL_ATIM_CHANNEL_4)) + + + +#define IS_FL_ATIM_SLAVE_MODE(__VALUE__) (((__VALUE__) == FL_ATIM_SLAVE_MODE_PROHIBITED)\ + || ((__VALUE__) == FL_ATIM_SLAVE_MODE_ENCODER_X2_TI1)\ + || ((__VALUE__) == FL_ATIM_SLAVE_MODE_ENCODER_X2_TI2)\ + || ((__VALUE__) == FL_ATIM_SLAVE_MODE_ENCODER_X4_TI1TI2)\ + || ((__VALUE__) == FL_ATIM_SLAVE_MODE_TRGI_RISE_RST)\ + || ((__VALUE__) == FL_ATIM_SLAVE_MODE_TRGI_HIGH_RUN)\ + || ((__VALUE__) == FL_ATIM_SLAVE_MODE_TRGI_RISE_RUN)\ + || ((__VALUE__) == FL_ATIM_SLAVE_MODE_TRGI_CLK)) + + +#define IS_FL_ATIM_TRIGGER_SRC(__VALUE__) (((__VALUE__) == FL_ATIM_TRGI_ITR0 )\ + ||((__VALUE__) ==FL_ATIM_TRGI_ITR1 )\ + ||((__VALUE__) ==FL_ATIM_TRGI_ITR2)\ + ||((__VALUE__) ==FL_ATIM_TRGI_ITR3)\ + ||((__VALUE__) ==FL_ATIM_TRGI_TI1F_EDGE)\ + ||((__VALUE__) ==FL_ATIM_TRGI_TI1FP1)\ + ||((__VALUE__) ==FL_ATIM_TRGI_TI2FP2)\ + ||((__VALUE__) ==FL_ATIM_TRGI_ETRF)) + + + +#define IS_FL_ATIM_ETP_FILTER(__VALUE__) (((__VALUE__) == FL_ATIM_ETR_FILTER_DIV1) \ + || ((__VALUE__) == FL_ATIM_ETR_FILTER_DIV1_N2) \ + || ((__VALUE__) == FL_ATIM_ETR_FILTER_DIV1_N4) \ + || ((__VALUE__) == FL_ATIM_ETR_FILTER_DIV1_N8) \ + || ((__VALUE__) == FL_ATIM_ETR_FILTER_DIV2_N6) \ + || ((__VALUE__) == FL_ATIM_ETR_FILTER_DIV2_N8) \ + || ((__VALUE__) == FL_ATIM_ETR_FILTER_DIV4_N6) \ + || ((__VALUE__) == FL_ATIM_ETR_FILTER_DIV4_N8) \ + || ((__VALUE__) == FL_ATIM_ETR_FILTER_DIV8_N6) \ + || ((__VALUE__) == FL_ATIM_ETR_FILTER_DIV8_N8) \ + || ((__VALUE__) == FL_ATIM_ETR_FILTER_DIV16_N5) \ + || ((__VALUE__) == FL_ATIM_ETR_FILTER_DIV16_N6) \ + || ((__VALUE__) == FL_ATIM_ETR_FILTER_DIV16_N8) \ + || ((__VALUE__) == FL_ATIM_ETR_FILTER_DIV32_N5) \ + || ((__VALUE__) == FL_ATIM_ETR_FILTER_DIV32_N6) \ + || ((__VALUE__) == FL_ATIM_ETR_FILTER_DIV32_N8)) + + +#define IS_FL_ATIM_ETR_PSC(__VALUE__) (((__VALUE__) == FL_ATIM_ETR_PSC_DIV1) \ + || ((__VALUE__) == FL_ATIM_ETR_PSC_DIV2) \ + || ((__VALUE__) == FL_ATIM_ETR_PSC_DIV4) \ + || ((__VALUE__) == FL_ATIM_ETR_PSC_DIV8)) + + + +#define IS_FL_ATIM_ETR_POLARITY(__VALUE__) (((__VALUE__) == FL_ATIM_ETR_POLARITY_NORMAL) \ + || ((__VALUE__) == FL_ATIM_ETR_POLARITY_INVERT)) + + + +#define IS_FL_ATIM_IC_POLARITY(__VALUE__) (((__VALUE__) == FL_ATIM_IC_POLARITY_NORMAL) \ + || ((__VALUE__) == FL_ATIM_IC_POLARITY_INVERT)) + + + +#define IS_FL_ATIM_IC_ACTIVEINPUT(__VALUE__) (((__VALUE__) == FL_ATIM_CHANNEL_MODE_INPUT_NORMAL) \ + || ((__VALUE__) == FL_ATIM_CHANNEL_MODE_INPUT_CROSSOVER) \ + || ((__VALUE__) == FL_ATIM_CHANNEL_MODE_INPUT_TRC)) + + +#define IS_FL_ATIM_IC_PRESCALER(__VALUE__) (((__VALUE__) == FL_ATIM_IC_PSC_DIV1) \ + || ((__VALUE__) == FL_ATIM_IC_PSC_DIV2) \ + || ((__VALUE__) == FL_ATIM_IC_PSC_DIV4) \ + || ((__VALUE__) == FL_ATIM_IC_PSC_DIV8)) + + + +#define IS_FL_ATIM_OC_POLARITY(__VALUE__) (((__VALUE__) == FL_ATIM_OC_POLARITY_NORMAL) \ + || ((__VALUE__) == FL_ATIM_OC_POLARITY_INVERT)) + + + +#define IS_FL_ATIM_OC_MODE(__VALUE__) (((__VALUE__) == FL_ATIM_OC_MODE_FROZEN) \ + || ((__VALUE__) == FL_ATIM_OC_MODE_ACTIVE) \ + || ((__VALUE__) == FL_ATIM_OC_MODE_INACTIVE) \ + || ((__VALUE__) == FL_ATIM_OC_MODE_TOGGLE) \ + || ((__VALUE__) == FL_ATIM_OC_MODE_FORCED_INACTIVE) \ + || ((__VALUE__) == FL_ATIM_OC_MODE_FORCED_ACTIVE) \ + || ((__VALUE__) == FL_ATIM_OC_MODE_PWM1) \ + || ((__VALUE__) == FL_ATIM_OC_MODE_PWM2)) + +#define IS_FL_ATIM_AUTORELOAB_STATE(__VALUE__) (((__VALUE__) == FL_ENABLE) \ + || ((__VALUE__) == FL_DISABLE)) + +#define IS_FL_ATIM_OC_FASTMODE(__VALUE__) (((__VALUE__) == FL_ENABLE) \ + || ((__VALUE__) == FL_DISABLE)) + +#define IS_FL_ATIM_OC_PRELOAD(__VALUE__) (((__VALUE__) == FL_ENABLE) \ + || ((__VALUE__) == FL_DISABLE)) + +#define IS_FL_ATIM_OC_ETR_CLEARN(__VALUE__) (((__VALUE__) == FL_ENABLE) \ + || ((__VALUE__) == FL_DISABLE)) + +#define IS_FL_ATIM_OCN_STATE(__VALUE__) (((__VALUE__) == FL_ENABLE)\ + || ((__VALUE__) == FL_DISABLE)) + +#define IS_FL_ATIM_OC_STATE(__VALUE__) (((__VALUE__) == FL_ENABLE)\ + || ((__VALUE__) == FL_DISABLE)) + +#define IS_FL_ATIM_OC_IDLESTATE(__VALUE__) (((__VALUE__) == FL_ATIM_OC_IDLE_STATE_LOW) \ + || ((__VALUE__) == FL_ATIM_OC_IDLE_STATE_HIGH)) + +#define IS_FL_ATIM_OC_NIDLESTATE(__VALUE__) (((__VALUE__) == FL_ATIM_OCN_IDLE_STATE_LOW) \ + || ((__VALUE__) == FL_ATIM_OCN_IDLE_STATE_HIGH)) + + +#define IS_FL_ATIM_OC_NPOLARITY(__VALUE__) (((__VALUE__) == FL_ATIM_OCN_POLARITY_NORMAL) \ + || ((__VALUE__) == FL_ATIM_OCN_POLARITY_INVERT)) + + + +#define IS_FL_ATIM_BDTR_FILTER(__VALUE__) (((__VALUE__) == FL_ATIM_BREAK_FILTER_DIV1) \ + || ((__VALUE__) == FL_ATIM_BREAK_FILTER_DIV1_N2) \ + || ((__VALUE__) == FL_ATIM_BREAK_FILTER_DIV1_N4) \ + || ((__VALUE__) == FL_ATIM_BREAK_FILTER_DIV1_N8) \ + || ((__VALUE__) == FL_ATIM_BREAK_FILTER_DIV2_N6) \ + || ((__VALUE__) == FL_ATIM_BREAK_FILTER_DIV2_N8) \ + || ((__VALUE__) == FL_ATIM_BREAK_FILTER_DIV4_N6) \ + || ((__VALUE__) == FL_ATIM_BREAK_FILTER_DIV4_N8) \ + || ((__VALUE__) == FL_ATIM_BREAK_FILTER_DIV8_N6) \ + || ((__VALUE__) == FL_ATIM_BREAK_FILTER_DIV8_N8) \ + || ((__VALUE__) == FL_ATIM_BREAK_FILTER_DIV16_N5) \ + || ((__VALUE__) == FL_ATIM_BREAK_FILTER_DIV16_N6) \ + || ((__VALUE__) == FL_ATIM_BREAK_FILTER_DIV16_N8) \ + || ((__VALUE__) == FL_ATIM_BREAK_FILTER_DIV32_N5) \ + || ((__VALUE__) == FL_ATIM_BREAK_FILTER_DIV32_N6) \ + || ((__VALUE__) == FL_ATIM_BREAK_FILTER_DIV32_N8)) + +#define IS_FL_ATIM_OSSR_STATE(__VALUE__) (((__VALUE__) == FL_ATIM_OSSR_DISABLE) \ + || ((__VALUE__) == FL_ATIM_OSSR_ENABLE)) + +#define IS_FL_ATIM_OSSI_STATE(__VALUE__) (((__VALUE__) == FL_ATIM_OSSI_DISABLE) \ + || ((__VALUE__) == FL_ATIM_OSSI_ENABLE)) + +#define IS_FL_ATIM_LOCK_LEVEL(__VALUE__) (((__VALUE__) == FL_ATIM_LOCK_LEVEL_OFF) \ + || ((__VALUE__) == FL_ATIM_LOCK_LEVEL_1) \ + || ((__VALUE__) == FL_ATIM_LOCK_LEVEL_2) \ + || ((__VALUE__) == FL_ATIM_LOCK_LEVEL_3)) + +#define IS_FL_ATIM_BREAK_POLARITY(__VALUE__) (((__VALUE__) == FL_ATIM_BREAK_POLARITY_LOW) \ + || ((__VALUE__) == FL_ATIM_BREAK_POLARITY_HIGH)) + +#define IS_FL_ATIM_AUTOMATIC_OUTPUT_STATE(__VALUE__) (((__VALUE__) == FL_DISABLE) \ + || ((__VALUE__) == FL_ENABLE)) + +#define IS_FL_ATIM_TRIGGER_DELAY(__VALUE__) (((__VALUE__) == FL_DISABLE) \ + || ((__VALUE__) == FL_ENABLE)) + +#define IS_FL_ATIM_IC_CAPTURE_STATE(__VALUE__) (((__VALUE__) == FL_DISABLE) \ + || ((__VALUE__) == FL_ENABLE)) + +/** + * @} + */ + +/* Private function prototypes -----------------------------------------------*/ +/** @defgroup TIM_FL_Private_Functions TIM Private Functions + * @{ + */ +static FL_ErrorStatus OCConfig(ATIM_Type *TIMx, uint32_t Channel, FL_ATIM_OC_InitTypeDef *TIM_OC_InitStruct); +/** + * @} + */ + +/* Exported functions --------------------------------------------------------*/ +/** @addtogroup TIM_FL_EF_Init + * @{ + */ + +/** + * @brief 复位对应ATIMx寄存器. + * @param ATIMx + * @retval ErrorStatus枚举值: + * -FL_PASS 外设寄存器值恢复复位值 + * -FL_FAIL 未成功执行 + */ +FL_ErrorStatus FL_ATIM_DeInit(ATIM_Type *TIMx) +{ + FL_ErrorStatus result = FL_PASS; + /* Check the parameters */ + assert_param(IS_ATIM_INSTANCE(TIMx)); + /* 使能外设复位 */ + FL_RMU_EnablePeripheralReset(RMU); + /* 复位ATIM外设寄存器 */ + FL_RMU_EnableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_ATIM); + FL_RMU_DisableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_ATIM); + /* 关闭外设总线始时钟和工作时钟 */ + FL_CMU_DisableGroup4BusClock(FL_CMU_GROUP4_BUSCLK_ATIM); + FL_CMU_DisableGroup3OperationClock(FL_CMU_GROUP3_OPCLK_ATIM); + /* 锁定外设复位 */ + FL_RMU_DisablePeripheralReset(RMU); + return result; +} +/** + * @brief 配置基本定时器时基单元（内部时钟源）. + * @param TIMx Timer Instance + * @param TIM_InitStruct 指向一个 @ref FL_ATIM_InitTypeDef(时基配置结构体) + * @retval ErrorStatus枚举值 + * -FL_FAIL 配置过程发生错误 + * -FL_PASS 成功 + */ + +FL_ErrorStatus FL_ATIM_Init(ATIM_Type *TIMx, FL_ATIM_InitTypeDef *TIM_InitStruct) +{ + uint32_t i = 5; + /* 参数检查 */ + assert_param(IS_ATIM_INSTANCE(TIMx)); + assert_param(IS_FL_ATIM_COUNTERMODE(TIM_InitStruct->counterMode)); + assert_param(IS_FL_ATIM_CLOCKDIVISION(TIM_InitStruct->clockDivision)); + assert_param(IS_FL_ATIM_AUTORELOAB_STATE(TIM_InitStruct->autoReloadState)); + assert_param(IS_ATIM_CLKSRC(TIM_InitStruct->clockSource)); + /* 时钟总线使能配置 */ + FL_CMU_SetATIMClockSource(TIM_InitStruct->clockSource); + FL_CMU_EnableGroup4BusClock(FL_CMU_GROUP4_BUSCLK_ATIM); + FL_CMU_EnableGroup3OperationClock(FL_CMU_GROUP3_OPCLK_ATIM); + /* 设置重复计数值 */ + FL_ATIM_WriteRepetitionCounter(TIMx, TIM_InitStruct->repetitionCounter); + /* 计数器计数模式配置 */ + switch(TIM_InitStruct->counterMode) + { + /* 中心对称模式 */ + case FL_ATIM_COUNTER_ALIGNED_CENTER_DOWN : + case FL_ATIM_COUNTER_ALIGNED_CENTER_UP : + case FL_ATIM_COUNTER_ALIGNED_CENTER_UP_DOWN: + FL_ATIM_SetCounterDirection(TIMx,FL_ATIM_COUNTER_DIR_UP); + FL_ATIM_SetCounterAlignedMode(TIMx, TIM_InitStruct->counterMode); + break; + default: + /* 边沿模式 */ + FL_ATIM_SetCounterDirection(TIMx, TIM_InitStruct->counterMode); + FL_ATIM_SetCounterAlignedMode(TIMx, FL_ATIM_COUNTER_ALIGNED_EDGE); + break; + } + /* 自动重装载值 */ + FL_ATIM_WriteAutoReload(TIMx, TIM_InitStruct->autoReload); + /* 定时器分频系数与数字滤波器所使用的采样时钟分频比 */ + FL_ATIM_SetClockDivision(TIMx, TIM_InitStruct->clockDivision); + /* 时钟分频 */ + FL_ATIM_WritePrescaler(TIMx, TIM_InitStruct->prescaler); + /* 预装载配置 */ + if(TIM_InitStruct->autoReloadState == FL_ENABLE) + { + FL_ATIM_EnableARRPreload(TIMx); + } + else + { + FL_ATIM_DisableARRPreload(TIMx); + } + /* 手动触发更新事件，将配置值写入 */ + FL_ATIM_GenerateUpdateEvent(TIMx); + while((!FL_ATIM_IsActiveFlag_Update(ATIM))&&i) + { + i--; + } + /*清除UIF标志，防止产生UG事件中断*/ + FL_ATIM_ClearFlag_Update(ATIM); + return FL_PASS; +} + +/** + * @brief 设置 FL_ATIM_InitTypeDef 为默认配置 + * @param TIM_InitStruct 指向需要将值设置为默认配置的结构体 @ref FL_ATIM_InitTypeDef 结构体 + * + * @retval None + */ +void FL_ATIM_StructInit(FL_ATIM_InitTypeDef *TIM_InitStruct) +{ + /* Set the default configuration */ + TIM_InitStruct->clockSource = FL_CMU_ATIM_CLK_SOURCE_APBCLK; + TIM_InitStruct->prescaler = (uint16_t)0x0000; + TIM_InitStruct->counterMode = FL_ATIM_COUNTER_DIR_UP; + TIM_InitStruct->autoReload = 0xFFFFU; + TIM_InitStruct->clockDivision = FL_ATIM_CLK_DIVISION_DIV1; + TIM_InitStruct->repetitionCounter = 0; + TIM_InitStruct->autoReloadState = FL_DISABLE; +} + +/** + * @brief 配置基本定时器从模式，包括编码器模式. + * @param TIMx Timer Instance + * @param TIM_InitStruct 指向一个 @ref FL_ATIM_SlaveInitTypeDef 结构体 + * @retval ErrorStatus枚举值 + * -FL_FAIL 配置过程发生错误 + * -FL_PASS 成功 + */ +FL_ErrorStatus FL_ATIM_SlaveMode_Init(ATIM_Type *TIMx, FL_ATIM_SlaveInitTypeDef *TIM_InitStruct) +{ + /* 参数检查 */ + assert_param(IS_ATIM_INSTANCE(TIMx)); + assert_param(IS_FL_ATIM_TRIGGER_DELAY(TIM_InitStruct->triggerDelay)); + assert_param(IS_FL_ATIM_TRIGGER_SRC(TIM_InitStruct->triggerSrc)); + assert_param(IS_FL_ATIM_SLAVE_MODE(TIM_InitStruct->slaveMode)); + /* 时钟总线使能配置 */ + FL_CMU_EnableGroup4BusClock(FL_CMU_GROUP4_BUSCLK_ATIM); + FL_CMU_EnableGroup3OperationClock(FL_CMU_GROUP3_OPCLK_ATIM); + /* 触发延迟默认关闭 */ + FL_ATIM_DisableMasterSlaveMode(TIMx); + /* 关闭从模式以能写入TS */ + FL_ATIM_SetSlaveMode(TIMx, 0); + /* 从模式输入源选择 */ + FL_ATIM_SetTriggerInput(TIMx, TIM_InitStruct->triggerSrc); + /* 从模式选择 */ + FL_ATIM_SetSlaveMode(TIMx, TIM_InitStruct->slaveMode); + /* 触发延迟默认关闭 */ + if(TIM_InitStruct->triggerDelay == FL_ENABLE) + { + FL_ATIM_EnableMasterSlaveMode(TIMx); + } + return FL_PASS; +} +/** + * @brief 设置 FL_ATIM_SlaveInitTypeDef 为默认配置 + * @param TIM_InitStruct 指向需要将值设置为默认配置的结构体 @ref FL_ATIM_SlaveInitTypeDef 结构体 + * + * @retval None + */ +void FL_ATIM_SlaveModeStructInit(FL_ATIM_SlaveInitTypeDef *TIM_InitStruct) +{ + TIM_InitStruct->slaveMode = FL_ATIM_SLAVE_MODE_PROHIBITED; + TIM_InitStruct->triggerSrc = FL_ATIM_TRGI_TI1FP1; + TIM_InitStruct->triggerDelay = FL_DISABLE; +} + +/** + * @brief 配置TIM的输入捕获通道. + * @param TIMx Timer Instance + * @param Channel This parameter can be one of the following values: + * @arg @ref FL_ATIM_CHANNEL_0 + * @arg @ref FL_ATIM_CHANNEL_1 + * @arg @ref FL_ATIM_CHANNEL_2 + * @arg @ref FL_ATIM_CHANNEL_3 + * @param TIM_IC_InitStruct 指向一个 @ref FL_ATIM_IC_InitTypeDef 结构体 + * @retval TIM_OC_InitStruct pointer to a @ref FL_ATIM_OC_InitTypeDef structure + * -FL_FAIL 配置过程发生错误 + * -FL_PASS 成功 + */ +FL_ErrorStatus FL_ATIM_IC_Init(ATIM_Type *TIMx, uint32_t channel, FL_ATIM_IC_InitTypeDef *IC_InitStruct) +{ + /* 参数检查 */ + assert_param(IS_FL_ATIM_CHANNEL(channel)); + assert_param(IS_FL_ATIM_IC_CAPTURE_STATE(IC_InitStruct->captureState)); + assert_param(IS_FL_ATIM_IC_POLARITY(IC_InitStruct->ICPolarity)); + assert_param(IS_FL_ATIM_IC_ACTIVEINPUT(IC_InitStruct->ICActiveInput)); + assert_param(IS_FL_ATIM_IC_PRESCALER(IC_InitStruct->ICPrescaler)); + assert_param(IS_FL_ATIM_IC_FILTER(IC_InitStruct->ICFilter)); + /* 时钟总线使能配置 */ + FL_CMU_EnableGroup4BusClock(FL_CMU_GROUP4_BUSCLK_ATIM); + FL_CMU_EnableGroup3OperationClock(FL_CMU_GROUP3_OPCLK_ATIM); + /* 通道关闭 */ + FL_ATIM_OC_DisableChannel(TIMx, channel); + /*捕获极性 */ + FL_ATIM_IC_SetChannelPolarity(TIMx, IC_InitStruct->ICPolarity, channel); + /* 捕获映射通道 */ + FL_ATIM_CC_SetChannelMode(TIMx, IC_InitStruct->ICActiveInput, channel); + /* 捕获预分频 */ + FL_ATIM_IC_SetPrescaler(TIMx, IC_InitStruct->ICPrescaler, channel); + /* 捕获滤波器 */ + FL_ATIM_IC_SetFilter(TIMx, IC_InitStruct->ICFilter, channel); + if(IC_InitStruct->captureState == FL_ENABLE) + { + FL_ATIM_IC_EnableChannel(TIMx, channel); + } + return FL_PASS; +} +/** + * @brief 设置 FL_ATIM_IC_InitTypeDef 为默认配置 + * @param TIM_ICInitStruct 指向需要将值设置为默认配置的结构体 @ref FL_ATIM_IC_InitTypeDef 结构体 + * + * @retval None + */ +void FL_ATIM_IC_StructInit(FL_ATIM_IC_InitTypeDef *TIM_ICInitStruct) +{ + /* 默认配置 */ + TIM_ICInitStruct->ICPolarity = FL_ATIM_IC_POLARITY_NORMAL; + TIM_ICInitStruct->ICActiveInput = FL_ATIM_CHANNEL_MODE_INPUT_NORMAL; + TIM_ICInitStruct->ICPrescaler = FL_ATIM_IC_PSC_DIV1; + TIM_ICInitStruct->ICFilter = FL_ATIM_IC_FILTER_DIV1; + TIM_ICInitStruct->captureState = FL_DISABLE; +} +/** + * @brief 配置TIM触发输入捕获通道ETR. + * @param TIMx Timer Instance + * @param ETPolarity 极性 + * @param ETPrescaler 分频 + * @param ETR_Filter 滤波 + * @param TIM_IC_InitStruct 指向一个 @ref FL_ATIM_IC_InitTypeDef 结构体 + * @retval TIM_OC_InitStruct pointer to a @ref FL_ATIM_OC_InitTypeDef structure + * -FL_FAIL 配置过程发生错误 + * -FL_PASS 成功 + */ +FL_ErrorStatus FL_ATIM_ETR_Init(ATIM_Type *TIMx, FL_ATIM_ETR_InitTypeDef *TIM_InitStruct) +{ + assert_param(IS_FL_ATIM_ETP_FILTER(TIM_InitStruct->ETRFilter)); + assert_param(IS_FL_ATIM_ETR_PSC(TIM_InitStruct->ETRClockDivision)); + assert_param(IS_FL_ATIM_ETR_POLARITY(TIM_InitStruct->ETRPolarity)); + /* 时钟总线使能配置 */ + FL_CMU_EnableGroup4BusClock(FL_CMU_GROUP4_BUSCLK_ATIM); + FL_CMU_EnableGroup3OperationClock(FL_CMU_GROUP3_OPCLK_ATIM); + /* 外部时钟极性 */ + FL_ATIM_SetETRPolarity(TIMx, TIM_InitStruct->ETRPolarity); + /* 外部时钟滤波 */ + FL_ATIM_SetETRFilter(TIMx, TIM_InitStruct->ETRFilter); + /* 外部时钟分频 */ + FL_ATIM_SetETRPrescaler(TIMx, TIM_InitStruct->ETRClockDivision); + if(TIM_InitStruct->useExternalTrigger == FL_ENABLE) + { + FL_ATIM_EnableExternalClock(TIMx); + } + else + { + FL_ATIM_DisableExternalClock(TIMx); + } + return FL_PASS; +} + +void FL_ATIM_ETRStructInit(FL_ATIM_ETR_InitTypeDef *TIM_InitStruct) +{ + TIM_InitStruct->useExternalTrigger = FL_DISABLE; + TIM_InitStruct->ETRFilter = FL_ATIM_ETR_FILTER_DIV1; + TIM_InitStruct->ETRPolarity = FL_ATIM_ETR_POLARITY_NORMAL; + TIM_InitStruct->ETRClockDivision = FL_ATIM_ETR_PSC_DIV1; +} +/** + * @brief 配置 + * @param TIMx Timer Instance + * @param Channel This parameter can be one of the following values: + * @arg @ref FL_ATIM_CHANNEL_1 + * @arg @ref FL_ATIM_CHANNEL_2 + * @arg @ref FL_ATIM_CHANNEL_3 + * @arg @ref FL_ATIM_CHANNEL_4 + * @param TIM_ICInitStruct 指向需要将值设置为默认配置的结构体 @ref FL_ATIM_IC_InitTypeDef 结构体包含配置参数. + * @retval None + * -FL_FAIL 配置过程发生错误 + * -FL_PASS 成功 + */ +static FL_ErrorStatus OCConfig(ATIM_Type *TIMx, uint32_t channel, FL_ATIM_OC_InitTypeDef *TIM_OC_InitStruct) +{ + FL_ErrorStatus result = FL_PASS; + /* 配置比较输出通道模式 */ + FL_ATIM_OC_SetMode(TIMx, TIM_OC_InitStruct->OCMode, channel); + /* 配置TRF清零使能 */ + if(TIM_OC_InitStruct->OCETRFStatus == FL_ENABLE) + { + FL_ATIM_OC_EnableClear(TIMx, channel); + } + else + { + FL_ATIM_OC_DisableClear(TIMx, channel); + } + /* 比较输出通道快速模式 */ + if(TIM_OC_InitStruct->OCFastMode == FL_ENABLE) + { + FL_ATIM_OC_EnableFastMode(TIMx, channel); + } + else + { + FL_ATIM_OC_DisableFastMode(TIMx, channel); + } + /* 比较输出通道缓冲模式 */ + if(TIM_OC_InitStruct->OCPreload == FL_ENABLE) + { + FL_ATIM_OC_EnablePreload(TIMx, channel); + } + else + { + FL_ATIM_OC_DisablePreload(TIMx, channel); + } + if(TIM_OC_InitStruct->OCNState == FL_ENABLE) + { + FL_ATIM_OC_EnableReverseChannel(TIMx, channel); + } + else + { + FL_ATIM_OC_DisableReverseChannel(TIMx, channel); + } + if(TIM_OC_InitStruct->OCState == FL_ENABLE) + { + /* 通道使能 */ + FL_ATIM_OC_EnableChannel(TIMx, channel); + } + else + { + FL_ATIM_OC_DisableChannel(TIMx, channel); + } + /* 设置比较值 */ + switch(channel) + { + case FL_ATIM_CHANNEL_1: + FL_ATIM_WriteCompareCH1(TIMx, TIM_OC_InitStruct->compareValue); + break; + case FL_ATIM_CHANNEL_2: + FL_ATIM_WriteCompareCH2(TIMx, TIM_OC_InitStruct->compareValue); + break; + case FL_ATIM_CHANNEL_3: + FL_ATIM_WriteCompareCH3(TIMx, TIM_OC_InitStruct->compareValue); + break; + case FL_ATIM_CHANNEL_4: + FL_ATIM_WriteCompareCH4(TIMx, TIM_OC_InitStruct->compareValue); + break; + default : + result = FL_FAIL; + break; + } + return result; +} +/** + * @brief 配置TIM的比较输出通道. + * @param TIMx Timer Instance + * @param Channel This parameter can be one of the following values: + * @arg @ref FL_ATIM_CHANNEL_1 + * @arg @ref FL_ATIM_CHANNEL_2 + * @arg @ref FL_ATIM_CHANNEL_3 + * @arg @ref FL_ATIM_CHANNEL_4 + * @retval TIM_OC_InitStruct pointer to a @ref FL_ATIM_OC_InitTypeDef structure + * -FL_FAIL 配置过程发生错误 + * -FL_PASS 成功 + */ +FL_ErrorStatus FL_ATIM_OC_Init(ATIM_Type *TIMx, uint32_t channel, FL_ATIM_OC_InitTypeDef *TIM_OC_InitStruct) +{ + uint32_t i = 5; + FL_ErrorStatus result = FL_PASS; + /* 参数检查 */ + assert_param(IS_ATIM_INSTANCE(TIMx)); + assert_param(IS_FL_ATIM_OC_MODE(TIM_OC_InitStruct->OCMode)); + assert_param(IS_FL_ATIM_OC_PRELOAD(TIM_OC_InitStruct->OCPreload)); + assert_param(IS_FL_ATIM_OC_POLARITY(TIM_OC_InitStruct->OCPolarity)); + assert_param(IS_FL_ATIM_OC_FASTMODE(TIM_OC_InitStruct->OCFastMode)); + assert_param(IS_FL_ATIM_OC_ETR_CLEARN(TIM_OC_InitStruct->OCETRFStatus)); + assert_param(IS_FL_ATIM_OCN_STATE(TIM_OC_InitStruct->OCNState)); + assert_param(IS_FL_ATIM_OC_STATE(TIM_OC_InitStruct->OCState)); + assert_param(IS_FL_ATIM_OC_IDLESTATE(TIM_OC_InitStruct->OCIdleState)); + assert_param(IS_FL_ATIM_OC_NIDLESTATE(TIM_OC_InitStruct->OCNIdleState)); + assert_param(IS_FL_ATIM_OC_NPOLARITY(TIM_OC_InitStruct->OCNPolarity)); + /* 通道关闭 */ + FL_ATIM_OC_DisableChannel(TIMx, channel); + FL_ATIM_OC_DisableReverseChannel(TIMx, channel); + /* 通道极性 */ + FL_ATIM_OC_SetChannelPolarity(TIMx, TIM_OC_InitStruct->OCPolarity, channel); + /* 通道空闲电平 */ + FL_ATIM_OC_SetChannelIdleState(TIMx, TIM_OC_InitStruct->OCIdleState, channel); + /* 互补通道空闲电平 */ + FL_ATIM_OC_SetReverseChannelIdleState(TIMx, TIM_OC_InitStruct->OCNIdleState, channel); + /* 互补通道极性 */ + FL_ATIM_OC_SetReverseChannelPolarity(TIMx, TIM_OC_InitStruct->OCNPolarity, channel); + /* 捕获映射到输出通道 */ + FL_ATIM_CC_SetChannelMode(TIMx, FL_ATIM_CHANNEL_MODE_OUTPUT, channel); + /* 输出比较模式寄存器配置 */ + OCConfig(TIMx, channel, TIM_OC_InitStruct); + /* 手动触发更新事件，将配置值写入 */ + FL_ATIM_GenerateUpdateEvent(TIMx); + while((!FL_ATIM_IsActiveFlag_Update(ATIM))&&i) + { + i--; + } + /*清除UIF标志，防止产生UG事件中断*/ + FL_ATIM_ClearFlag_Update(ATIM); + return result; +} +/** + * @brief 设置 FL_ATIM_OC_InitTypeDef 为默认配置 + * @param TIM_OC_InitStruct 指向需要将值设置为默认配置的结构体 @ref FL_ATIM_OC_InitTypeDef 结构体 + * + * @retval None + */ +void FL_ATIM_OC_StructInit(FL_ATIM_OC_InitTypeDef *TIM_OC_InitStruct) +{ + /* Set the default configuration */ + TIM_OC_InitStruct->OCMode = (uint32_t)FL_ATIM_OC_MODE_FROZEN; + TIM_OC_InitStruct->OCETRFStatus = (uint32_t)FL_DISABLE; + TIM_OC_InitStruct->OCFastMode = (uint32_t)FL_DISABLE; + TIM_OC_InitStruct->compareValue = (uint32_t)0x00000000U; + TIM_OC_InitStruct->OCPolarity = (uint32_t)FL_ATIM_OC_POLARITY_NORMAL; + TIM_OC_InitStruct->OCPreload = (uint32_t)FL_DISABLE; + TIM_OC_InitStruct->OCIdleState = (uint32_t)FL_ATIM_OC_IDLE_STATE_LOW; + TIM_OC_InitStruct->OCNIdleState = (uint32_t)FL_ATIM_OCN_IDLE_STATE_LOW; + TIM_OC_InitStruct->OCNPolarity = (uint32_t)FL_ATIM_OCN_POLARITY_NORMAL; + TIM_OC_InitStruct->OCNState = (uint32_t)FL_DISABLE; +} + +/** + * @brief 配置TIM的输入捕获通道. + * @param TIMx Timer Instance + * @param TIM_IC_InitStruct 指向一个 @ref FL_ATIM_IC_InitTypeDef 结构体 + * @retval TIM_OC_InitStruct pointer to a @ref FL_ATIM_OC_InitTypeDef structure + * -FL_FAIL 配置过程发生错误 + * -FL_PASS 成功 + */ +FL_ErrorStatus FL_ATIM_BDTR_Init(ATIM_Type *TIMx, FL_ATIM_BDTR_InitTypeDef *TIM_BDTR_InitStruct) +{ + FL_ErrorStatus result = FL_PASS; + /* 参数检查 */ + assert_param(IS_ATIM_INSTANCE(TIMx)); + assert_param(IS_FL_ATIM_OSSR_STATE(TIM_BDTR_InitStruct->OSSRState)); + assert_param(IS_FL_ATIM_OSSI_STATE(TIM_BDTR_InitStruct->OSSIState)); + assert_param(IS_FL_ATIM_LOCK_LEVEL(TIM_BDTR_InitStruct->lockLevel)); + assert_param(IS_FL_ATIM_BREAK_POLARITY(TIM_BDTR_InitStruct->breakPolarity)); + assert_param(IS_FL_ATIM_AUTOMATIC_OUTPUT_STATE(TIM_BDTR_InitStruct->automaticOutput)); + assert_param(IS_FL_ATIM_BDTR_FILTER(TIM_BDTR_InitStruct->breakFilter)); + /* 关闭所有输出 */ + FL_ATIM_DisableALLOutput(TIMx); + /* 设置死区时间 */ + FL_ATIM_WriteDeadTime(TIMx, TIM_BDTR_InitStruct->deadTime); + /* 设置寄存器锁定等级 */ + FL_ATIM_SetLockLevel(TIMx, TIM_BDTR_InitStruct->lockLevel); + /* Idle状态下关闭状态 */ + FL_ATIM_SetOffStateIdle(TIMx, TIM_BDTR_InitStruct->OSSIState); + /* run状态下关闭状态 */ + FL_ATIM_SetOffStateRun(TIMx, TIM_BDTR_InitStruct->OSSRState); + /* 门控1刹车信号 */ + FL_ATIM_SetBreak1GateState(TIMx, TIM_BDTR_InitStruct->gatedBrakeSignal_1); + /* 门控2刹车信号 */ + FL_ATIM_SetBreak2GateState(TIMx, TIM_BDTR_InitStruct->gatedBrakeSignal_2); + /* 门控刹车信号组合方式设置 */ + FL_ATIM_SetBreakSignalCombination(TIMx, TIM_BDTR_InitStruct->brakeSignalCombined); + /* 刹车极性设置 */ + FL_ATIM_SetBreakPolarity(TIMx, TIM_BDTR_InitStruct->breakPolarity); + /* 更新时间自动设置输出配置，如果刹车事件发生过并且当前功能使能，则下一个更新事件将重新自动输出 */ + if(TIM_BDTR_InitStruct->automaticOutput == FL_ENABLE) + { + FL_ATIM_EnableAutomaticOutput(TIMx); + } + else + { + FL_ATIM_DisableAutomaticOutput(TIMx); + } + /* 刹车功能开关配置 */ + if(TIM_BDTR_InitStruct->breakState == FL_ENABLE) + { + FL_ATIM_EnableBreak(TIMx); + } + else + { + FL_ATIM_DisableBreak(TIMx); + } + /* 使能全部输出 */ + FL_ATIM_EnableALLOutput(TIMx); + return result; +} +/** + * @brief 设置 FL_ATIM_IC_InitTypeDef 为默认配置 + * @param TIM_ICInitStruct 指向需要将值设置为默认配置的结构体 @ref FL_ATIM_IC_InitTypeDef 结构体 + * + * @retval None + */ +void FL_ATIM_BDTR_StructInit(FL_ATIM_BDTR_InitTypeDef *TIM_BDTR_InitStruct) +{ + TIM_BDTR_InitStruct->deadTime = 0x00; + TIM_BDTR_InitStruct->lockLevel = FL_ATIM_LOCK_LEVEL_OFF; + TIM_BDTR_InitStruct->OSSRState = FL_ATIM_OSSR_DISABLE; + TIM_BDTR_InitStruct->OSSIState = FL_ATIM_OSSI_DISABLE; + TIM_BDTR_InitStruct->breakFilter = FL_ATIM_BREAK_FILTER_DIV1; + TIM_BDTR_InitStruct->breakPolarity = FL_ATIM_BREAK_POLARITY_LOW; + TIM_BDTR_InitStruct->automaticOutput = FL_DISABLE; + TIM_BDTR_InitStruct->gatedBrakeSignal_1 = FL_ATIM_BREAK1_GATE_AUTO; + TIM_BDTR_InitStruct->gatedBrakeSignal_2 = FL_ATIM_BREAK2_GATE_AUTO; + TIM_BDTR_InitStruct->breakState = FL_DISABLE; + TIM_BDTR_InitStruct->brakeSignalCombined = FL_ATIM_BREAK_COMBINATION_OR; +} + +/** + * @} + */ + +#endif /* FL_ATIM_DRIVER_ENABLED */ + +/** + * @} + */ + +/** + * @} + */ + +/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/ diff --git a/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_bstim16.c b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_bstim16.c new file mode 100644 index 0000000..8fd7602 --- /dev/null +++ b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_bstim16.c @@ -0,0 +1,182 @@ + /** + ******************************************************************************************************* + * @file fm33lg0xx_fl_bstim16.c + * @author FMSH Application Team + * @brief Src file of BSTIM FL Module + ******************************************************************************************************* + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + +/* Includes ------------------------------------------------------------------*/ +#include "fm33lg0xx_fl.h" + +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @addtogroup BSTIM16 + * @{ + */ + +#ifdef FL_BSTIM16_DRIVER_ENABLED + +/* Private macros ------------------------------------------------------------*/ +/** @addtogroup BSTIM16_FL_Private_Macros + * @{ + */ +#define IS_FL_BSTIM16_INSTANCE(INTANCE) ((INTANCE) == BSTIM16) + +#define IS_FL_BSTIM16_PSC(__VALUE__) ((__VALUE__) <= 0x0000FFFF) + +#define IS_FL_BSTIM16_AUTORELOAD(__VALUE__) ((__VALUE__) <= 0x0000FFFF) + + +#define IS_FL_BSTIM16_AUTORELOAD_MODE(__VALUE__) (((__VALUE__) == FL_ENABLE)||\ + ((__VALUE__) == FL_DISABLE)) + +#define IS_FL_BSTIM16_CLOCK_SRC(__VALUE__) (((__VALUE__) == FL_CMU_BSTIM16_CLK_SOURCE_APBCLK)||\ + ((__VALUE__) == FL_CMU_BSTIM16_CLK_SOURCE_RCLP)||\ + ((__VALUE__) == FL_CMU_BSTIM16_CLK_SOURCE_RCLF)||\ + ((__VALUE__) == FL_CMU_BSTIM16_CLK_SOURCE_LSCLK)) + +/** + * @} + */ + +/* Exported functions --------------------------------------------------------*/ +/** @addtogroup BSTIM16_FL_EF_Init + * @{ + */ + +/** + * @brief 复位对应BSTIM16寄存器. + * @param BSTIMx + * @retval ErrorStatus枚举值: + * -FL_PASS 外设寄存器值恢复复位值 + * -FL_FAIL 未成功执行 + */ +FL_ErrorStatus FL_BSTIM16_DeInit(BSTIM16_Type *BSTIM16x) +{ + assert_param(IS_FL_BSTIM16_INSTANCE(BSTIM16x)); + /* 使能外设复位 */ + FL_RMU_EnablePeripheralReset(RMU); + /* 复位IIC外设寄存器 */ + FL_RMU_EnableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_BSTIM16); + FL_RMU_DisableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_BSTIM16); + /* 关闭外设总线始时钟和工作时钟 */ + FL_CMU_DisableGroup4BusClock(FL_CMU_GROUP4_BUSCLK_BSTIM16); + FL_CMU_DisableGroup3OperationClock(FL_CMU_GROUP3_OPCLK_BSTIM16); + /* 锁定外设复位 */ + FL_RMU_DisablePeripheralReset(RMU); + return FL_PASS; +} +/** + * @brief 根据 BSTIM16_InitStruct 的配置信息初始化对应外设入口地址的寄存器值. + * @param BSTIMx BSTIMx + * @param BSTIM16_InitStruct 指向一个 @ref FL_BSTIM16_InitTypeDef 结构体 + * 其中包含了外设的相关配置信息. + * @retval ErrorStatus枚举值 + * -FL_FAIL 配置过程发生错误 + * -FL_PASS 配置成功 + */ +FL_ErrorStatus FL_BSTIM16_Init(BSTIM16_Type *BSTIM16x, FL_BSTIM16_InitTypeDef *init) +{ + uint32_t i = 5; + /* 参数检查 */ + assert_param(IS_FL_BSTIM16_INSTANCE(BSTIM16x)); + assert_param(IS_FL_BSTIM16_CLOCK_SRC(init->clockSource)); + assert_param(IS_FL_BSTIM16_PSC(init->prescaler)); + assert_param(IS_FL_BSTIM16_AUTORELOAD(init->autoReload)); + assert_param(IS_FL_BSTIM16_AUTORELOAD_MODE(init->autoReloadState)); + /* 时钟使能 */ + FL_CMU_EnableGroup4BusClock(FL_CMU_GROUP4_BUSCLK_BSTIM16); + /* 选择时钟源 */ + FL_CMU_SetBSTIM16ClockSource(init->clockSource); + FL_CMU_EnableGroup3OperationClock(FL_CMU_GROUP3_OPCLK_BSTIM16); + /* 分频系数 */ + FL_BSTIM16_WritePrescaler(BSTIM16x, init->prescaler); + /* 自动重装载值 */ + FL_BSTIM16_EnableUpdateEvent(BSTIM16x); + FL_BSTIM16_WriteAutoReload(BSTIM16x, init->autoReload); + if(init->autoReloadState == FL_ENABLE) + { + FL_BSTIM16_EnableARRPreload(BSTIM16x); + } + else + { + FL_BSTIM16_DisableARRPreload(BSTIM16x); + } + FL_BSTIM16_GenerateUpdateEvent(BSTIM16x); + while((!FL_BSTIM16_IsActiveFlag_Update(BSTIM16x))&&i) + { + i--; + } + return FL_PASS; +} +/** + * @brief 设置 BSTIM16_InitStruct 为默认配置 + * @param BSTIM16_InitStruct 指向需要将值设置为默认配置的结构体 @ref FL_BSTIM16_InitTypeDef 结构体 + * + * @retval None + */ + +void FL_BSTIM16_StructInit(FL_BSTIM16_InitTypeDef *init) +{ + init->prescaler = 0; + init->autoReload = 0xFFFFFFFF; + init->autoReloadState = FL_ENABLE; + init->clockSource = FL_CMU_BSTIM16_CLK_SOURCE_APBCLK; +} + +/** + * @} + */ + +#endif /* FL_BSTIM16_DRIVER_ENABLED */ + +/** + * @} + */ + +/** + * @} + */ + + +/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/ diff --git a/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_bstim32.c b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_bstim32.c new file mode 100644 index 0000000..adb8411 --- /dev/null +++ b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_bstim32.c @@ -0,0 +1,176 @@ + /** + ******************************************************************************************************* + * @file fm33lg0xx_fl_bstim32.c + * @author FMSH Application Team + * @brief Src file of BSTIM FL Module + ******************************************************************************************************* + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + +/* Includes ------------------------------------------------------------------*/ +#include "fm33lg0xx_fl.h" + +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @addtogroup BSTIM32 + * @{ + */ + +#ifdef FL_BSTIM32_DRIVER_ENABLED + +/* Private macros ------------------------------------------------------------*/ +/** @addtogroup BSTIM32_FL_Private_Macros + * @{ + */ +#define IS_FL_BSTIM32_INSTANCE(INTANCE) ((INTANCE) == BSTIM32) + + +#define IS_FL_BSTIM32_AUTORELOAD_MODE(__VALUE__) (((__VALUE__) == FL_ENABLE)||\ + ((__VALUE__) == FL_DISABLE)) + +#define IS_FL_BSTIM32_CLOCK_SRC(__VALUE__) (((__VALUE__) == FL_CMU_BSTIM32_CLK_SOURCE_APBCLK)||\ + ((__VALUE__) == FL_CMU_BSTIM32_CLK_SOURCE_RCLP)||\ + ((__VALUE__) == FL_CMU_BSTIM32_CLK_SOURCE_RCLF)||\ + ((__VALUE__) == FL_CMU_BSTIM32_CLK_SOURCE_LSCLK)) + +/** + * @} + */ + +/* Exported functions --------------------------------------------------------*/ +/** @addtogroup BSTIM_FL_EF_Init + * @{ + */ + +/** + * @brief 复位对应BSTIM寄存器. + * @param BSTIMx + * @retval ErrorStatus枚举值: + * -FL_PASS 外设寄存器值恢复复位值 + * -FL_FAIL 未成功执行 + */ +FL_ErrorStatus FL_BSTIM32_DeInit(BSTIM32_Type *BSTIM32x) +{ + assert_param(IS_FL_BSTIM32_INSTANCE(BSTIM32x)); + /* 使能外设复位 */ + FL_RMU_EnablePeripheralReset(RMU); + /* 复位外设寄存器 */ + FL_RMU_EnableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_BSTIM32); + FL_RMU_DisableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_BSTIM32); + /* 关闭外设总线始时钟和工作时钟 */ + FL_CMU_DisableGroup4BusClock(FL_CMU_GROUP4_BUSCLK_BSTIM32); + FL_CMU_DisableGroup3OperationClock(FL_CMU_GROUP3_OPCLK_BSTIM32); + /* 锁定外设复位 */ + FL_RMU_DisablePeripheralReset(RMU); + return FL_PASS; +} +/** + * @brief 根据 BSTIM32_InitStruct 的配置信息初始化对应外设入口地址的寄存器值. + * @param BSTIMx BSTIMx + * @param BSTIM32_InitStruct 指向一个 @ref FL_BSTIM32_InitTypeDef 结构体 + * 其中包含了外设的相关配置信息. + * @retval ErrorStatus枚举值 + * -FL_FAIL 配置过程发生错误 + * -FL_PASS 配置成功 + */ +FL_ErrorStatus FL_BSTIM32_Init(BSTIM32_Type *BSTIM32x, FL_BSTIM32_InitTypeDef *init) +{ + uint32_t i = 5; + /* 参数检查 */ + assert_param(IS_FL_BSTIM32_INSTANCE(BSTIM32x)); + assert_param(IS_FL_BSTIM32_CLOCK_SRC(init->clockSource)); + assert_param(IS_FL_BSTIM32_AUTORELOAD_MODE(init->autoReloadState)); + /* 时钟使能 */ + FL_CMU_EnableGroup4BusClock(FL_CMU_GROUP4_BUSCLK_BSTIM32); + /* 选择时钟源 */ + FL_CMU_SetBSTIM32ClockSource(init->clockSource); + FL_CMU_EnableGroup3OperationClock(FL_CMU_GROUP3_OPCLK_BSTIM32); + /* 分频系数 */ + FL_BSTIM32_WritePrescaler(BSTIM32x, init->prescaler); + /* 自动重装载值 */ + FL_BSTIM32_EnableUpdateEvent(BSTIM32x); + FL_BSTIM32_WriteAutoReload(BSTIM32x, init->autoReload); + if(init->autoReloadState == FL_ENABLE) + { + FL_BSTIM32_EnableARRPreload(BSTIM32x); + } + else + { + FL_BSTIM32_DisableARRPreload(BSTIM32x); + } + FL_BSTIM32_GenerateUpdateEvent(BSTIM32x); + while((!FL_BSTIM32_IsActiveFlag_Update(BSTIM32x))&&i) + { + i--; + } + return FL_PASS; +} + +/** + * @brief 设置 BSTIM32_InitStruct 为默认配置 + * @param BSTIM32_InitStruct 指向需要将值设置为默认配置的结构体 @ref FL_BSTIM_InitTypeDef 结构体 + * + * @retval None + */ +void FL_BSTIM32_StructInit(FL_BSTIM32_InitTypeDef *init) +{ + init->prescaler = 0; + init->autoReload = 0xFFFFFFFF; + init->autoReloadState = FL_ENABLE; + init->clockSource = FL_CMU_BSTIM32_CLK_SOURCE_APBCLK; +} + +/** + * @} + */ + +#endif /* FL_BSTIM32_DRIVER_ENABLED */ + +/** + * @} + */ + +/** + * @} + */ + + +/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/ diff --git a/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_can.c b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_can.c new file mode 100644 index 0000000..c47f87b --- /dev/null +++ b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_can.c @@ -0,0 +1,326 @@ + /** + ******************************************************************************************************* + * @file fm33lg0xx_fl_can.c + * @author FMSH Application Team + * @brief Src file of VAN fL Module + ******************************************************************************************************* + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + +/* Includes ------------------------------------------------------------------*/ +#include "fm33lg0xx_fl.h" + +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @addtogroup CAN + * @{ + */ + +#ifdef FL_CAN_DRIVER_ENABLED + +/* Private macros ------------------------------------------------------------*/ +/** @addtogroup CAN_FL_Private_Macros + * @{ + */ +#define IS_CAN_SJW(__VALUE__) (((__VALUE__) == FL_CAN_SJW_1Tq) \ + || ((__VALUE__) == FL_CAN_SJW_2Tq) \ + || ((__VALUE__) == FL_CAN_SJW_3Tq) \ + || ((__VALUE__) == FL_CAN_SJW_4Tq)) + + +#define IS_CAN_TS1(__VALUE__) (((__VALUE__) == FL_CAN_TS1_1Tq) \ + || ((__VALUE__) == FL_CAN_TS1_2Tq) \ + || ((__VALUE__) == FL_CAN_TS1_3Tq) \ + || ((__VALUE__) == FL_CAN_TS1_4Tq) \ + || ((__VALUE__) == FL_CAN_TS1_5Tq) \ + || ((__VALUE__) == FL_CAN_TS1_6Tq) \ + || ((__VALUE__) == FL_CAN_TS1_7Tq) \ + || ((__VALUE__) == FL_CAN_TS1_8Tq) \ + || ((__VALUE__) == FL_CAN_TS1_9Tq) \ + || ((__VALUE__) == FL_CAN_TS1_10Tq) \ + || ((__VALUE__) == FL_CAN_TS1_11Tq) \ + || ((__VALUE__) == FL_CAN_TS1_12Tq) \ + || ((__VALUE__) == FL_CAN_TS1_13Tq) \ + || ((__VALUE__) == FL_CAN_TS1_14Tq) \ + || ((__VALUE__) == FL_CAN_TS1_15Tq) \ + || ((__VALUE__) == FL_CAN_TS1_16Tq)) + + + +#define IS_CAN_TS2(__VALUE__) (((__VALUE__) == FL_CAN_TS2_1Tq) \ + || ((__VALUE__) == FL_CAN_TS2_2Tq) \ + || ((__VALUE__) == FL_CAN_TS2_3Tq) \ + || ((__VALUE__) == FL_CAN_TS2_4Tq) \ + || ((__VALUE__) == FL_CAN_TS2_5Tq) \ + || ((__VALUE__) == FL_CAN_TS2_6Tq) \ + || ((__VALUE__) == FL_CAN_TS2_7Tq) \ + || ((__VALUE__) == FL_CAN_TS2_8Tq)) + + +#define IS_CAN_FILTER_EN(__VALUE__) (((__VALUE__) == FL_ENABLE) \ + || ((__VALUE__) == FL_DISABLE)) + + +#define IS_CAN_AFx(__VALUE__) (((__VALUE__) == FL_CAN_FILTER1) \ + || ((__VALUE__) == FL_CAN_FILTER2) \ + || ((__VALUE__) == FL_CAN_FILTER3) \ + || ((__VALUE__) == FL_CAN_FILTER4)) + + +#define IS_CAN_MODE(__VALUE__) (((__VALUE__) == FL_CAN_MODE_NORMAL) \ + || ((__VALUE__) == FL_CAN_MODE_LOOPBACK) \ + || ((__VALUE__) == FL_CAN_MODE_CONFIG)) + + +#define IS_CAN_CLK(__VALUE__) (((__VALUE__) == FL_CMU_CAN_CLK_SOURCE_RCHF) \ + || ((__VALUE__) == FL_CMU_CAN_CLK_SOURCE_XTHF) \ + || ((__VALUE__) == FL_CMU_CAN_CLK_SOURCE_PLL) \ + || ((__VALUE__) == FL_CMU_CAN_CLK_SOURCE_APBCLK)) + + + + + + +#define IS_CAN_SRR(__VALUE__) (((__VALUE__)==FL_CAN_SRR_BIT_LOW) ||((__VALUE__)==FL_CAN_SRR_BIT_HIGH)) +#define IS_CAN_IDE(__VALUE__) (((__VALUE__)==FL_CAN_IDE_BIT_LOW) ||((__VALUE__)==FL_CAN_IDE_BIT_HIGH)) +#define IS_CAN_RTR(__VALUE__) (((__VALUE__)==FL_CAN_RTR_BIT_LOW) ||((__VALUE__)==FL_CAN_RTR_BIT_HIGH)) + +#define IS_CAN_ID18_MASK(__VALUE__) (__VALUE__<=262143U) +#define IS_CAN_ID11_MASK(__VALUE__) (__VALUE__<=2047U) + +#define IS_CAN_SRR_MASK(__VALUE__) (((__VALUE__) == FL_ENABLE) \ + || ((__VALUE__) == FL_DISABLE)) + +#define IS_CAN_IDE_MASK(__VALUE__) (((__VALUE__) == FL_ENABLE) \ + || ((__VALUE__) == FL_DISABLE)) + +#define IS_CAN_RTR_MASK(__VALUE__) (((__VALUE__) == FL_ENABLE) \ + || ((__VALUE__) == FL_DISABLE)) +/** + * @} + */ + +/* Exported functions --------------------------------------------------------*/ +/** @addtogroup CAN_FL_EF_Init + * @{ + */ + +/** + * @brief CAN初始化 + * @param CANx外设入口地址 + * @param CAN_InitStruct 指向一个@ref FL_CAN_InitTypeDef 结构体的指针 + * @retval 错误状态可能值 + * -FL_FAIL 配置过程发生错误 + * -FL_PASS 配置成功 + */ +FL_ErrorStatus FL_CAN_Init(CAN_Type *CANx, FL_CAN_InitTypeDef *CAN_InitStruct) +{ + /*参数检查*/ + assert_param(IS_CAN_SJW(CAN_InitStruct->SJW)); + assert_param(IS_CAN_TS1(CAN_InitStruct->TS1)); + assert_param(IS_CAN_TS2(CAN_InitStruct->TS2)); + assert_param(IS_CAN_CLK(CAN_InitStruct->clockSource)); + /*时钟总线配置*/ + FL_CMU_EnableGroup3BusClock(FL_CMU_GROUP3_BUSCLK_CAN); + FL_CMU_EnableGroup3OperationClock(FL_CMU_GROUP3_OPCLK_CAN); + /*CAN时钟源选择*/ + FL_CMU_SetCANClockSource(CAN_InitStruct->clockSource); + /*复位CAN模块*/ + FL_CAN_SetSoftwareReset(CANx, FL_CAN_SOFTWARE_RESET); + /*设置同步段*/ + FL_CAN_WriteSyncJumpWidth(CANx, CAN_InitStruct->SJW); + /*设置时间段1*/ + FL_CAN_WriteTimeSegment1Length(CANx, CAN_InitStruct->TS1); + /*设置时间段2*/ + FL_CAN_WriteTimeSegment2Length(CANx, CAN_InitStruct->TS2); + /*设置波特率*/ + FL_CAN_WriteBaudRatePrescaler(CANx, CAN_InitStruct->BRP); + if(CAN_InitStruct->mode == FL_CAN_MODE_NORMAL) + { + FL_CAN_DisableLoopBackMode(CANx); /* Normal模式 */ + FL_CAN_Enable(CANx); + } + else + if(CAN_InitStruct->mode == FL_CAN_MODE_LOOPBACK) + { + FL_CAN_EnableLoopBackMode(CANx); /* Loop Back模式 */ + FL_CAN_Enable(CANx); + } + else + { + FL_CAN_Disable(CANx); /* Configuration模式 */ + } + return FL_PASS; +} + +/** + * @brief 设置 CAN_InitStruct 为默认配置 + * @param CAN_InitStruct 指向需要将值设置为默认配置的结构体 @ref FL_CAN_InitTypeDef 结构体 + * + * @retval None + */ +void FL_CAN_StructInit(FL_CAN_InitTypeDef *CAN_InitStruct) +{ + CAN_InitStruct->mode = FL_CAN_MODE_NORMAL; + CAN_InitStruct->BRP = 0; + CAN_InitStruct->clockSource = FL_CMU_CAN_CLK_SOURCE_RCHF; + CAN_InitStruct->SJW = FL_CAN_SJW_1Tq; + CAN_InitStruct->TS1 = FL_CAN_TS1_5Tq; + CAN_InitStruct->TS2 = FL_CAN_TS2_4Tq; +} + +/** + * @brief CAN滤波器初始化 + * @param CANx外设入口地址 + * @param filterX This parameter can be one of the following values: + * @arg @ref FL_CAN_FILTER1 + * @arg @ref FL_CAN_FILTER2 + * @arg @ref FL_CAN_FILTER3 + * @arg @ref FL_CAN_FILTER4 + * @param CAN_InitFilterStruct 指向一个@ref FL_CAN_FilterInitTypeDef 结构体的指针 + * @retval 错误状态可能值 + * -FL_FAIL 配置过程发生错误 + * -FL_PASS 配置成功 + */ +FL_ErrorStatus FL_CAN_FilterInit(CAN_Type *CANx, FL_CAN_FilterInitTypeDef *CAN_FilterInitStruct, uint32_t filterX) +{ + uint32_t counter =0; + uint32_t filterstatus; + assert_param(IS_CAN_SRR(CAN_FilterInitStruct->filterIdSRR)); + assert_param(IS_CAN_IDE(CAN_FilterInitStruct->filterIdIDE)); + assert_param(IS_CAN_RTR(CAN_FilterInitStruct->filterIdRTR)); + assert_param(IS_CAN_FILTER_EN(CAN_FilterInitStruct->filterEn)); + assert_param(IS_CAN_ID18_MASK(CAN_FilterInitStruct->filterMaskIdLow)); + assert_param(IS_CAN_ID11_MASK(CAN_FilterInitStruct->filterMaskIdHigh)); + assert_param(IS_CAN_SRR_MASK(CAN_FilterInitStruct->filterMaskIdSRR)); + assert_param(IS_CAN_IDE_MASK(CAN_FilterInitStruct->filterMaskIdIDE)); + assert_param(IS_CAN_RTR_MASK(CAN_FilterInitStruct->filterMaskIdRTR)); + assert_param(IS_CAN_AFx(filterX)); + do + { + filterstatus = FL_CAN_IsActiveFlag_FilterBusy(CANx); + counter++; + }while((filterstatus != 0U) && (counter != CAN_TIMEOUT)); + if(CAN_FilterInitStruct->filterIdIDE == FL_CAN_IDE_BIT_HIGH) + { + FL_CAN_Filter_WriteIDCompare(CANx, filterX, ((CAN_FilterInitStruct->filterIdExtend) >> 18) & 0X7FF); + FL_CAN_Filter_WriteEXTIDCompare(CANx, filterX, (CAN_FilterInitStruct->filterIdExtend) & 0X3FFFF); + } + else + { + FL_CAN_Filter_WriteIDCompare(CANx, filterX, (CAN_FilterInitStruct->filterIdStandard) & 0X7FF); + } + if((CAN_FilterInitStruct->filterMaskIdSRR) == FL_ENABLE) /* SRR参与滤波器比较 */ + { + FL_CAN_Filter_EnableSRRCompare(CANx, filterX); + } + else + { + FL_CAN_Filter_DisableSRRCompare(CANx, filterX); + } + if((CAN_FilterInitStruct->filterMaskIdIDE) == FL_ENABLE) /* IDE位参与滤波器比较 */ + { + FL_CAN_Filter_EnableIDECompare(CANx, filterX); + } + else + { + FL_CAN_Filter_DisableIDECompare(CANx, filterX); + } + if((CAN_FilterInitStruct->filterMaskIdRTR) == FL_ENABLE) /* RTR位参与滤波器比较 */ + { + FL_CAN_Filter_EnableRTRCompare(CANx, filterX); + } + else + { + FL_CAN_Filter_DisableRTRCompare(CANx, filterX); + } + FL_CAN_Filter_WriteIDCompareMask(CANx, filterX, CAN_FilterInitStruct->filterMaskIdHigh); /* 滤波器掩码配置 */ + FL_CAN_Filter_WriteEXTIDCompareMask(CANx, filterX, CAN_FilterInitStruct->filterMaskIdLow); + FL_CAN_Filter_SetSRRCompare(CANx, filterX, CAN_FilterInitStruct->filterIdSRR); + FL_CAN_Filter_SetIDECompare(CANx, filterX, CAN_FilterInitStruct->filterIdIDE); /* 滤波器ID配置 */ + FL_CAN_Filter_SetRTRCompare(CANx, filterX, CAN_FilterInitStruct->filterIdRTR); + if((CAN_FilterInitStruct->filterEn) == FL_ENABLE) /* 滤波器使能 */ + { + FL_CAN_Filter_Enable(CANx, filterX); + } + else + { + FL_CAN_Filter_Disable(CANx, filterX); + } + return FL_PASS; +} +/** + * @brief 设置 CAN_FilterInitStruct 为默认配置 + * @param CAN_FilterInitStruct 指向需要将值设置为默认配置的结构体 @ref FL_CAN_FilterInitTypeDef 结构体 + * + * @retval None + */ +void FL_CAN_StructFilterInit(FL_CAN_FilterInitTypeDef *CAN_FilterInitStruct) +{ + CAN_FilterInitStruct->filterEn = FL_DISABLE; + CAN_FilterInitStruct->filterIdExtend = 0; + CAN_FilterInitStruct->filterMaskIdHigh = 0x7FF; + CAN_FilterInitStruct->filterIdIDE = FL_CAN_IDE_BIT_LOW; + CAN_FilterInitStruct->filterMaskIdIDE = FL_DISABLE; + CAN_FilterInitStruct->filterMaskIdLow = 0X3FFFF; + CAN_FilterInitStruct->filterIdRTR = FL_CAN_RTR_BIT_LOW; + CAN_FilterInitStruct->filterMaskIdRTR = FL_DISABLE; + CAN_FilterInitStruct->filterIdSRR = FL_CAN_SRR_BIT_LOW; + CAN_FilterInitStruct->filterMaskIdSRR = FL_DISABLE; + CAN_FilterInitStruct->filterIdStandard = 0; +} + +/** + * @} + */ + +#endif /* FL_CAN_DRIVER_ENABLED */ + +/** + * @} + */ + +/** + * @} + */ + +/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/ diff --git a/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_cmu.c b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_cmu.c new file mode 100644 index 0000000..d7678ee --- /dev/null +++ b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_cmu.c @@ -0,0 +1,314 @@ + /** + **************************************************************************************************** + * @file fm33lg0xx_fl_cmu.c + * @author FMSH Application Team + * @brief Src file of CMU FL Module + **************************************************************************************************** + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + +/* Includes ------------------------------------------------------------------*/ +#include "fm33lg0xx_fl.h" + +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @addtogroup CMU + * @{ + */ + +#ifdef FL_CMU_DRIVER_ENABLED + +/* Exported functions --------------------------------------------------------*/ +/** @addtogroup CMU_FL_EF_QUERY + * @{ + */ + +/** + * @brief 获取系统当前工作时钟SYSCLK。 + * @param None + * @note 函数中用到了XTHF_VALUE 宏，这个宏应该被定义为外部晶振的输入频率值。 + * + * @retval 系统时钟频率 (Hz)。 + * + */ +uint32_t FL_CMU_GetSystemClockFreq(void) +{ + uint32_t frequency = 0; + /* 获取系统时钟源 */ + switch(FL_CMU_GetSystemClockSource()) + { + /* 系统时钟源为内部RCHF */ + case FL_CMU_SYSTEM_CLK_SOURCE_RCHF: + /* 内部RCHF默认为8MHz ,可以配置为16或24M */ + frequency = FL_CMU_GetRCHFClockFreq(); + break; + /* 系统时钟源为XTHF */ + case FL_CMU_SYSTEM_CLK_SOURCE_XTHF: + frequency = XTHFClock; + break; + /* 系统时钟源为PLL */ + case FL_CMU_SYSTEM_CLK_SOURCE_PLL: + frequency = FL_CMU_GetPLLClockFreq(); + break; + /* 系统时钟源为内部RCLF */ + case FL_CMU_SYSTEM_CLK_SOURCE_RCLF: + /* 根据RC4M的分频配置得出系统时钟 */ + frequency = FL_CMU_GetRCLFClockFreq(); + break; + /* 系统时钟源为XTLF */ + case FL_CMU_SYSTEM_CLK_SOURCE_XTLF: + /* 根据外部晶振的频率得出系统时钟 */ + frequency = XTLFClock; + break; + /* 系统时钟源为RCLP */ + case FL_CMU_SYSTEM_CLK_SOURCE_RCLP: + frequency = 32768; + break; + default: + frequency = FL_CMU_GetRCHFClockFreq(); + break; + } + return frequency; +} +/** + * @brief 获取 AHB 总线时钟频率。 + * + * @param SYSCLK_Frequency 系统主时钟频率SYSCLK + * + * @retval AHB 总线时钟频率(Hz) + * + */ +uint32_t FL_CMU_GetAHBClockFreq(void) +{ + uint32_t frequency = 0; + /* 获取AHB分频系数，AHB源自系统主时钟 */ + switch(FL_CMU_GetAHBPrescaler()) + { + case FL_CMU_AHBCLK_PSC_DIV1: + frequency = FL_CMU_GetSystemClockFreq(); + break; + case FL_CMU_AHBCLK_PSC_DIV2: + frequency = FL_CMU_GetSystemClockFreq() / 2; + break; + case FL_CMU_AHBCLK_PSC_DIV4: + frequency = FL_CMU_GetSystemClockFreq() / 4; + break; + case FL_CMU_AHBCLK_PSC_DIV8: + frequency = FL_CMU_GetSystemClockFreq() / 8; + break; + case FL_CMU_AHBCLK_PSC_DIV16: + frequency = FL_CMU_GetSystemClockFreq() / 16; + break; + default: + frequency = FL_CMU_GetSystemClockFreq(); + break; + } + return frequency; +} + +/** + * @brief 获取当前系统的APB总线时钟 + * @param APB_Frequency APB总线的时钟频率 + * + * @retval APB clock frequency (in Hz) + * + */ +uint32_t FL_CMU_GetAPBClockFreq(void) +{ + uint32_t frequency = 0; + /* 获取APB1分频系数，APB源自AHB */ + switch(FL_CMU_GetAPBPrescaler()) + { + case FL_CMU_APBCLK_PSC_DIV1: + frequency = FL_CMU_GetAHBClockFreq(); + break; + case FL_CMU_APBCLK_PSC_DIV2: + frequency = FL_CMU_GetAHBClockFreq() / 2; + break; + case FL_CMU_APBCLK_PSC_DIV4: + frequency = FL_CMU_GetAHBClockFreq() / 4; + break; + case FL_CMU_APBCLK_PSC_DIV8: + frequency = FL_CMU_GetAHBClockFreq() / 8; + break; + case FL_CMU_APBCLK_PSC_DIV16: + frequency = FL_CMU_GetAHBClockFreq() / 16; + break; + default: + frequency = FL_CMU_GetAHBClockFreq(); + break; + } + return frequency; +} +/** + * @brief 获取RCLF输出时钟频率 + * @param None + * + * @retval 返回RCLF输出时钟频率(Hz) + * + */ +uint32_t FL_CMU_GetRCLFClockFreq(void) +{ + uint32_t frequency = 0; + switch(FL_CMU_RCLF_GetPrescaler()) + { + case FL_CMU_RCLF_PSC_DIV1: + frequency = 614400; + break; + case FL_CMU_RCLF_PSC_DIV4: + frequency = 153600; + break; + case FL_CMU_RCLF_PSC_DIV8: + frequency = 76800; + break; + case FL_CMU_RCLF_PSC_DIV16: + frequency = 38400; + break; + default: + frequency = 614400; + break; + } + return frequency; +} +/** + * @brief 获取RCHF输出时钟频率 + * @param None + * + * @retval 返回RCHF输出时钟频率(Hz) + * + */ +uint32_t FL_CMU_GetRCHFClockFreq(void) +{ + uint32_t frequency = 0; + switch(FL_CMU_RCHF_GetFrequency()) + { + case FL_CMU_RCHF_FREQUENCY_8MHZ: + frequency = 8000000; + break; + case FL_CMU_RCHF_FREQUENCY_16MHZ: + frequency = 16000000; + break; + case FL_CMU_RCHF_FREQUENCY_24MHZ: + frequency = 24000000; + break; + case FL_CMU_RCHF_FREQUENCY_32MHZ: + frequency = 32000000; + break; + default: + frequency = 8000000; + break; + } + return frequency; +} +/** + * @brief 获取PLL输出时钟频率 + * @param None + * + * @retval 返回PLL输出时钟频率(Hz) + * + */ +uint32_t FL_CMU_GetPLLClockFreq(void) +{ + uint32_t frequency = 0; + uint32_t multiplier = 0; + /* 获取PLL时钟源 */ + switch(FL_CMU_PLL_GetClockSource()) + { + case FL_CMU_PLL_CLK_SOURCE_RCHF: + /* 获取RCHF配置主频 */ + frequency = FL_CMU_GetRCHFClockFreq(); + break; + case FL_CMU_PLL_CLK_SOURCE_XTHF: + frequency = XTHFClock; + break; + default: + frequency = FL_CMU_GetRCHFClockFreq(); + break; + } + /* 获取PLL时钟分频系数 */ + switch(FL_CMU_PLL_GetPrescaler()) + { + case FL_CMU_PLL_PSC_DIV1: + break; + case FL_CMU_PLL_PSC_DIV2: + frequency /= 2; + break; + case FL_CMU_PLL_PSC_DIV4: + frequency /= 4; + break; + case FL_CMU_PLL_PSC_DIV8: + frequency /= 8; + break; + case FL_CMU_PLL_PSC_DIV12: + frequency /= 12; + break; + case FL_CMU_PLL_PSC_DIV16: + frequency /= 16; + break; + case FL_CMU_PLL_PSC_DIV24: + frequency /= 24; + break; + case FL_CMU_PLL_PSC_DIV32: + frequency /= 32; + break; + default: + break; + } + multiplier = FL_CMU_PLL_ReadMultiplier() + 1; + frequency *= multiplier; + return frequency; +} + +/** + * @} + */ + +#endif /* FL_CMU_DRIVER_ENABLED */ + +/** + * @} + */ + +/** + * @} + */ + +/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/ diff --git a/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_comp.c b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_comp.c new file mode 100644 index 0000000..b01067a --- /dev/null +++ b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_comp.c @@ -0,0 +1,244 @@ + /** + **************************************************************************************************** + * @file fm33lg0xx_fl_comp.c + * @author FMSH Application Team + * @brief Src file of COMP FL Module + **************************************************************************************************** + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + +/* Includes ------------------------------------------------------------------*/ +#include "fm33lg0xx_fl.h" + + +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @addtogroup COMP + * @{ + */ + +#ifdef FL_COMP_DRIVER_ENABLED + +/* Private macros ------------------------------------------------------------*/ +/** @addtogroup COMP_FL_Private_Macros + * @{ + */ +#define IS_COMP_ALL_INSTANCE(INTENCE) (((INTENCE) == COMP1)||\ + ((INTENCE) == COMP2)||\ + ((INTENCE) == COMP3)) + +#define IS_FL_COMP_POSITIVEINPUT(__VALUE__) (((__VALUE__) == FL_COMP_INP_SOURCE_INP1)||\ + ((__VALUE__) == FL_COMP_INP_SOURCE_INP2)||\ + ((__VALUE__) == FL_COMP_INP_SOURCE_AVREF)||\ + ((__VALUE__) == FL_COMP_INP_SOURCE_ULPBG_REF)||\ + ((__VALUE__) == FL_COMP_INP_SOURCE_VDD15)||\ + ((__VALUE__) == FL_COMP_INP_SOURCE_VREFP)) + +#define IS_FL_COMP_NEGATIVEINPUT(__VALUE__) (((__VALUE__) == FL_COMP_INN_SOURCE_INN1)||\ + ((__VALUE__) == FL_COMP_INN_SOURCE_INN2)||\ + ((__VALUE__) == FL_COMP_INN_SOURCE_VREF)||\ + ((__VALUE__) == FL_COMP_INN_SOURCE_VREF_DIV_2)||\ + ((__VALUE__) == FL_COMP_INN_SOURCE_VREFP)||\ + ((__VALUE__) == FL_COMP_INN_SOURCE_DAC)) + +#define IS_FL_COMP_POLARITY(__VALUE__) (((__VALUE__) == FL_COMP_OUTPUT_POLARITY_NORMAL)||\ + ((__VALUE__) == FL_COMP_OUTPUT_POLARITY_INVERT)) + +#define IS_FL_COMP_EDGE(__VALUE__) (((__VALUE__) == FL_COMP_INTERRUPT_EDGE_BOTH)||\ + ((__VALUE__) == FL_COMP_INTERRUPT_EDGE_RISING )||\ + ((__VALUE__) == FL_COMP_INTERRUPT_EDGE_FALLING)) + +#define IS_FL_COMP_DIGITAL_FILTER(__VALUE__) (((__VALUE__) == FL_DISABLE)||\ + ((__VALUE__) == FL_ENABLE)) + +#define IS_FL_COMP_DIGITAL_FILTER_LEN(__VALUE__) (((__VALUE__) == FL_COMP_OUTPUT_FILTER_WINDOW_3APBCLK)||\ + ((__VALUE__) == FL_COMP_OUTPUT_FILTER_WINDOW_4APBCLK )||\ + ((__VALUE__) == FL_COMP_OUTPUT_FILTER_WINDOW_5APBCLK )||\ + ((__VALUE__) == FL_COMP_OUTPUT_FILTER_WINDOW_6APBCLK )||\ + ((__VALUE__) == FL_COMP_OUTPUT_FILTER_WINDOW_7APBCLK )||\ + ((__VALUE__) == FL_COMP_OUTPUT_FILTER_WINDOW_8APBCLK )||\ + ((__VALUE__) == FL_COMP_OUTPUT_FILTER_WINDOW_9APBCLK )||\ + ((__VALUE__) == FL_COMP_OUTPUT_FILTER_WINDOW_10APBCLK )||\ + ((__VALUE__) == FL_COMP_OUTPUT_FILTER_WINDOW_11APBCLK )||\ + ((__VALUE__) == FL_COMP_OUTPUT_FILTER_WINDOW_12APBCLK )||\ + ((__VALUE__) == FL_COMP_OUTPUT_FILTER_WINDOW_13APBCLK )||\ + ((__VALUE__) == FL_COMP_OUTPUT_FILTER_WINDOW_14APBCLK )||\ + ((__VALUE__) == FL_COMP_OUTPUT_FILTER_WINDOW_15APBCLK )||\ + ((__VALUE__) == FL_COMP_OUTPUT_FILTER_WINDOW_16APBCLK )||\ + ((__VALUE__) == FL_COMP_OUTPUT_FILTER_WINDOW_17APBCLK )||\ + ((__VALUE__) == FL_COMP_OUTPUT_FILTER_WINDOW_18APBCLK )||\ + ((__VALUE__) == FL_COMP_OUTPUT_FILTER_WINDOW_19APBCLK )||\ + ((__VALUE__) == FL_COMP_OUTPUT_FILTER_WINDOW_20APBCLK )||\ + ((__VALUE__) == FL_COMP_OUTPUT_FILTER_WINDOW_21APBCLK )||\ + ((__VALUE__) == FL_COMP_OUTPUT_FILTER_WINDOW_22APBCLK )||\ + ((__VALUE__) == FL_COMP_OUTPUT_FILTER_WINDOW_23APBCLK )||\ + ((__VALUE__) == FL_COMP_OUTPUT_FILTER_WINDOW_24APBCLK )||\ + ((__VALUE__) == FL_COMP_OUTPUT_FILTER_WINDOW_25APBCLK )||\ + ((__VALUE__) == FL_COMP_OUTPUT_FILTER_WINDOW_26APBCLK )||\ + ((__VALUE__) == FL_COMP_OUTPUT_FILTER_WINDOW_27APBCLK )||\ + ((__VALUE__) == FL_COMP_OUTPUT_FILTER_WINDOW_28APBCLK )||\ + ((__VALUE__) == FL_COMP_OUTPUT_FILTER_WINDOW_29APBCLK )||\ + ((__VALUE__) == FL_COMP_OUTPUT_FILTER_WINDOW_30APBCLK )||\ + ((__VALUE__) == FL_COMP_OUTPUT_FILTER_WINDOW_31APBCLK )||\ + ((__VALUE__) == FL_COMP_OUTPUT_FILTER_WINDOW_32APBCLK)) +/** + * @} + */ + +/* Exported functions --------------------------------------------------------*/ +/** @addtogroup COMP_FL_EF_Init + * @{ + */ + +/** + * @brief 复位对应COMP控制寄存器. + * @param COMPx COMP Port + * @retval ErrorStatus枚举值: + * -FL_PASS 外设寄存器值恢复复位值 + * -FL_FAIL 未成功执行 + */ +FL_ErrorStatus FL_COMP_DeInit(COMP_Type *COMPx) +{ + /* 入口参数检查 */ + assert_param(IS_COMP_ALL_INSTANCE(COMPx)); + /* 恢复寄存器值为默认值 */ + COMPx->CR = 0x00000000U; + return FL_PASS; +} + +/** + * @brief 根据 COMP_InitStruct的配置信息初始化对应外设. + * @param COMPx COMP Port + * @param initStruct 指向一个 @ref FL_COMP_InitTypeDef 结构体 + * 其中包含了外设的相关配置信息. + * @param Serial 比较器序号可取值： + * 1 配置比较器1 + * 2 配置比较器2 + * @retval ErrorStatus枚举值 + * -FL_FAIL 配置过程发生错误 + * -FL_PASS COMP配置成功 + */ +FL_ErrorStatus FL_COMP_Init(COMP_Type *COMPx, FL_COMP_InitTypeDef *initStruct) +{ + /* 入口参数检查 */ + assert_param(IS_COMP_ALL_INSTANCE(COMPx)); + assert_param(IS_FL_COMP_EDGE(initStruct->edge)); + assert_param(IS_FL_COMP_POLARITY(initStruct->polarity)); + assert_param(IS_FL_COMP_POSITIVEINPUT(initStruct->positiveInput)); + assert_param(IS_FL_COMP_NEGATIVEINPUT(initStruct->negativeInput)); + assert_param(IS_FL_COMP_DIGITAL_FILTER(initStruct->digitalFilter)); + assert_param(IS_FL_COMP_DIGITAL_FILTER_LEN(initStruct->digitalFilterLen)); + /* 使能时钟总线 */ + FL_CMU_EnableGroup1BusClock(FL_CMU_GROUP1_BUSCLK_COMP); + /* 比较器输出极性选择 */ + FL_COMP_SetOutputPolarity(COMPx, initStruct->polarity); + /* 比较器正向输入选择 */ + FL_COMP_SetINPSource(COMPx, initStruct->positiveInput); + /* 比较器反向输入选择 */ + FL_COMP_SetINNSource(COMPx, initStruct->negativeInput); + /* 比较器使用1/2(internal reference) 打开buffer */ + if(initStruct->negativeInput == FL_COMP_INN_SOURCE_VREF_DIV_2) + { + FL_COMP_EnableBuffer(COMP); /* buffer使能 */ + FL_COMP_DisableBufferBypass(COMP); /* 不bypass buffer */ + } + /* 比较器数字滤波 */ + if(COMPx == COMP1) + { + /* 比较器中断边沿选择 */ + FL_COMP_SetComparator1InterruptEdge(COMP, ((initStruct->edge)<edge)<edge)<digitalFilter) + { + FL_COMP_EnableOutputFilter(COMPx); + } + else + { + FL_COMP_DisableOutputFilter(COMPx); + } + /* 滤波长度 */ + FL_COMP_SetOutputFilterWindow(COMPx, initStruct->digitalFilterLen); + return FL_PASS; +} +/** + * @brief 设置 initStruct 为默认配置 + * @param initStruct 指向需要将值设置为默认配置的结构体 @ref FL_COMP_InitTypeDef 结构体 + * + * @retval None + */ +void FL_COMP_StructInit(FL_COMP_InitTypeDef *initStruct) +{ + /* 复位配置信息 */ + initStruct->edge = FL_COMP_INTERRUPT_EDGE_BOTH; + initStruct->polarity = FL_COMP_OUTPUT_POLARITY_NORMAL; + initStruct->negativeInput = FL_COMP_INN_SOURCE_INN1; + initStruct->positiveInput = FL_COMP_INP_SOURCE_INP1; + initStruct->digitalFilter = FL_ENABLE; + initStruct->digitalFilterLen = FL_COMP_OUTPUT_FILTER_WINDOW_3APBCLK; +} + +/** + * @} + */ + +#endif /* FL_COMP_DRIVER_ENABLED */ + +/** + * @} + */ + +/** + * @} + */ + +/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/ diff --git a/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_crc.c b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_crc.c new file mode 100644 index 0000000..c8114bc --- /dev/null +++ b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_crc.c @@ -0,0 +1,192 @@ + /** + ******************************************************************************************************* + * @file fm33lg0xx_fl_crc.c + * @author FMSH Application Team + * @brief Src file of CRC FL Module + ******************************************************************************************************* + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + +/* Includes ------------------------------------------------------------------*/ +#include "fm33lg0xx_fl.h" + +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @addtogroup CRC + * @{ + */ + +#ifdef FL_CRC_DRIVER_ENABLED + +/* Private macros ------------------------------------------------------------*/ +/** @addtogroup CRC_FL_Private_Macros + * @{ + */ +#define IS_FL_CRC_INSTANCE(INTANCE) ((INTANCE) == CRC) + +#define IS_FL_CRC_POLYNOMIAL_WIDTH(__VALUE__) (((__VALUE__) == FL_CRC_POLYNOMIAL_16B)||\ + ((__VALUE__) == FL_CRC_POLYNOMIAL_32B)||\ + ((__VALUE__) == FL_CRC_POLYNOMIAL_8B)||\ + ((__VALUE__) == FL_CRC_POLYNOMIAL_7B)) + +#define IS_FL_CRC_DR_WIDTH(__VALUE__) (((__VALUE__) == FL_CRC_DATA_WIDTH_8B)||\ + ((__VALUE__) == FL_CRC_DATA_WIDTH_32B)) + + +#define IS_FL_CRC_OUPUT_REFLECTE_MODE(__VALUE__) (((__VALUE__) == FL_CRC_OUPUT_INVERT_NONE)||\ + ((__VALUE__) == FL_CRC_OUPUT_INVERT_BYTE)) + +#define IS_FL_CRC_INPUT_REFLECTE_MODE(__VALUE__) (((__VALUE__) == FL_CRC_INPUT_INVERT_NONE)||\ + ((__VALUE__) == FL_CRC_INPUT_INVERT_BYTE)||\ + ((__VALUE__) == FL_CRC_INPUT_INVERT_HALF_WORD)||\ + ((__VALUE__) == FL_CRC_INPUT_INVERT_WORD)) + +#define IS_FL_CRC_CALCULA_MODE(__VALUE__) (((__VALUE__) == FL_CRC_CALCULATE_SERIAL)||\ + ((__VALUE__) == FL_CRC_CALCULATE_PARALLEL)) + +/** + * @} + */ + +/* Exported functions --------------------------------------------------------*/ +/** @addtogroup CRC_FL_EF_Init + * @{ + */ + +/** + * @brief 复位对应CRC寄存器. + * + * @param CRCx 外设入口地址 + * + * @retval FL_ErrorStatus枚举值 + * -FL_PASS 配置成功 + * -FL_FAIL 配置过程发生错误 + */ +FL_ErrorStatus FL_CRC_DeInit(CRC_Type *CRCx) +{ + assert_param(IS_FL_CRC_INSTANCE(CRCx)); + /* 外设复位使能 */ + FL_RMU_EnablePeripheralReset(RMU); + /* 复位外设寄存器 */ + FL_RMU_EnableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_CRC); + FL_RMU_DisableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_CRC); + /* 关闭总线时钟 */ + FL_CMU_DisableGroup2BusClock(FL_CMU_GROUP2_BUSCLK_CRC); + /* 锁定外设复位功能 */ + FL_RMU_DisablePeripheralReset(RMU); + return FL_PASS; +} +/** + * @brief 根据 CRC_InitStruct 的配置信息初始化对应外设入口地址的寄存器值. + * + * @param CRCx 外设入口地址 + * @param CRC_InitStruct 指向一个 @ref FL_CRC_InitTypeDef 结构体其中包含了外设的相关配置信息. + * + * @retval FL_ErrorStatus枚举值 + * -FL_FAIL 配置过程发生错误 + * -FL_PASS 配置成功 + */ +FL_ErrorStatus FL_CRC_Init(CRC_Type *CRCx, FL_CRC_InitTypeDef *CRC_InitStruct) +{ + /* 参数检查 */ + assert_param(IS_FL_CRC_INSTANCE(CRCx)); + assert_param(IS_FL_CRC_DR_WIDTH(CRC_InitStruct->dataWidth)); + assert_param(IS_FL_CRC_CALCULA_MODE(CRC_InitStruct->calculatMode)); + assert_param(IS_FL_CRC_POLYNOMIAL_WIDTH(CRC_InitStruct->polynomialWidth)); + assert_param(IS_FL_CRC_INPUT_REFLECTE_MODE(CRC_InitStruct->reflectIn)); + assert_param(IS_FL_CRC_OUPUT_REFLECTE_MODE(CRC_InitStruct->reflectOut)); + FL_CMU_EnableGroup2BusClock(FL_CMU_GROUP2_BUSCLK_CRC); + FL_CRC_SetCalculateMode(CRCx, CRC_InitStruct->calculatMode); + FL_CRC_SetInputInvertMode(CRCx, CRC_InitStruct->reflectIn); + FL_CRC_SetOutputInvertMode(CRCx, CRC_InitStruct->reflectOut); + FL_CRC_SetPolynomialWidth(CRCx, CRC_InitStruct->polynomialWidth); + FL_CRC_WriteXORValue(CRCx, CRC_InitStruct->xorReg); + FL_CRC_WritePolynominalParam(CRCx, CRC_InitStruct->polynomial); + FL_CRC_WriteInitialValue(CRCx, CRC_InitStruct->initVal); + FL_CRC_SetDataWidth(CRCx, CRC_InitStruct->dataWidth); + if(CRC_InitStruct->xorRegState == FL_ENABLE) + { + FL_CRC_EnableOutputXOR(CRCx); + } + else + { + FL_CRC_DisableOutputXOR(CRCx); + } + return FL_PASS; +} + + +/** + * @brief 设置 CRC_InitStruct 为默认配置 + * + * @param CRC_InitStruct 指向需要将值设置为默认配置的结构体 @ref FL_CRC_InitTypeDef 结构体 + * + * @retval None + */ + +void FL_CRC_StructInit(FL_CRC_InitTypeDef *CRC_InitStruct) +{ + CRC_InitStruct->polynomial = 0x00000000; + CRC_InitStruct->polynomialWidth = FL_CRC_POLYNOMIAL_16B; + CRC_InitStruct->dataWidth = FL_CRC_DATA_WIDTH_8B; + CRC_InitStruct->calculatMode = FL_CRC_CALCULATE_SERIAL; + CRC_InitStruct->reflectIn = FL_CRC_INPUT_INVERT_NONE; + CRC_InitStruct->reflectOut = FL_CRC_OUPUT_INVERT_NONE; + CRC_InitStruct->xorReg = 0x00000000; + CRC_InitStruct->xorRegState = FL_DISABLE; +} + + +/** + * @} + */ + +#endif /* FL_CRC_DRIVER_ENABLED */ + +/** + * @} + */ + +/** + * @} + */ + +/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/ diff --git a/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_dac.c b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_dac.c new file mode 100644 index 0000000..3ff09eb --- /dev/null +++ b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_dac.c @@ -0,0 +1,224 @@ + /** + **************************************************************************************************** + * @file fm33lg0xx_fl_dac.c + * @author FMSH Application Team + * @brief Src file of DAC FL Module + **************************************************************************************************** + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + +/* Includes ------------------------------------------------------------------*/ +#include "fm33lg0xx_fl.h" + +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @addtogroup DAC + * @{ + */ + +#ifdef FL_DAC_DRIVER_ENABLED + +/* Private macros ------------------------------------------------------------*/ +/** @addtogroup DAC_FL_Private_Macros + * @{ + */ + +#define IS_FL_DAC_INSTANCE(INSTANCE) ((INSTANCE) == DAC) + +#define IS_FL_DAC_TRIGGERMODE(__VALUE__) (((__VALUE__) == FL_DISABLE)||\ + ((__VALUE__) == FL_ENABLE)) + +#define IS_FL_DAC_TRIGGE_SOURCE(__VALUE__) (((__VALUE__) == FL_DAC_TRGI_SOFTWARE)||\ + ((__VALUE__) == FL_DAC_TRGI_ATIM)||\ + ((__VALUE__) == FL_DAC_TRGI_GPTIM1)||\ + ((__VALUE__) == FL_DAC_TRGI_GPTIM2)||\ + ((__VALUE__) == FL_DAC_TRGI_BSTIM16)||\ + ((__VALUE__) == FL_DAC_TRGI_LPTIM16)||\ + ((__VALUE__) == FL_DAC_TRGI_EXTI0)||\ + ((__VALUE__) == FL_DAC_TRGI_EXTI4)||\ + ((__VALUE__) == FL_DAC_TRGI_EXTI8)||\ + ((__VALUE__) == FL_DAC_TRGI_EXTI12)) + +#define IS_FL_DAC_SAMPLEHOLDMODE(__VALUE__) (((__VALUE__) == FL_DISABLE)||\ + ((__VALUE__) == FL_ENABLE)) + +#define IS_FL_DAC_HOLD_TIME(__VALUE__) (((__VALUE__) <= 0XFFFF)) + +#define IS_FL_DAC_SAMPLE_TIME(__VALUE__) (((__VALUE__) <= 0XFF)) + +#define IS_FL_DAC_BUFFERMODE(__VALUE__) (((__VALUE__) == FL_DISABLE)||\ + ((__VALUE__) == FL_ENABLE)) + +#define IS_FL_DAC_SWITCHMODE(__VALUE__) (((__VALUE__) == FL_DISABLE)||\ + ((__VALUE__) == FL_ENABLE)) + +#define IS_FL_DAC_DMAMODE(__VALUE__) (((__VALUE__) == FL_DISABLE)||\ + ((__VALUE__) == FL_ENABLE)) + +/** + * @} + */ + +/* Exported functions --------------------------------------------------------*/ +/** @addtogroup CRC_FL_EF_Init + * @{ + */ + +/** + * @brief 恢复对应的DAC入口地址寄存器为默认值 + * + * @param DACx 外设入口地址 + * + * @retval ErrorStatus枚举值 + * -FL_FAIL 配置过程发生错误 + * -FL_PASS DAC配置成功 + */ +FL_ErrorStatus FL_DAC_DeInit(DAC_Type *DACx) +{ + FL_ErrorStatus status = FL_PASS; + /* 入口合法性检查 */ + assert_param(IS_FL_DAC_INSTANCE(DACx)); + /* 外设复位使能 */ + FL_RMU_EnablePeripheralReset(RMU); + FL_RMU_EnableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_DAC); + FL_RMU_DisableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_DAC); + FL_RMU_DisablePeripheralReset(RMU); + return status; +} +/** + * @brief 初始化DACx指定的入口地址的外设寄存器 + * @param DACx 外设入口地址 + * @param DAC_InitStruct 向一FL_DAC_InitTypeDef结构体，它包含指定DAC外设的配置信息 + * + * @retval ErrorStatus枚举值 + * -FL_FAIL 配置过程发生错误 + * -FL_PASS DAC配置成功 + */ +FL_ErrorStatus FL_DAC_Init(DAC_Type *DACx, FL_DAC_InitTypeDef *DAC_InitStruct) +{ + FL_ErrorStatus status = FL_PASS; + /* 入口合法性检查 */ + assert_param(IS_FL_DAC_INSTANCE(DACx)); + assert_param(IS_FL_DAC_TRIGGERMODE(DAC_InitStruct->triggerMode)); + assert_param(IS_FL_DAC_TRIGGE_SOURCE(DAC_InitStruct->triggerSource)); + assert_param(IS_FL_DAC_SAMPLEHOLDMODE(DAC_InitStruct->sampleHoldMode)); + assert_param(IS_FL_DAC_HOLD_TIME(DAC_InitStruct->holdTime)); + assert_param(IS_FL_DAC_SAMPLE_TIME(DAC_InitStruct->sampleTime)); + assert_param(IS_FL_DAC_BUFFERMODE(DAC_InitStruct->bufferMode)); + assert_param(IS_FL_DAC_SWITCHMODE(DAC_InitStruct->switchMode)); + FL_RMU_EnablePeripheralReset(RMU); + FL_RMU_EnableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_DAC); + FL_RMU_DisableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_DAC); + FL_RMU_DisablePeripheralReset(RMU); + FL_CMU_EnableGroup2BusClock(FL_CMU_GROUP2_BUSCLK_DAC); + FL_DAC_Disable(DACx); + if(FL_DAC_IsEnabled(DACx) == 0U) + { + /* 采样保持使能配置 */ + if(DAC_InitStruct->sampleHoldMode) + { + FL_DAC_WriteSamplingTime(DACx, DAC_InitStruct->sampleTime); + FL_DAC_WriteHoldingTime(DACx, DAC_InitStruct->holdTime); + FL_DAC_EnableSampleHoldMode(DACx); + } + else + { FL_DAC_DisableSampleHoldMode(DACx); } + /* 触发模式使能配置 */ + if(DAC_InitStruct->triggerMode) + { + FL_DAC_SetTriggerSource(DACx, DAC_InitStruct->triggerSource); + FL_DAC_EnableTriggerMode(DACx); + } + else + { FL_DAC_DisableTriggerMode(DACx); } + /* buffer使能配置 */ + if(DAC_InitStruct->bufferMode) + { FL_DAC_EnableOutputBuffer(DACx); } + else + { FL_DAC_DisableOutputBuffer(DACx); } + /* SWITCH使能配置 */ + if(DAC_InitStruct->switchMode) + { FL_DAC_EnableFeedbackSwitch(DACx); } + else + { FL_DAC_DisableFeedbackSwitch(DACx); } + } + else + { + status = FL_FAIL; + } + return status; +} + + +/** + * @brief 设置 DAC_InitStruct 为默认配置 + * @param DAC_InitStruct 指向需要将值设置为默认配置的结构体 @ref FL_DAC_InitTypeDef 结构体 + * + * @retval None + */ +void FL_DAC_StructInit(FL_DAC_InitTypeDef *DAC_InitStruct) +{ + DAC_InitStruct->bufferMode = FL_ENABLE; + DAC_InitStruct->switchMode = FL_ENABLE; + DAC_InitStruct->triggerMode = FL_DISABLE; + DAC_InitStruct->triggerSource = FL_DAC_TRGI_SOFTWARE; + DAC_InitStruct->sampleHoldMode = FL_DISABLE; + DAC_InitStruct->sampleTime = 0xFF; + DAC_InitStruct->holdTime = 0X0; +} + +/** + * @} + */ + +#endif /* FL_DAC_DRIVER_ENABLED */ + +/** + * @} + */ + +/** + * @} + */ + +/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/ + + diff --git a/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_divas.c b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_divas.c new file mode 100644 index 0000000..4ffee4b --- /dev/null +++ b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_divas.c @@ -0,0 +1,207 @@ + /** + ******************************************************************************************************* + * @file fm33lg0xx_fl_divas.c + * @author FMSH Application Team + * @brief Src file of DIVAS FL Module + ******************************************************************************************************* + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + +/* Includes ------------------------------------------------------------------*/ +#include "fm33lg0xx_fl.h" + +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @addtogroup DIVAS + * @{ + */ + +#ifdef FL_DIVAS_DRIVER_ENABLED + +/* Private macros ------------------------------------------------------------*/ +/** @addtogroup DIVAS_FL_Private_Macros + * @{ + */ +#define IS_DIVAS_ALL_INSTANCE(INTENCE) ((INTENCE) == DIVAS) + +#define IS_FL_DIVAS_DIVISOR(__VALUE__) (((__VALUE__) != 0)) + +/** + * @} + */ + +/* Exported functions --------------------------------------------------------*/ +/** @addtogroup DIVAS_FL_EF_Init + * @{ + */ + +/** + * @brief 复位对应HDIV控制寄存器. + * + * @param DIVASx 外设入口地址 + * + * @retval FL_ErrorStatus枚举值 + * -FL_PASS 配置成功 + * -FL_FAIL 配置过程发生错误 + */ +FL_ErrorStatus FL_DIVAS_DeInit(DIVAS_Type *DIVASx) +{ + /* 入口参数检查 */ + assert_param(IS_DIVAS_ALL_INSTANCE(DIVASx)); + /* 外设复位使能 */ + FL_RMU_EnablePeripheralReset(RMU); + /* 恢复寄存器值为默认值 */ + FL_RMU_EnableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_DIVAS); + FL_RMU_DisableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_DIVAS); + /* 关闭总线时钟 */ + FL_CMU_DisableGroup2BusClock(FL_CMU_GROUP2_BUSCLK_DIVAS); + /* 锁定外设复位功能 */ + FL_RMU_DisablePeripheralReset(RMU); + return FL_PASS; +} + +/** + * @brief 根据 初始化对应外设DIVAS. + * + * @param DIVASx 外设入口地址 + * + * @retval FL_ErrorStatus枚举值 + * -FL_PASS 配置成功 + * -FL_FAIL 配置过程发生错误 + */ +FL_ErrorStatus FL_DIVAS_Init(DIVAS_Type *DIVASx) +{ + /* 入口参数检查 */ + assert_param(IS_DIVAS_ALL_INSTANCE(DIVASx)); + /* 使能时钟总线 */ + FL_CMU_EnableGroup2BusClock(FL_CMU_GROUP2_BUSCLK_DIVAS); + return FL_PASS; +} +/** + * @brief 硬件除法器计算函数 + * + * @param DIVASx 外设入口地址 + * @param DivisorEnd 32位有符号被除数 + * @param Divisor 16位有符号除数，注意不能为0 + * @param Quotient 指向 @ref int32_t 指针 保存商的地址 + * @param Residue 指向 @ref int16_t 指针 保存余数的地址 + * + * @retval 计算正确性与否 + * -0 计算结果正确 + * -非0 计算过程发生错误 + */ +uint32_t FL_DIVAS_Hdiv_Calculation(DIVAS_Type *DIVASx, int32_t DivisorEnd, int16_t Divisor, int32_t *Quotient, int16_t *Residue) +{ + uint32_t TimeOut ; + FL_DIVAS_SetMode(DIVASx, FL_DIVAS_MODE_DIV); + FL_DIVAS_WriteOperand(DIVASx, (uint32_t)DivisorEnd); + FL_DIVAS_WriteDivisor(DIVASx, (uint32_t)Divisor); + if(FL_DIVAS_IsActiveFlag_DividedZero(DIVASx)) + { + /*除数为0 */ + *Quotient = 0; + *Residue = 0; + return 1; + } + TimeOut = FL_DIVAS_SR_BUSY_TIMEOUT; + while(FL_DIVAS_IsActiveFlag_Busy(DIVASx)) + { + TimeOut--; + if(TimeOut == 0) + { + /* 计算超时*/ + *Quotient = 0; + *Residue = 0; + return 3; + } + } + *Quotient = FL_DIVAS_ReadQuotient(DIVASx); + *Residue = FL_DIVAS_ReadResidue(DIVASx); + return 0; +} + +/** + * @brief 硬件开方计算函数 + * + * @param DIVASx 外设入口地址 + * @param Root 32bit被开方数 + * @param Result 指向 @ref int16_t 指针 保存结果开方根 + * + * @retval 计算正确性与否 + * -0 计算结果正确 + * -非0 计算过程发生错误 + */ +uint32_t FL_DIVAS_Root_Calculation(DIVAS_Type *DIVASx, uint32_t Root, uint16_t *Result) +{ + uint32_t TimeOut ; + FL_DIVAS_SetMode(DIVASx, FL_DIVAS_MODE_ROOT); + FL_DIVAS_WriteOperand(DIVASx, Root); + TimeOut = FL_DIVAS_SR_BUSY_TIMEOUT; + while(FL_DIVAS_IsActiveFlag_Busy(DIVASx)) + { + TimeOut --; + if(TimeOut == 0) + { + /* 计算超时*/ + *Result = 0; + return 1; + } + } + *Result = FL_DIVAS_ReadRoot(DIVASx); + return 0; +} + +/** + * @} + */ + +#endif /* FL_DIVAS_DRIVER_ENABLED */ + +/** + * @} + */ + +/** + * @} + */ + +/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/ + diff --git a/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_dma.c b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_dma.c new file mode 100644 index 0000000..2b32536 --- /dev/null +++ b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_dma.c @@ -0,0 +1,254 @@ + /** + ******************************************************************************************************* + * @file fm33lg0xx_fl_dma.c + * @author FMSH Application Team + * @brief Src file of DMA FL Module + ******************************************************************************************************* + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + +/* Includes ------------------------------------------------------------------*/ +#include "fm33lg0xx_fl.h" + +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @addtogroup DMA + * @{ + */ + +#ifdef FL_DMA_DRIVER_ENABLED + +/* Private macros ------------------------------------------------------------*/ +/** @addtogroup DMA_FL_Private_Macros + * @{ + */ +#define IS_FL_DMA_INSTANCE(INTANCE) ((INTANCE) == DMA) + +#define IS_FL_DMA_PRIORITY(__VALUE__) (((__VALUE__) == FL_DMA_PRIORITY_LOW)||\ + ((__VALUE__) == FL_DMA_PRIORITY_MEDIUM)||\ + ((__VALUE__) == FL_DMA_PRIORITY_HIGH)||\ + ((__VALUE__) == FL_DMA_PRIORITY_VERYHIGH)) + +#define IS_FL_DMA_CIRC_MODE(__VALUE__) (((__VALUE__) == FL_DISABLE)||\ + ((__VALUE__) == FL_ENABLE)) + + +#define IS_FL_DMA_DIRECION(__VALUE__) (((__VALUE__) == FL_DMA_DIR_PERIPHERAL_TO_RAM)||\ + ((__VALUE__) == FL_DMA_DIR_RAM_TO_PERIPHERAL)||\ + ((__VALUE__) == FL_DMA_DIR_FLASH_TO_RAM)||\ + ((__VALUE__) == FL_DMA_DIR_RAM_TO_FLASH)) + + +#define IS_FL_DMA_DATA_SIZE(__VALUE__) (((__VALUE__) == FL_DMA_BANDWIDTH_8B)||\ + ((__VALUE__) == FL_DMA_BANDWIDTH_16B)||\ + ((__VALUE__) == FL_DMA_BANDWIDTH_32B)) + +#define IS_FL_DMA_INCMODE(__VALUE__) (((__VALUE__) == FL_DMA_MEMORY_INC_MODE_INCREASE)||\ + ((__VALUE__) == FL_DMA_MEMORY_INC_MODE_DECREASE) ||\ + ((__VALUE__) == FL_DMA_CH7_RAM_INC_MODE_INCREASE)||\ + ((__VALUE__) == FL_DMA_CH7_RAM_INC_MODE_DECREASE)||\ + ((__VALUE__) == FL_DMA_CH7_FLASH_INC_MODE_INCREASE)||\ + ((__VALUE__) == FL_DMA_CH7_FLASH_INC_MODE_DECREASE)) + +#define IS_FL_DMA_PERIPH(__VALUE__) (((__VALUE__) == FL_DMA_PERIPHERAL_FUNCTION1)||\ + ((__VALUE__) == FL_DMA_PERIPHERAL_FUNCTION2)||\ + ((__VALUE__) == FL_DMA_PERIPHERAL_FUNCTION3)||\ + ((__VALUE__) == FL_DMA_PERIPHERAL_FUNCTION4)||\ + ((__VALUE__) == FL_DMA_PERIPHERAL_FUNCTION5)||\ + ((__VALUE__) == FL_DMA_PERIPHERAL_FUNCTION6)||\ + ((__VALUE__) == FL_DMA_PERIPHERAL_FUNCTION7)||\ + ((__VALUE__) == FL_DMA_PERIPHERAL_FUNCTION8)) +/** + * @} + */ + +/* Exported functions --------------------------------------------------------*/ +/** @addtogroup DMA_FL_EF_Init + * @{ + */ + +/** + * @brief 复位对应DMA寄存器. + * @param DMAx + * @retval ErrorStatus枚举值: + * -FL_PASS 外设寄存器值恢复复位值 + * -FL_FAIL 未成功执行 + */ +FL_ErrorStatus FL_DMA_DeInit(DMA_Type *DMAx) +{ + assert_param(IS_FL_DMA_INSTANCE(DMAx)); + /* 使能外设复位 */ + FL_RMU_EnablePeripheralReset(RMU); + /* 复位外设寄存器 */ + FL_RMU_EnableResetAHBPeripheral(RMU, FL_RMU_RSTAHB_DMA); + FL_RMU_DisableResetAHBPeripheral(RMU, FL_RMU_RSTAHB_DMA); + /* 关闭外设总线始时钟和工作时钟 */ + FL_CMU_DisableGroup2BusClock(FL_CMU_GROUP2_BUSCLK_DMA); + /* 锁定外设复位 */ + FL_RMU_DisablePeripheralReset(RMU); + return FL_PASS; +} +/** + * @brief 根据 DMA_InitStruct 的配置信息初始化对应外设入口地址的寄存器值. + * @param DMAx DMAx + * @param DMA_InitStruct 指向一个 @ref FL_DMA_InitTypeDef 结构体 + * 其中包含了外设的相关配置信息. + * @param Channel This parameter can be one of the following values: + * @arg @ref FL_DMA_CHANNEL_0 + * @arg @ref FL_DMA_CHANNEL_1 + * @arg @ref FL_DMA_CHANNEL_2 + * @arg @ref FL_DMA_CHANNEL_3 + * @arg @ref FL_DMA_CHANNEL_4 + * @arg @ref FL_DMA_CHANNEL_5 + * @arg @ref FL_DMA_CHANNEL_6 + * @arg @ref FL_DMA_CHANNEL_7 + * @retval ErrorStatus枚举值 + * -FL_FAIL 配置过程发生错误 + * -FL_PASS 配置成功 + */ +FL_ErrorStatus FL_DMA_Init(DMA_Type *DMAx, FL_DMA_InitTypeDef *initStruct, uint32_t channel) +{ + /* 参数检查 */ + assert_param(IS_FL_DMA_INSTANCE(DMAx)); + assert_param(IS_FL_DMA_PRIORITY(initStruct->priority)); + assert_param(IS_FL_DMA_CIRC_MODE(initStruct->circMode)); + assert_param(IS_FL_DMA_DIRECION(initStruct->direction)); + assert_param(IS_FL_DMA_DATA_SIZE(initStruct->dataSize)); + assert_param(IS_FL_DMA_INCMODE(initStruct->memoryAddressIncMode)); + /* 开启时钟 */ + FL_CMU_EnableGroup2BusClock(FL_CMU_GROUP2_BUSCLK_DMA); + /* 配置通道优先级 */ + FL_DMA_SetPriority(DMAx, initStruct->priority, channel); + /* RAM地址方向 */ + FL_DMA_SetMemoryIncrementMode(DMAx, initStruct->memoryAddressIncMode, channel); + /* 传输方向 */ + FL_DMA_SetTransmissionDirection(DMAx, initStruct->direction, channel); + /* 数据宽度 */ + FL_DMA_SetBandwidth(DMAx, initStruct->dataSize, channel); + /* 循环模式 */ + if(initStruct->circMode == FL_ENABLE) + { + if(channel == FL_DMA_CHANNEL_7) + { + return FL_FAIL; + } + FL_DMA_EnableCircularMode(DMAx, channel); + } + else + { + FL_DMA_DisableCircularMode(DMAx, channel); + } + /* 如果是通道7 外设地址实际就是FLASH地址，因此这里针对通道7做了单独处理 */ + if(channel != FL_DMA_CHANNEL_7) + { + assert_param(IS_FL_DMA_PERIPH(initStruct->periphAddress)); + FL_DMA_SetPeripheralMap(DMAx, initStruct->periphAddress, channel); + } + else + { + FL_DMA_SetFlashAddrIncremental(DMAx, initStruct->flashAddressIncMode); + } + return FL_PASS; +} +/** + * @brief 设置 CRC_InitStruct 为默认配置 + * @param CRC_InitStruct 指向需要将值设置为默认配置的结构体 @ref FL_CRC_InitTypeDef 结构体 + * + * @retval None + */ + +void FL_DMA_StructInit(FL_DMA_InitTypeDef *initStruct) +{ + initStruct->circMode = FL_DISABLE; + initStruct->dataSize = FL_DMA_BANDWIDTH_8B; + initStruct->direction = FL_DMA_DIR_PERIPHERAL_TO_RAM; + initStruct->periphAddress = FL_DMA_PERIPHERAL_FUNCTION1; + initStruct->priority = FL_DMA_PRIORITY_LOW; + initStruct->memoryAddressIncMode = FL_DMA_MEMORY_INC_MODE_INCREASE; +} + +/** + * @brief 启动一次DMA传输. + * @param DMAx DMAx + * @param configStruct 指向一个 @ref FL_DMA_ConfigTypeDef 结构体 + * 其中包含了外设的相关配置信息. + * @param Channel This parameter can be one of the following values: + * @arg @ref FL_DMA_CHANNEL_0 + * @arg @ref FL_DMA_CHANNEL_1 + * @arg @ref FL_DMA_CHANNEL_2 + * @arg @ref FL_DMA_CHANNEL_3 + * @arg @ref FL_DMA_CHANNEL_4 + * @arg @ref FL_DMA_CHANNEL_5 + * @arg @ref FL_DMA_CHANNEL_6 + * @arg @ref FL_DMA_CHANNEL_7 + * @retval ErrorStatus枚举值 + * -FL_FAIL 过程发生错误可能是超时也可能是地址非法 + * -FL_PASS 成功 + */ +FL_ErrorStatus FL_DMA_StartTransmission(DMA_Type *DMAx, FL_DMA_ConfigTypeDef *configStruct, uint32_t channel) +{ + /* 配置传输个数 */ + FL_DMA_WriteTransmissionSize(DMAx, configStruct->transmissionCount, channel); + /* 配置Memory地址 */ + FL_DMA_WriteMemoryAddress(DMAx, configStruct->memoryAddress, channel); + /* 清除通道中断标志位 */ + FL_DMA_ClearFlag_TransferHalfComplete(DMAx, channel); + FL_DMA_ClearFlag_TransferComplete(DMAx, channel); + /* 使能DMA通道使能开关 */ + FL_DMA_EnableChannel(DMAx, channel); + return FL_PASS; +} + +/** + * @} + */ + +#endif /* FL_DIVAS_DRIVER_ENABLED */ + +/** + * @} + */ + +/** + * @} + */ + +/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/ diff --git a/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_exti.c b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_exti.c new file mode 100644 index 0000000..89087c1 --- /dev/null +++ b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_exti.c @@ -0,0 +1,288 @@ + /** + **************************************************************************************************** + * @file fm33lg0xx_fl_exti.c + * @author FMSH Application Team + * @brief Src file of EXTI FL Module + **************************************************************************************************** + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + +/* Includes ------------------------------------------------------------------*/ +#include "fm33lg0xx_fl.h" + +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @addtogroup EXTI + * @{ + */ + +#ifdef FL_EXTI_DRIVER_ENABLED + +/* Private macros ------------------------------------------------------------*/ +/** @addtogroup EXTI_FL_Private_Macros + * @{ + */ + +#define IS_EXTI_ALL_INSTANCE(INSTANCE) (((INSTANCE) == FL_GPIO_EXTI_LINE_0)||\ + ((INSTANCE) == FL_GPIO_EXTI_LINE_1)||\ + ((INSTANCE) == FL_GPIO_EXTI_LINE_2)||\ + ((INSTANCE) == FL_GPIO_EXTI_LINE_3)||\ + ((INSTANCE) == FL_GPIO_EXTI_LINE_4)||\ + ((INSTANCE) == FL_GPIO_EXTI_LINE_5)||\ + ((INSTANCE) == FL_GPIO_EXTI_LINE_6)||\ + ((INSTANCE) == FL_GPIO_EXTI_LINE_7)||\ + ((INSTANCE) == FL_GPIO_EXTI_LINE_8)||\ + ((INSTANCE) == FL_GPIO_EXTI_LINE_9)||\ + ((INSTANCE) == FL_GPIO_EXTI_LINE_10)||\ + ((INSTANCE) == FL_GPIO_EXTI_LINE_11)||\ + ((INSTANCE) == FL_GPIO_EXTI_LINE_12)||\ + ((INSTANCE) == FL_GPIO_EXTI_LINE_13)||\ + ((INSTANCE) == FL_GPIO_EXTI_LINE_14)||\ + ((INSTANCE) == FL_GPIO_EXTI_LINE_15)||\ + ((INSTANCE) == FL_GPIO_EXTI_LINE_16)||\ + ((INSTANCE) == FL_GPIO_EXTI_LINE_17)||\ + ((INSTANCE) == FL_GPIO_EXTI_LINE_18)) + +#define IS_EXTI_CLK_SOURCE(__VALUE__) (((__VALUE__) == FL_CMU_EXTI_CLK_SOURCE_HCLK)||\ + ((__VALUE__) == FL_CMU_EXTI_CLK_SOURCE_LSCLK)) + +#define IS_EXTI_INPUT_GROUP(__VALUE__) (((__VALUE__) == FL_GPIO_EXTI_INPUT_GROUP0)||\ + ((__VALUE__) == FL_GPIO_EXTI_INPUT_GROUP1)||\ + ((__VALUE__) == FL_GPIO_EXTI_INPUT_GROUP2)||\ + ((__VALUE__) == FL_GPIO_EXTI_INPUT_GROUP3)) + +#define IS_EXTI_TRIG_EDGE(__VALUE__) (((__VALUE__) == FL_GPIO_EXTI_TRIGGER_EDGE_RISING)||\ + ((__VALUE__) == FL_GPIO_EXTI_TRIGGER_EDGE_FALLING)||\ + ((__VALUE__) == FL_GPIO_EXTI_TRIGGER_EDGE_BOTH)) + +#define IS_EXTI_FILTER(__VALUE__) (((__VALUE__) == FL_ENABLE)||\ + ((__VALUE__) == FL_DISABLE)) + +/** + * @} + */ + +/* Private consts ------------------------------------------------------------*/ +/** @addtogroup EXTI_FL_Private_Consts + * @{ + */ + +typedef void (*pSetExtiLineFunc)(GPIO_COMMON_Type *, uint32_t); +static const pSetExtiLineFunc setExtiLineFuncs[] = +{ + FL_GPIO_SetExtiLine0, + FL_GPIO_SetExtiLine1, + FL_GPIO_SetExtiLine2, + FL_GPIO_SetExtiLine3, + FL_GPIO_SetExtiLine4, + FL_GPIO_SetExtiLine5, + FL_GPIO_SetExtiLine6, + FL_GPIO_SetExtiLine7, + FL_GPIO_SetExtiLine8, + FL_GPIO_SetExtiLine9, + FL_GPIO_SetExtiLine10, + FL_GPIO_SetExtiLine11, + FL_GPIO_SetExtiLine12, + FL_GPIO_SetExtiLine13, + FL_GPIO_SetExtiLine14, + FL_GPIO_SetExtiLine15, + FL_GPIO_SetExtiLine16, + FL_GPIO_SetExtiLine17, + FL_GPIO_SetExtiLine18, +}; + +typedef void (*pSetTrigEdgeFunc)(GPIO_COMMON_Type *, uint32_t, uint32_t); +static const pSetTrigEdgeFunc setTrigEdgeFuncs[] = +{ + FL_GPIO_SetTriggerEdge0, + FL_GPIO_SetTriggerEdge1, +}; + +/** + * @} + */ + +/* Exported functions --------------------------------------------------------*/ +/** @addtogroup EXTI_FL_EF_Init + * @{ + */ + +/** + * @brief EXTI通用配置设置 + * + * @param EXTI_CommonInitStruct 指向 @ref FL_EXTI_CommonInitTypeDef 类型的结构体，它包含EXTI外设通用配置信息 + * + * @retval ErrorStatus枚举值 + * -FL_FAIL 配置过程发生错误 + * -FL_PASS EXTI配置成功 + */ +FL_ErrorStatus FL_EXTI_CommonInit(FL_EXTI_CommonInitTypeDef *EXTI_CommonInitStruct) +{ + assert_param(IS_EXTI_CLK_SOURCE(EXTI_CommonInitStruct->clockSource)); + /* 使能IO时钟寄存器总线时钟 */ + FL_CMU_EnableGroup1BusClock(FL_CMU_GROUP1_BUSCLK_PAD); + /* 使能并配置外部中断时钟源 */ + FL_CMU_EnableGroup3OperationClock(FL_CMU_GROUP3_OPCLK_EXTI); + FL_CMU_SetEXTIClockSource(EXTI_CommonInitStruct->clockSource); + return FL_PASS; +} + +/** + * @brief 复位EXTI通用配置设置 + * + * @retval ErrorStatus枚举值 + * -FL_FAIL 发生错误 + * -FL_PASS EXTI通用设置复位成功 + */ +FL_ErrorStatus FL_EXTI_CommonDeinit(void) +{ + /* 关闭外部中断时钟源 */ + FL_CMU_DisableGroup3OperationClock(FL_CMU_GROUP3_OPCLK_EXTI); + return FL_PASS; +} + +/** + * @brief 设置 EXTI_CommonInitStruct 为默认配置 + * @param EXTI_CommonInitStruct 指向需要将值设置为默认配置的结构体 @ref FL_EXTI_CommonInitTypeDef 结构体 + * + * @retval None + */ +void FL_EXTI_CommonStructInit(FL_EXTI_CommonInitTypeDef *EXTI_CommonInitStruct) +{ + EXTI_CommonInitStruct->clockSource = FL_CMU_EXTI_CLK_SOURCE_LSCLK; +} + +/** + * @brief EXTI配置设置 + * + * @param extiLineX 外设入口地址 + * @param EXTI_InitStruct 指向 @ref FL_EXTI_InitTypeDef 类型的结构体，它包含EXTI外设配置信息 + * + * @retval ErrorStatus枚举值 + * -FL_FAIL 配置过程发生错误 + * -FL_PASS EXTI配置成功 + */ +FL_ErrorStatus FL_EXTI_Init(uint32_t extiLineX, FL_EXTI_InitTypeDef *EXTI_InitStruct) +{ + uint8_t extiLineId; + uint32_t tmpExtiLineX; + uint32_t i = 0; + /* 通过内核时钟计算200us延时的计数个数 */ + uint32_t temp = SystemCoreClock*2/10000 ; + /* 检查参数合法性 */ + assert_param(IS_EXTI_ALL_INSTANCE(extiLineX)); + assert_param(IS_EXTI_INPUT_GROUP(EXTI_InitStruct->input)); + assert_param(IS_EXTI_TRIG_EDGE(EXTI_InitStruct->triggerEdge)); + assert_param(IS_EXTI_FILTER(EXTI_InitStruct->filter)); + /* 获取EXTI中断线对应id号 */ + tmpExtiLineX = extiLineX; + for(extiLineId = 0; tmpExtiLineX != FL_GPIO_EXTI_LINE_0; tmpExtiLineX >>= 1, extiLineId++); + /* 设置中断线连接的IO */ + setExtiLineFuncs[extiLineId](GPIO, EXTI_InitStruct->input << (2 * (extiLineId % 16))); + /* 设置数字滤波 */ + EXTI_InitStruct->filter == FL_ENABLE ? FL_GPIO_EnableDigitalFilter(GPIO, extiLineX) : FL_GPIO_DisableDigitalFilter(GPIO, extiLineX); + /* 设置中断线触发边沿 */ + setTrigEdgeFuncs[extiLineId / 16](GPIO, extiLineX, EXTI_InitStruct->triggerEdge); + /* 等待至少周期6个LSCLK周期，约200us */ + for(i=0;i>= 1, extiLineId++); + /* 清除外部中断标志 */ + FL_GPIO_ClearFlag_EXTI(GPIO, extiLineX); + /* 中断线触发边沿禁止 */ + setTrigEdgeFuncs[extiLineId / 16](GPIO, extiLineX, FL_GPIO_EXTI_TRIGGER_EDGE_DISABLE); + /* 禁止数字滤波 */ + FL_GPIO_DisableDigitalFilter(GPIO, extiLineX); + return FL_PASS; +} + +/** + * @brief 设置 EXTI_InitStruct 为默认配置 + * @param EXTI_InitStruct 指向需要将值设置为默认配置的结构体 @ref FL_EXTI_InitTypeDef 结构体 + * + * @retval None + */ +void FL_EXTI_StructInit(FL_EXTI_InitTypeDef *EXTI_InitStruct) +{ + EXTI_InitStruct->filter = FL_DISABLE; + EXTI_InitStruct->input = FL_GPIO_EXTI_INPUT_GROUP0; + EXTI_InitStruct->triggerEdge = FL_GPIO_EXTI_TRIGGER_EDGE_RISING; +} + +/** + * @} + */ + +#endif /* FL_EXTI_DRIVER_ENABLED */ + +/** + * @} + */ + +/** + * @} + */ + +/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/ diff --git a/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_flash.c b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_flash.c new file mode 100644 index 0000000..8942958 --- /dev/null +++ b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_flash.c @@ -0,0 +1,593 @@ + /** + **************************************************************************************************** + * @file fm33lg0xx_fl_flash.c + * @author FMSH Application Team + * @brief Src file of FLASH FL Module + **************************************************************************************************** + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + +/* Includes ------------------------------------------------------------------*/ +#include "fm33lg0xx_fl.h" + +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @addtogroup FLASH + * @{ + */ + +#ifdef FL_FLASH_DRIVER_ENABLED + +/* Private macros ------------------------------------------------------------*/ +/** @addtogroup GPIO_FL_Private_Macros + * @{ + */ + +#define IS_FLASH_ALL_INSTANCE(INTENCE) (((INTENCE) == FLASH)) + +#define IS_FL_FLASH_PAGE_NUM(__VALUE__) ((uint32_t)(__VALUE__) < FL_FLASH_MAX_PAGE_NUM) + +#define IS_FL_FLASH_SECTOR_NUM(__VALUE__) ((uint32_t)(__VALUE__) < FL_FLASH_MAX_SECTOR_NUM) + +#define IS_FL_FLASH_MAX_ADDR(__VALUE__) ((uint32_t)(__VALUE__) <= FL_FLASH_ADDR_MAXPROGRAM) + +#define IS_FL_FLASH_MAX_PAGE(__VALUE__) ((uint32_t)(__VALUE__) < FL_FLASH_MAX_PAGE_NUM) + +#define IS_FL_FLASH_MAX_SECTOR(__VALUE__) ((uint32_t)(__VALUE__) < FL_FLASH_MAX_SECTOR_NUM) +/** + * @} + */ + +/* Exported functions --------------------------------------------------------*/ +/** @addtogroup FLASH_FL_EF_Init + * @{ + */ + +/** + * @brief Flash 页擦除函数，一个页为512byte. + * @param FLASHx FLASH Port + * @param address 为需要擦除的页内任意地址，推荐使用页开始的首地址（字对齐） + * . + * @retval ErrorStatus枚举值 + * -FL_FAIL 擦写发生错误 + * -FL_PASS 擦写成功 + */ +FL_ErrorStatus FL_FLASH_PageErase(FLASH_Type *FLASHx, uint32_t address) +{ + uint32_t timeout = 0; + uint32_t primask; + FL_ErrorStatus ret = FL_PASS; + /* 入口参数检查 */ + assert_param(IS_FLASH_ALL_INSTANCE(FLASHx)); + assert_param(IS_FL_FLASH_MAX_ADDR((uint32_t)address)); + /*时钟使能*/ + FL_CMU_EnableGroup2BusClock(FL_CMU_GROUP2_BUSCLK_FLASH); + if((address % FL_FLASH_ADDRS_ALIGN) != 0) + { + /*地址未对齐*/ + return FL_FAIL; + } + if(FL_FLASH_GetFlashLockStatus(FLASHx) == FL_FLASH_KEY_STATUS_ERROR) + { + /*Flash 已经锁定，复位前无法操作*/ + return FL_FAIL; + } + FL_CMU_EnableGroup3OperationClock(FL_CMU_GROUP3_OPCLK_FLASH); + /*配置擦写类型*/ + FL_FLASH_SetFlashEraseType(FLASHx, FL_FLASH_ERASE_TYPE_PAGE); + /* 开始擦除页*/ + FL_FLASH_EnableErase(FLASHx); + /* Key 序列*/ + primask = __get_PRIMASK(); + __disable_irq(); + FL_FLASH_UnlockFlash(FLASHx, FL_FLASH_ERASE_KEY); + FL_FLASH_UnlockFlash(FLASHx, FL_FLASH_PGAE_ERASE_KEY); + __set_PRIMASK(primask); + FL_FLASH_ClearFlag_EraseComplete(FLASHx); + FL_FLASH_ClearFlag_ClockError(FLASHx); + FL_FLASH_ClearFlag_AuthenticationError(FLASHx); + /* 擦请求 */ + *((uint32_t *)address) = FL_FLASH_ERASE_REQUEST; + while(1) + { + timeout++; + if((timeout > FL_FLASH_ERASE_TIMEOUT)\ + || (FL_FLASH_IsActiveFlag_ClockError(FLASHx))\ + || (FL_FLASH_IsActiveFlag_KeyError(FLASHx))\ + || (FL_FLASH_IsActiveFlag_AuthenticationError(FLASHx))) + { + /* 超时或出现错误 */ + ret = FL_FAIL; + break; + } + else + if(FL_FLASH_IsActiveFlag_EraseComplete(FLASHx)) + { + /*编程成功*/ + FL_FLASH_ClearFlag_EraseComplete(FLASHx); + ret = FL_PASS; + break; + } + } + FL_FLASH_LockFlash(FLASHx); + FL_CMU_DisableGroup3OperationClock(FL_CMU_GROUP3_OPCLK_FLASH); + FL_CMU_DisableGroup2BusClock(FL_CMU_GROUP2_BUSCLK_FLASH); + return ret; +} + +/** + * @brief Flash 扇区擦除函数，一个扇区为2k byte. + * @param FLASHx FLASH Port + * @param address 为需要擦除的扇区内任意地址，推荐使用扇区开始的首地址（字对齐） + * . + * @retval ErrorStatus枚举值 + * -FL_FAIL 擦写发生错误 + * -FL_PASS 擦写成功 + */ +FL_ErrorStatus FL_FLASH_SectorErase(FLASH_Type *FLASHx, uint32_t address) +{ + uint32_t timeout = 0; + uint32_t primask; + FL_ErrorStatus ret = FL_PASS; + /* 入口参数检查 */ + assert_param(IS_FLASH_ALL_INSTANCE(FLASHx)); + assert_param(IS_FL_FLASH_MAX_ADDR((uint32_t)address)); + /*时钟使能*/ + FL_CMU_EnableGroup2BusClock(FL_CMU_GROUP2_BUSCLK_FLASH); + if((address % FL_FLASH_ADDRS_ALIGN) != 0) + { + /*地址未对齐*/ + return FL_FAIL; + } + if(FL_FLASH_GetFlashLockStatus(FLASHx) == FL_FLASH_KEY_STATUS_ERROR) + { + /*Flash 已经锁定，复位前无法操作*/ + return FL_FAIL; + } + FL_CMU_EnableGroup3OperationClock(FL_CMU_GROUP3_OPCLK_FLASH); + /*配置擦写类型*/ + FL_FLASH_SetFlashEraseType(FLASHx, FL_FLASH_ERASE_TYPE_SECTOR); + /* 开始擦除扇区*/ + FL_FLASH_EnableErase(FLASHx); + /* Key 序列*/ + primask = __get_PRIMASK(); + __disable_irq(); + FL_FLASH_UnlockFlash(FLASHx, FL_FLASH_ERASE_KEY); + FL_FLASH_UnlockFlash(FLASHx, FL_FLASH_SECTOR_ERASE_KEY); + __set_PRIMASK(primask); + FL_FLASH_ClearFlag_EraseComplete(FLASHx); + FL_FLASH_ClearFlag_ClockError(FLASHx); + FL_FLASH_ClearFlag_AuthenticationError(FLASHx); + /* 擦请求 */ + *((uint32_t *)address) = FL_FLASH_ERASE_REQUEST; + while(1) + { + timeout++; + if((timeout > FL_FLASH_ERASE_TIMEOUT)\ + || (FL_FLASH_IsActiveFlag_ClockError(FLASHx))\ + || (FL_FLASH_IsActiveFlag_KeyError(FLASHx))\ + || (FL_FLASH_IsActiveFlag_AuthenticationError(FLASHx))) + { + /* 超时或出现错误 */ + ret = FL_FAIL; + break; + } + else + if(FL_FLASH_IsActiveFlag_EraseComplete(FLASHx)) + { + /*编程成功*/ + FL_FLASH_ClearFlag_EraseComplete(FLASHx); + ret = FL_PASS; + break; + } + } + FL_FLASH_LockFlash(FLASHx); + FL_CMU_DisableGroup3OperationClock(FL_CMU_GROUP3_OPCLK_FLASH); + FL_CMU_DisableGroup2BusClock(FL_CMU_GROUP2_BUSCLK_FLASH); + return ret; +} + +/** + * @brief 单次编程函数，编程地址必须对齐到Word边界. + * @param FLASHx FLASH Port + * @param address 为需要编程的已经擦除过的扇区内任意地址，非对齐地址编程将触发fault。 + * + * @retval ErrorStatus枚举值 + * -FL_FAIL 擦写发生错误 + * -FL_PASS 擦写成功 + */ +FL_ErrorStatus FL_FLASH_Program_Word(FLASH_Type *FLASHx, uint32_t address, uint32_t data) +{ + uint32_t timeout = 0; + uint32_t primask; + FL_ErrorStatus ret = FL_PASS; + /* 入口参数检查 */ + assert_param(IS_FLASH_ALL_INSTANCE(FLASHx)); + assert_param(IS_FL_FLASH_MAX_ADDR((uint32_t)address)); + /*时钟使能*/ + FL_CMU_EnableGroup2BusClock(FL_CMU_GROUP2_BUSCLK_FLASH); + if((address % FL_FLASH_ADDRS_ALIGN) != 0) + { + /*地址未对齐*/ + return FL_FAIL; + } + if(FL_FLASH_GetFlashLockStatus(FLASHx) == FL_FLASH_KEY_STATUS_ERROR) + { + /*Flash 已经锁定，复位前无法操作*/ + return FL_FAIL; + } + FL_CMU_EnableGroup3OperationClock(FL_CMU_GROUP3_OPCLK_FLASH); + /* 开始编程*/ + FL_FLASH_EnableProgram(FLASHx); + /* Key 序列*/ + primask = __get_PRIMASK(); + __disable_irq(); + FL_FLASH_UnlockFlash(FLASHx, FL_FLASH_PROGRAM_KEY1); + FL_FLASH_UnlockFlash(FLASHx, FL_FLASH_PROGRAM_KEY2); + __set_PRIMASK(primask); + FL_FLASH_ClearFlag_ClockError(FLASHx); + FL_FLASH_ClearFlag_AuthenticationError(FLASHx); + *((uint32_t *)address) = data; + while(1) + { + timeout++; + if((timeout > FL_FLASH_ERASE_TIMEOUT)\ + || (FL_FLASH_IsActiveFlag_ClockError(FLASHx))\ + || (FL_FLASH_IsActiveFlag_KeyError(FLASHx))\ + || (FL_FLASH_IsActiveFlag_AuthenticationError(FLASHx))) + { + /* 超时或出现错误 */ + ret = FL_FAIL; + break; + } + else + if(FL_FLASH_IsActiveFlag_ProgramComplete(FLASHx)) + { + /*编程成功*/ + FL_FLASH_ClearFlag_ProgramComplete(FLASHx); + ret = FL_PASS; + break; + } + } + FL_FLASH_LockFlash(FLASHx); + FL_CMU_DisableGroup3OperationClock(FL_CMU_GROUP3_OPCLK_FLASH); + FL_CMU_DisableGroup2BusClock(FL_CMU_GROUP2_BUSCLK_FLASH); + return ret; +} + +/** + * @brief 页编程函数，编程地址必须对齐到Page边界. + * @param FLASHx FLASH Port + * @param PageNum 为需要编程的已经擦除过的扇区号，FM33LG04最大为256，非对齐地址编程将触发fault。 + * + * @retval ErrorStatus枚举值 + * -FL_FAIL 擦写发生错误 + * -FL_PASS 擦写成功 + */ +FL_ErrorStatus FL_FLASH_Program_Page(FLASH_Type *FLASHx, uint32_t pageNum, uint32_t *data) +{ + uint32_t count; + uint32_t primask; + uint32_t address; + uint32_t timeout; + FL_ErrorStatus ret=FL_PASS; + /* 入口参数检查 */ + assert_param(IS_FLASH_ALL_INSTANCE(FLASHx)); + assert_param(IS_FL_FLASH_MAX_PAGE((uint32_t)pageNum)); + address = pageNum * FL_FLASH_PGAE_SIZE_BYTE; + /* 页对齐*/ + if((address % FL_FLASH_PGAE_SIZE_BYTE) != 0) + { + /*地址未对齐*/ + return FL_FAIL; + } + FL_CMU_EnableGroup2BusClock(FL_CMU_GROUP2_BUSCLK_FLASH); + FL_CMU_EnableGroup3OperationClock(FL_CMU_GROUP3_OPCLK_FLASH); + FL_FLASH_EnableProgram(FLASHx); + /* Key 序列*/ + primask = __get_PRIMASK(); + __disable_irq(); + FL_FLASH_UnlockFlash(FLASHx, FL_FLASH_PROGRAM_KEY1); + FL_FLASH_UnlockFlash(FLASHx, FL_FLASH_PROGRAM_KEY2); + __set_PRIMASK(primask); + FL_FLASH_ClearFlag_ClockError(FLASHx); + FL_FLASH_ClearFlag_AuthenticationError(FLASHx); + for(count = 0; count < FL_FLASH_PGAE_SIZE_BYTE; count += 4) + { + timeout = 0; + FL_FLASH_EnableProgram(FLASHx); + *((uint32_t *)address) = *data; + address += 4; + data++; + while(1) + { + timeout++; + if((timeout > FL_FLASH_ERASE_TIMEOUT)\ + || (FL_FLASH_IsActiveFlag_ClockError(FLASHx))\ + || (FL_FLASH_IsActiveFlag_KeyError(FLASHx))\ + || (FL_FLASH_IsActiveFlag_AuthenticationError(FLASHx))) + { + /* 超时或出现错误 */ + ret = FL_FAIL; + break; + } + if(FL_FLASH_IsActiveFlag_ProgramComplete(FLASHx)) + { + /*编程成功*/ + FL_FLASH_ClearFlag_ProgramComplete(FLASHx); + ret = FL_PASS; + break; + } + } + if(ret == FL_FAIL) + { + break; + } + } + FL_FLASH_LockFlash(FLASHx); + FL_CMU_DisableGroup3OperationClock(FL_CMU_GROUP3_OPCLK_FLASH); + FL_CMU_DisableGroup2BusClock(FL_CMU_GROUP2_BUSCLK_FLASH); + return ret; +} + +/** + * @brief 扇区编程函数，编程地址必须对齐到Sector边界. + * @param FLASHx FLASH Port + * @param sectorNum 为需要编程的已经擦除过的扇区号，最大为128，非对齐地址编程将触发fault。 + * + * @retval ErrorStatus枚举值 + * -FL_FAIL 擦写发生错误 + * -FL_PASS 擦写成功 + */ +FL_ErrorStatus FL_FLASH_Program_Sector(FLASH_Type *FLASHx, uint32_t sectorNum, uint32_t *data) +{ + uint32_t count; + uint32_t primask; + uint32_t address; + uint32_t timeout; + FL_ErrorStatus ret=FL_PASS; + /* 入口参数检查 */ + assert_param(IS_FLASH_ALL_INSTANCE(FLASHx)); + assert_param(IS_FL_FLASH_MAX_SECTOR((uint32_t)sectorNum)); + address = sectorNum * FL_FLASH_SECTOR_SIZE_BYTE; + /* Sector对齐*/ + if((address % FL_FLASH_SECTOR_SIZE_BYTE) != 0) + { + /*地址未对齐*/ + return FL_FAIL; + } + FL_CMU_EnableGroup2BusClock(FL_CMU_GROUP2_BUSCLK_FLASH); + FL_CMU_EnableGroup3OperationClock(FL_CMU_GROUP3_OPCLK_FLASH); + FL_FLASH_EnableProgram(FLASHx); + /* Key 序列*/ + primask = __get_PRIMASK(); + __disable_irq(); + FL_FLASH_UnlockFlash(FLASHx, FL_FLASH_PROGRAM_KEY1); + FL_FLASH_UnlockFlash(FLASHx, FL_FLASH_PROGRAM_KEY2); + __set_PRIMASK(primask); + FL_FLASH_ClearFlag_ClockError(FLASHx); + FL_FLASH_ClearFlag_AuthenticationError(FLASHx); + for(count = 0; count < FL_FLASH_SECTOR_SIZE_BYTE; count += 4) + { + timeout = 0; + FL_FLASH_EnableProgram(FLASHx); + *((uint32_t *)address) = *data; + address += 4; + data++; + while(1) + { + timeout++; + if((timeout > FL_FLASH_ERASE_TIMEOUT)\ + || (FL_FLASH_IsActiveFlag_ClockError(FLASHx))\ + || (FL_FLASH_IsActiveFlag_KeyError(FLASHx))\ + || (FL_FLASH_IsActiveFlag_AuthenticationError(FLASHx))) + { + /* 超时或出现错误 */ + ret = FL_FAIL; + break; + } + if(FL_FLASH_IsActiveFlag_ProgramComplete(FLASHx)) + { + /*编程成功*/ + FL_FLASH_ClearFlag_ProgramComplete(FLASHx); + ret = FL_PASS; + break; + } + } + if(ret == FL_FAIL) + { + break; + } + } + FL_FLASH_LockFlash(FLASHx); + FL_CMU_DisableGroup3OperationClock(FL_CMU_GROUP3_OPCLK_FLASH); + FL_CMU_DisableGroup2BusClock(FL_CMU_GROUP2_BUSCLK_FLASH); + return ret; +} + +/** + * @brief DMA编程函数，编程地址必须对齐到half-page，长度固定为64字. + * @param FLASHx FLASH Port + * @param address 待编程Flash地址 + * @param *data 待写入Flash数据 + * + * @retval ErrorStatus枚举值 + * -FL_FAIL 擦写发生错误 + * -FL_PASS 擦写成功 + */ +FL_ErrorStatus FL_FLASH_Write_Dma(FLASH_Type *FLASHx, uint32_t address, uint32_t *data) +{ + FL_ErrorStatus ret=FL_PASS; + uint32_t primask; + uint32_t timeout; + FL_DMA_InitTypeDef DMA_InitStruct = {0}; + /* 入口参数检查 */ + assert_param(IS_FLASH_ALL_INSTANCE(FLASHx)); + assert_param(IS_FL_FLASH_MAX_ADDR(address)); + /* 半页对齐*/ + if((address % (FL_FLASH_PGAE_SIZE_BYTE / 2)) != 0) + { + /*地址未对齐*/ + return FL_FAIL; + } + FL_CMU_EnableGroup2BusClock(FL_CMU_GROUP2_BUSCLK_FLASH); + FL_CMU_EnableGroup3OperationClock(FL_CMU_GROUP3_OPCLK_FLASH); + FL_FLASH_EnableProgram(FLASHx); + /* Key 序列*/ + primask = __get_PRIMASK(); + __disable_irq(); + FL_FLASH_UnlockFlash(FLASHx, FL_FLASH_PROGRAM_KEY1); + FL_FLASH_UnlockFlash(FLASHx, FL_FLASH_PROGRAM_KEY2); + __set_PRIMASK(primask); + FL_FLASH_EnableProgram(FLASHx); + DMA_InitStruct.circMode = FL_DISABLE; + DMA_InitStruct.direction = FL_DMA_DIR_RAM_TO_FLASH; + DMA_InitStruct.memoryAddressIncMode = FL_DMA_CH7_RAM_INC_MODE_INCREASE; + DMA_InitStruct.flashAddressIncMode = FL_DMA_CH7_FLASH_INC_MODE_INCREASE; + DMA_InitStruct.priority = FL_DMA_PRIORITY_HIGH; + FL_DMA_Init(DMA, &DMA_InitStruct, FL_DMA_CHANNEL_7); + /* Channel7 Flash 指针地址为（word 地址） */ + FL_DMA_WriteFlashAddress(DMA, address >> 2); + /* Channel7 RAM 指针地址为（word 地址）*/ + FL_DMA_WriteMemoryAddress(DMA, (uint32_t)data >> 2, FL_DMA_CHANNEL_7); + FL_DMA_WriteTransmissionSize(DMA, 64 - 1, FL_DMA_CHANNEL_7); + FL_DMA_ClearFlag_TransferComplete(DMA, FL_DMA_CHANNEL_7); + FL_DMA_EnableChannel(DMA, FL_DMA_CHANNEL_7); + timeout = 0; + while(1) + { + timeout++; + if(timeout > FL_FLASH_ERASE_TIMEOUT) + { + ret = FL_FAIL; + break; + } + if(FL_DMA_IsActiveFlag_TransferComplete(DMA, FL_DMA_CHANNEL_7) == FL_SET) + { + ret = FL_PASS; + break; + } + } + FL_FLASH_LockFlash(FLASHx); + FL_CMU_DisableGroup3OperationClock(FL_CMU_GROUP3_OPCLK_FLASH); + FL_CMU_DisableGroup2BusClock(FL_CMU_GROUP2_BUSCLK_FLASH); + return ret; +} + +/** + * @brief DMA读取函数，编程地址必须对齐到Word边界. + * @param FLASHx FLASH Port + * @param address 读取数据Flash地址 + * @param *data 读出数据存储区 + * @param length 读出数据的字长度 + * + * @retval ErrorStatus枚举值 + * -FL_FAIL 擦写发生错误 + * -FL_PASS 擦写成功 + */ +FL_ErrorStatus FL_FLASH_Read_Dma(FLASH_Type *FLASHx, uint32_t address, uint32_t *data, uint16_t length) +{ + FL_ErrorStatus ret=FL_PASS; + uint32_t Timeout; + FL_DMA_InitTypeDef DMA_InitStruct = {0}; + /* 入口参数检查 */ + assert_param(IS_FLASH_ALL_INSTANCE(FLASHx)); + assert_param(IS_FL_FLASH_MAX_ADDR(address)); + /* 字对齐*/ + if((address % FL_FLASH_ADDRS_ALIGN) != 0) + { + /*地址未对齐*/ + return FL_FAIL; + } + DMA_InitStruct.circMode = FL_DISABLE; + DMA_InitStruct.direction = FL_DMA_DIR_FLASH_TO_RAM; + DMA_InitStruct.memoryAddressIncMode = FL_DMA_CH7_RAM_INC_MODE_INCREASE; + DMA_InitStruct.flashAddressIncMode = FL_DMA_CH7_FLASH_INC_MODE_INCREASE; + DMA_InitStruct.priority = FL_DMA_PRIORITY_HIGH; + FL_DMA_Init(DMA, &DMA_InitStruct, FL_DMA_CHANNEL_7); + /* Channel7 Flash 指针地址为（word 地址） */ + FL_DMA_WriteFlashAddress(DMA, address >> 2); + /* Channel7 RAM 指针地址为（word 地址）*/ + FL_DMA_WriteMemoryAddress(DMA, (uint32_t)data >> 2, FL_DMA_CHANNEL_7); + FL_DMA_WriteTransmissionSize(DMA, length - 1, FL_DMA_CHANNEL_7); + FL_DMA_ClearFlag_TransferComplete(DMA, FL_DMA_CHANNEL_7); + FL_DMA_EnableChannel(DMA, FL_DMA_CHANNEL_7); + Timeout = 0; + while(1) + { + Timeout++; + if(Timeout > FL_FLASH_ERASE_TIMEOUT) + { + ret = FL_FAIL; + break; + } + if(FL_DMA_IsActiveFlag_TransferComplete(DMA, FL_DMA_CHANNEL_7) == FL_SET) + { + ret = FL_PASS; + break; + } + } + return ret; +} + +/** + * @} + */ + +#endif /* FL_FLASH_DRIVER_ENABLED */ + +/** + * @} + */ + +/** + * @} + */ + +/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/ + + + + + + + + diff --git a/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_gpio.c b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_gpio.c new file mode 100644 index 0000000..47dde6c --- /dev/null +++ b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_gpio.c @@ -0,0 +1,430 @@ + /** + **************************************************************************************************** + * @file fm33lg0xx_fl_gpio.c + * @author FMSH Application Team + * @brief Src file of GPIO FL Module + **************************************************************************************************** + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + +/* Includes ------------------------------------------------------------------*/ +#include "fm33lg0xx_fl.h" + +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @addtogroup GPIO + * @{ + */ + +#ifdef FL_GPIO_DRIVER_ENABLED + +/* Private macros ------------------------------------------------------------*/ +/** @addtogroup GPIO_FL_Private_Macros + * @{ + */ + +#define IS_GPIO_ALL_INSTANCE(INTENCE) (((INTENCE) == GPIOA)||\ + ((INTENCE) == GPIOB)||\ + ((INTENCE) == GPIOC)||\ + ((INTENCE) == GPIOD)||\ + ((INTENCE) == GPIOE)) + +#define IS_FL_GPIO_PIN(__VALUE__) ((((uint32_t)0x00000000U) < (__VALUE__)) &&\ + ((__VALUE__) <= (FL_GPIO_PIN_ALL))) + +#define IS_FL_GPIO_MODE(__VALUE__) (((__VALUE__) == FL_GPIO_MODE_ANALOG)||\ + ((__VALUE__) == FL_GPIO_MODE_INPUT)||\ + ((__VALUE__) == FL_GPIO_MODE_OUTPUT)||\ + ((__VALUE__) == FL_GPIO_MODE_DIGITAL)) + +#define IS_FL_GPIO_OPENDRAIN(__VALUE__) (((__VALUE__) == FL_GPIO_OUTPUT_OPENDRAIN)||\ + ((__VALUE__) == FL_GPIO_OUTPUT_PUSHPULL)) + +#define IS_FL_GPIO_PULL_UP(__VALUE__) (((__VALUE__) == FL_DISABLE)||\ + ((__VALUE__) == FL_ENABLE)) + +#define IS_FL_GPIO_ANALOG_SWITCH(__VALUE__) (((__VALUE__) == FL_DISABLE)||\ + ((__VALUE__) == FL_ENABLE)) + +#define IS_FL_GPIO_WKUP_ENTRY(__VALUE__) (((__VALUE__) == FL_GPIO_WKUP_INT_ENTRY_NMI)||\ + ((__VALUE__) == FL_GPIO_WKUP_INT_ENTRY_NUM_38)) + +#define IS_FL_GPIO_WKUP_EDGE(__VALUE__) (((__VALUE__) == FL_GPIO_WAKEUP_TRIGGER_RISING)||\ + ((__VALUE__) == FL_GPIO_WAKEUP_TRIGGER_FALLING)||\ + ((__VALUE__) == FL_GPIO_WAKEUP_TRIGGER_BOTH)) + + +#define IS_FL_GPIO_WKUP_NUM(__VALUE__) (((__VALUE__) == FL_GPIO_WAKEUP_0)||\ + ((__VALUE__) == FL_GPIO_WAKEUP_1)||\ + ((__VALUE__) == FL_GPIO_WAKEUP_2)||\ + ((__VALUE__) == FL_GPIO_WAKEUP_3)||\ + ((__VALUE__) == FL_GPIO_WAKEUP_4)||\ + ((__VALUE__) == FL_GPIO_WAKEUP_5)||\ + ((__VALUE__) == FL_GPIO_WAKEUP_6)||\ + ((__VALUE__) == FL_GPIO_WAKEUP_7)||\ + ((__VALUE__) == FL_GPIO_WAKEUP_8)||\ + ((__VALUE__) == FL_GPIO_WAKEUP_9)) + +/** + * @} + */ + +/* Exported functions --------------------------------------------------------*/ +/** @addtogroup GPIO_FL_EF_Init + * @{ + */ + +/** + * @brief 复位对应GPIO控制寄存器. + * @param GPIOx GPIO Port + * @retval ErrorStatus枚举值: + * -FL_PASS 外设寄存器值恢复复位值 + * -FL_FAIL 未成功执行 + */ +FL_ErrorStatus FL_GPIO_DeInit(GPIO_Type *GPIOx, uint32_t pin) +{ + uint32_t pinPos = 0x00000000U; + uint32_t currentPin = 0x00000000U; + /* 入口参数检查 */ + assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); + assert_param(IS_FL_GPIO_PIN(pin)); + /* 恢复寄存器值为默认值 */ + while(((pin) >> pinPos) != 0x00000000U) + { + /* 获取当前遍历到的Pin脚 */ + currentPin = (pin) & (0x00000001U << pinPos); + if(currentPin) + { + FL_GPIO_SetPinMode(GPIOx, currentPin, FL_GPIO_MODE_INPUT); + FL_GPIO_DisablePinInput(GPIOx, currentPin); + FL_GPIO_DisablePinOpenDrain(GPIOx, currentPin); + FL_GPIO_DisablePinPullup(GPIOx, currentPin); + FL_GPIO_DisablePinAnalogSwitch(GPIOx, currentPin); + FL_GPIO_DisablePinRemap(GPIOx, currentPin); + } + pinPos++; + } + return FL_PASS; +} + +#if defined (FM33LG0x3A) /* 仅针对32pin芯片处理 */ +/** +* @brief 复用GPIO数据类型,单个元素为一组复用的GPIO + */ +static const struct MultiplexGpioType +{ + /* 成员元素 */ + const struct + { + GPIO_Type *GPIox; /* 元素信息: GPIO的Port索引 */ + uint32_t Pin; /* 元素信息: GPIO的Pin索引 */ + } MultiplexGpioElement[2]; /* 一组复用关系，无先后顺序 */ + +} MultiplexGpioTable[] = /* 复用GPIO的表格清单 */ +{ + { {{GPIOA, (uint32_t)FL_GPIO_PIN_9 }/*PA9 */, {GPIOA, (uint32_t)FL_GPIO_PIN_11}/*PA11*/} },/* 此为一组复用关系 */ + { {{GPIOB, (uint32_t)FL_GPIO_PIN_0 }/*PB0 */, {GPIOA, (uint32_t)FL_GPIO_PIN_12}/*PA12*/} }, + { {{GPIOB, (uint32_t)FL_GPIO_PIN_7 }/*PB7 */, {GPIOB, (uint32_t)FL_GPIO_PIN_8 }/*PB8 */} }, + { {{GPIOB, (uint32_t)FL_GPIO_PIN_12}/*PB12*/, {GPIOE, (uint32_t)FL_GPIO_PIN_1 }/*PE1 */} }, + { {{GPIOC, (uint32_t)FL_GPIO_PIN_2 }/*PC2 */, {GPIOD, (uint32_t)FL_GPIO_PIN_12}/*PD12*/} }, + { {{GPIOD, (uint32_t)FL_GPIO_PIN_11}/*PD11*/, {GPIOD, (uint32_t)FL_GPIO_PIN_0 }/*PD0 */} }, + { {{GPIOD, (uint32_t)FL_GPIO_PIN_6 }/*PD6 */, {GPIOD, (uint32_t)FL_GPIO_PIN_1 }/*PD1 */} } +}; + +/** +* @brief 复用GPIO的组数 + */ +static const uint32_t u32MultiplexGpioCount =\ + (uint32_t)((sizeof(MultiplexGpioTable)) / (sizeof(MultiplexGpioTable[0]))); + +/** +* @brief 针对复用GPIO，如有一个GPIO使用，则将另一个GPIO配置为高阻抗，避免相互影响 + * @param GPIOx 当前使用的GPIO Port索引 + * @param pin 当前使用的GPIO Pin索引 + * @retval 无 + */ +static void FL_GPIO_Multiplex_DeInit(GPIO_Type *GPIOx, uint32_t pin) +{ + /* 指向复用GPIO表格的指针 */ + const struct MultiplexGpioType *pMultiplexGpio = MultiplexGpioTable; + + /* 入口参数检查 */ + assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); + assert_param(IS_FL_GPIO_PIN(pin)); + + for( ; pMultiplexGpio < (MultiplexGpioTable + u32MultiplexGpioCount); pMultiplexGpio++) + { + if( (pMultiplexGpio->MultiplexGpioElement[0].Pin == pin)\ + && (pMultiplexGpio->MultiplexGpioElement[0].GPIox == GPIOx)) + { + /* 未使用的GPIO执行高阻抗初始化 */ + FL_GPIO_DeInit(pMultiplexGpio->MultiplexGpioElement[1].GPIox,\ + pMultiplexGpio->MultiplexGpioElement[1].Pin ); + break; + } + else if( (pMultiplexGpio->MultiplexGpioElement[1].Pin == pin)\ + && (pMultiplexGpio->MultiplexGpioElement[1].GPIox == GPIOx)) + { + /* 未使用的GPIO执行高阻抗初始化 */ + FL_GPIO_DeInit(pMultiplexGpio->MultiplexGpioElement[0].GPIox,\ + pMultiplexGpio->MultiplexGpioElement[0].Pin ); + break; + } + } +} +#endif /* #if defined (FM33LG0x3A) */ + +/** + * @brief 根据 GPIO_InitStruct的配置信息初始化对应外设. + * @param GPIOx GPIO Port + * @param GPIO_InitStruct 指向一个 @ref FL_GPIO_InitTypeDef 结构体 + * 其中包含了外设的相关配置信息. + * @retval ErrorStatus枚举值 + * -FL_FAIL 配置过程发生错误 + * -FL_PASS 配置成功 + */ +FL_ErrorStatus FL_GPIO_Init(GPIO_Type *GPIOx, FL_GPIO_InitTypeDef *initStruct) +{ + uint32_t pinPos = 0x00000000U; + uint32_t currentPin = 0x00000000U; + /* 入口参数检查 */ + assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); + assert_param(IS_FL_GPIO_PIN(initStruct->pin)); + assert_param(IS_FL_GPIO_MODE(initStruct->mode)); + assert_param(IS_FL_GPIO_OPENDRAIN(initStruct->outputType)); + assert_param(IS_FL_GPIO_PULL_UP(initStruct->pull)); + assert_param(IS_FL_GPIO_ANALOG_SWITCH(initStruct->analogSwitch)); + /* 使能时钟总线 */ + FL_CMU_EnableGroup1BusClock(FL_CMU_GROUP1_BUSCLK_PAD); + /* 这里考虑到PIN有可能不止一个因此需要遍历 */ + while(((initStruct->pin) >> pinPos) != 0x00000000U) + { + /* 获取当前遍历到的Pin脚 */ + currentPin = (initStruct->pin) & (0x00000001U << pinPos); + if(currentPin) + { + #if defined (FM33LG0x3A) /* 仅针对32pin芯片处理 */ + /* 检查复用引脚，并做处理 */ + FL_GPIO_Multiplex_DeInit(GPIOx, currentPin); + #endif /* #if defined (FM33LG0x3A) */ + /* Pin脚模拟模式设置 */ + if(initStruct->mode == FL_GPIO_MODE_ANALOG) + { + FL_GPIO_DisablePinInput(GPIOx, currentPin); + FL_GPIO_DisablePinPullup(GPIOx, currentPin); + FL_GPIO_DisablePinOpenDrain(GPIOx, currentPin); + if(initStruct->analogSwitch == FL_ENABLE) + { + FL_GPIO_EnablePinAnalogSwitch(GPIOx, currentPin); + } + else + { + FL_GPIO_DisablePinAnalogSwitch(GPIOx, currentPin); + } + } + else + { + FL_GPIO_DisablePinAnalogSwitch(GPIOx, currentPin); + /* Pin脚输入使能控制 */ + if(initStruct->mode == FL_GPIO_MODE_INPUT) + { + FL_GPIO_EnablePinInput(GPIOx, currentPin); + } + else + { + FL_GPIO_DisablePinInput(GPIOx, currentPin); + } + /* Pin脚输出模式设置 */ + if(initStruct->outputType == FL_GPIO_OUTPUT_PUSHPULL) + { + FL_GPIO_DisablePinOpenDrain(GPIOx, currentPin); + } + else + { + FL_GPIO_EnablePinOpenDrain(GPIOx, currentPin); + } + /* Pin脚上拉模式设置 */ + if(initStruct->pull) + { + FL_GPIO_EnablePinPullup(GPIOx, currentPin); + } + else + { + FL_GPIO_DisablePinPullup(GPIOx, currentPin); + } + } + /* 数字模式复用功能选择 */ + if(initStruct->mode == FL_GPIO_MODE_DIGITAL) + { + /*重定向*/ + if(initStruct->remapPin == FL_ENABLE) + { + FL_GPIO_EnablePinRemap(GPIOx, currentPin); + } + else + { + FL_GPIO_DisablePinRemap(GPIOx, currentPin); + } + } + /* Pin脚工作模式设置 */ + FL_GPIO_SetPinMode(GPIOx, currentPin, initStruct->mode); + } + pinPos++; + } + return FL_PASS; +} + +/** + * @brief 设置 GPIO_InitStruct 为默认配置 + * @param GPIO_InitStruct 指向需要将值设置为默认配置的结构体 @ref FL_GPIO_InitTypeDef 结构体 + * + * @retval None + */ +void FL_GPIO_StructInit(FL_GPIO_InitTypeDef *initStruct) +{ + /* 复位配置信息 */ + initStruct->pin = FL_GPIO_PIN_ALL; + initStruct->mode = FL_GPIO_MODE_INPUT; + initStruct->outputType = FL_GPIO_OUTPUT_OPENDRAIN; + initStruct->pull = FL_DISABLE; + initStruct->remapPin = FL_DISABLE; + initStruct->analogSwitch = FL_DISABLE; +} + +/** + * @brief 根据 WKUP_InitTypeDef的配置信息初始化对应外设. + * @param WKUP_InitTypeDef 指向一个 @ref FL_WKUP_InitTypeDef 结构体 + * 其中包含了外设的相关配置信息. + * @param Wkupx 唤醒入口 + * FL_GPIO_WKUP_0 + * FL_GPIO_WKUP_1 + * FL_GPIO_WKUP_2 + * FL_GPIO_WKUP_3 + * FL_GPIO_WKUP_4 + * FL_GPIO_WKUP_5 + * FL_GPIO_WKUP_6 + * FL_GPIO_WKUP_7 + * FL_GPIO_WKUP_8 + * FL_GPIO_WKUP_9 + * @retval ErrorStatus枚举值 + * -FL_FAIL 配置过程发生错误 + * -FL_PASS 配置成功 + */ +FL_ErrorStatus FL_WKUP_Init(FL_WKUP_InitTypeDef *initStruct, uint32_t wakeup) +{ + /* 入口参数检查 */ + assert_param(IS_FL_GPIO_WKUP_NUM(wakeup)); + assert_param(IS_FL_GPIO_WKUP_EDGE(initStruct->polarity)); + FL_GPIO_EnableWakeup(GPIO, wakeup); + FL_GPIO_SetWakeupEdge(GPIO, wakeup, initStruct->polarity); + return FL_PASS; +} + +/** + * @brief 去初始化Wakeup设置. + * @param Wkupx 唤醒入口 + * FL_GPIO_WKUP_0 + * FL_GPIO_WKUP_1 + * FL_GPIO_WKUP_2 + * FL_GPIO_WKUP_3 + * FL_GPIO_WKUP_4 + * FL_GPIO_WKUP_5 + * FL_GPIO_WKUP_6 + * FL_GPIO_WKUP_7 + * FL_GPIO_WKUP_8 + * FL_GPIO_WKUP_9 + * @retval ErrorStatus枚举值 + * -FL_FAIL 配置过程发生错误 + * -FL_PASS 配置成功 + */ +FL_ErrorStatus FL_WKUP_DeInit(uint32_t wakeup) +{ + /* 入口参数检查 */ + assert_param(IS_FL_GPIO_WKUP_NUM(wakeup)); + FL_GPIO_DisableWakeup(GPIO, wakeup); + return FL_PASS; +} + +/** + * @brief 设置 GPIO_InitStruct 为默认配置 + * @param GPIO_InitStruct 指向需要将值设置为默认配置的结构体 @ref FL_GPIO_InitTypeDef 结构体 + * + * @retval None + */ +void FL_WKUP_StructInit(FL_WKUP_InitTypeDef *initStruct_Wakeup) +{ + /* 复位配置信息 */ + initStruct_Wakeup->polarity = FL_GPIO_WAKEUP_TRIGGER_FALLING; +} + +/** + * @brief 配置所有IO口为输入模式、输入使能关闭（高阻态），SWD接口除外。 + * @note PD7和PD8为调试接口 + * + * @param None + * + * @retval None + */ +void FL_GPIO_ALLPIN_LPM_MODE(void) +{ + FL_GPIO_DeInit(GPIOA, FL_GPIO_PIN_ALL); + FL_GPIO_DeInit(GPIOB, FL_GPIO_PIN_ALL); + FL_GPIO_DeInit(GPIOC, FL_GPIO_PIN_ALL); + FL_GPIO_DeInit(GPIOD, FL_GPIO_PIN_ALL & + (~FL_GPIO_PIN_7) & (~FL_GPIO_PIN_8)); + FL_GPIO_DeInit(GPIOE, FL_GPIO_PIN_ALL); +} + +/** + * @} + */ + +#endif /* FL_GPIO_DRIVER_ENABLED */ + +/** + * @} + */ + +/** + * @} + */ + +/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/ diff --git a/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_gptim.c b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_gptim.c new file mode 100644 index 0000000..234be65 --- /dev/null +++ b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_gptim.c @@ -0,0 +1,666 @@ + /** + ******************************************************************************************************* + * @file fm33lg0xx_fl_gptim.c + * @author FMSH Application Team + * @brief Src file of GPTIM FL Module + ******************************************************************************************************* + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + +/* Includes ------------------------------------------------------------------*/ +#include "fm33lg0xx_fl.h" + +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @addtogroup GPTIM + * @{ + */ + +#ifdef FL_GPTIM_DRIVER_ENABLED + +/* Private macros ------------------------------------------------------------*/ +/** @addtogroup GPTIM_FL_Private_Macros + * @{ + */ + +#define IS_GPTIM_INSTANCE(TIMx) (((TIMx) == GPTIM0) || \ + ((TIMx) == GPTIM1) || \ + ((TIMx) == GPTIM2)) + +#define IS_FL_GPTIM_COUNTERMODE(__VALUE__) (((__VALUE__) == FL_GPTIM_COUNTER_DIR_UP) || \ + ((__VALUE__) == FL_GPTIM_COUNTER_DIR_DOWN) || \ + ((__VALUE__) == FL_GPTIM_COUNTER_ALIGNED_EDGE) || \ + ((__VALUE__) == FL_GPTIM_COUNTER_ALIGNED_CENTER_UP) || \ + ((__VALUE__) == FL_GPTIM_COUNTER_ALIGNED_CENTER_DOWN) || \ + ((__VALUE__) == FL_GPTIM_COUNTER_ALIGNED_CENTER_UP_DOWN)) + +#define IS_FL_GPTIM_CLOCKDIVISION(__VALUE__) (((__VALUE__) == FL_GPTIM_CLK_DIVISION_DIV1) || \ + ((__VALUE__) == FL_GPTIM_CLK_DIVISION_DIV2) || \ + ((__VALUE__) == FL_GPTIM_CLK_DIVISION_DIV4)) + + +#define IS_FL_GPTIM_CHANNEL_MODE(__VALUE__) (((__VALUE__) == FL_GPTIM_CHANNEL_MODE_OUTPUT) || \ + ((__VALUE__) == FL_GPTIM_CHANNEL_MODE_INPUT_NORMAL) || \ + ((__VALUE__) == FL_GPTIM_CHANNEL_MODE_INPUT_CROSSOVER) || \ + ((__VALUE__) == FL_GPTIM_CHANNEL_MODE_INPUT_TRC)) + +#define IS_FL_GPTIM_IC_FILTER(__VALUE__) (((__VALUE__) == FL_GPTIM_IC_FILTER_DIV1) || \ + ((__VALUE__) == FL_GPTIM_IC_FILTER_DIV1_N2) || \ + ((__VALUE__) == FL_GPTIM_IC_FILTER_DIV1_N4) || \ + ((__VALUE__) == FL_GPTIM_IC_FILTER_DIV1_N8) || \ + ((__VALUE__) == FL_GPTIM_IC_FILTER_DIV2_N6) || \ + ((__VALUE__) == FL_GPTIM_IC_FILTER_DIV2_N8) || \ + ((__VALUE__) == FL_GPTIM_IC_FILTER_DIV4_N6) || \ + ((__VALUE__) == FL_GPTIM_IC_FILTER_DIV4_N8) || \ + ((__VALUE__) == FL_GPTIM_IC_FILTER_DIV8_N6) || \ + ((__VALUE__) == FL_GPTIM_IC_FILTER_DIV8_N8) || \ + ((__VALUE__) == FL_GPTIM_IC_FILTER_DIV16_N5) || \ + ((__VALUE__) == FL_GPTIM_IC_FILTER_DIV16_N6) || \ + ((__VALUE__) == FL_GPTIM_IC_FILTER_DIV16_N8) || \ + ((__VALUE__) == FL_GPTIM_IC_FILTER_DIV32_N5) || \ + ((__VALUE__) == FL_GPTIM_IC_FILTER_DIV32_N6) || \ + ((__VALUE__) == FL_GPTIM_IC_FILTER_DIV32_N8)) + +#define IS_FL_GPTIM_CHANNEL(__VALUE__) (((__VALUE__) == FL_GPTIM_CHANNEL_1)\ + || ((__VALUE__) == FL_GPTIM_CHANNEL_2)\ + || ((__VALUE__) == FL_GPTIM_CHANNEL_3)\ + || ((__VALUE__) == FL_GPTIM_CHANNEL_4)) + + + +#define IS_FL_GPTIM_SLAVE_MODE(__VALUE__) (((__VALUE__) == FL_GPTIM_SLAVE_MODE_PROHIBITED)\ + || ((__VALUE__) == FL_GPTIM_SLAVE_MODE_ENCODER_X2_TI1)\ + || ((__VALUE__) == FL_GPTIM_SLAVE_MODE_ENCODER_X2_TI2)\ + || ((__VALUE__) == FL_GPTIM_SLAVE_MODE_ENCODER_X4_TI1TI2)\ + || ((__VALUE__) == FL_GPTIM_SLAVE_MODE_TRGI_RISE_RST)\ + || ((__VALUE__) == FL_GPTIM_SLAVE_MODE_TRGI_HIGH_RUN)\ + || ((__VALUE__) == FL_GPTIM_SLAVE_MODE_TRGI_RISE_RUN)\ + || ((__VALUE__) == FL_GPTIM_SLAVE_MODE_TRGI_CLK)) + + +#define IS_FL_GPTIM_TRIGGER_SRC(__VALUE__) (((__VALUE__) ==FL_GPTIM_TIM_TS_ITR0 )\ + ||((__VALUE__) ==FL_GPTIM_TIM_TS_ITR1 )\ + ||((__VALUE__) ==FL_GPTIM_TIM_TS_ITR2)\ + ||((__VALUE__) ==FL_GPTIM_TIM_TS_ITR3)\ + ||((__VALUE__) ==FL_GPTIM_TIM_TS_TI1F_ED)\ + ||((__VALUE__) ==FL_GPTIM_TIM_TS_TI1FP1)\ + ||((__VALUE__) ==FL_GPTIM_TIM_TS_TI2FP2)\ + ||((__VALUE__) ==FL_GPTIM_TIM_TS_ETRF)) + + + +#define IS_FL_GPTIM_ETR_FILTER(__VALUE__) (((__VALUE__) == FL_GPTIM_ETR_FILTER_DIV1) || \ + ((__VALUE__) == FL_GPTIM_ETR_FILTER_DIV1_N2) || \ + ((__VALUE__) == FL_GPTIM_ETR_FILTER_DIV1_N4) || \ + ((__VALUE__) == FL_GPTIM_ETR_FILTER_DIV1_N8) || \ + ((__VALUE__) == FL_GPTIM_ETR_FILTER_DIV2_N6) || \ + ((__VALUE__) == FL_GPTIM_ETR_FILTER_DIV2_N8) || \ + ((__VALUE__) == FL_GPTIM_ETR_FILTER_DIV4_N6) || \ + ((__VALUE__) == FL_GPTIM_ETR_FILTER_DIV4_N8) || \ + ((__VALUE__) == FL_GPTIM_ETR_FILTER_DIV8_N6) || \ + ((__VALUE__) == FL_GPTIM_ETR_FILTER_DIV8_N8) || \ + ((__VALUE__) == FL_GPTIM_ETR_FILTER_DIV16_N5) || \ + ((__VALUE__) == FL_GPTIM_ETR_FILTER_DIV16_N6) || \ + ((__VALUE__) == FL_GPTIM_ETR_FILTER_DIV16_N8) || \ + ((__VALUE__) == FL_GPTIM_ETR_FILTER_DIV32_N5) || \ + ((__VALUE__) == FL_GPTIM_ETR_FILTER_DIV32_N6) || \ + ((__VALUE__) == FL_GPTIM_ETR_FILTER_DIV32_N8)) + + +#define IS_FL_GPTIM_ETR_PSC(__VALUE__) (((__VALUE__) == FL_GPTIM_ETR_PSC_DIV1) ||\ + ((__VALUE__) == FL_GPTIM_ETR_PSC_DIV2) ||\ + ((__VALUE__) == FL_GPTIM_ETR_PSC_DIV4) ||\ + ((__VALUE__) == FL_GPTIM_ETR_PSC_DIV8)) + +#define IS_FL_GPTIM_ETR_POLARITY(__VALUE__) (((__VALUE__) == FL_GPTIM_ETR_POLARITY_NORMAL) || \ + ((__VALUE__) == FL_GPTIM_ETR_POLARITY_INVERT)) + + + +#define IS_FL_GPTIM_IC_POLARITY(__VALUE__) (((__VALUE__) == FL_GPTIM_IC_POLARITY_NORMAL) \ + || ((__VALUE__) == FL_GPTIM_IC_POLARITY_INVERT)) + + + +#define IS_FL_GPTIM_IC_PSC(__VALUE__) (((__VALUE__) == FL_GPTIM_IC_PSC_DIV1) \ + || ((__VALUE__) == FL_GPTIM_IC_PSC_DIV2) \ + || ((__VALUE__) == FL_GPTIM_IC_PSC_DIV4) \ + || ((__VALUE__) == FL_GPTIM_IC_PSC_DIV8)) + +#define IS_FL_GPTIM_OC_POLARITY(__VALUE__) (((__VALUE__) == FL_GPTIM_OC_POLARITY_NORMAL) \ + || ((__VALUE__) == FL_GPTIM_OC_POLARITY_INVERT)) + +#define IS_FL_GPTIM_OC_MODE(__VALUE__) (((__VALUE__) == FL_GPTIM_OC_MODE_FROZEN) \ + || ((__VALUE__) == FL_GPTIM_OC_MODE_ACTIVE) \ + || ((__VALUE__) == FL_GPTIM_OC_MODE_INACTIVE) \ + || ((__VALUE__) == FL_GPTIM_OC_MODE_TOGGLE) \ + || ((__VALUE__) == FL_GPTIM_OC_MODE_FORCED_INACTIVE) \ + || ((__VALUE__) == FL_GPTIM_OC_MODE_FORCED_ACTIVE) \ + || ((__VALUE__) == FL_GPTIM_OC_MODE_PWM1) \ + || ((__VALUE__) == FL_GPTIM_OC_MODE_PWM2)) + +#define IS_FL_GPTIM_OC_FASTMODE(__VALUE__) (((__VALUE__) == FL_ENABLE) \ + || ((__VALUE__) == FL_DISABLE)) + +#define IS_FL_GPTIM_OC_PRELOAD(__VALUE__) (((__VALUE__) == FL_ENABLE) \ + || ((__VALUE__) == FL_DISABLE)) + +#define IS_FL_GPTIM_OC_ETR_CLEARN(__VALUE__) (((__VALUE__) == FL_ENABLE) \ + || ((__VALUE__) == FL_DISABLE)) + + +#define IS_FL_GPTIM_TRIGGER_DELAY(__VALUE__) (((__VALUE__) == FL_DISABLE) \ + || ((__VALUE__) == FL_ENABLE)) + + +#define IS_FL_GPTIM_IC_CAPTURE_STATE(__VALUE__) (((__VALUE__) == FL_DISABLE) \ + || ((__VALUE__) == FL_ENABLE)) +/** + * @} + */ + + +/* Private function prototypes -----------------------------------------------*/ +/** @defgroup TIM_FL_Private_Functions TIM Private Functions + * @{ + */ +static FL_ErrorStatus OCConfig(GPTIM_Type *TIMx, uint32_t Channel, FL_GPTIM_OC_InitTypeDef *TIM_OC_InitStruct); + +/** + * @} + */ + +/* Exported functions --------------------------------------------------------*/ +/** @addtogroup TIM_FL_EF_Init + * @{ + */ + +/** + * @brief 复位对应GPTIMx寄存器. + * @param GPTIMx + * @retval ErrorStatus枚举值: + * -FL_PASS 外设寄存器值恢复复位值 + * -FL_FAIL 未成功执行 + */ +FL_ErrorStatus FL_GPTIM_DeInit(GPTIM_Type *TIMx) +{ + FL_ErrorStatus result = FL_PASS; + /* Check the parameters */ + assert_param(IS_GPTIM_INSTANCE(TIMx)); + /* 使能外设复位 */ + FL_RMU_EnablePeripheralReset(RMU); + if(TIMx == GPTIM0) + { + /* 使能外设复位 */ + FL_RMU_EnableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_GPTIM0); + FL_RMU_DisableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_GPTIM0); + /* 关闭外设时钟 */ + FL_CMU_DisableGroup4BusClock(FL_CMU_GROUP4_BUSCLK_GPTIM0); + } + else + if(TIMx == GPTIM1) + { + /* 使能外设复位 */ + FL_RMU_EnableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_GPTIM1); + FL_RMU_DisableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_GPTIM1); + /* 关闭外设时钟 */ + FL_CMU_DisableGroup4BusClock(FL_CMU_GROUP4_BUSCLK_GPTIM1); + } + else + if(TIMx == GPTIM2) + { + /* 使能外设复位 */ + FL_RMU_EnableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_GPTIM2); + FL_RMU_DisableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_GPTIM2); + /* 关闭外设时钟 */ + FL_CMU_DisableGroup4BusClock(FL_CMU_GROUP4_BUSCLK_GPTIM2); + } + else + { + result = FL_FAIL; + } + /* 锁定外设复位 */ + FL_RMU_DisablePeripheralReset(RMU); + return result; +} +/** + * @brief 配置基本定时器时基单元（内部时钟源）. + * @param TIMx Timer Instance + * @param TIM_InitStruct 指向一个 @ref FL_GPTIM_InitTypeDef(时基配置结构体) + * @retval ErrorStatus枚举值 + * -FL_FAIL 配置过程发生错误 + * -FL_PASS 成功 + */ +FL_ErrorStatus FL_GPTIM_Init(GPTIM_Type *TIMx, FL_GPTIM_InitTypeDef *init) +{ + uint32_t i = 5; + /* 参数检查 */ + assert_param(IS_GPTIM_INSTANCE(TIMx)); + assert_param(IS_FL_GPTIM_COUNTERMODE(init->counterMode)); + assert_param(IS_FL_GPTIM_CLOCKDIVISION(init->clockDivision)); + /* 时钟总线使能配置 */ + if(TIMx == GPTIM0) + { + FL_CMU_EnableGroup4BusClock(FL_CMU_GROUP4_BUSCLK_GPTIM0); + } + else + if(TIMx == GPTIM1) + { + FL_CMU_EnableGroup4BusClock(FL_CMU_GROUP4_BUSCLK_GPTIM1); + } + else + { + FL_CMU_EnableGroup4BusClock(FL_CMU_GROUP4_BUSCLK_GPTIM2); + } + /* 计数器计数模式配置 */ + switch(init->counterMode) + { + /* 中心对称模式 */ + case FL_GPTIM_COUNTER_ALIGNED_CENTER_DOWN : + case FL_GPTIM_COUNTER_ALIGNED_CENTER_UP : + case FL_GPTIM_COUNTER_ALIGNED_CENTER_UP_DOWN: + FL_GPTIM_SetCounterAlignedMode(TIMx, init->counterMode); + break; + default: + /* 边沿模式 */ + FL_GPTIM_SetCounterDirection(TIMx, init->counterMode); + FL_GPTIM_SetCounterAlignedMode(TIMx, FL_GPTIM_COUNTER_ALIGNED_EDGE); + break; + } + /* 自动重装载值 */ + FL_GPTIM_WriteAutoReload(TIMx, init->autoReload); + /* 定时器分频系数与数字滤波器所使用的采样时钟分频比 */ + FL_GPTIM_SetClockDivision(TIMx, init->clockDivision); + /* 时钟分频 */ + FL_GPTIM_WritePrescaler(TIMx, init->prescaler); + /* 预装载配置 */ + if(init->autoReloadState == FL_ENABLE) + { + FL_GPTIM_EnableARRPreload(TIMx); + } + else + { + FL_GPTIM_DisableARRPreload(TIMx); + } + /* 手动触发更新事件，将配置值写入 */ + FL_GPTIM_GenerateUpdateEvent(TIMx); + while((!FL_GPTIM_IsActiveFlag_Update(TIMx))&&i) + { + i--; + } + FL_GPTIM_ClearFlag_Update(TIMx); + return FL_PASS; +} + +/** + * @brief 设置 FL_GPTIM_InitTypeDef 为默认配置 + * @param TIM_InitStruct 指向需要将值设置为默认配置的结构体 @ref FL_GPTIM_InitTypeDef 结构体 + * + * @retval None + */ +void FL_GPTIM_StructInit(FL_GPTIM_InitTypeDef *TIM_InitStruct) +{ + /* Set the default configuration */ + TIM_InitStruct->prescaler = (uint16_t)0x0000; + TIM_InitStruct->autoReloadState = FL_DISABLE; + TIM_InitStruct->counterMode = FL_GPTIM_COUNTER_DIR_UP; + TIM_InitStruct->autoReload = 0xFFFFU; + TIM_InitStruct->clockDivision = FL_GPTIM_CLK_DIVISION_DIV1; +} + +/** + * @brief 配置基本定时器外部时钟源模式，包括编码器模式. + * @param TIMx Timer Instance + * @param slave_init 指向一个 @ref FL_GPTIM_SlaveInitTypeDef 结构体 + * @retval ErrorStatus枚举值 + * -FL_FAIL 配置过程发生错误 + * -FL_PASS 成功 + */ +FL_ErrorStatus FL_GPTIM_SlaveMode_Init(GPTIM_Type *TIMx, FL_GPTIM_SlaveInitTypeDef *slave_init) +{ + /* 参数检查 */ + assert_param(IS_GPTIM_INSTANCE(TIMx)); + assert_param(IS_FL_GPTIM_SLAVE_MODE(slave_init->slaveMode)); + assert_param(IS_FL_GPTIM_TRIGGER_SRC(slave_init->triggerSrc)); + assert_param(IS_FL_GPTIM_TRIGGER_DELAY(slave_init->triggerDelay)); + /* 时钟总线使能配置 */ + if(TIMx == GPTIM0) + { + FL_CMU_EnableGroup4BusClock(FL_CMU_GROUP4_BUSCLK_GPTIM0); + } + else + if(TIMx == GPTIM1) + { + FL_CMU_EnableGroup4BusClock(FL_CMU_GROUP4_BUSCLK_GPTIM1); + } + else + { + FL_CMU_EnableGroup4BusClock(FL_CMU_GROUP4_BUSCLK_GPTIM2); + } + /* 触发延迟默认关闭 */ + FL_GPTIM_DisableMasterSlaveMode(TIMx); + /* 关闭从模式以能写入TS */ + FL_GPTIM_SetSlaveMode(TIMx, 0); + /* 从模式输入源选择 */ + FL_GPTIM_SetTriggerInput(TIMx, slave_init->triggerSrc); + /* ITRx 输入源选择 */ + if(slave_init->triggerSrc <= FL_GPTIM_TIM_TS_ITR3) + { + /* 内部触发ITRx源选择 */ + FL_GPTIM_SetITRInput(TIMx, (1U << (slave_init->triggerSrc >> GPTIM_SMCR_TS_Pos)), slave_init->ITRSourceGroup); + } + /* 从模式选择 */ + FL_GPTIM_SetSlaveMode(TIMx, slave_init->slaveMode); + /* 触发延迟默认关闭 */ + if(slave_init->triggerDelay == FL_ENABLE) + { + FL_GPTIM_EnableMasterSlaveMode(TIMx); + } + return FL_PASS; +} + +/** + * @brief 设置 FL_GPTIM_SlaveInitTypeDef 为默认配置 + * @param TIM_InitStruct 指向需要将值设置为默认配置的结构体 @ref FL_GPTIM_SlaveInitTypeDef 结构体 + * + * @retval None + */ +void FL_GPTIM_SlaveMode_StructInit(FL_GPTIM_SlaveInitTypeDef *slave_init) +{ + slave_init->ITRSourceGroup = 0; + slave_init->slaveMode = FL_GPTIM_SLAVE_MODE_PROHIBITED; + slave_init->triggerSrc = FL_GPTIM_TIM_TS_TI1FP1; + slave_init->triggerDelay = FL_DISABLE; +} +/** + * @brief 配置TIM触发输入捕获通道ETR. + * @param TIMx Timer Instance + * @param ETPolarity 极性 + * @param ETPrescaler 分频 + * @param ETR_Filter 滤波 + * @param etr_init 指向一个 @ref FL_GPTIM_ETR_InitTypeDef 结构体 + * @retval ErrorStatus枚举值 + * -FL_FAIL 配置过程发生错误 + * -FL_PASS 成功 + */ +FL_ErrorStatus FL_GPTIM_ETR_Init(GPTIM_Type *TIMx, FL_GPTIM_ETR_InitTypeDef *etr_init) +{ + assert_param(IS_FL_GPTIM_ETR_FILTER(etr_init->ETRFilter)); + assert_param(IS_FL_GPTIM_ETR_PSC(etr_init->ETRClockDivision)); + assert_param(IS_FL_GPTIM_ETR_POLARITY(etr_init->ETRPolarity)); + /* 时钟总线使能配置 */ + if(TIMx == GPTIM0) + { + FL_CMU_EnableGroup4BusClock(FL_CMU_GROUP4_BUSCLK_GPTIM0); + } + else + if(TIMx == GPTIM1) + { + FL_CMU_EnableGroup4BusClock(FL_CMU_GROUP4_BUSCLK_GPTIM1); + } + else + { + FL_CMU_EnableGroup4BusClock(FL_CMU_GROUP4_BUSCLK_GPTIM2); + } + /* 外部时钟极性 */ + FL_GPTIM_SetETRPolarity(TIMx, etr_init->ETRPolarity); + /* 外部时钟滤波 */ + FL_GPTIM_SetETRFilter(TIMx, etr_init->ETRFilter); + /* 外部时钟分频 */ + FL_GPTIM_SetETRPrescaler(TIMx, etr_init->ETRClockDivision); + if(etr_init->useExternalTrigger == FL_ENABLE) + { + FL_GPTIM_EnableExternalClock(TIMx); + } + else + { + FL_GPTIM_DisableExternalClock(TIMx); + } + return FL_PASS; +} + +/** + * @brief 设置 FL_GPTIM_ETRInitTypeDef 为默认配置 + * @param etr_init 指向需要将值设置为默认配置的结构体 @ref FL_GPTIM_ETR_InitTypeDef 结构体 + * + * @retval None + */ +void FL_GPTIM_ETR_StructInit(FL_GPTIM_ETR_InitTypeDef *etr_init) +{ + etr_init->useExternalTrigger = FL_DISABLE; + etr_init->ETRFilter = FL_GPTIM_ETR_FILTER_DIV1; + etr_init->ETRPolarity = FL_GPTIM_ETR_POLARITY_NORMAL; + etr_init->ETRClockDivision = FL_GPTIM_ETR_PSC_DIV1; +} + +/** + * @brief 配置TIM的比较输出通道. + * @param TIMx Timer Instance + * @param Channel This parameter can be one of the following values: + * @arg @ref FL_GPTIM_CHANNEL_0 + * @arg @ref FL_GPTIM_CHANNEL_1 + * @arg @ref FL_GPTIM_CHANNEL_2 + * @arg @ref FL_GPTIM_CHANNEL_3 + * @param oc_init 指向一个 @ref FL_GPTIM_OC_InitTypeDef 结构体 + * @retval ErrorStatus枚举值 + * -FL_FAIL 配置过程发生错误 + * -FL_PASS 成功 + */ +FL_ErrorStatus FL_GPTIM_OC_Init(GPTIM_Type *TIMx, uint32_t channel, FL_GPTIM_OC_InitTypeDef *oc_init) +{ + FL_ErrorStatus result = FL_PASS; + /* 参数检查 */ + assert_param(IS_GPTIM_INSTANCE(TIMx)); + assert_param(IS_FL_GPTIM_OC_MODE(oc_init->OCMode)); + assert_param(IS_FL_GPTIM_OC_PRELOAD(oc_init->OCPreload)); + assert_param(IS_FL_GPTIM_OC_POLARITY(oc_init->OCPolarity)); + assert_param(IS_FL_GPTIM_OC_FASTMODE(oc_init->OCFastMode)); + assert_param(IS_FL_GPTIM_OC_ETR_CLEARN(oc_init->OCETRFStatus)); + /* 通道关闭 */ + FL_GPTIM_OC_DisableChannel(TIMx, channel); + /* 通道极性 */ + FL_GPTIM_OC_SetChannelPolarity(TIMx, oc_init->OCPolarity, channel); + /* 捕获映射到输出通道 */ + FL_GPTIM_CC_SetChannelMode(TIMx, FL_GPTIM_CHANNEL_MODE_OUTPUT, channel); + /* 输出比较模式寄存器配置 */ + OCConfig(TIMx, channel, oc_init); + /* 通道使能 */ + FL_GPTIM_OC_DisableChannel(TIMx, channel); + /* 手动触发更新事件，将配置值写入 */ + FL_GPTIM_GenerateUpdateEvent(TIMx); + FL_GPTIM_ClearFlag_Update(TIMx); + return result; +} +/** + * @brief 配置 + * @param TIMx Timer Instance + * @param Channel This parameter can be one of the following values: + * @arg @ref FL_GPTIM_CHANNEL_0 + * @arg @ref FL_GPTIM_CHANNEL_1 + * @arg @ref FL_GPTIM_CHANNEL_2 + * @arg @ref FL_GPTIM_CHANNEL_3 + * @param oc_init 指向需要将值设置为默认配置的结构体 @ref FL_GPTIM_OC_InitTypeDef 结构体包含配置参数. + * @retval ErrorStatus枚举值 + * -FL_FAIL 配置过程发生错误 + * -FL_PASS 成功 + */ +static FL_ErrorStatus OCConfig(GPTIM_Type *TIMx, uint32_t channel, FL_GPTIM_OC_InitTypeDef *oc_init) +{ + FL_ErrorStatus result = FL_PASS; + /* 配置比较输出通道模式 */ + FL_GPTIM_OC_SetMode(TIMx, oc_init->OCMode, channel); + /* 配置ETRF清零使能 */ + if(oc_init->OCETRFStatus == FL_ENABLE) + { + FL_GPTIM_OC_EnableClear(TIMx, channel); + } + /* 比较输出通道快速模式 */ + if(oc_init->OCFastMode == FL_ENABLE) + { + FL_GPTIM_OC_EnableFastMode(TIMx, channel); + } + /* 比较输出通道缓冲模式 */ + if(oc_init->OCPreload == FL_ENABLE) + { + FL_GPTIM_OC_EnablePreload(TIMx, channel); + } + /* 设置比较值 */ + switch(channel) + { + case FL_GPTIM_CHANNEL_1: + FL_GPTIM_WriteCompareCH1(TIMx, oc_init->compareValue); + break; + case FL_GPTIM_CHANNEL_2: + FL_GPTIM_WriteCompareCH2(TIMx, oc_init->compareValue); + break; + case FL_GPTIM_CHANNEL_3: + FL_GPTIM_WriteCompareCH3(TIMx, oc_init->compareValue); + break; + case FL_GPTIM_CHANNEL_4: + FL_GPTIM_WriteCompareCH4(TIMx, oc_init->compareValue); + break; + default : + result = FL_FAIL; + break; + } + return result; +} +/** + * @brief 设置 FL_GPTIM_OC_InitTypeDef 为默认配置 + * @param oc_init 指向需要将值设置为默认配置的结构体 @ref FL_GPTIM_OC_InitTypeDef 结构体 + * + * @retval None + */ +void FL_GPTIM_OC_StructInit(FL_GPTIM_OC_InitTypeDef *oc_init) +{ + /* Set the default configuration */ + oc_init->OCMode = FL_GPTIM_OC_MODE_FROZEN; + oc_init->OCETRFStatus = FL_DISABLE; + oc_init->OCFastMode = FL_DISABLE; + oc_init->compareValue = 0x00000000U; + oc_init->OCPolarity = FL_GPTIM_OC_POLARITY_NORMAL; + oc_init->OCPreload = FL_DISABLE; +} +/** + * @brief 配置TIM的输入捕获通道. + * @param TIMx Timer Instance + * @param Channel This parameter can be one of the following values: + * @arg @ref FL_GPTIM_CHANNEL_0 + * @arg @ref FL_GPTIM_CHANNEL_1 + * @arg @ref FL_GPTIM_CHANNEL_2 + * @arg @ref FL_GPTIM_CHANNEL_3 + * @param ic_init 指向一个 @ref FL_GPTIM_IC_InitTypeDef 结构体 + * @retval ErrorStatus枚举值 + * -FL_FAIL 配置过程发生错误 + * -FL_PASS 成功 + */ +FL_ErrorStatus FL_GPTIM_IC_Init(GPTIM_Type *TIMx, uint32_t channel, FL_GPTIM_IC_InitTypeDef *ic_init) +{ + FL_ErrorStatus result = FL_PASS; + /* 参数检查 */ + assert_param(IS_FL_GPTIM_CHANNEL(channel)); + assert_param(IS_FL_GPTIM_IC_CAPTURE_STATE(ic_init->captureState)); + assert_param(IS_FL_GPTIM_IC_POLARITY(ic_init->ICPolarity)); + assert_param(IS_FL_GPTIM_CHANNEL_MODE(ic_init->ICActiveInput)); + assert_param(IS_FL_GPTIM_IC_PSC(ic_init->ICPrescaler)); + assert_param(IS_FL_GPTIM_IC_FILTER(ic_init->ICFilter)); + /* 时钟总线使能配置 */ + if(TIMx == GPTIM0) + { + FL_CMU_EnableGroup4BusClock(FL_CMU_GROUP4_BUSCLK_GPTIM0); + } + else + if(TIMx == GPTIM1) + { + FL_CMU_EnableGroup4BusClock(FL_CMU_GROUP4_BUSCLK_GPTIM1); + } + else + { + FL_CMU_EnableGroup4BusClock(FL_CMU_GROUP4_BUSCLK_GPTIM2); + } + /* 通道关闭 */ + FL_GPTIM_IC_DisableChannel(TIMx, channel); + /*捕获极性 */ + FL_GPTIM_IC_SetChannelPolarity(TIMx, ic_init->ICPolarity, channel); + /* 捕获映射通道 */ + FL_GPTIM_CC_SetChannelMode(TIMx, ic_init->ICActiveInput, channel); + /* 捕获预分频 */ + FL_GPTIM_IC_SetPrescaler(TIMx, ic_init->ICPrescaler, channel); + /* 捕获滤波器 */ + FL_GPTIM_IC_SetFilter(TIMx, ic_init->ICFilter, channel); + if(ic_init->captureState == FL_ENABLE) + { + FL_GPTIM_IC_EnableChannel(TIMx, channel); + } + return result; +} + +/** + * @brief 设置 FL_GPTIM_IC_InitTypeDef 为默认配置 + * @param ic_init 指向需要将值设置为默认配置的结构体 @ref FL_GPTIM_IC_InitTypeDef 结构体 + * + * @retval None + */ +void FL_GPTIM_IC_StructInit(FL_GPTIM_IC_InitTypeDef *ic_init) +{ + /* Set the default configuration */ + ic_init->ICPolarity = FL_GPTIM_IC_POLARITY_NORMAL; + ic_init->ICActiveInput = FL_GPTIM_CHANNEL_MODE_INPUT_NORMAL; + ic_init->ICPrescaler = FL_GPTIM_IC_PSC_DIV1; + ic_init->ICFilter = FL_GPTIM_IC_FILTER_DIV1; + ic_init->captureState = FL_DISABLE; +} + +/** + * @} + */ + +#endif /* FL_GPTIM_DRIVER_ENABLED */ + +/** + * @} + */ + +/** + * @} + */ + +/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/ diff --git a/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_i2c.c b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_i2c.c new file mode 100644 index 0000000..b7e1dbd --- /dev/null +++ b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_i2c.c @@ -0,0 +1,274 @@ + /** + ******************************************************************************************************* + * @file fm33lg0xx_fl_i2c.c + * @author FMSH Application Team + * @brief Src file of I2C FL Module + ******************************************************************************************************* + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + + +/* Includes ------------------------------------------------------------------*/ +#include "fm33lg0xx_fl.h" + +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @addtogroup I2C + * @{ + */ + +#ifdef FL_I2C_DRIVER_ENABLED + +/* Private macros ------------------------------------------------------------*/ +/** @addtogroup I2C_FL_Private_Macros + * @{ + */ + +#define IS_FL_I2C_INSTANCE(INSTANCE) ((INSTANCE) == I2C) + +#define IS_FL_I2C_BAUDRATE(__VALUE__) (((__VALUE__) > 0 )&&((__VALUE__) <= 1000000)) + +#define IS_FL_I2C_CLOCKSRC(__VALUE__) (((__VALUE__) == FL_CMU_I2C_CLK_SOURCE_APBCLK )||\ + ((__VALUE__) == FL_CMU_I2C_CLK_SOURCE_RCHF)||\ + ((__VALUE__) == FL_CMU_I2C_CLK_SOURCE_SYSCLK)||\ + ((__VALUE__) == FL_CMU_I2C_CLK_SOURCE_RCLF)) + +#define IS_FL_I2C_MSATER_TIMEOUT(__VALUE__) (((__VALUE__) == FL_IWDT_PERIOD_125MS)||\ + ((__VALUE__) == FL_IWDT_PERIOD_16000MS)) + + +#define IS_FL_I2C_SLAVE_ACK(__VALUE__) (((__VALUE__) == FL_ENABLE)||\ + ((__VALUE__) == FL_DISABLE)) + + + +#define IS_FL_I2C_ANGLOGFILTER(__VALUE__) (((__VALUE__) == FL_ENABLE)||\ + ((__VALUE__) == FL_DISABLE)) + +#define IS_FL_I2C_ADDRSIZE10BIT(__VALUE__) (((__VALUE__) == FL_ENABLE)||\ + ((__VALUE__) == FL_DISABLE)) + +#define IS_FL_I2C_SLAVE_SCLSEN(__VALUE__) (((__VALUE__) == FL_ENABLE)||\ + ((__VALUE__) == FL_DISABLE)) + +/** + * @} + */ + +/* Exported functions --------------------------------------------------------*/ +/** @addtogroup I2C_FL_EF_Init + * @{ + */ + +/** + * @brief 复位I2C外设. + * @param I2Cx 外设入口地址 + * @retval 错误状态，可能值： + * -FL_PASS 外设寄存器值恢复复位值 + * -FL_FAIL 未成功执行 + */ +FL_ErrorStatus FL_I2C_DeInit(I2C_Type *I2Cx) +{ + assert_param(IS_FL_I2C_INSTANCE(I2Cx)); + /* 使能外设复位 */ + FL_RMU_EnablePeripheralReset(RMU); + /* 复位I2C外设寄存器 */ + FL_RMU_EnableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_I2C); + FL_RMU_DisableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_I2C); + /* 关闭外设总线始时钟和工作时钟 */ + FL_CMU_DisableGroup3BusClock(FL_CMU_GROUP3_BUSCLK_I2C); + FL_CMU_DisableGroup3OperationClock(FL_CMU_GROUP3_OPCLK_I2C); + /* 锁定外设复位 */ + FL_RMU_DisablePeripheralReset(RMU); + return FL_PASS; +} + +/** + * @brief 配置I2C主机模式. + * @param I2Cx 外设入口地址 + * @param I2C_InitStruct 指向 @ref FL_I2C_MasterMode_InitTypeDef 结构体的指针 + * @retval 错误状态，可能值： + * -FL_PASS 配置成功 + * -FL_FAIL 配置过程发生错误 + */ +FL_ErrorStatus FL_I2C_MasterMode_Init(I2C_Type *I2Cx, FL_I2C_MasterMode_InitTypeDef *I2C_InitStruct) +{ + uint32_t I2C_Clk_Freq = 0, BRG = 0; + assert_param(IS_FL_I2C_INSTANCE(I2Cx)); + assert_param(IS_FL_I2C_CLOCKSRC(I2C_InitStruct->clockSource)); + assert_param(IS_FL_I2C_BAUDRATE(I2C_InitStruct->baudRate)); + /* 外设总线时钟和工作时钟开启 */ + FL_CMU_EnableGroup3BusClock(FL_CMU_GROUP3_BUSCLK_I2C); + FL_CMU_EnableGroup3OperationClock(FL_CMU_GROUP3_OPCLK_I2C); + /* 选择I2C工作时钟源 */ + FL_CMU_SetI2CClockSource(I2C_InitStruct->clockSource); + /* 获取时钟源速度 */ + switch(I2C_InitStruct->clockSource) + { + case FL_CMU_I2C_CLK_SOURCE_APBCLK: + I2C_Clk_Freq = FL_CMU_GetAPBClockFreq(); + break; + case FL_CMU_I2C_CLK_SOURCE_RCHF: + I2C_Clk_Freq = FL_CMU_GetRCHFClockFreq(); + break; + case FL_CMU_I2C_CLK_SOURCE_SYSCLK: + I2C_Clk_Freq = FL_CMU_GetSystemClockFreq(); + break; + case FL_CMU_I2C_CLK_SOURCE_RCLF: + I2C_Clk_Freq = FL_CMU_GetRCLFClockFreq(); + break; + default: + break; + } + /* 根据不同的时钟源速度计算出配置速率需要的寄存器值并配置相关寄存器 */ + BRG = (uint32_t)(I2C_Clk_Freq / (2 * I2C_InitStruct->baudRate)) - 1; + FL_I2C_Master_WriteSCLHighWidth(I2Cx, BRG); + FL_I2C_Master_WriteSCLLowWidth(I2Cx, BRG); + FL_I2C_Master_WriteSDAHoldTime(I2Cx, (uint32_t)((BRG&0x1FF) / 2.0 + 0.5)); + /* 使能外设 */ + FL_I2C_Master_Enable(I2C); + return FL_PASS; +} + + + +/** + * @brief 将 @ref FL_I2C_MasterMode_InitTypeDef 结构体初始化为默认配置 + * @param I2C_InitStruct 指向 @ref FL_I2C_MasterMode_InitTypeDef 结构体的指针 + * + * @retval None + */ + +void FL_I2C_MasterMode_StructInit(FL_I2C_MasterMode_InitTypeDef *I2C_InitStruct) +{ + I2C_InitStruct->clockSource = FL_CMU_I2C_CLK_SOURCE_RCHF; + I2C_InitStruct->baudRate = 40000; +} + +/** + * @brief 配置I2C从机模式. + * @param I2Cx 外设入口地址 + * @param I2C_InitStruct 指向 @ref FL_I2C_SlaveMode_InitTypeDef 结构体的指针. + * @note 作为从机时的从机地址应参考手册推荐具体设置 + * @retval 错误状态，可能值： + * -FL_PASS 配置成功 + * -FL_FAIL 配置过程发生错误 + */ +FL_ErrorStatus FL_I2C_SlaveMode_Init(I2C_Type *I2Cx, FL_I2C_SlaveMode_InitTypeDef *I2C_InitStruct) +{ + assert_param(IS_FL_I2C_INSTANCE(I2Cx)); + assert_param(IS_FL_I2C_SLAVE_ACK(I2C_InitStruct->ACK)); + assert_param(IS_FL_I2C_ADDRSIZE10BIT(I2C_InitStruct->ownAddrSize10bit)); + assert_param(IS_FL_I2C_SLAVE_SCLSEN(I2C_InitStruct->SCLSEN)); + /* 外设总线时钟开启 注：不需要工作时钟*/ + FL_CMU_EnableGroup3BusClock(FL_CMU_GROUP3_BUSCLK_I2C); + /* 使能SDA输出延迟 注：推荐开启*/ + FL_I2C_Slave_EnableSDAStretching(I2Cx); + /* 使能SCL模拟滤波使能 注：推荐开启*/ + FL_I2C_Slave_EnableSCLAnalogFilter(I2Cx); + /* 从机ACK */ + if(I2C_InitStruct->ACK == FL_ENABLE) + { + FL_I2C_Slave_EnableACK(I2Cx); + } + else + { + FL_I2C_Slave_DisableACK(I2Cx); + } + /* 从机地址宽度 和地址配置 */ + if(I2C_InitStruct->ownAddrSize10bit == FL_ENABLE) + { + FL_I2C_Slave_Enable10BitAddress(I2Cx); + FL_I2C_Slave_WriteSlaveAddress(I2Cx, I2C_InitStruct->ownAddr); + } + else + { + FL_I2C_Slave_Disable10BitAddress(I2Cx); + FL_I2C_Slave_WriteSlaveAddress(I2Cx, I2C_InitStruct->ownAddr & 0x7F); + } + /* 从机时钟延展使能 */ + if(I2C_InitStruct->SCLSEN == FL_ENABLE) + { + FL_I2C_Slave_EnableSCLStretching(I2Cx); + } + else + { + FL_I2C_Slave_DisableSCLStretching(I2Cx); + } + /* 外设开启 */ + FL_I2C_Slave_Enable(I2Cx); + return FL_PASS; +} + +/** + * @brief 将 @ref FL_I2C_SlaveMode_InitTypeDef 结构体初始化为默认配置 + * @param I2C_InitStruct 指向 @ref FL_I2C_SlaveMode_InitTypeDef 结构体的指针 + * + * @retval None + */ + +void FL_I2C_SlaveMode_StructInit(FL_I2C_SlaveMode_InitTypeDef *I2C_InitStruct) +{ + I2C_InitStruct->ACK = FL_ENABLE; + I2C_InitStruct->ownAddr = 0x55; + I2C_InitStruct->ownAddrSize10bit = FL_DISABLE; + I2C_InitStruct->SCLSEN = FL_DISABLE; +} + +/** + * @} + */ + +#endif /* FL_I2C_DRIVER_ENABLED */ + +/** + * @} + */ + +/** + * @} + */ + +/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/ + + + + diff --git a/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_iwdt.c b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_iwdt.c new file mode 100644 index 0000000..e828163 --- /dev/null +++ b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_iwdt.c @@ -0,0 +1,181 @@ + /** + **************************************************************************************************** + * @file fm33lg0xx_fl_iwdt.c + * @author FMSH Application Team + * @brief Src file of IWDT FL Module + **************************************************************************************************** + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + +/* Includes ------------------------------------------------------------------*/ +#include "fm33lg0xx_fl.h" + +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @addtogroup IWDT + * @{ + */ + +#ifdef FL_IWDT_DRIVER_ENABLED + +/* Private macros ------------------------------------------------------------*/ +/** @addtogroup IWDT_FL_Private_Macros + * @{ + */ +#define IS_IWDT_INSTANCE(INTANCE) ((INTANCE) == IWDT) + +#define IS_FL_IWDT_WINDOWSVEL(__VALUE__) ((__VALUE__) < 0xFFF) + +#define IS_FL_IWDT_OVERFLOWPERIOD(__VALUE__) (((__VALUE__) == FL_IWDT_PERIOD_125MS)||\ + ((__VALUE__) == FL_IWDT_PERIOD_250MS)||\ + ((__VALUE__) == FL_IWDT_PERIOD_500MS)||\ + ((__VALUE__) == FL_IWDT_PERIOD_1000MS)||\ + ((__VALUE__) == FL_IWDT_PERIOD_2000MS)||\ + ((__VALUE__) == FL_IWDT_PERIOD_4000MS)||\ + ((__VALUE__) == FL_IWDT_PERIOD_8000MS)||\ + ((__VALUE__) == FL_IWDT_PERIOD_16000MS)) +/** + * @} + */ + +/* Exported functions --------------------------------------------------------*/ +/** @addtogroup IWDT_FL_EF_Init + * @{ + */ + +/** + * @brief 复位IWDT外设 + * + * @note 此函数只能用于配制前复位外设，因为IWDT开启后不可以关闭 + * + * @param IWDTx 外设入口地址 + * + * @retval FL_ErrorStatus枚举值 + * -FL_PASS 配置成功 + * -FL_FAIL 配置过程发生错误 + */ +FL_ErrorStatus FL_IWDT_DeInit(IWDT_Type *IWDTx) +{ + assert_param(IS_IWDT_INSTANCE(IWDTx)); + return FL_PASS; +} +/** + * @brief 根据 IWDT_InitStruct 初始化对应外设的寄存器值. + * + * @note IWTD使能后将无法关闭，直到下一次芯片复位 + * + * @param IWDTx 外设入口地址 + * @param IWDT_InitStruct 是 @ref FL_IWDT_InitTypeDef结构体，它包含指定IWDT外设的配置信息 + * + * @retval ErrorStatus枚举值 + * -FL_PASS 配置成功 + * -FL_FAIL 配置过程发生错误 + */ +FL_ErrorStatus FL_IWDT_Init(IWDT_Type *IWDTx, FL_IWDT_InitTypeDef *IWDT_InitStruct) +{ + uint32_t i = 0; + FL_ErrorStatus status = FL_PASS; + uint32_t iwdtCounter = 0; + /* 入口参数检查 */ + assert_param(IS_IWDT_INSTANCE(IWDTx)); + assert_param(IS_FL_IWDT_WINDOWSVEL(IWDT_InitStruct->iwdtWindows)); + assert_param(IS_FL_IWDT_OVERFLOWPERIOD(IWDT_InitStruct->overflowPeriod)); + /* 开启总线时钟 */ + FL_CMU_EnableGroup1BusClock(FL_CMU_GROUP1_BUSCLK_IWDT); + /* 启动看门狗 */ + FL_IWDT_ReloadCounter(IWDTx); + /* 配置独立看门狗溢出周期 */ + FL_IWDT_SetPeriod(IWDTx, IWDT_InitStruct->overflowPeriod); + + iwdtCounter = FL_IWDT_ReadCounter(IWDTx); + /* 窗口功能延时 */ + if(IWDT_InitStruct->iwdtWindows != 0) + { + if(iwdtCounter == 0) + { + while((FL_IWDT_ReadCounter(IWDTx) != 1) && (i++ < 500)) + { + + } + } + else + { + while((FL_IWDT_ReadCounter(IWDTx) != 0) && (i++ < 500)) + { + + } + } + } + + /* 配置独立看门狗清狗窗口*/ + FL_IWDT_WriteWindow(IWDTx, IWDT_InitStruct->iwdtWindows); + return status; +} +/** + * @brief 设置 IWDT_InitStruct 为默认配置 + * + * @param IWDT_InitStruct 指向需要将值设置为默认配置的结构体 @ref FL_IWDT_InitTypeDef 结构体 + * + * @retval None + */ +void FL_IWDT_StructInit(FL_IWDT_InitTypeDef *IWDT_InitStruct) +{ + /* 默认不使用窗口 */ + IWDT_InitStruct->iwdtWindows = 0; + /*最长溢出时间*/ + IWDT_InitStruct->overflowPeriod = FL_IWDT_PERIOD_500MS; +} + +/** + * @} + */ + +#endif /* FL_IWDT_DRIVER_ENABLED */ + +/** + * @} + */ + +/** + * @} + */ + +/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/ diff --git a/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_lcd.c b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_lcd.c new file mode 100644 index 0000000..0f5af93 --- /dev/null +++ b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_lcd.c @@ -0,0 +1,385 @@ + /** + ******************************************************************************************************* + * @file fm33lg0xx_fl_lcd.c + * @author FMSH Application Team + * @brief Src file of LCD FL Module + ******************************************************************************************************* + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ +/** + ******************************************************************************************************* + * @file fm33lg0xx_fl_lcd.c + * @author FMSH Application Team + * @brief Src file of LCD FL Module + ******************************************************************************************************* + * @attention + * + * Copyright (c) [2021] [Fudan Microelectronics] + * THIS SOFTWARE is licensed under Mulan PSL v2. + * You can use this software according to the terms and conditions of the Mulan PSL v2. + * You may obtain a copy of Mulan PSL v2 at: + * http://license.coscl.org.cn/MulanPSL2 + * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, + * EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, + * MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE. + * See the Mulan PSL v2 for more details. + * + ******************************************************************************************************* + */ +/* Includes ------------------------------------------------------------------*/ +#include "fm33lg0xx_fl.h" + +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @addtogroup LCD + * @{ + */ + +#ifdef FL_LCD_DRIVER_ENABLED + +/* Private macros ------------------------------------------------------------*/ +/** @addtogroup LCD_FL_Private_Macros + * @{ + */ + +#define IS_FL_LCD_INSTANCE(INTENCE) ((INTENCE) == LCD) + +#define IS_FL_LCD_BIASCURRENT(__VALUE__) (((__VALUE__) == (FL_LCD_BIAS_CURRENT_VERYHIGH))||\ + ((__VALUE__) == (FL_LCD_BIAS_CURRENT_HIGH))||\ + ((__VALUE__) == (FL_LCD_BIAS_CURRENT_MEDIUM))||\ + ((__VALUE__) == (FL_LCD_BIAS_CURRENT_LOW))) + +#define IS_FL_LCD_ENMODE(__VALUE__) ((__VALUE__) == (FL_LCD_DRIVER_MODE_INNER_RESISTER)||\ + ((__VALUE__) == (FL_LCD_DRIVER_MODE_OUTER_CAPACITY))) + +#define IS_FL_LCD_BIASVOLTAGE(__VALUE__) (((__VALUE__) == (FL_LCD_BIAS_VOLTAGE_LEVEL0))||\ + ((__VALUE__) == (FL_LCD_BIAS_VOLTAGE_LEVEL1))||\ + ((__VALUE__) == (FL_LCD_BIAS_VOLTAGE_LEVEL2))||\ + ((__VALUE__) == (FL_LCD_BIAS_VOLTAGE_LEVEL3))||\ + ((__VALUE__) == (FL_LCD_BIAS_VOLTAGE_LEVEL4))||\ + ((__VALUE__) == (FL_LCD_BIAS_VOLTAGE_LEVEL5))||\ + ((__VALUE__) == (FL_LCD_BIAS_VOLTAGE_LEVEL6))||\ + ((__VALUE__) == (FL_LCD_BIAS_VOLTAGE_LEVEL7))||\ + ((__VALUE__) == (FL_LCD_BIAS_VOLTAGE_LEVEL8))||\ + ((__VALUE__) == (FL_LCD_BIAS_VOLTAGE_LEVEL9))||\ + ((__VALUE__) == (FL_LCD_BIAS_VOLTAGE_LEVEL10))||\ + ((__VALUE__) == (FL_LCD_BIAS_VOLTAGE_LEVEL11))||\ + ((__VALUE__) == (FL_LCD_BIAS_VOLTAGE_LEVEL12))||\ + ((__VALUE__) == (FL_LCD_BIAS_VOLTAGE_LEVEL13))||\ + ((__VALUE__) == (FL_LCD_BIAS_VOLTAGE_LEVEL14))||\ + ((__VALUE__) == (FL_LCD_BIAS_VOLTAGE_LEVEL15))) + +#define IS_FL_LCD_BIASMD(__VALUE__) (((__VALUE__) == (FL_LCD_BIAS_MODE_4BIAS))||\ + ((__VALUE__) == (FL_LCD_BIAS_MODE_3BIAS))) + +#define IS_FL_LCD_BWFT(__VALUE__) (((__VALUE__) == (FL_LCD_WAVEFORM_TYPEA))||\ + ((__VALUE__) == (FL_LCD_WAVEFORM_TYPEB))) + +#define IS_FL_LCD_LMUX(__VALUE__) (((__VALUE__) == (FL_LCD_COM_NUM_4COM))||\ + ((__VALUE__) == (FL_LCD_COM_NUM_6COM))||\ + ((__VALUE__) == (FL_LCD_COM_NUM_8COM))) + + +/** + * @} + */ + +/* Exported functions --------------------------------------------------------*/ +/** @addtogroup LCD_FL_EF_Init + * @{ + */ + +/** + * @brief 获取LCD工作频率寄存器. + * @param wavetype 波形 + * @param freq 工作频率 + * @retval 工作频率寄存器值 + */ +static uint32_t FL_LCD_DisplayFreq(uint32_t wavetype,uint32_t freq) +{ + uint32_t displayFreq = 32u; + if((freq > 0) && (freq <= 100)) + { + if(wavetype == FL_LCD_WAVEFORM_TYPEA) + { + switch(FL_LCD_GetCOMNumber(LCD)) + { + case FL_LCD_COM_NUM_4COM: + displayFreq = (32768 / (4 * freq * 2) ); + break; + case FL_LCD_COM_NUM_6COM: + displayFreq = (32768 / (6 * freq * 2) ); + break; + case FL_LCD_COM_NUM_8COM: + displayFreq = (32768 / (8 * freq * 2) ); + break; + default: + displayFreq = (32768/ (4 * freq * 2) ); + break; + } + } + else + { + switch(FL_LCD_GetCOMNumber(LCD)) + { + case FL_LCD_COM_NUM_4COM: + displayFreq = (32768 / (4 * freq * 4) ); + break; + case FL_LCD_COM_NUM_6COM: + displayFreq = (32768 / (6 * freq * 4) ); + break; + case FL_LCD_COM_NUM_8COM: + displayFreq = (32768 / (8 * freq * 4) ); + break; + default: + displayFreq = (32768/ (4 * freq * 4) ); + break; + } + } + + } + displayFreq = displayFreq & 0x000000ffu; + return displayFreq; +} + +/** + * @brief 获取LCD闪烁时间寄存器值 + * @param timevalue 闪烁时间 + * @retval 闪烁时间寄存器 + */ +static uint32_t FL_LCD_FlickTime(uint32_t timevalue) +{ + uint32_t stepTime; + uint32_t TimeResult = 0u; + switch(FL_LCD_GetCOMNumber(LCD)) + { + case FL_LCD_COM_NUM_4COM: + stepTime = (4 * FL_LCD_ReadDisplayFrequency(LCD) * 2 * 16 * 1000) / 32768; + break; + case FL_LCD_COM_NUM_6COM: + stepTime = (6 * FL_LCD_ReadDisplayFrequency(LCD) * 2 * 16 * 1000) / 32768; + break; + case FL_LCD_COM_NUM_8COM: + stepTime = (8 * FL_LCD_ReadDisplayFrequency(LCD) * 2 * 16 * 1000) / 32768; + break; + default: + stepTime = (4 * FL_LCD_ReadDisplayFrequency(LCD) * 2 * 16 * 1000) / 32768; + break; + } + TimeResult = timevalue / stepTime; + return TimeResult; +} + +/** + * @brief 复位对应LCD寄存器. + + * @param LCDx + * @retval ErrorStatus枚举值: + * -FL_PASS 外设寄存器值恢复复位值 + * -FL_FAIL 未成功执行 + */ +FL_ErrorStatus FL_LCD_DeInit(LCD_Type *LCDx) +{ + assert_param(IS_FL_LCD_INSTANCE(LCDx)); + /* 使能外设复位 */ + FL_RMU_EnablePeripheralReset(RMU); + /* 复位LCD外设寄存器 */ + FL_RMU_EnableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_LCD); + FL_RMU_DisableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_LCD); + /* 关闭外设总线始时钟和工作时钟 */ + FL_CMU_DisableGroup2BusClock(FL_CMU_GROUP2_BUSCLK_LCD); + /* 锁定外设复位 */ + FL_RMU_DisablePeripheralReset(RMU); + return FL_PASS; +} + +/** + * @brief 根据 LCD_InitStruct 的配置信息初始化对应外设入口地址的寄存器值. + * @param LCDx LCDx + * @param LCD_InitStruct 指向一个 @ref FL_LCD_InitTypeDef 结构体 + * 其中包含了外设的相关配置信息. + * @retval ErrorStatus枚举值 + * -FL_FAIL 配置过程发生错误 + * -FL_PASS LCD配置成功 + */ +FL_ErrorStatus FL_LCD_Init(LCD_Type *LCDx, FL_LCD_InitTypeDef *initStruct) +{ + assert_param(IS_FL_LCD_INSTANCE(LCDx)); + assert_param(IS_FL_LCD_BIASCURRENT(initStruct->biasCurrent)); + assert_param(IS_FL_LCD_ENMODE(initStruct->mode)); + assert_param(IS_FL_LCD_BIASVOLTAGE(initStruct->biasVoltage)); + assert_param(IS_FL_LCD_BIASMD(initStruct->biasMode)); + assert_param(IS_FL_LCD_BWFT(initStruct->waveform)); + assert_param(IS_FL_LCD_LMUX(initStruct->COMxNum)); + /* 外设总线始时钟 */ + FL_CMU_EnableGroup2BusClock(FL_CMU_GROUP2_BUSCLK_LCD); + /* 电流源电流控制 */ + FL_LCD_SetBiasCurrent(LCD, initStruct->biasCurrent); + /* LCD驱动模式 */ + FL_LCD_SetDriverMode(LCD, initStruct->mode); + /* 偏执电压设置 */ + FL_LCD_SetBiasVoltage(LCD, initStruct->biasVoltage); + /* 偏执模式选择 */ + FL_LCD_SetBiasMode(LCD, initStruct->biasMode); + /* 驱动波形设置 */ + FL_LCD_SetWaveform(LCD, initStruct->waveform); + /* COMx口选择 */ + FL_LCD_SetCOMNumber(LCD, initStruct->COMxNum); + /* 设置工作频率 */ + FL_LCD_WriteDisplayFrequency(LCD, FL_LCD_DisplayFreq(initStruct->waveform,initStruct->displayFreq)); + /* 设置闪烁频率 */ + FL_LCD_WriteDisplayOnTime(LCD, FL_LCD_FlickTime(initStruct->flickOnTime)); + FL_LCD_WriteDisplayOffTime(LCD, FL_LCD_FlickTime(initStruct->flickOffTime)); + /* 使能外设 */ + FL_LCD_Enable(LCD); + return FL_PASS; +} + +/** + * @brief 设置 LCD_InitStruct 为默认配置 + * @param LCD_InitStruct 指向需要将值设置为默认配置的结构体 @ref FL_LCD_InitTypeDef 结构体 + * + * @retval None + */ +void FL_LCD_StructInit(FL_LCD_InitTypeDef *initStruct) +{ + initStruct->biasCurrent = FL_LCD_BIAS_CURRENT_HIGH; + initStruct->mode = FL_LCD_DRIVER_MODE_INNER_RESISTER; + initStruct->biasVoltage = FL_LCD_BIAS_VOLTAGE_LEVEL10; + initStruct->biasMode = FL_LCD_BIAS_MODE_3BIAS; + initStruct->waveform = FL_LCD_WAVEFORM_TYPEA; + initStruct->COMxNum = FL_LCD_COM_NUM_6COM; + initStruct->displayFreq = 42; + initStruct->flickOnTime = 0; + initStruct->flickOffTime = 0; +} + +/** + * @brief 设置 LCD 4COM显示字端 + * @param display 指向显示信息的缓存区域，可直接指向LCD的DATAx寄存器。 + * @param com 待显示字段所在COM。范围0-4。 + * @param seg 待显示字段所在SEG。范围0-43。 + * @param state 待显示字段状态。0，熄灭；否则，点亮。 + * + * @retval None + */ +void FL_LCD_4COMDisplay(uint32_t *display, uint8_t com, uint8_t seg, uint8_t state) +{ + uint8_t temp; + if(state != 0) + { + state = 1; + } + if(seg > 31) + { + temp = (seg - 32) + com * 12; + com = 4 + temp / 32; + seg = temp % 32; + } + MODIFY_REG(display[com], (uint32_t)(0x1U << seg), (uint32_t)(state << seg)); +} + +/** + * @brief 设置 LCD 6COM显示字端 + * @param display 指向显示信息的缓存区域，可直接指向LCD的DATAx寄存器。 + * @param com 待显示字段所在COM。范围0-6。 + * @param seg 待显示字段所在SEG。范围0-41。 + * @param state 待显示字段状态。0，熄灭；否则，点亮。 + * + * @retval None + */ +void FL_LCD_6COMDisplay(uint32_t *display, uint8_t com, uint8_t seg, uint8_t state) +{ + uint8_t temp; + if(state != 0) + { + state = 1; + } + if(seg > 31) + { + temp = (seg - 32) + com * 10; + com = 6 + temp / 32; + seg = temp % 32; + } + MODIFY_REG(display[com], (uint32_t)(0x1 << seg), (uint32_t)(state << seg)); +} + +/** + * @brief 设置 LCD 8COM显示字端 + * @param display 指向显示信息的缓存区域，可直接指向LCD的DATAx寄存器。 + * @param com 待显示字段所在COM。范围0-8。 + * @param seg 待显示字段所在SEG。范围0-39。 + * @param state 待显示字段状态。0，熄灭；否则，点亮。 + * + * @retval None + */ +void FL_LCD_8COMDisplay(uint32_t *display, uint8_t com, uint8_t seg, uint8_t state) +{ + uint8_t temp; + if(state != 0) + { + state = 1; + } + if(seg > 31) + { + temp = (seg - 32) + com * 8; + com = 8 + temp / 32; + seg = temp % 32; + } + MODIFY_REG(display[com], (uint32_t)(0x1 << seg), (uint32_t)(state << seg)); +} + +/** + * @} + */ + +#endif /* FL_LCD_DRIVER_ENABLED */ + +/** + * @} + */ + +/** + * @} + */ + +/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/ + diff --git a/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_lptim16.c b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_lptim16.c new file mode 100644 index 0000000..cb77fb2 --- /dev/null +++ b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_lptim16.c @@ -0,0 +1,399 @@ + /** + **************************************************************************************************** + * @file fm33lg0xx_fl_lptim16.c + * @author FMSH Application Team + * @brief Src file of LPTIM16 FL Module + **************************************************************************************************** + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + +/* Includes ------------------------------------------------------------------*/ +#include "fm33lg0xx_fl.h" + +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @addtogroup LPTIM16 + * @{ + */ + +#ifdef FL_LPTIM16_DRIVER_ENABLED + +/* Private macros ------------------------------------------------------------*/ +/** @addtogroup LPTIM16_FL_Private_Macros + * @{ + */ + +#define IS_LPTIM16_INSTANCE(INSTANCE) (((INSTANCE) == LPTIM16)) + +#define IS_FL_LPTIM16_CHANNEL(__VALUE__) (((__VALUE__) == FL_LPTIM16_CHANNEL_1)||\ + ((__VALUE__) == FL_LPTIM16_CHANNEL_2)) + +#define IS_FL_LPTIM16_CMU_CLK_SOURCE(__VALUE__) (((__VALUE__) == FL_CMU_LPTIM16_CLK_SOURCE_RCLF)||\ + ((__VALUE__) == FL_CMU_LPTIM16_CLK_SOURCE_RCLP)||\ + ((__VALUE__) == FL_CMU_LPTIM16_CLK_SOURCE_LSCLK)||\ + ((__VALUE__) == FL_CMU_LPTIM16_CLK_SOURCE_APBCLK)) + +#define IS_FL_LPTIM16_CLK_SOURCE(__VALUE__) (((__VALUE__) == FL_LPTIM16_CLK_SOURCE_INTERNAL)||\ + ((__VALUE__) == FL_LPTIM16_CLK_SOURCE_EXTERNAL)) + +#define IS_FL_LPTIM16_PSC(__VALUE__) (((__VALUE__) == FL_LPTIM16_PSC_DIV1)||\ + ((__VALUE__) == FL_LPTIM16_PSC_DIV2)||\ + ((__VALUE__) == FL_LPTIM16_PSC_DIV4)||\ + ((__VALUE__) == FL_LPTIM16_PSC_DIV8)||\ + ((__VALUE__) == FL_LPTIM16_PSC_DIV16)||\ + ((__VALUE__) == FL_LPTIM16_PSC_DIV32)||\ + ((__VALUE__) == FL_LPTIM16_PSC_DIV64)||\ + ((__VALUE__) == FL_LPTIM16_PSC_DIV128)) + +#define IS_FL_LPTIM16_OPERATION_MODE(__VALUE__) (((__VALUE__) == FL_LPTIM16_OPERATION_MODE_NORMAL)||\ + ((__VALUE__) == FL_LPTIM16_OPERATION_MODE_EXTERNAL_TRIGGER_CNT)||\ + ((__VALUE__) == FL_LPTIM16_OPERATION_MODE_EXTERNAL_ASYNC_PULSE_CNT)||\ + ((__VALUE__) == FL_LPTIM16_OPERATION_MODE_TIMEOUT)) + +#define IS_FL_LPTIM16_ENCODER_MODE(__VALUE__) (((__VALUE__) == FL_LPTIM16_ENCODER_MODE_DISABLE)||\ + ((__VALUE__) == FL_LPTIM16_ENCODER_MODE_TI1FP1_TI2FP2_CNT)||\ + ((__VALUE__) == FL_LPTIM16_ENCODER_MODE_TI2FP2_TI1FP1_CNT)||\ + ((__VALUE__) == FL_LPTIM16_ENCODER_MODE_TI2FP2_CNT_TI1FP1_CNT)) + +#define IS_FL_LPTIM16_ETR_TRIGGER_EDGE(__VALUE__) (((__VALUE__) == FL_LPTIM16_ETR_TRIGGER_EDGE_RISING)||\ + ((__VALUE__) == FL_LPTIM16_ETR_TRIGGER_EDGE_FALLING)||\ + ((__VALUE__) == FL_LPTIM16_ETR_TRIGGER_EDGE_BOTH)) + +#define IS_FL_LPTIM16_ETR_COUNT_EDGE(__VALUE__) (((__VALUE__) == FL_LPTIM16_ETR_COUNT_EDGE_RISING)||\ + ((__VALUE__) == FL_LPTIM16_ETR_COUNT_EDGE_FALLING)) + +#define IS_FL_LPTIM16_ONE_PULSE_MODE(__VALUE__) (((__VALUE__) == FL_LPTIM16_ONE_PULSE_MODE_CONTINUOUS)||\ + ((__VALUE__) == FL_LPTIM16_ONE_PULSE_MODE_SINGLE)) + +#define IS_FL_LPTIM16_IC_EDGE(__VALUE__) (((__VALUE__) == FL_LPTIM16_IC_EDGE_RISING)||\ + ((__VALUE__) == FL_LPTIM16_IC_EDGE_FALLING)||\ + ((__VALUE__) == FL_LPTIM16_IC_EDGE_BOTH)) + +#define IS_FL_LPTIM16_IC_POLARITY(__VALUE__) (((__VALUE__) == FL_LPTIM16_IC_POLARITY_NORMAL)||\ + ((__VALUE__) == FL_LPTIM16_IC_POLARITY_INVERT)) + +#define IS_FL_LPTIM16_OC_POLARITY(__VALUE__) (((__VALUE__) == FL_LPTIM16_OC_POLARITY_NORMAL)||\ + ((__VALUE__) == FL_LPTIM16_OC_POLARITY_INVERT)) + +#define IS_FL_LPTIM16_IC1_CAPTURE_SOURCE(__VALUE__) (((__VALUE__) == FL_LPTIM16_IC1_CAPTURE_SOURCE_GROUP0)||\ + ((__VALUE__) == FL_LPTIM16_IC1_CAPTURE_SOURCE_GROUP1)||\ + ((__VALUE__) == FL_LPTIM16_IC1_CAPTURE_SOURCE_GROUP2)||\ + ((__VALUE__) == FL_LPTIM16_IC1_CAPTURE_SOURCE_GROUP3)) + +#define IS_FL_LPTIM16_TRGO_SOURCE(__VALUE__) (((__VALUE__) == FL_LPTIM16_TRGO_ENABLE)||\ + ((__VALUE__) == FL_LPTIM16_TRGO_UPDATE)||\ + ((__VALUE__) == FL_LPTIM16_TRGO_OC1_CMP_PULSE)||\ + ((__VALUE__) == FL_LPTIM16_TRGO_IC1_EVENT)||\ + ((__VALUE__) == FL_LPTIM16_TRGO_IC2_EVENT)) + +/** + * @} + */ + +/* Exported functions --------------------------------------------------------*/ +/** @addtogroup LPTIM16_FL_EF_Init + * @{ + */ + +/** + * @brief 复位LPTIM16 外设 + * @param 外设入口地址 + * @retval 返回错误状态，可能值： + * -FL_PASS 外设寄存器值恢复复位值 + * -FL_FAIL 未成功执行 + */ +FL_ErrorStatus FL_LPTIM16_DeInit(LPTIM16_Type *LPTIM16x) +{ + /* 参数检查 */ + assert_param(IS_LPTIM16_INSTANCE(LPTIM16x)); + /* 使能外设复位 */ + FL_RMU_EnablePeripheralReset(RMU); + /* 复位外设寄存器 */ + FL_RMU_EnableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_LPTIM16); + FL_RMU_DisableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_LPTIM16); + /* 关闭外设总线时钟和工作时钟 */ + FL_CMU_DisableGroup1BusClock(FL_CMU_GROUP1_BUSCLK_LPTIM16); + FL_CMU_DisableGroup3OperationClock(FL_CMU_GROUP3_OPCLK_LPTIM16); + /* 锁定外设复位 */ + FL_RMU_DisablePeripheralReset(RMU); + return FL_PASS; +} + +/** + * @brief 根据需要功能配置LPTIM16寄存器使之工作在定时器功能模式下 + * + * @note 需要使用ETR作为计数源时，建议根据需求配置为异步脉冲计数模式 + * @ref FL_LPTIM16_OPERATION_MODE_EXTERNAL_ASYNC_PULSE_CNT 或外部触发计数模式 + * @ref FL_LPTIM16_OPERATION_MODE_EXTERNAL_TRIGGER_CNT + * + * @param LPTIM16x 外设入口地址 + * @param init 为 @ref FL_LPTIM16_InitTypeDef类型的结构体 + * + * @retval ErrorStatus枚举值 + * -FL_FAIL 配置过程发生错误 + * -FL_PASS LPTIM16配置成功 + */ +FL_ErrorStatus FL_LPTIM16_Init(LPTIM16_Type *LPTIM16x, FL_LPTIM16_InitTypeDef *init) +{ + /* 参数检查 */ + assert_param(IS_LPTIM16_INSTANCE(LPTIM16x)); + assert_param(IS_FL_LPTIM16_CMU_CLK_SOURCE(init->clockSource)); + assert_param(IS_FL_LPTIM16_CLK_SOURCE(init->prescalerClockSource)); + assert_param(IS_FL_LPTIM16_PSC(init->prescaler)); + assert_param(IS_FL_LPTIM16_OPERATION_MODE(init->mode)); + assert_param(IS_FL_LPTIM16_ENCODER_MODE(init->encoderMode)); + assert_param(IS_FL_LPTIM16_ONE_PULSE_MODE(init->onePulseMode)); + assert_param(IS_FL_LPTIM16_ETR_TRIGGER_EDGE(init->triggerEdge)); + assert_param(IS_FL_LPTIM16_ETR_COUNT_EDGE(init->countEdge)); + /* 时钟配置 */ + if(LPTIM16x == LPTIM16) + { + /* 使能总线时钟 */ + FL_CMU_EnableGroup1BusClock(FL_CMU_GROUP1_BUSCLK_LPTIM16); + /* 除了异步计数模式，其他模式都需要使能工作时钟 */ + if(init->mode != FL_LPTIM16_OPERATION_MODE_EXTERNAL_ASYNC_PULSE_CNT) + { + /* 使能工作时钟 */ + FL_CMU_EnableGroup3OperationClock(FL_CMU_GROUP3_OPCLK_LPTIM16); + /* 设置工作时钟时钟源 */ + FL_CMU_SetLPTIM16ClockSource(init->clockSource); + } + } + else + { + return FL_FAIL; + } + /* 配置分频器的时钟源 */ + FL_LPTIM16_SetClockSource(LPTIM16x, init->prescalerClockSource); + /* 配置时钟分频 */ + FL_LPTIM16_SetPrescaler(LPTIM16x, init->prescaler); + /* 配置重装载值 */ + FL_LPTIM16_WriteAutoReload(LPTIM16x, init->autoReload); + /* 配置定时器工作模式 */ + FL_LPTIM16_SetOperationMode(LPTIM16x, init->mode); + /* 配置编码器模式 */ + if(init->mode == FL_LPTIM16_OPERATION_MODE_NORMAL) + { + FL_LPTIM16_SetEncoderMode(LPTIM16x, init->encoderMode); + } + /* 单次计数模式 */ + FL_LPTIM16_SetOnePulseMode(LPTIM16x, init->onePulseMode); + /* 配置定时器不同模式下的特殊寄存器 */ + switch(init->mode) + { + case FL_LPTIM16_OPERATION_MODE_NORMAL: + { + /* ETR作为时钟时和异步脉冲计数模式信号路径一样，需要使能模拟滤波，并配置边沿 */ + if(init->prescalerClockSource == FL_LPTIM16_CLK_SOURCE_EXTERNAL) + { + /* 配置异步计数边沿 */ + FL_LPTIM16_SetETRCountEdge(LPTIM16x, init->countEdge); + /* 开启外部输入滤波 */ + FL_LPTIM16_EnableETRFilter(LPTIM16x); + } + } + break; + case FL_LPTIM16_OPERATION_MODE_EXTERNAL_TRIGGER_CNT: + { + /* 配置外部输入有效边沿 */ + FL_LPTIM16_SetETRTriggerEdge(LPTIM16x, init->triggerEdge); + } + break; + case FL_LPTIM16_OPERATION_MODE_EXTERNAL_ASYNC_PULSE_CNT: + { + /* 配置异步计数边沿 */ + FL_LPTIM16_SetETRCountEdge(LPTIM16x, init->countEdge); + /* 开启外部输入滤波 */ + FL_LPTIM16_EnableETRFilter(LPTIM16x); + } + break; + case FL_LPTIM16_OPERATION_MODE_TIMEOUT: + { + /* 配置外部输入有效边沿 */ + FL_LPTIM16_SetETRTriggerEdge(LPTIM16x, init->triggerEdge); + } + break; + default: + return FL_FAIL; + } + return FL_PASS; +} + +/** + * @brief 设置 LPTIM16_InitStruct 为默认配置 + * @param init 为 @ref FL_LPTIM16_InitTypeDef类型的结构体 + * + * @retval None + */ +void FL_LPTIM16_StructInit(FL_LPTIM16_InitTypeDef *init) +{ + init->clockSource = FL_CMU_LPTIM16_CLK_SOURCE_APBCLK; + init->prescalerClockSource = FL_LPTIM16_CLK_SOURCE_INTERNAL; + init->prescaler = FL_LPTIM16_PSC_DIV1; + init->autoReload = 0; + init->mode = FL_LPTIM16_OPERATION_MODE_NORMAL; + init->countEdge = FL_LPTIM16_ETR_COUNT_EDGE_RISING; + init->triggerEdge = FL_LPTIM16_ETR_TRIGGER_EDGE_RISING; + init->encoderMode = FL_LPTIM16_ENCODER_MODE_DISABLE; + init->onePulseMode = FL_LPTIM16_ONE_PULSE_MODE_CONTINUOUS; +} + +/** + * @brief 配置LPTIM16工作在输入捕获模式 + * + * @param LPTIM16x 外设入口地址 + * @param ic_init 为 @ref FL_LPTIM16_IC_InitTypeDef类型的结构体 + * @param Channel LPTIM16输入通道 + * + * @retval ErrorStatus枚举值 + * -FL_FAIL 配置过程发生错误 + * -FL_PASS LPTIM16配置成功 + */ +FL_ErrorStatus FL_LPTIM16_IC_Init(LPTIM16_Type *LPTIM16x, uint32_t Channel, FL_LPTIM16_IC_InitTypeDef *ic_init) +{ + /* 参数检查 */ + assert_param(IS_LPTIM16_INSTANCE(LPTIM16x)); + assert_param(IS_FL_LPTIM16_CHANNEL(Channel)); + assert_param(IS_FL_LPTIM16_IC_EDGE(ic_init->ICEdge)); + assert_param(IS_FL_LPTIM16_IC_POLARITY(ic_init->ICInputPolarity)); + assert_param(IS_FL_LPTIM16_IC1_CAPTURE_SOURCE(ic_init->channel1CaptureSource)); + /* 通道1捕获源 & 预分频 */ + if(Channel == FL_LPTIM16_CHANNEL_1) + { + FL_LPTIM16_IC_WriteChannel1Prescaler(LPTIM16x, ic_init->channel1Prescaler); + FL_LPTIM16_IC_SetChannel1CaptureSource(LPTIM16x, ic_init->channel1CaptureSource); + } + if(ic_init->ICInputDigitalFilter == FL_DISABLE) + { + FL_LPTIM16_DisableDigitalFilter(LPTIM16, Channel); + } + else + { + FL_LPTIM16_EnableDigitalFilter(LPTIM16, Channel); + } + /* 捕获通道极性 */ + FL_LPTIM16_IC_SetInputPolarity(LPTIM16x, ic_init->ICInputPolarity, Channel); + /* 配置捕获边沿 */ + FL_LPTIM16_IC_SetCaptureEdge(LPTIM16x, ic_init->ICEdge, Channel); + /* 通道输入捕获使能 */ + FL_LPTIM16_SetChannelMode(LPTIM16x, FL_LPTIM16_CHANNEL_MODE_INPUT, Channel); + return FL_PASS; +} + +/** + * @brief 设置 LPTIM16_IC_InitStruct 为默认配置 + * @param ic_init 为 @ref FL_LPTIM16_IC_InitTypeDef类型的结构体 + * + * @retval None + */ +void FL_LPTIM16_IC_StructInit(FL_LPTIM16_IC_InitTypeDef *ic_init) +{ + ic_init->ICInputPolarity = FL_LPTIM16_IC_POLARITY_NORMAL; + ic_init->ICInputDigitalFilter = FL_DISABLE; + ic_init->ICEdge = FL_LPTIM16_IC_EDGE_RISING; + ic_init->channel1Prescaler = 1 - 1; + ic_init->channel1CaptureSource = FL_LPTIM16_IC1_CAPTURE_SOURCE_GROUP0; +} + +/** + * @brief 根据需要功能配置LPTIM16寄存器工作在输出比较模式 + * + * @param LPTIM16x 外设入口地址 + * @param oc_init 为 @ref FL_LPTIM16_OC_InitTypeDef类型的结构体 + * @param Channel LPTIM16输出通道 + * + * @retval ErrorStatus枚举值 + * -FL_FAIL 配置过程发生错误 + * -FL_PASS LPTIM16配置成功 + */ +FL_ErrorStatus FL_LPTIM16_OC_Init(LPTIM16_Type *LPTIM16x, uint32_t Channel, FL_LPTIM16_OC_InitTypeDef *oc_init) +{ + /* 参数检查 */ + assert_param(IS_LPTIM16_INSTANCE(LPTIM16x)); + assert_param(IS_FL_LPTIM16_CHANNEL(Channel)); + assert_param(IS_FL_LPTIM16_OC_POLARITY(oc_init->OCPolarity)); + /* 比较通道极性 */ + FL_LPTIM16_OC_SetPolarity(LPTIM16x, oc_init->OCPolarity, Channel); + /* 设置比较值 */ + switch(Channel) + { + case FL_LPTIM16_CHANNEL_1: + FL_LPTIM16_WriteCompareCH1(LPTIM16x, oc_init->compareValue); + break; + case FL_LPTIM16_CHANNEL_2: + FL_LPTIM16_WriteCompareCH2(LPTIM16x, oc_init->compareValue); + break; + default : + return FL_FAIL; + } + /* 通道输出比较使能 */ + FL_LPTIM16_SetChannelMode(LPTIM16x, FL_LPTIM16_CHANNEL_MODE_OUTPUT, Channel); + return FL_PASS; +} + +/** + * @brief 设置 LPTIM16_OC_InitStruct 为默认配置 + * @param oc_init 为 @ref FL_LPTIM16_OC_InitTypeDef类型的结构体 + * + * @retval None + */ +void FL_LPTIM16_OC_StructInit(FL_LPTIM16_OC_InitTypeDef *oc_init) +{ + oc_init->compareValue = 0; + oc_init->OCPolarity = FL_LPTIM16_OC_POLARITY_NORMAL; +} + +/** + * @} + */ + +#endif /* FL_LPTIM16_DRIVER_ENABLED */ + +/** + * @} + */ + +/** + * @} + */ + +/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/ + diff --git a/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_lptim32.c b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_lptim32.c new file mode 100644 index 0000000..143c710 --- /dev/null +++ b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_lptim32.c @@ -0,0 +1,373 @@ + /** + **************************************************************************************************** + * @file fm33lg0xx_fl_lptim32.c + * @author FMSH Application Team + * @brief Src file of LPTIM32 FL Module + **************************************************************************************************** + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + +/* Includes ------------------------------------------------------------------*/ +#include "fm33lg0xx_fl.h" + +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @addtogroup LPTIM32 + * @{ + */ + +#ifdef FL_LPTIM32_DRIVER_ENABLED + +/* Private macros ------------------------------------------------------------*/ +/** @addtogroup LPTIM32_FL_Private_Macros + * @{ + */ + +#define IS_LPTIM32_INSTANCE(INSTANCE) ((INSTANCE) == LPTIM32) + +#define IS_FL_LPTIM32_CHANNEL(__VALUE__) (((__VALUE__) == FL_LPTIM32_CHANNEL_1)||\ + ((__VALUE__) == FL_LPTIM32_CHANNEL_2)||\ + ((__VALUE__) == FL_LPTIM32_CHANNEL_3)||\ + ((__VALUE__) == FL_LPTIM32_CHANNEL_4)) + +#define IS_FL_LPTIM32_CMU_CLK_SOURCE(__VALUE__) (((__VALUE__) == FL_CMU_LPTIM32_CLK_SOURCE_RCLF)||\ + ((__VALUE__) == FL_CMU_LPTIM32_CLK_SOURCE_RCLP)||\ + ((__VALUE__) == FL_CMU_LPTIM32_CLK_SOURCE_LSCLK)||\ + ((__VALUE__) == FL_CMU_LPTIM32_CLK_SOURCE_APBCLK)) + +#define IS_FL_LPTIM32_CLK_SOURCE(__VALUE__) (((__VALUE__) == FL_LPTIM32_CLK_SOURCE_INTERNAL)||\ + ((__VALUE__) == FL_LPTIM32_CLK_SOURCE_EXTERNAL)) + +#define IS_FL_LPTIM32_PSC(__VALUE__) (((__VALUE__) == FL_LPTIM32_PSC_DIV1)||\ + ((__VALUE__) == FL_LPTIM32_PSC_DIV2)||\ + ((__VALUE__) == FL_LPTIM32_PSC_DIV4)||\ + ((__VALUE__) == FL_LPTIM32_PSC_DIV8)||\ + ((__VALUE__) == FL_LPTIM32_PSC_DIV16)||\ + ((__VALUE__) == FL_LPTIM32_PSC_DIV32)||\ + ((__VALUE__) == FL_LPTIM32_PSC_DIV64)||\ + ((__VALUE__) == FL_LPTIM32_PSC_DIV128)) + +#define IS_FL_LPTIM32_OPERATION_MODE(__VALUE__) (((__VALUE__) == FL_LPTIM32_OPERATION_MODE_NORMAL)||\ + ((__VALUE__) == FL_LPTIM32_OPERATION_MODE_EXTERNAL_TRIGGER_CNT)||\ + ((__VALUE__) == FL_LPTIM32_OPERATION_MODE_EXTERNAL_ASYNC_PULSE_CNT)||\ + ((__VALUE__) == FL_LPTIM32_OPERATION_MODE_TIMEOUT)) + +#define IS_FL_LPTIM32_ETR_TRIGGER_EDGE(__VALUE__) (((__VALUE__) == FL_LPTIM32_ETR_TRIGGER_EDGE_RISING)||\ + ((__VALUE__) == FL_LPTIM32_ETR_TRIGGER_EDGE_FALLING)||\ + ((__VALUE__) == FL_LPTIM32_ETR_TRIGGER_EDGE_BOTH)) + +#define IS_FL_LPTIM32_ETR_COUNT_EDGE(__VALUE__) (((__VALUE__) == FL_LPTIM32_ETR_COUNT_EDGE_RISING)||\ + ((__VALUE__) == FL_LPTIM32_ETR_COUNT_EDGE_FALLING)) + +#define IS_FL_LPTIM32_ONE_PULSE_MODE(__VALUE__) (((__VALUE__) == FL_LPTIM32_ONE_PULSE_MODE_CONTINUOUS)||\ + ((__VALUE__) == FL_LPTIM32_ONE_PULSE_MODE_SINGLE)) + +#define IS_FL_LPTIM32_IC_EDGE(__VALUE__) (((__VALUE__) == FL_LPTIM32_IC_EDGE_RISING)||\ + ((__VALUE__) == FL_LPTIM32_IC_EDGE_FALLING)||\ + ((__VALUE__) == FL_LPTIM32_IC_EDGE_BOTH)) + +#define IS_FL_LPTIM32_OC_POLARITY(__VALUE__) (((__VALUE__) == FL_LPTIM32_OC_POLARITY_NORMAL)||\ + ((__VALUE__) == FL_LPTIM32_OC_POLARITY_INVERT)) + +#define IS_FL_LPTIM32_IC1_CAPTURE_SOURCE(__VALUE__) (((__VALUE__) == FL_LPTIM32_IC1_CAPTURE_SOURCE_GROUP0)||\ + ((__VALUE__) == FL_LPTIM32_IC1_CAPTURE_SOURCE_GROUP1)||\ + ((__VALUE__) == FL_LPTIM32_IC1_CAPTURE_SOURCE_GROUP2)||\ + ((__VALUE__) == FL_LPTIM32_IC1_CAPTURE_SOURCE_GROUP3)) + +#define IS_FL_LPTIM32_TRGO_SOURCE(__VALUE__) (((__VALUE__) == FL_LPTIM32_TRGO_ENABLE)||\ + ((__VALUE__) == FL_LPTIM32_TRGO_UPDATE)||\ + ((__VALUE__) == FL_LPTIM32_TRGO_OC1_CMP_PULSE)||\ + ((__VALUE__) == FL_LPTIM32_TRGO_IC1_EVENT)||\ + ((__VALUE__) == FL_LPTIM32_TRGO_IC2_EVENT)) + +/** + * @} + */ + +/* Exported functions --------------------------------------------------------*/ +/** @addtogroup LPTIM32_FL_EF_Init + * @{ + */ + +/** + * @brief 复位LPTIM32 外设 + * @param 外设入口地址 + * @retval 返回错误状态，可能值： + * -FL_PASS 外设寄存器值恢复复位值 + * -FL_FAIL 未成功执行 + */ +FL_ErrorStatus FL_LPTIM32_DeInit(LPTIM32_Type *LPTIM32x) +{ + /* 参数检查 */ + assert_param(IS_LPTIM32_INSTANCE(LPTIM32x)); + /* 使能外设复位 */ + FL_RMU_EnablePeripheralReset(RMU); + /* 复位外设寄存器 */ + FL_RMU_EnableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_LPTIM32); + FL_RMU_DisableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_LPTIM32); + /* 关闭外设总线时钟和工作时钟 */ + FL_CMU_DisableGroup1BusClock(FL_CMU_GROUP1_BUSCLK_LPTIM32); + FL_CMU_DisableGroup3OperationClock(FL_CMU_GROUP3_OPCLK_LPTIM32); + /* 锁定外设复位 */ + FL_RMU_DisablePeripheralReset(RMU); + return FL_PASS; +} + +/** + * @brief 根据需要功能配置LPTIM32寄存器使之工作在定时器功能模式下 + * + * @note 需要使用ETR作为计数源时，建议根据需求配置为异步脉冲计数模式 + * @ref FL_LPTIM32_OPERATION_MODE_EXTERNAL_ASYNC_PULSE_CNT 或外部触发计数模式 + * @ref FL_LPTIM32_OPERATION_MODE_EXTERNAL_TRIGGER_CNT + * + * @param LPTIM32x 外设入口地址 + * @param init 为 @ref FL_LPTIM32_InitTypeDef类型的结构体 + * + * @retval ErrorStatus枚举值 + * -FL_FAIL 配置过程发生错误 + * -FL_PASS LPTIM32配置成功 + */ +FL_ErrorStatus FL_LPTIM32_Init(LPTIM32_Type *LPTIM32x, FL_LPTIM32_InitTypeDef *init) +{ + /* 参数检查 */ + assert_param(IS_LPTIM32_INSTANCE(LPTIM32x)); + assert_param(IS_FL_LPTIM32_CMU_CLK_SOURCE(init->clockSource)); + assert_param(IS_FL_LPTIM32_CLK_SOURCE(init->prescalerClockSource)); + assert_param(IS_FL_LPTIM32_PSC(init->prescaler)); + assert_param(IS_FL_LPTIM32_OPERATION_MODE(init->mode)); + assert_param(IS_FL_LPTIM32_ONE_PULSE_MODE(init->onePulseMode)); + assert_param(IS_FL_LPTIM32_ETR_TRIGGER_EDGE(init->triggerEdge)); + assert_param(IS_FL_LPTIM32_ETR_COUNT_EDGE(init->countEdge)); + /* 时钟配置 */ + if(LPTIM32x == LPTIM32) + { + /* 使能总线时钟 */ + FL_CMU_EnableGroup1BusClock(FL_CMU_GROUP1_BUSCLK_LPTIM32); + /* 除了异步计数模式，其他模式都需要使能工作时钟 */ + if(init->mode != FL_LPTIM32_OPERATION_MODE_EXTERNAL_ASYNC_PULSE_CNT) + { + /* 使能工作时钟 */ + FL_CMU_EnableGroup3OperationClock(FL_CMU_GROUP3_OPCLK_LPTIM32); + /* 设置工作时钟时钟源 */ + FL_CMU_SetLPTIM32ClockSource(init->clockSource); + } + } + /* 配置分频器的时钟源 */ + FL_LPTIM32_SetClockSource(LPTIM32x, init->prescalerClockSource); + /* 配置时钟分频 */ + FL_LPTIM32_SetPrescaler(LPTIM32x, init->prescaler); + /* 配置定时器工作模式 */ + FL_LPTIM32_SetOperationMode(LPTIM32x, init->mode); + /* 配置定时器不同模式下的特殊寄存器 */ + switch(init->mode) + { + case FL_LPTIM32_OPERATION_MODE_NORMAL: + { + if(init->prescalerClockSource == FL_LPTIM32_CLK_SOURCE_EXTERNAL) + { + /* 配置外部计数边沿 */ + FL_LPTIM32_SetETRCountEdge(LPTIM32x, init->countEdge); + /* 开启外部输入滤波 */ + FL_LPTIM32_EnableETRFilter(LPTIM32x); + } + } + break; + case FL_LPTIM32_OPERATION_MODE_EXTERNAL_TRIGGER_CNT: + { + /* 配置外部输入有效边沿 */ + FL_LPTIM32_SetETRTriggerEdge(LPTIM32x, init->triggerEdge); + } + break; + case FL_LPTIM32_OPERATION_MODE_EXTERNAL_ASYNC_PULSE_CNT: + { + /* 配置外部计数边沿 */ + FL_LPTIM32_SetETRCountEdge(LPTIM32x, init->countEdge); + /* 开启外部输入滤波 */ + FL_LPTIM32_EnableETRFilter(LPTIM32x); + } + break; + case FL_LPTIM32_OPERATION_MODE_TIMEOUT: + { + /* 配置外部输入有效边沿 */ + FL_LPTIM32_SetETRTriggerEdge(LPTIM32x, init->triggerEdge); + } + break; + } + /* 单次计数模式 */ + FL_LPTIM32_SetOnePulseMode(LPTIM32x, init->onePulseMode); + /* 设置重装载值 */ + FL_LPTIM32_WriteAutoReload(LPTIM32x, init->autoReload); + return FL_PASS; +} + +/** + * @brief 设置 LPTIM32_InitStruct 为默认配置 + * @param init 为 @ref FL_LPTIM32_InitTypeDef类型的结构体 + * + * @retval None + */ +void FL_LPTIM32_StructInit(FL_LPTIM32_InitTypeDef *init) +{ + init->clockSource = FL_CMU_LPTIM32_CLK_SOURCE_APBCLK; + init->prescalerClockSource = FL_LPTIM32_CLK_SOURCE_INTERNAL; + init->prescaler = FL_LPTIM32_PSC_DIV1; + init->autoReload = 0; + init->mode = FL_LPTIM32_OPERATION_MODE_NORMAL; + init->countEdge = FL_LPTIM32_ETR_COUNT_EDGE_RISING; + init->triggerEdge = FL_LPTIM32_ETR_TRIGGER_EDGE_RISING; + init->onePulseMode = FL_LPTIM32_ONE_PULSE_MODE_CONTINUOUS; +} + +/** + * @brief 配置LPTIM32工作在输入捕获模式 + * + * @param LPTIM32x 外设入口地址 + * @param ic_init 为 @ref FL_LPTIM32_IC_InitTypeDef类型的结构体 + * @param Channel LPTIM32输入通道 + * + * @retval ErrorStatus枚举值 + * -FL_FAIL 配置过程发生错误 + * -FL_PASS LPTIM32配置成功 + */ +//输入捕获配置 +FL_ErrorStatus FL_LPTIM32_IC_Init(LPTIM32_Type *LPTIM32x, uint32_t Channel, FL_LPTIM32_IC_InitTypeDef *ic_init) +{ + FL_ErrorStatus result = FL_PASS; + /* 参数检查 */ + assert_param(IS_LPTIM32_INSTANCE(LPTIM32x)); + assert_param(IS_FL_LPTIM32_CHANNEL(Channel)); + assert_param(IS_FL_LPTIM32_IC_EDGE(ic_init->ICEdge)); + assert_param(IS_FL_LPTIM32_IC1_CAPTURE_SOURCE(ic_init->ICSource)); + /* 通道1捕获源 */ + if(Channel == FL_LPTIM32_CHANNEL_1) + { + FL_LPTIM32_IC_SetChannel1CaptureSource(LPTIM32, ic_init->ICSource); + } + /* 捕获通道边沿 */ + FL_LPTIM32_IC_SetCaptureEdge(LPTIM32, ic_init->ICEdge, Channel); + /* 通道输入捕获使能 */ + FL_LPTIM32_SetChannelMode(LPTIM32, FL_LPTIM32_CHANNEL_MODE_INPUT, Channel); + return result; +} + +/** + * @brief 设置 LPTIM32_IC_InitStruct 为默认配置 + * @param ic_init为 @ref FL_LPTIM32_IC_InitTypeDef类型的结构体 + * + * @retval None + */ +void FL_LPTIM32_IC_StructInit(FL_LPTIM32_IC_InitTypeDef *ic_init) +{ + ic_init->ICEdge = FL_LPTIM32_IC_EDGE_RISING; + ic_init->ICSource = FL_LPTIM32_IC1_CAPTURE_SOURCE_GROUP0; +} + +/** + * @brief 根据需要功能配置LPTIM32寄存器工作在输出比较模式 + * + * @param LPTIM32x 外设入口地址 + * @param oc_init 为 @ref FL_LPTIM32_OC_InitTypeDef类型的结构体 + * @param Channel LPTIM32输出通道 + * + * @retval ErrorStatus枚举值 + * -FL_FAIL 配置过程发生错误 + * -FL_PASS LPTIM32配置成功 + */ +FL_ErrorStatus FL_LPTIM32_OC_Init(LPTIM32_Type *LPTIM32x, uint32_t Channel, FL_LPTIM32_OC_InitTypeDef *oc_init) +{ + FL_ErrorStatus result = FL_PASS; + /* 参数检查 */ + assert_param(IS_LPTIM32_INSTANCE(LPTIM32x)); + assert_param(IS_FL_LPTIM32_CHANNEL(Channel)); + assert_param(IS_FL_LPTIM32_OC_POLARITY(oc_init->OCPolarity)); + /* 比较通道极性 */ + FL_LPTIM32_OC_SetPolarity(LPTIM32x, oc_init->OCPolarity, Channel); + /* 设置比较值 */ + switch(Channel) + { + case FL_LPTIM32_CHANNEL_1: + FL_LPTIM32_WriteCompareCH1(LPTIM32x, oc_init->compareValue); + break; + case FL_LPTIM32_CHANNEL_2: + FL_LPTIM32_WriteCompareCH2(LPTIM32x, oc_init->compareValue); + break; + case FL_LPTIM32_CHANNEL_3: + FL_LPTIM32_WriteCompareCH3(LPTIM32x, oc_init->compareValue); + break; + case FL_LPTIM32_CHANNEL_4: + FL_LPTIM32_WriteCompareCH4(LPTIM32x, oc_init->compareValue); + break; + default : + result = FL_FAIL; + break; + } + /* 通道输出比较使能 */ + FL_LPTIM32_SetChannelMode(LPTIM32x, FL_LPTIM32_CHANNEL_MODE_OUTPUT, Channel); + return result; +} + +/** + * @brief 设置 LPTIM32_OC_InitStruct 为默认配置 + * @param oc_init为 @ref FL_LPTIM32_OC_InitTypeDef类型的结构体 + * + * @retval None + */ +void FL_LPTIM32_OC_StructInit(FL_LPTIM32_OC_InitTypeDef *oc_init) +{ + oc_init->compareValue = 0; + oc_init->OCPolarity = FL_LPTIM32_OC_POLARITY_NORMAL; +} + +/** + * @} + */ + +#endif /* FL_LPTIM32_DRIVER_ENABLED */ + +/** + * @} + */ + +/** + * @} + */ + +/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/ diff --git a/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_lpuart.c b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_lpuart.c new file mode 100644 index 0000000..7941aa9 --- /dev/null +++ b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_lpuart.c @@ -0,0 +1,306 @@ + /** + **************************************************************************************************** + * @file fm33lg0xx_fl_lpuart.c + * @author FMSH Application Team + * @brief Src file of LPUART FL Module + **************************************************************************************************** + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + +/* Includes ------------------------------------------------------------------*/ +#include "fm33lg0xx_fl.h" + +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @addtogroup LPUART + * @{ + */ + +#ifdef FL_LPUART_DRIVER_ENABLED + +/* Private macros ------------------------------------------------------------*/ +/** @addtogroup LPUART_FL_Private_Macros + * @{ + */ +#define IS_LPUART_INSTANCE(INSTANCE) (((INSTANCE) == LPUART0)||\ + ((INSTANCE) == LPUART1)||\ + ((INSTANCE) == LPUART2)) + +#define IS_FL_LPUART_CLKSRC(__VALUE__) (((__VALUE__) == FL_CMU_LPUART_CLK_SOURCE_LSCLK)||\ + ((__VALUE__) == FL_CMU_LPUART_CLK_SOURCE_RCHF)||\ + ((__VALUE__) == FL_CMU_LPUART_CLK_SOURCE_RCLF)) + +#define IS_FL_LPUART_BAUDRATE(__VALUE__) (((__VALUE__) == FL_LPUART_BAUDRATE_300)||\ + ((__VALUE__) == FL_LPUART_BAUDRATE_600)||\ + ((__VALUE__) == FL_LPUART_BAUDRATE_1200)||\ + ((__VALUE__) == FL_LPUART_BAUDRATE_2400)||\ + ((__VALUE__) == FL_LPUART_BAUDRATE_4800)||\ + ((__VALUE__) == FL_LPUART_BAUDRATE_9600)) + +#define IS_FL_LPUART_DATAWIDTH(__VALUE__) (((__VALUE__) == FL_LPUART_DATA_WIDTH_6B)||\ + ((__VALUE__) == FL_LPUART_DATA_WIDTH_7B)||\ + ((__VALUE__) == FL_LPUART_DATA_WIDTH_8B)||\ + ((__VALUE__) == FL_LPUART_DATA_WIDTH_9B)) + +#define IS_FL_LPUART_STOPBITS(__VALUE__) (((__VALUE__) == FL_LPUART_STOP_BIT_WIDTH_1B)||\ + ((__VALUE__) == FL_LPUART_STOP_BIT_WIDTH_2B)) + +#define IS_FL_LPUART_PARITY(__VALUE__) (((__VALUE__) == FL_LPUART_PARITY_NONE)||\ + ((__VALUE__) == FL_LPUART_PARITY_EVEN)||\ + ((__VALUE__) == FL_LPUART_PARITY_ODD)) + +#define IS_FL_LPUART_DIRECTION(__VALUE__) (((__VALUE__) == FL_LPUART_DIRECTION_NONE)||\ + ((__VALUE__) == FL_LPUART_DIRECTION_RX)||\ + ((__VALUE__) == FL_LPUART_DIRECTION_TX)||\ + ((__VALUE__) == FL_LPUART_DIRECTION_TX_RX)) + +/** + * @} + */ + +/* Exported functions --------------------------------------------------------*/ +/** @addtogroup LPUART_FL_EF_Init + * @{ + */ + +/** + * @brief 复位LPUART 外设 + * @param 外设入口地址 + * @retval 返回错误状态，可能值： + * -FL_PASS 外设寄存器值恢复复位值 + * -FL_FAIL 未成功执行 + */ +FL_ErrorStatus FL_LPUART_DeInit(LPUART_Type *LPUARTx) +{ + FL_ErrorStatus status = FL_PASS; + /* 入口参数合法性断言 */ + assert_param(IS_LPUART_INSTANCE(LPUARTx)); + /* 外设复位使能 */ + FL_RMU_EnablePeripheralReset(RMU); + if(LPUARTx == LPUART0) + { + /*复位LPUART*/ + FL_RMU_EnableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_LPUART0); + FL_RMU_DisableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_LPUART0); + /* 外设总线时钟关闭 */ + FL_CMU_DisableGroup3BusClock(FL_CMU_GROUP3_BUSCLK_LPUART0); + /* 外设工作时钟关闭 */ + FL_CMU_DisableGroup3OperationClock(FL_CMU_GROUP3_OPCLK_LPUART0); + } + else + if(LPUARTx == LPUART1) + { + /*复位LPUART*/ + FL_RMU_EnableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_LPUART1); + FL_RMU_DisableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_LPUART1); + /* 外设总线时钟关闭 */ + FL_CMU_DisableGroup3BusClock(FL_CMU_GROUP3_BUSCLK_LPUART1); + /* 外设工作时钟关闭 */ + FL_CMU_DisableGroup3OperationClock(FL_CMU_GROUP3_OPCLK_LPUART1); + } + else + if(LPUARTx == LPUART2) + { + /*复位LPUART*/ + FL_RMU_EnableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_LPUART2); + FL_RMU_DisableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_LPUART2); + /* 外设总线时钟关闭 */ + FL_CMU_DisableGroup3BusClock(FL_CMU_GROUP3_BUSCLK_LPUART2); + /* 外设工作时钟关闭 */ + FL_CMU_DisableGroup3OperationClock(FL_CMU_GROUP3_OPCLK_LPUART2); + } + else + { + status = FL_FAIL; + } + /* 锁定外设复位功能 */ + FL_RMU_DisablePeripheralReset(RMU); + return (status); +} + +/** + * @brief 根据需要功能配置LPUART寄存器 + * + * @note 波特率调制寄存器中的MCTL值，默认为工作时钟为32768Hz的频率下的调制值，用户如果外设工作时钟不是此前 + * 提则可能需要手动调整这个寄存器的值，以达到更好的通信效果。 + * @param LPUARTx 外设入口地址 + * @param initStruct 指向一个 @ref FL_LPUART_InitTypeDef类型的结构体，它包含指定LPUART外设的配置信息 + * + * @retval ErrorStatus枚举值 + * -FL_FAIL 配置过程发生错误 + * -FL_PASS LPUART配置成功 + */ +FL_ErrorStatus FL_LPUART_Init(LPUART_Type *LPUARTx, FL_LPUART_InitTypeDef *initStruct) +{ + FL_ErrorStatus status = FL_FAIL; + uint16_t MCTLVel; + /* 参数合法性检查 */ + assert_param(IS_LPUART_INSTANCE(LPUARTx)); + assert_param(IS_FL_LPUART_CLKSRC(initStruct->clockSrc)); + assert_param(IS_FL_LPUART_BAUDRATE(initStruct->baudRate)); + assert_param(IS_FL_LPUART_DATAWIDTH(initStruct->dataWidth)); + assert_param(IS_FL_LPUART_STOPBITS(initStruct->stopBits)); + assert_param(IS_FL_LPUART_PARITY(initStruct->parity)); + assert_param(IS_FL_LPUART_DIRECTION(initStruct->transferDirection)); + if(LPUARTx == LPUART0) + { + /*总线时钟使能*/ + FL_CMU_EnableGroup3BusClock(FL_CMU_GROUP3_BUSCLK_LPUART0); + /*操作时钟使能*/ + FL_CMU_EnableGroup3OperationClock(FL_CMU_GROUP3_OPCLK_LPUART0); + /*时钟源选择*/ + FL_CMU_SetLPUART0ClockSource(initStruct->clockSrc << CMU_OPCCR1_LPUART0CKS_Pos); + } + else + if(LPUARTx == LPUART1) + { + /*总线时钟使能*/ + FL_CMU_EnableGroup3BusClock(FL_CMU_GROUP3_BUSCLK_LPUART1); + /*操作时钟使能*/ + FL_CMU_EnableGroup3OperationClock(FL_CMU_GROUP3_OPCLK_LPUART1); + /*时钟源选择*/ + FL_CMU_SetLPUART1ClockSource(initStruct->clockSrc << CMU_OPCCR1_LPUART1CKS_Pos); + } + else + { + /*总线时钟使能*/ + FL_CMU_EnableGroup3BusClock(FL_CMU_GROUP3_BUSCLK_LPUART2); + /*操作时钟使能*/ + FL_CMU_EnableGroup3OperationClock(FL_CMU_GROUP3_OPCLK_LPUART2); + /*时钟源选择*/ + FL_CMU_SetLPUART2ClockSource(initStruct->clockSrc << CMU_OPCCR1_LPUART2CKS_Pos); + } + if(initStruct->clockSrc == FL_CMU_LPUART_CLK_SOURCE_RCLF)//RCLF时钟 + { + FL_CMU_RCLF_SetPrescaler(FL_CMU_RCLF_PSC_DIV16); + FL_CMU_RCLF_Enable(); + FL_LPUART_DisableBaudRateModulation(LPUARTx); + } + else + { + FL_LPUART_EnableBaudRateModulation(LPUARTx); + } + /*发送接收配置*/ + if(initStruct->transferDirection & FL_LPUART_DIRECTION_TX) + { + do + { + FL_LPUART_EnableTX(LPUARTx); + } while(FL_LPUART_IsEnabledTX(LPUARTx) != FL_SET); + } + if(initStruct->transferDirection & FL_LPUART_DIRECTION_RX) + { + do + { + FL_LPUART_EnableRX(LPUARTx); + } while(FL_LPUART_IsEnabledRX(LPUARTx) != FL_SET); + } + /*配置波特率*/ + FL_LPUART_SetBaudRate(LPUARTx, initStruct->baudRate); + /*配置停止位*/ + FL_LPUART_SetStopBitsWidth(LPUARTx, initStruct->stopBits); + /*配置数据位宽*/ + FL_LPUART_SetDataWidth(LPUARTx, initStruct->dataWidth); + /*配置波特率*/ + FL_LPUART_SetParity(LPUARTx, initStruct->parity); + /*根据波特率配置MCTL值*/ + switch(initStruct->baudRate) + { + case FL_LPUART_BAUDRATE_9600: + MCTLVel = 0x0552; + break; + case FL_LPUART_BAUDRATE_4800: + MCTLVel = 0x1EFB; + break; + case FL_LPUART_BAUDRATE_2400: + MCTLVel = 0x16DB; + break; + case FL_LPUART_BAUDRATE_1200: + MCTLVel = 0x0492; + break; + case FL_LPUART_BAUDRATE_600: + MCTLVel = 0x16D6; + break; + case FL_LPUART_BAUDRATE_300: + MCTLVel = 0x0842; + break; + default: + MCTLVel = 0x0552; + break; + } + FL_LPUART_WriteBitModulation(LPUARTx, MCTLVel); + status = FL_PASS; + return status; +} + +/** + * @brief initStruct 为默认配置 + * @param initStruct 指向需要将值设置为默认配置的结构体 @ref FL_LPUART_InitTypeDef structure + * 结构体 + * @retval None + */ + +void FL_LPUART_StructInit(FL_LPUART_InitTypeDef *initStruct) +{ + initStruct->baudRate = FL_LPUART_BAUDRATE_9600; + initStruct->dataWidth = FL_LPUART_DATA_WIDTH_8B; + initStruct->stopBits = FL_LPUART_STOP_BIT_WIDTH_1B; + initStruct->parity = FL_LPUART_PARITY_NONE ; + initStruct->transferDirection = FL_LPUART_DIRECTION_TX_RX; + initStruct->clockSrc = FL_CMU_LPUART_CLK_SOURCE_LSCLK; +} + +/** + * @} + */ + +#endif /* FL_LPUART_DRIVER_ENABLED */ + +/** + * @} + */ + +/** + * @} + */ + +/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/ + diff --git a/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_pmu.c b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_pmu.c new file mode 100644 index 0000000..0b66181 --- /dev/null +++ b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_pmu.c @@ -0,0 +1,199 @@ + /** + **************************************************************************************************** + * @file fm33lg0xx_fl_pmu.c + * @author FMSH Application Team + * @brief Src file of PMU FL Module + **************************************************************************************************** + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + +/* Includes ------------------------------------------------------------------*/ +#include "fm33lg0xx_fl.h" + +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @addtogroup PMU + * @{ + */ + +#ifdef FL_PMU_DRIVER_ENABLED + +/* Private macros ------------------------------------------------------------*/ +/** @addtogroup UART_FL_Private_Macros + * @{ + */ + + + +#define IS_FL_PMU_INSTANCE(INSTANCE) (((INSTANCE) == PMU)) + +#define IS_FL_PMU_MODE(__VALUE__) (((__VALUE__) == FL_PMU_POWER_MODE_ACTIVE_OR_LPACTIVE)||\ + ((__VALUE__) == FL_PMU_POWER_MODE_LPRUN_ONLY)||\ + ((__VALUE__) == FL_PMU_POWER_MODE_SLEEP_OR_DEEPSLEEP)) + +#define IS_FL_PMU_COREVOLTAGESCALING(__VALUE__) (((__VALUE__) == FL_DISABLE)||\ + ((__VALUE__) == FL_ENABLE)) + +#define IS_FL_PMU_DEEPSLEEP(__VALUE__) (((__VALUE__) == FL_PMU_SLEEP_MODE_DEEP)||\ + ((__VALUE__) == FL_PMU_SLEEP_MODE_NORMAL)) + +#define IS_FL_PMU_WAKEUPFREQUENCY(__VALUE__) (((__VALUE__) == FL_PMU_RCHF_WAKEUP_FREQ_8MHZ)||\ + ((__VALUE__) == FL_PMU_RCHF_WAKEUP_FREQ_16MHZ)||\ + ((__VALUE__) == FL_PMU_RCHF_WAKEUP_FREQ_24MHZ)) + +#define IS_FL_PMU_LDOLOWMODE(__VALUE__) (((__VALUE__) == FL_PMU_LDO_LPM_DISABLE)||\ + ((__VALUE__) == FL_PMU_LDO_LPM_ENABLE)) + +#define IS_FL_PMU_WAKEUPDELAY(__VALUE__) (((__VALUE__) == FL_PMU_WAKEUP_DELAY_0US)||\ + ((__VALUE__) == FL_PMU_WAKEUP_DELAY_2US)||\ + ((__VALUE__) == FL_PMU_WAKEUP_DELAY_4US)||\ + ((__VALUE__) == FL_PMU_WAKEUP_DELAY_8US)) + +/** + *@} + */ + +/* Exported functions --------------------------------------------------------*/ +/** @addtogroup PMU_FL_EF_Init + * @{ + */ + +/** + * @brief 复位pmu外设 + * + * @param 外设入口地址 + * + * @retval 返回错误状态，可能值: + * -FL_PASS 外设寄存器值回复复位值 + * -FL_FAIL 位成功执行 + */ +FL_ErrorStatus FL_PMU_Sleep_DeInit(PMU_Type *PMUx) +{ + FL_ErrorStatus status = FL_FAIL; + /* 参数合法性检测 */ + assert_param(IS_FL_PMU_INSTANCE(PMUx)); + PMUx->CR = 0x00060000U; + PMUx->WKTR = 0xC0000001U; + PMUx->IER = 0x00000000U; + status = FL_PASS; + return status; +} + + +/** + * @brief 根据lpm_initstruct结构体包含的配置信息配置pmu寄存器 + * + * @note 为更好的睡眠功耗用户可能需要根据实际应用，调用 @ref fm33lg0xx_fl_pmu.h中的其他接口 + * 来完成睡眠前的模式配置，包括睡眠行为和唤醒后的行为(注：此函数会关闭BOR) + * @param PMUx 外设入口地址 + * @param LPM_InitStruct 指向一个 @ref FL_PMU_SleepInitTypeDef 类型的结构体，它包含指定PMU外设的配置信息 + * + * @retval ErrorStatus枚举值 + * -FL_FAIL 配置过程发生错误 + * -FL_PASS PMU配置成功 + */ +FL_ErrorStatus FL_PMU_Sleep_Init(PMU_Type *PMUx, FL_PMU_SleepInitTypeDef *LPM_InitStruct) +{ + FL_ErrorStatus status = FL_FAIL; + /* 参数合法性检查 */ + assert_param(IS_FL_PMU_INSTANCE(PMUx)); + assert_param(IS_FL_PMU_MODE(LPM_InitStruct->powerMode)); + assert_param(IS_FL_PMU_COREVOLTAGESCALING(LPM_InitStruct->coreVoltageScaling)); + assert_param(IS_FL_PMU_LDOLOWMODE(LPM_InitStruct->LDOLowPowerMode)); + assert_param(IS_FL_PMU_DEEPSLEEP(LPM_InitStruct->deepSleep)); + assert_param(IS_FL_PMU_WAKEUPFREQUENCY(LPM_InitStruct->wakeupFrequency)); + assert_param(IS_FL_PMU_WAKEUPDELAY(LPM_InitStruct->wakeupDelay)); + /* 唤醒时间 */ + FL_PMU_SetWakeupDelay(PMUx, LPM_InitStruct->wakeupDelay); + /* 唤醒后RCHF的频率 */ + FL_PMU_SetRCHFWakeupFrequency(PMUx, LPM_InitStruct->wakeupFrequency); + /* 睡眠下内核电压配置 */ + if(LPM_InitStruct->coreVoltageScaling == FL_ENABLE) + { + FL_PMU_EnableCoreVoltageScaling(PMUx); + } + else + { + FL_PMU_DisableCoreVoltageScaling(PMUx); + } + /* LDO低功耗配置 */ + FL_PMU_SetLDOLowPowerMode(PMUx,LPM_InitStruct->LDOLowPowerMode); + /* M0系统控制器，一般配置为0即可*/ + SCB->SCR = 0; + /* 睡眠模式 */ + FL_PMU_SetSleepMode(PMUx, LPM_InitStruct->deepSleep); + + status = FL_PASS; + return status; +} + +/** + * @brief LPM_InitStruct 为默认配置 + * @param LPM_InitStruct 指向需要将值设置为默认配置的结构体 @ref FL_PMU_SleepInitTypeDef structure + * 结构体 + * @retval None + */ +void FL_PMU_StructInit(FL_PMU_SleepInitTypeDef *LPM_InitStruct) +{ + LPM_InitStruct->powerMode = FL_PMU_POWER_MODE_SLEEP_OR_DEEPSLEEP; + LPM_InitStruct->deepSleep = FL_PMU_SLEEP_MODE_NORMAL; + LPM_InitStruct->LDOLowPowerMode = FL_PMU_LDO_LPM_DISABLE; + LPM_InitStruct->wakeupFrequency = FL_PMU_RCHF_WAKEUP_FREQ_8MHZ; + LPM_InitStruct->wakeupDelay = FL_PMU_WAKEUP_DELAY_2US; + LPM_InitStruct->coreVoltageScaling = FL_DISABLE; +} + +/** + * @} + */ + +#endif /* FL_PMU_DRIVER_ENABLED */ + +/** + * @} + */ + +/** + * @} + */ + +/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/ + diff --git a/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_rng.c b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_rng.c new file mode 100644 index 0000000..e2bd6db --- /dev/null +++ b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_rng.c @@ -0,0 +1,226 @@ + /** + ******************************************************************************************************* + * @file fm33lg0xx_fl_rng.c + * @author FMSH Application Team + * @brief Src file of RNG FL Module + ******************************************************************************************************* + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + + +/* Includes ------------------------------------------------------------------*/ +#include "fm33lg0xx_fl.h" + +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @addtogroup RNG + * @{ + */ + +#ifdef FL_RNG_DRIVER_ENABLED + +/* Private macros ------------------------------------------------------------*/ +/** @addtogroup RNG_FL_Private_Macros +* @{ +*/ +#define IS_FL_RNG_INSTANCE(INTANCE) ((INTANCE) == RNG) + +#define IS_FL_RNG_CLOCK_PRESCALER(__VALUE__) (((__VALUE__) == FL_CMU_RNG_PSC_DIV1)||\ + ((__VALUE__) == FL_CMU_RNG_PSC_DIV2)||\ + ((__VALUE__) == FL_CMU_RNG_PSC_DIV4)||\ + ((__VALUE__) == FL_CMU_RNG_PSC_DIV8)||\ + ((__VALUE__) == FL_CMU_RNG_PSC_DIV16)||\ + ((__VALUE__) == FL_CMU_RNG_PSC_DIV32)) +/** + *@} + */ + +/* Exported functions --------------------------------------------------------*/ +/** @addtogroup RNG_FL_EF_Init + * @{ + */ +/** + * @brief 复位对应RNG寄存器. + * + * @param RNGx 外设入口地址 + * + * @retval ErrorStatus枚举值 + * -FL_PASS 配置成功 + * -FL_FAIL 配置过程发生错误 + */ +FL_ErrorStatus FL_RNG_DeInit(RNG_Type *RNGx) +{ + assert_param(IS_FL_RNG_INSTANCE(RNGx)); + /* 使能外设复位 */ + FL_RMU_EnablePeripheralReset(RMU); + /* 复位外设寄存器 */ + FL_RMU_EnableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_RNG); + FL_RMU_DisableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_RNG); + /* 关闭外设总线始时钟和工作时钟 */ + FL_CMU_DisableGroup2BusClock(FL_CMU_GROUP2_BUSCLK_RNG); + /* 锁定外设复位 */ + FL_RMU_DisablePeripheralReset(RMU); + return FL_PASS; +} +/** + * @brief 根据 InitStruct 的配置信息初始化对应外设入口地址的寄存器值. + * @param RNGx 外设入口地址 + * + * @param initStruct 指向一个 @ref FL_RNG_InitTypeDef 结构体 其中包含了外设的相关配置信息. + * + * @note RNG使用RCHF默认的8M作为时钟输入，经2分频后4M提供给RNG + * + * @retval ErrorStatus枚举值 + * -FL_PASS 配置成功 + * -FL_FAIL 配置过程发生错误 + */ +FL_ErrorStatus FL_RNG_Init(RNG_Type *RNGx) +{ + assert_param(IS_FL_RNG_INSTANCE(RNGx)); + /* RNG 使用RCHF作为工作时钟因此必须确认RCHF使能*/ + if(FL_CMU_RCHF_IsEnabled() != FL_SET) + { + FL_CMU_RCHF_Enable(); + } + /* RNG 总线时钟使能 */ + FL_CMU_EnableGroup2BusClock(FL_CMU_GROUP2_BUSCLK_RNG); + /* RNG 工作时钟预分频*/ + switch(FL_CMU_GetRCHFClockFreq()) + { + case FL_CMU_RCHF_FREQUENCY_8MHZ: + FL_CMU_SetRNGPrescaler(FL_CMU_RNG_PSC_DIV2); + break; + case FL_CMU_RCHF_FREQUENCY_16MHZ: + FL_CMU_SetRNGPrescaler(FL_CMU_RNG_PSC_DIV4); + break; + case FL_CMU_RCHF_FREQUENCY_24MHZ: + FL_CMU_SetRNGPrescaler(FL_CMU_RNG_PSC_DIV8); + break; + case FL_CMU_RCHF_FREQUENCY_32MHZ: + FL_CMU_SetRNGPrescaler(FL_CMU_RNG_PSC_DIV8); + break; + default: + FL_CMU_SetRNGPrescaler(FL_CMU_RNG_PSC_DIV2); + break; + } + /* RNG 工作时钟使能*/ + FL_CMU_EnableGroup3OperationClock(FL_CMU_GROUP3_OPCLK_RNG); + return FL_PASS; +} + +/** + * @brief 获取一次随机数 + * + * @param None + * + * @note 如果返回值为0xFFFFFFFF 则说明随机数生成失败，请用户检查此函数的返回值，失败时重新生成 + * + * @retval 成功返回随机数，失败返回0xFFFFFFFF + * + */ +uint32_t GetRandomNumber(void) +{ + uint32_t rn32; + FL_RNG_ClearFlag_RandomFail(RNG); + FL_RNG_Enable(RNG); + /* 由于LFSR循环移位周期是32cycle，为保证随机数质量，应用应保证两次读取RNGOUT之间的间隔大于32个TRNG_CLK周期 */ + FL_DelayUs(12); + FL_RNG_Disable(RNG); + rn32 = FL_RNG_ReadData(RNG); + if(FL_RNG_IsActiveFlag_RandomFail(RNG)) + { + FL_RNG_ClearFlag_RandomFail(RNG); + return 0xFFFFFFFF; + } + return rn32; +} + +/** + * @brief 获取CRC32 + * + * @param dataIn 待计算的数据 + * + * @note None + * + * @retval 成功返回CRC32，失败返回0xFFFFFFFF + * + */ +uint32_t GetCrc32(uint32_t dataIn) +{ + uint32_t i = 0; + uint32_t crc32 = 0; + FL_RNG_CRC_WriteData(RNG, dataIn); + FL_RNG_ClearFlag_CRCComplete(RNG); + FL_RNG_CRC_Enable(RNG); + while(0 == FL_RNG_IsActiveFlag_CRCComplete(RNG)) + { + i++; + if(i > 600) + { break; } + } + if(i >= 600) + { + FL_RNG_ClearFlag_CRCComplete(RNG); + FL_RNG_Disable(RNG); + return 0xFFFFFFFF; + } + FL_RNG_ClearFlag_CRCComplete(RNG); + crc32 = FL_RNG_ReadData(RNG); + FL_RNG_Disable(RNG); + return crc32; +} + +/** + * @} + */ + +#endif /* FL_RNG_DRIVER_ENABLED */ + +/** + * @} + */ + +/** + * @} + */ + +/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/ + diff --git a/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_rtca.c b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_rtca.c new file mode 100644 index 0000000..ab4e7e2 --- /dev/null +++ b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_rtca.c @@ -0,0 +1,212 @@ + /** + ******************************************************************************************************* + * @file fm33lg0xx_fl_rtca.c + * @author FMSH Application Team + * @brief Src file of RTCA FL Module + ******************************************************************************************************* + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + +/* Includes ------------------------------------------------------------------*/ +#include "fm33lg0xx_fl.h" + +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @addtogroup RTCA + * @{ + */ + +#ifdef FL_RTCA_DRIVER_ENABLED + +/* Private macros ------------------------------------------------------------*/ +/** @addtogroup RTCA_FL_Private_Macros + * @{ + */ +#define IS_RTCA_INSTANCE(RTCAx) ((RTCAx) == RTCA) + +/** + * @} + */ + +/* Exported functions --------------------------------------------------------*/ +/** @addtogroup RTCA_FL_EF_Init + * @{ + */ +/** + * @brief 复位对应RTCAx寄存器. + * @param RTCAx + * @retval ErrorStatus枚举值: + * -FL_PASS 外设寄存器值恢复复位值 + * -FL_FAIL 未成功执行 + */ +FL_ErrorStatus FL_RTCA_DeInit(RTCA_Type *RTCAx) +{ + FL_ErrorStatus result = FL_PASS; + /* Check the parameters */ + assert_param(IS_RTCA_INSTANCE(RTCAx)); + RTCAx->IER = 0x00000000U; + RTCAx->WER = 0xACACACACU; + RTCAx->ADJUST = 0x00000000U; + RTCAx->ADSIGN = 0x00000000U; + RTCAx->ALARM = 0x00000000U; + RTCAx->BCDDAY = 0x00000000U; + RTCAx->BCDHOUR = 0x00000000U; + RTCAx->BCDMIN = 0x00000000U; + RTCAx->BCDMONTH = 0x00000000U; + RTCAx->BCDSEC = 0x00000000U; + RTCAx->BCDWEEK = 0x00000000U; + RTCAx->BCDYEAR = 0x00000000U; + RTCAx->SBSCNT = 0x00000000U; + RTCAx->TMSEL = 0x00000000U; + RTCAx->CR = 0x00000000U; + RTCAx->WER = 0x00000000U; + return result; +} +/** + * @brief 配置实时时钟相关. + * @param RTCAx Timer Instance + * @param initStruct 指向一个 @ref FL_RTCA_InitTypeDef(时基配置结构体) + * @retval ErrorStatus枚举值 + * -FL_FAIL 配置过程发生错误 + * -FL_PASS 成功 + */ +FL_ErrorStatus FL_RTCA_Init(RTCA_Type *RTCAx, FL_RTCA_InitTypeDef *initStruct) +{ + /* 参数检查 */ + assert_param(IS_RTCA_INSTANCE(RTCAx)); + /* 时钟总线使能配置 */ + FL_CMU_EnableGroup1BusClock(FL_CMU_GROUP1_BUSCLK_RTCA); + /* 配置时间 */ + FL_RTCA_ConfigTime(RTCAx, initStruct); + return FL_PASS; +} + +/** + * @brief 设置实时时钟 + * @param RTCAx Timer Instance + * @param initStruct 指向一个 @ref FL_RTCA_InitTypeDef(时基配置结构体) + * @retval ErrorStatus枚举值 + * -FL_FAIL 配置过程发生错误 + * -FL_PASS 成功 + */ +FL_ErrorStatus FL_RTCA_ConfigTime(RTCA_Type *RTCAx, FL_RTCA_InitTypeDef *initStruct) +{ + /* 使能时间配置 */ + FL_RTCA_WriteEnable(RTCAx); + /* 配置秒 */ + FL_RTCA_WriteSecond(RTCAx, initStruct->second); + /* 配置分钟 */ + FL_RTCA_WriteMinute(RTCAx, initStruct->minute); + /* 配置小时 */ + FL_RTCA_WriteHour(RTCAx, initStruct->hour); + /* 配置日期 */ + FL_RTCA_WriteDay(RTCAx, initStruct->day); + /* 配置周 */ + FL_RTCA_WriteWeek(RTCAx, initStruct->week); + /* 配置月 */ + FL_RTCA_WriteMonth(RTCAx, initStruct->month); + /* 配置年 */ + FL_RTCA_WriteYear(RTCAx, initStruct->year); + /* 锁定时间配置 */ + FL_RTCA_WriteDisable(RTCAx); + return FL_PASS; +} +/** + * @brief 获取实时时间并保存到指定结构体中 + * @param RTCAx Timer Instance + * @param initStruct 指向一个 @ref FL_RTCA_InitTypeDef(时基配置结构体) + * @retval ErrorStatus枚举值 + * -FL_FAIL 配置过程发生错误 + * -FL_PASS 成功 + */ +FL_ErrorStatus FL_RTCA_GetTime(RTCA_Type *RTCAx, FL_RTCA_InitTypeDef *initStruct) +{ + /* 配置秒 */ + initStruct->second = FL_RTCA_ReadSecond(RTCAx); + /* 配置分钟 */ + initStruct->minute = FL_RTCA_ReadMinute(RTCAx); + /* 配置小时 */ + initStruct->hour = FL_RTCA_ReadHour(RTCAx); + /* 配置日期 */ + initStruct->day = FL_RTCA_ReadDay(RTCAx); + /* 配置周 */ + initStruct->week = FL_RTCA_ReadWeek(RTCAx); + /* 配置月 */ + initStruct->month = FL_RTCA_ReadMonth(RTCAx); + /* 配置年 */ + initStruct->year = FL_RTCA_ReadYear(RTCAx); + return FL_PASS; +} +/** + * @brief 设置 initStruct 为默认配置 + * @param initStruct 指向需要将值设置为默认配置的结构体 @ref FL_RTCA_InitTypeDef 结构体 + * + * @retval None + */ + +void FL_RTCA_StructInit(FL_RTCA_InitTypeDef *initStruct) +{ + /* */ + initStruct->year = 0x00; + initStruct->month = 0x00; + initStruct->day = 0x00; + initStruct->week = 0x00; + initStruct->hour = 0x00; + initStruct->minute = 0x00; + initStruct->second = 0x00; +} + +/** + * @} + */ + +#endif /* FL_RTCA_DRIVER_ENABLED */ + +/** + * @} + */ + +/** + * @} + */ + +/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/ + diff --git a/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_spi.c b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_spi.c new file mode 100644 index 0000000..aedb1e8 --- /dev/null +++ b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_spi.c @@ -0,0 +1,254 @@ + /** + ******************************************************************************************************* + * @file fm33lg0xx_fl_spi.c + * @author FMSH Application Team + * @brief Src file of SPI FL Module + ******************************************************************************************************* + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + +/* Includes ------------------------------------------------------------------*/ +#include "fm33lg0xx_fl.h" + +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @addtogroup SPI + * @{ + */ + +#ifdef FL_SPI_DRIVER_ENABLED + +/* Private macros ------------------------------------------------------------*/ +/** @addtogroup SPI_FL_Private_Macros + * @{ + */ +#define IS_FL_SPI_INSTANCE(INTANCE) (((INTANCE) == SPI0)||\ + ((INTANCE) == SPI1)||\ + ((INTANCE) == SPI2)) + +#define IS_FL_SPI_MODE(__VALUE__) (((__VALUE__) == FL_SPI_WORK_MODE_SLAVE)||\ + ((__VALUE__) == FL_SPI_WORK_MODE_MASTER)) + +#define IS_FL_SPI_BITORDER(__VALUE__) (((__VALUE__) == FL_SPI_BIT_ORDER_MSB_FIRST)||\ + ((__VALUE__) == FL_SPI_BIT_ORDER_LSB_FIRST)) + +#define IS_FL_SPI_DATAWIDT(__VALUE__) (((__VALUE__) == FL_SPI_DATA_WIDTH_8B)||\ + ((__VALUE__) == FL_SPI_DATA_WIDTH_16B)||\ + ((__VALUE__) == FL_SPI_DATA_WIDTH_24B)||\ + ((__VALUE__) == FL_SPI_DATA_WIDTH_32B)) + +#define IS_FL_SPI_CLOCK_PHASE(__VALUE__) (((__VALUE__) == FL_SPI_PHASE_EDGE1)||\ + ((__VALUE__) == FL_SPI_PHASE_EDGE2)) + +#define IS_FL_SPI_CLOCK_POLARITY(__VALUE__) (((__VALUE__) == FL_SPI_POLARITY_NORMAL)||\ + ((__VALUE__) == FL_SPI_POLARITY_INVERT)) + +#define IS_FL_SPI_BAUDRATE(__VALUE__) (((__VALUE__) == FL_SPI_BAUDRATE_DIV2)||\ + ((__VALUE__) == FL_SPI_BAUDRATE_DIV4)||\ + ((__VALUE__) == FL_SPI_BAUDRATE_DIV8)||\ + ((__VALUE__) == FL_SPI_BAUDRATE_DIV16)||\ + ((__VALUE__) == FL_SPI_BAUDRATE_DIV32)||\ + ((__VALUE__) == FL_SPI_BAUDRATE_DIV64)||\ + ((__VALUE__) == FL_SPI_BAUDRATE_DIV128)||\ + ((__VALUE__) == FL_SPI_BAUDRATE_DIV256)) + + +#define IS_FL_SPI_TANSFERMODE(__VALUE__) (((__VALUE__) == FL_SPI_TRANSFER_MODE_FULL_DUPLEX)||\ + ((__VALUE__) == FL_SPI_TRANSFER_MODE_HALF_DUPLEX)) + + +/** + * @} + */ + +/* Exported functions --------------------------------------------------------*/ +/** @addtogroup SPI_FL_EF_Init + * @{ + */ + +/** + * @brief 复位对应SPI寄存器. + * @param SPIx + * @retval ErrorStatus枚举值: + * -FL_PASS 外设寄存器值恢复复位值 + * -FL_FAIL 未成功执行 + */ +FL_ErrorStatus FL_SPI_DeInit(SPI_Type *SPIx) +{ + assert_param(IS_FL_SPI_INSTANCE(SPIx)); + /* 使能外设复位 */ + FL_RMU_EnablePeripheralReset(RMU); + if(SPIx == SPI0) + { + /* 复位SPI外设寄存器 */ + FL_RMU_EnableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_SPI0); + FL_RMU_DisableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_SPI0); + /* 关闭外设总线始时钟和工作时钟 */ + FL_CMU_DisableGroup3BusClock(FL_CMU_GROUP3_BUSCLK_SPI0); + } + else + if(SPIx == SPI1) + { + /* 复位SPI外设寄存器 */ + FL_RMU_EnableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_SPI1); + FL_RMU_DisableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_SPI1); + /* 关闭外设总线始时钟和工作时钟 */ + FL_CMU_DisableGroup3BusClock(FL_CMU_GROUP3_BUSCLK_SPI1); + } + else + if(SPIx == SPI2) + { + /* 复位SPI外设寄存器 */ + FL_RMU_EnableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_SPI2); + FL_RMU_DisableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_SPI2); + /* 关闭外设总线始时钟和工作时钟 */ + FL_CMU_DisableGroup3BusClock(FL_CMU_GROUP3_BUSCLK_SPI2); + } + else + { + FL_RMU_DisablePeripheralReset(RMU); + return FL_FAIL; + } + /* 锁定外设复位 */ + FL_RMU_DisablePeripheralReset(RMU); + return FL_PASS; +} +/** + * @brief 根据 SPI_InitStruct 的配置信息初始化对应外设入口地址的寄存器值. + * @param SPIx SPIx + * @param SPI_InitStruct 指向一个 @ref FL_SPI_InitTypeDef 结构体 + * 其中包含了外设的相关配置信息. + * @retval ErrorStatus枚举值 + * -FL_FAIL 配置过程发生错误 + * -FL_PASS SPI配置成功 + */ +FL_ErrorStatus FL_SPI_Init(SPI_Type *SPIx, FL_SPI_InitTypeDef *initStruct) +{ + assert_param(IS_FL_SPI_INSTANCE(SPIx)); + assert_param(IS_FL_SPI_MODE(initStruct->mode)); + assert_param(IS_FL_SPI_BITORDER(initStruct->bitOrder)); + assert_param(IS_FL_SPI_DATAWIDT(initStruct->dataWidth)); + assert_param(IS_FL_SPI_BAUDRATE(initStruct->baudRate)); + assert_param(IS_FL_SPI_CLOCK_PHASE(initStruct->clockPhase)); + assert_param(IS_FL_SPI_CLOCK_POLARITY(initStruct->clockPolarity)); + if(SPIx == SPI0) + { + /* 外设总线始时钟 */ + FL_CMU_EnableGroup3BusClock(FL_CMU_GROUP3_BUSCLK_SPI0); + } + else + if(SPIx == SPI1) + { + /* 外设总线始时钟 */ + FL_CMU_EnableGroup3BusClock(FL_CMU_GROUP3_BUSCLK_SPI1); + } + else + if(SPIx == SPI2) + { + /* 外设总线始时钟 */ + FL_CMU_EnableGroup3BusClock(FL_CMU_GROUP3_BUSCLK_SPI2); + } + else + { + return FL_FAIL; + } + /* 选择NSS脚控制模式 */ + if(initStruct->softControl == FL_ENABLE) + { + FL_SPI_EnableSSNSoftControl(SPIx); + } + else + { + FL_SPI_DisableSSNSoftControl(SPIx); + } + /* 外设工作主从模式 */ + FL_SPI_SetWorkMode(SPIx, initStruct->mode); + /* 总线通讯速率 */ + FL_SPI_SetClockDivision(SPIx, initStruct->baudRate); + /* 数据bit方向 */ + FL_SPI_SetBitOrder(SPIx, initStruct->bitOrder); + /* 总线数据位宽 */ + FL_SPI_SetDataWidth(SPIx, initStruct->dataWidth); + /* 时钟相位 */ + FL_SPI_SetClockPhase(SPIx, initStruct->clockPhase); + /* 传输模式 双工半双工 */ + FL_SPI_SetTransferMode(SPIx, initStruct->transferMode); + /* 时钟极性 */ + FL_SPI_SetClockPolarity(SPIx, initStruct->clockPolarity); + /* 使能 外设*/ + FL_SPI_Enable(SPIx); + return FL_PASS; +} +/** + * @brief 设置 SPI_InitStruct 为默认配置 + * @param SPI_InitStruct 指向需要将值设置为默认配置的结构体 @ref FL_SPI_InitTypeDef 结构体 + * + * @retval None + */ + +void FL_SPI_StructInit(FL_SPI_InitTypeDef *initStruct) +{ + initStruct->softControl = FL_DISABLE; + initStruct->mode = FL_SPI_WORK_MODE_MASTER; + initStruct->baudRate = FL_SPI_CLK_DIV8; + initStruct->bitOrder = FL_SPI_BIT_ORDER_MSB_FIRST; + initStruct->dataWidth = FL_SPI_DATA_WIDTH_8B; + initStruct->clockPolarity = FL_SPI_POLARITY_NORMAL; + initStruct->clockPhase = FL_SPI_PHASE_EDGE1; + initStruct->transferMode = FL_SPI_TRANSFER_MODE_FULL_DUPLEX; +} + +/** + * @} + */ + +#endif /* FL_SPI_DRIVER_ENABLED */ + +/** + * @} + */ + +/** + * @} + */ + +/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/ + diff --git a/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_svd.c b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_svd.c new file mode 100644 index 0000000..cae5be6 --- /dev/null +++ b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_svd.c @@ -0,0 +1,216 @@ + /** + **************************************************************************************************** + * @file fm33lg0xx_fl_svd.c + * @author FMSH Application Team + * @brief Src file of SVD FL Module + **************************************************************************************************** + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + +/* Includes ------------------------------------------------------------------*/ +#include "fm33lg0xx_fl.h" + +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @addtogroup SVD + * @{ + */ + +#ifdef FL_SVD_DRIVER_ENABLED + +/* Private macros ------------------------------------------------------------*/ +/** @addtogroup SVD_FL_Private_Macros + * @{ + */ + +#define IS_SVD_INSTANCE(INSTANCE) (((INSTANCE) == SVD)) + +#define IS_FL_SVD_REFERENCE_VOLTAGE(__VALUE__) (((__VALUE__) == FL_SVD_REFERENCE_1P0V)||\ + ((__VALUE__) == FL_SVD_REFERENCE_0P95V)||\ + ((__VALUE__) == FL_SVD_REFERENCE_0P9V)) + +#define IS_FL_SVD_WARNING_THRESHOLD_LEVEL(__VALUE__) (((__VALUE__) == FL_SVD_WARNING_THRESHOLD_GROUP0)||\ + ((__VALUE__) == FL_SVD_WARNING_THRESHOLD_GROUP1)||\ + ((__VALUE__) == FL_SVD_WARNING_THRESHOLD_GROUP2)||\ + ((__VALUE__) == FL_SVD_WARNING_THRESHOLD_GROUP3)||\ + ((__VALUE__) == FL_SVD_WARNING_THRESHOLD_GROUP4)||\ + ((__VALUE__) == FL_SVD_WARNING_THRESHOLD_GROUP5)||\ + ((__VALUE__) == FL_SVD_WARNING_THRESHOLD_GROUP6)||\ + ((__VALUE__) == FL_SVD_WARNING_THRESHOLD_GROUP7)||\ + ((__VALUE__) == FL_SVD_WARNING_THRESHOLD_GROUP8)||\ + ((__VALUE__) == FL_SVD_WARNING_THRESHOLD_GROUP9)||\ + ((__VALUE__) == FL_SVD_WARNING_THRESHOLD_GROUP10)||\ + ((__VALUE__) == FL_SVD_WARNING_THRESHOLD_GROUP11)||\ + ((__VALUE__) == FL_SVD_WARNING_THRESHOLD_GROUP12)||\ + ((__VALUE__) == FL_SVD_WARNING_THRESHOLD_GROUP13)||\ + ((__VALUE__) == FL_SVD_WARNING_THRESHOLD_GROUP14)||\ + ((__VALUE__) == FL_SVD_WARNING_THRESHOLD_GROUP15)) + +#define IS_FL_SVD_WORK_MODE(__VALUE__) (((__VALUE__) == FL_SVD_WORK_MODE_CONTINUOUS)||\ + ((__VALUE__) == FL_SVD_WORK_MODE_PERIODIC)) + +#define IS_FL_SVD_ENABLE_PERIOD(__VALUE__) (((__VALUE__) == FL_SVD_ENABLE_PERIOD_62P5MS)||\ + ((__VALUE__) == FL_SVD_ENABLE_PERIOD_256MS)||\ + ((__VALUE__) == FL_SVD_ENABLE_PERIOD_1000MS)||\ + ((__VALUE__) == FL_SVD_ENABLE_PERIOD_4000MS)) + +/** + * @} + */ + +/* Exported functions --------------------------------------------------------*/ +/** @addtogroup SVD_FL_EF_Init + * @{ + */ + +/** + * @brief 复位SVD外设 + * @param 外设入口地址 + * @retval 返回错误状态，可能值： + * -FL_PASS 外设寄存器值恢复复位值 + * -FL_FAIL 未成功执行 + */ +FL_ErrorStatus FL_SVD_DeInit(SVD_Type *SVDx) +{ + /* 参数检查 */ + assert_param(IS_SVD_INSTANCE(SVDx)); + /* 使能复位 */ + FL_RMU_EnablePeripheralReset(RMU); + /* 复位外设寄存器 */ + FL_RMU_EnableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_SVD); + FL_RMU_DisableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_SVD); + /* 关闭外设总线时钟 */ + FL_CMU_DisableGroup1BusClock(FL_CMU_GROUP1_BUSCLK_SVD); + /* 关闭复位 */ + FL_RMU_DisablePeripheralReset(RMU); + return FL_PASS; +} + +/** + * @brief 根据需要功能配置SVD寄存器 + * + * @param SVDx 外设入口地址 + * @param init @ref FL_SVD_InitTypeDef类型的结构体 + * + * @retval ErrorStatus枚举值 + * -FL_FAIL 配置过程发生错误 + * -FL_PASS SVD配置成功 + */ +FL_ErrorStatus FL_SVD_Init(SVD_Type *SVDx, FL_SVD_InitTypeDef *init) +{ + /* 参数检查 */ + assert_param(IS_SVD_INSTANCE(SVDx)); + assert_param(IS_FL_SVD_REFERENCE_VOLTAGE(init->referenceVoltage)); + assert_param(IS_FL_SVD_WARNING_THRESHOLD_LEVEL(init->warningThreshold)); + assert_param(IS_FL_SVD_WORK_MODE(init->workMode)); + assert_param(IS_FL_SVD_ENABLE_PERIOD(init->enablePeriod)); + /* 开启SVD时钟 */ + if(SVDx == SVD) + { + FL_CMU_EnableGroup1BusClock(FL_CMU_GROUP1_BUSCLK_SVD); + } + else + { + return FL_FAIL; + } + /* 设置参考基准 */ + FL_SVD_EnableReference(SVDx, init->referenceVoltage); + /* 设置报警阈值 */ + FL_SVD_SetWarningThreshold(SVDx, init->warningThreshold); + /* 数字滤波 */ + if(init->digitalFilter == FL_ENABLE) + { + FL_SVD_EnableDigitalFilter(SVDx); + } + else + { + FL_SVD_DisableDigitalFilter(SVDx); + } + /* 工作模式 */ + FL_SVD_SetWorkMode(SVDx, init->workMode); + if(init->workMode == FL_SVD_WORK_MODE_PERIODIC) + { + /* 间歇使能间隔 */ + FL_SVD_SetEnablePeriod(SVDx, init->enablePeriod); + } + /* SVS通道 */ + if(init->SVSChannel == FL_ENABLE) + { + FL_SVD_EnableSVSChannel(SVDx); + } + else + { + FL_SVD_DisableSVSChannel(SVDx); + } + return FL_PASS; +} + +/** + * @brief 设置 SVD_InitStruct 为默认配置 + * @param init @ref FL_SVD_InitTypeDef类型的结构体 + * + * @retval None + */ +void FL_SVD_StructInit(FL_SVD_InitTypeDef *init) +{ + init->referenceVoltage = FL_SVD_REFERENCE_1P0V; + init->SVSChannel = FL_DISABLE; + init->digitalFilter = FL_DISABLE; + init->workMode = FL_SVD_WORK_MODE_CONTINUOUS; + init->enablePeriod = FL_SVD_ENABLE_PERIOD_62P5MS; + init->warningThreshold = FL_SVD_WARNING_THRESHOLD_GROUP0; +} + +/** + * @} + */ + +#endif /* FL_SVD_DRIVER_ENABLED */ + +/** + * @} + */ + +/** + * @} + */ + +/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/ diff --git a/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_uart.c b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_uart.c new file mode 100644 index 0000000..3010442 --- /dev/null +++ b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_uart.c @@ -0,0 +1,400 @@ + /** + **************************************************************************************************** + * @file fm33lg0xx_fl_uart.c + * @author FMSH Application Team + * @brief Src file of UART FL Module + **************************************************************************************************** + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + +/* Includes ------------------------------------------------------------------*/ +#include "fm33lg0xx_fl.h" + +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @addtogroup UART + * @{ + */ + +#ifdef FL_UART_DRIVER_ENABLED + +/* Private macros ------------------------------------------------------------*/ +/** @addtogroup UART_FL_Private_Macros + * @{ + */ + + +#define IS_UART_INSTANCE(INSTANCE) (((INSTANCE) == UART0)||\ + ((INSTANCE) == UART1)||\ + ((INSTANCE) == UART3)||\ + ((INSTANCE) == UART4)||\ + ((INSTANCE) == UART5)) + +#define IS_FL_UART_CLKSRC(__VALUE__) (((__VALUE__) == FL_CMU_UART0_CLK_SOURCE_APBCLK)||\ + ((__VALUE__) == FL_CMU_UART0_CLK_SOURCE_RCHF)||\ + ((__VALUE__) == FL_CMU_UART0_CLK_SOURCE_SYSCLK)||\ + ((__VALUE__) == FL_CMU_UART0_CLK_SOURCE_XTHF)||\ + ((__VALUE__) == FL_CMU_UART1_CLK_SOURCE_APBCLK)||\ + ((__VALUE__) == FL_CMU_UART1_CLK_SOURCE_RCHF)||\ + ((__VALUE__) == FL_CMU_UART1_CLK_SOURCE_SYSCLK)||\ + ((__VALUE__) == FL_CMU_UART1_CLK_SOURCE_XTHF)) + + +#define IS_FL_UART_DATAWIDTH(__VALUE__) (((__VALUE__) == FL_UART_DATA_WIDTH_6B)||\ + ((__VALUE__) == FL_UART_DATA_WIDTH_7B)||\ + ((__VALUE__) == FL_UART_DATA_WIDTH_8B)||\ + ((__VALUE__) == FL_UART_DATA_WIDTH_9B)) + +#define IS_FL_UART_STOPBITS(__VALUE__) (((__VALUE__) == FL_UART_STOP_BIT_WIDTH_1B)||\ + ((__VALUE__) == FL_UART_STOP_BIT_WIDTH_2B)) + +#define IS_FL_UART_PARITY(__VALUE__) (((__VALUE__) == FL_UART_PARITY_NONE)||\ + ((__VALUE__) == FL_UART_PARITY_EVEN)||\ + ((__VALUE__) == FL_UART_PARITY_ODD)) + +#define IS_FL_UART_DIRECTION(__VALUE__) (((__VALUE__) == FL_UART_DIRECTION_NONE)||\ + ((__VALUE__) == FL_UART_DIRECTION_RX)||\ + ((__VALUE__) == FL_UART_DIRECTION_TX)||\ + ((__VALUE__) == FL_UART_DIRECTION_TX_RX)) + +#define IS_FL_UART_INFRA_MODULATION(__VALUE__) (((__VALUE__) == FL_DISABLE)||\ + ((__VALUE__) == FL_ENABLE)) + + +#define IS_FL_UART_INFRARED_POLARITY(__VALUE__) (((__VALUE__) == FL_UART_INFRARED_POLARITY_NORMAL)||\ + ((__VALUE__) == FL_UART_INFRARED_POLARITY_INVERT)) + +#define IS_FL_UART_INFRARED_MODULATION_DUTY(__VALUE__) (((__VALUE__) <= 100)) + + +/** + * @} + */ + +/* Exported functions --------------------------------------------------------*/ +/** @addtogroup UART_FL_EF_Init + * @{ + */ + +/** + * @brief 复位UART 外设寄存器值为复位值 + * @param 外设入口地址 + * @retval 返回错误状态，可能值: + * -FL_PASS 外设寄存器值恢复复位值 + * -FL_FAIL 复位未成功 + */ +FL_ErrorStatus FL_UART_DeInit(UART_Type *UARTx) +{ + FL_ErrorStatus status = FL_PASS; + /* 参数入口合法性 */ + assert_param(IS_UART_INSTANCE(UARTx)); + /* 外设复位使能 */ + FL_RMU_EnablePeripheralReset(RMU); + if(UARTx == UART0) + { + /*复位UART*/ + FL_RMU_EnableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_UART0); + FL_RMU_DisableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_UART0); + /* 外设总线时钟关闭 */ + FL_CMU_DisableGroup3BusClock(FL_CMU_GROUP3_BUSCLK_UART0); + /* 外设工作时钟关闭 */ + FL_CMU_DisableGroup3OperationClock(FL_CMU_GROUP3_OPCLK_UART0); + } + else + if(UARTx == UART1) + { + /*复位UART*/ + FL_RMU_EnableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_UART1); + FL_RMU_DisableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_UART1); + /* 外设总线时钟关闭 */ + FL_CMU_DisableGroup3BusClock(FL_CMU_GROUP3_BUSCLK_UART1); + /* 外设工作时钟关闭 */ + FL_CMU_DisableGroup3OperationClock(FL_CMU_GROUP3_OPCLK_UART1); + } + else + if(UARTx == UART3) + { + /*复位UART*/ + FL_RMU_EnableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_UART3); + FL_RMU_DisableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_UART3); + /* UART3、4、5为单时钟，关闭总线时钟 */ + FL_CMU_DisableGroup3BusClock(FL_CMU_GROUP3_BUSCLK_UART3); + } + else + if(UARTx == UART4) + { + /*复位UART*/ + FL_RMU_EnableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_UART4); + FL_RMU_DisableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_UART4); + /* 总线、工作时钟关闭 */ + FL_CMU_DisableGroup3BusClock(FL_CMU_GROUP3_BUSCLK_UART4); + } + else + if(UARTx == UART5) + { + /*复位UART*/ + FL_RMU_EnableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_UART5); + FL_RMU_DisableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_UART5); + /* 总线（工作）时钟关闭 */ + FL_CMU_DisableGroup3BusClock(FL_CMU_GROUP3_BUSCLK_UART5); + } + else + { + status = FL_FAIL; + } + /* 锁定外设复位功能 */ + FL_RMU_DisablePeripheralReset(RMU); + return (status); +} + +/** + * @brief 根据需要配置UART + * + * @param UARTx 外设入口地址 + * @param UART_InitStruct指向一个FL_UART_InitTypeDef类型的结构体,它包含外设UART的配置信息 + * + * @retval ErrorStatus枚举值 + * -FL_FAIL 配置过程发生错误 + * -FL_PASS UART配置成功 + */ +FL_ErrorStatus FL_UART_Init(UART_Type *UARTx, FL_UART_InitTypeDef *initStruct) +{ + FL_ErrorStatus status = FL_FAIL; + uint32_t Fclk = 0, BaudRate = 0; + /* 参数合法性检查 */ + assert_param(IS_UART_INSTANCE(UARTx)); + assert_param(IS_FL_UART_CLKSRC(initStruct->clockSrc)); + assert_param(IS_FL_UART_DATAWIDTH(initStruct->dataWidth)); + assert_param(IS_FL_UART_PARITY(initStruct->parity)); + assert_param(IS_FL_UART_STOPBITS(initStruct->stopBits)); + assert_param(IS_FL_UART_DIRECTION(initStruct->transferDirection)); + if(UARTx == UART0) + { + /*时钟源选择*/ + FL_CMU_SetUART0ClockSource(initStruct->clockSrc); + /* 根据不同的时钟源计算baudrate 寄存器值,并配置 */ + switch(initStruct->clockSrc) + { + case FL_CMU_UART0_CLK_SOURCE_APBCLK: + Fclk = FL_CMU_GetAPBClockFreq(); + break; + case FL_CMU_UART0_CLK_SOURCE_RCHF: + Fclk = FL_CMU_GetRCHFClockFreq(); + break; + case FL_CMU_UART0_CLK_SOURCE_SYSCLK: + Fclk = FL_CMU_GetSystemClockFreq(); + break; + case FL_CMU_UART0_CLK_SOURCE_XTHF: + Fclk = XTHFClock; + break; + default: + Fclk = FL_CMU_GetAPBClockFreq(); + break; + } + BaudRate = Fclk / initStruct->baudRate - 1; + } + if(UARTx == UART1) + { + /*时钟源选择*/ + FL_CMU_SetUART1ClockSource(initStruct->clockSrc); + /* 根据不同的时钟源计算baudrate 寄存器值,并配置 */ + switch(initStruct->clockSrc) + { + case FL_CMU_UART1_CLK_SOURCE_APBCLK: + Fclk = FL_CMU_GetAPBClockFreq(); + break; + case FL_CMU_UART1_CLK_SOURCE_RCHF: + Fclk = FL_CMU_GetRCHFClockFreq(); + break; + case FL_CMU_UART1_CLK_SOURCE_SYSCLK : + Fclk = FL_CMU_GetSystemClockFreq(); + break; + case FL_CMU_UART1_CLK_SOURCE_XTHF: + Fclk = XTHFClock; + break; + default: + Fclk = FL_CMU_GetAPBClockFreq(); + break; + } + BaudRate = Fclk / initStruct->baudRate - 1; + } + if(UARTx == UART0) + { + FL_CMU_EnableGroup3BusClock(FL_CMU_GROUP3_BUSCLK_UART0); + FL_CMU_EnableGroup3OperationClock(FL_CMU_GROUP3_OPCLK_UART0); + } + else + if(UARTx == UART1) + { + FL_CMU_EnableGroup3BusClock(FL_CMU_GROUP3_BUSCLK_UART1); + FL_CMU_EnableGroup3OperationClock(FL_CMU_GROUP3_OPCLK_UART1); + } + else + if(UARTx == UART3) + { + FL_CMU_EnableGroup3BusClock(FL_CMU_GROUP3_BUSCLK_UART3); + Fclk = FL_CMU_GetAPBClockFreq(); + BaudRate = Fclk / initStruct->baudRate - 1; + } + else + if(UARTx == UART4) + { + FL_CMU_EnableGroup3BusClock(FL_CMU_GROUP3_BUSCLK_UART4); + Fclk = FL_CMU_GetAPBClockFreq(); + BaudRate = Fclk / initStruct->baudRate - 1; + } + else + if(UARTx == UART5) + { + FL_CMU_EnableGroup3BusClock(FL_CMU_GROUP3_BUSCLK_UART5); + Fclk = FL_CMU_GetAPBClockFreq(); + BaudRate = Fclk / initStruct->baudRate - 1; + } + /*发送接收控制*/ + if(initStruct->transferDirection & FL_UART_DIRECTION_TX) + { + FL_UART_EnableTX(UARTx); + } + if(initStruct->transferDirection & FL_UART_DIRECTION_RX) + { + FL_UART_EnableRX(UARTx); + } + /*配置波特率*/ + FL_UART_WriteBaudRate(UARTx, BaudRate); + /*配置停止位长度*/ + FL_UART_SetStopBitsWidth(UARTx, initStruct->stopBits); + /*数据长度*/ + FL_UART_SetDataWidth(UARTx, initStruct->dataWidth); + /*配置奇偶校验*/ + FL_UART_SetParity(UARTx, initStruct->parity); + status = FL_PASS; + return status; +} +/** + * @brief 根据需要配置红外调制寄存器 + * + * @param UARTx 外设入口地址 + * + * @param initStruct指向FL_UART_InitTypeDef类型的结构体,包含UART外设信息 + * + * @retval ErrorStatus枚举值 + * -FL_FAIL 配置过程出现错误 + * -FL_PASS UART配置成功 + */ +FL_ErrorStatus FL_UART_InfraRed_Init(UART_Type *UARTx, FL_UART_InfraRed_InitTypeDef *initStruct) +{ + FL_ErrorStatus status = FL_FAIL; + uint32_t tempTZBRG = 0, tempTH = 0; + /* 参数合法性检查 */ + assert_param(IS_UART_INSTANCE(UARTx)); + assert_param(IS_FL_UART_INFRARED_POLARITY(initStruct->polarity)); + assert_param(IS_FL_UART_INFRARED_MODULATION_DUTY(initStruct->modulationDuty)); + /*红外发送总线时钟使能*/ + FL_CMU_EnableGroup3BusClock(FL_CMU_GROUP3_BUSCLK_UARTIR); + /*红外发送使能*/ + FL_UART_EnableIRModulation(UARTx); + /*红外调制极性*/ + FL_UART_SetIRPolarity(UART, initStruct->polarity); + /*红外调制频率*/ + tempTZBRG = (uint32_t)((FL_CMU_GetAPBClockFreq() * 1.0) / initStruct->modulationFrequency - 1); + /* 调制占空比 */ + if((tempTZBRG >> 4) != 0) + { + tempTH = (uint32_t)(((float)initStruct->modulationDuty / 100.0f) * ((float)(tempTZBRG + 1) / (float)(tempTZBRG >> 4)) + 0.5f); + } + else + { + tempTH = (uint32_t)(((float)initStruct->modulationDuty / 100.0f) * (float)(tempTZBRG + 1) + 0.5f); + } + /* 占空比限位到小于95%，否则结果会有问题 */ + tempTH = ((float)((tempTZBRG >> 4) * tempTH) / (float)(tempTZBRG + 1)) < 0.95f ? tempTH : tempTH - 1; + /* 占空比和调制频率配置 */ + FL_UART_WriteIRModulationDuty(UART, tempTH); + FL_UART_WriteIRModulationFrequency(UART, tempTZBRG); + status = FL_PASS; + return status; +} + +/** + * @brief UART_InitStruct 为默认配置 + * @param UART_InitStruct 指向需要将值设置为默认配置 的结构体@ref FL_UART_InitTypeDef structure 结构体 + * + * @retval None + */ +void FL_UART_InfraRed_StructInit(FL_UART_InfraRed_InitTypeDef *initStruct) +{ + initStruct->polarity = FL_UART_INFRARED_POLARITY_NORMAL; + initStruct->modulationDuty = 50; + initStruct->modulationFrequency = 38000; +} + +/** + * @brief UART_InitStruct 为默认配置 + * @param UART_InitStruct 指向需要将值设置为默认配置 的结构体@ref FL_UART_InitTypeDef structure 结构体 + * 结构体 + * @retval None + */ +void FL_UART_StructInit(FL_UART_InitTypeDef *initStruct) +{ + initStruct->baudRate = 115200; + initStruct->dataWidth = FL_UART_DATA_WIDTH_8B; + initStruct->stopBits = FL_UART_STOP_BIT_WIDTH_1B; + initStruct->parity = FL_UART_PARITY_EVEN ; + initStruct->transferDirection = FL_UART_DIRECTION_TX_RX; + initStruct->clockSrc = 0; +} + +/** + * @} + */ + +#endif /* FL_UART_DRIVER_ENABLED */ + +/** + * @} + */ + +/** + * @} + */ + +/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/ + diff --git a/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_vao.c b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_vao.c new file mode 100644 index 0000000..4854a59 --- /dev/null +++ b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_vao.c @@ -0,0 +1,251 @@ + /** + ******************************************************************************************************* + * @file fm33lg0xx_fl_vao.c + * @author FMSH Application Team + * @brief Src file of DMA FL Module + ******************************************************************************************************* + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + +/* Includes ------------------------------------------------------------------*/ +#include "fm33lg0xx_fl.h" + +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @addtogroup VAO + * @{ + */ + +#ifdef FL_VAO_DRIVER_ENABLED + +/* Private macros ------------------------------------------------------------*/ +/** @addtogroup VAO_FL_Private_Macros + * @{ + */ +#define IS_FL_VAO_INSTANCE(INTANCE) ((INTANCE) == VAO) + +#define IS_FL_VAO_OUTPUT_DRIVE_ABILITY(__VALUE__) (((__VALUE__) == FL_VAO_XTLF_DRIVE_LEVEL_NONE)||\ + ((__VALUE__) == FL_VAO_XTLF_DRIVE_LEVEL_1)||\ + ((__VALUE__) == FL_VAO_XTLF_DRIVE_LEVEL_2)||\ + ((__VALUE__) == FL_VAO_XTLF_DRIVE_LEVEL_3)||\ + ((__VALUE__) == FL_VAO_XTLF_DRIVE_LEVEL_4)||\ + ((__VALUE__) == FL_VAO_XTLF_DRIVE_LEVEL_5)||\ + ((__VALUE__) == FL_VAO_XTLF_DRIVE_LEVEL_6)||\ + ((__VALUE__) == FL_VAO_XTLF_DRIVE_LEVEL_7)) + +#define IS_FL_VAO_WORKING_CURRENT(__VALUE__) (((__VALUE__) == FL_VAO_XTLF_WORK_CURRENT_850NA)||\ + ((__VALUE__) == FL_VAO_XTLF_WORK_CURRENT_800NA)||\ + ((__VALUE__) == FL_VAO_XTLF_WORK_CURRENT_750NA)||\ + ((__VALUE__) == FL_VAO_XTLF_WORK_CURRENT_700NA)||\ + ((__VALUE__) == FL_VAO_XTLF_WORK_CURRENT_650NA)||\ + ((__VALUE__) == FL_VAO_XTLF_WORK_CURRENT_600NA)||\ + ((__VALUE__) == FL_VAO_XTLF_WORK_CURRENT_550NA)||\ + ((__VALUE__) == FL_VAO_XTLF_WORK_CURRENT_500NA)||\ + ((__VALUE__) == FL_VAO_XTLF_WORK_CURRENT_450NA)||\ + ((__VALUE__) == FL_VAO_XTLF_WORK_CURRENT_400NA)||\ + ((__VALUE__) == FL_VAO_XTLF_WORK_CURRENT_350NA)||\ + ((__VALUE__) == FL_VAO_XTLF_WORK_CURRENT_300NA)||\ + ((__VALUE__) == FL_VAO_XTLF_WORK_CURRENT_250NA)||\ + ((__VALUE__) == FL_VAO_XTLF_WORK_CURRENT_200NA)||\ + ((__VALUE__) == FL_VAO_XTLF_WORK_CURRENT_150NA)||\ + ((__VALUE__) == FL_VAO_XTLF_WORK_CURRENT_100NA)) + +#define IS_FL_VAO_PH15_INPUT(__VALUE__) (((__VALUE__) == (uint32_t)FL_DISABLE)||\ + ((__VALUE__) == (uint32_t)FL_ENABLE)) + +#define IS_FL_VAO_PH15_PULL_UP(__VALUE__) (((__VALUE__) == FL_DISABLE)||\ + ((__VALUE__) == FL_ENABLE)) + + +#define IS_FL_VAO_PH15_OPENDRAIN_OUTPUT(__VALUE__) (((__VALUE__) == FL_DISABLE)||\ + ((__VALUE__) == FL_ENABLE)) + +#define IS_FL_VAO_PH15_MODE(__VALUE__) (((__VALUE__) == FL_VAO_PH15_MODE_INPUT)||\ + ((__VALUE__) == FL_VAO_PH15_MODE_OUTPUT)||\ + ((__VALUE__) == FL_VAO_PH15_MODE_RTCOUT)) + +/** + * @} + */ + +/* Exported functions --------------------------------------------------------*/ +/** @addtogroup VAO_FL_EF_Init + * @{ + */ + +/** + * @brief 复位对应VAO寄存器 + * @param VAOx VAO Port + * @retval ErrorStatus枚举值: + * -FL_PASS 外设寄存器值恢复复位值 + * -FL_FAIL 未成功执行 + */ +FL_ErrorStatus FL_VAO_DeInit(VAO_Type *VAOx) +{ + /* 入口参数检查 */ + assert_param(IS_FL_VAO_INSTANCE(VAOx)); + /* 使能vao复位 */ + FL_VAO_EnableReset(VAOx); + /*失能CDIF*/ + FL_CDIF_DisableVAOToCPU(CDIF); + FL_CDIF_DisableCPUToVAO(CDIF); + return FL_PASS; +} + +/** + * @brief 根据 VAO_IO_StructInit 的配置信息初始化对应外设入口地址的寄存器值 + * @param VAOx VAOx + * @param VAO_IO_StructInit 指向一个 @ref FL_VAO_IO_InitTypeDef 结构体 + * 其中包含了外设的相关配置信息. + * @retval ErrorStatus枚举值 + * -FL_FAIL 配置过程发生错误 + * -FL_PASS 配置成功 + */ +FL_ErrorStatus FL_VAO_IO_Init(VAO_Type *VAOx, FL_VAO_IO_InitTypeDef *VAO_IO_InitStruct) +{ + /* 参数检查 */ + assert_param(IS_FL_VAO_INSTANCE(VAOx)); + assert_param(IS_FL_VAO_PH15_INPUT(VAO_IO_InitStruct->input)); + assert_param(IS_FL_VAO_PH15_PULL_UP(VAO_IO_InitStruct->pullup)); + assert_param(IS_FL_VAO_PH15_OPENDRAIN_OUTPUT(VAO_IO_InitStruct->opendrainOutput)); + assert_param(IS_FL_VAO_PH15_MODE(VAO_IO_InitStruct->mode)); + /*使能CDIF*/ + FL_CDIF_EnableVAOToCPU(CDIF); + FL_CDIF_EnableCPUToVAO(CDIF); + /*! PH15功能选择 */ + FL_VAO_GPIO_SetPH15Mode(VAOx, VAO_IO_InitStruct->mode); + /*! PH15输入使能 */ + if(VAO_IO_InitStruct->input == FL_ENABLE) + { + FL_VAO_GPIO_EnablePH15Input(VAOx); + } + else + { + FL_VAO_GPIO_DisablePH15Input(VAOx); + } + /*! PH15上拉使能 */ + if(VAO_IO_InitStruct->pullup == FL_ENABLE) + { + FL_VAO_GPIO_EnablePH15Pullup(VAOx); + } + else + { + FL_VAO_GPIO_DisablePH15Pullup(VAOx); + } + /*! PH15开漏输出使能 */ + if(VAO_IO_InitStruct->opendrainOutput == FL_ENABLE) + { + FL_VAO_GPIO_EnablePH15OpenDrain(VAOx); + } + else + { + FL_VAO_GPIO_DisablePH15OpenDrain(VAOx); + } + return FL_PASS; +} + +/** + * @brief 根据 VAO_XTLF_StructInit 的配置信息初始化对应外设入口地址的寄存器值 + * @param VAOx VAOx + * @param VAO_XTLF_StructInit 指向一个 @ref FL_VAO_XTLF_InitTypeDef 结构体 + * 其中包含了外设的相关配置信息. + * @retval ErrorStatus枚举值 + * -FL_FAIL 配置过程发生错误 + * -FL_PASS 配置成功 + */ +FL_ErrorStatus FL_VAO_XTLF_Init(VAO_Type *VAOx, FL_VAO_XTLF_InitTypeDef *VAO_XTLF_InitStruct) +{ + /* 参数检查 */ + assert_param(IS_FL_VAO_INSTANCE(VAOx)); + assert_param(IS_FL_VAO_OUTPUT_DRIVE_ABILITY(VAO_XTLF_InitStruct->driveMode)); + assert_param(IS_FL_VAO_WORKING_CURRENT(VAO_XTLF_InitStruct->workingCurrentMode)); + /*使能CDIF*/ + FL_CDIF_EnableVAOToCPU(CDIF); + FL_CDIF_EnableCPUToVAO(CDIF); + /*! XTLF工作电流选择 */ + FL_VAO_XTLF_SetWorkCurrent(VAOx, VAO_XTLF_InitStruct->workingCurrentMode); + /*! XTLF输出级驱动能力配置 */ + FL_VAO_XTLF_SetDriveLevel(VAOx, VAO_XTLF_InitStruct->driveMode); + return FL_PASS; +} + +/** +* @brief 设置 VAO_IO_StructInit 为默认配置 +* @param VAO_IO_StructInit 指向需要将值设置为默认配置的结构体 @ref FL_VAO_IO_InitTypeDef 结构体 +* +* @retval None +*/ + +void FL_VAO_IO_StructInit(FL_VAO_IO_InitTypeDef *VAO_IO_InitStruct) +{ + VAO_IO_InitStruct->mode = FL_VAO_PH15_MODE_INPUT; + VAO_IO_InitStruct->input = FL_ENABLE; + VAO_IO_InitStruct->pullup = FL_ENABLE; + VAO_IO_InitStruct->opendrainOutput = FL_DISABLE; +} +/** +* @brief 设置 VAO_XTLF_StructInit 为默认配置 +* @param VAO_XTLF_StructInit 指向需要将值设置为默认配置的结构体 @ref FL_VAO_XTLF_InitTypeDef 结构体 +* +* @retval None +*/ + +void FL_VAO_XTLF_StructInit(FL_VAO_XTLF_InitTypeDef *VAO_XTLF_InitStruct) +{ + VAO_XTLF_InitStruct->driveMode = FL_VAO_XTLF_DRIVE_LEVEL_1; + VAO_XTLF_InitStruct->workingCurrentMode = FL_VAO_XTLF_WORK_CURRENT_450NA; +} + +/** + * @} + */ + +#endif /* FL_VAO_DRIVER_ENABLED */ + +/** + * @} + */ + +/** + * @} + */ + +/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/ diff --git a/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_vrefp.c b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_vrefp.c new file mode 100644 index 0000000..033207b --- /dev/null +++ b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_vrefp.c @@ -0,0 +1,192 @@ + /** + **************************************************************************************************** + * @file fm33lg0xx_fl_vrefp.c + * @author FMSH Application Team + * @brief Src file of VREFP FL Module + **************************************************************************************************** + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + +/* Includes ------------------------------------------------------------------*/ +#include "fm33lg0xx_fl.h" + +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @addtogroup VREFP + * @{ + */ + + +#ifdef FL_VREFP_DRIVER_ENABLED + +/* Private macros ------------------------------------------------------------*/ +/** @addtogroup VREFP_FL_Private_Macros + * @{ + */ +#define IS_VREFP_INSTANCE(INTANCE) ((INTANCE) == VREFP) + +#define IS_FL_VREFP_VOLTAGETRIM(__VALUE__) (((__VALUE__) == FL_VREFP_OUTPUT_VOLTAGE_2P0V_TRIM)||\ + ((__VALUE__) == FL_VREFP_OUTPUT_VOLTAGE_2P5V_TRIM)||\ + ((__VALUE__) == FL_VREFP_OUTPUT_VOLTAGE_3P0V_TRIM)||\ + ((__VALUE__) == FL_VREFP_OUTPUT_VOLTAGE_4P5V_TRIM)||\ + ((__VALUE__) == FL_VREFP_OUTPUT_VOLTAGE_1P5V_TRIM)) + +#define IS_FL_VREFP_OUTPUTVOLTAGE(__VALUE__) (((__VALUE__) == FL_VREFP_OUTPUT_VOLTAGE_2P0V)||\ + ((__VALUE__) == FL_VREFP_OUTPUT_VOLTAGE_2P5V)||\ + ((__VALUE__) == FL_VREFP_OUTPUT_VOLTAGE_3P0V)||\ + ((__VALUE__) == FL_VREFP_OUTPUT_VOLTAGE_4P5V)||\ + ((__VALUE__) == FL_VREFP_OUTPUT_VOLTAGE_1P5V)) + +#define IS_FL_VREFP_ENABLEPERIOD(__VALUE__) (((__VALUE__) == FL_VREFP_ENABLE_PERIOD_1MS)||\ + ((__VALUE__) == FL_VREFP_ENABLE_PERIOD_4MS)||\ + ((__VALUE__) == FL_VREFP_ENABLE_PERIOD_16MS)||\ + ((__VALUE__) == FL_VREFP_ENABLE_PERIOD_32MS)||\ + ((__VALUE__) == FL_VREFP_ENABLE_PERIOD_64MS)||\ + ((__VALUE__) == FL_VREFP_ENABLE_PERIOD_256MS)||\ + ((__VALUE__) == FL_VREFP_ENABLE_PERIOD_1000MS)||\ + ((__VALUE__) == FL_VREFP_ENABLE_PERIOD_4000MS)) + +#define IS_FL_VREFP_DRIVINGTIME(__VALUE__) (((__VALUE__) == FL_VREFP_DRIVING_TIME_4LSCLK)||\ + ((__VALUE__) == FL_VREFP_DRIVING_TIME_8LSCLK)||\ + ((__VALUE__) == FL_VREFP_DRIVING_TIME_16LSCLK)||\ + ((__VALUE__) == FL_VREFP_DRIVING_TIME_32LSCLK)||\ + ((__VALUE__) == FL_VREFP_DRIVING_TIME_64LSCLK)||\ + ((__VALUE__) == FL_VREFP_DRIVING_TIME_128LSCLK)||\ + ((__VALUE__) == FL_VREFP_DRIVING_TIME_256LSCLK)||\ + ((__VALUE__) == FL_VREFP_DRIVING_TIME_512LSCLK)) + +#define IS_FL_VREFP_WORKMODE(__VALUE__) (((__VALUE__) == FL_VREFP_WORK_MODE_CONTINUOUS)||\ + ((__VALUE__) == FL_VREFP_WORK_MODE_PERIODIC)) + +/** + * @} + */ + +/* Exported functions --------------------------------------------------------*/ +/** @addtogroup VREFP_FL_EF_Init + * @{ + */ + +/** + * @brief 关闭VREFP外设总线时钟 + * + * @param VREFPx 外设入口地址 + * + * @retval ErrorStatus枚举值 + * -FL_PASS 配置成功 + * -FL_FAIL 配置过程发生错误 + */ +FL_ErrorStatus FL_VREFP_DeInit(VREFP_Type *VREFPx) +{ + assert_param(IS_VREFP_INSTANCE(VREFPx)); + return FL_PASS; +} +/** + * @brief 根据 VREFP_InitStruct初始化对应外设入口地址的寄存器值. + * + * @note WWTD使能后将无法关闭，直到下一次芯片复位 + * + * @param VREFPx 外设入口地址 + * + * @param VREFP_InitStruct 指向 @ref FL_VREFP_InitTypeDef 结构体的指针 + * + * @retval ErrorStatus枚举值 + * -FL_PASS 配置成功 + * -FL_FAIL 配置过程发生错误 + */ +FL_ErrorStatus FL_VREFP_Init(VREFP_Type *VREFPx, FL_VREFP_InitTypeDef *VREFP_InitStruct) +{ + FL_ErrorStatus status = FL_PASS; + /* 入口参数检查 */ + assert_param(IS_VREFP_INSTANCE(VREFPx)); + assert_param(IS_FL_VREFP_VOLTAGETRIM(VREFP_InitStruct->voltageTrim)); + assert_param(IS_FL_VREFP_OUTPUTVOLTAGE(VREFP_InitStruct->outputVoltage)); + assert_param(IS_FL_VREFP_ENABLEPERIOD(VREFP_InitStruct->timeOfPeriod)); + assert_param(IS_FL_VREFP_DRIVINGTIME(VREFP_InitStruct->timeOfDriving)); + assert_param(IS_FL_VREFP_WORKMODE(VREFP_InitStruct->mode)); + /* 开启总线时钟 */ + FL_CMU_EnableGroup1BusClock(FL_CMU_GROUP1_BUSCLK_PMU); + /* 配置VREFP输出电压TRIM值 */ + FL_VREFP_WriteOutputVoltageTrim(VREFPx, VREFP_InitStruct->voltageTrim); + /* 配置VREFP输出电压 */ + FL_VREFP_SetOutputVoltage(VREFPx, VREFP_InitStruct->outputVoltage); + /* 配置输出模式 */ + FL_VREFP_SetWorkMode(VREFPx, VREFP_InitStruct->mode); + /* 间歇模式下使能周期 */ + FL_VREFP_SetEnablePeriod(VREFPx, VREFP_InitStruct->timeOfPeriod); + /* 间歇模式下单次驱动时间 */ + FL_VREFP_SetDrivingTime(VREFPx, VREFP_InitStruct->timeOfDriving); + /* 启动VREFP */ + FL_VREFP_Enable(VREFPx); + return status; +} +/** + * @brief 设置 VREFP_InitStruct 为默认配置 + * + * @param VREFP_InitStruct 指向需要将值设置为默认配置的结构体 @ref FL_VREFP_InitTypeDef 结构体 + * + * @retval None + */ +void FL_VREFP_StructInit(FL_VREFP_InitTypeDef *VREFP_InitStruct) +{ + VREFP_InitStruct->voltageTrim = FL_VREFP_OUTPUT_VOLTAGE_3P0V_TRIM; + VREFP_InitStruct->outputVoltage = FL_VREFP_OUTPUT_VOLTAGE_3P0V; + VREFP_InitStruct->mode = FL_VREFP_WORK_MODE_CONTINUOUS; + VREFP_InitStruct->timeOfPeriod = FL_VREFP_ENABLE_PERIOD_1MS; + VREFP_InitStruct->timeOfDriving = FL_VREFP_DRIVING_TIME_4LSCLK; +} + +/** + * @} + */ + +#endif /* FL_VREFP_DRIVER_ENABLED */ + +/** + * @} + */ + +/** + * @} + */ + +/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/ + diff --git a/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_wwdt.c b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_wwdt.c new file mode 100644 index 0000000..059e055 --- /dev/null +++ b/code_boot_out/sdk/Drivers/FM33LG0xx_FL_Driver/Src/fm33lg0xx_fl_wwdt.c @@ -0,0 +1,153 @@ + /** + **************************************************************************************************** + * @file fm33lg0xx_fl_wwdt.c + * @author FMSH Application Team + * @brief Src file of WWDT FL Module + **************************************************************************************************** + * @attention + * + * Copyright (c) 2022, SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD.(FUDAN MICROELECTRONICS./ FUDAN MICRO.) + * All rights reserved. + * + * Processor: FM33LG0xxA + * http: http://www.fmdevelopers.com.cn/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * 4. To provide the most up-to-date information, the revision of our documents + * on the World Wide Web will be the most Current. Your printed copy may be + * an earlier revision. To verify you have the latest information avaliable, + * refer to: http://www.fmdevelopers.com.cn/. + * + * THIS SOFTWARE IS PROVIDED BY FUDAN MICRO "AS IS" AND ANY EXPRESSED + * ORIMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED.IN NO EVENT SHALL FUDAN MICRO OR ITS CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISINGIN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OFTHE POSSIBILITY OF SUCH DAMAGE. + */ + +/* Includes ------------------------------------------------------------------*/ +#include "fm33lg0xx_fl.h" + +/** @addtogroup FM33LG0XX_FL_Driver + * @{ + */ + +/** @addtogroup WWDT + * @{ + */ + + +#ifdef FL_WWDT_DRIVER_ENABLED + +/* Private macros ------------------------------------------------------------*/ +/** @addtogroup WWDT_FL_Private_Macros + * @{ + */ +#define IS_WWDT_INSTANCE(INTANCE) ((INTANCE) == WWDT) + +#define IS_FL_WWDT_OVERFLOWPERIOD(__VALUE__) (((__VALUE__) == FL_WWDT_PERIOD_1CNT)||\ + ((__VALUE__) == FL_WWDT_PERIOD_4CNT)||\ + ((__VALUE__) == FL_WWDT_PERIOD_16CNT)||\ + ((__VALUE__) == FL_WWDT_PERIOD_64CNT)||\ + ((__VALUE__) == FL_WWDT_PERIOD_128CNT)||\ + ((__VALUE__) == FL_WWDT_PERIOD_256CNT)||\ + ((__VALUE__) == FL_WWDT_PERIOD_512CNT)||\ + ((__VALUE__) == FL_WWDT_PERIOD_1024CNT)) +/** + * @} + */ + +/* Exported functions --------------------------------------------------------*/ +/** @addtogroup WWDT_FL_EF_Init + * @{ + */ + +/** + * @brief 关闭WWDT外设总线时钟 + * + * @note WWDT开启不能再关闭，直到下一次复位。低功耗休眠模式下 WWDT 停止运行 + * + * @param WWDTx 外设入口地址 + * + * @retval FL_ErrorStatus枚举值 + * -FL_PASS 配置成功 + * -FL_FAIL 配置过程发生错误 + */ +FL_ErrorStatus FL_WWDT_DeInit(WWDT_Type *WWDTx) +{ + assert_param(IS_WWDT_INSTANCE(WWDTx)); + return FL_PASS; +} +/** + * @brief 根据 WWDT_InitStruct初始化对应外设入口地址的寄存器值. + * + * @note WWTD使能后将无法关闭，直到下一次芯片复位 + * + * @param WWDTx 外设入口地址 + * + * @param WWDT_InitStruct 指向 @ref FL_WWDT_InitTypeDef 结构体的指针 + * + * @retval FL_ErrorStatus枚举值 + * -FL_PASS 配置成功 + * -FL_FAIL 配置过程发生错误 + */ +FL_ErrorStatus FL_WWDT_Init(WWDT_Type *WWDTx, FL_WWDT_InitTypeDef *WWDT_InitStruct) +{ + FL_ErrorStatus status = FL_PASS; + /* 入口参数检查 */ + assert_param(IS_WWDT_INSTANCE(WWDTx)); + assert_param(IS_FL_WWDT_OVERFLOWPERIOD(WWDT_InitStruct->overflowPeriod)); + /* 开启总线时钟 */ + FL_CMU_EnableGroup2BusClock(FL_CMU_GROUP2_BUSCLK_WWDT); + /* 配置独立看门狗溢出周期 */ + FL_WWDT_SetPeriod(WWDTx, WWDT_InitStruct->overflowPeriod); + /* 启动看门狗 */ + FL_WWDT_Enable(WWDTx); + return status; +} +/** + * @brief 设置 WWDT_InitStruct 为默认配置 + * + * @param WWDT_InitStruct 指向需要将值设置为默认配置的结构体 @ref FL_WWDT_InitTypeDef 结构体 + * + * @retval None + */ +void FL_WWDT_StructInit(FL_WWDT_InitTypeDef *WWDT_InitStruct) +{ + /* 默认最长溢出周期 */ + WWDT_InitStruct->overflowPeriod = FL_WWDT_PERIOD_1024CNT; +} + +/** + * @} + */ + +#endif /* FL_WWDT_DRIVER_ENABLED */ + +/** + * @} + */ + +/** + * @} + */ + +/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/ diff --git a/code_boot_out/sdk/MF-config/Inc/mf_config.h b/code_boot_out/sdk/MF-config/Inc/mf_config.h new file mode 100644 index 0000000..9dddff3 --- /dev/null +++ b/code_boot_out/sdk/MF-config/Inc/mf_config.h @@ -0,0 +1,79 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file : mf_config.h + * @brief : Header for mf_config.c file. + * This file contains the common defines of the application. + ****************************************************************************** + * @attention + * + * Copyright (c) [2019] [Fudan Microelectronics] + * THIS SOFTWARE is licensed under the Mulan PSL v1. + * can use this software according to the terms and conditions of the Mulan PSL v1. + * You may obtain a copy of Mulan PSL v1 at: + * http://license.coscl.org.cn/MulanPSL + * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR FIT FOR A PARTICULAR + * PURPOSE. + * See the Mulan PSL v1 for more details. + * + ****************************************************************************** + */ +/* USER CODE END Header */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __MF_CONFIG_H +#define __MF_CONFIG_H + +#ifdef __cplusplus +extern "C" { +#endif + +/* Exported functions prototypes ---------------------------------------------*/ +void MF_Clock_Init(void); +void MF_SystemClock_Config(void); +void MF_Config_Init(void); +void Error_Handler(void); + +//BIT MAP====================================================== +#define BIT0 0x00000001 +#define BIT1 0x00000002 +#define BIT2 0x00000004 +#define BIT3 0x00000008 +#define BIT4 0x00000010 +#define BIT5 0x00000020 +#define BIT6 0x00000040 +#define BIT7 0x00000080 +#define BIT8 0x00000100 +#define BIT9 0x00000200 +#define BIT10 0x00000400 +#define BIT11 0x00000800 +#define BIT12 0x00001000 +#define BIT13 0x00002000 +#define BIT14 0x00004000 +#define BIT15 0x00008000 +#define BIT16 0x00010000 +#define BIT17 0x00020000 +#define BIT18 0x00040000 +#define BIT19 0x00080000 +#define BIT20 0x00100000 +#define BIT21 0x00200000 +#define BIT22 0x00400000 +#define BIT23 0x00800000 +#define BIT24 0x01000000 +#define BIT25 0x02000000 +#define BIT26 0x04000000 +#define BIT27 0x08000000 +#define BIT28 0x10000000 +#define BIT29 0x20000000 +#define BIT30 0x40000000 +#define BIT31 0x80000000 + + +#ifdef __cplusplus +} +#endif + +#endif /* __MF_CONFIG_H */ + +/************************ (C) COPYRIGHT FMSH *****END OF FILE****/ diff --git a/code_boot_out/sdk/MF-config/Src/mf_config.c b/code_boot_out/sdk/MF-config/Src/mf_config.c new file mode 100644 index 0000000..ed4e70a --- /dev/null +++ b/code_boot_out/sdk/MF-config/Src/mf_config.c @@ -0,0 +1,88 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file : mf_config.c + * @brief : MCU FUNCTION CONFIG + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2019 FMSH. + * All rights reserved.

+ * + * This software component is licensed by FMSH under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ +/* USER CODE END Header */ + +/* Includes ------------------------------------------------------------------*/ +#include "mf_config.h" +#include "fm33lg0xx_fl.h" + +/* Private function prototypes -----------------------------------------------*/ + +/** + * @brief The application entry point. + * @retval int + */ +void MF_Clock_Init(void) +{ + /* MCU Configuration--------------------------------------------------------*/ + FL_CMU_EnableGroup1BusClock(FL_CMU_GROUP1_BUSCLK_RTCA); + FL_RTCA_WriteAdjustValue (RTCA, 0); + FL_CMU_DisableGroup1BusClock(FL_CMU_GROUP1_BUSCLK_RTCA); + /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ + + /* System interrupt init*/ + + /* Initialize all configured peripherals */ +} + +/** + * @brief System Clock Configuration + * @retval None + */ +void MF_SystemClock_Config(void) +{ + +} + +void MF_Config_Init(void) +{ + +} + + +/** + * @brief This function is executed in case of error occurrence. + * @retval None + */ +void Error_Handler(void) +{ + /* USER CODE BEGIN Error_Handler_Debug */ + /* User can add his own implementation to report the HAL error return state */ + + /* USER CODE END Error_Handler_Debug */ +} + +#if 0 //def USE_FULL_ASSERT +/** + * @brief Reports the name of the source file and the source line number + * where the assert_param error has occurred. + * @param file: pointer to the source file name + * @param line: assert_param error line source number + * @retval None + */ +void assert_failed(uint8_t *file, uint32_t line) +{ + /* USER CODE BEGIN Assert_Failed */ + /* User can add his own implementation to report the file name and line number, + tex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */ + /* USER CODE END Assert_Failed */ +} +#endif /* USE_FULL_ASSERT */ + +/************************ (C) COPYRIGHT FMSH *****END OF FILE****/