20240704

2024-07-04 20:19:46 +08:00 · 2024-07-04 20:19:46 +08:00 · 7f505ddc90
commit 7f505ddc90
parent 6e1014a6b3
154 changed files with 14815 additions and 1548 deletions
--- a/firmware/p417_SWTR.X/mcc-manifest-autosave.yml
+++ b/firmware/p417_SWTR.X/mcc-manifest-autosave.yml
@ -0,0 +1,23 @@
+# This file has been autogenerated by MPLAB Code Configurator. Please do not edit this file.
+
+manifest_file_version: 1.0.0
+project: p417_SWTR
+creation_date: 2024-07-03T22:03:59.102+08:00[Asia/Shanghai]
+operating_system: Windows 10
+mcc_mode: IDE
+mcc_mode_version: v6.20
+device_name: ATSAME51J19A
+compiler: XC32 4.40
+mcc_version: 5.5.1
+mcc_core_version: 5.7.1
+content_manager_version: 5.0.0
+is_mcc_offline: false
+is_using_prerelease_versions: false
+mcc_content_registries: https://registry.npmjs.org/
+device_library: {library_class: com.microchip.mcc.harmony.Harmony3Library, name: Harmony
+    V3, version: 1.5.2}
+packs: {name: SAME51_DFP, version: 3.8.253}
+modules:
+- {name: csp, type: HARMONY, version: v3.18.5}
+- {name: CMSIS_5, type: HARMONY, version: 5.9.0}
+- {name: touch, type: HARMONY, version: v3.16.0}
--- a/firmware/p417_SWTR.X/mcc-manifest-generated-success.yml
+++ b/firmware/p417_SWTR.X/mcc-manifest-generated-success.yml
@ -0,0 +1,23 @@
+# This file has been autogenerated by MPLAB Code Configurator. Please do not edit this file.
+
+manifest_file_version: 1.0.0
+project: p417_SWTR
+creation_date: 2024-07-03T22:03:58.858+08:00[Asia/Shanghai]
+operating_system: Windows 10
+mcc_mode: IDE
+mcc_mode_version: v6.20
+device_name: ATSAME51J19A
+compiler: XC32 4.40
+mcc_version: 5.5.1
+mcc_core_version: 5.7.1
+content_manager_version: 5.0.0
+is_mcc_offline: false
+is_using_prerelease_versions: false
+mcc_content_registries: https://registry.npmjs.org/
+device_library: {library_class: com.microchip.mcc.harmony.Harmony3Library, name: Harmony
+    V3, version: 1.5.2}
+packs: {name: SAME51_DFP, version: 3.8.253}
+modules:
+- {name: csp, type: HARMONY, version: v3.18.5}
+- {name: CMSIS_5, type: HARMONY, version: 5.9.0}
+- {name: touch, type: HARMONY, version: v3.16.0}
--- a/firmware/p417_SWTR.X/nbproject/Makefile-genesis.properties
+++ b/firmware/p417_SWTR.X/nbproject/Makefile-genesis.properties
@ -1,14 +1,13 @@
 #
-#Thu May 11 23:18:16 CST 2023
-mcal.com-microchip-mplab-nbide-toolchain-xc32-XC32LanguageToolchain.md5=e4472a864cace3fb7127149b7c727f38
-mcal.com-microchip-mplab-mdbcore-JLink-JLinkImpl.md5=8332ec366749fd298fb19bb5f792dea3
+#Wed Jul 03 23:11:12 CST 2024
+mcal.com-microchip-mplab-nbide-toolchain-xc32-XC32LanguageToolchain.md5=1eaf555a844840d91945cb14109201c3
 conf.ids=mcal
-mcal.languagetoolchain.version=4.10
-host.id=1f09-swyu-sw
-configurations-xml=b6a2991bf0bcf61ed74bd7af80d0c072
-mcal.Pack.dfplocation=D\:\\MPLABX\\v6.00\\packs\\Microchip\\SAME51_DFP\\3.5.104
-com-microchip-mplab-nbide-embedded-makeproject-MakeProject.md5=6e02ca5e9f5042ffd365b42ab82d3a9b
-user-defined-mime-resolver-xml=none
-proj.dir=G\:\\WorkSpace\\Ongoing\\XY_Modification\\20230508\\P417_SWTR\\firmware\\p417_SWTR.X
-mcal.languagetoolchain.dir=D\:\\Microchip_xc32\\v4.10\\bin
+mcal.languagetoolchain.version=4.40
+host.id=2546-oaqf-3d
+configurations-xml=7fdab7bbeb77e28da32352067380d4c4
+mcal.Pack.dfplocation=C\:\\Program Files\\Microchip\\MPLABX\\v6.20\\packs\\Microchip\\SAME51_DFP\\3.7.242
+com-microchip-mplab-nbide-embedded-makeproject-MakeProject.md5=f612087c95360c842296d189edfe3321
+proj.dir=F\:\\work\\P417\\20240702\\P417_SWTR\\firmware\\p417_SWTR.X
+mcal.platformTool.md5=null
+mcal.languagetoolchain.dir=C\:\\Program Files\\Microchip\\xc32\\v4.40\\bin
 host.platform=windows
--- a/firmware/p417_SWTR.X/nbproject/Makefile-local-mcal.mk
+++ b/firmware/p417_SWTR.X/nbproject/Makefile-local-mcal.mk
@ -36,4 +36,4 @@ MP_LD_DIR="E:\Program Files\Microchip\xc32\v4.10\bin"
 MP_AR_DIR="E:\Program Files\Microchip\xc32\v4.10\bin"
 # MP_BC_DIR is not defined
 CMSIS_DIR=E:/Program Files/Microchip/MPLABX/v6.00/packs/arm/CMSIS/5.4.0
-DFP_DIR=E:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/SAME51_DFP/3.5.104
+DFP_DIR=C:/Users/dm01/.mchp_packs/Microchip/SAME51_DFP/3.7.242
--- a/firmware/p417_SWTR.X/nbproject/Makefile-mcal.mk
+++ b/firmware/p417_SWTR.X/nbproject/Makefile-mcal.mk
--- a/firmware/p417_SWTR.X/nbproject/configurations.xml
+++ b/firmware/p417_SWTR.X/nbproject/configurations.xml
@ -213,6 +213,35 @@
        </logicalFolder>
      </logicalFolder>
    </logicalFolder>
+    <logicalFolder name="ExternalFiles"
+                   displayName="Important Files"
+                   projectFiles="true">
+      <logicalFolder name="f1" displayName="mcal.mhc" projectFiles="true">
+        <itemPath>../src/config/mcal/mcal.mhc/adc0.yml</itemPath>
+        <itemPath>../src/config/mcal/mcal.mhc/adc1.yml</itemPath>
+        <itemPath>../src/config/mcal/mcal.mhc/can1.yml</itemPath>
+        <itemPath>../src/config/mcal/mcal.mhc/cmsis.yml</itemPath>
+        <itemPath>../src/config/mcal/mcal.mhc/core.yml</itemPath>
+        <itemPath>../src/config/mcal/mcal.mhc/dac.yml</itemPath>
+        <itemPath>../src/config/mcal/mcal.mhc/dfp.yml</itemPath>
+        <itemPath>../src/config/mcal/mcal.mhc/evsys.yml</itemPath>
+        <itemPath>../src/config/mcal/mcal.mhc/GraphSettings.yml</itemPath>
+        <itemPath>../src/config/mcal/mcal.mhc/lib_qtouch.yml</itemPath>
+        <itemPath>../src/config/mcal/mcal.mhc/nvmctrl.yml</itemPath>
+        <itemPath>../src/config/mcal/mcal.mhc/project.yml</itemPath>
+        <itemPath>../src/config/mcal/mcal.mhc/ptc.yml</itemPath>
+        <itemPath>../src/config/mcal/mcal.mhc/rtc.yml</itemPath>
+        <itemPath>../src/config/mcal/mcal.mhc/sercom0.yml</itemPath>
+        <itemPath>../src/config/mcal/mcal.mhc/sercom1.yml</itemPath>
+        <itemPath>../src/config/mcal/mcal.mhc/settings.yml</itemPath>
+        <itemPath>../src/config/mcal/mcal.mhc/tc0.yml</itemPath>
+        <itemPath>../src/config/mcal/mcal.mhc/tcc0.yml</itemPath>
+      </logicalFolder>
+      <itemPath>Makefile</itemPath>
+      <itemPath>../src/config/mcal/harmony-manifest-success.yml</itemPath>
+      <itemPath>../src/config/mcal/pin_configurations.csv</itemPath>
+      <itemPath>p417_SWTR.mc3</itemPath>
+    </logicalFolder>
    <logicalFolder name="LinkerScript"
                   displayName="Linker Files"
                   projectFiles="true">
@ -434,34 +463,6 @@
      </logicalFolder>
      <itemPath>../src/main.c</itemPath>
    </logicalFolder>
-    <logicalFolder name="ExternalFiles"
-                   displayName="Important Files"
-                   projectFiles="false">
-      <logicalFolder name="f1" displayName="mcal.mhc" projectFiles="true">
-        <itemPath>../src/config/mcal/mcal.mhc/adc0.yml</itemPath>
-        <itemPath>../src/config/mcal/mcal.mhc/adc1.yml</itemPath>
-        <itemPath>../src/config/mcal/mcal.mhc/can1.yml</itemPath>
-        <itemPath>../src/config/mcal/mcal.mhc/cmsis.yml</itemPath>
-        <itemPath>../src/config/mcal/mcal.mhc/core.yml</itemPath>
-        <itemPath>../src/config/mcal/mcal.mhc/dac.yml</itemPath>
-        <itemPath>../src/config/mcal/mcal.mhc/dfp.yml</itemPath>
-        <itemPath>../src/config/mcal/mcal.mhc/evsys.yml</itemPath>
-        <itemPath>../src/config/mcal/mcal.mhc/GraphSettings.yml</itemPath>
-        <itemPath>../src/config/mcal/mcal.mhc/lib_qtouch.yml</itemPath>
-        <itemPath>../src/config/mcal/mcal.mhc/nvmctrl.yml</itemPath>
-        <itemPath>../src/config/mcal/mcal.mhc/project.yml</itemPath>
-        <itemPath>../src/config/mcal/mcal.mhc/ptc.yml</itemPath>
-        <itemPath>../src/config/mcal/mcal.mhc/rtc.yml</itemPath>
-        <itemPath>../src/config/mcal/mcal.mhc/sercom0.yml</itemPath>
-        <itemPath>../src/config/mcal/mcal.mhc/sercom1.yml</itemPath>
-        <itemPath>../src/config/mcal/mcal.mhc/settings.yml</itemPath>
-        <itemPath>../src/config/mcal/mcal.mhc/tc0.yml</itemPath>
-        <itemPath>../src/config/mcal/mcal.mhc/tcc0.yml</itemPath>
-      </logicalFolder>
-      <itemPath>Makefile</itemPath>
-      <itemPath>../src/config/mcal/harmony-manifest-success.yml</itemPath>
-      <itemPath>../src/config/mcal/pin_configurations.csv</itemPath>
-    </logicalFolder>
  </logicalFolder>
  <sourceRootList>
    <Elem>../src</Elem>
@ -484,7 +485,7 @@
      </toolsSet>
      <packs>
        <pack name="CMSIS" vendor="ARM" version="5.4.0"/>
-        <pack name="SAME51_DFP" vendor="Microchip" version="3.5.104"/>
+        <pack name="SAME51_DFP" vendor="Microchip" version="3.7.242"/>
      </packs>
      <ScriptingSettings>
      </ScriptingSettings>
@ -555,8 +556,8 @@
        <property key="generate-16-bit-code" value="false"/>
        <property key="generate-micro-compressed-code" value="false"/>
        <property key="isolate-each-function" value="true"/>
-        <property key="make-warnings-into-errors" value="true"/>
-        <property key="optimization-level" value=""/>
+        <property key="make-warnings-into-errors" value="false"/>
+        <property key="optimization-level" value="-O1"/>
        <property key="place-data-into-section" value="true"/>
        <property key="post-instruction-scheduling" value="default"/>
        <property key="pre-instruction-scheduling" value="default"/>
--- a/firmware/p417_SWTR.X/nbproject/private/private.xml
+++ b/firmware/p417_SWTR.X/nbproject/private/private.xml
@ -2,8 +2,6 @@
 <project-private xmlns="http://www.netbeans.org/ns/project-private/1">
    <editor-bookmarks xmlns="http://www.netbeans.org/ns/editor-bookmarks/2" lastBookmarkId="0"/>
    <open-files xmlns="http://www.netbeans.org/ns/projectui-open-files/2">
-        <group>
-            <file>file:/F:/FCB_project/P417/CODE/20240523/MCC_TEST/P417_SWTL/firmware/src/DiagnosticL/Sys_Diag_Detect/SysDiagDetect.c</file>
-        </group>
+        <group/>
    </open-files>
 </project-private>
--- a/firmware/p417_SWTR.X/p417_SWTR.mc3
+++ b/firmware/p417_SWTR.X/p417_SWTR.mc3
--- a/firmware/src/DiagnosticR/ProjectCfg.h
+++ b/firmware/src/DiagnosticR/ProjectCfg.h
@ -57,7 +57,7 @@
 #define GAC_ECU_SN_DEFAULT_VALUE	{0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20}
 #define GAC_APP_SW_LOGICAL_ID		{}
 #define GAC_BOOT_ID_DEFAULT_VALUE  {'4','5','0'}
-#define GAC_ECUSW_VERSION_DEFAULT_VALUE  {'S','W','0','3','0','2',' ',' ',' ',0x20,0x20,0x20,0x20,0x20,0x20,0x20}
+#define GAC_ECUSW_VERSION_DEFAULT_VALUE  {'S','W','0','3','0','3',' ',' ',' ',0x20,0x20,0x20,0x20,0x20,0x20,0x20}
 #define GAC_APP_SUPPLIER_ID  {0x46,0x49,0x43,0x4F,0x53,0x41,0x20,0x49,0x4E,0x54,0x45,0x52,0x4e}; 


--- a/firmware/src/DiagnosticR/Sys_Diag_Detect/SysDiagDetect.c
+++ b/firmware/src/DiagnosticR/Sys_Diag_Detect/SysDiagDetect.c
@ -81,9 +81,9 @@ static void Touch_Sensor_Diag_Task(void)
 {
    static uint16_t fault_count = 0, fault_count2 = 0;
    uint16 CurrentDiag_Press_signal;
-    if (Touch_Sensor_Sts00 < 80 && Touch_Sensor_Sts01 < 80 && Touch_Sensor_Sts02 < 80 && Touch_Sensor_Sts03 < 80 && Touch_Sensor_Sts04 < 80 &&
-        Touch_Sensor_Sts05 < 80 && Touch_Sensor_Sts06 < 80 && Touch_Sensor_Sts07 < 80 && Touch_Sensor_Sts08 < 80 && Touch_Sensor_Sts09 < 80 &&
-        Touch_Sensor_Sts10 < 80 && Touch_Sensor_Sts11 < 80 && Touch_Sensor_Sts12 < 80 && Touch_Sensor_Sts13 < 80 && Touch_Sensor_Sts14 < 80)
+    if (Touch_Sensor_delta00 < 200 && Touch_Sensor_delta01 < 200 && Touch_Sensor_delta02 < 200 && Touch_Sensor_delta03 < 200 && Touch_Sensor_delta04 < 200 &&
+        Touch_Sensor_delta05 < 300 && Touch_Sensor_delta06 < 300 && Touch_Sensor_delta07 < 300 && Touch_Sensor_delta08 < 300 && Touch_Sensor_delta09 < 300 &&
+        Touch_Sensor_delta10 < 250 && Touch_Sensor_delta11 < 250 && Touch_Sensor_delta12 < 250 && Touch_Sensor_delta13 < 250 && Touch_Sensor_delta14 < 250)
    {
        Touch_Sensor_Fault = Touch_NoFault;
        InitMessage(SIG_DIAGCFAILRTOUCHPANSWTRTOUCHDFLTSTS, &Touch_Sensor_Fault);
@ -100,13 +100,13 @@ static void Touch_Sensor_Diag_Task(void)
            //touch_init();
        }
    }
-
+/* //抢救策略待定
    CurrentDiag_Press_signal = Get_forcedetect_force_value();
    if (CurrentDiag_Press_signal < 50)
    {
-        if (Touch_Sensor_Sts00 > 10 || Touch_Sensor_Sts01 > 10 || Touch_Sensor_Sts02 > 10 || Touch_Sensor_Sts03 > 10 || Touch_Sensor_Sts04 > 10  
-        || Touch_Sensor_Sts05 > 20 || Touch_Sensor_Sts06 > 20 || Touch_Sensor_Sts07 > 20 || Touch_Sensor_Sts08 > 20 || Touch_Sensor_Sts09 > 20 
-         || Touch_Sensor_Sts10 > 20 || Touch_Sensor_Sts11 > 20 || Touch_Sensor_Sts12 > 20|| Touch_Sensor_Sts13 > 20 || Touch_Sensor_Sts14 > 20)
+        if (Touch_Sensor_delta00 > 10 || Touch_Sensor_delta01 > 10 || Touch_Sensor_delta02 > 10 || Touch_Sensor_delta03 > 10 || Touch_Sensor_delta04 > 10  
+        || Touch_Sensor_delta05 > 20 || Touch_Sensor_delta06 > 20 || Touch_Sensor_delta07 > 20 || Touch_Sensor_delta08 > 20 || Touch_Sensor_delta09 > 20 
+         || Touch_Sensor_delta10 > 20 || Touch_Sensor_delta11 > 20 || Touch_Sensor_delta12 > 20|| Touch_Sensor_delta13 > 20 || Touch_Sensor_delta14 > 20)
        {
            fault_count2++;
            if (fault_count2 > 200)
@ -123,7 +123,7 @@ static void Touch_Sensor_Diag_Task(void)
    else
    {
        fault_count2 = 0;
-    }
+*/
 }

 static uint8 Vibra_Fault = 0;
--- a/firmware/src/DiagnosticR/UDS/UDS_DIDNvm.c
+++ b/firmware/src/DiagnosticR/UDS/UDS_DIDNvm.c
@ -78,8 +78,8 @@ typedef struct{
 * Private variables
 */
 const UI_8 NVM_DID_CD_VIN[DLC_DID_CD_VIN] = GAC_VIN_DEFAULT_VALUE;
-const UI_8 NVM_Reprogramming_Date_App[DLC_DID_REPROGRAMMING_DATE] = {0x20,0x24,0x06,0x24};
-const UI_8 NVM_DID_CD_SUPPLIER_ID[DLC_SYSTEM_SUPPLIER_ID] = {'2','4','0','6','2','4'};
+const UI_8 NVM_Reprogramming_Date_App[DLC_DID_REPROGRAMMING_DATE] = {0x20,0x24,0x07,0x04};
+const UI_8 NVM_DID_CD_SUPPLIER_ID[DLC_SYSTEM_SUPPLIER_ID] = {'2','4','0','7','0','4'};
 const UI_8 NVM_Repair_Shop_Code[DLC_REPAIR_SHOP_CODE] = GAC_ECU_REPAIR_SHOP_CODE;
 const UI_8 NVM_DID_CD_HW_VERSION[DLC_GAC_HW_VERSION] = {'H','W','0','5',0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20};
 static uint8 RAM_DID_CD_VIN[DLC_DID_CD_VIN];
--- a/firmware/src/RTE/RTE.c
+++ b/firmware/src/RTE/RTE.c
@ -78,6 +78,38 @@ uint16_t Touch_Sensor_Sts00;
  uint16_t Touch_Sensor_Sts14;
  uint8_t Allow_Touch_flag = 0;

+uint16_t Touch_Sensor_Ref00;
+uint16_t Touch_Sensor_Ref01;
+uint16_t Touch_Sensor_Ref02;
+uint16_t Touch_Sensor_Ref03;
+uint16_t Touch_Sensor_Ref04;
+uint16_t Touch_Sensor_Ref05;
+uint16_t Touch_Sensor_Ref06;
+uint16_t Touch_Sensor_Ref07;
+uint16_t Touch_Sensor_Ref08;
+uint16_t Touch_Sensor_Ref09;
+uint16_t Touch_Sensor_Ref10;
+uint16_t Touch_Sensor_Ref11;
+uint16_t Touch_Sensor_Ref12;
+uint16_t Touch_Sensor_Ref13;
+uint16_t Touch_Sensor_Ref14;
+
+uint16_t Touch_Sensor_delta00;
+uint16_t Touch_Sensor_delta01;
+uint16_t Touch_Sensor_delta02;
+uint16_t Touch_Sensor_delta03;
+uint16_t Touch_Sensor_delta04;
+uint16_t Touch_Sensor_delta05;
+uint16_t Touch_Sensor_delta06;
+uint16_t Touch_Sensor_delta07;
+uint16_t Touch_Sensor_delta08;
+uint16_t Touch_Sensor_delta09;
+uint16_t Touch_Sensor_delta10;
+uint16_t Touch_Sensor_delta11;
+uint16_t Touch_Sensor_delta12;
+uint16_t Touch_Sensor_delta13;
+uint16_t Touch_Sensor_delta14;
+
 #if 0
 static uint8_t autoCrc_Table[256] =

@ -725,25 +757,25 @@ uint8_t RTE_Get_TouchBoard_XY_Sts(void)//Not active,Touch,Touch and Press,invali
 uint8_t RTE_Get_TouchBoard_XY_Touch_And_Below_1N(void)   // 0 false   1 true
 {
    uint8_t ret_val = 0;
-   uint8_t Two_Finger_Y_data[5] = {};
-uint8_t Two_Finger_X_data [5] = {};
+    uint16_t Two_Finger_Y_data[5] = {};
+    uint16_t Two_Finger_X_data [5] = {};



 uint8_t i,m;


-Two_Finger_Y_data[0]=Touch_Sensor_Sts05;
-Two_Finger_Y_data[1]=Touch_Sensor_Sts06;
-Two_Finger_Y_data[2]=Touch_Sensor_Sts07;
-Two_Finger_Y_data[3]=Touch_Sensor_Sts08;
-Two_Finger_Y_data[4]=Touch_Sensor_Sts09;
+Two_Finger_Y_data[0]=Touch_Sensor_delta05;
+Two_Finger_Y_data[1]=Touch_Sensor_delta06;
+Two_Finger_Y_data[2]=Touch_Sensor_delta07;
+Two_Finger_Y_data[3]=Touch_Sensor_delta08;
+Two_Finger_Y_data[4]=Touch_Sensor_delta09;

-Two_Finger_X_data[0]=Touch_Sensor_Sts10;
-Two_Finger_X_data[1]=Touch_Sensor_Sts11;
-Two_Finger_X_data[2]=Touch_Sensor_Sts12;
-Two_Finger_X_data[3]=Touch_Sensor_Sts13;
-Two_Finger_X_data[4]=Touch_Sensor_Sts14;
+Two_Finger_X_data[0]=Touch_Sensor_delta10;
+Two_Finger_X_data[1]=Touch_Sensor_delta11;
+Two_Finger_X_data[2]=Touch_Sensor_delta12;
+Two_Finger_X_data[3]=Touch_Sensor_delta13;
+Two_Finger_X_data[4]=Touch_Sensor_delta14;



@ -1375,21 +1407,7 @@ InitMessage(SIG_SWTRPRESSSIGNAL, &Over3N_vibra_req);



-  uint16_t Touch_Sensor_Ref00;
-  uint16_t Touch_Sensor_Ref01;
-  uint16_t Touch_Sensor_Ref02;
-  uint16_t Touch_Sensor_Ref03;
-  uint16_t Touch_Sensor_Ref04;
-  uint16_t Touch_Sensor_Ref05;
-  uint16_t Touch_Sensor_Ref06;
-  uint16_t Touch_Sensor_Ref07;
-  uint16_t Touch_Sensor_Ref08;
-  uint16_t Touch_Sensor_Ref09;
-  uint16_t Touch_Sensor_Ref10;
-  uint16_t Touch_Sensor_Ref11;
-  uint16_t Touch_Sensor_Ref12;
-  uint16_t Touch_Sensor_Ref13;
-  uint16_t Touch_Sensor_Ref14;
+  
  
  //uint8_t Touch_Sensor_Sts13;
 #if 1
@ -1397,29 +1415,24 @@ InitMessage(SIG_SWTRPRESSSIGNAL, &Over3N_vibra_req);
  //Touch_Sensor_Sts01 = (uint16_t)g_MENU_Touch_And_Below_1N;
  //Touch_Sensor_Sts02= (uint16_t)g_VOL_Touch_And_Below_1N;
  
-  Touch_Sensor_Sts00 = abs(get_sensor_node_signal(0U)-get_sensor_node_reference(0U));
-  Touch_Sensor_Sts01 = abs(get_sensor_node_signal(1U)-get_sensor_node_reference(1U));
-  Touch_Sensor_Sts02= abs(get_sensor_node_signal(2U)-get_sensor_node_reference(2U));
-  Touch_Sensor_Sts03= abs(get_sensor_node_signal(3U)-get_sensor_node_reference(3U));
-  Touch_Sensor_Sts04= abs(get_sensor_node_signal(4U)-get_sensor_node_reference(4U));
-  Touch_Sensor_Sts05= abs(get_sensor_node_signal(5U)-get_sensor_node_reference(5U));
-  Touch_Sensor_Sts06= abs(get_sensor_node_signal(6U)-get_sensor_node_reference(6U));
-  Touch_Sensor_Sts07= abs(get_sensor_node_signal(7U)-get_sensor_node_reference(7U));
-  Touch_Sensor_Sts08= abs(get_sensor_node_signal(8U)-get_sensor_node_reference(8U));
-  Touch_Sensor_Sts09=abs(get_sensor_node_signal(9U)-get_sensor_node_reference(9U));
-  Touch_Sensor_Sts10= abs(get_sensor_node_signal(10U)-get_sensor_node_reference(10U));
-  Touch_Sensor_Sts11= abs(get_sensor_node_signal(11U)-get_sensor_node_reference(11U));
-  Touch_Sensor_Sts12= abs(get_sensor_node_signal(12U)-get_sensor_node_reference(12U));
-  Touch_Sensor_Sts13= abs(get_sensor_node_signal(13U)-get_sensor_node_reference(13U));
-  Touch_Sensor_Sts14= abs(get_sensor_node_signal(14U)-get_sensor_node_reference(14U));
+  Touch_Sensor_Sts00 = get_sensor_node_signal(0U);
+  Touch_Sensor_Sts01 = get_sensor_node_signal(1U);
+  Touch_Sensor_Sts02 = get_sensor_node_signal(2U);
+  Touch_Sensor_Sts03 = get_sensor_node_signal(3U);
+  Touch_Sensor_Sts04 = get_sensor_node_signal(4U);
+  Touch_Sensor_Sts05 = get_sensor_node_signal(5U);
+  Touch_Sensor_Sts06 = get_sensor_node_signal(6U);
+  Touch_Sensor_Sts07 = get_sensor_node_signal(7U);
+  Touch_Sensor_Sts08 = get_sensor_node_signal(8U);
+  Touch_Sensor_Sts09 = get_sensor_node_signal(9U);
+  Touch_Sensor_Sts10 = get_sensor_node_signal(10U);
+  Touch_Sensor_Sts11 = get_sensor_node_signal(11U);
+  Touch_Sensor_Sts12 = get_sensor_node_signal(12U);
+  Touch_Sensor_Sts13 = get_sensor_node_signal(13U);
+  Touch_Sensor_Sts14 = get_sensor_node_signal(14U);
 #endif
 
-#if 0
-  
-  Touch_Sensor_Sts00 = get_scroller_position(0x00);
-  
-  
-#endif
+    
  
  
  //get_sensor_state
@ -1450,7 +1463,21 @@ InitMessage(SIG_SWTRPRESSSIGNAL, &Over3N_vibra_req);
  Touch_Sensor_Ref13=get_sensor_node_reference(13U);
  Touch_Sensor_Ref14=get_sensor_node_reference(14U);
 #endif
-  
+    Touch_Sensor_delta00 = Touch_Sensor_Sts00>Touch_Sensor_Ref00?Touch_Sensor_Sts00-Touch_Sensor_Ref00:0;
+    Touch_Sensor_delta01 = Touch_Sensor_Sts01>Touch_Sensor_Ref01?Touch_Sensor_Sts01-Touch_Sensor_Ref01:0;
+    Touch_Sensor_delta02 = Touch_Sensor_Sts02>Touch_Sensor_Ref02?Touch_Sensor_Sts02-Touch_Sensor_Ref02:0;
+    Touch_Sensor_delta03 = Touch_Sensor_Sts03>Touch_Sensor_Ref03?Touch_Sensor_Sts03-Touch_Sensor_Ref03:0;
+    Touch_Sensor_delta04 = Touch_Sensor_Sts04>Touch_Sensor_Ref04?Touch_Sensor_Sts04-Touch_Sensor_Ref04:0;
+    Touch_Sensor_delta05 = Touch_Sensor_Sts05>Touch_Sensor_Ref05?Touch_Sensor_Sts05-Touch_Sensor_Ref05:0;
+    Touch_Sensor_delta06 = Touch_Sensor_Sts06>Touch_Sensor_Ref06?Touch_Sensor_Sts06-Touch_Sensor_Ref06:0;
+    Touch_Sensor_delta07 = Touch_Sensor_Sts07>Touch_Sensor_Ref07?Touch_Sensor_Sts07-Touch_Sensor_Ref07:0;
+    Touch_Sensor_delta08 = Touch_Sensor_Sts08>Touch_Sensor_Ref08?Touch_Sensor_Sts08-Touch_Sensor_Ref08:0;
+    Touch_Sensor_delta09 = Touch_Sensor_Sts09>Touch_Sensor_Ref09?Touch_Sensor_Sts09-Touch_Sensor_Ref09:0;
+    Touch_Sensor_delta10 = Touch_Sensor_Sts10>Touch_Sensor_Ref10?Touch_Sensor_Sts10-Touch_Sensor_Ref10:0;
+    Touch_Sensor_delta11 = Touch_Sensor_Sts11>Touch_Sensor_Ref11?Touch_Sensor_Sts11-Touch_Sensor_Ref11:0;
+    Touch_Sensor_delta12 = Touch_Sensor_Sts12>Touch_Sensor_Ref12?Touch_Sensor_Sts12-Touch_Sensor_Ref12:0;
+    Touch_Sensor_delta13 = Touch_Sensor_Sts13>Touch_Sensor_Ref13?Touch_Sensor_Sts13-Touch_Sensor_Ref13:0;
+    Touch_Sensor_delta14 = Touch_Sensor_Sts14>Touch_Sensor_Ref14?Touch_Sensor_Sts14-Touch_Sensor_Ref14:0;
  
  //Touch_Sensor_Sts13=g_XY_Touch_And_Below_1N;
  
--- a/firmware/src/RTE/RTE.h
+++ b/firmware/src/RTE/RTE.h
@ -38,6 +38,39 @@ extern uint16_T Touch_Sensor_Sts11;
 extern uint16_T Touch_Sensor_Sts12;
 extern uint16_T Touch_Sensor_Sts13;
 extern uint16_T Touch_Sensor_Sts14;
+
+extern uint16_T Touch_Sensor_Ref00;
+extern uint16_T Touch_Sensor_Ref01;
+extern uint16_T Touch_Sensor_Ref02;
+extern uint16_T Touch_Sensor_Ref03;
+extern uint16_T Touch_Sensor_Ref04;
+extern uint16_T Touch_Sensor_Ref05;
+extern uint16_T Touch_Sensor_Ref06;
+extern uint16_T Touch_Sensor_Ref07;
+extern uint16_T Touch_Sensor_Ref08;
+extern uint16_T Touch_Sensor_Ref09;
+extern uint16_T Touch_Sensor_Ref10;
+extern uint16_T Touch_Sensor_Ref11;
+extern uint16_T Touch_Sensor_Ref12;
+extern uint16_T Touch_Sensor_Ref13;
+extern uint16_T Touch_Sensor_Ref14;
+
+extern uint16_T Touch_Sensor_delta00;
+extern uint16_T Touch_Sensor_delta01;
+extern uint16_T Touch_Sensor_delta02;
+extern uint16_T Touch_Sensor_delta03;
+extern uint16_T Touch_Sensor_delta04;
+extern uint16_T Touch_Sensor_delta05;
+extern uint16_T Touch_Sensor_delta06;
+extern uint16_T Touch_Sensor_delta07;
+extern uint16_T Touch_Sensor_delta08;
+extern uint16_T Touch_Sensor_delta09;
+extern uint16_T Touch_Sensor_delta10;
+extern uint16_T Touch_Sensor_delta11;
+extern uint16_T Touch_Sensor_delta12;
+extern uint16_T Touch_Sensor_delta13;
+extern uint16_T Touch_Sensor_delta14;
+
 #endif

 //Input Sensor
--- a/firmware/src/TLE9263/TLE926x.c
+++ b/firmware/src/TLE9263/TLE926x.c
@ -173,12 +173,12 @@ SBC_ErrorCode sbc_write_reg_field(sbc_register_t sbc_register, sbc_bit_mask_t bi

 void delay(uint32_t val)
 {
-	uint32_t temp = 0xFFFF;
+	volatile uint32_t temp = 0xFF;

 	while(val--)
 	{
 		while(temp--);
-		temp = 0xFFFF;
+		temp = 0xFF;
 	}
 }

@ -229,7 +229,8 @@ SBC_ErrorCode sbc_init(void) {
    while(initSequence[i][0] != 0x00U || initSequence[i][1] != 0x00U) {
        while((readback&0xff) != initSequence[i][1])
        {
-            errCode = sbc_write_reg((sbc_register_t) initSequence[i][0],(sbc_register_t) initSequence[i][1], &readback);             
+            errCode = sbc_write_reg((sbc_register_t) initSequence[i][0],(sbc_register_t) initSequence[i][1], &readback); 
+            delay(1);            
        }
    
        i++;
--- a/firmware/src/TouchPanel/TouchPanel.c
+++ b/firmware/src/TouchPanel/TouchPanel.c
@ -706,9 +706,9 @@ uint8 Vibra_PressCheck(void)
 	float32 FilterValue;
    uint16 Backup_Force_Value_Pad;
    uint16 Backup_Force_Value_Button;
-    Backup_Force_Value_Pad=Touch_Sensor_Sts05+Touch_Sensor_Sts06+Touch_Sensor_Sts07+Touch_Sensor_Sts08+Touch_Sensor_Sts09+
-                +Touch_Sensor_Sts10+Touch_Sensor_Sts11+Touch_Sensor_Sts12+Touch_Sensor_Sts13+Touch_Sensor_Sts14;
-    Backup_Force_Value_Button=Touch_Sensor_Sts00+Touch_Sensor_Sts01+Touch_Sensor_Sts02+Touch_Sensor_Sts03+Touch_Sensor_Sts04;
+    Backup_Force_Value_Pad=Touch_Sensor_delta05+Touch_Sensor_delta06+Touch_Sensor_delta07+Touch_Sensor_delta08+Touch_Sensor_delta09+
+                +Touch_Sensor_delta10+Touch_Sensor_delta11+Touch_Sensor_delta12+Touch_Sensor_delta13+Touch_Sensor_delta14;
+    Backup_Force_Value_Button=Touch_Sensor_delta00+Touch_Sensor_delta01+Touch_Sensor_delta02+Touch_Sensor_delta03+Touch_Sensor_delta04;
 	//float32 PressNValueTable[3][2] = {
 	//	{1.21f, 1.73f},
 	//	{0.5f, 3.0f},
--- a/firmware/src/config/mcal/ATSAME51J19A.ld
+++ b/firmware/src/config/mcal/ATSAME51J19A.ld
@ -97,6 +97,7 @@ ENTRY(__XC32_RESET_HANDLER_NAME)
 #endif


+
 /*************************************************************************
 * Memory-Region Definitions
 * The MEMORY command describes the location and size of blocks of memory
@ -122,6 +123,9 @@ MEMORY
 * 
 * CODE_REGION defaults to 'rom', if rom is present (non-zero length),
 * and 'ram' otherwise.
+ * N.B. The BFA will still allocate code to any MEMORY named 'rom' regardless
+ * of CODE_REGION's value. If you wish to use rom for something else please
+ * rename the MEMORY entry.
 * DATA_REGION defaults to 'ram', which must be present.
 * VECTOR_REGION defaults to CODE_REGION, unless 'boot_rom' is present.
 */
--- a/firmware/src/config/mcal/definitions.h
+++ b/firmware/src/config/mcal/definitions.h
@ -75,6 +75,12 @@ extern "C" {
 #endif
 // DOM-IGNORE-END

+/* Device Information */
+#define DEVICE_NAME			 "ATSAME51J19A"
+#define DEVICE_ARCH			 "CORTEX-M4"
+#define DEVICE_FAMILY		 "SAME"
+#define DEVICE_SERIES		 "SAME51"
+
 /* CPU clock frequency */
 #define CPU_CLOCK_FREQUENCY 120000000

--- a/firmware/src/config/mcal/exceptions.c
+++ b/firmware/src/config/mcal/exceptions.c
@ -47,6 +47,8 @@
 #include "interrupts.h"
 #include "definitions.h"

+ 
+
 // *****************************************************************************
 // *****************************************************************************
 // Section: Exception Handling Routine
@ -54,8 +56,7 @@
 // *****************************************************************************

 /* Brief default interrupt handlers for core IRQs.*/
-
-void __attribute__((noreturn)) NonMaskableInt_Handler(void)
+void __attribute__((noreturn, weak)) NonMaskableInt_Handler(void)
 {
 #if defined(__DEBUG) || defined(__DEBUG_D) && defined(__XC32)
    __builtin_software_breakpoint();
@ -65,7 +66,7 @@ void __attribute__((noreturn)) NonMaskableInt_Handler(void)
    }
 }

-void __attribute__((noreturn)) HardFault_Handler(void)
+void __attribute__((noreturn, weak)) HardFault_Handler(void)
 {
 #if defined(__DEBUG) || defined(__DEBUG_D) && defined(__XC32)
   __builtin_software_breakpoint();
@ -75,7 +76,7 @@ void __attribute__((noreturn)) HardFault_Handler(void)
   }
 }

-void __attribute__((noreturn)) DebugMonitor_Handler(void)
+void __attribute__((noreturn, weak)) DebugMonitor_Handler(void)
 {
 #if defined(__DEBUG) || defined(__DEBUG_D) && defined(__XC32)
   __builtin_software_breakpoint();
@ -85,7 +86,7 @@ void __attribute__((noreturn)) DebugMonitor_Handler(void)
   }
 }

-void __attribute__((noreturn)) MemoryManagement_Handler(void)
+void __attribute__((noreturn, weak)) MemoryManagement_Handler(void)
 {
 #if defined(__DEBUG) || defined(__DEBUG_D) && defined(__XC32)
   __builtin_software_breakpoint();
@ -95,7 +96,7 @@ void __attribute__((noreturn)) MemoryManagement_Handler(void)
   }
 }

-void __attribute__((noreturn)) BusFault_Handler(void)
+void __attribute__((noreturn, weak)) BusFault_Handler(void)
 {
 #if defined(__DEBUG) || defined(__DEBUG_D) && defined(__XC32)
   __builtin_software_breakpoint();
@ -105,7 +106,7 @@ void __attribute__((noreturn)) BusFault_Handler(void)
   }
 }

-void __attribute__((noreturn)) UsageFault_Handler(void)
+void __attribute__((noreturn, weak)) UsageFault_Handler(void)
 {
 #if defined(__DEBUG) || defined(__DEBUG_D) && defined(__XC32)
   __builtin_software_breakpoint();
@ -114,7 +115,7 @@ void __attribute__((noreturn)) UsageFault_Handler(void)
   {
   }
 }
+ 
 /*******************************************************************************
 End of File
 */
-
--- a/firmware/src/config/mcal/harmony-manifest-success.yml
+++ b/firmware/src/config/mcal/harmony-manifest-success.yml
@ -1,19 +1,23 @@

-# This file has been autogenerated by MPLAB Harmony Configurator. Please do not edit this file.
+# This file has been autogenerated by MPLAB Code Configurator. Please do not edit this file.
 # Project "P417_SWTR" has been created by using mentioned Harmony 3 packages


 project: P417_SWTR
-creation_date: 2024-06-27T16:42:30.665+08:00[Asia/Shanghai]    # ISO 8601 format: https://www.w3.org/TR/NOTE-datetime
+creation_date: 2024-07-03T22:03:58.898+08:00[Asia/Shanghai]    # ISO 8601 format: https://www.w3.org/TR/NOTE-datetime
 operating_system: Windows 10
-mhc_mode: IDE            # [IDE|Standalone|Headless]
-mhc_version: v3.8.5
-mplabx_version: v6.00        # if MPLAB X plugin only
-plugin_version: v3.6.4        # if MPLAB X plugin only
-compiler: XC32 (4.10)
+mcc_mode: IDE            # [IDE|Standalone|Headless]
+mcc_version: v5.5.1
+mcc_core_version: v5.7.1
+mplabx_version: v6.20        # if MPLAB X plugin only
+harmony_version: v1.5.2
+compiler: XC32 4.40

 modules:
-    - {name: "csp", version: "v3.14.0"}
-    - {name: "dev_packs", version: "v3.14.0"}
-    - {name: "touch", version: "v3.12.1"}
+    - {name: "csp", version: "v3.18.5"}
+    - {name: "CMSIS_5", version: "5.9.0"}
+    - {name: "touch", version: "v3.16.0"}
+
+packs:
+    - {name: "SAME51_DFP", version: "3.7.242"}

--- a/firmware/src/config/mcal/initialization.c
+++ b/firmware/src/config/mcal/initialization.c
@ -47,7 +47,6 @@
 #include "device.h"


-
 // ****************************************************************************
 // ****************************************************************************
 // Section: Configuration Bits
@ -77,6 +76,11 @@
 // Section: Driver Initialization Data
 // *****************************************************************************
 // *****************************************************************************
+/* Following MISRA-C rules are deviated in the below code block */
+/* MISRA C-2012 Rule 11.1 */
+/* MISRA C-2012 Rule 11.3 */
+/* MISRA C-2012 Rule 11.8 */
+


 // *****************************************************************************
@ -106,7 +110,7 @@
 // *****************************************************************************
 // *****************************************************************************

-
+/* MISRAC 2012 deviation block end */

 /*******************************************************************************
  Function:
@ -120,6 +124,7 @@

 void SYS_Initialize ( void* data )
 {
+
    /* MISRAC 2012 deviation block start */
    /* MISRA C-2012 Rule 2.2 deviated in this file.  Deviation record ID -  H3_MISRAC_2012_R_2_2_DR_1 */

@ -154,17 +159,24 @@ void SYS_Initialize ( void* data )
    ADC1_Initialize();


+    /* MISRAC 2012 deviation block start */
+    /* Following MISRA-C rules deviated in this block  */
+    /* MISRA C-2012 Rule 11.3 - Deviation record ID - H3_MISRAC_2012_R_11_3_DR_1 */
+    /* MISRA C-2012 Rule 11.8 - Deviation record ID - H3_MISRAC_2012_R_11_8_DR_1 */
+
+    

    
 	touch_init();


+    /* MISRAC 2012 deviation block end */
    NVIC_Initialize();

+
    /* MISRAC 2012 deviation block end */
 }

-
 /*******************************************************************************
 End of File
 */
--- a/firmware/src/config/mcal/interrupts.c
+++ b/firmware/src/config/mcal/interrupts.c
@ -48,12 +48,12 @@
 // Section: Included Files
 // *****************************************************************************
 // *****************************************************************************
-
 #include "device_vectors.h"
 #include "interrupts.h"
 #include "definitions.h"


+
 // *****************************************************************************
 // *****************************************************************************
 // Section: System Interrupt Vector Functions
@ -67,7 +67,7 @@ extern const H3DeviceVectors exception_table;
 extern void Dummy_Handler(void);

 /* Brief default interrupt handler for unused IRQs.*/
-void __attribute__((optimize("-O1"),section(".text.Dummy_Handler"),long_call, noreturn))Dummy_Handler(void)
+void __attribute__((optimize("-O1"), long_call, noreturn, used))Dummy_Handler(void)
 {
 #if defined(__DEBUG) || defined(__DEBUG_D) && defined(__XC32)
    __builtin_software_breakpoint();
@ -196,7 +196,7 @@ extern void SDHC0_Handler              ( void ) __attribute__((weak, alias("Dumm



-__attribute__ ((section(".vectors")))
+__attribute__ ((section(".vectors"), used))
 const H3DeviceVectors exception_table=
 {
    /* Configure Initial Stack Pointer, using linker-generated symbols */
--- a/firmware/src/config/mcal/mcal.mhc/mcc.txt
+++ b/firmware/src/config/mcal/mcal.mhc/mcc.txt
@ -0,0 +1 @@
+MHC project converted to MCC
--- a/firmware/src/config/mcal/peripheral/adc/plib_adc1.c
+++ b/firmware/src/config/mcal/peripheral/adc/plib_adc1.c
@ -61,7 +61,7 @@
 // Section: Global Data
 // *****************************************************************************
 // *****************************************************************************
-static ADC_CALLBACK_OBJ ADC1_CallbackObject;
+volatile static ADC_CALLBACK_OBJ ADC1_CallbackObject;

 #define ADC1_BIASCOMP_POS     (16U)
 #define ADC1_BIASCOMP_Msk     (0x7UL << ADC1_BIASCOMP_POS)
@ -227,7 +227,7 @@ void ADC1_CallbackRegister( ADC_CALLBACK callback, uintptr_t context )
    ADC1_CallbackObject.context = context;
 }

-void ADC1_RESRDY_InterruptHandler( void )
+void __attribute__((used)) ADC1_RESRDY_InterruptHandler( void )
 {
    ADC_STATUS status;
    status = (ADC_STATUS) (ADC1_REGS->ADC_INTFLAG & ADC_INTFLAG_RESRDY_Msk);
@ -235,6 +235,7 @@ void ADC1_RESRDY_InterruptHandler( void )
    ADC1_REGS->ADC_INTFLAG = ADC_INTFLAG_RESRDY_Msk;
    if (ADC1_CallbackObject.callback != NULL)
    {
-        ADC1_CallbackObject.callback(status, ADC1_CallbackObject.context);
+        uintptr_t context = ADC1_CallbackObject.context;
+        ADC1_CallbackObject.callback(status, context);
    }
 }
--- a/firmware/src/config/mcal/peripheral/can/plib_can1.c
+++ b/firmware/src/config/mcal/peripheral/can/plib_can1.c
@ -60,11 +60,11 @@
 // *****************************************************************************
 #define CAN_STD_ID_Msk        0x7FFU

-static CAN_TX_FIFO_CALLBACK_OBJ can1TxFifoCallbackObj;
-static CAN_TX_EVENT_FIFO_CALLBACK_OBJ can1TxEventFifoCallbackObj;
-static CAN_RX_FIFO_CALLBACK_OBJ can1RxFifoCallbackObj[2];
-static CAN_CALLBACK_OBJ can1CallbackObj;
-static CAN_OBJ can1Obj;
+volatile static CAN_TX_FIFO_CALLBACK_OBJ can1TxFifoCallbackObj;
+volatile static CAN_TX_EVENT_FIFO_CALLBACK_OBJ can1TxEventFifoCallbackObj;
+volatile static CAN_RX_FIFO_CALLBACK_OBJ can1RxFifoCallbackObj[2];
+volatile static CAN_CALLBACK_OBJ can1CallbackObj;
+volatile static CAN_OBJ can1Obj;

 static const can_sidfe_registers_t can1StdFilter[] =
 {
@ -76,6 +76,15 @@ static const can_sidfe_registers_t can1StdFilter[] =
    },
 };

+static inline void CAN1_ZeroInitialize(volatile void* pData, size_t dataSize)
+{
+    volatile uint8_t* data = (volatile uint8_t*)pData;
+    for (uint32_t index = 0; index < dataSize; index++)
+    {
+        data[index] = 0U;
+    }
+}
+
 // *****************************************************************************
 // *****************************************************************************
 // CAN1 PLib Interface Routines
@ -141,7 +150,7 @@ void CAN1_Initialize(void)
                                      
                                      | CAN_IE_MRAFE_Msk;

-    (void) memset(&can1Obj.msgRAMConfig, 0x00, sizeof(CAN_MSG_RAM_CONFIG));
+    CAN1_ZeroInitialize(&can1Obj.msgRAMConfig, sizeof(CAN_MSG_RAM_CONFIG));
 }


@ -192,6 +201,8 @@ bool CAN1_MessageTransmitFifo(uint8_t numberOfMessage, CAN_TX_BUFFER *txBuffer)
            }
        }

+        __DSB();
+
        /* Set Transmission request */
        CAN1_REGS->CAN_TXBAR = bufferNumber;

@ -470,9 +481,11 @@ void CAN1_ErrorCountGet(uint8_t *txErrorCount, uint8_t *rxErrorCount)
   Returns:
    None
 */
+/* MISRA C-2012 Rule 11.3 violated 5 times below. Deviation record ID - H3_MISRAC_2012_R_11_3_DR_1*/
 void CAN1_MessageRAMConfigSet(uint8_t *msgRAMConfigBaseAddress)
 {
    uint32_t offset = 0U;
+    uint32_t msgRAMConfigBaseAddr = (uint32_t)msgRAMConfigBaseAddress;

    (void) memset(msgRAMConfigBaseAddress, 0x00, CAN1_MESSAGE_RAM_CONFIG_SIZE);

@ -486,33 +499,33 @@ void CAN1_MessageRAMConfigSet(uint8_t *msgRAMConfigBaseAddress)
    /* Set CCE to unlock the configuration registers */
    CAN1_REGS->CAN_CCCR |= CAN_CCCR_CCE_Msk;

-    can1Obj.msgRAMConfig.rxFIFO0Address = (can_rxf0e_registers_t *)msgRAMConfigBaseAddress;
+    can1Obj.msgRAMConfig.rxFIFO0Address = (can_rxf0e_registers_t *)msgRAMConfigBaseAddr;
    offset = CAN1_RX_FIFO0_SIZE;
    /* Receive FIFO 0 Configuration Register */
    CAN1_REGS->CAN_RXF0C = CAN_RXF0C_F0S(8UL) | CAN_RXF0C_F0WM(0UL) | CAN_RXF0C_F0OM_Msk |
            CAN_RXF0C_F0SA((uint32_t)can1Obj.msgRAMConfig.rxFIFO0Address);

-    can1Obj.msgRAMConfig.rxFIFO1Address = (can_rxf1e_registers_t *)(msgRAMConfigBaseAddress + offset);
+    can1Obj.msgRAMConfig.rxFIFO1Address = (can_rxf1e_registers_t *)(msgRAMConfigBaseAddr + offset);
    offset += CAN1_RX_FIFO1_SIZE;
    /* Receive FIFO 1 Configuration Register */
    CAN1_REGS->CAN_RXF1C = CAN_RXF1C_F1S(8UL) | CAN_RXF1C_F1WM(0UL) | CAN_RXF1C_F1OM_Msk |
            CAN_RXF1C_F1SA((uint32_t)can1Obj.msgRAMConfig.rxFIFO1Address);

-    can1Obj.msgRAMConfig.txBuffersAddress = (can_txbe_registers_t *)(msgRAMConfigBaseAddress + offset);
+    can1Obj.msgRAMConfig.txBuffersAddress = (can_txbe_registers_t *)(msgRAMConfigBaseAddr + offset);
    offset += CAN1_TX_FIFO_BUFFER_SIZE;
    /* Transmit Buffer/FIFO Configuration Register */
    CAN1_REGS->CAN_TXBC = CAN_TXBC_TFQS(16UL) |
            CAN_TXBC_TBSA((uint32_t)can1Obj.msgRAMConfig.txBuffersAddress);

-    can1Obj.msgRAMConfig.txEventFIFOAddress =  (can_txefe_registers_t *)(msgRAMConfigBaseAddress + offset);
+    can1Obj.msgRAMConfig.txEventFIFOAddress =  (can_txefe_registers_t *)(msgRAMConfigBaseAddr + offset);
    offset += CAN1_TX_EVENT_FIFO_SIZE;
    /* Transmit Event FIFO Configuration Register */
    CAN1_REGS->CAN_TXEFC = CAN_TXEFC_EFWM(0UL) | CAN_TXEFC_EFS(16UL) |
            CAN_TXEFC_EFSA((uint32_t)can1Obj.msgRAMConfig.txEventFIFOAddress);

-    can1Obj.msgRAMConfig.stdMsgIDFilterAddress = (can_sidfe_registers_t *)(msgRAMConfigBaseAddress + offset);
-    (void) memcpy(can1Obj.msgRAMConfig.stdMsgIDFilterAddress,
-           (const void *)can1StdFilter,
+    can1Obj.msgRAMConfig.stdMsgIDFilterAddress = (can_sidfe_registers_t *)(msgRAMConfigBaseAddr + offset);
+    (void) memcpy((void*)can1Obj.msgRAMConfig.stdMsgIDFilterAddress,
+           (const void*)can1StdFilter,
           CAN1_STD_MSG_ID_FILTER_SIZE);
    offset += CAN1_STD_MSG_ID_FILTER_SIZE;
    /* Standard ID Filter Configuration Register */
@ -530,6 +543,8 @@ void CAN1_MessageRAMConfigSet(uint8_t *msgRAMConfigBaseAddress)
        /* Wait for configuration complete */
    }
 }
+/* MISRAC 2012 deviation block end for Rule 11.3*/
+

 // *****************************************************************************
 /* Function:
@ -617,6 +632,90 @@ void CAN1_SleepModeExit(void)
    }
 }

+bool CAN1_BitTimingCalculationGet(CAN_BIT_TIMING_SETUP *setup, CAN_BIT_TIMING *bitTiming)
+{
+    bool status = false;
+    uint32_t numOfTimeQuanta;
+    uint8_t tseg1;
+    float temp1;
+    float temp2;
+
+    if ((setup != NULL) && (bitTiming != NULL))
+    {
+        if (setup->nominalBitTimingSet == true)
+        {
+            numOfTimeQuanta = CAN1_CLOCK_FREQUENCY / (setup->nominalBitRate * ((uint32_t)setup->nominalPrescaler + 1U));
+            if ((numOfTimeQuanta >= 4U) && (numOfTimeQuanta <= 385U))
+            {
+                if (setup->nominalSamplePoint < 50.0f)
+                {
+                    setup->nominalSamplePoint = 50.0f;
+                }
+                temp1 = (float)numOfTimeQuanta;
+                temp2 = (temp1 * setup->nominalSamplePoint) / 100.0f;
+                tseg1 = (uint8_t)temp2;
+                bitTiming->nominalBitTiming.nominalTimeSegment2 = (uint8_t)(numOfTimeQuanta - tseg1 - 1U);
+                bitTiming->nominalBitTiming.nominalTimeSegment1 = tseg1 - 2U;
+                bitTiming->nominalBitTiming.nominalSJW = bitTiming->nominalBitTiming.nominalTimeSegment2;
+                bitTiming->nominalBitTiming.nominalPrescaler = setup->nominalPrescaler;
+                bitTiming->nominalBitTimingSet = true;
+                status = true;
+            }
+            else
+            {
+                bitTiming->nominalBitTimingSet = false;
+            }
+        }
+    }
+
+    return status;
+}
+
+bool CAN1_BitTimingSet(CAN_BIT_TIMING *bitTiming)
+{
+    bool status = false;
+    bool nominalBitTimingSet = false;
+
+    if ((bitTiming->nominalBitTimingSet == true)
+    && (bitTiming->nominalBitTiming.nominalTimeSegment1 >= 0x1U)
+    && (bitTiming->nominalBitTiming.nominalTimeSegment2 <= 0x7FU)
+    && (bitTiming->nominalBitTiming.nominalPrescaler <= 0x1FFU)
+    && (bitTiming->nominalBitTiming.nominalSJW <= 0x7FU))
+    {
+        nominalBitTimingSet = true;
+    }
+
+    if (nominalBitTimingSet == true)
+    {
+        /* Start CAN initialization */
+        CAN1_REGS->CAN_CCCR = CAN_CCCR_INIT_Msk;
+        while ((CAN1_REGS->CAN_CCCR & CAN_CCCR_INIT_Msk) != CAN_CCCR_INIT_Msk)
+        {
+            /* Wait for initialization complete */
+        }
+
+        /* Set CCE to unlock the configuration registers */
+        CAN1_REGS->CAN_CCCR |= CAN_CCCR_CCE_Msk;
+
+        if (nominalBitTimingSet == true)
+        {
+            /* Set Nominal Bit timing and Prescaler Register */
+            CAN1_REGS->CAN_NBTP  = CAN_NBTP_NTSEG2(bitTiming->nominalBitTiming.nominalTimeSegment2) | CAN_NBTP_NTSEG1(bitTiming->nominalBitTiming.nominalTimeSegment1) | CAN_NBTP_NBRP(bitTiming->nominalBitTiming.nominalPrescaler) | CAN_NBTP_NSJW(bitTiming->nominalBitTiming.nominalSJW);
+        }
+
+        /* Set the operation mode */
+
+
+        CAN1_REGS->CAN_CCCR &= ~CAN_CCCR_INIT_Msk;
+        while ((CAN1_REGS->CAN_CCCR & CAN_CCCR_INIT_Msk) == CAN_CCCR_INIT_Msk)
+        {
+            /* Wait for initialization complete */
+        }
+        status = true;
+    }
+    return status;
+}
+

 // *****************************************************************************
 /* Function:
@ -767,19 +866,23 @@ void CAN1_CallbackRegister(CAN_CALLBACK callback, uintptr_t contextHandle)
    instance interrupt is enabled. If peripheral instance's interrupt is not
    enabled user need to call it from the main while loop of the application.
 */
-void CAN1_InterruptHandler(void)
+void __attribute__((used)) CAN1_InterruptHandler(void)
 {
    uint8_t numberOfMessage = 0;
    uint8_t numberOfTxEvent = 0;

    uint32_t ir = CAN1_REGS->CAN_IR;

+    /* Additional temporary variable used to prevent MISRA violations (Rule 13.x) */
+    uintptr_t context;
+
    if ((ir & (~(CAN_IR_RF0N_Msk | CAN_IR_RF1N_Msk | CAN_IR_TFE_Msk | CAN_IR_TEFN_Msk))) != 0U)
    {
        CAN1_REGS->CAN_IR = (ir & (~(CAN_IR_RF0N_Msk | CAN_IR_RF1N_Msk | CAN_IR_TFE_Msk | CAN_IR_TEFN_Msk)));
        if (can1CallbackObj.callback != NULL)
        {
-            can1CallbackObj.callback(ir, can1CallbackObj.context);
+            context = can1CallbackObj.context;
+            can1CallbackObj.callback(ir, context);
        }
    }
    /* New Message in Rx FIFO 0 */
@ -791,7 +894,8 @@ void CAN1_InterruptHandler(void)

        if (can1RxFifoCallbackObj[CAN_RX_FIFO_0].callback != NULL)
        {
-            can1RxFifoCallbackObj[CAN_RX_FIFO_0].callback(numberOfMessage, can1RxFifoCallbackObj[CAN_RX_FIFO_0].context);
+            context = can1RxFifoCallbackObj[CAN_RX_FIFO_0].context;
+            can1RxFifoCallbackObj[CAN_RX_FIFO_0].callback(numberOfMessage, context);
        }
    }
    /* New Message in Rx FIFO 1 */
@ -803,7 +907,8 @@ void CAN1_InterruptHandler(void)

        if (can1RxFifoCallbackObj[CAN_RX_FIFO_1].callback != NULL)
        {
-            can1RxFifoCallbackObj[CAN_RX_FIFO_1].callback(numberOfMessage, can1RxFifoCallbackObj[CAN_RX_FIFO_1].context);
+            context = can1RxFifoCallbackObj[CAN_RX_FIFO_1].context;
+            can1RxFifoCallbackObj[CAN_RX_FIFO_1].callback(numberOfMessage, context);
        }
    }

@ -813,7 +918,8 @@ void CAN1_InterruptHandler(void)
        CAN1_REGS->CAN_IR = CAN_IR_TFE_Msk;
        if (can1TxFifoCallbackObj.callback != NULL)
        {
-            can1TxFifoCallbackObj.callback(can1TxFifoCallbackObj.context);
+            context = can1TxFifoCallbackObj.context;
+            can1TxFifoCallbackObj.callback(context);
        }
    }
    /* Tx Event FIFO new entry */
@ -825,7 +931,8 @@ void CAN1_InterruptHandler(void)

        if (can1TxEventFifoCallbackObj.callback != NULL)
        {
-            can1TxEventFifoCallbackObj.callback(numberOfTxEvent, can1TxEventFifoCallbackObj.context);
+            context = can1TxEventFifoCallbackObj.context;
+            can1TxEventFifoCallbackObj.callback(numberOfTxEvent, context);
        }
    }
 }
--- a/firmware/src/config/mcal/peripheral/can/plib_can1.h
+++ b/firmware/src/config/mcal/peripheral/can/plib_can1.h
@ -73,6 +73,8 @@
 // Section: Data Types
 // *****************************************************************************
 // *****************************************************************************
+#define CAN1_CLOCK_FREQUENCY    8000000U
+
 /* CAN1 Message RAM Configuration Size */
 #define CAN1_RX_FIFO0_ELEMENT_SIZE       16U
 #define CAN1_RX_FIFO0_SIZE               128U
@ -105,6 +107,8 @@ bool CAN1_StandardFilterElementSet(uint8_t filterNumber, can_sidfe_registers_t *
 bool CAN1_StandardFilterElementGet(uint8_t filterNumber, can_sidfe_registers_t *stdMsgIDFilterElement);
 void CAN1_SleepModeEnter(void);
 void CAN1_SleepModeExit(void);
+bool CAN1_BitTimingCalculationGet(CAN_BIT_TIMING_SETUP *setup, CAN_BIT_TIMING *bitTiming);
+bool CAN1_BitTimingSet(CAN_BIT_TIMING *bitTiming);
 void CAN1_TxFifoCallbackRegister(CAN_TX_FIFO_CALLBACK callback, uintptr_t contextHandle);
 void CAN1_TxEventFifoCallbackRegister(CAN_TX_EVENT_FIFO_CALLBACK callback, uintptr_t contextHandle);
 void CAN1_RxFifoCallbackRegister(CAN_RX_FIFO_NUM rxFifoNum, CAN_RX_FIFO_CALLBACK callback, uintptr_t contextHandle);
--- a/firmware/src/config/mcal/peripheral/can/plib_can_common.h
+++ b/firmware/src/config/mcal/peripheral/can/plib_can_common.h
@ -409,6 +409,84 @@ typedef struct

 } CAN_TX_EVENT_FIFO;

+// *****************************************************************************
+/* CAN Nominal Bit Timing Parameters
+
+   Summary:
+    CAN Nominal Bit Timing Parameter structure.
+
+   Description:
+    This data structure defines Nominal Bit Timing Parameters.
+
+   Remarks:
+    None.
+*/
+typedef struct
+{
+    /* Nominal Time segment after sample point */
+    uint8_t nominalTimeSegment2;
+
+    /* Nominal Time segment before sample point */
+    uint8_t nominalTimeSegment1;
+
+    /* Nominal Baud Rate Prescaler */
+    uint16_t nominalPrescaler;
+
+    /* Nominal Syncronization Jump Width */
+    uint8_t nominalSJW;
+
+} CAN_NOMINAL_BIT_TIMING;
+
+// *****************************************************************************
+/* CAN Bit Timing Parameters
+
+   Summary:
+    CAN Bit Timing Parameter structure.
+
+   Description:
+    This data structure defines Bit Timing Parameters.
+
+   Remarks:
+    None.
+*/
+typedef struct
+{
+    /* Nominal bit timing set flag */
+    bool nominalBitTimingSet;
+
+    /* Nominal bit timing parameters */
+    CAN_NOMINAL_BIT_TIMING nominalBitTiming;
+
+} CAN_BIT_TIMING;
+
+// *****************************************************************************
+/* CAN Bit Timing Setup
+
+   Summary:
+    CAN Bit Timing Setup structure.
+
+   Description:
+    This data structure defines Bit Timing Setup parameters.
+
+   Remarks:
+    None.
+*/
+typedef struct
+{
+    /* Nominal bit timing set flag */
+    bool nominalBitTimingSet;
+
+    /* Nominal bit rate */
+    uint32_t nominalBitRate;
+
+    /* Nominal Sample Point */
+    float nominalSamplePoint;
+
+    /* Nominal Baud Rate Prescaler */
+    uint16_t nominalPrescaler;
+
+} CAN_BIT_TIMING_SETUP;
+
 // *****************************************************************************
 /* CAN Tx FIFO Callback Object

--- a/firmware/src/config/mcal/peripheral/dac/plib_dac.c
+++ b/firmware/src/config/mcal/peripheral/dac/plib_dac.c
@ -46,6 +46,14 @@
 #include "smartee.h"

 						 
+
+
+
+
+
+
+
+
 /* (DAC DATA) Mask DATA[15:12] Bit */
 #define DAC_DATA_MSB_MASK                    (0x0FFFU)

--- a/firmware/src/config/mcal/peripheral/nvic/plib_nvic.c
+++ b/firmware/src/config/mcal/peripheral/nvic/plib_nvic.c
@ -100,6 +100,9 @@ void NVIC_Initialize( void )
    /* Enable Bus fault */
    SCB->SHCSR |= (SCB_SHCSR_BUSFAULTENA_Msk);

+    /* Enable memory management fault */
+    SCB->SHCSR |= (SCB_SHCSR_MEMFAULTENA_Msk);
+
 }

 void NVIC_INT_Enable( void )
--- a/firmware/src/config/mcal/peripheral/nvmctrl/plib_nvmctrl.c
+++ b/firmware/src/config/mcal/peripheral/nvmctrl/plib_nvmctrl.c
@ -51,7 +51,7 @@
 #include "plib_nvmctrl.h"
 #include "interrupts.h"

-static volatile uint16_t nvm_error;
+volatile static uint16_t nvm_error;

 // *****************************************************************************
 // *****************************************************************************
@ -80,7 +80,7 @@ void NVMCTRL_SetWriteMode(NVMCTRL_WRITEMODE mode)

 bool NVMCTRL_QuadWordWrite(const uint32_t *data, const uint32_t address)
 {
-    uint8_t i = 0U;
+    uint8_t i;
    bool wr_status = false;
    uint32_t * paddress = (uint32_t *)address;
    uint16_t wr_mode = (NVMCTRL_REGS->NVMCTRL_CTRLA & NVMCTRL_CTRLA_WMODE_Msk);
@ -113,7 +113,7 @@ bool NVMCTRL_QuadWordWrite(const uint32_t *data, const uint32_t address)

 bool NVMCTRL_DoubleWordWrite(const uint32_t *data, const uint32_t address)
 {
-    uint8_t i = 0U;
+    uint8_t i;
    bool wr_status = false;
    uint32_t * paddress = (uint32_t *)address;
    uint16_t wr_mode = (NVMCTRL_REGS->NVMCTRL_CTRLA & NVMCTRL_CTRLA_WMODE_Msk);
@ -150,7 +150,7 @@ bool NVMCTRL_DoubleWordWrite(const uint32_t *data, const uint32_t address)
 */
 bool NVMCTRL_PageBufferWrite( const uint32_t *data, const uint32_t address)
 {
-    uint32_t i = 0U;
+    uint32_t i;
    uint32_t * paddress = (uint32_t *)address;

    /* Clear global error flag */
@ -190,7 +190,7 @@ bool NVMCTRL_PageBufferCommit(  const uint32_t address )
 */
 bool NVMCTRL_PageWrite( const uint32_t *data, const uint32_t address )
 {
-    uint32_t i = 0U;
+    uint32_t i;
    uint32_t * paddress = (uint32_t *)address;

    /* Clear global error flag */
@ -227,8 +227,8 @@ bool NVMCTRL_BlockErase( uint32_t address )

 bool NVMCTRL_USER_ROW_PageWrite( uint32_t *data, const uint32_t address )
 {
-    uint32_t i = 0U;
-    uint32_t wr_count = 0U;
+    uint32_t i;
+    uint32_t wr_count;
    uint32_t * paddress = (uint32_t *)address;
    uint32_t * pdata = data;
    bool rowwrite = false;
--- a/firmware/src/config/mcal/peripheral/rtc/plib_rtc_timer.c
+++ b/firmware/src/config/mcal/peripheral/rtc/plib_rtc_timer.c
@ -44,9 +44,8 @@
 #include "interrupts.h"
 #include "plib_rtc.h"
 #include <stdlib.h>
-#include <limits.h>

-static RTC_OBJECT rtcObj;
+volatile static RTC_OBJECT rtcObj;


 void RTC_Initialize(void)
@ -215,7 +214,7 @@ void RTC_Timer32CallbackRegister ( RTC_TIMER32_CALLBACK callback, uintptr_t cont
    rtcObj.context            = context;
 }

-void RTC_InterruptHandler( void )
+void __attribute__((used)) RTC_InterruptHandler( void )
 {
    rtcObj.timer32intCause = (RTC_TIMER32_INT_MASK) RTC_REGS->MODE0.RTC_INTFLAG;
    RTC_REGS->MODE0.RTC_INTFLAG = (uint16_t)RTC_MODE0_INTFLAG_Msk;
@ -224,6 +223,8 @@ void RTC_InterruptHandler( void )
    /* Invoke registered Callback function */
    if(rtcObj.timer32BitCallback != NULL)
    {
-        rtcObj.timer32BitCallback( rtcObj.timer32intCause, rtcObj.context );
+        RTC_TIMER32_INT_MASK timer32intCause = rtcObj.timer32intCause;
+        uintptr_t context = rtcObj.context;
+        rtcObj.timer32BitCallback( timer32intCause, context );
    }
 }
--- a/firmware/src/config/mcal/peripheral/sercom/i2c_master/plib_sercom1_i2c_master.c
+++ b/firmware/src/config/mcal/peripheral/sercom/i2c_master/plib_sercom1_i2c_master.c
@ -65,7 +65,7 @@
 #define SERCOM1_I2CM_BAUD_VALUE         (0x22U)


-static SERCOM_I2C_OBJ sercom1I2CObj;
+volatile static SERCOM_I2C_OBJ sercom1I2CObj;

 // *****************************************************************************
 // *****************************************************************************
--- a/firmware/src/config/mcal/peripheral/systick/plib_systick.c
+++ b/firmware/src/config/mcal/peripheral/systick/plib_systick.c
@ -42,8 +42,7 @@
 #include "interrupts.h"
 #include "plib_systick.h"

-static SYSTICK_OBJECT systick;
-uint8_t systick_1_5_s_flag = SYSTICK_1_5_S_UNINITIALIZE;
+volatile static SYSTICK_OBJECT systick;

 void SYSTICK_TimerInitialize ( void )
 {
@ -189,24 +188,17 @@ void SYSTICK_TimerCallbackSet ( SYSTICK_CALLBACK callback, uintptr_t context )
   systick.context = context;
 }

-uint8_t SYSTICK_Get1_5_S_Flag(void)
+void __attribute__((used)) SysTick_Handler(void)
 { 
-	return systick_1_5_s_flag; 
-}
+   /* Additional temporary variable used to prevent MISRA violations (Rule 13.x) */
+   uintptr_t context = systick.context;

-void SysTick_Handler(void)
-{
   /* Reading control register clears the count flag */
-   uint32_t sysCtrl = SysTick->CTRL;
+   (void)SysTick->CTRL;
+
   systick.tickCounter++;
-   
-   if(systick.tickCounter > SYSTICK_1_5_S_TIMEOUT){
-       systick_1_5_s_flag = SYSTICK_1_5_S_INITIALIZE;
-   }
-   
   if(systick.callback != NULL)
   {
-       systick.callback(systick.context);
+       systick.callback(context);
   }
-   (void)sysCtrl;
 }
--- a/firmware/src/config/mcal/peripheral/systick/plib_systick.h
+++ b/firmware/src/config/mcal/peripheral/systick/plib_systick.h
@ -59,10 +59,6 @@

 #define SYSTICK_INTERRUPT_PERIOD_IN_US  (1000U)
        
-#define SYSTICK_1_5_S_UNINITIALIZE      (0)
-#define SYSTICK_1_5_S_INITIALIZE        (1)
-#define SYSTICK_1_5_S_TIMEOUT           (1500)
-
 typedef void (*SYSTICK_CALLBACK)(uintptr_t context);


@ -78,7 +74,6 @@ typedef struct
   uintptr_t                 context;
   volatile uint32_t         tickCounter;
 } SYSTICK_OBJECT ;
-
 /***************************** SYSTICK API *******************************/
 void SYSTICK_TimerInitialize ( void );
 void SYSTICK_TimerRestart ( void );
@ -96,8 +91,6 @@ uint32_t SYSTICK_GetTickCounter(void);
 void SYSTICK_StartTimeOut (SYSTICK_TIMEOUT* timeout, uint32_t delay_ms);
 void SYSTICK_ResetTimeOut (SYSTICK_TIMEOUT* timeout);
 bool SYSTICK_IsTimeoutReached (SYSTICK_TIMEOUT* timeout);
-uint8_t SYSTICK_Get1_5_S_Flag(void);
-
 #ifdef __cplusplus // Provide C++ Compatibility
 }
 #endif
--- a/firmware/src/config/mcal/peripheral/tc/plib_tc0.c
+++ b/firmware/src/config/mcal/peripheral/tc/plib_tc0.c
@ -62,7 +62,7 @@
 // *****************************************************************************
 // *****************************************************************************

-static TC_TIMER_CALLBACK_OBJ TC0_CallbackObject;
+volatile static TC_TIMER_CALLBACK_OBJ TC0_CallbackObject;

 // *****************************************************************************
 // *****************************************************************************
@ -207,7 +207,8 @@ void TC0_TimerInterruptHandler( void )
        TC0_REGS->COUNT16.TC_INTFLAG = (uint8_t)TC_INTFLAG_Msk;
        if((status != TC_TIMER_STATUS_NONE) && (TC0_CallbackObject.callback != NULL))
        {
-            TC0_CallbackObject.callback(status, TC0_CallbackObject.context);
+            uintptr_t context = TC0_CallbackObject.context;
+            TC0_CallbackObject.callback(status, context);
        }
    }
 }
--- a/firmware/src/config/mcal/peripheral/tcc/plib_tcc0.c
+++ b/firmware/src/config/mcal/peripheral/tcc/plib_tcc0.c
@ -56,7 +56,7 @@


 /* Object to hold callback function and context */
-static TCC_CALLBACK_OBJECT TCC0_CallbackObj;
+volatile static TCC_CALLBACK_OBJECT TCC0_CallbackObj;

 /* Initialize TCC module */
 void TCC0_PWMInitialize(void)
@ -68,13 +68,15 @@ void TCC0_PWMInitialize(void)
        /* Wait for sync */
    }
    /* Clock prescaler */
-    TCC0_REGS->TCC_CTRLA = TCC_CTRLA_PRESCALER_DIV8 ;
+    TCC0_REGS->TCC_CTRLA = TCC_CTRLA_PRESCALER_DIV8 
+                            | TCC_CTRLA_PRESCSYNC_PRESC ;
    TCC0_REGS->TCC_WEXCTRL = TCC_WEXCTRL_OTMX(2UL);
    /* Dead time configurations */
    TCC0_REGS->TCC_WEXCTRL |= TCC_WEXCTRL_DTIEN1_Msk | TCC_WEXCTRL_DTIEN2_Msk | TCC_WEXCTRL_DTIEN3_Msk
 	 	 | TCC_WEXCTRL_DTLS(64UL) | TCC_WEXCTRL_DTHS(64UL);

-    TCC0_REGS->TCC_WAVE = TCC_WAVE_WAVEGEN_NPWM;
+    TCC0_REGS->TCC_WAVE = TCC_WAVE_WAVEGEN_NPWM | TCC_WAVE_RAMP_RAMP1;
+

    /* Configure duty cycle values */
    TCC0_REGS->TCC_CC[0] = 0U;
@ -158,10 +160,31 @@ bool TCC0_PWMPatternSet(uint8_t pattern_enable, uint8_t pattern_output)
 }


-/* Set the counter*/
-void TCC0_PWM24bitCounterSet (uint32_t count)
+
+/* Get the current counter value */
+uint32_t TCC0_PWM24bitCounterGet( void )
 {
-    TCC0_REGS->TCC_COUNT = count & 0xFFFFFFU;
+    /* Write command to force COUNT register read synchronization */
+    TCC0_REGS->TCC_CTRLBSET |= (uint8_t)TCC_CTRLBSET_CMD_READSYNC;
+
+    while((TCC0_REGS->TCC_SYNCBUSY & TCC_SYNCBUSY_CTRLB_Msk) == TCC_SYNCBUSY_CTRLB_Msk)
+    {
+        /* Wait for Write Synchronization */
+    }
+
+    while((TCC0_REGS->TCC_CTRLBSET & TCC_CTRLBSET_CMD_Msk) != 0U)
+    {
+        /* Wait for CMD to become zero */
+    }
+
+    /* Read current count value */
+    return TCC0_REGS->TCC_COUNT;
+}
+
+/* Set the counter*/
+void TCC0_PWM24bitCounterSet (uint32_t countVal)
+{
+    TCC0_REGS->TCC_COUNT = countVal & 0xFFFFFFU;
    while ((TCC0_REGS->TCC_SYNCBUSY & TCC_SYNCBUSY_COUNT_Msk) != 0U)
    {
        /* Wait for sync */
@ -201,13 +224,16 @@ void TCC0_PWMCallbackRegister(TCC_CALLBACK callback, uintptr_t context)
 void TCC0_OTHER_InterruptHandler(void)
 {
    uint32_t status;
+    /* Additional local variable to prevent MISRA C violations (Rule 13.x) */
+    uintptr_t context;
+    context = TCC0_CallbackObj.context;            
    status = (TCC0_REGS->TCC_INTFLAG & 0xFFFFU);
    /* Clear interrupt flags */
    TCC0_REGS->TCC_INTFLAG = 0xFFFFU;
    (void)TCC0_REGS->TCC_INTFLAG;
    if (TCC0_CallbackObj.callback_fn != NULL)
    {
-        TCC0_CallbackObj.callback_fn(status, TCC0_CallbackObj.context);
+        TCC0_CallbackObj.callback_fn(status, context);
    }

 }
@ -216,13 +242,16 @@ void TCC0_OTHER_InterruptHandler(void)
 void TCC0_MC0_InterruptHandler(void)
 {
    uint32_t status;
+    /* Additional local variable to prevent MISRA C violations (Rule 13.x) */
+    uintptr_t context;
+    context = TCC0_CallbackObj.context;                
    status = TCC_INTFLAG_MC0_Msk;
    /* Clear interrupt flags */
    TCC0_REGS->TCC_INTFLAG = TCC_INTFLAG_MC0_Msk;
    (void)TCC0_REGS->TCC_INTFLAG;
    if (TCC0_CallbackObj.callback_fn != NULL)
    {
-        TCC0_CallbackObj.callback_fn(status, TCC0_CallbackObj.context);
+        TCC0_CallbackObj.callback_fn(status, context);
    }

 }
--- a/firmware/src/config/mcal/peripheral/tcc/plib_tcc0.h
+++ b/firmware/src/config/mcal/peripheral/tcc/plib_tcc0.h
@ -147,7 +147,9 @@ bool TCC0_PWM24bitPeriodSet(uint32_t period);

 uint32_t TCC0_PWM24bitPeriodGet(void);

-void TCC0_PWM24bitCounterSet(uint32_t count);
+void TCC0_PWM24bitCounterSet(uint32_t countVal);
+
+uint32_t TCC0_PWM24bitCounterGet(void);

 __STATIC_INLINE bool TCC0_PWM24bitDutySet(TCC0_CHANNEL_NUM channel, uint32_t duty)
 {
--- a/firmware/src/config/mcal/peripheral/wdt/plib_wdt.c
+++ b/firmware/src/config/mcal/peripheral/wdt/plib_wdt.c
@ -49,7 +49,7 @@
 #include "interrupts.h"
 #include "plib_wdt.h"

-static WDT_CALLBACK_OBJECT wdtCallbackObj;
+volatile static WDT_CALLBACK_OBJECT wdtCallbackObj;

 // *****************************************************************************
 // *****************************************************************************
@ -210,6 +210,7 @@ void WDT_InterruptHandler( void )

    if( wdtCallbackObj.callback != NULL )
    {
-        wdtCallbackObj.callback(wdtCallbackObj.context);
+        uintptr_t context = wdtCallbackObj.context;
+        wdtCallbackObj.callback(context);
    }
 }
--- a/firmware/src/config/mcal/pin_configurations.csv
+++ b/firmware/src/config/mcal/pin_configurations.csv
@ -1,4 +1,4 @@
-"Pin Number","Pin ID","Custom Name","Function","Mode", "Direction","Latch","Pull Up","Pull Down","Drive Strength"
+Pin Number,Pin ID,Custom Name,Function,Mode, Direction,Latch,Pull Up,Pull Down,Drive Strength
 1,PA00,SDA,SERCOM1_PAD0,Digital,High Impedance,n/a,No,No,NORMAL
 2,PA01,SCL,SERCOM1_PAD1,Digital,High Impedance,n/a,No,No,NORMAL
 3,PA02,INP,DAC_VOUT0,Analog,Out,Low,,,NORMAL
--- a/firmware/src/config/mcal/startup_xc32.c
+++ b/firmware/src/config/mcal/startup_xc32.c
@ -65,13 +65,16 @@ extern void __attribute__((weak,long_call, alias("Dummy_App_Func"))) __xc32_on_b

 /* Linker defined variables */
 extern uint32_t __svectors;
+#if defined (__REINIT_STACK_POINTER)
+extern uint32_t _stack;
+#endif

 /* MISRAC 2012 deviation block end */


 extern int main(void);

-__STATIC_INLINE void CMCC_Configure(void)
+__STATIC_INLINE void __attribute__((optimize("-O1"))) CMCC_Configure(void)
 {
    CMCC_REGS->CMCC_CTRL &= ~(CMCC_CTRL_CEN_Msk);
    while((CMCC_REGS->CMCC_SR & CMCC_SR_CSTS_Msk) == CMCC_SR_CSTS_Msk)
@ -86,7 +89,7 @@ __STATIC_INLINE void CMCC_Configure(void)
 #if (__ARM_FP==14) || (__ARM_FP==4)

 /* Enable FPU */
-__STATIC_INLINE void FPU_Enable(void)
+__STATIC_INLINE void __attribute__((optimize("-O1"))) FPU_Enable(void)
 {
    uint32_t primask = __get_PRIMASK();
    __disable_irq();
@ -122,7 +125,7 @@ void __attribute__((optimize("-O1"), section(".text.Reset_Handler"), long_call,

 #if defined (__REINIT_STACK_POINTER)
    /* Initialize SP from linker-defined _stack symbol. */
-    __asm__ volatile ("ldr sp, =_stack" : : : "sp");
+    __set_MSP((uint32_t)&_stack);

 #ifdef SCB_VTOR_TBLOFF_Msk
    /* Buy stack for locals */
--- a/firmware/src/config/mcal/toolchain_specifics.h
+++ b/firmware/src/config/mcal/toolchain_specifics.h
@ -46,7 +46,7 @@ extern "C" {
 #define CACHE_LINE_SIZE    (16u)
 #define CACHE_ALIGN        __ALIGNED(CACHE_LINE_SIZE)

-#define CACHE_ALIGNED_SIZE_GET(size)     (size + ((size % CACHE_LINE_SIZE)? (CACHE_LINE_SIZE - (size % CACHE_LINE_SIZE)) : 0))
+#define CACHE_ALIGNED_SIZE_GET(size)     ((size) + ((((size) % (CACHE_LINE_SIZE))!= 0U)? ((CACHE_LINE_SIZE) - ((size) % (CACHE_LINE_SIZE))) : (0U)))
 	
 #ifndef FORMAT_ATTRIBUTE
   #define FORMAT_ATTRIBUTE(archetype, string_index, first_to_check)  __attribute__ ((format (archetype, string_index, first_to_check)))
--- a/firmware/src/config/mcal/touch/lib/qtm_acq_same51_0x000f.X.a
+++ b/firmware/src/config/mcal/touch/lib/qtm_acq_same51_0x000f.X.a
--- a/firmware/src/config/mcal/touch/qtm_acq_same51_0x000f_api.h
+++ b/firmware/src/config/mcal/touch/qtm_acq_same51_0x000f_api.h
@ -17,27 +17,27 @@
 *******************************************************************************/

 /*******************************************************************************
-Copyright (c) Microchip Technology Inc.  All rights reserved.
+Copyright (C) [2023], Microchip Technology Inc., and its subsidiaries. All rights reserved.

-Microchip licenses to you the right to use, modify, copy and distribute
-Software only when embedded on a Microchip microcontroller or digital signal
-controller that is integrated into your product or third party product
-(pursuant to the sublicense terms in the accompanying license agreement).
+The software and documentation is provided by microchip and its contributors
+"as is" and any express, implied or statutory warranties, including, but not
+limited to, the implied warranties of merchantability, fitness for a particular
+purpose and non-infringement of third party intellectual property rights are
+disclaimed to the fullest extent permitted by law. In no event shall microchip
+or its contributors be liable for any direct, indirect, incidental, special,
+exemplary, or consequential damages (including, but not limited to, procurement
+of substitute goods or services; loss of use, data, or profits; or business
+interruption) however caused and on any theory of liability, whether in contract,
+strict liability, or tort (including negligence or otherwise) arising in any way
+out of the use of the software and documentation, even if advised of the
+possibility of such damage.

-You should refer to the license agreement accompanying this Software for
-additional information regarding your rights and obligations.
-
-SOFTWARE AND DOCUMENTATION ARE PROVIDED AS IS  WITHOUT  WARRANTY  OF  ANY  KIND,
-EITHER EXPRESS  OR  IMPLIED,  INCLUDING  WITHOUT  LIMITATION,  ANY  WARRANTY  OF
-MERCHANTABILITY, TITLE, NON-INFRINGEMENT AND FITNESS FOR A  PARTICULAR  PURPOSE.
-IN NO EVENT SHALL MICROCHIP OR  ITS  LICENSORS  BE  LIABLE  OR  OBLIGATED  UNDER
-CONTRACT, NEGLIGENCE, STRICT LIABILITY, CONTRIBUTION,  BREACH  OF  WARRANTY,  OR
-OTHER LEGAL  EQUITABLE  THEORY  ANY  DIRECT  OR  INDIRECT  DAMAGES  OR  EXPENSES
-INCLUDING BUT NOT LIMITED TO ANY  INCIDENTAL,  SPECIAL,  INDIRECT,  PUNITIVE  OR
-CONSEQUENTIAL DAMAGES, LOST  PROFITS  OR  LOST  DATA,  COST  OF  PROCUREMENT  OF
-SUBSTITUTE  GOODS,  TECHNOLOGY,  SERVICES,  OR  ANY  CLAIMS  BY  THIRD   PARTIES
-(INCLUDING BUT NOT LIMITED TO ANY DEFENSE  THEREOF),  OR  OTHER  SIMILAR  COSTS.
-*******************************************************************************/
+Except as expressly permitted hereunder and subject to the applicable license terms
+for any third-party software incorporated in the software and any applicable open
+source software license terms, no license or other rights, whether express or
+implied, are granted under any patent or other intellectual property rights of
+Microchip or any third party.
+************************************************************************************/

 /*============================================================================
 Filename : qtm_acq_same51_0x000f_api.h
--- a/firmware/src/config/mcal/touch/qtm_acq_same54_0x000f_api.h
+++ b/firmware/src/config/mcal/touch/qtm_acq_same54_0x000f_api.h
@ -17,27 +17,27 @@
 *******************************************************************************/

 /*******************************************************************************
-Copyright (c) Microchip Technology Inc.  All rights reserved.
+Copyright (C) [2023], Microchip Technology Inc., and its subsidiaries. All rights reserved.

-Microchip licenses to you the right to use, modify, copy and distribute
-Software only when embedded on a Microchip microcontroller or digital signal
-controller that is integrated into your product or third party product
-(pursuant to the sublicense terms in the accompanying license agreement).
+The software and documentation is provided by microchip and its contributors
+"as is" and any express, implied or statutory warranties, including, but not
+limited to, the implied warranties of merchantability, fitness for a particular
+purpose and non-infringement of third party intellectual property rights are
+disclaimed to the fullest extent permitted by law. In no event shall microchip
+or its contributors be liable for any direct, indirect, incidental, special,
+exemplary, or consequential damages (including, but not limited to, procurement
+of substitute goods or services; loss of use, data, or profits; or business
+interruption) however caused and on any theory of liability, whether in contract,
+strict liability, or tort (including negligence or otherwise) arising in any way
+out of the use of the software and documentation, even if advised of the
+possibility of such damage.

-You should refer to the license agreement accompanying this Software for
-additional information regarding your rights and obligations.
-
-SOFTWARE AND DOCUMENTATION ARE PROVIDED AS IS  WITHOUT  WARRANTY  OF  ANY  KIND,
-EITHER EXPRESS  OR  IMPLIED,  INCLUDING  WITHOUT  LIMITATION,  ANY  WARRANTY  OF
-MERCHANTABILITY, TITLE, NON-INFRINGEMENT AND FITNESS FOR A  PARTICULAR  PURPOSE.
-IN NO EVENT SHALL MICROCHIP OR  ITS  LICENSORS  BE  LIABLE  OR  OBLIGATED  UNDER
-CONTRACT, NEGLIGENCE, STRICT LIABILITY, CONTRIBUTION,  BREACH  OF  WARRANTY,  OR
-OTHER LEGAL  EQUITABLE  THEORY  ANY  DIRECT  OR  INDIRECT  DAMAGES  OR  EXPENSES
-INCLUDING BUT NOT LIMITED TO ANY  INCIDENTAL,  SPECIAL,  INDIRECT,  PUNITIVE  OR
-CONSEQUENTIAL DAMAGES, LOST  PROFITS  OR  LOST  DATA,  COST  OF  PROCUREMENT  OF
-SUBSTITUTE  GOODS,  TECHNOLOGY,  SERVICES,  OR  ANY  CLAIMS  BY  THIRD   PARTIES
-(INCLUDING BUT NOT LIMITED TO ANY DEFENSE  THEREOF),  OR  OTHER  SIMILAR  COSTS.
-*******************************************************************************/
+Except as expressly permitted hereunder and subject to the applicable license terms
+for any third-party software incorporated in the software and any applicable open
+source software license terms, no license or other rights, whether express or
+implied, are granted under any patent or other intellectual property rights of
+Microchip or any third party.
+************************************************************************************/

 /*============================================================================
 Filename : qtm_acq_same54_0x000f_api.h
@ -79,6 +79,7 @@ Copyright (c)  Microchip Inc. All rights reserved.

 /* X line bit position */
 #define X_NONE 0u
+#undef X
 #define X(n) ((uint32_t)(1u << (n)))

 /* Y line bit position */
@ -264,6 +265,7 @@ typedef struct qtm_drivenshield_config_tag
 {
 	uint8_t  flags;
 }qtm_drivenshield_config_t;
+extern volatile uint16_t current_measure_channel;

 /*============================================================================
 touch_ret_t qtm_drivenshield_setup(qtm_drivenshield_config_t* config);
--- a/firmware/src/config/mcal/touch/qtm_common_components_api.h
+++ b/firmware/src/config/mcal/touch/qtm_common_components_api.h
@ -17,30 +17,30 @@
 *******************************************************************************/

 /*******************************************************************************
-Copyright (c) Microchip Technology Inc.  All rights reserved.
+Copyright (C) [2023], Microchip Technology Inc., and its subsidiaries. All rights reserved.

-Microchip licenses to you the right to use, modify, copy and distribute
-Software only when embedded on a Microchip microcontroller or digital signal
-controller that is integrated into your product or third party product
-(pursuant to the sublicense terms in the accompanying license agreement).
+The software and documentation is provided by microchip and its contributors
+"as is" and any express, implied or statutory warranties, including, but not
+limited to, the implied warranties of merchantability, fitness for a particular
+purpose and non-infringement of third party intellectual property rights are
+disclaimed to the fullest extent permitted by law. In no event shall microchip
+or its contributors be liable for any direct, indirect, incidental, special,
+exemplary, or consequential damages (including, but not limited to, procurement
+of substitute goods or services; loss of use, data, or profits; or business
+interruption) however caused and on any theory of liability, whether in contract,
+strict liability, or tort (including negligence or otherwise) arising in any way
+out of the use of the software and documentation, even if advised of the
+possibility of such damage.

-You should refer to the license agreement accompanying this Software for
-additional information regarding your rights and obligations.
+Except as expressly permitted hereunder and subject to the applicable license terms
+for any third-party software incorporated in the software and any applicable open
+source software license terms, no license or other rights, whether express or
+implied, are granted under any patent or other intellectual property rights of
+Microchip or any third party.
+************************************************************************************/

-SOFTWARE AND DOCUMENTATION ARE PROVIDED AS IS  WITHOUT  WARRANTY  OF  ANY  KIND,
-EITHER EXPRESS  OR  IMPLIED,  INCLUDING  WITHOUT  LIMITATION,  ANY  WARRANTY  OF
-MERCHANTABILITY, TITLE, NON-INFRINGEMENT AND FITNESS FOR A  PARTICULAR  PURPOSE.
-IN NO EVENT SHALL MICROCHIP OR  ITS  LICENSORS  BE  LIABLE  OR  OBLIGATED  UNDER
-CONTRACT, NEGLIGENCE, STRICT LIABILITY, CONTRIBUTION,  BREACH  OF  WARRANTY,  OR
-OTHER LEGAL  EQUITABLE  THEORY  ANY  DIRECT  OR  INDIRECT  DAMAGES  OR  EXPENSES
-INCLUDING BUT NOT LIMITED TO ANY  INCIDENTAL,  SPECIAL,  INDIRECT,  PUNITIVE  OR
-CONSEQUENTIAL DAMAGES, LOST  PROFITS  OR  LOST  DATA,  COST  OF  PROCUREMENT  OF
-SUBSTITUTE  GOODS,  TECHNOLOGY,  SERVICES,  OR  ANY  CLAIMS  BY  THIRD   PARTIES
-(INCLUDING BUT NOT LIMITED TO ANY DEFENSE  THEREOF),  OR  OTHER  SIMILAR  COSTS.
-*******************************************************************************/
-
-#ifndef __QTM_API_COMMON_INC__
-#define __QTM_API_COMMON_INC__
+#ifndef QTM_API_COMMON_INC__
+#define QTM_API_COMMON_INC__

 #include <stdint.h>
 #include <stddef.h>
@ -199,4 +199,4 @@ typedef struct {
 #define SCROLLER_TYPE_WHEEL 1u
 #define SCROLLER_TYPE_WRAPAROUND 2u

-#endif /* __QTM_QPI_COMMON_*/
+#endif /* QTM_QPI_COMMON_*/
--- a/firmware/src/config/mcal/touch/qtm_freq_hop_0x0006_api.h
+++ b/firmware/src/config/mcal/touch/qtm_freq_hop_0x0006_api.h
@ -17,27 +17,27 @@
 *******************************************************************************/

 /*******************************************************************************
-Copyright (c) Microchip Technology Inc.  All rights reserved.
+Copyright (C) [2023], Microchip Technology Inc., and its subsidiaries. All rights reserved.

-Microchip licenses to you the right to use, modify, copy and distribute
-Software only when embedded on a Microchip microcontroller or digital signal
-controller that is integrated into your product or third party product
-(pursuant to the sublicense terms in the accompanying license agreement).
+The software and documentation is provided by microchip and its contributors
+"as is" and any express, implied or statutory warranties, including, but not
+limited to, the implied warranties of merchantability, fitness for a particular
+purpose and non-infringement of third party intellectual property rights are
+disclaimed to the fullest extent permitted by law. In no event shall microchip
+or its contributors be liable for any direct, indirect, incidental, special,
+exemplary, or consequential damages (including, but not limited to, procurement
+of substitute goods or services; loss of use, data, or profits; or business
+interruption) however caused and on any theory of liability, whether in contract,
+strict liability, or tort (including negligence or otherwise) arising in any way
+out of the use of the software and documentation, even if advised of the
+possibility of such damage.

-You should refer to the license agreement accompanying this Software for
-additional information regarding your rights and obligations.
-
-SOFTWARE AND DOCUMENTATION ARE PROVIDED AS IS  WITHOUT  WARRANTY  OF  ANY  KIND,
-EITHER EXPRESS  OR  IMPLIED,  INCLUDING  WITHOUT  LIMITATION,  ANY  WARRANTY  OF
-MERCHANTABILITY, TITLE, NON-INFRINGEMENT AND FITNESS FOR A  PARTICULAR  PURPOSE.
-IN NO EVENT SHALL MICROCHIP OR  ITS  LICENSORS  BE  LIABLE  OR  OBLIGATED  UNDER
-CONTRACT, NEGLIGENCE, STRICT LIABILITY, CONTRIBUTION,  BREACH  OF  WARRANTY,  OR
-OTHER LEGAL  EQUITABLE  THEORY  ANY  DIRECT  OR  INDIRECT  DAMAGES  OR  EXPENSES
-INCLUDING BUT NOT LIMITED TO ANY  INCIDENTAL,  SPECIAL,  INDIRECT,  PUNITIVE  OR
-CONSEQUENTIAL DAMAGES, LOST  PROFITS  OR  LOST  DATA,  COST  OF  PROCUREMENT  OF
-SUBSTITUTE  GOODS,  TECHNOLOGY,  SERVICES,  OR  ANY  CLAIMS  BY  THIRD   PARTIES
-(INCLUDING BUT NOT LIMITED TO ANY DEFENSE  THEREOF),  OR  OTHER  SIMILAR  COSTS.
-*******************************************************************************/
+Except as expressly permitted hereunder and subject to the applicable license terms
+for any third-party software incorporated in the software and any applicable open
+source software license terms, no license or other rights, whether express or
+implied, are granted under any patent or other intellectual property rights of
+Microchip or any third party.
+************************************************************************************/

 /* QTouch Modular Library Configuration */

--- a/firmware/src/config/mcal/touch/qtm_scroller_0x000b_api.h
+++ b/firmware/src/config/mcal/touch/qtm_scroller_0x000b_api.h
@ -17,27 +17,27 @@
 *******************************************************************************/

 /*******************************************************************************
-Copyright (c) Microchip Technology Inc.  All rights reserved.
+Copyright (C) [2023], Microchip Technology Inc., and its subsidiaries. All rights reserved.

-Microchip licenses to you the right to use, modify, copy and distribute
-Software only when embedded on a Microchip microcontroller or digital signal
-controller that is integrated into your product or third party product
-(pursuant to the sublicense terms in the accompanying license agreement).
+The software and documentation is provided by microchip and its contributors
+"as is" and any express, implied or statutory warranties, including, but not
+limited to, the implied warranties of merchantability, fitness for a particular
+purpose and non-infringement of third party intellectual property rights are
+disclaimed to the fullest extent permitted by law. In no event shall microchip
+or its contributors be liable for any direct, indirect, incidental, special,
+exemplary, or consequential damages (including, but not limited to, procurement
+of substitute goods or services; loss of use, data, or profits; or business
+interruption) however caused and on any theory of liability, whether in contract,
+strict liability, or tort (including negligence or otherwise) arising in any way
+out of the use of the software and documentation, even if advised of the
+possibility of such damage.

-You should refer to the license agreement accompanying this Software for
-additional information regarding your rights and obligations.
-
-SOFTWARE AND DOCUMENTATION ARE PROVIDED AS IS  WITHOUT  WARRANTY  OF  ANY  KIND,
-EITHER EXPRESS  OR  IMPLIED,  INCLUDING  WITHOUT  LIMITATION,  ANY  WARRANTY  OF
-MERCHANTABILITY, TITLE, NON-INFRINGEMENT AND FITNESS FOR A  PARTICULAR  PURPOSE.
-IN NO EVENT SHALL MICROCHIP OR  ITS  LICENSORS  BE  LIABLE  OR  OBLIGATED  UNDER
-CONTRACT, NEGLIGENCE, STRICT LIABILITY, CONTRIBUTION,  BREACH  OF  WARRANTY,  OR
-OTHER LEGAL  EQUITABLE  THEORY  ANY  DIRECT  OR  INDIRECT  DAMAGES  OR  EXPENSES
-INCLUDING BUT NOT LIMITED TO ANY  INCIDENTAL,  SPECIAL,  INDIRECT,  PUNITIVE  OR
-CONSEQUENTIAL DAMAGES, LOST  PROFITS  OR  LOST  DATA,  COST  OF  PROCUREMENT  OF
-SUBSTITUTE  GOODS,  TECHNOLOGY,  SERVICES,  OR  ANY  CLAIMS  BY  THIRD   PARTIES
-(INCLUDING BUT NOT LIMITED TO ANY DEFENSE  THEREOF),  OR  OTHER  SIMILAR  COSTS.
-*******************************************************************************/
+Except as expressly permitted hereunder and subject to the applicable license terms
+for any third-party software incorporated in the software and any applicable open
+source software license terms, no license or other rights, whether express or
+implied, are granted under any patent or other intellectual property rights of
+Microchip or any third party.
+************************************************************************************/

 /* QTouch Modular Library */
 /* API Header file - qtm_scroller_0x000b */
--- a/firmware/src/config/mcal/touch/qtm_surface_cs_0x0021_api.h
+++ b/firmware/src/config/mcal/touch/qtm_surface_cs_0x0021_api.h
@ -17,27 +17,27 @@
 *******************************************************************************/

 /*******************************************************************************
-Copyright (c) Microchip Technology Inc.  All rights reserved.
+Copyright (C) [2023], Microchip Technology Inc., and its subsidiaries. All rights reserved.

-Microchip licenses to you the right to use, modify, copy and distribute
-Software only when embedded on a Microchip microcontroller or digital signal
-controller that is integrated into your product or third party product
-(pursuant to the sublicense terms in the accompanying license agreement).
+The software and documentation is provided by microchip and its contributors
+"as is" and any express, implied or statutory warranties, including, but not
+limited to, the implied warranties of merchantability, fitness for a particular
+purpose and non-infringement of third party intellectual property rights are
+disclaimed to the fullest extent permitted by law. In no event shall microchip
+or its contributors be liable for any direct, indirect, incidental, special,
+exemplary, or consequential damages (including, but not limited to, procurement
+of substitute goods or services; loss of use, data, or profits; or business
+interruption) however caused and on any theory of liability, whether in contract,
+strict liability, or tort (including negligence or otherwise) arising in any way
+out of the use of the software and documentation, even if advised of the
+possibility of such damage.

-You should refer to the license agreement accompanying this Software for
-additional information regarding your rights and obligations.
-
-SOFTWARE AND DOCUMENTATION ARE PROVIDED AS IS  WITHOUT  WARRANTY  OF  ANY  KIND,
-EITHER EXPRESS  OR  IMPLIED,  INCLUDING  WITHOUT  LIMITATION,  ANY  WARRANTY  OF
-MERCHANTABILITY, TITLE, NON-INFRINGEMENT AND FITNESS FOR A  PARTICULAR  PURPOSE.
-IN NO EVENT SHALL MICROCHIP OR  ITS  LICENSORS  BE  LIABLE  OR  OBLIGATED  UNDER
-CONTRACT, NEGLIGENCE, STRICT LIABILITY, CONTRIBUTION,  BREACH  OF  WARRANTY,  OR
-OTHER LEGAL  EQUITABLE  THEORY  ANY  DIRECT  OR  INDIRECT  DAMAGES  OR  EXPENSES
-INCLUDING BUT NOT LIMITED TO ANY  INCIDENTAL,  SPECIAL,  INDIRECT,  PUNITIVE  OR
-CONSEQUENTIAL DAMAGES, LOST  PROFITS  OR  LOST  DATA,  COST  OF  PROCUREMENT  OF
-SUBSTITUTE  GOODS,  TECHNOLOGY,  SERVICES,  OR  ANY  CLAIMS  BY  THIRD   PARTIES
-(INCLUDING BUT NOT LIMITED TO ANY DEFENSE  THEREOF),  OR  OTHER  SIMILAR  COSTS.
-*******************************************************************************/
+Except as expressly permitted hereunder and subject to the applicable license terms
+for any third-party software incorporated in the software and any applicable open
+source software license terms, no license or other rights, whether express or
+implied, are granted under any patent or other intellectual property rights of
+Microchip or any third party.
+************************************************************************************/

 /*============================================================================
 Filename : qtm_surface_1finger_touch_api.h
--- a/firmware/src/config/mcal/touch/qtm_touch_key_0x0002_api.h
+++ b/firmware/src/config/mcal/touch/qtm_touch_key_0x0002_api.h
@ -17,27 +17,27 @@
 *******************************************************************************/

 /*******************************************************************************
-Copyright (c) Microchip Technology Inc.  All rights reserved.
+Copyright (C) [2023], Microchip Technology Inc., and its subsidiaries. All rights reserved.

-Microchip licenses to you the right to use, modify, copy and distribute
-Software only when embedded on a Microchip microcontroller or digital signal
-controller that is integrated into your product or third party product
-(pursuant to the sublicense terms in the accompanying license agreement).
+The software and documentation is provided by microchip and its contributors
+"as is" and any express, implied or statutory warranties, including, but not
+limited to, the implied warranties of merchantability, fitness for a particular
+purpose and non-infringement of third party intellectual property rights are
+disclaimed to the fullest extent permitted by law. In no event shall microchip
+or its contributors be liable for any direct, indirect, incidental, special,
+exemplary, or consequential damages (including, but not limited to, procurement
+of substitute goods or services; loss of use, data, or profits; or business
+interruption) however caused and on any theory of liability, whether in contract,
+strict liability, or tort (including negligence or otherwise) arising in any way
+out of the use of the software and documentation, even if advised of the
+possibility of such damage.

-You should refer to the license agreement accompanying this Software for
-additional information regarding your rights and obligations.
-
-SOFTWARE AND DOCUMENTATION ARE PROVIDED AS IS  WITHOUT  WARRANTY  OF  ANY  KIND,
-EITHER EXPRESS  OR  IMPLIED,  INCLUDING  WITHOUT  LIMITATION,  ANY  WARRANTY  OF
-MERCHANTABILITY, TITLE, NON-INFRINGEMENT AND FITNESS FOR A  PARTICULAR  PURPOSE.
-IN NO EVENT SHALL MICROCHIP OR  ITS  LICENSORS  BE  LIABLE  OR  OBLIGATED  UNDER
-CONTRACT, NEGLIGENCE, STRICT LIABILITY, CONTRIBUTION,  BREACH  OF  WARRANTY,  OR
-OTHER LEGAL  EQUITABLE  THEORY  ANY  DIRECT  OR  INDIRECT  DAMAGES  OR  EXPENSES
-INCLUDING BUT NOT LIMITED TO ANY  INCIDENTAL,  SPECIAL,  INDIRECT,  PUNITIVE  OR
-CONSEQUENTIAL DAMAGES, LOST  PROFITS  OR  LOST  DATA,  COST  OF  PROCUREMENT  OF
-SUBSTITUTE  GOODS,  TECHNOLOGY,  SERVICES,  OR  ANY  CLAIMS  BY  THIRD   PARTIES
-(INCLUDING BUT NOT LIMITED TO ANY DEFENSE  THEREOF),  OR  OTHER  SIMILAR  COSTS.
-*******************************************************************************/
+Except as expressly permitted hereunder and subject to the applicable license terms
+for any third-party software incorporated in the software and any applicable open
+source software license terms, no license or other rights, whether express or
+implied, are granted under any patent or other intellectual property rights of
+Microchip or any third party.
+************************************************************************************/

 /*============================================================================
 Filename : qtm_touch_key_api.h
--- a/firmware/src/config/mcal/touch/touch.c
+++ b/firmware/src/config/mcal/touch/touch.c
@ -1,5 +1,5 @@
 /*******************************************************************************
-  Touch Library v3.12.1 Release
+  Touch Library v3.16.0 Release

  Company:
    Microchip Technology Inc.
@ -17,39 +17,41 @@
 *******************************************************************************/

 /*******************************************************************************
-Copyright (c)  2022 released Microchip Technology Inc.  All rights reserved.
+Copyright (C) [2024], Microchip Technology Inc., and its subsidiaries. All rights reserved.

-Microchip licenses to you the right to use, modify, copy and distribute
-Software only when embedded on a Microchip microcontroller or digital signal
-controller that is integrated into your product or third party product
-(pursuant to the sublicense terms in the accompanying license agreement).
+The software and documentation is provided by microchip and its contributors
+"as is" and any express, implied or statutory warranties, including, but not
+limited to, the implied warranties of merchantability, fitness for a particular
+purpose and non-infringement of third party intellectual property rights are
+disclaimed to the fullest extent permitted by law. In no event shall microchip
+or its contributors be liable for any direct, indirect, incidental, special,
+exemplary, or consequential damages (including, but not limited to, procurement
+of substitute goods or services; loss of use, data, or profits; or business
+interruption) however caused and on any theory of liability, whether in contract,
+strict liability, or tort (including negligence or otherwise) arising in any way
+out of the use of the software and documentation, even if advised of the
+possibility of such damage.

-You should refer to the license agreement accompanying this Software for
-additional information regarding your rights and obligations.
+Except as expressly permitted hereunder and subject to the applicable license terms
+for any third-party software incorporated in the software and any applicable open
+source software license terms, no license or other rights, whether express or
+implied, are granted under any patent or other intellectual property rights of
+Microchip or any third party.
+************************************************************************************/

-SOFTWARE AND DOCUMENTATION ARE PROVIDED AS IS  WITHOUT  WARRANTY  OF  ANY  KIND,
-EITHER EXPRESS  OR  IMPLIED,  INCLUDING  WITHOUT  LIMITATION,  ANY  WARRANTY  OF
-MERCHANTABILITY, TITLE, NON-INFRINGEMENT AND FITNESS FOR A  PARTICULAR  PURPOSE.
-IN NO EVENT SHALL MICROCHIP OR  ITS  LICENSORS  BE  LIABLE  OR  OBLIGATED  UNDER
-CONTRACT, NEGLIGENCE, STRICT LIABILITY, CONTRIBUTION,  BREACH  OF  WARRANTY,  OR
-OTHER LEGAL  EQUITABLE  THEORY  ANY  DIRECT  OR  INDIRECT  DAMAGES  OR  EXPENSES
-INCLUDING BUT NOT LIMITED TO ANY  INCIDENTAL,  SPECIAL,  INDIRECT,  PUNITIVE  OR
-CONSEQUENTIAL DAMAGES, LOST  PROFITS  OR  LOST  DATA,  COST  OF  PROCUREMENT  OF
-SUBSTITUTE  GOODS,  TECHNOLOGY,  SERVICES,  OR  ANY  CLAIMS  BY  THIRD   PARTIES
-(INCLUDING BUT NOT LIMITED TO ANY DEFENSE  THEREOF),  OR  OTHER  SIMILAR  COSTS.
-*******************************************************************************/


 /*----------------------------------------------------------------------------
 *     include files
 *----------------------------------------------------------------------------*/
 #include "definitions.h"
+#include "../peripheral/rtc/plib_rtc.h"
+#include "../interrupts.h"
 #include "touch/touch.h"

 /*----------------------------------------------------------------------------
 *   prototypes
 *----------------------------------------------------------------------------*/
-
 /*! \brief configure keys, wheels and sliders.
 */
 static touch_ret_t touch_sensors_config(void);
@ -63,29 +65,28 @@ static void qtm_measure_complete_callback(void);
 static void qtm_error_callback(uint8_t error);


+
 /*----------------------------------------------------------------------------
 *     Global Variables
 *----------------------------------------------------------------------------*/
-
 /* Flag to indicate time for touch measurement */
-volatile uint8_t time_to_measure_touch_var = 0;
+static volatile uint8_t time_to_measure_touch_var = 0u;
 /* post-process request flag */
-volatile uint8_t touch_postprocess_request = 0;
+static volatile uint8_t touch_postprocess_request = 0u;

 /* Measurement Done Touch Flag  */
-volatile uint8_t measurement_done_touch = 0;
+volatile uint8_t measurement_done_touch = 0u;

 volatile uint8_t k_voice_touch_Sts = 0,k_menu_touch_Sts=0,k_vol_touch_Sts=0;
 /* Error Handling */
-uint8_t module_error_code = 0;
-
+uint8_t module_error_code = 0u;


 /* Acquisition module internal data - Size to largest acquisition set */
-uint16_t touch_acq_signals_raw[DEF_NUM_CHANNELS];
+static uint16_t touch_acq_signals_raw[DEF_NUM_CHANNELS];
 /* Acquisition set 1 - General settings */
-qtm_acq_node_group_config_t ptc_qtlib_acq_gen1
-    = {DEF_NUM_CHANNELS, DEF_SENSOR_TYPE, DEF_PTC_CAL_AUTO_TUNE, DEF_SEL_FREQ_INIT, DEF_PTC_INTERRUPT_PRIORITY};
+static qtm_acq_node_group_config_t ptc_qtlib_acq_gen1
+    = {DEF_NUM_CHANNELS, DEF_SENSOR_TYPE, DEF_PTC_CAL_AUTO_TUNE, (uint8_t)DEF_SEL_FREQ_INIT, DEF_PTC_INTERRUPT_PRIORITY};

 /* Node status, signal, calibration values */
 qtm_acq_node_data_t ptc_qtlib_node_stat1[DEF_NUM_CHANNELS];
@ -94,15 +95,15 @@ qtm_acq_node_data_t ptc_qtlib_node_stat1[DEF_NUM_CHANNELS];
 qtm_acq_same51_node_config_t ptc_seq_node_cfg1[DEF_NUM_CHANNELS] = {NODE_0_PARAMS,NODE_1_PARAMS,NODE_2_PARAMS,NODE_3_PARAMS,NODE_4_PARAMS,NODE_5_PARAMS,NODE_6_PARAMS,NODE_7_PARAMS,NODE_8_PARAMS,NODE_9_PARAMS,NODE_10_PARAMS,NODE_11_PARAMS,NODE_12_PARAMS,NODE_13_PARAMS,NODE_14_PARAMS};

 /* Container */
-qtm_acquisition_control_t qtlib_acq_set1 = {&ptc_qtlib_acq_gen1, &ptc_seq_node_cfg1[0], &ptc_qtlib_node_stat1[0]};
+static qtm_acquisition_control_t qtlib_acq_set1 = {&ptc_qtlib_acq_gen1, &ptc_seq_node_cfg1[0], &ptc_qtlib_node_stat1[0]};

 /**********************************************************/
 /*********** Frequency Hop Module **********************/
 /**********************************************************/

 /* Buffer used with various noise filtering functions */
-uint16_t noise_filter_buffer[DEF_NUM_CHANNELS * NUM_FREQ_STEPS];
-uint8_t  freq_hop_delay_selection[NUM_FREQ_STEPS] = {DEF_MEDIAN_FILTER_FREQUENCIES};
+static uint16_t noise_filter_buffer[DEF_NUM_CHANNELS * NUM_FREQ_STEPS];
+static uint8_t  freq_hop_delay_selection[NUM_FREQ_STEPS] = {DEF_MEDIAN_FILTER_FREQUENCIES};

 /* Configuration */
 qtm_freq_hop_config_t qtm_freq_hop_config1 = {
@ -113,10 +114,10 @@ qtm_freq_hop_config_t qtm_freq_hop_config1 = {
 };

 /* Data */
-qtm_freq_hop_data_t qtm_freq_hop_data1 = {0, 0, &noise_filter_buffer[0], &ptc_qtlib_node_stat1[0]};
+static qtm_freq_hop_data_t qtm_freq_hop_data1 = {0, 0, &noise_filter_buffer[0], &ptc_qtlib_node_stat1[0]};

 /* Container */
-qtm_freq_hop_control_t qtm_freq_hop_control1 = {&qtm_freq_hop_data1, &qtm_freq_hop_config1};
+static qtm_freq_hop_control_t qtm_freq_hop_control1 = {&qtm_freq_hop_data1, &qtm_freq_hop_config1};

 /**********************************************************/
 /*********************** Keys Module **********************/
@ -133,7 +134,7 @@ qtm_touch_key_group_config_t qtlib_key_grp_config_set1 = {DEF_NUM_SENSORS,
                                                          DEF_DRIFT_HOLD_TIME,
                                                          DEF_REBURST_MODE};

-qtm_touch_key_group_data_t qtlib_key_grp_data_set1;
+static qtm_touch_key_group_data_t qtlib_key_grp_data_set1;

 /* Key data */
 qtm_touch_key_data_t qtlib_key_data_set1[DEF_NUM_SENSORS];
@ -141,7 +142,7 @@ qtm_touch_key_data_t qtlib_key_data_set1[DEF_NUM_SENSORS];
 /* Key Configurations */
 qtm_touch_key_config_t qtlib_key_configs_set1[DEF_NUM_SENSORS] = { KEY_0_PARAMS, KEY_1_PARAMS, KEY_2_PARAMS, KEY_3_PARAMS, KEY_4_PARAMS, KEY_5_PARAMS, KEY_6_PARAMS, KEY_7_PARAMS, KEY_8_PARAMS, KEY_9_PARAMS, KEY_10_PARAMS, KEY_11_PARAMS, KEY_12_PARAMS, KEY_13_PARAMS,KEY_14_PARAMS}; 
 /* Container */
-qtm_touch_key_control_t qtlib_key_set1
+static qtm_touch_key_control_t qtlib_key_set1
    = {&qtlib_key_grp_data_set1, &qtlib_key_grp_config_set1, &qtlib_key_data_set1[0], &qtlib_key_configs_set1[0]};

 /**********************************************************/
@ -150,16 +151,16 @@ qtm_touch_key_control_t qtlib_key_set1

 /* Individual and Group Data */
 qtm_scroller_data_t       qtm_scroller_data1[DEF_NUM_SCROLLERS];
-qtm_scroller_group_data_t qtm_scroller_group_data1 = {0};
+static qtm_scroller_group_data_t qtm_scroller_group_data1 = {0};

 /* Group Configuration */
-qtm_scroller_group_config_t qtm_scroller_group_config1 = {&qtlib_key_data_set1[0], DEF_NUM_SCROLLERS};
+static qtm_scroller_group_config_t qtm_scroller_group_config1 = {&qtlib_key_data_set1[0], DEF_NUM_SCROLLERS};

 /* Scroller Configurations */
 qtm_scroller_config_t qtm_scroller_config1[DEF_NUM_SCROLLERS] = {SCROLLER_0_PARAMS}; 

 /* Container */
-qtm_scroller_control_t qtm_scroller_control1
+static qtm_scroller_control_t qtm_scroller_control1
    = {&qtm_scroller_group_data1, &qtm_scroller_group_config1, &qtm_scroller_data1[0], &qtm_scroller_config1[0]};
 /**********************************************************/
 /***************** Surface 1t Module ********************/
@ -181,7 +182,7 @@ qtm_surface_cs_config_t qtm_surface_cs_config1 = {
 qtm_surface_contact_data_t qtm_surface_cs_data1;

 /* Container */
-qtm_surface_cs_control_t qtm_surface_cs_control1 = {&qtm_surface_cs_data1, &qtm_surface_cs_config1};
+static qtm_surface_cs_control_t qtm_surface_cs_control1 = {&qtm_surface_cs_data1, &qtm_surface_cs_config1};



@ -205,26 +206,25 @@ static touch_ret_t touch_sensors_config(void)
    touch_ret_t touch_ret = TOUCH_SUCCESS;

    /* Init acquisition module */
-    qtm_ptc_init_acquisition_module(&qtlib_acq_set1);
-    qtm_ptc_qtlib_assign_signal_memory(&touch_acq_signals_raw[0]);
+    touch_ret = qtm_ptc_init_acquisition_module(&qtlib_acq_set1);
+    touch_ret = qtm_ptc_qtlib_assign_signal_memory(&touch_acq_signals_raw[0]);

    /* Initialize sensor nodes */
-    for (sensor_nodes = 0u; sensor_nodes < DEF_NUM_CHANNELS; sensor_nodes++) {
+    for (sensor_nodes = 0u; sensor_nodes < (uint16_t) DEF_NUM_CHANNELS; sensor_nodes++) {
        /* Enable each node for measurement and mark for calibration */
-        qtm_enable_sensor_node(&qtlib_acq_set1, sensor_nodes);
-        qtm_calibrate_sensor_node(&qtlib_acq_set1, sensor_nodes);
+        touch_ret = qtm_enable_sensor_node(&qtlib_acq_set1, sensor_nodes);
+        touch_ret = qtm_calibrate_sensor_node(&qtlib_acq_set1, sensor_nodes);
    }

-
    /* Enable sensor keys and assign nodes */
-    for (sensor_nodes = 0u; sensor_nodes < DEF_NUM_SENSORS; sensor_nodes++) {
-			qtm_init_sensor_key(&qtlib_key_set1, sensor_nodes, &ptc_qtlib_node_stat1[sensor_nodes]);
+    for (sensor_nodes = 0u; sensor_nodes < (uint16_t)DEF_NUM_SENSORS; sensor_nodes++) {
+			touch_ret=qtm_init_sensor_key(&qtlib_key_set1, (uint8_t) sensor_nodes, &ptc_qtlib_node_stat1[sensor_nodes]);
    }

 	/* scroller init */
-	touch_ret |= qtm_init_scroller_module(&qtm_scroller_control1);
+	touch_ret = qtm_init_scroller_module(&qtm_scroller_control1);

-	touch_ret |= qtm_init_surface_cs(&qtm_surface_cs_control1);
+	touch_ret = qtm_init_surface_cs(&qtm_surface_cs_control1);

    return (touch_ret);
 }
@ -279,10 +279,9 @@ void touch_init(void)
 	touch_timer_config();

 	/* Configure touch sensors with Application specific settings */
-	touch_sensors_config();
+    (void)touch_sensors_config();

 	
-
 }

 /*============================================================================
@ -351,8 +350,6 @@ void touch_process(void)
    }

 }
-uint8_t interrupt_cnt;
-uint8_t touch_gesture_time_cnt;

 /*============================================================================
 void touch_timer_handler(void)
@ -371,12 +368,12 @@ void touch_timer_handler(void)
    qtm_update_qtlib_timer(DEF_TOUCH_MEASUREMENT_PERIOD_MS);
 	}

+void rtc_cb( RTC_TIMER32_INT_MASK intCause, uintptr_t context ); 
 void rtc_cb( RTC_TIMER32_INT_MASK intCause, uintptr_t context )
 {
    touch_timer_handler();
 }
-uintptr_t rtc_context;
-
+static uintptr_t rtc_context;
 void touch_timer_config(void)
 {  
    RTC_Timer32CallbackRegister(rtc_cb, rtc_context);
@ -431,10 +428,17 @@ void update_sensor_state(uint16_t sensor_node, uint8_t new_state)

 void calibrate_node(uint16_t sensor_node)
 {
+	touch_ret_t touch_ret = TOUCH_SUCCESS;
    /* Calibrate Node */
-    qtm_calibrate_sensor_node(&qtlib_acq_set1, sensor_node);
+	touch_ret = qtm_calibrate_sensor_node(&qtlib_acq_set1, sensor_node);
+    if(touch_ret != TOUCH_SUCCESS) {
+		/* Error condition */
+	}
    /* Initialize key */
-    qtm_init_sensor_key(&qtlib_key_set1, sensor_node, &ptc_qtlib_node_stat1[sensor_node]);
+    touch_ret = qtm_init_sensor_key(&qtlib_key_set1, (uint8_t) sensor_node, &ptc_qtlib_node_stat1[sensor_node]);
+    if(touch_ret != TOUCH_SUCCESS) {
+		/* Error condition */
+}
 }

 uint8_t get_scroller_state(uint16_t sensor_node)
@ -452,9 +456,9 @@ uint8_t get_surface_status(void)
  return (qtm_surface_cs_control1.qtm_surface_contact_data->qt_surface_status);
 }

-uint8_t get_surface_position(uint8_t ver_or_hor)
+uint16_t get_surface_position(uint8_t ver_or_hor)
 {
-	uint8_t temp_pos = 0;
+	uint16_t temp_pos = 0;
 /*
 *	ver_or_hor, 0 = hor, 1 = ver
 */
--- a/firmware/src/config/mcal/touch/touch.h
+++ b/firmware/src/config/mcal/touch/touch.h
@ -1,5 +1,5 @@
 /*******************************************************************************
-  Touch Library v3.12.1 Release
+  Touch Library v3.16.0 Release

  Company:
    Microchip Technology Inc.
@ -16,7 +16,7 @@
 *******************************************************************************/

 /*******************************************************************************
-Copyright (c) 2022 released Microchip Technology Inc.  All rights reserved.
+Copyright (c) 2024 released Microchip Technology Inc.  All rights reserved.

 Microchip licenses to you the right to use, modify, copy and distribute
 Software only when embedded on a Microchip microcontroller or digital signal
@ -64,14 +64,13 @@ SUBSTITUTE  GOODS,  TECHNOLOGY,  SERVICES,  OR  ANY  CLAIMS  BY  THIRD   PARTIES
 * Range: 1 to 255.
 * Default value: 20.
 */
-#define DEF_TOUCH_MEASUREMENT_PERIOD_MS 4
+#define DEF_TOUCH_MEASUREMENT_PERIOD_MS 4u

 /* Defines the Type of sensor
 * Default value: NODE_MUTUAL.
 */
 #define DEF_SENSOR_TYPE NODE_SELFCAP

-
 /* Set sensor calibration mode for charge share delay ,Prescaler or series resistor.
 * Range: CAL_AUTO_TUNE_NONE / CAL_AUTO_TUNE_RSEL / CAL_AUTO_TUNE_PRSC / CAL_AUTO_TUNE_CSD
 * Default value: CAL_AUTO_TUNE_NONE.
@ -79,22 +78,23 @@ SUBSTITUTE  GOODS,  TECHNOLOGY,  SERVICES,  OR  ANY  CLAIMS  BY  THIRD   PARTIES

 #define DEF_PTC_CAL_OPTION   CAL_AUTO_TUNE_NONE

-/* Defines the interrupt priority for the PTC. Set low priority to PTC interrupt for applications having interrupt time
- * constraints.
- */
-#define DEF_PTC_INTERRUPT_PRIORITY 7
-
 /* Calibration option to ensure full charge transfer */
 /* Bits 7:0 = XX | TT SELECT_TAU | X | CAL_OPTION */
 #define DEF_PTC_TAU_TARGET CAL_CHRG_5TAU
 #define DEF_PTC_CAL_AUTO_TUNE (uint8_t)((DEF_PTC_TAU_TARGET << CAL_CHRG_TIME_POS) | DEF_PTC_CAL_OPTION)

+/* Defines the interrupt priority for the PTC. Set low priority to PTC interrupt for applications having interrupt time
+ * constraints.
+ */
+#define DEF_PTC_INTERRUPT_PRIORITY 7u
+
 /* Set default bootup acquisition frequency.
 * Range: FREQ_SEL_0 - FREQ_SEL_15 , FREQ_SEL_SPREAD
 * Default value: FREQ_SEL_0.
 */
 #define DEF_SEL_FREQ_INIT FREQ_SEL_0

+
 /*----------------------------------------------------------------------------
 *     defines
 *----------------------------------------------------------------------------*/
@ -107,74 +107,74 @@ SUBSTITUTE  GOODS,  TECHNOLOGY,  SERVICES,  OR  ANY  CLAIMS  BY  THIRD   PARTIES
 * Range: 1 to 65535.
 * Default value: 1
 */
-#define DEF_NUM_CHANNELS (15)
+#define DEF_NUM_CHANNELS (15u)


 /* Defines node parameter setting
- * {X-line, Y-line, Charge Share Delay, NODE_RSEL_PRSC(series resistor, prescaler), NODE_G(Analog Gain , Digital Gain),
+ * {X-line, Y-line, Charge Share Delay (CSD), NODE_RSEL_PRSC(series resistor, prescaler), NODE_G(Analog Gain , Digital Gain),
 * filter level}
 */


 #define NODE_0_PARAMS                                                                                               \
 {                                                                                                                  \
-   X_NONE, Y(15), 10,PRSC_DIV_SEL_8, NODE_GAIN(GAIN_1, GAIN_4), FILTER_LEVEL_64                   \
+   X_NONE, Y(15), 0,(uint8_t)PRSC_DIV_SEL_8, NODE_GAIN(GAIN_1, GAIN_4), (uint8_t)FILTER_LEVEL_64                   \
 }
 #define NODE_1_PARAMS                                                                                               \
 {                                                                                                                  \
-   X_NONE, Y(16), 10,PRSC_DIV_SEL_8, NODE_GAIN(GAIN_1, GAIN_4), FILTER_LEVEL_64                   \
+   X_NONE, Y(16), 0,(uint8_t)PRSC_DIV_SEL_8, NODE_GAIN(GAIN_1, GAIN_4), (uint8_t)FILTER_LEVEL_64                   \
 }
 #define NODE_2_PARAMS                                                                                               \
 {                                                                                                                  \
-   X_NONE, Y(17), 10,PRSC_DIV_SEL_8, NODE_GAIN(GAIN_1, GAIN_4), FILTER_LEVEL_64                   \
+   X_NONE, Y(17), 0,(uint8_t)PRSC_DIV_SEL_8, NODE_GAIN(GAIN_1, GAIN_4), (uint8_t)FILTER_LEVEL_64                   \
 }
 #define NODE_3_PARAMS                                                                                               \
 {                                                                                                                  \
-   X_NONE, Y(30), 10,PRSC_DIV_SEL_8, NODE_GAIN(GAIN_1, GAIN_4), FILTER_LEVEL_64                   \
+   X_NONE, Y(30), 0,(uint8_t)PRSC_DIV_SEL_8, NODE_GAIN(GAIN_1, GAIN_4), (uint8_t)FILTER_LEVEL_64                   \
 }
 #define NODE_4_PARAMS                                                                                               \
 {                                                                                                                  \
-   X_NONE, Y(31), 10,PRSC_DIV_SEL_8, NODE_GAIN(GAIN_1, GAIN_4), FILTER_LEVEL_64                   \
+   X_NONE, Y(31), 0,(uint8_t)PRSC_DIV_SEL_8, NODE_GAIN(GAIN_1, GAIN_4), (uint8_t)FILTER_LEVEL_64                   \
 }
 #define NODE_5_PARAMS                                                                                               \
 {                                                                                                                  \
-   X_NONE, Y(24), 10,PRSC_DIV_SEL_8, NODE_GAIN(GAIN_1, GAIN_4), FILTER_LEVEL_64                   \
+   X_NONE, Y(24), 0,(uint8_t)PRSC_DIV_SEL_8, NODE_GAIN(GAIN_1, GAIN_8), (uint8_t)FILTER_LEVEL_64                   \
 }
 #define NODE_6_PARAMS                                                                                               \
 {                                                                                                                  \
-   X_NONE, Y(25), 10,PRSC_DIV_SEL_8, NODE_GAIN(GAIN_1, GAIN_4), FILTER_LEVEL_64                   \
+   X_NONE, Y(25), 0,(uint8_t)PRSC_DIV_SEL_8, NODE_GAIN(GAIN_1, GAIN_8), (uint8_t)FILTER_LEVEL_64                   \
 }
 #define NODE_7_PARAMS                                                                                               \
 {                                                                                                                  \
-   X_NONE, Y(1), 10,PRSC_DIV_SEL_8, NODE_GAIN(GAIN_1, GAIN_4), FILTER_LEVEL_64                   \
+   X_NONE, Y(1), 0,(uint8_t)PRSC_DIV_SEL_8, NODE_GAIN(GAIN_1, GAIN_8), (uint8_t)FILTER_LEVEL_64                   \
 }
 #define NODE_8_PARAMS                                                                                               \
 {                                                                                                                  \
-   X_NONE, Y(2), 10,PRSC_DIV_SEL_8, NODE_GAIN(GAIN_1, GAIN_4), FILTER_LEVEL_64                   \
+   X_NONE, Y(2), 0,(uint8_t)PRSC_DIV_SEL_8, NODE_GAIN(GAIN_1, GAIN_8), (uint8_t)FILTER_LEVEL_64                   \
 }
 #define NODE_9_PARAMS                                                                                               \
 {                                                                                                                  \
-   X_NONE, Y(3), 10,PRSC_DIV_SEL_8, NODE_GAIN(GAIN_1, GAIN_4), FILTER_LEVEL_64                   \
+   X_NONE, Y(3), 0,(uint8_t)PRSC_DIV_SEL_8, NODE_GAIN(GAIN_1, GAIN_8), (uint8_t)FILTER_LEVEL_64                   \
 }
 #define NODE_10_PARAMS                                                                                               \
 {                                                                                                                  \
-   X_NONE, Y(10), 10,PRSC_DIV_SEL_8, NODE_GAIN(GAIN_1, GAIN_4), FILTER_LEVEL_64                   \
+   X_NONE, Y(10), 0,(uint8_t)PRSC_DIV_SEL_8, NODE_GAIN(GAIN_1, GAIN_4), (uint8_t)FILTER_LEVEL_64                   \
 }
 #define NODE_11_PARAMS                                                                                               \
 {                                                                                                                  \
-   X_NONE, Y(11), 10,PRSC_DIV_SEL_8, NODE_GAIN(GAIN_1, GAIN_4), FILTER_LEVEL_64                   \
+   X_NONE, Y(11), 0,(uint8_t)PRSC_DIV_SEL_8, NODE_GAIN(GAIN_1, GAIN_4), (uint8_t)FILTER_LEVEL_64                   \
 }
 #define NODE_12_PARAMS                                                                                               \
 {                                                                                                                  \
-   X_NONE, Y(12), 10,PRSC_DIV_SEL_8, NODE_GAIN(GAIN_1, GAIN_4), FILTER_LEVEL_64                   \
+   X_NONE, Y(12), 0,(uint8_t)PRSC_DIV_SEL_8, NODE_GAIN(GAIN_1, GAIN_4), (uint8_t)FILTER_LEVEL_64                   \
 }
 #define NODE_13_PARAMS                                                                                               \
 {                                                                                                                  \
-   X_NONE, Y(13), 10,PRSC_DIV_SEL_8, NODE_GAIN(GAIN_1, GAIN_4), FILTER_LEVEL_64                   \
+   X_NONE, Y(13), 0,(uint8_t)PRSC_DIV_SEL_8, NODE_GAIN(GAIN_1, GAIN_4), (uint8_t)FILTER_LEVEL_64                   \
 }
 #define NODE_14_PARAMS                                                                                               \
 {                                                                                                                  \
-   X_NONE, Y(14), 10,PRSC_DIV_SEL_8, NODE_GAIN(GAIN_1, GAIN_4), FILTER_LEVEL_64                   \
+   X_NONE, Y(14), 0,(uint8_t)PRSC_DIV_SEL_8, NODE_GAIN(GAIN_1, GAIN_4), (uint8_t)FILTER_LEVEL_64                   \
 }

 /**********************************************************/
@ -184,7 +184,7 @@ SUBSTITUTE  GOODS,  TECHNOLOGY,  SERVICES,  OR  ANY  CLAIMS  BY  THIRD   PARTIES
 * Range: 1 to 65535.
 * Default value: 1
 */
-#define DEF_NUM_SENSORS (15)
+#define DEF_NUM_SENSORS (15u)

 /* Defines Key Sensor setting
 * {Sensor Threshold, Sensor Hysterisis, Sensor AKS}
@ -192,91 +192,91 @@ SUBSTITUTE  GOODS,  TECHNOLOGY,  SERVICES,  OR  ANY  CLAIMS  BY  THIRD   PARTIES

 #define KEY_0_PARAMS                                                                                            \
 {                                                                                                              \
-    50, HYST_12_5, AKS_GROUP_2                       \
+    72u, (uint8_t)HYST_12_5, (uint8_t)AKS_GROUP_2                       \
 }


 #define KEY_1_PARAMS                                                                                            \
 {                                                                                                              \
-    50, HYST_12_5, AKS_GROUP_2                       \
+    72u, (uint8_t)HYST_12_5, (uint8_t)AKS_GROUP_2                       \
 }


 #define KEY_2_PARAMS                                                                                            \
 {                                                                                                              \
-    50, HYST_12_5, AKS_GROUP_2                       \
+    72u, (uint8_t)HYST_12_5, (uint8_t)AKS_GROUP_2                       \
 }


 #define KEY_3_PARAMS                                                                                            \
 {                                                                                                              \
-    50, HYST_12_5, AKS_GROUP_2                       \
+    72u, (uint8_t)HYST_12_5, (uint8_t)AKS_GROUP_2                       \
 }


 #define KEY_4_PARAMS                                                                                            \
 {                                                                                                              \
-    50, HYST_12_5, AKS_GROUP_2                       \
+    72u, (uint8_t)HYST_12_5, (uint8_t)AKS_GROUP_2                       \
 }


 #define KEY_5_PARAMS                                                                                            \
 {                                                                                                              \
-    50, HYST_12_5, AKS_GROUP_1                       \
+    56u, (uint8_t)HYST_12_5, (uint8_t)AKS_GROUP_1                       \
 }


 #define KEY_6_PARAMS                                                                                            \
 {                                                                                                              \
-    50, HYST_12_5, AKS_GROUP_1                       \
+    56u, (uint8_t)HYST_12_5, (uint8_t)AKS_GROUP_1                       \
 }


 #define KEY_7_PARAMS                                                                                            \
 {                                                                                                              \
-    50, HYST_12_5, AKS_GROUP_1                       \
+    56u, (uint8_t)HYST_12_5, (uint8_t)AKS_GROUP_1                       \
 }


 #define KEY_8_PARAMS                                                                                            \
 {                                                                                                              \
-    50, HYST_12_5, AKS_GROUP_1                       \
+    56u, (uint8_t)HYST_12_5, (uint8_t)AKS_GROUP_1                       \
 }


 #define KEY_9_PARAMS                                                                                            \
 {                                                                                                              \
-    50, HYST_12_5, AKS_GROUP_1                       \
+    56u, (uint8_t)HYST_12_5, (uint8_t)AKS_GROUP_1                       \
 }


 #define KEY_10_PARAMS                                                                                            \
 {                                                                                                              \
-    50, HYST_12_5, AKS_GROUP_1                       \
+    48u, (uint8_t)HYST_12_5, (uint8_t)AKS_GROUP_1                       \
 }


 #define KEY_11_PARAMS                                                                                            \
 {                                                                                                              \
-    50, HYST_12_5, AKS_GROUP_1                       \
+    48u, (uint8_t)HYST_12_5, (uint8_t)AKS_GROUP_1                       \
 }


 #define KEY_12_PARAMS                                                                                            \
 {                                                                                                              \
-    50, HYST_12_5, AKS_GROUP_1                       \
+    48u, (uint8_t)HYST_12_5, (uint8_t)AKS_GROUP_1                       \
 }


 #define KEY_13_PARAMS                                                                                            \
 {                                                                                                              \
-    50, HYST_12_5, AKS_GROUP_1                       \
+    48u, (uint8_t)HYST_12_5, (uint8_t)AKS_GROUP_1                       \
 }


 #define KEY_14_PARAMS                                                                                            \
 {                                                                                                              \
-    50, HYST_12_5, AKS_GROUP_1                       \
+    48u, (uint8_t)HYST_12_5, (uint8_t)AKS_GROUP_1                       \
 }


@ -284,20 +284,20 @@ SUBSTITUTE  GOODS,  TECHNOLOGY,  SERVICES,  OR  ANY  CLAIMS  BY  THIRD   PARTIES
 * Range: 0 to 255.
 * Default value: 4.
 */
-#define DEF_TOUCH_DET_INT 4
+#define DEF_TOUCH_DET_INT 3u

 /* De-bounce counter for additional measurements to confirm away from touch signal
 * to initiate Away from touch re-calibration.
 * Range: 0 to 255.
 * Default value: 5.
 */
-#define DEF_ANTI_TCH_DET_INT 5
+#define DEF_ANTI_TCH_DET_INT 5u

 /* Threshold beyond with automatic sensor recalibration is initiated.
 * Range: RECAL_100/ RECAL_50 / RECAL_25 / RECAL_12_5 / RECAL_6_25 / MAX_RECAL
 * Default value: RECAL_100.
 */
-#define DEF_ANTI_TCH_RECAL_THRSHLD RECAL_50
+#define DEF_ANTI_TCH_RECAL_THRSHLD (uint8_t)RECAL_50

 /* Rate at which sensor reference value is adjusted towards sensor signal value
 * when signal value is greater than reference.
@ -305,7 +305,7 @@ SUBSTITUTE  GOODS,  TECHNOLOGY,  SERVICES,  OR  ANY  CLAIMS  BY  THIRD   PARTIES
 * Range: 0-255
 * Default value: 20u = 4 seconds.
 */
-#define DEF_TCH_DRIFT_RATE 1
+#define DEF_TCH_DRIFT_RATE 20u

 /* Rate at which sensor reference value is adjusted towards sensor signal value
 * when signal value is less than reference.
@ -313,33 +313,33 @@ SUBSTITUTE  GOODS,  TECHNOLOGY,  SERVICES,  OR  ANY  CLAIMS  BY  THIRD   PARTIES
 * Range: 0-255
 * Default value: 5u = 1 second.
 */
-#define DEF_ANTI_TCH_DRIFT_RATE 5
+#define DEF_ANTI_TCH_DRIFT_RATE 5u

 /* Time to restrict drift on all sensor when one or more sensors are activated.
 * Units: 200ms
 * Range: 0-255
 * Default value: 20u = 4 seconds.
 */
-#define DEF_DRIFT_HOLD_TIME 20
+#define DEF_DRIFT_HOLD_TIME 20u

 /* Set mode for additional sensor measurements based on touch activity.
 * Range: REBURST_NONE / REBURST_UNRESOLVED / REBURST_ALL
 * Default value: REBURST_UNRESOLVED
 */
-#define DEF_REBURST_MODE REBURST_UNRESOLVED
+#define DEF_REBURST_MODE (uint8_t)REBURST_UNRESOLVED

 /* Sensor maximum ON duration upon touch.
 * Range: 0-255
 * Default value: 0
 */
-#define DEF_MAX_ON_DURATION 0
+#define DEF_MAX_ON_DURATION 100u

 /**********************************************************/
 /***************** Slider/Wheel Parameters ****************/
 /**********************************************************/
 /* Defines the number of scrollers (sliders or wheels)
 */
-#define DEF_NUM_SCROLLERS 1
+#define DEF_NUM_SCROLLERS 1u

 /* Defines scroller parameter setting
 * {touch_scroller_type, touch_start_key, touch_scroller_size,
@ -352,8 +352,8 @@ SUBSTITUTE  GOODS,  TECHNOLOGY,  SERVICES,  OR  ANY  CLAIMS  BY  THIRD   PARTIES
 */
 #define SCROLLER_0_PARAMS                                                                                       \
 {                                                                                                              \
-    SCROLLER_TYPE_SLIDER, 0, 5,                            \
-		SCROLLER_RESOL_DEADBAND(SCR_RESOL_8_BIT, DB_NONE),8,20\
+    (uint8_t)SCROLLER_TYPE_SLIDER, 0u, 5u,                            \
+		SCROLLER_RESOL_DEADBAND((uint8_t)SCR_RESOL_8_BIT, (uint8_t)SCR_DB_NONE),(uint8_t)8,20\
 }

 /**********************************************************/
@ -364,28 +364,28 @@ SUBSTITUTE  GOODS,  TECHNOLOGY,  SERVICES,  OR  ANY  CLAIMS  BY  THIRD   PARTIES
 * Start key of horizontal axis
 * Range: 0 to 65534
 */
-#define SURFACE_CS_START_KEY_H 10
+#define SURFACE_CS_START_KEY_H 10u
 /* Horizontal Number of Channel <0-255>
 * Number of Channels forming horizontal axis
 * Range: 0 to 255
 */
-#define SURFACE_CS_NUM_KEYS_H 5
+#define SURFACE_CS_NUM_KEYS_H 5u
 /* Vertical Start Key <0-65534>
 * Start key of vertical axis
 * Range: 0 to 65534
 */
-#define SURFACE_CS_START_KEY_V 5
+#define SURFACE_CS_START_KEY_V 5u
 /* Vertical Number of Channel <0-255>
 * Number of Channels forming vertical axis
 * Range: 0 to 255
 */
-#define SURFACE_CS_NUM_KEYS_V 5
+#define SURFACE_CS_NUM_KEYS_V 5u
 /*  Position Resolution and Deadband Percentage
 *  Full scale position resolution reported for the axis and the deadband Percentage
 *  RESOL_2_BIT - RESOL_12_BIT
 *  DB_NONE - DB_15_PERCENT
 */
-#define SURFACE_CS_RESOL_DB SCR_RESOL_DEADBAND(RESOL_8_BIT, DB_1_PERCENT)
+#define SURFACE_CS_RESOL_DB SCR_RESOL_DEADBAND((uint8_t)RESOL_8_BIT, (uint8_t)DB_1_PERCENT)
 /* Median filter enable and  IIR filter Config
 * Median Filter <0-1>
 * Enable or Disable Median Filter
@ -398,17 +398,17 @@ SUBSTITUTE  GOODS,  TECHNOLOGY,  SERVICES,  OR  ANY  CLAIMS  BY  THIRD   PARTIES
 *  2 - 50%
 *  3 - 75%
 */
-#define SURFACE_CS_FILT_CFG SCR_MEDIAN_IIR(1, 3)
+#define SURFACE_CS_FILT_CFG SCR_MEDIAN_IIR(1u, 3u)
 /* Position Hystersis <0-255>
 * The minimum travel distance to be reported after contact or direction change
 * Applicable to Horizontal and Vertical directions
 */
-#define SURFACE_CS_POS_HYST 3
+#define SURFACE_CS_POS_HYST 3u
 /* Minimum Contact <0-65534>
 * The minimum contact size measurement for persistent contact tracking.
 * Contact size is the sum of neighbouring keys' touch deltas forming the touch contact.
 */
-#define SURFACE_CS_MIN_CONTACT 60
+#define SURFACE_CS_MIN_CONTACT 60u


 /**********************************************************/
@ -419,11 +419,11 @@ SUBSTITUTE  GOODS,  TECHNOLOGY,  SERVICES,  OR  ANY  CLAIMS  BY  THIRD   PARTIES
 * Range: 3 to 7.
 * Default value: 3
 */
-#define NUM_FREQ_STEPS 3
+#define NUM_FREQ_STEPS 3u

 /* PTC Sampling Delay Selection - 0 to 15 PTC CLK cycles */

-#define DEF_MEDIAN_FILTER_FREQUENCIES FREQ_SEL_0,FREQ_SEL_1,FREQ_SEL_2
+#define DEF_MEDIAN_FILTER_FREQUENCIES (uint8_t)FREQ_SEL_0,(uint8_t)FREQ_SEL_1,(uint8_t)FREQ_SEL_2


 /**********************************************************/
@ -437,6 +437,27 @@ SUBSTITUTE  GOODS,  TECHNOLOGY,  SERVICES,  OR  ANY  CLAIMS  BY  THIRD   PARTIES



+/* Acquisition variables */
+extern qtm_acq_node_data_t ptc_qtlib_node_stat1[DEF_NUM_CHANNELS];
+extern qtm_acq_same51_node_config_t ptc_seq_node_cfg1[DEF_NUM_CHANNELS];
+
+
+/* Keys variables */
+extern qtm_touch_key_group_config_t qtlib_key_grp_config_set1;
+extern qtm_touch_key_data_t qtlib_key_data_set1[DEF_NUM_SENSORS];
+extern qtm_touch_key_config_t qtlib_key_configs_set1[DEF_NUM_SENSORS];
+/* Scroller variables */
+extern qtm_scroller_config_t qtm_scroller_config1[DEF_NUM_SCROLLERS];
+extern qtm_scroller_data_t qtm_scroller_data1[DEF_NUM_SCROLLERS];
+extern qtm_freq_hop_config_t qtm_freq_hop_config1;
+/* Surface variables */
+extern qtm_surface_cs_config_t  qtm_surface_cs_config1;
+extern qtm_surface_contact_data_t qtm_surface_cs_data1;
+extern uint8_t module_error_code;
+
+
+extern volatile uint8_t measurement_done_touch;
+
 // DOM-IGNORE-BEGIN
 #ifdef __cplusplus  // Provide C++ Compatibility

--- a/firmware/src/config/mcal/touch/touch_api_ptc.h
+++ b/firmware/src/config/mcal/touch/touch_api_ptc.h
@ -1,6 +1,6 @@

 /*******************************************************************************
-  Touch Library v3.12.1 Release
+  Touch Library v3.16.0 Release

  Company:
    Microchip Technology Inc.
@ -17,27 +17,27 @@
 *******************************************************************************/

 /*******************************************************************************
-Copyright (c)  2022 released Microchip Technology Inc.  All rights reserved.
+Copyright (C) [2024], Microchip Technology Inc., and its subsidiaries. All rights reserved.

-Microchip licenses to you the right to use, modify, copy and distribute
-Software only when embedded on a Microchip microcontroller or digital signal
-controller that is integrated into your product or third party product
-(pursuant to the sublicense terms in the accompanying license agreement).
+The software and documentation is provided by microchip and its contributors
+"as is" and any express, implied or statutory warranties, including, but not
+limited to, the implied warranties of merchantability, fitness for a particular
+purpose and non-infringement of third party intellectual property rights are
+disclaimed to the fullest extent permitted by law. In no event shall microchip
+or its contributors be liable for any direct, indirect, incidental, special,
+exemplary, or consequential damages (including, but not limited to, procurement
+of substitute goods or services; loss of use, data, or profits; or business
+interruption) however caused and on any theory of liability, whether in contract,
+strict liability, or tort (including negligence or otherwise) arising in any way
+out of the use of the software and documentation, even if advised of the
+possibility of such damage.

-You should refer to the license agreement accompanying this Software for
-additional information regarding your rights and obligations.
-
-SOFTWARE AND DOCUMENTATION ARE PROVIDED AS IS  WITHOUT  WARRANTY  OF  ANY  KIND,
-EITHER EXPRESS  OR  IMPLIED,  INCLUDING  WITHOUT  LIMITATION,  ANY  WARRANTY  OF
-MERCHANTABILITY, TITLE, NON-INFRINGEMENT AND FITNESS FOR A  PARTICULAR  PURPOSE.
-IN NO EVENT SHALL MICROCHIP OR  ITS  LICENSORS  BE  LIABLE  OR  OBLIGATED  UNDER
-CONTRACT, NEGLIGENCE, STRICT LIABILITY, CONTRIBUTION,  BREACH  OF  WARRANTY,  OR
-OTHER LEGAL  EQUITABLE  THEORY  ANY  DIRECT  OR  INDIRECT  DAMAGES  OR  EXPENSES
-INCLUDING BUT NOT LIMITED TO ANY  INCIDENTAL,  SPECIAL,  INDIRECT,  PUNITIVE  OR
-CONSEQUENTIAL DAMAGES, LOST  PROFITS  OR  LOST  DATA,  COST  OF  PROCUREMENT  OF
-SUBSTITUTE  GOODS,  TECHNOLOGY,  SERVICES,  OR  ANY  CLAIMS  BY  THIRD   PARTIES
-(INCLUDING BUT NOT LIMITED TO ANY DEFENSE  THEREOF),  OR  OTHER  SIMILAR  COSTS.
-*******************************************************************************/
+Except as expressly permitted hereunder and subject to the applicable license terms
+for any third-party software incorporated in the software and any applicable open
+source software license terms, no license or other rights, whether express or
+implied, are granted under any patent or other intellectual property rights of
+Microchip or any third party.
+************************************************************************************/

 #ifndef TOUCH_API_PTC_H
 #define TOUCH_API_PTC_H
@ -74,7 +74,7 @@ uint16_t get_scroller_position(uint16_t sensor_node);
 #define HOR_POS 0u
 #define VER_POS 1u
 uint8_t get_surface_status(void);
-uint8_t get_surface_position(uint8_t ver_or_hor);
+uint16_t get_surface_position(uint8_t ver_or_hor);

 void touch_timer_handler(void);
 void touch_init(void);
--- a/firmware/src/config/mcal/touch/touch_example.c
+++ b/firmware/src/config/mcal/touch/touch_example.c
@ -1,5 +1,5 @@
 /*******************************************************************************
-  Touch Library v3.12.1 Release
+  Touch Library v3.16.0 Release

  Company:
    Microchip Technology Inc.
@ -17,27 +17,27 @@
 *******************************************************************************/

 /*******************************************************************************
-Copyright (c)  2022 released Microchip Technology Inc.  All rights reserved.
+Copyright (C) [2024], Microchip Technology Inc., and its subsidiaries. All rights reserved.

-Microchip licenses to you the right to use, modify, copy and distribute
-Software only when embedded on a Microchip microcontroller or digital signal
-controller that is integrated into your product or third party product
-(pursuant to the sublicense terms in the accompanying license agreement).
+The software and documentation is provided by microchip and its contributors
+"as is" and any express, implied or statutory warranties, including, but not
+limited to, the implied warranties of merchantability, fitness for a particular
+purpose and non-infringement of third party intellectual property rights are
+disclaimed to the fullest extent permitted by law. In no event shall microchip
+or its contributors be liable for any direct, indirect, incidental, special,
+exemplary, or consequential damages (including, but not limited to, procurement
+of substitute goods or services; loss of use, data, or profits; or business
+interruption) however caused and on any theory of liability, whether in contract,
+strict liability, or tort (including negligence or otherwise) arising in any way
+out of the use of the software and documentation, even if advised of the
+possibility of such damage.

-You should refer to the license agreement accompanying this Software for
-additional information regarding your rights and obligations.
-
-SOFTWARE AND DOCUMENTATION ARE PROVIDED AS IS  WITHOUT  WARRANTY  OF  ANY  KIND,
-EITHER EXPRESS  OR  IMPLIED,  INCLUDING  WITHOUT  LIMITATION,  ANY  WARRANTY  OF
-MERCHANTABILITY, TITLE, NON-INFRINGEMENT AND FITNESS FOR A  PARTICULAR  PURPOSE.
-IN NO EVENT SHALL MICROCHIP OR  ITS  LICENSORS  BE  LIABLE  OR  OBLIGATED  UNDER
-CONTRACT, NEGLIGENCE, STRICT LIABILITY, CONTRIBUTION,  BREACH  OF  WARRANTY,  OR
-OTHER LEGAL  EQUITABLE  THEORY  ANY  DIRECT  OR  INDIRECT  DAMAGES  OR  EXPENSES
-INCLUDING BUT NOT LIMITED TO ANY  INCIDENTAL,  SPECIAL,  INDIRECT,  PUNITIVE  OR
-CONSEQUENTIAL DAMAGES, LOST  PROFITS  OR  LOST  DATA,  COST  OF  PROCUREMENT  OF
-SUBSTITUTE  GOODS,  TECHNOLOGY,  SERVICES,  OR  ANY  CLAIMS  BY  THIRD   PARTIES
-(INCLUDING BUT NOT LIMITED TO ANY DEFENSE  THEREOF),  OR  OTHER  SIMILAR  COSTS.
-*******************************************************************************/
+Except as expressly permitted hereunder and subject to the applicable license terms
+for any third-party software incorporated in the software and any applicable open
+source software license terms, no license or other rights, whether express or
+implied, are granted under any patent or other intellectual property rights of
+Microchip or any third party.
+************************************************************************************/


 #include "touch_example.h"
@ -47,9 +47,9 @@ void touch_mainloop_example(void){
    /* call touch process function */
    touch_process();

-    if(measurement_done_touch == 1)
+    if(measurement_done_touch == 1u)
    {
-        measurement_done_touch = 0;
+        measurement_done_touch = 0u;
        // process touch data
    }

@ -64,53 +64,51 @@ Input  : none
 Output : none
 Notes  : none
 ============================================================================*/
-bool CAP_TJP_SNS[2];
-bool CAP_RES_SNS[2];
-bool CAP_CANCEL_SNS[2];
-
 void touch_status_display(void)
 {
 uint8_t key_status = 0u;
+uint8_t scroller_status = 0u;
+uint16_t scroller_position = 0u;
    key_status = get_sensor_state(0) & KEY_TOUCHED_MASK;
    if (0u != key_status) {
-        CAP_TJP_SNS[0] = true;
+        //Touch detect
    } else {
-        CAP_TJP_SNS[0] = false;
+        //Touch No detect
    }

    key_status = get_sensor_state(1) & KEY_TOUCHED_MASK;
    if (0u != key_status) {
-        CAP_TJP_SNS[1] = true;
+        //Touch detect
    } else {
-        CAP_TJP_SNS[1] = false;
+        //Touch No detect
    }

    key_status = get_sensor_state(2) & KEY_TOUCHED_MASK;
    if (0u != key_status) {
-        CAP_RES_SNS[0] = true;
+        //Touch detect
    } else {
-        CAP_RES_SNS[0] = false;
+        //Touch No detect
    }

    key_status = get_sensor_state(3) & KEY_TOUCHED_MASK;
    if (0u != key_status) {
-        CAP_RES_SNS[1] = true;
+        //Touch detect
    } else {
-        CAP_RES_SNS[1] = false;
+        //Touch No detect
    }

    key_status = get_sensor_state(4) & KEY_TOUCHED_MASK;
    if (0u != key_status) {
-        CAP_CANCEL_SNS[0] = true;
+        //Touch detect
    } else {
-        CAP_CANCEL_SNS[0] = false;
+        //Touch No detect
    }

    key_status = get_sensor_state(5) & KEY_TOUCHED_MASK;
    if (0u != key_status) {
-        CAP_CANCEL_SNS[1] = true;
+        //Touch detect
    } else {
-        CAP_CANCEL_SNS[1] = false;
+        //Touch No detect
    }

    key_status = get_sensor_state(6) & KEY_TOUCHED_MASK;
@ -176,13 +174,43 @@ uint8_t key_status = 0u;
        //Touch No detect
    }

-    key_status = get_sensor_state(15) & KEY_TOUCHED_MASK;
-    if (0u != key_status) {
-        //Touch detect
-    } else {
-        //Touch No detect
-    }

+    scroller_status = get_scroller_state(0);
+    scroller_position = get_scroller_position(0);
+    //Example: 8 bit scroller resolution. Modify as per requirement.
+    scroller_position = scroller_position  >> 5u;
+    //LED_OFF
+    if ( 0u != scroller_status) {
+        switch (scroller_position) {
+        case 0:
+            //LED0_ON
+            break;
+        case 1:
+            //LED1_ON
+            break;
+        case 2:
+            //LED2_ON
+            break;
+        case 3:
+            //LED3_ON
+            break;
+        case 4:
+            //LED4_ON
+            break;
+        case 5:
+            //LED5_ON
+            break;
+        case 6:
+            //LED6_ON
+            break;
+        case 7:
+            //LED7_ON
+            break;
+        default:
+            //LED_OFF
+            break;
+        }
+    }

 }

--- a/firmware/src/config/mcal/touch/touch_example.h
+++ b/firmware/src/config/mcal/touch/touch_example.h
@ -1,5 +1,5 @@
 /*******************************************************************************
-  Touch Library v3.12.1 Release
+  Touch Library v3.16.0 Release

  Company:
    Microchip Technology Inc.
@ -17,27 +17,37 @@
 *******************************************************************************/

 /*******************************************************************************
-Copyright (c)  2022 released Microchip Technology Inc.  All rights reserved.
+Copyright (C) [2024], Microchip Technology Inc., and its subsidiaries. All rights reserved.

-Microchip licenses to you the right to use, modify, copy and distribute
-Software only when embedded on a Microchip microcontroller or digital signal
-controller that is integrated into your product or third party product
-(pursuant to the sublicense terms in the accompanying license agreement).
+The software and documentation is provided by microchip and its contributors
+"as is" and any express, implied or statutory warranties, including, but not
+limited to, the implied warranties of merchantability, fitness for a particular
+purpose and non-infringement of third party intellectual property rights are
+disclaimed to the fullest extent permitted by law. In no event shall microchip
+or its contributors be liable for any direct, indirect, incidental, special,
+exemplary, or consequential damages (including, but not limited to, procurement
+of substitute goods or services; loss of use, data, or profits; or business
+interruption) however caused and on any theory of liability, whether in contract,
+strict liability, or tort (including negligence or otherwise) arising in any way
+out of the use of the software and documentation, even if advised of the
+possibility of such damage.

-You should refer to the license agreement accompanying this Software for
-additional information regarding your rights and obligations.
+Except as expressly permitted hereunder and subject to the applicable license terms
+for any third-party software incorporated in the software and any applicable open
+source software license terms, no license or other rights, whether express or
+implied, are granted under any patent or other intellectual property rights of
+Microchip or any third party.
+************************************************************************************/
+#ifndef TOUCH_EXMAPLE_H
+#define TOUCH_EXMAPLE_H

-SOFTWARE AND DOCUMENTATION ARE PROVIDED AS IS  WITHOUT  WARRANTY  OF  ANY  KIND,
-EITHER EXPRESS  OR  IMPLIED,  INCLUDING  WITHOUT  LIMITATION,  ANY  WARRANTY  OF
-MERCHANTABILITY, TITLE, NON-INFRINGEMENT AND FITNESS FOR A  PARTICULAR  PURPOSE.
-IN NO EVENT SHALL MICROCHIP OR  ITS  LICENSORS  BE  LIABLE  OR  OBLIGATED  UNDER
-CONTRACT, NEGLIGENCE, STRICT LIABILITY, CONTRIBUTION,  BREACH  OF  WARRANTY,  OR
-OTHER LEGAL  EQUITABLE  THEORY  ANY  DIRECT  OR  INDIRECT  DAMAGES  OR  EXPENSES
-INCLUDING BUT NOT LIMITED TO ANY  INCIDENTAL,  SPECIAL,  INDIRECT,  PUNITIVE  OR
-CONSEQUENTIAL DAMAGES, LOST  PROFITS  OR  LOST  DATA,  COST  OF  PROCUREMENT  OF
-SUBSTITUTE  GOODS,  TECHNOLOGY,  SERVICES,  OR  ANY  CLAIMS  BY  THIRD   PARTIES
-(INCLUDING BUT NOT LIMITED TO ANY DEFENSE  THEREOF),  OR  OTHER  SIMILAR  COSTS.
-*******************************************************************************/
+// DOM-IGNORE-BEGIN
+#ifdef __cplusplus  // Provide C++ Compatibility
+
+    extern "C" {
+
+#endif
+// DOM-IGNORE-END


 #include <stddef.h>                     // Defines NULL
@ -46,9 +56,13 @@ SUBSTITUTE  GOODS,  TECHNOLOGY,  SERVICES,  OR  ANY  CLAIMS  BY  THIRD   PARTIES
 #include "definitions.h"                // SYS function prototypes
 #include "touch.h"

-
-
-extern volatile uint8_t measurement_done_touch;
-
 void touch_mainloop_example(void);
 void touch_status_display(void);
+// DOM-IGNORE-BEGIN
+#ifdef __cplusplus  // Provide C++ Compatibility
+
+    }
+
+#endif
+// DOM-IGNORE-END
+#endif // TOUCH_H
--- a/firmware/src/main.c
+++ b/firmware/src/main.c
@ -217,7 +217,7 @@ int main ( void )
    SYS_Initialize ( NULL );
    //Tle9263_Init();
    Calib_Init();
-    WDT_TimeoutPeriodSet(1);
+    WDT_TimeoutPeriodSet(3);
    SysTick_1ms_Period = SYSTICK_TimerPeriodGet() + 1;
    SYSTICK_TimerCallbackSet(OS_TimerCallback, 0);
    SYSTICK_TimerStart();
@ -244,7 +244,7 @@ int main ( void )

    P417_SWTR_App_initialize();
    
-    //WDT_Enable();
+    WDT_Enable();
    InicialitzaTPTask(ISO15765_2_REPROGONCAN_HANDLER);
    InicialitzaIso15765_3Task();
    Dem_Init();
--- a/firmware/src/packs/ATSAME51J19A_DFP/component/ac.h
+++ b/firmware/src/packs/ATSAME51J19A_DFP/component/ac.h
@ -1,7 +1,7 @@
 /*
 * Component description for AC
 *
- * Copyright (c) 2022 Microchip Technology Inc. and its subsidiaries.
+ * Copyright (c) 2023 Microchip Technology Inc. and its subsidiaries.
 *
 * Subject to your compliance with these terms, you may use Microchip software and any derivatives
 * exclusively with Microchip products. It is your responsibility to comply with third party license
@ -20,7 +20,7 @@
 *
 */

-/* file generated from device description version 2022-02-14T14:27:15Z */
+/* file generated from device description version 2023-03-17T09:49:56Z */
 #ifndef _SAME51_AC_COMPONENT_H_
 #define _SAME51_AC_COMPONENT_H_

--- a/firmware/src/packs/ATSAME51J19A_DFP/component/adc.h
+++ b/firmware/src/packs/ATSAME51J19A_DFP/component/adc.h
@ -1,7 +1,7 @@
 /*
 * Component description for ADC
 *
- * Copyright (c) 2022 Microchip Technology Inc. and its subsidiaries.
+ * Copyright (c) 2023 Microchip Technology Inc. and its subsidiaries.
 *
 * Subject to your compliance with these terms, you may use Microchip software and any derivatives
 * exclusively with Microchip products. It is your responsibility to comply with third party license
@ -20,7 +20,7 @@
 *
 */

-/* file generated from device description version 2022-02-14T14:27:15Z */
+/* file generated from device description version 2023-03-17T09:49:56Z */
 #ifndef _SAME51_ADC_COMPONENT_H_
 #define _SAME51_ADC_COMPONENT_H_

--- a/firmware/src/packs/ATSAME51J19A_DFP/component/aes.h
+++ b/firmware/src/packs/ATSAME51J19A_DFP/component/aes.h
@ -1,7 +1,7 @@
 /*
 * Component description for AES
 *
- * Copyright (c) 2022 Microchip Technology Inc. and its subsidiaries.
+ * Copyright (c) 2023 Microchip Technology Inc. and its subsidiaries.
 *
 * Subject to your compliance with these terms, you may use Microchip software and any derivatives
 * exclusively with Microchip products. It is your responsibility to comply with third party license
@ -20,7 +20,7 @@
 *
 */

-/* file generated from device description version 2022-02-14T14:27:15Z */
+/* file generated from device description version 2023-03-17T09:49:56Z */
 #ifndef _SAME51_AES_COMPONENT_H_
 #define _SAME51_AES_COMPONENT_H_

--- a/firmware/src/packs/ATSAME51J19A_DFP/component/can.h
+++ b/firmware/src/packs/ATSAME51J19A_DFP/component/can.h
@ -1,7 +1,7 @@
 /*
 * Component description for CAN
 *
- * Copyright (c) 2022 Microchip Technology Inc. and its subsidiaries.
+ * Copyright (c) 2023 Microchip Technology Inc. and its subsidiaries.
 *
 * Subject to your compliance with these terms, you may use Microchip software and any derivatives
 * exclusively with Microchip products. It is your responsibility to comply with third party license
@ -20,7 +20,7 @@
 *
 */

-/* file generated from device description version 2022-02-14T14:27:15Z */
+/* file generated from device description version 2023-03-17T09:49:56Z */
 #ifndef _SAME51_CAN_COMPONENT_H_
 #define _SAME51_CAN_COMPONENT_H_

--- a/firmware/src/packs/ATSAME51J19A_DFP/component/ccl.h
+++ b/firmware/src/packs/ATSAME51J19A_DFP/component/ccl.h
@ -1,7 +1,7 @@
 /*
 * Component description for CCL
 *
- * Copyright (c) 2022 Microchip Technology Inc. and its subsidiaries.
+ * Copyright (c) 2023 Microchip Technology Inc. and its subsidiaries.
 *
 * Subject to your compliance with these terms, you may use Microchip software and any derivatives
 * exclusively with Microchip products. It is your responsibility to comply with third party license
@ -20,7 +20,7 @@
 *
 */

-/* file generated from device description version 2022-02-14T14:27:15Z */
+/* file generated from device description version 2023-03-17T09:49:56Z */
 #ifndef _SAME51_CCL_COMPONENT_H_
 #define _SAME51_CCL_COMPONENT_H_

--- a/firmware/src/packs/ATSAME51J19A_DFP/component/cmcc.h
+++ b/firmware/src/packs/ATSAME51J19A_DFP/component/cmcc.h
@ -1,7 +1,7 @@
 /*
 * Component description for CMCC
 *
- * Copyright (c) 2022 Microchip Technology Inc. and its subsidiaries.
+ * Copyright (c) 2023 Microchip Technology Inc. and its subsidiaries.
 *
 * Subject to your compliance with these terms, you may use Microchip software and any derivatives
 * exclusively with Microchip products. It is your responsibility to comply with third party license
@ -20,7 +20,7 @@
 *
 */

-/* file generated from device description version 2022-02-14T14:27:15Z */
+/* file generated from device description version 2023-03-17T09:49:56Z */
 #ifndef _SAME51_CMCC_COMPONENT_H_
 #define _SAME51_CMCC_COMPONENT_H_

--- a/firmware/src/packs/ATSAME51J19A_DFP/component/dac.h
+++ b/firmware/src/packs/ATSAME51J19A_DFP/component/dac.h
@ -1,7 +1,7 @@
 /*
 * Component description for DAC
 *
- * Copyright (c) 2022 Microchip Technology Inc. and its subsidiaries.
+ * Copyright (c) 2023 Microchip Technology Inc. and its subsidiaries.
 *
 * Subject to your compliance with these terms, you may use Microchip software and any derivatives
 * exclusively with Microchip products. It is your responsibility to comply with third party license
@ -20,7 +20,7 @@
 *
 */

-/* file generated from device description version 2022-02-14T14:27:15Z */
+/* file generated from device description version 2023-03-17T09:49:56Z */
 #ifndef _SAME51_DAC_COMPONENT_H_
 #define _SAME51_DAC_COMPONENT_H_

--- a/firmware/src/packs/ATSAME51J19A_DFP/component/dmac.h
+++ b/firmware/src/packs/ATSAME51J19A_DFP/component/dmac.h
@ -1,7 +1,7 @@
 /*
 * Component description for DMAC
 *
- * Copyright (c) 2022 Microchip Technology Inc. and its subsidiaries.
+ * Copyright (c) 2023 Microchip Technology Inc. and its subsidiaries.
 *
 * Subject to your compliance with these terms, you may use Microchip software and any derivatives
 * exclusively with Microchip products. It is your responsibility to comply with third party license
@ -20,7 +20,7 @@
 *
 */

-/* file generated from device description version 2022-02-14T14:27:15Z */
+/* file generated from device description version 2023-03-17T09:49:56Z */
 #ifndef _SAME51_DMAC_COMPONENT_H_
 #define _SAME51_DMAC_COMPONENT_H_

--- a/firmware/src/packs/ATSAME51J19A_DFP/component/dsu.h
+++ b/firmware/src/packs/ATSAME51J19A_DFP/component/dsu.h
@ -1,7 +1,7 @@
 /*
 * Component description for DSU
 *
- * Copyright (c) 2022 Microchip Technology Inc. and its subsidiaries.
+ * Copyright (c) 2023 Microchip Technology Inc. and its subsidiaries.
 *
 * Subject to your compliance with these terms, you may use Microchip software and any derivatives
 * exclusively with Microchip products. It is your responsibility to comply with third party license
@ -20,7 +20,7 @@
 *
 */

-/* file generated from device description version 2022-02-14T14:27:15Z */
+/* file generated from device description version 2023-03-17T09:49:56Z */
 #ifndef _SAME51_DSU_COMPONENT_H_
 #define _SAME51_DSU_COMPONENT_H_

@ -148,32 +148,26 @@
 #define DSU_DID_SERIES_Pos                    _UINT32_(16)                                         /* (DSU_DID) Series Position */
 #define DSU_DID_SERIES_Msk                    (_UINT32_(0x3F) << DSU_DID_SERIES_Pos)               /* (DSU_DID) Series Mask */
 #define DSU_DID_SERIES(value)                 (DSU_DID_SERIES_Msk & (_UINT32_(value) << DSU_DID_SERIES_Pos)) /* Assigment of value for SERIES in the DSU_DID register */
-#define   DSU_DID_SERIES_0_Val                _UINT32_(0x0)                                        /* (DSU_DID) Cortex-M0+ processor, basic feature set  */
-#define   DSU_DID_SERIES_1_Val                _UINT32_(0x1)                                        /* (DSU_DID) Cortex-M0+ processor, USB  */
-#define DSU_DID_SERIES_0                      (DSU_DID_SERIES_0_Val << DSU_DID_SERIES_Pos)         /* (DSU_DID) Cortex-M0+ processor, basic feature set Position  */
-#define DSU_DID_SERIES_1                      (DSU_DID_SERIES_1_Val << DSU_DID_SERIES_Pos)         /* (DSU_DID) Cortex-M0+ processor, USB Position  */
+#define   DSU_DID_SERIES_SAME51_Val           _UINT32_(0x1)                                        /* (DSU_DID) SAM E51  */
+#define   DSU_DID_SERIES_SAME53_Val           _UINT32_(0x3)                                        /* (DSU_DID) SAM E53  */
+#define   DSU_DID_SERIES_SAME54_Val           _UINT32_(0x4)                                        /* (DSU_DID) SAM E54  */
+#define   DSU_DID_SERIES_SAMD51_Val           _UINT32_(0x6)                                        /* (DSU_DID) SAM D51  */
+#define DSU_DID_SERIES_SAME51                 (DSU_DID_SERIES_SAME51_Val << DSU_DID_SERIES_Pos)    /* (DSU_DID) SAM E51 Position  */
+#define DSU_DID_SERIES_SAME53                 (DSU_DID_SERIES_SAME53_Val << DSU_DID_SERIES_Pos)    /* (DSU_DID) SAM E53 Position  */
+#define DSU_DID_SERIES_SAME54                 (DSU_DID_SERIES_SAME54_Val << DSU_DID_SERIES_Pos)    /* (DSU_DID) SAM E54 Position  */
+#define DSU_DID_SERIES_SAMD51                 (DSU_DID_SERIES_SAMD51_Val << DSU_DID_SERIES_Pos)    /* (DSU_DID) SAM D51 Position  */
 #define DSU_DID_FAMILY_Pos                    _UINT32_(23)                                         /* (DSU_DID) Family Position */
 #define DSU_DID_FAMILY_Msk                    (_UINT32_(0x1F) << DSU_DID_FAMILY_Pos)               /* (DSU_DID) Family Mask */
 #define DSU_DID_FAMILY(value)                 (DSU_DID_FAMILY_Msk & (_UINT32_(value) << DSU_DID_FAMILY_Pos)) /* Assigment of value for FAMILY in the DSU_DID register */
-#define   DSU_DID_FAMILY_0_Val                _UINT32_(0x0)                                        /* (DSU_DID) General purpose microcontroller  */
-#define   DSU_DID_FAMILY_1_Val                _UINT32_(0x1)                                        /* (DSU_DID) PicoPower  */
-#define DSU_DID_FAMILY_0                      (DSU_DID_FAMILY_0_Val << DSU_DID_FAMILY_Pos)         /* (DSU_DID) General purpose microcontroller Position  */
-#define DSU_DID_FAMILY_1                      (DSU_DID_FAMILY_1_Val << DSU_DID_FAMILY_Pos)         /* (DSU_DID) PicoPower Position  */
+#define   DSU_DID_FAMILY_SAMD5X_Val           _UINT32_(0x0)                                        /* (DSU_DID) General purpose microcontroller  */
+#define   DSU_DID_FAMILY_SAME5X_Val           _UINT32_(0x3)                                        /* (DSU_DID) PicoPower  */
+#define DSU_DID_FAMILY_SAMD5X                 (DSU_DID_FAMILY_SAMD5X_Val << DSU_DID_FAMILY_Pos)    /* (DSU_DID) General purpose microcontroller Position  */
+#define DSU_DID_FAMILY_SAME5X                 (DSU_DID_FAMILY_SAME5X_Val << DSU_DID_FAMILY_Pos)    /* (DSU_DID) PicoPower Position  */
 #define DSU_DID_PROCESSOR_Pos                 _UINT32_(28)                                         /* (DSU_DID) Processor Position */
 #define DSU_DID_PROCESSOR_Msk                 (_UINT32_(0xF) << DSU_DID_PROCESSOR_Pos)             /* (DSU_DID) Processor Mask */
 #define DSU_DID_PROCESSOR(value)              (DSU_DID_PROCESSOR_Msk & (_UINT32_(value) << DSU_DID_PROCESSOR_Pos)) /* Assigment of value for PROCESSOR in the DSU_DID register */
-#define   DSU_DID_PROCESSOR_CM0P_Val          _UINT32_(0x1)                                        /* (DSU_DID) Cortex-M0+  */
-#define   DSU_DID_PROCESSOR_CM23_Val          _UINT32_(0x2)                                        /* (DSU_DID) Cortex-M23  */
-#define   DSU_DID_PROCESSOR_CM3_Val           _UINT32_(0x3)                                        /* (DSU_DID) Cortex-M3  */
-#define   DSU_DID_PROCESSOR_CM4_Val           _UINT32_(0x5)                                        /* (DSU_DID) Cortex-M4  */
 #define   DSU_DID_PROCESSOR_CM4F_Val          _UINT32_(0x6)                                        /* (DSU_DID) Cortex-M4 with FPU  */
-#define   DSU_DID_PROCESSOR_CM33_Val          _UINT32_(0x7)                                        /* (DSU_DID) Cortex-M33  */
-#define DSU_DID_PROCESSOR_CM0P                (DSU_DID_PROCESSOR_CM0P_Val << DSU_DID_PROCESSOR_Pos) /* (DSU_DID) Cortex-M0+ Position  */
-#define DSU_DID_PROCESSOR_CM23                (DSU_DID_PROCESSOR_CM23_Val << DSU_DID_PROCESSOR_Pos) /* (DSU_DID) Cortex-M23 Position  */
-#define DSU_DID_PROCESSOR_CM3                 (DSU_DID_PROCESSOR_CM3_Val << DSU_DID_PROCESSOR_Pos) /* (DSU_DID) Cortex-M3 Position  */
-#define DSU_DID_PROCESSOR_CM4                 (DSU_DID_PROCESSOR_CM4_Val << DSU_DID_PROCESSOR_Pos) /* (DSU_DID) Cortex-M4 Position  */
 #define DSU_DID_PROCESSOR_CM4F                (DSU_DID_PROCESSOR_CM4F_Val << DSU_DID_PROCESSOR_Pos) /* (DSU_DID) Cortex-M4 with FPU Position  */
-#define DSU_DID_PROCESSOR_CM33                (DSU_DID_PROCESSOR_CM33_Val << DSU_DID_PROCESSOR_Pos) /* (DSU_DID) Cortex-M33 Position  */
 #define DSU_DID_Msk                           _UINT32_(0xFFBFFFFF)                                 /* (DSU_DID) Register Mask  */


--- a/firmware/src/packs/ATSAME51J19A_DFP/component/eic.h
+++ b/firmware/src/packs/ATSAME51J19A_DFP/component/eic.h
@ -1,7 +1,7 @@
 /*
 * Component description for EIC
 *
- * Copyright (c) 2022 Microchip Technology Inc. and its subsidiaries.
+ * Copyright (c) 2023 Microchip Technology Inc. and its subsidiaries.
 *
 * Subject to your compliance with these terms, you may use Microchip software and any derivatives
 * exclusively with Microchip products. It is your responsibility to comply with third party license
@ -20,7 +20,7 @@
 *
 */

-/* file generated from device description version 2022-02-14T14:27:15Z */
+/* file generated from device description version 2023-03-17T09:49:56Z */
 #ifndef _SAME51_EIC_COMPONENT_H_
 #define _SAME51_EIC_COMPONENT_H_

--- a/firmware/src/packs/ATSAME51J19A_DFP/component/evsys.h
+++ b/firmware/src/packs/ATSAME51J19A_DFP/component/evsys.h
@ -1,7 +1,7 @@
 /*
 * Component description for EVSYS
 *
- * Copyright (c) 2022 Microchip Technology Inc. and its subsidiaries.
+ * Copyright (c) 2023 Microchip Technology Inc. and its subsidiaries.
 *
 * Subject to your compliance with these terms, you may use Microchip software and any derivatives
 * exclusively with Microchip products. It is your responsibility to comply with third party license
@ -20,7 +20,7 @@
 *
 */

-/* file generated from device description version 2022-02-14T14:27:15Z */
+/* file generated from device description version 2023-03-17T09:49:56Z */
 #ifndef _SAME51_EVSYS_COMPONENT_H_
 #define _SAME51_EVSYS_COMPONENT_H_

--- a/firmware/src/packs/ATSAME51J19A_DFP/component/freqm.h
+++ b/firmware/src/packs/ATSAME51J19A_DFP/component/freqm.h
@ -1,7 +1,7 @@
 /*
 * Component description for FREQM
 *
- * Copyright (c) 2022 Microchip Technology Inc. and its subsidiaries.
+ * Copyright (c) 2023 Microchip Technology Inc. and its subsidiaries.
 *
 * Subject to your compliance with these terms, you may use Microchip software and any derivatives
 * exclusively with Microchip products. It is your responsibility to comply with third party license
@ -20,7 +20,7 @@
 *
 */

-/* file generated from device description version 2022-02-14T14:27:15Z */
+/* file generated from device description version 2023-03-17T09:49:56Z */
 #ifndef _SAME51_FREQM_COMPONENT_H_
 #define _SAME51_FREQM_COMPONENT_H_

--- a/firmware/src/packs/ATSAME51J19A_DFP/component/fuses.h
+++ b/firmware/src/packs/ATSAME51J19A_DFP/component/fuses.h
@ -1,7 +1,7 @@
 /*
 * Component description for FUSES
 *
- * Copyright (c) 2022 Microchip Technology Inc. and its subsidiaries.
+ * Copyright (c) 2023 Microchip Technology Inc. and its subsidiaries.
 *
 * Subject to your compliance with these terms, you may use Microchip software and any derivatives
 * exclusively with Microchip products. It is your responsibility to comply with third party license
@ -20,7 +20,7 @@
 *
 */

-/* file generated from device description version 2022-02-14T14:27:15Z */
+/* file generated from device description version 2023-03-17T09:49:56Z */
 #ifndef _SAME51_FUSES_COMPONENT_H_
 #define _SAME51_FUSES_COMPONENT_H_

--- a/firmware/src/packs/ATSAME51J19A_DFP/component/gclk.h
+++ b/firmware/src/packs/ATSAME51J19A_DFP/component/gclk.h
@ -1,7 +1,7 @@
 /*
 * Component description for GCLK
 *
- * Copyright (c) 2022 Microchip Technology Inc. and its subsidiaries.
+ * Copyright (c) 2023 Microchip Technology Inc. and its subsidiaries.
 *
 * Subject to your compliance with these terms, you may use Microchip software and any derivatives
 * exclusively with Microchip products. It is your responsibility to comply with third party license
@ -20,7 +20,7 @@
 *
 */

-/* file generated from device description version 2022-02-14T14:27:15Z */
+/* file generated from device description version 2023-03-17T09:49:56Z */
 #ifndef _SAME51_GCLK_COMPONENT_H_
 #define _SAME51_GCLK_COMPONENT_H_

--- a/firmware/src/packs/ATSAME51J19A_DFP/component/hmatrixb.h
+++ b/firmware/src/packs/ATSAME51J19A_DFP/component/hmatrixb.h
@ -1,7 +1,7 @@
 /*
 * Component description for HMATRIXB
 *
- * Copyright (c) 2022 Microchip Technology Inc. and its subsidiaries.
+ * Copyright (c) 2023 Microchip Technology Inc. and its subsidiaries.
 *
 * Subject to your compliance with these terms, you may use Microchip software and any derivatives
 * exclusively with Microchip products. It is your responsibility to comply with third party license
@ -20,7 +20,7 @@
 *
 */

-/* file generated from device description version 2022-02-14T14:27:15Z */
+/* file generated from device description version 2023-03-17T09:49:56Z */
 #ifndef _SAME51_HMATRIXB_COMPONENT_H_
 #define _SAME51_HMATRIXB_COMPONENT_H_

--- a/firmware/src/packs/ATSAME51J19A_DFP/component/i2s.h
+++ b/firmware/src/packs/ATSAME51J19A_DFP/component/i2s.h
@ -1,7 +1,7 @@
 /*
 * Component description for I2S
 *
- * Copyright (c) 2022 Microchip Technology Inc. and its subsidiaries.
+ * Copyright (c) 2023 Microchip Technology Inc. and its subsidiaries.
 *
 * Subject to your compliance with these terms, you may use Microchip software and any derivatives
 * exclusively with Microchip products. It is your responsibility to comply with third party license
@ -20,7 +20,7 @@
 *
 */

-/* file generated from device description version 2022-02-14T14:27:15Z */
+/* file generated from device description version 2023-03-17T09:49:56Z */
 #ifndef _SAME51_I2S_COMPONENT_H_
 #define _SAME51_I2S_COMPONENT_H_

--- a/firmware/src/packs/ATSAME51J19A_DFP/component/icm.h
+++ b/firmware/src/packs/ATSAME51J19A_DFP/component/icm.h
@ -1,7 +1,7 @@
 /*
 * Component description for ICM
 *
- * Copyright (c) 2022 Microchip Technology Inc. and its subsidiaries.
+ * Copyright (c) 2023 Microchip Technology Inc. and its subsidiaries.
 *
 * Subject to your compliance with these terms, you may use Microchip software and any derivatives
 * exclusively with Microchip products. It is your responsibility to comply with third party license
@ -20,7 +20,7 @@
 *
 */

-/* file generated from device description version 2022-02-14T14:27:15Z */
+/* file generated from device description version 2023-03-17T09:49:56Z */
 #ifndef _SAME51_ICM_COMPONENT_H_
 #define _SAME51_ICM_COMPONENT_H_

--- a/firmware/src/packs/ATSAME51J19A_DFP/component/mclk.h
+++ b/firmware/src/packs/ATSAME51J19A_DFP/component/mclk.h
@ -1,7 +1,7 @@
 /*
 * Component description for MCLK
 *
- * Copyright (c) 2022 Microchip Technology Inc. and its subsidiaries.
+ * Copyright (c) 2023 Microchip Technology Inc. and its subsidiaries.
 *
 * Subject to your compliance with these terms, you may use Microchip software and any derivatives
 * exclusively with Microchip products. It is your responsibility to comply with third party license
@ -20,7 +20,7 @@
 *
 */

-/* file generated from device description version 2022-02-14T14:27:15Z */
+/* file generated from device description version 2023-03-17T09:49:56Z */
 #ifndef _SAME51_MCLK_COMPONENT_H_
 #define _SAME51_MCLK_COMPONENT_H_

--- a/firmware/src/packs/ATSAME51J19A_DFP/component/nvmctrl.h
+++ b/firmware/src/packs/ATSAME51J19A_DFP/component/nvmctrl.h
@ -1,7 +1,7 @@
 /*
 * Component description for NVMCTRL
 *
- * Copyright (c) 2022 Microchip Technology Inc. and its subsidiaries.
+ * Copyright (c) 2023 Microchip Technology Inc. and its subsidiaries.
 *
 * Subject to your compliance with these terms, you may use Microchip software and any derivatives
 * exclusively with Microchip products. It is your responsibility to comply with third party license
@ -20,7 +20,7 @@
 *
 */

-/* file generated from device description version 2022-02-14T14:27:15Z */
+/* file generated from device description version 2023-03-17T09:49:56Z */
 #ifndef _SAME51_NVMCTRL_COMPONENT_H_
 #define _SAME51_NVMCTRL_COMPONENT_H_

@ -171,28 +171,10 @@
 #define NVMCTRL_PARAM_SEE_Pos                 _UINT32_(31)                                         /* (NVMCTRL_PARAM) SmartEEPROM Supported Position */
 #define NVMCTRL_PARAM_SEE_Msk                 (_UINT32_(0x1) << NVMCTRL_PARAM_SEE_Pos)             /* (NVMCTRL_PARAM) SmartEEPROM Supported Mask */
 #define NVMCTRL_PARAM_SEE(value)              (NVMCTRL_PARAM_SEE_Msk & (_UINT32_(value) << NVMCTRL_PARAM_SEE_Pos)) /* Assigment of value for SEE in the NVMCTRL_PARAM register */
-#define   NVMCTRL_PARAM_SEE_A_Val             _UINT32_(0xA)                                        /* (NVMCTRL_PARAM) 163840 bytes  */
-#define   NVMCTRL_PARAM_SEE_9_Val             _UINT32_(0x9)                                        /* (NVMCTRL_PARAM) 147456 bytes  */
-#define   NVMCTRL_PARAM_SEE_8_Val             _UINT32_(0x8)                                        /* (NVMCTRL_PARAM) 131072 bytes  */
-#define   NVMCTRL_PARAM_SEE_7_Val             _UINT32_(0x7)                                        /* (NVMCTRL_PARAM) 114688 bytes  */
-#define   NVMCTRL_PARAM_SEE_6_Val             _UINT32_(0x6)                                        /* (NVMCTRL_PARAM) 98304 bytes  */
-#define   NVMCTRL_PARAM_SEE_5_Val             _UINT32_(0x5)                                        /* (NVMCTRL_PARAM) 81920 bytes  */
-#define   NVMCTRL_PARAM_SEE_4_Val             _UINT32_(0x4)                                        /* (NVMCTRL_PARAM) 65536 bytes  */
-#define   NVMCTRL_PARAM_SEE_3_Val             _UINT32_(0x3)                                        /* (NVMCTRL_PARAM) 49152 bytes  */
-#define   NVMCTRL_PARAM_SEE_2_Val             _UINT32_(0x2)                                        /* (NVMCTRL_PARAM) 32768 bytes  */
-#define   NVMCTRL_PARAM_SEE_1_Val             _UINT32_(0x1)                                        /* (NVMCTRL_PARAM) 16384 bytes  */
-#define   NVMCTRL_PARAM_SEE_0_Val             _UINT32_(0x0)                                        /* (NVMCTRL_PARAM) 0 bytes  */
-#define NVMCTRL_PARAM_SEE_A                   (NVMCTRL_PARAM_SEE_A_Val << NVMCTRL_PARAM_SEE_Pos)   /* (NVMCTRL_PARAM) 163840 bytes Position  */
-#define NVMCTRL_PARAM_SEE_9                   (NVMCTRL_PARAM_SEE_9_Val << NVMCTRL_PARAM_SEE_Pos)   /* (NVMCTRL_PARAM) 147456 bytes Position  */
-#define NVMCTRL_PARAM_SEE_8                   (NVMCTRL_PARAM_SEE_8_Val << NVMCTRL_PARAM_SEE_Pos)   /* (NVMCTRL_PARAM) 131072 bytes Position  */
-#define NVMCTRL_PARAM_SEE_7                   (NVMCTRL_PARAM_SEE_7_Val << NVMCTRL_PARAM_SEE_Pos)   /* (NVMCTRL_PARAM) 114688 bytes Position  */
-#define NVMCTRL_PARAM_SEE_6                   (NVMCTRL_PARAM_SEE_6_Val << NVMCTRL_PARAM_SEE_Pos)   /* (NVMCTRL_PARAM) 98304 bytes Position  */
-#define NVMCTRL_PARAM_SEE_5                   (NVMCTRL_PARAM_SEE_5_Val << NVMCTRL_PARAM_SEE_Pos)   /* (NVMCTRL_PARAM) 81920 bytes Position  */
-#define NVMCTRL_PARAM_SEE_4                   (NVMCTRL_PARAM_SEE_4_Val << NVMCTRL_PARAM_SEE_Pos)   /* (NVMCTRL_PARAM) 65536 bytes Position  */
-#define NVMCTRL_PARAM_SEE_3                   (NVMCTRL_PARAM_SEE_3_Val << NVMCTRL_PARAM_SEE_Pos)   /* (NVMCTRL_PARAM) 49152 bytes Position  */
-#define NVMCTRL_PARAM_SEE_2                   (NVMCTRL_PARAM_SEE_2_Val << NVMCTRL_PARAM_SEE_Pos)   /* (NVMCTRL_PARAM) 32768 bytes Position  */
-#define NVMCTRL_PARAM_SEE_1                   (NVMCTRL_PARAM_SEE_1_Val << NVMCTRL_PARAM_SEE_Pos)   /* (NVMCTRL_PARAM) 16384 bytes Position  */
-#define NVMCTRL_PARAM_SEE_0                   (NVMCTRL_PARAM_SEE_0_Val << NVMCTRL_PARAM_SEE_Pos)   /* (NVMCTRL_PARAM) 0 bytes Position  */
+#define   NVMCTRL_PARAM_SEE_SMARTEEPROM_Val   _UINT32_(0x1)                                        /* (NVMCTRL_PARAM) SmartEEPROM is supported  */
+#define   NVMCTRL_PARAM_SEE_NOSMARTEEPROM_Val _UINT32_(0x0)                                        /* (NVMCTRL_PARAM) No SmartEEPROM support  */
+#define NVMCTRL_PARAM_SEE_SMARTEEPROM         (NVMCTRL_PARAM_SEE_SMARTEEPROM_Val << NVMCTRL_PARAM_SEE_Pos) /* (NVMCTRL_PARAM) SmartEEPROM is supported Position  */
+#define NVMCTRL_PARAM_SEE_NOSMARTEEPROM       (NVMCTRL_PARAM_SEE_NOSMARTEEPROM_Val << NVMCTRL_PARAM_SEE_Pos) /* (NVMCTRL_PARAM) No SmartEEPROM support Position  */
 #define NVMCTRL_PARAM_Msk                     _UINT32_(0x8007FFFF)                                 /* (NVMCTRL_PARAM) Register Mask  */


--- a/firmware/src/packs/ATSAME51J19A_DFP/component/osc32kctrl.h
+++ b/firmware/src/packs/ATSAME51J19A_DFP/component/osc32kctrl.h
@ -1,7 +1,7 @@
 /*
 * Component description for OSC32KCTRL
 *
- * Copyright (c) 2022 Microchip Technology Inc. and its subsidiaries.
+ * Copyright (c) 2023 Microchip Technology Inc. and its subsidiaries.
 *
 * Subject to your compliance with these terms, you may use Microchip software and any derivatives
 * exclusively with Microchip products. It is your responsibility to comply with third party license
@ -20,7 +20,7 @@
 *
 */

-/* file generated from device description version 2022-02-14T14:27:15Z */
+/* file generated from device description version 2023-03-17T09:49:56Z */
 #ifndef _SAME51_OSC32KCTRL_COMPONENT_H_
 #define _SAME51_OSC32KCTRL_COMPONENT_H_

--- a/firmware/src/packs/ATSAME51J19A_DFP/component/oscctrl.h
+++ b/firmware/src/packs/ATSAME51J19A_DFP/component/oscctrl.h
@ -1,7 +1,7 @@
 /*
 * Component description for OSCCTRL
 *
- * Copyright (c) 2022 Microchip Technology Inc. and its subsidiaries.
+ * Copyright (c) 2023 Microchip Technology Inc. and its subsidiaries.
 *
 * Subject to your compliance with these terms, you may use Microchip software and any derivatives
 * exclusively with Microchip products. It is your responsibility to comply with third party license
@ -20,7 +20,7 @@
 *
 */

-/* file generated from device description version 2022-02-14T14:27:15Z */
+/* file generated from device description version 2023-03-17T09:49:56Z */
 #ifndef _SAME51_OSCCTRL_COMPONENT_H_
 #define _SAME51_OSCCTRL_COMPONENT_H_

--- a/firmware/src/packs/ATSAME51J19A_DFP/component/pac.h
+++ b/firmware/src/packs/ATSAME51J19A_DFP/component/pac.h
@ -1,7 +1,7 @@
 /*
 * Component description for PAC
 *
- * Copyright (c) 2022 Microchip Technology Inc. and its subsidiaries.
+ * Copyright (c) 2023 Microchip Technology Inc. and its subsidiaries.
 *
 * Subject to your compliance with these terms, you may use Microchip software and any derivatives
 * exclusively with Microchip products. It is your responsibility to comply with third party license
@ -20,7 +20,7 @@
 *
 */

-/* file generated from device description version 2022-02-14T14:27:15Z */
+/* file generated from device description version 2023-03-17T09:49:56Z */
 #ifndef _SAME51_PAC_COMPONENT_H_
 #define _SAME51_PAC_COMPONENT_H_

--- a/firmware/src/packs/ATSAME51J19A_DFP/component/pcc.h
+++ b/firmware/src/packs/ATSAME51J19A_DFP/component/pcc.h
@ -1,7 +1,7 @@
 /*
 * Component description for PCC
 *
- * Copyright (c) 2022 Microchip Technology Inc. and its subsidiaries.
+ * Copyright (c) 2023 Microchip Technology Inc. and its subsidiaries.
 *
 * Subject to your compliance with these terms, you may use Microchip software and any derivatives
 * exclusively with Microchip products. It is your responsibility to comply with third party license
@ -20,7 +20,7 @@
 *
 */

-/* file generated from device description version 2022-02-14T14:27:15Z */
+/* file generated from device description version 2023-03-17T09:49:56Z */
 #ifndef _SAME51_PCC_COMPONENT_H_
 #define _SAME51_PCC_COMPONENT_H_

--- a/firmware/src/packs/ATSAME51J19A_DFP/component/pdec.h
+++ b/firmware/src/packs/ATSAME51J19A_DFP/component/pdec.h
@ -1,7 +1,7 @@
 /*
 * Component description for PDEC
 *
- * Copyright (c) 2022 Microchip Technology Inc. and its subsidiaries.
+ * Copyright (c) 2023 Microchip Technology Inc. and its subsidiaries.
 *
 * Subject to your compliance with these terms, you may use Microchip software and any derivatives
 * exclusively with Microchip products. It is your responsibility to comply with third party license
@ -20,7 +20,7 @@
 *
 */

-/* file generated from device description version 2022-02-14T14:27:15Z */
+/* file generated from device description version 2023-03-17T09:49:56Z */
 #ifndef _SAME51_PDEC_COMPONENT_H_
 #define _SAME51_PDEC_COMPONENT_H_

--- a/firmware/src/packs/ATSAME51J19A_DFP/component/pm.h
+++ b/firmware/src/packs/ATSAME51J19A_DFP/component/pm.h
@ -1,7 +1,7 @@
 /*
 * Component description for PM
 *
- * Copyright (c) 2022 Microchip Technology Inc. and its subsidiaries.
+ * Copyright (c) 2023 Microchip Technology Inc. and its subsidiaries.
 *
 * Subject to your compliance with these terms, you may use Microchip software and any derivatives
 * exclusively with Microchip products. It is your responsibility to comply with third party license
@ -20,7 +20,7 @@
 *
 */

-/* file generated from device description version 2022-02-14T14:27:15Z */
+/* file generated from device description version 2023-03-17T09:49:56Z */
 #ifndef _SAME51_PM_COMPONENT_H_
 #define _SAME51_PM_COMPONENT_H_

--- a/firmware/src/packs/ATSAME51J19A_DFP/component/port.h
+++ b/firmware/src/packs/ATSAME51J19A_DFP/component/port.h
@ -1,7 +1,7 @@
 /*
 * Component description for PORT
 *
- * Copyright (c) 2022 Microchip Technology Inc. and its subsidiaries.
+ * Copyright (c) 2023 Microchip Technology Inc. and its subsidiaries.
 *
 * Subject to your compliance with these terms, you may use Microchip software and any derivatives
 * exclusively with Microchip products. It is your responsibility to comply with third party license
@ -20,7 +20,7 @@
 *
 */

-/* file generated from device description version 2022-02-14T14:27:15Z */
+/* file generated from device description version 2023-03-17T09:49:56Z */
 #ifndef _SAME51_PORT_COMPONENT_H_
 #define _SAME51_PORT_COMPONENT_H_

--- a/firmware/src/packs/ATSAME51J19A_DFP/component/pukcc.h
+++ b/firmware/src/packs/ATSAME51J19A_DFP/component/pukcc.h
@ -1,7 +1,7 @@
 /*
 * Component description for PUKCC
 *
- * Copyright (c) 2022 Microchip Technology Inc. and its subsidiaries.
+ * Copyright (c) 2023 Microchip Technology Inc. and its subsidiaries.
 *
 * Subject to your compliance with these terms, you may use Microchip software and any derivatives
 * exclusively with Microchip products. It is your responsibility to comply with third party license
@ -20,7 +20,7 @@
 *
 */

-/* file generated from device description version 2022-02-14T14:27:15Z */
+/* file generated from device description version 2023-03-17T09:49:56Z */
 #ifndef _SAME51_PUKCC_COMPONENT_H_
 #define _SAME51_PUKCC_COMPONENT_H_

--- a/firmware/src/packs/ATSAME51J19A_DFP/component/qspi.h
+++ b/firmware/src/packs/ATSAME51J19A_DFP/component/qspi.h
@ -1,7 +1,7 @@
 /*
 * Component description for QSPI
 *
- * Copyright (c) 2022 Microchip Technology Inc. and its subsidiaries.
+ * Copyright (c) 2023 Microchip Technology Inc. and its subsidiaries.
 *
 * Subject to your compliance with these terms, you may use Microchip software and any derivatives
 * exclusively with Microchip products. It is your responsibility to comply with third party license
@ -20,7 +20,7 @@
 *
 */

-/* file generated from device description version 2022-02-14T14:27:15Z */
+/* file generated from device description version 2023-03-17T09:49:56Z */
 #ifndef _SAME51_QSPI_COMPONENT_H_
 #define _SAME51_QSPI_COMPONENT_H_

--- a/firmware/src/packs/ATSAME51J19A_DFP/component/ramecc.h
+++ b/firmware/src/packs/ATSAME51J19A_DFP/component/ramecc.h
@ -1,7 +1,7 @@
 /*
 * Component description for RAMECC
 *
- * Copyright (c) 2022 Microchip Technology Inc. and its subsidiaries.
+ * Copyright (c) 2023 Microchip Technology Inc. and its subsidiaries.
 *
 * Subject to your compliance with these terms, you may use Microchip software and any derivatives
 * exclusively with Microchip products. It is your responsibility to comply with third party license
@ -20,7 +20,7 @@
 *
 */

-/* file generated from device description version 2022-02-14T14:27:15Z */
+/* file generated from device description version 2023-03-17T09:49:56Z */
 #ifndef _SAME51_RAMECC_COMPONENT_H_
 #define _SAME51_RAMECC_COMPONENT_H_

--- a/firmware/src/packs/ATSAME51J19A_DFP/component/rstc.h
+++ b/firmware/src/packs/ATSAME51J19A_DFP/component/rstc.h
@ -1,7 +1,7 @@
 /*
 * Component description for RSTC
 *
- * Copyright (c) 2022 Microchip Technology Inc. and its subsidiaries.
+ * Copyright (c) 2023 Microchip Technology Inc. and its subsidiaries.
 *
 * Subject to your compliance with these terms, you may use Microchip software and any derivatives
 * exclusively with Microchip products. It is your responsibility to comply with third party license
@ -20,7 +20,7 @@
 *
 */

-/* file generated from device description version 2022-02-14T14:27:15Z */
+/* file generated from device description version 2023-03-17T09:49:56Z */
 #ifndef _SAME51_RSTC_COMPONENT_H_
 #define _SAME51_RSTC_COMPONENT_H_

--- a/firmware/src/packs/ATSAME51J19A_DFP/component/rtc.h
+++ b/firmware/src/packs/ATSAME51J19A_DFP/component/rtc.h
@ -1,7 +1,7 @@
 /*
 * Component description for RTC
 *
- * Copyright (c) 2022 Microchip Technology Inc. and its subsidiaries.
+ * Copyright (c) 2023 Microchip Technology Inc. and its subsidiaries.
 *
 * Subject to your compliance with these terms, you may use Microchip software and any derivatives
 * exclusively with Microchip products. It is your responsibility to comply with third party license
@ -20,7 +20,7 @@
 *
 */

-/* file generated from device description version 2022-02-14T14:27:15Z */
+/* file generated from device description version 2023-03-17T09:49:56Z */
 #ifndef _SAME51_RTC_COMPONENT_H_
 #define _SAME51_RTC_COMPONENT_H_

@ -1250,15 +1250,6 @@
 #define RTC_MODE1_COMP_Msk                    _UINT16_(0xFFFF)                                     /* (RTC_MODE1_COMP) Register Mask  */


-/* -------- RTC_GP : (RTC Offset: 0x40) (R/W 32) General Purpose -------- */
-#define RTC_GP_RESETVALUE                     _UINT32_(0x00)                                       /*  (RTC_GP) General Purpose  Reset Value */
-
-#define RTC_GP_GP_Pos                         _UINT32_(0)                                          /* (RTC_GP) General Purpose Position */
-#define RTC_GP_GP_Msk                         (_UINT32_(0xFFFFFFFF) << RTC_GP_GP_Pos)              /* (RTC_GP) General Purpose Mask */
-#define RTC_GP_GP(value)                      (RTC_GP_GP_Msk & (_UINT32_(value) << RTC_GP_GP_Pos)) /* Assigment of value for GP in the RTC_GP register */
-#define RTC_GP_Msk                            _UINT32_(0xFFFFFFFF)                                 /* (RTC_GP) Register Mask  */
-
-
 /* -------- RTC_MODE2_ALARM0 : (RTC Offset: 0x20) (R/W 32) MODE2_ALARM Alarm n Value -------- */
 #define RTC_MODE2_ALARM0_RESETVALUE           _UINT32_(0x00)                                       /*  (RTC_MODE2_ALARM0) MODE2_ALARM Alarm n Value  Reset Value */

@ -1361,6 +1352,15 @@
 #define RTC_MODE2_MASK1_Msk                   _UINT8_(0x07)                                        /* (RTC_MODE2_MASK1) Register Mask  */


+/* -------- RTC_GP : (RTC Offset: 0x40) (R/W 32) General Purpose -------- */
+#define RTC_GP_RESETVALUE                     _UINT32_(0x00)                                       /*  (RTC_GP) General Purpose  Reset Value */
+
+#define RTC_GP_GP_Pos                         _UINT32_(0)                                          /* (RTC_GP) General Purpose Position */
+#define RTC_GP_GP_Msk                         (_UINT32_(0xFFFFFFFF) << RTC_GP_GP_Pos)              /* (RTC_GP) General Purpose Mask */
+#define RTC_GP_GP(value)                      (RTC_GP_GP_Msk & (_UINT32_(value) << RTC_GP_GP_Pos)) /* Assigment of value for GP in the RTC_GP register */
+#define RTC_GP_Msk                            _UINT32_(0xFFFFFFFF)                                 /* (RTC_GP) Register Mask  */
+
+
 /* -------- RTC_TAMPCTRL : (RTC Offset: 0x60) (R/W 32) Tamper Control -------- */
 #define RTC_TAMPCTRL_RESETVALUE               _UINT32_(0x00)                                       /*  (RTC_TAMPCTRL) Tamper Control  Reset Value */

@ -1576,15 +1576,15 @@
 #define RTC_MODE1_COMP1_REG_OFST       _UINT32_(0x22)      /* (RTC_MODE1_COMP1) MODE1 Compare n Value Offset */
 #define RTC_MODE1_COMP2_REG_OFST       _UINT32_(0x24)      /* (RTC_MODE1_COMP2) MODE1 Compare n Value Offset */
 #define RTC_MODE1_COMP3_REG_OFST       _UINT32_(0x26)      /* (RTC_MODE1_COMP3) MODE1 Compare n Value Offset */
+#define RTC_MODE2_ALARM0_REG_OFST      _UINT32_(0x20)      /* (RTC_MODE2_ALARM0) MODE2_ALARM Alarm n Value Offset */
+#define RTC_MODE2_MASK0_REG_OFST       _UINT32_(0x24)      /* (RTC_MODE2_MASK0) MODE2_ALARM Alarm n Mask Offset */
+#define RTC_MODE2_ALARM1_REG_OFST      _UINT32_(0x28)      /* (RTC_MODE2_ALARM1) MODE2_ALARM Alarm n Value Offset */
+#define RTC_MODE2_MASK1_REG_OFST       _UINT32_(0x2C)      /* (RTC_MODE2_MASK1) MODE2_ALARM Alarm n Mask Offset */
 #define RTC_GP_REG_OFST                _UINT32_(0x40)      /* (RTC_GP) General Purpose Offset */
 #define RTC_GP0_REG_OFST               _UINT32_(0x40)      /* (RTC_GP0) General Purpose Offset */
 #define RTC_GP1_REG_OFST               _UINT32_(0x44)      /* (RTC_GP1) General Purpose Offset */
 #define RTC_GP2_REG_OFST               _UINT32_(0x48)      /* (RTC_GP2) General Purpose Offset */
 #define RTC_GP3_REG_OFST               _UINT32_(0x4C)      /* (RTC_GP3) General Purpose Offset */
-#define RTC_MODE2_ALARM0_REG_OFST      _UINT32_(0x20)      /* (RTC_MODE2_ALARM0) MODE2_ALARM Alarm n Value Offset */
-#define RTC_MODE2_MASK0_REG_OFST       _UINT32_(0x24)      /* (RTC_MODE2_MASK0) MODE2_ALARM Alarm n Mask Offset */
-#define RTC_MODE2_ALARM1_REG_OFST      _UINT32_(0x28)      /* (RTC_MODE2_ALARM1) MODE2_ALARM Alarm n Value Offset */
-#define RTC_MODE2_MASK1_REG_OFST       _UINT32_(0x2C)      /* (RTC_MODE2_MASK1) MODE2_ALARM Alarm n Mask Offset */
 #define RTC_TAMPCTRL_REG_OFST          _UINT32_(0x60)      /* (RTC_TAMPCTRL) Tamper Control Offset */
 #define RTC_MODE0_TIMESTAMP_REG_OFST   _UINT32_(0x64)      /* (RTC_MODE0_TIMESTAMP) MODE0 Timestamp Offset */
 #define RTC_MODE1_TIMESTAMP_REG_OFST   _UINT32_(0x64)      /* (RTC_MODE1_TIMESTAMP) MODE1 Timestamp Offset */
--- a/firmware/src/packs/ATSAME51J19A_DFP/component/sdhc.h
+++ b/firmware/src/packs/ATSAME51J19A_DFP/component/sdhc.h
@ -1,7 +1,7 @@
 /*
 * Component description for SDHC
 *
- * Copyright (c) 2022 Microchip Technology Inc. and its subsidiaries.
+ * Copyright (c) 2023 Microchip Technology Inc. and its subsidiaries.
 *
 * Subject to your compliance with these terms, you may use Microchip software and any derivatives
 * exclusively with Microchip products. It is your responsibility to comply with third party license
@ -20,7 +20,7 @@
 *
 */

-/* file generated from device description version 2022-02-14T14:27:15Z */
+/* file generated from device description version 2023-03-17T09:49:56Z */
 #ifndef _SAME51_SDHC_COMPONENT_H_
 #define _SAME51_SDHC_COMPONENT_H_

@ -672,10 +672,10 @@
 #define SDHC_EISTR_EMMC_BOOTAE_Pos            _UINT16_(12)                                         /* (SDHC_EISTR) Boot Acknowledge Error Position */
 #define SDHC_EISTR_EMMC_BOOTAE_Msk            (_UINT16_(0x1) << SDHC_EISTR_EMMC_BOOTAE_Pos)        /* (SDHC_EISTR) Boot Acknowledge Error Mask */
 #define SDHC_EISTR_EMMC_BOOTAE(value)         (SDHC_EISTR_EMMC_BOOTAE_Msk & (_UINT16_(value) << SDHC_EISTR_EMMC_BOOTAE_Pos))
-#define   SDHC_EISTR_EMMC_BOOTAE_0_Val        _UINT16_(0x0)                                        /* (SDHC_EISTR) FIFO contains at least one byte  */
-#define   SDHC_EISTR_EMMC_BOOTAE_1_Val        _UINT16_(0x1)                                        /* (SDHC_EISTR) FIFO is empty  */
-#define SDHC_EISTR_EMMC_BOOTAE_0              (SDHC_EISTR_EMMC_BOOTAE_0_Val << SDHC_EISTR_EMMC_BOOTAE_Pos) /* (SDHC_EISTR) FIFO contains at least one byte Position  */
-#define SDHC_EISTR_EMMC_BOOTAE_1              (SDHC_EISTR_EMMC_BOOTAE_1_Val << SDHC_EISTR_EMMC_BOOTAE_Pos) /* (SDHC_EISTR) FIFO is empty Position  */
+#define   SDHC_EISTR_EMMC_BOOTAE_FIFONOTEMPTY_Val _UINT16_(0x0)                                        /* (SDHC_EISTR) FIFO contains at least one byte  */
+#define   SDHC_EISTR_EMMC_BOOTAE_FIFOEMPTY_Val _UINT16_(0x1)                                        /* (SDHC_EISTR) FIFO is empty  */
+#define SDHC_EISTR_EMMC_BOOTAE_FIFONOTEMPTY   (SDHC_EISTR_EMMC_BOOTAE_FIFONOTEMPTY_Val << SDHC_EISTR_EMMC_BOOTAE_Pos) /* (SDHC_EISTR) FIFO contains at least one byte Position  */
+#define SDHC_EISTR_EMMC_BOOTAE_FIFOEMPTY      (SDHC_EISTR_EMMC_BOOTAE_FIFOEMPTY_Val << SDHC_EISTR_EMMC_BOOTAE_Pos) /* (SDHC_EISTR) FIFO is empty Position  */
 #define SDHC_EISTR_EMMC_Msk                   _UINT16_(0x1000)                                      /* (SDHC_EISTR_EMMC) Register Mask  */


@ -1548,10 +1548,10 @@


 /* -------- SDHC_SISR : (SDHC Offset: 0xFC) ( R/ 16) Slot Interrupt Status -------- */
-#define SDHC_SISR_RESETVALUE                  _UINT16_(0x20000)                                    /*  (SDHC_SISR) Slot Interrupt Status  Reset Value */
+#define SDHC_SISR_RESETVALUE                  _UINT16_(0x00)                                       /*  (SDHC_SISR) Slot Interrupt Status  Reset Value */

-#define SDHC_SISR_INTSSL_Pos                  _UINT16_(0)                                          /* (SDHC_SISR) Interrupt Signal for Each Slot Position */
-#define SDHC_SISR_INTSSL_Msk                  (_UINT16_(0x1) << SDHC_SISR_INTSSL_Pos)              /* (SDHC_SISR) Interrupt Signal for Each Slot Mask */
+#define SDHC_SISR_INTSSL_Pos                  _UINT16_(0)                                          /* (SDHC_SISR) Interrupt Signal for Each SDHC Slot Position */
+#define SDHC_SISR_INTSSL_Msk                  (_UINT16_(0x1) << SDHC_SISR_INTSSL_Pos)              /* (SDHC_SISR) Interrupt Signal for Each SDHC Slot Mask */
 #define SDHC_SISR_INTSSL(value)               (SDHC_SISR_INTSSL_Msk & (_UINT16_(value) << SDHC_SISR_INTSSL_Pos)) /* Assigment of value for INTSSL in the SDHC_SISR register */
 #define SDHC_SISR_Msk                         _UINT16_(0x0001)                                     /* (SDHC_SISR) Register Mask  */

@ -1568,6 +1568,15 @@
 #define SDHC_HCVR_Msk                         _UINT16_(0xFFFF)                                     /* (SDHC_HCVR) Register Mask  */


+/* -------- SDHC_APSR : (SDHC Offset: 0x200) ( R/ 32) Additional Present State Register -------- */
+#define SDHC_APSR_RESETVALUE                  _UINT32_(0x0F)                                       /*  (SDHC_APSR) Additional Present State Register  Reset Value */
+
+#define SDHC_APSR_HDATLL_Pos                  _UINT32_(0)                                          /* (SDHC_APSR) High Line Level Position */
+#define SDHC_APSR_HDATLL_Msk                  (_UINT32_(0xF) << SDHC_APSR_HDATLL_Pos)              /* (SDHC_APSR) High Line Level Mask */
+#define SDHC_APSR_HDATLL(value)               (SDHC_APSR_HDATLL_Msk & (_UINT32_(value) << SDHC_APSR_HDATLL_Pos)) /* Assigment of value for HDATLL in the SDHC_APSR register */
+#define SDHC_APSR_Msk                         _UINT32_(0x0000000F)                                 /* (SDHC_APSR) Register Mask  */
+
+
 /* -------- SDHC_MC1R : (SDHC Offset: 0x204) (R/W 8) MMC Control 1 -------- */
 #define SDHC_MC1R_RESETVALUE                  _UINT8_(0x00)                                        /*  (SDHC_MC1R) MMC Control 1  Reset Value */

@ -1717,6 +1726,7 @@
 #define SDHC_PVR7_REG_OFST             _UINT32_(0x6E)      /* (SDHC_PVR7) Preset Value n Offset */
 #define SDHC_SISR_REG_OFST             _UINT32_(0xFC)      /* (SDHC_SISR) Slot Interrupt Status Offset */
 #define SDHC_HCVR_REG_OFST             _UINT32_(0xFE)      /* (SDHC_HCVR) Host Controller Version Offset */
+#define SDHC_APSR_REG_OFST             _UINT32_(0x200)     /* (SDHC_APSR) Additional Present State Register Offset */
 #define SDHC_MC1R_REG_OFST             _UINT32_(0x204)     /* (SDHC_MC1R) MMC Control 1 Offset */
 #define SDHC_MC2R_REG_OFST             _UINT32_(0x205)     /* (SDHC_MC2R) MMC Control 2 Offset */
 #define SDHC_ACR_REG_OFST              _UINT32_(0x208)     /* (SDHC_ACR) AHB Control Offset */
@ -1766,7 +1776,8 @@ typedef struct
  __I   uint8_t                        Reserved4[0x8C];
  __I   uint16_t                       SDHC_SISR;          /**< Offset: 0xFC (R/   16) Slot Interrupt Status */
  __I   uint16_t                       SDHC_HCVR;          /**< Offset: 0xFE (R/   16) Host Controller Version */
-  __I   uint8_t                        Reserved5[0x104];
+  __I   uint8_t                        Reserved5[0x100];
+  __I   uint32_t                       SDHC_APSR;          /**< Offset: 0x200 (R/   32) Additional Present State Register */
  __IO  uint8_t                        SDHC_MC1R;          /**< Offset: 0x204 (R/W  8) MMC Control 1 */
  __O   uint8_t                        SDHC_MC2R;          /**< Offset: 0x205 ( /W  8) MMC Control 2 */
  __I   uint8_t                        Reserved6[0x02];
--- a/firmware/src/packs/ATSAME51J19A_DFP/component/sercom.h
+++ b/firmware/src/packs/ATSAME51J19A_DFP/component/sercom.h
@ -1,7 +1,7 @@
 /*
 * Component description for SERCOM
 *
- * Copyright (c) 2022 Microchip Technology Inc. and its subsidiaries.
+ * Copyright (c) 2023 Microchip Technology Inc. and its subsidiaries.
 *
 * Subject to your compliance with these terms, you may use Microchip software and any derivatives
 * exclusively with Microchip products. It is your responsibility to comply with third party license
@ -20,7 +20,7 @@
 *
 */

-/* file generated from device description version 2022-02-14T14:27:15Z */
+/* file generated from device description version 2023-03-17T09:49:56Z */
 #ifndef _SAME51_SERCOM_COMPONENT_H_
 #define _SAME51_SERCOM_COMPONENT_H_

--- a/firmware/src/packs/ATSAME51J19A_DFP/component/supc.h
+++ b/firmware/src/packs/ATSAME51J19A_DFP/component/supc.h
@ -1,7 +1,7 @@
 /*
 * Component description for SUPC
 *
- * Copyright (c) 2022 Microchip Technology Inc. and its subsidiaries.
+ * Copyright (c) 2023 Microchip Technology Inc. and its subsidiaries.
 *
 * Subject to your compliance with these terms, you may use Microchip software and any derivatives
 * exclusively with Microchip products. It is your responsibility to comply with third party license
@ -20,7 +20,7 @@
 *
 */

-/* file generated from device description version 2022-02-14T14:27:15Z */
+/* file generated from device description version 2023-03-17T09:49:56Z */
 #ifndef _SAME51_SUPC_COMPONENT_H_
 #define _SAME51_SUPC_COMPONENT_H_

--- a/firmware/src/packs/ATSAME51J19A_DFP/component/tc.h
+++ b/firmware/src/packs/ATSAME51J19A_DFP/component/tc.h
@ -1,7 +1,7 @@
 /*
 * Component description for TC
 *
- * Copyright (c) 2022 Microchip Technology Inc. and its subsidiaries.
+ * Copyright (c) 2023 Microchip Technology Inc. and its subsidiaries.
 *
 * Subject to your compliance with these terms, you may use Microchip software and any derivatives
 * exclusively with Microchip products. It is your responsibility to comply with third party license
@ -20,7 +20,7 @@
 *
 */

-/* file generated from device description version 2022-02-14T14:27:15Z */
+/* file generated from device description version 2023-03-17T09:49:56Z */
 #ifndef _SAME51_TC_COMPONENT_H_
 #define _SAME51_TC_COMPONENT_H_

--- a/firmware/src/packs/ATSAME51J19A_DFP/component/tcc.h
+++ b/firmware/src/packs/ATSAME51J19A_DFP/component/tcc.h
@ -1,7 +1,7 @@
 /*
 * Component description for TCC
 *
- * Copyright (c) 2022 Microchip Technology Inc. and its subsidiaries.
+ * Copyright (c) 2023 Microchip Technology Inc. and its subsidiaries.
 *
 * Subject to your compliance with these terms, you may use Microchip software and any derivatives
 * exclusively with Microchip products. It is your responsibility to comply with third party license
@ -20,7 +20,7 @@
 *
 */

-/* file generated from device description version 2022-02-14T14:27:15Z */
+/* file generated from device description version 2023-03-17T09:49:56Z */
 #ifndef _SAME51_TCC_COMPONENT_H_
 #define _SAME51_TCC_COMPONENT_H_

--- a/firmware/src/packs/ATSAME51J19A_DFP/component/trng.h
+++ b/firmware/src/packs/ATSAME51J19A_DFP/component/trng.h
@ -1,7 +1,7 @@
 /*
 * Component description for TRNG
 *
- * Copyright (c) 2022 Microchip Technology Inc. and its subsidiaries.
+ * Copyright (c) 2023 Microchip Technology Inc. and its subsidiaries.
 *
 * Subject to your compliance with these terms, you may use Microchip software and any derivatives
 * exclusively with Microchip products. It is your responsibility to comply with third party license
@ -20,7 +20,7 @@
 *
 */

-/* file generated from device description version 2022-02-14T14:27:15Z */
+/* file generated from device description version 2023-03-17T09:49:56Z */
 #ifndef _SAME51_TRNG_COMPONENT_H_
 #define _SAME51_TRNG_COMPONENT_H_

--- a/firmware/src/packs/ATSAME51J19A_DFP/component/usb.h
+++ b/firmware/src/packs/ATSAME51J19A_DFP/component/usb.h
@ -1,7 +1,7 @@
 /*
 * Component description for USB
 *
- * Copyright (c) 2022 Microchip Technology Inc. and its subsidiaries.
+ * Copyright (c) 2023 Microchip Technology Inc. and its subsidiaries.
 *
 * Subject to your compliance with these terms, you may use Microchip software and any derivatives
 * exclusively with Microchip products. It is your responsibility to comply with third party license
@ -20,7 +20,7 @@
 *
 */

-/* file generated from device description version 2022-02-14T14:27:15Z */
+/* file generated from device description version 2023-03-17T09:49:56Z */
 #ifndef _SAME51_USB_COMPONENT_H_
 #define _SAME51_USB_COMPONENT_H_

@ -160,10 +160,7 @@
 #define USB_DEVICE_EPCFG_EPTYPE1_Pos          _UINT8_(4)                                           /* (USB_DEVICE_EPCFG) End Point Type1 Position */
 #define USB_DEVICE_EPCFG_EPTYPE1_Msk          (_UINT8_(0x7) << USB_DEVICE_EPCFG_EPTYPE1_Pos)       /* (USB_DEVICE_EPCFG) End Point Type1 Mask */
 #define USB_DEVICE_EPCFG_EPTYPE1(value)       (USB_DEVICE_EPCFG_EPTYPE1_Msk & (_UINT8_(value) << USB_DEVICE_EPCFG_EPTYPE1_Pos)) /* Assigment of value for EPTYPE1 in the USB_DEVICE_EPCFG register */
-#define USB_DEVICE_EPCFG_NYETDIS_Pos          _UINT8_(7)                                           /* (USB_DEVICE_EPCFG) NYET Token Disable Position */
-#define USB_DEVICE_EPCFG_NYETDIS_Msk          (_UINT8_(0x1) << USB_DEVICE_EPCFG_NYETDIS_Pos)       /* (USB_DEVICE_EPCFG) NYET Token Disable Mask */
-#define USB_DEVICE_EPCFG_NYETDIS(value)       (USB_DEVICE_EPCFG_NYETDIS_Msk & (_UINT8_(value) << USB_DEVICE_EPCFG_NYETDIS_Pos)) /* Assigment of value for NYETDIS in the USB_DEVICE_EPCFG register */
-#define USB_DEVICE_EPCFG_Msk                  _UINT8_(0xF7)                                        /* (USB_DEVICE_EPCFG) Register Mask  */
+#define USB_DEVICE_EPCFG_Msk                  _UINT8_(0x77)                                        /* (USB_DEVICE_EPCFG) Register Mask  */


 /* -------- USB_DEVICE_EPSTATUSCLR : (USB Offset: 0x04) ( /W 8) DEVICE_ENDPOINT End Point Pipe Status Clear -------- */
@ -592,27 +589,11 @@
 #define USB_DEVICE_CTRLB_SPDCONF(value)       (USB_DEVICE_CTRLB_SPDCONF_Msk & (_UINT16_(value) << USB_DEVICE_CTRLB_SPDCONF_Pos)) /* Assigment of value for SPDCONF in the USB_DEVICE_CTRLB register */
 #define   USB_DEVICE_CTRLB_SPDCONF_FS_Val     _UINT16_(0x0)                                        /* (USB_DEVICE_CTRLB) FS : Full Speed  */
 #define   USB_DEVICE_CTRLB_SPDCONF_LS_Val     _UINT16_(0x1)                                        /* (USB_DEVICE_CTRLB) LS : Low Speed  */
-#define   USB_DEVICE_CTRLB_SPDCONF_HS_Val     _UINT16_(0x2)                                        /* (USB_DEVICE_CTRLB) HS : High Speed capable  */
-#define   USB_DEVICE_CTRLB_SPDCONF_HSTM_Val   _UINT16_(0x3)                                        /* (USB_DEVICE_CTRLB) HSTM: High Speed Test Mode (force high-speed mode for test mode)  */
 #define USB_DEVICE_CTRLB_SPDCONF_FS           (USB_DEVICE_CTRLB_SPDCONF_FS_Val << USB_DEVICE_CTRLB_SPDCONF_Pos) /* (USB_DEVICE_CTRLB) FS : Full Speed Position  */
 #define USB_DEVICE_CTRLB_SPDCONF_LS           (USB_DEVICE_CTRLB_SPDCONF_LS_Val << USB_DEVICE_CTRLB_SPDCONF_Pos) /* (USB_DEVICE_CTRLB) LS : Low Speed Position  */
-#define USB_DEVICE_CTRLB_SPDCONF_HS           (USB_DEVICE_CTRLB_SPDCONF_HS_Val << USB_DEVICE_CTRLB_SPDCONF_Pos) /* (USB_DEVICE_CTRLB) HS : High Speed capable Position  */
-#define USB_DEVICE_CTRLB_SPDCONF_HSTM         (USB_DEVICE_CTRLB_SPDCONF_HSTM_Val << USB_DEVICE_CTRLB_SPDCONF_Pos) /* (USB_DEVICE_CTRLB) HSTM: High Speed Test Mode (force high-speed mode for test mode) Position  */
 #define USB_DEVICE_CTRLB_NREPLY_Pos           _UINT16_(4)                                          /* (USB_DEVICE_CTRLB) No Reply Position */
 #define USB_DEVICE_CTRLB_NREPLY_Msk           (_UINT16_(0x1) << USB_DEVICE_CTRLB_NREPLY_Pos)       /* (USB_DEVICE_CTRLB) No Reply Mask */
 #define USB_DEVICE_CTRLB_NREPLY(value)        (USB_DEVICE_CTRLB_NREPLY_Msk & (_UINT16_(value) << USB_DEVICE_CTRLB_NREPLY_Pos)) /* Assigment of value for NREPLY in the USB_DEVICE_CTRLB register */
-#define USB_DEVICE_CTRLB_TSTJ_Pos             _UINT16_(5)                                          /* (USB_DEVICE_CTRLB) Test mode J Position */
-#define USB_DEVICE_CTRLB_TSTJ_Msk             (_UINT16_(0x1) << USB_DEVICE_CTRLB_TSTJ_Pos)         /* (USB_DEVICE_CTRLB) Test mode J Mask */
-#define USB_DEVICE_CTRLB_TSTJ(value)          (USB_DEVICE_CTRLB_TSTJ_Msk & (_UINT16_(value) << USB_DEVICE_CTRLB_TSTJ_Pos)) /* Assigment of value for TSTJ in the USB_DEVICE_CTRLB register */
-#define USB_DEVICE_CTRLB_TSTK_Pos             _UINT16_(6)                                          /* (USB_DEVICE_CTRLB) Test mode K Position */
-#define USB_DEVICE_CTRLB_TSTK_Msk             (_UINT16_(0x1) << USB_DEVICE_CTRLB_TSTK_Pos)         /* (USB_DEVICE_CTRLB) Test mode K Mask */
-#define USB_DEVICE_CTRLB_TSTK(value)          (USB_DEVICE_CTRLB_TSTK_Msk & (_UINT16_(value) << USB_DEVICE_CTRLB_TSTK_Pos)) /* Assigment of value for TSTK in the USB_DEVICE_CTRLB register */
-#define USB_DEVICE_CTRLB_TSTPCKT_Pos          _UINT16_(7)                                          /* (USB_DEVICE_CTRLB) Test packet mode Position */
-#define USB_DEVICE_CTRLB_TSTPCKT_Msk          (_UINT16_(0x1) << USB_DEVICE_CTRLB_TSTPCKT_Pos)      /* (USB_DEVICE_CTRLB) Test packet mode Mask */
-#define USB_DEVICE_CTRLB_TSTPCKT(value)       (USB_DEVICE_CTRLB_TSTPCKT_Msk & (_UINT16_(value) << USB_DEVICE_CTRLB_TSTPCKT_Pos)) /* Assigment of value for TSTPCKT in the USB_DEVICE_CTRLB register */
-#define USB_DEVICE_CTRLB_OPMODE2_Pos          _UINT16_(8)                                          /* (USB_DEVICE_CTRLB) Specific Operational Mode Position */
-#define USB_DEVICE_CTRLB_OPMODE2_Msk          (_UINT16_(0x1) << USB_DEVICE_CTRLB_OPMODE2_Pos)      /* (USB_DEVICE_CTRLB) Specific Operational Mode Mask */
-#define USB_DEVICE_CTRLB_OPMODE2(value)       (USB_DEVICE_CTRLB_OPMODE2_Msk & (_UINT16_(value) << USB_DEVICE_CTRLB_OPMODE2_Pos)) /* Assigment of value for OPMODE2 in the USB_DEVICE_CTRLB register */
 #define USB_DEVICE_CTRLB_GNAK_Pos             _UINT16_(9)                                          /* (USB_DEVICE_CTRLB) Global NAK Position */
 #define USB_DEVICE_CTRLB_GNAK_Msk             (_UINT16_(0x1) << USB_DEVICE_CTRLB_GNAK_Pos)         /* (USB_DEVICE_CTRLB) Global NAK Mask */
 #define USB_DEVICE_CTRLB_GNAK(value)          (USB_DEVICE_CTRLB_GNAK_Msk & (_UINT16_(value) << USB_DEVICE_CTRLB_GNAK_Pos)) /* Assigment of value for GNAK in the USB_DEVICE_CTRLB register */
@ -622,16 +603,11 @@
 #define   USB_DEVICE_CTRLB_LPMHDSK_NO_Val     _UINT16_(0x0)                                        /* (USB_DEVICE_CTRLB) No handshake. LPM is not supported  */
 #define   USB_DEVICE_CTRLB_LPMHDSK_ACK_Val    _UINT16_(0x1)                                        /* (USB_DEVICE_CTRLB) ACK  */
 #define   USB_DEVICE_CTRLB_LPMHDSK_NYET_Val   _UINT16_(0x2)                                        /* (USB_DEVICE_CTRLB) NYET  */
-#define   USB_DEVICE_CTRLB_LPMHDSK_STALL_Val  _UINT16_(0x3)                                        /* (USB_DEVICE_CTRLB) STALL  */
 #define USB_DEVICE_CTRLB_LPMHDSK_NO           (USB_DEVICE_CTRLB_LPMHDSK_NO_Val << USB_DEVICE_CTRLB_LPMHDSK_Pos) /* (USB_DEVICE_CTRLB) No handshake. LPM is not supported Position  */
 #define USB_DEVICE_CTRLB_LPMHDSK_ACK          (USB_DEVICE_CTRLB_LPMHDSK_ACK_Val << USB_DEVICE_CTRLB_LPMHDSK_Pos) /* (USB_DEVICE_CTRLB) ACK Position  */
 #define USB_DEVICE_CTRLB_LPMHDSK_NYET         (USB_DEVICE_CTRLB_LPMHDSK_NYET_Val << USB_DEVICE_CTRLB_LPMHDSK_Pos) /* (USB_DEVICE_CTRLB) NYET Position  */
-#define USB_DEVICE_CTRLB_LPMHDSK_STALL        (USB_DEVICE_CTRLB_LPMHDSK_STALL_Val << USB_DEVICE_CTRLB_LPMHDSK_Pos) /* (USB_DEVICE_CTRLB) STALL Position  */
-#define USB_DEVICE_CTRLB_Msk                  _UINT16_(0x0FFF)                                     /* (USB_DEVICE_CTRLB) Register Mask  */
+#define USB_DEVICE_CTRLB_Msk                  _UINT16_(0x0E1F)                                     /* (USB_DEVICE_CTRLB) Register Mask  */

-#define USB_DEVICE_CTRLB_OPMODE_Pos           _UINT16_(8)                                          /* (USB_DEVICE_CTRLB Position) Specific Operational Mode */
-#define USB_DEVICE_CTRLB_OPMODE_Msk           (_UINT16_(0x1) << USB_DEVICE_CTRLB_OPMODE_Pos)       /* (USB_DEVICE_CTRLB Mask) OPMODE */
-#define USB_DEVICE_CTRLB_OPMODE(value)        (USB_DEVICE_CTRLB_OPMODE_Msk & (_UINT16_(value) << USB_DEVICE_CTRLB_OPMODE_Pos)) 

 /* -------- USB_HOST_CTRLB : (USB Offset: 0x08) (R/W 16) HOST Control B -------- */
 #define USB_HOST_CTRLB_RESETVALUE             _UINT16_(0x00)                                       /*  (USB_HOST_CTRLB) HOST Control B  Reset Value */
@ -642,19 +618,11 @@
 #define USB_HOST_CTRLB_SPDCONF_Pos            _UINT16_(2)                                          /* (USB_HOST_CTRLB) Speed Configuration for Host Position */
 #define USB_HOST_CTRLB_SPDCONF_Msk            (_UINT16_(0x3) << USB_HOST_CTRLB_SPDCONF_Pos)        /* (USB_HOST_CTRLB) Speed Configuration for Host Mask */
 #define USB_HOST_CTRLB_SPDCONF(value)         (USB_HOST_CTRLB_SPDCONF_Msk & (_UINT16_(value) << USB_HOST_CTRLB_SPDCONF_Pos)) /* Assigment of value for SPDCONF in the USB_HOST_CTRLB register */
-#define   USB_HOST_CTRLB_SPDCONF_NORMAL_Val   _UINT16_(0x0)                                        /* (USB_HOST_CTRLB) Normal mode: the host starts in full-speed mode and performs a high-speed reset to switch to the high speed mode if the downstream peripheral is high-speed capable.  */
-#define   USB_HOST_CTRLB_SPDCONF_FS_Val       _UINT16_(0x3)                                        /* (USB_HOST_CTRLB) Full-speed: the host remains in full-speed mode whatever is the peripheral speed capability. Relevant in UTMI mode only.  */
-#define USB_HOST_CTRLB_SPDCONF_NORMAL         (USB_HOST_CTRLB_SPDCONF_NORMAL_Val << USB_HOST_CTRLB_SPDCONF_Pos) /* (USB_HOST_CTRLB) Normal mode: the host starts in full-speed mode and performs a high-speed reset to switch to the high speed mode if the downstream peripheral is high-speed capable. Position  */
-#define USB_HOST_CTRLB_SPDCONF_FS             (USB_HOST_CTRLB_SPDCONF_FS_Val << USB_HOST_CTRLB_SPDCONF_Pos) /* (USB_HOST_CTRLB) Full-speed: the host remains in full-speed mode whatever is the peripheral speed capability. Relevant in UTMI mode only. Position  */
+#define   USB_HOST_CTRLB_SPDCONF_NORMAL_Val   _UINT16_(0x0)                                        /* (USB_HOST_CTRLB) Low and Full Speed capable  */
+#define USB_HOST_CTRLB_SPDCONF_NORMAL         (USB_HOST_CTRLB_SPDCONF_NORMAL_Val << USB_HOST_CTRLB_SPDCONF_Pos) /* (USB_HOST_CTRLB) Low and Full Speed capable Position  */
 #define USB_HOST_CTRLB_AUTORESUME_Pos         _UINT16_(4)                                          /* (USB_HOST_CTRLB) Auto Resume Enable Position */
 #define USB_HOST_CTRLB_AUTORESUME_Msk         (_UINT16_(0x1) << USB_HOST_CTRLB_AUTORESUME_Pos)     /* (USB_HOST_CTRLB) Auto Resume Enable Mask */
 #define USB_HOST_CTRLB_AUTORESUME(value)      (USB_HOST_CTRLB_AUTORESUME_Msk & (_UINT16_(value) << USB_HOST_CTRLB_AUTORESUME_Pos)) /* Assigment of value for AUTORESUME in the USB_HOST_CTRLB register */
-#define USB_HOST_CTRLB_TSTJ_Pos               _UINT16_(5)                                          /* (USB_HOST_CTRLB) Test mode J Position */
-#define USB_HOST_CTRLB_TSTJ_Msk               (_UINT16_(0x1) << USB_HOST_CTRLB_TSTJ_Pos)           /* (USB_HOST_CTRLB) Test mode J Mask */
-#define USB_HOST_CTRLB_TSTJ(value)            (USB_HOST_CTRLB_TSTJ_Msk & (_UINT16_(value) << USB_HOST_CTRLB_TSTJ_Pos)) /* Assigment of value for TSTJ in the USB_HOST_CTRLB register */
-#define USB_HOST_CTRLB_TSTK_Pos               _UINT16_(6)                                          /* (USB_HOST_CTRLB) Test mode K Position */
-#define USB_HOST_CTRLB_TSTK_Msk               (_UINT16_(0x1) << USB_HOST_CTRLB_TSTK_Pos)           /* (USB_HOST_CTRLB) Test mode K Mask */
-#define USB_HOST_CTRLB_TSTK(value)            (USB_HOST_CTRLB_TSTK_Msk & (_UINT16_(value) << USB_HOST_CTRLB_TSTK_Pos)) /* Assigment of value for TSTK in the USB_HOST_CTRLB register */
 #define USB_HOST_CTRLB_SOFE_Pos               _UINT16_(8)                                          /* (USB_HOST_CTRLB) Start of Frame Generation Enable Position */
 #define USB_HOST_CTRLB_SOFE_Msk               (_UINT16_(0x1) << USB_HOST_CTRLB_SOFE_Pos)           /* (USB_HOST_CTRLB) Start of Frame Generation Enable Mask */
 #define USB_HOST_CTRLB_SOFE(value)            (USB_HOST_CTRLB_SOFE_Msk & (_UINT16_(value) << USB_HOST_CTRLB_SOFE_Pos)) /* Assigment of value for SOFE in the USB_HOST_CTRLB register */
@ -667,7 +635,7 @@
 #define USB_HOST_CTRLB_L1RESUME_Pos           _UINT16_(11)                                         /* (USB_HOST_CTRLB) Send L1 Resume Position */
 #define USB_HOST_CTRLB_L1RESUME_Msk           (_UINT16_(0x1) << USB_HOST_CTRLB_L1RESUME_Pos)       /* (USB_HOST_CTRLB) Send L1 Resume Mask */
 #define USB_HOST_CTRLB_L1RESUME(value)        (USB_HOST_CTRLB_L1RESUME_Msk & (_UINT16_(value) << USB_HOST_CTRLB_L1RESUME_Pos)) /* Assigment of value for L1RESUME in the USB_HOST_CTRLB register */
-#define USB_HOST_CTRLB_Msk                    _UINT16_(0x0F7E)                                     /* (USB_HOST_CTRLB) Register Mask  */
+#define USB_HOST_CTRLB_Msk                    _UINT16_(0x0F1E)                                     /* (USB_HOST_CTRLB) Register Mask  */


 /* -------- USB_DEVICE_DADD : (USB Offset: 0x0A) (R/W 8) DEVICE Device Address -------- */
@ -702,19 +670,17 @@
 #define USB_DEVICE_STATUS_SPEED(value)        (USB_DEVICE_STATUS_SPEED_Msk & (_UINT8_(value) << USB_DEVICE_STATUS_SPEED_Pos)) /* Assigment of value for SPEED in the USB_DEVICE_STATUS register */
 #define   USB_DEVICE_STATUS_SPEED_FS_Val      _UINT8_(0x0)                                         /* (USB_DEVICE_STATUS) Full-speed mode  */
 #define   USB_DEVICE_STATUS_SPEED_LS_Val      _UINT8_(0x1)                                         /* (USB_DEVICE_STATUS) Low-speed mode  */
-#define   USB_DEVICE_STATUS_SPEED_HS_Val      _UINT8_(0x2)                                         /* (USB_DEVICE_STATUS) High-speed mode  */
 #define USB_DEVICE_STATUS_SPEED_FS            (USB_DEVICE_STATUS_SPEED_FS_Val << USB_DEVICE_STATUS_SPEED_Pos) /* (USB_DEVICE_STATUS) Full-speed mode Position  */
 #define USB_DEVICE_STATUS_SPEED_LS            (USB_DEVICE_STATUS_SPEED_LS_Val << USB_DEVICE_STATUS_SPEED_Pos) /* (USB_DEVICE_STATUS) Low-speed mode Position  */
-#define USB_DEVICE_STATUS_SPEED_HS            (USB_DEVICE_STATUS_SPEED_HS_Val << USB_DEVICE_STATUS_SPEED_Pos) /* (USB_DEVICE_STATUS) High-speed mode Position  */
 #define USB_DEVICE_STATUS_LINESTATE_Pos       _UINT8_(6)                                           /* (USB_DEVICE_STATUS) USB Line State Status Position */
 #define USB_DEVICE_STATUS_LINESTATE_Msk       (_UINT8_(0x3) << USB_DEVICE_STATUS_LINESTATE_Pos)    /* (USB_DEVICE_STATUS) USB Line State Status Mask */
 #define USB_DEVICE_STATUS_LINESTATE(value)    (USB_DEVICE_STATUS_LINESTATE_Msk & (_UINT8_(value) << USB_DEVICE_STATUS_LINESTATE_Pos)) /* Assigment of value for LINESTATE in the USB_DEVICE_STATUS register */
-#define   USB_DEVICE_STATUS_LINESTATE_0_Val   _UINT8_(0x0)                                         /* (USB_DEVICE_STATUS) SE0/RESET  */
-#define   USB_DEVICE_STATUS_LINESTATE_1_Val   _UINT8_(0x1)                                         /* (USB_DEVICE_STATUS) FS-J or LS-K State  */
-#define   USB_DEVICE_STATUS_LINESTATE_2_Val   _UINT8_(0x2)                                         /* (USB_DEVICE_STATUS) FS-K or LS-J State  */
-#define USB_DEVICE_STATUS_LINESTATE_0         (USB_DEVICE_STATUS_LINESTATE_0_Val << USB_DEVICE_STATUS_LINESTATE_Pos) /* (USB_DEVICE_STATUS) SE0/RESET Position  */
-#define USB_DEVICE_STATUS_LINESTATE_1         (USB_DEVICE_STATUS_LINESTATE_1_Val << USB_DEVICE_STATUS_LINESTATE_Pos) /* (USB_DEVICE_STATUS) FS-J or LS-K State Position  */
-#define USB_DEVICE_STATUS_LINESTATE_2         (USB_DEVICE_STATUS_LINESTATE_2_Val << USB_DEVICE_STATUS_LINESTATE_Pos) /* (USB_DEVICE_STATUS) FS-K or LS-J State Position  */
+#define   USB_DEVICE_STATUS_LINESTATE_SE0RESET_Val _UINT8_(0x0)                                         /* (USB_DEVICE_STATUS) SE0/RESET  */
+#define   USB_DEVICE_STATUS_LINESTATE_FSJLSK_Val _UINT8_(0x1)                                         /* (USB_DEVICE_STATUS) FS-J or LS-K State  */
+#define   USB_DEVICE_STATUS_LINESTATE_FSKLSJ_Val _UINT8_(0x2)                                         /* (USB_DEVICE_STATUS) FS-K or LS-J State  */
+#define USB_DEVICE_STATUS_LINESTATE_SE0RESET  (USB_DEVICE_STATUS_LINESTATE_SE0RESET_Val << USB_DEVICE_STATUS_LINESTATE_Pos) /* (USB_DEVICE_STATUS) SE0/RESET Position  */
+#define USB_DEVICE_STATUS_LINESTATE_FSJLSK    (USB_DEVICE_STATUS_LINESTATE_FSJLSK_Val << USB_DEVICE_STATUS_LINESTATE_Pos) /* (USB_DEVICE_STATUS) FS-J or LS-K State Position  */
+#define USB_DEVICE_STATUS_LINESTATE_FSKLSJ    (USB_DEVICE_STATUS_LINESTATE_FSKLSJ_Val << USB_DEVICE_STATUS_LINESTATE_Pos) /* (USB_DEVICE_STATUS) FS-K or LS-J State Position  */
 #define USB_DEVICE_STATUS_Msk                 _UINT8_(0xCC)                                        /* (USB_DEVICE_STATUS) Register Mask  */


@ -756,28 +722,22 @@
 /* -------- USB_DEVICE_FNUM : (USB Offset: 0x10) ( R/ 16) DEVICE Device Frame Number -------- */
 #define USB_DEVICE_FNUM_RESETVALUE            _UINT16_(0x00)                                       /*  (USB_DEVICE_FNUM) DEVICE Device Frame Number  Reset Value */

-#define USB_DEVICE_FNUM_MFNUM_Pos             _UINT16_(0)                                          /* (USB_DEVICE_FNUM) Micro Frame Number Position */
-#define USB_DEVICE_FNUM_MFNUM_Msk             (_UINT16_(0x7) << USB_DEVICE_FNUM_MFNUM_Pos)         /* (USB_DEVICE_FNUM) Micro Frame Number Mask */
-#define USB_DEVICE_FNUM_MFNUM(value)          (USB_DEVICE_FNUM_MFNUM_Msk & (_UINT16_(value) << USB_DEVICE_FNUM_MFNUM_Pos)) /* Assigment of value for MFNUM in the USB_DEVICE_FNUM register */
 #define USB_DEVICE_FNUM_FNUM_Pos              _UINT16_(3)                                          /* (USB_DEVICE_FNUM) Frame Number Position */
 #define USB_DEVICE_FNUM_FNUM_Msk              (_UINT16_(0x7FF) << USB_DEVICE_FNUM_FNUM_Pos)        /* (USB_DEVICE_FNUM) Frame Number Mask */
 #define USB_DEVICE_FNUM_FNUM(value)           (USB_DEVICE_FNUM_FNUM_Msk & (_UINT16_(value) << USB_DEVICE_FNUM_FNUM_Pos)) /* Assigment of value for FNUM in the USB_DEVICE_FNUM register */
 #define USB_DEVICE_FNUM_FNCERR_Pos            _UINT16_(15)                                         /* (USB_DEVICE_FNUM) Frame Number CRC Error Position */
 #define USB_DEVICE_FNUM_FNCERR_Msk            (_UINT16_(0x1) << USB_DEVICE_FNUM_FNCERR_Pos)        /* (USB_DEVICE_FNUM) Frame Number CRC Error Mask */
 #define USB_DEVICE_FNUM_FNCERR(value)         (USB_DEVICE_FNUM_FNCERR_Msk & (_UINT16_(value) << USB_DEVICE_FNUM_FNCERR_Pos)) /* Assigment of value for FNCERR in the USB_DEVICE_FNUM register */
-#define USB_DEVICE_FNUM_Msk                   _UINT16_(0xBFFF)                                     /* (USB_DEVICE_FNUM) Register Mask  */
+#define USB_DEVICE_FNUM_Msk                   _UINT16_(0xBFF8)                                     /* (USB_DEVICE_FNUM) Register Mask  */


 /* -------- USB_HOST_FNUM : (USB Offset: 0x10) (R/W 16) HOST Host Frame Number -------- */
 #define USB_HOST_FNUM_RESETVALUE              _UINT16_(0x00)                                       /*  (USB_HOST_FNUM) HOST Host Frame Number  Reset Value */

-#define USB_HOST_FNUM_MFNUM_Pos               _UINT16_(0)                                          /* (USB_HOST_FNUM) Micro Frame Number Position */
-#define USB_HOST_FNUM_MFNUM_Msk               (_UINT16_(0x7) << USB_HOST_FNUM_MFNUM_Pos)           /* (USB_HOST_FNUM) Micro Frame Number Mask */
-#define USB_HOST_FNUM_MFNUM(value)            (USB_HOST_FNUM_MFNUM_Msk & (_UINT16_(value) << USB_HOST_FNUM_MFNUM_Pos)) /* Assigment of value for MFNUM in the USB_HOST_FNUM register */
 #define USB_HOST_FNUM_FNUM_Pos                _UINT16_(3)                                          /* (USB_HOST_FNUM) Frame Number Position */
 #define USB_HOST_FNUM_FNUM_Msk                (_UINT16_(0x7FF) << USB_HOST_FNUM_FNUM_Pos)          /* (USB_HOST_FNUM) Frame Number Mask */
 #define USB_HOST_FNUM_FNUM(value)             (USB_HOST_FNUM_FNUM_Msk & (_UINT16_(value) << USB_HOST_FNUM_FNUM_Pos)) /* Assigment of value for FNUM in the USB_HOST_FNUM register */
-#define USB_HOST_FNUM_Msk                     _UINT16_(0x3FFF)                                     /* (USB_HOST_FNUM) Register Mask  */
+#define USB_HOST_FNUM_Msk                     _UINT16_(0x3FF8)                                     /* (USB_HOST_FNUM) Register Mask  */


 /* -------- USB_HOST_FLENHIGH : (USB Offset: 0x12) ( R/ 8) HOST Host Frame Length -------- */
@ -795,9 +755,6 @@
 #define USB_DEVICE_INTENCLR_SUSPEND_Pos       _UINT16_(0)                                          /* (USB_DEVICE_INTENCLR) Suspend Interrupt Enable Position */
 #define USB_DEVICE_INTENCLR_SUSPEND_Msk       (_UINT16_(0x1) << USB_DEVICE_INTENCLR_SUSPEND_Pos)   /* (USB_DEVICE_INTENCLR) Suspend Interrupt Enable Mask */
 #define USB_DEVICE_INTENCLR_SUSPEND(value)    (USB_DEVICE_INTENCLR_SUSPEND_Msk & (_UINT16_(value) << USB_DEVICE_INTENCLR_SUSPEND_Pos)) /* Assigment of value for SUSPEND in the USB_DEVICE_INTENCLR register */
-#define USB_DEVICE_INTENCLR_MSOF_Pos          _UINT16_(1)                                          /* (USB_DEVICE_INTENCLR) Micro Start of Frame Interrupt Enable in High Speed Mode Position */
-#define USB_DEVICE_INTENCLR_MSOF_Msk          (_UINT16_(0x1) << USB_DEVICE_INTENCLR_MSOF_Pos)      /* (USB_DEVICE_INTENCLR) Micro Start of Frame Interrupt Enable in High Speed Mode Mask */
-#define USB_DEVICE_INTENCLR_MSOF(value)       (USB_DEVICE_INTENCLR_MSOF_Msk & (_UINT16_(value) << USB_DEVICE_INTENCLR_MSOF_Pos)) /* Assigment of value for MSOF in the USB_DEVICE_INTENCLR register */
 #define USB_DEVICE_INTENCLR_SOF_Pos           _UINT16_(2)                                          /* (USB_DEVICE_INTENCLR) Start Of Frame Interrupt Enable Position */
 #define USB_DEVICE_INTENCLR_SOF_Msk           (_UINT16_(0x1) << USB_DEVICE_INTENCLR_SOF_Pos)       /* (USB_DEVICE_INTENCLR) Start Of Frame Interrupt Enable Mask */
 #define USB_DEVICE_INTENCLR_SOF(value)        (USB_DEVICE_INTENCLR_SOF_Msk & (_UINT16_(value) << USB_DEVICE_INTENCLR_SOF_Pos)) /* Assigment of value for SOF in the USB_DEVICE_INTENCLR register */
@ -822,7 +779,7 @@
 #define USB_DEVICE_INTENCLR_LPMSUSP_Pos       _UINT16_(9)                                          /* (USB_DEVICE_INTENCLR) Link Power Management Suspend Interrupt Enable Position */
 #define USB_DEVICE_INTENCLR_LPMSUSP_Msk       (_UINT16_(0x1) << USB_DEVICE_INTENCLR_LPMSUSP_Pos)   /* (USB_DEVICE_INTENCLR) Link Power Management Suspend Interrupt Enable Mask */
 #define USB_DEVICE_INTENCLR_LPMSUSP(value)    (USB_DEVICE_INTENCLR_LPMSUSP_Msk & (_UINT16_(value) << USB_DEVICE_INTENCLR_LPMSUSP_Pos)) /* Assigment of value for LPMSUSP in the USB_DEVICE_INTENCLR register */
-#define USB_DEVICE_INTENCLR_Msk               _UINT16_(0x03FF)                                     /* (USB_DEVICE_INTENCLR) Register Mask  */
+#define USB_DEVICE_INTENCLR_Msk               _UINT16_(0x03FD)                                     /* (USB_DEVICE_INTENCLR) Register Mask  */


 /* -------- USB_HOST_INTENCLR : (USB Offset: 0x14) (R/W 16) HOST Host Interrupt Enable Clear -------- */
@ -861,9 +818,6 @@
 #define USB_DEVICE_INTENSET_SUSPEND_Pos       _UINT16_(0)                                          /* (USB_DEVICE_INTENSET) Suspend Interrupt Enable Position */
 #define USB_DEVICE_INTENSET_SUSPEND_Msk       (_UINT16_(0x1) << USB_DEVICE_INTENSET_SUSPEND_Pos)   /* (USB_DEVICE_INTENSET) Suspend Interrupt Enable Mask */
 #define USB_DEVICE_INTENSET_SUSPEND(value)    (USB_DEVICE_INTENSET_SUSPEND_Msk & (_UINT16_(value) << USB_DEVICE_INTENSET_SUSPEND_Pos)) /* Assigment of value for SUSPEND in the USB_DEVICE_INTENSET register */
-#define USB_DEVICE_INTENSET_MSOF_Pos          _UINT16_(1)                                          /* (USB_DEVICE_INTENSET) Micro Start of Frame Interrupt Enable in High Speed Mode Position */
-#define USB_DEVICE_INTENSET_MSOF_Msk          (_UINT16_(0x1) << USB_DEVICE_INTENSET_MSOF_Pos)      /* (USB_DEVICE_INTENSET) Micro Start of Frame Interrupt Enable in High Speed Mode Mask */
-#define USB_DEVICE_INTENSET_MSOF(value)       (USB_DEVICE_INTENSET_MSOF_Msk & (_UINT16_(value) << USB_DEVICE_INTENSET_MSOF_Pos)) /* Assigment of value for MSOF in the USB_DEVICE_INTENSET register */
 #define USB_DEVICE_INTENSET_SOF_Pos           _UINT16_(2)                                          /* (USB_DEVICE_INTENSET) Start Of Frame Interrupt Enable Position */
 #define USB_DEVICE_INTENSET_SOF_Msk           (_UINT16_(0x1) << USB_DEVICE_INTENSET_SOF_Pos)       /* (USB_DEVICE_INTENSET) Start Of Frame Interrupt Enable Mask */
 #define USB_DEVICE_INTENSET_SOF(value)        (USB_DEVICE_INTENSET_SOF_Msk & (_UINT16_(value) << USB_DEVICE_INTENSET_SOF_Pos)) /* Assigment of value for SOF in the USB_DEVICE_INTENSET register */
@ -888,7 +842,7 @@
 #define USB_DEVICE_INTENSET_LPMSUSP_Pos       _UINT16_(9)                                          /* (USB_DEVICE_INTENSET) Link Power Management Suspend Interrupt Enable Position */
 #define USB_DEVICE_INTENSET_LPMSUSP_Msk       (_UINT16_(0x1) << USB_DEVICE_INTENSET_LPMSUSP_Pos)   /* (USB_DEVICE_INTENSET) Link Power Management Suspend Interrupt Enable Mask */
 #define USB_DEVICE_INTENSET_LPMSUSP(value)    (USB_DEVICE_INTENSET_LPMSUSP_Msk & (_UINT16_(value) << USB_DEVICE_INTENSET_LPMSUSP_Pos)) /* Assigment of value for LPMSUSP in the USB_DEVICE_INTENSET register */
-#define USB_DEVICE_INTENSET_Msk               _UINT16_(0x03FF)                                     /* (USB_DEVICE_INTENSET) Register Mask  */
+#define USB_DEVICE_INTENSET_Msk               _UINT16_(0x03FD)                                     /* (USB_DEVICE_INTENSET) Register Mask  */


 /* -------- USB_HOST_INTENSET : (USB Offset: 0x18) (R/W 16) HOST Host Interrupt Enable Set -------- */
@ -927,9 +881,6 @@
 #define USB_DEVICE_INTFLAG_SUSPEND_Pos        _UINT16_(0)                                          /* (USB_DEVICE_INTFLAG) Suspend Position */
 #define USB_DEVICE_INTFLAG_SUSPEND_Msk        (_UINT16_(0x1) << USB_DEVICE_INTFLAG_SUSPEND_Pos)    /* (USB_DEVICE_INTFLAG) Suspend Mask */
 #define USB_DEVICE_INTFLAG_SUSPEND(value)     (USB_DEVICE_INTFLAG_SUSPEND_Msk & (_UINT16_(value) << USB_DEVICE_INTFLAG_SUSPEND_Pos)) /* Assigment of value for SUSPEND in the USB_DEVICE_INTFLAG register */
-#define USB_DEVICE_INTFLAG_MSOF_Pos           _UINT16_(1)                                          /* (USB_DEVICE_INTFLAG) Micro Start of Frame in High Speed Mode Position */
-#define USB_DEVICE_INTFLAG_MSOF_Msk           (_UINT16_(0x1) << USB_DEVICE_INTFLAG_MSOF_Pos)       /* (USB_DEVICE_INTFLAG) Micro Start of Frame in High Speed Mode Mask */
-#define USB_DEVICE_INTFLAG_MSOF(value)        (USB_DEVICE_INTFLAG_MSOF_Msk & (_UINT16_(value) << USB_DEVICE_INTFLAG_MSOF_Pos)) /* Assigment of value for MSOF in the USB_DEVICE_INTFLAG register */
 #define USB_DEVICE_INTFLAG_SOF_Pos            _UINT16_(2)                                          /* (USB_DEVICE_INTFLAG) Start Of Frame Position */
 #define USB_DEVICE_INTFLAG_SOF_Msk            (_UINT16_(0x1) << USB_DEVICE_INTFLAG_SOF_Pos)        /* (USB_DEVICE_INTFLAG) Start Of Frame Mask */
 #define USB_DEVICE_INTFLAG_SOF(value)         (USB_DEVICE_INTFLAG_SOF_Msk & (_UINT16_(value) << USB_DEVICE_INTFLAG_SOF_Pos)) /* Assigment of value for SOF in the USB_DEVICE_INTFLAG register */
@ -954,7 +905,7 @@
 #define USB_DEVICE_INTFLAG_LPMSUSP_Pos        _UINT16_(9)                                          /* (USB_DEVICE_INTFLAG) Link Power Management Suspend Position */
 #define USB_DEVICE_INTFLAG_LPMSUSP_Msk        (_UINT16_(0x1) << USB_DEVICE_INTFLAG_LPMSUSP_Pos)    /* (USB_DEVICE_INTFLAG) Link Power Management Suspend Mask */
 #define USB_DEVICE_INTFLAG_LPMSUSP(value)     (USB_DEVICE_INTFLAG_LPMSUSP_Msk & (_UINT16_(value) << USB_DEVICE_INTFLAG_LPMSUSP_Pos)) /* Assigment of value for LPMSUSP in the USB_DEVICE_INTFLAG register */
-#define USB_DEVICE_INTFLAG_Msk                _UINT16_(0x03FF)                                     /* (USB_DEVICE_INTFLAG) Register Mask  */
+#define USB_DEVICE_INTFLAG_Msk                _UINT16_(0x03FD)                                     /* (USB_DEVICE_INTFLAG) Register Mask  */


 /* -------- USB_HOST_INTFLAG : (USB Offset: 0x1C) (R/W 16) HOST Host Interrupt Flag -------- */
--- a/firmware/src/packs/ATSAME51J19A_DFP/component/wdt.h
+++ b/firmware/src/packs/ATSAME51J19A_DFP/component/wdt.h
@ -1,7 +1,7 @@
 /*
 * Component description for WDT
 *
- * Copyright (c) 2022 Microchip Technology Inc. and its subsidiaries.
+ * Copyright (c) 2023 Microchip Technology Inc. and its subsidiaries.
 *
 * Subject to your compliance with these terms, you may use Microchip software and any derivatives
 * exclusively with Microchip products. It is your responsibility to comply with third party license
@ -20,7 +20,7 @@
 *
 */

-/* file generated from device description version 2022-02-14T14:27:15Z */
+/* file generated from device description version 2023-03-17T09:49:56Z */
 #ifndef _SAME51_WDT_COMPONENT_H_
 #define _SAME51_WDT_COMPONENT_H_

--- a/firmware/src/packs/ATSAME51J19A_DFP/instance/ac.h
+++ b/firmware/src/packs/ATSAME51J19A_DFP/instance/ac.h
@ -1,7 +1,7 @@
 /*
 * Instance header file for ATSAME51N20A
 *
- * Copyright (c) 2022 Microchip Technology Inc. and its subsidiaries.
+ * Copyright (c) 2023 Microchip Technology Inc. and its subsidiaries.
 *
 * Subject to your compliance with these terms, you may use Microchip software and any derivatives
 * exclusively with Microchip products. It is your responsibility to comply with third party license
@ -20,7 +20,7 @@
 *
 */

-/* file generated from device description version 2022-02-14T14:27:15Z */
+/* file generated from device description version 2023-03-17T09:49:56Z */
 #ifndef _SAME51_AC_INSTANCE_
 #define _SAME51_AC_INSTANCE_

@ -29,9 +29,9 @@
 #define AC_COMPCTRL_MUXNEG_OPAMP                 (7)        /* OPAMP selection for MUXNEG */
 #define AC_GCLK_ID                               (32)       /* Index of Generic Clock */
 #define AC_IMPLEMENTS_VDBLR                      (0)        /* VDoubler implemented ? */
+#define AC_INSTANCE_ID                           (72)       /* Instance index for AC */
 #define AC_NUM_CMP                               (2)        /* Number of comparators */
 #define AC_PAIRS                                 (1)        /* Number of pairs of comparators */
 #define AC_SPEED_LEVELS                          (2)        /* Number of speed values */
-#define AC_INSTANCE_ID                           (72)       /* Instance index for AC */

 #endif /* _SAME51_AC_INSTANCE_ */
--- a/firmware/src/packs/ATSAME51J19A_DFP/instance/adc0.h
+++ b/firmware/src/packs/ATSAME51J19A_DFP/instance/adc0.h
@ -1,7 +1,7 @@
 /*
 * Instance header file for ATSAME51N20A
 *
- * Copyright (c) 2022 Microchip Technology Inc. and its subsidiaries.
+ * Copyright (c) 2023 Microchip Technology Inc. and its subsidiaries.
 *
 * Subject to your compliance with these terms, you may use Microchip software and any derivatives
 * exclusively with Microchip products. It is your responsibility to comply with third party license
@ -20,7 +20,7 @@
 *
 */

-/* file generated from device description version 2022-02-14T14:27:15Z */
+/* file generated from device description version 2023-03-17T09:49:56Z */
 #ifndef _SAME51_ADC0_INSTANCE_
 #define _SAME51_ADC0_INSTANCE_

@ -32,12 +32,12 @@
 #define ADC0_DMAC_ID_SEQ                         (69)       /* Index of DMA SEQ trigger */
 #define ADC0_EXTCHANNEL_MSB                      (15)       /* Number of external channels */
 #define ADC0_GCLK_ID                             (40)       /* index of Generic Clock */
+#define ADC0_INSTANCE_ID                         (103)      /* Instance index for ADC0 */
 #define ADC0_MASTER_SLAVE_MODE                   (1)        /* ADC Master/Slave Mode */
-#define ADC0_OPAMP2                              (0)        /* MUXPOS value to select OPAMP2 */
 #define ADC0_OPAMP01                             (0)        /* MUXPOS value to select OPAMP01 */
+#define ADC0_OPAMP2                              (0)        /* MUXPOS value to select OPAMP2 */
 #define ADC0_PTAT                                (28)       /* MUXPOS value to select PTAT */
 #define ADC0_TOUCH_IMPLEMENTED                   (1)        /* TOUCH implemented or not */
 #define ADC0_TOUCH_LINES_NUM                     (32)       /* Number of touch lines */
-#define ADC0_INSTANCE_ID                         (103)      /* Instance index for ADC0 */

 #endif /* _SAME51_ADC0_INSTANCE_ */
--- a/firmware/src/packs/ATSAME51J19A_DFP/instance/adc1.h
+++ b/firmware/src/packs/ATSAME51J19A_DFP/instance/adc1.h
@ -1,7 +1,7 @@
 /*
 * Instance header file for ATSAME51N20A
 *
- * Copyright (c) 2022 Microchip Technology Inc. and its subsidiaries.
+ * Copyright (c) 2023 Microchip Technology Inc. and its subsidiaries.
 *
 * Subject to your compliance with these terms, you may use Microchip software and any derivatives
 * exclusively with Microchip products. It is your responsibility to comply with third party license
@ -20,7 +20,7 @@
 *
 */

-/* file generated from device description version 2022-02-14T14:27:15Z */
+/* file generated from device description version 2023-03-17T09:49:56Z */
 #ifndef _SAME51_ADC1_INSTANCE_
 #define _SAME51_ADC1_INSTANCE_

@ -32,12 +32,12 @@
 #define ADC1_DMAC_ID_SEQ                         (71)       /* Index of DMA SEQ trigger */
 #define ADC1_EXTCHANNEL_MSB                      (15)       /* Number of external channels */
 #define ADC1_GCLK_ID                             (41)       /* Index of Generic Clock */
+#define ADC1_INSTANCE_ID                         (104)      /* Instance index for ADC1 */
 #define ADC1_MASTER_SLAVE_MODE                   (2)        /* ADC Master/Slave Mode */
-#define ADC1_OPAMP2                              (0)        /* MUXPOS value to select OPAMP2 */
 #define ADC1_OPAMP01                             (0)        /* MUXPOS value to select OPAMP01 */
+#define ADC1_OPAMP2                              (0)        /* MUXPOS value to select OPAMP2 */
 #define ADC1_PTAT                                (28)       /* MUXPOS value to select PTAT */
 #define ADC1_TOUCH_IMPLEMENTED                   (0)        /* TOUCH implemented or not */
 #define ADC1_TOUCH_LINES_NUM                     (1)        /* Number of touch lines */
-#define ADC1_INSTANCE_ID                         (104)      /* Instance index for ADC1 */

 #endif /* _SAME51_ADC1_INSTANCE_ */
--- a/firmware/src/packs/ATSAME51J19A_DFP/instance/aes.h
+++ b/firmware/src/packs/ATSAME51J19A_DFP/instance/aes.h
@ -1,7 +1,7 @@
 /*
 * Instance header file for ATSAME51N20A
 *
- * Copyright (c) 2022 Microchip Technology Inc. and its subsidiaries.
+ * Copyright (c) 2023 Microchip Technology Inc. and its subsidiaries.
 *
 * Subject to your compliance with these terms, you may use Microchip software and any derivatives
 * exclusively with Microchip products. It is your responsibility to comply with third party license
@ -20,7 +20,7 @@
 *
 */

-/* file generated from device description version 2022-02-14T14:27:15Z */
+/* file generated from device description version 2023-03-17T09:49:56Z */
 #ifndef _SAME51_AES_INSTANCE_
 #define _SAME51_AES_INSTANCE_

@ -30,7 +30,7 @@
 #define AES_DMAC_ID_WR                           (81)       /* DMA DATA Write trigger */
 #define AES_FOUR_BYTE_OPERATION                  (1)        /* Byte Operation */
 #define AES_GCM                                  (1)        /* GCM */
-#define AES_KEYLEN                               (2)        /* Key Length */
 #define AES_INSTANCE_ID                          (73)       /* Instance index for AES */
+#define AES_KEYLEN                               (2)        /* Key Length */

 #endif /* _SAME51_AES_INSTANCE_ */
--- a/firmware/src/packs/ATSAME51J19A_DFP/instance/can0.h
+++ b/firmware/src/packs/ATSAME51J19A_DFP/instance/can0.h
@ -1,7 +1,7 @@
 /*
 * Instance header file for ATSAME51N20A
 *
- * Copyright (c) 2022 Microchip Technology Inc. and its subsidiaries.
+ * Copyright (c) 2023 Microchip Technology Inc. and its subsidiaries.
 *
 * Subject to your compliance with these terms, you may use Microchip software and any derivatives
 * exclusively with Microchip products. It is your responsibility to comply with third party license
@ -20,7 +20,7 @@
 *
 */

-/* file generated from device description version 2022-02-14T14:27:15Z */
+/* file generated from device description version 2023-03-17T09:49:56Z */
 #ifndef _SAME51_CAN0_INSTANCE_
 #define _SAME51_CAN0_INSTANCE_

@ -28,8 +28,8 @@
 /* ========== Instance Parameter definitions for CAN0 peripheral ========== */
 #define CAN0_DMAC_ID_DEBUG                       (20)       /* DMA CAN Debug Req */
 #define CAN0_GCLK_ID                             (27)       /* Index of Generic Clock */
+#define CAN0_INSTANCE_ID                         (64)       /* Instance index for CAN0 */
 #define CAN0_MSG_RAM_ADDR                        (0x20000000) 
 #define CAN0_QOS_RESET_VAL                       (1)        /* QOS reset value */
-#define CAN0_INSTANCE_ID                         (64)       /* Instance index for CAN0 */

 #endif /* _SAME51_CAN0_INSTANCE_ */
--- a/firmware/src/packs/ATSAME51J19A_DFP/instance/can1.h
+++ b/firmware/src/packs/ATSAME51J19A_DFP/instance/can1.h
@ -1,7 +1,7 @@
 /*
 * Instance header file for ATSAME51N20A
 *
- * Copyright (c) 2022 Microchip Technology Inc. and its subsidiaries.
+ * Copyright (c) 2023 Microchip Technology Inc. and its subsidiaries.
 *
 * Subject to your compliance with these terms, you may use Microchip software and any derivatives
 * exclusively with Microchip products. It is your responsibility to comply with third party license
@ -20,7 +20,7 @@
 *
 */

-/* file generated from device description version 2022-02-14T14:27:15Z */
+/* file generated from device description version 2023-03-17T09:49:56Z */
 #ifndef _SAME51_CAN1_INSTANCE_
 #define _SAME51_CAN1_INSTANCE_

@ -28,8 +28,8 @@
 /* ========== Instance Parameter definitions for CAN1 peripheral ========== */
 #define CAN1_DMAC_ID_DEBUG                       (21)       /* DMA CAN Debug Req */
 #define CAN1_GCLK_ID                             (28)       /* Index of Generic Clock */
+#define CAN1_INSTANCE_ID                         (65)       /* Instance index for CAN1 */
 #define CAN1_MSG_RAM_ADDR                        (0x20000000) 
 #define CAN1_QOS_RESET_VAL                       (1)        /* QOS reset value */
-#define CAN1_INSTANCE_ID                         (65)       /* Instance index for CAN1 */

 #endif /* _SAME51_CAN1_INSTANCE_ */
--- a/firmware/src/packs/ATSAME51J19A_DFP/instance/ccl.h
+++ b/firmware/src/packs/ATSAME51J19A_DFP/instance/ccl.h
@ -1,7 +1,7 @@
 /*
 * Instance header file for ATSAME51N20A
 *
- * Copyright (c) 2022 Microchip Technology Inc. and its subsidiaries.
+ * Copyright (c) 2023 Microchip Technology Inc. and its subsidiaries.
 *
 * Subject to your compliance with these terms, you may use Microchip software and any derivatives
 * exclusively with Microchip products. It is your responsibility to comply with third party license
@ -20,15 +20,15 @@
 *
 */

-/* file generated from device description version 2022-02-14T14:27:15Z */
+/* file generated from device description version 2023-03-17T09:49:56Z */
 #ifndef _SAME51_CCL_INSTANCE_
 #define _SAME51_CCL_INSTANCE_


 /* ========== Instance Parameter definitions for CCL peripheral ========== */
 #define CCL_GCLK_ID                              (33)       /* GCLK index for CCL */
+#define CCL_INSTANCE_ID                          (78)       /* Instance index for CCL */
 #define CCL_LUT_NUM                              (4)        /* Number of LUT in a CCL */
 #define CCL_SEQ_NUM                              (2)        /* Number of SEQ in a CCL */
-#define CCL_INSTANCE_ID                          (78)       /* Instance index for CCL */

 #endif /* _SAME51_CCL_INSTANCE_ */
--- a/Show More
+++ b/Show More