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RP-01/cva_asw_m0146/src/hwctrl.c
sunbeam 1330079d3a 增加座椅按摩
2025-03-11 17:05:32 +08:00

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#include "hwctrl.h"
#include "clock_drv.h"
#include "SEGGER_RTT.h"
#include "appTask.h"
#include "TLE94x1.h"
#include "string.h"
#include "irq_drv.h"
#include "canuser.h"
#include "LIN_Master.h"
/*******************************************************************************
* the defines
******************************************************************************/
#define PDB_BB_SEL (0u) //000b : PDB0 and PDB1 operates independently.
#define DMA_CHANNEL0 0
#define DMA_CHANNEL1 1
#define PWM_PERIOD_HZ 100
/*******************************************************************************
* the typedefs
******************************************************************************/
/*******************************************************************************
* the globals
******************************************************************************/
static uint32_t adcResult[ADCH_NUM];
EDmaDrv_StateType dmaController_State;
EDmaDrv_ChnStateType *pEdmaChnState[16]; /* Runtime state structure for the eDMA driver */
EDmaDrv_ChnStateType edmaChnState[16];
static PwmLiteDrv_ModuleConfigType moduleConfig;
/*******************************************************************************
* the const
******************************************************************************/
/*! \brief The trgmux in out mappings table for trgmux configure
*/
const TrgMuxDrv_InOutMappingType c_trgmuxInOutMappings[] = {
{TRGMUXDRV_TRIGSOURCE_SIM_SW_TRIG, TRGMUXDRV_TARGETMODULE_PDB0_TRG_IN, false}, /* Use SIM_SW_TRIG trigger PDB0 */
{TRGMUXDRV_TRIGSOURCE_SIM_SW_TRIG, TRGMUXDRV_TARGETMODULE_PDB1_TRG_IN, false}, /* Use SIM_SW_TRIG trigger PDB0 */
};
const uint16_t c_numOfTrgmuxInOutMappings = sizeof(c_trgmuxInOutMappings) / sizeof(TrgMuxDrv_InOutMappingType);
/*******************************************************************************
* the function prototypes
******************************************************************************/
static void hw_IO_Init();
static void ADC_Init();
static void hw_clock_init()
{
/* Setup the clock */
ClockDrv_ModuleClkConfigType clockConfig;
uint32_t tTcr = 0;
WdgDrv_Disable(&mcu.wdgDrv);
SEGGER_RTT_printf(0,"-----clock_INIT-----\n");
/* Enable the clock for all ports */
clockConfig.gating = true;
ClockDrv_ConfigureClock(&mcu.clockDrv, CLOCKDRV_PORTA, &clockConfig);
ClockDrv_ConfigureClock(&mcu.clockDrv, CLOCKDRV_PORTB, &clockConfig);
ClockDrv_ConfigureClock(&mcu.clockDrv, CLOCKDRV_PORTC, &clockConfig);
ClockDrv_ConfigureClock(&mcu.clockDrv, CLOCKDRV_PORTD, &clockConfig);
ClockDrv_ConfigureClock(&mcu.clockDrv, CLOCKDRV_PORTE, &clockConfig);
/* Setup the Pll div2 clock */
clockConfig.gating = true;
clockConfig.source = CLOCKDRV_PLL;
clockConfig.div = 1;
ClockDrv_ConfigureClock(&mcu.clockDrv, CLOCKDRV_PLL_DIV2, &clockConfig);
/* Setup the FIRC2 div2 clock */
clockConfig.gating = true;
clockConfig.source = CLOCKDRV_SOSC;
clockConfig.div = 1;
ClockDrv_ConfigureClock(&mcu.clockDrv, CLOCKDRV_SOSC_DIV2, &clockConfig);
/* Setup the SPI clock */
clockConfig.gating = true;
clockConfig.source = CLOCKDRV_PLL_DIV2;
ClockDrv_ConfigureClock(&mcu.clockDrv, CLOCKDRV_SPI2, &clockConfig);
tTcr = SpiReg_GetTcr((const SpiRegType *)&mcu.spiDrv2.reg);
SpiDrv_SetPrescaler(&tTcr,0x03);
//adc功能
/* Enable the clock for PDB0 */
clockConfig.gating = true;
ClockDrv_ConfigureClock(&mcu.clockDrv, CLOCKDRV_PDB0, &clockConfig);
ClockDrv_ConfigureClock(&mcu.clockDrv, CLOCKDRV_PDB1, &clockConfig);
/* Enable the clock for ADC */
clockConfig.gating = true;
clockConfig.source = CLOCKDRV_PLL;
clockConfig.div = 4;
ClockDrv_ConfigureClock(&mcu.clockDrv, CLOCKDRV_ADC0, &clockConfig);
ClockDrv_ConfigureClock(&mcu.clockDrv, CLOCKDRV_ADC1, &clockConfig);
/* Enable the clock for DMAMUX */
clockConfig.gating = true;
ClockDrv_ConfigureClock(&mcu.clockDrv, CLOCKDRV_DMA_MUX, &clockConfig);
clockConfig.gating = true;
ClockDrv_ConfigureClock(&mcu.clockDrv, CLOCKDRV_DMA, &clockConfig);
ClockDrv_ConfigureClock(&mcu.clockDrv, CLOCKDRV_PWMLITE0, &clockConfig);
/* SOSC_DIV2 For Uart2 module clock source */
clockConfig.gating = true;
clockConfig.source = CLOCKDRV_SOSC_DIV2;
ClockDrv_ConfigureClock(&mcu.clockDrv, CLOCKDRV_UART0, &clockConfig);
}
static void ADC_Init()
{
for (uint8_t i = 0; i < ADCH_NUM; i++)
{
adcResult[i] = 0;
}
/* TRGMUX */
TrgMuxDrv_ConfigType trgmuxConfig;
trgmuxConfig.numOfInOutMappings = c_numOfTrgmuxInOutMappings;
trgmuxConfig.inOutMapping = c_trgmuxInOutMappings;
TrgMuxDrv_Configure(&mcu.trgMuxDrv, &trgmuxConfig);
pEdmaChnState[0] = &edmaChnState[0];
pEdmaChnState[1] = &edmaChnState[1];
/* Configure EDMA module */
EDmaDrv_ModuleConfigType edmaCfg;
EDmaDrv_GetDefaultConfigure(&edmaCfg);
EDmaDrv_Configure(&mcu.edmaDrv, &dmaController_State, &edmaCfg);
EDmaDrv_ChannelConfigType edmaChannelCfg;
EDmaDrv_GetDefaultChannelConfigure(&edmaChannelCfg);
edmaChannelCfg.chnConfig = DMA_CHANNEL0;
edmaChannelCfg.source = EDMA_REQ_ADC0;
edmaChannelCfg.channelPriority = EDMADRV_CHN_PRIORITY_0;
EDmaDrv_ConfigureChannel(&mcu.edmaDrv, &pEdmaChnState[0], &edmaChannelCfg);
edmaChannelCfg.chnConfig = DMA_CHANNEL1;
edmaChannelCfg.source = EDMA_REQ_ADC1;
edmaChannelCfg.channelPriority = EDMADRV_CHN_PRIORITY_0;
EDmaDrv_ConfigureChannel(&mcu.edmaDrv, &pEdmaChnState[0], &edmaChannelCfg);
EDmaDrv_TransferConfigType edmaTransferCfg;
EDmaDrv_LoopTransferConfigType edmaLoopCfg;
edmaLoopCfg.majorLoopIterationCount = 5;
edmaLoopCfg.srcOffsetEnable = true;
edmaLoopCfg.dstOffsetEnable = true;
edmaLoopCfg.minorLoopOffset = 0;
edmaLoopCfg.minorLoopChnLinkEnable = false;
edmaLoopCfg.minorLoopChnLinkNumber = 0;
edmaLoopCfg.majorLoopChnLinkEnable = false;
edmaLoopCfg.majorLoopChnLinkNumber = 0;
edmaTransferCfg.srcAddr = (uint32_t)&mcu.adc0Drv.adcReg->R[0];
edmaTransferCfg.destAddr = (uint32_t)&adcResult[0];
edmaTransferCfg.srcDestTransferSize = EDMADRV_TRANSFER_SIZE_4B;
edmaTransferCfg.srcOffset = 4;
edmaTransferCfg.destOffset = 4;
edmaTransferCfg.srcLastAddrAdjust = -20;
edmaTransferCfg.destLastAddrAdjust = -20;
edmaTransferCfg.srcModulo = EDMADRV_MODULO_OFF;
edmaTransferCfg.destModulo = EDMADRV_MODULO_OFF;
edmaTransferCfg.minorByteTransferCount = 4;
edmaTransferCfg.scatterGatherEnable = false;
edmaTransferCfg.scatterGatherNextDescAddr = false;
edmaTransferCfg.interruptEnable = false;
edmaTransferCfg.hardClrDone = true;
edmaTransferCfg.loopTransferConfig = &edmaLoopCfg;
EDmaDrv_ConfigLoopTransfer(&mcu.edmaDrv, DMA_CHANNEL0, &edmaTransferCfg);
edmaTransferCfg.srcAddr = (uint32_t)&mcu.adc1Drv.adcReg->R[0];
edmaTransferCfg.destAddr = (uint32_t)&adcResult[ADCH_RLY1];
EDmaDrv_ConfigLoopTransfer(&mcu.edmaDrv, DMA_CHANNEL1, &edmaTransferCfg);
EDmaDrv_StartChannel(&mcu.edmaDrv, DMA_CHANNEL0);
EDmaDrv_StartChannel(&mcu.edmaDrv, DMA_CHANNEL1);
/* Configure ADC module */
AdcDrv_ConfigType adcCfg;
AdcDrv_GetDefaultConfig(&adcCfg);
adcCfg.conversionMode = ADCDRV_CONVERSION_12BIT; /* Selects the ADC resolution to 12-bit conversion */
adcCfg.avgEnable = true; /* Enable hardware average function */
adcCfg.avgSamplesSel = ADCDRV_AVERAGE_32; /* Select 32 samples average */
adcCfg.continuousMode = ADCDRV_ONESHOT; /* Select one-shot mode */
adcCfg.chnCfg[ADCH_Power].chnSel = ADCDRV_INCHN_EXT3;
adcCfg.chnCfg[ADCH_RLY3].chnSel = ADCDRV_INCHN_EXT0;
adcCfg.chnCfg[ADCH_RLY5].chnSel = ADCDRV_INCHN_EXT1;
adcCfg.chnCfg[ADCH_HEAT_C1].chnSel = ADCDRV_INCHN_EXT15;
adcCfg.chnCfg[ADCH_HEAT_C2].chnSel = ADCDRV_INCHN_EXT7;
//adcCfg.chnCfg[ADCH_HEAT_C2].intEnable = true; /* Last channel enable interrupt */
adcCfg.trgSrcCfg.trgSrc = ADCDRV_HW_TRIGGER;
adcCfg.dmaEnable = true;
/* Enable ADC interrupts */
//IrqDrv_EnableIrq(ADC0_IRQn);
AdcDrv_Configure(&mcu.adc0Drv, &adcCfg);
AdcDrv_EnableAdc(&mcu.adc0Drv);
adcCfg.chnCfg[0].chnSel = ADCDRV_INCHN_EXT5;
adcCfg.chnCfg[1].chnSel = ADCDRV_INCHN_EXT2;
adcCfg.chnCfg[2].chnSel = ADCDRV_INCHN_EXT7;
adcCfg.chnCfg[3].chnSel = ADCDRV_INCHN_VBG;
adcCfg.chnCfg[4].chnSel = ADCDRV_INCHN_LPVBG;
AdcDrv_Configure(&mcu.adc1Drv, &adcCfg);
AdcDrv_EnableAdc(&mcu.adc1Drv);
/* Configure PDB module */
uint32_t pdbFreq;
ClockDrv_GetFreq(&mcu.clockDrv, CLOCKDRV_PDB0, &pdbFreq);
PdbDrv_ConfigType pdbCfg;
PdbDrv_GetDefaultConfig(&pdbCfg);
pdbCfg.ldmode = PDBDRV_LDMOD_LOAD_VAL_IMMEDIATELY; /* The internal registers are loaded with the values from their buffers, immediately after 1 is written to LDOK */
pdbCfg.trgInSel = PDBDRV_TRGSEL_TRGGER_IN_0; /* Use hardware trigger source */
pdbCfg.cMode = PDBDRV_CONT_CONTINUOUS; /* PDB operation in Continuous mode */
pdbCfg.prescalerFactor = PDBDRV_PRESCALER_128MULT; /* Counting uses the peripheral clock divided by MULT (the multiplication factor) */
pdbCfg.mult = PDBDRV_MULT_FACTOR_40; /* Multiplication factor is 40 */
pdbCfg.preTrgCfg.mode[0][0] = PDBDRV_PRETRG_DELAY_MODE; /* The first channel start with other trigger source */
pdbCfg.preTrgCfg.mode[0][1] = PDBDRV_PRETRG_BB_MODE; /* PDB channel[0][1-7] & channel[1][0-7] with Back-to-Back operation*/
pdbCfg.preTrgCfg.mode[0][2] = PDBDRV_PRETRG_BB_MODE;
pdbCfg.preTrgCfg.mode[0][3] = PDBDRV_PRETRG_BB_MODE;
pdbCfg.preTrgCfg.mode[0][4] = PDBDRV_PRETRG_BB_MODE;
pdbCfg.dlyCfg.modCnt = 1*pdbFreq / 128 / 40 /1000; /* Periodic triggering PDB in 1s*/
pdbCfg.dlyCfg.dlyCnt[0][0] = 0; /* first channel don't need delay time*/
pdbCfg.bbSel = PDB_BB_SEL; /* Internal channel chaining of PDB0 CH0 and CH1.
* CH0 and CH1 of PDB0 back-to-back operation with COCO[7:0] and COCO[15:8] of ADC0.
*/
PdbDrv_Configure(&mcu.pdb0Drv, &pdbCfg);
PdbDrv_Configure(&mcu.pdb1Drv, &pdbCfg);
PdbDrv_EnablePdb(&mcu.pdb0Drv); /* Enable PDB0 */
PdbDrv_EnablePdb(&mcu.pdb1Drv); /* Enable PDB1 */
TrgMuxDrv_GenSWTrigger(&mcu.trgMuxDrv, 10); /* Trigger PDB0 */
}
static void PWM_Init(void)
{
uint32_t apbClkFreq = 0;
ClockDrv_GetFreq(&mcu.clockDrv, CLOCKDRV_APB, &apbClkFreq);
/* Configure PWM Module */
PwmLiteDrv_GetDefaultModuleConfig(&moduleConfig);
moduleConfig.period = apbClkFreq / PWM_PERIOD_HZ;
moduleConfig.syncType = PWMLITEDRV_SYNC_AT_PERIOD;
PwmLiteDrv_ModuleConfig(&mcu.pwmLiteDrv0, &moduleConfig);
/* Configure PWM channel 0 */
PwmLiteDrv_ChannelConfigType channelConfig;
PwmLiteDrv_GetDefaultChannelConfig(&channelConfig);
channelConfig.pwmMuxType.channelNumber = PWMLITEDRV_MUX_PWM0_CH0;
channelConfig.pwmMuxType.padNumber = PWMLITEDRV_MUX_PAD_PWM4;
channelConfig.behavior0 = PWMLITEDRV_LOW_AT_REACH;
channelConfig.behavior1 = PWMLITEDRV_HIGH_AT_REACH;
channelConfig.threshold0 = 0;
channelConfig.threshold1 = 0;
PwmLiteDrv_ConfigChannel(&mcu.pwmLiteDrv0, PWMLITEDRV_PWM_CH0, &channelConfig);
/* Enable PWM Module */
PwmLiteDrv_EnableModule(&mcu.pwmLiteDrv0);
}
static void Watchdog_Init(void)
{
/* Refresh wdg */
WdgDrv_Refresh(&mcu.wdgDrv);
/* Initialize WDG drivers */
WdgDrv_ConfigureType wdgConfigParams;
WdgDrv_GetDefaultConfig(&wdgConfigParams);
wdgConfigParams.clkSource = WDGDRV_CLK_SRC_LPO128K;
wdgConfigParams.winEnable = false;
wdgConfigParams.prescalerEnable = false;
wdgConfigParams.enable = true;
wdgConfigParams.intEnable = false;
wdgConfigParams.updateEnable = true;
wdgConfigParams.stopModeEnable = false;
wdgConfigParams.timeoutValue = 12800;
wdgConfigParams.windowValue = 1000;
WdgDrv_Configure(&mcu.wdgDrv, &wdgConfigParams);
//NVIC_EnableIRQ(WDOG_IRQn);
}
void hw_init(void)
{
uint32_t gCpuClockFrequency = 0;
Watchdog_Init();
hw_clock_init();
SEGGER_RTT_printf(0,"-----SPI_INIT-----\n");
SBC_SPI_INIT();
FlexCanBoot_Init();
hw_IO_Init();
/* Set system tick clock, 1ms event */
ClockDrv_GetFreq(&mcu.clockDrv, CLOCKDRV_CORE, &gCpuClockFrequency);
SysTick_Config(gCpuClockFrequency / 1000u);
IrqDrv_EnableIrq(SysTick_IRQn);
SBC_Init();
SEGGER_RTT_printf(0,"-----ADC_Init-----\n");
ADC_Init();
PWM_Init();
Uart0_LinMaster_Init();
SEGGER_RTT_printf(0,"-----InitFinished-----\n");
}
#define PINSDRV_DIR_OUTPUT 1
#define PINSDRV_DIR_INPUT 0
static void hw_IO_Init(void)
{
//1
PinsDrv_SetMuxModeSel(&mcu.ptd, 1, PINSDRV_MUX_AS_GPIO);
PortReg_SetPcrDrvStr(mcu.ptd.port, 1, 1);
PortReg_SetPcrSr(mcu.ptd.port, 1, 1);
PinsDrv_SetPinDirection(&mcu.ptd, 1, PINSDRV_DIR_OUTPUT);
//2
PinsDrv_SetMuxModeSel(&mcu.ptd, 0, PINSDRV_MUX_AS_GPIO);
PortReg_SetPcrDrvStr(mcu.ptd.port, 0, 1);
PortReg_SetPcrSr(mcu.ptd.port, 0, 1);
PinsDrv_SetPinDirection(&mcu.ptd, 0, PINSDRV_DIR_OUTPUT);
//3
PinsDrv_SetMuxModeSel(&mcu.pte, 11, PINSDRV_MUX_AS_GPIO);
PortReg_SetPcrDrvStr(mcu.pte.port, 11, 1);
PortReg_SetPcrSr(mcu.pte.port, 11, 1);
PinsDrv_SetPinDirection(&mcu.pte, 11, PINSDRV_DIR_OUTPUT);
//4
PinsDrv_SetMuxModeSel(&mcu.pte, 10, PINSDRV_MUX_AS_GPIO);
PortReg_SetPcrDrvStr(mcu.pte.port, 10, 1);
PortReg_SetPcrSr(mcu.pte.port, 10, 1);
PinsDrv_SetPinDirection(&mcu.pte, 10, PINSDRV_DIR_OUTPUT);
//5
PinsDrv_SetMuxModeSel(&mcu.pte, 5, PINSDRV_MUX_AS_GPIO);
PortReg_SetPcrDrvStr(mcu.pte.port, 5, 1);
PortReg_SetPcrSr(mcu.pte.port, 5, 1);
PinsDrv_SetPinDirection(&mcu.pte, 5, PINSDRV_DIR_OUTPUT);
//6
PinsDrv_SetMuxModeSel(&mcu.pte, 4, PINSDRV_MUX_AS_GPIO);
PortReg_SetPcrDrvStr(mcu.pte.port, 4, 1);
PortReg_SetPcrSr(mcu.pte.port, 4, 1);
PinsDrv_SetPinDirection(&mcu.pte, 4, PINSDRV_DIR_OUTPUT);
//7-12电源
//13
PinsDrv_SetMuxModeSel(&mcu.pte, 3, PINSDRV_MUX_AS_GPIO);
PortReg_SetPcrDrvStr(mcu.pte.port, 3, 1);
PortReg_SetPcrSr(mcu.pte.port, 3, 1);
PinsDrv_SetPinDirection(&mcu.pte, 3, PINSDRV_DIR_OUTPUT);
//14
PinsDrv_SetMuxModeSel(&mcu.ptd, 16, PINSDRV_MUX_AS_GPIO);
PortReg_SetPcrDrvStr(mcu.ptd.port, 16, 1);
PortReg_SetPcrSr(mcu.ptd.port, 16, 1);
PinsDrv_SetPinDirection(&mcu.ptd, 16, PINSDRV_DIR_OUTPUT);
//15
PinsDrv_SetMuxModeSel(&mcu.ptd, 15, PINSDRV_MUX_AS_GPIO);
PortReg_SetPcrDrvStr(mcu.ptd.port, 15, 1);
PortReg_SetPcrSr(mcu.ptd.port, 15, 1);
PinsDrv_SetPinDirection(&mcu.ptd, 15, PINSDRV_DIR_OUTPUT);
//16
PinsDrv_SetMuxModeSel(&mcu.pte, 9, PINSDRV_MUX_AS_GPIO);
PortReg_SetPcrDrvStr(mcu.pte.port, 9, 1);
PortReg_SetPcrSr(mcu.pte.port, 9, 1);
PinsDrv_SetPinDirection(&mcu.pte, 9, PINSDRV_DIR_OUTPUT);
//17
PinsDrv_SetMuxModeSel(&mcu.pte, 8, PINSDRV_MUX_AS_GPIO);
PortReg_SetPcrDrvStr(mcu.pte.port, 8, 1);
PortReg_SetPcrSr(mcu.pte.port, 8, 1);
PinsDrv_SetPinDirection(&mcu.pte, 8, PINSDRV_DIR_OUTPUT);
//18
PinsDrv_SetMuxModeSel(&mcu.ptb, 5, PINSDRV_MUX_AS_GPIO);
PortReg_SetPcrDrvStr(mcu.ptb.port, 5, 1);
PortReg_SetPcrSr(mcu.ptb.port, 5, 1);
PinsDrv_SetPinDirection(&mcu.ptb, 5, PINSDRV_DIR_OUTPUT);
//19
PinsDrv_SetMuxModeSel(&mcu.ptb, 4, PINSDRV_MUX_AS_GPIO);
PortReg_SetPcrDrvStr(mcu.ptb.port, 4, 1);
PortReg_SetPcrSr(mcu.ptb.port, 4, 1);
PinsDrv_SetPinDirection(&mcu.ptb, 4, PINSDRV_DIR_OUTPUT);
//20-22预留
//23
PinsDrv_SetMuxModeSel(&mcu.ptd, 6, PINSDRV_MUX_AS_GPIO);
PortReg_SetPcrDrvStr(mcu.ptd.port, 6, 1);
PortReg_SetPcrSr(mcu.ptd.port, 6, 1);
PinsDrv_SetPinDirection(&mcu.ptd, 6, PINSDRV_DIR_OUTPUT);
//24
PinsDrv_SetMuxModeSel(&mcu.ptd, 5, PINSDRV_MUX_AS_GPIO);
PortReg_SetPcrDrvStr(mcu.ptd.port, 5, 1);
PortReg_SetPcrSr(mcu.ptd.port, 5, 1);
PinsDrv_SetPinDirection(&mcu.ptd, 5, PINSDRV_DIR_OUTPUT);
//25-26 SPI
//27
PinsDrv_SetMuxModeSel(&mcu.ptc, 17, PINSDRV_PIN_DISABLED);
PortReg_SetPcrAen(mcu.ptc.port, 1, 1);
PortReg_SetPcrSr(mcu.ptc.port, 1, 1);
PinsDrv_SetPinDirection(&mcu.ptc, 1,0);
PinsDrv_SetPortInputDisable(&mcu.ptc,0);
//28
PinsDrv_SetMuxModeSel(&mcu.ptc, 16, PINSDRV_MUX_AS_GPIO);
PortReg_SetPcrDrvStr(mcu.ptc.port, 16, 1);
PortReg_SetPcrSr(mcu.ptc.port, 16, 1);
PinsDrv_SetPinDirection(&mcu.ptc, 16,PINSDRV_DIR_OUTPUT);
//29 30 SPI
//31
PinsDrv_SetMuxModeSel(&mcu.ptb, 3, PINSDRV_PIN_DISABLED);
PortReg_SetPcrAen(mcu.ptb.port, 3, 1);
PortReg_SetPcrSr(mcu.ptb.port, 3, 1);
PinsDrv_SetPinDirection(&mcu.ptb, 3,0);
PinsDrv_SetPortInputDisable(&mcu.ptb,0);
//32
PinsDrv_SetMuxModeSel(&mcu.ptb, 2, PINSDRV_MUX_AS_GPIO);
PortReg_SetPcrDrvStr(mcu.ptb.port, 2, 1);
PortReg_SetPcrSr(mcu.ptb.port, 2, 1);
//33 34 CAN
//35
PinsDrv_SetMuxModeSel(&mcu.ptc, 9, PINSDRV_MUX_AS_GPIO);
PortReg_SetPcrDrvStr(mcu.ptc.port, 9, 1);
PortReg_SetPcrSr(mcu.ptc.port, 9, 1);
PinsDrv_SetPinDirection(&mcu.ptc, 9,PINSDRV_DIR_OUTPUT);
//36
PinsDrv_SetMuxModeSel(&mcu.ptc, 8, PINSDRV_MUX_AS_GPIO);
PortReg_SetPcrDrvStr(mcu.ptc.port, 8, 1);
PortReg_SetPcrSr(mcu.ptc.port, 8, 1);
//37
PinsDrv_SetMuxModeSel(&mcu.pta, 7, PINSDRV_PIN_DISABLED);
PortReg_SetPcrAen(mcu.pta.port, 7, 1);
PortReg_SetPcrSr(mcu.pta.port, 7, 1);
PinsDrv_SetPinDirection(&mcu.pta, 7,0);
PinsDrv_SetPortInputDisable(&mcu.pta,0);
//38
PinsDrv_SetMuxModeSel(&mcu.pta, 6, PINSDRV_MUX_AS_GPIO);
PortReg_SetPcrDrvStr(mcu.pta.port, 6, 1);
PortReg_SetPcrSr(mcu.pta.port, 6, 1);
//39
PinsDrv_SetMuxModeSel(&mcu.pte, 7, PINSDRV_MUX_AS_GPIO);
PinsDrv_SetPinDirection(&mcu.pte, 7,0);
PortReg_SetPcrSr(mcu.pte.port, 7, 1);
//40 41 VDD
//42 NC
//43
PinsDrv_SetMuxModeSel(&mcu.ptb, 12, PINSDRV_PIN_DISABLED);
PortReg_SetPcrAen(mcu.ptb.port, 12, 1);
PortReg_SetPcrSr(mcu.ptb.port, 12, 1);
PinsDrv_SetPinDirection(&mcu.ptb, 12,0);
PinsDrv_SetPortInputDisable(&mcu.ptb,0);
//44
PinsDrv_SetMuxModeSel(&mcu.ptd, 4, PINSDRV_MUX_AS_GPIO);
PortReg_SetPcrDrvStr(mcu.ptd.port, 4, 1);
PortReg_SetPcrSr(mcu.ptd.port, 4, 1);
//45
PinsDrv_SetMuxModeSel(&mcu.ptd, 3, PINSDRV_MUX_AS_GPIO);
PortReg_SetPcrDrvStr(mcu.ptd.port, 3, 1);
PortReg_SetPcrSr(mcu.ptd.port, 3, 1);
//46
PinsDrv_SetMuxModeSel(&mcu.ptd, 2, PINSDRV_PIN_DISABLED);
PortReg_SetPcrAen(mcu.ptd.port, 2, 1);
PortReg_SetPcrSr(mcu.ptd.port, 2, 1);
PinsDrv_SetPinDirection(&mcu.ptd, 2,0);
PinsDrv_SetPortInputDisable(&mcu.ptd,0);
//47
PinsDrv_SetMuxModeSel(&mcu.pta, 3, PINSDRV_MUX_AS_GPIO);
PortReg_SetPcrDrvStr(mcu.pta.port, 3, 1);
PortReg_SetPcrSr(mcu.pta.port, 3, 1);
PinsDrv_SetPinDirection(&mcu.pta, 3, PINSDRV_DIR_OUTPUT);
//48
PinsDrv_SetMuxModeSel(&mcu.pta, 2, PINSDRV_MUX_ALT5);
//PortReg_SetPcrDrvStr(mcu.pta.port, 2, 1);
//PortReg_SetPcrSr(mcu.pta.port, 2, 1);
//PinsDrv_SetPinDirection(&mcu.pta, 2, PINSDRV_DIR_OUTPUT);
//49
PinsDrv_SetMuxModeSel(&mcu.pta, 1, PINSDRV_PIN_DISABLED);
PortReg_SetPcrAen(mcu.pta.port, 1, 1);
PortReg_SetPcrSr(mcu.pta.port, 1, 1);
PinsDrv_SetPinDirection(&mcu.pta, 1,0);
PinsDrv_SetPortInputDisable(&mcu.pta,0);
//50
PinsDrv_SetMuxModeSel(&mcu.pta, 0, PINSDRV_PIN_DISABLED);
PortReg_SetPcrAen(mcu.pta.port, 0, 1);
PortReg_SetPcrSr(mcu.pta.port, 0, 1);
PinsDrv_SetPinDirection(&mcu.pta, 0,0);
PinsDrv_SetPortInputDisable(&mcu.pta,0);
//51
PinsDrv_SetMuxModeSel(&mcu.ptc, 7, PINSDRV_PIN_DISABLED);
PortReg_SetPcrAen(mcu.ptc.port, 7, 1);
PortReg_SetPcrSr(mcu.ptc.port, 7, 1);
PinsDrv_SetPinDirection(&mcu.ptc, 7,0);
PinsDrv_SetPortInputDisable(&mcu.ptc,0);
//52
PinsDrv_SetMuxModeSel(&mcu.ptc, 6, PINSDRV_MUX_AS_GPIO);
PortReg_SetPcrDrvStr(mcu.ptc.port, 6, 1);
PortReg_SetPcrSr(mcu.ptc.port, 6, 1);
PinsDrv_SetPinDirection(&mcu.ptc, 6, PINSDRV_DIR_OUTPUT);
//53
PinsDrv_SetMuxModeSel(&mcu.pte, 6, PINSDRV_MUX_AS_GPIO);
PortReg_SetPcrDrvStr(mcu.pte.port, 6, 1);
PortReg_SetPcrSr(mcu.pte.port, 6, 1);
PinsDrv_SetPinDirection(&mcu.pte, 6, PINSDRV_DIR_OUTPUT);
//54
PinsDrv_SetMuxModeSel(&mcu.pte, 2, PINSDRV_MUX_AS_GPIO);
PortReg_SetPcrDrvStr(mcu.pte.port, 2, 1);
PortReg_SetPcrSr(mcu.pte.port, 2, 1);
PinsDrv_SetPinDirection(&mcu.pte, 2, PINSDRV_DIR_OUTPUT);
//55
PinsDrv_SetMuxModeSel(&mcu.pta, 13, PINSDRV_MUX_AS_GPIO);
PortReg_SetPcrDrvStr(mcu.pta.port, 13, 1);
PortReg_SetPcrSr(mcu.pta.port, 13, 1);
PinsDrv_SetPinDirection(&mcu.pta, 12, PINSDRV_DIR_OUTPUT);
//56
PinsDrv_SetMuxModeSel(&mcu.pta, 12, PINSDRV_MUX_AS_GPIO);
PortReg_SetPcrDrvStr(mcu.pta.port, 12, 1);
PortReg_SetPcrSr(mcu.pta.port, 12, 1);
PinsDrv_SetPinDirection(&mcu.pta, 12, PINSDRV_DIR_OUTPUT);
//57
PinsDrv_SetMuxModeSel(&mcu.pta, 11, PINSDRV_MUX_AS_GPIO);
PortReg_SetPcrDrvStr(mcu.pta.port, 11, 1);
PortReg_SetPcrSr(mcu.pta.port, 11, 1);
//58
PinsDrv_SetMuxModeSel(&mcu.pta, 10, PINSDRV_MUX_AS_GPIO);
PortReg_SetPcrDrvStr(mcu.pta.port, 10, 1);
PortReg_SetPcrSr(mcu.pta.port, 10, 1);
PinsDrv_SetPinDirection(&mcu.pta, 10, PINSDRV_DIR_OUTPUT);
//59
PinsDrv_SetMuxModeSel(&mcu.pte, 1, PINSDRV_MUX_AS_GPIO);
PortReg_SetPcrDrvStr(mcu.pte.port, 1, 1);
PortReg_SetPcrSr(mcu.pte.port, 1, 1);
PinsDrv_SetPinDirection(&mcu.pte, 1, PINSDRV_DIR_OUTPUT);
//60
PinsDrv_SetMuxModeSel(&mcu.pte, 0, PINSDRV_MUX_AS_GPIO);
PortReg_SetPcrDrvStr(mcu.pte.port, 0, 1);
PortReg_SetPcrSr(mcu.pte.port, 0, 1);
PinsDrv_SetPinDirection(&mcu.pte, 0, PINSDRV_DIR_OUTPUT);
//61
PinsDrv_SetMuxModeSel(&mcu.pte, 5, PINSDRV_MUX_AS_GPIO);
PortReg_SetPcrDrvStr(mcu.pte.port, 5, 1);
PortReg_SetPcrSr(mcu.pte.port, 5, 1);
//62-64 SWD
}
/*************************************motor driver *****************************************/
void hw_MotorCtrl(Motor_ID_Type motorid,Motor_ACT_Type dir)
{
switch(motorid)
{
case MotorHG:
switch(dir)
{
case Motor_ACT_NOACT:
PinsDrv_ClearPin(&mcu.ptd, 0);
PinsDrv_ClearPin(&mcu.ptd, 1);
break;
case Motor_ACT_CCW:
PinsDrv_SetPin(&mcu.ptd, 0);
PinsDrv_ClearPin(&mcu.ptd, 1);
break;
case Motor_ACT_CW:
PinsDrv_SetPin(&mcu.ptd, 1);
PinsDrv_ClearPin(&mcu.ptd, 0);
break;
}
break;
case MotorKB:
switch(dir)
{
case Motor_ACT_NOACT:
PinsDrv_ClearPin(&mcu.pte, 10);
PinsDrv_ClearPin(&mcu.pte, 11);
break;
case Motor_ACT_CW:
PinsDrv_SetPin(&mcu.pte, 10);
PinsDrv_ClearPin(&mcu.pte, 11);
break;
case Motor_ACT_CCW:
PinsDrv_SetPin(&mcu.pte, 11);
PinsDrv_ClearPin(&mcu.pte, 10);
break;
}
break;
case MotorTT:
switch(dir)
{
case Motor_ACT_NOACT:
PinsDrv_ClearPin(&mcu.pte, 4);
PinsDrv_ClearPin(&mcu.pte, 5);
break;
case Motor_ACT_CW:
PinsDrv_SetPin(&mcu.pte, 4);
PinsDrv_ClearPin(&mcu.pte, 5);
break;
case Motor_ACT_CCW:
PinsDrv_SetPin(&mcu.pte, 5);
PinsDrv_ClearPin(&mcu.pte, 4);
break;
}
break;
case MotorZY:
switch(dir)
{
case Motor_ACT_NOACT:
PinsDrv_ClearPin(&mcu.pte, 3);
PinsDrv_ClearPin(&mcu.ptd, 16);
break;
case Motor_ACT_CW:
PinsDrv_SetPin(&mcu.pte, 3);
PinsDrv_ClearPin(&mcu.ptd, 16);
break;
case Motor_ACT_CCW:
PinsDrv_SetPin(&mcu.ptd, 16);
PinsDrv_ClearPin(&mcu.pte, 3);
break;
}
break;
case Motor5:
switch(dir)
{
case Motor_ACT_NOACT:
PinsDrv_ClearPin(&mcu.pte, 9);
PinsDrv_ClearPin(&mcu.ptd, 15);
break;
case Motor_ACT_CW:
PinsDrv_SetPin(&mcu.pte, 9);
PinsDrv_ClearPin(&mcu.ptd, 15);
break;
case Motor_ACT_CCW:
PinsDrv_SetPin(&mcu.ptd, 15);
PinsDrv_ClearPin(&mcu.pte, 9);
break;
}
break;
case Motor6:
switch(dir)
{
case Motor_ACT_NOACT:
PinsDrv_ClearPin(&mcu.pte, 8);
PinsDrv_ClearPin(&mcu.ptb, 5);
break;
case Motor_ACT_CW:
PinsDrv_SetPin(&mcu.pte, 8);
PinsDrv_ClearPin(&mcu.ptb, 5);
break;
case Motor_ACT_CCW:
PinsDrv_SetPin(&mcu.pte, 8);
PinsDrv_ClearPin(&mcu.ptb, 5);
break;
}
break;
}
}
void power_ctrl(uint8_t power)
{
if (power>0)
{
PinsDrv_SetPin(&mcu.ptc,9);
}
else
{
PinsDrv_ClearPin(&mcu.ptc,9);
}
}
uint32_t GetAdcRawData(ADCH_ID_type adch)
{
if (adch < ADCH_NUM)
{
return adcResult[adch];
}
return 0;
}
uint32_t GetAdcmv(ADCH_ID_type adch)
{
uint32_t adcval=0;
if (adch < ADCH_NUM)
{
adcval = adcResult[adch];
}
adcval = ( adcval * 3300 )>>12;
return adcval;
}
uint8_t GetHallIO(Motor_ID_Type motorid)
{
uint8_t ret = 0;
switch (motorid)
{
case MotorHG:
ret = PinsDrv_ReadPin(&mcu.pta,11);
break;
case MotorKB:
ret = PinsDrv_ReadPin(&mcu.ptd,4);
break;
case MotorTT:
ret = PinsDrv_ReadPin(&mcu.ptc,5);
break;
case MotorZY:
ret = PinsDrv_ReadPin(&mcu.pte,7);
break;
default:
break;
}
return ret;
}
void HeatDrv1Ctrl(uint8_t onoff)
{
if (onoff > 0)
{
PinsDrv_SetPin(&mcu.ptc, 16);
PinsDrv_SetPin(&mcu.ptb, 4);
}
else
{
PinsDrv_ClearPin(&mcu.ptc, 16);
PinsDrv_ClearPin(&mcu.ptb, 4);
}
}
void HeatDrv2Ctrl(uint8_t onoff)
{
if (onoff > 0)
{
PinsDrv_SetPin(&mcu.ptd, 5);
PinsDrv_SetPin(&mcu.ptd, 6);
}
else
{
PinsDrv_ClearPin(&mcu.ptd, 5);
PinsDrv_ClearPin(&mcu.ptd, 6);
}
}
void FanCtrlDuty(uint8_t duty)
{
uint32_t dutydata = 0;
if (duty > 100)
{
duty = 100;
}
dutydata = moduleConfig.period * duty / 100;
PwmLiteDrv_UpdatePwmThresholdAtSync(&mcu.pwmLiteDrv0,PWMLITEDRV_PWM_CH0,0U,dutydata);
}
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