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sunbeam 2024-05-07 08:14:06 +08:00
parent 6d214b9b3b
commit ffedf209af
31 changed files with 10364 additions and 339 deletions
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4
cva_bootloader_m0146/.vscode/settings.json vendored
View File

@ -2,6 +2,8 @@
"files.associations": {
"uds_service27.h": "c",
"uds.h": "c",
"uds_user.h": "c"
"uds_user.h": "c",
"tle94x1.h": "c",
"tle94x1_spi.h": "c"
}
}

364
cva_bootloader_m0146/cva_bootloader_m0146.ewd
View File

@ -1,6 +1,6 @@
<?xml version="1.0" encoding="UTF-8"?>
<project>
<fileVersion>3</fileVersion>
<fileVersion>4</fileVersion>
<configuration>
<name>Debug</name>
<toolchain>
@ -11,7 +11,7 @@
<name>C-SPY</name>
<archiveVersion>2</archiveVersion>
<data>
<version>31</version>
<version>33</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
@ -44,7 +44,7 @@
</option>
<option>
<name>MemFile</name>
<state>$TOOLKIT_DIR$\CONFIG\debugger\CVAChip\CVM0146.ddf</state>
<state></state>
</option>
<option>
<name>RunToEnable</name>
@ -88,7 +88,7 @@
</option>
<option>
<name>OCLastSavedByProductVersion</name>
<state>8.40.1.21529</state>
<state>9.40.2.67586</state>
</option>
<option>
<name>UseFlashLoader</name>
@ -218,6 +218,42 @@
<name>OCMulticoreSessionFile</name>
<state></state>
</option>
<option>
<name>OCTpiuBaseOption</name>
<state>1</state>
</option>
<option>
<name>OCOverrideSlave</name>
<state>0</state>
</option>
<option>
<name>OCOverrideSlavePath</name>
<state></state>
</option>
<option>
<name>C_32_64Device</name>
<state>1</state>
</option>
<option>
<name>AuthEnable</name>
<state>0</state>
</option>
<option>
<name>AuthSdmSelection</name>
<state>1</state>
</option>
<option>
<name>AuthSdmManifest</name>
<state></state>
</option>
<option>
<name>AuthSdmExplicitLib</name>
<state></state>
</option>
<option>
<name>AuthEnforce</name>
<state>0</state>
</option>
</data>
</settings>
<settings>
@ -453,6 +489,39 @@
</option>
</data>
</settings>
<settings>
<name>E2_ID</name>
<archiveVersion>2</archiveVersion>
<data>
<version>0</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
<name>E2PowerFromProbe</name>
<state>1</state>
</option>
<option>
<name>CE2UsbSerialNo</name>
<state></state>
</option>
<option>
<name>CE2IdCodeEditB</name>
<state>0xFFFF'FFFF'FFFF'FFFF'FFFF'FFFF'FFFF'FFFF</state>
</option>
<option>
<name>CE2LogFileCheck</name>
<state>0</state>
</option>
<option>
<name>CE2LogFileEditB</name>
<state>$PROJ_DIR$\cspycomm.log</state>
</option>
<option>
<name>OCDriverInfo</name>
<state>1</state>
</option>
</data>
</settings>
<settings>
<name>GDBSERVER_ID</name>
<archiveVersion>2</archiveVersion>
@ -494,7 +563,7 @@
<name>IJET_ID</name>
<archiveVersion>2</archiveVersion>
<data>
<version>8</version>
<version>9</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
@ -718,6 +787,58 @@
<name>CCIjetUsbSerialNoSelect</name>
<state>0</state>
</option>
<option>
<name>CatchV8ARReset</name>
<state>0</state>
</option>
<option>
<name>CatchV8AREREL1NS</name>
<state>0</state>
</option>
<option>
<name>CatchV8AREREL1S</name>
<state>0</state>
</option>
<option>
<name>CatchV8AREREL2NS</name>
<state>0</state>
</option>
<option>
<name>CatchV8AREREL3S</name>
<state>0</state>
</option>
<option>
<name>CatchV8AREEL1NS</name>
<state>0</state>
</option>
<option>
<name>CatchV8ARREL1NS</name>
<state>0</state>
</option>
<option>
<name>CatchV8AREEL1S</name>
<state>0</state>
</option>
<option>
<name>CatchV8ARREL1S</name>
<state>0</state>
</option>
<option>
<name>CatchV8AREEL2NS</name>
<state>0</state>
</option>
<option>
<name>CatchV8ARREL2NS</name>
<state>0</state>
</option>
<option>
<name>CatchV8AREEL3S</name>
<state>0</state>
</option>
<option>
<name>CatchV8ARREL3S</name>
<state>0</state>
</option>
</data>
</settings>
<settings>
@ -831,7 +952,7 @@
<option>
<name>CCJLinkResetList</name>
<version>6</version>
<state>7</state>
<state>5</state>
</option>
<option>
<name>CCJLinkInterfaceCmdLine</name>
@ -924,7 +1045,7 @@
<name>LMIFTDI_ID</name>
<archiveVersion>2</archiveVersion>
<data>
<version>2</version>
<version>3</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
@ -951,6 +1072,19 @@
<name>CCLmiFtdiInterfaceCmdLine</name>
<state>0</state>
</option>
<option>
<name>CCLmiftdiUsbSerialNo</name>
<state></state>
</option>
<option>
<name>CCLmiftdiUsbSerialNoSelect</name>
<state>0</state>
</option>
<option>
<name>CCLmiftdiResetList</name>
<version>0</version>
<state>0</state>
</option>
</data>
</settings>
<settings>
@ -1003,7 +1137,7 @@
<name>STLINK_ID</name>
<archiveVersion>2</archiveVersion>
<data>
<version>6</version>
<version>8</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
@ -1118,9 +1252,17 @@
</option>
<option>
<name>CCSTLinkProbeList</name>
<version>0</version>
<version>2</version>
<state>2</state>
</option>
<option>
<name>CCSTLinkTargetVccEnable</name>
<state>1</state>
</option>
<option>
<name>CCSTLinkTargetVoltage</name>
<state>###Uninitialized###</state>
</option>
</data>
</settings>
<settings>
@ -1223,7 +1365,7 @@
<name>XDS100_ID</name>
<archiveVersion>2</archiveVersion>
<data>
<version>8</version>
<version>9</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
@ -1348,7 +1490,7 @@
</option>
<option>
<name>CCXds100ResetList</name>
<version>0</version>
<version>1</version>
<state>0</state>
</option>
<option>
@ -1397,6 +1539,10 @@
<name>OCXDSDigitalStatesConfigFile</name>
<state>1</state>
</option>
<option>
<name>OCSelectedCoreName</name>
<state>1</state>
</option>
</data>
</settings>
<debuggerPlugins>
@ -1416,10 +1562,6 @@
<file>$TOOLKIT_DIR$\plugins\rtos\FreeRtos\FreeRtosArmPlugin.ENU.ewplugin</file>
<loadFlag>0</loadFlag>
</plugin>
<plugin>
<file>$TOOLKIT_DIR$\plugins\rtos\HWRTOSplugin\HWRTOSplugin.ewplugin</file>
<loadFlag>0</loadFlag>
</plugin>
<plugin>
<file>$TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin.ENU.ewplugin</file>
<loadFlag>0</loadFlag>
@ -1432,30 +1574,18 @@
<file>$TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin</file>
<loadFlag>0</loadFlag>
</plugin>
<plugin>
<file>$TOOLKIT_DIR$\plugins\rtos\RemedyRtosViewer\RemedyRtosViewer.ewplugin</file>
<loadFlag>0</loadFlag>
</plugin>
<plugin>
<file>$TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin</file>
<loadFlag>0</loadFlag>
</plugin>
<plugin>
<file>$TOOLKIT_DIR$\plugins\rtos\SMX\smxAwareIarArm8.ewplugin</file>
<loadFlag>0</loadFlag>
</plugin>
<plugin>
<file>$TOOLKIT_DIR$\plugins\rtos\SMX\smxAwareIarArm8BE.ewplugin</file>
<file>$TOOLKIT_DIR$\plugins\rtos\SMX\smxAwareIarArm9a.ewplugin</file>
<loadFlag>0</loadFlag>
</plugin>
<plugin>
<file>$TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin</file>
<loadFlag>0</loadFlag>
</plugin>
<plugin>
<file>$TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin</file>
<loadFlag>0</loadFlag>
</plugin>
<plugin>
<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin</file>
<loadFlag>0</loadFlag>
@ -1492,7 +1622,7 @@
<name>C-SPY</name>
<archiveVersion>2</archiveVersion>
<data>
<version>31</version>
<version>33</version>
<wantNonLocal>1</wantNonLocal>
<debug>0</debug>
<option>
@ -1699,6 +1829,42 @@
<name>OCMulticoreSessionFile</name>
<state></state>
</option>
<option>
<name>OCTpiuBaseOption</name>
<state>1</state>
</option>
<option>
<name>OCOverrideSlave</name>
<state>0</state>
</option>
<option>
<name>OCOverrideSlavePath</name>
<state></state>
</option>
<option>
<name>C_32_64Device</name>
<state>1</state>
</option>
<option>
<name>AuthEnable</name>
<state>0</state>
</option>
<option>
<name>AuthSdmSelection</name>
<state>1</state>
</option>
<option>
<name>AuthSdmManifest</name>
<state></state>
</option>
<option>
<name>AuthSdmExplicitLib</name>
<state></state>
</option>
<option>
<name>AuthEnforce</name>
<state>0</state>
</option>
</data>
</settings>
<settings>
@ -1934,6 +2100,39 @@
</option>
</data>
</settings>
<settings>
<name>E2_ID</name>
<archiveVersion>2</archiveVersion>
<data>
<version>0</version>
<wantNonLocal>1</wantNonLocal>
<debug>0</debug>
<option>
<name>E2PowerFromProbe</name>
<state>1</state>
</option>
<option>
<name>CE2UsbSerialNo</name>
<state></state>
</option>
<option>
<name>CE2IdCodeEditB</name>
<state>0xFFFF'FFFF'FFFF'FFFF'FFFF'FFFF'FFFF'FFFF</state>
</option>
<option>
<name>CE2LogFileCheck</name>
<state>0</state>
</option>
<option>
<name>CE2LogFileEditB</name>
<state>$PROJ_DIR$\cspycomm.log</state>
</option>
<option>
<name>OCDriverInfo</name>
<state>1</state>
</option>
</data>
</settings>
<settings>
<name>GDBSERVER_ID</name>
<archiveVersion>2</archiveVersion>
@ -1975,7 +2174,7 @@
<name>IJET_ID</name>
<archiveVersion>2</archiveVersion>
<data>
<version>8</version>
<version>9</version>
<wantNonLocal>1</wantNonLocal>
<debug>0</debug>
<option>
@ -2199,6 +2398,58 @@
<name>CCIjetUsbSerialNoSelect</name>
<state>0</state>
</option>
<option>
<name>CatchV8ARReset</name>
<state>0</state>
</option>
<option>
<name>CatchV8AREREL1NS</name>
<state>0</state>
</option>
<option>
<name>CatchV8AREREL1S</name>
<state>0</state>
</option>
<option>
<name>CatchV8AREREL2NS</name>
<state>0</state>
</option>
<option>
<name>CatchV8AREREL3S</name>
<state>0</state>
</option>
<option>
<name>CatchV8AREEL1NS</name>
<state>0</state>
</option>
<option>
<name>CatchV8ARREL1NS</name>
<state>0</state>
</option>
<option>
<name>CatchV8AREEL1S</name>
<state>0</state>
</option>
<option>
<name>CatchV8ARREL1S</name>
<state>0</state>
</option>
<option>
<name>CatchV8AREEL2NS</name>
<state>0</state>
</option>
<option>
<name>CatchV8ARREL2NS</name>
<state>0</state>
</option>
<option>
<name>CatchV8AREEL3S</name>
<state>0</state>
</option>
<option>
<name>CatchV8ARREL3S</name>
<state>0</state>
</option>
</data>
</settings>
<settings>
@ -2405,7 +2656,7 @@
<name>LMIFTDI_ID</name>
<archiveVersion>2</archiveVersion>
<data>
<version>2</version>
<version>3</version>
<wantNonLocal>1</wantNonLocal>
<debug>0</debug>
<option>
@ -2432,6 +2683,19 @@
<name>CCLmiFtdiInterfaceCmdLine</name>
<state>0</state>
</option>
<option>
<name>CCLmiftdiUsbSerialNo</name>
<state></state>
</option>
<option>
<name>CCLmiftdiUsbSerialNoSelect</name>
<state>0</state>
</option>
<option>
<name>CCLmiftdiResetList</name>
<version>0</version>
<state>0</state>
</option>
</data>
</settings>
<settings>
@ -2484,7 +2748,7 @@
<name>STLINK_ID</name>
<archiveVersion>2</archiveVersion>
<data>
<version>6</version>
<version>8</version>
<wantNonLocal>1</wantNonLocal>
<debug>0</debug>
<option>
@ -2599,9 +2863,17 @@
</option>
<option>
<name>CCSTLinkProbeList</name>
<version>0</version>
<version>2</version>
<state>2</state>
</option>
<option>
<name>CCSTLinkTargetVccEnable</name>
<state>1</state>
</option>
<option>
<name>CCSTLinkTargetVoltage</name>
<state>###Uninitialized###</state>
</option>
</data>
</settings>
<settings>
@ -2704,7 +2976,7 @@
<name>XDS100_ID</name>
<archiveVersion>2</archiveVersion>
<data>
<version>8</version>
<version>9</version>
<wantNonLocal>1</wantNonLocal>
<debug>0</debug>
<option>
@ -2829,7 +3101,7 @@
</option>
<option>
<name>CCXds100ResetList</name>
<version>0</version>
<version>1</version>
<state>0</state>
</option>
<option>
@ -2878,6 +3150,10 @@
<name>OCXDSDigitalStatesConfigFile</name>
<state>1</state>
</option>
<option>
<name>OCSelectedCoreName</name>
<state>1</state>
</option>
</data>
</settings>
<debuggerPlugins>
@ -2897,10 +3173,6 @@
<file>$TOOLKIT_DIR$\plugins\rtos\FreeRtos\FreeRtosArmPlugin.ENU.ewplugin</file>
<loadFlag>0</loadFlag>
</plugin>
<plugin>
<file>$TOOLKIT_DIR$\plugins\rtos\HWRTOSplugin\HWRTOSplugin.ewplugin</file>
<loadFlag>0</loadFlag>
</plugin>
<plugin>
<file>$TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin.ENU.ewplugin</file>
<loadFlag>0</loadFlag>
@ -2913,30 +3185,18 @@
<file>$TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin</file>
<loadFlag>0</loadFlag>
</plugin>
<plugin>
<file>$TOOLKIT_DIR$\plugins\rtos\RemedyRtosViewer\RemedyRtosViewer.ewplugin</file>
<loadFlag>0</loadFlag>
</plugin>
<plugin>
<file>$TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin</file>
<loadFlag>0</loadFlag>
</plugin>
<plugin>
<file>$TOOLKIT_DIR$\plugins\rtos\SMX\smxAwareIarArm8.ewplugin</file>
<loadFlag>0</loadFlag>
</plugin>
<plugin>
<file>$TOOLKIT_DIR$\plugins\rtos\SMX\smxAwareIarArm8BE.ewplugin</file>
<file>$TOOLKIT_DIR$\plugins\rtos\SMX\smxAwareIarArm9a.ewplugin</file>
<loadFlag>0</loadFlag>
</plugin>
<plugin>
<file>$TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin</file>
<loadFlag>0</loadFlag>
</plugin>
<plugin>
<file>$TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin</file>
<loadFlag>0</loadFlag>
</plugin>
<plugin>
<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin</file>
<loadFlag>0</loadFlag>

373
cva_bootloader_m0146/cva_bootloader_m0146.ewp
View File

@ -1,6 +1,6 @@
<?xml version="1.0" encoding="UTF-8"?>
<project>
<fileVersion>3</fileVersion>
<fileVersion>4</fileVersion>
<configuration>
<name>Debug</name>
<toolchain>
@ -11,9 +11,13 @@
<name>General</name>
<archiveVersion>3</archiveVersion>
<data>
<version>31</version>
<version>36</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
<name>BrowseInfoPath</name>
<state>Debug\BrowseInfo</state>
</option>
<option>
<name>ExePath</name>
<state>Debug_FLASH\Exe</state>
@ -58,7 +62,7 @@
</option>
<option>
<name>RTDescription</name>
<state>Use the full configuration of the C/C++ runtime library. Full locale interface, C locale, file descriptor support, multibytes in printf and scanf, and hex floats in strtod.</state>
<state>A complete configuration of the C/C++14 runtime library. Full locale interface, C locale, file descriptor support, multibytes in printf and scanf, and hex floats in strtod.</state>
</option>
<option>
<name>OGProductVersion</name>
@ -66,15 +70,7 @@
</option>
<option>
<name>OGLastSavedByProductVersion</name>
<state>8.40.1.21529</state>
</option>
<option>
<name>GeneralEnableMisra</name>
<state>0</state>
</option>
<option>
<name>GeneralMisraVerbose</name>
<state>0</state>
<state>9.40.2.67586</state>
</option>
<option>
<name>OGChipSelectEditMenu</name>
@ -96,27 +92,13 @@
<name>GenStdoutInterface</name>
<state>0</state>
</option>
<option>
<name>GeneralMisraRules98</name>
<version>0</version>
<state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
</option>
<option>
<name>GeneralMisraVer</name>
<state>0</state>
</option>
<option>
<name>GeneralMisraRules04</name>
<version>0</version>
<state>111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111</state>
</option>
<option>
<name>RTConfigPath2</name>
<state>$TOOLKIT_DIR$\inc\c\DLib_Config_Full.h</state>
</option>
<option>
<name>GBECoreSlave</name>
<version>27</version>
<version>33</version>
<state>39</state>
</option>
<option>
@ -133,7 +115,7 @@
</option>
<option>
<name>CoreVariant</name>
<version>27</version>
<version>33</version>
<state>39</state>
</option>
<option>
@ -156,7 +138,7 @@
</option>
<option>
<name>GFPUCoreSlave2</name>
<version>27</version>
<version>33</version>
<state>39</state>
</option>
<option>
@ -209,13 +191,38 @@
<version>0</version>
<state>0</state>
</option>
<option>
<name>OGAarch64Abi</name>
<state>0</state>
</option>
<option>
<name>OG_32_64Device</name>
<state>0</state>
</option>
<option>
<name>BuildFilesPath</name>
<state>Debug</state>
</option>
<option>
<name>PointerAuthentication</name>
<state>0</state>
</option>
<option>
<name>FPU64</name>
<state>1</state>
</option>
<option>
<name>OG_32_64DeviceCoreSlave</name>
<version>33</version>
<state>39</state>
</option>
</data>
</settings>
<settings>
<name>ICCARM</name>
<archiveVersion>2</archiveVersion>
<data>
<version>35</version>
<version>38</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
@ -339,10 +346,6 @@
<name>PreInclude</name>
<state></state>
</option>
<option>
<name>CompilerMisraOverride</name>
<state>0</state>
</option>
<option>
<name>CCIncludePath2</name>
<state>$PROJ_DIR$\src\bootloader</state>
@ -357,6 +360,8 @@
<state>$PROJ_DIR$\src\private_driver</state>
<state>$PROJ_DIR$\SDK\platform\devices\CVM014x</state>
<state>$PROJ_DIR$\src\private_driver\drivers\clock</state>
<state>$PROJ_DIR$\src\RTT</state>
<state>$PROJ_DIR$\src\TLE9461</state>
</option>
<option>
<name>CCStdIncCheck</name>
@ -383,16 +388,6 @@
<name>CCOptLevelSlave</name>
<state>0</state>
</option>
<option>
<name>CompilerMisraRules98</name>
<version>0</version>
<state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
</option>
<option>
<name>CompilerMisraRules04</name>
<version>0</version>
<state>111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111</state>
</option>
<option>
<name>CCPosIndRopi</name>
<state>0</state>
@ -478,13 +473,25 @@
<name>OICompilerExtraOption</name>
<state>1</state>
</option>
<option>
<name>CCStackProtection</name>
<state>0</state>
</option>
<option>
<name>CCPointerAutentiction</name>
<state>0</state>
</option>
<option>
<name>CCBranchTargetIdentification</name>
<state>0</state>
</option>
</data>
</settings>
<settings>
<name>AARM</name>
<archiveVersion>2</archiveVersion>
<data>
<version>10</version>
<version>12</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
@ -641,6 +648,14 @@
<name>AsmNoLiteralPool</name>
<state>0</state>
</option>
<option>
<name>PreInclude</name>
<state></state>
</option>
<option>
<name>A_32_64Device</name>
<state>1</state>
</option>
</data>
</settings>
<settings>
@ -680,36 +695,20 @@
<extensions></extensions>
<cmdline></cmdline>
<hasPrio>0</hasPrio>
</data>
</settings>
<settings>
<name>BICOMP</name>
<archiveVersion>0</archiveVersion>
<data />
</settings>
<settings>
<name>BUILDACTION</name>
<archiveVersion>1</archiveVersion>
<data>
<prebuild></prebuild>
<postbuild></postbuild>
<buildSequence>inputOutputBased</buildSequence>
</data>
</settings>
<settings>
<name>ILINK</name>
<archiveVersion>0</archiveVersion>
<data>
<version>23</version>
<version>27</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
<name>IlinkLibIOConfig</name>
<state>1</state>
</option>
<option>
<name>XLinkMisraHandler</name>
<state>0</state>
</option>
<option>
<name>IlinkInputFileSlave</name>
<state>0</state>
@ -1035,6 +1034,42 @@
<name>IlinkRawBinaryAlign2</name>
<state></state>
</option>
<option>
<name>IlinkLogCrtRoutineSelection</name>
<state>0</state>
</option>
<option>
<name>IlinkLogFragmentInfo</name>
<state>0</state>
</option>
<option>
<name>IlinkLogInlining</name>
<state>0</state>
</option>
<option>
<name>IlinkLogMerging</name>
<state>0</state>
</option>
<option>
<name>IlinkDemangle</name>
<state>0</state>
</option>
<option>
<name>IlinkWrapperFileEnable</name>
<state>0</state>
</option>
<option>
<name>IlinkWrapperFile</name>
<state></state>
</option>
<option>
<name>IlinkProcessor</name>
<state>1</state>
</option>
<option>
<name>IlinkFpuProcessor</name>
<state>1</state>
</option>
</data>
</settings>
<settings>
@ -1059,8 +1094,8 @@
</data>
</settings>
<settings>
<name>BILINK</name>
<archiveVersion>0</archiveVersion>
<name>BUILDACTION</name>
<archiveVersion>2</archiveVersion>
<data />
</settings>
</configuration>
@ -1074,9 +1109,13 @@
<name>General</name>
<archiveVersion>3</archiveVersion>
<data>
<version>31</version>
<version>36</version>
<wantNonLocal>1</wantNonLocal>
<debug>0</debug>
<option>
<name>BrowseInfoPath</name>
<state>Release\BrowseInfo</state>
</option>
<option>
<name>ExePath</name>
<state>Release\Exe</state>
@ -1129,19 +1168,11 @@
</option>
<option>
<name>OGLastSavedByProductVersion</name>
<state>8.11.3.13977</state>
</option>
<option>
<name>GeneralEnableMisra</name>
<state>0</state>
</option>
<option>
<name>GeneralMisraVerbose</name>
<state>0</state>
<state>9.40.2.67586</state>
</option>
<option>
<name>OGChipSelectEditMenu</name>
<state>CVM0146 CVM0146</state>
<state>Default None</state>
</option>
<option>
<name>GenLowLevelInterface</name>
@ -1159,27 +1190,13 @@
<name>GenStdoutInterface</name>
<state>0</state>
</option>
<option>
<name>GeneralMisraRules98</name>
<version>0</version>
<state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
</option>
<option>
<name>GeneralMisraVer</name>
<state>0</state>
</option>
<option>
<name>GeneralMisraRules04</name>
<version>0</version>
<state>111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111</state>
</option>
<option>
<name>RTConfigPath2</name>
<state>$TOOLKIT_DIR$\INC\c\DLib_Config_Normal.h</state>
</option>
<option>
<name>GBECoreSlave</name>
<version>27</version>
<version>33</version>
<state>39</state>
</option>
<option>
@ -1196,8 +1213,8 @@
</option>
<option>
<name>CoreVariant</name>
<version>27</version>
<state>39</state>
<version>33</version>
<state>0</state>
</option>
<option>
<name>GFPUDeviceSlave</name>
@ -1219,7 +1236,7 @@
</option>
<option>
<name>GFPUCoreSlave2</name>
<version>27</version>
<version>33</version>
<state>39</state>
</option>
<option>
@ -1272,13 +1289,38 @@
<version>0</version>
<state>0</state>
</option>
<option>
<name>OGAarch64Abi</name>
<state>0</state>
</option>
<option>
<name>OG_32_64Device</name>
<state>0</state>
</option>
<option>
<name>BuildFilesPath</name>
<state>Release</state>
</option>
<option>
<name>PointerAuthentication</name>
<state>0</state>
</option>
<option>
<name>FPU64</name>
<state>1</state>
</option>
<option>
<name>OG_32_64DeviceCoreSlave</name>
<version>33</version>
<state>0</state>
</option>
</data>
</settings>
<settings>
<name>ICCARM</name>
<archiveVersion>2</archiveVersion>
<data>
<version>35</version>
<version>38</version>
<wantNonLocal>1</wantNonLocal>
<debug>0</debug>
<option>
@ -1402,10 +1444,6 @@
<name>PreInclude</name>
<state></state>
</option>
<option>
<name>CompilerMisraOverride</name>
<state>0</state>
</option>
<option>
<name>CCIncludePath2</name>
<state>$PROJ_DIR$\src\bootloader</state>
@ -1446,16 +1484,6 @@
<name>CCOptLevelSlave</name>
<state>3</state>
</option>
<option>
<name>CompilerMisraRules98</name>
<version>0</version>
<state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
</option>
<option>
<name>CompilerMisraRules04</name>
<version>0</version>
<state>111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111</state>
</option>
<option>
<name>CCPosIndRopi</name>
<state>0</state>
@ -1541,13 +1569,25 @@
<name>OICompilerExtraOption</name>
<state>1</state>
</option>
<option>
<name>CCStackProtection</name>
<state>0</state>
</option>
<option>
<name>CCPointerAutentiction</name>
<state>0</state>
</option>
<option>
<name>CCBranchTargetIdentification</name>
<state>0</state>
</option>
</data>
</settings>
<settings>
<name>AARM</name>
<archiveVersion>2</archiveVersion>
<data>
<version>10</version>
<version>12</version>
<wantNonLocal>1</wantNonLocal>
<debug>0</debug>
<option>
@ -1704,6 +1744,14 @@
<name>AsmNoLiteralPool</name>
<state>0</state>
</option>
<option>
<name>PreInclude</name>
<state></state>
</option>
<option>
<name>A_32_64Device</name>
<state>1</state>
</option>
</data>
</settings>
<settings>
@ -1743,36 +1791,20 @@
<extensions></extensions>
<cmdline></cmdline>
<hasPrio>0</hasPrio>
</data>
</settings>
<settings>
<name>BICOMP</name>
<archiveVersion>0</archiveVersion>
<data />
</settings>
<settings>
<name>BUILDACTION</name>
<archiveVersion>1</archiveVersion>
<data>
<prebuild></prebuild>
<postbuild>$PROJ_DIR$\bat_complier_object\convert_hex.bat</postbuild>
<buildSequence>inputOutputBased</buildSequence>
</data>
</settings>
<settings>
<name>ILINK</name>
<archiveVersion>0</archiveVersion>
<data>
<version>23</version>
<version>27</version>
<wantNonLocal>1</wantNonLocal>
<debug>0</debug>
<option>
<name>IlinkLibIOConfig</name>
<state>1</state>
</option>
<option>
<name>XLinkMisraHandler</name>
<state>0</state>
</option>
<option>
<name>IlinkInputFileSlave</name>
<state>0</state>
@ -2098,6 +2130,42 @@
<name>IlinkRawBinaryAlign2</name>
<state></state>
</option>
<option>
<name>IlinkLogCrtRoutineSelection</name>
<state>0</state>
</option>
<option>
<name>IlinkLogFragmentInfo</name>
<state>0</state>
</option>
<option>
<name>IlinkLogInlining</name>
<state>0</state>
</option>
<option>
<name>IlinkLogMerging</name>
<state>0</state>
</option>
<option>
<name>IlinkDemangle</name>
<state>0</state>
</option>
<option>
<name>IlinkWrapperFileEnable</name>
<state>0</state>
</option>
<option>
<name>IlinkWrapperFile</name>
<state></state>
</option>
<option>
<name>IlinkProcessor</name>
<state>1</state>
</option>
<option>
<name>IlinkFpuProcessor</name>
<state>1</state>
</option>
</data>
</settings>
<settings>
@ -2122,9 +2190,22 @@
</data>
</settings>
<settings>
<name>BILINK</name>
<archiveVersion>0</archiveVersion>
<data />
<name>BUILDACTION</name>
<archiveVersion>2</archiveVersion>
<data>
<buildActions>
<buildAction>
<cmdline>$PROJ_DIR$\bat_complier_object\convert_hex.bat &amp;&amp; echo &gt; "$BUILD_FILES_DIR$/.postbuild"</cmdline>
<workingDirectory>$PROJ_DIR$</workingDirectory>
<buildSequence>postLink</buildSequence>
<outputs>
<file>
<name>$BUILD_FILES_DIR$/.postbuild</name>
</file>
</outputs>
</buildAction>
</buildActions>
</data>
</settings>
</configuration>
<group>
@ -2863,6 +2944,36 @@
<name>$PROJ_DIR$\SDK\platform\devices\CVM014x\reg\wdg_reg.h</name>
</file>
</group>
<group>
<name>RTT</name>
<file>
<name>$PROJ_DIR$\src\RTT\SEGGER_RTT.c</name>
</file>
<file>
<name>$PROJ_DIR$\src\RTT\SEGGER_RTT.h</name>
</file>
<file>
<name>$PROJ_DIR$\src\RTT\SEGGER_RTT_ASM_ARMv7M.S</name>
</file>
<file>
<name>$PROJ_DIR$\src\RTT\SEGGER_RTT_Conf.h</name>
</file>
<file>
<name>$PROJ_DIR$\src\RTT\SEGGER_RTT_printf.c</name>
</file>
<file>
<name>$PROJ_DIR$\src\RTT\SEGGER_RTT_Syscalls_GCC.c</name>
</file>
</group>
<group>
<name>TLE9461</name>
<file>
<name>$PROJ_DIR$\src\TLE9461\TLE94x1.c</name>
</file>
<file>
<name>$PROJ_DIR$\src\TLE9461\TLE94x1_SPI.c</name>
</file>
</group>
<file>
<name>$PROJ_DIR$\src\main.c</name>
</file>

558
cva_bootloader_m0146/cva_bootloader_m0146.ewt
View File

@ -1,6 +1,6 @@
<?xml version="1.0" encoding="UTF-8"?>
<project>
<fileVersion>3</fileVersion>
<fileVersion>4</fileVersion>
<configuration>
<name>Debug</name>
<toolchain>
@ -9,9 +9,9 @@
<debug>1</debug>
<settings>
<name>C-STAT</name>
<archiveVersion>261</archiveVersion>
<archiveVersion>517</archiveVersion>
<data>
<version>261</version>
<version>517</version>
<cstatargs>
<useExtraArgs>0</useExtraArgs>
<extraArgs></extraArgs>
@ -22,9 +22,10 @@
<enableFalsePositives>0</enableFalsePositives>
<messagesLimitEnabled>1</messagesLimitEnabled>
<messagesLimit>100</messagesLimit>
<outputDir>Debug/C-STAT</outputDir>
</cstatargs>
<cstat_settings>
<cstat_version>1.5.5</cstat_version>
<cstat_version>2.5.2</cstat_version>
<checks_tree>
<package enabled="true" name="STDCHECKS">
<group enabled="true" name="ARR">
@ -304,15 +305,215 @@
</group>
</package>
<package enabled="false" name="CERT">
<group enabled="true" name="CERT-ARR">
<check enabled="true" name="CERT-ARR30-C_a" />
<check enabled="true" name="CERT-ARR30-C_b" />
<check enabled="true" name="CERT-ARR30-C_c" />
<check enabled="true" name="CERT-ARR30-C_d" />
<check enabled="true" name="CERT-ARR30-C_e" />
<check enabled="true" name="CERT-ARR30-C_f" />
<check enabled="true" name="CERT-ARR30-C_g" />
<check enabled="true" name="CERT-ARR30-C_h" />
<check enabled="true" name="CERT-ARR30-C_i" />
<check enabled="true" name="CERT-ARR30-C_j" />
<check enabled="true" name="CERT-ARR32-C" />
<check enabled="true" name="CERT-ARR36-C_a" />
<check enabled="true" name="CERT-ARR36-C_b" />
<check enabled="true" name="CERT-ARR37-C" />
<check enabled="true" name="CERT-ARR38-C_a" />
<check enabled="true" name="CERT-ARR38-C_b" />
<check enabled="true" name="CERT-ARR38-C_c" />
<check enabled="true" name="CERT-ARR38-C_d" />
<check enabled="true" name="CERT-ARR38-C_e" />
<check enabled="true" name="CERT-ARR38-C_f" />
<check enabled="true" name="CERT-ARR39-C" />
</group>
<group enabled="true" name="CERT-DCL">
<check enabled="true" name="CERT-DCL30-C_a" />
<check enabled="true" name="CERT-DCL30-C_b" />
<check enabled="true" name="CERT-DCL30-C_c" />
<check enabled="true" name="CERT-DCL30-C_d" />
<check enabled="true" name="CERT-DCL30-C_e" />
<check enabled="true" name="CERT-DCL31-C" />
<check enabled="true" name="CERT-DCL36-C" />
<check enabled="true" name="CERT-DCL37-C_a" />
<check enabled="true" name="CERT-DCL37-C_b" />
<check enabled="false" name="CERT-DCL37-C_c" />
<check enabled="true" name="CERT-DCL38-C" />
<check enabled="true" name="CERT-DCL39-C" />
<check enabled="true" name="CERT-DCL40-C" />
<check enabled="true" name="CERT-DCL41-C" />
</group>
<group enabled="true" name="CERT-ENV">
<check enabled="true" name="CERT-ENV30-C" />
<check enabled="true" name="CERT-ENV31-C" />
<check enabled="true" name="CERT-ENV32-C" />
<check enabled="true" name="CERT-ENV33-C" />
<check enabled="true" name="CERT-ENV34-C" />
</group>
<group enabled="true" name="CERT-ERR">
<check enabled="true" name="CERT-ERR30-C_a" />
<check enabled="true" name="CERT-ERR30-C_b" />
<check enabled="true" name="CERT-ERR30-C_c" />
<check enabled="true" name="CERT-ERR30-C_d" />
<check enabled="true" name="CERT-ERR30-C_e" />
<check enabled="true" name="CERT-ERR32-C" />
<check enabled="true" name="CERT-ERR33-C_a" />
<check enabled="true" name="CERT-ERR33-C_b" />
<check enabled="true" name="CERT-ERR33-C_c" />
<check enabled="true" name="CERT-ERR33-C_d" />
<check enabled="true" name="CERT-ERR34-C_a" />
<check enabled="true" name="CERT-ERR34-C_b" />
</group>
<group enabled="true" name="CERT-EXP">
<check enabled="true" name="CERT-EXP19-C" />
<check enabled="true" name="CERT-EXP30-C_a" />
<check enabled="true" name="CERT-EXP30-C_b" />
<check enabled="true" name="CERT-EXP32-C" />
<check enabled="true" name="CERT-EXP33-C_a" />
<check enabled="true" name="CERT-EXP33-C_b" />
<check enabled="true" name="CERT-EXP33-C_c" />
<check enabled="true" name="CERT-EXP33-C_d" />
<check enabled="true" name="CERT-EXP33-C_e" />
<check enabled="true" name="CERT-EXP33-C_f" />
<check enabled="true" name="CERT-EXP34-C_a" />
<check enabled="true" name="CERT-EXP34-C_b" />
<check enabled="true" name="CERT-EXP34-C_c" />
<check enabled="true" name="CERT-EXP34-C_d" />
<check enabled="true" name="CERT-EXP34-C_e" />
<check enabled="true" name="CERT-EXP34-C_f" />
<check enabled="true" name="CERT-EXP34-C_g" />
<check enabled="true" name="CERT-EXP35-C" />
<check enabled="true" name="CERT-EXP36-C_a" />
<check enabled="true" name="CERT-EXP36-C_b" />
<check enabled="true" name="CERT-EXP37-C_a" />
<check enabled="true" name="CERT-EXP37-C_b" />
<check enabled="true" name="CERT-EXP37-C_c" />
<check enabled="true" name="CERT-EXP39-C_a" />
<check enabled="true" name="CERT-EXP39-C_b" />
<check enabled="true" name="CERT-EXP39-C_c" />
<check enabled="true" name="CERT-EXP39-C_d" />
<check enabled="true" name="CERT-EXP39-C_e" />
<check enabled="true" name="CERT-EXP40-C_a" />
<check enabled="true" name="CERT-EXP40-C_b" />
<check enabled="true" name="CERT-EXP42-C" />
<check enabled="true" name="CERT-EXP43-C_a" />
<check enabled="true" name="CERT-EXP43-C_b" />
<check enabled="true" name="CERT-EXP43-C_c" />
<check enabled="true" name="CERT-EXP43-C_d" />
<check enabled="true" name="CERT-EXP44-C" />
<check enabled="true" name="CERT-EXP45-C" />
<check enabled="true" name="CERT-EXP46-C" />
<check enabled="true" name="CERT-EXP47-C_a" />
<check enabled="true" name="CERT-EXP47-C_b" />
</group>
<group enabled="true" name="CERT-FIO">
<check enabled="true" name="CERT-FIO30-C" />
<check enabled="true" name="CERT-FIO32-C" />
<check enabled="true" name="CERT-FIO34-C" />
<check enabled="true" name="CERT-FIO37-C" />
<check enabled="true" name="CERT-FIO38-C" />
<check enabled="true" name="CERT-FIO39-C" />
<check enabled="true" name="CERT-FIO40-C" />
<check enabled="true" name="CERT-FIO41-C" />
<check enabled="true" name="CERT-FIO42-C_a" />
<check enabled="false" name="CERT-FIO42-C_b" />
<check enabled="true" name="CERT-FIO44-C" />
<check enabled="true" name="CERT-FIO45-C" />
<check enabled="true" name="CERT-FIO46-C_a" />
<check enabled="true" name="CERT-FIO46-C_b" />
<check enabled="true" name="CERT-FIO46-C_c" />
<check enabled="true" name="CERT-FIO47-C_a" />
<check enabled="true" name="CERT-FIO47-C_b" />
<check enabled="true" name="CERT-FIO47-C_c" />
</group>
<group enabled="true" name="CERT-FLP">
<check enabled="true" name="CERT-FLP30-C_a" />
<check enabled="true" name="CERT-FLP30-C_b" />
<check enabled="true" name="CERT-FLP32-C_a" />
<check enabled="true" name="CERT-FLP32-C_b" />
<check enabled="true" name="CERT-FLP34-C" />
<check enabled="true" name="CERT-FLP36-C" />
<check enabled="true" name="CERT-FLP37-C" />
</group>
<group enabled="true" name="CERT-INT">
<check enabled="true" name="CERT-INT30-C_a" />
<check enabled="false" name="CERT-INT30-C_b" />
<check enabled="true" name="CERT-INT31-C_a" />
<check enabled="true" name="CERT-INT31-C_b" />
<check enabled="true" name="CERT-INT31-C_c" />
<check enabled="true" name="CERT-INT32-C_a" />
<check enabled="false" name="CERT-INT32-C_b" />
<check enabled="true" name="CERT-INT33-C_a" />
<check enabled="true" name="CERT-INT33-C_b" />
<check enabled="true" name="CERT-INT33-C_c" />
<check enabled="true" name="CERT-INT33-C_d" />
<check enabled="true" name="CERT-INT33-C_e" />
<check enabled="true" name="CERT-INT33-C_f" />
<check enabled="true" name="CERT-INT33-C_g" />
<check enabled="true" name="CERT-INT33-C_h" />
<check enabled="true" name="CERT-INT33-C_i" />
<check enabled="true" name="CERT-INT34-C_a" />
<check enabled="true" name="CERT-INT34-C_b" />
<check enabled="true" name="CERT-INT34-C_c" />
<check enabled="true" name="CERT-INT35-C" />
<check enabled="true" name="CERT-INT36-C" />
</group>
<group enabled="true" name="CERT-MEM">
<check enabled="true" name="CERT-MEM30-C_a" />
<check enabled="true" name="CERT-MEM30-C_b" />
<check enabled="true" name="CERT-MEM30-C_c" />
<check enabled="true" name="CERT-MEM31-C" />
<check enabled="true" name="CERT-MEM33-C_a" />
<check enabled="true" name="CERT-MEM33-C_b" />
<check enabled="true" name="CERT-MEM34-C_a" />
<check enabled="true" name="CERT-MEM34-C_b" />
<check enabled="true" name="CERT-MEM34-C_c" />
<check enabled="true" name="CERT-MEM35-C_a" />
<check enabled="true" name="CERT-MEM35-C_b" />
<check enabled="true" name="CERT-MEM35-C_c" />
<check enabled="true" name="CERT-MEM36-C" />
</group>
<group enabled="true" name="CERT-MSC">
<check enabled="true" name="CERT-MSC30-C" />
<check enabled="true" name="CERT-MSC32-C" />
<check enabled="false" name="CERT-MSC33-C" />
<check enabled="true" name="CERT-MSC37-C" />
<check enabled="true" name="CERT-MSC38-C" />
<check enabled="true" name="CERT-MSC39-C" />
<check enabled="true" name="CERT-MSC40-C_a" />
<check enabled="true" name="CERT-MSC40-C_b" />
<check enabled="true" name="CERT-MSC40-C_c" />
<check enabled="true" name="CERT-MSC40-C_d" />
<check enabled="false" name="CERT-MSC40-C_e" />
<check enabled="true" name="CERT-MSC41-C_a" />
<check enabled="true" name="CERT-MSC41-C_b" />
<check enabled="true" name="CERT-MSC41-C_c" />
</group>
<group enabled="true" name="CERT-PRE">
<check enabled="true" name="CERT-PRE31-C" />
<check enabled="true" name="CERT-PRE32-C_a" />
<check enabled="true" name="CERT-PRE32-C_b" />
</group>
<group enabled="true" name="CERT-SIG">
<check enabled="true" name="CERT-SIG30-C" />
<check enabled="true" name="CERT-SIG31-C" />
<check enabled="true" name="CERT-SIG34-C" />
<check enabled="true" name="CERT-SIG35-C" />
</group>
<group enabled="true" name="CERT-STR">
<check enabled="true" name="CERT-STR30-C" />
<check enabled="true" name="CERT-STR31-C_a" />
<check enabled="true" name="CERT-STR31-C_b" />
<check enabled="true" name="CERT-STR31-C_c" />
<check enabled="true" name="CERT-STR31-C_d" />
<check enabled="true" name="CERT-STR31-C_e" />
<check enabled="true" name="CERT-STR31-C_f" />
<check enabled="true" name="CERT-STR31-C_g" />
<check enabled="true" name="CERT-STR31-C_h" />
<check enabled="true" name="CERT-STR32-C" />
<check enabled="true" name="CERT-STR34-C" />
<check enabled="true" name="CERT-STR37-C" />
</group>
</package>
<package enabled="false" name="SECURITY">
@ -395,6 +596,7 @@
<check enabled="false" name="MISRAC2004-2.4" />
</group>
<group enabled="true" name="MISRAC2004-5">
<check enabled="true" name="MISRAC2004-5.1" />
<check enabled="true" name="MISRAC2004-5.2" />
<check enabled="true" name="MISRAC2004-5.3" />
<check enabled="true" name="MISRAC2004-5.4" />
@ -422,11 +624,8 @@
<check enabled="true" name="MISRAC2004-8.7" />
<check enabled="true" name="MISRAC2004-8.8_a" />
<check enabled="true" name="MISRAC2004-8.8_b" />
<check enabled="false" name="MISRAC2004-8.9" />
<check enabled="true" name="MISRAC2004-8.12" />
</group>
<group enabled="true" name="MISRAC2004-8 10">
<check enabled="true" name="MISRAC2004-8.10" />
<check enabled="true" name="MISRAC2004-8.12" />
</group>
<group enabled="true" name="MISRAC2004-9">
<check enabled="true" name="MISRAC2004-9.1_a" />
@ -600,6 +799,7 @@
<check enabled="false" name="MISRAC2012-Dir-4.11_h" />
<check enabled="false" name="MISRAC2012-Dir-4.11_i" />
<check enabled="false" name="MISRAC2012-Dir-4.12" />
<check enabled="false" name="MISRAC2012-Dir-4.13_a" />
<check enabled="true" name="MISRAC2012-Dir-4.13_b" />
<check enabled="true" name="MISRAC2012-Dir-4.13_c" />
<check enabled="true" name="MISRAC2012-Dir-4.13_d" />
@ -607,6 +807,18 @@
<check enabled="true" name="MISRAC2012-Dir-4.13_f" />
<check enabled="true" name="MISRAC2012-Dir-4.13_g" />
<check enabled="false" name="MISRAC2012-Dir-4.13_h" />
<check enabled="true" name="MISRAC2012-Dir-4.14_a" />
<check enabled="true" name="MISRAC2012-Dir-4.14_b" />
<check enabled="true" name="MISRAC2012-Dir-4.14_c" />
<check enabled="true" name="MISRAC2012-Dir-4.14_d" />
<check enabled="true" name="MISRAC2012-Dir-4.14_e" />
<check enabled="true" name="MISRAC2012-Dir-4.14_f" />
<check enabled="true" name="MISRAC2012-Dir-4.14_g" />
<check enabled="true" name="MISRAC2012-Dir-4.14_h" />
<check enabled="true" name="MISRAC2012-Dir-4.14_i" />
<check enabled="true" name="MISRAC2012-Dir-4.14_j" />
<check enabled="true" name="MISRAC2012-Dir-4.14_l" />
<check enabled="true" name="MISRAC2012-Dir-4.14_m" />
</group>
<group enabled="true" name="MISRAC2012-Rule-1">
<check enabled="true" name="MISRAC2012-Rule-1.3_a" />
@ -620,6 +832,7 @@
<check enabled="true" name="MISRAC2012-Rule-1.3_i" />
<check enabled="true" name="MISRAC2012-Rule-1.3_j" />
<check enabled="true" name="MISRAC2012-Rule-1.3_k" />
<check enabled="true" name="MISRAC2012-Rule-1.3_l" />
<check enabled="true" name="MISRAC2012-Rule-1.3_m" />
<check enabled="true" name="MISRAC2012-Rule-1.3_n" />
<check enabled="true" name="MISRAC2012-Rule-1.3_o" />
@ -630,7 +843,8 @@
<check enabled="true" name="MISRAC2012-Rule-1.3_t" />
<check enabled="true" name="MISRAC2012-Rule-1.3_u" />
<check enabled="true" name="MISRAC2012-Rule-1.3_v" />
<check enabled="true" name="MISRAC2012-Rule-1.3_w" />
<check enabled="true" name="MISRAC2012-Rule-1.4_a" />
<check enabled="true" name="MISRAC2012-Rule-1.4_b" />
</group>
<group enabled="true" name="MISRAC2012-Rule-2">
<check enabled="true" name="MISRAC2012-Rule-2.1_a" />
@ -678,11 +892,10 @@
<check enabled="true" name="MISRAC2012-Rule-8.1" />
<check enabled="true" name="MISRAC2012-Rule-8.2_a" />
<check enabled="true" name="MISRAC2012-Rule-8.2_b" />
<check enabled="true" name="MISRAC2012-Rule-8.3_b" />
<check enabled="true" name="MISRAC2012-Rule-8.3" />
<check enabled="true" name="MISRAC2012-Rule-8.4" />
<check enabled="false" name="MISRAC2012-Rule-8.5_a" />
<check enabled="true" name="MISRAC2012-Rule-8.5_b" />
<check enabled="true" name="MISRAC2012-Rule-8.6" />
<check enabled="false" name="MISRAC2012-Rule-8.7" />
<check enabled="false" name="MISRAC2012-Rule-8.9_a" />
<check enabled="false" name="MISRAC2012-Rule-8.9_b" />
@ -737,6 +950,8 @@
<check enabled="false" name="MISRAC2012-Rule-12.1" />
<check enabled="true" name="MISRAC2012-Rule-12.2" />
<check enabled="false" name="MISRAC2012-Rule-12.3" />
<check enabled="false" name="MISRAC2012-Rule-12.4" />
<check enabled="true" name="MISRAC2012-Rule-12.5" />
</group>
<group enabled="true" name="MISRAC2012-Rule-13">
<check enabled="true" name="MISRAC2012-Rule-13.1" />
@ -819,6 +1034,8 @@
<check enabled="true" name="MISRAC2012-Rule-20.4_c89" />
<check enabled="true" name="MISRAC2012-Rule-20.4_c99" />
<check enabled="false" name="MISRAC2012-Rule-20.5" />
<check enabled="true" name="MISRAC2012-Rule-20.6_a" />
<check enabled="true" name="MISRAC2012-Rule-20.6_b" />
<check enabled="true" name="MISRAC2012-Rule-20.7" />
<check enabled="false" name="MISRAC2012-Rule-20.10" />
</group>
@ -836,6 +1053,22 @@
<check enabled="true" name="MISRAC2012-Rule-21.11" />
<check enabled="false" name="MISRAC2012-Rule-21.12_a" />
<check enabled="false" name="MISRAC2012-Rule-21.12_b" />
<check enabled="true" name="MISRAC2012-Rule-21.13" />
<check enabled="true" name="MISRAC2012-Rule-21.14" />
<check enabled="true" name="MISRAC2012-Rule-21.15" />
<check enabled="true" name="MISRAC2012-Rule-21.16" />
<check enabled="true" name="MISRAC2012-Rule-21.17_a" />
<check enabled="true" name="MISRAC2012-Rule-21.17_b" />
<check enabled="true" name="MISRAC2012-Rule-21.17_c" />
<check enabled="true" name="MISRAC2012-Rule-21.17_d" />
<check enabled="true" name="MISRAC2012-Rule-21.17_e" />
<check enabled="true" name="MISRAC2012-Rule-21.17_f" />
<check enabled="true" name="MISRAC2012-Rule-21.18_a" />
<check enabled="true" name="MISRAC2012-Rule-21.18_b" />
<check enabled="true" name="MISRAC2012-Rule-21.19_a" />
<check enabled="true" name="MISRAC2012-Rule-21.19_b" />
<check enabled="true" name="MISRAC2012-Rule-21.20" />
<check enabled="true" name="MISRAC2012-Rule-21.21" />
</group>
<group enabled="true" name="MISRAC2012-Rule-22">
<check enabled="true" name="MISRAC2012-Rule-22.1_a" />
@ -848,6 +1081,11 @@
<check enabled="true" name="MISRAC2012-Rule-22.5_a" />
<check enabled="true" name="MISRAC2012-Rule-22.5_b" />
<check enabled="true" name="MISRAC2012-Rule-22.6" />
<check enabled="true" name="MISRAC2012-Rule-22.7_a" />
<check enabled="true" name="MISRAC2012-Rule-22.7_b" />
<check enabled="true" name="MISRAC2012-Rule-22.8" />
<check enabled="true" name="MISRAC2012-Rule-22.9" />
<check enabled="true" name="MISRAC2012-Rule-22.10" />
</group>
</package>
<package enabled="false" name="MISRAC++2008">
@ -944,8 +1182,7 @@
</group>
<group enabled="true" name="MISRAC++2008-5-3">
<check enabled="true" name="MISRAC++2008-5-3-1" />
<check enabled="true" name="MISRAC++2008-5-3-2_a" />
<check enabled="true" name="MISRAC++2008-5-3-2_b" />
<check enabled="true" name="MISRAC++2008-5-3-2" />
<check enabled="true" name="MISRAC++2008-5-3-3" />
<check enabled="true" name="MISRAC++2008-5-3-4" />
</group>
@ -984,9 +1221,11 @@
</group>
<group enabled="true" name="MISRAC++2008-6-5">
<check enabled="true" name="MISRAC++2008-6-5-1_a" />
<check enabled="true" name="MISRAC++2008-6-5-1_b" />
<check enabled="true" name="MISRAC++2008-6-5-2" />
<check enabled="true" name="MISRAC++2008-6-5-3" />
<check enabled="true" name="MISRAC++2008-6-5-4" />
<check enabled="true" name="MISRAC++2008-6-5-5" />
<check enabled="true" name="MISRAC++2008-6-5-6" />
</group>
<group enabled="true" name="MISRAC++2008-6-6">
@ -1195,9 +1434,9 @@
<debug>0</debug>
<settings>
<name>C-STAT</name>
<archiveVersion>261</archiveVersion>
<archiveVersion>517</archiveVersion>
<data>
<version>261</version>
<version>517</version>
<cstatargs>
<useExtraArgs>0</useExtraArgs>
<extraArgs></extraArgs>
@ -1208,9 +1447,10 @@
<enableFalsePositives>0</enableFalsePositives>
<messagesLimitEnabled>1</messagesLimitEnabled>
<messagesLimit>100</messagesLimit>
<outputDir>Release/C-STAT</outputDir>
</cstatargs>
<cstat_settings>
<cstat_version>1.5.5</cstat_version>
<cstat_version>2.5.2</cstat_version>
<checks_tree>
<package enabled="true" name="STDCHECKS">
<group enabled="true" name="ARR">
@ -1490,15 +1730,215 @@
</group>
</package>
<package enabled="false" name="CERT">
<group enabled="true" name="CERT-ARR">
<check enabled="true" name="CERT-ARR30-C_a" />
<check enabled="true" name="CERT-ARR30-C_b" />
<check enabled="true" name="CERT-ARR30-C_c" />
<check enabled="true" name="CERT-ARR30-C_d" />
<check enabled="true" name="CERT-ARR30-C_e" />
<check enabled="true" name="CERT-ARR30-C_f" />
<check enabled="true" name="CERT-ARR30-C_g" />
<check enabled="true" name="CERT-ARR30-C_h" />
<check enabled="true" name="CERT-ARR30-C_i" />
<check enabled="true" name="CERT-ARR30-C_j" />
<check enabled="true" name="CERT-ARR32-C" />
<check enabled="true" name="CERT-ARR36-C_a" />
<check enabled="true" name="CERT-ARR36-C_b" />
<check enabled="true" name="CERT-ARR37-C" />
<check enabled="true" name="CERT-ARR38-C_a" />
<check enabled="true" name="CERT-ARR38-C_b" />
<check enabled="true" name="CERT-ARR38-C_c" />
<check enabled="true" name="CERT-ARR38-C_d" />
<check enabled="true" name="CERT-ARR38-C_e" />
<check enabled="true" name="CERT-ARR38-C_f" />
<check enabled="true" name="CERT-ARR39-C" />
</group>
<group enabled="true" name="CERT-DCL">
<check enabled="true" name="CERT-DCL30-C_a" />
<check enabled="true" name="CERT-DCL30-C_b" />
<check enabled="true" name="CERT-DCL30-C_c" />
<check enabled="true" name="CERT-DCL30-C_d" />
<check enabled="true" name="CERT-DCL30-C_e" />
<check enabled="true" name="CERT-DCL31-C" />
<check enabled="true" name="CERT-DCL36-C" />
<check enabled="true" name="CERT-DCL37-C_a" />
<check enabled="true" name="CERT-DCL37-C_b" />
<check enabled="false" name="CERT-DCL37-C_c" />
<check enabled="true" name="CERT-DCL38-C" />
<check enabled="true" name="CERT-DCL39-C" />
<check enabled="true" name="CERT-DCL40-C" />
<check enabled="true" name="CERT-DCL41-C" />
</group>
<group enabled="true" name="CERT-ENV">
<check enabled="true" name="CERT-ENV30-C" />
<check enabled="true" name="CERT-ENV31-C" />
<check enabled="true" name="CERT-ENV32-C" />
<check enabled="true" name="CERT-ENV33-C" />
<check enabled="true" name="CERT-ENV34-C" />
</group>
<group enabled="true" name="CERT-ERR">
<check enabled="true" name="CERT-ERR30-C_a" />
<check enabled="true" name="CERT-ERR30-C_b" />
<check enabled="true" name="CERT-ERR30-C_c" />
<check enabled="true" name="CERT-ERR30-C_d" />
<check enabled="true" name="CERT-ERR30-C_e" />
<check enabled="true" name="CERT-ERR32-C" />
<check enabled="true" name="CERT-ERR33-C_a" />
<check enabled="true" name="CERT-ERR33-C_b" />
<check enabled="true" name="CERT-ERR33-C_c" />
<check enabled="true" name="CERT-ERR33-C_d" />
<check enabled="true" name="CERT-ERR34-C_a" />
<check enabled="true" name="CERT-ERR34-C_b" />
</group>
<group enabled="true" name="CERT-EXP">
<check enabled="true" name="CERT-EXP19-C" />
<check enabled="true" name="CERT-EXP30-C_a" />
<check enabled="true" name="CERT-EXP30-C_b" />
<check enabled="true" name="CERT-EXP32-C" />
<check enabled="true" name="CERT-EXP33-C_a" />
<check enabled="true" name="CERT-EXP33-C_b" />
<check enabled="true" name="CERT-EXP33-C_c" />
<check enabled="true" name="CERT-EXP33-C_d" />
<check enabled="true" name="CERT-EXP33-C_e" />
<check enabled="true" name="CERT-EXP33-C_f" />
<check enabled="true" name="CERT-EXP34-C_a" />
<check enabled="true" name="CERT-EXP34-C_b" />
<check enabled="true" name="CERT-EXP34-C_c" />
<check enabled="true" name="CERT-EXP34-C_d" />
<check enabled="true" name="CERT-EXP34-C_e" />
<check enabled="true" name="CERT-EXP34-C_f" />
<check enabled="true" name="CERT-EXP34-C_g" />
<check enabled="true" name="CERT-EXP35-C" />
<check enabled="true" name="CERT-EXP36-C_a" />
<check enabled="true" name="CERT-EXP36-C_b" />
<check enabled="true" name="CERT-EXP37-C_a" />
<check enabled="true" name="CERT-EXP37-C_b" />
<check enabled="true" name="CERT-EXP37-C_c" />
<check enabled="true" name="CERT-EXP39-C_a" />
<check enabled="true" name="CERT-EXP39-C_b" />
<check enabled="true" name="CERT-EXP39-C_c" />
<check enabled="true" name="CERT-EXP39-C_d" />
<check enabled="true" name="CERT-EXP39-C_e" />
<check enabled="true" name="CERT-EXP40-C_a" />
<check enabled="true" name="CERT-EXP40-C_b" />
<check enabled="true" name="CERT-EXP42-C" />
<check enabled="true" name="CERT-EXP43-C_a" />
<check enabled="true" name="CERT-EXP43-C_b" />
<check enabled="true" name="CERT-EXP43-C_c" />
<check enabled="true" name="CERT-EXP43-C_d" />
<check enabled="true" name="CERT-EXP44-C" />
<check enabled="true" name="CERT-EXP45-C" />
<check enabled="true" name="CERT-EXP46-C" />
<check enabled="true" name="CERT-EXP47-C_a" />
<check enabled="true" name="CERT-EXP47-C_b" />
</group>
<group enabled="true" name="CERT-FIO">
<check enabled="true" name="CERT-FIO30-C" />
<check enabled="true" name="CERT-FIO32-C" />
<check enabled="true" name="CERT-FIO34-C" />
<check enabled="true" name="CERT-FIO37-C" />
<check enabled="true" name="CERT-FIO38-C" />
<check enabled="true" name="CERT-FIO39-C" />
<check enabled="true" name="CERT-FIO40-C" />
<check enabled="true" name="CERT-FIO41-C" />
<check enabled="true" name="CERT-FIO42-C_a" />
<check enabled="false" name="CERT-FIO42-C_b" />
<check enabled="true" name="CERT-FIO44-C" />
<check enabled="true" name="CERT-FIO45-C" />
<check enabled="true" name="CERT-FIO46-C_a" />
<check enabled="true" name="CERT-FIO46-C_b" />
<check enabled="true" name="CERT-FIO46-C_c" />
<check enabled="true" name="CERT-FIO47-C_a" />
<check enabled="true" name="CERT-FIO47-C_b" />
<check enabled="true" name="CERT-FIO47-C_c" />
</group>
<group enabled="true" name="CERT-FLP">
<check enabled="true" name="CERT-FLP30-C_a" />
<check enabled="true" name="CERT-FLP30-C_b" />
<check enabled="true" name="CERT-FLP32-C_a" />
<check enabled="true" name="CERT-FLP32-C_b" />
<check enabled="true" name="CERT-FLP34-C" />
<check enabled="true" name="CERT-FLP36-C" />
<check enabled="true" name="CERT-FLP37-C" />
</group>
<group enabled="true" name="CERT-INT">
<check enabled="true" name="CERT-INT30-C_a" />
<check enabled="false" name="CERT-INT30-C_b" />
<check enabled="true" name="CERT-INT31-C_a" />
<check enabled="true" name="CERT-INT31-C_b" />
<check enabled="true" name="CERT-INT31-C_c" />
<check enabled="true" name="CERT-INT32-C_a" />
<check enabled="false" name="CERT-INT32-C_b" />
<check enabled="true" name="CERT-INT33-C_a" />
<check enabled="true" name="CERT-INT33-C_b" />
<check enabled="true" name="CERT-INT33-C_c" />
<check enabled="true" name="CERT-INT33-C_d" />
<check enabled="true" name="CERT-INT33-C_e" />
<check enabled="true" name="CERT-INT33-C_f" />
<check enabled="true" name="CERT-INT33-C_g" />
<check enabled="true" name="CERT-INT33-C_h" />
<check enabled="true" name="CERT-INT33-C_i" />
<check enabled="true" name="CERT-INT34-C_a" />
<check enabled="true" name="CERT-INT34-C_b" />
<check enabled="true" name="CERT-INT34-C_c" />
<check enabled="true" name="CERT-INT35-C" />
<check enabled="true" name="CERT-INT36-C" />
</group>
<group enabled="true" name="CERT-MEM">
<check enabled="true" name="CERT-MEM30-C_a" />
<check enabled="true" name="CERT-MEM30-C_b" />
<check enabled="true" name="CERT-MEM30-C_c" />
<check enabled="true" name="CERT-MEM31-C" />
<check enabled="true" name="CERT-MEM33-C_a" />
<check enabled="true" name="CERT-MEM33-C_b" />
<check enabled="true" name="CERT-MEM34-C_a" />
<check enabled="true" name="CERT-MEM34-C_b" />
<check enabled="true" name="CERT-MEM34-C_c" />
<check enabled="true" name="CERT-MEM35-C_a" />
<check enabled="true" name="CERT-MEM35-C_b" />
<check enabled="true" name="CERT-MEM35-C_c" />
<check enabled="true" name="CERT-MEM36-C" />
</group>
<group enabled="true" name="CERT-MSC">
<check enabled="true" name="CERT-MSC30-C" />
<check enabled="true" name="CERT-MSC32-C" />
<check enabled="false" name="CERT-MSC33-C" />
<check enabled="true" name="CERT-MSC37-C" />
<check enabled="true" name="CERT-MSC38-C" />
<check enabled="true" name="CERT-MSC39-C" />
<check enabled="true" name="CERT-MSC40-C_a" />
<check enabled="true" name="CERT-MSC40-C_b" />
<check enabled="true" name="CERT-MSC40-C_c" />
<check enabled="true" name="CERT-MSC40-C_d" />
<check enabled="false" name="CERT-MSC40-C_e" />
<check enabled="true" name="CERT-MSC41-C_a" />
<check enabled="true" name="CERT-MSC41-C_b" />
<check enabled="true" name="CERT-MSC41-C_c" />
</group>
<group enabled="true" name="CERT-PRE">
<check enabled="true" name="CERT-PRE31-C" />
<check enabled="true" name="CERT-PRE32-C_a" />
<check enabled="true" name="CERT-PRE32-C_b" />
</group>
<group enabled="true" name="CERT-SIG">
<check enabled="true" name="CERT-SIG30-C" />
<check enabled="true" name="CERT-SIG31-C" />
<check enabled="true" name="CERT-SIG34-C" />
<check enabled="true" name="CERT-SIG35-C" />
</group>
<group enabled="true" name="CERT-STR">
<check enabled="true" name="CERT-STR30-C" />
<check enabled="true" name="CERT-STR31-C_a" />
<check enabled="true" name="CERT-STR31-C_b" />
<check enabled="true" name="CERT-STR31-C_c" />
<check enabled="true" name="CERT-STR31-C_d" />
<check enabled="true" name="CERT-STR31-C_e" />
<check enabled="true" name="CERT-STR31-C_f" />
<check enabled="true" name="CERT-STR31-C_g" />
<check enabled="true" name="CERT-STR31-C_h" />
<check enabled="true" name="CERT-STR32-C" />
<check enabled="true" name="CERT-STR34-C" />
<check enabled="true" name="CERT-STR37-C" />
</group>
</package>
<package enabled="false" name="SECURITY">
@ -1581,6 +2021,7 @@
<check enabled="false" name="MISRAC2004-2.4" />
</group>
<group enabled="true" name="MISRAC2004-5">
<check enabled="true" name="MISRAC2004-5.1" />
<check enabled="true" name="MISRAC2004-5.2" />
<check enabled="true" name="MISRAC2004-5.3" />
<check enabled="true" name="MISRAC2004-5.4" />
@ -1608,11 +2049,8 @@
<check enabled="true" name="MISRAC2004-8.7" />
<check enabled="true" name="MISRAC2004-8.8_a" />
<check enabled="true" name="MISRAC2004-8.8_b" />
<check enabled="false" name="MISRAC2004-8.9" />
<check enabled="true" name="MISRAC2004-8.12" />
</group>
<group enabled="true" name="MISRAC2004-8 10">
<check enabled="true" name="MISRAC2004-8.10" />
<check enabled="true" name="MISRAC2004-8.12" />
</group>
<group enabled="true" name="MISRAC2004-9">
<check enabled="true" name="MISRAC2004-9.1_a" />
@ -1786,6 +2224,7 @@
<check enabled="false" name="MISRAC2012-Dir-4.11_h" />
<check enabled="false" name="MISRAC2012-Dir-4.11_i" />
<check enabled="false" name="MISRAC2012-Dir-4.12" />
<check enabled="false" name="MISRAC2012-Dir-4.13_a" />
<check enabled="true" name="MISRAC2012-Dir-4.13_b" />
<check enabled="true" name="MISRAC2012-Dir-4.13_c" />
<check enabled="true" name="MISRAC2012-Dir-4.13_d" />
@ -1793,6 +2232,18 @@
<check enabled="true" name="MISRAC2012-Dir-4.13_f" />
<check enabled="true" name="MISRAC2012-Dir-4.13_g" />
<check enabled="false" name="MISRAC2012-Dir-4.13_h" />
<check enabled="true" name="MISRAC2012-Dir-4.14_a" />
<check enabled="true" name="MISRAC2012-Dir-4.14_b" />
<check enabled="true" name="MISRAC2012-Dir-4.14_c" />
<check enabled="true" name="MISRAC2012-Dir-4.14_d" />
<check enabled="true" name="MISRAC2012-Dir-4.14_e" />
<check enabled="true" name="MISRAC2012-Dir-4.14_f" />
<check enabled="true" name="MISRAC2012-Dir-4.14_g" />
<check enabled="true" name="MISRAC2012-Dir-4.14_h" />
<check enabled="true" name="MISRAC2012-Dir-4.14_i" />
<check enabled="true" name="MISRAC2012-Dir-4.14_j" />
<check enabled="true" name="MISRAC2012-Dir-4.14_l" />
<check enabled="true" name="MISRAC2012-Dir-4.14_m" />
</group>
<group enabled="true" name="MISRAC2012-Rule-1">
<check enabled="true" name="MISRAC2012-Rule-1.3_a" />
@ -1806,6 +2257,7 @@
<check enabled="true" name="MISRAC2012-Rule-1.3_i" />
<check enabled="true" name="MISRAC2012-Rule-1.3_j" />
<check enabled="true" name="MISRAC2012-Rule-1.3_k" />
<check enabled="true" name="MISRAC2012-Rule-1.3_l" />
<check enabled="true" name="MISRAC2012-Rule-1.3_m" />
<check enabled="true" name="MISRAC2012-Rule-1.3_n" />
<check enabled="true" name="MISRAC2012-Rule-1.3_o" />
@ -1816,7 +2268,8 @@
<check enabled="true" name="MISRAC2012-Rule-1.3_t" />
<check enabled="true" name="MISRAC2012-Rule-1.3_u" />
<check enabled="true" name="MISRAC2012-Rule-1.3_v" />
<check enabled="true" name="MISRAC2012-Rule-1.3_w" />
<check enabled="true" name="MISRAC2012-Rule-1.4_a" />
<check enabled="true" name="MISRAC2012-Rule-1.4_b" />
</group>
<group enabled="true" name="MISRAC2012-Rule-2">
<check enabled="true" name="MISRAC2012-Rule-2.1_a" />
@ -1864,11 +2317,10 @@
<check enabled="true" name="MISRAC2012-Rule-8.1" />
<check enabled="true" name="MISRAC2012-Rule-8.2_a" />
<check enabled="true" name="MISRAC2012-Rule-8.2_b" />
<check enabled="true" name="MISRAC2012-Rule-8.3_b" />
<check enabled="true" name="MISRAC2012-Rule-8.3" />
<check enabled="true" name="MISRAC2012-Rule-8.4" />
<check enabled="false" name="MISRAC2012-Rule-8.5_a" />
<check enabled="true" name="MISRAC2012-Rule-8.5_b" />
<check enabled="true" name="MISRAC2012-Rule-8.6" />
<check enabled="false" name="MISRAC2012-Rule-8.7" />
<check enabled="false" name="MISRAC2012-Rule-8.9_a" />
<check enabled="false" name="MISRAC2012-Rule-8.9_b" />
@ -1923,6 +2375,8 @@
<check enabled="false" name="MISRAC2012-Rule-12.1" />
<check enabled="true" name="MISRAC2012-Rule-12.2" />
<check enabled="false" name="MISRAC2012-Rule-12.3" />
<check enabled="false" name="MISRAC2012-Rule-12.4" />
<check enabled="true" name="MISRAC2012-Rule-12.5" />
</group>
<group enabled="true" name="MISRAC2012-Rule-13">
<check enabled="true" name="MISRAC2012-Rule-13.1" />
@ -2005,6 +2459,8 @@
<check enabled="true" name="MISRAC2012-Rule-20.4_c89" />
<check enabled="true" name="MISRAC2012-Rule-20.4_c99" />
<check enabled="false" name="MISRAC2012-Rule-20.5" />
<check enabled="true" name="MISRAC2012-Rule-20.6_a" />
<check enabled="true" name="MISRAC2012-Rule-20.6_b" />
<check enabled="true" name="MISRAC2012-Rule-20.7" />
<check enabled="false" name="MISRAC2012-Rule-20.10" />
</group>
@ -2022,6 +2478,22 @@
<check enabled="true" name="MISRAC2012-Rule-21.11" />
<check enabled="false" name="MISRAC2012-Rule-21.12_a" />
<check enabled="false" name="MISRAC2012-Rule-21.12_b" />
<check enabled="true" name="MISRAC2012-Rule-21.13" />
<check enabled="true" name="MISRAC2012-Rule-21.14" />
<check enabled="true" name="MISRAC2012-Rule-21.15" />
<check enabled="true" name="MISRAC2012-Rule-21.16" />
<check enabled="true" name="MISRAC2012-Rule-21.17_a" />
<check enabled="true" name="MISRAC2012-Rule-21.17_b" />
<check enabled="true" name="MISRAC2012-Rule-21.17_c" />
<check enabled="true" name="MISRAC2012-Rule-21.17_d" />
<check enabled="true" name="MISRAC2012-Rule-21.17_e" />
<check enabled="true" name="MISRAC2012-Rule-21.17_f" />
<check enabled="true" name="MISRAC2012-Rule-21.18_a" />
<check enabled="true" name="MISRAC2012-Rule-21.18_b" />
<check enabled="true" name="MISRAC2012-Rule-21.19_a" />
<check enabled="true" name="MISRAC2012-Rule-21.19_b" />
<check enabled="true" name="MISRAC2012-Rule-21.20" />
<check enabled="true" name="MISRAC2012-Rule-21.21" />
</group>
<group enabled="true" name="MISRAC2012-Rule-22">
<check enabled="true" name="MISRAC2012-Rule-22.1_a" />
@ -2034,6 +2506,11 @@
<check enabled="true" name="MISRAC2012-Rule-22.5_a" />
<check enabled="true" name="MISRAC2012-Rule-22.5_b" />
<check enabled="true" name="MISRAC2012-Rule-22.6" />
<check enabled="true" name="MISRAC2012-Rule-22.7_a" />
<check enabled="true" name="MISRAC2012-Rule-22.7_b" />
<check enabled="true" name="MISRAC2012-Rule-22.8" />
<check enabled="true" name="MISRAC2012-Rule-22.9" />
<check enabled="true" name="MISRAC2012-Rule-22.10" />
</group>
</package>
<package enabled="false" name="MISRAC++2008">
@ -2130,8 +2607,7 @@
</group>
<group enabled="true" name="MISRAC++2008-5-3">
<check enabled="true" name="MISRAC++2008-5-3-1" />
<check enabled="true" name="MISRAC++2008-5-3-2_a" />
<check enabled="true" name="MISRAC++2008-5-3-2_b" />
<check enabled="true" name="MISRAC++2008-5-3-2" />
<check enabled="true" name="MISRAC++2008-5-3-3" />
<check enabled="true" name="MISRAC++2008-5-3-4" />
</group>
@ -2170,9 +2646,11 @@
</group>
<group enabled="true" name="MISRAC++2008-6-5">
<check enabled="true" name="MISRAC++2008-6-5-1_a" />
<check enabled="true" name="MISRAC++2008-6-5-1_b" />
<check enabled="true" name="MISRAC++2008-6-5-2" />
<check enabled="true" name="MISRAC++2008-6-5-3" />
<check enabled="true" name="MISRAC++2008-6-5-4" />
<check enabled="true" name="MISRAC++2008-6-5-5" />
<check enabled="true" name="MISRAC++2008-6-5-6" />
</group>
<group enabled="true" name="MISRAC++2008-6-6">
@ -3101,6 +3579,36 @@
<name>$PROJ_DIR$\SDK\platform\devices\CVM014x\reg\wdg_reg.h</name>
</file>
</group>
<group>
<name>RTT</name>
<file>
<name>$PROJ_DIR$\src\RTT\SEGGER_RTT.c</name>
</file>
<file>
<name>$PROJ_DIR$\src\RTT\SEGGER_RTT.h</name>
</file>
<file>
<name>$PROJ_DIR$\src\RTT\SEGGER_RTT_ASM_ARMv7M.S</name>
</file>
<file>
<name>$PROJ_DIR$\src\RTT\SEGGER_RTT_Conf.h</name>
</file>
<file>
<name>$PROJ_DIR$\src\RTT\SEGGER_RTT_printf.c</name>
</file>
<file>
<name>$PROJ_DIR$\src\RTT\SEGGER_RTT_Syscalls_GCC.c</name>
</file>
</group>
<group>
<name>TLE9461</name>
<file>
<name>$PROJ_DIR$\src\TLE9461\TLE94x1.c</name>
</file>
<file>
<name>$PROJ_DIR$\src\TLE9461\TLE94x1_SPI.c</name>
</file>
</group>
<file>
<name>$PROJ_DIR$\src\main.c</name>
</file>

4
cva_bootloader_m0146/settings/cva_bootloader_m0146.Debug.cspy.bat
View File

@ -25,7 +25,7 @@ if not "%~1" == "" goto debugFile
@echo on
"E:\IAR Systems\Embedded Workbench 8.3\common\bin\cspybat" -f "F:\FCB_project\RP-01\CODE\cva_bootloader_m0146\settings\cva_bootloader_m0146.Debug.general.xcl" --backend -f "F:\FCB_project\RP-01\CODE\cva_bootloader_m0146\settings\cva_bootloader_m0146.Debug.driver.xcl"
"E:\Program Files\IAR Systems\Embedded Workbench 9.2\common\bin\cspybat" -f "F:\FCB_project\RP-01\CODE\cva_bootloader_m0146\settings\cva_bootloader_m0146.Debug.general.xcl" --backend -f "F:\FCB_project\RP-01\CODE\cva_bootloader_m0146\settings\cva_bootloader_m0146.Debug.driver.xcl"
@echo off
goto end
@ -34,7 +34,7 @@ goto end
@echo on
"E:\IAR Systems\Embedded Workbench 8.3\common\bin\cspybat" -f "F:\FCB_project\RP-01\CODE\cva_bootloader_m0146\settings\cva_bootloader_m0146.Debug.general.xcl" "--debug_file=%~1" --backend -f "F:\FCB_project\RP-01\CODE\cva_bootloader_m0146\settings\cva_bootloader_m0146.Debug.driver.xcl"
"E:\Program Files\IAR Systems\Embedded Workbench 9.2\common\bin\cspybat" -f "F:\FCB_project\RP-01\CODE\cva_bootloader_m0146\settings\cva_bootloader_m0146.Debug.general.xcl" "--debug_file=%~1" --backend -f "F:\FCB_project\RP-01\CODE\cva_bootloader_m0146\settings\cva_bootloader_m0146.Debug.driver.xcl"
@echo off
:end

4
cva_bootloader_m0146/settings/cva_bootloader_m0146.Debug.cspy.ps1
View File

@ -23,9 +23,9 @@
if ($debugfile -eq "")
{
& "E:\IAR Systems\Embedded Workbench 8.3\common\bin\cspybat" -f "F:\FCB_project\RP-01\CODE\cva_bootloader_m0146\settings\cva_bootloader_m0146.Debug.general.xcl" --backend -f "F:\FCB_project\RP-01\CODE\cva_bootloader_m0146\settings\cva_bootloader_m0146.Debug.driver.xcl"
& "E:\Program Files\IAR Systems\Embedded Workbench 9.2\common\bin\cspybat" -f "F:\FCB_project\RP-01\CODE\cva_bootloader_m0146\settings\cva_bootloader_m0146.Debug.general.xcl" --backend -f "F:\FCB_project\RP-01\CODE\cva_bootloader_m0146\settings\cva_bootloader_m0146.Debug.driver.xcl"
}
else
{
& "E:\IAR Systems\Embedded Workbench 8.3\common\bin\cspybat" -f "F:\FCB_project\RP-01\CODE\cva_bootloader_m0146\settings\cva_bootloader_m0146.Debug.general.xcl" --debug_file=$debugfile --backend -f "F:\FCB_project\RP-01\CODE\cva_bootloader_m0146\settings\cva_bootloader_m0146.Debug.driver.xcl"
& "E:\Program Files\IAR Systems\Embedded Workbench 9.2\common\bin\cspybat" -f "F:\FCB_project\RP-01\CODE\cva_bootloader_m0146\settings\cva_bootloader_m0146.Debug.general.xcl" --debug_file=$debugfile --backend -f "F:\FCB_project\RP-01\CODE\cva_bootloader_m0146\settings\cva_bootloader_m0146.Debug.driver.xcl"
}

2
cva_bootloader_m0146/settings/cva_bootloader_m0146.Debug.driver.xcl
View File

@ -6,7 +6,7 @@
"-p"
"E:\IAR Systems\Embedded Workbench 8.3\arm\CONFIG\debugger\CVAChip\CVM0144.ddf"
"E:\Program Files\IAR Systems\Embedded Workbench 9.2\arm\config\debugger\CVAChip\CVM0144.ddf"
"--semihosting"

6
cva_bootloader_m0146/settings/cva_bootloader_m0146.Debug.general.xcl
View File

@ -1,10 +1,10 @@
"E:\IAR Systems\Embedded Workbench 8.3\arm\bin\armproc.dll"
"E:\Program Files\IAR Systems\Embedded Workbench 9.2\arm\bin\armPROC.dll"
"E:\IAR Systems\Embedded Workbench 8.3\arm\bin\armjlink2.dll"
"E:\Program Files\IAR Systems\Embedded Workbench 9.2\arm\bin\armJLINK.dll"
"F:\FCB_project\RP-01\CODE\cva_bootloader_m0146\Debug_FLASH\Exe\bootloader_m146.out"
--plugin="E:\IAR Systems\Embedded Workbench 8.3\arm\bin\armbat.dll"
--plugin="E:\Program Files\IAR Systems\Embedded Workbench 9.2\arm\bin\armbat.dll"

156
cva_bootloader_m0146/settings/cva_bootloader_m0146.dbgdt
View File

File diff suppressed because one or more lines are too long

89
cva_bootloader_m0146/settings/cva_bootloader_m0146.dnx
View File

@ -15,19 +15,24 @@
<WatchCond>_ 0</WatchCond>
<Watch0>_ 0 "" 0 "" 0 "" 0 "" 0 0 0 0</Watch0>
<Watch1>_ 0 "" 0 "" 0 "" 0 "" 0 0 0 0</Watch1>
<CStepIntDis>_ 0</CStepIntDis>
<jlinkResetStyle>12</jlinkResetStyle>
<jlinkResetStrategy>0</jlinkResetStrategy>
<TraceBufferSize>0x10000</TraceBufferSize>
<TraceStallIfFIFOFull>0x0</TraceStallIfFIFOFull>
<TracePortSize>0x4</TracePortSize>
<LeaveTargetRunning>_ 0</LeaveTargetRunning>
<CStepIntDis>_ 0</CStepIntDis>
</JLinkDriver>
<DebugChecksum>
<Checksum>2109377255</Checksum>
<Checksum>3292783323</Checksum>
</DebugChecksum>
<Trace1>
<Enabled>0</Enabled>
<ShowSource>1</ShowSource>
</Trace1>
<Disassembly>
<InstrCount>0</InstrCount>
<MixedMode>1</MixedMode>
<InstrCount>0</InstrCount>
</Disassembly>
<CodeCoverage>
<Enabled>0</Enabled>
@ -59,9 +64,43 @@
<ITMportsLogFile>0</ITMportsLogFile>
<ITMlogFile>$PROJ_DIR$\ITM.log</ITMlogFile>
</SWOTraceHWSettings>
<LogFile>
<LoggingEnabled>_ 0</LoggingEnabled>
<LogFile>_ ""</LogFile>
<Category>_ 0</Category>
</LogFile>
<CallStackLog>
<Enabled>0</Enabled>
</CallStackLog>
<CallStackStripe>
<ShowTiming>1</ShowTiming>
</CallStackStripe>
<PlDriver>
<FirstRun>0</FirstRun>
<MemConfigValue>E:\Program Files\IAR Systems\Embedded Workbench 9.2\arm\config\debugger\CVAChip\CVM0144.ddf</MemConfigValue>
</PlDriver>
<ArmDriver>
<EnableCache>0</EnableCache>
<EnforceMemoryConfiguration>1</EnforceMemoryConfiguration>
</ArmDriver>
<TerminalIO>
<InputSource>1</InputSource>
<InputMode>10</InputMode>
<Filename>$PROJ_DIR$\TermIOInput.txt</Filename>
<InputEcho>1</InputEcho>
<ShowReset>0</ShowReset>
<InputEncoding>2</InputEncoding>
<OutputEncoding>2</OutputEncoding>
</TerminalIO>
<array_types>
<Fmt0>uint8_t[2056] 4 0</Fmt0>
</array_types>
<DriverProfiling>
<Enabled>0</Enabled>
<Mode>1</Mode>
<Graph>0</Graph>
<Symbiont>0</Symbiont>
</DriverProfiling>
<Trace2>
<Enabled>0</Enabled>
<ShowSource>0</ShowSource>
@ -77,30 +116,33 @@
<EventSLEEP>0</EventSLEEP>
</SWOTraceWindow>
<PowerLog>
<GraphEnabled>0</GraphEnabled>
<LogEnabled>0</LogEnabled>
<ShowTimeLog>1</ShowTimeLog>
<Title_0>I0</Title_0>
<Symbol_0>0 4 0</Symbol_0>
<LogEnabled>0</LogEnabled>
<GraphEnabled>0</GraphEnabled>
<ShowTimeLog>1</ShowTimeLog>
<LiveEnabled>0</LiveEnabled>
<LiveFile>PowerLogLive.log</LiveFile>
</PowerLog>
<DataLog>
<LogEnabled>0</LogEnabled>
<GraphEnabled>0</GraphEnabled>
<LogEnabled>0</LogEnabled>
<ShowTimeLog>1</ShowTimeLog>
<SumEnabled>0</SumEnabled>
<ShowTimeSum>1</ShowTimeSum>
</DataLog>
<InterruptLog>
<LogEnabled>0</LogEnabled>
<GraphEnabled>0</GraphEnabled>
<LogEnabled>0</LogEnabled>
<ShowTimeLog>1</ShowTimeLog>
<SumEnabled>0</SumEnabled>
<ShowTimeSum>1</ShowTimeSum>
<SumSortOrder>0</SumSortOrder>
</InterruptLog>
<EventLog>
<GraphEnabled>0</GraphEnabled>
<LogEnabled>0</LogEnabled>
<ShowTimeLog>1</ShowTimeLog>
<Title_0>Ch3</Title_0>
<Symbol_0>0 0 1</Symbol_0>
<Title_1>Ch2</Title_1>
@ -109,45 +151,26 @@
<Symbol_2>0 0 1</Symbol_2>
<Title_3>Ch0</Title_3>
<Symbol_3>0 0 1</Symbol_3>
<LogEnabled>0</LogEnabled>
<GraphEnabled>0</GraphEnabled>
<ShowTimeLog>1</ShowTimeLog>
<SumEnabled>0</SumEnabled>
<ShowTimeSum>1</ShowTimeSum>
<SumSortOrder>0</SumSortOrder>
</EventLog>
<TermIOLog>
<LoggingEnabled>_ 0</LoggingEnabled>
<LogFile>_ ""</LogFile>
</TermIOLog>
<LogFile>
<LoggingEnabled>_ 0</LoggingEnabled>
<LogFile>_ ""</LogFile>
<Category>_ 0</Category>
</LogFile>
<DriverProfiling>
<Enabled>0</Enabled>
<Mode>1</Mode>
<Graph>0</Graph>
<Symbiont>0</Symbiont>
</DriverProfiling>
<CallStackLog>
<Enabled>0</Enabled>
</CallStackLog>
<CallStackStripe>
<ShowTiming>1</ShowTiming>
</CallStackStripe>
<PowerProbe>
<Frequency>10000</Frequency>
<Probe0>I0</Probe0>
<ProbeSetup0>2 1 1 2 0 0</ProbeSetup0>
</PowerProbe>
<TermIOLog>
<LoggingEnabled>_ 0</LoggingEnabled>
<LogFile>_ ""</LogFile>
</TermIOLog>
<DisassembleMode>
<mode>0</mode>
</DisassembleMode>
<Breakpoints2>
<Bp0>_ 0 "EMUL_CODE" "0x00002C66" 0 0 1 "" 0 "" 0</Bp0>
<Count>1</Count>
<Bp1>_ 1 "EMUL_CODE" "{$PROJ_DIR$\src\private_driver\drivers\clock\clock_drv.c}.2474.10" 0 0 1 "" 0 "" 0</Bp1>
<Count>2</Count>
</Breakpoints2>
<Aliases>
<Count>0</Count>

288
cva_bootloader_m0146/settings/cva_bootloader_m0146.wsdt
View File

File diff suppressed because one or more lines are too long

2
cva_bootloader_m0146/settings/cva_bootloader_m0146_EditorBookmarks.xml Normal file
View File

@ -0,0 +1,2 @@
<?xml version="1.0" encoding="UTF-8"?>
<userBookmarks />

23
cva_bootloader_m0146/src/RTT/README.txt Normal file
View File

@ -0,0 +1,23 @@
README.txt for the SEGGER RTT Implementation Pack.
MDK-ARM specifics:
https://wiki.segger.com/Keil_MDK-ARM#RTT_in_uVision
Included files:
===============
Root Directory
- Examples
- Main_RTT_InputEchoApp.c - Sample application which echoes input on Channel 0.
- Main_RTT_MenuApp.c - Sample application to demonstrate RTT bi-directional functionality.
- Main_RTT_PrintfTest.c - Sample application to test RTT small printf implementation.
- Main_RTT_SpeedTestApp.c - Sample application for measuring RTT performance. embOS needed.
- RTT
- SEGGER_RTT.c - The RTT implementation.
- SEGGER_RTT.h - Header for RTT implementation.
- SEGGER_RTT_Conf.h - Pre-processor configuration for the RTT implementation.
- SEGGER_RTT_Printf.c - Simple implementation of printf to write formatted strings via RTT.
- Syscalls
- RTT_Syscalls_GCC.c - Low-level syscalls to retarget printf() to RTT with GCC / Newlib.
- RTT_Syscalls_IAR.c - Low-level syscalls to retarget printf() to RTT with IAR compiler.
- RTT_Syscalls_KEIL.c - Low-level syscalls to retarget printf() to RTT with KEIL/uVision compiler.
- RTT_Syscalls_SES.c - Low-level syscalls to retarget printf() to RTT with SEGGER Embedded Studio.

2078
cva_bootloader_m0146/src/RTT/SEGGER_RTT.c Normal file
View File

File diff suppressed because it is too large Load Diff

419
cva_bootloader_m0146/src/RTT/SEGGER_RTT.h Normal file
View File

@ -0,0 +1,419 @@
/*********************************************************************
* SEGGER Microcontroller GmbH *
* The Embedded Experts *
**********************************************************************
* *
* (c) 1995 - 2021 SEGGER Microcontroller GmbH *
* *
* www.segger.com Support: support@segger.com *
* *
**********************************************************************
* *
* SEGGER RTT * Real Time Transfer for embedded targets *
* *
**********************************************************************
* *
* All rights reserved. *
* *
* SEGGER strongly recommends to not make any changes *
* to or modify the source code of this software in order to stay *
* compatible with the RTT protocol and J-Link. *
* *
* Redistribution and use in source and binary forms, with or *
* without modification, are permitted provided that the following *
* condition is met: *
* *
* o Redistributions of source code must retain the above copyright *
* notice, this condition and the following disclaimer. *
* *
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, *
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF *
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE *
* DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR *
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR *
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT *
* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; *
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT *
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE *
* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH *
* DAMAGE. *
* *
**********************************************************************
* *
* RTT version: 7.22b *
* *
**********************************************************************
---------------------------END-OF-HEADER------------------------------
File : SEGGER_RTT.h
Purpose : Implementation of SEGGER real-time transfer which allows
real-time communication on targets which support debugger
memory accesses while the CPU is running.
Revision: $Rev: 20869 $
----------------------------------------------------------------------
*/
#ifndef SEGGER_RTT_H
#define SEGGER_RTT_H
#include "SEGGER_RTT_Conf.h"
/*********************************************************************
*
* Defines, defaults
*
**********************************************************************
*/
#ifndef RTT_USE_ASM
#if (defined __SES_ARM) // SEGGER Embedded Studio
#define _CC_HAS_RTT_ASM_SUPPORT 1
#elif (defined __CROSSWORKS_ARM) // Rowley Crossworks
#define _CC_HAS_RTT_ASM_SUPPORT 1
#elif (defined __ARMCC_VERSION) // ARM compiler
#if (__ARMCC_VERSION >= 6000000) // ARM compiler V6.0 and later is clang based
#define _CC_HAS_RTT_ASM_SUPPORT 1
#else
#define _CC_HAS_RTT_ASM_SUPPORT 0
#endif
#elif (defined __GNUC__) // GCC
#define _CC_HAS_RTT_ASM_SUPPORT 1
#elif (defined __clang__) // Clang compiler
#define _CC_HAS_RTT_ASM_SUPPORT 1
#elif ((defined __IASMARM__) || (defined __ICCARM__)) // IAR assembler/compiler
#define _CC_HAS_RTT_ASM_SUPPORT 1
#else
#define _CC_HAS_RTT_ASM_SUPPORT 0
#endif
#if ((defined __IASMARM__) || (defined __ICCARM__)) // IAR assembler/compiler
//
// IAR assembler / compiler
//
#if (__VER__ < 6300000)
#define VOLATILE
#else
#define VOLATILE volatile
#endif
#if (defined __ARM7M__) // Needed for old versions that do not know the define yet
#if (__CORE__ == __ARM7M__) // Cortex-M3
#define _CORE_HAS_RTT_ASM_SUPPORT 1
#endif
#endif
#if (defined __ARM7EM__) // Needed for old versions that do not know the define yet
#if (__CORE__ == __ARM7EM__) // Cortex-M4/M7
#define _CORE_HAS_RTT_ASM_SUPPORT 1
#define _CORE_NEEDS_DMB 1
#define RTT__DMB() asm VOLATILE ("DMB");
#endif
#endif
#if (defined __ARM8M_BASELINE__) // Needed for old versions that do not know the define yet
#if (__CORE__ == __ARM8M_BASELINE__) // Cortex-M23
#define _CORE_HAS_RTT_ASM_SUPPORT 0
#define _CORE_NEEDS_DMB 1
#define RTT__DMB() asm VOLATILE ("DMB");
#endif
#endif
#if (defined __ARM8M_MAINLINE__) // Needed for old versions that do not know the define yet
#if (__CORE__ == __ARM8M_MAINLINE__) // Cortex-M33
#define _CORE_HAS_RTT_ASM_SUPPORT 1
#define _CORE_NEEDS_DMB 1
#define RTT__DMB() asm VOLATILE ("DMB");
#endif
#endif
#else
//
// GCC / Clang
//
#if (defined __ARM_ARCH_7M__) // Cortex-M3
#define _CORE_HAS_RTT_ASM_SUPPORT 1
#elif (defined __ARM_ARCH_7EM__) // Cortex-M4/M7
#define _CORE_HAS_RTT_ASM_SUPPORT 1
#define _CORE_NEEDS_DMB 1
#define RTT__DMB() __asm volatile ("dmb\n" : : :);
#elif (defined __ARM_ARCH_8M_BASE__) // Cortex-M23
#define _CORE_HAS_RTT_ASM_SUPPORT 0
#define _CORE_NEEDS_DMB 1
#define RTT__DMB() __asm volatile ("dmb\n" : : :);
#elif (defined __ARM_ARCH_8M_MAIN__) // Cortex-M33
#define _CORE_HAS_RTT_ASM_SUPPORT 1
#define _CORE_NEEDS_DMB 1
#define RTT__DMB() __asm volatile ("dmb\n" : : :);
#else
#define _CORE_HAS_RTT_ASM_SUPPORT 0
#endif
#endif
//
// If IDE and core support the ASM version, enable ASM version by default
//
#ifndef _CORE_HAS_RTT_ASM_SUPPORT
#define _CORE_HAS_RTT_ASM_SUPPORT 0 // Default for unknown cores
#endif
#if (_CC_HAS_RTT_ASM_SUPPORT && _CORE_HAS_RTT_ASM_SUPPORT)
#define RTT_USE_ASM (1)
#else
#define RTT_USE_ASM (0)
#endif
#endif
//
// We need to know if a DMB is needed to make sure that on Cortex-M7 etc.
// the order of accesses to the ring buffers is guaranteed
// Needed for: Cortex-M7, Cortex-M23, Cortex-M33
//
#ifndef _CORE_NEEDS_DMB
#define _CORE_NEEDS_DMB 0
#endif
#ifndef RTT__DMB
#if _CORE_NEEDS_DMB
#error "Don't know how to place inline assembly for DMB"
#else
#define RTT__DMB()
#endif
#endif
#ifndef SEGGER_RTT_CPU_CACHE_LINE_SIZE
#define SEGGER_RTT_CPU_CACHE_LINE_SIZE (0) // On most target systems where RTT is used, we do not have a CPU cache, therefore 0 is a good default here
#endif
#ifndef SEGGER_RTT_UNCACHED_OFF
#if SEGGER_RTT_CPU_CACHE_LINE_SIZE
#error "SEGGER_RTT_UNCACHED_OFF must be defined when setting SEGGER_RTT_CPU_CACHE_LINE_SIZE != 0"
#else
#define SEGGER_RTT_UNCACHED_OFF (0)
#endif
#endif
#if RTT_USE_ASM
#if SEGGER_RTT_CPU_CACHE_LINE_SIZE
#error "RTT_USE_ASM is not available if SEGGER_RTT_CPU_CACHE_LINE_SIZE != 0"
#endif
#endif
#ifndef SEGGER_RTT_ASM // defined when SEGGER_RTT.h is included from assembly file
#include <stdlib.h>
#include <stdarg.h>
/*********************************************************************
*
* Defines, fixed
*
**********************************************************************
*/
//
// Determine how much we must pad the control block to make it a multiple of a cache line in size
// Assuming: U8 = 1B
// U16 = 2B
// U32 = 4B
// U8/U16/U32* = 4B
//
#if SEGGER_RTT_CPU_CACHE_LINE_SIZE // Avoid division by zero in case we do not have any cache
#define SEGGER_RTT__ROUND_UP_2_CACHE_LINE_SIZE(NumBytes) (((NumBytes + SEGGER_RTT_CPU_CACHE_LINE_SIZE - 1) / SEGGER_RTT_CPU_CACHE_LINE_SIZE) * SEGGER_RTT_CPU_CACHE_LINE_SIZE)
#else
#define SEGGER_RTT__ROUND_UP_2_CACHE_LINE_SIZE(NumBytes) (NumBytes)
#endif
#define SEGGER_RTT__CB_SIZE (16 + 4 + 4 + (SEGGER_RTT_MAX_NUM_UP_BUFFERS * 24) + (SEGGER_RTT_MAX_NUM_DOWN_BUFFERS * 24))
#define SEGGER_RTT__CB_PADDING (SEGGER_RTT__ROUND_UP_2_CACHE_LINE_SIZE(SEGGER_RTT__CB_SIZE) - SEGGER_RTT__CB_SIZE)
/*********************************************************************
*
* Types
*
**********************************************************************
*/
//
// Description for a circular buffer (also called "ring buffer")
// which is used as up-buffer (T->H)
//
typedef struct {
const char* sName; // Optional name. Standard names so far are: "Terminal", "SysView", "J-Scope_t4i4"
char* pBuffer; // Pointer to start of buffer
unsigned SizeOfBuffer; // Buffer size in bytes. Note that one byte is lost, as this implementation does not fill up the buffer in order to avoid the problem of being unable to distinguish between full and empty.
unsigned WrOff; // Position of next item to be written by either target.
volatile unsigned RdOff; // Position of next item to be read by host. Must be volatile since it may be modified by host.
unsigned Flags; // Contains configuration flags
} SEGGER_RTT_BUFFER_UP;
//
// Description for a circular buffer (also called "ring buffer")
// which is used as down-buffer (H->T)
//
typedef struct {
const char* sName; // Optional name. Standard names so far are: "Terminal", "SysView", "J-Scope_t4i4"
char* pBuffer; // Pointer to start of buffer
unsigned SizeOfBuffer; // Buffer size in bytes. Note that one byte is lost, as this implementation does not fill up the buffer in order to avoid the problem of being unable to distinguish between full and empty.
volatile unsigned WrOff; // Position of next item to be written by host. Must be volatile since it may be modified by host.
unsigned RdOff; // Position of next item to be read by target (down-buffer).
unsigned Flags; // Contains configuration flags
} SEGGER_RTT_BUFFER_DOWN;
//
// RTT control block which describes the number of buffers available
// as well as the configuration for each buffer
//
//
typedef struct {
char acID[16]; // Initialized to "SEGGER RTT"
int MaxNumUpBuffers; // Initialized to SEGGER_RTT_MAX_NUM_UP_BUFFERS (type. 2)
int MaxNumDownBuffers; // Initialized to SEGGER_RTT_MAX_NUM_DOWN_BUFFERS (type. 2)
SEGGER_RTT_BUFFER_UP aUp[SEGGER_RTT_MAX_NUM_UP_BUFFERS]; // Up buffers, transferring information up from target via debug probe to host
SEGGER_RTT_BUFFER_DOWN aDown[SEGGER_RTT_MAX_NUM_DOWN_BUFFERS]; // Down buffers, transferring information down from host via debug probe to target
#if SEGGER_RTT__CB_PADDING
unsigned char aDummy[SEGGER_RTT__CB_PADDING];
#endif
} SEGGER_RTT_CB;
/*********************************************************************
*
* Global data
*
**********************************************************************
*/
extern SEGGER_RTT_CB _SEGGER_RTT;
/*********************************************************************
*
* RTT API functions
*
**********************************************************************
*/
#ifdef __cplusplus
extern "C" {
#endif
int SEGGER_RTT_AllocDownBuffer (const char* sName, void* pBuffer, unsigned BufferSize, unsigned Flags);
int SEGGER_RTT_AllocUpBuffer (const char* sName, void* pBuffer, unsigned BufferSize, unsigned Flags);
int SEGGER_RTT_ConfigUpBuffer (unsigned BufferIndex, const char* sName, void* pBuffer, unsigned BufferSize, unsigned Flags);
int SEGGER_RTT_ConfigDownBuffer (unsigned BufferIndex, const char* sName, void* pBuffer, unsigned BufferSize, unsigned Flags);
int SEGGER_RTT_GetKey (void);
unsigned SEGGER_RTT_HasData (unsigned BufferIndex);
int SEGGER_RTT_HasKey (void);
unsigned SEGGER_RTT_HasDataUp (unsigned BufferIndex);
void SEGGER_RTT_Init (void);
unsigned SEGGER_RTT_Read (unsigned BufferIndex, void* pBuffer, unsigned BufferSize);
unsigned SEGGER_RTT_ReadNoLock (unsigned BufferIndex, void* pData, unsigned BufferSize);
int SEGGER_RTT_SetNameDownBuffer (unsigned BufferIndex, const char* sName);
int SEGGER_RTT_SetNameUpBuffer (unsigned BufferIndex, const char* sName);
int SEGGER_RTT_SetFlagsDownBuffer (unsigned BufferIndex, unsigned Flags);
int SEGGER_RTT_SetFlagsUpBuffer (unsigned BufferIndex, unsigned Flags);
int SEGGER_RTT_WaitKey (void);
unsigned SEGGER_RTT_Write (unsigned BufferIndex, const void* pBuffer, unsigned NumBytes);
unsigned SEGGER_RTT_WriteNoLock (unsigned BufferIndex, const void* pBuffer, unsigned NumBytes);
unsigned SEGGER_RTT_WriteSkipNoLock (unsigned BufferIndex, const void* pBuffer, unsigned NumBytes);
unsigned SEGGER_RTT_ASM_WriteSkipNoLock (unsigned BufferIndex, const void* pBuffer, unsigned NumBytes);
unsigned SEGGER_RTT_WriteString (unsigned BufferIndex, const char* s);
void SEGGER_RTT_WriteWithOverwriteNoLock(unsigned BufferIndex, const void* pBuffer, unsigned NumBytes);
unsigned SEGGER_RTT_PutChar (unsigned BufferIndex, char c);
unsigned SEGGER_RTT_PutCharSkip (unsigned BufferIndex, char c);
unsigned SEGGER_RTT_PutCharSkipNoLock (unsigned BufferIndex, char c);
unsigned SEGGER_RTT_GetAvailWriteSpace (unsigned BufferIndex);
unsigned SEGGER_RTT_GetBytesInBuffer (unsigned BufferIndex);
//
// Function macro for performance optimization
//
#define SEGGER_RTT_HASDATA(n) (((SEGGER_RTT_BUFFER_DOWN*)((char*)&_SEGGER_RTT.aDown[n] + SEGGER_RTT_UNCACHED_OFF))->WrOff - ((SEGGER_RTT_BUFFER_DOWN*)((char*)&_SEGGER_RTT.aDown[n] + SEGGER_RTT_UNCACHED_OFF))->RdOff)
#if RTT_USE_ASM
#define SEGGER_RTT_WriteSkipNoLock SEGGER_RTT_ASM_WriteSkipNoLock
#endif
/*********************************************************************
*
* RTT transfer functions to send RTT data via other channels.
*
**********************************************************************
*/
unsigned SEGGER_RTT_ReadUpBuffer (unsigned BufferIndex, void* pBuffer, unsigned BufferSize);
unsigned SEGGER_RTT_ReadUpBufferNoLock (unsigned BufferIndex, void* pData, unsigned BufferSize);
unsigned SEGGER_RTT_WriteDownBuffer (unsigned BufferIndex, const void* pBuffer, unsigned NumBytes);
unsigned SEGGER_RTT_WriteDownBufferNoLock (unsigned BufferIndex, const void* pBuffer, unsigned NumBytes);
#define SEGGER_RTT_HASDATA_UP(n) (((SEGGER_RTT_BUFFER_UP*)((char*)&_SEGGER_RTT.aUp[n] + SEGGER_RTT_UNCACHED_OFF))->WrOff - ((SEGGER_RTT_BUFFER_UP*)((char*)&_SEGGER_RTT.aUp[n] + SEGGER_RTT_UNCACHED_OFF))->RdOff) // Access uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly
/*********************************************************************
*
* RTT "Terminal" API functions
*
**********************************************************************
*/
int SEGGER_RTT_SetTerminal (unsigned char TerminalId);
int SEGGER_RTT_TerminalOut (unsigned char TerminalId, const char* s);
/*********************************************************************
*
* RTT printf functions (require SEGGER_RTT_printf.c)
*
**********************************************************************
*/
int SEGGER_RTT_printf(unsigned BufferIndex, const char * sFormat, ...);
int SEGGER_RTT_vprintf(unsigned BufferIndex, const char * sFormat, va_list * pParamList);
#ifdef __cplusplus
}
#endif
#endif // ifndef(SEGGER_RTT_ASM)
/*********************************************************************
*
* Defines
*
**********************************************************************
*/
//
// Operating modes. Define behavior if buffer is full (not enough space for entire message)
//
#define SEGGER_RTT_MODE_NO_BLOCK_SKIP (0) // Skip. Do not block, output nothing. (Default)
#define SEGGER_RTT_MODE_NO_BLOCK_TRIM (1) // Trim: Do not block, output as much as fits.
#define SEGGER_RTT_MODE_BLOCK_IF_FIFO_FULL (2) // Block: Wait until there is space in the buffer.
#define SEGGER_RTT_MODE_MASK (3)
//
// Control sequences, based on ANSI.
// Can be used to control color, and clear the screen
//
#define RTT_CTRL_RESET "\x1B[0m" // Reset to default colors
#define RTT_CTRL_CLEAR "\x1B[2J" // Clear screen, reposition cursor to top left
#define RTT_CTRL_TEXT_BLACK "\x1B[2;30m"
#define RTT_CTRL_TEXT_RED "\x1B[2;31m"
#define RTT_CTRL_TEXT_GREEN "\x1B[2;32m"
#define RTT_CTRL_TEXT_YELLOW "\x1B[2;33m"
#define RTT_CTRL_TEXT_BLUE "\x1B[2;34m"
#define RTT_CTRL_TEXT_MAGENTA "\x1B[2;35m"
#define RTT_CTRL_TEXT_CYAN "\x1B[2;36m"
#define RTT_CTRL_TEXT_WHITE "\x1B[2;37m"
#define RTT_CTRL_TEXT_BRIGHT_BLACK "\x1B[1;30m"
#define RTT_CTRL_TEXT_BRIGHT_RED "\x1B[1;31m"
#define RTT_CTRL_TEXT_BRIGHT_GREEN "\x1B[1;32m"
#define RTT_CTRL_TEXT_BRIGHT_YELLOW "\x1B[1;33m"
#define RTT_CTRL_TEXT_BRIGHT_BLUE "\x1B[1;34m"
#define RTT_CTRL_TEXT_BRIGHT_MAGENTA "\x1B[1;35m"
#define RTT_CTRL_TEXT_BRIGHT_CYAN "\x1B[1;36m"
#define RTT_CTRL_TEXT_BRIGHT_WHITE "\x1B[1;37m"
#define RTT_CTRL_BG_BLACK "\x1B[24;40m"
#define RTT_CTRL_BG_RED "\x1B[24;41m"
#define RTT_CTRL_BG_GREEN "\x1B[24;42m"
#define RTT_CTRL_BG_YELLOW "\x1B[24;43m"
#define RTT_CTRL_BG_BLUE "\x1B[24;44m"
#define RTT_CTRL_BG_MAGENTA "\x1B[24;45m"
#define RTT_CTRL_BG_CYAN "\x1B[24;46m"
#define RTT_CTRL_BG_WHITE "\x1B[24;47m"
#define RTT_CTRL_BG_BRIGHT_BLACK "\x1B[4;40m"
#define RTT_CTRL_BG_BRIGHT_RED "\x1B[4;41m"
#define RTT_CTRL_BG_BRIGHT_GREEN "\x1B[4;42m"
#define RTT_CTRL_BG_BRIGHT_YELLOW "\x1B[4;43m"
#define RTT_CTRL_BG_BRIGHT_BLUE "\x1B[4;44m"
#define RTT_CTRL_BG_BRIGHT_MAGENTA "\x1B[4;45m"
#define RTT_CTRL_BG_BRIGHT_CYAN "\x1B[4;46m"
#define RTT_CTRL_BG_BRIGHT_WHITE "\x1B[4;47m"
#endif
/*************************** End of file ****************************/

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@ -0,0 +1,242 @@
/*********************************************************************
* (c) SEGGER Microcontroller GmbH *
* The Embedded Experts *
* www.segger.com *
**********************************************************************
-------------------------- END-OF-HEADER -----------------------------
File : SEGGER_RTT_ASM_ARMv7M.S
Purpose : Assembler implementation of RTT functions for ARMv7M
Additional information:
This module is written to be assembler-independent and works with
GCC and clang (Embedded Studio) and IAR.
*/
#define SEGGER_RTT_ASM // Used to control processed input from header file
#include "SEGGER_RTT.h"
/*********************************************************************
*
* Defines, fixed
*
**********************************************************************
*/
#define _CCIAR 0
#define _CCCLANG 1
#if (defined __SES_ARM) || (defined __GNUC__) || (defined __clang__)
#define _CC_TYPE _CCCLANG
#define _PUB_SYM .global
#define _EXT_SYM .extern
#define _END .end
#define _WEAK .weak
#define _THUMB_FUNC .thumb_func
#define _THUMB_CODE .code 16
#define _WORD .word
#define _SECTION(Sect, Type, AlignExp) .section Sect ##, "ax"
#define _ALIGN(Exp) .align Exp
#define _PLACE_LITS .ltorg
#define _DATA_SECT_START
#define _C_STARTUP _start
#define _STACK_END __stack_end__
#define _RAMFUNC
//
// .text => Link to flash
// .fast => Link to RAM
// OtherSect => Usually link to RAM
// Alignment is 2^x
//
#elif defined (__IASMARM__)
#define _CC_TYPE _CCIAR
#define _PUB_SYM PUBLIC
#define _EXT_SYM EXTERN
#define _END END
#define _WEAK _WEAK
#define _THUMB_FUNC
#define _THUMB_CODE THUMB
#define _WORD DCD
#define _SECTION(Sect, Type, AlignExp) SECTION Sect ## : ## Type ## :REORDER:NOROOT ## (AlignExp)
#define _ALIGN(Exp) alignrom Exp
#define _PLACE_LITS
#define _DATA_SECT_START DATA
#define _C_STARTUP __iar_program_start
#define _STACK_END sfe(CSTACK)
#define _RAMFUNC SECTION_TYPE SHT_PROGBITS, SHF_WRITE | SHF_EXECINSTR
//
// .text => Link to flash
// .textrw => Link to RAM
// OtherSect => Usually link to RAM
// NOROOT => Allows linker to throw away the function, if not referenced
// Alignment is 2^x
//
#endif
#if (_CC_TYPE == _CCIAR)
NAME SEGGER_RTT_ASM_ARMv7M
#else
.syntax unified
#endif
#if defined (RTT_USE_ASM) && (RTT_USE_ASM == 1)
#define SHT_PROGBITS 0x1
/*********************************************************************
*
* Public / external symbols
*
**********************************************************************
*/
_EXT_SYM __aeabi_memcpy
_EXT_SYM __aeabi_memcpy4
_EXT_SYM _SEGGER_RTT
_PUB_SYM SEGGER_RTT_ASM_WriteSkipNoLock
/*********************************************************************
*
* SEGGER_RTT_WriteSkipNoLock
*
* Function description
* Stores a specified number of characters in SEGGER RTT
* control block which is then read by the host.
* SEGGER_RTT_WriteSkipNoLock does not lock the application and
* skips all data, if the data does not fit into the buffer.
*
* Parameters
* BufferIndex Index of "Up"-buffer to be used (e.g. 0 for "Terminal").
* pBuffer Pointer to character array. Does not need to point to a \0 terminated string.
* NumBytes Number of bytes to be stored in the SEGGER RTT control block.
* MUST be > 0!!!
* This is done for performance reasons, so no initial check has do be done.
*
* Return value
* 1: Data has been copied
* 0: No space, data has not been copied
*
* Notes
* (1) If there is not enough space in the "Up"-buffer, all data is dropped.
* (2) For performance reasons this function does not call Init()
* and may only be called after RTT has been initialized.
* Either by calling SEGGER_RTT_Init() or calling another RTT API function first.
*/
_SECTION(.text, CODE, 2)
_ALIGN(2)
_THUMB_FUNC
SEGGER_RTT_ASM_WriteSkipNoLock: // unsigned SEGGER_RTT_WriteSkipNoLock(unsigned BufferIndex, const void* pData, unsigned NumBytes) {
//
// Cases:
// 1) RdOff <= WrOff => Space until wrap-around is sufficient
// 2) RdOff <= WrOff => Space after wrap-around needed (copy in 2 chunks)
// 3) RdOff < WrOff => No space in buf
// 4) RdOff > WrOff => Space is sufficient
// 5) RdOff > WrOff => No space in buf
//
// 1) is the most common case for large buffers and assuming that J-Link reads the data fast enough
//
// Register usage:
// R0 Temporary needed as RdOff, <Tmp> register later on
// R1 pData
// R2 <NumBytes>
// R3 <Tmp> register. Hold free for subroutine calls
// R4 <Rem>
// R5 pRing->pBuffer
// R6 pRing (Points to active struct SEGGER_RTT_BUFFER_DOWN)
// R7 WrOff
//
PUSH {R4-R7}
ADD R3,R0,R0, LSL #+1
LDR.W R0,=_SEGGER_RTT // pRing = &_SEGGER_RTT.aUp[BufferIndex];
ADD R0,R0,R3, LSL #+3
ADD R6,R0,#+24
LDR R0,[R6, #+16] // RdOff = pRing->RdOff;
LDR R7,[R6, #+12] // WrOff = pRing->WrOff;
LDR R5,[R6, #+4] // pRing->pBuffer
CMP R7,R0
BCC.N _CheckCase4 // if (RdOff <= WrOff) { => Case 1), 2) or 3)
//
// Handling for case 1, later on identical to case 4
//
LDR R3,[R6, #+8] // Avail = pRing->SizeOfBuffer - WrOff - 1u; => Space until wrap-around (assume 1 byte not usable for case that RdOff == 0)
SUBS R4,R3,R7 // <Rem> (Used in case we jump into case 2 afterwards)
SUBS R3,R4,#+1 // <Avail>
CMP R3,R2
BCC.N _CheckCase2 // if (Avail >= NumBytes) { => Case 1)?
_Case4:
ADDS R5,R7,R5 // pBuffer += WrOff
ADDS R0,R2,R7 // v = WrOff + NumBytes
//
// 2x unrolling for the copy loop that is used most of the time
// This is a special optimization for small SystemView packets and makes them even faster
//
_ALIGN(2)
_LoopCopyStraight: // memcpy(pRing->pBuffer + WrOff, pData, NumBytes);
LDRB R3,[R1], #+1
STRB R3,[R5], #+1 // *pDest++ = *pSrc++
SUBS R2,R2,#+1
BEQ _CSDone
LDRB R3,[R1], #+1
STRB R3,[R5], #+1 // *pDest++ = *pSrc++
SUBS R2,R2,#+1
BNE _LoopCopyStraight
_CSDone:
#if _CORE_NEEDS_DMB // Do not slow down cores that do not need a DMB instruction here
DMB // Cortex-M7 may delay memory writes and also change the order in which the writes happen. Therefore, make sure that all buffer writes are finished, before updating the <WrOff> in the struct
#endif
STR R0,[R6, #+12] // pRing->WrOff = WrOff + NumBytes;
MOVS R0,#+1
POP {R4-R7}
BX LR // Return 1
_CheckCase2:
ADDS R0,R0,R3 // Avail += RdOff; => Space incl. wrap-around
CMP R0,R2
BCC.N _Case3 // if (Avail >= NumBytes) { => Case 2? => If not, we have case 3) (does not fit)
//
// Handling for case 2
//
ADDS R0,R7,R5 // v = pRing->pBuffer + WrOff => Do not change pRing->pBuffer here because 2nd chunk needs org. value
SUBS R2,R2,R4 // NumBytes -= Rem; (Rem = pRing->SizeOfBuffer - WrOff; => Space until end of buffer)
_LoopCopyBeforeWrapAround: // memcpy(pRing->pBuffer + WrOff, pData, Rem); => Copy 1st chunk
LDRB R3,[R1], #+1
STRB R3,[R0], #+1 // *pDest++ = *pSrc++
SUBS R4,R4,#+1
BNE _LoopCopyBeforeWrapAround
//
// Special case: First check that assumed RdOff == 0 calculated that last element before wrap-around could not be used
// But 2nd check (considering space until wrap-around and until RdOff) revealed that RdOff is not 0, so we can use the last element
// In this case, we may use a copy straight until buffer end anyway without needing to copy 2 chunks
// Therefore, check if 2nd memcpy is necessary at all
//
ADDS R4,R2,#+0 // Save <NumBytes> (needed as counter in loop but must be written to <WrOff> after the loop). Also use this inst to update the flags to skip 2nd loop if possible
BEQ.N _No2ChunkNeeded // if (NumBytes) {
_LoopCopyAfterWrapAround: // memcpy(pRing->pBuffer, pData + Rem, NumBytes);
LDRB R3,[R1], #+1 // pData already points to the next src byte due to copy loop increment before this loop
STRB R3,[R5], #+1 // *pDest++ = *pSrc++
SUBS R2,R2,#+1
BNE _LoopCopyAfterWrapAround
_No2ChunkNeeded:
#if _CORE_NEEDS_DMB // Do not slow down cores that do not need a DMB instruction here
DMB // Cortex-M7 may delay memory writes and also change the order in which the writes happen. Therefore, make sure that all buffer writes are finished, before updating the <WrOff> in the struct
#endif
STR R4,[R6, #+12] // pRing->WrOff = NumBytes; => Must be written after copying data because J-Link may read control block asynchronously while writing into buffer
MOVS R0,#+1
POP {R4-R7}
BX LR // Return 1
_CheckCase4:
SUBS R0,R0,R7
SUBS R0,R0,#+1 // Avail = RdOff - WrOff - 1u;
CMP R0,R2
BCS.N _Case4 // if (Avail >= NumBytes) { => Case 4) == 1) ? => If not, we have case 5) == 3) (does not fit)
_Case3:
MOVS R0,#+0
POP {R4-R7}
BX LR // Return 0
_PLACE_LITS
#endif // defined (RTT_USE_ASM) && (RTT_USE_ASM == 1)
_END
/*************************** End of file ****************************/

429
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@ -0,0 +1,429 @@
/*********************************************************************
* SEGGER Microcontroller GmbH *
* The Embedded Experts *
**********************************************************************
* *
* (c) 1995 - 2021 SEGGER Microcontroller GmbH *
* *
* www.segger.com Support: support@segger.com *
* *
**********************************************************************
* *
* SEGGER RTT * Real Time Transfer for embedded targets *
* *
**********************************************************************
* *
* All rights reserved. *
* *
* SEGGER strongly recommends to not make any changes *
* to or modify the source code of this software in order to stay *
* compatible with the RTT protocol and J-Link. *
* *
* Redistribution and use in source and binary forms, with or *
* without modification, are permitted provided that the following *
* condition is met: *
* *
* o Redistributions of source code must retain the above copyright *
* notice, this condition and the following disclaimer. *
* *
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, *
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF *
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE *
* DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR *
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR *
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT *
* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; *
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT *
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE *
* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH *
* DAMAGE. *
* *
**********************************************************************
* *
* RTT version: 7.22b *
* *
**********************************************************************
---------------------------END-OF-HEADER------------------------------
File : SEGGER_RTT_Conf.h
Purpose : Implementation of SEGGER real-time transfer (RTT) which
allows real-time communication on targets which support
debugger memory accesses while the CPU is running.
Revision: $Rev: 21386 $
*/
#ifndef SEGGER_RTT_CONF_H
#define SEGGER_RTT_CONF_H
#ifdef __IAR_SYSTEMS_ICC__
#include <intrinsics.h>
#endif
/*********************************************************************
*
* Defines, configurable
*
**********************************************************************
*/
//
// Take in and set to correct values for Cortex-A systems with CPU cache
//
//#define SEGGER_RTT_CPU_CACHE_LINE_SIZE (32) // Largest cache line size (in bytes) in the current system
//#define SEGGER_RTT_UNCACHED_OFF (0xFB000000) // Address alias where RTT CB and buffers can be accessed uncached
//
// Most common case:
// Up-channel 0: RTT
// Up-channel 1: SystemView
//
#ifndef SEGGER_RTT_MAX_NUM_UP_BUFFERS
#define SEGGER_RTT_MAX_NUM_UP_BUFFERS (3) // Max. number of up-buffers (T->H) available on this target (Default: 3)
#endif
//
// Most common case:
// Down-channel 0: RTT
// Down-channel 1: SystemView
//
#ifndef SEGGER_RTT_MAX_NUM_DOWN_BUFFERS
#define SEGGER_RTT_MAX_NUM_DOWN_BUFFERS (3) // Max. number of down-buffers (H->T) available on this target (Default: 3)
#endif
#ifndef BUFFER_SIZE_UP
#define BUFFER_SIZE_UP (1024) // Size of the buffer for terminal output of target, up to host (Default: 1k)
#endif
#ifndef BUFFER_SIZE_DOWN
#define BUFFER_SIZE_DOWN (16) // Size of the buffer for terminal input to target from host (Usually keyboard input) (Default: 16)
#endif
#ifndef SEGGER_RTT_PRINTF_BUFFER_SIZE
#define SEGGER_RTT_PRINTF_BUFFER_SIZE (64u) // Size of buffer for RTT printf to bulk-send chars via RTT (Default: 64)
#endif
#ifndef SEGGER_RTT_MODE_DEFAULT
#define SEGGER_RTT_MODE_DEFAULT SEGGER_RTT_MODE_NO_BLOCK_SKIP // Mode for pre-initialized terminal channel (buffer 0)
#endif
/*********************************************************************
*
* RTT memcpy configuration
*
* memcpy() is good for large amounts of data,
* but the overhead is big for small amounts, which are usually stored via RTT.
* With SEGGER_RTT_MEMCPY_USE_BYTELOOP a simple byte loop can be used instead.
*
* SEGGER_RTT_MEMCPY() can be used to replace standard memcpy() in RTT functions.
* This is may be required with memory access restrictions,
* such as on Cortex-A devices with MMU.
*/
#ifndef SEGGER_RTT_MEMCPY_USE_BYTELOOP
#define SEGGER_RTT_MEMCPY_USE_BYTELOOP 0 // 0: Use memcpy/SEGGER_RTT_MEMCPY, 1: Use a simple byte-loop
#endif
//
// Example definition of SEGGER_RTT_MEMCPY to external memcpy with GCC toolchains and Cortex-A targets
//
//#if ((defined __SES_ARM) || (defined __CROSSWORKS_ARM) || (defined __GNUC__)) && (defined (__ARM_ARCH_7A__))
// #define SEGGER_RTT_MEMCPY(pDest, pSrc, NumBytes) SEGGER_memcpy((pDest), (pSrc), (NumBytes))
//#endif
//
// Target is not allowed to perform other RTT operations while string still has not been stored completely.
// Otherwise we would probably end up with a mixed string in the buffer.
// If using RTT from within interrupts, multiple tasks or multi processors, define the SEGGER_RTT_LOCK() and SEGGER_RTT_UNLOCK() function here.
//
// SEGGER_RTT_MAX_INTERRUPT_PRIORITY can be used in the sample lock routines on Cortex-M3/4.
// Make sure to mask all interrupts which can send RTT data, i.e. generate SystemView events, or cause task switches.
// When high-priority interrupts must not be masked while sending RTT data, SEGGER_RTT_MAX_INTERRUPT_PRIORITY needs to be adjusted accordingly.
// (Higher priority = lower priority number)
// Default value for embOS: 128u
// Default configuration in FreeRTOS: configMAX_SYSCALL_INTERRUPT_PRIORITY: ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
// In case of doubt mask all interrupts: 1 << (8 - BASEPRI_PRIO_BITS) i.e. 1 << 5 when 3 bits are implemented in NVIC
// or define SEGGER_RTT_LOCK() to completely disable interrupts.
//
#ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY
#define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) // Interrupt priority to lock on SEGGER_RTT_LOCK on Cortex-M3/4 (Default: 0x20)
#endif
/*********************************************************************
*
* RTT lock configuration for SEGGER Embedded Studio,
* Rowley CrossStudio and GCC
*/
#if ((defined(__SES_ARM) || defined(__SES_RISCV) || defined(__CROSSWORKS_ARM) || defined(__GNUC__) || defined(__clang__)) && !defined (__CC_ARM) && !defined(WIN32))
#if (defined(__ARM_ARCH_6M__) || defined(__ARM_ARCH_8M_BASE__))
#define SEGGER_RTT_LOCK() { \
unsigned int _SEGGER_RTT__LockState; \
__asm volatile ("mrs %0, primask \n\t" \
"movs r1, #1 \n\t" \
"msr primask, r1 \n\t" \
: "=r" (_SEGGER_RTT__LockState) \
: \
: "r1", "cc" \
);
#define SEGGER_RTT_UNLOCK() __asm volatile ("msr primask, %0 \n\t" \
: \
: "r" (_SEGGER_RTT__LockState) \
: \
); \
}
#elif (defined(__ARM_ARCH_7M__) || defined(__ARM_ARCH_7EM__) || defined(__ARM_ARCH_8M_MAIN__))
#ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY
#define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20)
#endif
#define SEGGER_RTT_LOCK() { \
unsigned int _SEGGER_RTT__LockState; \
__asm volatile ("mrs %0, basepri \n\t" \
"mov r1, %1 \n\t" \
"msr basepri, r1 \n\t" \
: "=r" (_SEGGER_RTT__LockState) \
: "i"(SEGGER_RTT_MAX_INTERRUPT_PRIORITY) \
: "r1", "cc" \
);
#define SEGGER_RTT_UNLOCK() __asm volatile ("msr basepri, %0 \n\t" \
: \
: "r" (_SEGGER_RTT__LockState) \
: \
); \
}
#elif defined(__ARM_ARCH_7A__)
#define SEGGER_RTT_LOCK() { \
unsigned int _SEGGER_RTT__LockState; \
__asm volatile ("mrs r1, CPSR \n\t" \
"mov %0, r1 \n\t" \
"orr r1, r1, #0xC0 \n\t" \
"msr CPSR_c, r1 \n\t" \
: "=r" (_SEGGER_RTT__LockState) \
: \
: "r1", "cc" \
);
#define SEGGER_RTT_UNLOCK() __asm volatile ("mov r0, %0 \n\t" \
"mrs r1, CPSR \n\t" \
"bic r1, r1, #0xC0 \n\t" \
"and r0, r0, #0xC0 \n\t" \
"orr r1, r1, r0 \n\t" \
"msr CPSR_c, r1 \n\t" \
: \
: "r" (_SEGGER_RTT__LockState) \
: "r0", "r1", "cc" \
); \
}
#elif defined(__riscv) || defined(__riscv_xlen)
#define SEGGER_RTT_LOCK() { \
unsigned int _SEGGER_RTT__LockState; \
__asm volatile ("csrr %0, mstatus \n\t" \
"csrci mstatus, 8 \n\t" \
"andi %0, %0, 8 \n\t" \
: "=r" (_SEGGER_RTT__LockState) \
: \
: \
);
#define SEGGER_RTT_UNLOCK() __asm volatile ("csrr a1, mstatus \n\t" \
"or %0, %0, a1 \n\t" \
"csrs mstatus, %0 \n\t" \
: \
: "r" (_SEGGER_RTT__LockState) \
: "a1" \
); \
}
#else
#define SEGGER_RTT_LOCK()
#define SEGGER_RTT_UNLOCK()
#endif
#endif
/*********************************************************************
*
* RTT lock configuration for IAR EWARM
*/
#ifdef __ICCARM__
#if (defined (__ARM6M__) && (__CORE__ == __ARM6M__)) || \
(defined (__ARM8M_BASELINE__) && (__CORE__ == __ARM8M_BASELINE__))
#define SEGGER_RTT_LOCK() { \
unsigned int _SEGGER_RTT__LockState; \
_SEGGER_RTT__LockState = __get_PRIMASK(); \
__set_PRIMASK(1);
#define SEGGER_RTT_UNLOCK() __set_PRIMASK(_SEGGER_RTT__LockState); \
}
#elif (defined (__ARM7EM__) && (__CORE__ == __ARM7EM__)) || \
(defined (__ARM7M__) && (__CORE__ == __ARM7M__)) || \
(defined (__ARM8M_MAINLINE__) && (__CORE__ == __ARM8M_MAINLINE__)) || \
(defined (__ARM8M_MAINLINE__) && (__CORE__ == __ARM8M_MAINLINE__))
#ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY
#define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20)
#endif
#define SEGGER_RTT_LOCK() { \
unsigned int _SEGGER_RTT__LockState; \
_SEGGER_RTT__LockState = __get_BASEPRI(); \
__set_BASEPRI(SEGGER_RTT_MAX_INTERRUPT_PRIORITY);
#define SEGGER_RTT_UNLOCK() __set_BASEPRI(_SEGGER_RTT__LockState); \
}
#elif (defined (__ARM7A__) && (__CORE__ == __ARM7A__)) || \
(defined (__ARM7R__) && (__CORE__ == __ARM7R__))
#define SEGGER_RTT_LOCK() { \
unsigned int _SEGGER_RTT__LockState; \
__asm volatile ("mrs r1, CPSR \n\t" \
"mov %0, r1 \n\t" \
"orr r1, r1, #0xC0 \n\t" \
"msr CPSR_c, r1 \n\t" \
: "=r" (_SEGGER_RTT__LockState) \
: \
: "r1", "cc" \
);
#define SEGGER_RTT_UNLOCK() __asm volatile ("mov r0, %0 \n\t" \
"mrs r1, CPSR \n\t" \
"bic r1, r1, #0xC0 \n\t" \
"and r0, r0, #0xC0 \n\t" \
"orr r1, r1, r0 \n\t" \
"msr CPSR_c, r1 \n\t" \
: \
: "r" (_SEGGER_RTT__LockState) \
: "r0", "r1", "cc" \
); \
}
#endif
#endif
/*********************************************************************
*
* RTT lock configuration for IAR RX
*/
#ifdef __ICCRX__
#define SEGGER_RTT_LOCK() { \
unsigned long _SEGGER_RTT__LockState; \
_SEGGER_RTT__LockState = __get_interrupt_state(); \
__disable_interrupt();
#define SEGGER_RTT_UNLOCK() __set_interrupt_state(_SEGGER_RTT__LockState); \
}
#endif
/*********************************************************************
*
* RTT lock configuration for IAR RL78
*/
#ifdef __ICCRL78__
#define SEGGER_RTT_LOCK() { \
__istate_t _SEGGER_RTT__LockState; \
_SEGGER_RTT__LockState = __get_interrupt_state(); \
__disable_interrupt();
#define SEGGER_RTT_UNLOCK() __set_interrupt_state(_SEGGER_RTT__LockState); \
}
#endif
/*********************************************************************
*
* RTT lock configuration for KEIL ARM
*/
#ifdef __CC_ARM
#if (defined __TARGET_ARCH_6S_M)
#define SEGGER_RTT_LOCK() { \
unsigned int _SEGGER_RTT__LockState; \
register unsigned char _SEGGER_RTT__PRIMASK __asm( "primask"); \
_SEGGER_RTT__LockState = _SEGGER_RTT__PRIMASK; \
_SEGGER_RTT__PRIMASK = 1u; \
__schedule_barrier();
#define SEGGER_RTT_UNLOCK() _SEGGER_RTT__PRIMASK = _SEGGER_RTT__LockState; \
__schedule_barrier(); \
}
#elif (defined(__TARGET_ARCH_7_M) || defined(__TARGET_ARCH_7E_M))
#ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY
#define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20)
#endif
#define SEGGER_RTT_LOCK() { \
unsigned int _SEGGER_RTT__LockState; \
register unsigned char BASEPRI __asm( "basepri"); \
_SEGGER_RTT__LockState = BASEPRI; \
BASEPRI = SEGGER_RTT_MAX_INTERRUPT_PRIORITY; \
__schedule_barrier();
#define SEGGER_RTT_UNLOCK() BASEPRI = _SEGGER_RTT__LockState; \
__schedule_barrier(); \
}
#endif
#endif
/*********************************************************************
*
* RTT lock configuration for TI ARM
*/
#ifdef __TI_ARM__
#if defined (__TI_ARM_V6M0__)
#define SEGGER_RTT_LOCK() { \
unsigned int _SEGGER_RTT__LockState; \
_SEGGER_RTT__LockState = __get_PRIMASK(); \
__set_PRIMASK(1);
#define SEGGER_RTT_UNLOCK() __set_PRIMASK(_SEGGER_RTT__LockState); \
}
#elif (defined (__TI_ARM_V7M3__) || defined (__TI_ARM_V7M4__))
#ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY
#define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20)
#endif
#define SEGGER_RTT_LOCK() { \
unsigned int _SEGGER_RTT__LockState; \
_SEGGER_RTT__LockState = _set_interrupt_priority(SEGGER_RTT_MAX_INTERRUPT_PRIORITY);
#define SEGGER_RTT_UNLOCK() _set_interrupt_priority(_SEGGER_RTT__LockState); \
}
#endif
#endif
/*********************************************************************
*
* RTT lock configuration for CCRX
*/
#ifdef __RX
#include <machine.h>
#define SEGGER_RTT_LOCK() { \
unsigned long _SEGGER_RTT__LockState; \
_SEGGER_RTT__LockState = get_psw() & 0x010000; \
clrpsw_i();
#define SEGGER_RTT_UNLOCK() set_psw(get_psw() | _SEGGER_RTT__LockState); \
}
#endif
/*********************************************************************
*
* RTT lock configuration for embOS Simulation on Windows
* (Can also be used for generic RTT locking with embOS)
*/
#if defined(WIN32) || defined(SEGGER_RTT_LOCK_EMBOS)
void OS_SIM_EnterCriticalSection(void);
void OS_SIM_LeaveCriticalSection(void);
#define SEGGER_RTT_LOCK() { \
OS_SIM_EnterCriticalSection();
#define SEGGER_RTT_UNLOCK() OS_SIM_LeaveCriticalSection(); \
}
#endif
/*********************************************************************
*
* RTT lock configuration fallback
*/
#ifndef SEGGER_RTT_LOCK
#define SEGGER_RTT_LOCK() // Lock RTT (nestable) (i.e. disable interrupts)
#endif
#ifndef SEGGER_RTT_UNLOCK
#define SEGGER_RTT_UNLOCK() // Unlock RTT (nestable) (i.e. enable previous interrupt lock state)
#endif
#endif
/*************************** End of file ****************************/

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/*********************************************************************
* SEGGER Microcontroller GmbH *
* The Embedded Experts *
**********************************************************************
* *
* (c) 1995 - 2021 SEGGER Microcontroller GmbH *
* *
* www.segger.com Support: support@segger.com *
* *
**********************************************************************
* *
* SEGGER RTT * Real Time Transfer for embedded targets *
* *
**********************************************************************
* *
* All rights reserved. *
* *
* SEGGER strongly recommends to not make any changes *
* to or modify the source code of this software in order to stay *
* compatible with the RTT protocol and J-Link. *
* *
* Redistribution and use in source and binary forms, with or *
* without modification, are permitted provided that the following *
* condition is met: *
* *
* o Redistributions of source code must retain the above copyright *
* notice, this condition and the following disclaimer. *
* *
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, *
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF *
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE *
* DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR *
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR *
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT *
* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; *
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT *
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE *
* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH *
* DAMAGE. *
* *
**********************************************************************
* *
* RTT version: 7.22b *
* *
**********************************************************************
---------------------------END-OF-HEADER------------------------------
File : SEGGER_RTT_Syscalls_GCC.c
Purpose : Low-level functions for using printf() via RTT in GCC.
To use RTT for printf output, include this file in your
application.
Revision: $Rev: 20755 $
----------------------------------------------------------------------
*/
#if (defined __GNUC__) && !(defined __SES_ARM) && !(defined __CROSSWORKS_ARM) && !(defined __ARMCC_VERSION) && !(defined __CC_ARM)
#include <reent.h> // required for _write_r
#include "SEGGER_RTT.h"
/*********************************************************************
*
* Types
*
**********************************************************************
*/
//
// If necessary define the _reent struct
// to match the one passed by the used standard library.
//
struct _reent;
/*********************************************************************
*
* Function prototypes
*
**********************************************************************
*/
_ssize_t _write (int file, const void *ptr, size_t len);
_ssize_t _write_r(struct _reent *r, int file, const void *ptr, size_t len);
/*********************************************************************
*
* Global functions
*
**********************************************************************
*/
/*********************************************************************
*
* _write()
*
* Function description
* Low-level write function.
* libc subroutines will use this system routine for output to all files,
* including stdout.
* Write data via RTT.
*/
_ssize_t _write(int file, const void *ptr, size_t len) {
(void) file; /* Not used, avoid warning */
SEGGER_RTT_Write(0, ptr, len);
return len;
}
/*********************************************************************
*
* _write_r()
*
* Function description
* Low-level reentrant write function.
* libc subroutines will use this system routine for output to all files,
* including stdout.
* Write data via RTT.
*/
_ssize_t _write_r(struct _reent *r, int file, const void *ptr, size_t len) {
(void) file; /* Not used, avoid warning */
(void) r; /* Not used, avoid warning */
SEGGER_RTT_Write(0, ptr, len);
return len;
}
#endif
/****** End Of File *************************************************/

505
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/*********************************************************************
* SEGGER Microcontroller GmbH *
* The Embedded Experts *
**********************************************************************
* *
* (c) 1995 - 2021 SEGGER Microcontroller GmbH *
* *
* www.segger.com Support: support@segger.com *
* *
**********************************************************************
* *
* SEGGER RTT * Real Time Transfer for embedded targets *
* *
**********************************************************************
* *
* All rights reserved. *
* *
* SEGGER strongly recommends to not make any changes *
* to or modify the source code of this software in order to stay *
* compatible with the RTT protocol and J-Link. *
* *
* Redistribution and use in source and binary forms, with or *
* without modification, are permitted provided that the following *
* condition is met: *
* *
* o Redistributions of source code must retain the above copyright *
* notice, this condition and the following disclaimer. *
* *
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, *
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF *
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE *
* DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR *
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR *
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT *
* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; *
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT *
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE *
* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH *
* DAMAGE. *
* *
**********************************************************************
* *
* RTT version: 7.22b *
* *
**********************************************************************
---------------------------END-OF-HEADER------------------------------
File : SEGGER_RTT_printf.c
Purpose : Replacement for printf to write formatted data via RTT
Revision: $Rev: 17697 $
----------------------------------------------------------------------
*/
#include "SEGGER_RTT.h"
#include "SEGGER_RTT_Conf.h"
/*********************************************************************
*
* Defines, configurable
*
**********************************************************************
*/
#ifndef SEGGER_RTT_PRINTF_BUFFER_SIZE
#define SEGGER_RTT_PRINTF_BUFFER_SIZE (64)
#endif
#include <stdlib.h>
#include <stdarg.h>
#define FORMAT_FLAG_LEFT_JUSTIFY (1u << 0)
#define FORMAT_FLAG_PAD_ZERO (1u << 1)
#define FORMAT_FLAG_PRINT_SIGN (1u << 2)
#define FORMAT_FLAG_ALTERNATE (1u << 3)
/*********************************************************************
*
* Types
*
**********************************************************************
*/
typedef struct {
char* pBuffer;
unsigned BufferSize;
unsigned Cnt;
int ReturnValue;
unsigned RTTBufferIndex;
} SEGGER_RTT_PRINTF_DESC;
/*********************************************************************
*
* Function prototypes
*
**********************************************************************
*/
/*********************************************************************
*
* Static code
*
**********************************************************************
*/
/*********************************************************************
*
* _StoreChar
*/
static void _StoreChar(SEGGER_RTT_PRINTF_DESC * p, char c) {
unsigned Cnt;
Cnt = p->Cnt;
if ((Cnt + 1u) <= p->BufferSize) {
*(p->pBuffer + Cnt) = c;
p->Cnt = Cnt + 1u;
p->ReturnValue++;
}
//
// Write part of string, when the buffer is full
//
if (p->Cnt == p->BufferSize) {
if (SEGGER_RTT_Write(p->RTTBufferIndex, p->pBuffer, p->Cnt) != p->Cnt) {
p->ReturnValue = -1;
} else {
p->Cnt = 0u;
}
}
}
/*********************************************************************
*
* _PrintUnsigned
*/
static void _PrintUnsigned(SEGGER_RTT_PRINTF_DESC * pBufferDesc, unsigned v, unsigned Base, unsigned NumDigits, unsigned FieldWidth, unsigned FormatFlags) {
static const char _aV2C[16] = {'0', '1', '2', '3', '4', '5', '6', '7', '8', '9', 'A', 'B', 'C', 'D', 'E', 'F' };
unsigned Div;
unsigned Digit;
unsigned Number;
unsigned Width;
char c;
Number = v;
Digit = 1u;
//
// Get actual field width
//
Width = 1u;
while (Number >= Base) {
Number = (Number / Base);
Width++;
}
if (NumDigits > Width) {
Width = NumDigits;
}
//
// Print leading chars if necessary
//
if ((FormatFlags & FORMAT_FLAG_LEFT_JUSTIFY) == 0u) {
if (FieldWidth != 0u) {
if (((FormatFlags & FORMAT_FLAG_PAD_ZERO) == FORMAT_FLAG_PAD_ZERO) && (NumDigits == 0u)) {
c = '0';
} else {
c = ' ';
}
while ((FieldWidth != 0u) && (Width < FieldWidth)) {
FieldWidth--;
_StoreChar(pBufferDesc, c);
if (pBufferDesc->ReturnValue < 0) {
break;
}
}
}
}
if (pBufferDesc->ReturnValue >= 0) {
//
// Compute Digit.
// Loop until Digit has the value of the highest digit required.
// Example: If the output is 345 (Base 10), loop 2 times until Digit is 100.
//
while (1) {
if (NumDigits > 1u) { // User specified a min number of digits to print? => Make sure we loop at least that often, before checking anything else (> 1 check avoids problems with NumDigits being signed / unsigned)
NumDigits--;
} else {
Div = v / Digit;
if (Div < Base) { // Is our divider big enough to extract the highest digit from value? => Done
break;
}
}
Digit *= Base;
}
//
// Output digits
//
do {
Div = v / Digit;
v -= Div * Digit;
_StoreChar(pBufferDesc, _aV2C[Div]);
if (pBufferDesc->ReturnValue < 0) {
break;
}
Digit /= Base;
} while (Digit);
//
// Print trailing spaces if necessary
//
if ((FormatFlags & FORMAT_FLAG_LEFT_JUSTIFY) == FORMAT_FLAG_LEFT_JUSTIFY) {
if (FieldWidth != 0u) {
while ((FieldWidth != 0u) && (Width < FieldWidth)) {
FieldWidth--;
_StoreChar(pBufferDesc, ' ');
if (pBufferDesc->ReturnValue < 0) {
break;
}
}
}
}
}
}
/*********************************************************************
*
* _PrintInt
*/
static void _PrintInt(SEGGER_RTT_PRINTF_DESC * pBufferDesc, int v, unsigned Base, unsigned NumDigits, unsigned FieldWidth, unsigned FormatFlags) {
unsigned Width;
int Number;
Number = (v < 0) ? -v : v;
//
// Get actual field width
//
Width = 1u;
while (Number >= (int)Base) {
Number = (Number / (int)Base);
Width++;
}
if (NumDigits > Width) {
Width = NumDigits;
}
if ((FieldWidth > 0u) && ((v < 0) || ((FormatFlags & FORMAT_FLAG_PRINT_SIGN) == FORMAT_FLAG_PRINT_SIGN))) {
FieldWidth--;
}
//
// Print leading spaces if necessary
//
if ((((FormatFlags & FORMAT_FLAG_PAD_ZERO) == 0u) || (NumDigits != 0u)) && ((FormatFlags & FORMAT_FLAG_LEFT_JUSTIFY) == 0u)) {
if (FieldWidth != 0u) {
while ((FieldWidth != 0u) && (Width < FieldWidth)) {
FieldWidth--;
_StoreChar(pBufferDesc, ' ');
if (pBufferDesc->ReturnValue < 0) {
break;
}
}
}
}
//
// Print sign if necessary
//
if (pBufferDesc->ReturnValue >= 0) {
if (v < 0) {
v = -v;
_StoreChar(pBufferDesc, '-');
} else if ((FormatFlags & FORMAT_FLAG_PRINT_SIGN) == FORMAT_FLAG_PRINT_SIGN) {
_StoreChar(pBufferDesc, '+');
} else {
}
if (pBufferDesc->ReturnValue >= 0) {
//
// Print leading zeros if necessary
//
if (((FormatFlags & FORMAT_FLAG_PAD_ZERO) == FORMAT_FLAG_PAD_ZERO) && ((FormatFlags & FORMAT_FLAG_LEFT_JUSTIFY) == 0u) && (NumDigits == 0u)) {
if (FieldWidth != 0u) {
while ((FieldWidth != 0u) && (Width < FieldWidth)) {
FieldWidth--;
_StoreChar(pBufferDesc, '0');
if (pBufferDesc->ReturnValue < 0) {
break;
}
}
}
}
if (pBufferDesc->ReturnValue >= 0) {
//
// Print number without sign
//
_PrintUnsigned(pBufferDesc, (unsigned)v, Base, NumDigits, FieldWidth, FormatFlags);
}
}
}
}
/*********************************************************************
*
* Public code
*
**********************************************************************
*/
/*********************************************************************
*
* SEGGER_RTT_vprintf
*
* Function description
* Stores a formatted string in SEGGER RTT control block.
* This data is read by the host.
*
* Parameters
* BufferIndex Index of "Up"-buffer to be used. (e.g. 0 for "Terminal")
* sFormat Pointer to format string
* pParamList Pointer to the list of arguments for the format string
*
* Return values
* >= 0: Number of bytes which have been stored in the "Up"-buffer.
* < 0: Error
*/
int SEGGER_RTT_vprintf(unsigned BufferIndex, const char * sFormat, va_list * pParamList) {
char c;
SEGGER_RTT_PRINTF_DESC BufferDesc;
int v;
unsigned NumDigits;
unsigned FormatFlags;
unsigned FieldWidth;
char acBuffer[SEGGER_RTT_PRINTF_BUFFER_SIZE];
BufferDesc.pBuffer = acBuffer;
BufferDesc.BufferSize = SEGGER_RTT_PRINTF_BUFFER_SIZE;
BufferDesc.Cnt = 0u;
BufferDesc.RTTBufferIndex = BufferIndex;
BufferDesc.ReturnValue = 0;
do {
c = *sFormat;
sFormat++;
if (c == 0u) {
break;
}
if (c == '%') {
//
// Filter out flags
//
FormatFlags = 0u;
v = 1;
do {
c = *sFormat;
switch (c) {
case '-': FormatFlags |= FORMAT_FLAG_LEFT_JUSTIFY; sFormat++; break;
case '0': FormatFlags |= FORMAT_FLAG_PAD_ZERO; sFormat++; break;
case '+': FormatFlags |= FORMAT_FLAG_PRINT_SIGN; sFormat++; break;
case '#': FormatFlags |= FORMAT_FLAG_ALTERNATE; sFormat++; break;
default: v = 0; break;
}
} while (v);
//
// filter out field with
//
FieldWidth = 0u;
do {
c = *sFormat;
if ((c < '0') || (c > '9')) {
break;
}
sFormat++;
FieldWidth = (FieldWidth * 10u) + ((unsigned)c - '0');
} while (1);
//
// Filter out precision (number of digits to display)
//
NumDigits = 0u;
c = *sFormat;
if (c == '.') {
sFormat++;
do {
c = *sFormat;
if ((c < '0') || (c > '9')) {
break;
}
sFormat++;
NumDigits = NumDigits * 10u + ((unsigned)c - '0');
} while (1);
}
//
// Filter out length modifier
//
c = *sFormat;
do {
if ((c == 'l') || (c == 'h')) {
sFormat++;
c = *sFormat;
} else {
break;
}
} while (1);
//
// Handle specifiers
//
switch (c) {
case 'c': {
char c0;
v = va_arg(*pParamList, int);
c0 = (char)v;
_StoreChar(&BufferDesc, c0);
break;
}
case 'd':
v = va_arg(*pParamList, int);
_PrintInt(&BufferDesc, v, 10u, NumDigits, FieldWidth, FormatFlags);
break;
case 'u':
v = va_arg(*pParamList, int);
_PrintUnsigned(&BufferDesc, (unsigned)v, 10u, NumDigits, FieldWidth, FormatFlags);
break;
case 'x':
case 'X':
v = va_arg(*pParamList, int);
_PrintUnsigned(&BufferDesc, (unsigned)v, 16u, NumDigits, FieldWidth, FormatFlags);
break;
case 's':
{
const char * s = va_arg(*pParamList, const char *);
do {
c = *s;
s++;
if (c == '\0') {
break;
}
_StoreChar(&BufferDesc, c);
} while (BufferDesc.ReturnValue >= 0);
}
break;
case 'p':
v = va_arg(*pParamList, int);
_PrintUnsigned(&BufferDesc, (unsigned)v, 16u, 8u, 8u, 0u);
break;
case '%':
_StoreChar(&BufferDesc, '%');
break;
default:
break;
}
sFormat++;
} else {
_StoreChar(&BufferDesc, c);
}
} while (BufferDesc.ReturnValue >= 0);
if (BufferDesc.ReturnValue > 0) {
//
// Write remaining data, if any
//
if (BufferDesc.Cnt != 0u) {
SEGGER_RTT_Write(BufferIndex, acBuffer, BufferDesc.Cnt);
}
BufferDesc.ReturnValue += (int)BufferDesc.Cnt;
}
return BufferDesc.ReturnValue;
}
/*********************************************************************
*
* SEGGER_RTT_printf
*
* Function description
* Stores a formatted string in SEGGER RTT control block.
* This data is read by the host.
*
* Parameters
* BufferIndex Index of "Up"-buffer to be used. (e.g. 0 for "Terminal")
* sFormat Pointer to format string, followed by the arguments for conversion
*
* Return values
* >= 0: Number of bytes which have been stored in the "Up"-buffer.
* < 0: Error
*
* Notes
* (1) Conversion specifications have following syntax:
* %[flags][FieldWidth][.Precision]ConversionSpecifier
* (2) Supported flags:
* -: Left justify within the field width
* +: Always print sign extension for signed conversions
* 0: Pad with 0 instead of spaces. Ignored when using '-'-flag or precision
* Supported conversion specifiers:
* c: Print the argument as one char
* d: Print the argument as a signed integer
* u: Print the argument as an unsigned integer
* x: Print the argument as an hexadecimal integer
* s: Print the string pointed to by the argument
* p: Print the argument as an 8-digit hexadecimal integer. (Argument shall be a pointer to void.)
*/
int SEGGER_RTT_printf(unsigned BufferIndex, const char * sFormat, ...) {
int r;
va_list ParamList;
va_start(ParamList, sFormat);
r = SEGGER_RTT_vprintf(BufferIndex, sFormat, &ParamList);
va_end(ParamList);
return r;
}
/*************************** End of file ****************************/

101
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/**
* @cond
***********************************************************************************************************************
*
* Copyright (c) 2018, Infineon Technologies AG
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,are permitted provided that the
* following conditions are met:
*
* Redistributions of source code must retain the above copyright notice, this list of conditions and the following
* disclaimer.
*
* Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
* following disclaimer in the documentation and/or other materials provided with the distribution.
*
* Neither the name of the copyright holders nor the names of its contributors may be used to endorse or promote
* products derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY,OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
**********************************************************************************************************************/
#ifndef SBC_TLE94X1_H
#define SBC_TLE94X1_H
/* XML Version 0.0.6 */
#define SBC_XML_VERSION (00006)
#define CTRL_BUS_CTRL_0 (0x3) /*decimal 3*/
#define CTRL_BUS_CTRL_3 (0x0) /*decimal 0*/
#define CTRL_GPIO_CTRL (0x4) /*decimal 4*/
#define CTRL_HW_CTRL_0 (0x40) /*decimal 64*/
#define CTRL_HW_CTRL_1 (0x0) /*decimal 0*/
#define CTRL_HW_CTRL_2 (0x40) /*decimal 64*/
#define CTRL_HW_CTRL_3 (0x1) /*decimal 1*/
#define CTRL_M_S_CTRL (0x13) /*decimal 19*/
#define CTRL_PWM_CTRL (0x0) /*decimal 0*/
#define CTRL_PWM_FREQ_CTRL (0x0) /*decimal 0*/
#define CTRL_SWK_BTL0_CTRL (0x50) /*decimal 80*/
#define CTRL_SWK_CAN_FD_CTRL (0x0) /*decimal 0*/
#define CTRL_SWK_CDR_CTRL2 (0x1) /*decimal 1*/
#define CTRL_SWK_CDR_LIMIT_HIGH_CTRL (0x54) /*decimal 84*/
#define CTRL_SWK_CDR_LIMIT_LOW_CTRL (0x4C) /*decimal 76*/
#define CTRL_SWK_DATA_H_CTRL 0x00000000
#define CTRL_SWK_DATA_L_CTRL 0x00000000
#define CTRL_SWK_DLC_CTRL (0x0) /*decimal 0*/
#define CTRL_SWK_ID0_CTRL (0x0) /*decimal 0*/
#define CTRL_SWK_IDx_CTRL 0x00000000
#define CTRL_SWK_MASK_IDx_CTRL 0x00000000
#define CTRL_TIMER_CTRL (0x0) /*decimal 0*/
#define CTRL_WD_CTRL (0x15) /*decimal 21*/
#define CTRL_WK_CTRL_0 (0x0) /*decimal 0*/
#define CTRL_WK_CTRL_1 (0x0) /*decimal 0*/
#define CTRL_WK_PUPD_CTRL (0x0) /*decimal 0*/
#define LED_Math_extendedID (0x1) /*decimal 1*/
#define LED_Math_extendedIDMsk (0x1) /*decimal 1*/
#define MATH_Baudrate (0x2) /*decimal 2*/
#define MATH_CDR_FrequencyMHz (0x28) /*decimal 40*/
#define MATH_DoubleCDRFreq (0x0) /*decimal 0*/
#define MATH_EN_PN (0x1) /*decimal 1*/
#define MATH_PWM_DC (0.0)
#endif /* SBC_TLE94X1_H */

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cva_bootloader_m0146/src/TLE9461/TLE9461.icwp Normal file
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<?xml version="1.0" encoding="UTF-8"?>
<icwpxml version="2.6.4">
<checksum>9e8e9087eecb39921ec31dfccce96b2a2efec664bafe2827aea4ddb51cb86761</checksum>
<XmlFile>TLE94x1_Lib.xml</XmlFile>
<XmlVersion>V0.0.6</XmlVersion>
<ActiveElements>
<CheckBox>
<define>CTRL.HW_CTRL_2[4]</define>
<value>0</value>
<dispValue>0</dispValue>
</CheckBox>
<CheckBox>
<define>CTRL.HW_CTRL_1[4]</define>
<value>0</value>
<dispValue>0</dispValue>
</CheckBox>
<ComboBox>
<define>CTRL.WK_PUPD_CTRL[7:6]</define>
<value>0</value>
<dispValue>0</dispValue>
</ComboBox>
<ComboBox>
<define>CTRL.PWM_FREQ_CTRL[1:0]</define>
<value>0</value>
<dispValue>0</dispValue>
</ComboBox>
<DoubleSpinBox>
<define>MATH.PWM_DC</define>
<value>0</value>
<dispValue>0.0</dispValue>
</DoubleSpinBox>
<CheckBox>
<define>CTRL.WK_CTRL_1[7]</define>
<value>0</value>
<dispValue>0</dispValue>
</CheckBox>
<CheckBox>
<define>CTRL.HW_CTRL_0[0]</define>
<value>0</value>
<dispValue>0</dispValue>
</CheckBox>
<CheckBox>
<define>CTRL.HW_CTRL_0[5]</define>
<value>0</value>
<dispValue>0</dispValue>
</CheckBox>
<CheckBox>
<define>CTRL.BUS_CTRL_3[4]</define>
<value>0</value>
<dispValue>0</dispValue>
</CheckBox>
<ComboBox>
<define>CTRL.WK_PUPD_CTRL[1:0]</define>
<value>0</value>
<dispValue>0</dispValue>
</ComboBox>
<CheckBox>
<define>CTRL.WK_CTRL_0[6]</define>
<value>0</value>
<dispValue>0</dispValue>
</CheckBox>
<ComboBox>
<define>CTRL.TIMER_CTRL[3:0]</define>
<value>0</value>
<dispValue>0</dispValue>
</ComboBox>
<ComboBox>
<define>CTRL.TIMER_CTRL[6:4]</define>
<value>0</value>
<dispValue>0</dispValue>
</ComboBox>
<CheckBox>
<define>CTRL.HW_CTRL_1[5]</define>
<value>0</value>
<dispValue>0</dispValue>
</CheckBox>
<CheckBox>
<define>CTRL.HW_CTRL_3[2]</define>
<value>0</value>
<dispValue>0</dispValue>
</CheckBox>
<ButtonGroup>
<define>CTRL.WD_CTRL[5]</define>
<value>0</value>
<dispValue>0</dispValue>
</ButtonGroup>
<CheckBox>
<define>CTRL.HW_CTRL_0[2]</define>
<value>0</value>
<dispValue>0</dispValue>
</CheckBox>
<ComboBox>
<define>CTRL.HW_CTRL_2[7:5]</define>
<value>2</value>
<dispValue>2</dispValue>
</ComboBox>
<ComboBox>
<define>CTRL.HW_CTRL_2[3:2]</define>
<value>0</value>
<dispValue>0</dispValue>
</ComboBox>
<ComboBox>
<define>CTRL.SWK_CAN_FD_CTRL[3:1]</define>
<value>2</value>
<dispValue>0</dispValue>
</ComboBox>
<ComboBox>
<define>MATH.Baudrate</define>
<value>2</value>
<dispValue>2</dispValue>
</ComboBox>
<CheckBox>
<define>CTRL.SWK_ID0_CTRL[0]</define>
<value>0</value>
<dispValue>0</dispValue>
</CheckBox>
<LineEdit>
<define>CTRL.SWK_MASK_IDx_CTRL</define>
<value>0x00000000</value>
<dispValue>0</dispValue>
</LineEdit>
<ComboBox>
<define>CTRL.SWK_DLC_CTRL[3:0]</define>
<value>0</value>
<dispValue>0</dispValue>
</ComboBox>
<LineEdit>
<define>CTRL.SWK_DATA_H_CTRL</define>
<value>0x00000000</value>
<dispValue>0x00000000</dispValue>
</LineEdit>
<LineEdit>
<define>CTRL.SWK_DATA_L_CTRL</define>
<value>0x00000000</value>
<dispValue>0x00000000</dispValue>
</LineEdit>
<CheckBox>
<define>CTRL.HW_CTRL_1[3]</define>
<value>0</value>
<dispValue>0</dispValue>
</CheckBox>
<CheckBox>
<define>CTRL.HW_CTRL_2[0]</define>
<value>0</value>
<dispValue>0</dispValue>
</CheckBox>
<ComboBox>
<define>CTRL.M_S_CTRL[4:3]</define>
<value>2</value>
<dispValue>2</dispValue>
</ComboBox>
<CheckBox>
<define>MATH.EN_PN</define>
<value>1</value>
<dispValue>1</dispValue>
</CheckBox>
<ComboBox>
<define>CTRL.HW_CTRL_3[1:0]</define>
<value>1</value>
<dispValue>1</dispValue>
</ComboBox>
<CheckBox>
<define>CTRL.HW_CTRL_0[6]</define>
<value>1</value>
<dispValue>1</dispValue>
</CheckBox>
<CheckBox>
<define>CTRL.SWK_CAN_FD_CTRL[0]</define>
<value>0</value>
<dispValue>0</dispValue>
</CheckBox>
<CheckBox>
<define>MATH.DoubleCDRFreq</define>
<value>0</value>
<dispValue>0</dispValue>
</CheckBox>
<LineEdit>
<define>CTRL.SWK_IDx_CTRL</define>
<value>0x00000000</value>
<dispValue>0</dispValue>
</LineEdit>
<ComboBox>
<define>CTRL.GPIO_CTRL[2:0]</define>
<value>4</value>
<dispValue>4</dispValue>
</ComboBox>
<CheckBox>
<define>CTRL.WK_CTRL_1[0]</define>
<value>0</value>
<dispValue>0</dispValue>
</CheckBox>
<CheckBox>
<define>CTRL.WK_CTRL_1[5]</define>
<value>0</value>
<dispValue>0</dispValue>
</CheckBox>
<CheckBox>
<define>CTRL.WK_CTRL_0[2];CTRL.WD_CTRL[6]</define>
<value>1</value>
<dispValue>1</dispValue>
</CheckBox>
<CheckBox>
<define>CTRL.WD_CTRL[4]</define>
<value>1</value>
<dispValue>1</dispValue>
</CheckBox>
<ComboBox>
<define>CTRL.WD_CTRL[2:0]</define>
<value>5</value>
<dispValue>5</dispValue>
</ComboBox>
<ComboBox>
<define>CTRL.M_S_CTRL[1:0]</define>
<value>3</value>
<dispValue>3</dispValue>
</ComboBox>
<CheckBox>
<define>CTRL.HW_CTRL_1[7]</define>
<value>0</value>
<dispValue>0</dispValue>
</CheckBox>
<CheckBox>
<define>CTRL.M_S_CTRL[2]</define>
<value>0</value>
<dispValue>0</dispValue>
</CheckBox>
<ComboBox>
<define>CTRL.BUS_CTRL_0[2:0]</define>
<value>3</value>
<dispValue>3</dispValue>
</ComboBox>
</ActiveElements>
</icwpxml>

591
cva_bootloader_m0146/src/TLE9461/TLE94x1.c Normal file
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/*********************************************************************************************************************
* Copyright (c) 2019, Infineon Technologies AG
*
*
* Distributed under the Boost Software License, Version 1.0.
*
*
* Boost Software License - Version 1.0 - August 17th, 2003
*
* Permission is hereby granted, free of charge, to any person or organization
* obtaining a copy of the software and accompanying documentation covered by
* this license (the "Software") to use, reproduce, display, distribute,
* execute, and transmit the Software, and to prepare derivative works of the
* Software, and to permit third-parties to whom the Software is furnished to
* do so, all subject to the following:
*
* The copyright notices in the Software and this entire statement, including
* the above license grant, this restriction and the following disclaimer,
* must be included in all copies of the Software, in whole or in part, and
* all derivative works of the Software, unless such copies or derivative
* works are solely in the form of machine-executable object code generated by
* a source language processor.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
* SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
* FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
*
*********************************************************************************************************************/
/****************************************************************************************************//**
* @file TLE94x1.c
*
* @brief Implementation of main library functions
*
* @version V1.0.1
* @date 05. October 2020
* @author Markus Noll / markus.noll@infineon.com
* @author Yannek Micha Rixen / Yannek.Rixen@infineon.com
********************************************************************************************************/
/* ================================================================================ */
/* ============================ HEADER FILES ================================ */
/* ================================================================================ */
#include "TLE94x1.h"
#include "SBC_TLE94x1.h"
#include <stdio.h>
/* ================================================================================ */
/* ============================== Variables ================================= */
/* ================================================================================ */
/* -------------------------------- ISR Handling --------------------------------- */
static SBC_Func_Callback SBC_ISR_Callbacks[30];
static uint32_t SBC_ISR_Vectors[30];
static uint8_t SBC_ISR_ReadOutRegs[30];
static uint8_t SBC_ISR_ReadOutVals[30];
static uint8_t SBC_RegisteredCallbacks = 0;
static uint8_t SBC_RegisteredRedoutRegs = 0;
/* ================================================================================ */
/* =========================== Library Functions ============================ */
/* ================================================================================ */
/* -------------------------------- Main Functions ------------------------------- */
SBC_ErrorCode SBC_WD_Trigger(void) {
/* Read WD config out of SBC and write back to trigger WD */
uint8_t WD_Data = (uint8_t)SBC_Read_Command(SBC_WD_CTRL);
return SBC_Write_Reg(SBC_WD_CTRL, WD_Data, NULL);
}
uint16_t SBC_Read_Command(uint8_t SBC_Reg) {
/* Read and return data - Bit[15:8] = Status Information Field - Bit [7:0] Register data */
return SBC_SPI_TRANSFER16(SBC_Read_Mask & SBC_Reg, 0x00U);
}
uint8_t SBC_Read_RegField(uint8_t SBC_Reg, uint8_t SBC_FieldMsk, uint8_t SBC_FieldPos) {
uint8_t data = ((uint8_t)SBC_Read_Command(SBC_Reg)) & 0xFFU;
return (data & SBC_FieldMsk) >> SBC_FieldPos;
}
SBC_ErrorCode SBC_Write_Reg(uint8_t SBC_Reg, uint8_t SBC_Val, uint16_t * returnval) {
SBC_ErrorCode errCode;
uint16_t returndata = SBC_SPI_TRANSFER16(SBC_Write_Bit | SBC_Reg, SBC_Val);
if(returnval != NULL) {
*returnval = returndata;
}
errCode.SBC_Register = SBC_Reg;
errCode.flippedBitsMask = ((uint8_t)SBC_Read_Command(SBC_Reg)) ^ SBC_Val;
errCode.expectedValue = SBC_Val;
return errCode;
}
SBC_ErrorCode SBC_Write_RegField(uint8_t SBC_Reg, uint8_t SBC_FieldMsk, uint8_t SBC_FieldPos, uint8_t SBC_FieldVal, uint16_t * returnval) {
SBC_ErrorCode errCode;
/* Read data out of register to be manipulated */
uint16_t returndata = SBC_Read_Command(SBC_Reg);
if(returnval != NULL) {
*returnval = returndata;
}
uint8_t data = (uint8_t)returndata;
/* Set the used bit field to all 0 */
data &= ~(SBC_FieldMsk);
/* Configure new data to bit field */
data |= (SBC_FieldVal << SBC_FieldPos);
(void)SBC_SPI_TRANSFER16(SBC_Write_Bit | SBC_Reg, data);
errCode.SBC_Register = SBC_Reg;
errCode.expectedValue = (SBC_FieldVal << SBC_FieldPos);
uint8_t actualValue = ((uint8_t)SBC_Read_Command(SBC_Reg)) & SBC_FieldMsk;
errCode.flippedBitsMask = errCode.expectedValue ^ actualValue;
return errCode;
}
SBC_ErrorCode SBC_Init(void) {
SBC_ErrorCode errCode;
uint8_t WD_Checksum = CTRL_WD_CTRL;
uint8_t WD_CTRL = CTRL_WD_CTRL;
uint8_t SWK_ID3_CTRL, SWK_ID2_CTRL, SWK_ID1_CTRL, SWK_ID0_CTRL;
uint8_t SWK_MASK_ID3_CTRL, SWK_MASK_ID2_CTRL, SWK_MASK_ID1_CTRL, SWK_MASK_ID0_CTRL;
uint8_t SWK_CAN_FD_CTRL = CTRL_SWK_CAN_FD_CTRL;
/* Calculate checksum */
WD_Checksum = WD_Checksum ^ WD_Checksum >> 4;
WD_Checksum = WD_Checksum ^ WD_Checksum >> 2;
WD_Checksum = WD_Checksum ^ WD_Checksum >> 1;
if((WD_Checksum & 1) > 0) {
/* Set parity bit */
WD_CTRL = CTRL_WD_CTRL | 0x80U;
}
/* Check if ID is configured to be extended */
if((CTRL_SWK_ID0_CTRL & SBC_SWK_ID0_CTRL_IDE_Msk) == SBC_IDE_EXTENDED) {
/* extended ID */
uint32_t SWK_ID_CTRL = CTRL_SWK_IDx_CTRL << 3;
uint32_t SWK_MASK_ID_CTRL = CTRL_SWK_MASK_IDx_CTRL << 3;
SWK_ID3_CTRL = (uint8_t)(SWK_ID_CTRL >> 24);
SWK_ID2_CTRL = (uint8_t)(SWK_ID_CTRL >> 16);
SWK_ID1_CTRL = (uint8_t)(SWK_ID_CTRL >> 8);
SWK_ID0_CTRL = (((uint8_t)(SWK_ID_CTRL >> 1)) & SBC_SWK_ID0_CTRL_ID4_0_Msk) | SBC_IDE_EXTENDED;
SWK_MASK_ID3_CTRL = (uint8_t)(SWK_MASK_ID_CTRL >> 24);
SWK_MASK_ID2_CTRL = (uint8_t)(SWK_MASK_ID_CTRL >> 16);
SWK_MASK_ID1_CTRL = (uint8_t)(SWK_MASK_ID_CTRL >> 8);
SWK_MASK_ID0_CTRL = (((uint8_t)(SWK_MASK_ID_CTRL >> 1)) & SBC_SWK_MASK_ID0_CTRL_MASK_ID4_0_Msk);
} else {
/* Standard length ID */
uint16_t SWK_ID_CTRL = CTRL_SWK_IDx_CTRL;
uint32_t SWK_MASK_ID_CTRL = CTRL_SWK_MASK_IDx_CTRL;
SWK_ID3_CTRL = (uint8_t)(SWK_ID_CTRL >> 3);
SWK_ID2_CTRL = (uint8_t)(SWK_ID_CTRL << 5);
SWK_ID1_CTRL = 0x00U;
SWK_ID0_CTRL = 0x00U;
SWK_MASK_ID3_CTRL = (uint8_t)(SWK_MASK_ID_CTRL >> 3);
SWK_MASK_ID2_CTRL = (uint8_t)(SWK_MASK_ID_CTRL << 5);
SWK_MASK_ID1_CTRL = 0x00U;
SWK_MASK_ID0_CTRL = 0x00U;
}
/* DIS_ERR_CNT is set only when FD Tolerance is set. */
if((CTRL_SWK_CAN_FD_CTRL & SBC_SWK_CAN_FD_CTRL_CAN_FD_EN_Msk) == SBC_CAN_FD_EN_ENABLED) {
SWK_CAN_FD_CTRL &= SBC_DIS_ERR_CNT_DISABLED << SBC_SWK_CAN_FD_CTRL_DIS_ERR_CNT_Pos;
}
/* Describes initialization sequence */
uint8_t initSequence[39][2] = {
{SBC_WD_CTRL, WD_CTRL},
{SBC_M_S_CTRL, CTRL_M_S_CTRL},
{SBC_HW_CTRL_0, CTRL_HW_CTRL_0},
{SBC_HW_CTRL_3, CTRL_HW_CTRL_3},
{SBC_BUS_CTRL_3, CTRL_BUS_CTRL_3},
{SBC_WK_CTRL_0, CTRL_WK_CTRL_0},
{SBC_WK_CTRL_1, CTRL_WK_CTRL_1},
{SBC_WK_PUPD_CTRL, CTRL_WK_PUPD_CTRL},
{SBC_TIMER_CTRL, CTRL_TIMER_CTRL},
{SBC_PWM_FREQ_CTRL, CTRL_PWM_FREQ_CTRL}, /* The desired duty cycle should be set first before GPIO is enabled as PWM HS or PWM LS. */
{SBC_PWM_CTRL, CTRL_PWM_CTRL},
{SBC_GPIO_CTRL, CTRL_GPIO_CTRL},
{SBC_HW_CTRL_1, CTRL_HW_CTRL_1}, /* May lock configuration (CFG_LOCK_0) */
{SBC_HW_CTRL_2, CTRL_HW_CTRL_2}, /* May lock configuration (CFG_LOCK_1) */
{SBC_BUS_CTRL_0, CTRL_BUS_CTRL_0},
/* -------------------------- SELECTIVE WAKE REGISTERS --------------------------- */
/* Configuring CDR */
{SBC_SWK_CDR_CTRL2, CTRL_SWK_CDR_CTRL2},
{SBC_SWK_BTL0_CTRL, CTRL_SWK_BTL0_CTRL},
{SBC_SWK_CDR_LIMIT_HIGH_CTRL, CTRL_SWK_CDR_LIMIT_HIGH_CTRL},
{SBC_SWK_CDR_LIMIT_LOW_CTRL, CTRL_SWK_CDR_LIMIT_LOW_CTRL},
{SBC_SWK_CDR_CTRL1, (SBC_SEL_FILT_TC16 << SBC_SWK_CDR_CTRL1_SEL_FILT_Pos) | (SBC_CDR_EN_ENABLED << SBC_SWK_CDR_CTRL1_CDR_EN_Pos)},
/* Set ID */
{SBC_SWK_ID3_CTRL, SWK_ID3_CTRL},
{SBC_SWK_ID2_CTRL, SWK_ID2_CTRL},
{SBC_SWK_ID1_CTRL, SWK_ID1_CTRL},
{SBC_SWK_ID0_CTRL, SWK_ID0_CTRL},
/* Set Mask */
{SBC_SWK_MASK_ID3_CTRL, SWK_MASK_ID3_CTRL},
{SBC_SWK_MASK_ID2_CTRL, SWK_MASK_ID2_CTRL},
{SBC_SWK_MASK_ID1_CTRL, SWK_MASK_ID1_CTRL},
{SBC_SWK_MASK_ID0_CTRL, SWK_MASK_ID0_CTRL},
/* Set Data */
{SBC_SWK_DATA7_CTRL, (uint8_t)(CTRL_SWK_DATA_H_CTRL >> 24)},
{SBC_SWK_DATA6_CTRL, (uint8_t)(CTRL_SWK_DATA_H_CTRL >> 16)},
{SBC_SWK_DATA5_CTRL, (uint8_t)(CTRL_SWK_DATA_H_CTRL >> 8)},
{SBC_SWK_DATA4_CTRL, (uint8_t)(CTRL_SWK_DATA_H_CTRL >> 0)},
{SBC_SWK_DATA3_CTRL, (uint8_t)(CTRL_SWK_DATA_L_CTRL >> 24)},
{SBC_SWK_DATA2_CTRL, (uint8_t)(CTRL_SWK_DATA_L_CTRL >> 16)},
{SBC_SWK_DATA1_CTRL, (uint8_t)(CTRL_SWK_DATA_L_CTRL >> 8)},
{SBC_SWK_DATA0_CTRL, (uint8_t)(CTRL_SWK_DATA_L_CTRL >> 0)},
/* Set DLC */
{SBC_SWK_DLC_CTRL, CTRL_SWK_DLC_CTRL},
{SBC_SWK_CAN_FD_CTRL, SWK_CAN_FD_CTRL},
/* End Configuration */
{0x00U, 0x00U}
};
/* Call SPI Init */
if(SBC_SPI_INIT() != 0) {
errCode.SBC_Register = 0x00;
errCode.flippedBitsMask = 0xFF;
errCode.expectedValue = 0x00;
return errCode;
};
uint8_t i = 0;
/* Write all initialization items to Lite SBC */
while(initSequence[i][0] != 0x00U || initSequence[i][1] != 0x00U) {
errCode = SBC_Write_Reg(initSequence[i][0], initSequence[i][1], NULL);
if(errCode.flippedBitsMask > 0) {
return errCode;
}
i++;
}
errCode.SBC_Register = 0x00;
errCode.flippedBitsMask = 0x00;
errCode.expectedValue = 0x00;
return errCode;
}
/* -------------------------------- ISR Functions -------------------------------- */
void SBC_Register_Callback(uint32_t ISR_Vector, void (*Callback_Handler)(uint8_t callbackHandler)) {
/* Save callback */
SBC_ISR_Callbacks[SBC_RegisteredCallbacks] = Callback_Handler;
/* Save callback vector */
SBC_ISR_Vectors[SBC_RegisteredCallbacks] = ISR_Vector;
/* Check if the register will be readout already to avoid double-readout later */
uint8_t RegFound = 0;
for (uint8_t i = 0; i < SBC_RegisteredRedoutRegs; i++) {
if (SBC_ISR_ReadOutRegs[i] == (ISR_Vector >> 24)) {
RegFound = 1;
}
}
/* If readout status-reg was not found, register in the readout list */
if (RegFound == 0) {
SBC_ISR_ReadOutRegs[SBC_RegisteredRedoutRegs] = (uint8_t)(ISR_Vector >> 24);
SBC_RegisteredRedoutRegs++;
}
SBC_RegisteredCallbacks++;
}
SBC_ErrorCode SBC_ISR(void) {
SBC_ErrorCode errCode;
/* Readout all registered status-registers */
for (uint8_t i = 0; i < SBC_RegisteredRedoutRegs; i++) {
SBC_ISR_ReadOutVals[i] = (uint8_t) SBC_Read_Command(SBC_ISR_ReadOutRegs[i]);
}
/* Handle all interrupts */
for (uint8_t i = 0; i < SBC_RegisteredCallbacks; i++) {
/* Decode ISR Vector */
uint8_t Compare = (uint8_t)SBC_ISR_Vectors[i];
uint8_t FieldPos = (uint8_t)(SBC_ISR_Vectors[i] >> 8);
uint8_t FieldMsk = (uint8_t)(SBC_ISR_Vectors[i] >> 16);
uint8_t RegAddr = (uint8_t)(SBC_ISR_Vectors[i] >> 24);
/* Readback of associated status-bit */
uint8_t ReadBack = 0;
for (uint8_t j = 0; j < SBC_RegisteredRedoutRegs; j++) {
if (SBC_ISR_ReadOutRegs[j] == RegAddr) {
ReadBack = SBC_ISR_ReadOutVals[j];
break;
}
}
/* If compare-values matched -> proceed callback and clear field */
if (((ReadBack & FieldMsk) >> FieldPos) == Compare) {
SBC_ISR_Callbacks[i](ReadBack);
}
}
/* Clear all ISR related registers */
for (uint8_t i = 0; i < SBC_RegisteredRedoutRegs; i++) {
errCode = SBC_Write_Reg(SBC_ISR_ReadOutRegs[i], 0x00U, NULL);
if(errCode.flippedBitsMask > 0) {
return errCode;
}
}
errCode.SBC_Register = 0x00U;
errCode.flippedBitsMask = 0x00U;
errCode.expectedValue = 0x00U;
return errCode;
}
/* -------------------------------- API Calls ----------------------------------- */
SBC_ErrorCode SBC_Mode_Normal(void) {
return SBC_Write_RegField(SBC_M_S_CTRL, SBC_M_S_CTRL_MODE_Msk, SBC_M_S_CTRL_MODE_Pos, SBC_MODE_NORMAL, NULL);
}
SBC_ErrorCode SBC_Mode_Stop(void) {
return SBC_Write_RegField(SBC_M_S_CTRL, SBC_M_S_CTRL_MODE_Msk, SBC_M_S_CTRL_MODE_Pos, SBC_MODE_STOP, NULL);
}
SBC_ErrorCode SBC_Mode_Sleep(void) {
uint8_t registerReadOut;
SBC_ErrorCode errCode;
/* If CAN PN is configured */
if(MATH_EN_PN != 0) {
/* Reading value of SWK_STAT. */
registerReadOut = (uint8_t)SBC_Read_Command(SBC_SWK_STAT);
/* CAN Protocol Handler in sync? The selective wake routine should be aborted if sync is not set. Note: for SYNC to be set the transceiver must have been in Normal Mode and a valid CAN communication must have been sent on the bus by any node. */
if((registerReadOut & SBC_SWK_STAT_SYNC_Msk) >> SBC_SWK_STAT_SYNC_Pos != SBC_SYNC_VALID_FRAME_RECEIVED) {
errCode.SBC_Register = SBC_SWK_STAT;
errCode.flippedBitsMask = SBC_SWK_STAT_SYNC_Msk;
errCode.expectedValue = SBC_SYNC_VALID_FRAME_RECEIVED << SBC_SWK_STAT_SYNC_Pos;
return errCode;
}
/* Set SWK Configuration valid */
errCode = SBC_Write_RegField(SBC_SWK_CTRL, SBC_SWK_CTRL_CFG_VAL_Msk, SBC_SWK_CTRL_CFG_VAL_Pos, SBC_CFG_VAL_VALID, NULL);
if(errCode.flippedBitsMask > 0) {
return errCode;
}
/* Clear SYSERR bit */
errCode = SBC_Write_RegField(SBC_BUS_STAT, SBC_BUS_STAT_SYSERR_Msk, SBC_BUS_STAT_SYSERR_Pos, 0x00, NULL);
if(errCode.flippedBitsMask > 0) {
return errCode;
}
/* Set CAN Mode to off and once again to desired configuration */
errCode = SBC_Write_Reg(SBC_BUS_CTRL_0, 0x03, NULL);
if(errCode.flippedBitsMask > 0) {
return errCode;
}
errCode = SBC_Write_Reg(SBC_BUS_CTRL_0, CTRL_BUS_CTRL_0, NULL);
if(errCode.flippedBitsMask > 0) {
return errCode;
}
/* Check SWK_STAT for SYNC == 1 && SWK_SET == 1 && WUF == 0 && WUP == 0. Ignore CANSIL */
registerReadOut = (uint8_t)SBC_Read_Command(SBC_SWK_STAT);
if( ((SBC_SWK_STAT_SYNC_Msk & registerReadOut) == SBC_SWK_STAT_SYNC_Msk)
&& ((SBC_SWK_STAT_SWK_SET_Msk & registerReadOut) == SBC_SWK_STAT_SWK_SET_Msk)
&& ((SBC_SWK_STAT_WUP_Msk & registerReadOut) != SBC_SWK_STAT_WUP_Msk)
&& ((SBC_SWK_STAT_WUF_Msk & registerReadOut) != SBC_SWK_STAT_WUF_Msk)) {
/* Empty */
} else {
errCode.SBC_Register = SBC_SWK_STAT;
errCode.expectedValue = 0b01000100U;
errCode.flippedBitsMask = errCode.expectedValue ^ registerReadOut;
return errCode;
}
}
/* Clear Wake Status Registers, so that SBC can sleep. */
errCode = SBC_Write_Reg(SBC_WK_STAT_0, 0x00, NULL);
if(errCode.flippedBitsMask > 0) {
return errCode;
}
errCode = SBC_Write_Reg(SBC_WK_STAT_1, 0x00, NULL);
if(errCode.flippedBitsMask > 0) {
return errCode;
}
/* Select sleep mode */
(void)SBC_Write_RegField(SBC_M_S_CTRL, SBC_M_S_CTRL_MODE_Msk, SBC_M_S_CTRL_MODE_Pos, SBC_MODE_SLEEP, NULL);
registerReadOut = (uint8_t)SBC_Read_Command(SBC_M_S_CTRL);
/* This piece of code is ideally never reached as the microcontroller should be already turned off then */
if(registerReadOut != 0) {
errCode.SBC_Register = SBC_M_S_CTRL;
errCode.flippedBitsMask = registerReadOut;
errCode.expectedValue = 0x00U;
return errCode;
}
errCode.SBC_Register = 0x00U;
errCode.flippedBitsMask = 0x00U;
errCode.expectedValue = 0x00U;
return errCode;
}
SBC_ErrorCode SBC_Set_DutyCycle_PWM (uint8_t PWM_DC) {
return SBC_Write_Reg(SBC_PWM_CTRL, PWM_DC, NULL);
}
SBC_ErrorCode SBC_Set_Timer_On (uint8_t OnTime) {
return SBC_Write_RegField(SBC_TIMER_CTRL, SBC_TIMER_CTRL_TIMER_ON_Msk, SBC_TIMER_CTRL_TIMER_ON_Pos, OnTime, NULL);
}
SBC_ErrorCode SBC_Set_Timer_Period (uint8_t Period) {
return SBC_Write_RegField(SBC_TIMER_CTRL, SBC_TIMER_CTRL_TIMER_PER_Msk, SBC_TIMER_CTRL_TIMER_PER_Pos, Period, NULL);
}
SBC_ErrorCode SBC_FO_Test_On(void) {
return SBC_Write_RegField(SBC_HW_CTRL_0, SBC_HW_CTRL_0_FO_ON_Msk, SBC_HW_CTRL_0_FO_ON_Pos, SBC_FO_ON_ACTIVE, NULL);
}
SBC_ErrorCode SBC_FO_Test_Off(void) {
return SBC_Write_RegField(SBC_HW_CTRL_0, SBC_HW_CTRL_0_FO_ON_Msk, SBC_HW_CTRL_0_FO_ON_Pos, SBC_FO_ON_NOT_ACTIVE, NULL);
}
SBC_ErrorCode SBC_CP_On(void) {
return SBC_Write_RegField(SBC_HW_CTRL_0, SBC_HW_CTRL_0_CP_EN_Msk, SBC_HW_CTRL_0_CP_EN_Pos, SBC_CP_EN_ON, NULL);
}
SBC_ErrorCode SBC_CP_Off(void) {
return SBC_Write_RegField(SBC_HW_CTRL_0, SBC_HW_CTRL_0_CP_EN_Msk, SBC_HW_CTRL_0_CP_EN_Pos, SBC_CP_EN_OFF, NULL);
}
SBC_ErrorCode SBC_WK_MEAS_On(void) {
return SBC_Write_RegField(SBC_WK_CTRL_1, SBC_WK_CTRL_1_WK_MEAS_Msk, SBC_WK_CTRL_1_WK_MEAS_Pos, SBC_WK_MEAS_WK_AS_VOLTAGESENSING, NULL);
}
SBC_ErrorCode SBC_WK_MEAS_Off(void) {
return SBC_Write_RegField(SBC_WK_CTRL_1, SBC_WK_CTRL_1_WK_MEAS_Msk, SBC_WK_CTRL_1_WK_MEAS_Pos, SBC_WK_MEAS_WK_AS_WAKEUP, NULL);
}
SBC_ErrorCode SBC_TIMER_WK_EN_On(void) {
return SBC_Write_RegField(SBC_WK_CTRL_0, SBC_WK_CTRL_0_TIMER_WK_EN_Msk, SBC_WK_CTRL_0_TIMER_WK_EN_Pos, WK_CTRL_0_TIMER_WK_EN_WAKESOURCE, NULL);
}
SBC_ErrorCode SBC_TIMER_WK_EN_Off(void) {
return SBC_Write_RegField(SBC_WK_CTRL_0, SBC_WK_CTRL_0_TIMER_WK_EN_Msk, SBC_WK_CTRL_0_TIMER_WK_EN_Pos, WK_CTRL_0_TIMER_WK_EN_WAKEUP_DISABLED, NULL);
}
uint16_t SBC_SYS_STAT_Read(void) {
uint16_t systemStatus = 0;
uint16_t returndata = SBC_Read_Command(SBC_SYS_STATUS_CTRL_0);
systemStatus = returndata & 0x00FFU;
systemStatus |= SBC_Read_Command(SBC_SYS_STATUS_CTRL_1) << 8;
return systemStatus;
}
SBC_ErrorCode SBC_SYS_STAT_Write(uint16_t SystemStatus) {
SBC_ErrorCode errCode;
/* Write lower bits */
errCode = SBC_Write_Reg(SBC_SYS_STATUS_CTRL_0, (uint8_t)SystemStatus, NULL);
if(errCode.flippedBitsMask > 0) {
return errCode;
}
/* Write higher bits */
return SBC_Write_Reg(SBC_SYS_STATUS_CTRL_1, (uint8_t)(SystemStatus >> 8), NULL);
}
SBC_ErrorCode SBC_Lock_Configuration(void) {
SBC_ErrorCode errCode;
/* Lock CP_EN and GPIO cannot be modified */
errCode = SBC_Write_RegField(SBC_HW_CTRL_1, SBC_HW_CTRL_1_CFG_LOCK_0_Msk, SBC_HW_CTRL_1_CFG_LOCK_0_Pos, SBC_CFG_LOCK_0_LOCKED, NULL);
if(errCode.flippedBitsMask > 0) {
return errCode;
}
/* Lock Bits with bit type ‘rwl’ (except CP_EN and GPIO) until next device power-up. */
errCode = SBC_Write_RegField(SBC_HW_CTRL_2, SBC_HW_CTRL_2_CFG_LOCK_1_Msk, SBC_HW_CTRL_2_CFG_LOCK_1_Pos, SBC_CFG_LOCK_1_LOCKED, NULL);
if(errCode.flippedBitsMask > 0) {
return errCode;
}
errCode.SBC_Register = 0x00;
errCode.flippedBitsMask = 0x00;
errCode.expectedValue = 0x00;
return errCode;
}
SBC_ErrorCode SBC_Unlock_Configuration(void) {
SBC_ErrorCode errCode;
/* Unlock CP_EN and GPIO configuration. */
errCode = SBC_Write_RegField(SBC_HW_CTRL_1, SBC_HW_CTRL_1_CFG_LOCK_0_Msk, SBC_HW_CTRL_1_CFG_LOCK_0_Pos, SBC_CFG_LOCK_0_NOTLOCKED, NULL);
if(errCode.flippedBitsMask > 0) {
return errCode;
}
/* Unlock Bits with bit type ‘rwl’ (except CP_EN and GPIO). */
errCode = SBC_Write_RegField(SBC_HW_CTRL_2, SBC_HW_CTRL_2_CFG_LOCK_1_Msk, SBC_HW_CTRL_2_CFG_LOCK_1_Pos, SBC_CFG_LOCK_1_NOTLOCKED, NULL);
if(errCode.flippedBitsMask > 0) {
return errCode;
}
errCode.SBC_Register = 0x00;
errCode.flippedBitsMask = 0x00;
errCode.expectedValue = 0x00;
return errCode;
}
SBC_ErrorCode SBC_Clear_Wake_Status(void) {
SBC_ErrorCode errCode = SBC_Write_Reg(SBC_WK_STAT_0, 0x00, NULL);
if(errCode.flippedBitsMask != 0) {
return errCode;
}
errCode = SBC_Write_Reg(SBC_WK_STAT_1, 0x00, NULL);
if(errCode.flippedBitsMask != 0) {
return errCode;
}
errCode.SBC_Register = 0x00;
errCode.flippedBitsMask = 0x00;
errCode.expectedValue = 0x00;
return errCode;
}

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/*********************************************************************************************************************
* Copyright (c) 2019, Infineon Technologies AG
*
*
* Distributed under the Boost Software License, Version 1.0.
*
*
* Boost Software License - Version 1.0 - August 17th, 2003
*
* Permission is hereby granted, free of charge, to any person or organization
* obtaining a copy of the software and accompanying documentation covered by
* this license (the "Software") to use, reproduce, display, distribute,
* execute, and transmit the Software, and to prepare derivative works of the
* Software, and to permit third-parties to whom the Software is furnished to
* do so, all subject to the following:
*
* The copyright notices in the Software and this entire statement, including
* the above license grant, this restriction and the following disclaimer,
* must be included in all copies of the Software, in whole or in part, and
* all derivative works of the Software, unless such copies or derivative
* works are solely in the form of machine-executable object code generated by
* a source language processor.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
* SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
* FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
*
*********************************************************************************************************************/
/****************************************************************************************************//**
* @file TLE94x1.h
*
* @brief Main header declaration file for TLE94x1 SBC family device
*
* @version V1.0.0
* @date 15. April 2019
* @author Markus Noll / markus.noll@infineon.com
* @author Yannek Micha Rixen / Yannek.Rixen@infineon.com
*******************************************************************************************************/
#ifndef TLE94x1_H
#define TLE94x1_H
/* ================================================================================ */
/* ============================ HEADER FILES ================================ */
/* ================================================================================ */
#include "TLE94x1_DEFINES.h"
#include "TLE94x1_ISR.h"
#include "TLE94x1_SPI.h"
#include <stdint.h>
/* ================================================================================ */
/* ================================ MACROS ================================== */
/* ================================================================================ */
/**
* @def SBC_Write_Bit
*
* @brief This bit has to be set in order to write to a register.
*/
#define SBC_Write_Bit (0x80U)
/**
* @def SBC_Read_Mask
*
* @brief A mask to prevent the user from accidentally writing to a register.
*/
#define SBC_Read_Mask (0x7FU)
/* ================================================================================ */
/* =========================== Library Functions ============================ */
/* ================================================================================ */
struct __SBC_ErrorCode;
/**
* @brief A structure for simple error readout.
*
* flippedBitsMask is greater than 0 if the value read from the register at SBC_Register differs from expectedValue.
*/
typedef struct __SBC_ErrorCode {
uint8_t SBC_Register; //!< The register where an error occurred.
uint8_t flippedBitsMask; //!< Masks the bits that differ from the expected value. Is 0 if readout is as expected.
uint8_t expectedValue; //!< Expected readout of the register.
} SBC_ErrorCode;
/**
* @brief Typedef for interrupt callbacks.
*/
typedef void (*SBC_Func_Callback)(uint8_t callbackHandler);
/* -------------------------------- Main Functions ------------------------------- */
/**
* @brief This method will trigger the watchdog.
*
* The function must be called periodically according to the configured watchdog-time.
*/
SBC_ErrorCode SBC_WD_Trigger(void);
/**
* @brief This method will proceed a readout of a register.
*
* @param SBC_Reg Address of the register to be read out. See TLE94x1_DEFINES.h for definitions
* @retval A 16 bit value will be returned.
* Bit[15:8] is the Status-Information-Field, Bit [7:0] is the read register-value.
* For furhter information of the Status-Information-Field see chapter 13.3 in the datasheet.
*/
uint16_t SBC_Read_Command(uint8_t SBC_Reg);
/**
* @brief This method will proceed a readout of a dedicated bitfield within a register
*
* @param SBC_Reg Address of the register to be readout. See TLE94x1_DEFINES.h for definitions
* @param SBC_FieldMsk Bit mask of the field to be readout. See TLE94x1_DEFINES.h for definitions
* @param SBC_FieldPos Bit position of the field to be readout. See TLE94x1_DEFINES.h for definitions
*
*
* @retval A 8 bit value will be returned and includes the data of the bitfield to be read out *
*/
uint8_t SBC_Read_RegField(uint8_t SBC_Reg, uint8_t SBC_FieldMsk, uint8_t SBC_FieldPos);
/**
* @brief Writes a whole byte to a register and verifies it.
*
* @param SBC_Reg Address of the register to be manipulated. See TLE94x1_DEFINES.h for definitions
* @param SBC_Val Byte to write to SBC_Reg
* @param *returnval A 16 bit value will be returned.
* Bit[15:8] is the Status-Information-Field, Bit [7:0] is the value of the manipulated register before write
* For furhter information of the Status-Information-Field see chapter 13.3 in the datasheet.
*
* @retval See description of SBC_ErrorCode.
*/
SBC_ErrorCode SBC_Write_Reg(uint8_t SBC_Reg, uint8_t SBC_Val, uint16_t * returnval);
/**
* @brief This method can be used for manipulating a single bit-field in a control-register.
*
* It will readout the old value of the registers, manipulate the desired bit-field and keep
* the other bit-configuration as it was.
* For usage examples have a look at the implementations of different API calls below.
*
* @param SBC_Reg Address of the register to be manipulated. See TLE94x1_DEFINES.h for definitions
* @param SBC_FieldMsk Bit mask of the field to manipulate. See TLE94x1_DEFINES.h for definitions
* @param SBC_FieldPos Bit position of the field to manipulate. See TLE94x1_DEFINES.h for definitions
* @param SBC_FieldVal New value which will be written to the bit-field. See TLE94x1_DEFINES.h for enumerations
* @param *returnval A 16 bit value will be returned.
* Bit[15:8] is the Status-Information-Field, Bit [7:0] is the value of the manipulated register before write
* For furhter information of the Status-Information-Field see chapter 13.3 in the datasheet.
*
*
* @retval SBC_ErrorCode See description of SBC_ErrorCode.
*
*/
SBC_ErrorCode SBC_Write_RegField(uint8_t SBC_Reg, uint8_t SBC_FieldMsk, uint8_t SBC_FieldPos, uint8_t SBC_FieldVal, uint16_t * returnval);
/**
* @brief This method must be called one time at startup of the microcontroller.
*
* This method will initialize all registers of the SBC with the configuration-data of SBC_TLE94x1.h.
* After this, the SBC can be used as normal.
*
* @retval SBC_ErrorCode See description of SBC_ErrorCode.
*/
SBC_ErrorCode SBC_Init(void);
/* -------------------------------- ISR Functions -------------------------------- */
/**
* @brief This function can register a self-defined function to a specific interrupt-event of the SBC.
*
* Everytime the SBC_ISR() method is called and the associated status-bit is set, it will consider to
* proceed a callback to this function later.
* See all the possible ISR_Vectors in the TLE94x1_ISR.h
*
*
* @param ISR_Vector Definition of the interrupt event. See all possible events in TLE94x1_ISR.h
*
* @param *Callback_Handler Pointer to the function which will be called back.
* The function must accept a uint8_t as first argument.
*/
void SBC_Register_Callback(uint32_t ISR_Vector, void (*Callback_Handler)(uint8_t callbackHandler));
/**
* @brief Interrupt Service Routine for handling interrupts.
*
* This method must be called automatically everytime a rising-edge on the INTN pin is recognized.
* In case, the INTN pin is not connected, this method can also be called periodically by the user during runtime.
* The ISR will proceed a readout of all registered interrupts. If a status-bit of a registered interrupt is set,
* it will initiate a callback to the registered function and give the registered function the status-register value
* as a parameter.
*
* @retval SBC_ErrorCode See description of SBC_ErrorCode.
*/
SBC_ErrorCode SBC_ISR(void);
/* -------------------------------- API Calls ----------------------------------- */
/**
* @brief Enters SBC normal mode
*
* @retval SBC_ErrorCode See description of SBC_ErrorCode.
*/
SBC_ErrorCode SBC_Mode_Normal(void);
/**
* @brief Enters SBC stop mode
*
* @retval SBC_ErrorCode See description of SBC_ErrorCode.
*/
SBC_ErrorCode SBC_Mode_Stop(void);
/**
* @brief Clears all wake status registers and enter SBC sleep mode. Depending on configuration also the selective-wake feature will be initialized
* before entering sleep mode. In case, the SWK option is enabled and the internal CAN protocol handler is not in sync when calling this function,
* the sleep mode will be not entered.
*
* @retval SBC_ErrorCode See description of SBC_ErrorCode.
*/
SBC_ErrorCode SBC_Mode_Sleep(void);
/**
* @brief Sets the duty-cycle of the internal PWM generator
*
* @param PWM_DC Set the duty-cycle with values of 0-255 for 0% to 100%
* @retval SBC_ErrorCode See description of SBC_ErrorCode.
*/
SBC_ErrorCode SBC_Set_DutyCycle_PWM(uint8_t PWM_DC);
/**
* @brief Sets the OnTime of the internal timer.
*
* @param OnTime On time which will be configured to the timer. See TLE94x1_DEFINES.h for enumerations.
* @retval SBC_ErrorCode See description of SBC_ErrorCode.
*/
SBC_ErrorCode SBC_Set_Timer_On(uint8_t OnTime);
/**
* @brief Sets the Period time of the internal timer
*
* @param Period Period time which will be configured to the timer. See TLE94x1_DEFINES.h for enumerations.
* @retval SBC_ErrorCode See description of SBC_ErrorCode.
*/
SBC_ErrorCode SBC_Set_Timer_Period(uint8_t Period);
/**
* @brief FO output activated by software for testing. Only working if FO/GPIO is configured as FO
*
* @retval SBC_ErrorCode See description of SBC_ErrorCode.
*/
SBC_ErrorCode SBC_FO_Test_On(void);
/**
* @brief FO output deactivated by software for testing. Only working if FO/GPIO is configured as FO
*
* @retval SBC_ErrorCode See description of SBC_ErrorCode.
*/
SBC_ErrorCode SBC_FO_Test_Off(void);
/**
* @brief Charge-Pump (VCP-Pin) is enabled. See chapter 5.3 in datasheet.
*
* @retval SBC_ErrorCode See description of SBC_ErrorCode.
*/
SBC_ErrorCode SBC_CP_On(void);
/**
* @brief Charge-Pump (VCP-Pin) is disabled. See chapter 5.3 in datasheet.
*
* @retval SBC_ErrorCode See description of SBC_ErrorCode.
*/
SBC_ErrorCode SBC_CP_Off(void);
/**
* @brief Enable Voltage Sensing. No wake-up events are generated. See chapter 9.2.4 in datasheet.
*
* @retval SBC_ErrorCode See description of SBC_ErrorCode.
*/
SBC_ErrorCode SBC_WK_MEAS_On(void);
/**
* @brief Disable Voltage Sensing and enable wake-up functionality. See chapter 9.2.4 in datasheet.
*
* @retval SBC_ErrorCode See description of SBC_ErrorCode.
*/
SBC_ErrorCode SBC_WK_MEAS_Off(void);
/**
* @brief WK is enabled as wake source. See chapter 5.2.
*
* @retval SBC_ErrorCode See description of SBC_ErrorCode.
*/
SBC_ErrorCode SBC_TIMER_WK_EN_On(void);
/**
* @brief WK wake-up disabled. See chapter 5.2.
*
* @retval SBC_ErrorCode See description of SBC_ErrorCode.
*/
SBC_ErrorCode SBC_TIMER_WK_EN_Off(void);
/**
* @brief Reads System Status Control, both lower and higher bits. See page 138 in datasheet.
*
* @retval Upper 8 bit are read from register SBC_SYS_STATUS_CTRL_1 and the lower 8 bit from SBC_SYS_STATUS_CTRL_0
*/
uint16_t SBC_SYS_STAT_Read(void);
/**
* @brief Writes System Status Control, both lower and higher bits. See page 138 in datasheet.
*
* @retval SBC_ErrorCode See description of SBC_ErrorCode.
*/
SBC_ErrorCode SBC_SYS_STAT_Write(uint16_t SystemStatus);
/**
* @brief Locks CP_EN, GPIO configuration and 'rwl'-bits.
*
* @retval SBC_ErrorCode See description of SBC_ErrorCode.
*/
SBC_ErrorCode SBC_Lock_Configuration(void);
/**
* @brief Unlocks CP_EN, GPIO configuration and 'rwl'-bits.
*
* @retval SBC_ErrorCode See description of SBC_ErrorCode.
*/
SBC_ErrorCode SBC_Unlock_Configuration(void);
/**
* @brief Clears both Wake Status registers.
*
* @retval SBC_ErrorCode See description of SBC_ErrorCode.
*/
SBC_ErrorCode SBC_Clear_Wake_Status(void);
#endif /*TLE94x1_H*/

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/*********************************************************************************************************************
* Copyright (c) 2019, Infineon Technologies AG
*
*
* Distributed under the Boost Software License, Version 1.0.
*
*
* Boost Software License - Version 1.0 - August 17th, 2003
*
* Permission is hereby granted, free of charge, to any person or organization
* obtaining a copy of the software and accompanying documentation covered by
* this license (the "Software") to use, reproduce, display, distribute,
* execute, and transmit the Software, and to prepare derivative works of the
* Software, and to permit third-parties to whom the Software is furnished to
* do so, all subject to the following:
*
* The copyright notices in the Software and this entire statement, including
* the above license grant, this restriction and the following disclaimer,
* must be included in all copies of the Software, in whole or in part, and
* all derivative works of the Software, unless such copies or derivative
* works are solely in the form of machine-executable object code generated by
* a source language processor.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
* SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
* FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
*
*********************************************************************************************************************/
/****************************************************************************************************//**
* @file TLE94x1_ISR.h
*
* @brief Declaration file for ISR-Vectors and ISR related functions
*
* @version V1.0.0
* @date 15. April 2019
* @author Markus Noll / markus.noll@infineon.com
* @author Yannek Micha Rixen / Yannek.Rixen@infineon.com
*******************************************************************************************************/
#ifndef TLE94x1_ISR_H
#define TLE94x1_ISR_H
/* ================================================================================ */
/* ============================ HEADER FILES ================================== */
/* ================================================================================ */
#include "TLE94x1_DEFINES.h"
/* ================================================================================ */
/* ================================ MACROS ==================================== */
/* ================================================================================ */
/**
* @def SBC_ISR_VECTOR
*
* @brief Vector defining the handling of interrupts.
*
* Vectors of this type have to be registered by the SBC_Register_Callback method.
*/
#define SBC_ISR_VECTOR(REG,MASK,POS,COMPARE) ((((uint32_t)REG) << 24) | (((uint32_t)MASK) << 16) | (((uint32_t)POS) << 8) | ((uint32_t)COMPARE))
/* ================================================================================ */
/* ======================= General Interrupt Defines ========================== */
/* ================================================================================ */
/* Interrupts based on WK_STAT_0 and WK_STAT_1 register are always available */
#define SBC_ISR_CAN_WU SBC_ISR_VECTOR(SBC_WK_STAT_0, SBC_WK_STAT_0_CAN_WU_Msk, SBC_WK_STAT_0_CAN_WU_Pos, SBC_CAN_WU_EVENT)
#define SBC_ISR_TIMER_WU SBC_ISR_VECTOR(SBC_WK_STAT_0, SBC_WK_STAT_0_TIMER_WU_Msk, SBC_WK_STAT_0_TIMER_WU_Pos, SBC_TIMER_WU_EVENT)
#define SBC_ISR_WK_WU SBC_ISR_VECTOR(SBC_WK_STAT_0, SBC_WK_STAT_0_WK_WU_Msk, SBC_WK_STAT_0_WK_WU_Pos, SBC_WK_WU_EVENT)
#define SBC_ISR_GPIO_WK_WU SBC_ISR_VECTOR(SBC_WK_STAT_1, SBC_WK_STAT_1_GPIO_WK_WU_Msk, SBC_WK_STAT_1_GPIO_WK_WU_Pos, SBC_GPIO_WK_WU_EVENT)
/* Following interrupts only usable if INT_GLOBAL bit is set to '1' */
#define SBC_ISR_VS_UV SBC_ISR_VECTOR(SBC_SUP_STAT_1, SBC_SUP_STAT_1_VS_UV_Msk, SBC_SUP_STAT_1_VS_UV_Pos, SBC_VS_UV_EVENT)
#define SBC_ISR_VS_OV SBC_ISR_VECTOR(SBC_SUP_STAT_1, SBC_SUP_STAT_1_VS_OV_Msk, SBC_SUP_STAT_1_VS_OV_Pos, SBC_VS_OV_EVENT)
#define SBC_ISR_VCC1_OV SBC_ISR_VECTOR(SBC_SUP_STAT_1, SBC_SUP_STAT_1_VCC1_OV_Msk, SBC_SUP_STAT_1_VCC1_OV_Pos, SBC_VCC1_OV_EVENT)
#define SBC_ISR_VCC1_UV_PREWARN SBC_ISR_VECTOR(SBC_SUP_STAT_1, SBC_SUP_STAT_1_VCC1_WARN_Msk, SBC_SUP_STAT_1_VCC1_WARN_Pos, SBC_VCC1_UV_PREWARN_EVENT)
#define SBC_ISR_VCC2_OT SBC_ISR_VECTOR(SBC_SUP_STAT_0, SBC_SUP_STAT_0_VCC2_OT_Msk, SBC_SUP_STAT_0_VCC2_OT_Pos, SBC_VCC2_OT_EVENT)
#define SBC_ISR_VCC2_UV SBC_ISR_VECTOR(SBC_SUP_STAT_0, SBC_SUP_STAT_0_VCC2_UV_Msk, SBC_SUP_STAT_0_VCC2_UV_Pos, SBC_VCC2_UV_EVENT)
#define SBC_ISR_VCC1_UV SBC_ISR_VECTOR(SBC_SUP_STAT_0, SBC_SUP_STAT_0_VCC1_UV_Msk, SBC_SUP_STAT_0_VCC1_UV_Pos, SBC_VCC1_UV_EVENT)
#define SBC_ISR_TSD2_SAFESTATE SBC_ISR_VECTOR(SBC_THERM_STAT, SBC_THERM_STAT_TSD2_SAFE_Msk, SBC_THERM_STAT_TSD2_SAFE_Pos, SBC_TSD2_SAFE_SAFESTATE_DETECTED)
#define SBC_ISR_TSD1 SBC_ISR_VECTOR(SBC_THERM_STAT, SBC_THERM_STAT_TSD1_Msk, SBC_THERM_STAT_TSD1_Pos, SBC_TSD1_EVENT)
#define SBC_ISR_TPW SBC_ISR_VECTOR(SBC_THERM_STAT, SBC_THERM_STAT_TPW_Msk, SBC_THERM_STAT_TPW_Pos, SBC_TPW_EVENT)
#define SBC_ISR_RESTART_AFTER_FAIL SBC_ISR_VECTOR(SBC_DEV_STAT, SBC_DEV_STAT_DEV_STAT_Msk, SBC_DEV_STAT_DEV_STAT_Pos, SBC_DEV_STAT_RESTART_AFTER_FAIL)
#define SBC_ISR_FROM_SLEEPMODE SBC_ISR_VECTOR(SBC_DEV_STAT, SBC_DEV_STAT_DEV_STAT_Msk, SBC_DEV_STAT_DEV_STAT_Pos, SBC_DEV_STAT_SLEEP_MODE)
#define SBC_ISR_WD_FAIL_1 SBC_ISR_VECTOR(SBC_DEV_STAT, SBC_DEV_STAT_WD_FAIL_Msk, SBC_DEV_STAT_WD_FAIL_Pos, SBC_WD_FAIL_1FAIL)
#define SBC_ISR_WD_FAIL_2 SBC_ISR_VECTOR(SBC_DEV_STAT, SBC_DEV_STAT_WD_FAIL_Msk, SBC_DEV_STAT_WD_FAIL_Pos, SBC_WD_FAIL_2FAIL)
#define SBC_ISR_FAILURE SBC_ISR_VECTOR(SBC_DEV_STAT, SBC_DEV_STAT_FAILURE_Msk, SBC_DEV_STAT_FAILURE_Pos, SBC_FAILURE_EVENT)
#define SBC_ISR_CAN_TSD SBC_ISR_VECTOR(SBC_BUS_STAT, SBC_BUS_STAT_CAN_FAIL_Msk, SBC_BUS_STAT_CAN_FAIL_Pos, SBC_CAN_FAIL_TSD)
#define SBC_ISR_CAN_TXD_DOM_TO SBC_ISR_VECTOR(SBC_BUS_STAT, SBC_BUS_STAT_CAN_FAIL_Msk, SBC_BUS_STAT_CAN_FAIL_Pos, SBC_CAN_FAIL_TXD_DOM_TO)
#define SBC_ISR_CAN_BUS_DOM_TO SBC_ISR_VECTOR(SBC_BUS_STAT, SBC_BUS_STAT_CAN_FAIL_Msk, SBC_BUS_STAT_CAN_FAIL_Pos, SBC_CAN_FAIL_BUS_DOM_TO)
#define SBC_ISR_VCAN_UV SBC_ISR_VECTOR(SBC_BUS_STAT, SBC_BUS_STAT_VCAN_UV_Msk, SBC_BUS_STAT_VCAN_UV_Pos, SBC_VCAN_UV_EVENT)
#define SBC_ISR_GPIO_OC SBC_ISR_VECTOR(SBC_GPIO_OC_STAT, SBC_GPIO_OC_STAT_GPIO_OC_Msk, SBC_GPIO_OC_STAT_GPIO_OC_Pos, SBC_GPIO_OC_EVENT)
#define SBC_ISR_GPIO_OL SBC_ISR_VECTOR(SBC_GPIO_OL_STAT, SBC_GPIO_OL_STAT_GPIO_OL_Msk, SBC_GPIO_OL_STAT_GPIO_OL_Pos, SBC_GPIO_OL_EVENT)
#endif /*TLE94x1_ISR_H*/

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/*********************************************************************************************************************
* Copyright (c) 2019, Infineon Technologies AG
*
*
* Distributed under the Boost Software License, Version 1.0.
*
*
* Boost Software License - Version 1.0 - August 17th, 2003
*
* Permission is hereby granted, free of charge, to any person or organization
* obtaining a copy of the software and accompanying documentation covered by
* this license (the "Software") to use, reproduce, display, distribute,
* execute, and transmit the Software, and to prepare derivative works of the
* Software, and to permit third-parties to whom the Software is furnished to
* do so, all subject to the following:
*
* The copyright notices in the Software and this entire statement, including
* the above license grant, this restriction and the following disclaimer,
* must be included in all copies of the Software, in whole or in part, and
* all derivative works of the Software, unless such copies or derivative
* works are solely in the form of machine-executable object code generated by
* a source language processor.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
* SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
* FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
*
*********************************************************************************************************************/
/****************************************************************************************************//**
* @file TLE94x1_SPI.c
*
* @brief Implementation of all SPI related functions
*
* @version V1.0.0
* @date 15. April 2019
* @author Markus Noll / markus.noll@infineon.com
* @author Yannek Micha Rixen / Yannek.Rixen@infineon.com
*******************************************************************************************************/
/* ================================================================================ */
/* ============================ HEADER FILES ================================ */
/* ================================================================================ */
#include "TLE94x1_SPI.h"
#include "mcu.h"
void SPI2_PortInit(void);
/* ================================================================================ */
/* ======================= SPI communication functions ====================== */
/* ================================================================================ */
uint8_t spitxbuf[10],spirxbuf[10];
extern McuType mcu;
uint8_t SBC_SPI_INIT(void) {
SpiDrv_InitCfgType masterCfg;
SPI2_PortInit();
SpiDrv_GetDefaultConfig(&masterCfg);
masterCfg.basicParameters.isMasterNode = true;
masterCfg.basicParameters.baudRate = 1000000ul;
//masterCfg.basicParameters.clockPolarity = SPIDRV_CLK_POLARITY_IDLE_IN_HIGH;
masterCfg.basicParameters.clockPhase = SPIDRV_CLK_PHASE_DATA_SAMPLE_ON_TRAILING_EDGE;
while(ClockDrv_GetFreq(&mcu.clockDrv, CLOCKDRV_SPI2, &masterCfg.basicParameters.busClockFreq) == false)
{
;
}
SpiDrv_SetConfig(&mcu.spiDrv2, &masterCfg);
SpiDrv_SetRxFifoWaterMask(&mcu.spiDrv2, 0);
//SpiDrv_SetIsrConfig(&mcu.spiDrv2, SPIDRV_ISR_SRC_RX_DATA, true);
/* Enable the SPI interrupts */
//IrqDrv_EnableIrq(SPI2_IRQn);
return 0;
}
uint16_t SBC_SPI_TRANSFER16(uint8_t Upper, uint8_t Lower) {
uint16_t ret;
//LPSPI_DRV_SetPcs(LPSPICOM1,LPSPI_PCS0,LPSPI_ACTIVE_LOW);
spitxbuf[0] = Upper;
spitxbuf[1] = Lower;
//SpiDrv_AsyncContinueFrameTransfer(&mcu.spiDrv2,2,spitxbuf,SPIDRV_FRAME_SIZE_BIT_TYPE_BYTE);
SpiDrv_MasterSyncTransfer(&mcu.spiDrv2,SPIDRV_FRAME_SIZE_BIT_TYPE_BYTE,2,spitxbuf,spirxbuf);
//LPSPI_DRV_MasterTransferBlocking(LPSPICOM1,spitxbuf,spirxbuf,2,10);
ret = spirxbuf[0];
ret <<= 8;
ret |= spirxbuf[1];
//LPSPI_DRV_SetPcs(LPSPICOM1,LPSPI_PCS0,LPSPI_ACTIVE_HIGH);
return ret;
}
/********************CVA SPI DRV**********************/
void SPI2_Handler(void)
{
if(SpiDrv_GetStatus(&mcu.spiDrv2, SPIDRV_STATUS_RX_DATA) == true && SpiDrv_GetIsrConfig(&mcu.spiDrv2, SPIDRV_ISR_SRC_RX_DATA) == true)
{
//spi0IrqCnt++;
//uint8_t len = SpiDrv_AsyncReceive(&mcu.spiDrv2, (void *)masterRxBuff, true);
}
}
void SPI2_PortInit(void)
{
/* SPI2 CS */
PinsDrv_SetMuxModeSel(&mcu.ptc, 14, PINSDRV_MUX_ALT3);
/* Strength driver */
PortReg_SetPcrDrvStr(mcu.ptc.port, 14, 1);
/* fast slew rate */
PortReg_SetPcrSr(mcu.ptc.port, 14, 1);
/* SPI2 CLK */
PinsDrv_SetMuxModeSel(&mcu.ptc, 15, PINSDRV_MUX_ALT3);
/* Strength driver */
PortReg_SetPcrDrvStr(mcu.ptc.port, 15, 1);
/* fast slew rate */
PortReg_SetPcrSr(mcu.ptc.port, 15, 1);
/* SPI2 SIN */
PinsDrv_SetMuxModeSel(&mcu.ptc, 0, PINSDRV_MUX_ALT3);
/* Strength driver */
PortReg_SetPcrDrvStr(mcu.ptc.port, 0, 1);
/* fast slew rate */
PortReg_SetPcrSr(mcu.ptc.port, 0, 1);
/* SPI2 SOUT */
PinsDrv_SetMuxModeSel(&mcu.ptc, 1, PINSDRV_MUX_ALT3);
/* Strength driver */
PortReg_SetPcrDrvStr(mcu.ptc.port, 1, 1);
/* fast slew rate */
PortReg_SetPcrSr(mcu.ptc.port, 1, 1);
}
void SPI_TEST_TASK(void)
{
}

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/*********************************************************************************************************************
* Copyright (c) 2019, Infineon Technologies AG
*
*
* Distributed under the Boost Software License, Version 1.0.
*
*
* Boost Software License - Version 1.0 - August 17th, 2003
*
* Permission is hereby granted, free of charge, to any person or organization
* obtaining a copy of the software and accompanying documentation covered by
* this license (the "Software") to use, reproduce, display, distribute,
* execute, and transmit the Software, and to prepare derivative works of the
* Software, and to permit third-parties to whom the Software is furnished to
* do so, all subject to the following:
*
* The copyright notices in the Software and this entire statement, including
* the above license grant, this restriction and the following disclaimer,
* must be included in all copies of the Software, in whole or in part, and
* all derivative works of the Software, unless such copies or derivative
* works are solely in the form of machine-executable object code generated by
* a source language processor.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
* SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
* FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
*
*********************************************************************************************************************/
/****************************************************************************************************//**
* @file TLE94x1_SPI.h
*
* @brief Declaration file for TLE94x1 SBC family device SPI functions
*
* @version V1.0.0
* @date 15. April 2019
* @author Markus Noll / markus.noll@infineon.com
* @author Yannek Micha Rixen / Yannek.Rixen@infineon.com
*******************************************************************************************************/
#ifndef TLE94x1_SPI_H
#define TLE94x1_SPI_H
/* ================================================================================ */
/* ============================ HEADER FILES ================================ */
/* ================================================================================ */
#include <stdint.h>
/* ================================================================================ */
/* ============================= SPI Functions ============================== */
/* ================================================================================ */
/**
* @brief IMPORTANT! THIS METHOD HAS TO BE DEFINED BY THE USER
*
* The function has to initialze the SPI of the uC and will be called once during SBC_Init().
* In case, the SPI hardware is already initialized by some other code before, it can be left blank.
*
* @retval Method has to return 0 if initialization was successful.
*/
uint8_t SBC_SPI_INIT(void);
/**
* @brief IMPORTANT! THIS METHOD HAS TO BE DEFINED BY THE USER
*
* The function will be called by the library everytime when a SPI communication is needed.
* The function proceeds a bidirectional 16-bit transfer to/from the SBC .
* As some UCs only supports 8-Bit transfers, the input arguments are split in two 8-bit arguments.
* For further implementation details have a look at datasheet chapter 13.1 or at the Arduino-examples.
*
* @param Upper The first 8 bit to transmit to the SBC.
* @param Lower The second 8 bit to transmit to the SBC.
* @retval The function will return all 16 bits received from the SBC.
* Bit[15:8] are the first 8 bits received (Status-Information-Field).
* Bit[7:0] is the data-field transmitted of the SBC.
*/
uint16_t SBC_SPI_TRANSFER16(uint8_t Upper, uint8_t Lower);
#endif /* TLE94x1_SPI_H */

78
cva_bootloader_m0146/src/main.c
View File

@ -28,6 +28,8 @@
#include "bootloader.h"
#include "fls.h"
#include "private_driver/uds/user/uds_user.h"
#include "SEGGER_RTT.h"
#include "TLE94x1.h"
/*******************************************************************************
* the defines
@ -537,12 +539,7 @@ void FlexCanBoot_Init(void)
flexCanDrv_DemoObj = &mcu.flexCanDrv0;
/* set PTC1 MUX as GPIO */
PinsDrv_SetMuxModeSel(&mcu.ptc, 1, PINSDRV_MUX_AS_GPIO);
/* set PTC1 as GPIO output */
PinsDrv_SetPinDirection(&mcu.ptc, 1, 1);
/* set PTC1 as high to control CAN transceiver STB */
PinsDrv_WritePin(&mcu.ptc, 1, 0);
/* set PTC1 MUX as GPIO */
PinsDrv_SetMuxModeSel(&mcu.ptd, 1, PINSDRV_MUX_AS_GPIO);
@ -559,10 +556,10 @@ void FlexCanBoot_Init(void)
PinsDrv_WritePin(&mcu.pte, 7, 0);
/* set PTE4 as MUX 5 - CAN0.RX */
PinsDrv_SetMuxModeSel(&mcu.pte, 4, PINSDRV_MUX_ALT5);
PinsDrv_SetMuxModeSel(&mcu.ptb, 0, PINSDRV_MUX_ALT5);
/* set PTE5 as MUX 5 - CAN0.TX */
PinsDrv_SetMuxModeSel(&mcu.pte, 5, PINSDRV_MUX_ALT5);
PinsDrv_SetMuxModeSel(&mcu.ptb, 1, PINSDRV_MUX_ALT5);
flexCanCfg.clkSrc = FLEXCANDRV_CLKSRC_CHICLK;
flexCanCfg.fdEnable = false;
@ -743,6 +740,9 @@ int main(void)
FlexCan_FrameStructureType rxMsg;
/* Setup the clock */
ClockDrv_ModuleClkConfigType clockConfig;
uint32_t ret;
uint32_t rollingcounter,temp;
uint32_t tTcr = 0;
IrqDrv_DisableGlobalInterrupt();
@ -755,11 +755,7 @@ int main(void)
memset(&flexCan_DataInfo, 0, sizeof(flexCan_DataInfo));
memset(&flexCanCfg, 0, sizeof(flexCanCfg));
/* Setup the Pll div2 clock */
clockConfig.gating = true;
clockConfig.source = CLOCKDRV_PLL;
clockConfig.div = 1;
ClockDrv_ConfigureClock(&mcu.clockDrv, CLOCKDRV_PLL_DIV2, &clockConfig);
SEGGER_RTT_Init();
/* Enable the clock for all port peripheral */
clockConfig.gating = true;
@ -770,15 +766,40 @@ int main(void)
ClockDrv_ConfigureClock(&mcu.clockDrv, CLOCKDRV_PORTD, &clockConfig);
ClockDrv_ConfigureClock(&mcu.clockDrv, CLOCKDRV_PORTE, &clockConfig);
/* Setup the Pll div2 clock */
clockConfig.gating = true;
clockConfig.source = CLOCKDRV_PLL;
clockConfig.div = 1;
ClockDrv_ConfigureClock(&mcu.clockDrv, CLOCKDRV_PLL_DIV2, &clockConfig);
/* Setup the SPI clock */
clockConfig.gating = true;
clockConfig.source = CLOCKDRV_PLL_DIV2;
ret = ClockDrv_ConfigureClock(&mcu.clockDrv, CLOCKDRV_SPI2, &clockConfig);
tTcr = SpiReg_GetTcr((const SpiRegType *)&mcu.spiDrv2.reg);
SpiDrv_SetPrescaler(&tTcr,0x03);
//SEGGER_RTT_printf(0,"ret = %d\n",ret);
//SEGGER_RTT_printf(0,"-----SBC_SPI_INIT-----\n");
SBC_SPI_INIT();
SBC_Init();
//SBC_Mode_Normal();
/* get CAN controller default configuration */
FlexCanDrv_GetDefaultCfg(&flexCanCfg);
flexCanCfg.msgNum = sizeof(msgCfgObj) / sizeof(FlexCanDrv_MsgCfgType);
flexCanCfg.msgCfg = msgCfgObj;
FlexCanBoot_Init();
PinsDrv_SetMuxModeSel(&mcu.ptd, 1, PINSDRV_MUX_AS_GPIO);
PinsDrv_SetPinDirection(&mcu.ptd, 1, 1);
PinsDrv_SetPullSel(&mcu.ptd, 1, PINSDRV_INTERNAL_PULL_UP);
PinsDrv_WritePin(&mcu.ptd, 1, 0);
PinsDrv_SetMuxModeSel(&mcu.ptb, 5, PINSDRV_MUX_AS_GPIO);
PinsDrv_SetPinDirection(&mcu.ptb, 5, 1);
PinsDrv_SetPullSel(&mcu.ptb, 5, PINSDRV_INTERNAL_PULL_UP);
PinsDrv_WritePin(&mcu.ptb, 5, 0);
/* UDS init */
Uds_UserInit(&udsObj, &udsParam);
@ -793,28 +814,43 @@ int main(void)
IrqDrv_EnableGlobalInterrupt();
while(1)
{
if(gSystick1msEvent > 0u)
{
gSystick1msEvent = 0;
gSystick1msCnt++;
if (gSystick1msCnt % 10 == 0)
{
SBC_WD_Trigger();
}
if(gSystick1msCnt >= 500)
if (gSystick1msCnt % 500 == 0)
{
FlexCanBoot_TxMessage(UDS_TEXT_TX_MSG_ID,testdata,8);
}
if(gSystick1msCnt >= 5000)
{
gSystick1msCnt = 0;
/* Test Io */
if(gTestIoEn == 0)
{
gTestIoEn = 1;
PinsDrv_WritePin(&mcu.ptd, 1, 1);
//PinsDrv_WritePin(&mcu.ptb, 5, 1);
}
else
{
gTestIoEn = 0;
PinsDrv_WritePin(&mcu.ptd, 1, 0);
//PinsDrv_WritePin(&mcu.ptb, 5, 0);
}
//FlexCanBoot_TxMessage(UDS_TEXT_TX_MSG_ID,testdata,8);
ret = SBC_Read_Command(SBC_M_S_CTRL);
SEGGER_RTT_printf(0,"%04d : FAM_PROD_STAT = %x\n",rollingcounter++,ret);
}

3
cva_bootloader_m0146/src/private_driver/drivers/clock/clock_drv.c
View File

@ -305,11 +305,12 @@ const ClockDrv_ModuleClkFuncType c_clockFuncTable[CLOCKDRV_CLOCK_NUM] = {
{GET_FREQ_FUNC(Cmuf), CONFIG_CLOCK_FUNC(Cmuf) }, /* CLOCKDRV_CMUF */
{GET_FREQ_FUNC(Fccu), CONFIG_CLOCK_FUNC(Fccu) }, /* CLOCKDRV_FCCU */
{GET_FREQ_FUNC(Cmup), CONFIG_CLOCK_FUNC(Cmup) }, /* CLOCKDRV_CMUP */
#if 0
{GET_FREQ_FUNC(I2C), CONFIG_CLOCK_FUNC(I2C) }, /* CLOCKDRV_I2C */
{GET_FREQ_FUNC(Spi0), CONFIG_CLOCK_FUNC(Spi0) }, /* CLOCKDRV_SPI0 */
{GET_FREQ_FUNC(Spi1), CONFIG_CLOCK_FUNC(Spi1) }, /* CLOCKDRV_SPI1 */
{GET_FREQ_FUNC(Spi2), CONFIG_CLOCK_FUNC(Spi2) }, /* CLOCKDRV_SPI2 */
#if 0
{GET_FREQ_FUNC(Spi3), CONFIG_CLOCK_FUNC(Spi3) }, /* CLOCKDRV_SPI3 */
{GET_FREQ_FUNC(Uart0), CONFIG_CLOCK_FUNC(Uart0) }, /* CLOCKDRV_UART0 */
{GET_FREQ_FUNC(Uart1), CONFIG_CLOCK_FUNC(Uart1) }, /* CLOCKDRV_UART1 */

3
cva_bootloader_m0146/src/private_driver/drivers/clock/clock_drv.h
View File

@ -125,11 +125,12 @@ typedef enum
CLOCKDRV_CMUF, /* CMUF clock */
CLOCKDRV_FCCU, /* FCCU clock */
CLOCKDRV_CMUP, /* CMUP clock */
#if 0
CLOCKDRV_I2C, /* I2C clock */
CLOCKDRV_SPI0, /* SPI0 clock */
CLOCKDRV_SPI1, /* SPI1 clock */
CLOCKDRV_SPI2, /* SPI2 clock */
#if 0
CLOCKDRV_SPI3, /* SPI3 clock */
CLOCKDRV_UART0, /* UART0 clock */
CLOCKDRV_UART1, /* UART1 clock */

4
cva_bootloader_m0146/src/private_driver/mcu.c
View File

@ -83,6 +83,10 @@ void Mcu_Init(McuType *obj)
/* Initialize reset driver */
ResetDrv_Init(&obj->resetDrv, RCM, PCC, APC);
SpiDrv_Init(&obj->spiDrv2, SPI2);
/* Initialize watchdog driver */
WdgDrv_Init(&obj->wdgDrv, WDG);
}